diff options
| -rw-r--r-- | MAINTAINERS | 5 | ||||
| -rwxr-xr-x | MAKEALL | 2 | ||||
| -rw-r--r-- | Makefile | 8 | ||||
| -rw-r--r-- | README | 4 | ||||
| -rw-r--r-- | cpu/at32ap/at32ap700x/Makefile (renamed from cpu/at32ap/at32ap7000/Makefile) | 0 | ||||
| -rw-r--r-- | cpu/at32ap/at32ap700x/gpio.c (renamed from cpu/at32ap/at32ap7000/gpio.c) | 9 | ||||
| -rw-r--r-- | cpu/at32ap/atmel_mci.c | 13 | ||||
| -rw-r--r-- | include/asm-avr32/arch-at32ap700x/chip-features.h | 34 | ||||
| -rw-r--r-- | include/asm-avr32/arch-at32ap700x/clk.h (renamed from include/asm-avr32/arch-at32ap7000/clk.h) | 8 | ||||
| -rw-r--r-- | include/asm-avr32/arch-at32ap700x/gpio.h (renamed from include/asm-avr32/arch-at32ap7000/gpio.h) | 8 | ||||
| -rw-r--r-- | include/asm-avr32/arch-at32ap700x/hmatrix2.h (renamed from include/asm-avr32/arch-at32ap7000/hmatrix2.h) | 0 | ||||
| -rw-r--r-- | include/asm-avr32/arch-at32ap700x/memory-map.h (renamed from include/asm-avr32/arch-at32ap7000/memory-map.h) | 0 | ||||
| -rw-r--r-- | include/asm-avr32/arch-at32ap700x/mmc.h (renamed from include/asm-avr32/arch-at32ap7000/mmc.h) | 0 | ||||
| -rw-r--r-- | include/configs/atstk1003.h | 184 | ||||
| -rw-r--r-- | include/configs/atstk1004.h | 185 | ||||
| -rw-r--r-- | lib_avr32/board.c | 2 | ||||
| -rw-r--r-- | lib_avr32/interrupts.c | 2 |
17 files changed, 451 insertions, 13 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index b8c1fdc9d06..ccf4d352d47 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -630,7 +630,10 @@ Hayden Fraser <Hayden.Fraser@freescale.com> Haavard Skinnemoen <hskinnemoen@atmel.com> - ATSTK1000 AT32AP7000 + ATSTK1000 AT32AP7xxx + ATSTK1002 AT32AP7000 + ATSTK1003 AT32AP7001 + ATSTK1004 AT32AP7002 ######################################################################### # End of MAINTAINERS list # @@ -642,6 +642,8 @@ LIST_coldfire=" \ LIST_avr32=" \ atstk1002 \ + atstk1003 \ + atstk1004 \ " ######################################################################### @@ -2656,7 +2656,13 @@ bf561-ezkit_config: unconfig ######################################################################### atstk1002_config : unconfig - @$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap7000 + @$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x + +atstk1003_config : unconfig + @$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x + +atstk1004_config : unconfig + @$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x ######################################################################### ######################################################################### @@ -235,9 +235,7 @@ The following options need to be configured: - Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS. - CPU Daughterboard Type: (if CONFIG_ATSTK1000 is defined) - Define exactly one of - CONFIG_ATSTK1002 - + Define exactly one, e.g. CONFIG_ATSTK1002 - CPU Module Type: (if CONFIG_COGENT is defined) Define exactly one of diff --git a/cpu/at32ap/at32ap7000/Makefile b/cpu/at32ap/at32ap700x/Makefile index d2767121184..d2767121184 100644 --- a/cpu/at32ap/at32ap7000/Makefile +++ b/cpu/at32ap/at32ap700x/Makefile diff --git a/cpu/at32ap/at32ap7000/gpio.c b/cpu/at32ap/at32ap700x/gpio.c index 52f5372a607..859124a91f6 100644 --- a/cpu/at32ap/at32ap7000/gpio.c +++ b/cpu/at32ap/at32ap700x/gpio.c @@ -21,6 +21,7 @@ */ #include <common.h> +#include <asm/arch/chip-features.h> #include <asm/arch/gpio.h> /* @@ -52,6 +53,7 @@ void gpio_enable_ebi(void) #endif } +#ifdef AT32AP700x_CHIP_HAS_USART void gpio_enable_usart0(void) { gpio_select_periph_B(GPIO_PIN_PA8, 0); @@ -72,10 +74,12 @@ void gpio_enable_usart2(void) void gpio_enable_usart3(void) { + gpio_select_periph_B(GPIO_PIN_PB17, 0); gpio_select_periph_B(GPIO_PIN_PB18, 0); - gpio_select_periph_B(GPIO_PIN_PB19, 0); } +#endif +#ifdef AT32AP700x_CHIP_HAS_MACB void gpio_enable_macb0(void) { gpio_select_periph_A(GPIO_PIN_PC3, 0); /* TXD0 */ @@ -125,7 +129,9 @@ void gpio_enable_macb1(void) gpio_select_periph_B(GPIO_PIN_PD15, 0); /* SPD */ #endif } +#endif +#ifdef AT32AP700x_CHIP_HAS_MMCI void gpio_enable_mmci(void) { gpio_select_periph_A(GPIO_PIN_PA10, 0); /* CLK */ @@ -135,3 +141,4 @@ void gpio_enable_mmci(void) gpio_select_periph_A(GPIO_PIN_PA14, 0); /* DATA2 */ gpio_select_periph_A(GPIO_PIN_PA15, 0); /* DATA3 */ } +#endif diff --git a/cpu/at32ap/atmel_mci.c b/cpu/at32ap/atmel_mci.c index cf48be10ba4..f59dfb5995e 100644 --- a/cpu/at32ap/atmel_mci.c +++ b/cpu/at32ap/atmel_mci.c @@ -198,11 +198,11 @@ mmc_bread(int dev, unsigned long start, lbaint_t blkcnt, /* Put the device into Transfer state */ ret = mmc_cmd(MMC_CMD_SELECT_CARD, mmc_rca << 16, resp, R1 | NCR); - if (ret) goto fail; + if (ret) goto out; /* Set block length */ ret = mmc_cmd(MMC_CMD_SET_BLOCKLEN, mmc_blkdev.blksz, resp, R1 | NCR); - if (ret) goto fail; + if (ret) goto out; pr_debug("MCI_DTOR = %08lx\n", mmci_readl(DTOR)); @@ -211,7 +211,7 @@ mmc_bread(int dev, unsigned long start, lbaint_t blkcnt, start * mmc_blkdev.blksz, resp, (R1 | NCR | TRCMD_START | TRDIR_READ | TRTYP_BLOCK)); - if (ret) goto fail; + if (ret) goto out; ret = -EIO; wordcount = 0; @@ -219,7 +219,7 @@ mmc_bread(int dev, unsigned long start, lbaint_t blkcnt, do { status = mmci_readl(SR); if (status & (ERROR_FLAGS | MMCI_BIT(OVRE))) - goto fail; + goto read_error; } while (!(status & MMCI_BIT(RXRDY))); if (status & MMCI_BIT(RXRDY)) { @@ -244,9 +244,10 @@ out: mmc_cmd(MMC_CMD_SELECT_CARD, 0, resp, NCR); return i; -fail: +read_error: mmc_cmd(MMC_CMD_SEND_STATUS, mmc_rca << 16, &card_status, R1 | NCR); - printf("mmc: bread failed, card status = %08x\n", card_status); + printf("mmc: bread failed, status = %08x, card status = %08x\n", + status, card_status); goto out; } diff --git a/include/asm-avr32/arch-at32ap700x/chip-features.h b/include/asm-avr32/arch-at32ap700x/chip-features.h new file mode 100644 index 00000000000..29b1fd663d0 --- /dev/null +++ b/include/asm-avr32/arch-at32ap700x/chip-features.h @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2007 Atmel Corporation + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef __ASM_AVR32_ARCH_CHIP_FEATURES_H__ +#define __ASM_AVR32_ARCH_CHIP_FEATURES_H__ + +/* Currently, all the AP700x chips have these */ +#define AT32AP700x_CHIP_HAS_USART +#define AT32AP700x_CHIP_HAS_MMCI + +/* Only AP7000 has ethernet interface */ +#ifdef CONFIG_AT32AP7000 +#define AT32AP700x_CHIP_HAS_MACB +#endif + +#endif /* __ASM_AVR32_ARCH_CHIP_FEATURES_H__ */ diff --git a/include/asm-avr32/arch-at32ap7000/clk.h b/include/asm-avr32/arch-at32ap700x/clk.h index 7e20d97b7f9..ea84c0874c0 100644 --- a/include/asm-avr32/arch-at32ap7000/clk.h +++ b/include/asm-avr32/arch-at32ap700x/clk.h @@ -22,6 +22,8 @@ #ifndef __ASM_AVR32_ARCH_CLK_H__ #define __ASM_AVR32_ARCH_CLK_H__ +#include <asm/arch/chip-features.h> + #ifdef CONFIG_PLL #define MAIN_CLK_RATE ((CFG_OSC0_HZ / CFG_PLL0_DIV) * CFG_PLL0_MUL) #else @@ -50,10 +52,13 @@ static inline unsigned long get_sdram_clk_rate(void) { return get_hsb_clk_rate(); } +#ifdef AT32AP700x_CHIP_HAS_USART static inline unsigned long get_usart_clk_rate(unsigned int dev_id) { return get_pba_clk_rate(); } +#endif +#ifdef AT32AP700x_CHIP_HAS_USART static inline unsigned long get_macb_pclk_rate(unsigned int dev_id) { return get_pbb_clk_rate(); @@ -62,9 +67,12 @@ static inline unsigned long get_macb_hclk_rate(unsigned int dev_id) { return get_hsb_clk_rate(); } +#endif +#ifdef AT32AP700x_CHIP_HAS_MMCI static inline unsigned long get_mci_clk_rate(void) { return get_pbb_clk_rate(); } +#endif #endif /* __ASM_AVR32_ARCH_CLK_H__ */ diff --git a/include/asm-avr32/arch-at32ap7000/gpio.h b/include/asm-avr32/arch-at32ap700x/gpio.h index e4812d4d08b..b10a3e4f868 100644 --- a/include/asm-avr32/arch-at32ap7000/gpio.h +++ b/include/asm-avr32/arch-at32ap700x/gpio.h @@ -22,6 +22,7 @@ #ifndef __ASM_AVR32_ARCH_GPIO_H__ #define __ASM_AVR32_ARCH_GPIO_H__ +#include <asm/arch/chip-features.h> #include <asm/arch/memory-map.h> #define NR_GPIO_CONTROLLERS 5 @@ -201,12 +202,19 @@ void gpio_select_periph_A(unsigned int pin, int use_pullup); void gpio_select_periph_B(unsigned int pin, int use_pullup); void gpio_enable_ebi(void); + +#ifdef AT32AP700x_CHIP_HAS_USART void gpio_enable_usart0(void); void gpio_enable_usart1(void); void gpio_enable_usart2(void); void gpio_enable_usart3(void); +#endif +#ifdef AT32AP700x_CHIP_HAS_MACB void gpio_enable_macb0(void); void gpio_enable_macb1(void); +#endif +#ifdef AT32AP700x_CHIP_HAS_MMCI void gpio_enable_mmci(void); +#endif #endif /* __ASM_AVR32_ARCH_GPIO_H__ */ diff --git a/include/asm-avr32/arch-at32ap7000/hmatrix2.h b/include/asm-avr32/arch-at32ap700x/hmatrix2.h index b0e787a92f9..b0e787a92f9 100644 --- a/include/asm-avr32/arch-at32ap7000/hmatrix2.h +++ b/include/asm-avr32/arch-at32ap700x/hmatrix2.h diff --git a/include/asm-avr32/arch-at32ap7000/memory-map.h b/include/asm-avr32/arch-at32ap700x/memory-map.h index 5513e88e7b0..5513e88e7b0 100644 --- a/include/asm-avr32/arch-at32ap7000/memory-map.h +++ b/include/asm-avr32/arch-at32ap700x/memory-map.h diff --git a/include/asm-avr32/arch-at32ap7000/mmc.h b/include/asm-avr32/arch-at32ap700x/mmc.h index fcfbbb3c6cb..fcfbbb3c6cb 100644 --- a/include/asm-avr32/arch-at32ap7000/mmc.h +++ b/include/asm-avr32/arch-at32ap700x/mmc.h diff --git a/include/configs/atstk1003.h b/include/configs/atstk1003.h new file mode 100644 index 00000000000..194788b18da --- /dev/null +++ b/include/configs/atstk1003.h @@ -0,0 +1,184 @@ +/* + * Copyright (C) 2007 Atmel Corporation + * + * Configuration settings for the ATSTK1003 CPU daughterboard + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_AVR32 1 +#define CONFIG_AT32AP 1 +#define CONFIG_AT32AP7001 1 +#define CONFIG_ATSTK1003 1 +#define CONFIG_ATSTK1000 1 + +#define CONFIG_ATSTK1000_EXT_FLASH 1 + +/* + * Timer clock frequency. We're using the CPU-internal COUNT register + * for this, so this is equivalent to the CPU core clock frequency + */ +#define CFG_HZ 1000 + +/* + * Set up the PLL to run at 140 MHz, the CPU to run at the PLL + * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the + * PLL frequency. + * (CFG_OSC0_HZ * CFG_PLL0_MUL) / CFG_PLL0_DIV = PLL MHz + */ +#define CONFIG_PLL 1 +#define CFG_POWER_MANAGER 1 +#define CFG_OSC0_HZ 20000000 +#define CFG_PLL0_DIV 1 +#define CFG_PLL0_MUL 7 +#define CFG_PLL0_SUPPRESS_CYCLES 16 +/* + * Set the CPU running at: + * PLL / (2^CFG_CLKDIV_CPU) = CPU MHz + */ +#define CFG_CLKDIV_CPU 0 +/* + * Set the HSB running at: + * PLL / (2^CFG_CLKDIV_HSB) = HSB MHz + */ +#define CFG_CLKDIV_HSB 1 +/* + * Set the PBA running at: + * PLL / (2^CFG_CLKDIV_PBA) = PBA MHz + */ +#define CFG_CLKDIV_PBA 2 +/* + * Set the PBB running at: + * PLL / (2^CFG_CLKDIV_PBB) = PBB MHz + */ +#define CFG_CLKDIV_PBB 1 + +/* + * The PLLOPT register controls the PLL like this: + * icp = PLLOPT<2> + * ivco = PLLOPT<1:0> + * + * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz). + */ +#define CFG_PLL0_OPT 0x04 + +#undef CONFIG_USART0 +#define CONFIG_USART1 1 +#undef CONFIG_USART2 +#undef CONFIG_USART3 + +/* User serviceable stuff */ +#define CONFIG_DOS_PARTITION 1 + +#define CONFIG_CMDLINE_TAG 1 +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 + +#define CONFIG_STACKSIZE (2048) + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_BOOTARGS \ + "console=ttyS0 root=/dev/mmcblk0p1 rootwait" + +#define CONFIG_BOOTCOMMAND \ + "mmcinit; ext2load mmc 0:1 0x10400000 /boot/uImage; bootm" + +/* + * Only interrupt autoboot if <space> is pressed. Otherwise, garbage + * data on the serial line may interrupt the boot sequence. + */ +#define CONFIG_BOOTDELAY 1 +#define CONFIG_AUTOBOOT 1 +#define CONFIG_AUTOBOOT_KEYED 1 +#define CONFIG_AUTOBOOT_PROMPT \ + "Press SPACE to abort autoboot in %d seconds\n" +#define CONFIG_AUTOBOOT_DELAY_STR "d" +#define CONFIG_AUTOBOOT_STOP_STR " " + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_MMC + +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS +#undef CONFIG_CMD_SETGETDCR +#undef CONFIG_CMD_XIMG + +#define CONFIG_ATMEL_USART 1 +#define CONFIG_PIO2 1 +#define CFG_HSDRAMC 1 +#define CONFIG_MMC 1 + +#define CFG_DCACHE_LINESZ 32 +#define CFG_ICACHE_LINESZ 32 + +#define CONFIG_NR_DRAM_BANKS 1 + +/* External flash on STK1000 */ +#if 0 +#define CFG_FLASH_CFI 1 +#define CFG_FLASH_CFI_DRIVER 1 +#endif + +#define CFG_FLASH_BASE 0x00000000 +#define CFG_FLASH_SIZE 0x800000 +#define CFG_MAX_FLASH_BANKS 1 +#define CFG_MAX_FLASH_SECT 135 + +#define CFG_MONITOR_BASE CFG_FLASH_BASE + +#define CFG_INTRAM_BASE 0x24000000 +#define CFG_INTRAM_SIZE 0x8000 + +#define CFG_SDRAM_BASE 0x10000000 + +#define CFG_ENV_IS_IN_FLASH 1 +#define CFG_ENV_SIZE 65536 +#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_FLASH_SIZE - CFG_ENV_SIZE) + +#define CFG_INIT_SP_ADDR (CFG_INTRAM_BASE + CFG_INTRAM_SIZE) + +#define CFG_MALLOC_LEN (256*1024) + +/* Allow 4MB for the kernel run-time image */ +#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 0x00400000) +#define CFG_BOOTPARAMS_LEN (16 * 1024) + +/* Other configuration settings that shouldn't have to change all that often */ +#define CFG_PROMPT "Uboot> " +#define CFG_CBSIZE 256 +#define CFG_MAXARGS 16 +#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) +#define CFG_LONGHELP 1 + +#define CFG_MEMTEST_START CFG_SDRAM_BASE +#define CFG_MEMTEST_END (CFG_MEMTEST_START + 0x700000) +#define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } + +#endif /* __CONFIG_H */ diff --git a/include/configs/atstk1004.h b/include/configs/atstk1004.h new file mode 100644 index 00000000000..1bad171cbf3 --- /dev/null +++ b/include/configs/atstk1004.h @@ -0,0 +1,185 @@ +/* + * Copyright (C) 2007 Atmel Corporation + * + * Configuration settings for the ATSTK1003 CPU daughterboard + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_AVR32 1 +#define CONFIG_AT32AP 1 +#define CONFIG_AT32AP7002 1 +#define CONFIG_ATSTK1004 1 +#define CONFIG_ATSTK1000 1 + +#define CONFIG_ATSTK1000_EXT_FLASH 1 + +/* + * Timer clock frequency. We're using the CPU-internal COUNT register + * for this, so this is equivalent to the CPU core clock frequency + */ +#define CFG_HZ 1000 + +/* + * Set up the PLL to run at 140 MHz, the CPU to run at the PLL + * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the + * PLL frequency. + * (CFG_OSC0_HZ * CFG_PLL0_MUL) / CFG_PLL0_DIV = PLL MHz + */ +#define CONFIG_PLL 1 +#define CFG_POWER_MANAGER 1 +#define CFG_OSC0_HZ 20000000 +#define CFG_PLL0_DIV 1 +#define CFG_PLL0_MUL 7 +#define CFG_PLL0_SUPPRESS_CYCLES 16 +/* + * Set the CPU running at: + * PLL / (2^CFG_CLKDIV_CPU) = CPU MHz + */ +#define CFG_CLKDIV_CPU 0 +/* + * Set the HSB running at: + * PLL / (2^CFG_CLKDIV_HSB) = HSB MHz + */ +#define CFG_CLKDIV_HSB 1 +/* + * Set the PBA running at: + * PLL / (2^CFG_CLKDIV_PBA) = PBA MHz + */ +#define CFG_CLKDIV_PBA 2 +/* + * Set the PBB running at: + * PLL / (2^CFG_CLKDIV_PBB) = PBB MHz + */ +#define CFG_CLKDIV_PBB 1 + +/* + * The PLLOPT register controls the PLL like this: + * icp = PLLOPT<2> + * ivco = PLLOPT<1:0> + * + * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz). + */ +#define CFG_PLL0_OPT 0x04 + +#undef CONFIG_USART0 +#define CONFIG_USART1 1 +#undef CONFIG_USART2 +#undef CONFIG_USART3 + +/* User serviceable stuff */ +#define CONFIG_DOS_PARTITION 1 + +#define CONFIG_CMDLINE_TAG 1 +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 + +#define CONFIG_STACKSIZE (2048) + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_BOOTARGS \ + "console=ttyS0 root=/dev/mmcblk0p1 rootwait" + +#define CONFIG_BOOTCOMMAND \ + "mmcinit; ext2load mmc 0:1 0x10200000 /boot/uImage; bootm" + +/* + * Only interrupt autoboot if <space> is pressed. Otherwise, garbage + * data on the serial line may interrupt the boot sequence. + */ +#define CONFIG_BOOTDELAY 1 +#define CONFIG_AUTOBOOT 1 +#define CONFIG_AUTOBOOT_KEYED 1 +#define CONFIG_AUTOBOOT_PROMPT \ + "Press SPACE to abort autoboot in %d seconds\n" +#define CONFIG_AUTOBOOT_DELAY_STR "d" +#define CONFIG_AUTOBOOT_STOP_STR " " + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_MMC + +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS +#undef CONFIG_CMD_SETGETDCR +#undef CONFIG_CMD_XIMG + +#define CONFIG_ATMEL_USART 1 +#define CONFIG_PIO2 1 +#define CFG_HSDRAMC 1 +#define CONFIG_MMC 1 + +#define CFG_DCACHE_LINESZ 32 +#define CFG_ICACHE_LINESZ 32 + +#define CONFIG_NR_DRAM_BANKS 1 + +/* External flash on STK1000 */ +#if 0 +#define CFG_FLASH_CFI 1 +#define CFG_FLASH_CFI_DRIVER 1 +#endif + +#define CFG_FLASH_BASE 0x00000000 +#define CFG_FLASH_SIZE 0x800000 +#define CFG_MAX_FLASH_BANKS 1 +#define CFG_MAX_FLASH_SECT 135 + +#define CFG_MONITOR_BASE CFG_FLASH_BASE + +#define CFG_INTRAM_BASE 0x24000000 +#define CFG_INTRAM_SIZE 0x8000 + +#define CFG_SDRAM_BASE 0x10000000 +#define CFG_SDRAM_16BIT 1 + +#define CFG_ENV_IS_IN_FLASH 1 +#define CFG_ENV_SIZE 65536 +#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_FLASH_SIZE - CFG_ENV_SIZE) + +#define CFG_INIT_SP_ADDR (CFG_INTRAM_BASE + CFG_INTRAM_SIZE) + +#define CFG_MALLOC_LEN (256*1024) + +/* Allow 4MB for the kernel run-time image */ +#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 0x00200000) +#define CFG_BOOTPARAMS_LEN (16 * 1024) + +/* Other configuration settings that shouldn't have to change all that often */ +#define CFG_PROMPT "Uboot> " +#define CFG_CBSIZE 256 +#define CFG_MAXARGS 16 +#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) +#define CFG_LONGHELP 1 + +#define CFG_MEMTEST_START CFG_SDRAM_BASE +#define CFG_MEMTEST_END (CFG_MEMTEST_START + 0x700000) +#define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } + +#endif /* __CONFIG_H */ diff --git a/lib_avr32/board.c b/lib_avr32/board.c index 11d864feaca..809ee3be92c 100644 --- a/lib_avr32/board.c +++ b/lib_avr32/board.c @@ -311,6 +311,8 @@ void board_init_r(gd_t *new_gd, ulong dest_addr) dma_alloc_init(); board_init_info(); + enable_interrupts(); + bd->bi_flashstart = 0; bd->bi_flashsize = 0; bd->bi_flashoffset = 0; diff --git a/lib_avr32/interrupts.c b/lib_avr32/interrupts.c index ce538f3d924..28df20db010 100644 --- a/lib_avr32/interrupts.c +++ b/lib_avr32/interrupts.c @@ -35,5 +35,5 @@ int disable_interrupts(void) sr = sysreg_read(SR); asm volatile("ssrf %0" : : "n"(SYSREG_GM_OFFSET)); - return SYSREG_BFEXT(GM, sr); + return !SYSREG_BFEXT(GM, sr); } |