diff options
26 files changed, 438 insertions, 76 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index dc8e048dde4..247f525847e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -386,6 +386,14 @@ T: git https://source.denx.de/u-boot/custodians/u-boot-marvell.git F: drivers/pci/pci-aardvark.c F: drivers/pci/pci_mvebu.c +ARM MARVELL PXA1908 +M: Duje Mihanović <duje.mihanovic@skole.hr> +S: Maintained +T: git git://git.dujemihanovic.xyz/u-boot.git +F: arch/arm/dts/pxa1908* +F: arch/arm/mach-mmp/ +F: include/configs/pxa1908.h + ARM MARVELL SERIAL DRIVERS M: Pali Rohár <pali@kernel.org> M: Stefan Roese <sr@denx.de> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 314916527c9..f504d7d0760 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -842,6 +842,15 @@ config ARCH_MEDIATEK Support for the MediaTek SoCs family developed by MediaTek Inc. Please refer to doc/README.mediatek for more information. +config ARCH_MMP + bool "Marvell MMP" + select ARM64 + select DM + select DM_SERIAL + select OF_CONTROL + select SAVE_PREV_BL_FDT_ADDR + select SAVE_PREV_BL_INITRAMFS_START_ADDR + config ARCH_LPC32XX bool "NXP LPC32xx platform" select CPU_ARM926EJS @@ -2310,6 +2319,8 @@ source "arch/arm/mach-meson/Kconfig" source "arch/arm/mach-mediatek/Kconfig" +source "arch/arm/mach-mmp/Kconfig" + source "arch/arm/mach-qemu/Kconfig" source "arch/arm/mach-rockchip/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index cb87a684754..7334e79965f 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -69,6 +69,7 @@ machine-$(CONFIG_ARCH_KIRKWOOD) += kirkwood machine-$(CONFIG_ARCH_LPC32XX) += lpc32xx machine-$(CONFIG_ARCH_MEDIATEK) += mediatek machine-$(CONFIG_ARCH_MESON) += meson +machine-$(CONFIG_ARCH_MMP) += mmp machine-$(CONFIG_ARCH_MVEBU) += mvebu machine-$(CONFIG_ARCH_NEXELL) += nexell machine-$(CONFIG_ARCH_NPCM) += npcm diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index b7df72453ac..0bf3697bdbe 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1226,6 +1226,8 @@ dtb-$(CONFIG_ARCH_QEMU) += qemu-arm.dtb qemu-arm64.dtb dtb-$(CONFIG_TARGET_CORSTONE1000) += corstone1000-mps3.dtb \ corstone1000-fvp.dtb +dtb-$(CONFIG_TARGET_COREPRIMEVELTE) += pxa1908-samsung-coreprimevelte.dtb + include $(srctree)/scripts/Makefile.dts # Add any required device tree compiler flags here diff --git a/arch/arm/dts/pxa1908-samsung-coreprimevelte.dts b/arch/arm/dts/pxa1908-samsung-coreprimevelte.dts new file mode 100644 index 00000000000..588e39e9265 --- /dev/null +++ b/arch/arm/dts/pxa1908-samsung-coreprimevelte.dts @@ -0,0 +1,74 @@ +// SPDX-License-Identifier: GPL-2.0-only +#include "pxa1908.dtsi" + +/ { + pxa,rev-id = <3928 2>; + model = "Samsung Galaxy Core Prime VE LTE"; + compatible = "samsung,coreprimevelte", "marvell,pxa1908"; + + aliases { + serial0 = &uart0; + }; + + chosen { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + stdout-path = "serial0:115200n8"; + + /* S-Boot places the initramfs here */ + linux,initrd-start = <0x4d70000>; + linux,initrd-end = <0x5000000>; + + fb0: framebuffer@17177000 { + compatible = "simple-framebuffer"; + reg = <0 0x17177000 0 (480 * 800 * 4)>; + width = <480>; + height = <800>; + stride = <(480 * 4)>; + format = "a8r8g8b8"; + }; + }; + + memory { + device_type = "memory"; + reg = <0 0x1000000 0 0x3f000000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + framebuffer@17000000 { + reg = <0 0x17000000 0 0x1800000>; + no-map; + }; + + gpu@9000000 { + reg = <0 0x9000000 0 0x1000000>; + }; + + /* Communications processor, aka modem */ + cp@5000000 { + reg = <0 0x5000000 0 0x3000000>; + }; + + cm3@a000000 { + reg = <0 0xa000000 0 0x80000>; + }; + + seclog@8000000 { + reg = <0 0x8000000 0 0x100000>; + }; + + ramoops@8100000 { + compatible = "ramoops"; + reg = <0 0x8100000 0 0x40000>; + record-size = <0x8000>; + console-size = <0x20000>; + max-reason = <5>; + }; + }; +}; diff --git a/arch/arm/dts/pxa1908.dtsi b/arch/arm/dts/pxa1908.dtsi new file mode 100644 index 00000000000..e8ec2606c25 --- /dev/null +++ b/arch/arm/dts/pxa1908.dtsi @@ -0,0 +1,106 @@ +// SPDX-License-Identifier: GPL-2.0-only +/dts-v1/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + model = "Marvell Armada PXA1908"; + compatible = "marvell,pxa1908"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&gic>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0 0>; + enable-method = "psci"; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0 1>; + enable-method = "psci"; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0 2>; + enable-method = "psci"; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0 3>; + enable-method = "psci"; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gic: interrupt-controller@d1df9000 { + compatible = "arm,gic-400"; + reg = <0 0xd1df9000 0 0x1000>, + <0 0xd1dfa000 0 0x2000>, + /* The subsequent registers are guesses. */ + <0 0xd1dfc000 0 0x2000>, + <0 0xd1dfe000 0 0x2000>; + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-controller; + #interrupt-cells = <3>; + }; + + apb@d4000000 { + compatible = "simple-bus"; + reg = <0 0xd4000000 0 0x200000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0xd4000000 0x200000>; + + uart0: serial@17000 { + compatible = "mrvl,mmp-uart", "intel,xscale-uart"; + reg = <0x17000 0x1000>; + clock-frequency = <14745600>; + reg-shift = <2>; + }; + + uart1: serial@18000 { + compatible = "mrvl,mmp-uart", "intel,xscale-uart"; + reg = <0x18000 0x1000>; + clock-frequency = <14745600>; + reg-shift = <2>; + }; + + uart2: serial@36000 { + compatible = "mrvl,mmp-uart", "intel,xscale-uart"; + reg = <0x36000 0x1000>; + clock-frequency = <117000000>; + reg-shift = <2>; + }; + }; + }; +}; diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig index 031d4e5ecd3..6761a9cb393 100644 --- a/arch/arm/mach-kirkwood/Kconfig +++ b/arch/arm/mach-kirkwood/Kconfig @@ -38,6 +38,7 @@ config TARGET_OPENRD bool "Marvell OpenRD Board" select KW88F6281 select SHEEVA_88SV131 + select KIRKWOOD_COMMON config TARGET_DREAMPLUG bool "DreamPlug Board" diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig new file mode 100644 index 00000000000..889f127fe82 --- /dev/null +++ b/arch/arm/mach-mmp/Kconfig @@ -0,0 +1,12 @@ +if ARCH_MMP + +config TARGET_COREPRIMEVELTE + bool "Support coreprimevelte" + select LINUX_KERNEL_IMAGE_HEADER + +config LNX_KRNL_IMG_TEXT_OFFSET_BASE + default TEXT_BASE + +source "board/samsung/coreprimevelte/Kconfig" + +endif diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile new file mode 100644 index 00000000000..99beaed05c2 --- /dev/null +++ b/arch/arm/mach-mmp/Makefile @@ -0,0 +1 @@ +obj-y += board.o mmu.o diff --git a/arch/arm/mach-mmp/board.c b/arch/arm/mach-mmp/board.c new file mode 100644 index 00000000000..3384e5377a7 --- /dev/null +++ b/arch/arm/mach-mmp/board.c @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2024 + * Duje Mihanović <duje.mihanovic@skole.hr> + */ +#include <errno.h> +#include <init.h> +#include <fdt_support.h> +#include <asm/io.h> +#include <asm/global_data.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* Timer constants */ +#define APBC_COUNTER_CLK_SEL 0xd4015064 +#define COUNTER_BASE 0xd4101000 +#define COUNTER_EN BIT(0) +#define COUNTER_HALT_ON_DEBUG BIT(1) + +int timer_init(void) +{ + u32 tmp = readl(APBC_COUNTER_CLK_SEL); + + if ((tmp >> 16) != 0x319) + return -1; + + /* Set timer frequency to 26MHz */ + writel(tmp | 1, APBC_COUNTER_CLK_SEL); + writel(COUNTER_EN | COUNTER_HALT_ON_DEBUG, COUNTER_BASE); + + gd->arch.timer_rate_hz = 26000000; + + return 0; +} + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ + if (fdtdec_setup_mem_size_base() != 0) + puts("fdtdec_setup_mem_size_base() has failed\n"); + + return 0; +} + +#ifndef CONFIG_SYSRESET +void reset_cpu(void) +{ +} +#endif + +/* Stolen from arch/arm/mach-snapdragon/board.c */ +int board_fdt_blob_setup(void **fdtp) +{ + struct fdt_header *fdt; + bool internal_valid, external_valid; + int ret = 0; + + fdt = (struct fdt_header *)get_prev_bl_fdt_addr(); + external_valid = fdt && !fdt_check_header(fdt); + internal_valid = !fdt_check_header(*fdtp); + + /* + * There is no point returning an error here, U-Boot can't do anything useful in this situation. + * Bail out while we can still print a useful error message. + */ + if (!internal_valid && !external_valid) + panic("Internal FDT is invalid and no external FDT was provided! (fdt=%#llx)\n", + (phys_addr_t)fdt); + + if (internal_valid) { + debug("Using built in FDT\n"); + ret = -EEXIST; + } else { + debug("Using external FDT\n"); + /* So we can use it before returning */ + *fdtp = fdt; + } + + return ret; +} diff --git a/arch/arm/mach-mmp/mmu.c b/arch/arm/mach-mmp/mmu.c new file mode 100644 index 00000000000..ad2f1e3d994 --- /dev/null +++ b/arch/arm/mach-mmp/mmu.c @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2024 + * Duje Mihanović <duje.mihanovic@skole.hr> + */ +#include <asm/armv8/mmu.h> +#include <linux/sizes.h> + +static struct mm_region pxa1908_mem_map[] = { + { + .virt = 0x0UL, + .phys = 0x0UL, + .size = 2UL * SZ_1G, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, + { + .virt = 0x80000000UL, + .phys = 0x80000000UL, + .size = 2UL * SZ_1G, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_INNER_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, + { + 0, + } +}; + +struct mm_region *mem_map = pxa1908_mem_map; diff --git a/board/Marvell/openrd/openrd.env b/board/Marvell/openrd/openrd.env new file mode 100644 index 00000000000..70ca704b73e --- /dev/null +++ b/board/Marvell/openrd/openrd.env @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2024 Tony Dinh <mibodhi@gmail.com> + * + * Environment variables configurations + */ + +kernel_addr_r=0x800000 +fdt_addr_r=0x2c00000 +ramdisk_addr_r=0x01100000 +scriptaddr=0x200000 +fdtfile=CONFIG_DEFAULT_DEVICE_TREE.dtb +mtdparts=CONFIG_MTDPARTS_DEFAULT +console=ttyS0,115200 + +/* Standard Boot */ +bootcmd= + bootflow scan -lb +failed= + echo CONFIG_SYS_BOARD boot failed - please check your image diff --git a/board/samsung/coreprimevelte/Kconfig b/board/samsung/coreprimevelte/Kconfig new file mode 100644 index 00000000000..78a80379605 --- /dev/null +++ b/board/samsung/coreprimevelte/Kconfig @@ -0,0 +1,12 @@ +if TARGET_COREPRIMEVELTE + +config SYS_BOARD + default "coreprimevelte" + +config SYS_VENDOR + default "samsung" + +config SYS_CONFIG_NAME + default "pxa1908" + +endif diff --git a/board/samsung/coreprimevelte/MAINTAINERS b/board/samsung/coreprimevelte/MAINTAINERS new file mode 100644 index 00000000000..0902117e8b3 --- /dev/null +++ b/board/samsung/coreprimevelte/MAINTAINERS @@ -0,0 +1,6 @@ +Samsung Galaxy Core Prime VE LTE support +M: Duje Mihanović <duje.mihanovic@skole.hr> +S: Maintained +T: git git://git.dujemihanovic.xyz/u-boot.git +F: board/samsung/coreprimevelte/ +F: configs/coreprimevelte_defconfig diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c index 2dbd071abd9..67b60d2e7b4 100644 --- a/board/solidrun/clearfog/clearfog.c +++ b/board/solidrun/clearfog/clearfog.c @@ -161,7 +161,7 @@ static struct mv_ddr_topology_map board_topology_map = { {0}, /* timing parameters */ { {0} }, /* electrical configuration */ {0,}, /* electrical parameters */ - 0, /* ODT configuration */ + 0x30000, /* ODT configuration */ 0x3, /* clock enable mask */ }; diff --git a/configs/coreprimevelte_defconfig b/configs/coreprimevelte_defconfig new file mode 100644 index 00000000000..05116669200 --- /dev/null +++ b/configs/coreprimevelte_defconfig @@ -0,0 +1,18 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=26000000 +CONFIG_ARCH_CPU_INIT=y +CONFIG_ARCH_MMP=y +CONFIG_TEXT_BASE=0x1000000 +CONFIG_NR_DRAM_BANKS=2 +CONFIG_DEFAULT_DEVICE_TREE="pxa1908-samsung-coreprimevelte" +CONFIG_TARGET_COREPRIMEVELTE=y +CONFIG_SYS_LOAD_ADDR=0x1000000 +CONFIG_ARMV8_PSCI=y +CONFIG_FIT=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_HUSH_PARSER=y +CONFIG_CMD_DM=y +CONFIG_OF_BOARD=y +CONFIG_SYS_NS16550=y +CONFIG_SYS_NS16550_MEM32=y diff --git a/configs/mvebu_espressobin_ultra-88f3720_defconfig b/configs/mvebu_espressobin_ultra-88f3720_defconfig index aa9026acc34..6f1a66f5f1d 100644 --- a/configs/mvebu_espressobin_ultra-88f3720_defconfig +++ b/configs/mvebu_espressobin_ultra-88f3720_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_LOAD_ADDR=0x6000000 CONFIG_PCI=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_BOOTSTD_FULL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig index 708bf5eefd0..1ca0b45d93f 100644 --- a/configs/openrd_base_defconfig +++ b/configs/openrd_base_defconfig @@ -4,22 +4,22 @@ CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SUPPORT_PASSING_ATAGS=y +CONFIG_CMDLINE_TAG=y +CONFIG_INITRD_TAG=y CONFIG_SYS_KWD_CONFIG="board/Marvell/openrd/kwbimage.cfg" CONFIG_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_TARGET_OPENRD=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x80000 CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-openrd-base" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_IDENT_STRING="\nOpenRD-Base" -# CONFIG_SYS_MALLOC_F is not set CONFIG_HAS_BOARD_SIZE_LIMIT=y CONFIG_BOARD_SIZE_LIMIT=524288 +CONFIG_BOOTSTD_FULL=y CONFIG_BOOTDELAY=3 -CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="${x_bootcmd_kernel}; setenv bootargs ${x_bootargs} ${x_bootargs_root}; ${x_bootcmd_usb}; bootm 0x6400000;" CONFIG_USE_PREBOOT=y CONFIG_LOGLEVEL=2 # CONFIG_DISPLAY_BOARDINFO is not set @@ -30,23 +30,17 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_CMD_JFFS2=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=nand_mtd" CONFIG_MTDPARTS_DEFAULT="mtdparts=nand_mtd:0x100000@0x000000(uboot),0x400000@0x100000(uImage),0x1fb00000@0x500000(rootfs)" CONFIG_CMD_UBI=y -CONFIG_ISO_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SYS_ATA_STRIDE=4 CONFIG_SYS_ATA_DATA_OFFSET=0x100 CONFIG_SYS_ATA_REG_OFFSET=0x100 @@ -59,7 +53,5 @@ CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_MVGBE=y CONFIG_MII=y -CONFIG_SYS_NS16550_SERIAL=y -CONFIG_SYS_NS16550_REG_SIZE=-4 CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig index 82a9c77761c..e0cc2e65db3 100644 --- a/configs/openrd_client_defconfig +++ b/configs/openrd_client_defconfig @@ -4,10 +4,12 @@ CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SUPPORT_PASSING_ATAGS=y +CONFIG_CMDLINE_TAG=y +CONFIG_INITRD_TAG=y CONFIG_SYS_KWD_CONFIG="board/Marvell/openrd/kwbimage.cfg" CONFIG_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_TARGET_OPENRD=y CONFIG_BOARD_IS_OPENRD_CLIENT=y CONFIG_ENV_SIZE=0x20000 @@ -15,12 +17,10 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-openrd-client" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_IDENT_STRING="\nOpenRD-Client" -# CONFIG_SYS_MALLOC_F is not set CONFIG_HAS_BOARD_SIZE_LIMIT=y CONFIG_BOARD_SIZE_LIMIT=524288 +CONFIG_BOOTSTD_FULL=y CONFIG_BOOTDELAY=3 -CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="${x_bootcmd_kernel}; setenv bootargs ${x_bootargs} ${x_bootargs_root}; ${x_bootcmd_usb}; bootm 0x6400000;" CONFIG_USE_PREBOOT=y CONFIG_LOGLEVEL=2 # CONFIG_DISPLAY_BOARDINFO is not set @@ -31,23 +31,17 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_CMD_JFFS2=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=nand_mtd" CONFIG_MTDPARTS_DEFAULT="mtdparts=nand_mtd:0x100000@0x000000(uboot),0x400000@0x100000(uImage),0x1fb00000@0x500000(rootfs)" CONFIG_CMD_UBI=y -CONFIG_ISO_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SYS_ATA_STRIDE=4 CONFIG_SYS_ATA_DATA_OFFSET=0x100 CONFIG_SYS_ATA_REG_OFFSET=0x100 @@ -60,7 +54,5 @@ CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_MVGBE=y CONFIG_MII=y -CONFIG_SYS_NS16550_SERIAL=y -CONFIG_SYS_NS16550_REG_SIZE=-4 CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig index 10b46e2ec18..a115691daad 100644 --- a/configs/openrd_ultimate_defconfig +++ b/configs/openrd_ultimate_defconfig @@ -4,10 +4,12 @@ CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_CPU_INIT=y CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_KIRKWOOD=y +CONFIG_SUPPORT_PASSING_ATAGS=y +CONFIG_CMDLINE_TAG=y +CONFIG_INITRD_TAG=y CONFIG_SYS_KWD_CONFIG="board/Marvell/openrd/kwbimage.cfg" CONFIG_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_TARGET_OPENRD=y CONFIG_BOARD_IS_OPENRD_ULTIMATE=y CONFIG_ENV_SIZE=0x20000 @@ -15,12 +17,10 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-openrd-ultimate" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_IDENT_STRING="\nOpenRD-Ultimate" -# CONFIG_SYS_MALLOC_F is not set CONFIG_HAS_BOARD_SIZE_LIMIT=y CONFIG_BOARD_SIZE_LIMIT=524288 +CONFIG_BOOTSTD_FULL=y CONFIG_BOOTDELAY=3 -CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="${x_bootcmd_kernel}; setenv bootargs ${x_bootargs} ${x_bootargs_root}; ${x_bootcmd_usb}; bootm 0x6400000;" CONFIG_USE_PREBOOT=y CONFIG_LOGLEVEL=2 # CONFIG_DISPLAY_BOARDINFO is not set @@ -31,23 +31,17 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_CMD_JFFS2=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=nand_mtd" CONFIG_MTDPARTS_DEFAULT="mtdparts=nand_mtd:0x100000@0x000000(uboot),0x400000@0x100000(uImage),0x1fb00000@0x500000(rootfs)" CONFIG_CMD_UBI=y -CONFIG_ISO_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SYS_ATA_STRIDE=4 CONFIG_SYS_ATA_DATA_OFFSET=0x100 CONFIG_SYS_ATA_REG_OFFSET=0x100 @@ -60,7 +54,5 @@ CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_MVGBE=y CONFIG_MII=y -CONFIG_SYS_NS16550_SERIAL=y -CONFIG_SYS_NS16550_REG_SIZE=-4 CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/tools-only_defconfig b/configs/tools-only_defconfig index 5e3a46baa41..cecd26175d1 100644 --- a/configs/tools-only_defconfig +++ b/configs/tools-only_defconfig @@ -4,27 +4,27 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="sandbox" CONFIG_SYS_LOAD_ADDR=0x0 CONFIG_PCI=y -# CONFIG_SANDBOX_SDL is not set -# CONFIG_EFI_LOADER is not set +CONFIG_SANDBOX_SDL=n +CONFIG_EFI_LOADER=n CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_TIMESTAMP=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y -# CONFIG_BOOTSTD_FULL is not set -# CONFIG_BOOTMETH_CROS is not set -# CONFIG_BOOTMETH_VBE is not set +CONFIG_BOOTSTD_FULL=n +CONFIG_BOOTMETH_CROS=n +CONFIG_BOOTMETH_VBE=n CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run distro_bootcmd" -# CONFIG_CMD_BOOTD is not set -# CONFIG_CMD_BOOTM is not set -# CONFIG_CMD_BOOTI is not set -# CONFIG_CMD_ELF is not set -# CONFIG_CMD_EXTENSION is not set -# CONFIG_CMD_DATE is not set +CONFIG_CMD_BOOTD=n +CONFIG_CMD_BOOTM=n +CONFIG_CMD_BOOTI=n +CONFIG_CMD_ELF=n +CONFIG_CMD_EXTENSION=n +CONFIG_CMD_DATE=n CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NO_NET=y -# CONFIG_ACPIGEN is not set +CONFIG_ACPIGEN=n CONFIG_AXI=y CONFIG_AXI_SANDBOX=y CONFIG_SANDBOX_GPIO=y @@ -33,8 +33,8 @@ CONFIG_DM_RTC=y CONFIG_SOUND=y CONFIG_SYSRESET=y CONFIG_TIMER=y -# CONFIG_VIRTIO_MMIO is not set -# CONFIG_VIRTIO_PCI is not set -# CONFIG_VIRTIO_SANDBOX is not set -# CONFIG_GENERATE_ACPI_TABLE is not set +CONFIG_VIRTIO_MMIO=n +CONFIG_VIRTIO_PCI=n +CONFIG_VIRTIO_SANDBOX=n +CONFIG_GENERATE_ACPI_TABLE=n CONFIG_TOOLS_MKEFICAPSULE=y diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 039da835f5f..0e267d097c5 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -605,6 +605,7 @@ static const struct udevice_id ns16550_serial_ids[] = { { .compatible = "ingenic,jz4780-uart", .data = PORT_JZ4780 }, { .compatible = "nvidia,tegra20-uart", .data = PORT_NS16550 }, { .compatible = "snps,dw-apb-uart", .data = PORT_NS16550 }, + { .compatible = "intel,xscale-uart", .data = PORT_NS16550 }, {} }; #endif /* OF_REAL */ diff --git a/fs/ubifs/recovery.c b/fs/ubifs/recovery.c index 6b6884fb209..12c0575cc97 100644 --- a/fs/ubifs/recovery.c +++ b/fs/ubifs/recovery.c @@ -439,7 +439,6 @@ static void clean_buf(const struct ubifs_info *c, void **buf, int lnum, { int empty_offs, pad_len; - lnum = lnum; dbg_rcvry("cleaning corruption at %d:%d", lnum, *offs); ubifs_assert(!(*offs & 7)); diff --git a/fs/ubifs/scan.c b/fs/ubifs/scan.c index 7a6e46df5d9..2335e9e2d25 100644 --- a/fs/ubifs/scan.c +++ b/fs/ubifs/scan.c @@ -169,7 +169,6 @@ struct ubifs_scan_leb *ubifs_start_scan(const struct ubifs_info *c, int lnum, void ubifs_end_scan(const struct ubifs_info *c, struct ubifs_scan_leb *sleb, int lnum, int offs) { - lnum = lnum; dbg_scan("stop scanning LEB %d at offset %d", lnum, offs); ubifs_assert(offs % c->min_io_size == 0); diff --git a/include/configs/openrd.h b/include/configs/openrd.h index 1e6b16b4e70..f91e62a2e47 100644 --- a/include/configs/openrd.h +++ b/include/configs/openrd.h @@ -15,22 +15,4 @@ #include "mv-common.h" -/* - * Environment variables configurations - */ -/* - * max 4k env size is enough, but in case of nand - * it has to be rounded to sector size - */ - -/* - * Default environment variables - */ - -#define CFG_EXTRA_ENV_SETTINGS "x_bootargs=console=ttyS0,115200 " \ - CONFIG_MTDPARTS_DEFAULT " rw ubi.mtd=2,2048\0" \ - "x_bootcmd_kernel=nand read 0x6400000 0x100000 0x300000\0" \ - "x_bootcmd_usb=usb start\0" \ - "x_bootargs_root=root=ubi0:rootfs rootfstype=ubifs\0" - #endif /* _CONFIG_OPENRD_BASE_H */ diff --git a/include/configs/pxa1908.h b/include/configs/pxa1908.h new file mode 100644 index 00000000000..b0d6cdfeb76 --- /dev/null +++ b/include/configs/pxa1908.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2024 + * Duje Mihanović <duje.mihanovic@skole.hr> + */ + +#ifndef __PXA1908_H +#define __PXA1908_H + +#define CFG_SYS_SDRAM_BASE 0x1000000 +#define CFG_SYS_INIT_RAM_ADDR 0x10000000 +#define CFG_SYS_INIT_RAM_SIZE 0x4000 +#define CFG_SYS_NS16550_IER 0x40 +#define CFG_SYS_BAUDRATE_TABLE { 115200, 230400, 460800, 921600 } +#define CFG_EXTRA_ENV_SETTINGS \ + "bootcmd=bootm $prevbl_initrd_start_addr\0" + +#endif |