diff options
55 files changed, 293 insertions, 156 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 05a00e44358..b3fe3f3c535 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -262,11 +262,6 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \ zynqmp-m-a2197-02-revA.dtb \ zynqmp-m-a2197-03-revA.dtb \ zynqmp-p-a2197-00-revA.dtb \ - zynqmp-p-a2197-00-revA-x-prc-01-revA.dtbo \ - zynqmp-p-a2197-00-revA-x-prc-02-revA.dtbo \ - zynqmp-p-a2197-00-revA-x-prc-03-revA.dtbo \ - zynqmp-p-a2197-00-revA-x-prc-04-revA.dtbo \ - zynqmp-p-a2197-00-revA-x-prc-05-revA.dtbo \ zynqmp-mini.dtb \ zynqmp-mini-emmc0.dtb \ zynqmp-mini-emmc1.dtb \ @@ -281,22 +276,10 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \ zynqmp-mini-qspi-x2-stacked.dtb \ zynqmp-sc-revB.dtb \ zynqmp-sc-revC.dtb \ - zynqmp-sc-vek280-revA.dtbo \ - zynqmp-sc-vek280-revB.dtbo \ - zynqmp-sc-vhk158-revA.dtbo \ - zynqmp-sc-vpk120-revB.dtbo \ - zynqmp-sc-vpk180-revA.dtbo \ - zynqmp-sc-vpk180-revB.dtbo \ - zynqmp-sc-vn-p-b2197-00-revA.dtbo \ zynqmp-sm-k24-revA.dtb \ zynqmp-smk-k24-revA.dtb \ zynqmp-sm-k26-revA.dtb \ zynqmp-smk-k26-revA.dtb \ - zynqmp-sck-kd-g-revA.dtbo \ - zynqmp-sck-kr-g-revA.dtbo \ - zynqmp-sck-kr-g-revB.dtbo \ - zynqmp-sck-kv-g-revA.dtbo \ - zynqmp-sck-kv-g-revB.dtbo \ zynqmp-topic-miamimp-xilinx-xdp-v1r1.dtb \ zynqmp-vpk120-revA.dtb \ zynqmp-vp-x-a2785-00-revA.dtb \ @@ -324,6 +307,67 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \ zynqmp-zc1751-xm017-dc3.dtb \ zynqmp-zc1751-xm018-dc4.dtb \ zynqmp-zc1751-xm019-dc5.dtb + +zynqmp-p-a2197-00-revA-x-prc-01-revA-dtbs := zynqmp-p-a2197-00-revA.dtb zynqmp-p-a2197-00-revA-x-prc-01-revA.dtbo +zynqmp-p-a2197-00-revA-x-prc-02-revA-dtbs := zynqmp-p-a2197-00-revA.dtb zynqmp-p-a2197-00-revA-x-prc-02-revA.dtbo +zynqmp-p-a2197-00-revA-x-prc-03-revA-dtbs := zynqmp-p-a2197-00-revA.dtb zynqmp-p-a2197-00-revA-x-prc-03-revA.dtbo +zynqmp-p-a2197-00-revA-x-prc-04-revA-dtbs := zynqmp-p-a2197-00-revA.dtb zynqmp-p-a2197-00-revA-x-prc-04-revA.dtbo +zynqmp-p-a2197-00-revA-x-prc-05-revA-dtbs := zynqmp-p-a2197-00-revA.dtb zynqmp-p-a2197-00-revA-x-prc-05-revA.dtbo + +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-p-a2197-00-revA-x-prc-01-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-p-a2197-00-revA-x-prc-02-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-p-a2197-00-revA-x-prc-03-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-p-a2197-00-revA-x-prc-04-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-p-a2197-00-revA-x-prc-05-revA.dtb + +zynqmp-sc-vek280-revA-dtbs := zynqmp-sc-revB.dtb zynqmp-sc-vek280-revA.dtbo +zynqmp-sc-vek280-revB-dtbs := zynqmp-sc-revC.dtb zynqmp-sc-vek280-revB.dtbo +zynqmp-sc-vhk158-revA-dtbs := zynqmp-sc-revB.dtb zynqmp-sc-vhk158-revA.dtbo +zynqmp-sc-vpk120-revB-dtbs := zynqmp-sc-revB.dtb zynqmp-sc-vpk120-revB.dtbo +zynqmp-sc-vpk180-revA-dtbs := zynqmp-sc-revB.dtb zynqmp-sc-vpk180-revA.dtbo +zynqmp-sc-vpk180-revB-dtbs := zynqmp-sc-revB.dtb zynqmp-sc-vpk180-revB.dtbo +zynqmp-sc-vn-p-b2197-00-revA-dtbs := zynqmp-sc-revB.dtb zynqmp-sc-vn-p-b2197-00-revA.dtbo + +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sc-vek280-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sc-vek280-revB.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sc-vhk158-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sc-vpk120-revB.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sc-vpk180-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sc-vpk180-revB.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sc-vn-p-b2197-00-revA.dtb + +zynqmp-sm-k26-revA-sck-kv-g-revA-dtbs := zynqmp-sm-k26-revA.dtb zynqmp-sck-kv-g-revA.dtbo +zynqmp-sm-k26-revA-sck-kv-g-revB-dtbs := zynqmp-sm-k26-revA.dtb zynqmp-sck-kv-g-revB.dtbo +zynqmp-smk-k26-revA-sck-kv-g-revA-dtbs := zynqmp-smk-k26-revA.dtb zynqmp-sck-kv-g-revA.dtbo +zynqmp-smk-k26-revA-sck-kv-g-revB-dtbs := zynqmp-smk-k26-revA.dtb zynqmp-sck-kv-g-revB.dtbo + +zynqmp-sm-k26-revA-sck-kr-g-revA-dtbs := zynqmp-sm-k26-revA.dtb zynqmp-sck-kr-g-revA.dtbo +zynqmp-sm-k26-revA-sck-kr-g-revB-dtbs := zynqmp-sm-k26-revA.dtb zynqmp-sck-kr-g-revB.dtbo +zynqmp-smk-k26-revA-sck-kr-g-revA-dtbs := zynqmp-smk-k26-revA.dtb zynqmp-sck-kr-g-revA.dtbo +zynqmp-smk-k26-revA-sck-kr-g-revB-dtbs := zynqmp-smk-k26-revA.dtb zynqmp-sck-kr-g-revB.dtbo + +zynqmp-sm-k24-revA-sck-kd-g-revA-dtbs := zynqmp-sm-k24-revA.dtb zynqmp-sck-kd-g-revA.dtbo +zynqmp-smk-k24-revA-sck-kd-g-revA-dtbs := zynqmp-smk-k24-revA.dtb zynqmp-sck-kd-g-revA.dtbo +zynqmp-sm-k24-revA-sck-kv-g-revB-dtbs := zynqmp-sm-k24-revA.dtb zynqmp-sck-kv-g-revB.dtbo +zynqmp-smk-k24-revA-sck-kv-g-revB-dtbs := zynqmp-smk-k24-revA.dtb zynqmp-sck-kv-g-revB.dtbo +zynqmp-sm-k24-revA-sck-kr-g-revB-dtbs := zynqmp-sm-k24-revA.dtb zynqmp-sck-kr-g-revB.dtbo +zynqmp-smk-k24-revA-sck-kr-g-revB-dtbs := zynqmp-smk-k24-revA.dtb zynqmp-sck-kr-g-revB.dtbo + +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k26-revA-sck-kv-g-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k26-revA-sck-kv-g-revB.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k26-revA-sck-kv-g-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k26-revA-sck-kv-g-revB.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k26-revA-sck-kr-g-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k26-revA-sck-kr-g-revB.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k26-revA-sck-kr-g-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k26-revA-sck-kr-g-revB.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k24-revA-sck-kd-g-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k24-revA-sck-kd-g-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k24-revA-sck-kv-g-revB.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k24-revA-sck-kv-g-revB.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k24-revA-sck-kr-g-revB.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k24-revA-sck-kr-g-revB.dtb + dtb-$(CONFIG_ARCH_VERSAL) += \ versal-mini.dtb \ versal-mini-emmc0.dtb \ diff --git a/arch/arm/dts/versal-mini-emmc0.dts b/arch/arm/dts/versal-mini-emmc0.dts index 60b1c0e1fc4..b98ed16bc5f 100644 --- a/arch/arm/dts/versal-mini-emmc0.dts +++ b/arch/arm/dts/versal-mini-emmc0.dts @@ -28,7 +28,7 @@ bootph-all; }; - amba: amba { + amba: axi { bootph-all; compatible = "simple-bus"; #address-cells = <0x2>; diff --git a/arch/arm/dts/versal-mini-emmc1.dts b/arch/arm/dts/versal-mini-emmc1.dts index 751cc38ee5c..e6a5c2b699e 100644 --- a/arch/arm/dts/versal-mini-emmc1.dts +++ b/arch/arm/dts/versal-mini-emmc1.dts @@ -28,7 +28,7 @@ bootph-all; }; - amba: amba { + amba: axi { bootph-all; compatible = "simple-bus"; #address-cells = <0x2>; diff --git a/arch/arm/dts/versal-mini-ospi.dtsi b/arch/arm/dts/versal-mini-ospi.dtsi index 8735292a127..9ca0cf3c027 100644 --- a/arch/arm/dts/versal-mini-ospi.dtsi +++ b/arch/arm/dts/versal-mini-ospi.dtsi @@ -28,7 +28,7 @@ bootph-all; }; - amba: amba { + amba: axi { bootph-all; compatible = "simple-bus"; #address-cells = <0x2>; diff --git a/arch/arm/dts/versal-mini-qspi.dtsi b/arch/arm/dts/versal-mini-qspi.dtsi index 9347ea32c9c..57427e099f9 100644 --- a/arch/arm/dts/versal-mini-qspi.dtsi +++ b/arch/arm/dts/versal-mini-qspi.dtsi @@ -28,7 +28,7 @@ bootph-all; }; - amba: amba { + amba: axi { bootph-all; compatible = "simple-bus"; #address-cells = <0x2>; diff --git a/arch/arm/dts/zynq-cse-nand.dts b/arch/arm/dts/zynq-cse-nand.dts index 18f627f3d72..f1fb15902a7 100644 --- a/arch/arm/dts/zynq-cse-nand.dts +++ b/arch/arm/dts/zynq-cse-nand.dts @@ -31,7 +31,7 @@ bootph-all; }; - amba: amba { + amba: axi { bootph-all; compatible = "simple-bus"; #address-cells = <1>; diff --git a/arch/arm/dts/zynq-cse-nor.dts b/arch/arm/dts/zynq-cse-nor.dts index a5c8a0813ff..8e60d17b944 100644 --- a/arch/arm/dts/zynq-cse-nor.dts +++ b/arch/arm/dts/zynq-cse-nor.dts @@ -31,7 +31,7 @@ bootph-all; }; - amba: amba { + amba: axi { bootph-all; compatible = "simple-bus"; #address-cells = <1>; diff --git a/arch/arm/dts/zynq-cse-qspi.dtsi b/arch/arm/dts/zynq-cse-qspi.dtsi index 2e4afafebf5..3b7e6c79874 100644 --- a/arch/arm/dts/zynq-cse-qspi.dtsi +++ b/arch/arm/dts/zynq-cse-qspi.dtsi @@ -32,7 +32,7 @@ bootph-all; }; - amba: amba { + amba: axi { bootph-all; compatible = "simple-bus"; #address-cells = <1>; diff --git a/arch/arm/dts/zynqmp-dlc21-revA.dts b/arch/arm/dts/zynqmp-dlc21-revA.dts index 2076271ac99..293d8e97b63 100644 --- a/arch/arm/dts/zynqmp-dlc21-revA.dts +++ b/arch/arm/dts/zynqmp-dlc21-revA.dts @@ -87,7 +87,6 @@ status = "okay"; phy-handle = <&phy0>; phy-mode = "sgmii"; /* DTG generates this properly 1512 */ - is-internal-pcspma; mdio: mdio { #address-cells = <1>; #size-cells = <0>; @@ -118,7 +117,7 @@ "USB1_DATA7", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */ "", "", /* 78 - 79 */ "", "", "", "", "", /* 80 - 84 */ - "", "", "", "", "", /* 85 -89 */ + "", "", "", "", "", /* 85 - 89 */ "", "", "", "", "", /* 90 - 94 */ "", "VCCO_500_RBIAS", "VCCO_501_RBIAS", "VCCO_502_RBIAS", "VCCO_500_RBIAS_LED", /* 95 - 99 */ "VCCO_501_RBIAS_LED", "VCCO_502_RBIAS_LED", "SYSCTLR_VCCINT_EN", "SYSCTLR_VCC_IO_SOC_EN", "SYSCTLR_VCC_PMC_EN", /* 100 - 104 */ diff --git a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts index 0b97fa3f28a..4e0587fd441 100644 --- a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts @@ -155,7 +155,6 @@ phys = <&psgtr 0 PHY_TYPE_SGMII 0 0>; phy-handle = <&phy0>; phy-mode = "sgmii"; - is-internal-pcspma; mdio: mdio { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/dts/zynqmp-g-a2197-00-revA.dts b/arch/arm/dts/zynqmp-g-a2197-00-revA.dts index 36a0db44fd2..c439f778ca4 100644 --- a/arch/arm/dts/zynqmp-g-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-g-a2197-00-revA.dts @@ -80,7 +80,6 @@ status = "okay"; phy-handle = <&phy0>; phy-mode = "sgmii"; - is-internal-pcspma; mdio: mdio { #address-cells = <1>; #size-cells = <0>; @@ -112,7 +111,7 @@ "", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */ "SYSCTLR_VERSAL_MODE0", "SYSCTLR_VERSAL_MODE1", /* 78 - 79 */ "SYSCTLR_VERSAL_MODE2", "SYSCTLR_VERSAL_MODE3", "SYSCTLR_POR_B_LS", "DC_PRSNT", "SYSCTLR_POWER_EN", /* 80 - 84 */ - "SYSCTLR_JTAG_S0", "SYSCTLR_JTAG_S1", "SYSCTLR_IIC_MUX0_RESET_B", "SYSCTLR_IIC_MUX1_RESET_B", "SYSCTLR_LP_I2C_SM_ALERT", /* 85 -89 */ + "SYSCTLR_JTAG_S0", "SYSCTLR_JTAG_S1", "SYSCTLR_IIC_MUX0_RESET_B", "SYSCTLR_IIC_MUX1_RESET_B", "SYSCTLR_LP_I2C_SM_ALERT", /* 85 - 89 */ "SYSCTLR_GPIO0", "SYSCTLR_GPIO1", "SYSCTLR_GPIO2", "SYSCTLR_GPIO3", "SYSCTLR_GPIO4", /* 90 - 94 */ "SYSCTLR_GPIO5", "VCCO_500_RBIAS", "VCCO_501_RBIAS", "VCCO_502_RBIAS", "VCCO_500_RBIAS_LED", /* 95 - 99 */ "VCCO_501_RBIAS_LED", "VCCO_502_RBIAS_LED", "SYSCTLR_VCCINT_EN", "SYSCTLR_VCC_IO_SOC_EN", "SYSCTLR_VCC_PMC_EN", /* 100 - 104 */ diff --git a/arch/arm/dts/zynqmp-m-a2197-01-revA.dts b/arch/arm/dts/zynqmp-m-a2197-01-revA.dts index 83b8a98d80c..d6cd193a449 100644 --- a/arch/arm/dts/zynqmp-m-a2197-01-revA.dts +++ b/arch/arm/dts/zynqmp-m-a2197-01-revA.dts @@ -101,7 +101,7 @@ }; &sdhci1 { /* sd1 MIO45-51 cd in place */ - status = "disable"; + status = "disabled"; no-1-8-v; disable-wp; xlnx,mio-bank = <1>; @@ -140,9 +140,9 @@ "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1", /* 65 - 69 */ "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6", /* 70 - 74 */ "USB1_DATA7", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */ - "", "", "", "", "", /* 78 - 79 */ + "", "", /* 78 - 79 */ "", "", "", "", "", /* 80 - 84 */ - "", "", "", "", "", /* 85 -89 */ + "", "", "", "", "", /* 85 - 89 */ "", "", "", "", "", /* 90 - 94 */ "", "", "", "", "", /* 95 - 99 */ "", "", "", "", "", /* 100 - 104 */ @@ -300,7 +300,7 @@ i2c@3 { /* MEM PMBUS - FIXME bug in schematics */ #address-cells = <1>; #size-cells = <0>; - /* reg = <3>; */ + reg = <3>; }; i2c@4 { /* LP_I2C_SM */ #address-cells = <1>; @@ -365,25 +365,25 @@ #gpio-cells = <2>; gpio-line-names = "sw4_1", "sw4_2", "sw4_3", "sw4_4", "", "", "", ""; - gtr-sel0 { + gtr-sel0-hog { gpio-hog; gpios = <0 0>; input; /* FIXME add meaning */ line-name = "sw4_1"; }; - gtr-sel1 { + gtr-sel1-hog { gpio-hog; gpios = <1 0>; input; /* FIXME add meaning */ line-name = "sw4_2"; }; - gtr-sel2 { + gtr-sel2-hog { gpio-hog; gpios = <2 0>; input; /* FIXME add meaning */ line-name = "sw4_3"; }; - gtr-sel3 { + gtr-sel3-hog { gpio-hog; gpios = <3 0>; input; /* FIXME add meaning */ diff --git a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts index dd37b726d3d..902fdd4de6c 100644 --- a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts +++ b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts @@ -97,7 +97,7 @@ }; &sdhci1 { /* sd1 MIO45-51 cd in place */ - status = "disable"; + status = "disabled"; no-1-8-v; disable-wp; xlnx,mio-bank = <1>; @@ -135,9 +135,9 @@ "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1", /* 65 - 69 */ "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6", /* 70 - 74 */ "USB1_DATA7", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */ - "", "", "", "", "", /* 78 - 79 */ + "", "", /* 78 - 79 */ "", "", "", "", "", /* 80 - 84 */ - "", "", "", "", "", /* 85 -89 */ + "", "", "", "", "", /* 85 - 89 */ "", "", "", "", "", /* 90 - 94 */ "", "", "", "", "", /* 95 - 99 */ "", "", "", "", "", /* 100 - 104 */ @@ -288,7 +288,7 @@ i2c@3 { /* MEM PMBUS - FIXME bug in schematics */ #address-cells = <1>; #size-cells = <0>; - /* reg = <3>; */ + reg = <3>; }; i2c@4 { /* LP_I2C_SM */ #address-cells = <1>; @@ -367,25 +367,25 @@ #gpio-cells = <2>; gpio-line-names = "sw4_1", "sw4_2", "sw4_3", "sw4_4", "", "", "", ""; - gtr-sel0 { + gtr-sel0-hog { gpio-hog; gpios = <0 0>; input; /* FIXME add meaning */ line-name = "sw4_1"; }; - gtr-sel1 { + gtr-sel1-hog { gpio-hog; gpios = <1 0>; input; /* FIXME add meaning */ line-name = "sw4_2"; }; - gtr-sel2 { + gtr-sel2-hog { gpio-hog; gpios = <2 0>; input; /* FIXME add meaning */ line-name = "sw4_3"; }; - gtr-sel3 { + gtr-sel3-hog { gpio-hog; gpios = <3 0>; input; /* FIXME add meaning */ diff --git a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts index 811cebafe9e..f3994bca4a0 100644 --- a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts +++ b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts @@ -97,7 +97,7 @@ }; &sdhci1 { /* sd1 MIO45-51 cd in place */ - status = "disable"; + status = "disabled"; no-1-8-v; disable-wp; xlnx,mio-bank = <1>; @@ -135,9 +135,9 @@ "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1", /* 65 - 69 */ "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6", /* 70 - 74 */ "USB1_DATA7", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */ - "", "", "", "", "", /* 78 - 79 */ + "", "", /* 78 - 79 */ "", "", "", "", "", /* 80 - 84 */ - "", "", "", "", "", /* 85 -89 */ + "", "", "", "", "", /* 85 - 89 */ "", "", "", "", "", /* 90 - 94 */ "", "", "", "", "", /* 95 - 99 */ "", "", "", "", "", /* 100 - 104 */ @@ -292,7 +292,7 @@ i2c@3 { /* MEM PMBUS - FIXME bug in schematics */ #address-cells = <1>; #size-cells = <0>; - /* reg = <3>; */ + reg = <3>; }; i2c@4 { /* LP_I2C_SM */ #address-cells = <1>; @@ -361,25 +361,25 @@ #gpio-cells = <2>; gpio-line-names = "sw4_1", "sw4_2", "sw4_3", "sw4_4", "", "", "", ""; - gtr-sel0 { + gtr-sel0-hog { gpio-hog; gpios = <0 0>; input; /* FIXME add meaning */ line-name = "sw4_1"; }; - gtr-sel1 { + gtr-sel1-hog { gpio-hog; gpios = <1 0>; input; /* FIXME add meaning */ line-name = "sw4_2"; }; - gtr-sel2 { + gtr-sel2-hog { gpio-hog; gpios = <2 0>; input; /* FIXME add meaning */ line-name = "sw4_3"; }; - gtr-sel3 { + gtr-sel3-hog { gpio-hog; gpios = <3 0>; input; /* FIXME add meaning */ diff --git a/arch/arm/dts/zynqmp-mini-emmc0.dts b/arch/arm/dts/zynqmp-mini-emmc0.dts index 7823c58cb27..cf2219797a5 100644 --- a/arch/arm/dts/zynqmp-mini-emmc0.dts +++ b/arch/arm/dts/zynqmp-mini-emmc0.dts @@ -41,13 +41,13 @@ clock-frequency = <200000000>; }; - amba: amba { + amba: axi { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; ranges; - sdhci0: sdhci@ff160000 { + sdhci0: mmc@ff160000 { bootph-all; compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; status = "disabled"; diff --git a/arch/arm/dts/zynqmp-mini-emmc1.dts b/arch/arm/dts/zynqmp-mini-emmc1.dts index 2f6ba95073a..4c9f56a8076 100644 --- a/arch/arm/dts/zynqmp-mini-emmc1.dts +++ b/arch/arm/dts/zynqmp-mini-emmc1.dts @@ -41,13 +41,13 @@ clock-frequency = <200000000>; }; - amba: amba { + amba: axi { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; ranges; - sdhci1: sdhci@ff170000 { + sdhci1: mmc@ff170000 { bootph-all; compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; status = "disabled"; diff --git a/arch/arm/dts/zynqmp-mini-nand.dts b/arch/arm/dts/zynqmp-mini-nand.dts index e08a7840d8e..5e2135158cd 100644 --- a/arch/arm/dts/zynqmp-mini-nand.dts +++ b/arch/arm/dts/zynqmp-mini-nand.dts @@ -35,7 +35,7 @@ bootph-all; }; - amba: amba { + amba: axi { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <1>; diff --git a/arch/arm/dts/zynqmp-mini-qspi.dts b/arch/arm/dts/zynqmp-mini-qspi.dts index e35317f3e2d..917603dec61 100644 --- a/arch/arm/dts/zynqmp-mini-qspi.dts +++ b/arch/arm/dts/zynqmp-mini-qspi.dts @@ -36,7 +36,13 @@ bootph-all; }; - amba: amba { + misc_clk: misc-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + }; + + amba: axi { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <1>; @@ -52,19 +58,13 @@ #address-cells = <1>; #size-cells = <0>; }; - - misc_clk: misc-clk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <125000000>; - }; }; }; &qspi { status = "okay"; flash0: flash@0 { - compatible = "n25q512a11", "jedec,spi-nor"; + compatible = "jedec,spi-nor"; #address-cells = <1>; #size-cells = <1>; reg = <0x0>; diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA-x-prc-01-revA.dtso b/arch/arm/dts/zynqmp-p-a2197-00-revA-x-prc-01-revA.dtso index 197dc252353..82cc383dc4c 100644 --- a/arch/arm/dts/zynqmp-p-a2197-00-revA-x-prc-01-revA.dtso +++ b/arch/arm/dts/zynqmp-p-a2197-00-revA-x-prc-01-revA.dtso @@ -33,25 +33,25 @@ #gpio-cells = <2>; gpio-line-names = "sw4_1", "sw4_2", "sw4_3", "sw4_4", "", "", "", ""; - gtr-sel0 { + gtr-sel0-hog { gpio-hog; gpios = <0 0>; input; /* FIXME add meaning */ line-name = "sw4_1"; }; - gtr-sel1 { + gtr-sel1-hog { gpio-hog; gpios = <1 0>; input; /* FIXME add meaning */ line-name = "sw4_2"; }; - gtr-sel2 { + gtr-sel2-hog { gpio-hog; gpios = <2 0>; input; /* FIXME add meaning */ line-name = "sw4_3"; }; - gtr-sel3 { + gtr-sel3-hog { gpio-hog; gpios = <3 0>; input; /* FIXME add meaning */ diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA-x-prc-02-revA.dtso b/arch/arm/dts/zynqmp-p-a2197-00-revA-x-prc-02-revA.dtso index 8eb6e40dd9d..11b15447246 100644 --- a/arch/arm/dts/zynqmp-p-a2197-00-revA-x-prc-02-revA.dtso +++ b/arch/arm/dts/zynqmp-p-a2197-00-revA-x-prc-02-revA.dtso @@ -33,25 +33,25 @@ #gpio-cells = <2>; gpio-line-names = "sw4_1", "sw4_2", "sw4_3", "sw4_4", "", "", "", ""; - gtr-sel0 { + gtr-sel0-hog { gpio-hog; gpios = <0 0>; input; /* FIXME add meaning */ line-name = "sw4_1"; }; - gtr-sel1 { + gtr-sel1-hog { gpio-hog; gpios = <1 0>; input; /* FIXME add meaning */ line-name = "sw4_2"; }; - gtr-sel2 { + gtr-sel2-hog { gpio-hog; gpios = <2 0>; input; /* FIXME add meaning */ line-name = "sw4_3"; }; - gtr-sel3 { + gtr-sel3-hog { gpio-hog; gpios = <3 0>; input; /* FIXME add meaning */ diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA-x-prc-03-revA.dtso b/arch/arm/dts/zynqmp-p-a2197-00-revA-x-prc-03-revA.dtso index af7a3ce9c1a..9b4c8b3520d 100644 --- a/arch/arm/dts/zynqmp-p-a2197-00-revA-x-prc-03-revA.dtso +++ b/arch/arm/dts/zynqmp-p-a2197-00-revA-x-prc-03-revA.dtso @@ -33,25 +33,25 @@ #gpio-cells = <2>; gpio-line-names = "sw4_1", "sw4_2", "sw4_3", "sw4_4", "", "", "", ""; - gtr-sel0 { + gtr-sel0-hog { gpio-hog; gpios = <0 0>; input; /* FIXME add meaning */ line-name = "sw4_1"; }; - gtr-sel1 { + gtr-sel1-hog { gpio-hog; gpios = <1 0>; input; /* FIXME add meaning */ line-name = "sw4_2"; }; - gtr-sel2 { + gtr-sel2-hog { gpio-hog; gpios = <2 0>; input; /* FIXME add meaning */ line-name = "sw4_3"; }; - gtr-sel3 { + gtr-sel3-hog { gpio-hog; gpios = <3 0>; input; /* FIXME add meaning */ diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA-x-prc-04-revA.dtso b/arch/arm/dts/zynqmp-p-a2197-00-revA-x-prc-04-revA.dtso index 29a6c2a627b..1b1bb365080 100644 --- a/arch/arm/dts/zynqmp-p-a2197-00-revA-x-prc-04-revA.dtso +++ b/arch/arm/dts/zynqmp-p-a2197-00-revA-x-prc-04-revA.dtso @@ -33,25 +33,25 @@ #gpio-cells = <2>; gpio-line-names = "sw4_1", "sw4_2", "sw4_3", "sw4_4", "", "", "", ""; - gtr-sel0 { + gtr-sel0-hog { gpio-hog; gpios = <0 0>; input; /* FIXME add meaning */ line-name = "sw4_1"; }; - gtr-sel1 { + gtr-sel1-hog { gpio-hog; gpios = <1 0>; input; /* FIXME add meaning */ line-name = "sw4_2"; }; - gtr-sel2 { + gtr-sel2-hog { gpio-hog; gpios = <2 0>; input; /* FIXME add meaning */ line-name = "sw4_3"; }; - gtr-sel3 { + gtr-sel3-hog { gpio-hog; gpios = <3 0>; input; /* FIXME add meaning */ diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA-x-prc-05-revA.dtso b/arch/arm/dts/zynqmp-p-a2197-00-revA-x-prc-05-revA.dtso index 6ddf18cf643..8c16286a033 100644 --- a/arch/arm/dts/zynqmp-p-a2197-00-revA-x-prc-05-revA.dtso +++ b/arch/arm/dts/zynqmp-p-a2197-00-revA-x-prc-05-revA.dtso @@ -33,25 +33,25 @@ #gpio-cells = <2>; gpio-line-names = "sw4_1", "sw4_2", "sw4_3", "sw4_4", "", "", "", ""; - gtr-sel0 { + gtr-sel0-hog { gpio-hog; gpios = <0 0>; input; /* FIXME add meaning */ line-name = "sw4_1"; }; - gtr-sel1 { + gtr-sel1-hog { gpio-hog; gpios = <1 0>; input; /* FIXME add meaning */ line-name = "sw4_2"; }; - gtr-sel2 { + gtr-sel2-hog { gpio-hog; gpios = <2 0>; input; /* FIXME add meaning */ line-name = "sw4_3"; }; - gtr-sel3 { + gtr-sel3-hog { gpio-hog; gpios = <3 0>; input; /* FIXME add meaning */ diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts index 5a60b86a574..ae52e8e996a 100644 --- a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts @@ -90,7 +90,6 @@ status = "okay"; phy-handle = <&phy0>; phy-mode = "sgmii"; /* DTG generates this properly 1512 */ - is-internal-pcspma; mdio: mdio { #address-cells = <1>; #size-cells = <0>; @@ -121,7 +120,7 @@ "USB1_DATA7", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */ "SYSCTLR_VERSAL_MODE0", "SYSCTLR_VERSAL_MODE1", /* 78 - 79 */ "SYSCTLR_VERSAL_MODE2", "SYSCTLR_VERSAL_MODE3", "SYSCTLR_POR_B_LS", "DC_PRSNT", "SYSCTLR_POWER_EN", /* 80 - 84 */ - "SYSCTLR_JTAG_S0", "SYSCTLR_JTAG_S1", "SYSCTLR_IIC_MUX0_RESET_B", "SYSCTLR_IIC_MUX1_RESET_B", "SYSCTLR_LP_I2C_SM_ALERT", /* 85 -89 */ + "SYSCTLR_JTAG_S0", "SYSCTLR_JTAG_S1", "SYSCTLR_IIC_MUX0_RESET_B", "SYSCTLR_IIC_MUX1_RESET_B", "SYSCTLR_LP_I2C_SM_ALERT", /* 85 - 89 */ "SYSCTLR_GPIO0", "SYSCTLR_GPIO1", "SYSCTLR_GPIO2", "SYSCTLR_GPIO3", "SYSCTLR_GPIO4", /* 90 - 94 */ "SYSCTLR_GPIO5", "VCCO_500_RBIAS", "VCCO_501_RBIAS", "VCCO_502_RBIAS", "VCCO_500_RBIAS_LED", /* 95 - 99 */ "VCCO_501_RBIAS_LED", "VCCO_502_RBIAS_LED", "SYSCTLR_VCCINT_EN", "SYSCTLR_VCC_IO_SOC_EN", "SYSCTLR_VCC_PMC_EN", /* 100 - 104 */ @@ -427,25 +426,25 @@ #gpio-cells = <2>; gpio-line-names = "sw4_1", "sw4_2", "sw4_3", "sw4_4", "", "", "", ""; - gtr-sel0 { + gtr-sel0-hog { gpio-hog; gpios = <0 0>; input; /* FIXME add meaning */ line-name = "sw4_1"; }; - gtr-sel1 { + gtr-sel1-hog { gpio-hog; gpios = <1 0>; input; /* FIXME add meaning */ line-name = "sw4_2"; }; - gtr-sel2 { + gtr-sel2-hog { gpio-hog; gpios = <2 0>; input; /* FIXME add meaning */ line-name = "sw4_3"; }; - gtr-sel3 { + gtr-sel3-hog { gpio-hog; gpios = <3 0>; input; /* FIXME add meaning */ diff --git a/arch/arm/dts/zynqmp-sc-revB.dts b/arch/arm/dts/zynqmp-sc-revB.dts index c1d713b5d89..1fcb5bfb928 100644 --- a/arch/arm/dts/zynqmp-sc-revB.dts +++ b/arch/arm/dts/zynqmp-sc-revB.dts @@ -104,7 +104,7 @@ "", "", "ETH_RESET_B", /* 75 - 77, MIO end and EMIO start */ "", "", /* 78 - 79 */ "", "", "", "", "", /* 80 - 84 */ - "", "", "", "", "", /* 85 -89 */ + "", "", "", "", "", /* 85 - 89 */ "", "", "", "", "", /* 90 - 94 */ "", "", "", "", "", /* 95 - 99 */ "", "", "", "", "", /* 100 - 104 */ diff --git a/arch/arm/dts/zynqmp-sc-vn-p-b2197-00-revA.dtso b/arch/arm/dts/zynqmp-sc-vn-p-b2197-00-revA.dtso index 5333767361f..620afba06e6 100644 --- a/arch/arm/dts/zynqmp-sc-vn-p-b2197-00-revA.dtso +++ b/arch/arm/dts/zynqmp-sc-vn-p-b2197-00-revA.dtso @@ -115,25 +115,25 @@ #gpio-cells = <2>; gpio-line-names = "xprc_sw_1", "xprc_sw_2", "xprc_sw_3", "xprc_sw_4", "", "", "", ""; - gtr-sel0 { + gtr-sel0-hog { gpio-hog; gpios = <0 0>; input; /* FIXME add meaning */ line-name = "xprc_sw_1"; }; - gtr-sel1 { + gtr-sel1-hog { gpio-hog; gpios = <1 0>; input; /* FIXME add meaning */ line-name = "xprc_sw_1"; }; - gtr-sel2 { + gtr-sel2-hog { gpio-hog; gpios = <2 0>; input; /* FIXME add meaning */ line-name = "xprc_sw_1"; }; - gtr-sel3 { + gtr-sel3-hog { gpio-hog; gpios = <3 0>; input; /* FIXME add meaning */ diff --git a/arch/arm/dts/zynqmp-sc-vpk180-revA.dtso b/arch/arm/dts/zynqmp-sc-vpk180-revA.dtso index 18625933ad3..ba5484573c9 100644 --- a/arch/arm/dts/zynqmp-sc-vpk180-revA.dtso +++ b/arch/arm/dts/zynqmp-sc-vpk180-revA.dtso @@ -16,6 +16,12 @@ &{/} { compatible = "xlnx,zynqmp-sc-vpk180-revA", "xlnx,zynqmp-vpk180-revA", "xlnx,zynqmp-vpk180", "xlnx,zynqmp"; + + vc7_xin: vc7-xin { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <50000000>; + }; }; &i2c0 { diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso index ce7c5eb6d34..6349a0e1087 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso +++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso @@ -195,7 +195,6 @@ phys = <&psgtr 0 PHY_TYPE_SGMII 0 0>; phy-handle = <&phy0>; phy-mode = "sgmii"; - is-internal-pcspma; assigned-clock-rates = <250000000>; }; diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso index 0a0cbd2b69a..b0d737d3caf 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso +++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso @@ -216,7 +216,6 @@ phys = <&psgtr 0 PHY_TYPE_SGMII 0 0>; phy-handle = <&phy0>; phy-mode = "sgmii"; - is-internal-pcspma; assigned-clock-rates = <250000000>; }; diff --git a/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts b/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts index b626d1aacf5..7849f8c540b 100644 --- a/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts +++ b/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts @@ -117,7 +117,6 @@ status = "okay"; phy-handle = <&phy0>; phy-mode = "sgmii"; /* DTG generates this properly 1512 */ - is-internal-pcspma; /* phys = <&psgtr 0 PHY_TYPE_SGMII 0 0>; */ mdio: mdio { #address-cells = <1>; diff --git a/arch/arm/dts/zynqmp-vpk120-revA.dts b/arch/arm/dts/zynqmp-vpk120-revA.dts index e0632883e4e..4768fac71d0 100644 --- a/arch/arm/dts/zynqmp-vpk120-revA.dts +++ b/arch/arm/dts/zynqmp-vpk120-revA.dts @@ -118,7 +118,6 @@ status = "okay"; phy-handle = <&phy0>; phy-mode = "sgmii"; /* DTG generates this properly 1512 */ - is-internal-pcspma; /* phys = <&psgtr 0 PHY_TYPE_SGMII 0 0>; */ mdio: mdio { #address-cells = <1>; diff --git a/arch/arm/dts/zynqmp-zcu106-rev1.0.dts b/arch/arm/dts/zynqmp-zcu106-rev1.0.dts index a9b5826a777..f1ec314fdef 100644 --- a/arch/arm/dts/zynqmp-zcu106-rev1.0.dts +++ b/arch/arm/dts/zynqmp-zcu106-rev1.0.dts @@ -11,6 +11,6 @@ / { model = "ZynqMP ZCU106 Rev1.0"; - compatible = "xlnx,zynqmp-zcu106-rev1.0", "xlnx,zynqmp-zcu106-revA", + compatible = "xlnx,zynqmp-zcu106-rev1.0", "xlnx,zynqmp-zcu106", "xlnx,zynqmp"; }; diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts index 787cf0d87f9..3a1580dfc40 100644 --- a/arch/arm/dts/zynqmp-zcu111-revA.dts +++ b/arch/arm/dts/zynqmp-zcu111-revA.dts @@ -494,7 +494,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <5>; - sc18is603@2f { /* sc18is602 - u93 */ + sc18is603: spi@2f { /* sc18is602 - u93 */ compatible = "nxp,sc18is603"; reg = <0x2f>; /* 4 gpios for CS not handled by driver */ diff --git a/arch/arm/dts/zynqmp-zcu1275-revB.dts b/arch/arm/dts/zynqmp-zcu1275-revB.dts index 4060dc3613a..ed83ba32791 100644 --- a/arch/arm/dts/zynqmp-zcu1275-revB.dts +++ b/arch/arm/dts/zynqmp-zcu1275-revB.dts @@ -43,6 +43,7 @@ &gem1 { status = "okay"; + phy-mode = "rgmii-id"; mdio { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/dts/zynqmp-zcu208-revA.dts b/arch/arm/dts/zynqmp-zcu208-revA.dts index a113e475082..88536e917d9 100644 --- a/arch/arm/dts/zynqmp-zcu208-revA.dts +++ b/arch/arm/dts/zynqmp-zcu208-revA.dts @@ -68,7 +68,7 @@ compatible = "iio-hwmon"; io-channels = <&vccint 0>, <&vccint 1>, <&vccint 2>, <&vccint 3>; }; - ina226-vccint-io-bram-ps { + ina226-vccint-io-bram { compatible = "iio-hwmon"; io-channels = <&vccint_io_bram_ps 0>, <&vccint_io_bram_ps 1>, <&vccint_io_bram_ps 2>, <&vccint_io_bram_ps 3>; }; @@ -205,7 +205,7 @@ "ENET_RX_CTRL", "ENET_MDC", "ENET_MDIO", /* 75 - 77, MIO end and EMIO start */ "", "", /* 78 - 79 */ "", "", "", "", "", /* 80 - 84 */ - "", "", "", "", "", /* 85 -89 */ + "", "", "", "", "", /* 85 - 89 */ "", "", "", "", "", /* 90 - 94 */ "", "", "", "", "", /* 95 - 99 */ "", "", "", "", "", /* 100 - 104 */ diff --git a/arch/arm/dts/zynqmp-zcu216-revA.dts b/arch/arm/dts/zynqmp-zcu216-revA.dts index 4d7d5d2e5ef..29087aa7cb9 100644 --- a/arch/arm/dts/zynqmp-zcu216-revA.dts +++ b/arch/arm/dts/zynqmp-zcu216-revA.dts @@ -68,7 +68,7 @@ compatible = "iio-hwmon"; io-channels = <&vccint 0>, <&vccint 1>, <&vccint 2>, <&vccint 3>; }; - ina226-vccint-io-bram-ps { + ina226-vccint-io-bram { compatible = "iio-hwmon"; io-channels = <&vccint_io_bram_ps 0>, <&vccint_io_bram_ps 1>, <&vccint_io_bram_ps 2>, <&vccint_io_bram_ps 3>; }; @@ -211,7 +211,7 @@ "ENET_RX_CTRL", "ENET_MDC", "ENET_MDIO", /* 75 - 77, MIO end and EMIO start */ "", "", /* 78 - 79 */ "", "", "", "", "", /* 80 - 84 */ - "", "", "", "", "", /* 85 -89 */ + "", "", "", "", "", /* 85 - 89 */ "", "", "", "", "", /* 90 - 94 */ "", "", "", "", "", /* 95 - 99 */ "", "", "", "", "", /* 100 - 104 */ diff --git a/arch/arm/dts/zynqmp-zcu670-revA.dts b/arch/arm/dts/zynqmp-zcu670-revA.dts index def3b53cef7..2928ebe56fc 100644 --- a/arch/arm/dts/zynqmp-zcu670-revA.dts +++ b/arch/arm/dts/zynqmp-zcu670-revA.dts @@ -71,7 +71,7 @@ compatible = "iio-hwmon"; io-channels = <&vccint 0>, <&vccint 1>, <&vccint 2>, <&vccint 3>; }; - ina226-vccint-io-bram-ps { + ina226-vccint-io-bram { compatible = "iio-hwmon"; io-channels = <&vccint_io_bram_ps 0>, <&vccint_io_bram_ps 1>, <&vccint_io_bram_ps 2>, <&vccint_io_bram_ps 3>; }; diff --git a/arch/arm/dts/zynqmp-zcu670-revB.dts b/arch/arm/dts/zynqmp-zcu670-revB.dts index 41f9a23d06a..1a99d1e08fb 100644 --- a/arch/arm/dts/zynqmp-zcu670-revB.dts +++ b/arch/arm/dts/zynqmp-zcu670-revB.dts @@ -71,7 +71,7 @@ compatible = "iio-hwmon"; io-channels = <&vccint 0>, <&vccint 1>, <&vccint 2>, <&vccint 3>; }; - ina226-vccint-io-bram-ps { + ina226-vccint-io-bram { compatible = "iio-hwmon"; io-channels = <&vccint_io_bram_ps 0>, <&vccint_io_bram_ps 1>, <&vccint_io_bram_ps 2>, <&vccint_io_bram_ps 3>; }; diff --git a/arch/arm/mach-zynqmp/include/mach/hardware.h b/arch/arm/mach-zynqmp/include/mach/hardware.h index 8cb6494e52c..49e449ebd61 100644 --- a/arch/arm/mach-zynqmp/include/mach/hardware.h +++ b/arch/arm/mach-zynqmp/include/mach/hardware.h @@ -42,6 +42,8 @@ #define CRLAPB_DBG_LPD_CTRL_SETUP_CLK 0x01002002 #define CRLAPB_RST_LPD_DBG_RESET 0 +#define CRL_APB_SOFT_RESET_CTRL_MASK 0x10 + struct crlapb_regs { u32 reserved0[36]; u32 cpu_r5_ctrl; /* 0x90 */ @@ -51,7 +53,9 @@ struct crlapb_regs { u32 timestamp_ref_ctrl; /* 0x128 */ u32 reserved3[53]; u32 boot_mode; /* 0x200 */ - u32 reserved4_0[7]; + u32 reserved4_0[5]; + u32 soft_reset; /* 0x218 */ + u32 reserved4_10; u32 reset_reason; /* 0x220 */ u32 reserved4_1[6]; u32 rst_lpd_top; /* 0x23C */ @@ -63,6 +67,8 @@ struct crlapb_regs { #define crlapb_base ((struct crlapb_regs *)ZYNQMP_CRL_APB_BASEADDR) +#define ZYNQMP_IOU_SECURE_SLCR 0xFF240000 + #define ZYNQMP_IOU_SCNTR_SECURE 0xFF260000 #define ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_EN 0x1 #define ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_HDBG 0x2 @@ -126,6 +132,9 @@ struct crfapb_regs { #define crfapb_base ((struct crfapb_regs *)ZYNQMP_CRF_APB_BASEADDR) +#define ZYNQMP_CCI_REG_CCI_MISC_CTRL 0xFD5E0040 +#define ZYNQMP_CCI_REG_CCI_MISC_CTRL_NIDEN BIT(1) + #define ZYNQMP_APU_BASEADDR 0xFD5C0000 struct apu_regs { diff --git a/arch/arm/mach-zynqmp/zynqmp.c b/arch/arm/mach-zynqmp/zynqmp.c index bf39c5472ea..3b4d9c60e5c 100644 --- a/arch/arm/mach-zynqmp/zynqmp.c +++ b/arch/arm/mach-zynqmp/zynqmp.c @@ -340,6 +340,30 @@ static int do_zynqmp_sha3(struct cmd_tbl *cmdtp, int flag, return CMD_RET_SUCCESS; } +static int do_zynqmp_reboot(struct cmd_tbl *cmdtp, int flag, + int argc, char * const argv[]) +{ + u32 multiboot; + int ret; + + if (argc != cmdtp->maxargs) + return CMD_RET_USAGE; + + multiboot = hextoul(argv[2], NULL); + + ret = zynqmp_mmio_write(0xFFCA0010, 0xfff, multiboot); + if (ret != 0) { + printf("Failed: mmio write\n"); + return ret; + } + + /* issue soft reset */ + writel(CRL_APB_SOFT_RESET_CTRL_MASK, &crlapb_base->soft_reset); + + /* never get here */ + return CMD_RET_SUCCESS; +} + static struct cmd_tbl cmd_zynqmp_sub[] = { U_BOOT_CMD_MKENT(secure, 5, 0, do_zynqmp_verify_secure, "", ""), U_BOOT_CMD_MKENT(pmufw, 4, 0, do_zynqmp_pmufw, "", ""), @@ -348,6 +372,7 @@ static struct cmd_tbl cmd_zynqmp_sub[] = { U_BOOT_CMD_MKENT(aes, 9, 0, do_zynqmp_aes, "", ""), U_BOOT_CMD_MKENT(rsa, 7, 0, do_zynqmp_rsa, "", ""), U_BOOT_CMD_MKENT(sha3, 5, 0, do_zynqmp_sha3, "", ""), + U_BOOT_CMD_MKENT(reboot, 3, 0, do_zynqmp_reboot, "", ""), #ifdef CONFIG_DEFINE_TCM_OCM_MMAP U_BOOT_CMD_MKENT(tcminit, 3, 0, do_zynqmp_tcm_init, "", ""), #endif @@ -387,6 +412,7 @@ U_BOOT_LONGHELP(zynqmp, " long at address $src. Optional key_addr\n" " can be specified if user key needs to\n" " be used for decryption\n" + "zynqmp reboot multiboot - soft reboot to multiboot offset\n" "zynqmp mmio_read address - read from address\n" "zynqmp mmio_write address mask value - write value after masking to\n" " address\n" diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c index 1c100d61589..5e5eb49ddf3 100644 --- a/board/xilinx/common/board.c +++ b/board/xilinx/common/board.c @@ -425,28 +425,25 @@ int board_late_init_xilinx(void) struct xilinx_board_description *desc; phys_size_t bootm_size = gd->ram_top - gd->ram_base; u64 bootscr_flash_offset, bootscr_flash_size; - - if (!IS_ENABLED(CONFIG_MICROBLAZE)) { - ulong scriptaddr; - u64 bootscr_address; - u64 bootscr_offset; - - /* Fetch bootscr_address/bootscr_offset from DT and update */ - if (!ofnode_read_bootscript_address(&bootscr_address, - &bootscr_offset)) { - if (bootscr_offset) - ret |= env_set_hex("scriptaddr", - gd->ram_base + - bootscr_offset); - else - ret |= env_set_hex("scriptaddr", - bootscr_address); - } else { - /* Update scriptaddr(bootscr offset) from env */ - scriptaddr = env_get_hex("scriptaddr", 0); + ulong scriptaddr; + u64 bootscr_address; + u64 bootscr_offset; + + /* Fetch bootscr_address/bootscr_offset from DT and update */ + if (!ofnode_read_bootscript_address(&bootscr_address, + &bootscr_offset)) { + if (bootscr_offset) ret |= env_set_hex("scriptaddr", - gd->ram_base + scriptaddr); - } + gd->ram_base + + bootscr_offset); + else + ret |= env_set_hex("scriptaddr", + bootscr_address); + } else { + /* Update scriptaddr(bootscr offset) from env */ + scriptaddr = env_get_hex("scriptaddr", 0); + ret |= env_set_hex("scriptaddr", + gd->ram_base + scriptaddr); } if (!ofnode_read_bootscript_flash(&bootscr_flash_offset, diff --git a/board/xilinx/versal-net/board.c b/board/xilinx/versal-net/board.c index 1d67e3f3185..4d5913cff1d 100644 --- a/board/xilinx/versal-net/board.c +++ b/board/xilinx/versal-net/board.c @@ -12,6 +12,7 @@ #include <env_internal.h> #include <log.h> #include <malloc.h> +#include <spi.h> #include <time.h> #include <asm/cache.h> #include <asm/global_data.h> @@ -196,7 +197,6 @@ static u8 versal_net_get_bootmode(void) int spi_get_env_dev(void) { struct udevice *dev; - const char *mode = NULL; int bootseq = -1; switch (versal_net_get_bootmode()) { @@ -207,7 +207,6 @@ int spi_get_env_dev(void) debug("QSPI driver for QSPI device is not present\n"); break; } - mode = "xspi"; bootseq = dev_seq(dev); break; case QSPI_MODE_32BIT: @@ -217,7 +216,6 @@ int spi_get_env_dev(void) debug("QSPI driver for QSPI device is not present\n"); break; } - mode = "xspi"; bootseq = dev_seq(dev); break; case OSPI_MODE: @@ -227,7 +225,6 @@ int spi_get_env_dev(void) debug("OSPI driver for OSPI device is not present\n"); break; } - mode = "xspi"; bootseq = dev_seq(dev); break; default: diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index e6331c0e4d8..20a675c010d 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -72,6 +72,14 @@ int __maybe_unused psu_uboot_init(void) writel(ZYNQMP_PS_SYSMON_ANALOG_BUS_VAL, ZYNQMP_AMS_PS_SYSMON_ANALOG_BUS); + /* Disable secure access for boot devices */ + writel(0x04920492, ZYNQMP_IOU_SECURE_SLCR); + writel(0x00920492, ZYNQMP_IOU_SECURE_SLCR + 4); + + /* Enable CCI PMU events */ + writel(ZYNQMP_CCI_REG_CCI_MISC_CTRL_NIDEN, + ZYNQMP_CCI_REG_CCI_MISC_CTRL); + /* Delay is required for clocks to be propagated */ udelay(1000000); diff --git a/board/xilinx/zynqmp/zynqmp_kria.env b/board/xilinx/zynqmp/zynqmp_kria.env index 49ef3e7d753..d0e431ebb46 100644 --- a/board/xilinx/zynqmp/zynqmp_kria.env +++ b/board/xilinx/zynqmp/zynqmp_kria.env @@ -49,9 +49,19 @@ usb_boot_devices='usb0 usb1 usb2 usb3 usb4' som_cc_boot=if test ${card1_name} = SCK-KV-G; then setenv boot_targets mmc1 ${usb_boot_devices} pxe dhcp jtag && run distro_bootcmd; elif test ${card1_name} = SCK-KR-G; then setenv boot_targets ${usb_boot_devices} pxe dhcp jtag && run distro_bootcmd; else test ${card1_name} = SCK-KD-G; setenv boot_targets ${usb_boot_devices} pxe dhcp jtag && run distro_bootcmd; fi;" som_mmc_boot=setenv boot_targets mmc0 && run distro_bootcmd +# To disable bootmenu set enable_bootmenu=0 +enable_bootmenu=1 +check_cc_for_default_boot=if test ${card1_name} = SCK-KV-G || test ${card1_name} = SCK-KR-G || test ${card1_name} = SCK-KD-G; then setenv bootmenu_default 1; else setenv bootmenu_default 0; fi +som_bootmenu=if test ${enable_bootmenu} = 1; then run check_cc_for_default_boot; bootmenu; else run som_mmc_boot; fi + k26_starter=SMK-K26-XCL2G k24_starter=SMK-K24-XCL2G -bootcmd=setenv model $board_name && if setexpr model gsub .*$k24_starter* $k24_starter || setexpr model gsub .*$k26_starter* $k26_starter; then run som_cc_boot; else run som_mmc_boot; run som_cc_boot; fi +bootcmd=setenv model $board_name; setexpr model gsub ".*${k24_starter}.*" starter; setexpr model gsub ".*${k26_starter}.*" starter; if test ${model} = "starter"; then run som_cc_boot; else run som_bootmenu; fi + +# Boot menu +bootmenu_0=eMMC Boot=run som_mmc_boot +bootmenu_1=SD Boot=run som_cc_boot +bootmenu_delay=5 usb_hub_init=mw 1000 0056 && sleep 1 && i2c write 1000 2d aa 2 -s diff --git a/configs/amd_versal2_virt_defconfig b/configs/amd_versal2_virt_defconfig index c4bf77186cd..78f6ffcc3a7 100644 --- a/configs/amd_versal2_virt_defconfig +++ b/configs/amd_versal2_virt_defconfig @@ -72,6 +72,7 @@ CONFIG_NETCONSOLE=y CONFIG_IP_DEFRAG=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_TFTP_BLOCKSIZE=4096 +CONFIG_SIMPLE_PM_BUS=y CONFIG_CLK_CCF=y CONFIG_CLK_SCMI=y CONFIG_DFU_RAM=y diff --git a/configs/xilinx_versal_net_virt_defconfig b/configs/xilinx_versal_net_virt_defconfig index 40a9b16b9cf..776af9ae29f 100644 --- a/configs/xilinx_versal_net_virt_defconfig +++ b/configs/xilinx_versal_net_virt_defconfig @@ -73,6 +73,7 @@ CONFIG_NETCONSOLE=y CONFIG_IP_DEFRAG=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_TFTP_BLOCKSIZE=4096 +CONFIG_SIMPLE_PM_BUS=y CONFIG_CLK_VERSAL=y CONFIG_DFU_RAM=y CONFIG_ARM_FFA_TRANSPORT=y diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index dc1754f6d18..0d4591411e1 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -72,6 +72,7 @@ CONFIG_NETCONSOLE=y CONFIG_IP_DEFRAG=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_TFTP_BLOCKSIZE=4096 +CONFIG_SIMPLE_PM_BUS=y CONFIG_CLK_VERSAL=y CONFIG_DFU_TIMEOUT=y CONFIG_DFU_RAM=y diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index f8b6a3f1aa2..b2921df1d0d 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -94,6 +94,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SIMPLE_PM_BUS=y CONFIG_DFU_TIMEOUT=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y @@ -138,6 +139,7 @@ CONFIG_PHY_XILINX=y CONFIG_DM_ETH_PHY=y CONFIG_MII=y CONFIG_ZYNQ_GEM=y +CONFIG_POWER_DOMAIN=y CONFIG_ARM_DCC=y CONFIG_ZYNQ_SERIAL=y CONFIG_ZYNQ_SPI=y diff --git a/configs/xilinx_zynqmp_kria_defconfig b/configs/xilinx_zynqmp_kria_defconfig index 4c66c536d0f..5a07edf5cd2 100644 --- a/configs/xilinx_zynqmp_kria_defconfig +++ b/configs/xilinx_zynqmp_kria_defconfig @@ -117,6 +117,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SIMPLE_PM_BUS=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 1133134e3fe..491206998da 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -118,6 +118,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SIMPLE_PM_BUS=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index 28d2b456fbf..24d0556cd37 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -105,6 +105,19 @@ struct arasan_sdhci_priv { struct reset_ctl_bulk resets; }; +enum arasan_sdhci_compatible { + SDHCI_COMPATIBLE_SDHCI_89A, + SDHCI_COMPATIBLE_VERSAL_NET_EMMC, +}; + +static bool arasan_sdhci_is_compatible(struct udevice *dev, + enum arasan_sdhci_compatible family) +{ + enum arasan_sdhci_compatible compat = dev_get_driver_data(dev); + + return compat == family; +} + /* For Versal platforms zynqmp_mmio_write() won't be available */ __weak int zynqmp_mmio_write(const u32 address, const u32 mask, const u32 value) { @@ -422,7 +435,7 @@ static int arasan_sdhci_execute_tuning(struct mmc *mmc, u8 opcode) mdelay(1); - if (device_is_compatible(mmc->dev, "xlnx,zynqmp-8.9a")) + if (arasan_sdhci_is_compatible(mmc->dev, SDHCI_COMPATIBLE_SDHCI_89A)) arasan_zynqmp_dll_reset(host, priv->node_id); sdhci_writel(host, SDHCI_INT_DATA_AVAIL, SDHCI_INT_ENABLE); @@ -470,7 +483,7 @@ static int arasan_sdhci_execute_tuning(struct mmc *mmc, u8 opcode) udelay(1); - if (device_is_compatible(mmc->dev, "xlnx,zynqmp-8.9a")) + if (arasan_sdhci_is_compatible(mmc->dev, SDHCI_COMPATIBLE_SDHCI_89A)) arasan_zynqmp_dll_reset(host, priv->node_id); /* Enable only interrupts served by the SD controller */ @@ -858,7 +871,7 @@ static int arasan_sdhci_set_tapdelay(struct sdhci_host *host) dev_dbg(dev, "%s, host:%s, mode:%d\n", __func__, host->name, timing); if (IS_ENABLED(CONFIG_ARCH_ZYNQMP) && - device_is_compatible(dev, "xlnx,zynqmp-8.9a")) { + arasan_sdhci_is_compatible(dev, SDHCI_COMPATIBLE_SDHCI_89A)) { ret = sdhci_zynqmp_sampleclk_set_phase(host, iclk_phase); if (ret) return ret; @@ -869,7 +882,7 @@ static int arasan_sdhci_set_tapdelay(struct sdhci_host *host) } else if ((IS_ENABLED(CONFIG_ARCH_VERSAL) || IS_ENABLED(CONFIG_ARCH_VERSAL_NET) || IS_ENABLED(CONFIG_ARCH_VERSAL2)) && - device_is_compatible(dev, "xlnx,versal-8.9a")) { + arasan_sdhci_is_compatible(dev, SDHCI_COMPATIBLE_SDHCI_89A)) { ret = sdhci_versal_sampleclk_set_phase(host, iclk_phase); if (ret) return ret; @@ -879,7 +892,7 @@ static int arasan_sdhci_set_tapdelay(struct sdhci_host *host) return ret; } else if ((IS_ENABLED(CONFIG_ARCH_VERSAL_NET) || IS_ENABLED(CONFIG_ARCH_VERSAL2)) && - device_is_compatible(dev, "xlnx,versal-net-emmc")) { + arasan_sdhci_is_compatible(dev, SDHCI_COMPATIBLE_VERSAL_NET_EMMC)) { if (mmc->clock >= MIN_PHY_CLK_HZ) if (iclk_phase == VERSAL_NET_EMMC_ICLK_PHASE_DDR52_DLY_CHAIN) iclk_phase = VERSAL_NET_EMMC_ICLK_PHASE_DDR52_DLL; @@ -933,7 +946,7 @@ static void arasan_dt_parse_clk_phases(struct udevice *dev) int i; if (IS_ENABLED(CONFIG_ARCH_ZYNQMP) && - device_is_compatible(dev, "xlnx,zynqmp-8.9a")) { + arasan_sdhci_is_compatible(dev, SDHCI_COMPATIBLE_SDHCI_89A)) { for (i = 0; i <= MMC_TIMING_MMC_HS400; i++) { clk_data->clk_phase_in[i] = zynqmp_iclk_phases[i]; clk_data->clk_phase_out[i] = zynqmp_oclk_phases[i]; @@ -948,7 +961,7 @@ static void arasan_dt_parse_clk_phases(struct udevice *dev) if ((IS_ENABLED(CONFIG_ARCH_VERSAL) || IS_ENABLED(CONFIG_ARCH_VERSAL_NET) || IS_ENABLED(CONFIG_ARCH_VERSAL2)) && - device_is_compatible(dev, "xlnx,versal-8.9a")) { + arasan_sdhci_is_compatible(dev, SDHCI_COMPATIBLE_SDHCI_89A)) { for (i = 0; i <= MMC_TIMING_MMC_HS400; i++) { clk_data->clk_phase_in[i] = versal_iclk_phases[i]; clk_data->clk_phase_out[i] = versal_oclk_phases[i]; @@ -957,7 +970,7 @@ static void arasan_dt_parse_clk_phases(struct udevice *dev) if ((IS_ENABLED(CONFIG_ARCH_VERSAL_NET) || IS_ENABLED(CONFIG_ARCH_VERSAL2)) && - device_is_compatible(dev, "xlnx,versal-net-emmc")) { + arasan_sdhci_is_compatible(dev, SDHCI_COMPATIBLE_VERSAL_NET_EMMC)) { for (i = 0; i <= MMC_TIMING_MMC_HS400; i++) { clk_data->clk_phase_in[i] = versal_net_emmc_iclk_phases[i]; clk_data->clk_phase_out[i] = versal_net_emmc_oclk_phases[i]; @@ -1101,7 +1114,7 @@ static int arasan_sdhci_probe(struct udevice *dev) host = priv->host; #if defined(CONFIG_ARCH_ZYNQMP) && defined(CONFIG_ZYNQMP_FIRMWARE) - if (device_is_compatible(dev, "xlnx,zynqmp-8.9a")) { + if (arasan_sdhci_is_compatible(dev, SDHCI_COMPATIBLE_SDHCI_89A)) { ret = zynqmp_pm_is_function_supported(PM_IOCTL, IOCTL_SET_SD_CONFIG); if (!ret) { @@ -1111,7 +1124,7 @@ static int arasan_sdhci_probe(struct udevice *dev) } } #endif - if (device_is_compatible(dev, "xlnx,versal-net-emmc")) + if (arasan_sdhci_is_compatible(dev, SDHCI_COMPATIBLE_VERSAL_NET_EMMC)) priv->internal_phy_reg = true; ret = clk_get_by_index(dev, 0, &clk); @@ -1145,7 +1158,7 @@ static int arasan_sdhci_probe(struct udevice *dev) host->quirks |= SDHCI_QUIRK_NO_1_8_V; if (CONFIG_IS_ENABLED(ARCH_VERSAL_NET) && - device_is_compatible(dev, "xlnx,versal-net-emmc")) + arasan_sdhci_is_compatible(dev, SDHCI_COMPATIBLE_VERSAL_NET_EMMC)) host->quirks |= SDHCI_QUIRK_CAPS_BIT63_FOR_HS400; plat->cfg.f_max = CONFIG_ZYNQ_SDHCI_MAX_FREQ; @@ -1228,8 +1241,8 @@ static int arasan_sdhci_bind(struct udevice *dev) } static const struct udevice_id arasan_sdhci_ids[] = { - { .compatible = "arasan,sdhci-8.9a" }, - { .compatible = "xlnx,versal-net-emmc" }, + { .compatible = "arasan,sdhci-8.9a", .data = SDHCI_COMPATIBLE_SDHCI_89A }, + { .compatible = "xlnx,versal-net-emmc", .data = SDHCI_COMPATIBLE_VERSAL_NET_EMMC }, { } }; diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index fe7d1084450..461805ae53f 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -228,7 +228,6 @@ struct zynq_gem_priv { struct clk tx_clk; struct clk pclk; u32 max_speed; - bool int_pcs; bool dma_64bit; u32 clk_en_info; struct reset_ctl_bulk resets; @@ -504,8 +503,7 @@ static int zynq_gem_init(struct udevice *dev) * Set SGMII enable PCS selection only if internal PCS/PMA * core is used and interface is SGMII. */ - if (priv->interface == PHY_INTERFACE_MODE_SGMII && - priv->int_pcs) { + if (priv->interface == PHY_INTERFACE_MODE_SGMII) { nwconfig |= ZYNQ_GEM_NWCFG_SGMII_ENBL | ZYNQ_GEM_NWCFG_PCS_SEL; } @@ -529,8 +527,7 @@ static int zynq_gem_init(struct udevice *dev) writel(nwcfg, ®s->nwcfg); #ifdef CONFIG_ARM64 - if (priv->interface == PHY_INTERFACE_MODE_SGMII && - priv->int_pcs) { + if (priv->interface == PHY_INTERFACE_MODE_SGMII) { /* * Disable AN for fixed link configuration, enable otherwise. * Must be written after PCS_SEL is set in nwconfig, @@ -992,8 +989,6 @@ static int zynq_gem_of_to_plat(struct udevice *dev) return -EINVAL; priv->interface = pdata->phy_interface; - priv->int_pcs = dev_read_bool(dev, "is-internal-pcspma"); - priv->clk_en_info = dev_get_driver_data(dev); return 0; diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include index 62e0207f91b..5daceb26061 100644 --- a/scripts/Kbuild.include +++ b/scripts/Kbuild.include @@ -32,6 +32,10 @@ baseprereq = $(basename $(notdir $<)) escsq = $(subst $(squote),'\$(squote)',$1) ### +# real prerequisites without phony targets +real-prereqs = $(filter-out $(PHONY), $^) + +### # Easy method for doing a status message kecho := : quiet_kecho := echo diff --git a/scripts/Makefile.build b/scripts/Makefile.build index 99cc29595b4..90aed148c44 100644 --- a/scripts/Makefile.build +++ b/scripts/Makefile.build @@ -293,6 +293,7 @@ $(obj)/%.o: $(src)/%.S FORCE targets += $(real-objs-y) $(real-objs-m) $(lib-y) targets += $(extra-y) $(MAKECMDGOALS) $(always) +targets += $(real-dtb-y) $(lib-y) $(always-y) # Linker scripts preprocessor (.lds.S -> .lds) # --------------------------------------------------------------------------- diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index 5dfb4b6e46f..54403040f00 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -47,6 +47,13 @@ obj-m := $(filter-out %/, $(obj-m)) subdir-ym := $(sort $(subdir-y) $(subdir-m)) +# Expand $(foo-objs) $(foo-y) etc. by replacing their individuals +suffix-search = $(strip $(foreach s, $3, $($(1:%$(strip $2)=%$s)))) +# List composite targets that are constructed by combining other targets +multi-search = $(sort $(foreach m, $1, $(if $(call suffix-search, $m, $2, $3 -), $m))) +# List primitive targets that are compiled from source files +real-search = $(foreach m, $1, $(if $(call suffix-search, $m, $2, $3 -), $(call suffix-search, $m, $2, $3), $m)) + # if $(foo-objs) exists, foo.o is a composite object multi-used-y := $(sort $(foreach m,$(obj-y), $(if $(strip $($(m:.o=-objs)) $($(m:.o=-y))), $(m)))) multi-used-m := $(sort $(foreach m,$(obj-m), $(if $(strip $($(m:.o=-objs)) $($(m:.o=-y))), $(m)))) @@ -58,6 +65,13 @@ single-used-m := $(sort $(filter-out $(multi-used-m),$(obj-m))) multi-objs-y := $(foreach m, $(multi-used-y), $($(m:.o=-objs)) $($(m:.o=-y))) multi-objs-m := $(foreach m, $(multi-used-m), $($(m:.o=-objs)) $($(m:.o=-y))) +# Composite DTB (i.e. DTB constructed by overlay) +multi-dtb-y := $(call multi-search, $(dtb-y), .dtb, -dtbs) +# Primitive DTB compiled from *.dts +real-dtb-y := $(call real-search, $(dtb-y), .dtb, -dtbs) +# Base DTB that overlay is applied onto (each first word of $(*-dtbs) expansion) +base-dtb-y := $(foreach m, $(multi-dtb-y), $(firstword $(call suffix-search, $m, .dtb, -dtbs))) + # $(subdir-obj-y) is the list of objects in $(obj-y) which uses dir/ to # tell kbuild to descend subdir-obj-y := $(filter %/built-in.o, $(obj-y)) @@ -69,6 +83,7 @@ real-objs-m := $(foreach m, $(obj-m), $(if $(strip $($(m:.o=-objs)) $($(m:.o=-y) # Add subdir path extra-y := $(addprefix $(obj)/,$(extra-y)) +always-y := $(addprefix $(obj)/,$(always-y)) always := $(addprefix $(obj)/,$(always)) targets := $(addprefix $(obj)/,$(targets)) modorder := $(addprefix $(obj)/,$(modorder)) @@ -83,6 +98,8 @@ multi-used-y := $(addprefix $(obj)/,$(multi-used-y)) multi-used-m := $(addprefix $(obj)/,$(multi-used-m)) multi-objs-y := $(addprefix $(obj)/,$(multi-objs-y)) multi-objs-m := $(addprefix $(obj)/,$(multi-objs-m)) +multi-dtb-y := $(addprefix $(obj)/,$(multi-dtb-y)) +real-dtb-y := $(addprefix $(obj)/,$(real-dtb-y)) subdir-ym := $(addprefix $(obj)/,$(subdir-ym)) # These flags are needed for modversions and compiling, so we define them here @@ -301,6 +318,9 @@ endif DTC_FLAGS += $(DTC_FLAGS_$(basetarget)) +# Set -@ if the target is a base DTB that overlay is applied onto +DTC_FLAGS += $(if $(filter $(patsubst $(obj)/%,%,$@), $(base-dtb-y)), -@) + # Generate an assembly file to wrap the output of the device tree compiler quiet_cmd_dt_S_dtb= DTBS $@ # Modified for U-Boot @@ -422,6 +442,13 @@ cmd_dtco = mkdir -p $(dir ${dtc-tmp}) ; \ $(obj)/%.dtbo: $(src)/%.dtso $(DTC) FORCE $(call if_changed_dep,dtco) +quiet_cmd_fdtoverlay = DTOVL $@ + cmd_fdtoverlay = fdtoverlay -o $@ -i $(real-prereqs) + +$(multi-dtb-y): FORCE + $(call if_changed,fdtoverlay) +$(call multi_depend, $(multi-dtb-y), .dtb, -dtbs) + # Fonts # --------------------------------------------------------------------------- |