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-rw-r--r--.travis.yml13
-rw-r--r--MAINTAINERS5
-rw-r--r--Makefile7
-rw-r--r--arch/arm/dts/r8a7794-alt-u-boot.dts5
-rw-r--r--arch/arm/mach-rockchip/boot_mode.c8
-rw-r--r--board/renesas/alt/Kconfig9
-rw-r--r--board/renesas/alt/alt.c5
-rw-r--r--board/renesas/gose/gose.c2
-rw-r--r--board/renesas/koelsch/koelsch.c2
-rw-r--r--board/renesas/lager/lager.c2
-rw-r--r--board/renesas/porter/porter.c2
-rw-r--r--board/renesas/silk/silk.c2
-rw-r--r--board/renesas/stout/stout.c2
-rw-r--r--configs/alt_defconfig3
-rw-r--r--configs/khadas-vim2_defconfig3
-rw-r--r--doc/README.generic_usb_ohci2
-rw-r--r--drivers/clk/sunxi/clk_a10.c2
-rw-r--r--drivers/phy/Kconfig2
-rw-r--r--drivers/pinctrl/rockchip/pinctrl-rk3288.c17
-rw-r--r--drivers/pinctrl/rockchip/pinctrl-rockchip-core.c39
-rw-r--r--drivers/pinctrl/rockchip/pinctrl-rockchip.h33
-rw-r--r--drivers/video/sunxi/sunxi_dw_hdmi.c62
-rw-r--r--include/configs/rcar-gen2-common.h1
-rw-r--r--lib/bch.c9
-rw-r--r--tools/Makefile3
25 files changed, 167 insertions, 73 deletions
diff --git a/.travis.yml b/.travis.yml
index 834502fc8c1..eb531f1e5b7 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -163,13 +163,16 @@ matrix:
- name: "buildman arm11 arm7 arm920t arm946es"
env:
- BUILDMAN="arm11 arm7 arm920t arm946es"
- - name: "buildman arm926ejs (non-NXP,siemens,atmel,kirkwood,spear)"
+ - name: "buildman arm926ejs (non-NXP,siemens,at91,kirkwood,spear)"
env:
- JOB="arm926ejs"
- BUILDMAN="arm926ejs -x freescale,siemens,atmel,kirkwood,spear,omap"
- - name: "buildman atmel"
+ BUILDMAN="arm926ejs -x freescale,siemens,at91,kirkwood,spear,omap"
+ - name: "buildman at91 (non arm v7)"
env:
- - BUILDMAN="atmel"
+ - BUILDMAN="at91 -x armv7"
+ - name: "buildman at91 (non arm926ejs)"
+ env:
+ - BUILDMAN="at91 -x arm926ejs"
- name: "buildman boundary engicam toradex"
env:
- BUILDMAN="boundary engicam toradex"
@@ -226,7 +229,7 @@ matrix:
- BUILDMAN="sun50i"
- name: "buildman catch-all ARM"
env:
- - BUILDMAN="arm -x arm11,arm7,arm9,aarch64,atmel,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap,pxa,rockchip,toradex,socfpga,k2,xilinx"
+ - BUILDMAN="arm -x arm11,arm7,arm9,aarch64,at91,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap,pxa,rockchip,toradex,socfpga,k2,xilinx"
- name: "buildman sandbox x86"
env:
- BUILDMAN="sandbox x86"
diff --git a/MAINTAINERS b/MAINTAINERS
index 3166ec74f0c..f9ee4281d94 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -439,6 +439,11 @@ DFU
M: Lukasz Majewski <lukma@denx.de>
S: Maintained
T: git git://git.denx.de/u-boot-dfu.git
+F: cmd/dfu.c
+F: cmd/usb_*.c
+F: common/dfu.c
+F: common/update.c
+F: common/usb_storage.c
F: drivers/dfu/
F: drivers/usb/gadget/
diff --git a/Makefile b/Makefile
index c1af9307b38..92e04dd6898 100644
--- a/Makefile
+++ b/Makefile
@@ -291,6 +291,9 @@ DARWIN_MINOR_VERSION = $(shell sw_vers -productVersion | cut -f 2 -d '.')
os_x_before = $(shell if [ $(DARWIN_MAJOR_VERSION) -le $(1) -a \
$(DARWIN_MINOR_VERSION) -le $(2) ] ; then echo "$(3)"; else echo "$(4)"; fi ;)
+os_x_after = $(shell if [ $(DARWIN_MAJOR_VERSION) -ge $(1) -a \
+ $(DARWIN_MINOR_VERSION) -ge $(2) ] ; then echo "$(3)"; else echo "$(4)"; fi ;)
+
# Snow Leopards build environment has no longer restrictions as described above
HOSTCC = $(call os_x_before, 10, 5, "cc", "gcc")
HOSTCFLAGS += $(call os_x_before, 10, 4, "-traditional-cpp")
@@ -300,6 +303,10 @@ HOSTLDFLAGS += $(call os_x_before, 10, 5, "-multiply_defined suppress")
# in some host tools which is a problem then ... so disable ASLR for these
# tools
HOSTLDFLAGS += $(call os_x_before, 10, 7, "", "-Xlinker -no_pie")
+
+# macOS Mojave (10.14.X)
+# Undefined symbols for architecture x86_64: "_PyArg_ParseTuple"
+HOSTLDFLAGS += $(call os_x_after, 10, 14, "-lpython -dynamclib", "")
endif
# Decide whether to build built-in, modular, or both.
diff --git a/arch/arm/dts/r8a7794-alt-u-boot.dts b/arch/arm/dts/r8a7794-alt-u-boot.dts
index 593a418c3b1..14cd39297e6 100644
--- a/arch/arm/dts/r8a7794-alt-u-boot.dts
+++ b/arch/arm/dts/r8a7794-alt-u-boot.dts
@@ -8,6 +8,11 @@
#include "r8a7794-alt.dts"
#include "r8a7794-u-boot.dtsi"
+&i2c7 {
+ status = "okay";
+ clock-frequency = <100000>;
+};
+
&scif2 {
u-boot,dm-pre-reloc;
};
diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index d7997d71e30..f32b3c4ce56 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -61,13 +61,7 @@ int setup_boot_mode(void)
void *reg = (void *)CONFIG_ROCKCHIP_BOOT_MODE_REG;
int boot_mode = readl(reg);
- /*
- * This should be handled using a driver-tree property and a suitable
- * driver which can read the appropriate settings. As it is, this
- * breaks chromebook_minnie.\
- *
- * rockchip_dnl_mode_check();
- */
+ rockchip_dnl_mode_check();
boot_mode = readl(reg);
debug("%s: boot mode 0x%08x\n", __func__, boot_mode);
diff --git a/board/renesas/alt/Kconfig b/board/renesas/alt/Kconfig
index 39d53c185b2..957962de20e 100644
--- a/board/renesas/alt/Kconfig
+++ b/board/renesas/alt/Kconfig
@@ -9,13 +9,4 @@ config SYS_VENDOR
config SYS_CONFIG_NAME
default "alt"
-config R8A7794_ETHERNET_B
- bool "Use ethernet B function"
- depends on TARGET_ALT
- default n
- help
- ALT board can use default ethernet and etnernet B function.
- This config set pin function of ethenet B. You also needt to change
- DIP switch of board in order to use this function.
-
endif
diff --git a/board/renesas/alt/alt.c b/board/renesas/alt/alt.c
index b18ab7ce887..0726776a573 100644
--- a/board/renesas/alt/alt.c
+++ b/board/renesas/alt/alt.c
@@ -28,7 +28,6 @@
DECLARE_GLOBAL_DATA_PTR;
-#define CLK2MHZ(clk) (clk / 1000 / 1000)
void s_init(void)
{
struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE;
@@ -93,7 +92,7 @@ int dram_init_banksize(void)
/* KSZ8041RNLI */
#define PHY_CONTROL1 0x1E
-#define PHY_LED_MODE 0xC0000
+#define PHY_LED_MODE 0xC000
#define PHY_LED_MODE_ACK 0x4000
int board_phy_config(struct phy_device *phydev)
{
@@ -108,7 +107,7 @@ int board_phy_config(struct phy_device *phydev)
void reset_cpu(ulong addr)
{
struct udevice *dev;
- const u8 pmic_bus = 1;
+ const u8 pmic_bus = 7;
const u8 pmic_addr = 0x58;
u8 data;
int ret;
diff --git a/board/renesas/gose/gose.c b/board/renesas/gose/gose.c
index 282381ede56..7c610087395 100644
--- a/board/renesas/gose/gose.c
+++ b/board/renesas/gose/gose.c
@@ -98,7 +98,7 @@ int dram_init_banksize(void)
/* KSZ8041RNLI */
#define PHY_CONTROL1 0x1E
-#define PHY_LED_MODE 0xC0000
+#define PHY_LED_MODE 0xC000
#define PHY_LED_MODE_ACK 0x4000
int board_phy_config(struct phy_device *phydev)
{
diff --git a/board/renesas/koelsch/koelsch.c b/board/renesas/koelsch/koelsch.c
index 52f37c970e7..d07a7ca2aba 100644
--- a/board/renesas/koelsch/koelsch.c
+++ b/board/renesas/koelsch/koelsch.c
@@ -100,7 +100,7 @@ int dram_init_banksize(void)
/* Koelsch has KSZ8041NL/RNL */
#define PHY_CONTROL1 0x1E
-#define PHY_LED_MODE 0xC0000
+#define PHY_LED_MODE 0xC000
#define PHY_LED_MODE_ACK 0x4000
int board_phy_config(struct phy_device *phydev)
{
diff --git a/board/renesas/lager/lager.c b/board/renesas/lager/lager.c
index 062e88c1983..f062bb01725 100644
--- a/board/renesas/lager/lager.c
+++ b/board/renesas/lager/lager.c
@@ -109,7 +109,7 @@ int dram_init_banksize(void)
/* KSZ8041NL/RNL */
#define PHY_CONTROL1 0x1E
-#define PHY_LED_MODE 0xC0000
+#define PHY_LED_MODE 0xC000
#define PHY_LED_MODE_ACK 0x4000
int board_phy_config(struct phy_device *phydev)
{
diff --git a/board/renesas/porter/porter.c b/board/renesas/porter/porter.c
index 663b8001ef6..2e15a4cbbdc 100644
--- a/board/renesas/porter/porter.c
+++ b/board/renesas/porter/porter.c
@@ -98,7 +98,7 @@ int dram_init_banksize(void)
/* porter has KSZ8041RNLI */
#define PHY_CONTROL1 0x1E
-#define PHY_LED_MODE 0xC0000
+#define PHY_LED_MODE 0xC000
#define PHY_LED_MODE_ACK 0x4000
int board_phy_config(struct phy_device *phydev)
{
diff --git a/board/renesas/silk/silk.c b/board/renesas/silk/silk.c
index 966c0717b24..59ba262ad73 100644
--- a/board/renesas/silk/silk.c
+++ b/board/renesas/silk/silk.c
@@ -93,7 +93,7 @@ int dram_init_banksize(void)
/* porter has KSZ8041RNLI */
#define PHY_CONTROL1 0x1E
-#define PHY_LED_MODE 0xC0000
+#define PHY_LED_MODE 0xC000
#define PHY_LED_MODE_ACK 0x4000
int board_phy_config(struct phy_device *phydev)
{
diff --git a/board/renesas/stout/stout.c b/board/renesas/stout/stout.c
index 85e30db635f..7c515950d67 100644
--- a/board/renesas/stout/stout.c
+++ b/board/renesas/stout/stout.c
@@ -112,7 +112,7 @@ int dram_init_banksize(void)
/* Stout has KSZ8041NL/RNL */
#define PHY_CONTROL1 0x1E
-#define PHY_LED_MODE 0xC0000
+#define PHY_LED_MODE 0xC000
#define PHY_LED_MODE_ACK 0x4000
int board_phy_config(struct phy_device *phydev)
{
diff --git a/configs/alt_defconfig b/configs/alt_defconfig
index c4ece795073..5e5467fe2f7 100644
--- a/configs/alt_defconfig
+++ b/configs/alt_defconfig
@@ -57,12 +57,14 @@ CONFIG_CLK_RENESAS=y
CONFIG_DM_GPIO=y
CONFIG_RCAR_GPIO=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_RCAR_I2C=y
CONFIG_SYS_I2C_RCAR_IIC=y
CONFIG_DM_MMC=y
CONFIG_SH_MMCIF=y
CONFIG_RENESAS_SDHI=y
CONFIG_MTD=y
CONFIG_MTD_DEVICE=y
+CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_MTD=y
@@ -80,6 +82,7 @@ CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SCIF_CONSOLE=y
CONFIG_SPI=y
+CONFIG_DM_SPI=y
CONFIG_SH_QSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
diff --git a/configs/khadas-vim2_defconfig b/configs/khadas-vim2_defconfig
index 0f738cbb908..080dd19590e 100644
--- a/configs/khadas-vim2_defconfig
+++ b/configs/khadas-vim2_defconfig
@@ -6,8 +6,10 @@ CONFIG_DEBUG_UART_BASE=0xc81004c0
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_IDENT_STRING=" khadas-vim2"
CONFIG_DEBUG_UART=y
+CONFIG_NR_DRAM_BANKS=1
CONFIG_OF_BOARD_SETUP=y
CONFIG_CONSOLE_MUX=y
+CONFIG_MISC_INIT_R=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
# CONFIG_CMD_BDI is not set
@@ -30,6 +32,7 @@ CONFIG_MTD=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_PHY=y
+CONFIG_MESON_GXL_USB_PHY=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_MESON_GXL=y
CONFIG_DM_REGULATOR_FIXED=y
diff --git a/doc/README.generic_usb_ohci b/doc/README.generic_usb_ohci
index 61300c35758..65b0896c7fd 100644
--- a/doc/README.generic_usb_ohci
+++ b/doc/README.generic_usb_ohci
@@ -13,7 +13,7 @@ Configuration options
CONFIG_SYS_USB_OHCI_BOARD_INIT: call the board dependant hooks:
- - extern int usb_board_init(void);
+ - extern int board_usb_init(void);
- extern int usb_board_stop(void);
- extern int usb_cpu_init_fail(void);
diff --git a/drivers/clk/sunxi/clk_a10.c b/drivers/clk/sunxi/clk_a10.c
index 15ffe5ecb35..7a96d1708ea 100644
--- a/drivers/clk/sunxi/clk_a10.c
+++ b/drivers/clk/sunxi/clk_a10.c
@@ -28,6 +28,8 @@ static struct ccu_clk_gate a10_gates[] = {
[CLK_AHB_SPI2] = GATE(0x060, BIT(22)),
[CLK_AHB_SPI3] = GATE(0x060, BIT(23)),
+ [CLK_AHB_GMAC] = GATE(0x064, BIT(17)),
+
[CLK_APB1_UART0] = GATE(0x06c, BIT(16)),
[CLK_APB1_UART1] = GATE(0x06c, BIT(17)),
[CLK_APB1_UART2] = GATE(0x06c, BIT(18)),
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 825ee7c3beb..32bbf41dd1f 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -141,7 +141,7 @@ config PHY_STM32_USBPHYC
config MESON_GXL_USB_PHY
bool "Amlogic Meson GXL USB PHYs"
- depends on PHY && ARCH_MESON && MESON_GXL
+ depends on PHY && ARCH_MESON && (MESON_GXL || MESON_GXM)
imply REGMAP
help
This is the generic phy driver for the Amlogic Meson GXL
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
index 60585f32085..8b6ce11a63b 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
@@ -92,10 +92,19 @@ static void rk3288_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
}
static struct rockchip_pin_bank rk3288_pin_banks[] = {
- PIN_BANK_IOMUX_FLAGS(0, 24, "gpio0", IOMUX_SOURCE_PMU,
- IOMUX_SOURCE_PMU,
- IOMUX_SOURCE_PMU,
- IOMUX_UNROUTED
+ PIN_BANK_IOMUX_DRV_PULL_FLAGS(0, 24, "gpio0",
+ IOMUX_SOURCE_PMU | IOMUX_WRITABLE_32BIT,
+ IOMUX_SOURCE_PMU | IOMUX_WRITABLE_32BIT,
+ IOMUX_SOURCE_PMU | IOMUX_WRITABLE_32BIT,
+ IOMUX_UNROUTED,
+ DRV_TYPE_WRITABLE_32BIT,
+ DRV_TYPE_WRITABLE_32BIT,
+ DRV_TYPE_WRITABLE_32BIT,
+ 0,
+ PULL_TYPE_WRITABLE_32BIT,
+ PULL_TYPE_WRITABLE_32BIT,
+ PULL_TYPE_WRITABLE_32BIT,
+ 0
),
PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", IOMUX_UNROUTED,
IOMUX_UNROUTED,
diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
index b84b0790641..ce935656f06 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
@@ -228,7 +228,13 @@ static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
}
}
- data = (mask << (bit + 16));
+ if (mux_type & IOMUX_WRITABLE_32BIT) {
+ regmap_read(regmap, reg, &data);
+ data &= ~(mask << bit);
+ } else {
+ data = (mask << (bit + 16));
+ }
+
data |= (mux & mask) << bit;
ret = regmap_write(regmap, reg, data);
@@ -252,7 +258,8 @@ static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank,
int reg, ret, i;
u32 data, rmask_bits, temp;
u8 bit;
- int drv_type = bank->drv[pin_num / 8].drv_type;
+ /* Where need to clean the special mask for rockchip_perpin_drv_list */
+ int drv_type = bank->drv[pin_num / 8].drv_type & (~DRV_TYPE_IO_MASK);
debug("setting drive of GPIO%d-%d to %d\n", bank->bank_num,
pin_num, strength);
@@ -324,10 +331,15 @@ static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank,
return -EINVAL;
}
- /* enable the write to the equivalent lower bits */
- data = ((1 << rmask_bits) - 1) << (bit + 16);
- data |= (ret << bit);
+ if (bank->drv[pin_num / 8].drv_type & DRV_TYPE_WRITABLE_32BIT) {
+ regmap_read(regmap, reg, &data);
+ data &= ~(((1 << rmask_bits) - 1) << bit);
+ } else {
+ /* enable the write to the equivalent lower bits */
+ data = ((1 << rmask_bits) - 1) << (bit + 16);
+ }
+ data |= (ret << bit);
ret = regmap_write(regmap, reg, data);
return ret;
}
@@ -375,7 +387,11 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
case RK3288:
case RK3368:
case RK3399:
- pull_type = bank->pull_type[pin_num / 8];
+ /*
+ * Where need to clean the special mask for
+ * rockchip_pull_list.
+ */
+ pull_type = bank->pull_type[pin_num / 8] & (~PULL_TYPE_IO_MASK);
ret = -EINVAL;
for (i = 0; i < ARRAY_SIZE(rockchip_pull_list[pull_type]);
i++) {
@@ -390,10 +406,15 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
return ret;
}
- /* enable the write to the equivalent lower bits */
- data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
- data |= (ret << bit);
+ if (bank->pull_type[pin_num / 8] & PULL_TYPE_WRITABLE_32BIT) {
+ regmap_read(regmap, reg, &data);
+ data &= ~(((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << bit);
+ } else {
+ /* enable the write to the equivalent lower bits */
+ data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16);
+ }
+ data |= (ret << bit);
ret = regmap_write(regmap, reg, data);
break;
default:
diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip.h b/drivers/pinctrl/rockchip/pinctrl-rockchip.h
index bc809630c19..5a6849c9964 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip.h
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip.h
@@ -26,6 +26,7 @@ enum rockchip_pinctrl_type {
#define IOMUX_SOURCE_PMU BIT(2)
#define IOMUX_UNROUTED BIT(3)
#define IOMUX_WIDTH_3BIT BIT(4)
+#define IOMUX_WRITABLE_32BIT BIT(5)
/**
* Defined some common pins constants
@@ -49,6 +50,9 @@ struct rockchip_iomux {
int offset;
};
+#define DRV_TYPE_IO_MASK GENMASK(31, 16)
+#define DRV_TYPE_WRITABLE_32BIT BIT(31)
+
/**
* enum type index corresponding to rockchip_perpin_drv_list arrays index.
*/
@@ -61,6 +65,9 @@ enum rockchip_pin_drv_type {
DRV_TYPE_MAX
};
+#define PULL_TYPE_IO_MASK GENMASK(31, 16)
+#define PULL_TYPE_WRITABLE_32BIT BIT(31)
+
/**
* enum type index corresponding to rockchip_pull_list arrays index.
*/
@@ -200,6 +207,32 @@ struct rockchip_pin_bank {
}, \
}
+#define PIN_BANK_IOMUX_DRV_PULL_FLAGS(id, pins, label, iom0, iom1, \
+ iom2, iom3, drv0, drv1, drv2, \
+ drv3, pull0, pull1, pull2, \
+ pull3) \
+ { \
+ .bank_num = id, \
+ .nr_pins = pins, \
+ .name = label, \
+ .iomux = { \
+ { .type = iom0, .offset = -1 }, \
+ { .type = iom1, .offset = -1 }, \
+ { .type = iom2, .offset = -1 }, \
+ { .type = iom3, .offset = -1 }, \
+ }, \
+ .drv = { \
+ { .drv_type = drv0, .offset = -1 }, \
+ { .drv_type = drv1, .offset = -1 }, \
+ { .drv_type = drv2, .offset = -1 }, \
+ { .drv_type = drv3, .offset = -1 }, \
+ }, \
+ .pull_type[0] = pull0, \
+ .pull_type[1] = pull1, \
+ .pull_type[2] = pull2, \
+ .pull_type[3] = pull3, \
+ }
+
#define PIN_BANK_IOMUX_FLAGS_DRV_FLAGS_OFFSET_PULL_FLAGS(id, pins, \
label, iom0, iom1, iom2, \
iom3, drv0, drv1, drv2, \
diff --git a/drivers/video/sunxi/sunxi_dw_hdmi.c b/drivers/video/sunxi/sunxi_dw_hdmi.c
index 9dbea649a0f..6fe1aa7ee46 100644
--- a/drivers/video/sunxi/sunxi_dw_hdmi.c
+++ b/drivers/video/sunxi/sunxi_dw_hdmi.c
@@ -132,7 +132,7 @@ static int sunxi_dw_hdmi_wait_for_hpd(void)
return -1;
}
-static void sunxi_dw_hdmi_phy_set(uint clock)
+static void sunxi_dw_hdmi_phy_set(uint clock, int phy_div)
{
struct sunxi_hdmi_phy * const phy =
(struct sunxi_hdmi_phy *)(SUNXI_HDMI_BASE + HDMI_PHY_OFFS);
@@ -146,7 +146,7 @@ static void sunxi_dw_hdmi_phy_set(uint clock)
switch (div) {
case 1:
writel(0x30dc5fc0, &phy->pll);
- writel(0x800863C0, &phy->clk);
+ writel(0x800863C0 | (phy_div - 1), &phy->clk);
mdelay(10);
writel(0x00000001, &phy->unk3);
setbits_le32(&phy->pll, BIT(25));
@@ -164,7 +164,7 @@ static void sunxi_dw_hdmi_phy_set(uint clock)
break;
case 2:
writel(0x39dc5040, &phy->pll);
- writel(0x80084381, &phy->clk);
+ writel(0x80084380 | (phy_div - 1), &phy->clk);
mdelay(10);
writel(0x00000001, &phy->unk3);
setbits_le32(&phy->pll, BIT(25));
@@ -178,7 +178,7 @@ static void sunxi_dw_hdmi_phy_set(uint clock)
break;
case 4:
writel(0x39dc5040, &phy->pll);
- writel(0x80084343, &phy->clk);
+ writel(0x80084340 | (phy_div - 1), &phy->clk);
mdelay(10);
writel(0x00000001, &phy->unk3);
setbits_le32(&phy->pll, BIT(25));
@@ -192,7 +192,7 @@ static void sunxi_dw_hdmi_phy_set(uint clock)
break;
case 11:
writel(0x39dc5040, &phy->pll);
- writel(0x8008430a, &phy->clk);
+ writel(0x80084300 | (phy_div - 1), &phy->clk);
mdelay(10);
writel(0x00000001, &phy->unk3);
setbits_le32(&phy->pll, BIT(25));
@@ -207,36 +207,46 @@ static void sunxi_dw_hdmi_phy_set(uint clock)
}
}
-static void sunxi_dw_hdmi_pll_set(uint clk_khz)
+static void sunxi_dw_hdmi_pll_set(uint clk_khz, int *phy_div)
{
- int value, n, m, div = 0, diff;
- int best_n = 0, best_m = 0, best_diff = 0x0FFFFFFF;
-
- div = sunxi_dw_hdmi_get_divider(clk_khz * 1000);
+ int value, n, m, div, diff;
+ int best_n = 0, best_m = 0, best_div = 0, best_diff = 0x0FFFFFFF;
/*
* Find the lowest divider resulting in a matching clock. If there
* is no match, pick the closest lower clock, as monitors tend to
* not sync to higher frequencies.
*/
- for (m = 1; m <= 16; m++) {
- n = (m * div * clk_khz) / 24000;
-
- if ((n >= 1) && (n <= 128)) {
- value = (24000 * n) / m / div;
- diff = clk_khz - value;
- if (diff < best_diff) {
- best_diff = diff;
- best_m = m;
- best_n = n;
+ for (div = 1; div <= 16; div++) {
+ int target = clk_khz * div;
+
+ if (target < 192000)
+ continue;
+ if (target > 912000)
+ continue;
+
+ for (m = 1; m <= 16; m++) {
+ n = (m * target) / 24000;
+
+ if (n >= 1 && n <= 128) {
+ value = (24000 * n) / m / div;
+ diff = clk_khz - value;
+ if (diff < best_diff) {
+ best_diff = diff;
+ best_m = m;
+ best_n = n;
+ best_div = div;
+ }
}
}
}
+ *phy_div = best_div;
+
clock_set_pll3_factors(best_m, best_n);
debug("dotclock: %dkHz = %dkHz: (24MHz * %d) / %d / %d\n",
- clk_khz, (clock_get_pll3() / 1000) / div,
- best_n, best_m, div);
+ clk_khz, (clock_get_pll3() / 1000) / best_div,
+ best_n, best_m, best_div);
}
static void sunxi_dw_hdmi_lcdc_init(int mux, const struct display_timing *edid,
@@ -244,7 +254,7 @@ static void sunxi_dw_hdmi_lcdc_init(int mux, const struct display_timing *edid,
{
struct sunxi_ccm_reg * const ccm =
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
- int div = sunxi_dw_hdmi_get_divider(edid->pixelclock.typ);
+ int div = clock_get_pll3() / edid->pixelclock.typ;
struct sunxi_lcdc_reg *lcdc;
if (mux == 0) {
@@ -276,8 +286,10 @@ static void sunxi_dw_hdmi_lcdc_init(int mux, const struct display_timing *edid,
static int sunxi_dw_hdmi_phy_cfg(struct dw_hdmi *hdmi, uint mpixelclock)
{
- sunxi_dw_hdmi_pll_set(mpixelclock/1000);
- sunxi_dw_hdmi_phy_set(mpixelclock);
+ int phy_div;
+
+ sunxi_dw_hdmi_pll_set(mpixelclock / 1000, &phy_div);
+ sunxi_dw_hdmi_phy_set(mpixelclock, phy_div);
return 0;
}
diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h
index 9213d33e217..7f72ff2e110 100644
--- a/include/configs/rcar-gen2-common.h
+++ b/include/configs/rcar-gen2-common.h
@@ -38,7 +38,6 @@
#define CONFIG_SYS_MONITOR_BASE 0x00000000
#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
-#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
/* ENV setting */
#define CONFIG_ENV_ADDR 0xC0000
diff --git a/lib/bch.c b/lib/bch.c
index 20079eb9ebd..c4fac77d611 100644
--- a/lib/bch.c
+++ b/lib/bch.c
@@ -62,6 +62,9 @@
#include <errno.h>
#if defined(__FreeBSD__)
#include <sys/endian.h>
+#elif defined(__APPLE__)
+#include <machine/endian.h>
+#include <libkern/OSByteOrder.h>
#else
#include <endian.h>
#endif
@@ -70,7 +73,11 @@
#include <string.h>
#undef cpu_to_be32
+#if defined(__APPLE__)
+#define cpu_to_be32 OSSwapHostToBigInt32
+#else
#define cpu_to_be32 htobe32
+#endif
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
#define kmalloc(size, flags) malloc(size)
#define kzalloc(size, flags) calloc(1, size)
@@ -116,7 +123,7 @@ struct gf_poly_deg1 {
};
#ifdef USE_HOSTCC
-#if !defined(__DragonFly__) && !defined(__FreeBSD__)
+#if !defined(__DragonFly__) && !defined(__FreeBSD__) && !defined(__APPLE__)
static int fls(int x)
{
int r = 32;
diff --git a/tools/Makefile b/tools/Makefile
index 081383d7a79..d377d85f74e 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -254,7 +254,8 @@ HOST_EXTRACFLAGS += -include $(srctree)/include/compiler.h \
-I$(srctree)/tools \
-DUSE_HOSTCC \
-D__KERNEL_STRICT_NAMES \
- -D_GNU_SOURCE
+ -D_GNU_SOURCE \
+ -std=gnu99
__build: $(LOGO-y)
generated by cgit v1.2.3 (git 2.0.4) at 2025-07-24 20:09:14 +0000