diff options
155 files changed, 2013 insertions, 457 deletions
@@ -5,7 +5,7 @@ VERSION = 2017 PATCHLEVEL = 11 SUBLEVEL = -EXTRAVERSION = -rc3 +EXTRAVERSION = -rc4 NAME = # *DOCUMENTATION* diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 83b7aa51dc2..30e71b25696 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -341,17 +341,6 @@ config TARGET_WORK_92105 select CPU_ARM926EJS select SUPPORT_SPL -config TARGET_MX25PDK - bool "Support mx25pdk" - select BOARD_LATE_INIT - select CPU_ARM926EJS - select BOARD_EARLY_INIT_F - -config TARGET_ZMX25 - bool "Support zmx25" - select BOARD_LATE_INIT - select CPU_ARM926EJS - config TARGET_APF27 bool "Support apf27" select CPU_ARM926EJS @@ -599,6 +588,10 @@ config ARCH_MESON targeted at media players and tablet computers. We currently support the S905 (GXBaby) 64-bit SoC. +config ARCH_MX25 + bool "NXP MX25" + select CPU_ARM926EJS + config ARCH_MX7ULP bool "NXP MX7ULP" select CPU_V7 @@ -1162,6 +1155,8 @@ source "arch/arm/mach-mvebu/Kconfig" source "arch/arm/cpu/armv7/ls102xa/Kconfig" +source "arch/arm/mach-imx/mx2/Kconfig" + source "arch/arm/mach-imx/mx7ulp/Kconfig" source "arch/arm/mach-imx/mx7/Kconfig" @@ -1244,7 +1239,6 @@ source "board/freescale/ls1012aqds/Kconfig" source "board/freescale/ls1012ardb/Kconfig" source "board/freescale/ls1012afrdm/Kconfig" source "board/freescale/mx23evk/Kconfig" -source "board/freescale/mx25pdk/Kconfig" source "board/freescale/mx28evk/Kconfig" source "board/freescale/mx31ads/Kconfig" source "board/freescale/mx31pdk/Kconfig" @@ -1270,7 +1264,6 @@ source "board/spear/spear320/Kconfig" source "board/spear/spear600/Kconfig" source "board/spear/x600/Kconfig" source "board/st/stv0991/Kconfig" -source "board/syteco/zmx25/Kconfig" source "board/tcl/sl50/Kconfig" source "board/birdland/bav335x/Kconfig" source "board/timll/devkit3250/Kconfig" diff --git a/arch/arm/cpu/armv7/stv0991/Makefile b/arch/arm/cpu/armv7/stv0991/Makefile index 95641d345fc..046b2407908 100644 --- a/arch/arm/cpu/armv7/stv0991/Makefile +++ b/arch/arm/cpu/armv7/stv0991/Makefile @@ -1,6 +1,6 @@ # -# (C) Copyright 2014 -# Vikas Manocha, ST Microelectronics, vikas.manocha@stcom +# Copyright (C) 2014, STMicroelectronics - All Rights Reserved +# Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. # # SPDX-License-Identifier: GPL-2.0+ # diff --git a/arch/arm/cpu/armv7/stv0991/clock.c b/arch/arm/cpu/armv7/stv0991/clock.c index 26c0d3637d3..c54168e4daf 100644 --- a/arch/arm/cpu/armv7/stv0991/clock.c +++ b/arch/arm/cpu/armv7/stv0991/clock.c @@ -1,6 +1,6 @@ /* - * (C) Copyright 2014 - * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com. + * Copyright (C) 2014, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/cpu/armv7/stv0991/pinmux.c b/arch/arm/cpu/armv7/stv0991/pinmux.c index 24c67faaeaa..9edc1b2ac02 100644 --- a/arch/arm/cpu/armv7/stv0991/pinmux.c +++ b/arch/arm/cpu/armv7/stv0991/pinmux.c @@ -1,6 +1,6 @@ /* - * (C) Copyright 2014 - * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com. + * Copyright (C) 2014, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/cpu/armv7/stv0991/reset.c b/arch/arm/cpu/armv7/stv0991/reset.c index 3384b329af4..68939a22ecd 100644 --- a/arch/arm/cpu/armv7/stv0991/reset.c +++ b/arch/arm/cpu/armv7/stv0991/reset.c @@ -1,6 +1,6 @@ /* - * (C) Copyright 2014 - * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com. + * Copyright (C) 2014, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/cpu/armv7/stv0991/timer.c b/arch/arm/cpu/armv7/stv0991/timer.c index 8654b8b686d..bd3401ae609 100644 --- a/arch/arm/cpu/armv7/stv0991/timer.c +++ b/arch/arm/cpu/armv7/stv0991/timer.c @@ -1,6 +1,6 @@ /* - * (C) Copyright 2014 - * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com. + * Copyright (C) 2014, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/cpu/armv7m/cache.c b/arch/arm/cpu/armv7m/cache.c index e8f86420cf8..a46d4b51d9c 100644 --- a/arch/arm/cpu/armv7m/cache.c +++ b/arch/arm/cpu/armv7m/cache.c @@ -1,6 +1,6 @@ /* - * (C) Copyright 2017 - * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com. + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/cpu/armv7m/mpu.c b/arch/arm/cpu/armv7m/mpu.c index 4622aa48263..8e92a33fd4d 100644 --- a/arch/arm/cpu/armv7m/mpu.c +++ b/arch/arm/cpu/armv7m/mpu.c @@ -1,6 +1,6 @@ /* - * (C) Copyright 2017 - * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com. + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/dts/exynos5422-odroidxu3.dts b/arch/arm/dts/exynos5422-odroidxu3.dts index b6f43332275..b48ca3b1212 100644 --- a/arch/arm/dts/exynos5422-odroidxu3.dts +++ b/arch/arm/dts/exynos5422-odroidxu3.dts @@ -124,8 +124,8 @@ ldo15_reg: LDO15 { regulator-name = "vdd_ldo15"; - regulator-min-microvolt = <3100000>; - regulator-max-microvolt = <3100000>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; regulator-always-on; }; @@ -137,7 +137,7 @@ }; ldo17_reg: LDO17 { - regulator-name = "tsp_avdd"; + regulator-name = "vdd_ldo17"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; diff --git a/arch/arm/dts/imx6q-display5.dts b/arch/arm/dts/imx6q-display5.dts new file mode 100644 index 00000000000..50347ff26be --- /dev/null +++ b/arch/arm/dts/imx6q-display5.dts @@ -0,0 +1,18 @@ +/* + * Copyright 2017 + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +/dts-v1/; + +#include "imx6q.dtsi" + +/ { + model = "Liebherr (LWN) display5 i.MX6 Quad Board"; + compatible = "lwn,display5", "fsl,imx6q"; +}; diff --git a/arch/arm/dts/rk3368-lion.dts b/arch/arm/dts/rk3368-lion.dts index 850db500e4e..f018b8b1463 100644 --- a/arch/arm/dts/rk3368-lion.dts +++ b/arch/arm/dts/rk3368-lion.dts @@ -68,7 +68,7 @@ phy-supply = <&vcc33_io>; phy-mode = "rgmii"; clock_in_out = "input"; - snps,reset-gpio = <&gpio3 11 GPIO_ACTIVE_LOW>; + snps,reset-gpio = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>; snps,reset-active-low; snps,reset-delays-us = <2 10000 50000>; assigned-clocks = <&cru SCLK_MAC>; diff --git a/arch/arm/dts/rk3399-firefly.dts b/arch/arm/dts/rk3399-firefly.dts index 31e3ba8a474..f134c006889 100644 --- a/arch/arm/dts/rk3399-firefly.dts +++ b/arch/arm/dts/rk3399-firefly.dts @@ -332,10 +332,10 @@ regulator-always-on; regulator-boot-on; regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; + regulator-max-microvolt = <3000000>; regulator-state-mem { regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; + regulator-suspend-microvolt = <3000000>; }; }; diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi index 65ab3801391..96bd4fec01d 100644 --- a/arch/arm/dts/rk3399-puma.dtsi +++ b/arch/arm/dts/rk3399-puma.dtsi @@ -36,13 +36,13 @@ module_led { label = "module_led"; - gpios = <&gpio2 25 GPIO_ACTIVE_HIGH>; + gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; }; sd_card_led { label = "sd_card_led"; - gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; linux,default-trigger = "mmc0"; }; }; @@ -94,8 +94,7 @@ compatible = "regulator-fixed"; regulator-name = "usbhub_enable"; enable-active-low; - gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>; - regulator-always-on; + gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>; regulator-boot-on; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; @@ -111,8 +110,8 @@ compatible = "regulator-fixed"; u-boot,dm-pre-reloc; regulator-name = "bios_enable"; - enable-active-low; - gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>; + enable-active-high; + gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>; regulator-always-on; regulator-boot-on; regulator-min-microvolt = <1800000>; @@ -140,7 +139,7 @@ vcc5v0_otg: vcc5v0-otg-regulator { compatible = "regulator-fixed"; enable-active-high; - gpio = <&gpio0 2 GPIO_ACTIVE_HIGH>; + gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&otg_vbus_drv>; regulator-name = "vcc5v0_otg"; @@ -150,7 +149,7 @@ vcc5v0_host: vcc5v0-host-regulator { compatible = "regulator-fixed"; enable-active-low; - gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>; + gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&host_vbus_drv>; regulator-name = "vcc5v0_host"; @@ -196,7 +195,7 @@ phy-supply = <&vcc_phy>; phy-mode = "rgmii"; clock_in_out = "input"; - snps,reset-gpio = <&gpio3 16 GPIO_ACTIVE_LOW>; + snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; snps,reset-active-low; snps,reset-delays-us = <2 10000 50000>; assigned-clocks = <&cru SCLK_RMII_SRC>; @@ -224,7 +223,7 @@ vdd_gpu: fan535555@60 { compatible = "fcs,fan53555"; reg = <0x60>; - vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; + vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; vin-supply = <&vcc5v0_sys>; regulator-compatible = "fan53555-reg"; regulator-name = "vdd_gpu"; @@ -348,11 +347,11 @@ regulator-always-on; regulator-boot-on; regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; + regulator-max-microvolt = <3000000>; regulator-name = "vcc_sd"; regulator-state-mem { regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; + regulator-suspend-microvolt = <3000000>; }; }; @@ -426,7 +425,7 @@ vdd_cpu_b: fan53555@60 { compatible = "fcs,fan53555"; reg = <0x60>; - vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; + vsel-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; vin-supply = <&vcc5v0_sys>; regulator-compatible = "fan53555-reg"; regulator-name = "vdd_cpu_b"; @@ -469,7 +468,7 @@ assigned-clocks = <&cru SCLK_PCIEPHY_REF>; assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>; assigned-clock-rates = <100000000>; - ep-gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>; + ep-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; num-lanes = <4>; pinctrl-names = "default"; pinctrl-0 = <&pcie_clkreqn>; @@ -524,23 +523,23 @@ }; &usb_host0_ehci { - status = "okay"; + status = "disabled"; }; &usb_host0_ohci { - status = "okay"; + status = "disabled"; }; &dwc3_typec0 { - status = "disabled"; + status = "okay"; }; &usb_host1_ehci { - status = "okay"; + status = "disabled"; }; &usb_host1_ohci { - status = "okay"; + status = "disabled"; }; &dwc3_typec1 { @@ -564,42 +563,43 @@ puma_pin_hog: puma_pin_hog { rockchip,pins = /* We need pull-ups on Q7 buttons */ - <0 4 RK_FUNC_GPIO &pcfg_pull_up>, /* LID_BTN# */ - <0 10 RK_FUNC_GPIO &pcfg_pull_up>, /* BATLOW# */ - <0 11 RK_FUNC_GPIO &pcfg_pull_up>, /* SLP_BTN# */ - <0 9 RK_FUNC_GPIO &pcfg_pull_up>; /* BIOS_DISABLE# */ + <RK_GPIO0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>, /* LID_BTN# */ + <RK_GPIO0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>, /* BATLOW# */ + <RK_GPIO0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>, /* SLP_BTN# */ + <RK_GPIO0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; /* BIOS_DISABLE# */ }; }; pmic { pmic_int_l: pmic-int-l { rockchip,pins = - <1 22 RK_FUNC_GPIO &pcfg_pull_up>; + <RK_GPIO1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; }; }; leds_pins_puma: led_pins@0 { rockchip,pins = - <2 25 RK_FUNC_GPIO &pcfg_pull_none>, - <1 2 RK_FUNC_GPIO &pcfg_pull_none>; + <RK_GPIO2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>, + <RK_GPIO1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; }; usb2 { otg_vbus_drv: otg-vbus-drv { rockchip,pins = - <0 2 RK_FUNC_GPIO &pcfg_pull_none>; + <RK_GPIO0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; }; host_vbus_drv: host-vbus-drv { rockchip,pins = - <0 2 RK_FUNC_GPIO &pcfg_pull_none>; + <RK_GPIO4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; }; }; i2c8 { i2c8_xfer_a: i2c8-xfer { - rockchip,pins = <1 21 RK_FUNC_1 &pcfg_pull_up>, - <1 20 RK_FUNC_1 &pcfg_pull_up>; + rockchip,pins = + <RK_GPIO1 RK_PC5 RK_FUNC_1 &pcfg_pull_up>, + <RK_GPIO1 RK_PC4 RK_FUNC_1 &pcfg_pull_up>; }; }; }; @@ -624,8 +624,8 @@ &i2c6_xfer { /* Enable pull-ups, the pins would float otherwise. */ rockchip,pins = - <2 10 RK_FUNC_2 &pcfg_pull_up>, - <2 9 RK_FUNC_2 &pcfg_pull_up>; + <RK_GPIO2 RK_PB2 RK_FUNC_2 &pcfg_pull_up>, + <RK_GPIO2 RK_PB1 RK_FUNC_2 &pcfg_pull_up>; }; &i2c7 { diff --git a/arch/arm/include/asm/arch-mx5/sys_proto.h b/arch/arm/include/asm/arch-mx5/sys_proto.h index 14f5d948c9f..de19c45e098 100644 --- a/arch/arm/include/asm/arch-mx5/sys_proto.h +++ b/arch/arm/include/asm/arch-mx5/sys_proto.h @@ -4,5 +4,9 @@ * * SPDX-License-Identifier: GPL-2.0+ */ +#ifndef __SYS_PROTO_IMX5_ +#define __SYS_PROTO_IMX5_ #include <asm/mach-imx/sys_proto.h> + +#endif /* __SYS_PROTO_IMX5_ */ diff --git a/arch/arm/include/asm/arch-mx6/iomux.h b/arch/arm/include/asm/arch-mx6/iomux.h index 907cb408ff2..ee3a56583b0 100644 --- a/arch/arm/include/asm/arch-mx6/iomux.h +++ b/arch/arm/include/asm/arch-mx6/iomux.h @@ -178,4 +178,17 @@ |IOMUXC_GPR13_SATA_PHY_3_MASK \ |IOMUXC_GPR13_SATA_PHY_2_MASK \ |IOMUXC_GPR13_SATA_PHY_1_MASK) + +/* + * Setup RGMII voltage levels on iMX6 SoC - the + * + * IOMUXC_SW_PAD_CTL_GRP_DDR_TYPE_RGMII - register + * + * 1P2V_IO - USB_HSIC, MIPI_HSI + * 1P5V_IO - ENET pins + */ +#define IOMUXC_SW_PAD_CTL_GRP_DDR_TYPE_RGMII 0x020e0790 +#define DDR_SEL_1P2V_IO (0x2 << 18) +#define DDR_SEL_1P5V_IO (0x3 << 18) + #endif /* __ASM_ARCH_IOMUX_H__ */ diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h index b22a7a0f8b7..33458cd0008 100644 --- a/arch/arm/include/asm/arch-mx6/sys_proto.h +++ b/arch/arm/include/asm/arch-mx6/sys_proto.h @@ -5,7 +5,11 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#ifndef __SYS_PROTO_IMX6_ +#define __SYS_PROTO_IMX6_ + #include <asm/mach-imx/sys_proto.h> +#include <asm/arch/iomux.h> #define USBPHY_PWD 0x00000000 @@ -16,3 +20,15 @@ int imx6_pcie_toggle_power(void); int imx6_pcie_toggle_reset(void); + +/** + * iomuxc_set_rgmii_io_voltage - set voltage level of RGMII/USB pins + * + * @param io_vol - the voltage IO level of pins + */ +static inline void iomuxc_set_rgmii_io_voltage(int io_vol) +{ + __raw_writel(io_vol, IOMUXC_SW_PAD_CTL_GRP_DDR_TYPE_RGMII); +} + +#endif /* __SYS_PROTO_IMX6_ */ diff --git a/arch/arm/include/asm/arch-mx7/sys_proto.h b/arch/arm/include/asm/arch-mx7/sys_proto.h index fa624248b2e..cd83662a78e 100644 --- a/arch/arm/include/asm/arch-mx7/sys_proto.h +++ b/arch/arm/include/asm/arch-mx7/sys_proto.h @@ -3,8 +3,12 @@ * * SPDX-License-Identifier: GPL-2.0+ */ +#ifndef __SYS_PROTO_IMX7_ +#define __SYS_PROTO_IMX7_ #include <asm/mach-imx/sys_proto.h> void set_wdog_reset(struct wdog_regs *wdog); enum boot_device get_boot_device(void); + +#endif /* __SYS_PROTO_IMX7_ */ diff --git a/arch/arm/include/asm/arch-spear/clk.h b/arch/arm/include/asm/arch-spear/clk.h index a07d0d5f976..5c16524e1b7 100644 --- a/arch/arm/include/asm/arch-spear/clk.h +++ b/arch/arm/include/asm/arch-spear/clk.h @@ -1,6 +1,6 @@ /* - * (C) Copyright 2010 - * Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com> + * Copyright (C) 2010, STMicroelectronics - All Rights Reserved + * Author(s): Vipin Kumar, <vipin.kumar@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/include/asm/arch-spear/hardware.h b/arch/arm/include/asm/arch-spear/hardware.h index 065360ab35a..14b7be4bb3e 100644 --- a/arch/arm/include/asm/arch-spear/hardware.h +++ b/arch/arm/include/asm/arch-spear/hardware.h @@ -1,6 +1,6 @@ /* - * (C) Copyright 2009 - * Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com> + * Copyright (C) 2009, STMicroelectronics - All Rights Reserved + * Author(s): Vipin Kumar, <vipin.kumar@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/include/asm/arch-stih410/sdhci.h b/arch/arm/include/asm/arch-stih410/sdhci.h index 8cd77fc687c..928614326b5 100644 --- a/arch/arm/include/asm/arch-stih410/sdhci.h +++ b/arch/arm/include/asm/arch-stih410/sdhci.h @@ -1,5 +1,6 @@ /* - * (C) Copyright 2017 Patrice Chotard <patrice.chotard@st.com> + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/include/asm/arch-stih410/sys_proto.h b/arch/arm/include/asm/arch-stih410/sys_proto.h index 5c40d3b0a47..524f22c2136 100644 --- a/arch/arm/include/asm/arch-stih410/sys_proto.h +++ b/arch/arm/include/asm/arch-stih410/sys_proto.h @@ -1,6 +1,6 @@ /* - * Copyright (c) 2017 - * Patrice Chotard <patrice.chotard@st.com> + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/include/asm/arch-stm32f4/stm32_defs.h b/arch/arm/include/asm/arch-stm32f4/stm32_defs.h index 29b98aecf44..9a967ac38a1 100644 --- a/arch/arm/include/asm/arch-stm32f4/stm32_defs.h +++ b/arch/arm/include/asm/arch-stm32f4/stm32_defs.h @@ -1,6 +1,6 @@ /* - * (C) Copyright 2016 - * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com. + * Copyright (C) 2016, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/include/asm/arch-stm32f4/stm32_periph.h b/arch/arm/include/asm/arch-stm32f4/stm32_periph.h index 38adc4e0e2f..fa45a5c0f1c 100644 --- a/arch/arm/include/asm/arch-stm32f4/stm32_periph.h +++ b/arch/arm/include/asm/arch-stm32f4/stm32_periph.h @@ -1,6 +1,6 @@ /* - * (C) Copyright 2016 - * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com. + * Copyright (C) 2016, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/include/asm/arch-stm32f7/gpio.h b/arch/arm/include/asm/arch-stm32f7/gpio.h index 56e469e3023..68ecdc89e6f 100644 --- a/arch/arm/include/asm/arch-stm32f7/gpio.h +++ b/arch/arm/include/asm/arch-stm32f7/gpio.h @@ -1,6 +1,6 @@ /* - * (C) Copyright 2016 - * Vikas Manocha, <vikas.manocha@st.com> + * Copyright (C) 2016, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/include/asm/arch-stm32f7/gpt.h b/arch/arm/include/asm/arch-stm32f7/gpt.h index e9e0c142e0d..b43dc612c84 100644 --- a/arch/arm/include/asm/arch-stm32f7/gpt.h +++ b/arch/arm/include/asm/arch-stm32f7/gpt.h @@ -1,6 +1,6 @@ /* - * (C) Copyright 2016 - * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com. + * Copyright (C) 2016, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/include/asm/arch-stm32f7/rcc.h b/arch/arm/include/asm/arch-stm32f7/rcc.h index a33f8cf9bc3..6475f9d5c89 100644 --- a/arch/arm/include/asm/arch-stm32f7/rcc.h +++ b/arch/arm/include/asm/arch-stm32f7/rcc.h @@ -1,6 +1,6 @@ /* - * (C) Copyright 2016 - * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com. + * Copyright (C) 2016, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/include/asm/arch-stm32f7/stm32.h b/arch/arm/include/asm/arch-stm32f7/stm32.h index 87aee6057b2..d6412a00cc6 100644 --- a/arch/arm/include/asm/arch-stm32f7/stm32.h +++ b/arch/arm/include/asm/arch-stm32f7/stm32.h @@ -1,6 +1,6 @@ /* - * (C) Copyright 2016 - * Vikas Manocha, STMicroelectronics, <vikas.manocha@st.com> + * Copyright (C) 2016, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/include/asm/arch-stm32f7/stm32_defs.h b/arch/arm/include/asm/arch-stm32f7/stm32_defs.h index 29b98aecf44..9a967ac38a1 100644 --- a/arch/arm/include/asm/arch-stm32f7/stm32_defs.h +++ b/arch/arm/include/asm/arch-stm32f7/stm32_defs.h @@ -1,6 +1,6 @@ /* - * (C) Copyright 2016 - * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com. + * Copyright (C) 2016, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/include/asm/arch-stm32f7/stm32_periph.h b/arch/arm/include/asm/arch-stm32f7/stm32_periph.h index 9c1ec022332..ae0faef353d 100644 --- a/arch/arm/include/asm/arch-stm32f7/stm32_periph.h +++ b/arch/arm/include/asm/arch-stm32f7/stm32_periph.h @@ -1,6 +1,6 @@ /* - * (C) Copyright 2016 - * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com. + * Copyright (C) 2016, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/include/asm/arch-stm32h7/gpio.h b/arch/arm/include/asm/arch-stm32h7/gpio.h index 450784cb217..092bf3aaaca 100644 --- a/arch/arm/include/asm/arch-stm32h7/gpio.h +++ b/arch/arm/include/asm/arch-stm32h7/gpio.h @@ -1,6 +1,6 @@ /* - * Copyright (C) STMicroelectronics SA 2017 - * Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics. + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/include/asm/arch-stm32h7/stm32.h b/arch/arm/include/asm/arch-stm32h7/stm32.h index 9ff1f137358..f2922aa3237 100644 --- a/arch/arm/include/asm/arch-stm32h7/stm32.h +++ b/arch/arm/include/asm/arch-stm32h7/stm32.h @@ -1,6 +1,6 @@ /* - * Copyright (C) STMicroelectronics SA 2017 - * Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics. + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/include/asm/arch-stv0991/gpio.h b/arch/arm/include/asm/arch-stv0991/gpio.h index 9131ded5eb8..f66fa60499a 100644 --- a/arch/arm/include/asm/arch-stv0991/gpio.h +++ b/arch/arm/include/asm/arch-stv0991/gpio.h @@ -1,6 +1,6 @@ /* - * (C) Copyright 2014 - * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com + * Copyright (C) 2014, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/include/asm/arch-stv0991/hardware.h b/arch/arm/include/asm/arch-stv0991/hardware.h index 3f6bcaf9706..13b682d5b24 100644 --- a/arch/arm/include/asm/arch-stv0991/hardware.h +++ b/arch/arm/include/asm/arch-stv0991/hardware.h @@ -1,6 +1,6 @@ /* - * (C) Copyright 2014 - * Vikas Manocha, STMicroelectronics, <vikas.manocha@st.com> + * Copyright (C) 2014, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/include/asm/arch-stv0991/stv0991_cgu.h b/arch/arm/include/asm/arch-stv0991/stv0991_cgu.h index f0045f3e04b..45f3c9028d1 100644 --- a/arch/arm/include/asm/arch-stv0991/stv0991_cgu.h +++ b/arch/arm/include/asm/arch-stv0991/stv0991_cgu.h @@ -1,6 +1,6 @@ /* - * (C) Copyright 2014 - * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com + * Copyright (C) 2014, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/include/asm/arch-stv0991/stv0991_creg.h b/arch/arm/include/asm/arch-stv0991/stv0991_creg.h index 737c95253b4..2c279b13720 100644 --- a/arch/arm/include/asm/arch-stv0991/stv0991_creg.h +++ b/arch/arm/include/asm/arch-stv0991/stv0991_creg.h @@ -1,6 +1,6 @@ /* - * (C) Copyright 2014 - * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com + * Copyright (C) 2014, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/include/asm/arch-stv0991/stv0991_defs.h b/arch/arm/include/asm/arch-stv0991/stv0991_defs.h index 1151378c5c8..7f0f1d6af35 100644 --- a/arch/arm/include/asm/arch-stv0991/stv0991_defs.h +++ b/arch/arm/include/asm/arch-stv0991/stv0991_defs.h @@ -1,6 +1,6 @@ /* - * (C) Copyright 2014 - * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com. + * Copyright (C) 2014, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/include/asm/arch-stv0991/stv0991_gpt.h b/arch/arm/include/asm/arch-stv0991/stv0991_gpt.h index abd72572645..0a1b6dec749 100644 --- a/arch/arm/include/asm/arch-stv0991/stv0991_gpt.h +++ b/arch/arm/include/asm/arch-stv0991/stv0991_gpt.h @@ -1,6 +1,6 @@ /* - * (C) Copyright 2014 - * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com. + * Copyright (C) 2014, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/include/asm/arch-stv0991/stv0991_periph.h b/arch/arm/include/asm/arch-stv0991/stv0991_periph.h index 725da838b81..a599ade973e 100644 --- a/arch/arm/include/asm/arch-stv0991/stv0991_periph.h +++ b/arch/arm/include/asm/arch-stv0991/stv0991_periph.h @@ -1,6 +1,6 @@ /* - * (C) Copyright 2014 - * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com. + * Copyright (C) 2014, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/include/asm/arch-stv0991/stv0991_wdru.h b/arch/arm/include/asm/arch-stv0991/stv0991_wdru.h index 7e555a237a6..2e89ebcffbd 100644 --- a/arch/arm/include/asm/arch-stv0991/stv0991_wdru.h +++ b/arch/arm/include/asm/arch-stv0991/stv0991_wdru.h @@ -1,6 +1,6 @@ /* - * (C) Copyright 2014 - * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com + * Copyright (C) 2014, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/include/asm/armv7m_mpu.h b/arch/arm/include/asm/armv7m_mpu.h index d7e99b4d8d8..0f73cf1dc0e 100644 --- a/arch/arm/include/asm/armv7m_mpu.h +++ b/arch/arm/include/asm/armv7m_mpu.h @@ -1,6 +1,6 @@ /* - * (C) Copyright 2017 - * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com. + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/mach-imx/mx2/Kconfig b/arch/arm/mach-imx/mx2/Kconfig new file mode 100644 index 00000000000..ea308fccab0 --- /dev/null +++ b/arch/arm/mach-imx/mx2/Kconfig @@ -0,0 +1,30 @@ +if ARCH_MX25 + +config MX25 + bool + default y + select SYS_FSL_ERRATUM_ESDHC_A001 +choice + prompt "MX25 board select" + optional + +config TARGET_MX25PDK + bool "Support mx25pdk" + select BOARD_LATE_INIT + select CPU_ARM926EJS + select BOARD_EARLY_INIT_F + +config TARGET_ZMX25 + bool "Support zmx25" + select BOARD_LATE_INIT + select CPU_ARM926EJS1 + +endchoice + +config SYS_SOC + default "mx25" + +source "board/freescale/mx25pdk/Kconfig" +source "board/syteco/zmx25/Kconfig" + +endif diff --git a/arch/arm/mach-imx/mx5/Kconfig b/arch/arm/mach-imx/mx5/Kconfig index ef37c351d04..d96020d847c 100644 --- a/arch/arm/mach-imx/mx5/Kconfig +++ b/arch/arm/mach-imx/mx5/Kconfig @@ -6,6 +6,7 @@ config MX5 config MX51 bool + select SYS_FSL_ERRATUM_ESDHC_A001 config MX53 bool @@ -52,7 +53,6 @@ config TARGET_MX53SMD config TARGET_TS4800 bool "Support TS4800" select MX51 - select SYS_FSL_ERRATUM_ESDHC_A001 config TARGET_USBARMORY bool "Support USB armory" diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index b82db3af22f..fd73c67fdea 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -138,6 +138,12 @@ config TARGET_DHCOMIMX6 select DM_THERMAL imply CMD_SPL +config TARGET_DISPLAY5 + bool "LWN DISPLAY5 board" + select SUPPORT_SPL + select DM + select DM_SERIAL + config TARGET_EMBESTMX6BOARDS bool "embestmx6boards" select BOARD_LATE_INIT @@ -459,6 +465,7 @@ source "board/phytec/pfla02/Kconfig" source "board/gateworks/gw_ventana/Kconfig" source "board/kosagi/novena/Kconfig" source "board/samtec/vining_2000/Kconfig" +source "board/liebherr/display5/Kconfig" source "board/liebherr/mccmon6/Kconfig" source "board/logicpd/imx6/Kconfig" source "board/seco/Kconfig" diff --git a/arch/arm/mach-rmobile/Kconfig.32 b/arch/arm/mach-rmobile/Kconfig.32 index 89588aaf729..49d6206ac25 100644 --- a/arch/arm/mach-rmobile/Kconfig.32 +++ b/arch/arm/mach-rmobile/Kconfig.32 @@ -1,7 +1,7 @@ if RCAR_32 choice - prompt "Renesus ARM SoCs board select" + prompt "Renesas ARM SoCs board select" optional config TARGET_ARMADILLO_800EVA diff --git a/arch/arm/mach-stm32/stm32f7/Makefile b/arch/arm/mach-stm32/stm32f7/Makefile index 03269bd461c..6696b267fe4 100644 --- a/arch/arm/mach-stm32/stm32f7/Makefile +++ b/arch/arm/mach-stm32/stm32f7/Makefile @@ -1,6 +1,6 @@ # -# (C) Copyright 2016 -# Vikas Manocha, <vikas.manocha@gmail.com> +# Copyright (C) 2016, STMicroelectronics - All Rights Reserved +# Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. # # SPDX-License-Identifier: GPL-2.0+ # diff --git a/arch/arm/mach-stm32/stm32f7/timer.c b/arch/arm/mach-stm32/stm32f7/timer.c index b04c1013e9c..0521c24810b 100644 --- a/arch/arm/mach-stm32/stm32f7/timer.c +++ b/arch/arm/mach-stm32/stm32f7/timer.c @@ -1,6 +1,6 @@ /* - * (C) Copyright 2016 - * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com. + * Copyright (C) 2016, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/arch/arm/mach-stm32/stm32h7/Makefile b/arch/arm/mach-stm32/stm32h7/Makefile index 97f92f74cad..cba2e3be1ca 100644 --- a/arch/arm/mach-stm32/stm32h7/Makefile +++ b/arch/arm/mach-stm32/stm32h7/Makefile @@ -1,6 +1,6 @@ # -# Copyright (c) 2017 -# Patrice Chotard <patrice.chotard@st.com> +# Copyright (C) 2017, STMicroelectronics - All Rights Reserved +# Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics. # # SPDX-License-Identifier: GPL-2.0+ # diff --git a/arch/arm/mach-stm32/stm32h7/soc.c b/arch/arm/mach-stm32/stm32h7/soc.c index a65fab6d2ed..692dbcc04a8 100644 --- a/arch/arm/mach-stm32/stm32h7/soc.c +++ b/arch/arm/mach-stm32/stm32h7/soc.c @@ -1,6 +1,6 @@ /* - * Copyright (C) STMicroelectronics SA 2017 - * Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics. + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/board/CZ.NIC/turris_omnia/MAINTAINERS b/board/CZ.NIC/turris_omnia/MAINTAINERS new file mode 100644 index 00000000000..ed15e11d3e7 --- /dev/null +++ b/board/CZ.NIC/turris_omnia/MAINTAINERS @@ -0,0 +1,6 @@ +TURRIS OMNIA BOARD +M: Marek Behún <marek.behun@nic.cz> +S: Maintained +F: board/CZ.NIC/turris_omnia/ +F: include/configs/turris_omnia.h +F: configs/turris_omnia_defconfig diff --git a/board/Marvell/mvebu_armada-37xx/MAINTAINERS b/board/Marvell/mvebu_armada-37xx/MAINTAINERS index 52a3869b29c..9b0afeef106 100644 --- a/board/Marvell/mvebu_armada-37xx/MAINTAINERS +++ b/board/Marvell/mvebu_armada-37xx/MAINTAINERS @@ -4,3 +4,8 @@ S: Maintained F: board/Marvell/mvebu_armada-37xx/ F: include/configs/mvebu_armada-37xx.h F: configs/mvebu_db-88f3720_defconfig + +ESPRESSOBin BOARD +M: Konstantin Porotchkin <kostap@marvell.com> +S: Maintained +F: configs/mvebu_espressobin-88f3720_defconfig diff --git a/board/Marvell/mvebu_armada-8k/MAINTAINERS b/board/Marvell/mvebu_armada-8k/MAINTAINERS index e0b965dfd62..2551ed02c5b 100644 --- a/board/Marvell/mvebu_armada-8k/MAINTAINERS +++ b/board/Marvell/mvebu_armada-8k/MAINTAINERS @@ -3,5 +3,10 @@ M: Stefan Roese <sr@denx.de> S: Maintained F: board/Marvell/mvebu_armada-8k/ F: include/configs/mvebu_armada-8k.h -F: configs/mvebu_db-88f7040_defconfig -F: configs/mvebu_db-88f8040_defconfig +F: configs/mvebu_db_armada8k_defconfig + + +MACCHIATOBin BOARD +M: Konstantin Porotchkin <kostap@marvell.com> +S: Maintained +F: configs/mvebu_mcbin-88f8040_defconfig diff --git a/board/Synology/ds414/MAINTAINERS b/board/Synology/ds414/MAINTAINERS new file mode 100644 index 00000000000..502cbd7758d --- /dev/null +++ b/board/Synology/ds414/MAINTAINERS @@ -0,0 +1,6 @@ +DS414 BOARD +M: Phil Sutter <phil@nwl.cc> +S: Maintained +F: board/Synology/ds414/ +F: include/configs/ds414.h +F: configs/ds414_defconfig diff --git a/board/altera/arria10-socdk/MAINTAINERS b/board/altera/arria10-socdk/MAINTAINERS new file mode 100644 index 00000000000..5a76efb54ba --- /dev/null +++ b/board/altera/arria10-socdk/MAINTAINERS @@ -0,0 +1,7 @@ +SOCFPGA BOARD +M: Dinh Nguyen <dinguyen@kernel.org> +M: Chin-Liang See <clsee@altera.com> +S: Maintained +F: board/altera/arria10-socdk/ +F: include/configs/socfpga_arria10_socdk.h +F: configs/socfpga_arria10_defconfig diff --git a/board/aspeed/evb_ast2500/MAINTAINERS b/board/aspeed/evb_ast2500/MAINTAINERS new file mode 100644 index 00000000000..7c3c2b5e091 --- /dev/null +++ b/board/aspeed/evb_ast2500/MAINTAINERS @@ -0,0 +1,6 @@ +EVB AST2500 BOARD +M: Maxim Sloyko <maxims@google.com> +S: Maintained +F: board/aspeed/evb_ast2500/ +F: include/configs/evb_ast2500.h +F: configs/evb-ast2500_defconfig diff --git a/board/atmel/sama5d3xek/MAINTAINERS b/board/atmel/sama5d3xek/MAINTAINERS index 560303caad7..ad5150897b5 100644 --- a/board/atmel/sama5d3xek/MAINTAINERS +++ b/board/atmel/sama5d3xek/MAINTAINERS @@ -6,3 +6,6 @@ F: include/configs/sama5d3xek.h F: configs/sama5d3xek_mmc_defconfig F: configs/sama5d3xek_nandflash_defconfig F: configs/sama5d3xek_spiflash_defconfig +F: configs/sama5d36ek_cmp_mmc_defconfig +F: configs/sama5d36ek_cmp_nandflash_defconfig +F: configs/sama5d36ek_cmp_spiflash_defconfig diff --git a/board/dhelectronics/dh_imx6/MAINTAINERS b/board/dhelectronics/dh_imx6/MAINTAINERS index e54bd60adb0..ab4e16bd5df 100644 --- a/board/dhelectronics/dh_imx6/MAINTAINERS +++ b/board/dhelectronics/dh_imx6/MAINTAINERS @@ -1,7 +1,7 @@ DH_IMX6 BOARD -M: Andreas Geisreiter <ageisreiter@dh-electronics.de>, Ludwig Zenz <lzenz@dh-electronics.de> +M: Andreas Geisreiter <ageisreiter@dh-electronics.de> +M: Ludwig Zenz <lzenz@dh-electronics.de> S: Maintained F: board/dhelectronics/dh_imx6/ F: include/configs/dh_imx6.h -F: configs/dh_mx6q_defconfig -F: configs/dh_mx6dl_defconfig +F: configs/dh_imx6_defconfig diff --git a/board/embest/mx6boards/mx6boards.c b/board/embest/mx6boards/mx6boards.c index ae04f68445c..965e4f1ec8f 100644 --- a/board/embest/mx6boards/mx6boards.c +++ b/board/embest/mx6boards/mx6boards.c @@ -36,7 +36,7 @@ #include <linux/fb.h> #include <ipu_pixfmt.h> #include <asm/io.h> -#include <asm/arch/sys_proto.h> + DECLARE_GLOBAL_DATA_PTR; #define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ diff --git a/board/engicam/geam6ul/MAINTAINERS b/board/engicam/geam6ul/MAINTAINERS index 1c313753953..2b882d245ab 100644 --- a/board/engicam/geam6ul/MAINTAINERS +++ b/board/engicam/geam6ul/MAINTAINERS @@ -2,7 +2,7 @@ GEAM6UL BOARD M: Jagan Teki <jagan@amarulasolutions.com> S: Maintained F: board/engicam/geam6ul -F: include/configs/imx6ul_geam.h +F: include/configs/imx6-engicam.h F: configs/imx6ul_geam_mmc_defconfig F: configs/imx6ul_geam_nand_defconfig F: arch/arm/dts/imx6ul-geam-kit.dts diff --git a/board/engicam/icorem6/MAINTAINERS b/board/engicam/icorem6/MAINTAINERS index 26b4b56d712..a348bdde9e6 100644 --- a/board/engicam/icorem6/MAINTAINERS +++ b/board/engicam/icorem6/MAINTAINERS @@ -2,7 +2,7 @@ ICOREM6QDL BOARD M: Jagan Teki <jagan@amarulasolutions.com> S: Maintained F: board/engicam/icorem6 -F: include/configs/imx6qdl_icore.h +F: include/configs/imx6-engicam.h F: configs/imx6qdl_icore_mmc_defconfig F: configs/imx6qdl_icore_nand_defconfig F: arch/arm/dts/imx6qdl-icore.dtsi diff --git a/board/engicam/icorem6/README b/board/engicam/icorem6/README index 6461c0adc88..3779e9665d6 100644 --- a/board/engicam/icorem6/README +++ b/board/engicam/icorem6/README @@ -3,11 +3,8 @@ How to use U-Boot on Engicam i.CoreM6 Solo/DualLite and Quad/Dual Starter Kit: $ make mrproper -- Configure U-Boot for Engicam i.CoreM6 Quad/Dual: -$ make imx6q_icore_mmc_defconfig - -- Configure U-Boot for Engicam i.CoreM6 Solo/DualLite: -$ make imx6dl_icore_mmc_defconfig +- Configure U-Boot for Engicam i.CoreM6 Quad/Dual/Solo/DualLite: +$ make imx6qdl_icore_mmc_defconfig - Build U-Boot $ make diff --git a/board/engicam/icorem6_rqs/MAINTAINERS b/board/engicam/icorem6_rqs/MAINTAINERS index 6205acb09f2..9a74265eea2 100644 --- a/board/engicam/icorem6_rqs/MAINTAINERS +++ b/board/engicam/icorem6_rqs/MAINTAINERS @@ -2,7 +2,7 @@ ICOREM6QDL_RQS BOARD M: Jagan Teki <jagan@amarulasolutions.com> S: Maintained F: board/engicam/icorem6_rqs -F: include/configs/imx6qdl_icore_rqs.h +F: include/configs/imx6-engicam.h F: configs/imx6qdl_icore_rqs_defconfig F: arch/arm/dts/imx6qdl-icore-rqs.dtsi F: arch/arm/dts/imx6q-icore-rqs.dts diff --git a/board/engicam/icorem6_rqs/README b/board/engicam/icorem6_rqs/README index ccce622782a..97e978cd6fd 100644 --- a/board/engicam/icorem6_rqs/README +++ b/board/engicam/icorem6_rqs/README @@ -3,11 +3,8 @@ How to use U-Boot on Engicam i.CoreM6 RQS Solo/DualLite and Quad/Dual Starter Ki $ make mrproper -- Configure U-Boot for Engicam i.CoreM6 RQS Quad/Dual: -$ make imx6q_icore_rqs_mmc_defconfig - -- Configure U-Boot for Engicam i.CoreM6 RQS Solo/DualLite: -$ make imx6dl_icore_rqs_mmc_defconfig +- Configure U-Boot for Engicam i.CoreM6 RQS Quad/Dual/Solo/DualLite: +$ make imx6qdl_icore_rqs_defconfig - Build U-Boot $ make diff --git a/board/engicam/isiotmx6ul/MAINTAINERS b/board/engicam/isiotmx6ul/MAINTAINERS index c30cfe7c7d7..9b66c8db39a 100644 --- a/board/engicam/isiotmx6ul/MAINTAINERS +++ b/board/engicam/isiotmx6ul/MAINTAINERS @@ -2,7 +2,7 @@ ISIOTMX6UL BOARD M: Jagan Teki <jagan@amarulasolutions.com> S: Maintained F: board/engicam/isiotmx6ul -F: include/configs/imx6ul_isiot.h +F: include/configs/imx6-engicam.h F: configs/imx6ul_isiot_mmc_defconfig F: configs/imx6ul_isiot_emmc_defconfig F: configs/imx6ul_isiot_nand_defconfig diff --git a/board/freescale/ls1046aqds/MAINTAINERS b/board/freescale/ls1046aqds/MAINTAINERS index 6737d558ce0..76190c6383c 100644 --- a/board/freescale/ls1046aqds/MAINTAINERS +++ b/board/freescale/ls1046aqds/MAINTAINERS @@ -8,6 +8,7 @@ F: configs/ls1046aqds_nand_defconfig F: configs/ls1046aqds_sdcard_ifc_defconfig F: configs/ls1046aqds_sdcard_qspi_defconfig F: configs/ls1046aqds_qspi_defconfig +F: configs/ls1046aqds_lpuart_defconfig M: Sumit Garg <sumit.garg@nxp.com> S: Maintained diff --git a/board/gdsys/mpc8308/MAINTAINERS b/board/gdsys/mpc8308/MAINTAINERS index 3895b017324..21470bf6b05 100644 --- a/board/gdsys/mpc8308/MAINTAINERS +++ b/board/gdsys/mpc8308/MAINTAINERS @@ -7,4 +7,6 @@ F: configs/hrcon_defconfig F: configs/hrcon_dh_defconfig F: include/configs/strider.h F: configs/strider_cpu_defconfig +F: configs/strider_cpu_dp_defconfig F: configs/strider_con_defconfig +F: configs/strider_con_dp_defconfig diff --git a/board/isee/igep003x/MAINTAINERS b/board/isee/igep003x/MAINTAINERS index 748b189c4e1..a74938a7d22 100644 --- a/board/isee/igep003x/MAINTAINERS +++ b/board/isee/igep003x/MAINTAINERS @@ -3,4 +3,4 @@ M: Enric Balletbo i Serra <eballetbo@gmail.com> S: Maintained F: board/isee/igep003x/ F: include/configs/am335x_igep003x.h -F: configs/am335x_igep0033_defconfig +F: configs/am335x_igep003x_defconfig diff --git a/board/liebherr/display5/Kconfig b/board/liebherr/display5/Kconfig new file mode 100644 index 00000000000..b096c8917a8 --- /dev/null +++ b/board/liebherr/display5/Kconfig @@ -0,0 +1,18 @@ +if TARGET_DISPLAY5 + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "display5" + +config SYS_VENDOR + default "liebherr" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "display5" + +endif diff --git a/board/liebherr/display5/MAINTAINERS b/board/liebherr/display5/MAINTAINERS new file mode 100644 index 00000000000..52178318b59 --- /dev/null +++ b/board/liebherr/display5/MAINTAINERS @@ -0,0 +1,7 @@ +DISPLAY5 BOARD +M: Lukasz Majewski <lukma@denx.de> +S: Maintained +F: board/liebherr/display5/ +F: include/configs/display5.h +F: configs/display5_defconfig +F: configs/display5_factory_defconfig diff --git a/board/liebherr/display5/Makefile b/board/liebherr/display5/Makefile new file mode 100644 index 00000000000..f934672428a --- /dev/null +++ b/board/liebherr/display5/Makefile @@ -0,0 +1,11 @@ +# +# Copyright (C) 2017, DENX Software Engineering +# Lukasz Majewski <lukma@denx.de> +# +# SPDX-License-Identifier: GPL-2.0+ +# +ifdef CONFIG_SPL_BUILD +obj-y = common.o spl.o +else +obj-y := common.o display5.o +endif diff --git a/board/liebherr/display5/common.c b/board/liebherr/display5/common.c new file mode 100644 index 00000000000..03f585b3aa4 --- /dev/null +++ b/board/liebherr/display5/common.c @@ -0,0 +1,111 @@ +/* + * Copyright (C) 2017 DENX Software Engineering + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm/mach-imx/iomux-v3.h> +#include <asm/arch/mx6-pins.h> +#include "common.h" + +iomux_v3_cfg_t const uart_pads[] = { + /* UART4 */ + MX6_PAD_CSI0_DAT12__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_CSI0_DAT13__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_CSI0_DAT16__UART4_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_CSI0_DAT17__UART4_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +iomux_v3_cfg_t const uart_console_pads[] = { + /* UART5 */ + MX6_PAD_CSI0_DAT14__UART5_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_CSI0_DAT15__UART5_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_CSI0_DAT18__UART5_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_CSI0_DAT19__UART5_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +void displ5_set_iomux_uart_spl(void) +{ + SETUP_IOMUX_PADS(uart_console_pads); +} + +void displ5_set_iomux_uart(void) +{ + SETUP_IOMUX_PADS(uart_pads); +} + +#ifdef CONFIG_MXC_SPI +iomux_v3_cfg_t const ecspi_pads[] = { + /* SPI3 */ + MX6_PAD_DISP0_DAT2__ECSPI3_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_DISP0_DAT1__ECSPI3_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_DISP0_DAT0__ECSPI3_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_DISP0_DAT3__ECSPI3_SS0 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_DISP0_DAT4__ECSPI3_SS1 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_DISP0_DAT5__ECSPI3_SS2 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_DISP0_DAT6__ECSPI3_SS3 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_DISP0_DAT7__ECSPI3_RDY | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +iomux_v3_cfg_t const ecspi2_pads[] = { + /* SPI2, NOR Flash nWP, CS0 */ + MX6_PAD_CSI0_DAT10__ECSPI2_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_CSI0_DAT9__ECSPI2_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_CSI0_DAT8__ECSPI2_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_CSI0_DAT11__GPIO5_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_SD3_DAT5__GPIO7_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +int board_spi_cs_gpio(unsigned int bus, unsigned int cs) +{ + if (bus != 1 || cs != (IMX_GPIO_NR(5, 29) << 8)) + return -EINVAL; + + return IMX_GPIO_NR(5, 29); +} + +void displ5_set_iomux_ecspi_spl(void) +{ + SETUP_IOMUX_PADS(ecspi2_pads); +} + +void displ5_set_iomux_ecspi(void) +{ + SETUP_IOMUX_PADS(ecspi_pads); +} + +#else +void displ5_set_iomux_ecspi_spl(void) {} +void displ5_set_iomux_ecspi(void) {} +#endif + +#ifdef CONFIG_FSL_ESDHC +iomux_v3_cfg_t const usdhc4_pads[] = { + MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NANDF_ALE__SD4_RESET | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +void displ5_set_iomux_usdhc_spl(void) +{ + SETUP_IOMUX_PADS(usdhc4_pads); +} + +void displ5_set_iomux_usdhc(void) +{ + SETUP_IOMUX_PADS(usdhc4_pads); +} + +#else +void displ5_set_iomux_usdhc_spl(void) {} +void displ5_set_iomux_usdhc(void) {} +#endif diff --git a/board/liebherr/display5/common.h b/board/liebherr/display5/common.h new file mode 100644 index 00000000000..6019e90c611 --- /dev/null +++ b/board/liebherr/display5/common.h @@ -0,0 +1,42 @@ +/* + * Copyright (C) 2017 DENX Software Engineering + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __DISPL5_COMMON_H_ +#define __DISPL5_COMMON_H_ + +#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \ + PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | \ + PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define ENET_PAD_CTRL_CLK ((PAD_CTL_PUS_100K_UP & ~PAD_CTL_PKE) | \ + PAD_CTL_SPEED_HIGH | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +void displ5_set_iomux_uart_spl(void); +void displ5_set_iomux_uart(void); +void displ5_set_iomux_ecspi_spl(void); +void displ5_set_iomux_ecspi(void); +void displ5_set_iomux_usdhc_spl(void); +void displ5_set_iomux_usdhc(void); + +#endif /* __DISPL5_COMMON_H_ */ diff --git a/board/liebherr/display5/display5.c b/board/liebherr/display5/display5.c new file mode 100644 index 00000000000..5414ef77d3a --- /dev/null +++ b/board/liebherr/display5/display5.c @@ -0,0 +1,384 @@ +/* + * Copyright (C) 2017 DENX Software Engineering + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <asm/io.h> +#include <asm/arch/clock.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/iomux.h> +#include <asm/arch/mx6-pins.h> +#include <asm/arch/mx6-ddr.h> +#include <asm/arch/sys_proto.h> +#include <errno.h> +#include <asm/gpio.h> +#include <malloc.h> +#include <asm/mach-imx/iomux-v3.h> +#include <asm/mach-imx/mxc_i2c.h> +#include <asm/mach-imx/boot_mode.h> +#include <asm/mach-imx/spi.h> +#include <mmc.h> +#include <fsl_esdhc.h> +#include <miiphy.h> +#include <netdev.h> +#include <i2c.h> + +#include <dm.h> +#include <dm/platform_data/serial_mxc.h> +#include <dm/platdata.h> + +#ifndef CONFIG_MXC_SPI +#error "CONFIG_SPI must be set for this board" +#error "Please check your config file" +#endif + +#include "common.h" + +DECLARE_GLOBAL_DATA_PTR; + +static bool hw_ids_valid; +static bool sw_ids_valid; +static u32 cpu_id; +static u32 unit_id; + +#define SW0 IMX_GPIO_NR(2, 4) +#define SW1 IMX_GPIO_NR(2, 5) +#define SW2 IMX_GPIO_NR(2, 6) +#define SW3 IMX_GPIO_NR(2, 7) +#define HW0 IMX_GPIO_NR(6, 7) +#define HW1 IMX_GPIO_NR(6, 9) +#define HW2 IMX_GPIO_NR(6, 10) +#define HW3 IMX_GPIO_NR(6, 11) +#define HW4 IMX_GPIO_NR(4, 7) +#define HW5 IMX_GPIO_NR(4, 11) +#define HW6 IMX_GPIO_NR(4, 13) +#define HW7 IMX_GPIO_NR(4, 15) + +int gpio_table_sw_ids[] = { + SW0, SW1, SW2, SW3 +}; + +const char *gpio_table_sw_ids_names[] = { + "sw0", "sw1", "sw2", "sw3" +}; + +int gpio_table_hw_ids[] = { + HW0, HW1, HW2, HW3, HW4, HW5, HW6, HW7 +}; + +const char *gpio_table_hw_ids_names[] = { + "hw0", "hw1", "hw2", "hw3", "hw4", "hw5", "hw6", "hw7" +}; + +static int get_board_id(int *ids, const char **c, int size, + bool *valid, u32 *id) +{ + int i, ret, val; + + *valid = false; + + for (i = 0; i < size; i++) { + ret = gpio_request(ids[i], c[i]); + if (ret) { + printf("Can't request SWx gpios\n"); + return ret; + } + } + + for (i = 0; i < size; i++) { + ret = gpio_direction_input(ids[i]); + if (ret) { + printf("Can't set SWx gpios direction\n"); + return ret; + } + } + + for (i = 0; i < size; i++) { + val = gpio_get_value(ids[i]); + if (val < 0) { + printf("Can't get SW%d ID\n", i); + *id = 0; + return val; + } + *id |= val << i; + } + *valid = true; + + return 0; +} + +int dram_init(void) +{ + gd->ram_size = imx_ddr_size(); + + return 0; +} + +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) +/* I2C1: TFA9879 */ +struct i2c_pads_info i2c_pad_info0 = { + .scl = { + .i2c_mode = MX6_PAD_EIM_D21__I2C1_SCL | PC, + .gpio_mode = MX6_PAD_EIM_D21__GPIO3_IO21 | PC, + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = MX6_PAD_EIM_D28__I2C1_SDA | PC, + .gpio_mode = MX6_PAD_EIM_D28__GPIO3_IO28 | PC, + .gp = IMX_GPIO_NR(3, 28) + } +}; + +/* I2C2: TIVO TM4C123 */ +struct i2c_pads_info i2c_pad_info1 = { + .scl = { + .i2c_mode = MX6_PAD_EIM_EB2__I2C2_SCL | PC, + .gpio_mode = MX6_PAD_EIM_EB2__GPIO2_IO30 | PC, + .gp = IMX_GPIO_NR(2, 30) + }, + .sda = { + .i2c_mode = MX6_PAD_EIM_D16__I2C2_SDA | PC, + .gpio_mode = MX6_PAD_EIM_D16__GPIO3_IO16 | PC, + .gp = IMX_GPIO_NR(3, 16) + } +}; + +/* I2C3: PMIC PF0100, EEPROM AT24C256C */ +struct i2c_pads_info i2c_pad_info2 = { + .scl = { + .i2c_mode = MX6_PAD_EIM_D17__I2C3_SCL | PC, + .gpio_mode = MX6_PAD_EIM_D17__GPIO3_IO17 | PC, + .gp = IMX_GPIO_NR(3, 17) + }, + .sda = { + .i2c_mode = MX6_PAD_EIM_D18__I2C3_SDA | PC, + .gpio_mode = MX6_PAD_EIM_D18__GPIO3_IO18 | PC, + .gp = IMX_GPIO_NR(3, 18) + } +}; + +iomux_v3_cfg_t const misc_pads[] = { + /* Prod ID GPIO pins */ + MX6_PAD_NANDF_D4__GPIO2_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_NANDF_D5__GPIO2_IO05 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_NANDF_D6__GPIO2_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_NANDF_D7__GPIO2_IO07 | MUX_PAD_CTRL(NO_PAD_CTRL), + + /* HW revision GPIO pins */ + MX6_PAD_NANDF_CLE__GPIO6_IO07 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_NANDF_WP_B__GPIO6_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_NANDF_RB0__GPIO6_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_NANDF_CS0__GPIO6_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_KEY_ROW0__GPIO4_IO07 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_KEY_ROW2__GPIO4_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_KEY_ROW3__GPIO4_IO13 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL), + + /* XTALOSC */ + MX6_PAD_GPIO_3__XTALOSC_REF_CLK_24M | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +#ifdef CONFIG_FSL_ESDHC +struct fsl_esdhc_cfg usdhc_cfg[1] = { + { USDHC4_BASE_ADDR, 0, 8, }, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + return 1; +} + +int board_mmc_init(bd_t *bis) +{ + displ5_set_iomux_usdhc(); + + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + + return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); +} +#endif /* CONFIG_FSL_ESDHC */ + +static void displ5_setup_ecspi(void) +{ + int ret; + + displ5_set_iomux_ecspi(); + + ret = gpio_request(IMX_GPIO_NR(5, 29), "spi2_cs0"); + if (!ret) + gpio_direction_output(IMX_GPIO_NR(5, 29), 1); + + ret = gpio_request(IMX_GPIO_NR(7, 0), "spi2_#wp"); + if (!ret) + gpio_direction_output(IMX_GPIO_NR(7, 0), 1); +} + +#ifdef CONFIG_FEC_MXC +iomux_v3_cfg_t const enet_pads[] = { + MX6_PAD_ENET_TXD1__ENET_1588_EVENT0_IN | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_RXD1__ENET_1588_EVENT3_OUT | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), + + /* for old evalboard with R159 present and R160 not populated */ + MX6_PAD_GPIO_16__ENET_REF_CLK | MUX_PAD_CTRL(NO_PAD_CTRL), + + MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), + + MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), + /*INT#_GBE*/ + MX6_PAD_ENET_TX_EN__GPIO1_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static void setup_iomux_enet(void) +{ + SETUP_IOMUX_PADS(enet_pads); + gpio_direction_input(IMX_GPIO_NR(1, 28)); /*INT#_GBE*/ +} + +int board_eth_init(bd_t *bd) +{ + struct phy_device *phydev; + struct mii_dev *bus; + int ret; + + setup_iomux_enet(); + + iomuxc_set_rgmii_io_voltage(DDR_SEL_1P5V_IO); + + ret = enable_fec_anatop_clock(0, ENET_125MHZ); + if (ret) + return ret; + + bus = fec_get_miibus(IMX_FEC_BASE, -1); + if (!bus) + return -ENODEV; + + /* + * We use here the "rgmii-id" mode of operation and allow M88E1512 + * PHY to use its internally callibrated RX/TX delays + */ + phydev = phy_find_by_mask(bus, 0xffffffff /* (0xf << 4) */, + PHY_INTERFACE_MODE_RGMII_ID); + if (!phydev) { + ret = -ENODEV; + goto err_phy; + } + + /* display5 due to PCB routing can only work with 100 Mbps */ + phydev->advertising &= ~(ADVERTISED_1000baseX_Half | + ADVERTISED_1000baseX_Full | + SUPPORTED_1000baseT_Half | + SUPPORTED_1000baseT_Full); + + ret = fec_probe(bd, -1, IMX_FEC_BASE, bus, phydev); + if (ret) + goto err_sw; + + return 0; + +err_sw: + free(phydev); +err_phy: + mdio_unregister(bus); + free(bus); + return ret; +} +#endif /* CONFIG_FEC_MXC */ + +/* + * Do not overwrite the console + * Always use serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +int ft_board_setup(void *blob, bd_t *bd) +{ + fdt_fixup_ethernet(blob); + return 0; +} +#endif + +int board_init(void) +{ + debug("board init\n"); + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + /* Setup iomux for non console UARTS */ + displ5_set_iomux_uart(); + + displ5_setup_ecspi(); + + SETUP_IOMUX_PADS(misc_pads); + + get_board_id(gpio_table_sw_ids, &gpio_table_sw_ids_names[0], + ARRAY_SIZE(gpio_table_sw_ids), &sw_ids_valid, &unit_id); + debug("SWx unit_id 0x%x\n", unit_id); + + get_board_id(gpio_table_hw_ids, &gpio_table_hw_ids_names[0], + ARRAY_SIZE(gpio_table_hw_ids), &hw_ids_valid, &cpu_id); + debug("HWx cpu_id 0x%x\n", cpu_id); + + if (hw_ids_valid && sw_ids_valid) + printf("ID: unit type 0x%x rev 0x%x\n", unit_id, cpu_id); + + udelay(25); + + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0); + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); + + return 0; +} + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* eMMC, USDHC-4, 8-bit bus width */ + /* SPI-NOR, ECSPI-2 SS0, 3-bytes addressing */ + {"emmc", MAKE_CFGVAL(0x60, 0x58, 0x00, 0x00)}, + {"spinor", MAKE_CFGVAL(0x30, 0x00, 0x00, 0x09)}, + {NULL, 0}, +}; + +static void setup_boot_modes(void) +{ + add_board_boot_modes(board_boot_modes); +} +#else +static inline void setup_boot_modes(void) {} +#endif + +int misc_init_r(void) +{ + setup_boot_modes(); + return 0; +} + +static struct mxc_serial_platdata mxc_serial_plat = { + .reg = (struct mxc_uart *)UART5_BASE, +}; + +U_BOOT_DEVICE(mxc_serial) = { + .name = "serial_mxc", + .platdata = &mxc_serial_plat, +}; diff --git a/board/liebherr/display5/spl.c b/board/liebherr/display5/spl.c new file mode 100644 index 00000000000..0a36e656c01 --- /dev/null +++ b/board/liebherr/display5/spl.c @@ -0,0 +1,247 @@ +/* + * Copyright (C) 2017 DENX Software Engineering + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <spl.h> +#include <libfdt.h> +#include <asm/io.h> +#include <asm/arch/clock.h> +#include <asm/arch/mx6-ddr.h> +#include <asm/arch/mx6-pins.h> +#include "asm/arch/crm_regs.h" +#include <asm/arch/sys_proto.h> +#include <asm/arch/imx-regs.h> +#include "asm/arch/iomux.h" +#include <asm/mach-imx/iomux-v3.h> +#include <environment.h> +#include <fsl_esdhc.h> +#include <netdev.h> +#include "common.h" + +DECLARE_GLOBAL_DATA_PTR; + +static const struct mx6dq_iomux_ddr_regs mx6_ddr_ioregs = { + .dram_sdclk_0 = 0x00000030, + .dram_sdclk_1 = 0x00000030, + .dram_cas = 0x00000030, + .dram_ras = 0x00000030, + .dram_reset = 0x00000030, + .dram_sdcke0 = 0x00003000, + .dram_sdcke1 = 0x00003000, + .dram_sdba2 = 0x00000000, + .dram_sdodt0 = 0x00000030, + .dram_sdodt1 = 0x00000030, + + .dram_sdqs0 = 0x00000030, + .dram_sdqs1 = 0x00000030, + .dram_sdqs2 = 0x00000030, + .dram_sdqs3 = 0x00000030, + .dram_sdqs4 = 0x00000030, + .dram_sdqs5 = 0x00000030, + .dram_sdqs6 = 0x00000030, + .dram_sdqs7 = 0x00000030, + + .dram_dqm0 = 0x00000030, + .dram_dqm1 = 0x00000030, + .dram_dqm2 = 0x00000030, + .dram_dqm3 = 0x00000030, + .dram_dqm4 = 0x00000030, + .dram_dqm5 = 0x00000030, + .dram_dqm6 = 0x00000030, + .dram_dqm7 = 0x00000030, +}; + +static const struct mx6dq_iomux_grp_regs mx6_grp_ioregs = { + .grp_ddr_type = 0x000c0000, + .grp_ddrmode_ctl = 0x00020000, + .grp_ddrpke = 0x00000000, + .grp_addds = 0x00000030, + .grp_ctlds = 0x00000030, + .grp_ddrmode = 0x00020000, + .grp_b0ds = 0x00000030, + .grp_b1ds = 0x00000030, + .grp_b2ds = 0x00000030, + .grp_b3ds = 0x00000030, + .grp_b4ds = 0x00000030, + .grp_b5ds = 0x00000030, + .grp_b6ds = 0x00000030, + .grp_b7ds = 0x00000030, +}; + +/* 4x128Mx16.cfg */ +static const struct mx6_mmdc_calibration mx6_4x256mx16_mmdc_calib = { + .p0_mpwldectrl0 = 0x002D0028, + .p0_mpwldectrl1 = 0x0032002D, + .p1_mpwldectrl0 = 0x00210036, + .p1_mpwldectrl1 = 0x0019002E, + .p0_mpdgctrl0 = 0x4349035C, + .p0_mpdgctrl1 = 0x0348033D, + .p1_mpdgctrl0 = 0x43550362, + .p1_mpdgctrl1 = 0x03520316, + .p0_mprddlctl = 0x41393940, + .p1_mprddlctl = 0x3F3A3C47, + .p0_mpwrdlctl = 0x413A423A, + .p1_mpwrdlctl = 0x4042483E, +}; + +/* MT41K128M16JT-125 (2Gb density) */ +static const struct mx6_ddr3_cfg mt41k128m16jt_125 = { + .mem_speed = 1600, + .density = 2, + .width = 16, + .banks = 8, + .rowaddr = 14, + .coladdr = 10, + .pagesz = 2, + .trcd = 1375, + .trcmin = 4875, + .trasmin = 3500, +}; + +static void ccgr_init(void) +{ + struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + + writel(0x00C03F3F, &ccm->CCGR0); + writel(0x0030FC3F, &ccm->CCGR1); + writel(0x0FFFCFC0, &ccm->CCGR2); + writel(0x3FF00000, &ccm->CCGR3); + writel(0x00FFF300, &ccm->CCGR4); + writel(0x0F0000C3, &ccm->CCGR5); + writel(0x000003FF, &ccm->CCGR6); +} + +static void spl_dram_init(void) +{ + struct mx6_ddr_sysinfo sysinfo = { + /* width of data bus:0=16,1=32,2=64 */ + .dsize = 2, + /* config for full 4GB range so that get_mem_size() works */ + .cs_density = 32, /* 32Gb per CS */ + /* single chip select */ + .ncs = 1, + .cs1_mirror = 0, + .rtt_wr = 1 /*DDR3_RTT_60_OHM*/, /* RTT_Wr = RZQ/4 */ + .rtt_nom = 2 /*DDR3_RTT_120_OHM*/, /* RTT_Nom = RZQ/2 */ + .walat = 1, /* Write additional latency */ + .ralat = 5, /* Read additional latency */ + .mif3_mode = 3, /* Command prediction working mode */ + .bi_on = 1, /* Bank interleaving enabled */ + .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */ + .rst_to_cke = 0x23, /* 33 cycles, 500us (JEDEC default) */ + .pd_fast_exit = 1, /* enable precharge power-down fast exit */ + .ddr_type = DDR_TYPE_DDR3, + .refsel = 1, /* Refresh cycles at 32KHz */ + .refr = 7, /* 8 refresh commands per refresh cycle */ + }; + + mx6dq_dram_iocfg(64, &mx6_ddr_ioregs, &mx6_grp_ioregs); + mx6_dram_cfg(&sysinfo, &mx6_4x256mx16_mmdc_calib, &mt41k128m16jt_125); +} + +#ifdef CONFIG_SPL_SPI_SUPPORT +static void displ5_init_ecspi(void) +{ + displ5_set_iomux_ecspi_spl(); + enable_spi_clk(1, 1); +} +#else +static inline void displ5_init_ecspi(void) { } +#endif + +#ifdef CONFIG_SPL_MMC_SUPPORT +static struct fsl_esdhc_cfg usdhc_cfg = { + .esdhc_base = USDHC4_BASE_ADDR, + .max_bus_width = 8, +}; + +int board_mmc_init(bd_t *bd) +{ + displ5_set_iomux_usdhc_spl(); + + usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + gd->arch.sdhc_clk = usdhc_cfg.sdhc_clk; + + return fsl_esdhc_initialize(bd, &usdhc_cfg); +} +#endif + +void board_init_f(ulong dummy) +{ + ccgr_init(); + + arch_cpu_init(); + + gpr_init(); + + /* setup GP timer */ + timer_init(); + + displ5_set_iomux_uart_spl(); + + /* UART clocks enabled and gd valid - init serial console */ + preloader_console_init(); + + displ5_init_ecspi(); + + /* DDR initialization */ + spl_dram_init(); + + /* Clear the BSS. */ + memset(__bss_start, 0, __bss_end - __bss_start); + + /* load/boot image from boot device */ + board_init_r(NULL, 0); +} + +void board_boot_order(u32 *spl_boot_list) +{ + /* Default boot sequence SPI -> MMC */ + spl_boot_list[0] = spl_boot_device(); + spl_boot_list[1] = BOOT_DEVICE_MMC1; + spl_boot_list[2] = BOOT_DEVICE_UART; + spl_boot_list[3] = BOOT_DEVICE_NONE; + +#ifdef CONFIG_SPL_ENV_SUPPORT + /* 'fastboot' */ + const char *s; + + env_init(); + env_load(); + + s = env_get("BOOT_FROM"); + if (s && strcmp(s, "ACTIVE") == 0) { + spl_boot_list[0] = BOOT_DEVICE_MMC1; + spl_boot_list[1] = spl_boot_device(); + } +#endif +} + +void reset_cpu(ulong addr) {} + +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{ + return 0; +} +#endif + +#ifdef CONFIG_SPL_OS_BOOT +/* Return: 1 - boot to U-Boot. 0 - boot OS (falcon mode) */ +int spl_start_uboot(void) +{ + /* break into full u-boot on 'c' */ + if (serial_tstc() && serial_getc() == 'c') + return 1; + +#ifdef CONFIG_SPL_ENV_SUPPORT + if (env_get_yesno("boot_os") != 1) + return 1; +#endif + return 0; +} +#endif diff --git a/board/nvidia/p2771-0000/MAINTAINERS b/board/nvidia/p2771-0000/MAINTAINERS index 4fc4ebd5e07..cf4913a9a1d 100644 --- a/board/nvidia/p2771-0000/MAINTAINERS +++ b/board/nvidia/p2771-0000/MAINTAINERS @@ -3,4 +3,5 @@ M: Stephen Warren <swarren@nvidia.com> S: Maintained F: board/nvidia/p2771-0000/ F: include/configs/p2771-0000.h -F: configs/p2771-0000_defconfig +F: configs/p2771-0000-000_defconfig +F: configs/p2771-0000-500_defconfig diff --git a/board/phytec/pcm052/MAINTAINERS b/board/phytec/pcm052/MAINTAINERS index a877436bd38..66fe06e49c0 100644 --- a/board/phytec/pcm052/MAINTAINERS +++ b/board/phytec/pcm052/MAINTAINERS @@ -2,5 +2,7 @@ PCM052 BOARD M: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr> S: Maintained F: board/phytec/pcm052/ +F: include/configs/bk4r1.h F: include/configs/pcm052.h +F: configs/bk4r1_defconfig F: configs/pcm052_defconfig diff --git a/board/renesas/blanche/MAINTAINERS b/board/renesas/blanche/MAINTAINERS new file mode 100644 index 00000000000..4b3114aceb9 --- /dev/null +++ b/board/renesas/blanche/MAINTAINERS @@ -0,0 +1,7 @@ +BLANCHE BOARD +M: Masakazu Mochizuki <masakazu.mochizuki.wd@hitachi.com> +S: Maintained +F: board/renesas/blanche/ +F: include/configs/blanche.h +F: configs/blanche_defconfig + diff --git a/board/rockchip/evb_rk3399/MAINTAINERS b/board/rockchip/evb_rk3399/MAINTAINERS index c825d5e219b..caad30641ec 100644 --- a/board/rockchip/evb_rk3399/MAINTAINERS +++ b/board/rockchip/evb_rk3399/MAINTAINERS @@ -4,3 +4,4 @@ S: Maintained F: board/rockchip/evb_rk3399 F: include/configs/evb_rk3399.h F: configs/evb-rk3399_defconfig +F: configs/firefly-rk3399_defconfig diff --git a/board/samsung/espresso7420/MAINTAINERS b/board/samsung/espresso7420/MAINTAINERS index aaebc4c22d6..e3b2394cceb 100644 --- a/board/samsung/espresso7420/MAINTAINERS +++ b/board/samsung/espresso7420/MAINTAINERS @@ -3,3 +3,4 @@ M: Thomas Abraham <thomas.ab@samsung.com> S: Maintained F: board/samsung/espresso7420/ F: include/configs/espresso7420.h +F: configs/espresso7420_defconfig diff --git a/board/st/stih410-b2260/Makefile b/board/st/stih410-b2260/Makefile index 68a7903712c..8293ae914de 100644 --- a/board/st/stih410-b2260/Makefile +++ b/board/st/stih410-b2260/Makefile @@ -1,6 +1,6 @@ # -# (C) Copyright 2017 -# Patrice Chotard, <patrice.chotard@st.com> +# Copyright (C) 2017, STMicroelectronics - All Rights Reserved +# Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics. # # SPDX-License-Identifier: GPL-2.0+ # diff --git a/board/st/stih410-b2260/board.c b/board/st/stih410-b2260/board.c index d6cbbb866a8..fe639dcc2e3 100644 --- a/board/st/stih410-b2260/board.c +++ b/board/st/stih410-b2260/board.c @@ -1,7 +1,6 @@ /* - * Board init file for STiH410-B2260 - * - * (C) Copyright 2017 Patrice Chotard <patrice.chotard@st.com> + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/board/st/stm32f746-disco/Makefile b/board/st/stm32f746-disco/Makefile index db8a0a4dcf1..00b072b5ee5 100644 --- a/board/st/stm32f746-disco/Makefile +++ b/board/st/stm32f746-disco/Makefile @@ -1,6 +1,6 @@ # -# (C) Copyright 2016 -# Vikas Manocha <vikas.manocha@st.com> +# Copyright (C) 2016, STMicroelectronics - All Rights Reserved +# Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. # # SPDX-License-Identifier: GPL-2.0+ # diff --git a/board/st/stm32f746-disco/stm32f746-disco.c b/board/st/stm32f746-disco/stm32f746-disco.c index f31768e62e7..2e8aa86e817 100644 --- a/board/st/stm32f746-disco/stm32f746-disco.c +++ b/board/st/stm32f746-disco/stm32f746-disco.c @@ -1,6 +1,6 @@ /* - * (C) Copyright 2016 - * Vikas Manocha, <vikas.manocha@st.com> + * Copyright (C) 2016, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/board/st/stm32h743-disco/Makefile b/board/st/stm32h743-disco/Makefile index 778fe1c97f6..8c313b26853 100644 --- a/board/st/stm32h743-disco/Makefile +++ b/board/st/stm32h743-disco/Makefile @@ -1,6 +1,6 @@ # -# Copyright (C) STMicroelectronics SA 2017 -# Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.# +# Copyright (C) 2017, STMicroelectronics - All Rights Reserved +# Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics. # # SPDX-License-Identifier: GPL-2.0+ # diff --git a/board/st/stm32h743-disco/stm32h743-disco.c b/board/st/stm32h743-disco/stm32h743-disco.c index 625b3a077bc..226b7045d27 100644 --- a/board/st/stm32h743-disco/stm32h743-disco.c +++ b/board/st/stm32h743-disco/stm32h743-disco.c @@ -1,6 +1,6 @@ /* - * Copyright (C) STMicroelectronics SA 2017 - * Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics. + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/board/st/stm32h743-eval/Makefile b/board/st/stm32h743-eval/Makefile index 4f25b2d96bb..5482e9dc19b 100644 --- a/board/st/stm32h743-eval/Makefile +++ b/board/st/stm32h743-eval/Makefile @@ -1,6 +1,6 @@ # -# (C) Copyright 2017 -# Patrice Chotard, <patrice.chotard@st.com> +# Copyright (C) 2017, STMicroelectronics - All Rights Reserved +# Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics. # # SPDX-License-Identifier: GPL-2.0+ # diff --git a/board/st/stm32h743-eval/stm32h743-eval.c b/board/st/stm32h743-eval/stm32h743-eval.c index 625b3a077bc..226b7045d27 100644 --- a/board/st/stm32h743-eval/stm32h743-eval.c +++ b/board/st/stm32h743-eval/stm32h743-eval.c @@ -1,6 +1,6 @@ /* - * Copyright (C) STMicroelectronics SA 2017 - * Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics. + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/board/st/stv0991/Makefile b/board/st/stv0991/Makefile index fb5169a3c51..6fb4135f5da 100644 --- a/board/st/stv0991/Makefile +++ b/board/st/stv0991/Makefile @@ -1,6 +1,6 @@ # -# (C) Copyright 2014 -# Vikas Manocha, ST Microelectronics, vikas.manocha@stcom +# Copyright (C) 2014, STMicroelectronics - All Rights Reserved +# Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. # # SPDX-License-Identifier: GPL-2.0+ # diff --git a/board/st/stv0991/stv0991.c b/board/st/stv0991/stv0991.c index 85ac66ec3ae..670d59c9264 100644 --- a/board/st/stv0991/stv0991.c +++ b/board/st/stv0991/stv0991.c @@ -1,6 +1,6 @@ /* - * (C) Copyright 2014 - * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com. + * Copyright (C) 2014, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 26c452e1b3a..99809c6a1ce 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -26,6 +26,7 @@ F: configs/A13-OLinuXinoM_defconfig F: configs/Auxtek-T003_defconfig F: configs/Auxtek-T004_defconfig F: configs/CHIP_defconfig +F: configs/CHIP_pro_defconfig F: configs/difrnce_dit4350_defconfig F: configs/Empire_electronix_d709_defconfig F: configs/Empire_electronix_m712_defconfig @@ -44,6 +45,7 @@ F: configs/Mele_M9_defconfig F: configs/Sinovoip_BPI_M2_defconfig F: include/configs/sun7i.h F: configs/A20-OLinuXino_MICRO_defconfig +F: configs/A20-OLinuXino_MICRO-eMMC_defconfig F: configs/Bananapi_defconfig F: configs/Bananapro_defconfig F: configs/i12-tvbox_defconfig @@ -54,6 +56,7 @@ F: configs/Orangepi_mini_defconfig F: configs/qt840a_defconfig F: configs/Wits_Pro_A20_DKT_defconfig F: include/configs/sun8i.h +F: configs/sun8i_a23_evb_defconfig F: configs/ga10h_v1_1_defconfig F: configs/gt90h_v4_defconfig F: configs/inet86dz_defconfig @@ -129,6 +132,12 @@ S: Maintained F: configs/Bananapi_M2_Ultra_defconfig F: arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts +BANANAPI M2 MAGIC BOARD +M: Maxime Ripard <maxime.ripard@free-electrons.com> +S: Maintained +F: configs/Bananapi_m2m_defconfig +F: arch/arm/dts/sun8i-r16-bananapi-m2m.dts + BANANAPI M64 M: Jagan Teki <jagan@amarulasolutions.com> S: Maintained diff --git a/common/image-sig.c b/common/image-sig.c index 455f2b96294..bf824fef3c7 100644 --- a/common/image-sig.c +++ b/common/image-sig.c @@ -32,42 +32,42 @@ void *image_get_host_blob(void) struct checksum_algo checksum_algos[] = { { - "sha1", - SHA1_SUM_LEN, - SHA1_DER_LEN, - sha1_der_prefix, + .name = "sha1", + .checksum_len = SHA1_SUM_LEN, + .der_len = SHA1_DER_LEN, + .der_prefix = sha1_der_prefix, #if IMAGE_ENABLE_SIGN - EVP_sha1, + .calculate_sign = EVP_sha1, #endif - hash_calculate, + .calculate = hash_calculate, }, { - "sha256", - SHA256_SUM_LEN, - SHA256_DER_LEN, - sha256_der_prefix, + .name = "sha256", + .checksum_len = SHA256_SUM_LEN, + .der_len = SHA256_DER_LEN, + .der_prefix = sha256_der_prefix, #if IMAGE_ENABLE_SIGN - EVP_sha256, + .calculate_sign = EVP_sha256, #endif - hash_calculate, + .calculate = hash_calculate, } }; struct crypto_algo crypto_algos[] = { { - "rsa2048", - RSA2048_BYTES, - rsa_sign, - rsa_add_verify_data, - rsa_verify, + .name = "rsa2048", + .key_len = RSA2048_BYTES, + .sign = rsa_sign, + .add_verify_data = rsa_add_verify_data, + .verify = rsa_verify, }, { - "rsa4096", - RSA4096_BYTES, - rsa_sign, - rsa_add_verify_data, - rsa_verify, + .name = "rsa4096", + .key_len = RSA4096_BYTES, + .sign = rsa_sign, + .add_verify_data = rsa_add_verify_data, + .verify = rsa_verify, } }; diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 0bd8370337b..e987c07f5a7 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -142,11 +142,12 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR default 0x50 if ARCH_SUNXI default 0x75 if ARCH_DAVINCI default 0x8a if ARCH_MX6 - default 0x100 if ARCH_ROCKCHIP || ARCH_UNIPHIER + default 0x100 if ARCH_UNIPHIER default 0x140 if ARCH_MVEBU default 0x200 if ARCH_SOCFPGA || ARCH_AT91 default 0x300 if ARCH_ZYNQ || ARCH_KEYSTONE || OMAP34XX || OMAP44XX || \ OMAP54XX || AM33XX || AM43XX + default 0x4000 if ARCH_ROCKCHIP help Address on the MMC to load U-Boot from, when the MMC is being used in raw mode. Units: MMC sectors (1 sector = 512 bytes). diff --git a/common/spl/spl_xip.c b/common/spl/spl_xip.c index 18c7d11f2d1..3f6420ba1e9 100644 --- a/common/spl/spl_xip.c +++ b/common/spl/spl_xip.c @@ -1,5 +1,6 @@ /* - * Copyright (C) 2017 Vikas Manocha <vikas.manocha@st.com> + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/configs/display5_defconfig b/configs/display5_defconfig new file mode 100644 index 00000000000..dfd9c2c2988 --- /dev/null +++ b/configs/display5_defconfig @@ -0,0 +1,62 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_TARGET_DISPLAY5=y +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-display5" +CONFIG_FIT=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q" +CONFIG_SPL=y +# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set +CONFIG_SPL_DMA_SUPPORT=y +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_SAVEENV=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_OS_BOOT=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="display5 > " +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_ELF is not set +CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y +CONFIG_CMD_EEPROM=y +# CONFIG_CMD_FPGA is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y +CONFIG_CMD_SF=y +CONFIG_CMD_SPI=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nor0=02008000.spi.1" +CONFIG_MTDPARTS_DEFAULT="mtdparts=02008000.spi.1:128k(SPL),1m(u-boot),64k(env1),64k(env2),8m(lin-recovery),4m(swu-kernel),8m(swu-initramfs),-(reserved)" +CONFIG_EFI_PARTITION=y +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_OF_CONTROL=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PHYLIB=y +CONFIG_PHY_MARVELL=y +CONFIG_NETDEVICES=y +CONFIG_FEC_MXC=y +# CONFIG_SPL_DM_SERIAL is not set +CONFIG_MXC_UART=y diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig new file mode 100644 index 00000000000..3f10ffad03d --- /dev/null +++ b/configs/display5_factory_defconfig @@ -0,0 +1,76 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_TARGET_DISPLAY5=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y +CONFIG_FIT=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q" +CONFIG_BOOTDELAY=3 +CONFIG_SPL=y +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set +CONFIG_SPL_DMA_SUPPORT=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_OS_BOOT=y +CONFIG_SPL_USB_HOST_SUPPORT=y +CONFIG_SPL_USB_GADGET_SUPPORT=y +CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="display5 factory > " +CONFIG_BOOTCMD_OVERRIDE=y +CONFIG_BOOTCOMMAND="run factory" +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_ELF is not set +CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y +CONFIG_CMD_EEPROM=y +CONFIG_CMD_DFU=y +# CONFIG_CMD_FPGA is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y +CONFIG_CMD_SF=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB_SDP=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nor0=02008000.spi.1" +CONFIG_MTDPARTS_DEFAULT="mtdparts=02008000.spi.1:128k(SPL),1m(u-boot),64k(env1),64k(env2),8m(lin-recovery),4m(swu-kernel),8m(swu-initramfs),-(reserved)" +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_PARTITION_TYPE_GUID=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_DFU_MMC=y +CONFIG_DFU_SF=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PHYLIB=y +CONFIG_NETDEVICES=y +CONFIG_FEC_MXC=y +# CONFIG_SPL_DM_SERIAL is not set +CONFIG_MXC_UART=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Liebherr" +CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 +CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 +CONFIG_CI_UDC=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_OF_LIBFDT=y diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index 42df743cbe2..7b5ea821f90 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -12,7 +12,6 @@ CONFIG_SPL_LOAD_FIT=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 -CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig index 262048843fc..dc3cda4260c 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig @@ -12,7 +12,6 @@ CONFIG_SPL_LOAD_FIT=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 -CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 CONFIG_SPL_ATF_SUPPORT=y CONFIG_SPL_ATF_TEXT_BASE=0x00010000 CONFIG_CMD_BOOTZ=y diff --git a/configs/mx25pdk_defconfig b/configs/mx25pdk_defconfig index 1ea58eee95a..81a12f13a95 100644 --- a/configs/mx25pdk_defconfig +++ b/configs/mx25pdk_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_ARCH_MX25=y CONFIG_TARGET_MX25PDK=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg" CONFIG_BOOTDELAY=1 diff --git a/configs/zmx25_defconfig b/configs/zmx25_defconfig index f323db3d8cd..4c4a3611c80 100644 --- a/configs/zmx25_defconfig +++ b/configs/zmx25_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_ARCH_MX25=y CONFIG_TARGET_ZMX25=y CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_CPUINFO is not set diff --git a/disk/part_dos.c b/disk/part_dos.c index 6dd2c2d147d..046f9bbb3d6 100644 --- a/disk/part_dos.c +++ b/disk/part_dos.c @@ -220,7 +220,7 @@ static int part_get_info_extended(struct blk_desc *dev_desc, if (((pt->boot_ind & ~0x80) == 0) && (pt->sys_ind != 0) && (part_num == which_part) && - (is_extended(pt->sys_ind) == 0)) { + (ext_part_sector == 0 || is_extended(pt->sys_ind) == 0)) { info->blksz = DOS_PART_DEFAULT_SECTOR; info->start = (lbaint_t)(ext_part_sector + le32_to_int(pt->start4)); diff --git a/disk/part_efi.c b/disk/part_efi.c index 7862beeea6f..f6f5bee8cd8 100644 --- a/disk/part_efi.c +++ b/disk/part_efi.c @@ -622,25 +622,27 @@ int gpt_fill_header(struct blk_desc *dev_desc, gpt_header *gpt_h, int gpt_restore(struct blk_desc *dev_desc, char *str_disk_guid, disk_partition_t *partitions, int parts_count) { - int ret; - - gpt_header *gpt_h = calloc(1, PAD_TO_BLOCKSIZE(sizeof(gpt_header), - dev_desc)); + gpt_header *gpt_h; gpt_entry *gpt_e; + int ret, size; + size = PAD_TO_BLOCKSIZE(sizeof(gpt_header), dev_desc); + gpt_h = malloc_cache_aligned(size); if (gpt_h == NULL) { printf("%s: calloc failed!\n", __func__); return -1; } + memset(gpt_h, 0, size); - gpt_e = calloc(1, PAD_TO_BLOCKSIZE(GPT_ENTRY_NUMBERS - * sizeof(gpt_entry), - dev_desc)); + size = PAD_TO_BLOCKSIZE(GPT_ENTRY_NUMBERS * sizeof(gpt_entry), + dev_desc); + gpt_e = malloc_cache_aligned(size); if (gpt_e == NULL) { printf("%s: calloc failed!\n", __func__); free(gpt_h); return -1; } + memset(gpt_e, 0, size); /* Generate Primary GPT header (LBA1) */ ret = gpt_fill_header(dev_desc, gpt_h, str_disk_guid, parts_count); diff --git a/doc/README.m54418twr b/doc/README.m54418twr index f69ae01912d..1d90fccbcff 100644 --- a/doc/README.m54418twr +++ b/doc/README.m54418twr @@ -13,6 +13,8 @@ Changed files: - board/freescale/m54418twr/Makefile Makefile - board/freescale/m54418twr/config.mk config make - board/freescale/m54418twr/u-boot.lds Linker description +- board/freescale/m54418twr/sbf_dram_init.S + DDR/SDRAM initialization - arch/m68k/cpu/mcf5445x/cpu.c cpu specific code - arch/m68k/cpu/mcf5445x/cpu_init.c Flexbus ChipSelect, Mux pins setup, icache and RTC extra regs diff --git a/doc/README.m68k b/doc/README.m68k index 9d5c08f768c..f867ca1fbbb 100644 --- a/doc/README.m68k +++ b/doc/README.m68k @@ -1,96 +1,90 @@ -U-Boot for Motorola M68K +U-Boot for Motorola (or Freescale/NXP) ColdFire processors -==================================================================== +=============================================================================== History -August 08,2005; Jens Scharsig <esw@bus-elektronik.de> +November 02, 2017 Angelo Dureghello <angelo@sysam.it> +August 08, 2005 Jens Scharsig <esw@bus-elektronik.de> MCF5282 implementation without preloader -January 12, 2004; <josef.baumgartner@telex.de> -==================================================================== +January 12, 2004 <josef.baumgartner@telex.de> +=============================================================================== + This file contains status information for the port of U-Boot to the -Motorola M68K series of CPUs. +Motorola ColdFire series of CPUs. + + +1. Overview -1. OVERVIEW ------------ -Bernhard Kuhn ported U-Boot 0.4.0 to the Motorola Coldfire -architecture. The patches of Bernhard support the MCF5272 and -MCF5282. A great disadvantage of these patches was that they needed -a pre-bootloader to start U-Boot. Because of this, a new port was -created which no longer needs a first stage booter. +The ColdFire instruction set is "assembly source" compatible but an evolution +of the original 68000 instruction set. Some not much used instructions has +been removed. The instructions are only 16, 32, or 48 bits long, a +simplification compared to the 68000 series. -Although this port is intended to cover all M68k processors, only -the parts for the Motorola Coldfire MCF5272 and MCF5282 are -implemented at the moment. Additional CPUs and boards will be -hopefully added soon! +Bernhard Kuhn ported U-Boot 0.4.0 to the Motorola ColdFire architecture. +The patches of Bernhard support the MCF5272 and MCF5282. A great disadvantage +of these patches was that they needed a pre-bootloader to start U-Boot. +Because of this, a new port was created which no longer needs a first stage +booter. +Thanks mainly to Freescale but also to several other contributors, U-Boot now +supports nearly the entire range of ColdFire processors and their related +development boards. -2. SUPPORTED CPUs ------------------ -2.1 Motorola Coldfire MCF5272 ------------------------------ -CPU specific code is located in: arch/m68k/cpu/mcf52x2 +2. Supported CPU families +Please "make menuconfig" with ARCH=m68k, or check arch/m68k/cpu to see the +currently supported processor and families. -2.1 Motorola Coldfire MCF5282 ------------------------------ -CPU specific code is located in: arch/m68k/cpu/mcf52x2 -The MCF5282 Port no longer needs a preloader and can place in external or -internal FLASH. +3. Supported boards +U-Boot supports actually more than 40 ColdFire based boards. +Board configuration can be done trough include/configs/<boardname>.h but the +current recommended method is to use the new and more friendly approach as +the "make menuconfig" way, very similar to the Linux way. -3. SUPPORTED BOARDs -------------------- +To know details as memory map, build targets, default setup, etc, of a +specific board please check: -3.1 Motorola M5272C3 EVB ------------------------- -Board specific code is located in: board/m5272c3 +include/configs/<boardname>.h +and/or +configs/<boardname>_defconfig -To configure the board, type: make M5272C3_config +It is possible to build all ColdFire boards in a single command-line command, +from u-boot root directory, as: -U-Boot Memory Map: ------------------- -0xffe00000 - 0xffe3ffff U-Boot -0xffe04000 - 0xffe05fff environment (embedded in U-Boot!) -0xffe40000 - 0xffffffff free for linux/applications +./tools/buildman/buildman m68k -3.2 Motorola M5282 EVB ------------------------- -Board specific code is located in: board/m5282evb +3.1. Build U-Boot for a specific board -To configure the board, type: make M5272C3_config +A bash script similar to the one below may be used: -At the moment the code isn't fully implemented and still needs a pre-loader! -The preloader must initialize the processor and then start U-Boot. The board -must be configured for a pre-loader (see 4.1) +#!/bin/bash -For the preloader, please see -http://mailman.uclinux.org/pipermail/uclinux-dev/2003-December/023384.html +export CROSS_COMPILE=/opt/toolchains/m68k/gcc-4.9.0-nolibc/bin/m68k-linux- -U-Boot is configured to run at 0x20000 at default. This can be configured by -change CONFIG_SYS_TEXT_BASE in board/m5282evb/config.mk and CONFIG_SYS_MONITOR_BASE in -include/configs/M5282EVB.h. +board=M5475DFE -3.2 BuS EB+MCF-EV123 ---------------------- +make distclean +make ARCH=m68k ${board}_defconfig +make ARCH=m68k KBUILD_VERBOSE=1 -Board specific code is located in: board/bus/EB+MCF-EV123 -To configure the board, type: +4. Adopted toolchains -make EB+MCF-EV123_config for external FLASH -make EB+MCF-EV123_internal_config for internal FLASH +Please check: +https://www.denx.de/wiki/U-Boot/ColdFireNotes -4. CONFIGURATION OPTIONS/SETTINGS ----------------------------------- +5. ColdFire specific configuration options/settings + + +5.1. Configuration to use a pre-loader -4.1 Configuration to use a pre-loader -------------------------------------- If U-Boot should be loaded to RAM and started by a pre-loader CONFIG_MONITOR_IS_IN_RAM must be defined. If it is defined the initial vector table and basic processor initialization will not @@ -98,69 +92,59 @@ be compiled in. The start address of U-Boot must be adjusted in the boards config header file (CONFIG_SYS_MONITOR_BASE) and Makefile (CONFIG_SYS_TEXT_BASE) to the load address. -4.1 MCF5272 specific Options/Settings -------------------------------------- -CONFIG_MCF52x2 -- defined for all MCF52x2 CPUs -CONFIG_M5272 -- defined for all Motorola MCF5272 CPUs - -CONFIG_MONITOR_IS_IN_RAM - -- defined if U-Boot is loaded by a pre-loader - -CONFIG_SYS_MBAR -- defines the base address of the MCF5272 configuration registers -CONFIG_SYS_INIT_RAM_ADDR - -- defines the base address of the MCF5272 internal SRAM -CONFIG_SYS_ENET_BD_BASE - -- defines the base address of the FEC buffer descriptors +5.2 ColdFire CPU specific options/settings -CONFIG_SYS_SCR -- defines the contents of the System Configuration Register -CONFIG_SYS_SPR -- defines the contents of the System Protection Register -CONFIG_SYS_BRx_PRELIM -- defines the contents of the Chip Select Base Registers -CONFIG_SYS_ORx_PRELIM -- defines the contents of the Chip Select Option Registers - -CONFIG_SYS_PxDDR -- defines the contents of the Data Direction Registers -CONFIG_SYS_PxDAT -- defines the contents of the Data Registers -CONFIG_SYS_PXCNT -- defines the contents of the Port Configuration Registers - - -4.2 MCF5282 specific Options/Settings -------------------------------------- +To specify a CPU model, some defines shoudl be used, i.e.: CONFIG_MCF52x2 -- defined for all MCF52x2 CPUs -CONFIG_M5282 -- defined for all Motorola MCF5282 CPUs +CONFIG_M5272 -- defined for all Motorola MCF5272 CPUs -CONFIG_MONITOR_IS_IN_RAM - -- defined if U-Boot is loaded by a pre-loader +Other options, generally set inside include/configs/<boardname>.h, they may +apply to one or more cpu for the ColdFire family: -CONFIG_SYS_MBAR -- defines the base address of the MCF5282 internal register space -CONFIG_SYS_INIT_RAM_ADDR - -- defines the base address of the MCF5282 internal SRAM -CONFIG_SYS_INT_FLASH_BASE - -- defines the base address of the MCF5282 internal Flash memory +CONFIG_SYS_MBAR -- defines the base address of the MCF5272 configuration + registers CONFIG_SYS_ENET_BD_BASE -- defines the base address of the FEC buffer descriptors - -CONFIG_SYS_MFD - -- defines the PLL Multiplication Factor Devider +CONFIG_SYS_SCR -- defines the contents of the System Configuration Register +CONFIG_SYS_SPR -- defines the contents of the System Protection Register +CONFIG_SYS_MFD -- defines the PLL Multiplication Factor Divider (see table 9-4 of MCF user manual) -CONFIG_SYS_RFD -- defines the PLL Reduce Frecuency Devider +CONFIG_SYS_RFD -- defines the PLL Reduce Frequency Devider (see table 9-4 of MCF user manual) - -CONFIG_SYS_CSx_BASE -- defines the base address of chip select x -CONFIG_SYS_CSx_SIZE -- defines the memory size (address range) of chip select x -CONFIG_SYS_CSx_WIDTH -- defines the bus with of chip select x -CONFIG_SYS_CSx_RO -- if set to 0 chip select x is read/wirte - else chipselct is read only -CONFIG_SYS_CSx_WS -- defines the number of wait states of chip select x - -CONFIG_SYS_PxDDR -- defines the contents of the Data Direction Registers -CONFIG_SYS_PxDAT -- defines the contents of the Data Registers -CONFIG_SYS_PXCNT -- defines the contents of the Port Configuration Registers - -CONFIG_SYS_PxPAR -- defines the function of ports - - -5. COMPILER ------------ -To create U-Boot the gcc-2.95.3 compiler set (m68k-elf-20030314) from uClinux.org was used. -You can download it from: http://www.uclinux.org/pub/uClinux/m68k-elf-tools/ +CONFIG_SYS_CSx_BASE + -- defines the base address of chip select x +CONFIG_SYS_CSx_SIZE + -- defines the memory size (address range) of chip select x +CONFIG_SYS_CSx_WIDTH + -- defines the bus with of chip select x +CONFIG_SYS_CSx_MASK + -- defines the mask for the related chip select x +CONFIG_SYS_CSx_RO + -- if set to 0 chip select x is read/write else chip select + is read only +CONFIG_SYS_CSx_WS + -- defines the number of wait states of chip select x +CONFIG_SYS_CACHE_ICACR +CONFIG_SYS_CACHE_DCACR +CONFIG_SYS_CACHE_ACRX + -- cache-related registers config +CONFIG_SYS_SDRAM_BASE +CONFIG_SYS_SDRAM_SIZE +CONFIG_SYS_SDRAM_BASEX +CONFIG_SYS_SDRAM_CFG1 +CONFIG_SYS_SDRAM_CFG2 +CONFIG_SYS_SDRAM_CTRL +CONFIG_SYS_SDRAM_MODE +CONFIG_SYS_SDRAM_EMOD + -- SDRAM config for SDRAM controller-specific registers, please + see arch/m68k/cpu/<specific_cpu>/start.S files to see how + these options are used. +CONFIG_MCFUART + -- defines enabling of ColdFire UART driver +CONFIG_SYS_UART_PORT + -- defines the UART port to be used (only a single UART can be + actually enabled) +CONFIG_SYS_SBFHDR_SIZE + -- size of the prepended SBF header, if any diff --git a/doc/README.rockchip b/doc/README.rockchip index 4b7be0b7152..9d5af3d53d0 100644 --- a/doc/README.rockchip +++ b/doc/README.rockchip @@ -99,13 +99,13 @@ To write an image that boots from an SD card (assumed to be /dev/sdc): ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \ firefly-rk3288/spl/u-boot-spl-dtb.bin out && \ sudo dd if=out of=/dev/sdc seek=64 && \ - sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=256 + sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=16384 This puts the Rockchip header and SPL image first and then places the U-Boot -image at block 256 (i.e. 128KB from the start of the SD card). This +image at block 16384 (i.e. 4MB from the start of the SD card). This corresponds with this setting in U-Boot: - #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256 + #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x4000 Put this SD (or micro-SD) card into your board and reset it. You should see something like: diff --git a/drivers/clk/clk_stm32f7.c b/drivers/clk/clk_stm32f7.c index 96a06b8f8cb..a273f8ff5eb 100644 --- a/drivers/clk/clk_stm32f7.c +++ b/drivers/clk/clk_stm32f7.c @@ -1,9 +1,10 @@ /* - * (C) Copyright 2017 - * Vikas Manocha, <vikas.manocha@st.com> + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ + #include <common.h> #include <clk-uclass.h> #include <dm.h> diff --git a/drivers/clk/clk_stm32h7.c b/drivers/clk/clk_stm32h7.c index f84a4d2b2f6..c9594d405a0 100644 --- a/drivers/clk/clk_stm32h7.c +++ b/drivers/clk/clk_stm32h7.c @@ -1,6 +1,6 @@ /* - * Copyright (C) STMicroelectronics SA 2017 - * Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics. + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/drivers/gpio/stm32f7_gpio.c b/drivers/gpio/stm32f7_gpio.c index 653e9bef4b3..a7cfb8c9232 100644 --- a/drivers/gpio/stm32f7_gpio.c +++ b/drivers/gpio/stm32f7_gpio.c @@ -1,6 +1,6 @@ /* - * (C) Copyright 2017 - * Vikas Manocha, <vikas.manocha@st.com> + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/drivers/misc/stm32_rcc.c b/drivers/misc/stm32_rcc.c index a6c2a757ec0..32d39719d81 100644 --- a/drivers/misc/stm32_rcc.c +++ b/drivers/misc/stm32_rcc.c @@ -1,6 +1,6 @@ /* - * Copyright (C) STMicroelectronics SA 2017 - * Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics. + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index cc188c42607..499d622c6d9 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -171,20 +171,20 @@ static void esdhc_pio_read_write(struct fsl_esdhc_priv *priv, uint databuf; uint size; uint irqstat; - uint timeout; + ulong start; if (data->flags & MMC_DATA_READ) { blocks = data->blocks; buffer = data->dest; while (blocks) { - timeout = PIO_TIMEOUT; + start = get_timer(0); size = data->blocksize; irqstat = esdhc_read32(®s->irqstat); - while (!(esdhc_read32(®s->prsstat) & PRSSTAT_BREN) - && --timeout); - if (timeout <= 0) { - printf("\nData Read Failed in PIO Mode."); - return; + while (!(esdhc_read32(®s->prsstat) & PRSSTAT_BREN)) { + if (get_timer(start) > PIO_TIMEOUT) { + printf("\nData Read Failed in PIO Mode."); + return; + } } while (size && (!(irqstat & IRQSTAT_TC))) { udelay(100); /* Wait before last byte transfer complete */ @@ -200,14 +200,14 @@ static void esdhc_pio_read_write(struct fsl_esdhc_priv *priv, blocks = data->blocks; buffer = (char *)data->src; while (blocks) { - timeout = PIO_TIMEOUT; + start = get_timer(0); size = data->blocksize; irqstat = esdhc_read32(®s->irqstat); - while (!(esdhc_read32(®s->prsstat) & PRSSTAT_BWEN) - && --timeout); - if (timeout <= 0) { - printf("\nData Write Failed in PIO Mode."); - return; + while (!(esdhc_read32(®s->prsstat) & PRSSTAT_BWEN)) { + if (get_timer(start) > PIO_TIMEOUT) { + printf("\nData Write Failed in PIO Mode."); + return; + } } while (size && (!(irqstat & IRQSTAT_TC))) { udelay(100); /* Wait before last byte transfer complete */ diff --git a/drivers/mmc/sti_sdhci.c b/drivers/mmc/sti_sdhci.c index a98c1eba0f6..1c92bb2b377 100644 --- a/drivers/mmc/sti_sdhci.c +++ b/drivers/mmc/sti_sdhci.c @@ -1,8 +1,8 @@ /* - * Copyright (c) 2017 - * Patrice Chotard <patrice.chotard@st.com> + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. * - * SPDX-License-Identifier: GPL-2.0 + * SPDX-License-Identifier: GPL-2.0+ */ #include <common.h> diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c index 5e43397f8ed..f3b77f512e8 100644 --- a/drivers/mmc/stm32_sdmmc2.c +++ b/drivers/mmc/stm32_sdmmc2.c @@ -1,6 +1,6 @@ /* - * Copyright (C) STMicroelectronics SA 2017 - * Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics. + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/drivers/phy/sti_usb_phy.c b/drivers/phy/sti_usb_phy.c index 88fcfbb3e5b..c671ac648c4 100644 --- a/drivers/phy/sti_usb_phy.c +++ b/drivers/phy/sti_usb_phy.c @@ -1,6 +1,6 @@ /* - * Copyright (c) 2017 - * Patrice Chotard <patrice.chotard@st.com> + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/drivers/pinctrl/pinctrl-sti.c b/drivers/pinctrl/pinctrl-sti.c index 735e412f608..a9c1495f558 100644 --- a/drivers/pinctrl/pinctrl-sti.c +++ b/drivers/pinctrl/pinctrl-sti.c @@ -1,10 +1,10 @@ /* * Pinctrl driver for STMicroelectronics STi SoCs * - * Copyright (c) 2017 - * Patrice Chotard <patrice.chotard@st.com> + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. * - * SPDX-License-Identifier: GPL-2.0 + * SPDX-License-Identifier: GPL-2.0+ */ #include <common.h> diff --git a/drivers/ram/stm32_sdram.c b/drivers/ram/stm32_sdram.c index fdf088e7833..6e92b2222d9 100644 --- a/drivers/ram/stm32_sdram.c +++ b/drivers/ram/stm32_sdram.c @@ -1,6 +1,6 @@ /* - * (C) Copyright 2017 - * Vikas Manocha, <vikas.manocha@st.com> + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/drivers/reset/sti-reset.c b/drivers/reset/sti-reset.c index 024b996f0c1..17786f976a5 100644 --- a/drivers/reset/sti-reset.c +++ b/drivers/reset/sti-reset.c @@ -1,6 +1,6 @@ /* - * Copyright (c) 2017 - * Patrice Chotard <patrice.chotard@st.com> + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/drivers/reset/stm32-reset.c b/drivers/reset/stm32-reset.c index 9c627d879f2..b266f46263c 100644 --- a/drivers/reset/stm32-reset.c +++ b/drivers/reset/stm32-reset.c @@ -1,6 +1,6 @@ /* - * Copyright (C) STMicroelectronics SA 2017 - * Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics. + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/drivers/serial/serial_sti_asc.c b/drivers/serial/serial_sti_asc.c index 8dcd4f8d250..00773cca509 100644 --- a/drivers/serial/serial_sti_asc.c +++ b/drivers/serial/serial_sti_asc.c @@ -1,10 +1,10 @@ /* * Support for Serial I/O using STMicroelectronics' on-chip ASC. * - * Copyright (c) 2017 - * Patrice Chotard <patrice.chotard@st.com> + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. * - * SPDX-License-Identifier: GPL-2.0 + * SPDX-License-Identifier: GPL-2.0+ */ #include <common.h> diff --git a/drivers/serial/serial_stm32x7.c b/drivers/serial/serial_stm32x7.c index a5d529cab28..d1580e3cb52 100644 --- a/drivers/serial/serial_stm32x7.c +++ b/drivers/serial/serial_stm32x7.c @@ -1,6 +1,6 @@ /* - * (C) Copyright 2016 - * Vikas Manocha, <vikas.manocha@st.com> + * Copyright (C) 2016, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/drivers/serial/serial_stm32x7.h b/drivers/serial/serial_stm32x7.h index b914edf28a1..f7dca39103d 100644 --- a/drivers/serial/serial_stm32x7.h +++ b/drivers/serial/serial_stm32x7.h @@ -1,6 +1,6 @@ /* - * (C) Copyright 2016 - * Vikas Manocha, <vikas.manocha@st.com> + * Copyright (C) 2016, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/drivers/sysreset/sysreset_sti.c b/drivers/sysreset/sysreset_sti.c index bf698a737bd..910f4865168 100644 --- a/drivers/sysreset/sysreset_sti.c +++ b/drivers/sysreset/sysreset_sti.c @@ -1,5 +1,6 @@ /* - * (C) Copyright 2017 Patrice Chotard <patrice.chotard@st.com> + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/drivers/timer/sti-timer.c b/drivers/timer/sti-timer.c index e1419c49763..a8bd139e0e2 100644 --- a/drivers/timer/sti-timer.c +++ b/drivers/timer/sti-timer.c @@ -1,5 +1,6 @@ /* - * (C) Copyright 2017 Patrice Chotard <patrice.chotard@st.com> + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/drivers/tpm/tpm_tis_st33zp24_i2c.c b/drivers/tpm/tpm_tis_st33zp24_i2c.c index 9e4829fea2f..c8d01254d22 100644 --- a/drivers/tpm/tpm_tis_st33zp24_i2c.c +++ b/drivers/tpm/tpm_tis_st33zp24_i2c.c @@ -1,7 +1,8 @@ /* * STMicroelectronics TPM ST33ZP24 I2C UBOOT driver * - * Copyright (C) 2016 STMicroelectronics + * Copyright (C) 2016, STMicroelectronics - All Rights Reserved + * Author(s): Christophe Ricard <christophe-h.ricard@st.com> for STMicroelectronics. * * Description: Device driver for ST33ZP24 I2C TPM TCG. * diff --git a/drivers/tpm/tpm_tis_st33zp24_spi.c b/drivers/tpm/tpm_tis_st33zp24_spi.c index 417bbf1c690..dcf55ee03af 100644 --- a/drivers/tpm/tpm_tis_st33zp24_spi.c +++ b/drivers/tpm/tpm_tis_st33zp24_spi.c @@ -1,7 +1,8 @@ /* * STMicroelectronics TPM ST33ZP24 SPI UBOOT driver * - * Copyright (C) 2016 STMicroelectronics + * Copyright (C) 2016, STMicroelectronics - All Rights Reserved + * Author(s): Christophe Ricard <christophe-h.ricard@st.com> for STMicroelectronics. * * Description: Device driver for ST33ZP24 SPI TPM TCG. * diff --git a/drivers/usb/host/dwc3-sti-glue.c b/drivers/usb/host/dwc3-sti-glue.c index 6dc656af89b..67b256140ed 100644 --- a/drivers/usb/host/dwc3-sti-glue.c +++ b/drivers/usb/host/dwc3-sti-glue.c @@ -1,8 +1,8 @@ /* * STiH407 family DWC3 specific Glue layer * - * Copyright (c) 2017 - * Patrice Chotard <patrice.chotard@st.com> + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/include/configs/display5.h b/include/configs/display5.h new file mode 100644 index 00000000000..c41ab8b5e2a --- /dev/null +++ b/include/configs/display5.h @@ -0,0 +1,408 @@ +/* + * Copyright (C) 2017 + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" + +/* Falcon Mode */ +#define CONFIG_CMD_SPL +#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 +#define CONFIG_CMD_SPL_WRITE_SIZE (44 * SZ_1K) + +/* Falcon Mode - MMC support */ +#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x3F00 +#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS \ + (CONFIG_CMD_SPL_WRITE_SIZE / 512) +#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x100 /* 128KiB */ + +/* + * display5 SPI-NOR memory layout + * + * The definition can be found in Kconfig's + * CONFIG_MTDIDS_DEFAULT and CONFIG_MTDPARTS_DEFAULT + * + * 0x000000 - 0x020000 : SPI.SPL (128KiB) + * 0x020000 - 0x120000 : SPI.u-boot (1MiB) + * 0x120000 - 0x130000 : SPI.u-boot-env1 (64KiB) + * 0x130000 - 0x140000 : SPI.u-boot-env2 (64KiB) + * 0x140000 - 0x940000 : SPI.fitImage-recovery (8MiB) + * 0x940000 - 0xD40000 : SPI.swupdate-kernel-FIT (4MiB) + * 0xD40000 - 0x1540000 : SPI.swupdate-initramfs (8MiB) + */ + +#ifndef CONFIG_SPL_BUILD +#define CONFIG_MTD_DEVICE +#define CONFIG_SPI_FLASH_MTD +#define CONFIG_MTD_PARTITIONS +#endif + +/* Below values are "dummy" - only to avoid build break */ +#define CONFIG_SYS_SPI_KERNEL_OFFS 0x150000 +#define CONFIG_SYS_SPI_ARGS_OFFS 0x140000 +#define CONFIG_SYS_SPI_ARGS_SIZE 0x10000 + +#include "imx6_spl.h" +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 +#define CONFIG_SPL_SPI_LOAD + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (16 * 1024 * 1024) +#define CONFIG_MISC_INIT_R + +/*#define CONFIG_MXC_UART*/ +#define CONFIG_MXC_UART_BASE UART5_BASE + +/* SPI NOR Flash */ +#ifdef CONFIG_CMD_SF +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 1 +#define CONFIG_SF_DEFAULT_CS (0 | (IMX_GPIO_NR(5, 29) << 8)) +#define CONFIG_SF_DEFAULT_SPEED 50000000 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#endif + +/* I2C Configs */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_MXC_I2C1 +#define CONFIG_SYS_I2C_MXC_I2C2 +#define CONFIG_SYS_I2C_MXC_I2C3 +#define CONFIG_I2C_MULTI_BUS +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_EDID +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 + +/* Ethernet */ +#ifdef CONFIG_FEC_MXC +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 0 +#define CONFIG_MII +#endif + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CONFIG_SUPPORT_EMMC_BOOT + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_BAUDRATE 115200 + +#ifndef CONFIG_BOOTCOMMAND +#define CONFIG_BOOTCOMMAND "run boot_mmc" +#endif + +#define PARTS_DEFAULT \ + /* Linux partitions */ \ + "partitions=" \ + "uuid_disk=${uuid_gpt_disk};" \ + "name=kernel_raw1,start=128K,size=8M,uuid=${uuid_gpt_kernel_raw1};" \ + "name=rootfs1,size=1528M,uuid=${uuid_gpt_rootfs1};" \ + "name=kernel_raw2,size=8M,uuid=${uuid_gpt_kernel_raw2};" \ + "name=rootfs2,size=1528M,uuid=${uuid_gpt_rootfs2};" \ + "name=data,size=-,uuid=${uuid_gpt_data}\0" + +#define FACTORY_PROCEDURE \ + "echo '#######################';" \ + "echo '# Factory Boot #';" \ + "echo '#######################';" \ + "env default -a;" \ + "saveenv;" \ + "gpt write mmc ${mmcdev} ${partitions};" \ + "run tftp_sf_SPL;" \ + "run tftp_sf_uboot;" \ + TFTP_UPDATE_KERNEL \ + "run tftp_sf_fitImg_recovery;" \ + "run tftp_sf_fitImg_SWU;" \ + "run tftp_sf_initramfs_SWU;" \ + TFTP_UPDATE_ROOTFS \ + "echo '#######################';" \ + "echo '# END - OK #';" \ + "echo '#######################';" \ + "setenv bootcmd 'env default -a; saveenv; run falcon_setup; reset';" \ + "setenv boot_os 'n';" \ + "saveenv;" \ + "reset;" + +#define SWUPDATE_RECOVERY_PROCEDURE \ + "echo '#######################';" \ + "echo '# RECOVERY SWUupdate #';" \ + "echo '#######################';" \ + "setenv loadaddr_swu_initramfs 0x14000000;" \ + "setenv bootargs console=${console} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ + ":${hostname}::off root=/dev/ram rw;" \ + "sf probe;" \ + "sf read ${loadaddr} swu-kernel;" \ + "sf read ${loadaddr_swu_initramfs} swu-initramfs;" \ + "bootm ${loadaddr} ${loadaddr_swu_initramfs};" + +#define KERNEL_RECOVERY_PROCEDURE \ + "echo '#######################';" \ + "echo '# RECOVERY KERNEL IMG #';" \ + "echo '#######################';" \ + "sf probe;" \ + "sf read ${loadaddr} lin-recovery;" \ + "bootm;" + +#define SETUP_BOOTARGS \ + "run set_rootfs_part;" \ + "setenv bootargs ${bootargs} console=${console} " \ + "root=/dev/mmcblk${mmcdev}p${rootfs_part} " \ + "rootwait rootfstype=ext4 rw; " \ + "run set_kernel_part;" \ + "part start mmc ${mmcdev} ${kernel_part} lba_start; " \ + "mmc read ${loadaddr} ${lba_start} 0x2000; " \ + "setenv fdt_conf imx6q-${board}-${display}.dtb; " + +/* All the numbers are in LBAs */ +#define __TFTP_UPDATE_KERNEL \ + "tftp_mmc_fitImg=" \ + "if test ! -n ${kernel_part}; then " \ + "setenv kernel_part ${kernel_part_active};" \ + "fi;" \ + "if tftp ${loadaddr} ${kernel_file}; then " \ + "setexpr fw_sz ${filesize} / 0x200; " \ + "setexpr fw_sz ${fw_sz} + 1; " \ + "part start mmc ${mmcdev} ${kernel_part} lba_start; " \ + "mmc write ${loadaddr} ${lba_start} ${fw_sz}; " \ + "; fi\0" \ + +#define TFTP_UPDATE_KERNEL \ + "setenv kernel_part ${kernel_part_active};" \ + "run tftp_mmc_fitImg;" \ + "setenv kernel_part ${kernel_part_backup};" \ + "run tftp_mmc_fitImg;" \ + +#define __TFTP_UPDATE_ROOTFS \ + "tftp_mmc_rootfs=" \ + "if test ! -n ${rootfs_part}; then " \ + "setenv rootfs_part ${rootfs_part_active};" \ + "fi;" \ + "if tftp ${loadaddr} ${rootfs_file}; then " \ + "setexpr fw_sz ${filesize} / 0x200; " \ + "setexpr fw_sz ${fw_sz} + 1; " \ + "part start mmc ${mmcdev} ${rootfs_part} lba_start; " \ + "mmc write ${loadaddr} ${lba_start} ${fw_sz}; " \ + "; fi\0" \ + +/* To save some considerable time, we only once download the rootfs image */ +/* and store it on 'active' and 'backup' rootfs partitions */ +#define TFTP_UPDATE_ROOTFS \ + "setenv rootfs_part ${rootfs_part_active};" \ + "run tftp_mmc_rootfs;" \ + "part start mmc ${mmcdev} ${rootfs_part_backup} lba_start;" \ + "mmc write ${loadaddr} ${lba_start} ${fw_sz};" \ + +#define TFTP_UPDATE_RECOVERY_SWU_KERNEL \ + "tftp_sf_fitImg_SWU=" \ + "if tftp ${loadaddr} ${kernel_file}; then " \ + "sf probe;" \ + "sf erase swu-kernel +${filesize};" \ + "sf write ${loadaddr} swu-kernel ${filesize};" \ + "; fi\0" \ + +#define TFTP_UPDATE_RECOVERY_SWU_INITRAMFS \ + "swu_initramfs_file=swupdate-image-display5.ext3.gz.u-boot\0" \ + "tftp_sf_initramfs_SWU=" \ + "if tftp ${loadaddr} ${swu_initramfs_file}; then " \ + "sf probe;" \ + "sf erase swu-initramfs +${filesize};" \ + "sf write ${loadaddr} swu-initramfs ${filesize};" \ + "; fi\0" \ + +#define TFTP_UPDATE_RECOVERY_KERNEL_INITRAMFS \ + "kernel_recovery_file=fitImage-initramfs\0" \ + "tftp_sf_fitImg_recovery=" \ + "if tftp ${loadaddr} ${kernel_recovery_file}; then " \ + "sf probe;" \ + "sf erase lin-recovery +${filesize};" \ + "sf write ${loadaddr} lin-recovery ${filesize};" \ + "; fi\0" \ + +#define TFTP_UPDATE_BOOTLOADER \ + "ubootfile=u-boot.img\0" \ + "ubootfileSPL=SPL\0" \ + "tftp_sf_uboot=" \ + "if tftp ${loadaddr} ${ubootfile}; then " \ + "sf probe;" \ + "sf erase u-boot +${filesize};" \ + "sf write ${loadaddr} u-boot ${filesize}" \ + "; fi\0" \ + "tftp_sf_SPL=" \ + "if tftp ${loadaddr} ${ubootfileSPL}; then " \ + "sf probe;" \ + "setexpr uboot_SPL_size ${filesize} + 0x400;" \ + "sf erase 0x0 +${uboot_SPL_size};" \ + "sf write ${loadaddr} 0x400 ${filesize};" \ + "fi\0" \ + +#define CONFIG_EXTRA_ENV_SETTINGS \ + PARTS_DEFAULT \ + "display=tianma-tm070-800x480\0" \ + "board=display5\0" \ + "mmcdev=0\0" \ + "altbootcmd=run recovery\0" \ + "bootdelay=1\0" \ + "baudrate=115200\0" \ + "bootcmd=" CONFIG_BOOTCOMMAND "\0" \ + "factory=" FACTORY_PROCEDURE "\0" \ + "bootlimit=3\0" \ + "ethact=FEC\0" \ + "netdev=eth0\0" \ + "boot_os=y\0" \ + "hostname=display5\0" \ + "loadaddr=0x12000000\0" \ + "fdtaddr=0x12800000\0" \ + "console=ttymxc4,115200 quiet\0" \ + "fdtfile=imx6q-display5.dtb\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "kernel_file=fitImage\0" \ + "up=run tftp_sf_SPL; run tftp_sf_uboot\0" \ + "download_kernel=" \ + "tftpboot ${loadaddr} ${kernel_file};\0" \ + "boot_kernel_recovery=" KERNEL_RECOVERY_PROCEDURE "\0" \ + "boot_swu_recovery=" SWUPDATE_RECOVERY_PROCEDURE "\0" \ + "recovery=" \ + "if test ${BOOT_FROM_RECOVERY} = SWU; then " \ + "echo BOOT: RECOVERY: SWU;" \ + "run boot_swu_recovery;" \ + "else " \ + "echo BOOT: RECOVERY: Linux;" \ + "run boot_kernel_recovery;" \ + "fi\0" \ + "boot_tftp=" \ + "if run download_kernel; then " \ + "setenv bootargs console=${console} " \ + "root=/dev/mmcblk0p2 rootwait;" \ + "bootm ${loadaddr} - ${fdtaddr};" \ + "fi\0" \ + "addip=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:" \ + "${hostname}:eth0:on" \ + "\0" \ + "nfsargs=setenv bootargs " \ + "root=/dev/nfs rw " \ + "nfsroot=${serverip}:${rootpath},nolock,nfsvers=3" \ + "\0" \ + "rootpath=/srv/tftp/DISP5/rootfs\0" \ + "boot_nfs=" \ + "if run download_kernel; then " \ + "run nfsargs;" \ + "run addip;" \ + "setenv bootargs ${bootargs} console=${console};" \ + "setenv fdt_conf imx6q-${board}-${display}.dtb; " \ + "bootm ${loadaddr}#conf@${fdt_conf};" \ + "fi\0" \ + "falcon_setup=" \ + "if mmc dev ${mmcdev}; then " \ + SETUP_BOOTARGS \ + "spl export fdt ${loadaddr}#conf@${fdt_conf};" \ + "setexpr fw_sz ${fdtargslen} / 0x200; " \ + "setexpr fw_sz ${fw_sz} + 1; " \ + "mmc write ${fdtargsaddr} " \ + __stringify(CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR)" ${fw_sz}; " \ + "fi\0" \ + "boot_mmc=" \ + "if mmc dev ${mmcdev}; then " \ + SETUP_BOOTARGS \ + "bootm ${loadaddr}#conf@${fdt_conf};" \ + "fi\0" \ + "set_kernel_part=" \ + "if test ${BOOT_FROM} = ACTIVE; then " \ + "setenv kernel_part ${kernel_part_active};" \ + "echo BOOT: ACTIVE;" \ + "else if test ${BOOT_FROM} = BACKUP; then " \ + "setenv kernel_part ${kernel_part_backup};" \ + "echo BOOT: BACKUP;" \ + "else " \ + "run recovery;" \ + "fi;fi\0" \ + "set_rootfs_part=" \ + "if test ${BOOT_FROM} = ACTIVE; then " \ + "setenv rootfs_part ${rootfs_part_active};" \ + "else if test ${BOOT_FROM} = BACKUP; then " \ + "setenv rootfs_part ${rootfs_part_backup};" \ + "else " \ + "run recovery;" \ + "fi;fi\0" \ + "BOOT_FROM=ACTIVE\0" \ + "BOOT_FROM_RECOVERY=Linux\0" \ + TFTP_UPDATE_BOOTLOADER \ + "kernel_part_active=1\0" \ + "kernel_part_backup=3\0" \ + __TFTP_UPDATE_KERNEL \ + "rootfs_part_active=2\0" \ + "rootfs_part_backup=4\0" \ + "rootfs_file=core-image-lwn-display5.ext4\0" \ + __TFTP_UPDATE_ROOTFS \ + TFTP_UPDATE_RECOVERY_KERNEL_INITRAMFS \ + TFTP_UPDATE_RECOVERY_SWU_KERNEL \ + TFTP_UPDATE_RECOVERY_SWU_INITRAMFS \ + "\0" \ + +/* Miscellaneous configurable options */ +#undef CONFIG_SYS_CBSIZE +#define CONFIG_SYS_CBSIZE 2048 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 32 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_STANDALONE_LOAD_ADDR 0x10001000 +#define CONFIG_SYS_HZ 1000 + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM + +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* Commands */ +#define CONFIG_MTD_PARTITIONS +#define CONFIG_MTD_DEVICE + +/* ENV config */ +#ifdef CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_SIZE (SZ_64K) +/* The 0x120000 value corresponds to above SPI-NOR memory MAP */ +#define CONFIG_ENV_OFFSET (0x120000) +#define CONFIG_ENV_SECT_SIZE (SZ_64K) +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ + CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE + +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#endif /* __CONFIG_H */ diff --git a/include/configs/evb_rk3229.h b/include/configs/evb_rk3229.h index 8906c8f0b1a..ae981f7610d 100644 --- a/include/configs/evb_rk3229.h +++ b/include/configs/evb_rk3229.h @@ -11,8 +11,6 @@ /* Store env in emmc */ -#undef CONFIG_ENV_SIZE -#define CONFIG_ENV_SIZE (32 << 10) #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 0 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT diff --git a/include/configs/kylin_rk3036.h b/include/configs/kylin_rk3036.h index 36009b8599e..d2d630d6107 100644 --- a/include/configs/kylin_rk3036.h +++ b/include/configs/kylin_rk3036.h @@ -13,8 +13,6 @@ #ifndef CONFIG_SPL_BUILD /* Store env in emmc */ -#undef CONFIG_ENV_SIZE -#define CONFIG_ENV_SIZE SZ_32K #define CONFIG_SYS_MMC_ENV_DEV 0 /* emmc */ #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ diff --git a/include/configs/lion_rk3368.h b/include/configs/lion_rk3368.h index 4118ffd65b4..c40dbadc151 100644 --- a/include/configs/lion_rk3368.h +++ b/include/configs/lion_rk3368.h @@ -13,6 +13,5 @@ #define KERNEL_LOAD_ADDR 0x280000 #define DTB_LOAD_ADDR 0x5600000 #define INITRD_LOAD_ADDR 0x5bf0000 -#define CONFIG_ENV_SIZE 0x2000 #endif diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h index bb100c40dfa..8e8946a6b42 100644 --- a/include/configs/mx25pdk.h +++ b/include/configs/mx25pdk.h @@ -11,7 +11,6 @@ /* High Level Configuration Options */ -#define CONFIG_MX25 #define CONFIG_SYS_TEXT_BASE 0x81200000 #define CONFIG_MXC_GPIO #define CONFIG_SYS_FSL_CLK diff --git a/include/configs/puma_rk3399.h b/include/configs/puma_rk3399.h index e481a28ae95..39d07862669 100644 --- a/include/configs/puma_rk3399.h +++ b/include/configs/puma_rk3399.h @@ -17,7 +17,15 @@ #undef CONFIG_ENV_OFFSET #define CONFIG_ENV_OFFSET (240 * 1024) +#if defined(CONFIG_ENV_IS_IN_MMC) #define CONFIG_SYS_MMC_ENV_DEV 1 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif #define SDRAM_BANK_SIZE (2UL << 30) diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index 9ac0df57ded..4ed8f5a6c76 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -10,7 +10,6 @@ #include "rockchip-common.h" #define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_ENV_SIZE 0x2000 #define CONFIG_SYS_MALLOC_LEN (32 << 20) #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SKIP_LOWLEVEL_INIT diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h index 5e462346be2..cfa53647102 100644 --- a/include/configs/rk3188_common.h +++ b/include/configs/rk3188_common.h @@ -14,7 +14,6 @@ #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY #define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_ENV_SIZE 0x2000 #define CONFIG_SYS_MALLOC_LEN (32 << 20) #define CONFIG_SYS_CBSIZE 1024 diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index fa9abc0a561..b22169d163a 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -10,7 +10,6 @@ #include "rockchip-common.h" #define CONFIG_SKIP_LOWLEVEL_INIT -#define CONFIG_ENV_SIZE 0x2000 #define CONFIG_SYS_MALLOC_LEN (32 << 20) #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 34f255847a8..2b8f618f721 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -12,7 +12,6 @@ #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY #define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_ENV_SIZE 0x2000 #define CONFIG_SYS_MALLOC_LEN (32 << 20) #define CONFIG_SYS_CBSIZE 1024 diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index 9819b22ce23..af556323f89 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -9,7 +9,6 @@ #include "rockchip-common.h" -#define CONFIG_ENV_SIZE 0x2000 #define CONFIG_SYS_MALLOC_LEN (32 << 20) #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SKIP_LOWLEVEL_INIT diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 1d7a87271c9..561bfa73b66 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -10,7 +10,6 @@ #include "rockchip-common.h" #define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_ENV_SIZE 0x2000 #define CONFIG_SYS_MALLOC_LEN (32 << 20) #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SKIP_LOWLEVEL_INIT diff --git a/include/configs/rock.h b/include/configs/rock.h index 8d845d95e37..468dfdbff98 100644 --- a/include/configs/rock.h +++ b/include/configs/rock.h @@ -12,18 +12,4 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 -#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) -/* SPL @ 32k for 34k - * u-boot directly after @ 68k for 400k or so - * ENV @ 992k - */ -#define CONFIG_ENV_OFFSET ((1024-32) * 1024) -#else -/* SPL @ 32k for ~36k - * ENV @ 96k - * u-boot @ 128K - */ -#define CONFIG_ENV_OFFSET (96 * 1024) -#endif - #endif diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h index 96b5fce46f2..35d948ae29f 100644 --- a/include/configs/rockchip-common.h +++ b/include/configs/rockchip-common.h @@ -61,19 +61,11 @@ #endif -#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) -/* SPL @ 32k for 34k - * u-boot directly after @ 68k for 400k or so - * ENV @ 992k - */ -#define CONFIG_ENV_OFFSET ((1024-32) * 1024) -#else -/* SPL @ 32k for ~36k - * ENV @ 96k - * u-boot @ 128K +/* + * Rockchip SoCs use fixed ENV 32KB@(4MB-32KB) */ -#define CONFIG_ENV_OFFSET (96 * 1024) -#endif +#define CONFIG_ENV_OFFSET (SZ_4M - SZ_32K) +#define CONFIG_ENV_SIZE SZ_32K #define CONFIG_DISPLAY_BOARDINFO_LATE diff --git a/include/configs/sheep_rk3368.h b/include/configs/sheep_rk3368.h index eac9755bbad..4eb4fb0e2fa 100644 --- a/include/configs/sheep_rk3368.h +++ b/include/configs/sheep_rk3368.h @@ -13,7 +13,6 @@ #define KERNEL_LOAD_ADDR 0x280000 #define DTB_LOAD_ADDR 0x5600000 #define INITRD_LOAD_ADDR 0x5bf0000 -#define CONFIG_ENV_SIZE 0x2000 #define CONFIG_CONSOLE_SCROLL_LINES 10 diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h index 958d5cc54c8..856a408cd99 100644 --- a/include/configs/stih410-b2260.h +++ b/include/configs/stih410-b2260.h @@ -1,6 +1,6 @@ /* - * (C) Copyright 2017 - * Patrice Chotard, <patrice.chotard@st.com> + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h index b51c9194fec..d12b1d831e2 100644 --- a/include/configs/stm32f746-disco.h +++ b/include/configs/stm32f746-disco.h @@ -1,6 +1,6 @@ /* - * (C) Copyright 2016 - * Vikas Manocha, <vikas.manocha@st.com> + * Copyright (C) 2016, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/include/configs/stm32h743-disco.h b/include/configs/stm32h743-disco.h index 967c5e57021..531de701492 100644 --- a/include/configs/stm32h743-disco.h +++ b/include/configs/stm32h743-disco.h @@ -1,6 +1,6 @@ /* - * Copyright (C) STMicroelectronics SA 2017 - * Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics. + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/include/configs/stm32h743-eval.h b/include/configs/stm32h743-eval.h index 967c5e57021..531de701492 100644 --- a/include/configs/stm32h743-eval.h +++ b/include/configs/stm32h743-eval.h @@ -1,6 +1,6 @@ /* - * Copyright (C) STMicroelectronics SA 2017 - * Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics. + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h index 27d7a4bf6b6..c99fb676cbf 100644 --- a/include/configs/stv0991.h +++ b/include/configs/stv0991.h @@ -1,6 +1,6 @@ /* - * (C) Copyright 2014 - * Vikas Manocha, STMicroelectronics, <vikas.manocha@st.com> + * Copyright (C) 2014, STMicroelectronics - All Rights Reserved + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/include/configs/x600.h b/include/configs/x600.h index 1d34ba32a01..7363057a5c3 100644 --- a/include/configs/x600.h +++ b/include/configs/x600.h @@ -1,6 +1,6 @@ /* - * (C) Copyright 2009 - * Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com> + * Copyright (C) 2009, STMicroelectronics - All Rights Reserved + * Author(s): Vipin Kumar, <vipin.kumar@st.com> for STMicroelectronics. * * Copyright (C) 2012, 2015 Stefan Roese <sr@denx.de> * diff --git a/include/configs/zmx25.h b/include/configs/zmx25.h index d566fe5a2f3..1ae1ca4317f 100644 --- a/include/configs/zmx25.h +++ b/include/configs/zmx25.h @@ -12,7 +12,6 @@ #include <asm/arch/imx-regs.h> -#define CONFIG_MX25 #define CONFIG_SYS_TEXT_BASE 0xA0000000 #define CONFIG_SYS_TIMER_RATE 32768 diff --git a/include/dwc3-sti-glue.h b/include/dwc3-sti-glue.h index 98e76961b65..e1dc9b8030b 100644 --- a/include/dwc3-sti-glue.h +++ b/include/dwc3-sti-glue.h @@ -1,6 +1,6 @@ /* - * Copyright (c) 2017 - * Patrice Chotard <patrice.chotard@st.com> + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/include/fdt.h b/include/fdt.h index 7ead62e7771..f40b56c7554 100644 --- a/include/fdt.h +++ b/include/fdt.h @@ -1 +1 @@ -#include <../lib/libfdt/fdt.h> +#include "../lib/libfdt/fdt.h" diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index 02b362d5e36..de1f5e7d9f5 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -130,7 +130,7 @@ #define XFERTYP_DMAEN 0x00000001 #define CINS_TIMEOUT 1000 -#define PIO_TIMEOUT 100000 +#define PIO_TIMEOUT 500 #define DSADDR 0x2e004 diff --git a/include/libfdt.h b/include/libfdt.h index 10296a21add..7ba13e634b6 100644 --- a/include/libfdt.h +++ b/include/libfdt.h @@ -1 +1 @@ -#include <../lib/libfdt/libfdt.h> +#include "../lib/libfdt/libfdt.h" diff --git a/test/py/tests/test_gpt.py b/test/py/tests/test_gpt.py index b9b5e5fbb04..4329b69b7ad 100644 --- a/test/py/tests/test_gpt.py +++ b/test/py/tests/test_gpt.py @@ -32,23 +32,24 @@ class GptTestDiskImage(object): persistent = u_boot_console.config.persistent_data_dir + '/' + filename self.path = u_boot_console.config.result_dir + '/' + filename - if os.path.exists(persistent): - u_boot_console.log.action('Disk image file ' + persistent + - ' already exists') - else: - u_boot_console.log.action('Generating ' + persistent) - fd = os.open(persistent, os.O_RDWR | os.O_CREAT) - os.ftruncate(fd, 4194304) - os.close(fd) - cmd = ('sgdisk', '-U', '375a56f7-d6c9-4e81-b5f0-09d41ca89efe', - persistent) - u_boot_utils.run_and_log(u_boot_console, cmd) - cmd = ('sgdisk', '--new=1:2048:2560', '-c 1:part1', persistent) - u_boot_utils.run_and_log(u_boot_console, cmd) - cmd = ('sgdisk', '--new=2:4096:4608', '-c 2:part2', persistent) - u_boot_utils.run_and_log(u_boot_console, cmd) - cmd = ('sgdisk', '-l', persistent) - u_boot_utils.run_and_log(u_boot_console, cmd) + with u_boot_utils.persistent_file_helper(u_boot_console.log, persistent): + if os.path.exists(persistent): + u_boot_console.log.action('Disk image file ' + persistent + + ' already exists') + else: + u_boot_console.log.action('Generating ' + persistent) + fd = os.open(persistent, os.O_RDWR | os.O_CREAT) + os.ftruncate(fd, 4194304) + os.close(fd) + cmd = ('sgdisk', '-U', '375a56f7-d6c9-4e81-b5f0-09d41ca89efe', + persistent) + u_boot_utils.run_and_log(u_boot_console, cmd) + cmd = ('sgdisk', '--new=1:2048:2560', '-c 1:part1', persistent) + u_boot_utils.run_and_log(u_boot_console, cmd) + cmd = ('sgdisk', '--new=2:4096:4608', '-c 2:part2', persistent) + u_boot_utils.run_and_log(u_boot_console, cmd) + cmd = ('sgdisk', '-l', persistent) + u_boot_utils.run_and_log(u_boot_console, cmd) cmd = ('cp', persistent, self.path) u_boot_utils.run_and_log(u_boot_console, cmd) diff --git a/test/py/u_boot_utils.py b/test/py/u_boot_utils.py index 2ba4baed07e..9acb92ddc44 100644 --- a/test/py/u_boot_utils.py +++ b/test/py/u_boot_utils.py @@ -5,6 +5,7 @@ # Utility code shared across multiple tests. import hashlib +import inspect import os import os.path import pytest @@ -237,3 +238,76 @@ def find_ram_base(u_boot_console): raise Exception('Failed to find RAM bank start in `bdinfo`') return ram_base + +class PersistentFileHelperCtxMgr(object): + """A context manager for Python's "with" statement, which ensures that any + generated file is deleted (and hence regenerated) if its mtime is older + than the mtime of the Python module which generated it, and gets an mtime + newer than the mtime of the Python module which generated after it is + generated. Objects of this type should be created by factory function + persistent_file_helper rather than directly.""" + + def __init__(self, log, filename): + """Initialize a new object. + + Args: + log: The Logfile object to log to. + filename: The filename of the generated file. + + Returns: + Nothing. + """ + + self.log = log + self.filename = filename + + def __enter__(self): + frame = inspect.stack()[1] + module = inspect.getmodule(frame[0]) + self.module_filename = module.__file__ + self.module_timestamp = os.path.getmtime(self.module_filename) + + if os.path.exists(self.filename): + filename_timestamp = os.path.getmtime(self.filename) + if filename_timestamp < self.module_timestamp: + self.log.action('Removing stale generated file ' + + self.filename) + os.unlink(self.filename) + + def __exit__(self, extype, value, traceback): + if extype: + try: + os.path.unlink(self.filename) + except: + pass + return + logged = False + for i in range(20): + filename_timestamp = os.path.getmtime(self.filename) + if filename_timestamp > self.module_timestamp: + break + if not logged: + self.log.action( + 'Waiting for generated file timestamp to increase') + logged = True + os.utime(self.filename) + time.sleep(0.1) + +def persistent_file_helper(u_boot_log, filename): + """Manage the timestamps and regeneration of a persistent generated + file. This function creates a context manager for Python's "with" + statement + + Usage: + with persistent_file_helper(u_boot_console.log, filename): + code to generate the file, if it's missing. + + Args: + u_boot_log: u_boot_console.log. + filename: The filename of the generated file. + + Returns: + A context manager object. + """ + + return PersistentFileHelperCtxMgr(u_boot_log, filename) diff --git a/tools/env/fw_env_main.c b/tools/env/fw_env_main.c index 6e278ca80b4..0b9063742ce 100644 --- a/tools/env/fw_env_main.c +++ b/tools/env/fw_env_main.c @@ -34,6 +34,7 @@ #include <stdlib.h> #include <sys/file.h> #include <unistd.h> +#include <version.h> #include "fw_env_private.h" #include "fw_env.h" @@ -48,6 +49,7 @@ static struct option long_options[] = { {"script", required_argument, NULL, 's'}, {"noheader", required_argument, NULL, 'n'}, {"lock", required_argument, NULL, 'l'}, + {"version", no_argument, NULL, 'v'}, {NULL, 0, NULL, 0} }; @@ -67,6 +69,7 @@ void usage_printenv(void) "Print variables from U-Boot environment\n" "\n" " -h, --help print this help.\n" + " -v, --version display version\n" #ifdef CONFIG_ENV_AES " -a, --aes aes key to access environment\n" #endif @@ -85,6 +88,7 @@ void usage_env_set(void) "Modify variables in U-Boot environment\n" "\n" " -h, --help print this help.\n" + " -v, --version display version\n" #ifdef CONFIG_ENV_AES " -a, --aes aes key to access environment\n" #endif @@ -123,7 +127,7 @@ static void parse_common_args(int argc, char *argv[]) env_opts.config_file = CONFIG_FILE; #endif - while ((c = getopt_long(argc, argv, ":a:c:l:h", long_options, NULL)) != + while ((c = getopt_long(argc, argv, ":a:c:l:h:v", long_options, NULL)) != EOF) { switch (c) { case 'a': @@ -145,6 +149,10 @@ static void parse_common_args(int argc, char *argv[]) do_printenv ? usage_printenv() : usage_env_set(); exit(EXIT_SUCCESS); break; + case 'v': + fprintf(stderr, "Compiled with " U_BOOT_VERSION "\n"); + exit(EXIT_SUCCESS); + break; default: /* ignore unknown options */ break; @@ -162,7 +170,7 @@ int parse_printenv_args(int argc, char *argv[]) parse_common_args(argc, argv); - while ((c = getopt_long(argc, argv, "a:c:ns:l:h", long_options, NULL)) + while ((c = getopt_long(argc, argv, "a:c:ns:l:h:v", long_options, NULL)) != EOF) { switch (c) { case 'n': @@ -189,7 +197,7 @@ int parse_setenv_args(int argc, char *argv[]) parse_common_args(argc, argv); - while ((c = getopt_long(argc, argv, "a:c:ns:l:h", long_options, NULL)) + while ((c = getopt_long(argc, argv, "a:c:ns:l:h:v", long_options, NULL)) != EOF) { switch (c) { case 's': diff --git a/tools/fdtgrep.c b/tools/fdtgrep.c index f51f5f15f54..5897b6d5f78 100644 --- a/tools/fdtgrep.c +++ b/tools/fdtgrep.c @@ -16,8 +16,8 @@ #include <string.h> #include <unistd.h> -#include <../include/libfdt.h> -#include <libfdt_internal.h> +#include "../include/libfdt.h" +#include "libfdt_internal.h" /* Define DEBUG to get some debugging output on stderr */ #ifdef DEBUG diff --git a/tools/image-host.c b/tools/image-host.c index c60d4adb3de..2c0030b5e23 100644 --- a/tools/image-host.c +++ b/tools/image-host.c @@ -166,7 +166,7 @@ static int fit_image_setup_sig(struct image_sign_info *info, info->keyname = fdt_getprop(fit, noffset, "key-name-hint", NULL); info->fit = fit; info->node_offset = noffset; - info->name = algo_name; + info->name = strdup(algo_name); info->checksum = image_get_checksum_algo(algo_name); info->crypto = image_get_crypto_algo(algo_name); info->require_keys = require_keys; @@ -242,18 +242,19 @@ static int fit_image_process_sig(const char *keydir, void *keydest, /* Get keyname again, as FDT has changed and invalidated our pointer */ info.keyname = fdt_getprop(fit, noffset, "key-name-hint", NULL); - if (keydest) - ret = info.crypto->add_verify_data(&info, keydest); - else - return -1; - /* * Write the public key into the supplied FDT file; this might fail * several times, since we try signing with successively increasing * size values */ - if (keydest && ret) - return ret; + if (keydest) { + ret = info.crypto->add_verify_data(&info, keydest); + if (ret) { + printf("Failed to add verification data for '%s' signature node in '%s' image node\n", + node_name, image_name); + return ret; + } + } return 0; } @@ -625,10 +626,8 @@ static int fit_config_process_sig(const char *keydir, void *keydest, /* Write the public key into the supplied FDT file */ if (keydest) { ret = info.crypto->add_verify_data(&info, keydest); - if (ret == -ENOSPC) - return -ENOSPC; if (ret) { - printf("Failed to add verification data for '%s' signature node in '%s' image node\n", + printf("Failed to add verification data for '%s' signature node in '%s' configuration node\n", node_name, conf_name); } return ret; |