diff options
720 files changed, 23925 insertions, 39766 deletions
diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index df3f82074af..ba351b9802d 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -509,6 +509,7 @@ stages: TEST_PY_BD: "xilinx_versal_virt" TEST_PY_ID: "--id qemu" TEST_PY_TEST_SPEC: "not sleep" + OVERRIDE: "-a ~CONFIG_USB_DWC3" xtfpga: TEST_PY_BD: "xtfpga" TEST_PY_ID: "--id qemu" diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index f5d38eaa7ac..a4340946a8a 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -3,6 +3,7 @@ variables: DEFAULT_ALL_TAG: "all" DEFAULT_ARM64_TAG: "arm64" + DEFAULT_FAST_ARM64_TAG: "fast arm64" DEFAULT_AMD64_TAG: "amd64" DEFAULT_FAST_AMD64_TAG: "fast amd64" MIRROR_DOCKER: docker.io @@ -113,7 +114,7 @@ build all platforms in a single job: dependencies: [] parallel: matrix: - - HOST: "arm64" + - HOST: "fast arm64" - HOST: "fast amd64" tags: - ${HOST} @@ -491,6 +492,7 @@ xilinx_versal_virt test.py: TEST_PY_BD: "xilinx_versal_virt" TEST_PY_TEST_SPEC: "not sleep" TEST_PY_ID: "--id qemu" + OVERRIDE: "-a ~CONFIG_USB_DWC3" <<: *buildman_and_testpy_dfn xtfpga test.py: @@ -36,6 +36,7 @@ Bin Meng <bmeng.cn@gmail.com> <bin.meng@windriver.com> Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@bootlin.com> Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@free-electrons.com> Christian Kohn <chris.kohn@amd.com> <christian.kohn@xilinx.com> +Christopher Obbard <christopher.obbard@linaro.org> <chris.obbard@collabora.com> Dirk Behme <dirk.behme@googlemail.com> Durga Challa <durga.challa@amd.com> <vnsl.durga.challa@xilinx.com> Eugen Hristev <eugen.hristev@linaro.org> <eugen.hristev@microchip.com> diff --git a/MAINTAINERS b/MAINTAINERS index ba31f86feb6..e0e9edd48a8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -412,9 +412,13 @@ F: drivers/mmc/mtk-sd.c F: drivers/phy/phy-mtk-* F: drivers/pinctrl/mediatek/ F: drivers/power/domain/mtk-power-domain.c +F: drivers/pci/pcie_mediatek_gen3.c +F: drivers/pci/pcie_mediatek.c +F: drivers/pwm/pwm-mtk.c F: drivers/ram/mediatek/ F: drivers/spi/mtk_snfi_spi.c F: drivers/spi/mtk_spim.c +F: drivers/spi/mtk_snor.c F: drivers/timer/mtk_timer.c F: drivers/usb/host/xhci-mtk.c F: drivers/usb/mtu3/ @@ -422,6 +426,7 @@ F: drivers/watchdog/mtk_wdt.c F: drivers/net/mtk_eth.c F: drivers/net/mtk_eth.h F: drivers/reset/reset-mediatek.c +F: drivers/serial/serial_mtk.c F: include/dt-bindings/clock/mediatek,* F: include/dt-bindings/power/mediatek,* F: tools/mtk_image.c @@ -631,6 +636,7 @@ L: u-boot-qcom@groups.io S: Maintained T: git https://source.denx.de/u-boot/custodians/u-boot-snapdragon.git F: configs/qcm6490_defconfig +F: configs/qcs9100_defconfig F: drivers/*/*/pm8???-* F: drivers/gpio/msm_gpio.c F: drivers/mmc/msm_sdhci.c @@ -3,7 +3,7 @@ VERSION = 2025 PATCHLEVEL = 01 SUBLEVEL = -EXTRAVERSION = -rc6 +EXTRAVERSION = NAME = # *DOCUMENTATION* @@ -1286,6 +1286,15 @@ u-boot.hex u-boot.srec: u-boot FORCE OBJCOPYFLAGS_u-boot-elf.srec := $(OBJCOPYFLAGS_u-boot.srec) +ifeq ($(CONFIG_POSITION_INDEPENDENT)$(CONFIG_RCAR_GEN3),yy) +# The flash_writer tool and previous recovery tools +# require the SREC load address to be 0x5000_0000 . +# The PIE U-Boot build sets the address to 0x0, so +# override the address back to make u-boot-elf.srec +# compatible with the recovery tools. +OBJCOPYFLAGS_u-boot-elf.srec += --change-addresses=0x50000000 +endif + u-boot-elf.srec: u-boot.elf FORCE $(call if_changed,objcopy) @@ -1779,6 +1788,7 @@ endif ifeq ($(LTO_ENABLE),y) quiet_cmd_u-boot__ ?= LTO $@ cmd_u-boot__ ?= \ + touch $(u-boot-main) ; \ $(CC) -nostdlib -nostartfiles \ $(LTO_FINAL_LDFLAGS) $(c_flags) \ $(KBUILD_LDFLAGS:%=-Wl,%) $(LDFLAGS_u-boot:%=-Wl,%) -o $@ \ @@ -1792,7 +1802,9 @@ quiet_cmd_u-boot__ ?= LTO $@ $(if $(ARCH_POSTLINK), $(MAKE) -f $(ARCH_POSTLINK) $@, true) else quiet_cmd_u-boot__ ?= LD $@ - cmd_u-boot__ ?= $(LD) $(KBUILD_LDFLAGS) $(LDFLAGS_u-boot) -o $@ \ + cmd_u-boot__ ?= \ + touch $(u-boot-main) ; \ + $(LD) $(KBUILD_LDFLAGS) $(LDFLAGS_u-boot) -o $@ \ -T u-boot.lds $(u-boot-init) \ --whole-archive \ $(u-boot-main) \ @@ -2218,7 +2230,7 @@ CLEAN_FILES += include/autoconf.mk* include/bmp_logo.h include/bmp_logo_data.h \ itb.fit.fit itb.fit.itb itb.map spl.map mkimage-out.rom.mkimage \ mkimage.rom.mkimage mkimage-in-simple-bin* rom.map simple-bin* \ idbloader-spi.img lib/efi_loader/helloworld_efi.S *.itb \ - Test* capsule.*.efi-capsule capsule*.map + Test* capsule*.*.efi-capsule capsule*.map # Directories & files removed with 'make mrproper' MRPROPER_DIRS += include/config include/generated spl tpl vpl \ diff --git a/api/Makefile b/api/Makefile index bd2d035fcdb..ce3de6b6a1c 100644 --- a/api/Makefile +++ b/api/Makefile @@ -1,8 +1,11 @@ -# SPDX-License-Identifier: GPL-2.0+ +# SPDX-License-Identifier: GPL-2.0-or-later # # (C) Copyright 2007 Semihalf obj-y += api.o api_display.o api_net.o api_storage.o -obj-$(CONFIG_ARM) += api_platform-arm.o + +ifeq (CONFIG_PPC,y) obj-$(CONFIG_PPC) += api_platform-powerpc.o -obj-$(CONFIG_MIPS) += api_platform-mips.o +else +obj-y += api_platform.o +endif diff --git a/api/api_platform-arm.c b/api/api_platform-arm.c deleted file mode 100644 index 9afba66c244..00000000000 --- a/api/api_platform-arm.c +++ /dev/null @@ -1,35 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2007 Semihalf - * - * Written by: Rafal Jaworowski <raj@semihalf.com> - * - * This file contains routines that fetch data from ARM-dependent sources - * (bd_info etc.) - */ - -#include <config.h> -#include <linux/types.h> -#include <api_public.h> - -#include <asm/global_data.h> - -#include "api_private.h" - -DECLARE_GLOBAL_DATA_PTR; - -/* - * Important notice: handling of individual fields MUST be kept in sync with - * include/asm-arm/u-boot.h and include/asm-arm/global_data.h, so any changes - * need to reflect their current state and layout of structures involved! - */ -int platform_sys_info(struct sys_info *si) -{ - int i; - - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) - platform_set_mr(si, gd->bd->bi_dram[i].start, - gd->bd->bi_dram[i].size, MR_ATTR_DRAM); - - return 1; -} diff --git a/api/api_platform-mips.c b/api/api_platform-mips.c deleted file mode 100644 index 262b35a2777..00000000000 --- a/api/api_platform-mips.c +++ /dev/null @@ -1,29 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2007 Stanislav Galabov <sgalabov@gmail.com> - * - * This file contains routines that fetch data from bd_info sources - */ - -#include <config.h> -#include <linux/types.h> -#include <api_public.h> - -#include <asm/global_data.h> - -#include "api_private.h" - -DECLARE_GLOBAL_DATA_PTR; - -/* - * Important notice: handling of individual fields MUST be kept in sync with - * include/asm-generic/u-boot.h, so any changes - * need to reflect their current state and layout of structures involved! - */ -int platform_sys_info(struct sys_info *si) -{ - - platform_set_mr(si, gd->ram_base, gd->ram_size, MR_ATTR_DRAM); - - return 1; -} diff --git a/api/api_platform.c b/api/api_platform.c new file mode 100644 index 00000000000..7a789bd2016 --- /dev/null +++ b/api/api_platform.c @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2007 Semihalf + * + * Written by: Rafal Jaworowski <raj@semihalf.com> + * + * This file contains a routine to fetch data from the global_data structure. + */ + +#include <api_public.h> +#include <asm/global_data.h> +#include "api_private.h" + +DECLARE_GLOBAL_DATA_PTR; + +int platform_sys_info(struct sys_info *si) +{ + int i; + + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) + platform_set_mr(si, gd->bd->bi_dram[i].start, + gd->bd->bi_dram[i].size, MR_ATTR_DRAM); + + return 1; +} diff --git a/arch/Kconfig b/arch/Kconfig index bb2e7bedd10..35b19f9bfdc 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -52,7 +52,8 @@ config SYS_CACHELINE_SIZE default 64 if SYS_CACHE_SHIFT_6 default 32 if SYS_CACHE_SHIFT_5 default 16 if SYS_CACHE_SHIFT_4 - # Fall-back for MIPS + # Fall-back for MIPS and RISC-V + default 64 if RISCV default 32 if MIPS config LINKER_LIST_ALIGN @@ -180,13 +181,13 @@ config SANDBOX select DM_GPIO select DM_I2C select DM_KEYBOARD - select DM_MMC select DM_SERIAL select DM_SPI select DM_SPI_FLASH select GZIP_COMPRESSED select IO_TRACE select LZO + select MMC select MTD select OF_BOARD_SETUP select PCI_ENDPOINT diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 3ed9494dfe4..314916527c9 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1164,7 +1164,6 @@ config ARCH_SUNXI select DM_SPI if SPI select DM_SPI_FLASH if SPI && MTD select DM_KEYBOARD - select DM_MMC if MMC select DM_SERIAL select OF_BOARD_SETUP select OF_CONTROL @@ -1212,7 +1211,6 @@ config ARCH_U8500 select CPU_V7A select DM select DM_GPIO - select DM_MMC if MMC select DM_SERIAL select DM_USB_GADGET if DM_USB select OF_CONTROL @@ -1237,7 +1235,6 @@ config ARCH_VERSAL select ARM64 select CLK select DM - select DM_MMC if MMC select DM_SERIAL select GICV3 select OF_CONTROL @@ -1250,7 +1247,6 @@ config ARCH_VERSAL2 select ARM64 select CLK select DM - select DM_MMC if MMC select DM_SERIAL select OF_CONTROL imply BOARD_LATE_INIT @@ -1262,7 +1258,6 @@ config ARCH_VERSAL_NET select ARM64 select CLK select DM - select DM_MMC if MMC select DM_SERIAL select OF_CONTROL imply BOARD_LATE_INIT @@ -1287,7 +1282,6 @@ config ARCH_ZYNQ select CPU_V7A select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART select DM - select DM_MMC if MMC select DM_SERIAL select DM_SPI select DM_SPI_FLASH @@ -1316,7 +1310,6 @@ config ARCH_ZYNQMP_R5 select CLK select CPU_V7R select DM - select DM_MMC if MMC select DM_SERIAL select OF_CONTROL imply CMD_DM @@ -1330,7 +1323,6 @@ config ARCH_ZYNQMP select DM select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART imply DM_MAILBOX - select DM_MMC if MMC select DM_SERIAL select MTD select DM_SPI if SPI @@ -1380,7 +1372,6 @@ config ARCH_VEXPRESS64 select PL01X_SERIAL select OF_CONTROL select CLK - select BLK select MTD_NOR_FLASH if MTD select FLASH_CFI_DRIVER if MTD select ENV_IS_IN_FLASH if MTD @@ -1398,8 +1389,8 @@ config TARGET_TOTAL_COMPUTE select PL01X_SERIAL select DM select DM_SERIAL - select DM_MMC select DM_GPIO + select MMC imply OF_HAS_PRIOR_STAGE imply MISC_INIT_R @@ -1905,7 +1896,7 @@ config TARGET_SL28 select DM select DM_GPIO select DM_I2C - select DM_MMC + select MMC select MTD select DM_SPI_FLASH select DM_MDIO @@ -1946,10 +1937,10 @@ config ARCH_UNIPHIER select DM select DM_GPIO select DM_I2C - select DM_MMC select DM_MTD select DM_RESET select DM_SERIAL + select MMC select OF_BOARD_SETUP select OF_CONTROL select OF_LIBFDT @@ -1990,12 +1981,11 @@ config ARCH_STM32 config ARCH_STI bool "Support STMicroelectronics SoCs" - select BLK select CPU_V7A select DM - select DM_MMC select DM_RESET select DM_SERIAL + select MMC imply CMD_DM help Support for STMicroelectronics STiH407/10 SoC family. @@ -2037,12 +2027,10 @@ config ARCH_STM32MP config ARCH_ROCKCHIP bool "Support Rockchip SoCs" - select BLK select BINMAN if SPL_OPTEE || SPL select DM select DM_GPIO select DM_I2C - select DM_MMC select DM_PWM select DM_REGULATOR select DM_SERIAL @@ -2051,6 +2039,7 @@ config ARCH_ROCKCHIP select DM_USB_GADGET if USB_DWC3_GADGET select ENABLE_ARM_SOC_BOOT0_HOOK select OF_CONTROL + select MMC select MTD select SPI select SPL_DM if SPL @@ -2125,7 +2114,6 @@ config TARGET_POMELO select AHCI select SCSI_AHCI select AHCI_PCI - select BLK select PCI select DM_PCI select SCSI diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile index 2e71ff2dc97..b4126c61df1 100644 --- a/arch/arm/cpu/armv8/Makefile +++ b/arch/arm/cpu/armv8/Makefile @@ -46,3 +46,5 @@ obj-$(CONFIG_TARGET_BCMNS3) += bcmns3/ obj-$(CONFIG_XEN) += xen/ obj-$(CONFIG_ARMV8_CE_SHA1) += sha1_ce_glue.o sha1_ce_core.o obj-$(CONFIG_ARMV8_CE_SHA256) += sha256_ce_glue.o sha256_ce_core.o + +obj-$(CONFIG_SYSINFO_SMBIOS) += sysinfo.o diff --git a/arch/arm/cpu/armv8/sysinfo.c b/arch/arm/cpu/armv8/sysinfo.c new file mode 100644 index 00000000000..850142da37d --- /dev/null +++ b/arch/arm/cpu/armv8/sysinfo.c @@ -0,0 +1,292 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2024 Linaro Limited + * Author: Raymond Mao <raymond.mao@linaro.org> + */ +#include <dm.h> +#include <smbios_plat.h> +#include <stdio.h> +#include <sysinfo.h> + +union ccsidr_el1 { + struct { + u64 linesize:3; + u64 associativity:10; + u64 numsets:15; + u64 unknown:4; + u64 reserved:32; + } no_ccidx; + struct { + u64 linesize:3; + u64 associativity:21; + u64 reserved1:8; + u64 numsets:24; + u64 reserved2:8; + } ccidx_aarch64; + struct { + u64 linesize:3; + u64 associativity:21; + u64 reserved:8; + u64 unallocated:32; + } ccidx_aarch32; + u64 data; +}; + +union midr_el1 { + struct { + u64 revision:4; + u64 partnum:12; + u64 architecture:4; + u64 variant:4; + u64 implementer:8; + u64 reserved:32; + } fields; + u64 data; +}; + +enum { + CACHE_NONE, + CACHE_INST_ONLY, + CACHE_DATA_ONLY, + CACHE_INST_WITH_DATA, + CACHE_UNIFIED, +}; + +enum { + CACHE_ASSOC_DIRECT_MAPPED = 1, + CACHE_ASSOC_2WAY = 2, + CACHE_ASSOC_4WAY = 4, + CACHE_ASSOC_8WAY = 8, + CACHE_ASSOC_16WAY = 16, + CACHE_ASSOC_12WAY = 12, + CACHE_ASSOC_24WAY = 24, + CACHE_ASSOC_32WAY = 32, + CACHE_ASSOC_48WAY = 48, + CACHE_ASSOC_64WAY = 64, + CACHE_ASSOC_20WAY = 20, +}; + +enum { + VENDOR_RESERVED = 0, + VENDOR_ARM = 0x41, + VENDOR_BROADCOM = 0x42, + VENDOR_CAVIUM = 0x43, + VENDOR_DEC = 0x44, + VENDOR_FUJITSU = 0x46, + VENDOR_INFINEON = 0x49, + VENDOR_FREESCALE = 0x4d, + VENDOR_NVIDIA = 0x4e, + VENDOR_AMCC = 0x50, + VENDOR_QUALCOMM = 0x51, + VENDOR_MARVELL = 0x56, + VENDOR_INTEL = 0x69, + VENDOR_AMPERE = 0xc0, +}; + +/* + * TODO: + * To support ARMv8.3, we need to read "CCIDX, bits [23:20]" from + * ID_AA64MMFR2_EL1 to get the format of CCSIDR_EL1: + * + * 0b0000 - 32-bit format implemented for all levels of the CCSIDR_EL1. + * 0b0001 - 64-bit format implemented for all levels of the CCSIDR_EL1. + * + * Here we assume to use CCSIDR_EL1 in no CCIDX layout: + * NumSets, bits [27:13]: (Number of sets in cache) - 1 + * Associativity, bits [12:3]: (Associativity of cache) - 1 + * LineSize, bits [2:0]: (Log2(Number of bytes in cache line)) - 4 + */ +int sysinfo_get_cache_info(u8 level, struct cache_info *cinfo) +{ + u64 clidr_el1; + u32 csselr_el1; + u32 num_sets; + union ccsidr_el1 creg; + int cache_type; + + sysinfo_cache_info_default(cinfo); + + /* Read CLIDR_EL1 */ + asm volatile("mrs %0, clidr_el1" : "=r" (clidr_el1)); + debug("CLIDR_EL1: 0x%llx\n", clidr_el1); + + cache_type = (clidr_el1 >> (3 * level)) & 0x7; + if (cache_type == CACHE_NONE) /* level does not exist */ + return -1; + + switch (cache_type) { + case CACHE_INST_ONLY: + cinfo->cache_type = SMBIOS_CACHE_SYSCACHE_TYPE_INST; + break; + case CACHE_DATA_ONLY: + cinfo->cache_type = SMBIOS_CACHE_SYSCACHE_TYPE_DATA; + break; + case CACHE_UNIFIED: + cinfo->cache_type = SMBIOS_CACHE_SYSCACHE_TYPE_UNIFIED; + break; + case CACHE_INST_WITH_DATA: + cinfo->cache_type = SMBIOS_CACHE_SYSCACHE_TYPE_OTHER; + break; + default: + cinfo->cache_type = SMBIOS_CACHE_SYSCACHE_TYPE_UNKNOWN; + break; + } + + /* Select cache level */ + csselr_el1 = (level << 1); + asm volatile("msr csselr_el1, %0" : : "r" (csselr_el1)); + + /* Read CCSIDR_EL1 */ + asm volatile("mrs %0, ccsidr_el1" : "=r" (creg.data)); + debug("CCSIDR_EL1 (Level %d): 0x%llx\n", level + 1, creg.data); + + /* Extract cache size and associativity */ + cinfo->line_size = 1 << (creg.no_ccidx.linesize + 4); + + /* Map the associativity value */ + switch (creg.no_ccidx.associativity + 1) { + case CACHE_ASSOC_DIRECT_MAPPED: + cinfo->associativity = SMBIOS_CACHE_ASSOC_DMAPPED; + break; + case CACHE_ASSOC_2WAY: + cinfo->associativity = SMBIOS_CACHE_ASSOC_2WAY; + break; + case CACHE_ASSOC_4WAY: + cinfo->associativity = SMBIOS_CACHE_ASSOC_4WAY; + break; + case CACHE_ASSOC_8WAY: + cinfo->associativity = SMBIOS_CACHE_ASSOC_8WAY; + break; + case CACHE_ASSOC_16WAY: + cinfo->associativity = SMBIOS_CACHE_ASSOC_16WAY; + break; + case CACHE_ASSOC_12WAY: + cinfo->associativity = SMBIOS_CACHE_ASSOC_12WAY; + break; + case CACHE_ASSOC_24WAY: + cinfo->associativity = SMBIOS_CACHE_ASSOC_24WAY; + break; + case CACHE_ASSOC_32WAY: + cinfo->associativity = SMBIOS_CACHE_ASSOC_32WAY; + break; + case CACHE_ASSOC_48WAY: + cinfo->associativity = SMBIOS_CACHE_ASSOC_48WAY; + break; + case CACHE_ASSOC_64WAY: + cinfo->associativity = SMBIOS_CACHE_ASSOC_64WAY; + break; + case CACHE_ASSOC_20WAY: + cinfo->associativity = SMBIOS_CACHE_ASSOC_20WAY; + break; + default: + cinfo->associativity = SMBIOS_CACHE_ASSOC_UNKNOWN; + break; + } + + num_sets = creg.no_ccidx.numsets + 1; + /* Size in KB */ + cinfo->max_size = (cinfo->associativity * num_sets * cinfo->line_size) / + 1024; + + debug("L%d Cache:\n", level + 1); + debug("Number of bytes in cache line:%u\n", cinfo->line_size); + debug("Associativity of cache:%u\n", cinfo->associativity); + debug("Number of sets in cache:%u\n", num_sets); + debug("Cache size in KB:%u\n", cinfo->max_size); + + cinfo->inst_size = cinfo->max_size; + + /* + * Below fields with common values are placed under DT smbios node + * socket-design, config + * Other fields are typically specific to the implementation of the ARM + * processor by the silicon vendor: + * supp_sram_type, curr_sram_type, speed, err_corr_type + */ + + return 0; +} + +int sysinfo_get_processor_info(struct processor_info *pinfo) +{ + u64 mpidr, core_count; + union midr_el1 midr; + + /* Read the MIDR_EL1 register */ + asm volatile("mrs %0, MIDR_EL1" : "=r"(midr.data)); + /* Read the MPIDR_EL1 register */ + asm volatile("mrs %0, MPIDR_EL1" : "=r"(mpidr)); + + debug("MIDR: 0x%016llx\n", midr.data); + debug("MPIDR: 0x%016llx\n", mpidr); + debug("CPU Implementer: 0x%02x\n", midr.fields.implementer); + + switch (midr.fields.implementer) { + case VENDOR_ARM: + pinfo->manufacturer = "ARM Limited"; + break; + case VENDOR_BROADCOM: + pinfo->manufacturer = "Broadcom Corporation"; + break; + case VENDOR_CAVIUM: + pinfo->manufacturer = "Cavium Inc"; + break; + case VENDOR_DEC: + pinfo->manufacturer = "Digital Equipment Corporation"; + break; + case VENDOR_FUJITSU: + pinfo->manufacturer = "Fujitsu Ltd"; + break; + case VENDOR_INFINEON: + pinfo->manufacturer = "Infineon Technologies AG"; + break; + case VENDOR_FREESCALE: + pinfo->manufacturer = "Freescale Semiconductor Inc"; + break; + case VENDOR_NVIDIA: + pinfo->manufacturer = "NVIDIA Corporation"; + break; + case VENDOR_AMCC: + pinfo->manufacturer = + "Applied Micro Circuits Corporation"; + break; + case VENDOR_QUALCOMM: + pinfo->manufacturer = "Qualcomm Inc"; + break; + case VENDOR_MARVELL: + pinfo->manufacturer = "Marvell International Ltd"; + break; + case VENDOR_INTEL: + pinfo->manufacturer = "Intel Corporation"; + break; + case VENDOR_AMPERE: + pinfo->manufacturer = "Ampere Computing"; + break; + default: + pinfo->manufacturer = "Unknown"; + break; + } + debug("CPU part number: 0x%x\n", midr.fields.partnum); + debug("CPU revision: 0x%x\n", midr.fields.revision); + debug("CPU architecture: 0x%x\n", midr.fields.architecture); + debug("CPU variant: 0x%x\n", midr.fields.variant); + + /* Extract number of cores */ + core_count = (mpidr >> 0) & 0xFF; + pinfo->core_count = core_count + 1; + debug("CPU Core Count: %d\n", pinfo->core_count); + + pinfo->core_enabled = pinfo->core_count; + pinfo->characteristics = SMBIOS_PROCESSOR_64BIT | + SMBIOS_PROCESSOR_ARM64_SOCID; + if (pinfo->core_count > 1) + pinfo->characteristics |= SMBIOS_PROCESSOR_MULTICORE; + + /* + * Below fields with common values are placed under DT smbios node + * version, processor-type, processor-status, upgrade, family2, + * socket-design, serial, asset-tag, part-number + */ + + return 0; +} diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 23b537a2fcb..b7df72453ac 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -55,27 +55,17 @@ dtb-$(CONFIG_MACH_S700) += \ dtb-$(CONFIG_ROCKCHIP_RK3036) += \ rk3036-sdk.dtb -dtb-$(CONFIG_ROCKCHIP_RK3066) += \ - rk3066a-mk808.dtb - dtb-$(CONFIG_ROCKCHIP_RK3128) += \ rk3128-evb.dtb -dtb-$(CONFIG_ROCKCHIP_RK3188) += \ - rk3188-radxarock.dtb - dtb-$(CONFIG_ROCKCHIP_RK322X) += \ rk3229-evb.dtb dtb-$(CONFIG_ROCKCHIP_RK3288) += \ rk3288-evb.dtb \ - rk3288-firefly.dtb \ - rk3288-miqi.dtb \ rk3288-popmetal.dtb \ rk3288-rock2-square.dtb \ rk3288-rock-pi-n8.dtb \ - rk3288-tinker.dtb \ - rk3288-tinker-s.dtb \ rk3288-veyron-jerry.dtb \ rk3288-veyron-mickey.dtb \ rk3288-veyron-minnie.dtb \ @@ -540,56 +530,12 @@ dtb-$(CONFIG_STM32H7) += stm32h743i-disco.dtb \ stm32h743i-eval.dtb \ stm32h750i-art-pi.dtb -dtb-$(CONFIG_MACH_SUNIV) += \ - suniv-f1c100s-licheepi-nano.dtb dtb-$(CONFIG_MACH_SUN4I) += \ - sun4i-a10-a1000.dtb \ - sun4i-a10-ba10-tvbox.dtb \ - sun4i-a10-chuwi-v7-cw0825.dtb \ - sun4i-a10-cubieboard.dtb \ - sun4i-a10-dserve-dsrv9703c.dtb \ - sun4i-a10-gemei-g9.dtb \ - sun4i-a10-hackberry.dtb \ - sun4i-a10-hyundai-a7hd.dtb \ - sun4i-a10-inet1.dtb \ sun4i-a10-inet-3f.dtb \ - sun4i-a10-inet-3w.dtb \ - sun4i-a10-inet97fv2.dtb \ - sun4i-a10-inet9f-rev03.dtb \ - sun4i-a10-itead-iteaduino-plus.dtb \ - sun4i-a10-jesurun-q5.dtb \ - sun4i-a10-marsboard.dtb \ - sun4i-a10-mini-xplus.dtb \ - sun4i-a10-mk802.dtb \ - sun4i-a10-mk802ii.dtb \ - sun4i-a10-olinuxino-lime.dtb \ - sun4i-a10-pcduino.dtb \ - sun4i-a10-pcduino2.dtb \ - sun4i-a10-pov-protab2-ips9.dtb \ - sun4i-a10-topwise-a721.dtb + sun4i-a10-inet-3w.dtb dtb-$(CONFIG_MACH_SUN5I) += \ - sun5i-a10s-auxtek-t003.dtb \ - sun5i-a10s-auxtek-t004.dtb \ - sun5i-a10s-mk802.dtb \ - sun5i-a10s-olinuxino-micro.dtb \ - sun5i-a10s-r7-tv-dongle.dtb \ - sun5i-a10s-wobo-i5.dtb \ sun5i-a13-ampe-a76.dtb \ - sun5i-a13-difrnce-dit4350.dtb \ - sun5i-a13-empire-electronix-d709.dtb \ - sun5i-a13-empire-electronix-m712.dtb \ - sun5i-a13-hsg-h702.dtb \ - sun5i-a13-inet-86vs.dtb \ - sun5i-a13-inet-98v-rev2.dtb \ - sun5i-a13-licheepi-one.dtb \ - sun5i-a13-olinuxino.dtb \ - sun5i-a13-olinuxino-micro.dtb \ - sun5i-a13-pocketbook-touch-lux-3.dtb \ - sun5i-a13-q8-tablet.dtb \ - sun5i-a13-utoo-p66.dtb \ - sun5i-gr8-chip-pro.dtb \ - sun5i-gr8-evb.dtb \ - sun5i-r8-chip.dtb + sun5i-a13-inet-86vs.dtb dtb-$(CONFIG_MACH_SUN6I) += \ sun6i-a31-app4-evb1.dtb \ sun6i-a31-colombus.dtb \ @@ -1129,6 +1075,7 @@ dtb-$(CONFIG_BCM6878) += \ dtb-$(CONFIG_ASPEED_AST2500) += ast2500-evb.dtb dtb-$(CONFIG_ASPEED_AST2600) += \ ast2600-evb.dtb \ + ast2600-sbp1.dtb \ ast2600-x4tf.dtb dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb @@ -1190,7 +1137,6 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \ mt7623a-unielec-u7623-02-emmc.dtb \ mt7622-bananapi-bpi-r64.dtb \ mt7623n-bananapi-bpi-r2.dtb \ - mt7629-rfb.dtb \ mt7981-rfb.dtb \ mt7981-emmc-rfb.dtb \ mt7981-sd-rfb.dtb \ diff --git a/arch/arm/dts/ast2600-sbp1.dts b/arch/arm/dts/ast2600-sbp1.dts new file mode 100644 index 00000000000..2d15789c590 --- /dev/null +++ b/arch/arm/dts/ast2600-sbp1.dts @@ -0,0 +1,5908 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +#include <dt-bindings/gpio/aspeed-gpio.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/i2c/i2c.h> +#include "ast2600-evb.dts" + +/ { + model = "IBM SBP1"; + compatible = "ibm,sbp1-bmc", "aspeed,ast2600"; + + memory@80000000 { + reg = <0x80000000 0x20000000>; + device_type = "memory"; + }; + + chosen { + stdout-path = &uart1; + bootargs = "console=tty0 console=ttyS0,115200 earlycon"; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + gfx_memory: framebuffer { + size = <0x01000000>; + alignment = <0x01000000>; + compatible = "shared-dma-pool"; + reusable; + }; + }; + aliases { + ethernet0 = &mac2; + ethernet1 = &mac3; + }; + + cpus { + cpu@0 { + clock-frequency = <1200000000>; + }; + cpu@1 { + clock-frequency = <1200000000>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-power { + label = "LED_BMC_READY"; + gpios = <&gpio0 ASPEED_GPIO(H, 1) GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_GREEN>; + default-state = "off"; + retain-state-suspended; + panic-indicator; + }; + + led-id-tpm { + label = "LED_ID_TPM"; + gpios = <&smb_pex_vr_ctrl 12 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-bat { + label = "LED_ID_BAT"; + gpios = <&smb_pex_vr_ctrl 16 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-mgmt-port2 { + label = "LED_ID_MGMT_PORT2"; + gpios = <&smb_pex_vr_ctrl 17 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-mgmt-port1 { + label = "LED_ID_MGMT_PORT1"; + gpios = <&smb_pex_vr_ctrl 18 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-nic1-port1 { + label = "LED_ID_NIC1_PORT1"; + gpios = <&smb_pex_vr_ctrl 22 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-nic1-port2 { + label = "LED_ID_NIC1_PORT2"; + gpios = <&smb_pex_vr_ctrl 23 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-nic2-port1 { + label = "LED_ID_NIC2_PORT1"; + gpios = <&smb_pex_vr_ctrl 24 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-nic2-port2 { + label = "LED_ID_NIC2_PORT2"; + gpios = <&smb_pex_vr_ctrl 25 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-m2-ssd2 { + label = "LED_ID_M2_SSD2"; + gpios = <&smb_pex_vr_ctrl 36 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-m2-ssd1 { + label = "LED_ID_M2_SSD1"; + gpios = <&smb_pex_vr_ctrl 37 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dwr-frnt-p { + label = "LED_ID_DWR_FRNT_P"; + gpios = <&smb_svc_pex_cpu3_led 37 GPIO_ACTIVE_HIGH>; + color = <LED_COLOR_ID_BLUE>; + + default-state = "on"; + retain-state-suspended; + retain-state-shutdown; + }; + + led-pwr-dwr-frnt { + label = "LED_PWR_DWR_FRNT"; + gpios = <&smb_svc_pex_cpu3_led 36 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_GREEN>; + + retain-state-suspended; + retain-state-shutdown; + }; + + led-pwr-dwr-back { + label = "LED_PWR_DWR_BACK"; + gpios = <&smb_pex_vr_ctrl 34 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_GREEN>; + + retain-state-suspended; + retain-state-shutdown; + }; + + led-id-dwr-back-p { + label = "LED_ID_DWR_BACK_P"; + gpios = <&smb_pex_vr_ctrl 35 GPIO_ACTIVE_HIGH>; + color = <LED_COLOR_ID_BLUE>; + + default-state = "on"; + retain-state-suspended; + retain-state-shutdown; + }; + + led-id-cpu0 { + label = "LED_ID_CPU0"; + gpios = <&smb_svc_pex_cpu0_led 39 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-cpu1 { + label = "LED_ID_CPU1"; + gpios = <&smb_svc_pex_cpu1_led 39 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-cpu2 { + label = "LED_ID_CPU2"; + gpios = <&smb_svc_pex_cpu2_led 39 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-cpu3 { + label = "LED_ID_CPU3"; + gpios = <&smb_svc_pex_cpu3_led 39 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c0e2 { + label = "LED_ID_DIMM_C0E2"; + gpios = <&smb_svc_pex_cpu0_led 20 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c0e1 { + label = "LED_ID_DIMM_C0E1"; + gpios = <&smb_svc_pex_cpu0_led 21 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c0f2 { + label = "LED_ID_DIMM_C0F2"; + gpios = <&smb_svc_pex_cpu0_led 22 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c0f1 { + label = "LED_ID_DIMM_C0F1"; + gpios = <&smb_svc_pex_cpu0_led 23 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c0g2 { + label = "LED_ID_DIMM_C0G2"; + gpios = <&smb_svc_pex_cpu0_led 24 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c0g1 { + label = "LED_ID_DIMM_C0G1"; + gpios = <&smb_svc_pex_cpu0_led 25 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c0h2 { + label = "LED_ID_DIMM_C0H2"; + gpios = <&smb_svc_pex_cpu0_led 26 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c0h1 { + label = "LED_ID_DIMM_C0H1"; + gpios = <&smb_svc_pex_cpu0_led 27 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c0a2 { + label = "LED_ID_DIMM_C0A2"; + gpios = <&smb_svc_pex_cpu0_led 28 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c0a1 { + label = "LED_ID_DIMM_C0A1"; + gpios = <&smb_svc_pex_cpu0_led 29 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c0b2 { + label = "LED_ID_DIMM_C0B2"; + gpios = <&smb_svc_pex_cpu0_led 30 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c0b1 { + label = "LED_ID_DIMM_C0B1"; + gpios = <&smb_svc_pex_cpu0_led 31 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c0c2 { + label = "LED_ID_DIMM_C0C2"; + gpios = <&smb_svc_pex_cpu0_led 32 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c0c1 { + label = "LED_ID_DIMM_C0C1"; + gpios = <&smb_svc_pex_cpu0_led 33 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c0d2 { + label = "LED_ID_DIMM_C0D2"; + gpios = <&smb_svc_pex_cpu0_led 34 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c0d1 { + label = "LED_ID_DIMM_C0D1"; + gpios = <&smb_svc_pex_cpu0_led 35 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c1e2 { + label = "LED_ID_DIMM_C1E2"; + gpios = <&smb_svc_pex_cpu1_led 20 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c1e1 { + label = "LED_ID_DIMM_C1E1"; + gpios = <&smb_svc_pex_cpu1_led 21 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c1f2 { + label = "LED_ID_DIMM_C1F2"; + gpios = <&smb_svc_pex_cpu1_led 22 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c1f1 { + label = "LED_ID_DIMM_C1F1"; + gpios = <&smb_svc_pex_cpu1_led 23 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c1g2 { + label = "LED_ID_DIMM_C1G2"; + gpios = <&smb_svc_pex_cpu1_led 24 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c1g1 { + label = "LED_ID_DIMM_C1G1"; + gpios = <&smb_svc_pex_cpu1_led 25 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c1h2 { + label = "LED_ID_DIMM_C1H2"; + gpios = <&smb_svc_pex_cpu1_led 26 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c1h1 { + label = "LED_ID_DIMM_C1H1"; + gpios = <&smb_svc_pex_cpu1_led 27 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c1a2 { + label = "LED_ID_DIMM_C1A2"; + gpios = <&smb_svc_pex_cpu1_led 28 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c1a1 { + label = "LED_ID_DIMM_C1A1"; + gpios = <&smb_svc_pex_cpu1_led 29 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c1b2 { + label = "LED_ID_DIMM_C1B2"; + gpios = <&smb_svc_pex_cpu1_led 30 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c1b1 { + label = "LED_ID_DIMM_C1B1"; + gpios = <&smb_svc_pex_cpu1_led 31 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c1c2 { + label = "LED_ID_DIMM_C1C2"; + gpios = <&smb_svc_pex_cpu1_led 32 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c1c1 { + label = "LED_ID_DIMM_C1C1"; + gpios = <&smb_svc_pex_cpu1_led 33 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c1d2 { + label = "LED_ID_DIMM_C1D2"; + gpios = <&smb_svc_pex_cpu1_led 34 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c1d1 { + label = "LED_ID_DIMM_C1D1"; + gpios = <&smb_svc_pex_cpu1_led 35 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c2e2 { + label = "LED_ID_DIMM_C2E2"; + gpios = <&smb_svc_pex_cpu2_led 20 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c2e1 { + label = "LED_ID_DIMM_C2E1"; + gpios = <&smb_svc_pex_cpu2_led 21 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c2f2 { + label = "LED_ID_DIMM_C2F2"; + gpios = <&smb_svc_pex_cpu2_led 22 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c2f1 { + label = "LED_ID_DIMM_C2F1"; + gpios = <&smb_svc_pex_cpu2_led 23 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c2g2 { + label = "LED_ID_DIMM_C2G2"; + gpios = <&smb_svc_pex_cpu2_led 24 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c2g1 { + label = "LED_ID_DIMM_C2G1"; + gpios = <&smb_svc_pex_cpu2_led 25 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c2h2 { + label = "LED_ID_DIMM_C2H2"; + gpios = <&smb_svc_pex_cpu2_led 26 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c2h1 { + label = "LED_ID_DIMM_C2H1"; + gpios = <&smb_svc_pex_cpu2_led 27 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c2a2 { + label = "LED_ID_DIMM_C2A2"; + gpios = <&smb_svc_pex_cpu2_led 28 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c2a1 { + label = "LED_ID_DIMM_C2A1"; + gpios = <&smb_svc_pex_cpu2_led 29 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c2b2 { + label = "LED_ID_DIMM_C2B2"; + gpios = <&smb_svc_pex_cpu2_led 30 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c2b1 { + label = "LED_ID_DIMM_C2B1"; + gpios = <&smb_svc_pex_cpu2_led 31 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c2c2 { + label = "LED_ID_DIMM_C2C2"; + gpios = <&smb_svc_pex_cpu2_led 32 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c2c1 { + label = "LED_ID_DIMM_C2C1"; + gpios = <&smb_svc_pex_cpu2_led 33 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c2d2 { + label = "LED_ID_DIMM_C2D2"; + gpios = <&smb_svc_pex_cpu2_led 34 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c2d1 { + label = "LED_ID_DIMM_C2D1"; + gpios = <&smb_svc_pex_cpu2_led 35 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c3e2 { + label = "LED_ID_DIMM_C3E2"; + gpios = <&smb_svc_pex_cpu3_led 20 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c3e1 { + label = "LED_ID_DIMM_C3E1"; + gpios = <&smb_svc_pex_cpu3_led 21 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c3f2 { + label = "LED_ID_DIMM_C3F2"; + gpios = <&smb_svc_pex_cpu3_led 22 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c3f1 { + label = "LED_ID_DIMM_C3F1"; + gpios = <&smb_svc_pex_cpu3_led 23 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c3g2 { + label = "LED_ID_DIMM_C3G2"; + gpios = <&smb_svc_pex_cpu3_led 24 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c3g1 { + label = "LED_ID_DIMM_C3G1"; + gpios = <&smb_svc_pex_cpu3_led 25 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c3h2 { + label = "LED_ID_DIMM_C3H2"; + gpios = <&smb_svc_pex_cpu3_led 26 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c3h1 { + label = "LED_ID_DIMM_C3H1"; + gpios = <&smb_svc_pex_cpu3_led 27 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c3a2 { + label = "LED_ID_DIMM_C3A2"; + gpios = <&smb_svc_pex_cpu3_led 28 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c3a1 { + label = "LED_ID_DIMM_C3A1"; + gpios = <&smb_svc_pex_cpu3_led 29 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c3b2 { + label = "LED_ID_DIMM_C3B2"; + gpios = <&smb_svc_pex_cpu3_led 30 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c3b1 { + label = "LED_ID_DIMM_C3B1"; + gpios = <&smb_svc_pex_cpu3_led 31 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c3c2 { + label = "LED_ID_DIMM_C3C2"; + gpios = <&smb_svc_pex_cpu3_led 32 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c3c1 { + label = "LED_ID_DIMM_C3C1"; + gpios = <&smb_svc_pex_cpu3_led 33 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c3d2 { + label = "LED_ID_DIMM_C3D2"; + gpios = <&smb_svc_pex_cpu3_led 34 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-c3d1 { + label = "LED_ID_DIMM_C3D1"; + gpios = <&smb_svc_pex_cpu3_led 35 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd01 { + label = "LED_ID_RSSD01"; + gpios = <&smb_svc_pex_rssd01_16 0 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd02 { + label = "LED_ID_RSSD02"; + gpios = <&smb_svc_pex_rssd01_16 1 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd03 { + label = "LED_ID_RSSD03"; + gpios = <&smb_svc_pex_rssd01_16 2 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd04 { + label = "LED_ID_RSSD04"; + gpios = <&smb_svc_pex_rssd01_16 3 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd05 { + label = "LED_ID_RSSD05"; + gpios = <&smb_svc_pex_rssd01_16 4 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd06 { + label = "LED_ID_RSSD06"; + gpios = <&smb_svc_pex_rssd01_16 5 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd07 { + label = "LED_ID_RSSD07"; + gpios = <&smb_svc_pex_rssd01_16 6 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd08 { + label = "LED_ID_RSSD08"; + gpios = <&smb_svc_pex_rssd01_16 7 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd09 { + label = "LED_ID_RSSD09"; + gpios = <&smb_svc_pex_rssd01_16 8 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd10 { + label = "LED_ID_RSSD10"; + gpios = <&smb_svc_pex_rssd01_16 9 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd11 { + label = "LED_ID_RSSD11"; + gpios = <&smb_svc_pex_rssd01_16 10 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd12 { + label = "LED_ID_RSSD12"; + gpios = <&smb_svc_pex_rssd01_16 11 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd13 { + label = "LED_ID_RSSD13"; + gpios = <&smb_svc_pex_rssd01_16 12 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd14 { + label = "LED_ID_RSSD14"; + gpios = <&smb_svc_pex_rssd01_16 13 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd15 { + label = "LED_ID_RSSD15"; + gpios = <&smb_svc_pex_rssd01_16 14 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd16 { + label = "LED_ID_RSSD16"; + gpios = <&smb_svc_pex_rssd01_16 15 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd17 { + label = "LED_ID_RSSD17"; + gpios = <&smb_svc_pex_rssd17_32 0 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd18 { + label = "LED_ID_RSSD18"; + gpios = <&smb_svc_pex_rssd17_32 1 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd19 { + label = "LED_ID_RSSD19"; + gpios = <&smb_svc_pex_rssd17_32 2 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd20 { + label = "LED_ID_RSSD20"; + gpios = <&smb_svc_pex_rssd17_32 3 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd21 { + label = "LED_ID_RSSD21"; + gpios = <&smb_svc_pex_rssd17_32 4 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd22 { + label = "LED_ID_RSSD22"; + gpios = <&smb_svc_pex_rssd17_32 5 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd23 { + label = "LED_ID_RSSD23"; + gpios = <&smb_svc_pex_rssd17_32 6 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd24 { + label = "LED_ID_RSSD24"; + gpios = <&smb_svc_pex_rssd17_32 7 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd25 { + label = "LED_ID_RSSD25"; + gpios = <&smb_svc_pex_rssd17_32 8 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd26 { + label = "LED_ID_RSSD26"; + gpios = <&smb_svc_pex_rssd17_32 9 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd27 { + label = "LED_ID_RSSD27"; + gpios = <&smb_svc_pex_rssd17_32 10 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd28 { + label = "LED_ID_RSSD28"; + gpios = <&smb_svc_pex_rssd17_32 11 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd29 { + label = "LED_ID_RSSD29"; + gpios = <&smb_svc_pex_rssd17_32 12 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd30 { + label = "LED_ID_RSSD30"; + gpios = <&smb_svc_pex_rssd17_32 13 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd31 { + label = "LED_ID_RSSD31"; + gpios = <&smb_svc_pex_rssd17_32 14 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-dimm-rssd32 { + label = "LED_ID_RSSD32"; + gpios = <&smb_svc_pex_rssd17_32 15 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-fan-asm01 { + label = "LED_ID_FAN_ASM01"; + gpios = <&smb_svc_pex_rssd01_16 32 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-fan-asm02 { + label = "LED_ID_FAN_ASM02"; + gpios = <&smb_svc_pex_rssd01_16 33 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-fan-asm03 { + label = "LED_ID_FAN_ASM03"; + gpios = <&smb_svc_pex_rssd01_16 34 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-fan-asm04 { + label = "LED_ID_FAN_ASM04"; + gpios = <&smb_svc_pex_rssd01_16 35 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-fan-asm05 { + label = "LED_ID_FAN_ASM05"; + gpios = <&smb_svc_pex_rssd01_16 36 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-fan-asm06 { + label = "LED_ID_FAN_ASM06"; + gpios = <&smb_svc_pex_rssd01_16 37 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-fan-asm07 { + label = "LED_ID_FAN_ASM07"; + gpios = <&smb_svc_pex_rssd17_32 32 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-fan-asm08 { + label = "LED_ID_FAN_ASM08"; + gpios = <&smb_svc_pex_rssd17_32 33 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-fan-asm09 { + label = "LED_ID_FAN_ASM09"; + gpios = <&smb_svc_pex_rssd17_32 34 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-fan-asm10 { + label = "LED_ID_FAN_ASM10"; + gpios = <&smb_svc_pex_rssd17_32 35 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-fan-asm11 { + label = "LED_ID_FAN_ASM11"; + gpios = <&smb_svc_pex_rssd17_32 36 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + + led-id-fan-asm12 { + label = "LED_ID_FAN_ASM12"; + gpios = <&smb_svc_pex_rssd17_32 37 GPIO_ACTIVE_LOW>; + color = <LED_COLOR_ID_YELLOW>; + }; + }; + + p12v: fixedregulator-p12v { + compatible = "regulator-fixed"; + regulator-name = "p12v"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-always-on; + regulator-boot-on; + }; + + p3v3_bmc_aux: fixedregulator-p3v3-bmc-aux { + compatible = "regulator-fixed"; + regulator-name = "p3v3_bmc_aux"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + p1v8_bmc_aux: fixedregulator-p1v8-bmc-aux { + compatible = "regulator-fixed"; + regulator-name = "p1v8_bmc_aux"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + p1v2_bmc_aux: fixedregulator-p1v2-bmc-aux { + compatible = "regulator-fixed"; + regulator-name = "p1v2_bmc_aux"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + regulator-boot-on; + }; + + p12v-a-consumer { + compatible = "regulator-output"; + vout-supply = <&p12v_a>; + }; + + p12v-b-consumer { + compatible = "regulator-output"; + vout-supply = <&p12v_b>; + }; + + p12v-c-consumer { + compatible = "regulator-output"; + vout-supply = <&p12v_c>; + }; + + p12v-d-consumer { + compatible = "regulator-output"; + vout-supply = <&p12v_d>; + }; + + pvccinfaon-cpu0-consumer { + compatible = "regulator-output"; + vout-supply = <&pvccinfaon_cpu0>; + }; + + pvccfa-ehv-cpu0-consumer { + compatible = "regulator-output"; + vout-supply = <&pvccfa_ehv_cpu0>; + }; + + pvnn-main-cpu0-consumer { + compatible = "regulator-output"; + vout-supply = <&pvnn_main_cpu0>; + }; + + pvccin-cpu0-consumer { + compatible = "regulator-output"; + vout-supply = <&pvccin_cpu0>; + }; + + pvccfa-ehv-fivra-cpu0-consumer { + compatible = "regulator-output"; + vout-supply = <&pvccfa_ehv_fivra_cpu0>; + }; + + pvccd-hv-cpu0-consumer { + compatible = "regulator-output"; + vout-supply = <&pvccd_hv_cpu0>; + }; + + pvpp-hbm-cpu0-consumer { + compatible = "regulator-output"; + vout-supply = <&pvpp_hbm_cpu0>; + }; + + pvccinfaon-cpu1-consumer { + compatible = "regulator-output"; + vout-supply = <&pvccinfaon_cpu1>; + }; + + pvccfa-ehv-cpu1-consumer { + compatible = "regulator-output"; + vout-supply = <&pvccfa_ehv_cpu1>; + }; + + pvnn-main-cpu1-consumer { + compatible = "regulator-output"; + vout-supply = <&pvnn_main_cpu1>; + }; + + pvccin-cpu1-consumer { + compatible = "regulator-output"; + vout-supply = <&pvccin_cpu1>; + }; + + pvccfa-ehv-fivra-cpu1-consumer { + compatible = "regulator-output"; + vout-supply = <&pvccfa_ehv_fivra_cpu1>; + }; + + pvccd-hv-cpu1-consumer { + compatible = "regulator-output"; + vout-supply = <&pvccd_hv_cpu1>; + }; + + pvpp-hbm-cpu1-consumer { + compatible = "regulator-output"; + vout-supply = <&pvpp_hbm_cpu1>; + }; + + pvccinfaon-cpu2-consumer { + compatible = "regulator-output"; + vout-supply = <&pvccinfaon_cpu2>; + }; + + pvccfa-ehv-cpu2-consumer { + compatible = "regulator-output"; + vout-supply = <&pvccfa_ehv_cpu2>; + }; + + pvnn-main-cpu2-consumer { + compatible = "regulator-output"; + vout-supply = <&pvnn_main_cpu2>; + }; + + pvccin-cpu2-consumer { + compatible = "regulator-output"; + vout-supply = <&pvccin_cpu2>; + }; + + pvccfa-ehv-fivra-cpu2-consumer { + compatible = "regulator-output"; + vout-supply = <&pvccfa_ehv_fivra_cpu2>; + }; + + pvccd-hv-cpu2-consumer { + compatible = "regulator-output"; + vout-supply = <&pvccd_hv_cpu2>; + }; + + pvpp-hbm-cpu2-consumer { + compatible = "regulator-output"; + vout-supply = <&pvpp_hbm_cpu2>; + }; + + pvccinfaon-cpu3-consumer { + compatible = "regulator-output"; + vout-supply = <&pvccinfaon_cpu3>; + }; + + pvccfa-ehv-cpu3-consumer { + compatible = "regulator-output"; + vout-supply = <&pvccfa_ehv_cpu3>; + }; + + pvnn-main-cpu3-consumer { + compatible = "regulator-output"; + vout-supply = <&pvnn_main_cpu3>; + }; + + pvccin-cpu3-consumer { + compatible = "regulator-output"; + vout-supply = <&pvccin_cpu3>; + }; + + pvccfa-ehv-fivra-cpu3-consumer { + compatible = "regulator-output"; + vout-supply = <&pvccfa_ehv_fivra_cpu3>; + }; + + pvccd-hv-cpu3-consumer { + compatible = "regulator-output"; + vout-supply = <&pvccd_hv_cpu3>; + }; + + pvpp-hbm-cpu3-consumer { + compatible = "regulator-output"; + vout-supply = <&pvpp_hbm_cpu3>; + }; + + p1v05-pch-aux-consumer { + compatible = "regulator-output"; + vout-supply = <&p1v05_pch_aux>; + }; + + p1v8-pch-aux-consumer { + compatible = "regulator-output"; + vout-supply = <&p1v8_pch_aux>; + }; + + p3v3-pch-consumer { + compatible = "regulator-output"; + vout-supply = <&p3v3_pch>; + }; + + p5v-consumer { + compatible = "regulator-output"; + vout-supply = <&p5v>; + }; + + smb-m2-ssb-ssd2 { + compatible = "regulator-output"; + vout-supply = <&sw0_smb_m2_ssb_ssd2>; + }; + + smb-m2-ssb-ssd1 { + compatible = "regulator-output"; + vout-supply = <&sw0_smb_m2_ssb_ssd1>; + }; + + ssb-rssd01-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd01>; + }; + + ssb-rssd01-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd01>; + }; + + ssb-rssd02-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd02>; + }; + + ssb-rssd02-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd02>; + }; + + ssb-rssd03-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd03>; + }; + + ssb-rssd03-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd03>; + }; + + ssb-rssd04-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd04>; + }; + + ssb-rssd04-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd04>; + }; + + ssb-rssd05-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd05>; + }; + + ssb-rssd05-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd05>; + }; + + ssb-rssd06-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd06>; + }; + + ssb-rssd06-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd06>; + }; + + ssb-rssd07-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd07>; + }; + + ssb-rssd07-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd07>; + }; + + ssb-rssd08-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd08>; + }; + + ssb-rssd08-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd08>; + }; + + ssb-rssd09-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd09>; + }; + + ssb-rssd09-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd09>; + }; + + ssb-rssd10-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd10>; + }; + + ssb-rssd10-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd10>; + }; + + ssb-rssd11-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd11>; + }; + + ssb-rssd11-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd11>; + }; + + ssb-rssd12-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd12>; + }; + + ssb-rssd12-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd12>; + }; + + ssb-rssd13-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd13>; + }; + + ssb-rssd13-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd13>; + }; + + ssb-rssd14-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd14>; + }; + + ssb-rssd14-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd14>; + }; + + ssb-rssd15-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd15>; + }; + + ssb-rssd15-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd15>; + }; + + ssb-rssd16-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd16>; + }; + + ssb-rssd16-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd16>; + }; + + ssb-rssd17-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd17>; + }; + + ssb-rssd17-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd17>; + }; + + ssb-rssd18-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd18>; + }; + + ssb-rssd18-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd18>; + }; + + ssb-rssd19-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd19>; + }; + + ssb-rssd19-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd19>; + }; + + ssb-rssd20-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd20>; + }; + + ssb-rssd20-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd20>; + }; + + ssb-rssd21-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd21>; + }; + + ssb-rssd21-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd21>; + }; + + ssb-rssd22-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd22>; + }; + + ssb-rssd22-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd22>; + }; + + ssb-rssd23-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd23>; + }; + + ssb-rssd23-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd23>; + }; + + ssb-rssd24-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd24>; + }; + + ssb-rssd24-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd24>; + }; + + ssb-rssd25-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd25>; + }; + + ssb-rssd25-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd25>; + }; + + ssb-rssd26-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd26>; + }; + + ssb-rssd26-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd26>; + }; + + ssb-rssd27-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd27>; + }; + + ssb-rssd27-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd27>; + }; + + ssb-rssd28-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd28>; + }; + + ssb-rssd28-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd28>; + }; + + ssb-rssd29-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd29>; + }; + + ssb-rssd29-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd29>; + }; + + ssb-rssd30-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd30>; + }; + + ssb-rssd30-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd30>; + }; + + ssb-rssd31-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd31>; + }; + + ssb-rssd31-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd31>; + }; + + ssb-rssd32-sw0 { + compatible = "regulator-output"; + vout-supply = <&sw0_ssb_rssd32>; + }; + + ssb-rssd32-sw1 { + compatible = "regulator-output"; + vout-supply = <&sw1_ssb_rssd32>; + }; + + p3v3-nic-consumer { + compatible = "regulator-output"; + vout-supply = <&p3v3_nic>; + }; + + p1v8-nic-consumer { + compatible = "regulator-output"; + vout-supply = <&p1v8_nic>; + }; + + p1v2-nic-consumer { + compatible = "regulator-output"; + vout-supply = <&p1v2_nic>; + }; + + pvcore-nic1-consumer { + compatible = "regulator-output"; + vout-supply = <&pvcore_nic1>; + }; + + pvcore-nic2-consumer { + compatible = "regulator-output"; + vout-supply = <&pvcore_nic2>; + }; +}; + +&lpc_snoop { + status = "okay"; + snoop-ports = <0x80>, <0x81>; +}; + +&fmc { + status = "okay"; + flash@0 { + status = "okay"; + m25p,fast-read; + label = "bmc"; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + }; + + flash@1 { + status = "okay"; + m25p,fast-read; + label = "alt-bmc"; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + }; +}; + +&uart1 { + bootph-all; + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_txd1_default + &pinctrl_rxd1_default + &pinctrl_nrts1_default + &pinctrl_ndtr1_default + &pinctrl_ndsr1_default + &pinctrl_ncts1_default + &pinctrl_ndcd1_default + &pinctrl_nri1_default>; +}; + +&uart5 { + status = "disabled"; +}; + +&mdio { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mdio3_default &pinctrl_mdio4_default>; +}; + +&gpio1 { + status = "disabled"; +}; + +&pinctrl { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_vgahs_default &pinctrl_vgavs_default>; +}; + +&mac0 { + status = "disabled"; +}; + +&mac1 { + status = "disabled"; +}; + +&mac2 { + status = "okay"; + + phy-mode = "rgmii"; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii3_default>; +}; + +&mac3 { + status = "okay"; + + phy-mode = "rgmii"; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii4_default>; +}; + +&kcs3 { + status = "okay"; + aspeed,lpc-io-reg = <0xca2>; +}; + +&gpio0 { + status = "okay"; + + gpio-line-names = + /* A0 - A7 */ + "", "", "", "", "", "", "", "", + /* B0 - B7 */ + "", "", "FM_ADR_TRIGGER_R_N", "RST_PLTRST_BUF_N", "BMC_TPM_RESET_N", "BMC_TPM_IRQ_N", + "PCH_TPM_RESET_N", "PCH_TPM_IRQ_N", + /* C0 - C7 */ + "", "", "", "", "", "", "", "", + /* D0 - D7 */ + "", "", "", "", "", "", "", "", + /* E0 - E7 */ + "", "", "", "", "", "", "", "", + /* F0 - F7 */ + "", "", "", "BMC_MUX_CPU1_RST_INT_N", "BMC_MUX_CPU2_RST_INT_N", "", "", "", + /* G0 - G7 */ + "FM_SSD_CLK_DRVR1_EN", "FM_CK440Q_DEV_EN", "BMC_MAC1_RESET_N", "FM_DB2000_DEV_EN", + "FM_CPU_RMCA_LVT3_N", "FM_CPU_CATERR_LVT3_N", "FM_DBP_PRESENT_N", "", + /* H0 - H7 */ + "SMB_SVC_PEX_RSSD17_32_INT", "LED_BMC_RDY", "RST_DBP_N", "", "", "", "", "", + /* I0 - I7 */ + "JTAG_MUX_MODE_SEL", "JTAG_MUX_TRANS_ENBL", "JTAG_MUX_LSP_SEL5", "JTAG_MUX_MSTR_SEL", + "JTAG_MUX_LSP_SEL3", "", "JTAG_MUX_ENBL_N", "JTAG_MUX_RST_N", + /* J0 - J7 */ + "", "", "", "", "", "", "", "", + /* K0 - K7 */ + "", "", "", "", "", "", "", "", + /* L0 - L7 */ + "", "", "", "", "RST_RTCRST_N", "RST_SRTCRST_N", "", "", + /* M0 - M7 */ + "BMC_UART1_CTS_N", "BMC_UART1_DCD_N", "BMC_UART1_DSR_N", "BMC_UART1_RI_N", + "BMC_UART1_DTR_N", "BMC_UART1_RTS_N", "", "", + /* N0 - N7 */ + "IRQ_BMC_PCH_NMI", "", "FM_PCH_BMC_THERMTRIP_N", "FM_BIOS_POST_CMPLT_N", "RST_PLTRST_N", + "FM_FLASH_SEC_OVRD", "FM_SMI_ACTIVE_N", "PWRGD_DBP", + /* O0 - O7 */ + "CATERR_CPU2_EN", "H_LVT1_THERMTRIP_N", "CATERR_CPU3_EN", "SMB_SVC_PEX_CPU0_LED_INT", + "H_LVT1_MEMTRIP_N", "", "CATERR_CPU1_EN", "FM_PCH_ADR_COMPLETE_N", + /* P0 - P7 */ + "PWRGD_SYS_PWROK", "PWRGD_PCH_PWROK", "BMC_MUX_CPU3_RST_INT_N", "BMC_MUX_SVC_RSSD_INT", + "FM_SLPS4_N", "IRQ_SML0_ALERT_N", "FM_SLPS3_N", "LED_BMC_HB", + /* Q0 - Q7 */ + "", "PEX_BMC_RST", "PEX_VR_CTRL_RST", "PEX_NIC_RST", "PEX_CPU0_LED_RST", "PEX_CPU1_LED_RST", + "PEX_CPU2_LED_RST", "PEX_CPU3_LED_RST", + /* R0 - R7 */ + "BMC_MUX_FANSSB_RSSD17_32_RST_INT_N", "BMC_MUX_FANPWM_RSSD01_16_RST_INT_N", + "BMC_MUX_SVC_VR_RST_INT_N", "BMC_MUX_NIC_RST_INT_N", "BMC_MUX_SVC_EXP_RST_INT_N", + "FM_CPU_ERR2_LVT3_N", "BMC_MUX_CPU0_RST_INT_N", "BMC_MUX_M2_RST_INT_N", + /* S0 - S7 */ + "SMB_SVC_PEX_RSSD01_16_INT", "RST_PCH_RSMRST_R_N", "", "", "BMC_ROT_FPGA_RESET_N", + "FM_SSD_CLK_DRVR0_EN", "", "", + /* T0 - T7 */ + "", "", "", "", "", "", "", "", + /* U0 - U7 */ + "", "", "", "", "", "", "", "", + /* V0 - V7 */ + "BMC_PEX_IRQ_INT", "RTC_BATT_TEST", "SMB_PEX_VR_CTRL_INT", "SMB_SVC_PEX_CPU3_LED_INT", + "PWRGD_CPUPWRGD", "SMB_SVC_PEX_CPU2_LED_INT", "SMB_SVC_PEX_CPU1_LED_INT", + "BMC_MAC0_RESET_N", + /* W0 - W7 */ + "", "", "", "", "", "", "", "", + /* X0 - X7 */ + "", "", "", "", "", "", "", "", + /* Y0 - Y7 */ + "FM_THROTTLE_N", "FM_PASSWORD_CLEAR_N", "H_LVT3_CATERR_DLY_N", "FM_CPU_OL_INT_R_N", "", "", + "", "", + /* Z0 - Z7 */ + "FM_CPU_ERR0_LVT3_N", "FM_CPU_ERR1_LVT3_N", "BMC_MUX_VR_PCH_CPU_RST_INT_N", + "JTAG_MUX_LSP_SEL1", "", "JTAG_MUX_LSP_SEL4", "JTAG_MUX_LSP_SEL2", ""; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio0_unbiased_default>; + + line_50 { + gpio-hog; + gpios = <50 GPIO_ACTIVE_LOW>; + output-low; + line-name = "BMC_MAC1_RESET_N"; + }; + line_175 { + gpio-hog; + gpios = <175 GPIO_ACTIVE_LOW>; + output-low; + line-name = "BMC_MAC0_RESET_N"; + }; + +}; + +&pinctrl { + pinctrl_gpio0_unbiased_default: gpio_default { + pins = "AB15", "AD14", "R23", "A18", "AD24", "AD15", "AE14", "AC15", "U25", "AA24", + "V24", "W26", "AA23", "V26", "U24", "V25", "AE15", "C15", "F15"; + bias-disable; + }; +}; + +&i2c1 { + status = "okay"; + + bmc_mux_nic: mux@77 { + compatible = "maxim,max7357"; + reg = <0x77>; + #address-cells = <1>; + #size-cells = <0>; + reset-gpios = <&gpio0 ASPEED_GPIO(R, 3) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + vdd-supply = <&p3v3_aux>; + + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + smb_pex_nic: pinctrl@20 { + compatible = "cypress,cy8c9540"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + + interrupt-parent = <&smb_pex_vr_ctrl>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <2>; + + vdd-supply = <&p3v3_aux>; + reset-gpios = <&gpio0 ASPEED_GPIO(Q, 3) GPIO_ACTIVE_HIGH>; + + gpio-reserved-ranges = <19 1>, <22 6>, <30 6>, <38 2>; + + gpio-line-names = + /* GPORT0 */ + "IRQ_NIC2_OVT_WRNG", "FM_NIC2_ALLSTANDBY_N", "IRQ_NIC2_OVT_SHTDN", + "SMB_VR_PVCORE_NIC2_ALERT_N", "FM_NIC2_PERST1_N", + "SMB_NIC2_ALERT_N", "FM_NIC2_PERST3_N", "FM_NIC2_PERST2_N", + /* GPORT1 */ + "FM_NIC1_RST_N", "FM_NIC1_PERST0_N", "FM_NIC1_PERST2_N", + "FM_NIC1_PERST3_N", "SMB_NIC1_ALERT_N", "FM_NIC1_PERST1_N", + "SMB_VR_PVCORE_NIC1_ALERT_N", "IRQ_NIC1_OVT_SHTDN", + /* GPORT2 */ + "SMB_VR_P3V3_NIC_ALERT_N", "FM_NIC2_FLASH_PRSNT", + "FM_NIC1_FLASH_PRSNT", "", + /* GPORT3 */ + "FM_NIC2_PERST0_N", "FM_NIC2_RST_N", "", "", "", "", "", "", + /* GPORT4 */ + "FM_NIC1_ALLSTANDBY_N", "IRQ_NIC1_OVT_WRNG", "", "", "", "", "", "", + /* GPORT5 */ + "SMB_VR_P1V8_NIC_ALERT_N", "SMB_VR_P1V2_NIC_ALERT_N", "", ""; + + pinctrl-0 = <&U62160_pins>; + pinctrl-names = "default"; + U62160_pins: cfg-pins { + pins = "gp03", "gp16", "gp20", "gp50", "gp51"; + function = "gpio"; + input-enable; + bias-pull-up; + }; + }; + }; + + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + + pvcore_nic2: ir38263-pvcore-nic2@40 { + compatible = "infineon,ir38263"; + reg = <0x40>; + + regulator-name = "pvcore_nic2"; + regulator-enable-ramp-delay = <2000>; + vin-supply = <&p12v>; + }; + }; + + i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + + pvcore_nic1: ir38263-pvcore-nic1@40 { + compatible = "infineon,ir38263"; + reg = <0x40>; + + regulator-name = "pvcore_nic1"; + regulator-enable-ramp-delay = <2000>; + vin-supply = <&p12v>; + }; + }; + + i2c@4 { + reg = <4>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c@5 { + reg = <5>; + #address-cells = <1>; + #size-cells = <0>; + + p3v3_nic: ir38263-p3v3-nic@40 { + compatible = "infineon,ir38263"; + reg = <0x40>; + + regulator-name = "p3v3_nic"; + regulator-enable-ramp-delay = <2000>; + vin-supply = <&p12v>; + }; + }; + + i2c@6 { + reg = <6>; + #address-cells = <1>; + #size-cells = <0>; + + p1v2_nic: ir38263-p1v2-nic@40 { + compatible = "infineon,ir38263"; + reg = <0x40>; + + regulator-name = "p1v2_nic"; + regulator-enable-ramp-delay = <2000>; + vin-supply = <&p12v>; + }; + }; + + i2c@7 { + reg = <7>; + #address-cells = <1>; + #size-cells = <0>; + + p1v8_nic: ir38263-p1v8-nic@40 { + compatible = "infineon,ir38263"; + reg = <0x40>; + + regulator-name = "p1v8_nic"; + regulator-enable-ramp-delay = <2000>; + vin-supply = <&p12v>; + }; + }; + }; +}; + +&i2c2 { + status = "okay"; +}; + +&i2c3 { + status = "okay"; + + i2cmux1: mux@77 { + compatible = "maxim,max7357"; + reg = <0x77>; + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&gpio0 ASPEED_GPIO(R, 7) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + vdd-supply = <&p3v3_aux>; + + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + + smb_m2_ssb_ssd1: regulator@3a { + compatible = "maxim,max5978"; + reg = <0x3a>; + vss1-supply = <&p3v3_aux>; + + interrupt-parent = <&smb_pex_vr_ctrl>; + interrupts = <30 IRQ_TYPE_LEVEL_LOW>; + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "m2_ssb_ssd1:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_smb_m2_ssb_ssd1: sw0 { + shunt-resistor-micro-ohms = <12000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <2800000>; + regulator-name = "p3v3_m2_ssd1"; + regulator-enable-ramp-delay = <10000>; + }; + }; + }; + }; + + i2c@4 { + reg = <4>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c@5 { + reg = <5>; + #address-cells = <1>; + #size-cells = <0>; + + smb_m2_ssb_ssd2: regulator@3a { + compatible = "maxim,max5978"; + reg = <0x3a>; + + interrupt-parent = <&smb_pex_vr_ctrl>; + interrupts = <39 IRQ_TYPE_LEVEL_LOW>; + vss1-supply = <&p3v3_aux>; + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "m2_ssb_ssd2:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_smb_m2_ssb_ssd2: sw0 { + shunt-resistor-micro-ohms = <12000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <2800000>; + regulator-name = "p3v3_m2_ssd2"; + regulator-enable-ramp-delay = <10000>; + }; + }; + }; + }; + + i2c@6 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c@7 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; +}; + +&i2c4 { + status = "okay"; + multi-master; + bus-frequency = <1000000>; + + bmc-slave@10 { + compatible = "ipmb-dev"; + reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + + i2c-protocol; + }; +}; + +&i2c5 { + status = "okay"; + + i2cmux2: mux@77 { + compatible = "maxim,max7357"; + reg = <0x77>; + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&gpio0 ASPEED_GPIO(Z, 2) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + vdd-supply = <&p3v3_aux>; + + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + p1v05_pch_aux: ir38263-p1v05-pch-aux@40 { + compatible = "infineon,ir38263"; + reg = <0x40>; + + regulator-name = "p1v05_pch_aux"; + regulator-enable-ramp-delay = <2000>; + vin-supply = <&p12v>; + }; + }; + + i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + + p1v8_pch_aux: ir38060-p1v8-pch-aux@40 { + compatible = "infineon,ir38060"; + reg = <0x40>; + + regulator-name = "p1v8_pch_aux"; + regulator-enable-ramp-delay = <2000>; + vin-supply = <&p12v>; + }; + }; + + i2c@4 { + reg = <4>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c@5 { + reg = <5>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c@6 { + reg = <6>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c@7 { + reg = <7>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; +}; + +&i2c14 { + status = "okay"; + + i2cmux13: mux@77 { + compatible = "maxim,max7357"; + reg = <0x77>; + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&gpio0 ASPEED_GPIO(R, 6) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + vdd-supply = <&p3v3_aux>; + + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + smb_pex_cpu0_event: pinctrl@20 { + compatible = "cypress,cy8c9540"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + + interrupt-parent = <&smb_pex_vr_ctrl>; + interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <2>; + + vdd-supply = <&p3v3_aux>; + reset-gpios = <&smb_svc_pex_cpu0_led 16 GPIO_ACTIVE_HIGH>; + + gpio-reserved-ranges = <14 2>, <21 1>, <25 3>, <33 1>; + + gpio-line-names = + /* GPORT0 */ + "PWRGD_CHD_CPU0", "PWRGD_CHC_CPU0", + "PWRGD_CHB_CPU0", "PWRGD_CHA_CPU0", + "PWRGD_CHE_CPU0", "PWRGD_CHF_CPU0", + "PWRGD_CHG_CPU0", "PWRGD_CHH_CPU0", + /* GPORT1 */ + "SMB_VR_PVPP_HBM_CPU0_ALERT_N", "SMB_VR_PVCCINFAON_CPU0_ALERT_N", + "SMB_VR_PVNN_MAIN_CPU0_ALERT_N", "SMB_VR_PVCCD_HV_CPU0_ALERT_N", + "SMB_VR_PVCCIN_CPU0_ALERT_N", "SEL_SMB_DIMM_CPU0", + "", "", + /* GPORT2 */ + "PWRGD_LVC3_CPU0_AB_DRAM_G", "PWRGD_LVC3_CPU0_CD_DRAM_G", + "PWRGD_LVC3_CPU0_EF_DRAM_G", "PWRGD_LVC3_CPU0_GH_DRAM_G", + /* GPORT3 */ + "FM_CPU0_DISABLE_COD_N", "", + "RST_LVC3_CPU0_RESET_N", "PWRGD_LVC3_CPU0_PWRGOOD", + "PWRGD_PLT_AUX_CPU0_LVT3", "", + "", "", + /* GPORT4 */ + "H_LVT3_CPU0_PROCHOT_N", "H_LVT3_CPU0_MEMHOT_IN_N", + "H_LVT3_CPU0_MEMHOT_OUT_N", "H_LVT3_CPU0_MEMTRIP_OUT_N", + "H_LVT3_CPU0_THERMTRIP_OUT_N", "", + "H_LVT3_CPU0_NMI", "FM_S3M_CPU0_CD_INIT_ERROR", + /* GPORT5 */ + "FM_CPU0_PKG_ID0", "FM_CPU0_PKG_ID1", + "FM_CPU0_PROC_ID0", "FM_CPU0_PROC_ID1"; + + pinctrl-0 = <&U62080_pins>; + pinctrl-names = "default"; + U62080_pins: cfg-pins { + pins = "gp10", "gp11", "gp12", "gp13", "gp14"; + function = "gpio"; + input-enable; + bias-pull-up; + }; + }; + }; + + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + + pvccinfaon-pvccfa-cpu0@58 { + compatible = "mps,mp2971"; + reg = <0x58>; + interrupt-parent = <&smb_pex_cpu0_event>; + interrupts = <9 IRQ_TYPE_LEVEL_LOW>; + + regulators { + pvccinfaon_cpu0: vout0 { + regulator-name = "pvccinfaon_cpu0"; + regulator-enable-ramp-delay = <200>; + }; + pvccfa_ehv_cpu0: vout1 { + regulator-name = "pvccfa_ehv_cpu0"; + regulator-enable-ramp-delay = <200>; + }; + }; + }; + tda38640-pvnn-main-cpu0@40 { + compatible = "infineon,tda38640"; + reg = <0x40>; + interrupt-parent = <&smb_pex_cpu0_event>; + interrupts = <10 IRQ_TYPE_LEVEL_LOW>; + + regulators { + pvnn_main_cpu0: vout { + regulator-name = "pvnn_main_cpu0"; + regulator-enable-ramp-delay = <200>; + }; + }; + }; + }; + + i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + + mp2973-pvccin-pvccfa-cpu0@58 { + compatible = "mps,mp2973"; + reg = <0x58>; + interrupt-parent = <&smb_pex_cpu0_event>; + interrupts = <12 IRQ_TYPE_LEVEL_LOW>; + + regulators { + pvccin_cpu0: vout0 { + regulator-name = "pvccin_cpu0"; + regulator-enable-ramp-delay = <200>; + }; + pvccfa_ehv_fivra_cpu0: vout1 { + regulator-name = "pvccfa_ehv_fivra_cpu0"; + regulator-enable-ramp-delay = <200>; + }; + }; + }; + }; + + i2c@4 { + reg = <4>; + #address-cells = <1>; + #size-cells = <0>; + + tda38640-pvccd-hv-cpu0@40 { + compatible = "infineon,tda38640"; + reg = <0x40>; + interrupt-parent = <&smb_pex_cpu0_event>; + interrupts = <11 IRQ_TYPE_LEVEL_LOW>; + infineon,en-pin-fixed-level; + + regulators { + pvccd_hv_cpu0: vout { + regulator-name = "pvccd_hv_cpu0"; + regulator-enable-ramp-delay = <200>; + }; + }; + }; + }; + + i2c@5 { + reg = <5>; + #address-cells = <1>; + #size-cells = <0>; + + tda38640-pvpp-hbm-cpu0@40 { + compatible = "infineon,tda38640"; + reg = <0x40>; + interrupt-parent = <&smb_pex_cpu0_event>; + interrupts = <8 IRQ_TYPE_LEVEL_LOW>; + + regulators { + pvpp_hbm_cpu0: vout { + regulator-name = "pvpp_hbm_cpu0"; + regulator-enable-ramp-delay = <200>; + }; + }; + }; + }; + + i2c@6 { + reg = <6>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c@7 { + reg = <7>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; +}; + +&i2c7 { + status = "okay"; + + i2cmux4: mux@77 { + compatible = "maxim,max7357"; + reg = <0x77>; + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&gpio0 ASPEED_GPIO(F, 3) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + vdd-supply = <&p3v3_aux>; + + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + smb_pex_cpu1_event: pinctrl@20 { + compatible = "cypress,cy8c9540"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + + interrupt-parent = <&smb_pex_vr_ctrl>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <2>; + + vdd-supply = <&p3v3_aux>; + reset-gpios = <&smb_svc_pex_cpu1_led 16 GPIO_ACTIVE_HIGH>; + + gpio-reserved-ranges = <14 2>, <21 1>, <25 3>, <33 1>; + + gpio-line-names = + /* GPORT0 */ + "PWRGD_CHD_CPU1", "PWRGD_CHC_CPU1", + "PWRGD_CHB_CPU1", "PWRGD_CHA_CPU1", + "PWRGD_CHE_CPU1", "PWRGD_CHF_CPU1", + "PWRGD_CHG_CPU1", "PWRGD_CHH_CPU1", + /* GPORT1 */ + "SMB_VR_PVPP_HBM_CPU1_ALERT_N", "SMB_VR_PVCCINFAON_CPU1_ALERT_N", + "SMB_VR_PVNN_MAIN_CPU1_ALERT_N", "SMB_VR_PVCCD_HV_CPU1_ALERT_N", + "SMB_VR_PVCCIN_CPU1_ALERT_N", "SEL_SMB_DIMM_CPU1", + "", "", + /* GPORT2 */ + "PWRGD_LVC3_CPU1_AB_DRAM_G", "PWRGD_LVC3_CPU1_CD_DRAM_G", + "PWRGD_LVC3_CPU1_EF_DRAM_G", "PWRGD_LVC3_CPU1_GH_DRAM_G", + /* GPORT3 */ + "FM_CPU1_DISABLE_COD_N", "", + "RST_LVC3_CPU1_RESET_N", "PWRGD_LVC3_CPU1_PWRGOOD", + "PWRGD_PLT_AUX_CPU1_LVT3", "", + "", "", + /* GPORT4 */ + "H_LVT3_CPU1_PROCHOT_N", "H_LVT3_CPU1_MEMHOT_IN_N", + "H_LVT3_CPU1_MEMHOT_OUT_N", "H_LVT3_CPU1_MEMTRIP_OUT_N", + "H_LVT3_CPU1_THERMTRIP_OUT_N", "", + "H_LVT3_CPU1_NMI", "FM_S3M_CPU1_CD_INIT_ERROR", + /* GPORT5 */ + "FM_CPU1_PKG_ID0", "FM_CPU1_PKG_ID1", + "FM_CPU1_PROC_ID0", "FM_CPU1_PROC_ID1"; + + pinctrl-0 = <&U62090_pins>; + pinctrl-names = "default"; + U62090_pins: cfg-pins { + pins = "gp10", "gp11", "gp12", "gp13", "gp14"; + function = "gpio"; + input-enable; + bias-pull-up; + }; + }; + }; + + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + + pvccinfaon-pvccfa-cpu1@58 { + compatible = "mps,mp2971"; + reg = <0x58>; + interrupt-parent = <&smb_pex_cpu1_event>; + interrupts = <9 IRQ_TYPE_LEVEL_LOW>; + + regulators { + pvccinfaon_cpu1: vout0 { + regulator-name = "pvccinfaon_cpu1"; + regulator-enable-ramp-delay = <200>; + }; + pvccfa_ehv_cpu1: vout1 { + regulator-name = "pvccfa_ehv_cpu1"; + regulator-enable-ramp-delay = <200>; + }; + }; + }; + tda38640-pvnn-main-cpu1@40 { + compatible = "infineon,tda38640"; + reg = <0x40>; + interrupt-parent = <&smb_pex_cpu1_event>; + interrupts = <10 IRQ_TYPE_LEVEL_LOW>; + + regulators { + pvnn_main_cpu1: vout { + regulator-name = "pvnn_main_cpu1"; + regulator-enable-ramp-delay = <200>; + }; + }; + }; + }; + + i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + + mp2973-pvccin-pvccfa-cpu1@58 { + compatible = "mps,mp2973"; + reg = <0x58>; + interrupt-parent = <&smb_pex_cpu1_event>; + interrupts = <12 IRQ_TYPE_LEVEL_LOW>; + + regulators { + pvccin_cpu1: vout0 { + regulator-name = "pvccin_cpu1"; + regulator-enable-ramp-delay = <200>; + }; + pvccfa_ehv_fivra_cpu1: vout1 { + regulator-name = "pvccfa_ehv_fivra_cpu1"; + regulator-enable-ramp-delay = <200>; + }; + }; + }; + }; + + i2c@4 { + reg = <4>; + #address-cells = <1>; + #size-cells = <0>; + + tda38640-pvccd-hv-cpu1@40 { + compatible = "infineon,tda38640"; + reg = <0x40>; + interrupt-parent = <&smb_pex_cpu1_event>; + interrupts = <11 IRQ_TYPE_LEVEL_LOW>; + infineon,en-pin-fixed-level; + + regulators { + pvccd_hv_cpu1: vout { + regulator-name = "pvccd_hv_cpu1"; + regulator-enable-ramp-delay = <200>; + }; + }; + }; + }; + + i2c@5 { + reg = <5>; + #address-cells = <1>; + #size-cells = <0>; + + tda38640-pvpp-hbm-cpu1@40 { + compatible = "infineon,tda38640"; + reg = <0x40>; + interrupt-parent = <&smb_pex_cpu1_event>; + interrupts = <8 IRQ_TYPE_LEVEL_LOW>; + + regulators { + pvpp_hbm_cpu1: vout { + regulator-name = "pvpp_hbm_cpu1"; + regulator-enable-ramp-delay = <200>; + }; + }; + }; + }; + + i2c@6 { + reg = <6>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c@7 { + reg = <7>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; +}; + +&i2c6 { + status = "okay"; + + i2cmux3: mux@77 { + compatible = "maxim,max7357"; + reg = <0x77>; + #address-cells = <1>; + #size-cells = <0>; + + vdd-supply = <&p3v3_aux>; + + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + smb_pex_cpu2_event: pinctrl@20 { + compatible = "cypress,cy8c9540"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + + interrupt-parent = <&smb_pex_vr_ctrl>; + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <2>; + + vdd-supply = <&p3v3_aux>; + reset-gpios = <&smb_svc_pex_cpu2_led 16 GPIO_ACTIVE_HIGH>; + + gpio-reserved-ranges = <14 2>, <21 1>, <25 3>, <33 1>; + + gpio-line-names = + /* GPORT0 */ + "PWRGD_CHD_CPU2", "PWRGD_CHC_CPU2", + "PWRGD_CHB_CPU2", "PWRGD_CHA_CPU2", + "PWRGD_CHE_CPU2", "PWRGD_CHF_CPU2", + "PWRGD_CHG_CPU2", "PWRGD_CHH_CPU2", + /* GPORT1 */ + "SMB_VR_PVPP_HBM_CPU2_ALERT_N", "SMB_VR_PVCCINFAON_CPU2_ALERT_N", + "SMB_VR_PVNN_MAIN_CPU2_ALERT_N", "SMB_VR_PVCCD_HV_CPU2_ALERT_N", + "SMB_VR_PVCCIN_CPU2_ALERT_N", "SEL_SMB_DIMM_CPU2", + "", "", + /* GPORT2 */ + "PWRGD_LVC3_CPU2_AB_DRAM_G", "PWRGD_LVC3_CPU2_CD_DRAM_G", + "PWRGD_LVC3_CPU2_EF_DRAM_G", "PWRGD_LVC3_CPU2_GH_DRAM_G", + /* GPORT3 */ + "FM_CPU2_DISABLE_COD_N", "", + "RST_LVC3_CPU2_RESET_N", "PWRGD_LVC3_CPU2_PWRGOOD", + "PWRGD_PLT_AUX_CPU2_LVT3", "", + "", "", + /* GPORT4 */ + "H_LVT3_CPU2_PROCHOT_N", "H_LVT3_CPU2_MEMHOT_IN_N", + "H_LVT3_CPU2_MEMHOT_OUT_N", "H_LVT3_CPU2_MEMTRIP_OUT_N", + "H_LVT3_CPU2_THERMTRIP_OUT_N", "", + "H_LVT3_CPU2_NMI", "FM_S3M_CPU2_CD_INIT_ERROR", + /* GPORT5 */ + "FM_CPU2_PKG_ID0", "FM_CPU2_PKG_ID1", + "FM_CPU2_PROC_ID0", "FM_CPU2_PROC_ID1"; + + pinctrl-0 = <&U62100_pins>; + pinctrl-names = "default"; + U62100_pins: cfg-pins { + pins = "gp10", "gp11", "gp12", "gp13", "gp14"; + function = "gpio"; + input-enable; + bias-pull-up; + }; + }; + }; + + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + + pvccinfaon-pvccfa-cpu2@58 { + compatible = "mps,mp2971"; + reg = <0x58>; + interrupt-parent = <&smb_pex_cpu2_event>; + interrupts = <9 IRQ_TYPE_LEVEL_LOW>; + + regulators { + pvccinfaon_cpu2: vout0 { + regulator-name = "pvccinfaon_cpu2"; + regulator-enable-ramp-delay = <200>; + }; + pvccfa_ehv_cpu2: vout1 { + regulator-name = "pvccfa_ehv_cpu2"; + regulator-enable-ramp-delay = <200>; + }; + }; + }; + tda38640-pvnn-main-cpu2@40 { + compatible = "infineon,tda38640"; + reg = <0x40>; + interrupt-parent = <&smb_pex_cpu2_event>; + interrupts = <10 IRQ_TYPE_LEVEL_LOW>; + + regulators { + pvnn_main_cpu2: vout { + regulator-name = "pvnn_main_cpu2"; + regulator-enable-ramp-delay = <200>; + }; + }; + }; + }; + + i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + + mp2973-pvccin-pvccfa-cpu2@58 { + compatible = "mps,mp2973"; + reg = <0x58>; + interrupt-parent = <&smb_pex_cpu2_event>; + interrupts = <12 IRQ_TYPE_LEVEL_LOW>; + + regulators { + pvccin_cpu2: vout0 { + regulator-name = "pvccin_cpu2"; + regulator-enable-ramp-delay = <200>; + }; + pvccfa_ehv_fivra_cpu2: vout1 { + regulator-name = "pvccfa_ehv_fivra_cpu2"; + regulator-enable-ramp-delay = <200>; + }; + }; + }; + }; + + i2c@4 { + reg = <4>; + #address-cells = <1>; + #size-cells = <0>; + + tda38640-pvccd-hv-cpu2@40 { + compatible = "infineon,tda38640"; + reg = <0x40>; + interrupt-parent = <&smb_pex_cpu2_event>; + interrupts = <11 IRQ_TYPE_LEVEL_LOW>; + infineon,en-pin-fixed-level; + + regulators { + pvccd_hv_cpu2: vout { + regulator-name = "pvccd_hv_cpu2"; + regulator-enable-ramp-delay = <200>; + }; + }; + }; + }; + + i2c@5 { + reg = <5>; + #address-cells = <1>; + #size-cells = <0>; + + tda38640-pvpp-hbm-cpu2@40 { + compatible = "infineon,tda38640"; + reg = <0x40>; + interrupt-parent = <&smb_pex_cpu2_event>; + interrupts = <8 IRQ_TYPE_LEVEL_LOW>; + + regulators { + pvpp_hbm_cpu2: vout { + regulator-name = "pvpp_hbm_cpu2"; + regulator-enable-ramp-delay = <200>; + }; + }; + }; + }; + + i2c@6 { + reg = <6>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c@7 { + reg = <7>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; +}; + +&i2c12 { + status = "okay"; + + i2cmux22: mux@77 { + compatible = "maxim,max7357"; + reg = <0x77>; + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&gpio0 ASPEED_GPIO(P, 2) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + vdd-supply = <&p3v3_aux>; + + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + smb_pex_cpu3_event: pinctrl@20 { + compatible = "cypress,cy8c9540"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + + interrupt-parent = <&smb_pex_vr_ctrl>; + interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <2>; + + vdd-supply = <&p3v3_aux>; + reset-gpios = <&smb_svc_pex_cpu3_led 16 GPIO_ACTIVE_HIGH>; + + gpio-reserved-ranges = <14 2>, <21 1>, <25 3>, <33 1>; + + gpio-line-names = + /* GPORT0 */ + "PWRGD_CHD_CPU3", "PWRGD_CHC_CPU3", + "PWRGD_CHB_CPU3", "PWRGD_CHA_CPU3", + "PWRGD_CHE_CPU3", "PWRGD_CHF_CPU3", + "PWRGD_CHG_CPU3", "PWRGD_CHH_CPU3", + /* GPORT1 */ + "SMB_VR_PVPP_HBM_CPU3_ALERT_N", "SMB_VR_PVCCINFAON_CPU3_ALERT_N", + "SMB_VR_PVNN_MAIN_CPU3_ALERT_N", "SMB_VR_PVCCD_HV_CPU3_ALERT_N", + "SMB_VR_PVCCIN_CPU3_ALERT_N", "SEL_SMB_DIMM_CPU3", + "", "", + /* GPORT2 */ + "PWRGD_LVC3_CPU3_AB_DRAM_G", "PWRGD_LVC3_CPU3_CD_DRAM_G", + "PWRGD_LVC3_CPU3_EF_DRAM_G", "PWRGD_LVC3_CPU3_GH_DRAM_G", + /* GPORT3 */ + "FM_CPU3_DISABLE_COD_N", "", + "RST_LVC3_CPU3_RESET_N", "PWRGD_LVC3_CPU3_PWRGOOD", + "PWRGD_PLT_AUX_CPU3_LVT3", "", + "", "", + /* GPORT4 */ + "H_LVT3_CPU3_PROCHOT_N", "H_LVT3_CPU3_MEMHOT_IN_N", + "H_LVT3_CPU3_MEMHOT_OUT_N", "H_LVT3_CPU3_MEMTRIP_OUT_N", + "H_LVT3_CPU3_THERMTRIP_OUT_N", "", + "H_LVT3_CPU3_NMI", "FM_S3M_CPU3_CD_INIT_ERROR", + /* GPORT5 */ + "FM_CPU3_PKG_ID0", "FM_CPU3_PKG_ID1", + "FM_CPU3_PROC_ID0", "FM_CPU3_PROC_ID1"; + + pinctrl-0 = <&U62110_pins>; + pinctrl-names = "default"; + U62110_pins: cfg-pins { + pins = "gp10", "gp11", "gp12", "gp13", "gp14"; + function = "gpio"; + input-enable; + bias-pull-up; + }; + }; + }; + + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + + pvccinfaon-pvccfa-cpu3@58 { + compatible = "mps,mp2971"; + reg = <0x58>; + interrupt-parent = <&smb_pex_cpu3_event>; + interrupts = <9 IRQ_TYPE_LEVEL_LOW>; + + regulators { + pvccinfaon_cpu3: vout0 { + regulator-name = "pvccinfaon_cpu3"; + regulator-enable-ramp-delay = <200>; + }; + pvccfa_ehv_cpu3: vout1 { + regulator-name = "pvccfa_ehv_cpu3"; + regulator-enable-ramp-delay = <200>; + }; + }; + }; + tda38640-pvnn-main-cpu3@40 { + compatible = "infineon,tda38640"; + reg = <0x40>; + interrupt-parent = <&smb_pex_cpu3_event>; + interrupts = <10 IRQ_TYPE_LEVEL_LOW>; + + regulators { + pvnn_main_cpu3: vout { + regulator-name = "pvnn_main_cpu3"; + regulator-enable-ramp-delay = <200>; + }; + }; + }; + }; + + i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + + mp2973-pvccin-pvccfa-cpu3@58 { + compatible = "mps,mp2973"; + reg = <0x58>; + interrupt-parent = <&smb_pex_cpu3_event>; + interrupts = <12 IRQ_TYPE_LEVEL_LOW>; + + regulators { + pvccin_cpu3: vout0 { + regulator-name = "pvccin_cpu3"; + regulator-enable-ramp-delay = <200>; + }; + pvccfa_ehv_fivra_cpu3: vout1 { + regulator-name = "pvccfa_ehv_fivra_cpu3"; + regulator-enable-ramp-delay = <200>; + }; + }; + }; + }; + + i2c@4 { + reg = <4>; + #address-cells = <1>; + #size-cells = <0>; + + tda38640-pvccd-hv-cpu3@40 { + compatible = "infineon,tda38640"; + reg = <0x40>; + interrupt-parent = <&smb_pex_cpu3_event>; + interrupts = <11 IRQ_TYPE_LEVEL_LOW>; + infineon,en-pin-fixed-level; + + regulators { + pvccd_hv_cpu3: vout { + regulator-name = "pvccd_hv_cpu3"; + regulator-enable-ramp-delay = <200>; + }; + }; + }; + }; + + i2c@5 { + reg = <5>; + #address-cells = <1>; + #size-cells = <0>; + + tda38640-pvpp-hbm-cpu3@40 { + compatible = "infineon,tda38640"; + reg = <0x40>; + interrupt-parent = <&smb_pex_cpu3_event>; + interrupts = <8 IRQ_TYPE_LEVEL_LOW>; + + regulators { + pvpp_hbm_cpu3: vout { + regulator-name = "pvpp_hbm_cpu3"; + regulator-enable-ramp-delay = <200>; + }; + }; + }; + }; + + i2c@6 { + reg = <6>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c@7 { + reg = <7>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; +}; + +&i2c15 { + status = "okay"; + + i2cmux14: mux@77 { + compatible = "maxim,max7357"; + reg = <0x77>; + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&gpio0 ASPEED_GPIO(R, 1) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + vdd-supply = <&p3v3_aux>; + + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + i2cmux15: mux@70 { + compatible = "maxim,max7357"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&bmc_pex_irq 11 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + vdd-supply = <&p3v3_aux>; + }; + }; + + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + i2cmux16: mux@70 { + compatible = "maxim,max7357"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&bmc_pex_irq 2 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + vdd-supply = <&p3v3_aux>; + }; + }; + + i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + + i2cmux17: mux@70 { + compatible = "maxim,max7357"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&bmc_pex_irq 0 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + vdd-supply = <&p3v3_aux>; + }; + }; + + i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + + i2cmux18: mux@70 { + compatible = "maxim,max7357"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&bmc_pex_irq 3 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + vdd-supply = <&p3v3_aux>; + }; + }; + + i2c@4 { + reg = <4>; + #address-cells = <1>; + #size-cells = <0>; + + i2cmux19: mux@70 { + compatible = "maxim,max7357"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&bmc_pex_irq 9 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + vdd-supply = <&p3v3_aux>; + }; + }; + + i2c@5 { + reg = <5>; + #address-cells = <1>; + #size-cells = <0>; + + smb_pex_rssd17_32: pinctrl@20 { + compatible = "cypress,cy8c9560"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + + interrupt-parent = <&bmc_pex_irq>; + interrupts = <13 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <2>; + + vdd-supply = <&p3v3_aux>; + reset-gpios = <&bmc_pex_irq 19 GPIO_ACTIVE_HIGH>; + + gpio-reserved-ranges = <48 12>; + + gpio-line-names = + /* GPORT0 */ + "RSSD17_SMBRST_N", "RSSD18_SMBRST_N", + "RSSD19_SMBRST_N", "RSSD20_SMBRST_N", + "RSSD21_SMBRST_N", "RSSD22_SMBRST_N", + "RSSD23_SMBRST_N", "RSSD24_SMBRST_N", + /* GPORT1 */ + "RSSD25_SMBRST_N", "RSSD26_SMBRST_N", + "RSSD27_SMBRST_N", "RSSD28_SMBRST_N", + "RSSD29_SMBRST_N", "RSSD30_SMBRST_N", + "RSSD31_SMBRST_N", "RSSD32_SMBRST_N", + /* GPORT2 */ + "RSSD17_PWRDIS", "RSSD18_PWRDIS", + "RSSD19_PWRDIS", "RSSD20_PWRDIS", + /* GPORT3 */ + "RSSD21_PWRDIS", "RSSD22_PWRDIS", + "RSSD23_PWRDIS", "RSSD24_PWRDIS", + "RSSD25_PWRDIS", "RSSD26_PWRDIS", + "RSSD27_PWRDIS", "RSSD28_PWRDIS", + /* GPORT4 */ + "RSSD29_PWRDIS", "RSSD30_PWRDIS", + "RSSD31_PWRDIS", "RSSD32_PWRDIS", + "RSSD17_RESET_N", "RSSD18_RESET_N", + "RSSD19_RESET_N", "RSSD20_RESET_N", + /* GPORT5 */ + "RSSD21_RESET_N", "RSSD22_RESET_N", + "RSSD23_RESET_N", "RSSD24_RESET_N", + "RSSD25_RESET_N", "RSSD26_RESET_N", + "RSSD27_RESET_N", "RSSD28_RESET_N", + /* GPORT6 */ + "RSSD29_RESET_N", "RSSD30_RESET_N", + "RSSD31_RESET_N", "RSSD32_RESET_N", + "", "", + "", "", + /* GPORT7 */ + "", "", + "", "", + "", "", + "", ""; + }; + }; + + i2c@6 { + reg = <6>; + #address-cells = <1>; + #size-cells = <0>; + + i2cmux20: mux@70 { + compatible = "maxim,max7357"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&bmc_pex_irq 4 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + vdd-supply = <&p3v3_aux>; + + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c@4 { + reg = <4>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c@5 { + reg = <5>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c@6 { + reg = <6>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c@7 { + reg = <7>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + + i2c@7 { + reg = <7>; + #address-cells = <1>; + #size-cells = <0>; + + i2cmux21: mux@70 { + compatible = "maxim,max7357"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&bmc_pex_irq 5 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + vdd-supply = <&p3v3_aux>; + + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c@4 { + reg = <4>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c@5 { + reg = <5>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c@6 { + reg = <6>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c@7 { + reg = <7>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + }; +}; + +&i2c8 { + status = "okay"; + + i2cmux5: mux@77 { + compatible = "maxim,max7357"; + reg = <0x77>; + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&gpio0 ASPEED_GPIO(R, 0) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + vdd-supply = <&p3v3_aux>; + + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + i2cmux6: mux@70 { + compatible = "maxim,max7357"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&bmc_pex_irq 16 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + vdd-supply = <&p3v3_aux>; + }; + }; + + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + i2cmux7: mux@70 { + compatible = "maxim,max7357"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&bmc_pex_irq 7 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + vdd-supply = <&p3v3_aux>; + }; + }; + + i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + + i2cmux8: mux@70 { + compatible = "maxim,max7357"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&bmc_pex_irq 1 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + vdd-supply = <&p3v3_aux>; + }; + }; + + i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + + i2cmux9: mux@70 { + compatible = "maxim,max7357"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&bmc_pex_irq 10 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + vdd-supply = <&p3v3_aux>; + }; + }; + + i2c@4 { + reg = <4>; + #address-cells = <1>; + #size-cells = <0>; + + i2cmux10: mux@70 { + compatible = "maxim,max7357"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&bmc_pex_irq 15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + vdd-supply = <&p3v3_aux>; + }; + }; + + i2c@5 { + reg = <5>; + #address-cells = <1>; + #size-cells = <0>; + + smb_pex_rssd_01_16: pinctrl@20 { + compatible = "cypress,cy8c9560"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + + interrupt-parent = <&bmc_pex_irq>; + interrupts = <6 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <2>; + + vdd-supply = <&p3v3_aux>; + reset-gpios = <&bmc_pex_irq 18 GPIO_ACTIVE_HIGH>; + + gpio-reserved-ranges = <48 12>; + + gpio-line-names = + /* GPORT0 */ + "RSSD01_SMBRST_N", "RSSD02_SMBRST_N", + "RSSD03_SMBRST_N", "RSSD04_SMBRST_N", + "RSSD05_SMBRST_N", "RSSD06_SMBRST_N", + "RSSD07_SMBRST_N", "RSSD08_SMBRST_N", + /* GPORT1 */ + "RSSD09_SMBRST_N", "RSSD10_SMBRST_N", + "RSSD11_SMBRST_N", "RSSD12_SMBRST_N", + "RSSD13_SMBRST_N", "RSSD14_SMBRST_N", + "RSSD15_SMBRST_N", "RSSD16_SMBRST_N", + /* GPORT2 */ + "RSSD01_PWRDIS", "RSSD02_PWRDIS", + "RSSD03_PWRDIS", "RSSD04_PWRDIS", + /* GPORT3 */ + "RSSD05_PWRDIS", "RSSD06_PWRDIS", + "RSSD07_PWRDIS", "RSSD08_PWRDIS", + "RSSD09_PWRDIS", "RSSD10_PWRDIS", + "RSSD11_PWRDIS", "RSSD12_PWRDIS", + /* GPORT4 */ + "RSSD13_PWRDIS", "RSSD14_PWRDIS", + "RSSD15_PWRDIS", "RSSD16_PWRDIS", + "RSSD01_RESET_N", "RSSD02_RESET_N", + "RSSD03_RESET_N", "RSSD04_RESET_N", + /* GPORT5 */ + "RSSD05_RESET_N", "RSSD06_RESET_N", + "RSSD07_RESET_N", "RSSD08_RESET_N", + "RSSD09_RESET_N", "RSSD10_RESET_N", + "RSSD11_RESET_N", "RSSD12_RESET_N", + /* GPORT6 */ + "RSSD13_RESET_N", "RSSD14_RESET_N", + "RSSD15_RESET_N", "RSSD16_RESET_N", + "", "", + "", "", + /* GPORT7 */ + "", "", + "", "", + "", "", + "", ""; + }; + }; + + i2c@6 { + reg = <6>; + #address-cells = <1>; + #size-cells = <0>; + + i2cmux11: mux@70 { + compatible = "maxim,max7357"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&bmc_pex_irq 12 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + vdd-supply = <&p3v3_aux>; + + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c@4 { + reg = <4>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c@5 { + reg = <5>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c@6 { + reg = <6>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c@7 { + reg = <7>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + + i2c@7 { + reg = <7>; + #address-cells = <1>; + #size-cells = <0>; + + i2cmux12: mux@70 { + compatible = "maxim,max7357"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&bmc_pex_irq 14 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + vdd-supply = <&p3v3_aux>; + + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c@4 { + reg = <4>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c@5 { + reg = <5>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c@6 { + reg = <6>; + #address-cells = <1>; + #size-cells = <0>; + }; + i2c@7 { + reg = <7>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + }; +}; + +&i2c13 { + status = "okay"; + + i2cmux23: mux@77 { + compatible = "maxim,max7357"; + reg = <0x77>; + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&gpio0 ASPEED_GPIO(R, 4) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + vdd-supply = <&p3v3_bmc_aux>; + }; +}; + +&i2cmux23 { + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + smb_pex_vr_ctrl: pinctrl@20 { + compatible = "cypress,cy8c9540"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&gpio0>; + interrupts = <ASPEED_GPIO(V, 2) IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <2>; + vdd-supply = <&p3v3_bmc_aux>; + reset-gpios = <&gpio0 ASPEED_GPIO(Q, 2) GPIO_ACTIVE_HIGH>; + gpio-line-names = + /* GPORT0 */ + "BCM0_INPUT_DISABLE_N", "SMB_VR_P3V3_AUX_ALERT_N", + "SMB_PEX_CPU1_EVENT_INT", "SMB_PEX_CPU2_EVENT_INT", + "DPIC0_VOLTAGE_DETECTB_N", "DPIC0_VOLTAGE_DETECTA_N", + "DPIC1_VOLTAGE_DETECTA_N", "DPIC1_VOLTAGE_DETECTB_N", + /* GPORT1 */ + "SMB_PEX_NIC_INT", "SMB_VR_P1V05_PCH_AUX_ALERT_N", + "SMB_PEX_CPU0_EVENT_INT", "SMB_PEX_CPU3_EVENT_INT", + "LED_ID_TPM", "PLUG_DETECT_TPM", + "PLUG_DETECT_M2_SSD_CARRIER1", "RST_M2_SSD1_PERST_N", + /* GPORT2 */ + "LED_ID_BAT", "LED_ID_MGMT_PORT2", + "LED_ID_MGMT_PORT1", "SMB_VR_P5V_AUX_ALERT_N", + /* GPORT3 */ + "SMB_VR_AUX_SSB_ALERT_N", "BCM1_INPUT_DISABLE_N", + "LED_ID_NIC1_PORT1", "LED_ID_NIC1_PORT2", + "LED_ID_NIC2_PORT1", "LED_ID_NIC2_PORT2", + "RST_M2_SSD2_PERST_N", "PLUG_DETECT_M2_SSD2", + /* GPORT4 */ + "PLUG_DETECT_BAT", "PLUG_DETECT_M2_SSD1", + "M2_SSD1_SSB_ALERT_N", "BCM2_INPUT_DISABLE_N", + "SMB_VR_P1V8_PCH_AUX_ALERT_N", "BCM3_INPUT_DISABLE_N", + "LED_PWR_DWR_BACK", "LED_ID_DWR_BACK_P", + /* GPORT5 */ + "LED_ID_M2_SSD2", "LED_ID_M2_SSD1", + "PLUG_DETECT_M2_SSD_CARRIER2", "M2_SSD2_SSB_ALERT_N"; + + pinctrl-0 = <&U62120_input &U62120_input_pullup>; + pinctrl-names = "default"; + U62120_input: input-pins { + pins = "gp10"; + function = "gpio"; + input-enable; + bias-disable; + }; + U62120_input_pullup: input-pullup-pins { + pins = "gp01", "gp02", "gp03", "gp11", "gp12", "gp13", + "gp23", "gp30", "gp40", "gp42", "gp44", "gp53"; + function = "gpio"; + input-enable; + bias-pull-up; + }; + }; + }; + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + bmc_pex_irq: pinctrl@20 { + compatible = "cypress,cy8c9520"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&gpio0>; + interrupts = <ASPEED_GPIO(V, 0) IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <2>; + vdd-supply = <&p3v3_aux>; + reset-gpios = <&gpio0 ASPEED_GPIO(Q, 1) GPIO_ACTIVE_HIGH>; + gpio-line-names = + /* GPORT0 */ + "SMB_MUX_PWM_FANGRP2_RST_INT_N", "SMB_MUX_SSB_FANGRP2_RST_INT_N", + "SMB_MUX_PWM_FANGRP1_RST_INT_N", "SMB_MUX_SSB_RSSD01_08_RST_INT_N", + "SMB_MUX_RSSD01_08_RST_INT_N", "SMB_MUX_RSSD09_16_RST_INT_N", + "SMB_PEX_RSSD01_16_INT", "SMB_MUX_SSB_FANGRP1_RST_INT_N", + /* GPORT1 */ + "SMB_SVC_PEX_FAN_ALERT_INT", "SMB_MUX_SSB_RSSD09_16_RST_INT_N", + "SMB_MUX_SSB_RSSD17_24_RST_INT_N", "SMB_MUX_PWM_FANGRP0_RST_INT_N", + "SMB_MUX_RSSD17_24_RST_INT_N", "SMB_PEX_RSSD17_32_INT", + "SMB_MUX_RSSD25_32_RST_INT_N", "SMB_MUX_SSB_RSSD25_32_RST_INT_N", + /* GPORT2 */ + "SMB_MUX_SSB_FANGRP0_RST_INT_N", "PEX_FAN_ALERT_RST", + "PEX_RSSD01_16_RST", "PEX_RSSD17_32_RST"; + pinctrl-0 = <&U60000_pins>; + pinctrl-names = "default"; + U60000_pins: cfg-pins { + pins = "gp06", "gp10", "gp15"; + function = "gpio"; + input-enable; + bias-disable; + }; + }; + }; + i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + i2cmux24: mux@70 { + compatible = "maxim,max7357"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + vdd-supply = <&p3v3_bmc_aux>; + }; + }; + i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + eeprom@51 { + compatible = "atmel,24c32"; + reg = <0x51>; + pagesize = <32>; + vcc-supply = <&p3v3_bmc_aux>; + }; + }; + i2c@7 { + reg = <7>; + #address-cells = <1>; + #size-cells = <0>; + i2cmux25: mux@70 { + compatible = "maxim,max7357"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; +}; + +&i2cmux25 { + reset-gpios = <&gpio0 ASPEED_GPIO(R, 2) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + vdd-supply = <&p3v3_bmc_aux>; + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + p5v_aux: ir38263-p5v-aux@40 { + compatible = "infineon,ir38263"; + reg = <0x40>; + + regulator-name = "p5v_aux"; + regulator-enable-ramp-delay = <2000>; + vin-supply = <&p12v>; + vbus-supply = <&p3v3_bmc_aux>; + regulator-always-on; + regulator-boot-on; + }; + }; + i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + p3v3_aux: ir38263-p3v3-aux@40 { + compatible = "infineon,ir38263"; + reg = <0x40>; + + vin-supply = <&p12v>; + regulator-name = "p3v3_aux"; + /* + * 2msec for regulator + 18msec for board capacitance + * Note: Every IC has a PTC which slowly charges the bypass + * cap. + */ + regulator-enable-ramp-delay = <200000>; + }; + }; + i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + aux_ssb: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_pex_vr_ctrl>; + interrupts = <20 IRQ_TYPE_LEVEL_LOW>; + vss1-supply = <&p5v_aux>; + vss2-supply = <&p3v3_aux>; + regulators { + p5v: sw0 { + regulator-name = "p5v"; + shunt-resistor-micro-ohms = <12000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <3400000>; + regulator-enable-ramp-delay = <100000>; + }; + p3v3_pch: sw1 { + regulator-name = "p3v3_pch"; + shunt-resistor-micro-ohms = <12000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <3400000>; + regulator-enable-ramp-delay = <100000>; + }; + }; + }; + }; + i2c@4 { + reg = <4>; + #address-cells = <1>; + #size-cells = <0>; + pli1209bc_p12v_a: regulator@5f { + compatible = "vicor,pli1209bc"; + reg = <0x5f>; + regulators { + p12v_a: vout2 { + regulator-name = "bcm0"; + regulator-boot-on; + }; + }; + }; + }; + i2c@5 { + reg = <5>; + #address-cells = <1>; + #size-cells = <0>; + pli1209bc_p12v_b: regulator@5f { + compatible = "vicor,pli1209bc"; + reg = <0x5f>; + regulators { + p12v_b: vout2 { + regulator-name = "bcm1"; + regulator-boot-on; + }; + }; + }; + }; + i2c@6 { + reg = <6>; + #address-cells = <1>; + #size-cells = <0>; + pli1209bc_p12v_c: regulator@5f { + compatible = "vicor,pli1209bc"; + reg = <0x5f>; + regulators { + p12v_c: vout2 { + regulator-name = "bcm2"; + regulator-boot-on; + }; + }; + }; + }; + i2c@7 { + reg = <7>; + #address-cells = <1>; + #size-cells = <0>; + pli1209bc_p12v_d: regulator@5f { + compatible = "vicor,pli1209bc"; + reg = <0x5f>; + regulators { + p12v_d: vout2 { + regulator-name = "bcm3"; + regulator-boot-on; + }; + }; + }; + }; +}; + +&i2cmux24 { + + reset-gpios = <&gpio0 ASPEED_GPIO(P, 3) (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + smb_svc_pex_rssd01_16: pinctrl@20 { + compatible = "cypress,cy8c9560"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&gpio0>; + interrupts = <ASPEED_GPIO(S, 0) IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <2>; + vdd-supply = <&p3v3_bmc_aux>; + reset-gpios = <&smb_svc_pex_cpu0_led 17 GPIO_ACTIVE_HIGH>; + gpio-line-names = + /* GPORT0 */ + "LED_ID_RSSD01", "LED_ID_RSSD02", + "LED_ID_RSSD03", "LED_ID_RSSD04", + "LED_ID_RSSD05", "LED_ID_RSSD06", + "LED_ID_RSSD07", "LED_ID_RSSD08", + /* GPORT1 */ + "LED_ID_RSSD09", "LED_ID_RSSD10", + "LED_ID_RSSD11", "LED_ID_RSSD12", + "LED_ID_RSSD13", "LED_ID_RSSD14", + "LED_ID_RSSD15", "LED_ID_RSSD16", + /* GPORT2 */ + "RSSD01_PRESENT_N", "RSSD02_PRESENT_N", + "RSSD03_PRESENT_N", "RSSD04_PRESENT_N", + /* GPORT3 */ + "RSSD05_PRESENT_N", "RSSD06_PRESENT_N", + "RSSD07_PRESENT_N", "RSSD08_PRESENT_N", + "RSSD09_PRESENT_N", "RSSD10_PRESENT_N", + "RSSD11_PRESENT_N", "RSSD12_PRESENT_N", + /* GPORT4 */ + "RSSD13_PRESENT_N", "RSSD14_PRESENT_N", + "RSSD15_PRESENT_N", "RSSD16_PRESENT_N", + "LED_ID_FAN_ASM01", "LED_ID_FAN_ASM02", + "LED_ID_FAN_ASM03", "LED_ID_FAN_ASM04", + /* GPORT5 */ + "LED_ID_FAN_ASM05", "LED_ID_FAN_ASM06", + "PLUG_DETECT_FAN_ASM01", "PLUG_DETECT_FAN_ASM02", + "PLUG_DETECT_FAN_ASM03", "PLUG_DETECT_FAN_ASM04", + "PLUG_DETECT_FAN_ASM05", "PLUG_DETECT_FAN_ASM06", + /* GPORT6 */ + "SSB_RSSD01_ALERT_N", "SSB_RSSD02_ALERT_N", + "SSB_RSSD03_ALERT_N", "SSB_RSSD04_ALERT_N", + "SSB_RSSD05_ALERT_N", "SSB_RSSD06_ALERT_N", + "SSB_RSSD07_ALERT_N", "SSB_RSSD08_ALERT_N", + /* GPORT7 */ + "SSB_RSSD09_ALERT_N", "SSB_RSSD10_ALERT_N", + "SSB_RSSD11_ALERT_N", "SSB_RSSD12_ALERT_N", + "SSB_RSSD13_ALERT_N", "SSB_RSSD14_ALERT_N", + "SSB_RSSD15_ALERT_N", "SSB_RSSD16_ALERT_N"; + pinctrl-0 = <&U65200_pins>; + pinctrl-names = "default"; + U65200_pins: cfg-pins { + pins = "gp60", "gp61", "gp62", + "gp63", "gp64", "gp65", "gp66", + "gp67", "gp70", "gp71", "gp72", + "gp73", "gp74", "gp75", "gp76", "gp77"; + function = "gpio"; + input-enable; + bias-pull-up; + }; + }; + }; + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + smb_svc_pex_rssd17_32: pinctrl@20 { + compatible = "cypress,cy8c9560"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&gpio0>; + interrupts = <ASPEED_GPIO(H, 0) IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <2>; + vdd-supply = <&p3v3_bmc_aux>; + reset-gpios = <&smb_svc_pex_cpu1_led 17 GPIO_ACTIVE_HIGH>; + gpio-line-names = + /* GPORT0 */ + "LED_ID_RSSD17", "LED_ID_RSSD18", + "LED_ID_RSSD19", "LED_ID_RSSD20", + "LED_ID_RSSD21", "LED_ID_RSSD22", + "LED_ID_RSSD23", "LED_ID_RSSD24", + /* GPORT1 */ + "LED_ID_RSSD25", "LED_ID_RSSD26", + "LED_ID_RSSD27", "LED_ID_RSSD28", + "LED_ID_RSSD29", "LED_ID_RSSD30", + "LED_ID_RSSD31", "LED_ID_RSSD32", + /* GPORT2 */ + "RSSD17_PRESENT_N", "RSSD18_PRESENT_N", + "RSSD19_PRESENT_N", "RSSD20_PRESENT_N", + /* GPORT3 */ + "RSSD21_PRESENT_N", "RSSD22_PRESENT_N", + "RSSD23_PRESENT_N", "RSSD24_PRESENT_N", + "RSSD25_PRESENT_N", "RSSD26_PRESENT_N", + "RSSD27_PRESENT_N", "RSSD28_PRESENT_N", + /* GPORT4 */ + "RSSD29_PRESENT_N", "RSSD30_PRESENT_N", + "RSSD31_PRESENT_N", "RSSD32_PRESENT_N", + "LED_ID_FAN_ASM07", "LED_ID_FAN_ASM08", + "LED_ID_FAN_ASM09", "LED_ID_FAN_ASM10", + /* GPORT5 */ + "LED_ID_FAN_ASM11", "LED_ID_FAN_ASM12", + "PLUG_DETECT_FAN_ASM07", "PLUG_DETECT_FAN_ASM08", + "PLUG_DETECT_FAN_ASM09", "PLUG_DETECT_FAN_ASM10", + "PLUG_DETECT_FAN_ASM11", "PLUG_DETECT_FAN_ASM12", + /* GPORT6 */ + "SSB_RSSD17_ALERT_N", "SSB_RSSD18_ALERT_N", + "SSB_RSSD19_ALERT_N", "SSB_RSSD20_ALERT_N", + "SSB_RSSD21_ALERT_N", "SSB_RSSD22_ALERT_N", + "SSB_RSSD23_ALERT_N", "SSB_RSSD24_ALERT_N", + /* GPORT7 */ + "SSB_RSSD25_ALERT_N", "SSB_RSSD26_ALERT_N", + "SSB_RSSD27_ALERT_N", "SSB_RSSD28_ALERT_N", + "SSB_RSSD29_ALERT_N", "SSB_RSSD30_ALERT_N", + "SSB_RSSD31_ALERT_N", "SSB_RSSD32_ALERT_N"; + pinctrl-0 = <&U65300_pins>; + pinctrl-names = "default"; + U65300_pins: cfg-pins { + pins = "gp60", "gp61", "gp62", + "gp63", "gp64", "gp65", "gp66", + "gp67", "gp70", "gp71", "gp72", + "gp73", "gp74", "gp75", "gp76", + "gp77"; + function = "gpio"; + input-enable; + bias-pull-up; + }; + }; + }; + i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + smb_svc_pex_cpu1_led: pinctrl@20 { + compatible = "cypress,cy8c9540"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&gpio0>; + interrupts = <ASPEED_GPIO(V, 6) IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <2>; + vdd-supply = <&p3v3_bmc_aux>; + reset-gpios = <&gpio0 ASPEED_GPIO(Q, 5) GPIO_ACTIVE_HIGH>; + gpio-reserved-ranges = <18 2>, <36 2>; + gpio-line-names = + /* GPORT0 */ + "PLUG_DETECT_DIMM_C1E2", "PLUG_DETECT_DIMM_C1E1", + "PLUG_DETECT_DIMM_C1F2", "PLUG_DETECT_DIMM_C1F1", + "PLUG_DETECT_DIMM_C1G2", "PLUG_DETECT_DIMM_C1G1", + "PLUG_DETECT_DIMM_C1H2", "PLUG_DETECT_DIMM_C1H1", + /* GPORT1 */ + "PLUG_DETECT_DIMM_C1D1", "PLUG_DETECT_DIMM_C1D2", + "PLUG_DETECT_DIMM_C1C1", "PLUG_DETECT_DIMM_C1C2", + "PLUG_DETECT_DIMM_C1B1", "PLUG_DETECT_DIMM_C1B2", + "PLUG_DETECT_DIMM_C1A1", "PLUG_DETECT_DIMM_C1A2", + /* GPORT2 */ + "PEX_CPU1_EVENT_RST", "SVC_PEX_RSSD17_32_RST", + "", "", + /* GPORT3 */ + "LED_ID_DIMM_C1E2", "LED_ID_DIMM_C1E1", + "LED_ID_DIMM_C1F2", "LED_ID_DIMM_C1F1", + "LED_ID_DIMM_C1G2", "LED_ID_DIMM_C1G1", + "LED_ID_DIMM_C1H2", "LED_ID_DIMM_C1H1", + /* GPORT4 */ + "LED_ID_DIMM_C1A2", "LED_ID_DIMM_C1A1", + "LED_ID_DIMM_C1B2", "LED_ID_DIMM_C1B1", + "LED_ID_DIMM_C1C2", "LED_ID_DIMM_C1C1", + "LED_ID_DIMM_C1D2", "LED_ID_DIMM_C1D1", + /* GPORT5 */ + "", "", + "FM_CPU1_SKTOCC_N", "LED_ID_CPU1"; + }; + }; + i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + smb_svc_pex_fan_alert: pinctrl@20 { + compatible = "cypress,cy8c9560"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&bmc_pex_irq>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <2>; + vdd-supply = <&p3v3_aux>; + reset-gpios = <&bmc_pex_irq 17 GPIO_ACTIVE_HIGH>; + gpio-reserved-ranges = <24 3>, <51 9>; + gpio-line-names = + /* GPORT0 */ + "FAN01_SSB_ALERT_N", "FAN02_SSB_ALERT_N", + "FAN03_SSB_ALERT_N", "FAN04_SSB_ALERT_N", + "FAN05_SSB_ALERT_N", "FAN06_SSB_ALERT_N", + "FAN07_SSB_ALERT_N", "FAN08_SSB_ALERT_N", + /* GPORT1 */ + "FAN09_SSB_ALERT_N", "FAN10_SSB_ALERT_N", + "FAN11_SSB_ALERT_N", "FAN12_SSB_ALERT_N", + "FAN13_SSB_ALERT_N", "FAN14_SSB_ALERT_N", + "FAN15_SSB_ALERT_N", "FAN16_SSB_ALERT_N", + /* GPORT2 */ + "FAN17_SSB_ALERT_N", "FAN18_SSB_ALERT_N", + "FAN19_SSB_ALERT_N", "FAN20_SSB_ALERT_N", + /* GPORT3 */ + "FAN21_SSB_ALERT_N", "FAN22_SSB_ALERT_N", + "FAN23_SSB_ALERT_N", "FAN24_SSB_ALERT_N", + "", "", + "", "FAN01_PWM_ALERT_N", + /* GPORT4 */ + "FAN02_PWM_ALERT_N", "FAN03_PWM_ALERT_N", + "FAN04_PWM_ALERT_N", "FAN05_PWM_ALERT_N", + "FAN06_PWM_ALERT_N", "FAN07_PWM_ALERT_N", + "FAN08_PWM_ALERT_N", "FAN09_PWM_ALERT_N", + /* GPORT5 */ + "FAN10_PWM_ALERT_N", "FAN11_PWM_ALERT_N", + "FAN12_PWM_ALERT_N", "FAN13_PWM_ALERT_N", + "FAN14_PWM_ALERT_N", "FAN15_PWM_ALERT_N", + "FAN16_PWM_ALERT_N", "FAN17_PWM_ALERT_N", + /* GPORT6 */ + "FAN18_PWM_ALERT_N", "FAN19_PWM_ALERT_N", + "FAN20_PWM_ALERT_N", "FAN21_PWM_ALERT_N", + "FAN22_PWM_ALERT_N", "FAN23_PWM_ALERT_N", + "FAN24_PWM_ALERT_N", "", + /* GPORT7 */ + "", "", + "", "", + "", "", + "", ""; + pinctrl-0 = <&U65600_pins>; + pinctrl-names = "default"; + U65600_pins: cfg-pins { + pins = "gp00", "gp01", "gp02", + "gp03", "gp04", "gp05", "gp06", + "gp07", "gp10", "gp11", "gp12", + "gp13", "gp14", "gp15", "gp16", + "gp17", "gp20", "gp21", "gp22", + "gp23", "gp30", "gp31", "gp32", + "gp33", "gp37", "gp40", "gp41", + "gp42", "gp43", "gp44", "gp45", + "gp46", "gp47", "gp50", "gp51", + "gp52", "gp53", "gp54", "gp55", + "gp56", "gp57", "gp60", "gp61", + "gp62", "gp63", "gp64", "gp65", + "gp66"; + function = "gpio"; + input-enable; + bias-pull-up; + }; + }; + }; + i2c@4 { + reg = <4>; + #address-cells = <1>; + #size-cells = <0>; + smb_svc_pex_cpu2_led: pinctrl@20 { + compatible = "cypress,cy8c9540"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&gpio0>; + interrupts = <ASPEED_GPIO(V, 5) IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <2>; + vdd-supply = <&p3v3_bmc_aux>; + reset-gpios = <&gpio0 ASPEED_GPIO(Q, 6) GPIO_ACTIVE_HIGH>; + gpio-reserved-ranges = <17 3>, <36 2>; + gpio-line-names = + /* GPORT0 */ + "PLUG_DETECT_DIMM_C2E2", "PLUG_DETECT_DIMM_C2E1", + "PLUG_DETECT_DIMM_C2F2", "PLUG_DETECT_DIMM_C2F1", + "PLUG_DETECT_DIMM_C2G2", "PLUG_DETECT_DIMM_C2G1", + "PLUG_DETECT_DIMM_C2H2", "PLUG_DETECT_DIMM_C2H1", + /* GPORT1 */ + "PLUG_DETECT_DIMM_C2D1", "PLUG_DETECT_DIMM_C2D2", + "PLUG_DETECT_DIMM_C2C1", "PLUG_DETECT_DIMM_C2C2", + "PLUG_DETECT_DIMM_C2B1", "PLUG_DETECT_DIMM_C2B2", + "PLUG_DETECT_DIMM_C2A1", "PLUG_DETECT_DIMM_C2A2", + /* GPORT2 */ + "PEX_CPU2_EVENT_RST", "", + "", "", + /* GPORT3 */ + "LED_ID_DIMM_C2E2", "LED_ID_DIMM_C2E1", + "LED_ID_DIMM_C2F2", "LED_ID_DIMM_C2F1", + "LED_ID_DIMM_C2G2", "LED_ID_DIMM_C2G1", + "LED_ID_DIMM_C2H2", "LED_ID_DIMM_C2H1", + /* GPORT4 */ + "LED_ID_DIMM_C2A2", "LED_ID_DIMM_C2A1", + "LED_ID_DIMM_C2B2", "LED_ID_DIMM_C2B1", + "LED_ID_DIMM_C2C2", "LED_ID_DIMM_C2C1", + "LED_ID_DIMM_C2D2", "LED_ID_DIMM_C2D1", + /* GPORT5 */ + "", "", + "FM_CPU2_SKTOCC_N", "LED_ID_CPU2"; + }; + }; + i2c@5 { + reg = <5>; + #address-cells = <1>; + #size-cells = <0>; + + smb_svc_pex_cpu3_led: pinctrl@20 { + compatible = "cypress,cy8c9540"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&gpio0>; + interrupts = <ASPEED_GPIO(V, 3) IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <2>; + vdd-supply = <&p3v3_bmc_aux>; + reset-gpios = <&gpio0 ASPEED_GPIO(Q, 7) GPIO_ACTIVE_HIGH>; + gpio-reserved-ranges = <17 3>; + gpio-line-names = + /* GPORT0 */ + "PLUG_DETECT_DIMM_C3E2", "PLUG_DETECT_DIMM_C3E1", + "PLUG_DETECT_DIMM_C3F2", "PLUG_DETECT_DIMM_C3F1", + "PLUG_DETECT_DIMM_C3G2", "PLUG_DETECT_DIMM_C3G1", + "PLUG_DETECT_DIMM_C3H2", "PLUG_DETECT_DIMM_C3H1", + /* GPORT1 */ + "PLUG_DETECT_DIMM_C3D1", "PLUG_DETECT_DIMM_C3D2", + "PLUG_DETECT_DIMM_C3C1", "PLUG_DETECT_DIMM_C3C2", + "PLUG_DETECT_DIMM_C3B1", "PLUG_DETECT_DIMM_C3B2", + "PLUG_DETECT_DIMM_C3A1", "PLUG_DETECT_DIMM_C3A2", + /* GPORT2 */ + "PEX_CPU3_EVENT_RST", "", + "", "", + /* GPORT3 */ + "LED_ID_DIMM_C3E2", "LED_ID_DIMM_C3E1", + "LED_ID_DIMM_C3F2", "LED_ID_DIMM_C3F1", + "LED_ID_DIMM_C3G2", "LED_ID_DIMM_C3G1", + "LED_ID_DIMM_C3H2", "LED_ID_DIMM_C3H1", + /* GPORT4 */ + "LED_ID_DIMM_C3A2", "LED_ID_DIMM_C3A1", + "LED_ID_DIMM_C3B2", "LED_ID_DIMM_C3B1", + "LED_ID_DIMM_C3C2", "LED_ID_DIMM_C3C1", + "LED_ID_DIMM_C3D2", "LED_ID_DIMM_C3D1", + /* GPORT5 */ + "LED_PWR_DWR_FRNT", "LED_ID_DWR_FRNT_P", + "FM_CPU3_SKTOCC_N", "LED_ID_CPU3"; + }; + }; + i2c@6 { + reg = <6>; + #address-cells = <1>; + #size-cells = <0>; + smb_svc_pex_cpu0_led: pinctrl@20 { + compatible = "cypress,cy8c9540"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&gpio0>; + interrupts = <ASPEED_GPIO(O, 3) IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <2>; + vdd-supply = <&p3v3_bmc_aux>; + reset-gpios = <&gpio0 ASPEED_GPIO(Q, 4) GPIO_ACTIVE_HIGH>; + gpio-reserved-ranges = <18 2>, <36 2>; + gpio-line-names = + /* GPORT0 */ + "PLUG_DETECT_DIMM_C0E2", "PLUG_DETECT_DIMM_C0E1", + "PLUG_DETECT_DIMM_C0F2", "PLUG_DETECT_DIMM_C0F1", + "PLUG_DETECT_DIMM_C0G2", "PLUG_DETECT_DIMM_C0G1", + "PLUG_DETECT_DIMM_C0H2", "PLUG_DETECT_DIMM_C0H1", + /* GPORT1 */ + "PLUG_DETECT_DIMM_C0D1", "PLUG_DETECT_DIMM_C0D2", + "PLUG_DETECT_DIMM_C0C1", "PLUG_DETECT_DIMM_C0C2", + "PLUG_DETECT_DIMM_C0B1", "PLUG_DETECT_DIMM_C0B2", + "PLUG_DETECT_DIMM_C0A1", "PLUG_DETECT_DIMM_C0A2", + /* GPORT2 */ + "PEX_CPU0_EVENT_RST", "SVC_PEX_RSSD01_16_RST", + "", "", + /* GPORT3 */ + "LED_ID_DIMM_C0E2", "LED_ID_DIMM_C0E1", + "LED_ID_DIMM_C0F2", "LED_ID_DIMM_C0F1", + "LED_ID_DIMM_C0G2", "LED_ID_DIMM_C0G1", + "LED_ID_DIMM_C0H2", "LED_ID_DIMM_C0H1", + /* GPORT4 */ + "LED_ID_DIMM_C0A2", "LED_ID_DIMM_C0A1", + "LED_ID_DIMM_C0B2", "LED_ID_DIMM_C0B1", + "LED_ID_DIMM_C0C2", "LED_ID_DIMM_C0C1", + "LED_ID_DIMM_C0D2", "LED_ID_DIMM_C0D1", + /* GPORT5 */ + "", "", + "FM_CPU0_SKTOCC_N", "LED_ID_CPU0"; + }; + }; +}; + +&i2c9 { + status = "okay"; + + p1v2_bmc_aux_mon: pmic@60 { + compatible = "maxim,max8952"; + reg = <0x60>; + max8952,default-mode = <3>; + max8952,dvs-mode-microvolt = <1100000>, <1100000>, + <1100000>, <1100000>; + max8952,sync-freq = <0>; + max8952,ramp-speed = <0>; + regulator-always-on; + regulator-boot-on; + }; +}; + +&i2cmux8 { + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + fan10_ssb: regulator@3a { + compatible = "maxim,max5978"; + reg = <0x3a>; + vss1-supply = <&p12v>; + interrupt-parent = <&smb_svc_pex_fan_alert>; + interrupts = <9 IRQ_TYPE_LEVEL_LOW>; + + regulators { + sw0_fan10_ssb: sw0 { + regulator-name = "fan10_supply"; + shunt-resistor-micro-ohms = <10000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + + }; + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + fan12_ssb: regulator@3a { + compatible = "maxim,max5978"; + reg = <0x3a>; + vss1-supply = <&p12v>; + interrupt-parent = <&smb_svc_pex_fan_alert>; + interrupts = <11 IRQ_TYPE_LEVEL_LOW>; + + regulators { + sw0_fan12_ssb: sw0 { + regulator-name = "fan12_supply"; + shunt-resistor-micro-ohms = <10000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + + }; + i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + + fan14_ssb: regulator@3a { + compatible = "maxim,max5978"; + reg = <0x3a>; + vss1-supply = <&p12v>; + interrupt-parent = <&smb_svc_pex_fan_alert>; + interrupts = <13 IRQ_TYPE_LEVEL_LOW>; + + regulators { + sw0_fan14_ssb: sw0 { + regulator-name = "fan14_supply"; + shunt-resistor-micro-ohms = <10000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + + fan16_ssb: regulator@3a { + compatible = "maxim,max5978"; + reg = <0x3a>; + vss1-supply = <&p12v>; + interrupt-parent = <&smb_svc_pex_fan_alert>; + interrupts = <15 IRQ_TYPE_LEVEL_LOW>; + + regulators { + sw0_fan16_ssb: sw0 { + regulator-name = "fan16_supply"; + shunt-resistor-micro-ohms = <10000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@4 { + reg = <4>; + #address-cells = <1>; + #size-cells = <0>; + + fan18_ssb: regulator@3a { + compatible = "maxim,max5978"; + reg = <0x3a>; + vss1-supply = <&p12v>; + interrupt-parent = <&smb_svc_pex_fan_alert>; + interrupts = <17 IRQ_TYPE_LEVEL_LOW>; + + regulators { + sw0_fan18_ssb: sw0 { + regulator-name = "fan18_supply"; + shunt-resistor-micro-ohms = <10000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@5 { + reg = <5>; + #address-cells = <1>; + #size-cells = <0>; + + fan20_ssb: regulator@3a { + compatible = "maxim,max5978"; + reg = <0x3a>; + vss1-supply = <&p12v>; + interrupt-parent = <&smb_svc_pex_fan_alert>; + interrupts = <19 IRQ_TYPE_LEVEL_LOW>; + + regulators { + sw0_fan20_ssb: sw0 { + regulator-name = "fan20_supply"; + shunt-resistor-micro-ohms = <10000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@6 { + reg = <6>; + #address-cells = <1>; + #size-cells = <0>; + + fan22_ssb: regulator@3a { + compatible = "maxim,max5978"; + reg = <0x3a>; + vss1-supply = <&p12v>; + interrupt-parent = <&smb_svc_pex_fan_alert>; + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; + + regulators { + sw0_fan22_ssb: sw0 { + regulator-name = "fan22_supply"; + shunt-resistor-micro-ohms = <10000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@7 { + reg = <7>; + #address-cells = <1>; + #size-cells = <0>; + + fan24_ssb: regulator@3a { + compatible = "maxim,max5978"; + reg = <0x3a>; + vss1-supply = <&p12v>; + interrupt-parent = <&smb_svc_pex_fan_alert>; + interrupts = <23 IRQ_TYPE_LEVEL_LOW>; + + regulators { + sw0_fan24_ssb: sw0 { + regulator-name = "fan24_supply"; + shunt-resistor-micro-ohms = <10000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; +}; + +&i2cmux7 { + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + fan17_ssb: regulator@3a { + compatible = "maxim,max5978"; + reg = <0x3a>; + vss1-supply = <&p12v>; + interrupt-parent = <&smb_svc_pex_fan_alert>; + interrupts = <16 IRQ_TYPE_LEVEL_LOW>; + + regulators { + sw0_fan17_ssb: sw0 { + regulator-name = "fan17_supply"; + shunt-resistor-micro-ohms = <10000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + fan19_ssb: regulator@3a { + compatible = "maxim,max5978"; + reg = <0x3a>; + vss1-supply = <&p12v>; + interrupt-parent = <&smb_svc_pex_fan_alert>; + interrupts = <18 IRQ_TYPE_LEVEL_LOW>; + + regulators { + sw0_fan19_ssb: sw0 { + regulator-name = "fan19_supply"; + shunt-resistor-micro-ohms = <10000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + + fan21_ssb: regulator@3a { + compatible = "maxim,max5978"; + reg = <0x3a>; + vss1-supply = <&p12v>; + interrupt-parent = <&smb_svc_pex_fan_alert>; + interrupts = <20 IRQ_TYPE_LEVEL_LOW>; + + regulators { + sw0_fan21_ssb: sw0 { + regulator-name = "fan21_supply"; + shunt-resistor-micro-ohms = <10000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + + fan23_ssb: regulator@3a { + compatible = "maxim,max5978"; + reg = <0x3a>; + vss1-supply = <&p12v>; + interrupt-parent = <&smb_svc_pex_fan_alert>; + interrupts = <22 IRQ_TYPE_LEVEL_LOW>; + + regulators { + sw0_fan23_ssb: sw0 { + regulator-name = "fan23_supply"; + shunt-resistor-micro-ohms = <10000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@4 { + reg = <4>; + #address-cells = <1>; + #size-cells = <0>; + + fan02_ssb: regulator@3a { + compatible = "maxim,max5978"; + reg = <0x3a>; + vss1-supply = <&p12v>; + interrupt-parent = <&smb_svc_pex_fan_alert>; + interrupts = <1 IRQ_TYPE_LEVEL_LOW>; + + regulators { + sw0_fan02_ssb: sw0 { + regulator-name = "fan02_supply"; + shunt-resistor-micro-ohms = <10000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@5 { + reg = <5>; + #address-cells = <1>; + #size-cells = <0>; + + fan04_ssb: regulator@3a { + compatible = "maxim,max5978"; + reg = <0x3a>; + vss1-supply = <&p12v>; + interrupt-parent = <&smb_svc_pex_fan_alert>; + interrupts = <3 IRQ_TYPE_LEVEL_LOW>; + + regulators { + sw0_fan04_ssb: sw0 { + regulator-name = "fan04_supply"; + shunt-resistor-micro-ohms = <10000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@6 { + reg = <6>; + #address-cells = <1>; + #size-cells = <0>; + + fan06_ssb: regulator@3a { + compatible = "maxim,max5978"; + reg = <0x3a>; + vss1-supply = <&p12v>; + interrupt-parent = <&smb_svc_pex_fan_alert>; + interrupts = <5 IRQ_TYPE_LEVEL_LOW>; + + regulators { + sw0_fan06_ssb: sw0 { + regulator-name = "fan06_supply"; + shunt-resistor-micro-ohms = <10000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@7 { + reg = <7>; + #address-cells = <1>; + #size-cells = <0>; + + fan08_ssb: regulator@3a { + compatible = "maxim,max5978"; + reg = <0x3a>; + vss1-supply = <&p12v>; + interrupt-parent = <&smb_svc_pex_fan_alert>; + interrupts = <7 IRQ_TYPE_LEVEL_LOW>; + + regulators { + sw0_fan08_ssb: sw0 { + regulator-name = "fan08_supply"; + shunt-resistor-micro-ohms = <10000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; +}; + +&i2cmux6 { + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + fan01_ssb: regulator@3a { + compatible = "maxim,max5978"; + reg = <0x3a>; + vss1-supply = <&p12v>; + interrupt-parent = <&smb_svc_pex_fan_alert>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + + regulators { + sw0_fan01_ssb: sw0 { + regulator-name = "fan01_supply"; + shunt-resistor-micro-ohms = <10000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + fan03_ssb: regulator@3a { + compatible = "maxim,max5978"; + reg = <0x3a>; + vss1-supply = <&p12v>; + interrupt-parent = <&smb_svc_pex_fan_alert>; + interrupts = <2 IRQ_TYPE_LEVEL_LOW>; + + regulators { + sw0_fan03_ssb: sw0 { + regulator-name = "fan03_supply"; + + shunt-resistor-micro-ohms = <10000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + + fan05_ssb: regulator@3a { + compatible = "maxim,max5978"; + reg = <0x3a>; + vss1-supply = <&p12v>; + interrupt-parent = <&smb_svc_pex_fan_alert>; + interrupts = <4 IRQ_TYPE_LEVEL_LOW>; + + regulators { + sw0_fan05_ssb: sw0 { + regulator-name = "fan05_supply"; + shunt-resistor-micro-ohms = <10000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + + fan07_ssb: regulator@3a { + compatible = "maxim,max5978"; + reg = <0x3a>; + vss1-supply = <&p12v>; + interrupt-parent = <&smb_svc_pex_fan_alert>; + interrupts = <6 IRQ_TYPE_LEVEL_LOW>; + + regulators { + sw0_fan07_ssb: sw0 { + regulator-name = "fan07_supply"; + shunt-resistor-micro-ohms = <10000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@4 { + reg = <4>; + #address-cells = <1>; + #size-cells = <0>; + + fan09_ssb: regulator@3a { + compatible = "maxim,max5978"; + reg = <0x3a>; + vss1-supply = <&p12v>; + interrupt-parent = <&smb_svc_pex_fan_alert>; + interrupts = <8 IRQ_TYPE_LEVEL_LOW>; + + regulators { + sw0_fan09_ssb: sw0 { + regulator-name = "fan09_supply"; + shunt-resistor-micro-ohms = <10000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@5 { + reg = <5>; + #address-cells = <1>; + #size-cells = <0>; + + fan11_ssb: regulator@3a { + compatible = "maxim,max5978"; + reg = <0x3a>; + vss1-supply = <&p12v>; + interrupt-parent = <&smb_svc_pex_fan_alert>; + interrupts = <10 IRQ_TYPE_LEVEL_LOW>; + + regulators { + sw0_fan11_ssb: sw0 { + regulator-name = "fan11_supply"; + shunt-resistor-micro-ohms = <10000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@6 { + reg = <6>; + #address-cells = <1>; + #size-cells = <0>; + + fan13_ssb: regulator@3a { + compatible = "maxim,max5978"; + reg = <0x3a>; + vss1-supply = <&p12v>; + interrupt-parent = <&smb_svc_pex_fan_alert>; + interrupts = <12 IRQ_TYPE_LEVEL_LOW>; + + regulators { + sw0_fan13_ssb: sw0 { + regulator-name = "fan13_supply"; + shunt-resistor-micro-ohms = <10000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@7 { + reg = <7>; + #address-cells = <1>; + #size-cells = <0>; + + fan15_ssb: regulator@3a { + compatible = "maxim,max5978"; + reg = <0x3a>; + vss1-supply = <&p12v>; + interrupt-parent = <&smb_svc_pex_fan_alert>; + interrupts = <14 IRQ_TYPE_LEVEL_LOW>; + + regulators { + sw0_fan15_ssb: sw0 { + regulator-name = "fan15_supply"; + shunt-resistor-micro-ohms = <10000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <3400000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + + }; +}; + +&i2cmux9 { + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd19: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd17_32>; + interrupts = <46 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd19:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd19: sw0 { + regulator-name = "rssd19_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd19: sw1 { + regulator-name = "rssd19_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd18: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd17_32>; + interrupts = <45 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd18:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd18: sw0 { + regulator-name = "rssd18_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd18: sw1 { + regulator-name = "rssd18_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd17: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd17_32>; + interrupts = <44 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd17:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd17: sw0 { + regulator-name = "rssd17_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd17: sw1 { + regulator-name = "rssd17_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd20: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd17_32>; + interrupts = <47 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd20:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd20: sw0 { + regulator-name = "rssd20_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd20: sw1 { + regulator-name = "rssd20_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@4 { + reg = <4>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd21: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd17_32>; + interrupts = <48 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd21:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd21: sw0 { + regulator-name = "rssd21_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd21: sw1 { + regulator-name = "rssd21_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@5 { + reg = <5>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd22: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd17_32>; + interrupts = <49 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd22:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd22: sw0 { + regulator-name = "rssd22_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd22: sw1 { + regulator-name = "rssd22_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@6 { + reg = <6>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd24: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd17_32>; + interrupts = <51 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd24:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd24: sw0 { + regulator-name = "rssd24_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd24: sw1 { + regulator-name = "rssd24_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@7 { + reg = <7>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd23: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd17_32>; + interrupts = <50 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd23:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd23: sw0 { + regulator-name = "rssd23_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd23: sw1 { + regulator-name = "rssd23_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; +}; + +&i2cmux10 { + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd25: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd17_32>; + interrupts = <52 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd25:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd25: sw0 { + regulator-name = "rssd25_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd25: sw1 { + regulator-name = "rssd25_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd26: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd17_32>; + interrupts = <53 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd26:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd26: sw0 { + regulator-name = "rssd26_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd26: sw1 { + regulator-name = "rssd26_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd27: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd17_32>; + interrupts = <54 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd27:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd27: sw0 { + regulator-name = "rssd27_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd27: sw1 { + regulator-name = "rssd27_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd32: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd17_32>; + interrupts = <59 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd32:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd32: sw0 { + regulator-name = "rssd32_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd32: sw1 { + regulator-name = "rssd32_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@4 { + reg = <4>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd31: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd17_32>; + interrupts = <58 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd31:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd31: sw0 { + regulator-name = "rssd31_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd31: sw1 { + regulator-name = "rssd31_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@5 { + reg = <5>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd30: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd17_32>; + interrupts = <57 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd30:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd30: sw0 { + regulator-name = "rssd30_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd30: sw1 { + regulator-name = "rssd30_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@6 { + reg = <6>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd29: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd17_32>; + interrupts = <56 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd29:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd29: sw0 { + regulator-name = "rssd29_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd29: sw1 { + regulator-name = "rssd29_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@7 { + reg = <7>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd28: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd17_32>; + interrupts = <55 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd28:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd28: sw0 { + regulator-name = "rssd28_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd28: sw1 { + regulator-name = "rssd28_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; +}; + +&i2cmux18 { + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd03: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd01_16>; + interrupts = <46 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd03:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd03: sw0 { + regulator-name = "rssd03_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd03: sw1 { + regulator-name = "rssd03_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd02: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd01_16>; + interrupts = <45 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd02:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd02: sw0 { + regulator-name = "rssd02_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd02: sw1 { + regulator-name = "rssd02_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd01: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd01_16>; + interrupts = <44 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd01:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd01: sw0 { + regulator-name = "rssd01_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd01: sw1 { + regulator-name = "rssd01_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd04: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd01_16>; + interrupts = <47 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd04:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd04: sw0 { + regulator-name = "rssd04_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd04: sw1 { + regulator-name = "rssd04_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@4 { + reg = <4>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd05: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd01_16>; + interrupts = <48 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd05:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd05: sw0 { + regulator-name = "rssd05_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd05: sw1 { + regulator-name = "rssd05_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@5 { + reg = <5>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd08: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd01_16>; + interrupts = <51 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd08:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd08: sw0 { + regulator-name = "rssd08_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd08: sw1 { + regulator-name = "rssd08_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@6 { + reg = <6>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd07: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd01_16>; + interrupts = <50 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd07:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd07: sw0 { + regulator-name = "rssd07_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd07: sw1 { + regulator-name = "rssd07_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@7 { + reg = <7>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd06: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd01_16>; + interrupts = <49 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd06:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd06: sw0 { + regulator-name = "rssd06_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd06: sw1 { + regulator-name = "rssd06_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; +}; + +&i2cmux19 { + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd14: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd01_16>; + interrupts = <57 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd14:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd14: sw0 { + regulator-name = "rssd14_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd14: sw1 { + regulator-name = "rssd14_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd13: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd01_16>; + interrupts = <56 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd13:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd13: sw0 { + regulator-name = "rssd13_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd13: sw1 { + regulator-name = "rssd13_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd12: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd01_16>; + interrupts = <55 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd12:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd12: sw0 { + regulator-name = "rssd12_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd12: sw1 { + regulator-name = "rssd12_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd11: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd01_16>; + interrupts = <54 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd11:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd11: sw0 { + regulator-name = "rssd11_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd11: sw1 { + regulator-name = "rssd11_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@4 { + reg = <4>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd10: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd01_16>; + interrupts = <53 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd10:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd10: sw0 { + regulator-name = "rssd10_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd10: sw1 { + regulator-name = "rssd10_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@5 { + reg = <5>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd09: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd01_16>; + interrupts = <52 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd09:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd09: sw0 { + regulator-name = "rssd09_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd09: sw1 { + regulator-name = "rssd09_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@6 { + reg = <6>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd15: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd01_16>; + interrupts = <58 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd15:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd15: sw0 { + regulator-name = "rssd15_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd15: sw1 { + regulator-name = "rssd15_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; + i2c@7 { + reg = <7>; + #address-cells = <1>; + #size-cells = <0>; + + ssb_rssd16: regulator@3a { + compatible = "maxim,max5970"; + reg = <0x3a>; + interrupt-parent = <&smb_svc_pex_rssd01_16>; + interrupts = <59 IRQ_TYPE_LEVEL_LOW>; + + vss1-supply = <&p3v3_aux>; + vss2-supply = <&p12v>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + label = "rssd16:green:power"; + default-state = "off"; + }; + }; + + regulators { + sw0_ssb_rssd16: sw0 { + regulator-name = "rssd16_12v"; + shunt-resistor-micro-ohms = <9000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <4500000>; + regulator-enable-ramp-delay = <1000>; + }; + sw1_ssb_rssd16: sw1 { + regulator-name = "rssd16_3v3"; + shunt-resistor-micro-ohms = <100000>; + regulator-over-current-protection; + regulator-oc-protection-microamp = <410000>; + regulator-enable-ramp-delay = <1000>; + }; + }; + }; + }; +}; diff --git a/arch/arm/dts/bcm4908.dtsi b/arch/arm/dts/bcm4908.dtsi deleted file mode 100644 index 0be5cfeeffa..00000000000 --- a/arch/arm/dts/bcm4908.dtsi +++ /dev/null @@ -1,127 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT - -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> - -/dts-v1/; - -/ { - compatible = "brcm,bcm4908", "brcm,bcmbca"; - - interrupt-parent = <&gic>; - - #address-cells = <2>; - #size-cells = <2>; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "brcm,brahma-b53"; - reg = <0x0>; - enable-method = "spin-table"; - cpu-release-addr = <0x0 0xfff8>; - next-level-cache = <&l2>; - }; - - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "brcm,brahma-b53"; - reg = <0x1>; - enable-method = "spin-table"; - cpu-release-addr = <0x0 0xfff8>; - next-level-cache = <&l2>; - }; - - cpu2: cpu@2 { - device_type = "cpu"; - compatible = "brcm,brahma-b53"; - reg = <0x2>; - enable-method = "spin-table"; - cpu-release-addr = <0x0 0xfff8>; - next-level-cache = <&l2>; - }; - - cpu3: cpu@3 { - device_type = "cpu"; - compatible = "brcm,brahma-b53"; - reg = <0x3>; - enable-method = "spin-table"; - cpu-release-addr = <0x0 0xfff8>; - next-level-cache = <&l2>; - }; - - l2: l2-cache0 { - compatible = "cache"; - }; - }; - - axi@81000000 { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x00 0x00 0x81000000 0x4000>; - - gic: interrupt-controller@1000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x1000 0x1000>, - <0x2000 0x2000>; - }; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; - }; - - pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; - }; - - clocks { - periph_clk: periph_clk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <50000000>; - clock-output-names = "periph"; - }; - }; - - bus@ff800000 { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x00 0x00 0xff800000 0x3000>; - - uart0: serial@640 { - compatible = "brcm,bcm6345-uart"; - reg = <0x640 0x18>; - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&periph_clk>; - clock-names = "refclk"; - status = "disabled"; - }; - - }; -}; diff --git a/arch/arm/dts/bcm63138.dtsi b/arch/arm/dts/bcm63138.dtsi deleted file mode 100644 index 42b442aec9f..00000000000 --- a/arch/arm/dts/bcm63138.dtsi +++ /dev/null @@ -1,149 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Broadcom BCM63138 DSL SoCs Device Tree - */ - -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/interrupt-controller/irq.h> - -/ { - compatible = "brcm,bcm63138", "brcm,bcmbca"; - #address-cells = <1>; - #size-cells = <1>; - - interrupt-parent = <&gic>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - next-level-cache = <&L2>; - reg = <0>; - enable-method = "brcm,bcm63138"; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - next-level-cache = <&L2>; - reg = <1>; - enable-method = "brcm,bcm63138"; - }; - }; - - clocks { - /* UBUS peripheral clock */ - periph_clk: periph_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <50000000>; - clock-output-names = "periph"; - }; - - /* peripheral clock for system timer */ - axi_clk: axi_clk { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&armpll>; - clock-div = <2>; - clock-mult = <1>; - }; - - /* APB bus clock */ - apb_clk: apb_clk { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&armpll>; - clock-div = <4>; - clock-mult = <1>; - }; - }; - - /* ARM bus */ - axi@80000000 { - compatible = "simple-bus"; - ranges = <0 0x80000000 0x784000>; - #address-cells = <1>; - #size-cells = <1>; - - L2: cache-controller@1d000 { - compatible = "arm,pl310-cache"; - reg = <0x1d000 0x1000>; - cache-unified; - cache-level = <2>; - cache-size = <524288>; - cache-sets = <1024>; - cache-line-size = <32>; - interrupts = <GIC_PPI 0 IRQ_TYPE_LEVEL_HIGH>; - }; - - scu: scu@1e000 { - compatible = "arm,cortex-a9-scu"; - reg = <0x1e000 0x100>; - }; - - gic: interrupt-controller@1f000 { - compatible = "arm,cortex-a9-gic"; - reg = <0x1f000 0x1000 - 0x1e100 0x100>; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - }; - - global_timer: timer@1e200 { - compatible = "arm,cortex-a9-global-timer"; - reg = <0x1e200 0x20>; - interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>; - clocks = <&axi_clk>; - }; - - local_timer: local-timer@1e600 { - compatible = "arm,cortex-a9-twd-timer"; - reg = <0x1e600 0x20>; - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | - IRQ_TYPE_EDGE_RISING)>; - clocks = <&axi_clk>; - }; - - twd_watchdog: watchdog@1e620 { - compatible = "arm,cortex-a9-twd-wdt"; - reg = <0x1e620 0x20>; - interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | - IRQ_TYPE_LEVEL_HIGH)>; - }; - - armpll: armpll@20000 { - #clock-cells = <0>; - compatible = "brcm,bcm63138-armpll"; - clocks = <&periph_clk>; - reg = <0x20000 0xf00>; - }; - }; - - /* Legacy UBUS base */ - bus@fffe8000 { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0xfffe8000 0x8000>; - - timer0: timer@80 { - compatible = "brcm,bcmbca-periph-timer"; - reg = <0x80 0x28>; - clocks = <&periph_clk>; - }; - - uart0: serial@600 { - compatible = "brcm,bcm6345-uart"; - reg = <0x600 0x20>; - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&periph_clk>; - clock-names = "refclk"; - status = "disabled"; - }; - }; -}; diff --git a/arch/arm/dts/bcm63148.dtsi b/arch/arm/dts/bcm63148.dtsi deleted file mode 100644 index df5307b6b3a..00000000000 --- a/arch/arm/dts/bcm63148.dtsi +++ /dev/null @@ -1,103 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright 2022 Broadcom Ltd. - */ - -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/interrupt-controller/irq.h> - -/ { - compatible = "brcm,bcm63148", "brcm,bcmbca"; - #address-cells = <1>; - #size-cells = <1>; - - interrupt-parent = <&gic>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - B15_0: cpu@0 { - device_type = "cpu"; - compatible = "brcm,brahma-b15"; - reg = <0x0>; - next-level-cache = <&L2_0>; - enable-method = "psci"; - }; - - B15_1: cpu@1 { - device_type = "cpu"; - compatible = "brcm,brahma-b15"; - reg = <0x1>; - next-level-cache = <&L2_0>; - enable-method = "psci"; - }; - - L2_0: l2-cache0 { - compatible = "cache"; - }; - }; - - timer { - compatible = "arm,armv7-timer"; - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; - }; - - pmu: pmu { - compatible = "arm,cortex-a15-pmu"; - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&B15_0>, <&B15_1>; - }; - - clocks: clocks { - periph_clk: periph-clk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <50000000>; - }; - }; - - psci { - compatible = "arm,psci-0.2"; - method = "smc"; - }; - - axi@80030000 { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x80030000 0x8000>; - - gic: interrupt-controller@1000 { - compatible = "arm,cortex-a15-gic"; - #interrupt-cells = <3>; - interrupt-controller; - reg = <0x1000 0x1000>, - <0x2000 0x2000>, - <0x4000 0x2000>, - <0x6000 0x2000>; - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | - IRQ_TYPE_LEVEL_HIGH)>; - }; - }; - - bus@ff800000 { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0xfffe8000 0x8000>; - - uart0: serial@600 { - compatible = "brcm,bcm6345-uart"; - reg = <0x600 0x20>; - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&periph_clk>; - clock-names = "refclk"; - status = "disabled"; - }; - }; -}; diff --git a/arch/arm/dts/bcm94908.dts b/arch/arm/dts/bcm94908.dts deleted file mode 100644 index fcbd3c430ac..00000000000 --- a/arch/arm/dts/bcm94908.dts +++ /dev/null @@ -1,30 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright 2022 Broadcom Ltd. - */ - -/dts-v1/; - -#include "bcm4908.dtsi" - -/ { - model = "Broadcom BCM94908 Reference Board"; - compatible = "brcm,bcm94908", "brcm,bcm4908", "brcm,bcmbca"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - memory@0 { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x08000000>; - }; -}; - -&uart0 { - status = "okay"; -}; diff --git a/arch/arm/dts/bcm963138.dts b/arch/arm/dts/bcm963138.dts deleted file mode 100644 index 6158a873355..00000000000 --- a/arch/arm/dts/bcm963138.dts +++ /dev/null @@ -1,30 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright 2022 Broadcom Ltd. - */ - -/dts-v1/; - -#include "bcm63138.dtsi" - -/ { - model = "Broadcom BCM963138 Reference Board"; - compatible = "brcm,bcm963138", "brcm,bcm63138", "brcm,bcmbca"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - memory@0 { - device_type = "memory"; - reg = <0x0 0x08000000>; - }; -}; - -&uart0 { - status = "okay"; -}; diff --git a/arch/arm/dts/bcm963148.dts b/arch/arm/dts/bcm963148.dts deleted file mode 100644 index 98f6a6d09f5..00000000000 --- a/arch/arm/dts/bcm963148.dts +++ /dev/null @@ -1,30 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright 2019 Broadcom Ltd. - */ - -/dts-v1/; - -#include "bcm63148.dtsi" - -/ { - model = "Broadcom BCM963148 Reference Board"; - compatible = "brcm,bcm963148", "brcm,bcm63148", "brcm,bcmbca"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - memory@0 { - device_type = "memory"; - reg = <0x0 0x08000000>; - }; -}; - -&uart0 { - status = "okay"; -}; diff --git a/arch/arm/dts/bcm96753ref.dts b/arch/arm/dts/bcm96753ref.dts index ebc8c8e4ce7..c763358514f 100644 --- a/arch/arm/dts/bcm96753ref.dts +++ b/arch/arm/dts/bcm96753ref.dts @@ -64,19 +64,15 @@ status = "okay"; }; -&nand { +&nand_controller { + brcm,wp-not-connected; status = "okay"; - write-protect = <0>; - #address-cells = <1>; - #size-cells = <0>; +}; - nandcs@0 { - compatible = "brcm,nandcs"; - reg = <0>; - nand-ecc-strength = <4>; - nand-ecc-step-size = <512>; - brcm,nand-oob-sector-size = <16>; - }; +&nandcs { + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + brcm,nand-oob-sector-size = <16>; }; &leds { diff --git a/arch/arm/dts/bcm968360bg.dts b/arch/arm/dts/bcm968360bg.dts index 1335f484ee6..a5b30f4e4a6 100644 --- a/arch/arm/dts/bcm968360bg.dts +++ b/arch/arm/dts/bcm968360bg.dts @@ -62,19 +62,15 @@ status = "okay"; }; -&nand { +&nand_controller { + brcm,wp-not-connected; status = "okay"; - write-protect = <0>; - #address-cells = <1>; - #size-cells = <0>; +}; - nandcs@0 { - compatible = "brcm,nandcs"; - reg = <0>; - nand-ecc-strength = <4>; - nand-ecc-step-size = <512>; - brcm,nand-oob-sector-size = <16>; - }; +&nandcs { + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + brcm,nand-oob-sector-size = <16>; }; &leds { diff --git a/arch/arm/dts/bcm968580xref.dts b/arch/arm/dts/bcm968580xref.dts index 9aa45877b54..77616023010 100644 --- a/arch/arm/dts/bcm968580xref.dts +++ b/arch/arm/dts/bcm968580xref.dts @@ -62,19 +62,15 @@ status = "okay"; }; -&nand { +&nand_controller { + brcm,wp-not-connected; status = "okay"; - write-protect = <0>; - #address-cells = <1>; - #size-cells = <0>; +}; - nandcs@0 { - compatible = "brcm,nandcs"; - reg = <0>; - nand-ecc-strength = <4>; - nand-ecc-step-size = <512>; - brcm,nand-oob-sector-size = <16>; - }; +&nandcs { + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + brcm,nand-oob-sector-size = <16>; }; &leds { diff --git a/arch/arm/dts/imx8mm-u-boot.dtsi b/arch/arm/dts/imx8mm-u-boot.dtsi index d31bc822532..8608fa004fd 100644 --- a/arch/arm/dts/imx8mm-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-u-boot.dtsi @@ -164,6 +164,23 @@ }; #endif +#ifdef CONFIG_OPTEE + tee: tee { + description = "OP-TEE"; + type = "tee"; + arch = "arm64"; + compression = "none"; + os = "tee"; + load = <CONFIG_IMX8M_OPTEE_LOAD_ADDR>; + entry = <CONFIG_IMX8M_OPTEE_LOAD_ADDR>; + + tee-os { + filename = "tee.bin"; + optional; + }; + }; +#endif + binman_fip: fip { arch = "arm64"; compression = "none"; @@ -192,8 +209,12 @@ fdt = "fdt-SEQ"; firmware = "uboot"; #ifndef CONFIG_ARMV8_PSCI +#ifdef CONFIG_OPTEE + loadables = "atf", "tee"; +#else loadables = "atf"; #endif +#endif }; }; }; diff --git a/arch/arm/dts/imx8mn-u-boot.dtsi b/arch/arm/dts/imx8mn-u-boot.dtsi index 6d80d856365..bf2bb0f17c7 100644 --- a/arch/arm/dts/imx8mn-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-u-boot.dtsi @@ -240,6 +240,23 @@ }; #endif +#ifdef CONFIG_OPTEE + tee: tee { + description = "OP-TEE"; + type = "tee"; + arch = "arm64"; + compression = "none"; + os = "tee"; + load = <CONFIG_IMX8M_OPTEE_LOAD_ADDR>; + entry = <CONFIG_IMX8M_OPTEE_LOAD_ADDR>; + + tee-os { + filename = "tee.bin"; + optional; + }; + }; +#endif + binman_fip: fip { arch = "arm64"; compression = "none"; @@ -268,8 +285,12 @@ fdt = "fdt-SEQ"; firmware = "uboot"; #ifndef CONFIG_ARMV8_PSCI +#ifdef CONFIG_OPTEE + loadables = "atf", "tee"; +#else loadables = "atf"; #endif +#endif }; }; }; diff --git a/arch/arm/dts/imx8mp-u-boot.dtsi b/arch/arm/dts/imx8mp-u-boot.dtsi index 56749ccacd2..9e590c3bba0 100644 --- a/arch/arm/dts/imx8mp-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-u-boot.dtsi @@ -185,6 +185,23 @@ }; #endif +#ifdef CONFIG_OPTEE + tee: tee { + description = "OP-TEE"; + type = "tee"; + arch = "arm64"; + compression = "none"; + os = "tee"; + load = <CONFIG_IMX8M_OPTEE_LOAD_ADDR>; + entry = <CONFIG_IMX8M_OPTEE_LOAD_ADDR>; + + tee-os { + filename = "tee.bin"; + optional; + }; + }; +#endif + @fdt-SEQ { description = "NAME"; type = "flat_dt"; @@ -204,8 +221,12 @@ fdt = "fdt-SEQ"; firmware = "uboot"; #ifndef CONFIG_ARMV8_PSCI +#ifdef CONFIG_OPTEE + loadables = "atf", "tee"; +#else loadables = "atf"; #endif +#endif }; }; }; diff --git a/arch/arm/dts/imx8mq-u-boot.dtsi b/arch/arm/dts/imx8mq-u-boot.dtsi index d7a83a78f4d..458657fc474 100644 --- a/arch/arm/dts/imx8mq-u-boot.dtsi +++ b/arch/arm/dts/imx8mq-u-boot.dtsi @@ -144,6 +144,23 @@ }; #endif +#ifdef CONFIG_OPTEE + tee: tee { + description = "OP-TEE"; + type = "tee"; + arch = "arm64"; + compression = "none"; + os = "tee"; + load = <CONFIG_IMX8M_OPTEE_LOAD_ADDR>; + entry = <CONFIG_IMX8M_OPTEE_LOAD_ADDR>; + + tee-os { + filename = "tee.bin"; + optional; + }; + }; +#endif + fdt { compression = "none"; description = "NAME"; @@ -164,8 +181,12 @@ fdt = "fdt"; firmware = "uboot"; #ifndef CONFIG_ARMV8_PSCI +#ifdef CONFIG_OPTEE + loadables = "atf", "tee"; +#else loadables = "atf"; #endif +#endif }; }; }; diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi index 408e601bc90..a99ba99bfb4 100644 --- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi +++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi @@ -26,111 +26,6 @@ bootph-pre-ram; }; -&lpi2c2 { - #address-cells = <1>; - #size-cells = <0>; - clock-frequency = <400000>; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&pinctrl_lpi2c2>; - pinctrl-1 = <&pinctrl_lpi2c2>; - status = "okay"; - - pmic@25 { - compatible = "nxp,pca9451a"; - reg = <0x25>; - interrupt-parent = <&pcal6524>; - interrupts = <11 IRQ_TYPE_LEVEL_LOW>; - - regulators { - buck1: BUCK1 { - regulator-name = "BUCK1"; - regulator-min-microvolt = <650000>; - regulator-max-microvolt = <2237500>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay = <3125>; - }; - - buck2: BUCK2 { - regulator-name = "BUCK2"; - regulator-min-microvolt = <600000>; - regulator-max-microvolt = <2187500>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay = <3125>; - }; - - buck4: BUCK4{ - regulator-name = "BUCK4"; - regulator-min-microvolt = <600000>; - regulator-max-microvolt = <3400000>; - regulator-boot-on; - regulator-always-on; - }; - - buck5: BUCK5{ - regulator-name = "BUCK5"; - regulator-min-microvolt = <600000>; - regulator-max-microvolt = <3400000>; - regulator-boot-on; - regulator-always-on; - }; - - buck6: BUCK6 { - regulator-name = "BUCK6"; - regulator-min-microvolt = <600000>; - regulator-max-microvolt = <3400000>; - regulator-boot-on; - regulator-always-on; - }; - - ldo1: LDO1 { - regulator-name = "LDO1"; - regulator-min-microvolt = <1600000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - ldo4: LDO4 { - regulator-name = "LDO4"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - ldo5: LDO5 { - regulator-name = "LDO5"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - }; - }; - - pcal6524: gpio@22 { - compatible = "nxp,pcal6524"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pcal6524>; - reg = <0x22>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupt-parent = <&gpio3>; - interrupts = <27 IRQ_TYPE_LEVEL_LOW>; - }; - - adp5585gpio: gpio@34 { - compatible = "adp5585"; - reg = <0x34>; - gpio-controller; - #gpio-cells = <2>; - }; -}; - &aips1 { bootph-pre-ram; bootph-all; @@ -149,19 +44,6 @@ &iomuxc { bootph-pre-ram; bootph-some-ram; - - pinctrl_lpi2c2: lpi2c2grp { - fsl,pins = < - MX93_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e - MX93_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e - >; - }; - - pinctrl_pcal6524: pcal6524grp { - fsl,pins = < - MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x31e - >; - }; }; ®_usdhc2_vmmc { diff --git a/arch/arm/dts/k3-am62a-ddr.dtsi b/arch/arm/dts/k3-am62a-ddr.dtsi index 8629ea45b84..42e41f78505 100644 --- a/arch/arm/dts/k3-am62a-ddr.dtsi +++ b/arch/arm/dts/k3-am62a-ddr.dtsi @@ -4,11 +4,12 @@ */ / { - memorycontroller: memory-controller@f308000 { + memorycontroller: memory-controller@f300000 { compatible = "ti,am62a-ddrss"; reg = <0x00 0x0f308000 0x00 0x4000>, - <0x00 0x43014000 0x00 0x100>; - reg-names = "cfg", "ctrl_mmr_lp4"; + <0x00 0x43014000 0x00 0x100>, + <0x00 0x0f300000 0x00 0x200>; + reg-names = "cfg", "ctrl_mmr_lp4", "ss_cfg"; ti,ddr-freq1 = <DDRSS_PLL_FREQUENCY_1>; ti,ddr-freq2 = <DDRSS_PLL_FREQUENCY_2>; ti,ddr-fhs-cnt = <DDRSS_PLL_FHS_CNT>; diff --git a/arch/arm/dts/k3-j721s2-ddr.dtsi b/arch/arm/dts/k3-j721s2-ddr.dtsi index 345e2b84f9e..9764085163c 100644 --- a/arch/arm/dts/k3-j721s2-ddr.dtsi +++ b/arch/arm/dts/k3-j721s2-ddr.dtsi @@ -5,6 +5,8 @@ &main_navss { ranges = <0x00 0x00114000 0x00 0x00114000 0x00 0x00000100>, // ctrl_mmr_lpr + <0x00 0x02980000 0x00 0x02980000 0x00 0x00000200>, // ss cfg 0 + <0x00 0x029a0000 0x00 0x029a0000 0x00 0x00000200>, // ss cfg 1 <0x00 0x02990000 0x00 0x02990000 0x00 0x00004000>, // ddr0 cfg <0x00 0x029b0000 0x00 0x029b0000 0x00 0x00004000>, // ddr1 cfg <0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000>; @@ -24,8 +26,9 @@ memorycontroller0: memorycontroller@2990000 { compatible = "ti,j721s2-ddrss"; reg = <0x0 0x02990000 0x0 0x4000>, - <0x0 0x0114000 0x0 0x100>; - reg-names = "cfg", "ctrl_mmr_lp4"; + <0x0 0x0114000 0x0 0x100>, + <0x0 0x02980000 0x0 0x200>; + reg-names = "cfg", "ctrl_mmr_lp4", "ss_cfg"; power-domains = <&k3_pds 138 TI_SCI_PD_SHARED>, <&k3_pds 96 TI_SCI_PD_SHARED>; clocks = <&k3_clks 138 0>, <&k3_clks 43 2>; @@ -2232,8 +2235,9 @@ memorycontroller1: memorycontroller@29b0000 { compatible = "ti,j721s2-ddrss"; reg = <0x0 0x029b0000 0x0 0x4000>, - <0x0 0x0114000 0x0 0x100>; - reg-names = "cfg", "ctrl_mmr_lp4"; + <0x0 0x0114000 0x0 0x100>, + <0x0 0x029a0000 0x0 0x200>; + reg-names = "cfg", "ctrl_mmr_lp4", "ss_cfg"; power-domains = <&k3_pds 139 TI_SCI_PD_SHARED>, <&k3_pds 97 TI_SCI_PD_SHARED>; clocks = <&k3_clks 139 0>, <&k3_clks 43 2>; diff --git a/arch/arm/dts/k3-j784s4-ddr.dtsi b/arch/arm/dts/k3-j784s4-ddr.dtsi index 1c3242b0870..fc74c539331 100644 --- a/arch/arm/dts/k3-j784s4-ddr.dtsi +++ b/arch/arm/dts/k3-j784s4-ddr.dtsi @@ -9,6 +9,10 @@ <0x00 0x029b0000 0x00 0x029b0000 0x00 0x00004000>, // ddr1 cfg <0x00 0x029d0000 0x00 0x029d0000 0x00 0x00004000>, // ddr2 cfg <0x00 0x029f0000 0x00 0x029f0000 0x00 0x00004000>, // ddr3 cfg + <0x00 0x02980000 0x00 0x02980000 0x00 0x00000200>, // ss cfg 0 + <0x00 0x029a0000 0x00 0x029a0000 0x00 0x00000200>, // ss cfg 1 + <0x00 0x029c0000 0x00 0x029c0000 0x00 0x00000200>, // ss cfg 2 + <0x00 0x029e0000 0x00 0x029e0000 0x00 0x00000200>, // ss cfg 3 <0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000>; msmc0: msmc { @@ -26,8 +30,9 @@ memorycontroller0: memorycontroller@2990000 { compatible = "ti,j721s2-ddrss"; reg = <0x0 0x02990000 0x0 0x4000>, - <0x0 0x0114000 0x0 0x100>; - reg-names = "cfg", "ctrl_mmr_lp4"; + <0x0 0x0114000 0x0 0x100>, + <0x0 0x02980000 0x0 0x200>; + reg-names = "cfg", "ctrl_mmr_lp4", "ss_cfg"; power-domains = <&k3_pds 191 TI_SCI_PD_SHARED>, <&k3_pds 131 TI_SCI_PD_SHARED>; clocks = <&k3_clks 191 1>, <&k3_clks 78 2>; @@ -2234,8 +2239,9 @@ memorycontroller1: memorycontroller@29b0000 { compatible = "ti,j721s2-ddrss"; reg = <0x0 0x029b0000 0x0 0x4000>, - <0x0 0x0114000 0x0 0x100>; - reg-names = "cfg", "ctrl_mmr_lp4"; + <0x0 0x0114000 0x0 0x100>, + <0x0 0x029a0000 0x0 0x200>; + reg-names = "cfg", "ctrl_mmr_lp4", "ss_cfg"; power-domains = <&k3_pds 192 TI_SCI_PD_SHARED>, <&k3_pds 132 TI_SCI_PD_SHARED>; clocks = <&k3_clks 192 1>, <&k3_clks 78 2>; @@ -4442,8 +4448,9 @@ memorycontroller2: memorycontroller@29d0000 { compatible = "ti,j721s2-ddrss"; reg = <0x0 0x029d0000 0x0 0x4000>, - <0x0 0x0114000 0x0 0x100>; - reg-names = "cfg", "ctrl_mmr_lp4"; + <0x0 0x0114000 0x0 0x100>, + <0x0 0x029c0000 0x0 0x200>; + reg-names = "cfg", "ctrl_mmr_lp4", "ss_cfg"; power-domains = <&k3_pds 193 TI_SCI_PD_SHARED>, <&k3_pds 133 TI_SCI_PD_SHARED>; clocks = <&k3_clks 193 1>, <&k3_clks 78 2>; @@ -6650,8 +6657,9 @@ memorycontroller3: memorycontroller@29f0000 { compatible = "ti,j721s2-ddrss"; reg = <0x0 0x029f0000 0x0 0x4000>, - <0x0 0x0114000 0x0 0x100>; - reg-names = "cfg", "ctrl_mmr_lp4"; + <0x0 0x0114000 0x0 0x100>, + <0x0 0x29e0000 0x0 0x200>; + reg-names = "cfg", "ctrl_mmr_lp4", "ss_cfg"; power-domains = <&k3_pds 194 TI_SCI_PD_SHARED>, <&k3_pds 139 TI_SCI_PD_SHARED>; clocks = <&k3_clks 194 1>, <&k3_clks 78 2>; diff --git a/arch/arm/dts/mt7629-rfb-u-boot.dtsi b/arch/arm/dts/mt7629-rfb-u-boot.dtsi index 41170474658..667c9c89ed5 100644 --- a/arch/arm/dts/mt7629-rfb-u-boot.dtsi +++ b/arch/arm/dts/mt7629-rfb-u-boot.dtsi @@ -5,6 +5,59 @@ * Author: Weijie Gao <weijie.gao@mediatek.com> */ +#include <dt-bindings/reset/mt7629-reset.h> + +/ { + dramc: dramc@10203000 { + compatible = "mediatek,mt7629-dramc"; + reg = <0x10203000 0x600>, /* EMI */ + <0x10213000 0x1000>, /* DDRPHY */ + <0x10214000 0xd00>; /* DRAMC_AO */ + clocks = <&topckgen CLK_TOP_DDRPHYCFG_SEL>, + <&topckgen CLK_TOP_SYSPLL1_D8>, + <&topckgen CLK_TOP_MEM_SEL>, + <&topckgen CLK_TOP_DMPLL>; + clock-names = "phy", "phy_mux", "mem", "mem_mux"; + }; + + mcucfg: syscon@10200000 { + compatible = "mediatek,mt7629-mcucfg", "syscon"; + reg = <0x10200000 0x1000>; + #clock-cells = <1>; + }; + + timer0: timer@10004000 { + compatible = "mediatek,timer"; + reg = <0x10004000 0x80>; + interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_LOW>; + clocks = <&topckgen CLK_TOP_CLKXTAL_D4>, + <&topckgen CLK_TOP_10M_SEL>; + clock-names = "mux", "src"; + }; + + snand: snand@1100d000 { + compatible = "mediatek,mt7629-snand"; + reg = <0x1100d000 0x1000>, + <0x1100e000 0x1000>; + reg-names = "nfi", "ecc"; + clocks = <&pericfg CLK_PERI_NFI_PD>, + <&pericfg CLK_PERI_SNFI_PD>, + <&pericfg CLK_PERI_NFIECC_PD>; + clock-names = "nfi_clk", "pad_clk", "ecc_clk"; + assigned-clocks = <&topckgen CLK_TOP_AXI_SEL>, + <&topckgen CLK_TOP_NFI_INFRA_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_SYSPLL1_D2>, + <&topckgen CLK_TOP_UNIVPLL2_D8>; + status = "disabled"; + }; + + wdt-reboot { + compatible = "wdt-reboot"; + wdt = <&watchdog>; + }; + +}; + &infracfg { bootph-all; }; @@ -35,8 +88,72 @@ &uart0 { bootph-all; + reg-shift = <2>; + assigned-clocks = <&topckgen CLK_TOP_AXI_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_SYSPLL1_D2>; +}; + +&qspi { + bootph-all; + compatible = "mediatek,mtk-snor"; + reg = <0x11014000 0x1000>; + pinctrl-names = "default"; + pinctrl-0 = <&qspi_pins>; + status = "okay"; + + /delete-node/ flash@0; + + spi-flash@0{ + bootph-all; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; }; -&snfi { +&pio { bootph-all; + snfi_pins: snfi-pins { + mux { + bootph-all; + function = "flash"; + groups = "snfi"; + }; + }; + snor_pins: snor-pins { + mux { + bootph-all; + function = "flash"; + groups = "spi_nor"; + }; + }; +}; + +&snand { + pinctrl-names = "default"; + pinctrl-0 = <&snfi_pins>; + status = "okay"; + quad-spi; + bootph-all; +}; + +ð { + resets = <ðsys ETHSYS_FE_RST>; + reset-names = "fe"; + status = "okay"; + mediatek,gmac-id = <0>; + phy-mode = "2500base-x"; + mediatek,switch = "mt7531"; + reset-gpios = <&pio 28 GPIO_ACTIVE_HIGH>; + assigned-clocks = <&topckgen CLK_TOP_ETH_SEL>, + <&topckgen CLK_TOP_F10M_REF_SEL>, + <&topckgen CLK_TOP_SGMII_REF_1_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL1_D2>, + <&topckgen CLK_TOP_SYSPLL4_D16>, + <&topckgen CLK_TOP_SGMIIPLL_D2>; + fixed-link { + speed = <2500>; + full-duplex; + }; }; diff --git a/arch/arm/dts/mt7629-rfb.dts b/arch/arm/dts/mt7629-rfb.dts deleted file mode 100644 index f347725f2f6..00000000000 --- a/arch/arm/dts/mt7629-rfb.dts +++ /dev/null @@ -1,123 +0,0 @@ -/* - * Copyright (C) 2018 MediaTek Inc. - * Author: Ryder Lee <ryder.lee@mediatek.com> - * - * SPDX-License-Identifier: (GPL-2.0 OR MIT) - */ - -/dts-v1/; -#include "mt7629.dtsi" -#include "mt7629-rfb-u-boot.dtsi" - -/ { - model = "MediaTek MT7629 RFB"; - compatible = "mediatek,mt7629-rfb", "mediatek,mt7629"; - - aliases { - spi0 = &snor; - }; - - chosen { - stdout-path = &uart0; - }; -}; - -ð { - status = "okay"; - mediatek,gmac-id = <0>; - phy-mode = "2500base-x"; - mediatek,switch = "mt7531"; - reset-gpios = <&gpio 28 GPIO_ACTIVE_HIGH>; - - fixed-link { - speed = <2500>; - full-duplex; - }; -}; - -&pinctrl { - state_default: pinmux_conf { - bootph-all; - - mux { - function = "jtag"; - groups = "ephy_leds_jtag"; - bootph-all; - }; - }; - - snfi_pins: snfi-pins { - mux { - function = "flash"; - groups = "snfi"; - }; - }; - - snor_pins: snor-pins { - mux { - function = "flash"; - groups = "spi_nor"; - }; - }; - - uart0_pins: uart0-default { - mux { - function = "uart"; - groups = "uart0_txd_rxd"; - }; - }; - - watchdog_pins: watchdog-default { - mux { - function = "watchdog"; - groups = "watchdog"; - }; - }; -}; - -&snfi { - pinctrl-names = "default", "snfi"; - pinctrl-0 = <&snor_pins>; - pinctrl-1 = <&snfi_pins>; - status = "disabled"; - - spi-flash@0{ - compatible = "jedec,spi-nor"; - reg = <0>; - bootph-all; - }; -}; - -&snor { - pinctrl-names = "default"; - pinctrl-0 = <&snor_pins>; - status = "okay"; - - spi-flash@0{ - compatible = "jedec,spi-nor"; - reg = <0>; - spi-tx-bus-width = <1>; - spi-rx-bus-width = <4>; - bootph-all; - }; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; - status = "okay"; -}; - -&xhci { - status = "okay"; -}; - -&u3phy { - status = "okay"; -}; - -&watchdog { - pinctrl-names = "default"; - pinctrl-0 = <&watchdog_pins>; - status = "okay"; -}; diff --git a/arch/arm/dts/mt7629.dtsi b/arch/arm/dts/mt7629.dtsi deleted file mode 100644 index cd8277deafe..00000000000 --- a/arch/arm/dts/mt7629.dtsi +++ /dev/null @@ -1,360 +0,0 @@ -/* - * Copyright (C) 2018 MediaTek Inc. - * Author: Ryder Lee <ryder.lee@mediatek.com> - * - * SPDX-License-Identifier: (GPL-2.0 OR MIT) - */ - -#include <dt-bindings/clock/mt7629-clk.h> -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/power/mt7629-power.h> -#include <dt-bindings/reset/mt7629-reset.h> -#include <dt-bindings/phy/phy.h> -#include "skeleton.dtsi" - -/ { - compatible = "mediatek,mt7629"; - interrupt-parent = <&sysirq>; - #address-cells = <1>; - #size-cells = <1>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - enable-method = "mediatek,mt6589-smp"; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x0>; - clock-frequency = <1250000000>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x1>; - clock-frequency = <1250000000>; - }; - }; - - clk20m: oscillator@0 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <20000000>; - clock-output-names = "clk20m"; - }; - - clk40m: oscillator@1 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <40000000>; - clock-output-names = "clkxtal"; - }; - - timer { - compatible = "arm,armv7-timer"; - interrupt-parent = <&gic>; - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; - clock-frequency = <20000000>; - arm,cpu-registers-not-fw-configured; - }; - - infracfg: syscon@10000000 { - compatible = "mediatek,mt7629-infracfg", "syscon"; - reg = <0x10000000 0x1000>; - #clock-cells = <1>; - }; - - pericfg: syscon@10002000 { - compatible = "mediatek,mt7629-pericfg", "syscon"; - reg = <0x10002000 0x1000>; - #clock-cells = <1>; - }; - - timer0: timer@10004000 { - compatible = "mediatek,timer"; - reg = <0x10004000 0x80>; - interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_LOW>; - clocks = <&topckgen CLK_TOP_CLKXTAL_D4>, - <&topckgen CLK_TOP_10M_SEL>; - clock-names = "mux", "src"; - }; - - scpsys: scpsys@10006000 { - compatible = "mediatek,mt7629-scpsys"; - reg = <0x10006000 0x1000>; - clocks = <&topckgen CLK_TOP_HIF_SEL>; - clock-names = "hif_sel"; - assigned-clocks = <&topckgen CLK_TOP_HIF_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL1_D2>; - #power-domain-cells = <1>; - infracfg = <&infracfg>; - }; - - mcucfg: syscon@10200000 { - compatible = "mediatek,mt7629-mcucfg", "syscon"; - reg = <0x10200000 0x1000>; - #clock-cells = <1>; - }; - - sysirq: interrupt-controller@10200a80 { - compatible = "mediatek,sysirq"; - reg = <0x10200a80 0x20>; - interrupt-controller; - #interrupt-cells = <3>; - interrupt-parent = <&gic>; - }; - - dramc: dramc@10203000 { - compatible = "mediatek,mt7629-dramc"; - reg = <0x10203000 0x600>, /* EMI */ - <0x10213000 0x1000>, /* DDRPHY */ - <0x10214000 0xd00>; /* DRAMC_AO */ - clocks = <&topckgen CLK_TOP_DDRPHYCFG_SEL>, - <&topckgen CLK_TOP_SYSPLL1_D8>, - <&topckgen CLK_TOP_MEM_SEL>, - <&topckgen CLK_TOP_DMPLL>; - clock-names = "phy", "phy_mux", "mem", "mem_mux"; - }; - - apmixedsys: clock-controller@10209000 { - compatible = "mediatek,mt7629-apmixedsys"; - reg = <0x10209000 0x1000>; - #clock-cells = <1>; - }; - - topckgen: clock-controller@10210000 { - compatible = "mediatek,mt7629-topckgen"; - reg = <0x10210000 0x1000>; - #clock-cells = <1>; - }; - - watchdog: watchdog@10212000 { - compatible = "mediatek,wdt"; - reg = <0x10212000 0x600>; - interrupts = <GIC_SPI 128 IRQ_TYPE_EDGE_FALLING>; - #reset-cells = <1>; - status = "disabled"; - }; - - wdt-reboot { - compatible = "wdt-reboot"; - wdt = <&watchdog>; - }; - - pinctrl: pinctrl@10217000 { - compatible = "mediatek,mt7629-pinctrl"; - reg = <0x10217000 0x8000>; - - pinctrl-names = "default"; - pinctrl-0 = <&state_default>; - - state_default: pinmux_conf { - }; - - gpio: gpio-controller { - gpio-controller; - #gpio-cells = <2>; - }; - }; - - gic: interrupt-controller@10300000 { - compatible = "arm,gic-400"; - interrupt-controller; - #interrupt-cells = <3>; - interrupt-parent = <&gic>; - reg = <0x10310000 0x1000>, - <0x10320000 0x1000>, - <0x10340000 0x2000>, - <0x10360000 0x2000>; - }; - - uart0: serial@11002000 { - compatible = "mediatek,hsuart"; - reg = <0x11002000 0x400>; - reg-shift = <2>; - interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>; - clocks = <&topckgen CLK_TOP_UART_SEL>, - <&pericfg CLK_PERI_UART0_PD>; - clock-names = "baud", "bus"; - status = "disabled"; - assigned-clocks = <&topckgen CLK_TOP_AXI_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_SYSPLL1_D2>; - }; - - uart1: serial@11003000 { - compatible = "mediatek,hsuart"; - reg = <0x11003000 0x400>; - reg-shift = <2>; - interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>; - clocks = <&topckgen CLK_TOP_UART_SEL>, - <&pericfg CLK_PERI_UART1_PD>; - clock-names = "baud", "bus"; - assigned-clocks = <&topckgen CLK_TOP_AXI_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_SYSPLL1_D2>; - status = "disabled"; - }; - - uart2: serial@11004000 { - compatible = "mediatek,hsuart"; - reg = <0x11004000 0x400>; - reg-shift = <2>; - interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_LOW>; - clocks = <&topckgen CLK_TOP_UART_SEL>, - <&pericfg CLK_PERI_UART2_PD>; - clock-names = "baud", "bus"; - assigned-clocks = <&topckgen CLK_TOP_AXI_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_SYSPLL1_D2>; - status = "disabled"; - }; - - snfi: snfi@1100d000 { - compatible = "mediatek,mtk-snfi-spi"; - reg = <0x1100d000 0x2000>; - clocks = <&pericfg CLK_PERI_NFI_PD>, - <&pericfg CLK_PERI_SNFI_PD>; - clock-names = "nfi_clk", "pad_clk"; - assigned-clocks = <&topckgen CLK_TOP_AXI_SEL>, - <&topckgen CLK_TOP_NFI_INFRA_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_SYSPLL1_D2>, - <&topckgen CLK_TOP_UNIVPLL2_D8>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - snor: snor@11014000 { - compatible = "mediatek,mtk-snor"; - reg = <0x11014000 0x1000>; - clocks = <&pericfg CLK_PERI_FLASH_PD>, - <&topckgen CLK_TOP_FLASH_SEL>; - clock-names = "spi", "sf"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - ssusbsys: ssusbsys@1a000000 { - compatible = "mediatek,mt7629-ssusbsys", "syscon"; - reg = <0x1a000000 0x1000>; - #clock-cells = <1>; - }; - - xhci: usb@1a0c0000 { - compatible = "mediatek,mt7629-xhci", "mediatek,mtk-xhci"; - reg = <0x1a0c0000 0x1000>, <0x1a0c3e00 0x0100>; - reg-names = "mac", "ippc"; - power-domains = <&scpsys MT7629_POWER_DOMAIN_HIF1>; - clocks = <&ssusbsys CLK_SSUSB_SYS_EN>, - <&ssusbsys CLK_SSUSB_REF_EN>, - <&ssusbsys CLK_SSUSB_MCU_EN>, - <&ssusbsys CLK_SSUSB_DMA_EN>; - clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck"; - phys = <&u2port0 PHY_TYPE_USB2>, <&u3port0 PHY_TYPE_USB3>; - status = "disabled"; - }; - - u3phy: usb-phy@1a0c4000 { - compatible = "mediatek,mt7629-tphy", "mediatek,generic-tphy-v2"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x1a0c4000 0x1000>; - status = "disabled"; - - u2port0: usb-phy@0 { - reg = <0x0 0x0700>; - #phy-cells = <1>; - clocks = <&ssusbsys CLK_SSUSB_U2_PHY_EN>; - clock-names = "ref"; - }; - - u3port0: usb-phy@700 { - reg = <0x0700 0x0700>; - #phy-cells = <1>; - }; - }; - - ethsys: syscon@1b000000 { - compatible = "mediatek,mt7629-ethsys", "syscon"; - reg = <0x1b000000 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - eth: ethernet@1b100000 { - compatible = "mediatek,mt7629-eth", "syscon"; - reg = <0x1b100000 0x20000>; - clocks = <&topckgen CLK_TOP_ETH_SEL>, - <&topckgen CLK_TOP_F10M_REF_SEL>, - <ðsys CLK_ETH_ESW_EN>, - <ðsys CLK_ETH_GP0_EN>, - <ðsys CLK_ETH_GP1_EN>, - <ðsys CLK_ETH_GP2_EN>, - <ðsys CLK_ETH_FE_EN>, - <&sgmiisys0 CLK_SGMII_TX_EN>, - <&sgmiisys0 CLK_SGMII_RX_EN>, - <&sgmiisys0 CLK_SGMII_CDR_REF>, - <&sgmiisys0 CLK_SGMII_CDR_FB>, - <&sgmiisys1 CLK_SGMII_TX_EN>, - <&sgmiisys1 CLK_SGMII_RX_EN>, - <&sgmiisys1 CLK_SGMII_CDR_REF>, - <&sgmiisys1 CLK_SGMII_CDR_FB>, - <&apmixedsys CLK_APMIXED_SGMIPLL>, - <&apmixedsys CLK_APMIXED_ETH2PLL>; - clock-names = "ethif", "sgmiitop", "esw", "gp0", "gp1", "gp2", - "fe", "sgmii_tx250m", "sgmii_rx250m", - "sgmii_cdr_ref", "sgmii_cdr_fb", - "sgmii2_tx250m", "sgmii2_rx250m", - "sgmii2_cdr_ref", "sgmii2_cdr_fb", - "sgmii_ck", "eth2pll"; - assigned-clocks = <&topckgen CLK_TOP_ETH_SEL>, - <&topckgen CLK_TOP_F10M_REF_SEL>, - <&topckgen CLK_TOP_SGMII_REF_1_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL1_D2>, - <&topckgen CLK_TOP_SYSPLL4_D16>, - <&topckgen CLK_TOP_SGMIIPLL_D2>; - power-domains = <&scpsys MT7629_POWER_DOMAIN_ETHSYS>; - resets = <ðsys ETHSYS_FE_RST>; - reset-names = "fe"; - mediatek,ethsys = <ðsys>; - mediatek,sgmiisys = <&sgmiisys0>; - mediatek,infracfg = <&infracfg>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - sgmiisys0: syscon@1b128000 { - compatible = "mediatek,mt7629-sgmiisys", "syscon"; - reg = <0x1b128000 0x1000>; - #clock-cells = <1>; - }; - - sgmiisys1: syscon@1b130000 { - compatible = "mediatek,mt7629-sgmiisys", "syscon"; - reg = <0x1b130000 0x1000>; - #clock-cells = <1>; - }; - - pwm: pwm@11006000 { - compatible = "mediatek,mt7629-pwm"; - reg = <0x11006000 0x1000>; - #clock-cells = <1>; - #pwm-cells = <2>; - interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_LOW>; - clocks = <&topckgen CLK_TOP_PWM_SEL>, - <&pericfg CLK_PERI_PWM_PD>, - <&pericfg CLK_PERI_PWM1_PD>; - clock-names = "top", "main", "pwm1"; - assigned-clocks = <&topckgen CLK_TOP_PWM_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL2_D4>; - status = "disabled"; - }; - -}; diff --git a/arch/arm/dts/mt7981-emmc-rfb.dts b/arch/arm/dts/mt7981-emmc-rfb.dts index 9aa7cd8f6e5..d6590f01cf8 100644 --- a/arch/arm/dts/mt7981-emmc-rfb.dts +++ b/arch/arm/dts/mt7981-emmc-rfb.dts @@ -95,6 +95,14 @@ }; }; + /* pin13 as pwm0, pin15 as pwm1, pin7 as pwm2 */ + three_pwm_pins_1: three-pwm-pins { + mux { + function = "pwm"; + groups = "pwm0_0", "pwm1_1", "pwm2"; + }; + }; + mmc0_pins_default: mmc0default { mux { function = "flash"; diff --git a/arch/arm/dts/mt7981-rfb.dts b/arch/arm/dts/mt7981-rfb.dts index 22a022acb62..d6ebd6539c3 100644 --- a/arch/arm/dts/mt7981-rfb.dts +++ b/arch/arm/dts/mt7981-rfb.dts @@ -123,6 +123,14 @@ groups = "pwm0_1", "pwm1_0", "pwm2"; }; }; + + /* pin13 as pwm0, pin15 as pwm1, pin7 as pwm2 */ + three_pwm_pins_1: three-pwm-pins { + mux { + function = "pwm"; + groups = "pwm0_0", "pwm1_1", "pwm2"; + }; + }; }; &spi0 { @@ -143,6 +151,8 @@ compatible = "spi-nand"; reg = <0>; spi-max-frequency = <52000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; }; }; @@ -164,6 +174,8 @@ compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <52000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; }; }; diff --git a/arch/arm/dts/mt7981-sd-rfb.dts b/arch/arm/dts/mt7981-sd-rfb.dts index 7d708084042..2adbc374725 100644 --- a/arch/arm/dts/mt7981-sd-rfb.dts +++ b/arch/arm/dts/mt7981-sd-rfb.dts @@ -95,6 +95,14 @@ }; }; + /* pin13 as pwm0, pin15 as pwm1, pin7 as pwm2 */ + three_pwm_pins_1: three-pwm-pins { + mux { + function = "pwm"; + groups = "pwm0_0", "pwm1_1", "pwm2"; + }; + }; + mmc0_pins_default: mmc0default { mux { function = "flash"; @@ -110,7 +118,7 @@ }; conf-clk { pins = "SPI1_CS"; - drive-strength = <MTK_DRIVE_6mA>; + drive-strength = <MTK_DRIVE_8mA>; bias-pull-down = <MTK_PUPD_SET_R1R0_10>; }; conf-rst { @@ -132,10 +140,12 @@ }; &mmc0 { + assigned-clock-parents = <&topckgen CLK_TOP_CB_NET2_D4>, + <&topckgen CLK_TOP_CB_NET2_D2>; pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins_default>; bus-width = <4>; - max-frequency = <52000000>; + max-frequency = <50000000>; cap-sd-highspeed; r_smpl = <0>; vmmc-supply = <®_3p3v>; diff --git a/arch/arm/dts/mt7981.dtsi b/arch/arm/dts/mt7981.dtsi index a9991a121f1..2844ab010de 100644 --- a/arch/arm/dts/mt7981.dtsi +++ b/arch/arm/dts/mt7981.dtsi @@ -137,8 +137,14 @@ <&infracfg CLK_INFRA_PWM1_CK>, <&infracfg CLK_INFRA_PWM2_CK>, <&infracfg CLK_INFRA_PWM3_CK>; - assigned-clocks = <&topckgen CLK_TOP_PWM_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_CB_CKSQ_40M>; + assigned-clocks = <&topckgen CLK_TOP_PWM_SEL>, + <&infracfg CLK_INFRA_PWM1_SEL>, + <&infracfg CLK_INFRA_PWM2_SEL>, + <&infracfg CLK_INFRA_PWM3_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_CB_CKSQ_40M>, + <&topckgen CLK_TOP_PWM_SEL>, + <&topckgen CLK_TOP_PWM_SEL>, + <&topckgen CLK_TOP_PWM_SEL>; clock-names = "top", "main", "pwm1", "pwm2", "pwm3"; status = "disabled"; }; @@ -300,13 +306,13 @@ reg = <0x11230000 0x1000>, <0x11C20000 0x1000>; interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&topckgen CLK_TOP_EMMC_400M>, - <&topckgen CLK_TOP_EMMC_208M>, + clocks = <&topckgen CLK_TOP_EMMC_208M>, + <&topckgen CLK_TOP_EMMC_400M>, <&infracfg CLK_INFRA_MSDC_CK>; - assigned-clocks = <&topckgen CLK_TOP_EMMC_400M_SEL>, - <&topckgen CLK_TOP_EMMC_208M_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_CB_NET2_D2>, - <&topckgen CLK_TOP_CB_M_D2>; + assigned-clocks = <&topckgen CLK_TOP_EMMC_208M_SEL>, + <&topckgen CLK_TOP_EMMC_400M_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_CB_M_D2>, + <&topckgen CLK_TOP_CB_NET2_D2>; clock-names = "source", "hclk", "source_cg"; status = "disabled"; }; diff --git a/arch/arm/dts/mt7986a-rfb.dts b/arch/arm/dts/mt7986a-rfb.dts index e5c9be7da82..67d14a99dae 100644 --- a/arch/arm/dts/mt7986a-rfb.dts +++ b/arch/arm/dts/mt7986a-rfb.dts @@ -190,12 +190,16 @@ compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <52000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; }; spi_nand@1 { compatible = "spi-nand"; reg = <1>; spi-max-frequency = <52000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; }; }; diff --git a/arch/arm/dts/mt7986b-rfb.dts b/arch/arm/dts/mt7986b-rfb.dts index 8196845a123..f98b04ab140 100644 --- a/arch/arm/dts/mt7986b-rfb.dts +++ b/arch/arm/dts/mt7986b-rfb.dts @@ -177,12 +177,16 @@ compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <52000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; }; spi_nand@1 { compatible = "spi-nand"; reg = <1>; spi-max-frequency = <52000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; }; }; diff --git a/arch/arm/dts/mt7988-rfb.dts b/arch/arm/dts/mt7988-rfb.dts index 2c114284309..2579d7099fb 100644 --- a/arch/arm/dts/mt7988-rfb.dts +++ b/arch/arm/dts/mt7988-rfb.dts @@ -50,19 +50,36 @@ status = "okay"; }; -ð { +ð0 { status = "okay"; - mediatek,gmac-id = <0>; phy-mode = "usxgmii"; mediatek,switch = "mt7988"; fixed-link { - speed = <1000>; + speed = <10000>; full-duplex; pause; }; }; +&pcie0 { + status = "okay"; +}; + +&pcie1 { + status = "okay"; +}; + +/* PCIE2 not working in u-boot */ +&pcie2 { + status = "disabled"; +}; + +/* PCIE3 not working in u-boot */ +&pcie3 { + status = "disabled"; +}; + &pinctrl { i2c1_pins: i2c1-pins { mux { @@ -84,6 +101,19 @@ function = "spi"; groups = "spi0", "spi0_wp_hold"; }; + + conf-pu { + pins = "SPI0_CSB", "SPI0_HOLD", "SPI0_WP"; + drive-strength = <MTK_DRIVE_8mA>; + bias-pull-up = <MTK_PUPD_SET_R1R0_11>; + }; + + conf-pd { + pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO"; + drive-strength = <MTK_DRIVE_8mA>; + bias-pull-down = <MTK_PUPD_SET_R1R0_11>; + }; + }; spi2_pins: spi2-pins { @@ -91,6 +121,18 @@ function = "spi"; groups = "spi2", "spi2_wp_hold"; }; + + conf-pu { + pins = "SPI2_CSB", "SPI2_HOLD", "SPI2_WP"; + drive-strength = <MTK_DRIVE_8mA>; + bias-pull-up = <MTK_PUPD_SET_R1R0_11>; + }; + + conf-pd { + pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO"; + drive-strength = <MTK_DRIVE_8mA>; + bias-pull-down = <MTK_PUPD_SET_R1R0_11>; + }; }; mmc0_pins_default: mmc0default { @@ -104,18 +146,25 @@ "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; input-enable; + drive-strength = <MTK_DRIVE_4mA>; + mediatek,pull-up-adv = <1>; /* pull-up 10K */ }; conf-clk { pins = "EMMC_CK"; + drive-strength = <MTK_DRIVE_6mA>; + mediatek,pull-down-adv = <2>; /* pull-down 50K */ }; conf-dsl { pins = "EMMC_DSL"; + mediatek,pull-down-adv = <2>; /* pull-down 50K */ }; conf-rst { pins = "EMMC_RSTB"; + drive-strength = <MTK_DRIVE_4mA>; + mediatek,pull-up-adv = <1>; /* pull-up 10K */ }; }; }; @@ -144,6 +193,8 @@ compatible = "spi-nand"; reg = <0>; spi-max-frequency = <52000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; }; }; @@ -165,6 +216,8 @@ compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <52000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; }; }; diff --git a/arch/arm/dts/mt7988-sd-rfb.dts b/arch/arm/dts/mt7988-sd-rfb.dts index 9aa198b84ab..38727a271b2 100644 --- a/arch/arm/dts/mt7988-sd-rfb.dts +++ b/arch/arm/dts/mt7988-sd-rfb.dts @@ -41,14 +41,13 @@ status = "okay"; }; -ð { +ð0 { status = "okay"; - mediatek,gmac-id = <0>; phy-mode = "usxgmii"; mediatek,switch = "mt7988"; fixed-link { - speed = <1000>; + speed = <10000>; full-duplex; pause; }; diff --git a/arch/arm/dts/mt7988.dtsi b/arch/arm/dts/mt7988.dtsi index e120e5084ce..f2bfde547e6 100644 --- a/arch/arm/dts/mt7988.dtsi +++ b/arch/arm/dts/mt7988.dtsi @@ -188,6 +188,152 @@ status = "okay"; }; + pcie2: pcie@11280000 { + compatible = "mediatek,mt7988-pcie", + "mediatek,mt7986-pcie", + "mediatek,mt8192-pcie"; + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + reg = <0 0x11280000 0 0x2000>; + reg-names = "pcie-mac"; + linux,pci-domain = <3>; + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; + bus-range = <0x00 0xff>; + ranges = <0x82000000 0 0x20200000 0 0x20200000 0 0x07e00000>; + clocks = <&infracfg CLK_INFRA_PCIE_PIPE_P2>, + <&infracfg CLK_INFRA_PCIE_GFMUX_TL_P2>, + <&infracfg CLK_INFRA_PCIE_PERI_26M_CK_P2>, + <&infracfg CLK_INFRA_133M_PCIE_CK_P2>; + clock-names = "pl_250m", "tl_26m", "peri_26m", + "top_133m"; + phys = <&xphyu3port0 PHY_TYPE_PCIE>; + phy-names = "pcie-phy"; + + status = "disabled"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &pcie_intc2 0>, + <0 0 0 2 &pcie_intc2 1>, + <0 0 0 3 &pcie_intc2 2>, + <0 0 0 4 &pcie_intc2 3>; + + pcie_intc2: interrupt-controller { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + }; + }; + + pcie3: pcie@11290000 { + compatible = "mediatek,mt7988-pcie", + "mediatek,mt7986-pcie", + "mediatek,mt8192-pcie"; + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + reg = <0 0x11290000 0 0x2000>; + reg-names = "pcie-mac"; + linux,pci-domain = <2>; + interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; + bus-range = <0x00 0xff>; + ranges = <0x82000000 0 0x28200000 0 0x28200000 0 0x07e00000>; + clocks = <&infracfg CLK_INFRA_PCIE_PIPE_P3>, + <&infracfg CLK_INFRA_PCIE_GFMUX_TL_P3>, + <&infracfg CLK_INFRA_PCIE_PERI_26M_CK_P3>, + <&infracfg CLK_INFRA_133M_PCIE_CK_P3>; + clock-names = "pl_250m", "tl_26m", "peri_26m", + "top_133m"; + use-dedicated-phy; + + status = "disabled"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &pcie_intc3 0>, + <0 0 0 2 &pcie_intc3 1>, + <0 0 0 3 &pcie_intc3 2>, + <0 0 0 4 &pcie_intc3 3>; + pcie_intc3: interrupt-controller { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + }; + }; + + pcie0: pcie@11300000 { + compatible = "mediatek,mt7988-pcie", + "mediatek,mt7986-pcie", + "mediatek,mt8192-pcie"; + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + reg = <0 0x11300000 0 0x2000>; + reg-names = "pcie-mac"; + linux,pci-domain = <0>; + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; + bus-range = <0x00 0xff>; + ranges = <0x82000000 0 0x30200000 0 0x30200000 0 0x07e00000>; + clocks = <&infracfg CLK_INFRA_PCIE_PIPE_P0>, + <&infracfg CLK_INFRA_PCIE_GFMUX_TL_P0>, + <&infracfg CLK_INFRA_PCIE_PERI_26M_CK_P0>, + <&infracfg CLK_INFRA_133M_PCIE_CK_P0>; + clock-names = "pl_250m", "tl_26m", "peri_26m", + "top_133m"; + use-dedicated-phy; + + status = "disabled"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &pcie_intc0 0>, + <0 0 0 2 &pcie_intc0 1>, + <0 0 0 3 &pcie_intc0 2>, + <0 0 0 4 &pcie_intc0 3>; + pcie_intc0: interrupt-controller { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + }; + }; + + pcie1: pcie@11310000 { + compatible = "mediatek,mt7988-pcie", + "mediatek,mt7986-pcie", + "mediatek,mt8192-pcie"; + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + reg = <0 0x11310000 0 0x2000>; + reg-names = "pcie-mac"; + linux,pci-domain = <1>; + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; + bus-range = <0x00 0xff>; + ranges = <0x82000000 0 0x38200000 0 0x38200000 0 0x07e00000>; + clocks = <&infracfg CLK_INFRA_PCIE_PIPE_P1>, + <&infracfg CLK_INFRA_PCIE_GFMUX_TL_P1>, + <&infracfg CLK_INFRA_PCIE_PERI_26M_CK_P1>, + <&infracfg CLK_INFRA_133M_PCIE_CK_P1>; + clock-names = "pl_250m", "tl_26m", "peri_26m", + "top_133m"; + use-dedicated-phy; + + status = "disabled"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &pcie_intc1 0>, + <0 0 0 2 &pcie_intc1 1>, + <0 0 0 3 &pcie_intc1 2>, + <0 0 0 4 &pcie_intc1 3>; + pcie_intc1: interrupt-controller { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + }; + }; + usbtphy: usb-phy@11c50000 { compatible = "mediatek,mt7988", "mediatek,generic-tphy-v2"; @@ -215,6 +361,22 @@ }; }; + xphy: xphy@11e10000 { + compatible = "mediatek,mt7988", "mediatek,xsphy"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "disabled"; + + xphyu3port0: usb-phy@11e13000 { + reg = <0 0x11e13400 0 0x500>; + clocks = <&dummy_clk>; + clock-names = "ref"; + #phy-cells = <1>; + status = "okay"; + }; + }; + xfi_pextp0: syscon@11f20000 { compatible = "mediatek,mt7988-xfi_pextp_0", "syscon"; reg = <0 0x11f20000 0 0x10000>; @@ -425,11 +587,11 @@ #reset-cells = <1>; }; - eth: ethernet@15100000 { + eth0: ethernet@15110100 { compatible = "mediatek,mt7988-eth", "syscon"; reg = <0 0x15100000 0 0x20000>; + mediatek,gmac-id = <0>; mediatek,ethsys = <ðdma>; - mediatek,sgmiisys = <&sgmiisys0>; mediatek,usxgmiisys = <&usxgmiisys0>; mediatek,xfi_pextp = <&xfi_pextp0>; mediatek,xfi_pll = <&xfi_pll>; @@ -442,4 +604,42 @@ mediatek,mcm; status = "disabled"; }; + + eth1: ethernet@15110200 { + compatible = "mediatek,mt7988-eth", "syscon"; + reg = <0 0x15100000 0 0x20000>; + mediatek,gmac-id = <1>; + mediatek,ethsys = <ðdma>; + mediatek,sgmiisys = <&sgmiisys1>; + mediatek,usxgmiisys = <&usxgmiisys1>; + mediatek,xfi_pextp = <&xfi_pextp1>; + mediatek,xfi_pll = <&xfi_pll>; + mediatek,infracfg = <&topmisc>; + mediatek,toprgu = <&watchdog>; + resets = <ðdma ETHDMA_FE_RST>; + reset-names = "fe"; + #address-cells = <1>; + #size-cells = <0>; + mediatek,mcm; + status = "disabled"; + }; + + eth2: ethernet@15110300 { + compatible = "mediatek,mt7988-eth", "syscon"; + reg = <0 0x15100000 0 0x20000>; + mediatek,gmac-id = <2>; + mediatek,ethsys = <ðdma>; + mediatek,sgmiisys = <&sgmiisys0>; + mediatek,usxgmiisys = <&usxgmiisys0>; + mediatek,xfi_pextp = <&xfi_pextp0>; + mediatek,xfi_pll = <&xfi_pll>; + mediatek,infracfg = <&topmisc>; + mediatek,toprgu = <&watchdog>; + resets = <ðdma ETHDMA_FE_RST>; + reset-names = "fe"; + #address-cells = <1>; + #size-cells = <0>; + mediatek,mcm; + status = "disabled"; + }; }; diff --git a/arch/arm/dts/nuvoton-npcm845-evb.dts b/arch/arm/dts/nuvoton-npcm845-evb.dts index 0d3aaa0fffe..1535defe38f 100644 --- a/arch/arm/dts/nuvoton-npcm845-evb.dts +++ b/arch/arm/dts/nuvoton-npcm845-evb.dts @@ -190,6 +190,7 @@ snps,mdio-gpio = <&gpio2 28 GPIO_ACTIVE_HIGH>; /* gpio92 */ snps,reset-active-low; snps,reset-delays-us = <0 10000 1000000>; + snps,bitbang-delay = <1>; snps,reset-gpio = <&gpio2 29 GPIO_ACTIVE_LOW>; /* gpio93 */ status = "okay"; }; diff --git a/arch/arm/dts/qcs9100-ride-r3-u-boot.dtsi b/arch/arm/dts/qcs9100-ride-r3-u-boot.dtsi new file mode 100644 index 00000000000..5905dfad18f --- /dev/null +++ b/arch/arm/dts/qcs9100-ride-r3-u-boot.dtsi @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025, Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/ { + /* Will be removed when bootloader updates later */ + memory@80000000 { + device_type = "memory"; + reg = <0x0 0x80000000 0x0 0x3ee00000>, + <0x0 0xc0000000 0x0 0x04d00000>, + <0xd 0x00000000 0x2 0x54100000>, + <0xa 0x80000000 0x1 0x52d00000>, + <0x9 0x00000000 0x1 0x80000000>, + <0x1 0x00000000 0x2 0xf7500000>, + <0x0 0xd0000000 0x0 0x00100000>, + <0x0 0xd3500000 0x0 0x07c00000>, + <0x0 0xdb300000 0x0 0x24d00000>; + }; +}; diff --git a/arch/arm/dts/qemu-arm64.dts b/arch/arm/dts/qemu-arm64.dts index 096b3910728..95fcf53ed74 100644 --- a/arch/arm/dts/qemu-arm64.dts +++ b/arch/arm/dts/qemu-arm64.dts @@ -7,5 +7,9 @@ /dts-v1/; +#if defined(CONFIG_SYSINFO_SMBIOS) && !defined(QFW_SMBIOS) +#include "smbios_generic.dtsi" +#endif + / { }; diff --git a/arch/arm/dts/r8a774a1-u-boot.dtsi b/arch/arm/dts/r8a774a1-u-boot.dtsi index 3530eeb2718..bd91a963cd6 100644 --- a/arch/arm/dts/r8a774a1-u-boot.dtsi +++ b/arch/arm/dts/r8a774a1-u-boot.dtsi @@ -5,8 +5,4 @@ * Copyright (C) 2021 Renesas Electronics Corporation */ -#include "r8a779x-u-boot.dtsi" - -&extalr_clk { - bootph-all; -}; +#include "r8a779x-rcar64-u-boot.dtsi" diff --git a/arch/arm/dts/r8a774b1-u-boot.dtsi b/arch/arm/dts/r8a774b1-u-boot.dtsi index 07aeabc46b4..38a82f065c0 100644 --- a/arch/arm/dts/r8a774b1-u-boot.dtsi +++ b/arch/arm/dts/r8a774b1-u-boot.dtsi @@ -5,8 +5,4 @@ * Copyright (C) 2021 Renesas Electronics Corp. */ -#include "r8a779x-u-boot.dtsi" - -&extalr_clk { - bootph-all; -}; +#include "r8a779x-rcar64-u-boot.dtsi" diff --git a/arch/arm/dts/r8a774e1-u-boot.dtsi b/arch/arm/dts/r8a774e1-u-boot.dtsi index 2202731ccb3..f314b2b0cf8 100644 --- a/arch/arm/dts/r8a774e1-u-boot.dtsi +++ b/arch/arm/dts/r8a774e1-u-boot.dtsi @@ -5,8 +5,4 @@ * Copyright (C) 2020 Renesas Electronics Corp. */ -#include "r8a779x-u-boot.dtsi" - -&extalr_clk { - bootph-all; -}; +#include "r8a779x-rcar64-u-boot.dtsi" diff --git a/arch/arm/dts/r8a77951-u-boot.dtsi b/arch/arm/dts/r8a77951-u-boot.dtsi index c16c5116592..768d633ded0 100644 --- a/arch/arm/dts/r8a77951-u-boot.dtsi +++ b/arch/arm/dts/r8a77951-u-boot.dtsi @@ -5,11 +5,7 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ -#include "r8a779x-u-boot.dtsi" - -&extalr_clk { - bootph-all; -}; +#include "r8a779x-rcar64-u-boot.dtsi" / { soc { diff --git a/arch/arm/dts/r8a77960-u-boot.dtsi b/arch/arm/dts/r8a77960-u-boot.dtsi index 2245be2aa76..db062f8e8c7 100644 --- a/arch/arm/dts/r8a77960-u-boot.dtsi +++ b/arch/arm/dts/r8a77960-u-boot.dtsi @@ -5,11 +5,7 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ -#include "r8a779x-u-boot.dtsi" - -&extalr_clk { - bootph-all; -}; +#include "r8a779x-rcar64-u-boot.dtsi" / { soc { diff --git a/arch/arm/dts/r8a77965-u-boot.dtsi b/arch/arm/dts/r8a77965-u-boot.dtsi index f39acc237d3..d67e94e318b 100644 --- a/arch/arm/dts/r8a77965-u-boot.dtsi +++ b/arch/arm/dts/r8a77965-u-boot.dtsi @@ -5,11 +5,7 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ -#include "r8a779x-u-boot.dtsi" - -&extalr_clk { - bootph-all; -}; +#include "r8a779x-rcar64-u-boot.dtsi" / { soc { diff --git a/arch/arm/dts/r8a77970-u-boot.dtsi b/arch/arm/dts/r8a77970-u-boot.dtsi index 7900c641ba1..8dfa56c2f13 100644 --- a/arch/arm/dts/r8a77970-u-boot.dtsi +++ b/arch/arm/dts/r8a77970-u-boot.dtsi @@ -5,11 +5,7 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ -#include "r8a779x-u-boot.dtsi" - -&extalr_clk { - bootph-all; -}; +#include "r8a779x-rcar64-u-boot.dtsi" / { soc { diff --git a/arch/arm/dts/r8a77980-u-boot.dtsi b/arch/arm/dts/r8a77980-u-boot.dtsi index aa7e058c585..088839907c2 100644 --- a/arch/arm/dts/r8a77980-u-boot.dtsi +++ b/arch/arm/dts/r8a77980-u-boot.dtsi @@ -5,11 +5,7 @@ * Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com> */ -#include "r8a779x-u-boot.dtsi" - -&extalr_clk { - bootph-all; -}; +#include "r8a779x-rcar64-u-boot.dtsi" / { soc { diff --git a/arch/arm/dts/r8a779a0-u-boot.dtsi b/arch/arm/dts/r8a779a0-u-boot.dtsi index 2b6d6ef05dc..f506a666518 100644 --- a/arch/arm/dts/r8a779a0-u-boot.dtsi +++ b/arch/arm/dts/r8a779a0-u-boot.dtsi @@ -5,7 +5,7 @@ * Copyright (C) 2020 Renesas Electronics Corp. */ -#include "r8a779x-u-boot.dtsi" +#include "r8a779x-rcar64-u-boot.dtsi" / { soc { @@ -19,7 +19,3 @@ }; }; }; - -&extalr_clk { - bootph-all; -}; diff --git a/arch/arm/dts/r8a779f0-u-boot.dtsi b/arch/arm/dts/r8a779f0-u-boot.dtsi index 0f98c09fc52..08d32fef2b9 100644 --- a/arch/arm/dts/r8a779f0-u-boot.dtsi +++ b/arch/arm/dts/r8a779f0-u-boot.dtsi @@ -5,7 +5,7 @@ * Copyright (C) 2021 Renesas Electronics Corp. */ -#include "r8a779x-u-boot.dtsi" +#include "r8a779x-rcar64-u-boot.dtsi" / { soc { @@ -22,7 +22,3 @@ }; }; }; - -&extalr_clk { - bootph-all; -}; diff --git a/arch/arm/dts/r8a779g0-u-boot.dtsi b/arch/arm/dts/r8a779g0-u-boot.dtsi index 2e731b628b3..10051c9dbfe 100644 --- a/arch/arm/dts/r8a779g0-u-boot.dtsi +++ b/arch/arm/dts/r8a779g0-u-boot.dtsi @@ -5,7 +5,7 @@ * Copyright (C) 2021 Renesas Electronics Corp. */ -#include "r8a779x-u-boot.dtsi" +#include "r8a779x-rcar64-u-boot.dtsi" / { binman: binman { @@ -139,10 +139,6 @@ bootph-all; }; -&extalr_clk { - bootph-all; -}; - &hscif0 { bootph-all; }; diff --git a/arch/arm/dts/r8a779x-rcar64-u-boot.dtsi b/arch/arm/dts/r8a779x-rcar64-u-boot.dtsi new file mode 100644 index 00000000000..b59cc7deca7 --- /dev/null +++ b/arch/arm/dts/r8a779x-rcar64-u-boot.dtsi @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source extras for U-Boot on R-Car 64bit SoC + * + * Copyright (C) 2024 Marek Vasut <marek.vasut+renesas@mailbox.org> + */ + +#include "r8a779x-u-boot.dtsi" + +&extalr_clk { + bootph-all; +}; diff --git a/arch/arm/dts/rk3066a-mk808.dts b/arch/arm/dts/rk3066a-mk808.dts deleted file mode 100644 index 06790f05b39..00000000000 --- a/arch/arm/dts/rk3066a-mk808.dts +++ /dev/null @@ -1,241 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2016 PaweÅ‚ Jarosz <paweljarosz3691@gmail.com> - */ - -/dts-v1/; -#include <dt-bindings/input/input.h> -#include "rk3066a.dtsi" - -/ { - model = "Rikomagic MK808"; - compatible = "rikomagic,mk808", "rockchip,rk3066a"; - - aliases { - mmc0 = &mmc0; - mmc1 = &mmc1; - }; - - chosen { - stdout-path = "serial2:115200n8"; - }; - - memory@60000000 { - reg = <0x60000000 0x40000000>; - device_type = "memory"; - }; - - adc-keys { - compatible = "adc-keys"; - io-channels = <&saradc 1>; - io-channel-names = "buttons"; - keyup-threshold-microvolt = <2500000>; - poll-interval = <100>; - - button-recovery { - label = "recovery"; - linux,code = <KEY_VENDOR>; - press-threshold-microvolt = <0>; - }; - }; - - gpio-leds { - compatible = "gpio-leds"; - - blue_led: led-0 { - label = "mk808:blue:power"; - gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>; - default-state = "off"; - linux,default-trigger = "default-on"; - }; - }; - - hdmi_con { - compatible = "hdmi-connector"; - type = "c"; - - port { - hdmi_con_in: endpoint { - remote-endpoint = <&hdmi_out_con>; - }; - }; - }; - - vcc_2v5: vcc-2v5 { - compatible = "regulator-fixed"; - regulator-name = "vcc_2v5"; - regulator-min-microvolt = <2500000>; - regulator-max-microvolt = <2500000>; - }; - - vcc_io: vcc-io { - compatible = "regulator-fixed"; - regulator-name = "vcc_io"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - vcc_host: usb-host-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&host_drv>; - pinctrl-names = "default"; - regulator-always-on; - regulator-name = "host-pwr"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - startup-delay-us = <100000>; - vin-supply = <&vcc_io>; - }; - - vcc_otg: usb-otg-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&otg_drv>; - pinctrl-names = "default"; - regulator-always-on; - regulator-name = "vcc_otg"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - startup-delay-us = <100000>; - vin-supply = <&vcc_io>; - }; - - vcc_sd: sdmmc-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>; - pinctrl-0 = <&sdmmc_pwr>; - pinctrl-names = "default"; - regulator-name = "vcc_sd"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - startup-delay-us = <100000>; - vin-supply = <&vcc_io>; - }; - - vcc_wifi: sdio-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&wifi_pwr>; - pinctrl-names = "default"; - regulator-name = "vcc_wifi"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - startup-delay-us = <100000>; - vin-supply = <&vcc_io>; - }; -}; - -&hdmi { - status = "okay"; -}; - -&hdmi_in_vop1 { - status = "disabled"; -}; - -&hdmi_out { - hdmi_out_con: endpoint { - remote-endpoint = <&hdmi_con_in>; - }; -}; - -&mmc0 { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - vmmc-supply = <&vcc_sd>; - status = "okay"; -}; - -&mmc1 { - bus-width = <4>; - non-removable; - pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_bus4>; - pinctrl-names = "default"; - vmmc-supply = <&vcc_wifi>; - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; - - brcmf: wifi@1 { - compatible = "brcm,bcm4329-fmac"; - reg = <1>; - }; -}; - -&nfc { - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; - - nand@0 { - reg = <0>; - label = "rk-nand"; - nand-bus-width = <8>; - nand-ecc-mode = "hw"; - nand-ecc-step-size = <1024>; - nand-ecc-strength = <40>; - nand-is-boot-medium; - rockchip,boot-blks = <8>; - rockchip,boot-ecc-strength = <24>; - }; -}; - -&pinctrl { - usb-host { - host_drv: host-drv { - rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_default>; - }; - }; - - usb-otg { - otg_drv: otg-drv { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_default>; - }; - }; - - sdmmc { - sdmmc_pwr: sdmmc-pwr { - rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_default>; - }; - }; - - sdio { - wifi_pwr: wifi-pwr { - rockchip,pins = <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&saradc { - vref-supply = <&vcc_2v5>; - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usb_host { - status = "okay"; -}; - -&usb_otg { - status = "okay"; -}; - -&usbphy { - status = "okay"; -}; - -&vop0 { - status = "okay"; -}; - -&wdt { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3066a-u-boot.dtsi b/arch/arm/dts/rk3066a-u-boot.dtsi index 06f405ca2c5..d99db7853b5 100644 --- a/arch/arm/dts/rk3066a-u-boot.dtsi +++ b/arch/arm/dts/rk3066a-u-boot.dtsi @@ -3,26 +3,6 @@ #include "rockchip-u-boot.dtsi" #include "rk3xxx-u-boot.dtsi" -&gpio0 { - gpio-ranges = <&pinctrl 0 0 32>; -}; - -&gpio1 { - gpio-ranges = <&pinctrl 0 32 32>; -}; - -&gpio2 { - gpio-ranges = <&pinctrl 0 64 32>; -}; - -&gpio3 { - gpio-ranges = <&pinctrl 0 96 32>; -}; - -&gpio4 { - gpio-ranges = <&pinctrl 0 128 32>; -}; - &gpio6 { status = "disabled"; }; diff --git a/arch/arm/dts/rk3066a.dtsi b/arch/arm/dts/rk3066a.dtsi deleted file mode 100644 index de9915d946f..00000000000 --- a/arch/arm/dts/rk3066a.dtsi +++ /dev/null @@ -1,880 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2013 MundoReader S.L. - * Author: Heiko Stuebner <heiko@sntech.de> - */ - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/pinctrl/rockchip.h> -#include <dt-bindings/clock/rk3066a-cru.h> -#include <dt-bindings/power/rk3066-power.h> -#include "rk3xxx.dtsi" - -/ { - compatible = "rockchip,rk3066a"; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - enable-method = "rockchip,rk3066-smp"; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - next-level-cache = <&L2>; - reg = <0x0>; - operating-points = - /* kHz uV */ - <1416000 1300000>, - <1200000 1175000>, - <1008000 1125000>, - <816000 1125000>, - <600000 1100000>, - <504000 1100000>, - <312000 1075000>; - clock-latency = <40000>; - clocks = <&cru ARMCLK>; - }; - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - next-level-cache = <&L2>; - reg = <0x1>; - }; - }; - - display-subsystem { - compatible = "rockchip,display-subsystem"; - ports = <&vop0_out>, <&vop1_out>; - }; - - sram: sram@10080000 { - compatible = "mmio-sram"; - reg = <0x10080000 0x10000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x10080000 0x10000>; - - smp-sram@0 { - compatible = "rockchip,rk3066-smp-sram"; - reg = <0x0 0x50>; - }; - }; - - vop0: vop@1010c000 { - compatible = "rockchip,rk3066-vop"; - reg = <0x1010c000 0x19c>; - interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru ACLK_LCDC0>, - <&cru DCLK_LCDC0>, - <&cru HCLK_LCDC0>; - clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; - power-domains = <&power RK3066_PD_VIO>; - resets = <&cru SRST_LCDC0_AXI>, - <&cru SRST_LCDC0_AHB>, - <&cru SRST_LCDC0_DCLK>; - reset-names = "axi", "ahb", "dclk"; - status = "disabled"; - - vop0_out: port { - #address-cells = <1>; - #size-cells = <0>; - - vop0_out_hdmi: endpoint@0 { - reg = <0>; - remote-endpoint = <&hdmi_in_vop0>; - }; - }; - }; - - vop1: vop@1010e000 { - compatible = "rockchip,rk3066-vop"; - reg = <0x1010e000 0x19c>; - interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru ACLK_LCDC1>, - <&cru DCLK_LCDC1>, - <&cru HCLK_LCDC1>; - clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; - power-domains = <&power RK3066_PD_VIO>; - resets = <&cru SRST_LCDC1_AXI>, - <&cru SRST_LCDC1_AHB>, - <&cru SRST_LCDC1_DCLK>; - reset-names = "axi", "ahb", "dclk"; - status = "disabled"; - - vop1_out: port { - #address-cells = <1>; - #size-cells = <0>; - - vop1_out_hdmi: endpoint@0 { - reg = <0>; - remote-endpoint = <&hdmi_in_vop1>; - }; - }; - }; - - hdmi: hdmi@10116000 { - compatible = "rockchip,rk3066-hdmi"; - reg = <0x10116000 0x2000>; - interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_HDMI>; - clock-names = "hclk"; - pinctrl-names = "default"; - pinctrl-0 = <&hdmii2c_xfer>, <&hdmi_hpd>; - power-domains = <&power RK3066_PD_VIO>; - rockchip,grf = <&grf>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - hdmi_in: port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - hdmi_in_vop0: endpoint@0 { - reg = <0>; - remote-endpoint = <&vop0_out_hdmi>; - }; - - hdmi_in_vop1: endpoint@1 { - reg = <1>; - remote-endpoint = <&vop1_out_hdmi>; - }; - }; - - hdmi_out: port@1 { - reg = <1>; - }; - }; - }; - - i2s0: i2s@10118000 { - compatible = "rockchip,rk3066-i2s"; - reg = <0x10118000 0x2000>; - interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&i2s0_bus>; - clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>; - clock-names = "i2s_clk", "i2s_hclk"; - dmas = <&dmac1_s 4>, <&dmac1_s 5>; - dma-names = "tx", "rx"; - rockchip,playback-channels = <8>; - rockchip,capture-channels = <2>; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - i2s1: i2s@1011a000 { - compatible = "rockchip,rk3066-i2s"; - reg = <0x1011a000 0x2000>; - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&i2s1_bus>; - clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1>; - clock-names = "i2s_clk", "i2s_hclk"; - dmas = <&dmac1_s 6>, <&dmac1_s 7>; - dma-names = "tx", "rx"; - rockchip,playback-channels = <2>; - rockchip,capture-channels = <2>; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - i2s2: i2s@1011c000 { - compatible = "rockchip,rk3066-i2s"; - reg = <0x1011c000 0x2000>; - interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&i2s2_bus>; - clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2>; - clock-names = "i2s_clk", "i2s_hclk"; - dmas = <&dmac1_s 9>, <&dmac1_s 10>; - dma-names = "tx", "rx"; - rockchip,playback-channels = <2>; - rockchip,capture-channels = <2>; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - cru: clock-controller@20000000 { - compatible = "rockchip,rk3066a-cru"; - reg = <0x20000000 0x1000>; - clocks = <&xin24m>; - clock-names = "xin24m"; - rockchip,grf = <&grf>; - #clock-cells = <1>; - #reset-cells = <1>; - assigned-clocks = <&cru PLL_CPLL>, <&cru PLL_GPLL>, - <&cru ACLK_CPU>, <&cru HCLK_CPU>, - <&cru PCLK_CPU>, <&cru ACLK_PERI>, - <&cru HCLK_PERI>, <&cru PCLK_PERI>; - assigned-clock-rates = <400000000>, <594000000>, - <300000000>, <150000000>, - <75000000>, <300000000>, - <150000000>, <75000000>; - }; - - timer2: timer@2000e000 { - compatible = "snps,dw-apb-timer"; - reg = <0x2000e000 0x100>; - interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_TIMER2>, <&cru PCLK_TIMER2>; - clock-names = "timer", "pclk"; - }; - - efuse: efuse@20010000 { - compatible = "rockchip,rk3066a-efuse"; - reg = <0x20010000 0x4000>; - #address-cells = <1>; - #size-cells = <1>; - clocks = <&cru PCLK_EFUSE>; - clock-names = "pclk_efuse"; - - cpu_leakage: cpu_leakage@17 { - reg = <0x17 0x1>; - }; - }; - - timer0: timer@20038000 { - compatible = "snps,dw-apb-timer"; - reg = <0x20038000 0x100>; - interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_TIMER0>, <&cru PCLK_TIMER0>; - clock-names = "timer", "pclk"; - }; - - timer1: timer@2003a000 { - compatible = "snps,dw-apb-timer"; - reg = <0x2003a000 0x100>; - interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_TIMER1>, <&cru PCLK_TIMER1>; - clock-names = "timer", "pclk"; - }; - - tsadc: tsadc@20060000 { - compatible = "rockchip,rk3066-tsadc"; - reg = <0x20060000 0x100>; - clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; - clock-names = "saradc", "apb_pclk"; - interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; - #io-channel-cells = <1>; - resets = <&cru SRST_TSADC>; - reset-names = "saradc-apb"; - status = "disabled"; - }; - - pinctrl: pinctrl { - compatible = "rockchip,rk3066a-pinctrl"; - rockchip,grf = <&grf>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - gpio0: gpio@20034000 { - compatible = "rockchip,gpio-bank"; - reg = <0x20034000 0x100>; - interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO0>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio1: gpio@2003c000 { - compatible = "rockchip,gpio-bank"; - reg = <0x2003c000 0x100>; - interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO1>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio2: gpio@2003e000 { - compatible = "rockchip,gpio-bank"; - reg = <0x2003e000 0x100>; - interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO2>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio3: gpio@20080000 { - compatible = "rockchip,gpio-bank"; - reg = <0x20080000 0x100>; - interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO3>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio4: gpio@20084000 { - compatible = "rockchip,gpio-bank"; - reg = <0x20084000 0x100>; - interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO4>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio6: gpio@2000a000 { - compatible = "rockchip,gpio-bank"; - reg = <0x2000a000 0x100>; - interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO6>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - pcfg_pull_default: pcfg-pull-default { - bias-pull-pin-default; - }; - - pcfg_pull_none: pcfg-pull-none { - bias-disable; - }; - - emac { - emac_xfer: emac-xfer { - rockchip,pins = <1 RK_PC0 2 &pcfg_pull_none>, /* mac_clk */ - <1 RK_PC1 2 &pcfg_pull_none>, /* tx_en */ - <1 RK_PC2 2 &pcfg_pull_none>, /* txd1 */ - <1 RK_PC3 2 &pcfg_pull_none>, /* txd0 */ - <1 RK_PC4 2 &pcfg_pull_none>, /* rx_err */ - <1 RK_PC5 2 &pcfg_pull_none>, /* crs_dvalid */ - <1 RK_PC6 2 &pcfg_pull_none>, /* rxd1 */ - <1 RK_PC7 2 &pcfg_pull_none>; /* rxd0 */ - }; - - emac_mdio: emac-mdio { - rockchip,pins = <1 RK_PD0 2 &pcfg_pull_none>, /* mac_md */ - <1 RK_PD1 2 &pcfg_pull_none>; /* mac_mdclk */ - }; - }; - - emmc { - emmc_clk: emmc-clk { - rockchip,pins = <3 RK_PD7 2 &pcfg_pull_default>; - }; - - emmc_cmd: emmc-cmd { - rockchip,pins = <4 RK_PB1 2 &pcfg_pull_default>; - }; - - emmc_rst: emmc-rst { - rockchip,pins = <4 RK_PB2 2 &pcfg_pull_default>; - }; - - /* - * The data pins are shared between nandc and emmc and - * not accessible through pinctrl. Also they should've - * been already set correctly by firmware, as - * flash/emmc is the boot-device. - */ - }; - - hdmi { - hdmi_hpd: hdmi-hpd { - rockchip,pins = <0 RK_PA0 1 &pcfg_pull_default>; - }; - - hdmii2c_xfer: hdmii2c-xfer { - rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>, - <0 RK_PA2 1 &pcfg_pull_none>; - }; - }; - - i2c0 { - i2c0_xfer: i2c0-xfer { - rockchip,pins = <2 RK_PD4 1 &pcfg_pull_none>, - <2 RK_PD5 1 &pcfg_pull_none>; - }; - }; - - i2c1 { - i2c1_xfer: i2c1-xfer { - rockchip,pins = <2 RK_PD6 1 &pcfg_pull_none>, - <2 RK_PD7 1 &pcfg_pull_none>; - }; - }; - - i2c2 { - i2c2_xfer: i2c2-xfer { - rockchip,pins = <3 RK_PA0 1 &pcfg_pull_none>, - <3 RK_PA1 1 &pcfg_pull_none>; - }; - }; - - i2c3 { - i2c3_xfer: i2c3-xfer { - rockchip,pins = <3 RK_PA2 2 &pcfg_pull_none>, - <3 RK_PA3 2 &pcfg_pull_none>; - }; - }; - - i2c4 { - i2c4_xfer: i2c4-xfer { - rockchip,pins = <3 RK_PA4 1 &pcfg_pull_none>, - <3 RK_PA5 1 &pcfg_pull_none>; - }; - }; - - pwm0 { - pwm0_out: pwm0-out { - rockchip,pins = <0 RK_PA3 1 &pcfg_pull_none>; - }; - }; - - pwm1 { - pwm1_out: pwm1-out { - rockchip,pins = <0 RK_PA4 1 &pcfg_pull_none>; - }; - }; - - pwm2 { - pwm2_out: pwm2-out { - rockchip,pins = <0 RK_PD6 1 &pcfg_pull_none>; - }; - }; - - pwm3 { - pwm3_out: pwm3-out { - rockchip,pins = <0 RK_PD7 1 &pcfg_pull_none>; - }; - }; - - spi0 { - spi0_clk: spi0-clk { - rockchip,pins = <1 RK_PA5 2 &pcfg_pull_default>; - }; - spi0_cs0: spi0-cs0 { - rockchip,pins = <1 RK_PA4 2 &pcfg_pull_default>; - }; - spi0_tx: spi0-tx { - rockchip,pins = <1 RK_PA7 2 &pcfg_pull_default>; - }; - spi0_rx: spi0-rx { - rockchip,pins = <1 RK_PA6 2 &pcfg_pull_default>; - }; - spi0_cs1: spi0-cs1 { - rockchip,pins = <4 RK_PB7 1 &pcfg_pull_default>; - }; - }; - - spi1 { - spi1_clk: spi1-clk { - rockchip,pins = <2 RK_PC3 2 &pcfg_pull_default>; - }; - spi1_cs0: spi1-cs0 { - rockchip,pins = <2 RK_PC4 2 &pcfg_pull_default>; - }; - spi1_rx: spi1-rx { - rockchip,pins = <2 RK_PC6 2 &pcfg_pull_default>; - }; - spi1_tx: spi1-tx { - rockchip,pins = <2 RK_PC5 2 &pcfg_pull_default>; - }; - spi1_cs1: spi1-cs1 { - rockchip,pins = <2 RK_PC7 2 &pcfg_pull_default>; - }; - }; - - uart0 { - uart0_xfer: uart0-xfer { - rockchip,pins = <1 RK_PA0 1 &pcfg_pull_default>, - <1 RK_PA1 1 &pcfg_pull_default>; - }; - - uart0_cts: uart0-cts { - rockchip,pins = <1 RK_PA2 1 &pcfg_pull_default>; - }; - - uart0_rts: uart0-rts { - rockchip,pins = <1 RK_PA3 1 &pcfg_pull_default>; - }; - }; - - uart1 { - uart1_xfer: uart1-xfer { - rockchip,pins = <1 RK_PA4 1 &pcfg_pull_default>, - <1 RK_PA5 1 &pcfg_pull_default>; - }; - - uart1_cts: uart1-cts { - rockchip,pins = <1 RK_PA6 1 &pcfg_pull_default>; - }; - - uart1_rts: uart1-rts { - rockchip,pins = <1 RK_PA7 1 &pcfg_pull_default>; - }; - }; - - uart2 { - uart2_xfer: uart2-xfer { - rockchip,pins = <1 RK_PB0 1 &pcfg_pull_default>, - <1 RK_PB1 1 &pcfg_pull_default>; - }; - /* no rts / cts for uart2 */ - }; - - uart3 { - uart3_xfer: uart3-xfer { - rockchip,pins = <3 RK_PD3 1 &pcfg_pull_default>, - <3 RK_PD4 1 &pcfg_pull_default>; - }; - - uart3_cts: uart3-cts { - rockchip,pins = <3 RK_PD5 1 &pcfg_pull_default>; - }; - - uart3_rts: uart3-rts { - rockchip,pins = <3 RK_PD6 1 &pcfg_pull_default>; - }; - }; - - sd0 { - sd0_clk: sd0-clk { - rockchip,pins = <3 RK_PB0 1 &pcfg_pull_default>; - }; - - sd0_cmd: sd0-cmd { - rockchip,pins = <3 RK_PB1 1 &pcfg_pull_default>; - }; - - sd0_cd: sd0-cd { - rockchip,pins = <3 RK_PB6 1 &pcfg_pull_default>; - }; - - sd0_wp: sd0-wp { - rockchip,pins = <3 RK_PB7 1 &pcfg_pull_default>; - }; - - sd0_bus1: sd0-bus-width1 { - rockchip,pins = <3 RK_PB2 1 &pcfg_pull_default>; - }; - - sd0_bus4: sd0-bus-width4 { - rockchip,pins = <3 RK_PB2 1 &pcfg_pull_default>, - <3 RK_PB3 1 &pcfg_pull_default>, - <3 RK_PB4 1 &pcfg_pull_default>, - <3 RK_PB5 1 &pcfg_pull_default>; - }; - }; - - sd1 { - sd1_clk: sd1-clk { - rockchip,pins = <3 RK_PC5 1 &pcfg_pull_default>; - }; - - sd1_cmd: sd1-cmd { - rockchip,pins = <3 RK_PC0 1 &pcfg_pull_default>; - }; - - sd1_cd: sd1-cd { - rockchip,pins = <3 RK_PC6 1 &pcfg_pull_default>; - }; - - sd1_wp: sd1-wp { - rockchip,pins = <3 RK_PC7 1 &pcfg_pull_default>; - }; - - sd1_bus1: sd1-bus-width1 { - rockchip,pins = <3 RK_PC1 1 &pcfg_pull_default>; - }; - - sd1_bus4: sd1-bus-width4 { - rockchip,pins = <3 RK_PC1 1 &pcfg_pull_default>, - <3 RK_PC2 1 &pcfg_pull_default>, - <3 RK_PC3 1 &pcfg_pull_default>, - <3 RK_PC4 1 &pcfg_pull_default>; - }; - }; - - i2s0 { - i2s0_bus: i2s0-bus { - rockchip,pins = <0 RK_PA7 1 &pcfg_pull_default>, - <0 RK_PB0 1 &pcfg_pull_default>, - <0 RK_PB1 1 &pcfg_pull_default>, - <0 RK_PB2 1 &pcfg_pull_default>, - <0 RK_PB3 1 &pcfg_pull_default>, - <0 RK_PB4 1 &pcfg_pull_default>, - <0 RK_PB5 1 &pcfg_pull_default>, - <0 RK_PB6 1 &pcfg_pull_default>, - <0 RK_PB7 1 &pcfg_pull_default>; - }; - }; - - i2s1 { - i2s1_bus: i2s1-bus { - rockchip,pins = <0 RK_PC0 1 &pcfg_pull_default>, - <0 RK_PC1 1 &pcfg_pull_default>, - <0 RK_PC2 1 &pcfg_pull_default>, - <0 RK_PC3 1 &pcfg_pull_default>, - <0 RK_PC4 1 &pcfg_pull_default>, - <0 RK_PC5 1 &pcfg_pull_default>; - }; - }; - - i2s2 { - i2s2_bus: i2s2-bus { - rockchip,pins = <0 RK_PD0 1 &pcfg_pull_default>, - <0 RK_PD1 1 &pcfg_pull_default>, - <0 RK_PD2 1 &pcfg_pull_default>, - <0 RK_PD3 1 &pcfg_pull_default>, - <0 RK_PD4 1 &pcfg_pull_default>, - <0 RK_PD5 1 &pcfg_pull_default>; - }; - }; - }; -}; - -&gpu { - compatible = "rockchip,rk3066-mali", "arm,mali-400"; - interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "gp", - "gpmmu", - "pp0", - "ppmmu0", - "pp1", - "ppmmu1", - "pp2", - "ppmmu2", - "pp3", - "ppmmu3"; - power-domains = <&power RK3066_PD_GPU>; -}; - -&grf { - compatible = "rockchip,rk3066-grf", "syscon", "simple-mfd"; - - usbphy: usbphy { - compatible = "rockchip,rk3066a-usb-phy"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - - usbphy0: usb-phy@17c { - reg = <0x17c>; - clocks = <&cru SCLK_OTGPHY0>; - clock-names = "phyclk"; - #clock-cells = <0>; - #phy-cells = <0>; - }; - - usbphy1: usb-phy@188 { - reg = <0x188>; - clocks = <&cru SCLK_OTGPHY1>; - clock-names = "phyclk"; - #clock-cells = <0>; - #phy-cells = <0>; - }; - }; -}; - -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_xfer>; -}; - -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_xfer>; -}; - -&i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_xfer>; -}; - -&i2c3 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c3_xfer>; -}; - -&i2c4 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c4_xfer>; -}; - -&mmc0 { - clock-frequency = <50000000>; - dmas = <&dmac2 1>; - dma-names = "rx-tx"; - max-frequency = <50000000>; - pinctrl-names = "default"; - pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus4>; -}; - -&mmc1 { - dmas = <&dmac2 3>; - dma-names = "rx-tx"; - pinctrl-names = "default"; - pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_cd &sd1_bus4>; -}; - -&emmc { - dmas = <&dmac2 4>; - dma-names = "rx-tx"; -}; - -&pmu { - power: power-controller { - compatible = "rockchip,rk3066-power-controller"; - #power-domain-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - - power-domain@RK3066_PD_VIO { - reg = <RK3066_PD_VIO>; - clocks = <&cru ACLK_LCDC0>, - <&cru ACLK_LCDC1>, - <&cru DCLK_LCDC0>, - <&cru DCLK_LCDC1>, - <&cru HCLK_LCDC0>, - <&cru HCLK_LCDC1>, - <&cru SCLK_CIF1>, - <&cru ACLK_CIF1>, - <&cru HCLK_CIF1>, - <&cru SCLK_CIF0>, - <&cru ACLK_CIF0>, - <&cru HCLK_CIF0>, - <&cru HCLK_HDMI>, - <&cru ACLK_IPP>, - <&cru HCLK_IPP>, - <&cru ACLK_RGA>, - <&cru HCLK_RGA>; - pm_qos = <&qos_lcdc0>, - <&qos_lcdc1>, - <&qos_cif0>, - <&qos_cif1>, - <&qos_ipp>, - <&qos_rga>; - #power-domain-cells = <0>; - }; - - power-domain@RK3066_PD_VIDEO { - reg = <RK3066_PD_VIDEO>; - clocks = <&cru ACLK_VDPU>, - <&cru ACLK_VEPU>, - <&cru HCLK_VDPU>, - <&cru HCLK_VEPU>; - pm_qos = <&qos_vpu>; - #power-domain-cells = <0>; - }; - - power-domain@RK3066_PD_GPU { - reg = <RK3066_PD_GPU>; - clocks = <&cru ACLK_GPU>; - pm_qos = <&qos_gpu>; - #power-domain-cells = <0>; - }; - }; -}; - -&pwm0 { - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_out>; -}; - -&pwm1 { - pinctrl-names = "default"; - pinctrl-0 = <&pwm1_out>; -}; - -&pwm2 { - pinctrl-names = "default"; - pinctrl-0 = <&pwm2_out>; -}; - -&pwm3 { - pinctrl-names = "default"; - pinctrl-0 = <&pwm3_out>; -}; - -&spi0 { - pinctrl-names = "default"; - pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>; -}; - -&spi1 { - pinctrl-names = "default"; - pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>; -}; - -&uart0 { - compatible = "rockchip,rk3066-uart", "snps,dw-apb-uart"; - dmas = <&dmac1_s 0>, <&dmac1_s 1>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer>; -}; - -&uart1 { - compatible = "rockchip,rk3066-uart", "snps,dw-apb-uart"; - dmas = <&dmac1_s 2>, <&dmac1_s 3>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&uart1_xfer>; -}; - -&uart2 { - compatible = "rockchip,rk3066-uart", "snps,dw-apb-uart"; - dmas = <&dmac2 6>, <&dmac2 7>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&uart2_xfer>; -}; - -&uart3 { - compatible = "rockchip,rk3066-uart", "snps,dw-apb-uart"; - dmas = <&dmac2 8>, <&dmac2 9>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&uart3_xfer>; -}; - -&vpu { - power-domains = <&power RK3066_PD_VIDEO>; -}; - -&wdt { - compatible = "rockchip,rk3066-wdt", "snps,dw-wdt"; -}; - -&emac { - compatible = "rockchip,rk3066-emac"; -}; diff --git a/arch/arm/dts/rk3188-radxarock.dts b/arch/arm/dts/rk3188-radxarock.dts deleted file mode 100644 index 118deacd38c..00000000000 --- a/arch/arm/dts/rk3188-radxarock.dts +++ /dev/null @@ -1,389 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de> - */ - -/dts-v1/; -#include <dt-bindings/input/input.h> -#include "rk3188.dtsi" - -/ { - model = "Radxa Rock"; - compatible = "radxa,rock", "rockchip,rk3188"; - - aliases { - mmc0 = &mmc0; - }; - - memory@60000000 { - device_type = "memory"; - reg = <0x60000000 0x80000000>; - }; - - gpio-keys { - compatible = "gpio-keys"; - autorepeat; - - key-power { - gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; - linux,code = <KEY_POWER>; - label = "GPIO Key Power"; - linux,input-type = <1>; - wakeup-source; - debounce-interval = <100>; - }; - }; - - gpio-leds { - compatible = "gpio-leds"; - - green_led: led-0 { - label = "rock:green:user1"; - gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_LOW>; - default-state = "off"; - }; - - blue_led: led-1 { - label = "rock:blue:user2"; - gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>; - default-state = "off"; - }; - - sleep_led: led-2 { - label = "rock:red:power"; - gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; - default-state = "off"; - }; - }; - - sound { - compatible = "simple-audio-card"; - simple-audio-card,name = "SPDIF"; - - simple-audio-card,dai-link@1 { /* S/PDIF - S/PDIF */ - cpu { sound-dai = <&spdif>; }; - codec { sound-dai = <&spdif_out>; }; - }; - }; - - spdif_out: spdif-out { - compatible = "linux,spdif-dit"; - #sound-dai-cells = <0>; - }; - - ir_recv: ir-receiver { - compatible = "gpio-ir-receiver"; - gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&ir_recv_pin>; - }; - - vcc_otg: usb-otg-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio2 RK_PD7 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&otg_vbus_drv>; - regulator-name = "otg-vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - regulator-boot-on; - }; - - vcc_sd0: sdmmc-regulator { - compatible = "regulator-fixed"; - regulator-name = "sdmmc-supply"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_pwr>; - startup-delay-us = <100000>; - vin-supply = <&vcc_io>; - }; - - vcc_host: usb-host-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&host_vbus_drv>; - regulator-name = "host-pwr"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - regulator-boot-on; - }; - - vsys: vsys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vsys"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-boot-on; - }; -}; - -&emac { - phy = <&phy0>; - phy-supply = <&vcc_rmii>; - pinctrl-names = "default"; - pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>; - status = "okay"; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - - phy0: ethernet-phy@0 { - reg = <0>; - interrupt-parent = <&gpio3>; - interrupts = <RK_PD2 IRQ_TYPE_LEVEL_LOW>; - }; - }; -}; - -&cpu0 { - cpu-supply = <&vdd_arm>; -}; - -&cpu1 { - cpu-supply = <&vdd_arm>; -}; - -&cpu2 { - cpu-supply = <&vdd_arm>; -}; - -&cpu3 { - cpu-supply = <&vdd_arm>; -}; - -&gpu { - status = "okay"; -}; - -&i2c1 { - status = "okay"; - clock-frequency = <400000>; - - rtc@51 { - compatible = "haoyu,hym8563"; - reg = <0x51>; - interrupt-parent = <&gpio0>; - interrupts = <RK_PB5 IRQ_TYPE_EDGE_FALLING>; - pinctrl-names = "default"; - pinctrl-0 = <&rtc_int>; - #clock-cells = <0>; - clock-output-names = "xin32k"; - }; - - act8846: act8846@5a { - compatible = "active-semi,act8846"; - reg = <0x5a>; - status = "okay"; - system-power-controller; - - pinctrl-names = "default"; - pinctrl-0 = <&act8846_dvs0_ctl>; - - vp1-supply = <&vsys>; - vp2-supply = <&vsys>; - vp3-supply = <&vsys>; - vp4-supply = <&vsys>; - inl1-supply = <&vcc_io>; - inl2-supply = <&vsys>; - inl3-supply = <&vsys>; - - regulators { - vcc_ddr: REG1 { - regulator-name = "VCC_DDR"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-always-on; - }; - - vdd_log: REG2 { - regulator-name = "VDD_LOG"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - }; - - vdd_arm: REG3 { - regulator-name = "VDD_ARM"; - regulator-min-microvolt = <875000>; - regulator-max-microvolt = <1350000>; - regulator-always-on; - }; - - vcc_io: REG4 { - regulator-name = "VCC_IO"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vdd_10: REG5 { - regulator-name = "VDD_10"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - }; - - vdd_hdmi: REG6 { - regulator-name = "VDD_HDMI"; - regulator-min-microvolt = <2500000>; - regulator-max-microvolt = <2500000>; - regulator-always-on; - }; - - vcc18: REG7 { - regulator-name = "VCC_18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - vcca_33: REG8 { - regulator-name = "VCCA_33"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vcc_rmii: REG9 { - regulator-name = "VCC_RMII"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - vccio_wl: REG10 { - regulator-name = "VCCIO_WL"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vcc_18: REG11 { - regulator-name = "VCC18_IO"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - vcc28: REG12 { - regulator-name = "VCC_28"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-always-on; - }; - }; - }; -}; - -&mmc0 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>; - vmmc-supply = <&vcc_sd0>; - - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - disable-wp; -}; - -&pwm1 { - status = "okay"; -}; - -&pwm2 { - status = "okay"; -}; - -&pwm3 { - status = "okay"; -}; - -&pinctrl { - pcfg_output_low: pcfg-output-low { - output-low; - }; - - act8846 { - act8846_dvs0_ctl: act8846-dvs0-ctl { - rockchip,pins = <3 RK_PD3 RK_FUNC_GPIO &pcfg_output_low>; - }; - }; - - hym8563 { - rtc_int: rtc-int { - rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - lan8720a { - phy_int: phy-int { - rockchip,pins = <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - ir-receiver { - ir_recv_pin: ir-recv-pin { - rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - sd0 { - sdmmc_pwr: sdmmc-pwr { - rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb { - host_vbus_drv: host-vbus-drv { - rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - otg_vbus_drv: otg-vbus-drv { - rockchip,pins = <2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&spdif { - status = "okay"; -}; - -&uart0 { - status = "okay"; -}; - -&uart1 { - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&uart3 { - status = "okay"; -}; - -&usbphy { - status = "okay"; -}; - -&usb_host { - status = "okay"; -}; - -&usb_otg { - status = "okay"; -}; - -&wdt { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3188-u-boot.dtsi b/arch/arm/dts/rk3188-u-boot.dtsi index 176f9e65c26..8f2849dda24 100644 --- a/arch/arm/dts/rk3188-u-boot.dtsi +++ b/arch/arm/dts/rk3188-u-boot.dtsi @@ -6,25 +6,8 @@ #include "rockchip-u-boot.dtsi" #include "rk3xxx-u-boot.dtsi" -&global_timer { - status = "okay"; -}; - &gpio0 { compatible = "rockchip,gpio-bank"; - gpio-ranges = <&pinctrl 0 0 32>; -}; - -&gpio1 { - gpio-ranges = <&pinctrl 0 32 32>; -}; - -&gpio2 { - gpio-ranges = <&pinctrl 0 64 32>; -}; - -&gpio3 { - gpio-ranges = <&pinctrl 0 96 32>; }; &pmu { diff --git a/arch/arm/dts/rk3188.dtsi b/arch/arm/dts/rk3188.dtsi deleted file mode 100644 index 44b54af0bbf..00000000000 --- a/arch/arm/dts/rk3188.dtsi +++ /dev/null @@ -1,815 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2013 MundoReader S.L. - * Author: Heiko Stuebner <heiko@sntech.de> - */ - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/pinctrl/rockchip.h> -#include <dt-bindings/clock/rk3188-cru.h> -#include <dt-bindings/power/rk3188-power.h> -#include "rk3xxx.dtsi" - -/ { - compatible = "rockchip,rk3188"; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - enable-method = "rockchip,rk3066-smp"; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - next-level-cache = <&L2>; - reg = <0x0>; - clock-latency = <40000>; - clocks = <&cru ARMCLK>; - operating-points-v2 = <&cpu0_opp_table>; - resets = <&cru SRST_CORE0>; - }; - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - next-level-cache = <&L2>; - reg = <0x1>; - operating-points-v2 = <&cpu0_opp_table>; - resets = <&cru SRST_CORE1>; - }; - cpu2: cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - next-level-cache = <&L2>; - reg = <0x2>; - operating-points-v2 = <&cpu0_opp_table>; - resets = <&cru SRST_CORE2>; - }; - cpu3: cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - next-level-cache = <&L2>; - reg = <0x3>; - operating-points-v2 = <&cpu0_opp_table>; - resets = <&cru SRST_CORE3>; - }; - }; - - cpu0_opp_table: opp-table-0 { - compatible = "operating-points-v2"; - opp-shared; - - opp-312000000 { - opp-hz = /bits/ 64 <312000000>; - opp-microvolt = <875000>; - clock-latency-ns = <40000>; - }; - opp-504000000 { - opp-hz = /bits/ 64 <504000000>; - opp-microvolt = <925000>; - }; - opp-600000000 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <950000>; - opp-suspend; - }; - opp-816000000 { - opp-hz = /bits/ 64 <816000000>; - opp-microvolt = <975000>; - }; - opp-1008000000 { - opp-hz = /bits/ 64 <1008000000>; - opp-microvolt = <1075000>; - }; - opp-1200000000 { - opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <1150000>; - }; - opp-1416000000 { - opp-hz = /bits/ 64 <1416000000>; - opp-microvolt = <1250000>; - }; - opp-1608000000 { - opp-hz = /bits/ 64 <1608000000>; - opp-microvolt = <1350000>; - }; - }; - - display-subsystem { - compatible = "rockchip,display-subsystem"; - ports = <&vop0_out>, <&vop1_out>; - }; - - sram: sram@10080000 { - compatible = "mmio-sram"; - reg = <0x10080000 0x8000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x10080000 0x8000>; - - smp-sram@0 { - compatible = "rockchip,rk3066-smp-sram"; - reg = <0x0 0x50>; - }; - }; - - vop0: vop@1010c000 { - compatible = "rockchip,rk3188-vop"; - reg = <0x1010c000 0x1000>; - interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru ACLK_LCDC0>, <&cru DCLK_LCDC0>, <&cru HCLK_LCDC0>; - clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; - power-domains = <&power RK3188_PD_VIO>; - resets = <&cru SRST_LCDC0_AXI>, <&cru SRST_LCDC0_AHB>, <&cru SRST_LCDC0_DCLK>; - reset-names = "axi", "ahb", "dclk"; - status = "disabled"; - - vop0_out: port { - #address-cells = <1>; - #size-cells = <0>; - }; - }; - - vop1: vop@1010e000 { - compatible = "rockchip,rk3188-vop"; - reg = <0x1010e000 0x1000>; - interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru ACLK_LCDC1>, <&cru DCLK_LCDC1>, <&cru HCLK_LCDC1>; - clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; - power-domains = <&power RK3188_PD_VIO>; - resets = <&cru SRST_LCDC1_AXI>, <&cru SRST_LCDC1_AHB>, <&cru SRST_LCDC1_DCLK>; - reset-names = "axi", "ahb", "dclk"; - status = "disabled"; - - vop1_out: port { - #address-cells = <1>; - #size-cells = <0>; - }; - }; - - timer3: timer@2000e000 { - compatible = "rockchip,rk3188-timer", "rockchip,rk3288-timer"; - reg = <0x2000e000 0x20>; - interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_TIMER3>, <&cru SCLK_TIMER3>; - clock-names = "pclk", "timer"; - }; - - timer6: timer@200380a0 { - compatible = "rockchip,rk3188-timer", "rockchip,rk3288-timer"; - reg = <0x200380a0 0x20>; - interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_TIMER0>, <&cru SCLK_TIMER6>; - clock-names = "pclk", "timer"; - }; - - i2s0: i2s@1011a000 { - compatible = "rockchip,rk3188-i2s", "rockchip,rk3066-i2s"; - reg = <0x1011a000 0x2000>; - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&i2s0_bus>; - clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>; - clock-names = "i2s_clk", "i2s_hclk"; - dmas = <&dmac1_s 6>, <&dmac1_s 7>; - dma-names = "tx", "rx"; - rockchip,playback-channels = <2>; - rockchip,capture-channels = <2>; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - spdif: sound@1011e000 { - compatible = "rockchip,rk3188-spdif", "rockchip,rk3066-spdif"; - reg = <0x1011e000 0x2000>; - #sound-dai-cells = <0>; - clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF>; - clock-names = "mclk", "hclk"; - dmas = <&dmac1_s 8>; - dma-names = "tx"; - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&spdif_tx>; - status = "disabled"; - }; - - cru: clock-controller@20000000 { - compatible = "rockchip,rk3188-cru"; - reg = <0x20000000 0x1000>; - clocks = <&xin24m>; - clock-names = "xin24m"; - rockchip,grf = <&grf>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - efuse: efuse@20010000 { - compatible = "rockchip,rk3188-efuse"; - reg = <0x20010000 0x4000>; - #address-cells = <1>; - #size-cells = <1>; - clocks = <&cru PCLK_EFUSE>; - clock-names = "pclk_efuse"; - - cpu_leakage: cpu_leakage@17 { - reg = <0x17 0x1>; - }; - }; - - pinctrl: pinctrl { - compatible = "rockchip,rk3188-pinctrl"; - rockchip,grf = <&grf>; - rockchip,pmu = <&pmu>; - - #address-cells = <1>; - #size-cells = <1>; - ranges; - - gpio0: gpio@2000a000 { - compatible = "rockchip,rk3188-gpio-bank0"; - reg = <0x2000a000 0x100>; - interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO0>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio1: gpio@2003c000 { - compatible = "rockchip,gpio-bank"; - reg = <0x2003c000 0x100>; - interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO1>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio2: gpio@2003e000 { - compatible = "rockchip,gpio-bank"; - reg = <0x2003e000 0x100>; - interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO2>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio3: gpio@20080000 { - compatible = "rockchip,gpio-bank"; - reg = <0x20080000 0x100>; - interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO3>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - pcfg_pull_up: pcfg-pull-up { - bias-pull-up; - }; - - pcfg_pull_down: pcfg-pull-down { - bias-pull-down; - }; - - pcfg_pull_none: pcfg-pull-none { - bias-disable; - }; - - emmc { - emmc_clk: emmc-clk { - rockchip,pins = <0 RK_PD0 2 &pcfg_pull_none>; - }; - - emmc_cmd: emmc-cmd { - rockchip,pins = <0 RK_PD2 2 &pcfg_pull_up>; - }; - - emmc_rst: emmc-rst { - rockchip,pins = <0 RK_PD3 2 &pcfg_pull_none>; - }; - - /* - * The data pins are shared between nandc and emmc and - * not accessible through pinctrl. Also they should've - * been already set correctly by firmware, as - * flash/emmc is the boot-device. - */ - }; - - emac { - emac_xfer: emac-xfer { - rockchip,pins = <3 RK_PC0 2 &pcfg_pull_none>, /* tx_en */ - <3 RK_PC1 2 &pcfg_pull_none>, /* txd1 */ - <3 RK_PC2 2 &pcfg_pull_none>, /* txd0 */ - <3 RK_PC3 2 &pcfg_pull_none>, /* rxd0 */ - <3 RK_PC4 2 &pcfg_pull_none>, /* rxd1 */ - <3 RK_PC5 2 &pcfg_pull_none>, /* mac_clk */ - <3 RK_PC6 2 &pcfg_pull_none>, /* rx_err */ - <3 RK_PC7 2 &pcfg_pull_none>; /* crs_dvalid */ - }; - - emac_mdio: emac-mdio { - rockchip,pins = <3 RK_PD0 2 &pcfg_pull_none>, - <3 RK_PD1 2 &pcfg_pull_none>; - }; - }; - - i2c0 { - i2c0_xfer: i2c0-xfer { - rockchip,pins = <1 RK_PD0 1 &pcfg_pull_none>, - <1 RK_PD1 1 &pcfg_pull_none>; - }; - }; - - i2c1 { - i2c1_xfer: i2c1-xfer { - rockchip,pins = <1 RK_PD2 1 &pcfg_pull_none>, - <1 RK_PD3 1 &pcfg_pull_none>; - }; - }; - - i2c2 { - i2c2_xfer: i2c2-xfer { - rockchip,pins = <1 RK_PD4 1 &pcfg_pull_none>, - <1 RK_PD5 1 &pcfg_pull_none>; - }; - }; - - i2c3 { - i2c3_xfer: i2c3-xfer { - rockchip,pins = <3 RK_PB6 2 &pcfg_pull_none>, - <3 RK_PB7 2 &pcfg_pull_none>; - }; - }; - - i2c4 { - i2c4_xfer: i2c4-xfer { - rockchip,pins = <1 RK_PD6 1 &pcfg_pull_none>, - <1 RK_PD7 1 &pcfg_pull_none>; - }; - }; - - lcdc1 { - lcdc1_dclk: lcdc1-dclk { - rockchip,pins = <2 RK_PD0 1 &pcfg_pull_none>; - }; - - lcdc1_den: lcdc1-den { - rockchip,pins = <2 RK_PD1 1 &pcfg_pull_none>; - }; - - lcdc1_hsync: lcdc1-hsync { - rockchip,pins = <2 RK_PD2 1 &pcfg_pull_none>; - }; - - lcdc1_vsync: lcdc1-vsync { - rockchip,pins = <2 RK_PD3 1 &pcfg_pull_none>; - }; - - lcdc1_rgb24: lcdc1-rgb24 { - rockchip,pins = <2 RK_PA0 1 &pcfg_pull_none>, - <2 RK_PA1 1 &pcfg_pull_none>, - <2 RK_PA2 1 &pcfg_pull_none>, - <2 RK_PA3 1 &pcfg_pull_none>, - <2 RK_PA4 1 &pcfg_pull_none>, - <2 RK_PA5 1 &pcfg_pull_none>, - <2 RK_PA6 1 &pcfg_pull_none>, - <2 RK_PA7 1 &pcfg_pull_none>, - <2 RK_PB0 1 &pcfg_pull_none>, - <2 RK_PB1 1 &pcfg_pull_none>, - <2 RK_PB2 1 &pcfg_pull_none>, - <2 RK_PB3 1 &pcfg_pull_none>, - <2 RK_PB4 1 &pcfg_pull_none>, - <2 RK_PB5 1 &pcfg_pull_none>, - <2 RK_PB6 1 &pcfg_pull_none>, - <2 RK_PB7 1 &pcfg_pull_none>, - <2 RK_PC0 1 &pcfg_pull_none>, - <2 RK_PC1 1 &pcfg_pull_none>, - <2 RK_PC2 1 &pcfg_pull_none>, - <2 RK_PC3 1 &pcfg_pull_none>, - <2 RK_PC4 1 &pcfg_pull_none>, - <2 RK_PC5 1 &pcfg_pull_none>, - <2 RK_PC6 1 &pcfg_pull_none>, - <2 RK_PC7 1 &pcfg_pull_none>; - }; - }; - - pwm0 { - pwm0_out: pwm0-out { - rockchip,pins = <3 RK_PD3 1 &pcfg_pull_none>; - }; - }; - - pwm1 { - pwm1_out: pwm1-out { - rockchip,pins = <3 RK_PD4 1 &pcfg_pull_none>; - }; - }; - - pwm2 { - pwm2_out: pwm2-out { - rockchip,pins = <3 RK_PD5 1 &pcfg_pull_none>; - }; - }; - - pwm3 { - pwm3_out: pwm3-out { - rockchip,pins = <3 RK_PD6 1 &pcfg_pull_none>; - }; - }; - - spi0 { - spi0_clk: spi0-clk { - rockchip,pins = <1 RK_PA6 2 &pcfg_pull_up>; - }; - spi0_cs0: spi0-cs0 { - rockchip,pins = <1 RK_PA7 2 &pcfg_pull_up>; - }; - spi0_tx: spi0-tx { - rockchip,pins = <1 RK_PA5 2 &pcfg_pull_up>; - }; - spi0_rx: spi0-rx { - rockchip,pins = <1 RK_PA4 2 &pcfg_pull_up>; - }; - spi0_cs1: spi0-cs1 { - rockchip,pins = <1 RK_PB7 1 &pcfg_pull_up>; - }; - }; - - spi1 { - spi1_clk: spi1-clk { - rockchip,pins = <0 RK_PD6 1 &pcfg_pull_up>; - }; - spi1_cs0: spi1-cs0 { - rockchip,pins = <0 RK_PD7 1 &pcfg_pull_up>; - }; - spi1_rx: spi1-rx { - rockchip,pins = <0 RK_PD4 1 &pcfg_pull_up>; - }; - spi1_tx: spi1-tx { - rockchip,pins = <0 RK_PD5 1 &pcfg_pull_up>; - }; - spi1_cs1: spi1-cs1 { - rockchip,pins = <1 RK_PB6 2 &pcfg_pull_up>; - }; - }; - - uart0 { - uart0_xfer: uart0-xfer { - rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up>, - <1 RK_PA1 1 &pcfg_pull_none>; - }; - - uart0_cts: uart0-cts { - rockchip,pins = <1 RK_PA2 1 &pcfg_pull_none>; - }; - - uart0_rts: uart0-rts { - rockchip,pins = <1 RK_PA3 1 &pcfg_pull_none>; - }; - }; - - uart1 { - uart1_xfer: uart1-xfer { - rockchip,pins = <1 RK_PA4 1 &pcfg_pull_up>, - <1 RK_PA5 1 &pcfg_pull_none>; - }; - - uart1_cts: uart1-cts { - rockchip,pins = <1 RK_PA6 1 &pcfg_pull_none>; - }; - - uart1_rts: uart1-rts { - rockchip,pins = <1 RK_PA7 1 &pcfg_pull_none>; - }; - }; - - uart2 { - uart2_xfer: uart2-xfer { - rockchip,pins = <1 RK_PB0 1 &pcfg_pull_up>, - <1 RK_PB1 1 &pcfg_pull_none>; - }; - /* no rts / cts for uart2 */ - }; - - uart3 { - uart3_xfer: uart3-xfer { - rockchip,pins = <1 RK_PB2 1 &pcfg_pull_up>, - <1 RK_PB3 1 &pcfg_pull_none>; - }; - - uart3_cts: uart3-cts { - rockchip,pins = <1 RK_PB4 1 &pcfg_pull_none>; - }; - - uart3_rts: uart3-rts { - rockchip,pins = <1 RK_PB5 1 &pcfg_pull_none>; - }; - }; - - sd0 { - sd0_clk: sd0-clk { - rockchip,pins = <3 RK_PA2 1 &pcfg_pull_none>; - }; - - sd0_cmd: sd0-cmd { - rockchip,pins = <3 RK_PA3 1 &pcfg_pull_none>; - }; - - sd0_cd: sd0-cd { - rockchip,pins = <3 RK_PB0 1 &pcfg_pull_none>; - }; - - sd0_wp: sd0-wp { - rockchip,pins = <3 RK_PB1 1 &pcfg_pull_none>; - }; - - sd0_pwr: sd0-pwr { - rockchip,pins = <3 RK_PA1 1 &pcfg_pull_none>; - }; - - sd0_bus1: sd0-bus-width1 { - rockchip,pins = <3 RK_PA4 1 &pcfg_pull_none>; - }; - - sd0_bus4: sd0-bus-width4 { - rockchip,pins = <3 RK_PA4 1 &pcfg_pull_none>, - <3 RK_PA5 1 &pcfg_pull_none>, - <3 RK_PA6 1 &pcfg_pull_none>, - <3 RK_PA7 1 &pcfg_pull_none>; - }; - }; - - sd1 { - sd1_clk: sd1-clk { - rockchip,pins = <3 RK_PC5 1 &pcfg_pull_none>; - }; - - sd1_cmd: sd1-cmd { - rockchip,pins = <3 RK_PC0 1 &pcfg_pull_none>; - }; - - sd1_cd: sd1-cd { - rockchip,pins = <3 RK_PC6 1 &pcfg_pull_none>; - }; - - sd1_wp: sd1-wp { - rockchip,pins = <3 RK_PC7 1 &pcfg_pull_none>; - }; - - sd1_bus1: sd1-bus-width1 { - rockchip,pins = <3 RK_PC1 1 &pcfg_pull_none>; - }; - - sd1_bus4: sd1-bus-width4 { - rockchip,pins = <3 RK_PC1 1 &pcfg_pull_none>, - <3 RK_PC2 1 &pcfg_pull_none>, - <3 RK_PC3 1 &pcfg_pull_none>, - <3 RK_PC4 1 &pcfg_pull_none>; - }; - }; - - i2s0 { - i2s0_bus: i2s0-bus { - rockchip,pins = <1 RK_PC0 1 &pcfg_pull_none>, - <1 RK_PC1 1 &pcfg_pull_none>, - <1 RK_PC2 1 &pcfg_pull_none>, - <1 RK_PC3 1 &pcfg_pull_none>, - <1 RK_PC4 1 &pcfg_pull_none>, - <1 RK_PC5 1 &pcfg_pull_none>; - }; - }; - - spdif { - spdif_tx: spdif-tx { - rockchip,pins = <1 RK_PB6 1 &pcfg_pull_none>; - }; - }; - }; -}; - -&emac { - compatible = "rockchip,rk3188-emac"; -}; - -&global_timer { - interrupts = <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>; -}; - -&local_timer { - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>; -}; - -&gpu { - compatible = "rockchip,rk3188-mali", "arm,mali-400"; - interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "gp", - "gpmmu", - "pp0", - "ppmmu0", - "pp1", - "ppmmu1", - "pp2", - "ppmmu2", - "pp3", - "ppmmu3"; - power-domains = <&power RK3188_PD_GPU>; -}; - -&grf { - compatible = "rockchip,rk3188-grf", "syscon", "simple-mfd"; - - io_domains: io-domains { - compatible = "rockchip,rk3188-io-voltage-domain"; - status = "disabled"; - }; - - usbphy: usbphy { - compatible = "rockchip,rk3188-usb-phy"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - - usbphy0: usb-phy@10c { - reg = <0x10c>; - clocks = <&cru SCLK_OTGPHY0>; - clock-names = "phyclk"; - #clock-cells = <0>; - #phy-cells = <0>; - }; - - usbphy1: usb-phy@11c { - reg = <0x11c>; - clocks = <&cru SCLK_OTGPHY1>; - clock-names = "phyclk"; - #clock-cells = <0>; - #phy-cells = <0>; - }; - }; -}; - -&i2c0 { - compatible = "rockchip,rk3188-i2c"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_xfer>; -}; - -&i2c1 { - compatible = "rockchip,rk3188-i2c"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_xfer>; -}; - -&i2c2 { - compatible = "rockchip,rk3188-i2c"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_xfer>; -}; - -&i2c3 { - compatible = "rockchip,rk3188-i2c"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c3_xfer>; -}; - -&i2c4 { - compatible = "rockchip,rk3188-i2c"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c4_xfer>; -}; - -&pmu { - power: power-controller { - compatible = "rockchip,rk3188-power-controller"; - #power-domain-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - - power-domain@RK3188_PD_VIO { - reg = <RK3188_PD_VIO>; - clocks = <&cru ACLK_LCDC0>, - <&cru ACLK_LCDC1>, - <&cru DCLK_LCDC0>, - <&cru DCLK_LCDC1>, - <&cru HCLK_LCDC0>, - <&cru HCLK_LCDC1>, - <&cru SCLK_CIF0>, - <&cru ACLK_CIF0>, - <&cru HCLK_CIF0>, - <&cru ACLK_IPP>, - <&cru HCLK_IPP>, - <&cru ACLK_RGA>, - <&cru HCLK_RGA>; - pm_qos = <&qos_lcdc0>, - <&qos_lcdc1>, - <&qos_cif0>, - <&qos_ipp>, - <&qos_rga>; - #power-domain-cells = <0>; - }; - - power-domain@RK3188_PD_VIDEO { - reg = <RK3188_PD_VIDEO>; - clocks = <&cru ACLK_VDPU>, - <&cru ACLK_VEPU>, - <&cru HCLK_VDPU>, - <&cru HCLK_VEPU>; - pm_qos = <&qos_vpu>; - #power-domain-cells = <0>; - }; - - power-domain@RK3188_PD_GPU { - reg = <RK3188_PD_GPU>; - clocks = <&cru ACLK_GPU>; - pm_qos = <&qos_gpu>; - #power-domain-cells = <0>; - }; - }; -}; - -&pwm0 { - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_out>; -}; - -&pwm1 { - pinctrl-names = "default"; - pinctrl-0 = <&pwm1_out>; -}; - -&pwm2 { - pinctrl-names = "default"; - pinctrl-0 = <&pwm2_out>; -}; - -&pwm3 { - pinctrl-names = "default"; - pinctrl-0 = <&pwm3_out>; -}; - -&spi0 { - compatible = "rockchip,rk3188-spi", "rockchip,rk3066-spi"; - pinctrl-names = "default"; - pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>; -}; - -&spi1 { - compatible = "rockchip,rk3188-spi", "rockchip,rk3066-spi"; - pinctrl-names = "default"; - pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>; -}; - -&uart0 { - compatible = "rockchip,rk3188-uart", "snps,dw-apb-uart"; - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer>; -}; - -&uart1 { - compatible = "rockchip,rk3188-uart", "snps,dw-apb-uart"; - pinctrl-names = "default"; - pinctrl-0 = <&uart1_xfer>; -}; - -&uart2 { - compatible = "rockchip,rk3188-uart", "snps,dw-apb-uart"; - pinctrl-names = "default"; - pinctrl-0 = <&uart2_xfer>; -}; - -&uart3 { - compatible = "rockchip,rk3188-uart", "snps,dw-apb-uart"; - pinctrl-names = "default"; - pinctrl-0 = <&uart3_xfer>; -}; - -&vpu { - compatible = "rockchip,rk3188-vpu", "rockchip,rk3066-vpu"; - power-domains = <&power RK3188_PD_VIDEO>; -}; - -&wdt { - compatible = "rockchip,rk3188-wdt", "snps,dw-wdt"; -}; diff --git a/arch/arm/dts/rk3288-firefly-u-boot.dtsi b/arch/arm/dts/rk3288-firefly-u-boot.dtsi index 644198a4a2f..b7d13bcb860 100644 --- a/arch/arm/dts/rk3288-firefly-u-boot.dtsi +++ b/arch/arm/dts/rk3288-firefly-u-boot.dtsi @@ -6,21 +6,8 @@ #include "rk3288-u-boot.dtsi" / { - config { - bootph-all; - u-boot,boot-led = "firefly:green:power"; - }; - - leds { - bootph-all; - - work { - bootph-all; - }; - - power { - bootph-all; - }; + chosen { + stdout-path = "serial2:115200n8"; }; }; @@ -36,46 +23,100 @@ rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>; }; -&pinctrl { - bootph-all; +&emmc { + bootph-pre-ram; + bootph-some-ram; }; -&uart2 { - bootph-all; +&emmc_bus8 { + bootph-pre-ram; + bootph-some-ram; }; -&sdmmc { - bootph-all; +&emmc_clk { + bootph-pre-ram; + bootph-some-ram; }; -&emmc { - bootph-all; +&emmc_cmd { + bootph-pre-ram; + bootph-some-ram; +}; + +&emmc_pwr { + bootph-pre-ram; + bootph-some-ram; +}; + +&gmac { + snps,reset-delays-us = <0 10000 80000>; +}; + +&gpio7 { + /delete-property/ bootph-all; + bootph-pre-ram; }; -&gpio3 { +&pcfg_pull_none { bootph-all; }; -&gpio8 { +&pcfg_pull_none_12ma { + bootph-pre-ram; + bootph-some-ram; +}; + +&pcfg_pull_up { bootph-all; }; &pcfg_pull_up_drv_12ma { bootph-pre-ram; + bootph-some-ram; +}; + +&power_led { + default-state = "on"; +}; + +&sdmmc { + bootph-pre-ram; + bootph-some-ram; }; &sdmmc_bus4 { bootph-pre-ram; + bootph-some-ram; +}; + +&sdmmc_cd { + bootph-pre-ram; + bootph-some-ram; }; &sdmmc_clk { bootph-pre-ram; + bootph-some-ram; }; &sdmmc_cmd { bootph-pre-ram; + bootph-some-ram; }; &sdmmc_pwr { bootph-pre-ram; }; + +&uart2 { + bootph-all; +}; + +&uart2_xfer { + bootph-pre-sram; + bootph-pre-ram; +}; + +&vcc_sd { + bootph-pre-ram; +}; diff --git a/arch/arm/dts/rk3288-firefly.dts b/arch/arm/dts/rk3288-firefly.dts deleted file mode 100644 index 72982efdf6d..00000000000 --- a/arch/arm/dts/rk3288-firefly.dts +++ /dev/null @@ -1,43 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR X11 -/* - * Copyright (c) 2014, 2015 FUKAUMI Naoki <naobsd@gmail.com> - */ - -/dts-v1/; -#include "rk3288-firefly.dtsi" - -/ { - model = "Firefly-RK3288"; - compatible = "firefly,firefly-rk3288", "rockchip,rk3288"; - - chosen { - stdout-path = &uart2; - }; -}; - -&ir { - gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; -}; - -&pinctrl { - act8846 { - pmic_vsel: pmic-vsel { - rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_output_low>; - }; - }; - - ir { - ir_int: ir-int { - rockchip,pins = <7 0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - usb_host { - host_vbus_drv: host-vbus-drv { - rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pwm1 { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3288-firefly.dtsi b/arch/arm/dts/rk3288-firefly.dtsi deleted file mode 100644 index 0824b19ee64..00000000000 --- a/arch/arm/dts/rk3288-firefly.dtsi +++ /dev/null @@ -1,491 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR X11 -/* - * Copyright (c) 2014, 2015 FUKAUMI Naoki <naobsd@gmail.com> - */ - -#include "rk3288.dtsi" - -/ { - memory { - reg = <0x0 0x0 0x0 0x80000000>; - }; - - ext_gmac: external-gmac-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <125000000>; - clock-output-names = "ext_gmac"; - }; - - ir: ir-receiver { - compatible = "gpio-ir-receiver"; - pinctrl-names = "default"; - pinctrl-0 = <&ir_int>; - }; - - keys: gpio-keys { - compatible = "gpio-keys"; - - button@0 { - gpio-key,wakeup = <1>; - gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; - label = "GPIO Power"; - linux,code = <116>; - pinctrl-names = "default"; - pinctrl-0 = <&pwr_key>; - }; - }; - - leds { - compatible = "gpio-leds"; - - work { - gpios = <&gpio8 1 GPIO_ACTIVE_LOW>; - label = "firefly:blue:user"; - linux,default-trigger = "rc-feedback"; - pinctrl-names = "default"; - pinctrl-0 = <&work_led>; - }; - - power { - gpios = <&gpio8 2 GPIO_ACTIVE_LOW>; - label = "firefly:green:power"; - linux,default-trigger = "default-on"; - pinctrl-names = "default"; - pinctrl-0 = <&power_led>; - }; - }; - - vcc_sys: vsys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_sys"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - regulator-boot-on; - }; - - vcc_sd: sdmmc-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio7 11 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_pwr>; - regulator-name = "vcc_sd"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - startup-delay-us = <100000>; - vin-supply = <&vcc_io>; - }; - - vcc_flash: flash-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_flash"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vcc_io>; - }; - - vcc_5v: usb-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_5v"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc_sys>; - }; - - vcc_host_5v: usb-host-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&host_vbus_drv>; - regulator-name = "vcc_host_5v"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - vin-supply = <&vcc_5v>; - }; - - vcc_otg_5v: usb-otg-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&otg_vbus_drv>; - regulator-name = "vcc_otg_5v"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - vin-supply = <&vcc_5v>; - }; -}; - -&cpu0 { - cpu0-supply = <&vdd_cpu>; -}; - -&emmc { - broken-cd; - bus-width = <8>; - cap-mmc-highspeed; - disable-wp; - non-removable; - num-slots = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>; - vmmc-supply = <&vcc_io>; - vqmmc-supply = <&vcc_flash>; - status = "okay"; -}; - -&gmac { - assigned-clocks = <&cru SCLK_MAC>; - assigned-clock-parents = <&ext_gmac>; - clock_in_out = "input"; - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>, <&phy_rst>, <&phy_pmeb>, <&phy_int>; - phy-supply = <&vcc_lan>; - phy-mode = "rgmii"; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 1000000>; - snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>; - tx_delay = <0x30>; - rx_delay = <0x10>; - status = "okay"; -}; - -&hdmi { - ddc-i2c-bus = <&i2c5>; - status = "okay"; -}; - -&i2c0 { - clock-frequency = <400000>; - status = "okay"; - - vdd_cpu: syr827@40 { - compatible = "silergy,syr827"; - fcs,suspend-voltage-selector = <1>; - reg = <0x40>; - regulator-name = "vdd_cpu"; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <1350000>; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc_sys>; - }; - - vdd_gpu: syr828@41 { - compatible = "silergy,syr828"; - fcs,suspend-voltage-selector = <1>; - reg = <0x41>; - regulator-name = "vdd_gpu"; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <1350000>; - regulator-always-on; - vin-supply = <&vcc_sys>; - }; - - hym8563: hym8563@51 { - compatible = "haoyu,hym8563"; - reg = <0x51>; - #clock-cells = <0>; - clock-frequency = <32768>; - clock-output-names = "xin32k"; - interrupt-parent = <&gpio7>; - interrupts = <4 IRQ_TYPE_EDGE_FALLING>; - pinctrl-names = "default"; - pinctrl-0 = <&rtc_int>; - }; - - act8846: act8846@5a { - compatible = "active-semi,act8846"; - reg = <0x5a>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_vsel>, <&pwr_hold>; - system-power-controller; - - regulators { - vcc_ddr: REG1 { - regulator-name = "vcc_ddr"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-always-on; - }; - - vcc_io: REG2 { - regulator-name = "vcc_io"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vdd_log: REG3 { - regulator-name = "vdd_log"; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - regulator-always-on; - }; - - vcc_20: REG4 { - regulator-name = "vcc_20"; - regulator-min-microvolt = <2000000>; - regulator-max-microvolt = <2000000>; - regulator-always-on; - }; - - vccio_sd: REG5 { - regulator-name = "vccio_sd"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vdd10_lcd: REG6 { - regulator-name = "vdd10_lcd"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - }; - - vcca_18: REG7 { - regulator-name = "vcca_18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - vcca_33: REG8 { - regulator-name = "vcca_33"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - vcc_lan: REG9 { - regulator-name = "vcc_lan"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - vdd_10: REG10 { - regulator-name = "vdd_10"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - }; - - vcc_18: REG11 { - regulator-name = "vcc_18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - vcc18_lcd: REG12 { - regulator-name = "vcc18_lcd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - }; - }; -}; - -&i2c1 { - status = "okay"; -}; - -&i2c2 { - status = "okay"; -}; - -&i2c4 { - status = "okay"; -}; - -&i2c5 { - status = "okay"; -}; - -&pinctrl { - pcfg_output_high: pcfg-output-high { - output-high; - }; - - pcfg_output_low: pcfg-output-low { - output-low; - }; - - pcfg_pull_up_drv_12ma: pcfg-pull-up-drv-12ma { - bias-pull-up; - drive-strength = <12>; - }; - - act8846 { - pwr_hold: pwr-hold { - rockchip,pins = <0 1 RK_FUNC_GPIO &pcfg_output_high>; - }; - }; - - gmac { - phy_int: phy-int { - rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - phy_pmeb: phy-pmeb { - rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - phy_rst: phy-rst { - rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>; - }; - }; - - hym8563 { - rtc_int: rtc-int { - rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - keys { - pwr_key: pwr-key { - rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - leds { - power_led: power-led { - rockchip,pins = <8 2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - work_led: work-led { - rockchip,pins = <8 1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - sdmmc { - /* - * Default drive strength isn't enough to achieve even - * high-speed mode on firefly board so bump up to 12ma. - */ - sdmmc_bus4: sdmmc-bus4 { - rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up_drv_12ma>, - <6 RK_PC1 1 &pcfg_pull_up_drv_12ma>, - <6 RK_PC2 1 &pcfg_pull_up_drv_12ma>, - <6 RK_PC3 1 &pcfg_pull_up_drv_12ma>; - }; - - sdmmc_clk: sdmmc-clk { - rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none_12ma>; - }; - - sdmmc_cmd: sdmmc-cmd { - rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up_drv_12ma>; - }; - - sdmmc_pwr: sdmmc-pwr { - rockchip,pins = <7 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb_host { - host_vbus_drv: host-vbus-drv { - rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - usbhub_rst: usbhub-rst { - rockchip,pins = <8 3 RK_FUNC_GPIO &pcfg_output_high>; - }; - }; - - usb_otg { - otg_vbus_drv: otg-vbus-drv { - rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&saradc { - vref-supply = <&vcc_18>; - status = "okay"; -}; - -&sdio0 { - broken-cd; - bus-width = <4>; - disable-wp; - non-removable; - num-slots = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&sdio0_bus4>, <&sdio0_cmd>, <&sdio0_clk>; - vmmc-supply = <&vcc_18>; - status = "disabled"; -}; - -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - card-detect-delay = <200>; - disable-wp; - num-slots = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>; - vmmc-supply = <&vcc_sd>; - status = "okay"; -}; - -&spi0 { - pinctrl-names = "default"; - pinctrl-0 = <&spi0_clk>, <&spi0_cs0>, <&spi0_tx>, <&spi0_rx>, <&spi0_cs1>; - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>; - status = "okay"; -}; - -&uart1 { - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&uart3 { - status = "okay"; -}; - -&usb_host1 { - pinctrl-names = "default"; - pinctrl-0 = <&usbhub_rst>; - status = "okay"; -}; - -&usb_otg { - status = "okay"; -}; - -&vopb { - status = "okay"; -}; - -&vopb_mmu { - status = "okay"; -}; - -&vopl { - status = "okay"; -}; - -&vopl_mmu { - status = "okay"; -}; - -&wdt { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3288-miqi-u-boot.dtsi b/arch/arm/dts/rk3288-miqi-u-boot.dtsi index 43cb48bd032..e5c7e761c46 100644 --- a/arch/arm/dts/rk3288-miqi-u-boot.dtsi +++ b/arch/arm/dts/rk3288-miqi-u-boot.dtsi @@ -4,15 +4,6 @@ */ #include "rk3288-u-boot.dtsi" -/ { - leds { - bootph-all; - - work { - bootph-all; - }; - }; -}; &dmc { rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa @@ -25,34 +16,96 @@ rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>; }; -&pinctrl { - bootph-all; +&emmc { + bootph-pre-ram; + bootph-some-ram; }; -&uart2 { - bootph-all; +&emmc_bus8 { + bootph-pre-ram; + bootph-some-ram; }; -&sdmmc { +&emmc_clk { + bootph-pre-ram; + bootph-some-ram; +}; + +&emmc_cmd { + bootph-pre-ram; + bootph-some-ram; +}; + +&emmc_pwr { + bootph-pre-ram; + bootph-some-ram; +}; + +&gmac { + snps,reset-delays-us = <0 10000 80000>; +}; + +&gpio7 { + /delete-property/ bootph-all; + bootph-pre-ram; +}; + +&pcfg_pull_none { bootph-all; }; -&emmc { +&pcfg_pull_none_12ma { + bootph-pre-ram; + bootph-some-ram; +}; + +&pcfg_pull_up { bootph-all; }; +&pcfg_pull_up_drv_12ma { + bootph-pre-ram; + bootph-some-ram; +}; + +&sdmmc { + bootph-pre-ram; + bootph-some-ram; +}; + &sdmmc_bus4 { bootph-pre-ram; + bootph-some-ram; +}; + +&sdmmc_cd { + bootph-pre-ram; + bootph-some-ram; }; &sdmmc_clk { bootph-pre-ram; + bootph-some-ram; }; &sdmmc_cmd { bootph-pre-ram; + bootph-some-ram; }; &sdmmc_pwr { bootph-pre-ram; }; + +&uart2 { + bootph-all; +}; + +&uart2_xfer { + bootph-pre-sram; + bootph-pre-ram; +}; + +&vcc_sd { + bootph-pre-ram; +}; diff --git a/arch/arm/dts/rk3288-miqi.dts b/arch/arm/dts/rk3288-miqi.dts deleted file mode 100644 index 4a2f249e1b1..00000000000 --- a/arch/arm/dts/rk3288-miqi.dts +++ /dev/null @@ -1,16 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR X11 -/* - * (C) Copyright 2016 Rockchip Electronics Co., Ltd - */ - -/dts-v1/; -#include "rk3288-miqi.dtsi" - -/ { - model = "mqmaker MiQi"; - compatible = "mqmaker,miqi", "rockchip,rk3288"; - - chosen { - stdout-path = "serial2:115200n8"; - }; -}; diff --git a/arch/arm/dts/rk3288-miqi.dtsi b/arch/arm/dts/rk3288-miqi.dtsi deleted file mode 100644 index c56e1109e3a..00000000000 --- a/arch/arm/dts/rk3288-miqi.dtsi +++ /dev/null @@ -1,417 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR X11 -/* - * Copyright (c) 2016 Heiko Stuebner <heiko@sntech.de> - */ - -#include "rk3288.dtsi" - -/ { - memory { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x80000000>; - }; - - ext_gmac: external-gmac-clock { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <125000000>; - clock-output-names = "ext_gmac"; - }; - - leds { - compatible = "gpio-leds"; - - work { - gpios = <&gpio7 4 GPIO_ACTIVE_LOW>; - label = "miqi:green:user"; - linux,default-trigger = "default-on"; - pinctrl-names = "default"; - pinctrl-0 = <&led_ctl>; - }; - }; - - vcc_flash: flash-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_flash"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vcc_io>; - }; - - vcc_host: usb-host-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&host_vbus_drv>; - regulator-name = "vcc_host"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - vin-supply = <&vcc_sys>; - }; - - vcc_sd: sdmmc-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio7 11 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_pwr>; - regulator-name = "vcc_sd"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - startup-delay-us = <100000>; - vin-supply = <&vcc_io>; - }; - - vcc_sys: vsys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_sys"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - regulator-boot-on; - }; -}; - -&cpu0 { - cpu0-supply = <&vdd_cpu>; -}; - -&emmc { - bus-width = <8>; - cap-mmc-highspeed; - disable-wp; - non-removable; - num-slots = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>; - vmmc-supply = <&vcc_io>; - vqmmc-supply = <&vcc_flash>; - status = "okay"; -}; - -&gmac { - assigned-clocks = <&cru SCLK_MAC>; - assigned-clock-parents = <&ext_gmac>; - clock_in_out = "input"; - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>, <&phy_rst>, <&phy_pmeb>, <&phy_int>; - phy-supply = <&vcc_lan>; - phy-mode = "rgmii"; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 1000000>; - snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>; - tx_delay = <0x30>; - rx_delay = <0x10>; - status = "okay"; -}; - -&hdmi { - ddc-i2c-bus = <&i2c5>; - status = "okay"; -}; - -&i2c0 { - clock-frequency = <400000>; - status = "okay"; - - vdd_cpu: syr827@40 { - compatible = "silergy,syr827"; - fcs,suspend-voltage-selector = <1>; - reg = <0x40>; - regulator-name = "vdd_cpu"; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <1350000>; - regulator-always-on; - regulator-boot-on; - regulator-enable-ramp-delay = <300>; - regulator-ramp-delay = <8000>; - vin-supply = <&vcc_sys>; - }; - - vdd_gpu: syr828@41 { - compatible = "silergy,syr828"; - fcs,suspend-voltage-selector = <1>; - reg = <0x41>; - regulator-name = "vdd_gpu"; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <1350000>; - regulator-always-on; - vin-supply = <&vcc_sys>; - }; - - hym8563: hym8563@51 { - compatible = "haoyu,hym8563"; - reg = <0x51>; - #clock-cells = <0>; - clock-frequency = <32768>; - clock-output-names = "xin32k"; - }; - - act8846: act8846@5a { - compatible = "active-semi,act8846"; - reg = <0x5a>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_vsel>; - system-power-controller; - - vp1-supply = <&vcc_sys>; - vp2-supply = <&vcc_sys>; - vp3-supply = <&vcc_sys>; - vp4-supply = <&vcc_sys>; - inl1-supply = <&vcc_sys>; - inl2-supply = <&vcc_sys>; - inl3-supply = <&vcc_20>; - - regulators { - vcc_ddr: REG1 { - regulator-name = "vcc_ddr"; - regulator-always-on; - }; - - vcc_io: REG2 { - regulator-name = "vcc_io"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vdd_log: REG3 { - regulator-name = "vdd_log"; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - regulator-always-on; - }; - - vcc_20: REG4 { - regulator-name = "vcc_20"; - regulator-min-microvolt = <2000000>; - regulator-max-microvolt = <2000000>; - regulator-always-on; - }; - - vccio_sd: REG5 { - regulator-name = "vccio_sd"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vdd10_lcd: REG6 { - regulator-name = "vdd10_lcd"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - }; - - vcca_18: REG7 { - regulator-name = "vcca_18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - vcca_33: REG8 { - regulator-name = "vcca_33"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - vcc_lan: REG9 { - regulator-name = "vcc_lan"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - vdd_10: REG10 { - regulator-name = "vdd_10"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - }; - - vcc_18: REG11 { - regulator-name = "vcc_18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - vcc18_lcd: REG12 { - regulator-name = "vcc18_lcd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - }; - }; -}; - -&i2c1 { - status = "okay"; -}; - -&i2c2 { - status = "okay"; -}; - -&i2c4 { - status = "okay"; -}; - -&i2c5 { - status = "okay"; -}; - -&io_domains { - audio-supply = <&vcca_33>; - flash0-supply = <&vcc_flash>; - flash1-supply = <&vcc_lan>; - gpio30-supply = <&vcc_io>; - gpio1830-supply = <&vcc_io>; - lcdc-supply = <&vcc_io>; - sdcard-supply = <&vccio_sd>; - wifi-supply = <&vcc_18>; - status = "okay"; -}; - -&pinctrl { - pcfg_output_high: pcfg-output-high { - output-high; - }; - - pcfg_output_low: pcfg-output-low { - output-low; - }; - - pcfg_pull_up_drv_12ma: pcfg-pull-up-drv-12ma { - bias-pull-up; - drive-strength = <12>; - }; - - act8846 { - pmic_int: pmic-int { - rockchip,pins = <0 4 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - pmic_sleep: pmic-sleep { - rockchip,pins = <0 0 RK_FUNC_GPIO &pcfg_output_low>; - }; - - pmic_vsel: pmic-vsel { - rockchip,pins = <7 1 RK_FUNC_GPIO &pcfg_output_low>; - }; - }; - - gmac { - phy_int: phy-int { - rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - phy_pmeb: phy-pmeb { - rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - phy_rst: phy-rst { - rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>; - }; - }; - - leds { - led_ctl: led-ctl { - rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - sdmmc { - /* - * Default drive strength isn't enough to achieve even - * high-speed mode on firefly board so bump up to 12ma. - */ - sdmmc_bus4: sdmmc-bus4 { - rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_12ma>, - <6 17 RK_FUNC_1 &pcfg_pull_up_drv_12ma>, - <6 18 RK_FUNC_1 &pcfg_pull_up_drv_12ma>, - <6 19 RK_FUNC_1 &pcfg_pull_up_drv_12ma>; - }; - - sdmmc_clk: sdmmc-clk { - rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_12ma>; - }; - - sdmmc_cmd: sdmmc-cmd { - rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_12ma>; - }; - - sdmmc_pwr: sdmmc-pwr { - rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb_host { - host_vbus_drv: host-vbus-drv { - rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&saradc { - vref-supply = <&vcc_18>; - status = "okay"; -}; - -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - card-detect-delay = <200>; - disable-wp; - num-slots = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>; - vmmc-supply = <&vcc_sd>; - vqmmc-supply = <&vccio_sd>; - status = "okay"; -}; - -&tsadc { - rockchip,hw-tshut-mode = <0>; - rockchip,hw-tshut-polarity = <0>; - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&uart3 { - status = "okay"; -}; - -&usbphy { - status = "okay"; -}; - -&usb_host1 { - vbus-supply = <&vcc_host>; - status = "okay"; -}; - -&vopb { - status = "okay"; -}; - -&vopb_mmu { - status = "okay"; -}; - -&vopl { - status = "okay"; -}; - -&vopl_mmu { - status = "okay"; -}; - -&wdt { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3288-tinker-s-u-boot.dtsi b/arch/arm/dts/rk3288-tinker-s-u-boot.dtsi index b4c5483146a..614d47ce180 100644 --- a/arch/arm/dts/rk3288-tinker-s-u-boot.dtsi +++ b/arch/arm/dts/rk3288-tinker-s-u-boot.dtsi @@ -15,20 +15,25 @@ &emmc { bootph-pre-ram; + bootph-some-ram; }; -&emmc_clk { +&emmc_bus8 { bootph-pre-ram; + bootph-some-ram; }; -&emmc_cmd { +&emmc_clk { bootph-pre-ram; + bootph-some-ram; }; -&emmc_pwr { +&emmc_cmd { bootph-pre-ram; + bootph-some-ram; }; -&emmc_bus8 { +&emmc_pwr { bootph-pre-ram; + bootph-some-ram; }; diff --git a/arch/arm/dts/rk3288-tinker-s.dts b/arch/arm/dts/rk3288-tinker-s.dts deleted file mode 100644 index cc7ac5f8811..00000000000 --- a/arch/arm/dts/rk3288-tinker-s.dts +++ /dev/null @@ -1,29 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. - */ - -/dts-v1/; - -#include "rk3288-tinker.dtsi" - -/ { - model = "Rockchip RK3288 Asus Tinker Board S"; - compatible = "asus,rk3288-tinker-s", "rockchip,rk3288"; - - chosen { - stdout-path = &uart2; - }; -}; - -&emmc { - bus-width = <8>; - cap-mmc-highspeed; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>; - max-frequency = <150000000>; - mmc-hs200-1_8v; - mmc-ddr-1_8v; - status = "okay"; -}; diff --git a/arch/arm/dts/rk3288-tinker-u-boot.dtsi b/arch/arm/dts/rk3288-tinker-u-boot.dtsi index 0cf1b696d16..a6f6f14df93 100644 --- a/arch/arm/dts/rk3288-tinker-u-boot.dtsi +++ b/arch/arm/dts/rk3288-tinker-u-boot.dtsi @@ -6,7 +6,6 @@ #include "rk3288-u-boot.dtsi" &dmc { - bootph-all; rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d 0x6 0x0 0x8 0x4 0x17 0x24 0xd 0x6 0x4 0x8 0x4 0x76 0x4 0x0 0x30 0x0 @@ -17,6 +16,14 @@ rockchip,sdram-params = <0x20d266a4 0x5b6 2 533000000 6 9 0>; }; +&gmac { + snps,reset-delays-us = <0 10000 80000>; +}; + +&gpio7 { + /delete-property/ bootph-all; +}; + &i2c2 { m24c08@50 { compatible = "at,24c08", "i2c-eeprom"; @@ -24,62 +31,54 @@ }; }; -&pinctrl { - bootph-all; -}; - -&uart2 { - bootph-all; -}; - -&uart2_xfer { +&pcfg_pull_none { bootph-all; }; -&sdmmc { - bootph-pre-ram; -}; - -&gpio7 { - bootph-pre-ram; -}; - -&vcc_sd { - bootph-pre-ram; -}; - &pcfg_pull_none_drv_8ma { bootph-pre-ram; + bootph-some-ram; }; -&pcfg_pull_up_drv_8ma { - bootph-pre-ram; +&pcfg_pull_up { + bootph-all; }; -&pcfg_pull_none { +&pcfg_pull_up_drv_8ma { bootph-pre-ram; + bootph-some-ram; }; -&pcfg_pull_up { +&sdmmc { bootph-pre-ram; + bootph-some-ram; }; &sdmmc_bus4 { bootph-pre-ram; + bootph-some-ram; }; &sdmmc_cd { bootph-pre-ram; + bootph-some-ram; }; &sdmmc_clk { bootph-pre-ram; + bootph-some-ram; }; &sdmmc_cmd { bootph-pre-ram; + bootph-some-ram; }; -&sdmmc_pwr { +&uart2 { + bootph-all; +}; + +&uart2_xfer { + bootph-pre-sram; bootph-pre-ram; }; diff --git a/arch/arm/dts/rk3288-tinker.dts b/arch/arm/dts/rk3288-tinker.dts deleted file mode 100644 index 8b1848c310e..00000000000 --- a/arch/arm/dts/rk3288-tinker.dts +++ /dev/null @@ -1,33 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR X11 -/* - * (C) Copyright 2016 Rockchip Electronics Co., Ltd - */ - -/dts-v1/; -#include "rk3288-tinker.dtsi" - -/ { - model = "Tinker-RK3288"; - compatible = "rockchip,rk3288-tinker", "rockchip,rk3288"; - - chosen { - stdout-path = &uart2; - }; -}; - -&pinctrl { - usb { - host_vbus_drv: host-vbus-drv { - rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pwm1 { - status = "okay"; -}; - -&usb_host1 { - vbus-supply = <&vcc5v0_host>; - status = "okay"; -}; diff --git a/arch/arm/dts/rk3288-tinker.dtsi b/arch/arm/dts/rk3288-tinker.dtsi deleted file mode 100644 index 62b4beb2510..00000000000 --- a/arch/arm/dts/rk3288-tinker.dtsi +++ /dev/null @@ -1,533 +0,0 @@ -/* - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include <dt-bindings/input/input.h> -#include "rk3288.dtsi" - -/ { - memory { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x80000000>; - }; - - ext_gmac: external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "ext_gmac"; - #clock-cells = <0>; - }; - - gpio-keys { - compatible = "gpio-keys"; - autorepeat; - - pinctrl-names = "default"; - pinctrl-0 = <&pwrbtn>; - - button@0 { - gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; - label = "GPIO Key Power"; - linux,code = <KEY_POWER>; - linux,input-type = <1>; - gpio-key,wakeup = <1>; - debounce-interval = <100>; - }; - }; - - gpio-leds { - compatible = "gpio-leds"; - - pwr-led { - gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "default-on"; - }; - - act-led { - gpios=<&gpio2 3 GPIO_ACTIVE_LOW>; - linux,default-trigger="mmc0"; - }; - }; - - vcc_sys: vsys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_sys"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - regulator-boot-on; - }; - - /* - * NOTE: vcc_sd isn't hooked up on v1.0 boards where power comes from - * vcc_io directly. Those boards won't be able to power cycle SD cards - * but it shouldn't hurt to toggle this pin there anyway. - */ - vcc_sd: sdmmc-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio7 11 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_pwr>; - regulator-name = "vcc_sd"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - startup-delay-us = <100000>; - vin-supply = <&vcc_io>; - }; - - vcc5v0_host: usb-host-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&host_vbus_drv>; - regulator-name = "vcc5v0_host"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - }; -}; - -&cpu0 { - cpu0-supply = <&vdd_cpu>; -}; - -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - card-detect-delay = <200>; - disable-wp; /* wp not hooked up */ - num-slots = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; - status = "okay"; - supports-sd; - vmmc-supply = <&vcc_sd>; - vqmmc-supply = <&vccio_sd>; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&gmac { - phy-supply = <&vcc33_lan>; - phy-mode = "rgmii"; - clock_in_out = "input"; - snps,reset-gpio = <&gpio4 7 0>; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 1000000>; - assigned-clocks = <&cru SCLK_MAC>; - assigned-clock-parents = <&ext_gmac>; - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; - tx_delay = <0x30>; - rx_delay = <0x10>; - status = "okay"; -}; - -&hdmi { - ddc-i2c-bus = <&i2c5>; - status = "okay"; -}; - -&i2c0 { - status = "okay"; - clock-frequency = <400000>; - - rk808: pmic@1b { - compatible = "rockchip,rk808"; - reg = <0x1b>; - interrupt-parent = <&gpio0>; - interrupts = <4 IRQ_TYPE_LEVEL_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int &global_pwroff>; - rockchip,system-power-controller; - wakeup-source; - #clock-cells = <1>; - clock-output-names = "xin32k", "rk808-clkout2"; - - vcc1-supply = <&vcc_sys>; - vcc2-supply = <&vcc_sys>; - vcc3-supply = <&vcc_sys>; - vcc4-supply = <&vcc_sys>; - vcc6-supply = <&vcc_sys>; - vcc7-supply = <&vcc_sys>; - vcc8-supply = <&vcc_18>; - vcc9-supply = <&vcc_io>; - vcc10-supply = <&vcc_io>; - vcc11-supply = <&vcc_sys>; - vcc12-supply = <&vcc_io>; - vddio-supply = <&vcc18_ldo1>; - - regulators { - vdd_cpu: DCDC_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-name = "vdd_arm"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: DCDC_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <1250000>; - regulator-name = "vdd_gpu"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vcc_ddr"; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_io: DCDC_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc_io"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcc18_ldo1: LDO_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc18_ldo1"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc33_mipi: LDO_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc33_mipi"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_10: LDO_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-name = "vdd_10"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - - vcc18_codec: LDO_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc18_codec"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vccio_sd: LDO_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vccio_sd"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vdd10_lcd: LDO_REG6 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-name = "vdd10_lcd"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - - vcc_18: LDO_REG7 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc_18"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc18_lcd: LDO_REG8 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc18_lcd"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc33_sd: SWITCH_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vcc33_sd"; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc33_lan: SWITCH_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vcc33_lan"; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - }; - }; -}; - -&i2c2 { - status = "okay"; - headset: nau8825@1a { - compatible = "nuvoton,nau8825"; - #sound-dai-cells = <0>; - reg = <0x1a>; - interrupt-parent = <&gpio6>; - interrupts = <5 IRQ_TYPE_LEVEL_LOW>; - nuvoton,jkdet-enable = <1>; - nuvoton,jkdet-pull-enable = <1>; - nuvoton,jkdet-pull-up = <0>; - nuvoton,jkdet-polarity = <1>; - nuvoton,vref-impedance = <2>; - nuvoton,micbias-voltage = <6>; - nuvoton,sar-threshold-num = <4>; - nuvoton,sar-threshold = <0xa 0x14 0x26 0x73>; - nuvoton,sar-hysteresis = <0>; - nuvoton,sar-voltage = <6>; - nuvoton,sar-compare-time = <0>; - nuvoton,sar-sampling-time = <0>; - nuvoton,short-key-debounce = <3>; - nuvoton,jack-insert-debounce = <7>; - nuvoton,jack-eject-debounce = <7>; - clock-names = "mclk"; - clocks = <&cru SCLK_I2S0_OUT>; - }; -}; - -&i2c5 { - status = "okay"; -}; - -&wdt { - status = "okay"; -}; - -&pwm0 { - status = "okay"; -}; - -&saradc { - vref-supply = <&vcc18_ldo1>; - status ="okay"; -}; - -&uart0 { - status = "okay"; -}; - -&uart1 { - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&uart3 { - status = "okay"; -}; - -&uart4 { - status = "okay"; -}; - -&tsadc { - rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ - rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ - status = "okay"; -}; - -&usbphy { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host1 { - status = "okay"; -}; - -&usb_otg { - status= "okay"; -}; - -&vopb { - status = "okay"; -}; - -&vopb_mmu { - status = "okay"; -}; - -&vopl { - status = "okay"; -}; - -&vopl_mmu { - status = "okay"; -}; - -&pinctrl { - pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma { - drive-strength = <8>; - }; - - pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma { - bias-pull-up; - drive-strength = <8>; - }; - - backlight { - bl_en: bl-en { - rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - buttons { - pwrbtn: pwrbtn { - rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - eth_phy { - eth_phy_pwr: eth-phy-pwr { - rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int: pmic-int { - rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - sdmmc { - /* - * Default drive strength isn't enough to achieve even - * high-speed mode on EVB board so bump up to 8ma. - */ - sdmmc_bus4: sdmmc-bus4 { - rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, - <6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, - <6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, - <6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>; - }; - - sdmmc_clk: sdmmc-clk { - rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>; - }; - - sdmmc_cmd: sdmmc-cmd { - rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>; - }; - - sdmmc_pwr: sdmmc-pwr { - rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb { - host_vbus_drv: host-vbus-drv { - rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - pwr_3g: pwr-3g { - rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi index a43d320ade7..2205caabc51 100644 --- a/arch/arm/dts/rk3288-u-boot.dtsi +++ b/arch/arm/dts/rk3288-u-boot.dtsi @@ -7,15 +7,6 @@ / { aliases { - gpio0 = &gpio0; - gpio1 = &gpio1; - gpio2 = &gpio2; - gpio3 = &gpio3; - gpio4 = &gpio4; - gpio5 = &gpio5; - gpio6 = &gpio6; - gpio7 = &gpio7; - gpio8 = &gpio8; mmc0 = &emmc; mmc1 = &sdmmc; mmc2 = &sdio0; @@ -128,11 +119,11 @@ }; &vopb { - bootph-all; + bootph-some-ram; }; &vopl { - bootph-all; + bootph-some-ram; }; &xin24m { diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi deleted file mode 100644 index ead343dc3df..00000000000 --- a/arch/arm/dts/rk3288.dtsi +++ /dev/null @@ -1,2035 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/pinctrl/rockchip.h> -#include <dt-bindings/clock/rk3288-cru.h> -#include <dt-bindings/power/rk3288-power.h> -#include <dt-bindings/thermal/thermal.h> -#include <dt-bindings/soc/rockchip,boot-mode.h> - -/ { - #address-cells = <2>; - #size-cells = <2>; - - compatible = "rockchip,rk3288"; - - interrupt-parent = <&gic>; - - aliases { - ethernet0 = &gmac; - gpio0 = &gpio0; - gpio1 = &gpio1; - gpio2 = &gpio2; - gpio3 = &gpio3; - gpio4 = &gpio4; - gpio5 = &gpio5; - gpio6 = &gpio6; - gpio7 = &gpio7; - gpio8 = &gpio8; - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &i2c4; - i2c5 = &i2c5; - mshc0 = &emmc; - mshc1 = &sdmmc; - mshc2 = &sdio0; - mshc3 = &sdio1; - serial0 = &uart0; - serial1 = &uart1; - serial2 = &uart2; - serial3 = &uart3; - serial4 = &uart4; - spi0 = &spi0; - spi1 = &spi1; - spi2 = &spi2; - }; - - arm-pmu { - compatible = "arm,cortex-a12-pmu"; - interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - enable-method = "rockchip,rk3066-smp"; - rockchip,pmu = <&pmu>; - - cpu0: cpu@500 { - device_type = "cpu"; - compatible = "arm,cortex-a12"; - reg = <0x500>; - resets = <&cru SRST_CORE0>; - operating-points-v2 = <&cpu_opp_table>; - #cooling-cells = <2>; /* min followed by max */ - clock-latency = <40000>; - clocks = <&cru ARMCLK>; - dynamic-power-coefficient = <370>; - }; - cpu1: cpu@501 { - device_type = "cpu"; - compatible = "arm,cortex-a12"; - reg = <0x501>; - resets = <&cru SRST_CORE1>; - operating-points-v2 = <&cpu_opp_table>; - #cooling-cells = <2>; /* min followed by max */ - clock-latency = <40000>; - clocks = <&cru ARMCLK>; - dynamic-power-coefficient = <370>; - }; - cpu2: cpu@502 { - device_type = "cpu"; - compatible = "arm,cortex-a12"; - reg = <0x502>; - resets = <&cru SRST_CORE2>; - operating-points-v2 = <&cpu_opp_table>; - #cooling-cells = <2>; /* min followed by max */ - clock-latency = <40000>; - clocks = <&cru ARMCLK>; - dynamic-power-coefficient = <370>; - }; - cpu3: cpu@503 { - device_type = "cpu"; - compatible = "arm,cortex-a12"; - reg = <0x503>; - resets = <&cru SRST_CORE3>; - operating-points-v2 = <&cpu_opp_table>; - #cooling-cells = <2>; /* min followed by max */ - clock-latency = <40000>; - clocks = <&cru ARMCLK>; - dynamic-power-coefficient = <370>; - }; - }; - - cpu_opp_table: opp-table-0 { - compatible = "operating-points-v2"; - opp-shared; - - opp-126000000 { - opp-hz = /bits/ 64 <126000000>; - opp-microvolt = <900000>; - }; - opp-216000000 { - opp-hz = /bits/ 64 <216000000>; - opp-microvolt = <900000>; - }; - opp-312000000 { - opp-hz = /bits/ 64 <312000000>; - opp-microvolt = <900000>; - }; - opp-408000000 { - opp-hz = /bits/ 64 <408000000>; - opp-microvolt = <900000>; - }; - opp-600000000 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <900000>; - }; - opp-696000000 { - opp-hz = /bits/ 64 <696000000>; - opp-microvolt = <950000>; - }; - opp-816000000 { - opp-hz = /bits/ 64 <816000000>; - opp-microvolt = <1000000>; - }; - opp-1008000000 { - opp-hz = /bits/ 64 <1008000000>; - opp-microvolt = <1050000>; - }; - opp-1200000000 { - opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <1100000>; - }; - opp-1416000000 { - opp-hz = /bits/ 64 <1416000000>; - opp-microvolt = <1200000>; - }; - opp-1512000000 { - opp-hz = /bits/ 64 <1512000000>; - opp-microvolt = <1300000>; - }; - opp-1608000000 { - opp-hz = /bits/ 64 <1608000000>; - opp-microvolt = <1350000>; - }; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - /* - * The rk3288 cannot use the memory area above 0xfe000000 - * for dma operations for some reason. While there is - * probably a better solution available somewhere, we - * haven't found it yet and while devices with 2GB of ram - * are not affected, this issue prevents 4GB from booting. - * So to make these devices at least bootable, block - * this area for the time being until the real solution - * is found. - */ - dma-unusable@fe000000 { - reg = <0x0 0xfe000000 0x0 0x1000000>; - }; - }; - - xin24m: oscillator { - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "xin24m"; - #clock-cells = <0>; - }; - - timer { - compatible = "arm,armv7-timer"; - arm,cpu-registers-not-fw-configured; - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; - clock-frequency = <24000000>; - arm,no-tick-in-suspend; - }; - - timer: timer@ff810000 { - compatible = "rockchip,rk3288-timer"; - reg = <0x0 0xff810000 0x0 0x20>; - interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_TIMER>, <&xin24m>; - clock-names = "pclk", "timer"; - }; - - display-subsystem { - compatible = "rockchip,display-subsystem"; - ports = <&vopl_out>, <&vopb_out>; - }; - - sdmmc: mmc@ff0c0000 { - compatible = "rockchip,rk3288-dw-mshc"; - max-frequency = <150000000>; - clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, - <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0 0xff0c0000 0x0 0x4000>; - resets = <&cru SRST_MMC0>; - reset-names = "reset"; - status = "disabled"; - }; - - sdio0: mmc@ff0d0000 { - compatible = "rockchip,rk3288-dw-mshc"; - max-frequency = <150000000>; - clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>, - <&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0 0xff0d0000 0x0 0x4000>; - resets = <&cru SRST_SDIO0>; - reset-names = "reset"; - status = "disabled"; - }; - - sdio1: mmc@ff0e0000 { - compatible = "rockchip,rk3288-dw-mshc"; - max-frequency = <150000000>; - clocks = <&cru HCLK_SDIO1>, <&cru SCLK_SDIO1>, - <&cru SCLK_SDIO1_DRV>, <&cru SCLK_SDIO1_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0 0xff0e0000 0x0 0x4000>; - resets = <&cru SRST_SDIO1>; - reset-names = "reset"; - status = "disabled"; - }; - - emmc: mmc@ff0f0000 { - compatible = "rockchip,rk3288-dw-mshc"; - max-frequency = <150000000>; - clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>, - <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0 0xff0f0000 0x0 0x4000>; - resets = <&cru SRST_EMMC>; - reset-names = "reset"; - status = "disabled"; - }; - - saradc: saradc@ff100000 { - compatible = "rockchip,saradc"; - reg = <0x0 0xff100000 0x0 0x100>; - interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; - #io-channel-cells = <1>; - clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>; - clock-names = "saradc", "apb_pclk"; - resets = <&cru SRST_SARADC>; - reset-names = "saradc-apb"; - status = "disabled"; - }; - - spi0: spi@ff110000 { - compatible = "rockchip,rk3288-spi", "rockchip,rk3066-spi"; - clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>; - clock-names = "spiclk", "apb_pclk"; - dmas = <&dmac_peri 11>, <&dmac_peri 12>; - dma-names = "tx", "rx"; - interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>; - reg = <0x0 0xff110000 0x0 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi1: spi@ff120000 { - compatible = "rockchip,rk3288-spi", "rockchip,rk3066-spi"; - clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>; - clock-names = "spiclk", "apb_pclk"; - dmas = <&dmac_peri 13>, <&dmac_peri 14>; - dma-names = "tx", "rx"; - interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>; - reg = <0x0 0xff120000 0x0 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi2: spi@ff130000 { - compatible = "rockchip,rk3288-spi", "rockchip,rk3066-spi"; - clocks = <&cru SCLK_SPI2>, <&cru PCLK_SPI2>; - clock-names = "spiclk", "apb_pclk"; - dmas = <&dmac_peri 15>, <&dmac_peri 16>; - dma-names = "tx", "rx"; - interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>; - reg = <0x0 0xff130000 0x0 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c1: i2c@ff140000 { - compatible = "rockchip,rk3288-i2c"; - reg = <0x0 0xff140000 0x0 0x1000>; - interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - clock-names = "i2c"; - clocks = <&cru PCLK_I2C1>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_xfer>; - status = "disabled"; - }; - - i2c3: i2c@ff150000 { - compatible = "rockchip,rk3288-i2c"; - reg = <0x0 0xff150000 0x0 0x1000>; - interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - clock-names = "i2c"; - clocks = <&cru PCLK_I2C3>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c3_xfer>; - status = "disabled"; - }; - - i2c4: i2c@ff160000 { - compatible = "rockchip,rk3288-i2c"; - reg = <0x0 0xff160000 0x0 0x1000>; - interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - clock-names = "i2c"; - clocks = <&cru PCLK_I2C4>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c4_xfer>; - status = "disabled"; - }; - - i2c5: i2c@ff170000 { - compatible = "rockchip,rk3288-i2c"; - reg = <0x0 0xff170000 0x0 0x1000>; - interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - clock-names = "i2c"; - clocks = <&cru PCLK_I2C5>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c5_xfer>; - status = "disabled"; - }; - - uart0: serial@ff180000 { - compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart"; - reg = <0x0 0xff180000 0x0 0x100>; - interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac_peri 1>, <&dmac_peri 2>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer>; - status = "disabled"; - }; - - uart1: serial@ff190000 { - compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart"; - reg = <0x0 0xff190000 0x0 0x100>; - interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac_peri 3>, <&dmac_peri 4>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&uart1_xfer>; - status = "disabled"; - }; - - uart2: serial@ff690000 { - compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart"; - reg = <0x0 0xff690000 0x0 0x100>; - interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>; - clock-names = "baudclk", "apb_pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&uart2_xfer>; - status = "disabled"; - }; - - uart3: serial@ff1b0000 { - compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart"; - reg = <0x0 0xff1b0000 0x0 0x100>; - interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac_peri 7>, <&dmac_peri 8>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&uart3_xfer>; - status = "disabled"; - }; - - uart4: serial@ff1c0000 { - compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart"; - reg = <0x0 0xff1c0000 0x0 0x100>; - interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac_peri 9>, <&dmac_peri 10>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&uart4_xfer>; - status = "disabled"; - }; - - dmac_peri: dma-controller@ff250000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xff250000 0x0 0x4000>; - interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; - #dma-cells = <1>; - arm,pl330-broken-no-flushp; - arm,pl330-periph-burst; - clocks = <&cru ACLK_DMAC2>; - clock-names = "apb_pclk"; - }; - - thermal-zones { - reserve_thermal: reserve-thermal { - polling-delay-passive = <1000>; /* milliseconds */ - polling-delay = <5000>; /* milliseconds */ - - thermal-sensors = <&tsadc 0>; - }; - - cpu_thermal: cpu-thermal { - polling-delay-passive = <100>; /* milliseconds */ - polling-delay = <5000>; /* milliseconds */ - - thermal-sensors = <&tsadc 1>; - - trips { - cpu_alert0: cpu_alert0 { - temperature = <70000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "passive"; - }; - cpu_alert1: cpu_alert1 { - temperature = <75000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "passive"; - }; - cpu_crit: cpu_crit { - temperature = <90000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&cpu_alert0>; - cooling-device = - <&cpu0 THERMAL_NO_LIMIT 6>, - <&cpu1 THERMAL_NO_LIMIT 6>, - <&cpu2 THERMAL_NO_LIMIT 6>, - <&cpu3 THERMAL_NO_LIMIT 6>; - }; - map1 { - trip = <&cpu_alert1>; - cooling-device = - <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; - - gpu_thermal: gpu-thermal { - polling-delay-passive = <100>; /* milliseconds */ - polling-delay = <5000>; /* milliseconds */ - - thermal-sensors = <&tsadc 2>; - - trips { - gpu_alert0: gpu_alert0 { - temperature = <70000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "passive"; - }; - gpu_crit: gpu_crit { - temperature = <90000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&gpu_alert0>; - cooling-device = - <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; - }; - - tsadc: tsadc@ff280000 { - compatible = "rockchip,rk3288-tsadc"; - reg = <0x0 0xff280000 0x0 0x100>; - interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; - clock-names = "tsadc", "apb_pclk"; - resets = <&cru SRST_TSADC>; - reset-names = "tsadc-apb"; - pinctrl-names = "init", "default", "sleep"; - pinctrl-0 = <&otp_pin>; - pinctrl-1 = <&otp_out>; - pinctrl-2 = <&otp_pin>; - #thermal-sensor-cells = <1>; - rockchip,grf = <&grf>; - rockchip,hw-tshut-temp = <95000>; - status = "disabled"; - }; - - gmac: ethernet@ff290000 { - compatible = "rockchip,rk3288-gmac"; - reg = <0x0 0xff290000 0x0 0x10000>; - interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "macirq", "eth_wake_irq"; - rockchip,grf = <&grf>; - clocks = <&cru SCLK_MAC>, - <&cru SCLK_MAC_RX>, <&cru SCLK_MAC_TX>, - <&cru SCLK_MACREF>, <&cru SCLK_MACREF_OUT>, - <&cru ACLK_GMAC>, <&cru PCLK_GMAC>; - clock-names = "stmmaceth", - "mac_clk_rx", "mac_clk_tx", - "clk_mac_ref", "clk_mac_refout", - "aclk_mac", "pclk_mac"; - resets = <&cru SRST_MAC>; - reset-names = "stmmaceth"; - status = "disabled"; - }; - - usb_host0_ehci: usb@ff500000 { - compatible = "generic-ehci"; - reg = <0x0 0xff500000 0x0 0x100>; - interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_USBHOST0>; - phys = <&usbphy1>; - phy-names = "usb"; - status = "disabled"; - }; - - /* NOTE: doesn't work on RK3288, but was fixed on RK3288W */ - usb_host0_ohci: usb@ff520000 { - compatible = "generic-ohci"; - reg = <0x0 0xff520000 0x0 0x100>; - interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_USBHOST0>; - phys = <&usbphy1>; - phy-names = "usb"; - status = "disabled"; - }; - - usb_host1: usb@ff540000 { - compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb", - "snps,dwc2"; - reg = <0x0 0xff540000 0x0 0x40000>; - interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_USBHOST1>; - clock-names = "otg"; - dr_mode = "host"; - phys = <&usbphy2>; - phy-names = "usb2-phy"; - snps,reset-phy-on-wake; - status = "disabled"; - }; - - usb_otg: usb@ff580000 { - compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb", - "snps,dwc2"; - reg = <0x0 0xff580000 0x0 0x40000>; - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_OTG0>; - clock-names = "otg"; - dr_mode = "otg"; - g-np-tx-fifo-size = <16>; - g-rx-fifo-size = <275>; - g-tx-fifo-size = <256 128 128 64 64 32>; - phys = <&usbphy0>; - phy-names = "usb2-phy"; - status = "disabled"; - }; - - usb_hsic: usb@ff5c0000 { - compatible = "generic-ehci"; - reg = <0x0 0xff5c0000 0x0 0x100>; - interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_HSIC>; - status = "disabled"; - }; - - dmac_bus_ns: dma-controller@ff600000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xff600000 0x0 0x4000>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; - #dma-cells = <1>; - arm,pl330-broken-no-flushp; - arm,pl330-periph-burst; - clocks = <&cru ACLK_DMAC1>; - clock-names = "apb_pclk"; - status = "disabled"; - }; - - i2c0: i2c@ff650000 { - compatible = "rockchip,rk3288-i2c"; - reg = <0x0 0xff650000 0x0 0x1000>; - interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - clock-names = "i2c"; - clocks = <&cru PCLK_I2C0>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_xfer>; - status = "disabled"; - }; - - i2c2: i2c@ff660000 { - compatible = "rockchip,rk3288-i2c"; - reg = <0x0 0xff660000 0x0 0x1000>; - interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - clock-names = "i2c"; - clocks = <&cru PCLK_I2C2>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_xfer>; - status = "disabled"; - }; - - pwm0: pwm@ff680000 { - compatible = "rockchip,rk3288-pwm"; - reg = <0x0 0xff680000 0x0 0x10>; - #pwm-cells = <3>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_pin>; - clocks = <&cru PCLK_RKPWM>; - status = "disabled"; - }; - - pwm1: pwm@ff680010 { - compatible = "rockchip,rk3288-pwm"; - reg = <0x0 0xff680010 0x0 0x10>; - #pwm-cells = <3>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm1_pin>; - clocks = <&cru PCLK_RKPWM>; - status = "disabled"; - }; - - pwm2: pwm@ff680020 { - compatible = "rockchip,rk3288-pwm"; - reg = <0x0 0xff680020 0x0 0x10>; - #pwm-cells = <3>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm2_pin>; - clocks = <&cru PCLK_RKPWM>; - status = "disabled"; - }; - - pwm3: pwm@ff680030 { - compatible = "rockchip,rk3288-pwm"; - reg = <0x0 0xff680030 0x0 0x10>; - #pwm-cells = <3>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm3_pin>; - clocks = <&cru PCLK_RKPWM>; - status = "disabled"; - }; - - bus_intmem: sram@ff700000 { - compatible = "mmio-sram"; - reg = <0x0 0xff700000 0x0 0x18000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x0 0xff700000 0x18000>; - smp-sram@0 { - compatible = "rockchip,rk3066-smp-sram"; - reg = <0x00 0x10>; - }; - }; - - pmu_sram: sram@ff720000 { - compatible = "rockchip,rk3288-pmu-sram", "mmio-sram"; - reg = <0x0 0xff720000 0x0 0x1000>; - }; - - pmu: power-management@ff730000 { - compatible = "rockchip,rk3288-pmu", "syscon", "simple-mfd"; - reg = <0x0 0xff730000 0x0 0x100>; - - power: power-controller { - compatible = "rockchip,rk3288-power-controller"; - #power-domain-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - - assigned-clocks = <&cru SCLK_EDP_24M>; - assigned-clock-parents = <&xin24m>; - - /* - * Note: Although SCLK_* are the working clocks - * of device without including on the NOC, needed for - * synchronous reset. - * - * The clocks on the which NOC: - * ACLK_IEP/ACLK_VIP/ACLK_VOP0 are on ACLK_VIO0_NIU. - * ACLK_ISP/ACLK_VOP1 are on ACLK_VIO1_NIU. - * ACLK_RGA is on ACLK_RGA_NIU. - * The others (HCLK_*,PLCK_*) are on HCLK_VIO_NIU. - * - * Which clock are device clocks: - * clocks devices - * *_IEP IEP:Image Enhancement Processor - * *_ISP ISP:Image Signal Processing - * *_VIP VIP:Video Input Processor - * *_VOP* VOP:Visual Output Processor - * *_RGA RGA - * *_EDP* EDP - * *_LVDS_* LVDS - * *_HDMI HDMI - * *_MIPI_* MIPI - */ - power-domain@RK3288_PD_VIO { - reg = <RK3288_PD_VIO>; - clocks = <&cru ACLK_IEP>, - <&cru ACLK_ISP>, - <&cru ACLK_RGA>, - <&cru ACLK_VIP>, - <&cru ACLK_VOP0>, - <&cru ACLK_VOP1>, - <&cru DCLK_VOP0>, - <&cru DCLK_VOP1>, - <&cru HCLK_IEP>, - <&cru HCLK_ISP>, - <&cru HCLK_RGA>, - <&cru HCLK_VIP>, - <&cru HCLK_VOP0>, - <&cru HCLK_VOP1>, - <&cru PCLK_EDP_CTRL>, - <&cru PCLK_HDMI_CTRL>, - <&cru PCLK_LVDS_PHY>, - <&cru PCLK_MIPI_CSI>, - <&cru PCLK_MIPI_DSI0>, - <&cru PCLK_MIPI_DSI1>, - <&cru SCLK_EDP_24M>, - <&cru SCLK_EDP>, - <&cru SCLK_ISP_JPE>, - <&cru SCLK_ISP>, - <&cru SCLK_RGA>; - pm_qos = <&qos_vio0_iep>, - <&qos_vio1_vop>, - <&qos_vio1_isp_w0>, - <&qos_vio1_isp_w1>, - <&qos_vio0_vop>, - <&qos_vio0_vip>, - <&qos_vio2_rga_r>, - <&qos_vio2_rga_w>, - <&qos_vio1_isp_r>; - #power-domain-cells = <0>; - }; - - /* - * Note: The following 3 are HEVC(H.265) clocks, - * and on the ACLK_HEVC_NIU (NOC). - */ - power-domain@RK3288_PD_HEVC { - reg = <RK3288_PD_HEVC>; - clocks = <&cru ACLK_HEVC>, - <&cru SCLK_HEVC_CABAC>, - <&cru SCLK_HEVC_CORE>; - pm_qos = <&qos_hevc_r>, - <&qos_hevc_w>; - #power-domain-cells = <0>; - }; - - /* - * Note: ACLK_VCODEC/HCLK_VCODEC are VCODEC - * (video endecoder & decoder) clocks that on the - * ACLK_VCODEC_NIU and HCLK_VCODEC_NIU (NOC). - */ - power-domain@RK3288_PD_VIDEO { - reg = <RK3288_PD_VIDEO>; - clocks = <&cru ACLK_VCODEC>, - <&cru HCLK_VCODEC>; - pm_qos = <&qos_video>; - #power-domain-cells = <0>; - }; - - /* - * Note: ACLK_GPU is the GPU clock, - * and on the ACLK_GPU_NIU (NOC). - */ - power-domain@RK3288_PD_GPU { - reg = <RK3288_PD_GPU>; - clocks = <&cru ACLK_GPU>; - pm_qos = <&qos_gpu_r>, - <&qos_gpu_w>; - #power-domain-cells = <0>; - }; - }; - - reboot-mode { - compatible = "syscon-reboot-mode"; - offset = <0x94>; - mode-normal = <BOOT_NORMAL>; - mode-recovery = <BOOT_RECOVERY>; - mode-bootloader = <BOOT_FASTBOOT>; - mode-loader = <BOOT_BL_DOWNLOAD>; - }; - }; - - sgrf: syscon@ff740000 { - compatible = "rockchip,rk3288-sgrf", "syscon"; - reg = <0x0 0xff740000 0x0 0x1000>; - }; - - cru: clock-controller@ff760000 { - compatible = "rockchip,rk3288-cru"; - reg = <0x0 0xff760000 0x0 0x1000>; - clocks = <&xin24m>; - clock-names = "xin24m"; - rockchip,grf = <&grf>; - #clock-cells = <1>; - #reset-cells = <1>; - assigned-clocks = <&cru PLL_GPLL>, <&cru PLL_CPLL>, - <&cru PLL_NPLL>, <&cru ACLK_CPU>, - <&cru HCLK_CPU>, <&cru PCLK_CPU>, - <&cru ACLK_PERI>, <&cru HCLK_PERI>, - <&cru PCLK_PERI>; - assigned-clock-rates = <594000000>, <400000000>, - <500000000>, <300000000>, - <150000000>, <75000000>, - <300000000>, <150000000>, - <75000000>; - }; - - grf: syscon@ff770000 { - compatible = "rockchip,rk3288-grf", "syscon", "simple-mfd"; - reg = <0x0 0xff770000 0x0 0x1000>; - - edp_phy: edp-phy { - compatible = "rockchip,rk3288-dp-phy"; - clocks = <&cru SCLK_EDP_24M>; - clock-names = "24m"; - #phy-cells = <0>; - status = "disabled"; - }; - - io_domains: io-domains { - compatible = "rockchip,rk3288-io-voltage-domain"; - status = "disabled"; - }; - - usbphy: usbphy { - compatible = "rockchip,rk3288-usb-phy"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - - usbphy0: usb-phy@320 { - #phy-cells = <0>; - reg = <0x320>; - clocks = <&cru SCLK_OTGPHY0>; - clock-names = "phyclk"; - #clock-cells = <0>; - resets = <&cru SRST_USBOTG_PHY>; - reset-names = "phy-reset"; - }; - - usbphy1: usb-phy@334 { - #phy-cells = <0>; - reg = <0x334>; - clocks = <&cru SCLK_OTGPHY1>; - clock-names = "phyclk"; - #clock-cells = <0>; - resets = <&cru SRST_USBHOST0_PHY>; - reset-names = "phy-reset"; - }; - - usbphy2: usb-phy@348 { - #phy-cells = <0>; - reg = <0x348>; - clocks = <&cru SCLK_OTGPHY2>; - clock-names = "phyclk"; - #clock-cells = <0>; - resets = <&cru SRST_USBHOST1_PHY>; - reset-names = "phy-reset"; - }; - }; - }; - - wdt: watchdog@ff800000 { - compatible = "rockchip,rk3288-wdt", "snps,dw-wdt"; - reg = <0x0 0xff800000 0x0 0x100>; - clocks = <&cru PCLK_WDT>; - interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; - - spdif: sound@ff8b0000 { - compatible = "rockchip,rk3288-spdif", "rockchip,rk3066-spdif"; - reg = <0x0 0xff8b0000 0x0 0x10000>; - #sound-dai-cells = <0>; - clocks = <&cru SCLK_SPDIF8CH>, <&cru HCLK_SPDIF8CH>; - clock-names = "mclk", "hclk"; - dmas = <&dmac_bus_s 3>; - dma-names = "tx"; - interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&spdif_tx>; - rockchip,grf = <&grf>; - status = "disabled"; - }; - - i2s: i2s@ff890000 { - compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s"; - reg = <0x0 0xff890000 0x0 0x10000>; - #sound-dai-cells = <0>; - interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>; - clock-names = "i2s_clk", "i2s_hclk"; - dmas = <&dmac_bus_s 0>, <&dmac_bus_s 1>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&i2s0_bus>; - rockchip,playback-channels = <8>; - rockchip,capture-channels = <2>; - status = "disabled"; - }; - - crypto: crypto@ff8a0000 { - compatible = "rockchip,rk3288-crypto"; - reg = <0x0 0xff8a0000 0x0 0x4000>; - interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>, - <&cru SCLK_CRYPTO>, <&cru ACLK_DMAC1>; - clock-names = "aclk", "hclk", "sclk", "apb_pclk"; - resets = <&cru SRST_CRYPTO>; - reset-names = "crypto-rst"; - }; - - iep_mmu: iommu@ff900800 { - compatible = "rockchip,iommu"; - reg = <0x0 0xff900800 0x0 0x40>; - interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; - clock-names = "aclk", "iface"; - #iommu-cells = <0>; - status = "disabled"; - }; - - isp_mmu: iommu@ff914000 { - compatible = "rockchip,iommu"; - reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>; - interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>; - clock-names = "aclk", "iface"; - #iommu-cells = <0>; - rockchip,disable-mmu-reset; - status = "disabled"; - }; - - rga: rga@ff920000 { - compatible = "rockchip,rk3288-rga"; - reg = <0x0 0xff920000 0x0 0x180>; - interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>; - clock-names = "aclk", "hclk", "sclk"; - power-domains = <&power RK3288_PD_VIO>; - resets = <&cru SRST_RGA_CORE>, <&cru SRST_RGA_AXI>, <&cru SRST_RGA_AHB>; - reset-names = "core", "axi", "ahb"; - }; - - vopb: vop@ff930000 { - compatible = "rockchip,rk3288-vop"; - reg = <0x0 0xff930000 0x0 0x19c>, <0x0 0xff931000 0x0 0x1000>; - interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>; - clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; - power-domains = <&power RK3288_PD_VIO>; - resets = <&cru SRST_LCDC0_AXI>, <&cru SRST_LCDC0_AHB>, <&cru SRST_LCDC0_DCLK>; - reset-names = "axi", "ahb", "dclk"; - iommus = <&vopb_mmu>; - status = "disabled"; - - vopb_out: port { - #address-cells = <1>; - #size-cells = <0>; - - vopb_out_hdmi: endpoint@0 { - reg = <0>; - remote-endpoint = <&hdmi_in_vopb>; - }; - - vopb_out_edp: endpoint@1 { - reg = <1>; - remote-endpoint = <&edp_in_vopb>; - }; - - vopb_out_mipi: endpoint@2 { - reg = <2>; - remote-endpoint = <&mipi_in_vopb>; - }; - - vopb_out_lvds: endpoint@3 { - reg = <3>; - remote-endpoint = <&lvds_in_vopb>; - }; - }; - }; - - vopb_mmu: iommu@ff930300 { - compatible = "rockchip,iommu"; - reg = <0x0 0xff930300 0x0 0x100>; - interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>; - clock-names = "aclk", "iface"; - power-domains = <&power RK3288_PD_VIO>; - #iommu-cells = <0>; - status = "disabled"; - }; - - vopl: vop@ff940000 { - compatible = "rockchip,rk3288-vop"; - reg = <0x0 0xff940000 0x0 0x19c>, <0x0 0xff941000 0x0 0x1000>; - interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>; - clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; - power-domains = <&power RK3288_PD_VIO>; - resets = <&cru SRST_LCDC1_AXI>, <&cru SRST_LCDC1_AHB>, <&cru SRST_LCDC1_DCLK>; - reset-names = "axi", "ahb", "dclk"; - iommus = <&vopl_mmu>; - status = "disabled"; - - vopl_out: port { - #address-cells = <1>; - #size-cells = <0>; - - vopl_out_hdmi: endpoint@0 { - reg = <0>; - remote-endpoint = <&hdmi_in_vopl>; - }; - - vopl_out_edp: endpoint@1 { - reg = <1>; - remote-endpoint = <&edp_in_vopl>; - }; - - vopl_out_mipi: endpoint@2 { - reg = <2>; - remote-endpoint = <&mipi_in_vopl>; - }; - - vopl_out_lvds: endpoint@3 { - reg = <3>; - remote-endpoint = <&lvds_in_vopl>; - }; - }; - }; - - vopl_mmu: iommu@ff940300 { - compatible = "rockchip,iommu"; - reg = <0x0 0xff940300 0x0 0x100>; - interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; - clock-names = "aclk", "iface"; - power-domains = <&power RK3288_PD_VIO>; - #iommu-cells = <0>; - status = "disabled"; - }; - - mipi_dsi: dsi@ff960000 { - compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi"; - reg = <0x0 0xff960000 0x0 0x4000>; - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_DSI0>; - clock-names = "ref", "pclk"; - power-domains = <&power RK3288_PD_VIO>; - rockchip,grf = <&grf>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - mipi_in: port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - mipi_in_vopb: endpoint@0 { - reg = <0>; - remote-endpoint = <&vopb_out_mipi>; - }; - - mipi_in_vopl: endpoint@1 { - reg = <1>; - remote-endpoint = <&vopl_out_mipi>; - }; - }; - - mipi_out: port@1 { - reg = <1>; - }; - }; - }; - - lvds: lvds@ff96c000 { - compatible = "rockchip,rk3288-lvds"; - reg = <0x0 0xff96c000 0x0 0x4000>; - clocks = <&cru PCLK_LVDS_PHY>; - clock-names = "pclk_lvds"; - pinctrl-names = "lcdc"; - pinctrl-0 = <&lcdc_ctl>; - power-domains = <&power RK3288_PD_VIO>; - rockchip,grf = <&grf>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - lvds_in: port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - lvds_in_vopb: endpoint@0 { - reg = <0>; - remote-endpoint = <&vopb_out_lvds>; - }; - - lvds_in_vopl: endpoint@1 { - reg = <1>; - remote-endpoint = <&vopl_out_lvds>; - }; - }; - - lvds_out: port@1 { - reg = <1>; - }; - }; - }; - - edp: dp@ff970000 { - compatible = "rockchip,rk3288-dp"; - reg = <0x0 0xff970000 0x0 0x4000>; - interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_EDP>, <&cru PCLK_EDP_CTRL>; - clock-names = "dp", "pclk"; - phys = <&edp_phy>; - phy-names = "dp"; - power-domains = <&power RK3288_PD_VIO>; - resets = <&cru SRST_EDP>; - reset-names = "dp"; - rockchip,grf = <&grf>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - edp_in: port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - edp_in_vopb: endpoint@0 { - reg = <0>; - remote-endpoint = <&vopb_out_edp>; - }; - - edp_in_vopl: endpoint@1 { - reg = <1>; - remote-endpoint = <&vopl_out_edp>; - }; - }; - - edp_out: port@1 { - reg = <1>; - }; - }; - }; - - hdmi: hdmi@ff980000 { - compatible = "rockchip,rk3288-dw-hdmi"; - reg = <0x0 0xff980000 0x0 0x20000>; - reg-io-width = <4>; - #sound-dai-cells = <0>; - rockchip,grf = <&grf>; - interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>, <&cru SCLK_HDMI_CEC>; - clock-names = "iahb", "isfr", "cec"; - power-domains = <&power RK3288_PD_VIO>; - status = "disabled"; - - ports { - hdmi_in: port { - #address-cells = <1>; - #size-cells = <0>; - hdmi_in_vopb: endpoint@0 { - reg = <0>; - remote-endpoint = <&vopb_out_hdmi>; - }; - hdmi_in_vopl: endpoint@1 { - reg = <1>; - remote-endpoint = <&vopl_out_hdmi>; - }; - }; - }; - }; - - vpu: video-codec@ff9a0000 { - compatible = "rockchip,rk3288-vpu"; - reg = <0x0 0xff9a0000 0x0 0x800>; - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "vepu", "vdpu"; - clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>; - clock-names = "aclk", "hclk"; - iommus = <&vpu_mmu>; - power-domains = <&power RK3288_PD_VIDEO>; - }; - - vpu_mmu: iommu@ff9a0800 { - compatible = "rockchip,iommu"; - reg = <0x0 0xff9a0800 0x0 0x100>; - interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>; - clock-names = "aclk", "iface"; - #iommu-cells = <0>; - power-domains = <&power RK3288_PD_VIDEO>; - }; - - hevc_mmu: iommu@ff9c0440 { - compatible = "rockchip,iommu"; - reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>; - interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>; - clock-names = "aclk", "iface"; - #iommu-cells = <0>; - status = "disabled"; - }; - - gpu: gpu@ffa30000 { - compatible = "rockchip,rk3288-mali", "arm,mali-t760"; - reg = <0x0 0xffa30000 0x0 0x10000>; - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "job", "mmu", "gpu"; - clocks = <&cru ACLK_GPU>; - operating-points-v2 = <&gpu_opp_table>; - #cooling-cells = <2>; /* min followed by max */ - power-domains = <&power RK3288_PD_GPU>; - status = "disabled"; - }; - - gpu_opp_table: opp-table-1 { - compatible = "operating-points-v2"; - - opp-100000000 { - opp-hz = /bits/ 64 <100000000>; - opp-microvolt = <950000>; - }; - opp-200000000 { - opp-hz = /bits/ 64 <200000000>; - opp-microvolt = <950000>; - }; - opp-300000000 { - opp-hz = /bits/ 64 <300000000>; - opp-microvolt = <1000000>; - }; - opp-400000000 { - opp-hz = /bits/ 64 <400000000>; - opp-microvolt = <1100000>; - }; - opp-600000000 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <1250000>; - }; - }; - - qos_gpu_r: qos@ffaa0000 { - compatible = "rockchip,rk3288-qos", "syscon"; - reg = <0x0 0xffaa0000 0x0 0x20>; - }; - - qos_gpu_w: qos@ffaa0080 { - compatible = "rockchip,rk3288-qos", "syscon"; - reg = <0x0 0xffaa0080 0x0 0x20>; - }; - - qos_vio1_vop: qos@ffad0000 { - compatible = "rockchip,rk3288-qos", "syscon"; - reg = <0x0 0xffad0000 0x0 0x20>; - }; - - qos_vio1_isp_w0: qos@ffad0100 { - compatible = "rockchip,rk3288-qos", "syscon"; - reg = <0x0 0xffad0100 0x0 0x20>; - }; - - qos_vio1_isp_w1: qos@ffad0180 { - compatible = "rockchip,rk3288-qos", "syscon"; - reg = <0x0 0xffad0180 0x0 0x20>; - }; - - qos_vio0_vop: qos@ffad0400 { - compatible = "rockchip,rk3288-qos", "syscon"; - reg = <0x0 0xffad0400 0x0 0x20>; - }; - - qos_vio0_vip: qos@ffad0480 { - compatible = "rockchip,rk3288-qos", "syscon"; - reg = <0x0 0xffad0480 0x0 0x20>; - }; - - qos_vio0_iep: qos@ffad0500 { - compatible = "rockchip,rk3288-qos", "syscon"; - reg = <0x0 0xffad0500 0x0 0x20>; - }; - - qos_vio2_rga_r: qos@ffad0800 { - compatible = "rockchip,rk3288-qos", "syscon"; - reg = <0x0 0xffad0800 0x0 0x20>; - }; - - qos_vio2_rga_w: qos@ffad0880 { - compatible = "rockchip,rk3288-qos", "syscon"; - reg = <0x0 0xffad0880 0x0 0x20>; - }; - - qos_vio1_isp_r: qos@ffad0900 { - compatible = "rockchip,rk3288-qos", "syscon"; - reg = <0x0 0xffad0900 0x0 0x20>; - }; - - qos_video: qos@ffae0000 { - compatible = "rockchip,rk3288-qos", "syscon"; - reg = <0x0 0xffae0000 0x0 0x20>; - }; - - qos_hevc_r: qos@ffaf0000 { - compatible = "rockchip,rk3288-qos", "syscon"; - reg = <0x0 0xffaf0000 0x0 0x20>; - }; - - qos_hevc_w: qos@ffaf0080 { - compatible = "rockchip,rk3288-qos", "syscon"; - reg = <0x0 0xffaf0080 0x0 0x20>; - }; - - dmac_bus_s: dma-controller@ffb20000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xffb20000 0x0 0x4000>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; - #dma-cells = <1>; - arm,pl330-broken-no-flushp; - arm,pl330-periph-burst; - clocks = <&cru ACLK_DMAC1>; - clock-names = "apb_pclk"; - }; - - efuse: efuse@ffb40000 { - compatible = "rockchip,rk3288-efuse"; - reg = <0x0 0xffb40000 0x0 0x20>; - #address-cells = <1>; - #size-cells = <1>; - clocks = <&cru PCLK_EFUSE256>; - clock-names = "pclk_efuse"; - - cpu_id: cpu-id@7 { - reg = <0x07 0x10>; - }; - cpu_leakage: cpu_leakage@17 { - reg = <0x17 0x1>; - }; - }; - - gic: interrupt-controller@ffc01000 { - compatible = "arm,gic-400"; - interrupt-controller; - #interrupt-cells = <3>; - #address-cells = <0>; - - reg = <0x0 0xffc01000 0x0 0x1000>, - <0x0 0xffc02000 0x0 0x2000>, - <0x0 0xffc04000 0x0 0x2000>, - <0x0 0xffc06000 0x0 0x2000>; - interrupts = <GIC_PPI 9 0xf04>; - }; - - pinctrl: pinctrl { - compatible = "rockchip,rk3288-pinctrl"; - rockchip,grf = <&grf>; - rockchip,pmu = <&pmu>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - gpio0: gpio@ff750000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff750000 0x0 0x100>; - interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO0>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio1: gpio@ff780000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff780000 0x0 0x100>; - interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO1>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio2: gpio@ff790000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff790000 0x0 0x100>; - interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO2>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio3: gpio@ff7a0000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff7a0000 0x0 0x100>; - interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO3>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio4: gpio@ff7b0000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff7b0000 0x0 0x100>; - interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO4>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio5: gpio@ff7c0000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff7c0000 0x0 0x100>; - interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO5>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio6: gpio@ff7d0000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff7d0000 0x0 0x100>; - interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO6>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio7: gpio@ff7e0000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff7e0000 0x0 0x100>; - interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO7>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio8: gpio@ff7f0000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff7f0000 0x0 0x100>; - interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO8>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - hdmi { - hdmi_cec_c0: hdmi-cec-c0 { - rockchip,pins = <7 RK_PC0 2 &pcfg_pull_none>; - }; - - hdmi_cec_c7: hdmi-cec-c7 { - rockchip,pins = <7 RK_PC7 4 &pcfg_pull_none>; - }; - - hdmi_ddc: hdmi-ddc { - rockchip,pins = <7 RK_PC3 2 &pcfg_pull_none>, - <7 RK_PC4 2 &pcfg_pull_none>; - }; - - hdmi_ddc_unwedge: hdmi-ddc-unwedge { - rockchip,pins = <7 RK_PC3 RK_FUNC_GPIO &pcfg_output_low>, - <7 RK_PC4 2 &pcfg_pull_none>; - }; - }; - - pcfg_output_low: pcfg-output-low { - output-low; - }; - - pcfg_pull_up: pcfg-pull-up { - bias-pull-up; - }; - - pcfg_pull_down: pcfg-pull-down { - bias-pull-down; - }; - - pcfg_pull_none: pcfg-pull-none { - bias-disable; - }; - - pcfg_pull_none_12ma: pcfg-pull-none-12ma { - bias-disable; - drive-strength = <12>; - }; - - suspend { - global_pwroff: global-pwroff { - rockchip,pins = <0 RK_PA0 1 &pcfg_pull_none>; - }; - - ddrio_pwroff: ddrio-pwroff { - rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>; - }; - - ddr0_retention: ddr0-retention { - rockchip,pins = <0 RK_PA2 1 &pcfg_pull_up>; - }; - - ddr1_retention: ddr1-retention { - rockchip,pins = <0 RK_PA3 1 &pcfg_pull_up>; - }; - }; - - edp { - edp_hpd: edp-hpd { - rockchip,pins = <7 RK_PB3 2 &pcfg_pull_down>; - }; - }; - - i2c0 { - i2c0_xfer: i2c0-xfer { - rockchip,pins = <0 RK_PB7 1 &pcfg_pull_none>, - <0 RK_PC0 1 &pcfg_pull_none>; - }; - }; - - i2c1 { - i2c1_xfer: i2c1-xfer { - rockchip,pins = <8 RK_PA4 1 &pcfg_pull_none>, - <8 RK_PA5 1 &pcfg_pull_none>; - }; - }; - - i2c2 { - i2c2_xfer: i2c2-xfer { - rockchip,pins = <6 RK_PB1 1 &pcfg_pull_none>, - <6 RK_PB2 1 &pcfg_pull_none>; - }; - }; - - i2c3 { - i2c3_xfer: i2c3-xfer { - rockchip,pins = <2 RK_PC0 1 &pcfg_pull_none>, - <2 RK_PC1 1 &pcfg_pull_none>; - }; - }; - - i2c4 { - i2c4_xfer: i2c4-xfer { - rockchip,pins = <7 RK_PC1 1 &pcfg_pull_none>, - <7 RK_PC2 1 &pcfg_pull_none>; - }; - }; - - i2c5 { - i2c5_xfer: i2c5-xfer { - rockchip,pins = <7 RK_PC3 1 &pcfg_pull_none>, - <7 RK_PC4 1 &pcfg_pull_none>; - }; - }; - - i2s0 { - i2s0_bus: i2s0-bus { - rockchip,pins = <6 RK_PA0 1 &pcfg_pull_none>, - <6 RK_PA1 1 &pcfg_pull_none>, - <6 RK_PA2 1 &pcfg_pull_none>, - <6 RK_PA3 1 &pcfg_pull_none>, - <6 RK_PA4 1 &pcfg_pull_none>, - <6 RK_PB0 1 &pcfg_pull_none>; - }; - }; - - lcdc { - lcdc_ctl: lcdc-ctl { - rockchip,pins = <1 RK_PD0 1 &pcfg_pull_none>, - <1 RK_PD1 1 &pcfg_pull_none>, - <1 RK_PD2 1 &pcfg_pull_none>, - <1 RK_PD3 1 &pcfg_pull_none>; - }; - }; - - sdmmc { - sdmmc_clk: sdmmc-clk { - rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none>; - }; - - sdmmc_cmd: sdmmc-cmd { - rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up>; - }; - - sdmmc_cd: sdmmc-cd { - rockchip,pins = <6 RK_PC6 1 &pcfg_pull_up>; - }; - - sdmmc_bus1: sdmmc-bus1 { - rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up>; - }; - - sdmmc_bus4: sdmmc-bus4 { - rockchip,pins = <6 RK_PC0 1 &pcfg_pull_up>, - <6 RK_PC1 1 &pcfg_pull_up>, - <6 RK_PC2 1 &pcfg_pull_up>, - <6 RK_PC3 1 &pcfg_pull_up>; - }; - }; - - sdio0 { - sdio0_bus1: sdio0-bus1 { - rockchip,pins = <4 RK_PC4 1 &pcfg_pull_up>; - }; - - sdio0_bus4: sdio0-bus4 { - rockchip,pins = <4 RK_PC4 1 &pcfg_pull_up>, - <4 RK_PC5 1 &pcfg_pull_up>, - <4 RK_PC6 1 &pcfg_pull_up>, - <4 RK_PC7 1 &pcfg_pull_up>; - }; - - sdio0_cmd: sdio0-cmd { - rockchip,pins = <4 RK_PD0 1 &pcfg_pull_up>; - }; - - sdio0_clk: sdio0-clk { - rockchip,pins = <4 RK_PD1 1 &pcfg_pull_none>; - }; - - sdio0_cd: sdio0-cd { - rockchip,pins = <4 RK_PD2 1 &pcfg_pull_up>; - }; - - sdio0_wp: sdio0-wp { - rockchip,pins = <4 RK_PD3 1 &pcfg_pull_up>; - }; - - sdio0_pwr: sdio0-pwr { - rockchip,pins = <4 RK_PD4 1 &pcfg_pull_up>; - }; - - sdio0_bkpwr: sdio0-bkpwr { - rockchip,pins = <4 RK_PD5 1 &pcfg_pull_up>; - }; - - sdio0_int: sdio0-int { - rockchip,pins = <4 RK_PD6 1 &pcfg_pull_up>; - }; - }; - - sdio1 { - sdio1_bus1: sdio1-bus1 { - rockchip,pins = <3 RK_PD0 4 &pcfg_pull_up>; - }; - - sdio1_bus4: sdio1-bus4 { - rockchip,pins = <3 RK_PD0 4 &pcfg_pull_up>, - <3 RK_PD1 4 &pcfg_pull_up>, - <3 RK_PD2 4 &pcfg_pull_up>, - <3 RK_PD3 4 &pcfg_pull_up>; - }; - - sdio1_cd: sdio1-cd { - rockchip,pins = <3 RK_PD4 4 &pcfg_pull_up>; - }; - - sdio1_wp: sdio1-wp { - rockchip,pins = <3 RK_PD5 4 &pcfg_pull_up>; - }; - - sdio1_bkpwr: sdio1-bkpwr { - rockchip,pins = <3 RK_PD6 4 &pcfg_pull_up>; - }; - - sdio1_int: sdio1-int { - rockchip,pins = <3 RK_PD7 4 &pcfg_pull_up>; - }; - - sdio1_cmd: sdio1-cmd { - rockchip,pins = <4 RK_PA6 4 &pcfg_pull_up>; - }; - - sdio1_clk: sdio1-clk { - rockchip,pins = <4 RK_PA7 4 &pcfg_pull_none>; - }; - - sdio1_pwr: sdio1-pwr { - rockchip,pins = <4 RK_PB1 4 &pcfg_pull_up>; - }; - }; - - emmc { - emmc_clk: emmc-clk { - rockchip,pins = <3 RK_PC2 2 &pcfg_pull_none>; - }; - - emmc_cmd: emmc-cmd { - rockchip,pins = <3 RK_PC0 2 &pcfg_pull_up>; - }; - - emmc_pwr: emmc-pwr { - rockchip,pins = <3 RK_PB1 2 &pcfg_pull_up>; - }; - - emmc_bus1: emmc-bus1 { - rockchip,pins = <3 RK_PA0 2 &pcfg_pull_up>; - }; - - emmc_bus4: emmc-bus4 { - rockchip,pins = <3 RK_PA0 2 &pcfg_pull_up>, - <3 RK_PA1 2 &pcfg_pull_up>, - <3 RK_PA2 2 &pcfg_pull_up>, - <3 RK_PA3 2 &pcfg_pull_up>; - }; - - emmc_bus8: emmc-bus8 { - rockchip,pins = <3 RK_PA0 2 &pcfg_pull_up>, - <3 RK_PA1 2 &pcfg_pull_up>, - <3 RK_PA2 2 &pcfg_pull_up>, - <3 RK_PA3 2 &pcfg_pull_up>, - <3 RK_PA4 2 &pcfg_pull_up>, - <3 RK_PA5 2 &pcfg_pull_up>, - <3 RK_PA6 2 &pcfg_pull_up>, - <3 RK_PA7 2 &pcfg_pull_up>; - }; - }; - - spi0 { - spi0_clk: spi0-clk { - rockchip,pins = <5 RK_PB4 1 &pcfg_pull_up>; - }; - spi0_cs0: spi0-cs0 { - rockchip,pins = <5 RK_PB5 1 &pcfg_pull_up>; - }; - spi0_tx: spi0-tx { - rockchip,pins = <5 RK_PB6 1 &pcfg_pull_up>; - }; - spi0_rx: spi0-rx { - rockchip,pins = <5 RK_PB7 1 &pcfg_pull_up>; - }; - spi0_cs1: spi0-cs1 { - rockchip,pins = <5 RK_PC0 1 &pcfg_pull_up>; - }; - }; - spi1 { - spi1_clk: spi1-clk { - rockchip,pins = <7 RK_PB4 2 &pcfg_pull_up>; - }; - spi1_cs0: spi1-cs0 { - rockchip,pins = <7 RK_PB5 2 &pcfg_pull_up>; - }; - spi1_rx: spi1-rx { - rockchip,pins = <7 RK_PB6 2 &pcfg_pull_up>; - }; - spi1_tx: spi1-tx { - rockchip,pins = <7 RK_PB7 2 &pcfg_pull_up>; - }; - }; - - spi2 { - spi2_cs1: spi2-cs1 { - rockchip,pins = <8 RK_PA3 1 &pcfg_pull_up>; - }; - spi2_clk: spi2-clk { - rockchip,pins = <8 RK_PA6 1 &pcfg_pull_up>; - }; - spi2_cs0: spi2-cs0 { - rockchip,pins = <8 RK_PA7 1 &pcfg_pull_up>; - }; - spi2_rx: spi2-rx { - rockchip,pins = <8 RK_PB0 1 &pcfg_pull_up>; - }; - spi2_tx: spi2-tx { - rockchip,pins = <8 RK_PB1 1 &pcfg_pull_up>; - }; - }; - - uart0 { - uart0_xfer: uart0-xfer { - rockchip,pins = <4 RK_PC0 1 &pcfg_pull_up>, - <4 RK_PC1 1 &pcfg_pull_none>; - }; - - uart0_cts: uart0-cts { - rockchip,pins = <4 RK_PC2 1 &pcfg_pull_up>; - }; - - uart0_rts: uart0-rts { - rockchip,pins = <4 RK_PC3 1 &pcfg_pull_none>; - }; - }; - - uart1 { - uart1_xfer: uart1-xfer { - rockchip,pins = <5 RK_PB0 1 &pcfg_pull_up>, - <5 RK_PB1 1 &pcfg_pull_none>; - }; - - uart1_cts: uart1-cts { - rockchip,pins = <5 RK_PB2 1 &pcfg_pull_up>; - }; - - uart1_rts: uart1-rts { - rockchip,pins = <5 RK_PB3 1 &pcfg_pull_none>; - }; - }; - - uart2 { - uart2_xfer: uart2-xfer { - rockchip,pins = <7 RK_PC6 1 &pcfg_pull_up>, - <7 RK_PC7 1 &pcfg_pull_none>; - }; - /* no rts / cts for uart2 */ - }; - - uart3 { - uart3_xfer: uart3-xfer { - rockchip,pins = <7 RK_PA7 1 &pcfg_pull_up>, - <7 RK_PB0 1 &pcfg_pull_none>; - }; - - uart3_cts: uart3-cts { - rockchip,pins = <7 RK_PB1 1 &pcfg_pull_up>; - }; - - uart3_rts: uart3-rts { - rockchip,pins = <7 RK_PB2 1 &pcfg_pull_none>; - }; - }; - - uart4 { - uart4_xfer: uart4-xfer { - rockchip,pins = <5 RK_PB7 3 &pcfg_pull_up>, - <5 RK_PB6 3 &pcfg_pull_none>; - }; - - uart4_cts: uart4-cts { - rockchip,pins = <5 RK_PB4 3 &pcfg_pull_up>; - }; - - uart4_rts: uart4-rts { - rockchip,pins = <5 RK_PB5 3 &pcfg_pull_none>; - }; - }; - - tsadc { - otp_pin: otp-pin { - rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - otp_out: otp-out { - rockchip,pins = <0 RK_PB2 1 &pcfg_pull_none>; - }; - }; - - pwm0 { - pwm0_pin: pwm0-pin { - rockchip,pins = <7 RK_PA0 1 &pcfg_pull_none>; - }; - }; - - pwm1 { - pwm1_pin: pwm1-pin { - rockchip,pins = <7 RK_PA1 1 &pcfg_pull_none>; - }; - }; - - pwm2 { - pwm2_pin: pwm2-pin { - rockchip,pins = <7 RK_PC6 3 &pcfg_pull_none>; - }; - }; - - pwm3 { - pwm3_pin: pwm3-pin { - rockchip,pins = <7 RK_PC7 3 &pcfg_pull_none>; - }; - }; - - gmac { - rgmii_pins: rgmii-pins { - rockchip,pins = <3 RK_PD6 3 &pcfg_pull_none>, - <3 RK_PD7 3 &pcfg_pull_none>, - <3 RK_PD2 3 &pcfg_pull_none>, - <3 RK_PD3 3 &pcfg_pull_none>, - <3 RK_PD4 3 &pcfg_pull_none_12ma>, - <3 RK_PD5 3 &pcfg_pull_none_12ma>, - <3 RK_PD0 3 &pcfg_pull_none_12ma>, - <3 RK_PD1 3 &pcfg_pull_none_12ma>, - <4 RK_PA0 3 &pcfg_pull_none>, - <4 RK_PA5 3 &pcfg_pull_none>, - <4 RK_PA6 3 &pcfg_pull_none>, - <4 RK_PB1 3 &pcfg_pull_none_12ma>, - <4 RK_PA4 3 &pcfg_pull_none_12ma>, - <4 RK_PA1 3 &pcfg_pull_none>, - <4 RK_PA3 3 &pcfg_pull_none>; - }; - - rmii_pins: rmii-pins { - rockchip,pins = <3 RK_PD6 3 &pcfg_pull_none>, - <3 RK_PD7 3 &pcfg_pull_none>, - <3 RK_PD4 3 &pcfg_pull_none>, - <3 RK_PD5 3 &pcfg_pull_none>, - <4 RK_PA0 3 &pcfg_pull_none>, - <4 RK_PA5 3 &pcfg_pull_none>, - <4 RK_PA4 3 &pcfg_pull_none>, - <4 RK_PA1 3 &pcfg_pull_none>, - <4 RK_PA2 3 &pcfg_pull_none>, - <4 RK_PA3 3 &pcfg_pull_none>; - }; - }; - - spdif { - spdif_tx: spdif-tx { - rockchip,pins = <6 RK_PB3 1 &pcfg_pull_none>; - }; - }; - }; -}; diff --git a/arch/arm/dts/rk3399-gru-u-boot.dtsi b/arch/arm/dts/rk3399-gru-u-boot.dtsi index 6bdc892bd91..5517176aa4a 100644 --- a/arch/arm/dts/rk3399-gru-u-boot.dtsi +++ b/arch/arm/dts/rk3399-gru-u-boot.dtsi @@ -11,7 +11,7 @@ }; config { - u-boot,spl-payload-offset = <0x40000>; + u-boot,spl-payload-offset = <CONFIG_SYS_SPI_U_BOOT_OFFS>; }; }; @@ -29,11 +29,35 @@ rockchip,panel = <&edp_panel>; }; +&emmc_phy { + /delete-property/ bootph-pre-ram; +}; + +&gpio0 { + bootph-pre-ram; +}; + +&pp1500_ap_io { + bootph-pre-ram; +}; + &pp1800_audio { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; +&pp1500_en { + bootph-pre-ram; +}; + +&pp3000 { + bootph-pre-ram; +}; + +&pp3000_en { + bootph-pre-ram; +}; + &ppvar_bigcpu_pwm { regulator-init-microvolt = <900000>; }; @@ -80,7 +104,8 @@ &spi1 { spi_flash: flash@0 { - bootph-all; + bootph-pre-ram; + bootph-some-ram; }; }; diff --git a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi index aecf7dbe383..883d399a06a 100644 --- a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi +++ b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi @@ -7,6 +7,10 @@ #include "rk3399-sdram-lpddr4-100.dtsi" / { + config { + sysreset-gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>; + }; + vcc_hub_en: vcc_hub_en-regulator { compatible = "regulator-fixed"; enable-active-high; @@ -36,6 +40,10 @@ bootph-pre-ram; }; +&gpio1 { + bootph-pre-ram; +}; + &spi1 { flash@0 { bootph-pre-ram; diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi index 43b67991fe5..cd84269dab4 100644 --- a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi +++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi @@ -7,6 +7,10 @@ #include "rk3399-sdram-lpddr4-100.dtsi" / { + config { + sysreset-gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>; + }; + smbios { compatible = "u-boot,sysinfo-smbios"; smbios { @@ -32,6 +36,10 @@ bootph-pre-ram; }; +&gpio1 { + bootph-pre-ram; +}; + &sdhci { cap-mmc-highspeed; mmc-ddr-1_8v; diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi index 2bec139d833..70f35b6c197 100644 --- a/arch/arm/dts/rk3399-u-boot.dtsi +++ b/arch/arm/dts/rk3399-u-boot.dtsi @@ -39,11 +39,21 @@ mkimage { args = "-n rk3399 -T rkspi"; + multiple-data-files; +#ifdef CONFIG_ROCKCHIP_EXTERNAL_TPL + rockchip-tpl { + }; +#elif defined(CONFIG_TPL) + u-boot-tpl { + }; +#endif u-boot-spl { }; }; - u-boot-img { - offset = <0x40000>; + fit { + type = "blob"; + filename = "u-boot.itb"; + offset = <CONFIG_SYS_SPI_U_BOOT_OFFS>; }; u-boot { offset = <0x300000>; diff --git a/arch/arm/dts/rk3566-nanopi-r3s-u-boot.dtsi b/arch/arm/dts/rk3566-nanopi-r3s-u-boot.dtsi new file mode 100644 index 00000000000..b66e5015d60 --- /dev/null +++ b/arch/arm/dts/rk3566-nanopi-r3s-u-boot.dtsi @@ -0,0 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + +#include "rk356x-u-boot.dtsi" + +&vcc5v0_usb { + /delete-property/ regulator-always-on; + /delete-property/ regulator-boot-on; +}; diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi index 0a0943b462a..24a976cf7e2 100644 --- a/arch/arm/dts/rk356x-u-boot.dtsi +++ b/arch/arm/dts/rk356x-u-boot.dtsi @@ -87,6 +87,10 @@ bootph-all; }; +&otp { + bootph-some-ram; +}; + &pcfg_pull_none { bootph-all; }; diff --git a/arch/arm/dts/rk3588-nanopc-t6-lts-u-boot.dtsi b/arch/arm/dts/rk3588-nanopc-t6-lts-u-boot.dtsi new file mode 100644 index 00000000000..b18f958c8a2 --- /dev/null +++ b/arch/arm/dts/rk3588-nanopc-t6-lts-u-boot.dtsi @@ -0,0 +1,3 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include "rk3588-nanopc-t6-u-boot.dtsi" diff --git a/arch/arm/dts/rk3588s-rock-5c-u-boot.dtsi b/arch/arm/dts/rk3588s-rock-5c-u-boot.dtsi new file mode 100644 index 00000000000..1dc574c2f21 --- /dev/null +++ b/arch/arm/dts/rk3588s-rock-5c-u-boot.dtsi @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2024-2025 Radxa Computer (Shenzhen) Co., Ltd. + */ + +#include "rk3588s-u-boot.dtsi" + +&sdhci { + cap-mmc-highspeed; + mmc-hs200-1_8v; +}; diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi index 09d8b311cec..8880d162b11 100644 --- a/arch/arm/dts/rk3588s-u-boot.dtsi +++ b/arch/arm/dts/rk3588s-u-boot.dtsi @@ -69,6 +69,10 @@ bootph-all; }; +&otp { + bootph-some-ram; +}; + &pcfg_pull_down { bootph-all; }; diff --git a/arch/arm/dts/rk3xxx.dtsi b/arch/arm/dts/rk3xxx.dtsi deleted file mode 100644 index cb4e42ede56..00000000000 --- a/arch/arm/dts/rk3xxx.dtsi +++ /dev/null @@ -1,488 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2013 MundoReader S.L. - * Author: Heiko Stuebner <heiko@sntech.de> - */ - -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/soc/rockchip,boot-mode.h> - -/ { - #address-cells = <1>; - #size-cells = <1>; - - interrupt-parent = <&gic>; - - aliases { - ethernet0 = &emac; - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &i2c4; - serial0 = &uart0; - serial1 = &uart1; - serial2 = &uart2; - serial3 = &uart3; - spi0 = &spi0; - spi1 = &spi1; - }; - - xin24m: oscillator { - compatible = "fixed-clock"; - clock-frequency = <24000000>; - #clock-cells = <0>; - clock-output-names = "xin24m"; - }; - - gpu: gpu@10090000 { - compatible = "arm,mali-400"; - reg = <0x10090000 0x10000>; - clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>; - clock-names = "bus", "core"; - assigned-clocks = <&cru ACLK_GPU>; - assigned-clock-rates = <100000000>; - resets = <&cru SRST_GPU>; - status = "disabled"; - }; - - vpu: video-codec@10104000 { - compatible = "rockchip,rk3066-vpu"; - reg = <0x10104000 0x800>; - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "vepu", "vdpu"; - clocks = <&cru ACLK_VDPU>, <&cru HCLK_VDPU>, - <&cru ACLK_VEPU>, <&cru HCLK_VEPU>; - clock-names = "aclk_vdpu", "hclk_vdpu", - "aclk_vepu", "hclk_vepu"; - }; - - L2: cache-controller@10138000 { - compatible = "arm,pl310-cache"; - reg = <0x10138000 0x1000>; - cache-unified; - cache-level = <2>; - }; - - scu@1013c000 { - compatible = "arm,cortex-a9-scu"; - reg = <0x1013c000 0x100>; - }; - - global_timer: global-timer@1013c200 { - compatible = "arm,cortex-a9-global-timer"; - reg = <0x1013c200 0x20>; - interrupts = <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>; - clocks = <&cru CORE_PERI>; - status = "disabled"; - /* The clock source and the sched_clock provided by the arm_global_timer - * on Rockchip rk3066a/rk3188 are quite unstable because their rates - * depend on the CPU frequency. - * Keep the arm_global_timer disabled in order to have the - * DW_APB_TIMER (rk3066a) or ROCKCHIP_TIMER (rk3188) selected by default. - */ - }; - - local_timer: local-timer@1013c600 { - compatible = "arm,cortex-a9-twd-timer"; - reg = <0x1013c600 0x20>; - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>; - clocks = <&cru CORE_PERI>; - }; - - gic: interrupt-controller@1013d000 { - compatible = "arm,cortex-a9-gic"; - interrupt-controller; - #interrupt-cells = <3>; - reg = <0x1013d000 0x1000>, - <0x1013c100 0x0100>; - }; - - uart0: serial@10124000 { - compatible = "snps,dw-apb-uart"; - reg = <0x10124000 0x400>; - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; - reg-shift = <2>; - reg-io-width = <1>; - clock-names = "baudclk", "apb_pclk"; - clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>; - status = "disabled"; - }; - - uart1: serial@10126000 { - compatible = "snps,dw-apb-uart"; - reg = <0x10126000 0x400>; - interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; - reg-shift = <2>; - reg-io-width = <1>; - clock-names = "baudclk", "apb_pclk"; - clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>; - status = "disabled"; - }; - - qos_gpu: qos@1012d000 { - compatible = "rockchip,rk3066-qos", "syscon"; - reg = <0x1012d000 0x20>; - }; - - qos_vpu: qos@1012e000 { - compatible = "rockchip,rk3066-qos", "syscon"; - reg = <0x1012e000 0x20>; - }; - - qos_lcdc0: qos@1012f000 { - compatible = "rockchip,rk3066-qos", "syscon"; - reg = <0x1012f000 0x20>; - }; - - qos_cif0: qos@1012f080 { - compatible = "rockchip,rk3066-qos", "syscon"; - reg = <0x1012f080 0x20>; - }; - - qos_ipp: qos@1012f100 { - compatible = "rockchip,rk3066-qos", "syscon"; - reg = <0x1012f100 0x20>; - }; - - qos_lcdc1: qos@1012f180 { - compatible = "rockchip,rk3066-qos", "syscon"; - reg = <0x1012f180 0x20>; - }; - - qos_cif1: qos@1012f200 { - compatible = "rockchip,rk3066-qos", "syscon"; - reg = <0x1012f200 0x20>; - }; - - qos_rga: qos@1012f280 { - compatible = "rockchip,rk3066-qos", "syscon"; - reg = <0x1012f280 0x20>; - }; - - usb_otg: usb@10180000 { - compatible = "rockchip,rk3066-usb", "snps,dwc2"; - reg = <0x10180000 0x40000>; - interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_OTG0>; - clock-names = "otg"; - dr_mode = "otg"; - g-np-tx-fifo-size = <16>; - g-rx-fifo-size = <275>; - g-tx-fifo-size = <256 128 128 64 64 32>; - phys = <&usbphy0>; - phy-names = "usb2-phy"; - status = "disabled"; - }; - - usb_host: usb@101c0000 { - compatible = "snps,dwc2"; - reg = <0x101c0000 0x40000>; - interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_OTG1>; - clock-names = "otg"; - dr_mode = "host"; - phys = <&usbphy1>; - phy-names = "usb2-phy"; - status = "disabled"; - }; - - emac: ethernet@10204000 { - compatible = "snps,arc-emac"; - reg = <0x10204000 0x3c>; - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; - - rockchip,grf = <&grf>; - - clocks = <&cru HCLK_EMAC>, <&cru SCLK_MAC>; - clock-names = "hclk", "macref"; - max-speed = <100>; - phy-mode = "rmii"; - - status = "disabled"; - }; - - mmc0: mmc@10214000 { - compatible = "rockchip,rk2928-dw-mshc"; - reg = <0x10214000 0x1000>; - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>; - clock-names = "biu", "ciu"; - dmas = <&dmac2 1>; - dma-names = "rx-tx"; - fifo-depth = <256>; - resets = <&cru SRST_SDMMC>; - reset-names = "reset"; - status = "disabled"; - }; - - mmc1: mmc@10218000 { - compatible = "rockchip,rk2928-dw-mshc"; - reg = <0x10218000 0x1000>; - interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>; - clock-names = "biu", "ciu"; - dmas = <&dmac2 3>; - dma-names = "rx-tx"; - fifo-depth = <256>; - resets = <&cru SRST_SDIO>; - reset-names = "reset"; - status = "disabled"; - }; - - emmc: mmc@1021c000 { - compatible = "rockchip,rk2928-dw-mshc"; - reg = <0x1021c000 0x1000>; - interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>; - clock-names = "biu", "ciu"; - dmas = <&dmac2 4>; - dma-names = "rx-tx"; - fifo-depth = <256>; - resets = <&cru SRST_EMMC>; - reset-names = "reset"; - status = "disabled"; - }; - - nfc: nand-controller@10500000 { - compatible = "rockchip,rk2928-nfc"; - reg = <0x10500000 0x4000>; - interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_NANDC0>; - clock-names = "ahb"; - status = "disabled"; - }; - - pmu: pmu@20004000 { - compatible = "rockchip,rk3066-pmu", "syscon", "simple-mfd"; - reg = <0x20004000 0x100>; - - reboot-mode { - compatible = "syscon-reboot-mode"; - offset = <0x40>; - mode-normal = <BOOT_NORMAL>; - mode-recovery = <BOOT_RECOVERY>; - mode-bootloader = <BOOT_FASTBOOT>; - mode-loader = <BOOT_BL_DOWNLOAD>; - }; - }; - - grf: grf@20008000 { - compatible = "syscon", "simple-mfd"; - reg = <0x20008000 0x200>; - }; - - dmac1_s: dma-controller@20018000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x20018000 0x4000>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; - #dma-cells = <1>; - arm,pl330-broken-no-flushp; - arm,pl330-periph-burst; - clocks = <&cru ACLK_DMA1>; - clock-names = "apb_pclk"; - }; - - dmac1_ns: dma-controller@2001c000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x2001c000 0x4000>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; - #dma-cells = <1>; - arm,pl330-broken-no-flushp; - arm,pl330-periph-burst; - clocks = <&cru ACLK_DMA1>; - clock-names = "apb_pclk"; - status = "disabled"; - }; - - i2c0: i2c@2002d000 { - compatible = "rockchip,rk3066-i2c"; - reg = <0x2002d000 0x1000>; - interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - - rockchip,grf = <&grf>; - - clock-names = "i2c"; - clocks = <&cru PCLK_I2C0>; - - status = "disabled"; - }; - - i2c1: i2c@2002f000 { - compatible = "rockchip,rk3066-i2c"; - reg = <0x2002f000 0x1000>; - interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - - rockchip,grf = <&grf>; - - clocks = <&cru PCLK_I2C1>; - clock-names = "i2c"; - - status = "disabled"; - }; - - pwm0: pwm@20030000 { - compatible = "rockchip,rk2928-pwm"; - reg = <0x20030000 0x10>; - #pwm-cells = <2>; - clocks = <&cru PCLK_PWM01>; - status = "disabled"; - }; - - pwm1: pwm@20030010 { - compatible = "rockchip,rk2928-pwm"; - reg = <0x20030010 0x10>; - #pwm-cells = <2>; - clocks = <&cru PCLK_PWM01>; - status = "disabled"; - }; - - wdt: watchdog@2004c000 { - compatible = "snps,dw-wdt"; - reg = <0x2004c000 0x100>; - clocks = <&cru PCLK_WDT>; - interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; - - pwm2: pwm@20050020 { - compatible = "rockchip,rk2928-pwm"; - reg = <0x20050020 0x10>; - #pwm-cells = <2>; - clocks = <&cru PCLK_PWM23>; - status = "disabled"; - }; - - pwm3: pwm@20050030 { - compatible = "rockchip,rk2928-pwm"; - reg = <0x20050030 0x10>; - #pwm-cells = <2>; - clocks = <&cru PCLK_PWM23>; - status = "disabled"; - }; - - i2c2: i2c@20056000 { - compatible = "rockchip,rk3066-i2c"; - reg = <0x20056000 0x1000>; - interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - - rockchip,grf = <&grf>; - - clocks = <&cru PCLK_I2C2>; - clock-names = "i2c"; - - status = "disabled"; - }; - - i2c3: i2c@2005a000 { - compatible = "rockchip,rk3066-i2c"; - reg = <0x2005a000 0x1000>; - interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - - rockchip,grf = <&grf>; - - clocks = <&cru PCLK_I2C3>; - clock-names = "i2c"; - - status = "disabled"; - }; - - i2c4: i2c@2005e000 { - compatible = "rockchip,rk3066-i2c"; - reg = <0x2005e000 0x1000>; - interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - - rockchip,grf = <&grf>; - - clocks = <&cru PCLK_I2C4>; - clock-names = "i2c"; - - status = "disabled"; - }; - - uart2: serial@20064000 { - compatible = "snps,dw-apb-uart"; - reg = <0x20064000 0x400>; - interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; - reg-shift = <2>; - reg-io-width = <1>; - clock-names = "baudclk", "apb_pclk"; - clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>; - status = "disabled"; - }; - - uart3: serial@20068000 { - compatible = "snps,dw-apb-uart"; - reg = <0x20068000 0x400>; - interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; - reg-shift = <2>; - reg-io-width = <1>; - clock-names = "baudclk", "apb_pclk"; - clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>; - status = "disabled"; - }; - - saradc: saradc@2006c000 { - compatible = "rockchip,saradc"; - reg = <0x2006c000 0x100>; - interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; - #io-channel-cells = <1>; - clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>; - clock-names = "saradc", "apb_pclk"; - resets = <&cru SRST_SARADC>; - reset-names = "saradc-apb"; - status = "disabled"; - }; - - spi0: spi@20070000 { - compatible = "rockchip,rk3066-spi"; - clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>; - clock-names = "spiclk", "apb_pclk"; - interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x20070000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - dmas = <&dmac2 10>, <&dmac2 11>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - spi1: spi@20074000 { - compatible = "rockchip,rk3066-spi"; - clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>; - clock-names = "spiclk", "apb_pclk"; - interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x20074000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - dmas = <&dmac2 12>, <&dmac2 13>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - dmac2: dma-controller@20078000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x20078000 0x4000>; - interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; - #dma-cells = <1>; - arm,pl330-broken-no-flushp; - arm,pl330-periph-burst; - clocks = <&cru ACLK_DMA2>; - clock-names = "apb_pclk"; - }; -}; diff --git a/arch/arm/dts/smbios_generic.dtsi b/arch/arm/dts/smbios_generic.dtsi new file mode 100644 index 00000000000..fc168317c9e --- /dev/null +++ b/arch/arm/dts/smbios_generic.dtsi @@ -0,0 +1,82 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Default SMBIOS information for Arm64 platforms + * + * Copyright (c) 2024 Linaro Limited + * Author: Raymond Mao <raymond.mao@linaro.org> + */ +#include <config.h> +#include <smbios_def.h> + +/ { + smbios { + compatible = "u-boot,sysinfo-smbios"; + + smbios { + system { + manufacturer = CONFIG_SYS_VENDOR; + product = CONFIG_SYS_BOARD; + version = ""; + serial = ""; + wakeup-type = <SMBIOS_WAKEUP_TYPE_UNKNOWN>; + sku = ""; + family = "armv8"; + }; + + baseboard { + manufacturer = CONFIG_SYS_VENDOR; + product = CONFIG_SYS_BOARD; + version = ""; + serial = ""; + asset-tag = ""; + chassis-location = ""; + feature-flags = <SMBIOS_BOARD_FEAT_HOST_BOARD>; + board-type = <SMBIOS_BOARD_TYPE_MOTHERBOARD>; + }; + + chassis { + manufacturer = CONFIG_SYS_VENDOR; + version = ""; + serial = ""; + asset-tag = ""; + chassis-type = <SMBIOS_ENCLOSURE_DESKTOP>; + bootup-state = <SMBIOS_STATE_SAFE>; + power-supply-state = <SMBIOS_STATE_SAFE>; + thermal-state = <SMBIOS_STATE_SAFE>; + security-status = <SMBIOS_SECURITY_NONE>; + oem-defined = <SMBIOS_ENCLOSURE_OEM_UND>; + height = <SMBIOS_ENCLOSURE_HEIGHT_UND>; + number-of-power-cords = <SMBIOS_POWCORD_NUM_UND>; + }; + + processor { + version = ""; + processor-type = <SMBIOS_PROCESSOR_TYPE_CENTRAL>; + processor-status = <SMBIOS_PROCESSOR_STATUS_ENABLED>; + upgrade = <SMBIOS_PROCESSOR_UPGRADE_NONE>; + family = <SMBIOS_PROCESSOR_FAMILY_EXT>; + family2 = <SMBIOS_PROCESSOR_FAMILY_ARMV8>; + socket-design = ""; + serial = ""; + asset-tag = ""; + part-number = ""; + }; + + cache { + l1-cache { + socket-design = ""; + config = <(SMBIOS_CACHE_LEVEL_1 | + SMBIOS_CACHE_ENABLED | + SMBIOS_CACHE_OP_WB)>; + }; + + l2-cache { + socket-design = ""; + config = <(SMBIOS_CACHE_LEVEL_2 | + SMBIOS_CACHE_ENABLED | + SMBIOS_CACHE_OP_WB)>; + }; + }; + }; + }; +}; diff --git a/arch/arm/dts/sun4i-a10-a1000.dts b/arch/arm/dts/sun4i-a10-a1000.dts deleted file mode 100644 index 20f9ed24485..00000000000 --- a/arch/arm/dts/sun4i-a10-a1000.dts +++ /dev/null @@ -1,255 +0,0 @@ -/* - * Copyright 2013 Emilio López - * - * Emilio López <emilio@elopez.com.ar> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun4i-a10.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include <dt-bindings/gpio/gpio.h> - -/ { - model = "Mele A1000"; - compatible = "mele,a1000", "allwinner,sun4i-a10"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - hdmi-connector { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_in: endpoint { - remote-endpoint = <&hdmi_out_con>; - }; - }; - }; - - leds { - compatible = "gpio-leds"; - - led-0 { - label = "a1000:red:usr"; - gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; - }; - - led-1 { - label = "a1000:blue:pwr"; - gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>; - default-state = "on"; - }; - }; - - reg_emac_3v3: emac-3v3 { - compatible = "regulator-fixed"; - regulator-name = "emac-3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - startup-delay-us = <20000>; - enable-active-high; - gpio = <&pio 7 15 GPIO_ACTIVE_HIGH>; - }; - - sound { - compatible = "simple-audio-card"; - simple-audio-card,name = "On-board SPDIF"; - - simple-audio-card,cpu { - sound-dai = <&spdif>; - }; - - simple-audio-card,codec { - sound-dai = <&spdif_out>; - }; - }; - - spdif_out: spdif-out { - #sound-dai-cells = <0>; - compatible = "linux,spdif-dit"; - }; -}; - -&ahci { - status = "okay"; -}; - -&codec { - status = "okay"; -}; - -&cpu0 { - cpu-supply = <®_dcdc2>; -}; - -&ehci0 { - status = "okay"; -}; - -&ehci1 { - status = "okay"; -}; - -&emac { - phy-handle = <&phy1>; - status = "okay"; -}; - -&emac_sram { - status = "okay"; -}; - -&de { - status = "okay"; -}; - -&hdmi { - status = "okay"; -}; - -&hdmi_out { - hdmi_out_con: endpoint { - remote-endpoint = <&hdmi_con_in>; - }; -}; - -&i2c0 { - status = "okay"; - - axp209: pmic@34 { - compatible = "x-powers,axp209"; - reg = <0x34>; - interrupts = <0>; - - interrupt-controller; - #interrupt-cells = <1>; - }; -}; - -&ir0 { - pinctrl-names = "default"; - pinctrl-0 = <&ir0_rx_pins>; - status = "okay"; -}; - -&mdio { - phy-supply = <®_emac_3v3>; - status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ - status = "okay"; -}; - -&ohci0 { - status = "okay"; -}; - -&ohci1 { - status = "okay"; -}; - -#include "axp209.dtsi" - -®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-cpu"; -}; - -®_dcdc3 { - regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1250000>; - regulator-name = "vdd-int-dll"; -}; - -®_ldo1 { - regulator-name = "vdd-rtc"; -}; - -®_ldo2 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "avcc"; -}; - -®_usb1_vbus { - status = "okay"; -}; - -®_usb2_vbus { - status = "okay"; -}; - -&spdif { - pinctrl-names = "default"; - pinctrl-0 = <&spdif_tx_pin>; - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pb_pins>; - status = "okay"; -}; - -&usbphy { - usb1_vbus-supply = <®_usb1_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun4i-a10-ba10-tvbox.dts b/arch/arm/dts/sun4i-a10-ba10-tvbox.dts deleted file mode 100644 index 816d534ac09..00000000000 --- a/arch/arm/dts/sun4i-a10-ba10-tvbox.dts +++ /dev/null @@ -1,151 +0,0 @@ -/* - * Copyright 2014 Hans de Goede <hdegoede@redhat.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun4i-a10.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include <dt-bindings/gpio/gpio.h> - -/ { - model = "BA10 tvbox"; - compatible = "allwinner,ba10-tvbox", "allwinner,sun4i-a10"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&ehci0 { - status = "okay"; -}; - -&ehci1 { - status = "okay"; -}; - -&emac { - phy-handle = <&phy1>; - status = "okay"; -}; - -&emac_sram { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - axp209: pmic@34 { - compatible = "x-powers,axp209"; - reg = <0x34>; - interrupts = <0>; - - interrupt-controller; - #interrupt-cells = <1>; - }; -}; - -&ir0 { - pinctrl-names = "default"; - pinctrl-0 = <&ir0_rx_pins>; - status = "okay"; -}; - -&mdio { - status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ - status = "okay"; -}; - -&ohci0 { - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -®_usb0_vbus { - regulator-boot-on; - status = "okay"; -}; - -®_usb1_vbus { - status = "okay"; -}; - -®_usb2_vbus { - gpio = <&pio 7 12 GPIO_ACTIVE_HIGH>; - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pb_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "host"; - status = "okay"; -}; - -&usbphy { - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts b/arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts deleted file mode 100644 index 74262988881..00000000000 --- a/arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts +++ /dev/null @@ -1,159 +0,0 @@ -/* - * Copyright 2015 Hans de Goede <hdegoede@redhat.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun4i-a10.dtsi" -#include "sunxi-common-regulators.dtsi" -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/interrupt-controller/irq.h> - -/ { - model = "Chuwi V7 CW0825"; - compatible = "chuwi,v7-cw0825", "allwinner,sun4i-a10"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&ehci1 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - axp209: pmic@34 { - compatible = "x-powers,axp209"; - reg = <0x34>; - interrupts = <0>; - - interrupt-controller; - #interrupt-cells = <1>; - }; -}; - -&i2c1 { - status = "okay"; -}; - -&i2c2 { - status = "okay"; - - ft5306de4: touchscreen@38 { - compatible = "edt,edt-ft5406"; - reg = <0x38>; - interrupt-parent = <&pio>; - interrupts = <7 21 IRQ_TYPE_EDGE_FALLING>; - touchscreen-size-x = <1024>; - touchscreen-size-y = <768>; - }; -}; - -&lradc { - vref-supply = <®_vcc3v0>; - status = "okay"; - - button-800 { - label = "Volume Up"; - linux,code = <KEY_VOLUMEUP>; - channel = <0>; - voltage = <800000>; - }; - - button-1000 { - label = "Volume Down"; - linux,code = <KEY_VOLUMEDOWN>; - channel = <0>; - voltage = <1000000>; - }; - - button-1200 { - label = "Back"; - linux,code = <KEY_BACK>; - channel = <0>; - voltage = <1200000>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -®_usb0_vbus { - status = "okay"; -}; - -®_usb2_vbus { - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pb_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - -&usbphy { - usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb0_vbus_det-gpios = <&pio 7 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PH5 */ - usb0_vbus-supply = <®_usb0_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun4i-a10-cubieboard.dts b/arch/arm/dts/sun4i-a10-cubieboard.dts deleted file mode 100644 index 0645d606423..00000000000 --- a/arch/arm/dts/sun4i-a10-cubieboard.dts +++ /dev/null @@ -1,255 +0,0 @@ -/* - * Copyright 2012 Stefan Roese - * Stefan Roese <sr@denx.de> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun4i-a10.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include <dt-bindings/gpio/gpio.h> - -/ { - model = "Cubietech Cubieboard"; - compatible = "cubietech,a10-cubieboard", "allwinner,sun4i-a10"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - hdmi-connector { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_in: endpoint { - remote-endpoint = <&hdmi_out_con>; - }; - }; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&led_pins_cubieboard>; - - led-0 { - label = "cubieboard:blue:usr"; - gpios = <&pio 7 21 GPIO_ACTIVE_HIGH>; /* LED1 */ - }; - - led-1 { - label = "cubieboard:green:usr"; - gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>; /* LED2 */ - linux,default-trigger = "heartbeat"; - }; - }; -}; - -&ahci { - target-supply = <®_ahci_5v>; - status = "okay"; -}; - -&codec { - status = "okay"; -}; - -&cpu0 { - cpu-supply = <®_dcdc2>; -}; - -&de { - status = "okay"; -}; - -&ehci0 { - status = "okay"; -}; - -&ehci1 { - status = "okay"; -}; - -&emac { - phy-handle = <&phy1>; - status = "okay"; -}; - -&emac_sram { - status = "okay"; -}; - -&hdmi { - status = "okay"; -}; - -&hdmi_out { - hdmi_out_con: endpoint { - remote-endpoint = <&hdmi_con_in>; - }; -}; - -&i2c0 { - status = "okay"; - - axp209: pmic@34 { - reg = <0x34>; - interrupts = <0>; - }; -}; - -&i2c1 { - status = "okay"; -}; - -&ir0 { - pinctrl-names = "default"; - pinctrl-0 = <&ir0_rx_pins>; - status = "okay"; -}; - -&mdio { - status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ - status = "okay"; -}; - -&ohci0 { - status = "okay"; -}; - -&ohci1 { - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -&pio { - led_pins_cubieboard: led-pins { - pins = "PH20", "PH21"; - function = "gpio_out"; - drive-strength = <20>; - }; -}; - -®_ahci_5v { - status = "okay"; -}; - -#include "axp209.dtsi" - -&ac_power_supply { - status = "okay"; -}; - -®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1450000>; - regulator-name = "vdd-cpu"; -}; - -®_dcdc3 { - regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-int-dll"; -}; - -®_ldo1 { - regulator-name = "vdd-rtc"; -}; - -®_ldo2 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "avcc"; -}; - -®_usb1_vbus { - status = "okay"; -}; - -®_usb2_vbus { - status = "okay"; -}; - -&spi0 { - pinctrl-names = "default"; - pinctrl-0 = <&spi0_pi_pins>, - <&spi0_cs0_pi_pin>; - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pb_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - -&usbphy { - usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb1_vbus-supply = <®_usb1_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun4i-a10-dserve-dsrv9703c.dts b/arch/arm/dts/sun4i-a10-dserve-dsrv9703c.dts deleted file mode 100644 index 63e77c05bfd..00000000000 --- a/arch/arm/dts/sun4i-a10-dserve-dsrv9703c.dts +++ /dev/null @@ -1,218 +0,0 @@ -/* - * Copyright 2016 Hans de Goede <hdegoede@redhat.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun4i-a10.dtsi" -#include "sunxi-common-regulators.dtsi" -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/pwm/pwm.h> - -/ { - model = "Dserve DSRV9703C"; - compatible = "dserve,dsrv9703c", "allwinner,sun4i-a10"; - - aliases { - serial0 = &uart0; - }; - - backlight: backlight { - compatible = "pwm-backlight"; - pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; - brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; - default-brightness-level = <8>; - enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */ - power-supply = <®_vcc3v3>; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - haptics { - compatible = "regulator-haptic"; - haptic-supply = <®_motor>; - min-microvolt = <3000000>; - max-microvolt = <3000000>; - }; - - reg_motor: reg-motor { - compatible = "regulator-fixed"; - regulator-name = "vcc-motor"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - enable-active-high; - gpio = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */ - }; -}; - -&codec { - allwinner,pa-gpios = <&pio 7 15 GPIO_ACTIVE_HIGH>; /* PH15 */ - status = "okay"; -}; - -&cpu0 { - cpu-supply = <®_dcdc2>; -}; - -&ehci1 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - axp209: pmic@34 { - reg = <0x34>; - interrupts = <0>; - }; -}; - -#include "axp209.dtsi" - -&i2c1 { - /* pull-ups and devices require AXP209 LDO3 */ - status = "failed"; -}; - -&i2c2 { - status = "okay"; - - ft5406ee8: touchscreen@38 { - compatible = "edt,edt-ft5406"; - reg = <0x38>; - interrupt-parent = <&pio>; - interrupts = <7 21 IRQ_TYPE_EDGE_FALLING>; - reset-gpios = <&pio 1 13 GPIO_ACTIVE_LOW>; - touchscreen-size-x = <1024>; - touchscreen-size-y = <768>; - }; -}; - -&lradc { - vref-supply = <®_ldo2>; - status = "okay"; - - button-400 { - label = "Volume Down"; - linux,code = <KEY_VOLUMEDOWN>; - channel = <0>; - voltage = <400000>; - }; - - button-800 { - label = "Volume Up"; - linux,code = <KEY_VOLUMEUP>; - channel = <0>; - voltage = <800000>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -&pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_pin>; - status = "okay"; -}; - -®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-cpu"; -}; - -®_dcdc3 { - regulator-always-on; - regulator-min-microvolt = <1250000>; - regulator-max-microvolt = <1250000>; - regulator-name = "vdd-int-dll"; -}; - -®_ldo1 { - regulator-name = "vdd-rtc"; -}; - -®_ldo2 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "avcc"; -}; - -®_usb0_vbus { - status = "okay"; -}; - -®_usb2_vbus { - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pb_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - -&usbphy { - usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb0_vbus_det-gpios = <&pio 7 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PH5 */ - usb0_vbus-supply = <®_usb0_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun4i-a10-gemei-g9.dts b/arch/arm/dts/sun4i-a10-gemei-g9.dts deleted file mode 100644 index ea7a59dcf8f..00000000000 --- a/arch/arm/dts/sun4i-a10-gemei-g9.dts +++ /dev/null @@ -1,192 +0,0 @@ -/* - * Copyright 2015 Priit Laes - * - * Priit Laes <plaes@plaes.org> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun4i-a10.dtsi" -#include "sunxi-common-regulators.dtsi" -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/interrupt-controller/irq.h> - -/ { - model = "Gemei G9 Tablet"; - compatible = "gemei,g9", "allwinner,sun4i-a10"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -/* - * TODO: - * 2x cameras via CSI - * AXP battery management - * NAND - * OTG - * Touchscreen - gt801_2plus1 @ i2c adapter 2 @ 0x48 - */ -&codec { - /* PH15 controls power to external amplifier (ft2012q) */ - allwinner,pa-gpios = <&pio 7 15 GPIO_ACTIVE_HIGH>; - status = "okay"; -}; - -&cpu0 { - cpu-supply = <®_dcdc2>; -}; - -&ehci0 { - status = "okay"; -}; - -&ehci1 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - axp209: pmic@34 { - reg = <0x34>; - interrupts = <0>; - }; -}; - -#include "axp209.dtsi" - -&i2c1 { - status = "okay"; - - /* Accelerometer */ - bma250@18 { - compatible = "bosch,bma250"; - reg = <0x18>; - interrupt-parent = <&pio>; - interrupts = <7 0 IRQ_TYPE_EDGE_RISING>; /* PH00 / EINT0 */ - }; -}; - -&lradc { - vref-supply = <®_ldo2>; - - status = "okay"; - - button-158 { - label = "Volume Down"; - linux,code = <KEY_VOLUMEDOWN>; - channel = <0>; - voltage = <158730>; - }; - - button-349 { - label = "Volume Up"; - linux,code = <KEY_VOLUMEUP>; - channel = <0>; - voltage = <349206>; - }; - - button-1142 { - label = "Esc"; - linux,code = <KEY_ESC>; - channel = <0>; - voltage = <1142856>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH01 */ - status = "okay"; -}; - -®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-cpu"; -}; - -®_dcdc3 { - regulator-always-on; - regulator-min-microvolt = <1250000>; - regulator-max-microvolt = <1250000>; - regulator-name = "vdd-int-dll"; -}; - -®_ldo1 { - regulator-name = "vdd-rtc"; -}; - -®_ldo2 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "avcc"; -}; - -®_usb1_vbus { - status = "okay"; -}; - -®_usb2_vbus { - status = "okay"; -}; - - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pb_pins>; - status = "okay"; -}; - -&usbphy { - usb1_vbus-supply = <®_usb1_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun4i-a10-hackberry.dts b/arch/arm/dts/sun4i-a10-hackberry.dts deleted file mode 100644 index 47dea092250..00000000000 --- a/arch/arm/dts/sun4i-a10-hackberry.dts +++ /dev/null @@ -1,140 +0,0 @@ -/* - * Copyright 2012 Maxime Ripard - * - * Maxime Ripard <maxime.ripard@free-electrons.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun4i-a10.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include <dt-bindings/gpio/gpio.h> - -/ { - model = "Miniand Hackberry"; - compatible = "miniand,hackberry", "allwinner,sun4i-a10"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - reg_emac_3v3: emac-3v3 { - compatible = "regulator-fixed"; - regulator-name = "emac-3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - startup-delay-us = <20000>; - enable-active-high; - gpio = <&pio 7 19 GPIO_ACTIVE_HIGH>; - }; -}; - -&ehci0 { - status = "okay"; -}; - -&ehci1 { - status = "okay"; -}; - -&emac { - phy-handle = <&phy0>; - status = "okay"; -}; - -&emac_sram { - status = "okay"; -}; - -&ir0 { - pinctrl-names = "default"; - pinctrl-0 = <&ir0_rx_pins>; - status = "okay"; -}; - -&mdio { - phy-supply = <®_emac_3v3>; - status = "okay"; - - phy0: ethernet-phy@0 { - reg = <0>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ - status = "okay"; -}; - -&ohci0 { - status = "okay"; -}; - -&ohci1 { - status = "okay"; -}; - -®_usb1_vbus { - status = "okay"; -}; - -®_usb2_vbus { - gpio = <&pio 7 12 GPIO_ACTIVE_HIGH>; - status = "okay"; -}; - -&usbphy { - usb1_vbus-supply = <®_usb1_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pb_pins>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun4i-a10-hyundai-a7hd.dts b/arch/arm/dts/sun4i-a10-hyundai-a7hd.dts deleted file mode 100644 index bf2044bac42..00000000000 --- a/arch/arm/dts/sun4i-a10-hyundai-a7hd.dts +++ /dev/null @@ -1,115 +0,0 @@ -/* - * Copyright 2015 Hans de Goede <hdegoede@redhat.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun4i-a10.dtsi" -#include "sunxi-common-regulators.dtsi" -#include <dt-bindings/gpio/gpio.h> - -/ { - model = "Hyundai A7HD"; - compatible = "hyundai,a7hd", "allwinner,sun4i-a10"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&ehci1 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - axp209: pmic@34 { - compatible = "x-powers,axp209"; - reg = <0x34>; - interrupts = <0>; - - interrupt-controller; - #interrupt-cells = <1>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -®_usb0_vbus { - status = "okay"; -}; - -®_usb2_vbus { - gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */ - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pb_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - -&usbphy { - usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb0_vbus_det-gpios = <&pio 7 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PH5 */ - usb0_vbus-supply = <®_usb0_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun4i-a10-inet1.dts b/arch/arm/dts/sun4i-a10-inet1.dts deleted file mode 100644 index 60e432a0ef1..00000000000 --- a/arch/arm/dts/sun4i-a10-inet1.dts +++ /dev/null @@ -1,229 +0,0 @@ -/* - * Copyright 2015 Hans de Goede <hdegoede@redhat.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun4i-a10.dtsi" -#include "sunxi-common-regulators.dtsi" -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/pwm/pwm.h> - -/ { - model = "iNet-1"; - compatible = "inet-tek,inet1", "allwinner,sun4i-a10"; - - aliases { - serial0 = &uart0; - }; - - backlight: backlight { - compatible = "pwm-backlight"; - pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; - brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; - default-brightness-level = <8>; - enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */ - power-supply = <®_vcc3v3>; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&codec { - status = "okay"; -}; - -&cpu0 { - cpu-supply = <®_dcdc2>; -}; - -&ehci0 { - status = "okay"; -}; - -&ehci1 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - axp209: pmic@34 { - reg = <0x34>; - interrupts = <0>; - }; -}; - -#include "axp209.dtsi" - -&i2c1 { - status = "okay"; - - /* Accelerometer */ - bma250@18 { - compatible = "bosch,bma250"; - reg = <0x18>; - interrupt-parent = <&pio>; - interrupts = <7 0 IRQ_TYPE_EDGE_RISING>; /* PH0 / EINT0 */ - }; -}; - -&i2c2 { - status = "okay"; - - ft5x: touchscreen@38 { - compatible = "edt,edt-ft5406"; - reg = <0x38>; - interrupt-parent = <&pio>; - interrupts = <7 21 IRQ_TYPE_EDGE_FALLING>; - wake-gpios = <&pio 1 13 GPIO_ACTIVE_HIGH>; /* PB13 */ - touchscreen-size-x = <600>; - touchscreen-size-y = <1024>; - touchscreen-swapped-x-y; - }; -}; - -&lradc { - vref-supply = <®_ldo2>; - status = "okay"; - - button-200 { - label = "Volume Up"; - linux,code = <KEY_VOLUMEUP>; - channel = <0>; - voltage = <200000>; - }; - - button-1000 { - label = "Volume Down"; - linux,code = <KEY_VOLUMEDOWN>; - channel = <0>; - voltage = <1000000>; - }; - - button-1200 { - label = "Home"; - linux,code = <KEY_HOMEPAGE>; - channel = <0>; - voltage = <1200000>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ - status = "okay"; -}; - -&ohci0 { - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -&pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_pin>; - status = "okay"; -}; - -®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-cpu"; -}; - -®_dcdc3 { - regulator-always-on; - regulator-min-microvolt = <1250000>; - regulator-max-microvolt = <1250000>; - regulator-name = "vdd-int-dll"; -}; - -®_ldo1 { - regulator-name = "vdd-rtc"; -}; - -®_ldo2 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "avcc"; -}; - -®_usb0_vbus { - status = "okay"; -}; - -®_usb1_vbus { - status = "okay"; -}; - -®_usb2_vbus { - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pb_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - -&usbphy { - usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb0_vbus_det-gpios = <&pio 7 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PH5 */ - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun4i-a10-inet97fv2.dts b/arch/arm/dts/sun4i-a10-inet97fv2.dts deleted file mode 100644 index 76016f2ca29..00000000000 --- a/arch/arm/dts/sun4i-a10-inet97fv2.dts +++ /dev/null @@ -1,203 +0,0 @@ -/* - * Copyright 2014 Open Source Support GmbH - * - * David Lanzendörfer <david.lanzendoerfer@o2s.ch> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun4i-a10.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/interrupt-controller/irq.h> - -/ { - model = "INet-97F Rev 02"; - compatible = "primux,inet97fv2", "allwinner,sun4i-a10"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&cpu0 { - cpu-supply = <®_dcdc2>; -}; - -&ehci1 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - axp209: pmic@34 { - reg = <0x34>; - interrupts = <0>; - }; -}; - -#include "axp209.dtsi" - -&i2c1 { - status = "okay"; -}; - -&i2c2 { - status = "okay"; - - ft5406ee8: touchscreen@38 { - compatible = "edt,edt-ft5406"; - reg = <0x38>; - interrupt-parent = <&pio>; - interrupts = <7 21 IRQ_TYPE_EDGE_FALLING>; - touchscreen-size-x = <800>; - touchscreen-size-y = <480>; - }; -}; - -&lradc { - vref-supply = <®_ldo2>; - status = "okay"; - - button-200 { - label = "Menu"; - linux,code = <KEY_MENU>; - channel = <0>; - voltage = <200000>; - }; - - button-600 { - label = "Volume Up"; - linux,code = <KEY_VOLUMEUP>; - channel = <0>; - voltage = <600000>; - }; - - button-800 { - label = "Volume Down"; - linux,code = <KEY_VOLUMEDOWN>; - channel = <0>; - voltage = <800000>; - }; - - button-1000 { - label = "Home"; - linux,code = <KEY_HOMEPAGE>; - channel = <0>; - voltage = <1000000>; - }; - - button-1200 { - label = "Esc"; - linux,code = <KEY_ESC>; - channel = <0>; - voltage = <1200000>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-cpu"; -}; - -®_dcdc3 { - regulator-always-on; - regulator-min-microvolt = <1250000>; - regulator-max-microvolt = <1250000>; - regulator-name = "vdd-int-dll"; -}; - -®_ldo1 { - regulator-name = "vdd-rtc"; -}; - -®_ldo2 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "avcc"; -}; - -®_usb0_vbus { - status = "okay"; -}; - -®_usb2_vbus { - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pb_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - -&usbphy { - usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb0_vbus_det-gpios = <&pio 7 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PH5 */ - usb0_vbus-supply = <®_usb0_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun4i-a10-inet9f-rev03.dts b/arch/arm/dts/sun4i-a10-inet9f-rev03.dts deleted file mode 100644 index 62e7aa587f8..00000000000 --- a/arch/arm/dts/sun4i-a10-inet9f-rev03.dts +++ /dev/null @@ -1,357 +0,0 @@ -/* - * Copyright 2015 Hans de Goede <hdegoede@redhat.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun4i-a10.dtsi" -#include "sunxi-common-regulators.dtsi" -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/interrupt-controller/irq.h> - -/ { - model = "iNet-9F Rev 03"; - compatible = "inet-tek,inet9f-rev03", "allwinner,sun4i-a10"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - gpio-keys { - compatible = "gpio-keys-polled"; - poll-interval = <20>; - - event-left-joystick-left { - label = "Left Joystick Left"; - linux,code = <ABS_X>; - linux,input-type = <EV_ABS>; - linux,input-value = <0xffffffff>; /* -1 */ - gpios = <&pio 0 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA6 */ - }; - - event-left-joystick-right { - label = "Left Joystick Right"; - linux,code = <ABS_X>; - linux,input-type = <EV_ABS>; - linux,input-value = <1>; - gpios = <&pio 0 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA5 */ - }; - - event-left-joystick-up { - label = "Left Joystick Up"; - linux,code = <ABS_Y>; - linux,input-type = <EV_ABS>; - linux,input-value = <0xffffffff>; /* -1 */ - gpios = <&pio 0 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA8 */ - }; - - event-left-joystick-down { - label = "Left Joystick Down"; - linux,code = <ABS_Y>; - linux,input-type = <EV_ABS>; - linux,input-value = <1>; - gpios = <&pio 0 9 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA9 */ - }; - - event-right-joystick-left { - label = "Right Joystick Left"; - linux,code = <ABS_Z>; - linux,input-type = <EV_ABS>; - linux,input-value = <0xffffffff>; /* -1 */ - gpios = <&pio 0 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA1 */ - }; - - event-right-joystick-right { - label = "Right Joystick Right"; - linux,code = <ABS_Z>; - linux,input-type = <EV_ABS>; - linux,input-value = <1>; - gpios = <&pio 0 0 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA0 */ - }; - - event-right-joystick-up { - label = "Right Joystick Up"; - linux,code = <ABS_RZ>; - linux,input-type = <EV_ABS>; - linux,input-value = <0xffffffff>; /* -1 */ - gpios = <&pio 0 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA3 */ - }; - - event-right-joystick-down { - label = "Right Joystick Down"; - linux,code = <ABS_RZ>; - linux,input-type = <EV_ABS>; - linux,input-value = <1>; - gpios = <&pio 0 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA4 */ - }; - - event-dpad-left { - label = "DPad Left"; - linux,code = <ABS_HAT0X>; - linux,input-type = <EV_ABS>; - linux,input-value = <0xffffffff>; /* -1 */ - gpios = <&pio 7 23 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PH23 */ - }; - - event-dpad-right { - label = "DPad Right"; - linux,code = <ABS_HAT0X>; - linux,input-type = <EV_ABS>; - linux,input-value = <1>; - gpios = <&pio 7 24 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PH24 */ - }; - - event-dpad-up { - label = "DPad Up"; - linux,code = <ABS_HAT0Y>; - linux,input-type = <EV_ABS>; - linux,input-value = <0xffffffff>; /* -1 */ - gpios = <&pio 7 25 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PH25 */ - }; - - event-dpad-down { - label = "DPad Down"; - linux,code = <ABS_HAT0Y>; - linux,input-type = <EV_ABS>; - linux,input-value = <1>; - gpios = <&pio 7 26 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PH26 */ - }; - - event-x { - label = "Button X"; - linux,code = <BTN_X>; - gpios = <&pio 0 16 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA16 */ - }; - - event-y { - label = "Button Y"; - linux,code = <BTN_Y>; - gpios = <&pio 0 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA14 */ - }; - - event-a { - label = "Button A"; - linux,code = <BTN_A>; - gpios = <&pio 0 17 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA17 */ - }; - - event-b { - label = "Button B"; - linux,code = <BTN_B>; - gpios = <&pio 0 15 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA15 */ - }; - - event-select { - label = "Select Button"; - linux,code = <BTN_SELECT>; - gpios = <&pio 0 11 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA11 */ - }; - - event-start { - label = "Start Button"; - linux,code = <BTN_START>; - gpios = <&pio 0 12 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA12 */ - }; - - event-top-left { - label = "Top Left Button"; - linux,code = <BTN_TL>; - gpios = <&pio 7 22 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PH22 */ - }; - - event-top-right { - label = "Top Right Button"; - linux,code = <BTN_TR>; - gpios = <&pio 0 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA13 */ - }; - }; -}; - -&cpu0 { - cpu-supply = <®_dcdc2>; -}; - -&ehci1 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - axp209: pmic@34 { - reg = <0x34>; - interrupts = <0>; - }; -}; - -#include "axp209.dtsi" - -&i2c1 { - status = "okay"; - - /* Accelerometer */ - bma250@18 { - compatible = "bosch,bma250"; - reg = <0x18>; - interrupt-parent = <&pio>; - interrupts = <7 0 IRQ_TYPE_EDGE_RISING>; /* PH0 / EINT0 */ - }; -}; - -&i2c2 { - status = "okay"; - - ft5406ee8: touchscreen@38 { - compatible = "edt,edt-ft5406"; - reg = <0x38>; - interrupt-parent = <&pio>; - interrupts = <7 21 IRQ_TYPE_EDGE_FALLING>; - touchscreen-size-x = <800>; - touchscreen-size-y = <480>; - }; -}; - -&lradc { - vref-supply = <®_ldo2>; - status = "okay"; - - button-200 { - label = "Menu"; - linux,code = <KEY_MENU>; - channel = <0>; - voltage = <200000>; - }; - - button-600 { - label = "Volume Up"; - linux,code = <KEY_VOLUMEUP>; - channel = <0>; - voltage = <600000>; - }; - - button-800 { - label = "Volume Down"; - linux,code = <KEY_VOLUMEDOWN>; - channel = <0>; - voltage = <800000>; - }; - - button-1000 { - label = "Home"; - linux,code = <KEY_HOMEPAGE>; - channel = <0>; - voltage = <1000000>; - }; - - button-1200 { - label = "Esc"; - linux,code = <KEY_ESC>; - channel = <0>; - voltage = <1200000>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-cpu"; -}; - -®_dcdc3 { - regulator-always-on; - regulator-min-microvolt = <1250000>; - regulator-max-microvolt = <1250000>; - regulator-name = "vdd-int-dll"; -}; - -®_ldo1 { - regulator-name = "vdd-rtc"; -}; - -®_ldo2 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "avcc"; -}; - -®_usb0_vbus { - status = "okay"; -}; - -®_usb2_vbus { - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pb_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - -&usbphy { - usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb0_vbus_det-gpios = <&pio 7 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PH5 */ - usb0_vbus-supply = <®_usb0_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun4i-a10-itead-iteaduino-plus.dts b/arch/arm/dts/sun4i-a10-itead-iteaduino-plus.dts deleted file mode 100644 index d4e319d16aa..00000000000 --- a/arch/arm/dts/sun4i-a10-itead-iteaduino-plus.dts +++ /dev/null @@ -1,126 +0,0 @@ -/* - * Copyright 2015 Josef Gajdusek <atx@atx.name> - * Copyright 2015 - Marcus Cooper <codekipper@gmail.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun4i-a10.dtsi" -#include "sunxi-itead-core-common.dtsi" - -/ { - model = "Iteaduino Plus A10"; - compatible = "itead,iteaduino-plus-a10", "allwinner,sun4i-a10"; -}; - -&ahci { - target-supply = <®_ahci_5v>; - status = "okay"; -}; - -&emac { - pinctrl-names = "default"; - pinctrl-0 = <&emac_pins>; - phy-handle = <&phy1>; - status = "okay"; -}; - -&emac_sram { - status = "okay"; -}; - -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; - - axp209: pmic@34 { - interrupts = <0>; - }; -}; - -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; - status = "okay"; -}; - -&i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins>; - status = "okay"; -}; - -&ir0 { - pinctrl-names = "default"; - pinctrl-0 = <&ir0_rx_pins>; - status = "okay"; -}; - -&mdio { - status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; -}; - -&mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins>; - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ - status = "okay"; -}; - -®_ahci_5v { - status = "okay"; -}; - -&spi0 { - pinctrl-names = "default"; - pinctrl-0 = <&spi0_pi_pins>, - <&spi0_cs0_pi_pin>; - status = "okay"; -}; - -&uart0 { - pinctrl-0 = <&uart0_pb_pins>; -}; diff --git a/arch/arm/dts/sun4i-a10-jesurun-q5.dts b/arch/arm/dts/sun4i-a10-jesurun-q5.dts deleted file mode 100644 index 1aeb0bd5519..00000000000 --- a/arch/arm/dts/sun4i-a10-jesurun-q5.dts +++ /dev/null @@ -1,181 +0,0 @@ -/* - * Copyright 2015 Gábor Nyers - * - * Gábor Nyers <gabor.nyers@gmail.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun4i-a10.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include <dt-bindings/gpio/gpio.h> - -/ { - model = "Jesurun Q5"; - compatible = "jesurun,q5", "allwinner,sun4i-a10"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - leds { - compatible = "gpio-leds"; - - led { - label = "q5:green:usr"; - gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>; /* PH20 */ - }; - - }; - - reg_emac_3v3: emac-3v3 { - compatible = "regulator-fixed"; - regulator-name = "emac-3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - startup-delay-us = <20000>; - enable-active-high; - gpio = <&pio 7 19 GPIO_ACTIVE_HIGH>; /* PH19 */ - }; -}; - -&ahci { - status = "okay"; -}; - -&ehci0 { - status = "okay"; -}; - -&ehci1 { - status = "okay"; -}; - -&emac { - phy-handle = <&phy1>; - status = "okay"; -}; - -&emac_sram { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - axp209: pmic@34 { - compatible = "x-powers,axp209"; - reg = <0x34>; - interrupts = <0>; - - interrupt-controller; - #interrupt-cells = <1>; - }; -}; - -&ir0 { - pinctrl-names = "default"; - pinctrl-0 = <&ir0_rx_pins>; - status = "okay"; -}; - -&mdio { - phy-supply = <®_emac_3v3>; - status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ - status = "okay"; -}; - -&ohci0 { - status = "okay"; -}; - -&ohci1 { - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -®_usb0_vbus { - regulator-boot-on; - status = "okay"; -}; - -®_usb1_vbus { - status = "okay"; -}; - -®_usb2_vbus { - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pb_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "host"; - status = "okay"; -}; - -&usbphy { - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun4i-a10-marsboard.dts b/arch/arm/dts/sun4i-a10-marsboard.dts deleted file mode 100644 index 81fdb217d33..00000000000 --- a/arch/arm/dts/sun4i-a10-marsboard.dts +++ /dev/null @@ -1,182 +0,0 @@ -/* - * Copyright 2015 Aleksei Mamlin - * Aleksei Mamlin <mamlinav@gmail.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun4i-a10.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include <dt-bindings/gpio/gpio.h> - -/ { - model = "HAOYU Electronics Marsboard A10"; - compatible = "haoyu,a10-marsboard", "allwinner,sun4i-a10"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - leds { - compatible = "gpio-leds"; - - led-0 { - label = "marsboard:red1:usr"; - gpios = <&pio 1 5 GPIO_ACTIVE_HIGH>; - }; - - led-1 { - label = "marsboard:red2:usr"; - gpios = <&pio 1 6 GPIO_ACTIVE_HIGH>; - }; - - led-2 { - label = "marsboard:red3:usr"; - gpios = <&pio 1 7 GPIO_ACTIVE_HIGH>; - }; - - led-3 { - label = "marsboard:red4:usr"; - gpios = <&pio 1 8 GPIO_ACTIVE_HIGH>; - }; - }; -}; - -&ahci { - status = "okay"; -}; - -&codec { - status = "okay"; -}; - -&ehci0 { - status = "okay"; -}; - -&ehci1 { - status = "okay"; -}; - -&emac_sram { - status = "okay"; -}; - -&emac { - phy-handle = <&phy1>; - status = "okay"; -}; - -&i2c0 { - status = "okay"; -}; - -&i2c1 { - status = "okay"; -}; - -&i2c2 { - status = "okay"; -}; - -&mdio { - status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ - status = "okay"; -}; - -&ohci0 { - status = "okay"; -}; - -&ohci1 { - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -®_usb1_vbus { - status = "okay"; -}; - -®_usb2_vbus { - status = "okay"; -}; - -&spi0 { - pinctrl-names = "default"; - pinctrl-0 = <&spi0_pi_pins>, - <&spi0_cs0_pi_pin>; - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pb_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - -&usbphy { - usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb1_vbus-supply = <®_usb1_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun4i-a10-mini-xplus.dts b/arch/arm/dts/sun4i-a10-mini-xplus.dts deleted file mode 100644 index f9d74e21031..00000000000 --- a/arch/arm/dts/sun4i-a10-mini-xplus.dts +++ /dev/null @@ -1,144 +0,0 @@ -/* - * Copyright 2012 Maxime Ripard - * - * Maxime Ripard <maxime.ripard@free-electrons.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun4i-a10.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include <dt-bindings/gpio/gpio.h> - -/ { - model = "PineRiver Mini X-Plus"; - compatible = "pineriver,mini-xplus", "allwinner,sun4i-a10"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&ehci0 { - status = "okay"; -}; - -&ehci1 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - axp209: pmic@34 { - compatible = "x-powers,axp209"; - reg = <0x34>; - interrupts = <0>; - - interrupt-controller; - #interrupt-cells = <1>; - }; -}; - -&ir0 { - pinctrl-names = "default"; - pinctrl-0 = <&ir0_rx_pins>; - status = "okay"; -}; - -&ir0_rx_pins { - /* The ir receiver is not always populated */ - bias-pull-up; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ - status = "okay"; -}; - -&ohci0 { - status = "okay"; -}; - -&ohci1 { - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -®_usb0_vbus { - regulator-boot-on; - status = "okay"; -}; - -®_usb1_vbus { - status = "okay"; -}; - -®_usb2_vbus { - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pb_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "host"; - status = "okay"; -}; - -&usbphy { - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun4i-a10-mk802.dts b/arch/arm/dts/sun4i-a10-mk802.dts deleted file mode 100644 index 059fe9c5d02..00000000000 --- a/arch/arm/dts/sun4i-a10-mk802.dts +++ /dev/null @@ -1,144 +0,0 @@ -/* - * Copyright 2015 Hans de Goede <hdegoede@redhat.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun4i-a10.dtsi" -#include "sunxi-common-regulators.dtsi" -#include <dt-bindings/gpio/gpio.h> - -/ { - model = "MK802"; - compatible = "allwinner,mk802", "allwinner,sun4i-a10"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - hdmi-connector { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_in: endpoint { - remote-endpoint = <&hdmi_out_con>; - }; - }; - }; -}; - -&codec { - status = "okay"; -}; - -&de { - status = "okay"; -}; - -&ehci0 { - status = "okay"; -}; - -&ehci1 { - status = "okay"; -}; - -&hdmi { - status = "okay"; -}; - -&hdmi_out { - hdmi_out_con: endpoint { - remote-endpoint = <&hdmi_con_in>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ - status = "okay"; -}; - -&ohci0 { - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -®_usb0_vbus { - status = "okay"; -}; - -®_usb1_vbus { - status = "okay"; -}; - -®_usb2_vbus { - gpio = <&pio 7 12 GPIO_ACTIVE_HIGH>; /* PH12 */ - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pb_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - -&usbphy { - usb0_id_det-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ - usb0_vbus_det-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun4i-a10-mk802ii.dts b/arch/arm/dts/sun4i-a10-mk802ii.dts deleted file mode 100644 index 17dcdf03111..00000000000 --- a/arch/arm/dts/sun4i-a10-mk802ii.dts +++ /dev/null @@ -1,111 +0,0 @@ -/* - * Copyright 2015 Hans de Goede <hdegoede@redhat.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun4i-a10.dtsi" -#include "sunxi-common-regulators.dtsi" -#include <dt-bindings/gpio/gpio.h> - -/ { - model = "MK802ii"; - compatible = "allwinner,mk802ii", "allwinner,sun4i-a10"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&ehci0 { - status = "okay"; -}; - -&ehci1 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - axp209: pmic@34 { - compatible = "x-powers,axp209"; - reg = <0x34>; - interrupts = <0>; - - interrupt-controller; - #interrupt-cells = <1>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ - status = "okay"; -}; - -&ohci0 { - status = "okay"; -}; - -®_usb1_vbus { - status = "okay"; -}; - -®_usb2_vbus { - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pb_pins>; - status = "okay"; -}; - -&usbphy { - usb1_vbus-supply = <®_usb1_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun4i-a10-olinuxino-lime.dts b/arch/arm/dts/sun4i-a10-olinuxino-lime.dts deleted file mode 100644 index 83d283cf663..00000000000 --- a/arch/arm/dts/sun4i-a10-olinuxino-lime.dts +++ /dev/null @@ -1,225 +0,0 @@ -/* - * Copyright 2014 - Hans de Goede <hdegoede@redhat.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun4i-a10.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include <dt-bindings/gpio/gpio.h> - -/ { - model = "Olimex A10-OLinuXino-LIME"; - compatible = "olimex,a10-olinuxino-lime", "allwinner,sun4i-a10"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - hdmi-connector { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_in: endpoint { - remote-endpoint = <&hdmi_out_con>; - }; - }; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&led_pins_olinuxinolime>; - - led { - label = "a10-olinuxino-lime:green:usr"; - gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; - default-state = "on"; - }; - }; -}; - -&ahci { - target-supply = <®_ahci_5v>; - status = "okay"; -}; - -&cpu0 { - /* - * The A10-Lime is known to be unstable when running at 1008 MHz - */ - operating-points = - /* kHz uV */ - <912000 1350000>, - <864000 1300000>, - <624000 1250000>; -}; - -&de { - status = "okay"; -}; - -&ehci0 { - status = "okay"; -}; - -&ehci1 { - status = "okay"; -}; - -&emac { - phy-handle = <&phy1>; - status = "okay"; -}; - -&emac_sram { - status = "okay"; -}; - -&hdmi { - status = "okay"; -}; - -&hdmi_out { - hdmi_out_con: endpoint { - remote-endpoint = <&hdmi_con_in>; - }; -}; - -&i2c0 { - status = "okay"; - - axp209: pmic@34 { - compatible = "x-powers,axp209"; - reg = <0x34>; - interrupts = <0>; - - interrupt-controller; - #interrupt-cells = <1>; - }; -}; - -&i2c1 { - status = "okay"; - - eeprom: eeprom@50 { - compatible = "atmel,24c16"; - reg = <0x50>; - pagesize = <16>; - }; -}; - -&mdio { - status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ - status = "okay"; -}; - -&ohci0 { - status = "okay"; -}; - -&ohci1 { - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -&pio { - led_pins_olinuxinolime: led-pin { - pins = "PH2"; - function = "gpio_out"; - drive-strength = <20>; - }; -}; - -®_ahci_5v { - gpio = <&pio 2 3 GPIO_ACTIVE_HIGH>; - status = "okay"; -}; - -®_usb0_vbus { - status = "okay"; -}; - -®_usb1_vbus { - status = "okay"; -}; - -®_usb2_vbus { - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pb_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - -&usbphy { - usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb0_vbus_det-gpios = <&pio 7 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH5 */ - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun4i-a10-pcduino.dts b/arch/arm/dts/sun4i-a10-pcduino.dts deleted file mode 100644 index a332d61fd56..00000000000 --- a/arch/arm/dts/sun4i-a10-pcduino.dts +++ /dev/null @@ -1,200 +0,0 @@ -/* - * Copyright 2014 Zoltan HERPAI - * Zoltan HERPAI <wigyori@uid0.hu> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun4i-a10.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> - -/ { - model = "LinkSprite pcDuino"; - compatible = "linksprite,a10-pcduino", "allwinner,sun4i-a10"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - leds { - compatible = "gpio-leds"; - - led-0 { - label = "pcduino:green:tx"; - gpios = <&pio 7 15 GPIO_ACTIVE_LOW>; - }; - - led-1 { - label = "pcduino:green:rx"; - gpios = <&pio 7 16 GPIO_ACTIVE_LOW>; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - - key-back { - label = "Key Back"; - linux,code = <KEY_BACK>; - gpios = <&pio 7 17 GPIO_ACTIVE_LOW>; - }; - - key-home { - label = "Key Home"; - linux,code = <KEY_HOME>; - gpios = <&pio 7 18 GPIO_ACTIVE_LOW>; - }; - - key-menu { - label = "Key Menu"; - linux,code = <KEY_MENU>; - gpios = <&pio 7 19 GPIO_ACTIVE_LOW>; - }; - }; -}; - -&cpu0 { - cpu-supply = <®_dcdc2>; -}; - -&ehci0 { - status = "okay"; -}; - -&ehci1 { - status = "okay"; -}; - -&emac { - phy-handle = <&phy1>; - status = "okay"; -}; - -&emac_sram { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - axp209: pmic@34 { - reg = <0x34>; - interrupts = <0>; - }; -}; - -&mdio { - status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ - status = "okay"; -}; - -&ohci0 { - status = "okay"; -}; - -&ohci1 { - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -#include "axp209.dtsi" - -®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-cpu"; -}; - -®_dcdc3 { - regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-int-dll"; -}; - -®_ldo1 { - regulator-name = "vdd-rtc"; -}; - -®_ldo2 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "avcc"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pb_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - -&usbphy { - usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb1_vbus-supply = <®_vcc5v0>; /* USB1 VBUS is always on */ - usb2_vbus-supply = <®_vcc5v0>; /* USB2 VBUS is always on */ - status = "okay"; -}; diff --git a/arch/arm/dts/sun4i-a10-pcduino2.dts b/arch/arm/dts/sun4i-a10-pcduino2.dts deleted file mode 100644 index bc4f128965e..00000000000 --- a/arch/arm/dts/sun4i-a10-pcduino2.dts +++ /dev/null @@ -1,67 +0,0 @@ -/* - * Copyright 2015 Siarhei Siamashka <siarhei.siamashka@gmail.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/* - * The LinkSprite pcDuino2 board is almost identical to the older - * LinkSprite pcDuino1 board. The only software visible difference - * is that the pcDuino2 board got a USB VBUS voltage regulator, which - * is controlled by the PD2 pin (pulled-up by default). Also one of - * the USB host ports has been replaced with a USB WIFI chip. - */ - -#include "sun4i-a10-pcduino.dts" - -/ { - model = "LinkSprite pcDuino2"; - compatible = "linksprite,a10-pcduino2", "allwinner,sun4i-a10"; -}; - -®_usb2_vbus { - gpio = <&pio 3 2 GPIO_ACTIVE_HIGH>; - status = "okay"; -}; - -&usbphy { - usb1_vbus-supply = <®_vcc3v3>; /* USB WIFI is always on */ - usb2_vbus-supply = <®_usb2_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts b/arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts deleted file mode 100644 index c3259694764..00000000000 --- a/arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts +++ /dev/null @@ -1,206 +0,0 @@ -/* - * Copyright 2015 Hans de Goede <hdegoede@redhat.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun4i-a10.dtsi" -#include "sunxi-common-regulators.dtsi" -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/pwm/pwm.h> - -/ { - model = "Point of View Protab2-IPS9"; - compatible = "pov,protab2-ips9", "allwinner,sun4i-a10"; - - aliases { - serial0 = &uart0; - }; - - backlight: backlight { - compatible = "pwm-backlight"; - pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; - brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; - default-brightness-level = <8>; - enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */ - power-supply = <®_vcc3v3>; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&codec { - allwinner,pa-gpios = <&pio 7 15 GPIO_ACTIVE_HIGH>; /* PH15 */ - status = "okay"; -}; - -&cpu0 { - cpu-supply = <®_dcdc2>; -}; - -&ehci0 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - axp209: pmic@34 { - reg = <0x34>; - interrupts = <0>; - }; -}; - -#include "axp209.dtsi" - -&i2c1 { - /* pull-ups and devices require AXP209 LDO3 */ - status = "failed"; -}; - -&i2c2 { - status = "okay"; - - touchscreen@5c { - compatible = "pixcir,pixcir_tangoc"; - reg = <0x5c>; - interrupt-parent = <&pio>; - interrupts = <7 21 IRQ_TYPE_EDGE_FALLING>; /* EINT21 (PH21) */ - attb-gpio = <&pio 7 21 GPIO_ACTIVE_HIGH>; /* PH21 */ - enable-gpios = <&pio 0 5 GPIO_ACTIVE_LOW>; - wake-gpios = <&pio 1 13 GPIO_ACTIVE_LOW>; - touchscreen-size-x = <1024>; - touchscreen-size-y = <768>; - touchscreen-inverted-x; - touchscreen-inverted-y; - }; -}; - -&lradc { - vref-supply = <®_ldo2>; - status = "okay"; - - button-400 { - label = "Volume Up"; - linux,code = <KEY_VOLUMEUP>; - channel = <0>; - voltage = <400000>; - }; - - button-800 { - label = "Volume Down"; - linux,code = <KEY_VOLUMEDOWN>; - channel = <0>; - voltage = <800000>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -&pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_pin>; - status = "okay"; -}; - -®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-cpu"; -}; - -®_dcdc3 { - regulator-always-on; - regulator-min-microvolt = <1250000>; - regulator-max-microvolt = <1250000>; - regulator-name = "vdd-int-dll"; -}; - -®_ldo1 { - regulator-name = "vdd-rtc"; -}; - -®_ldo2 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "avcc"; -}; - -®_usb0_vbus { - status = "okay"; -}; - -®_usb1_vbus { - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pb_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - -&usbphy { - usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ - usb0_vbus_det-gpios = <&pio 7 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PH5 */ - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun4i-a10-topwise-a721.dts b/arch/arm/dts/sun4i-a10-topwise-a721.dts deleted file mode 100644 index 3628f12d252..00000000000 --- a/arch/arm/dts/sun4i-a10-topwise-a721.dts +++ /dev/null @@ -1,242 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2020 Pascal Roeleven <dev@pascalroeleven.nl> - */ - -/dts-v1/; -#include "sun4i-a10.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/pwm/pwm.h> - -/ { - model = "Topwise A721"; - compatible = "topwise,a721", "allwinner,sun4i-a10"; - - aliases { - serial0 = &uart0; - }; - - backlight: backlight { - compatible = "pwm-backlight"; - pwms = <&pwm 0 100000 PWM_POLARITY_INVERTED>; - power-supply = <®_vbat>; - enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */ - brightness-levels = <0 30 40 50 60 70 80 90 100>; - default-brightness-level = <8>; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - panel { - compatible = "starry,kr070pe2t"; - backlight = <&backlight>; - power-supply = <®_lcd_power>; - - port { - panel_input: endpoint { - remote-endpoint = <&tcon0_out_panel>; - }; - }; - }; - - reg_lcd_power: reg-lcd-power { - compatible = "regulator-fixed"; - regulator-name = "reg-lcd-power"; - gpio = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* PH8 */ - enable-active-high; - }; - - reg_vbat: reg-vbat { - compatible = "regulator-fixed"; - regulator-name = "vbat"; - regulator-min-microvolt = <3700000>; - regulator-max-microvolt = <3700000>; - }; - -}; - -&codec { - status = "okay"; -}; - -&cpu0 { - cpu-supply = <®_dcdc2>; -}; - -&de { - status = "okay"; -}; - -&ehci0 { - status = "okay"; -}; - -&ehci1 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - axp209: pmic@34 { - reg = <0x34>; - interrupts = <0>; - }; -}; - -#include "axp209.dtsi" - -&ac_power_supply { - status = "okay"; -}; - -&battery_power_supply { - status = "okay"; -}; - -&i2c1 { - status = "okay"; - - accelerometer@4c { - compatible = "fsl,mma7660"; - reg = <0x4c>; - }; -}; - -&i2c2 { - status = "okay"; - - touchscreen@38 { - compatible = "edt,edt-ft5406"; - reg = <0x38>; - interrupt-parent = <&pio>; - interrupts = <7 21 IRQ_TYPE_EDGE_FALLING>; - touchscreen-size-x = <800>; - touchscreen-size-y = <480>; - vcc-supply = <®_vcc3v3>; - }; -}; - -&lradc { - vref-supply = <®_ldo2>; - status = "okay"; - - button-571 { - label = "Volume Up"; - linux,code = <KEY_VOLUMEUP>; - channel = <0>; - voltage = <571428>; - }; - - button-761 { - label = "Volume Down"; - linux,code = <KEY_VOLUMEDOWN>; - channel = <0>; - voltage = <761904>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH01 */ - status = "okay"; -}; - -&ohci0 { - status = "okay"; -}; - -&ohci1 { - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -&pio { - vcc-pb-supply = <®_vcc3v3>; - vcc-pf-supply = <®_vcc3v3>; - vcc-ph-supply = <®_vcc3v3>; -}; - -&pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_pin>; - status = "okay"; -}; - -®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-cpu"; -}; - -®_dcdc3 { - regulator-always-on; - regulator-min-microvolt = <1250000>; - regulator-max-microvolt = <1250000>; - regulator-name = "vdd-int-dll"; -}; - -®_ldo1 { - regulator-name = "vdd-rtc"; -}; - -®_ldo2 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "avcc"; -}; - -®_usb0_vbus { - status = "okay"; -}; - -®_usb1_vbus { - status = "okay"; -}; - -®_usb2_vbus { - status = "okay"; -}; - -&tcon0_out { - tcon0_out_panel: endpoint@0 { - reg = <0>; - remote-endpoint = <&panel_input>; - }; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pb_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - -&usb_power_supply { - status = "okay"; -}; - -&usbphy { - usb0_id_det-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ - usb0_vbus_det-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; - usb2_vbus-supply = <®_usb2_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun4i-a10.dtsi b/arch/arm/dts/sun4i-a10.dtsi deleted file mode 100644 index 51a6464aab9..00000000000 --- a/arch/arm/dts/sun4i-a10.dtsi +++ /dev/null @@ -1,1271 +0,0 @@ -/* - * Copyright 2012 Stefan Roese - * Stefan Roese <sr@denx.de> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include <dt-bindings/thermal/thermal.h> -#include <dt-bindings/dma/sun4i-a10.h> -#include <dt-bindings/clock/sun4i-a10-ccu.h> -#include <dt-bindings/reset/sun4i-a10-ccu.h> - -/ { - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&intc>; - - aliases { - ethernet0 = &emac; - }; - - chosen { - #address-cells = <1>; - #size-cells = <1>; - ranges; - - framebuffer-lcd0-hdmi { - compatible = "allwinner,simple-framebuffer", - "simple-framebuffer"; - allwinner,pipeline = "de_be0-lcd0-hdmi"; - clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_HDMI0>, - <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>, - <&ccu CLK_TCON0_CH1>, <&ccu CLK_DRAM_DE_BE0>; - status = "disabled"; - }; - - framebuffer-fe0-lcd0-hdmi { - compatible = "allwinner,simple-framebuffer", - "simple-framebuffer"; - allwinner,pipeline = "de_fe0-de_be0-lcd0-hdmi"; - clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_HDMI0>, - <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_AHB_DE_FE0>, - <&ccu CLK_DE_BE0>, <&ccu CLK_DE_FE0>, - <&ccu CLK_TCON0_CH1>, <&ccu CLK_HDMI>, - <&ccu CLK_DRAM_DE_FE0>, <&ccu CLK_DRAM_DE_BE0>; - status = "disabled"; - }; - - framebuffer-fe0-lcd0 { - compatible = "allwinner,simple-framebuffer", - "simple-framebuffer"; - allwinner,pipeline = "de_fe0-de_be0-lcd0"; - clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_DE_BE0>, - <&ccu CLK_AHB_DE_FE0>, <&ccu CLK_DE_BE0>, - <&ccu CLK_DE_FE0>, <&ccu CLK_TCON0_CH0>, - <&ccu CLK_DRAM_DE_FE0>, <&ccu CLK_DRAM_DE_BE0>; - status = "disabled"; - }; - - framebuffer-fe0-lcd0-tve0 { - compatible = "allwinner,simple-framebuffer", - "simple-framebuffer"; - allwinner,pipeline = "de_fe0-de_be0-lcd0-tve0"; - clocks = <&ccu CLK_AHB_TVE0>, <&ccu CLK_AHB_LCD0>, - <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_AHB_DE_FE0>, - <&ccu CLK_DE_BE0>, <&ccu CLK_DE_FE0>, - <&ccu CLK_TCON0_CH1>, <&ccu CLK_DRAM_TVE0>, - <&ccu CLK_DRAM_DE_FE0>, <&ccu CLK_DRAM_DE_BE0>; - status = "disabled"; - }; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a8"; - reg = <0x0>; - clocks = <&ccu CLK_CPU>; - clock-latency = <244144>; /* 8 32k periods */ - operating-points = - /* kHz uV */ - <1008000 1400000>, - <912000 1350000>, - <864000 1300000>, - <624000 1250000>; - #cooling-cells = <2>; - }; - }; - - thermal-zones { - cpu-thermal { - /* milliseconds */ - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&rtp>; - - cooling-maps { - map0 { - trip = <&cpu_alert0>; - cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - - trips { - cpu_alert0: cpu-alert0 { - /* milliCelsius */ - temperature = <85000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu_crit: cpu-crit { - /* milliCelsius */ - temperature = <100000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - }; - }; - - clocks { - #address-cells = <1>; - #size-cells = <1>; - ranges; - - osc24M: clk-24M { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "osc24M"; - }; - - osc32k: clk-32k { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <32768>; - clock-output-names = "osc32k"; - }; - }; - - de: display-engine { - compatible = "allwinner,sun4i-a10-display-engine"; - allwinner,pipelines = <&fe0>, <&fe1>; - status = "disabled"; - }; - - pmu { - compatible = "arm,cortex-a8-pmu"; - interrupts = <3>; - }; - - reserved-memory { - #address-cells = <1>; - #size-cells = <1>; - ranges; - - /* Address must be kept in the lower 256 MiBs of DRAM for VE. */ - default-pool { - compatible = "shared-dma-pool"; - size = <0x6000000>; - alloc-ranges = <0x40000000 0x10000000>; - reusable; - linux,cma-default; - }; - }; - - soc { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - system-control@1c00000 { - compatible = "allwinner,sun4i-a10-system-control"; - reg = <0x01c00000 0x30>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - sram_a: sram@0 { - compatible = "mmio-sram"; - reg = <0x00000000 0xc000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x00000000 0xc000>; - - emac_sram: sram-section@8000 { - compatible = "allwinner,sun4i-a10-sram-a3-a4"; - reg = <0x8000 0x4000>; - status = "disabled"; - }; - }; - - sram_d: sram@10000 { - compatible = "mmio-sram"; - reg = <0x00010000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x00010000 0x1000>; - - otg_sram: sram-section@0 { - compatible = "allwinner,sun4i-a10-sram-d"; - reg = <0x0000 0x1000>; - status = "disabled"; - }; - }; - - sram_c: sram@1d00000 { - compatible = "mmio-sram"; - reg = <0x01d00000 0xd0000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x01d00000 0xd0000>; - - ve_sram: sram-section@0 { - compatible = "allwinner,sun4i-a10-sram-c1"; - reg = <0x000000 0x80000>; - }; - }; - }; - - dma: dma-controller@1c02000 { - compatible = "allwinner,sun4i-a10-dma"; - reg = <0x01c02000 0x1000>; - interrupts = <27>; - clocks = <&ccu CLK_AHB_DMA>; - #dma-cells = <2>; - }; - - nfc: nand-controller@1c03000 { - compatible = "allwinner,sun4i-a10-nand"; - reg = <0x01c03000 0x1000>; - interrupts = <37>; - clocks = <&ccu CLK_AHB_NAND>, <&ccu CLK_NAND>; - clock-names = "ahb", "mod"; - dmas = <&dma SUN4I_DMA_DEDICATED 3>; - dma-names = "rxtx"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - spi0: spi@1c05000 { - compatible = "allwinner,sun4i-a10-spi"; - reg = <0x01c05000 0x1000>; - interrupts = <10>; - clocks = <&ccu CLK_AHB_SPI0>, <&ccu CLK_SPI0>; - clock-names = "ahb", "mod"; - dmas = <&dma SUN4I_DMA_DEDICATED 27>, - <&dma SUN4I_DMA_DEDICATED 26>; - dma-names = "rx", "tx"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - spi1: spi@1c06000 { - compatible = "allwinner,sun4i-a10-spi"; - reg = <0x01c06000 0x1000>; - interrupts = <11>; - clocks = <&ccu CLK_AHB_SPI1>, <&ccu CLK_SPI1>; - clock-names = "ahb", "mod"; - dmas = <&dma SUN4I_DMA_DEDICATED 9>, - <&dma SUN4I_DMA_DEDICATED 8>; - dma-names = "rx", "tx"; - pinctrl-names = "default"; - pinctrl-0 = <&spi1_pins>, <&spi1_cs0_pin>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - emac: ethernet@1c0b000 { - compatible = "allwinner,sun4i-a10-emac"; - reg = <0x01c0b000 0x1000>; - interrupts = <55>; - clocks = <&ccu CLK_AHB_EMAC>; - allwinner,sram = <&emac_sram 1>; - pinctrl-names = "default"; - pinctrl-0 = <&emac_pins>; - status = "disabled"; - }; - - mdio: mdio@1c0b080 { - compatible = "allwinner,sun4i-a10-mdio"; - reg = <0x01c0b080 0x14>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - tcon0: lcd-controller@1c0c000 { - compatible = "allwinner,sun4i-a10-tcon"; - reg = <0x01c0c000 0x1000>; - interrupts = <44>; - resets = <&ccu RST_TCON0>; - reset-names = "lcd"; - clocks = <&ccu CLK_AHB_LCD0>, - <&ccu CLK_TCON0_CH0>, - <&ccu CLK_TCON0_CH1>; - clock-names = "ahb", - "tcon-ch0", - "tcon-ch1"; - clock-output-names = "tcon0-pixel-clock"; - #clock-cells = <0>; - dmas = <&dma SUN4I_DMA_DEDICATED 14>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - tcon0_in: port@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - - tcon0_in_be0: endpoint@0 { - reg = <0>; - remote-endpoint = <&be0_out_tcon0>; - }; - - tcon0_in_be1: endpoint@1 { - reg = <1>; - remote-endpoint = <&be1_out_tcon0>; - }; - }; - - tcon0_out: port@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - - tcon0_out_hdmi: endpoint@1 { - reg = <1>; - remote-endpoint = <&hdmi_in_tcon0>; - allwinner,tcon-channel = <1>; - }; - }; - }; - }; - - tcon1: lcd-controller@1c0d000 { - compatible = "allwinner,sun4i-a10-tcon"; - reg = <0x01c0d000 0x1000>; - interrupts = <45>; - resets = <&ccu RST_TCON1>; - reset-names = "lcd"; - clocks = <&ccu CLK_AHB_LCD1>, - <&ccu CLK_TCON1_CH0>, - <&ccu CLK_TCON1_CH1>; - clock-names = "ahb", - "tcon-ch0", - "tcon-ch1"; - clock-output-names = "tcon1-pixel-clock"; - #clock-cells = <0>; - dmas = <&dma SUN4I_DMA_DEDICATED 15>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - tcon1_in: port@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - - tcon1_in_be0: endpoint@0 { - reg = <0>; - remote-endpoint = <&be0_out_tcon1>; - }; - - tcon1_in_be1: endpoint@1 { - reg = <1>; - remote-endpoint = <&be1_out_tcon1>; - }; - }; - - tcon1_out: port@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - - tcon1_out_hdmi: endpoint@1 { - reg = <1>; - remote-endpoint = <&hdmi_in_tcon1>; - allwinner,tcon-channel = <1>; - }; - }; - }; - }; - - video-codec@1c0e000 { - compatible = "allwinner,sun4i-a10-video-engine"; - reg = <0x01c0e000 0x1000>; - clocks = <&ccu CLK_AHB_VE>, <&ccu CLK_VE>, - <&ccu CLK_DRAM_VE>; - clock-names = "ahb", "mod", "ram"; - resets = <&ccu RST_VE>; - interrupts = <53>; - allwinner,sram = <&ve_sram 1>; - }; - - mmc0: mmc@1c0f000 { - compatible = "allwinner,sun4i-a10-mmc"; - reg = <0x01c0f000 0x1000>; - clocks = <&ccu CLK_AHB_MMC0>, <&ccu CLK_MMC0>; - clock-names = "ahb", "mmc"; - interrupts = <32>; - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - mmc1: mmc@1c10000 { - compatible = "allwinner,sun4i-a10-mmc"; - reg = <0x01c10000 0x1000>; - clocks = <&ccu CLK_AHB_MMC1>, <&ccu CLK_MMC1>; - clock-names = "ahb", "mmc"; - interrupts = <33>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - mmc2: mmc@1c11000 { - compatible = "allwinner,sun4i-a10-mmc"; - reg = <0x01c11000 0x1000>; - clocks = <&ccu CLK_AHB_MMC2>, <&ccu CLK_MMC2>; - clock-names = "ahb", "mmc"; - interrupts = <34>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - mmc3: mmc@1c12000 { - compatible = "allwinner,sun4i-a10-mmc"; - reg = <0x01c12000 0x1000>; - clocks = <&ccu CLK_AHB_MMC3>, <&ccu CLK_MMC3>; - clock-names = "ahb", "mmc"; - interrupts = <35>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - usb_otg: usb@1c13000 { - compatible = "allwinner,sun4i-a10-musb"; - reg = <0x01c13000 0x0400>; - clocks = <&ccu CLK_AHB_OTG>; - interrupts = <38>; - interrupt-names = "mc"; - phys = <&usbphy 0>; - phy-names = "usb"; - extcon = <&usbphy 0>; - allwinner,sram = <&otg_sram 1>; - dr_mode = "otg"; - status = "disabled"; - }; - - usbphy: phy@1c13400 { - #phy-cells = <1>; - compatible = "allwinner,sun4i-a10-usb-phy"; - reg = <0x01c13400 0x10>, <0x01c14800 0x4>, <0x01c1c800 0x4>; - reg-names = "phy_ctrl", "pmu1", "pmu2"; - clocks = <&ccu CLK_USB_PHY>; - clock-names = "usb_phy"; - resets = <&ccu RST_USB_PHY0>, - <&ccu RST_USB_PHY1>, - <&ccu RST_USB_PHY2>; - reset-names = "usb0_reset", "usb1_reset", "usb2_reset"; - status = "disabled"; - }; - - ehci0: usb@1c14000 { - compatible = "allwinner,sun4i-a10-ehci", "generic-ehci"; - reg = <0x01c14000 0x100>; - interrupts = <39>; - clocks = <&ccu CLK_AHB_EHCI0>; - phys = <&usbphy 1>; - phy-names = "usb"; - status = "disabled"; - }; - - ohci0: usb@1c14400 { - compatible = "allwinner,sun4i-a10-ohci", "generic-ohci"; - reg = <0x01c14400 0x100>; - interrupts = <64>; - clocks = <&ccu CLK_USB_OHCI0>, <&ccu CLK_AHB_OHCI0>; - phys = <&usbphy 1>; - phy-names = "usb"; - status = "disabled"; - }; - - crypto: crypto-engine@1c15000 { - compatible = "allwinner,sun4i-a10-crypto"; - reg = <0x01c15000 0x1000>; - interrupts = <86>; - clocks = <&ccu CLK_AHB_SS>, <&ccu CLK_SS>; - clock-names = "ahb", "mod"; - }; - - hdmi: hdmi@1c16000 { - compatible = "allwinner,sun4i-a10-hdmi"; - reg = <0x01c16000 0x1000>; - interrupts = <58>; - clocks = <&ccu CLK_AHB_HDMI0>, <&ccu CLK_HDMI>, - <&ccu CLK_PLL_VIDEO0_2X>, - <&ccu CLK_PLL_VIDEO1_2X>; - clock-names = "ahb", "mod", "pll-0", "pll-1"; - dmas = <&dma SUN4I_DMA_NORMAL 16>, - <&dma SUN4I_DMA_NORMAL 16>, - <&dma SUN4I_DMA_DEDICATED 24>; - dma-names = "ddc-tx", "ddc-rx", "audio-tx"; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - hdmi_in: port@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - - hdmi_in_tcon0: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon0_out_hdmi>; - }; - - hdmi_in_tcon1: endpoint@1 { - reg = <1>; - remote-endpoint = <&tcon1_out_hdmi>; - }; - }; - - hdmi_out: port@1 { - reg = <1>; - }; - }; - }; - - spi2: spi@1c17000 { - compatible = "allwinner,sun4i-a10-spi"; - reg = <0x01c17000 0x1000>; - interrupts = <12>; - clocks = <&ccu CLK_AHB_SPI2>, <&ccu CLK_SPI2>; - clock-names = "ahb", "mod"; - dmas = <&dma SUN4I_DMA_DEDICATED 29>, - <&dma SUN4I_DMA_DEDICATED 28>; - dma-names = "rx", "tx"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - ahci: sata@1c18000 { - compatible = "allwinner,sun4i-a10-ahci"; - reg = <0x01c18000 0x1000>; - interrupts = <56>; - clocks = <&ccu CLK_AHB_SATA>, <&ccu CLK_SATA>; - status = "disabled"; - }; - - ehci1: usb@1c1c000 { - compatible = "allwinner,sun4i-a10-ehci", "generic-ehci"; - reg = <0x01c1c000 0x100>; - interrupts = <40>; - clocks = <&ccu CLK_AHB_EHCI1>; - phys = <&usbphy 2>; - phy-names = "usb"; - status = "disabled"; - }; - - ohci1: usb@1c1c400 { - compatible = "allwinner,sun4i-a10-ohci", "generic-ohci"; - reg = <0x01c1c400 0x100>; - interrupts = <65>; - clocks = <&ccu CLK_USB_OHCI1>, <&ccu CLK_AHB_OHCI1>; - phys = <&usbphy 2>; - phy-names = "usb"; - status = "disabled"; - }; - - csi1: csi@1c1d000 { - compatible = "allwinner,sun4i-a10-csi1"; - reg = <0x01c1d000 0x1000>; - interrupts = <43>; - clocks = <&ccu CLK_AHB_CSI1>, <&ccu CLK_DRAM_CSI1>; - clock-names = "bus", "ram"; - resets = <&ccu RST_CSI1>; - status = "disabled"; - }; - - spi3: spi@1c1f000 { - compatible = "allwinner,sun4i-a10-spi"; - reg = <0x01c1f000 0x1000>; - interrupts = <50>; - clocks = <&ccu CLK_AHB_SPI3>, <&ccu CLK_SPI3>; - clock-names = "ahb", "mod"; - dmas = <&dma SUN4I_DMA_DEDICATED 31>, - <&dma SUN4I_DMA_DEDICATED 30>; - dma-names = "rx", "tx"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - ccu: clock@1c20000 { - compatible = "allwinner,sun4i-a10-ccu"; - reg = <0x01c20000 0x400>; - clocks = <&osc24M>, <&osc32k>; - clock-names = "hosc", "losc"; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - intc: interrupt-controller@1c20400 { - compatible = "allwinner,sun4i-a10-ic"; - reg = <0x01c20400 0x400>; - interrupt-controller; - #interrupt-cells = <1>; - }; - - pio: pinctrl@1c20800 { - compatible = "allwinner,sun4i-a10-pinctrl"; - reg = <0x01c20800 0x400>; - interrupts = <28>; - clocks = <&ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>; - clock-names = "apb", "hosc", "losc"; - gpio-controller; - interrupt-controller; - #interrupt-cells = <3>; - #gpio-cells = <3>; - - can0_ph_pins: can0-ph-pins { - pins = "PH20", "PH21"; - function = "can"; - }; - - /omit-if-no-ref/ - csi1_8bits_pg_pins: csi1-8bits-pg-pins { - pins = "PG0", "PG2", "PG3", "PG4", "PG5", - "PG6", "PG7", "PG8", "PG9", "PG10", - "PG11"; - function = "csi1"; - }; - - /omit-if-no-ref/ - csi1_24bits_ph_pins: csi1-24bits-ph-pins { - pins = "PH0", "PH1", "PH2", "PH3", "PH4", - "PH5", "PH6", "PH7", "PH8", "PH9", - "PH10", "PH11", "PH12", "PH13", "PH14", - "PH15", "PH16", "PH17", "PH18", "PH19", - "PH20", "PH21", "PH22", "PH23", "PH24", - "PH25", "PH26", "PH27"; - function = "csi1"; - }; - - /omit-if-no-ref/ - csi1_clk_pg_pin: csi1-clk-pg-pin { - pins = "PG1"; - function = "csi1"; - }; - - emac_pins: emac0-pins { - pins = "PA0", "PA1", "PA2", - "PA3", "PA4", "PA5", "PA6", - "PA7", "PA8", "PA9", "PA10", - "PA11", "PA12", "PA13", "PA14", - "PA15", "PA16"; - function = "emac"; - }; - - i2c0_pins: i2c0-pins { - pins = "PB0", "PB1"; - function = "i2c0"; - }; - - i2c1_pins: i2c1-pins { - pins = "PB18", "PB19"; - function = "i2c1"; - }; - - i2c2_pins: i2c2-pins { - pins = "PB20", "PB21"; - function = "i2c2"; - }; - - ir0_rx_pins: ir0-rx-pin { - pins = "PB4"; - function = "ir0"; - }; - - ir0_tx_pins: ir0-tx-pin { - pins = "PB3"; - function = "ir0"; - }; - - ir1_rx_pins: ir1-rx-pin { - pins = "PB23"; - function = "ir1"; - }; - - ir1_tx_pins: ir1-tx-pin { - pins = "PB22"; - function = "ir1"; - }; - - mmc0_pins: mmc0-pins { - pins = "PF0", "PF1", "PF2", - "PF3", "PF4", "PF5"; - function = "mmc0"; - drive-strength = <30>; - bias-pull-up; - }; - - ps2_ch0_pins: ps2-ch0-pins { - pins = "PI20", "PI21"; - function = "ps2"; - }; - - ps2_ch1_ph_pins: ps2-ch1-ph-pins { - pins = "PH12", "PH13"; - function = "ps2"; - }; - - pwm0_pin: pwm0-pin { - pins = "PB2"; - function = "pwm"; - }; - - pwm1_pin: pwm1-pin { - pins = "PI3"; - function = "pwm"; - }; - - spdif_tx_pin: spdif-tx-pin { - pins = "PB13"; - function = "spdif"; - bias-pull-up; - }; - - spi0_pi_pins: spi0-pi-pins { - pins = "PI11", "PI12", "PI13"; - function = "spi0"; - }; - - spi0_cs0_pi_pin: spi0-cs0-pi-pin { - pins = "PI10"; - function = "spi0"; - }; - - spi1_pins: spi1-pins { - pins = "PI17", "PI18", "PI19"; - function = "spi1"; - }; - - spi1_cs0_pin: spi1-cs0-pin { - pins = "PI16"; - function = "spi1"; - }; - - spi2_pb_pins: spi2-pb-pins { - pins = "PB15", "PB16", "PB17"; - function = "spi2"; - }; - - spi2_pc_pins: spi2-pc-pins { - pins = "PC20", "PC21", "PC22"; - function = "spi2"; - }; - - spi2_cs0_pb_pin: spi2-cs0-pb-pin { - pins = "PB14"; - function = "spi2"; - }; - - spi2_cs0_pc_pins: spi2-cs0-pc-pin { - pins = "PC19"; - function = "spi2"; - }; - - uart0_pb_pins: uart0-pb-pins { - pins = "PB22", "PB23"; - function = "uart0"; - }; - - uart0_pf_pins: uart0-pf-pins { - pins = "PF2", "PF4"; - function = "uart0"; - }; - - uart1_pins: uart1-pins { - pins = "PA10", "PA11"; - function = "uart1"; - }; - }; - - timer@1c20c00 { - compatible = "allwinner,sun4i-a10-timer"; - reg = <0x01c20c00 0x90>; - interrupts = <22>, - <23>, - <24>, - <25>, - <67>, - <68>; - clocks = <&osc24M>; - }; - - wdt: watchdog@1c20c90 { - compatible = "allwinner,sun4i-a10-wdt"; - reg = <0x01c20c90 0x10>; - interrupts = <24>; - clocks = <&osc24M>; - }; - - rtc: rtc@1c20d00 { - compatible = "allwinner,sun4i-a10-rtc"; - reg = <0x01c20d00 0x20>; - interrupts = <24>; - }; - - pwm: pwm@1c20e00 { - compatible = "allwinner,sun4i-a10-pwm"; - reg = <0x01c20e00 0xc>; - clocks = <&osc24M>; - #pwm-cells = <3>; - status = "disabled"; - }; - - spdif: spdif@1c21000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sun4i-a10-spdif"; - reg = <0x01c21000 0x400>; - interrupts = <13>; - clocks = <&ccu CLK_APB0_SPDIF>, <&ccu CLK_SPDIF>; - clock-names = "apb", "spdif"; - dmas = <&dma SUN4I_DMA_NORMAL 2>, - <&dma SUN4I_DMA_NORMAL 2>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - ir0: ir@1c21800 { - compatible = "allwinner,sun4i-a10-ir"; - clocks = <&ccu CLK_APB0_IR0>, <&ccu CLK_IR0>; - clock-names = "apb", "ir"; - interrupts = <5>; - reg = <0x01c21800 0x40>; - status = "disabled"; - }; - - ir1: ir@1c21c00 { - compatible = "allwinner,sun4i-a10-ir"; - clocks = <&ccu CLK_APB0_IR1>, <&ccu CLK_IR1>; - clock-names = "apb", "ir"; - interrupts = <6>; - reg = <0x01c21c00 0x40>; - status = "disabled"; - }; - - i2s0: i2s@1c22400 { - #sound-dai-cells = <0>; - compatible = "allwinner,sun4i-a10-i2s"; - reg = <0x01c22400 0x400>; - interrupts = <16>; - clocks = <&ccu CLK_APB0_I2S0>, <&ccu CLK_I2S0>; - clock-names = "apb", "mod"; - dmas = <&dma SUN4I_DMA_NORMAL 3>, - <&dma SUN4I_DMA_NORMAL 3>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - lradc: lradc@1c22800 { - compatible = "allwinner,sun4i-a10-lradc-keys"; - reg = <0x01c22800 0x100>; - interrupts = <31>; - status = "disabled"; - }; - - codec: codec@1c22c00 { - #sound-dai-cells = <0>; - compatible = "allwinner,sun4i-a10-codec"; - reg = <0x01c22c00 0x40>; - interrupts = <30>; - clocks = <&ccu CLK_APB0_CODEC>, <&ccu CLK_CODEC>; - clock-names = "apb", "codec"; - dmas = <&dma SUN4I_DMA_NORMAL 19>, - <&dma SUN4I_DMA_NORMAL 19>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - sid: eeprom@1c23800 { - compatible = "allwinner,sun4i-a10-sid"; - reg = <0x01c23800 0x10>; - }; - - rtp: rtp@1c25000 { - compatible = "allwinner,sun4i-a10-ts"; - reg = <0x01c25000 0x100>; - interrupts = <29>; - #thermal-sensor-cells = <0>; - }; - - uart0: serial@1c28000 { - compatible = "snps,dw-apb-uart"; - reg = <0x01c28000 0x400>; - interrupts = <1>; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&ccu CLK_APB1_UART0>; - status = "disabled"; - }; - - uart1: serial@1c28400 { - compatible = "snps,dw-apb-uart"; - reg = <0x01c28400 0x400>; - interrupts = <2>; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&ccu CLK_APB1_UART1>; - status = "disabled"; - }; - - uart2: serial@1c28800 { - compatible = "snps,dw-apb-uart"; - reg = <0x01c28800 0x400>; - interrupts = <3>; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&ccu CLK_APB1_UART2>; - status = "disabled"; - }; - - uart3: serial@1c28c00 { - compatible = "snps,dw-apb-uart"; - reg = <0x01c28c00 0x400>; - interrupts = <4>; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&ccu CLK_APB1_UART3>; - status = "disabled"; - }; - - uart4: serial@1c29000 { - compatible = "snps,dw-apb-uart"; - reg = <0x01c29000 0x400>; - interrupts = <17>; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&ccu CLK_APB1_UART4>; - status = "disabled"; - }; - - uart5: serial@1c29400 { - compatible = "snps,dw-apb-uart"; - reg = <0x01c29400 0x400>; - interrupts = <18>; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&ccu CLK_APB1_UART5>; - status = "disabled"; - }; - - uart6: serial@1c29800 { - compatible = "snps,dw-apb-uart"; - reg = <0x01c29800 0x400>; - interrupts = <19>; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&ccu CLK_APB1_UART6>; - status = "disabled"; - }; - - uart7: serial@1c29c00 { - compatible = "snps,dw-apb-uart"; - reg = <0x01c29c00 0x400>; - interrupts = <20>; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&ccu CLK_APB1_UART7>; - status = "disabled"; - }; - - ps20: ps2@1c2a000 { - compatible = "allwinner,sun4i-a10-ps2"; - reg = <0x01c2a000 0x400>; - interrupts = <62>; - clocks = <&ccu CLK_APB1_PS20>; - status = "disabled"; - }; - - ps21: ps2@1c2a400 { - compatible = "allwinner,sun4i-a10-ps2"; - reg = <0x01c2a400 0x400>; - interrupts = <63>; - clocks = <&ccu CLK_APB1_PS21>; - status = "disabled"; - }; - - i2c0: i2c@1c2ac00 { - compatible = "allwinner,sun4i-a10-i2c"; - reg = <0x01c2ac00 0x400>; - interrupts = <7>; - clocks = <&ccu CLK_APB1_I2C0>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c1: i2c@1c2b000 { - compatible = "allwinner,sun4i-a10-i2c"; - reg = <0x01c2b000 0x400>; - interrupts = <8>; - clocks = <&ccu CLK_APB1_I2C1>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c2: i2c@1c2b400 { - compatible = "allwinner,sun4i-a10-i2c"; - reg = <0x01c2b400 0x400>; - interrupts = <9>; - clocks = <&ccu CLK_APB1_I2C2>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - can0: can@1c2bc00 { - compatible = "allwinner,sun4i-a10-can"; - reg = <0x01c2bc00 0x400>; - interrupts = <26>; - clocks = <&ccu CLK_APB1_CAN>; - status = "disabled"; - }; - - mali: gpu@1c40000 { - compatible = "allwinner,sun4i-a10-mali", "arm,mali-400"; - reg = <0x01c40000 0x10000>; - interrupts = <69>, - <70>, - <71>, - <72>, - <73>; - interrupt-names = "gp", - "gpmmu", - "pp0", - "ppmmu0", - "pmu"; - clocks = <&ccu CLK_AHB_GPU>, <&ccu CLK_GPU>; - clock-names = "bus", "core"; - resets = <&ccu RST_GPU>; - - assigned-clocks = <&ccu CLK_GPU>; - assigned-clock-rates = <384000000>; - }; - - fe0: display-frontend@1e00000 { - compatible = "allwinner,sun4i-a10-display-frontend"; - reg = <0x01e00000 0x20000>; - interrupts = <47>; - clocks = <&ccu CLK_AHB_DE_FE0>, <&ccu CLK_DE_FE0>, - <&ccu CLK_DRAM_DE_FE0>; - clock-names = "ahb", "mod", - "ram"; - resets = <&ccu RST_DE_FE0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - fe0_out: port@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - - fe0_out_be0: endpoint@0 { - reg = <0>; - remote-endpoint = <&be0_in_fe0>; - }; - - fe0_out_be1: endpoint@1 { - reg = <1>; - remote-endpoint = <&be1_in_fe0>; - }; - }; - }; - }; - - fe1: display-frontend@1e20000 { - compatible = "allwinner,sun4i-a10-display-frontend"; - reg = <0x01e20000 0x20000>; - interrupts = <48>; - clocks = <&ccu CLK_AHB_DE_FE1>, <&ccu CLK_DE_FE1>, - <&ccu CLK_DRAM_DE_FE1>; - clock-names = "ahb", "mod", - "ram"; - resets = <&ccu RST_DE_FE1>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - fe1_out: port@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - - fe1_out_be0: endpoint@0 { - reg = <0>; - remote-endpoint = <&be0_in_fe1>; - }; - - fe1_out_be1: endpoint@1 { - reg = <1>; - remote-endpoint = <&be1_in_fe1>; - }; - }; - }; - }; - - be1: display-backend@1e40000 { - compatible = "allwinner,sun4i-a10-display-backend"; - reg = <0x01e40000 0x10000>; - interrupts = <48>; - clocks = <&ccu CLK_AHB_DE_BE1>, <&ccu CLK_DE_BE1>, - <&ccu CLK_DRAM_DE_BE1>; - clock-names = "ahb", "mod", - "ram"; - resets = <&ccu RST_DE_BE1>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - be1_in: port@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - - be1_in_fe0: endpoint@0 { - reg = <0>; - remote-endpoint = <&fe0_out_be1>; - }; - - be1_in_fe1: endpoint@1 { - reg = <1>; - remote-endpoint = <&fe1_out_be1>; - }; - }; - - be1_out: port@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - - be1_out_tcon0: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon0_in_be1>; - }; - - be1_out_tcon1: endpoint@1 { - reg = <1>; - remote-endpoint = <&tcon1_in_be1>; - }; - }; - }; - }; - - be0: display-backend@1e60000 { - compatible = "allwinner,sun4i-a10-display-backend"; - reg = <0x01e60000 0x10000>; - interrupts = <47>; - clocks = <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>, - <&ccu CLK_DRAM_DE_BE0>; - clock-names = "ahb", "mod", - "ram"; - resets = <&ccu RST_DE_BE0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - be0_in: port@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - - be0_in_fe0: endpoint@0 { - reg = <0>; - remote-endpoint = <&fe0_out_be0>; - }; - - be0_in_fe1: endpoint@1 { - reg = <1>; - remote-endpoint = <&fe1_out_be0>; - }; - }; - - be0_out: port@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - - be0_out_tcon0: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon0_in_be0>; - }; - - be0_out_tcon1: endpoint@1 { - reg = <1>; - remote-endpoint = <&tcon1_in_be0>; - }; - }; - }; - }; - }; -}; diff --git a/arch/arm/dts/sun5i-a10s-auxtek-t003.dts b/arch/arm/dts/sun5i-a10s-auxtek-t003.dts deleted file mode 100644 index 04b0e6d2876..00000000000 --- a/arch/arm/dts/sun5i-a10s-auxtek-t003.dts +++ /dev/null @@ -1,137 +0,0 @@ -/* - * Copyright 2015 Hans de Goede <hdegoede@redhat.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun5i-a10s.dtsi" -#include "sunxi-common-regulators.dtsi" -#include <dt-bindings/gpio/gpio.h> - -/ { - model = "Auxtek t003 A10s hdmi tv-stick"; - compatible = "allwinner,auxtek-t003", "allwinner,sun5i-a10s"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&led_pins_t003>; - - led { - label = "t003-tv-dongle:red:usr"; - gpios = <&pio 1 2 GPIO_ACTIVE_HIGH>; /* PB2 */ - default-state = "on"; - }; - }; -}; - -&ehci0 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - axp152: pmic@30 { - compatible = "x-powers,axp152"; - reg = <0x30>; - interrupts = <0>; - interrupt-controller; - #interrupt-cells = <1>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */ - status = "okay"; -}; - -&ohci0 { - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -&pio { - led_pins_t003: led-pin { - pins = "PB2"; - function = "gpio_out"; - drive-strength = <20>; - }; -}; - -®_usb0_vbus { - gpio = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */ - status = "okay"; -}; - -®_usb1_vbus { - gpio = <&pio 1 10 GPIO_ACTIVE_HIGH>; /* PB10 */ - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pb_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "host"; - status = "okay"; -}; - -&usbphy { - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun5i-a10s-auxtek-t004.dts b/arch/arm/dts/sun5i-a10s-auxtek-t004.dts deleted file mode 100644 index 667bc2dc1ea..00000000000 --- a/arch/arm/dts/sun5i-a10s-auxtek-t004.dts +++ /dev/null @@ -1,149 +0,0 @@ -/* - * Copyright 2015 Hans de Goede <hdegoede@redhat.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun5i-a10s.dtsi" -#include "sunxi-common-regulators.dtsi" -#include <dt-bindings/gpio/gpio.h> - -/ { - model = "Auxtek t004 A10s hdmi tv-stick"; - compatible = "allwinner,auxtek-t004", "allwinner,sun5i-a10s"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&led_pins_t004>; - - led { - label = "t004-tv-dongle:red:usr"; - gpios = <&pio 1 2 GPIO_ACTIVE_HIGH>; /* PB2 */ - default-state = "on"; - }; - }; - - reg_vmmc1: vmmc1 { - compatible = "regulator-fixed"; - regulator-name = "vmmc1"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - enable-active-high; - gpio = <&pio 1 18 GPIO_ACTIVE_HIGH>; /* PB18 */ - }; -}; - -&ehci0 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - axp152: pmic@30 { - compatible = "x-powers,axp152"; - reg = <0x30>; - interrupts = <0>; - interrupt-controller; - #interrupt-cells = <1>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */ - status = "okay"; -}; - -&mmc1 { - vmmc-supply = <®_vmmc1>; - bus-width = <4>; - non-removable; - cap-sdio-irq; - status = "okay"; -}; - -&ohci0 { - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -&pio { - led_pins_t004: led-pin { - pins = "PB2"; - function = "gpio_out"; - drive-strength = <20>; - }; -}; - -®_usb1_vbus { - gpio = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */ - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pb_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - -&usbphy { - usb0_id_det-gpios = <&pio 6 12 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PG12 */ - usb1_vbus-supply = <®_usb1_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun5i-a10s-mk802.dts b/arch/arm/dts/sun5i-a10s-mk802.dts deleted file mode 100644 index d0219404c23..00000000000 --- a/arch/arm/dts/sun5i-a10s-mk802.dts +++ /dev/null @@ -1,127 +0,0 @@ -/* - * Copyright 2015 Hans de Goede <hdegoede@redhat.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun5i-a10s.dtsi" -#include "sunxi-common-regulators.dtsi" -#include <dt-bindings/gpio/gpio.h> - -/ { - model = "MK802-A10s"; - compatible = "allwinner,a10s-mk802", "allwinner,sun5i-a10s"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - leds { - compatible = "gpio-leds"; - - led { - label = "mk802:red:usr"; - gpios = <&pio 1 2 GPIO_ACTIVE_HIGH>; /* PB2 */ - }; - }; -}; - -&ehci0 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - axp152: pmic@30 { - compatible = "x-powers,axp152"; - reg = <0x30>; - interrupts = <0>; - interrupt-controller; - #interrupt-cells = <1>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */ - status = "okay"; -}; - -&mmc1 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - non-removable; - status = "okay"; -}; - -&ohci0 { - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -®_usb1_vbus { - gpio = <&pio 1 10 GPIO_ACTIVE_HIGH>; /* PB10 */ - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pb_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "peripheral"; - status = "okay"; -}; - -&usbphy { - usb1_vbus-supply = <®_usb1_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts deleted file mode 100644 index 5832bb31fc5..00000000000 --- a/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts +++ /dev/null @@ -1,272 +0,0 @@ -/* - * Copyright 2013 Maxime Ripard - * - * Maxime Ripard <maxime.ripard@free-electrons.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun5i-a10s.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> - -/ { - model = "Olimex A10s-Olinuxino Micro"; - compatible = "olimex,a10s-olinuxino-micro", "allwinner,sun5i-a10s"; - - aliases { - serial0 = &uart0; - serial1 = &uart2; - serial2 = &uart3; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - connector { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_in: endpoint { - remote-endpoint = <&hdmi_out_con>; - }; - }; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&led_pins_olinuxino>; - - led { - label = "a10s-olinuxino-micro:green:usr"; - gpios = <&pio 4 3 GPIO_ACTIVE_HIGH>; - default-state = "on"; - }; - }; -}; - -&be0 { - status = "okay"; -}; - -&ehci0 { - status = "okay"; -}; - -&emac { - pinctrl-names = "default"; - pinctrl-0 = <&emac_pa_pins>; - phy-handle = <&phy1>; - status = "okay"; -}; - -&emac_sram { - status = "okay"; -}; - -&hdmi { - status = "okay"; -}; - -&hdmi_out { - hdmi_out_con: endpoint { - remote-endpoint = <&hdmi_con_in>; - }; -}; - -&i2c0 { - status = "okay"; - - axp152: pmic@30 { - reg = <0x30>; - interrupts = <0>; - }; -}; - -#include "axp152.dtsi" - -&i2c1 { - status = "okay"; - - eeprom@50 { - compatible = "atmel,24c16"; - pagesize = <16>; - reg = <0x50>; - read-only; - }; -}; - -&i2c2 { - status = "okay"; -}; - -&lradc { - vref-supply = <®_vcc3v0>; - status = "okay"; - - button-191 { - label = "Volume Up"; - linux,code = <KEY_VOLUMEUP>; - channel = <0>; - voltage = <191274>; - }; - - button-392 { - label = "Volume Down"; - linux,code = <KEY_VOLUMEDOWN>; - channel = <0>; - voltage = <392644>; - }; - - button-601 { - label = "Menu"; - linux,code = <KEY_MENU>; - channel = <0>; - voltage = <601151>; - }; - - button-795 { - label = "Enter"; - linux,code = <KEY_ENTER>; - channel = <0>; - voltage = <795090>; - }; - - button-987 { - label = "Home"; - linux,code = <KEY_HOMEPAGE>; - channel = <0>; - voltage = <987387>; - }; -}; - -&mdio { - status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */ - status = "okay"; -}; - -&mmc1 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 6 13 GPIO_ACTIVE_LOW>; /* PG13 */ - status = "okay"; -}; - -&ohci0 { - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -&pio { - led_pins_olinuxino: led-pin { - pins = "PE3"; - function = "gpio_out"; - drive-strength = <20>; - }; -}; - -®_usb0_vbus { - gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */ - status = "okay"; -}; - -®_usb1_vbus { - gpio = <&pio 1 10 GPIO_ACTIVE_HIGH>; - status = "okay"; -}; - -&spi2 { - pinctrl-names = "default"; - pinctrl-0 = <&spi2_pb_pins>, - <&spi2_cs0_pb_pin>; - status = "okay"; -}; - -&tcon0 { - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pb_pins>; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&uart2_pc_pins>; - status = "okay"; -}; - -&uart3 { - pinctrl-names = "default"; - pinctrl-0 = <&uart3_pg_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - -&usbphy { - usb0_id_det-gpios = <&pio 6 12 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PG12 */ - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun5i-a10s-r7-tv-dongle.dts b/arch/arm/dts/sun5i-a10s-r7-tv-dongle.dts deleted file mode 100644 index 964360f0610..00000000000 --- a/arch/arm/dts/sun5i-a10s-r7-tv-dongle.dts +++ /dev/null @@ -1,118 +0,0 @@ -/* - * Copyright 2014 Hans de Goede <hdegoede@redhat.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun5i-a10s.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include <dt-bindings/gpio/gpio.h> - -/ { - model = "R7 A10s hdmi tv-stick"; - compatible = "allwinner,r7-tv-dongle", "allwinner,sun5i-a10s"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&led_pins_r7>; - - led { - label = "r7-tv-dongle:green:usr"; - gpios = <&pio 1 2 GPIO_ACTIVE_HIGH>; - default-state = "on"; - }; - }; -}; - -&ehci0 { - status = "okay"; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */ - status = "okay"; -}; - -&mmc1 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - non-removable; - status = "okay"; -}; - -&ohci0 { - status = "okay"; -}; - -&pio { - led_pins_r7: led-pin { - pins = "PB2"; - function = "gpio_out"; - drive-strength = <20>; - }; -}; - -®_usb1_vbus { - gpio = <&pio 6 13 GPIO_ACTIVE_HIGH>; - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pb_pins>; - status = "okay"; -}; - -&usbphy { - usb1_vbus-supply = <®_usb1_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun5i-a10s-wobo-i5.dts b/arch/arm/dts/sun5i-a10s-wobo-i5.dts deleted file mode 100644 index ef8baa99268..00000000000 --- a/arch/arm/dts/sun5i-a10s-wobo-i5.dts +++ /dev/null @@ -1,195 +0,0 @@ -/* - * Copyright 2015 Jelle van der Waa <jelle@vdwaa.nl> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun5i-a10s.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/interrupt-controller/irq.h> - -/ { - model = "A10s-Wobo i5"; - compatible = "wobo,a10s-wobo-i5", "allwinner,sun5i-a10s"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - leds { - compatible = "gpio-leds"; - - led { - label = "a10s-wobo-i5:blue:usr"; - gpios = <&pio 1 2 GPIO_ACTIVE_HIGH>; - default-state = "on"; - }; - }; - - reg_emac_3v3: emac-3v3 { - compatible = "regulator-fixed"; - regulator-name = "emac-3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - startup-delay-us = <20000>; - enable-active-high; - gpio = <&pio 0 2 GPIO_ACTIVE_HIGH>; - }; -}; - -&cpu0 { - cpu-supply = <®_dcdc2>; -}; - -&ehci0 { - status = "okay"; -}; - -&emac { - pinctrl-names = "default"; - pinctrl-0 = <&emac_pd_pins>; - phy-handle = <&phy1>; - status = "okay"; -}; - -&emac_sram { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - axp209: pmic@34 { - reg = <0x34>; - interrupts = <0>; - }; -}; - -#include "axp209.dtsi" - -&mdio { - phy-supply = <®_emac_3v3>; - status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 1 3 GPIO_ACTIVE_LOW>; /* PB3 */ - status = "okay"; -}; - -&ohci0 { - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-cpu"; -}; - -®_dcdc3 { - regulator-always-on; - regulator-min-microvolt = <1250000>; - regulator-max-microvolt = <1250000>; - regulator-name = "vdd-int-dll"; -}; - -®_ldo1 { - regulator-name = "vdd-rtc"; -}; - -®_ldo2 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "avcc"; -}; - -®_ldo3 { - regulator-always-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc-wifi1"; -}; - -®_ldo4 { - regulator-always-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc-wifi2"; -}; - -®_usb1_vbus { - gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pb_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "host"; - status = "okay"; -}; - -&usbphy { - usb1_vbus-supply = <®_usb1_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun5i-a10s.dtsi b/arch/arm/dts/sun5i-a10s.dtsi deleted file mode 100644 index 09c486b608b..00000000000 --- a/arch/arm/dts/sun5i-a10s.dtsi +++ /dev/null @@ -1,173 +0,0 @@ -/* - * Copyright 2013 Maxime Ripard - * - * Maxime Ripard <maxime.ripard@free-electrons.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include "sun5i.dtsi" - -#include <dt-bindings/dma/sun4i-a10.h> - -/ { - aliases { - ethernet0 = &emac; - }; - - chosen { - #address-cells = <1>; - #size-cells = <1>; - ranges; - - framebuffer-lcd0-hdmi { - compatible = "allwinner,simple-framebuffer", - "simple-framebuffer"; - allwinner,pipeline = "de_be0-lcd0-hdmi"; - clocks = <&ccu CLK_AHB_LCD>, <&ccu CLK_AHB_HDMI>, - <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DRAM_DE_BE>, - <&ccu CLK_DE_BE>, <&ccu CLK_HDMI>; - status = "disabled"; - }; - }; - - display-engine { - compatible = "allwinner,sun5i-a10s-display-engine"; - allwinner,pipelines = <&fe0>; - }; - - soc { - hdmi: hdmi@1c16000 { - compatible = "allwinner,sun5i-a10s-hdmi"; - reg = <0x01c16000 0x1000>; - interrupts = <58>; - clocks = <&ccu CLK_AHB_HDMI>, <&ccu CLK_HDMI>, - <&ccu CLK_PLL_VIDEO0_2X>, - <&ccu CLK_PLL_VIDEO1_2X>; - clock-names = "ahb", "mod", "pll-0", "pll-1"; - dmas = <&dma SUN4I_DMA_NORMAL 16>, - <&dma SUN4I_DMA_NORMAL 16>, - <&dma SUN4I_DMA_DEDICATED 24>; - dma-names = "ddc-tx", "ddc-rx", "audio-tx"; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - hdmi_in: port@0 { - reg = <0>; - - hdmi_in_tcon0: endpoint { - remote-endpoint = <&tcon0_out_hdmi>; - }; - }; - - hdmi_out: port@1 { - reg = <1>; - }; - }; - }; - - pwm: pwm@1c20e00 { - compatible = "allwinner,sun5i-a10s-pwm"; - reg = <0x01c20e00 0xc>; - clocks = <&ccu CLK_HOSC>; - #pwm-cells = <3>; - status = "disabled"; - }; - }; -}; - -&ccu { - compatible = "allwinner,sun5i-a10s-ccu"; -}; - -&mmc1 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc1_pins>; -}; - -&pio { - compatible = "allwinner,sun5i-a10s-pinctrl"; - - uart0_pb_pins: uart0-pb-pins { - pins = "PB19", "PB20"; - function = "uart0"; - }; - - uart2_pc_pins: uart2-pc-pins { - pins = "PC18", "PC19"; - function = "uart2"; - }; - - emac_pa_pins: emac-pa-pins { - pins = "PA0", "PA1", "PA2", - "PA3", "PA4", "PA5", "PA6", - "PA7", "PA8", "PA9", "PA10", - "PA11", "PA12", "PA13", "PA14", - "PA15", "PA16"; - function = "emac"; - }; - - mmc1_pins: mmc1-pins { - pins = "PG3", "PG4", "PG5", - "PG6", "PG7", "PG8"; - function = "mmc1"; - drive-strength = <30>; - }; - - spi2_pb_pins: spi2-pb-pins { - pins = "PB12", "PB13", "PB14"; - function = "spi2"; - }; - - spi2_cs0_pb_pin: spi2-cs0-pb-pin { - pins = "PB11"; - function = "spi2"; - }; -}; - -&tcon0_out { - tcon0_out_hdmi: endpoint@2 { - reg = <2>; - remote-endpoint = <&hdmi_in_tcon0>; - allwinner,tcon-channel = <1>; - }; -}; diff --git a/arch/arm/dts/sun5i-a13-difrnce-dit4350.dts b/arch/arm/dts/sun5i-a13-difrnce-dit4350.dts deleted file mode 100644 index 894c4c4f9a1..00000000000 --- a/arch/arm/dts/sun5i-a13-difrnce-dit4350.dts +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Copyright 2016 Hans de Goede <hdegoede@redhat.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun5i-a13.dtsi" -#include "sun5i-reference-design-tablet.dtsi" - -/ { - model = "Difrnce DIT4350"; - compatible = "difrnce,dit4350", "allwinner,sun5i-a13"; -}; diff --git a/arch/arm/dts/sun5i-a13-empire-electronix-d709.dts b/arch/arm/dts/sun5i-a13-empire-electronix-d709.dts deleted file mode 100644 index d059388d725..00000000000 --- a/arch/arm/dts/sun5i-a13-empire-electronix-d709.dts +++ /dev/null @@ -1,190 +0,0 @@ -/* - * Copyright 2015 Hans de Goede <hdegoede@redhat.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun5i-a13.dtsi" -#include "sunxi-common-regulators.dtsi" -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/pwm/pwm.h> - -/ { - model = "Empire Electronix D709 tablet"; - compatible = "empire-electronix,d709", "allwinner,sun5i-a13"; - - aliases { - serial0 = &uart1; - }; - - backlight: backlight { - compatible = "pwm-backlight"; - pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; - brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; - default-brightness-level = <8>; - power-supply = <®_vcc3v3>; - /* TODO: backlight uses axp gpio1 as enable pin */ - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&cpu0 { - cpu-supply = <®_dcdc2>; -}; - -&ehci0 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - axp209: pmic@34 { - reg = <0x34>; - interrupts = <0>; - }; -}; - -#include "axp209.dtsi" - -&i2c1 { - status = "okay"; - - pcf8563: rtc@51 { - compatible = "nxp,pcf8563"; - reg = <0x51>; - }; -}; - -&lradc { - vref-supply = <®_ldo2>; - status = "okay"; - - button-200 { - label = "Volume Up"; - linux,code = <KEY_VOLUMEUP>; - channel = <0>; - voltage = <200000>; - }; - - button-400 { - label = "Volume Down"; - linux,code = <KEY_VOLUMEDOWN>; - channel = <0>; - voltage = <400000>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */ - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -&pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_pin>; - status = "okay"; -}; - -®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-cpu"; -}; - -®_dcdc3 { - regulator-always-on; - regulator-min-microvolt = <1250000>; - regulator-max-microvolt = <1250000>; - regulator-name = "vdd-int-pll"; -}; - -®_ldo1 { - regulator-name = "vdd-rtc"; -}; - -®_ldo2 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "avcc"; -}; - -®_ldo3 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc-wifi"; -}; - -®_usb0_vbus { - gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&uart1_pg_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - -&usbphy { - usb0_id_det-gpios = <&pio 6 2 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PG2 */ - usb0_vbus_det-gpios = <&pio 6 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PG1 */ - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_ldo3>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun5i-a13-empire-electronix-m712.dts b/arch/arm/dts/sun5i-a13-empire-electronix-m712.dts deleted file mode 100644 index b1e2afd9de5..00000000000 --- a/arch/arm/dts/sun5i-a13-empire-electronix-m712.dts +++ /dev/null @@ -1,51 +0,0 @@ -/* - * Copyright 2016 Hans de Goede <hdegoede@redhat.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun5i-a13.dtsi" -#include "sun5i-reference-design-tablet.dtsi" -#include <dt-bindings/interrupt-controller/irq.h> - -/ { - model = "Empire Electronix M712 tablet"; - compatible = "empire-electronix,m712", "allwinner,sun5i-a13"; -}; diff --git a/arch/arm/dts/sun5i-a13-hsg-h702.dts b/arch/arm/dts/sun5i-a13-hsg-h702.dts deleted file mode 100644 index 9b9f2a57485..00000000000 --- a/arch/arm/dts/sun5i-a13-hsg-h702.dts +++ /dev/null @@ -1,182 +0,0 @@ -/* - * Copyright 2014 Chen-Yu Tsai <wens@csie.org> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun5i-a13.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> - -/ { - model = "HSG H702"; - compatible = "hsg,h702", "allwinner,sun5i-a13"; - - aliases { - serial0 = &uart1; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&cpu0 { - cpu-supply = <®_dcdc2>; -}; - -&ehci0 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - axp209: pmic@34 { - reg = <0x34>; - interrupts = <0>; - }; -}; - -&i2c1 { - status = "okay"; - - pcf8563: rtc@51 { - compatible = "nxp,pcf8563"; - reg = <0x51>; - }; -}; - -&i2c2 { - status = "okay"; -}; - -&lradc { - vref-supply = <®_ldo2>; - status = "okay"; - - button-200 { - label = "Volume Up"; - linux,code = <KEY_VOLUMEUP>; - channel = <0>; - voltage = <200000>; - }; - - button-400 { - label = "Volume Down"; - linux,code = <KEY_VOLUMEDOWN>; - channel = <0>; - voltage = <400000>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */ - status = "okay"; -}; - -&ohci0 { - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -#include "axp209.dtsi" - -®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1500000>; - regulator-name = "vdd-cpu"; -}; - -®_dcdc3 { - regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-int-dll"; -}; - -®_ldo1 { - regulator-name = "vdd-rtc"; -}; - -®_ldo2 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "avcc"; -}; - -®_ldo3 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc-wifi"; -}; - -®_usb0_vbus { - gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&uart1_pg_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - -&usbphy { - usb0_id_det-gpios = <&pio 6 2 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PG2 */ - usb0_vbus_det-gpios = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */ - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_ldo3>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun5i-a13-inet-98v-rev2.dts b/arch/arm/dts/sun5i-a13-inet-98v-rev2.dts deleted file mode 100644 index 439ae3b537d..00000000000 --- a/arch/arm/dts/sun5i-a13-inet-98v-rev2.dts +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Copyright 2015 Hans de Goede <hdegoede@redhat.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun5i-a13.dtsi" -#include "sun5i-reference-design-tablet.dtsi" - -/ { - model = "INet-98V Rev 02"; - compatible = "primux,inet98v-rev2", "allwinner,sun5i-a13"; -}; diff --git a/arch/arm/dts/sun5i-a13-licheepi-one.dts b/arch/arm/dts/sun5i-a13-licheepi-one.dts deleted file mode 100644 index 3a6c4bd0a44..00000000000 --- a/arch/arm/dts/sun5i-a13-licheepi-one.dts +++ /dev/null @@ -1,214 +0,0 @@ -/* - * Copyright 2016 Icenowy Zheng <icenowy@aosc.xyz> - * - * Based on sun5i-a13-olinuxino.dts, which is - * Copyright 2012 Maxime Ripard <maxime.ripard@free-electrons.com> - * Copyright 2013 Hans de Goede <hdegoede@redhat.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun5i-a13.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> - -/ { - model = "Lichee Pi One"; - compatible = "licheepi,licheepi-one", "allwinner,sun5i-a13"; - - aliases { - serial0 = &uart1; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - leds { - compatible = "gpio-leds"; - - led-0 { - label = "licheepi:red:usr"; - gpios = <&pio 2 5 GPIO_ACTIVE_LOW>; - }; - - led-1 { - label = "licheepi:green:usr"; - gpios = <&pio 2 19 GPIO_ACTIVE_LOW>; - default-state = "on"; - }; - - led-2 { - label = "licheepi:blue:usr"; - gpios = <&pio 2 4 GPIO_ACTIVE_LOW>; - }; - - }; -}; - -&cpu0 { - cpu-supply = <®_dcdc2>; -}; - -&ehci0 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - axp209: pmic@34 { - compatible = "x-powers,axp209"; - reg = <0x34>; - interrupts = <0>; - - interrupt-controller; - #interrupt-cells = <1>; - }; -}; - -&i2c1 { - status = "disabled"; -}; - -&i2c2 { - status = "disabled"; -}; - -&lradc { - vref-supply = <®_ldo2>; - status = "okay"; - - button-984 { - label = "Home"; - linux,code = <KEY_HOMEPAGE>; - channel = <0>; - voltage = <984126>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - broken-cd; - status = "okay"; -}; - -&mmc2 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc2_4bit_pc_pins>; - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - broken-cd; - status = "okay"; -}; - -&ohci0 { - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -#include "axp209.dtsi" - -®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1500000>; - regulator-name = "vdd-cpu"; -}; - -®_dcdc3 { - regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-int-dll"; -}; - -®_ldo1 { - regulator-name = "vdd-rtc"; -}; - -®_ldo2 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "avcc"; -}; - -®_ldo3 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "csi-1.8v"; -}; - -®_ldo4 { - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-name = "csi-2.8v"; -}; - -®_usb0_vbus { - gpio = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */ - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&uart1_pg_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - -&usbphy { - usb0_id_det-gpios = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */ - usb0_vbus_det-gpios = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */ - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_vcc5v0>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun5i-a13-olinuxino-micro.dts b/arch/arm/dts/sun5i-a13-olinuxino-micro.dts deleted file mode 100644 index bfe1075e62c..00000000000 --- a/arch/arm/dts/sun5i-a13-olinuxino-micro.dts +++ /dev/null @@ -1,141 +0,0 @@ -/* - * Copyright 2012 Maxime Ripard <maxime.ripard@free-electrons.com> - * Copyright 2013 Hans de Goede <hdegoede@redhat.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun5i-a13.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include <dt-bindings/gpio/gpio.h> - -/ { - model = "Olimex A13-Olinuxino Micro"; - compatible = "olimex,a13-olinuxino-micro", "allwinner,sun5i-a13"; - - aliases { - serial0 = &uart1; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&led_pins_olinuxinom>; - - led { - label = "a13-olinuxino-micro:green:power"; - gpios = <&pio 6 9 GPIO_ACTIVE_HIGH>; - default-state = "on"; - }; - }; -}; - -&ehci0 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; -}; - -&i2c1 { - status = "okay"; -}; - -&i2c2 { - status = "okay"; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */ - status = "okay"; -}; - -&ohci0 { - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -&pio { - led_pins_olinuxinom: led-pin { - pins = "PG9"; - function = "gpio_out"; - drive-strength = <20>; - }; -}; - -®_usb0_vbus { - gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; - status = "okay"; -}; - -®_usb1_vbus { - gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>; - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&uart1_pg_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - -&usbphy { - usb0_id_det-gpios = <&pio 6 2 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PG2 */ - usb0_vbus_det-gpios = <&pio 6 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PG1 */ - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun5i-a13-olinuxino.dts b/arch/arm/dts/sun5i-a13-olinuxino.dts deleted file mode 100644 index fadeae3cd8b..00000000000 --- a/arch/arm/dts/sun5i-a13-olinuxino.dts +++ /dev/null @@ -1,247 +0,0 @@ -/* - * Copyright 2012 Maxime Ripard - * - * Maxime Ripard <maxime.ripard@free-electrons.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun5i-a13.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> - -/ { - model = "Olimex A13-Olinuxino"; - compatible = "olimex,a13-olinuxino", "allwinner,sun5i-a13"; - - aliases { - serial0 = &uart1; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&led_pins_olinuxino>; - - led { - gpios = <&pio 6 9 GPIO_ACTIVE_HIGH>; - default-state = "on"; - }; - }; - - bridge { - compatible = "dumb-vga-dac"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - - vga_bridge_in: endpoint { - remote-endpoint = <&tcon0_out_vga>; - }; - }; - - port@1 { - reg = <1>; - - vga_bridge_out: endpoint { - remote-endpoint = <&vga_con_in>; - }; - }; - }; - }; - - vga { - compatible = "vga-connector"; - - port { - vga_con_in: endpoint { - remote-endpoint = <&vga_bridge_out>; - }; - }; - }; -}; - -&be0 { - status = "okay"; -}; - -&codec { - status = "okay"; -}; - -&ehci0 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - axp209: pmic@34 { - compatible = "x-powers,axp209"; - reg = <0x34>; - interrupts = <0>; - - interrupt-controller; - #interrupt-cells = <1>; - }; -}; - -&i2c1 { - status = "okay"; -}; - -&i2c2 { - status = "okay"; -}; - -&lradc { - vref-supply = <®_vcc3v0>; - status = "okay"; - - button-191 { - label = "Volume Up"; - linux,code = <KEY_VOLUMEUP>; - channel = <0>; - voltage = <191274>; - }; - - button-392 { - label = "Volume Down"; - linux,code = <KEY_VOLUMEDOWN>; - channel = <0>; - voltage = <392644>; - }; - - button-601 { - label = "Menu"; - linux,code = <KEY_MENU>; - channel = <0>; - voltage = <601151>; - }; - - button-795 { - label = "Enter"; - linux,code = <KEY_ENTER>; - channel = <0>; - voltage = <795090>; - }; - - button-987 { - label = "Home"; - linux,code = <KEY_HOMEPAGE>; - channel = <0>; - voltage = <987387>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */ - status = "okay"; -}; - -&ohci0 { - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -&pio { - led_pins_olinuxino: led-pin { - pins = "PG9"; - function = "gpio_out"; - drive-strength = <20>; - }; -}; - -®_usb0_vbus { - status = "okay"; - gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ -}; - -®_usb1_vbus { - gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>; - status = "okay"; -}; - -&tcon0 { - pinctrl-names = "default"; - pinctrl-0 = <&lcd_rgb666_pins>; - status = "okay"; -}; - -&tcon0_out { - tcon0_out_vga: endpoint@0 { - reg = <0>; - remote-endpoint = <&vga_bridge_in>; - }; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&uart1_pg_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - -&usbphy { - usb0_id_det-gpios = <&pio 6 2 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PG2 */ - usb0_vbus_det-gpios = <&pio 6 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PG1 */ - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_usb1_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun5i-a13-pocketbook-touch-lux-3.dts b/arch/arm/dts/sun5i-a13-pocketbook-touch-lux-3.dts deleted file mode 100644 index d60407772e5..00000000000 --- a/arch/arm/dts/sun5i-a13-pocketbook-touch-lux-3.dts +++ /dev/null @@ -1,258 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 OR MIT -/* - * Copyright 2019 Ondrej Jirman <megous@megous.com> - */ - -/dts-v1/; -#include "sun5i-a13.dtsi" -#include "sunxi-common-regulators.dtsi" -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/pwm/pwm.h> - -/ { - model = "PocketBook Touch Lux 3"; - compatible = "pocketbook,touch-lux-3", "allwinner,sun5i-a13"; - - aliases { - serial0 = &uart1; - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - }; - - backlight { - compatible = "pwm-backlight"; - pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; - enable-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ - brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; - default-brightness-level = <8>; - power-supply = <®_vcc3v3>; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - leds { - compatible = "gpio-leds"; - - led { - gpios = <&pio 4 8 GPIO_ACTIVE_LOW>; /* PE8 */ - default-state = "on"; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - autorepeat; - label = "GPIO Keys"; - - key-right { - label = "Right"; - linux,code = <KEY_RIGHT>; - gpios = <&pio 6 9 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PG9 */ - }; - - key-left { - label = "Left"; - linux,code = <KEY_LEFT>; - gpios = <&pio 6 10 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PG10 */ - }; - }; - - reg_1v8: regulator-1v8 { - compatible = "regulator-fixed"; - regulator-name = "vdd-1v8-nor-ctp"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - gpio = <&pio 2 15 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - reg_1v8_nor: regulator-nor { - compatible = "regulator-fixed"; - regulator-name = "vdd-nor"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - gpio = <&pio 2 14 GPIO_ACTIVE_HIGH>; - enable-active-high; - vin-supply = <®_1v8>; - regulator-always-on; - }; - - reg_1v8_ctp: regulator-ctp { - compatible = "regulator-fixed"; - regulator-name = "vdd-ctp"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - gpio = <&pio 2 13 GPIO_ACTIVE_HIGH>; - enable-active-high; - vin-supply = <®_1v8>; - }; - - reg_3v3_mmc0: regulator-mmc0 { - compatible = "regulator-fixed"; - regulator-name = "vdd-mmc0"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&pio 4 4 GPIO_ACTIVE_LOW>; /* PE4 */ - vin-supply = <®_vcc3v3>; - }; -}; - -&cpu0 { - cpu-supply = <®_dcdc2>; -}; - -&ehci0 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - axp209: pmic@34 { - reg = <0x34>; - interrupts = <0>; - }; -}; - -#include "axp209.dtsi" - -&i2c1 { - status = "okay"; - - pcf8563: rtc@51 { - compatible = "nxp,pcf8563"; - reg = <0x51>; - }; -}; - -&i2c2 { - status = "okay"; - - /* Touchpanel is connected here. */ -}; - -&lradc { - vref-supply = <®_ldo2>; - status = "okay"; - - button-200 { - label = "Home"; - linux,code = <KEY_HOME>; - channel = <0>; - voltage = <200000>; - }; - - button-400 { - label = "Menu"; - linux,code = <KEY_MENU>; - channel = <0>; - voltage = <400000>; - }; -}; - -&mmc0 { - vmmc-supply = <®_3v3_mmc0>; - bus-width = <4>; - cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */ - status = "okay"; -}; - -&mmc2 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc2_4bit_pc_pins>; - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - non-removable; - status = "okay"; -}; - -&ohci0 { - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -&pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_pin>; - status = "okay"; -}; - -®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-cpu"; -}; - -®_dcdc3 { - regulator-always-on; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-name = "vdd-int-pll"; -}; - -®_ldo1 { - regulator-name = "vdd-rtc"; -}; - -®_ldo2 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "avcc"; -}; - -®_ldo3 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc-wifi"; - /* We need this otherwise the LDO3 would overload */ - regulator-soft-start; - regulator-ramp-delay = <1600>; -}; - -&spi2 { - pinctrl-names = "default"; - pinctrl-0 = <&spi2_pe_pins>, <&spi2_cs0_pe_pin>; - status = "okay"; - - epd_flash: flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "macronix,mx25u4033", "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <4000000>; - }; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&uart1_pg_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "peripheral"; - status = "okay"; -}; - -&battery_power_supply { - status = "okay"; -}; - -&usb_power_supply { - status = "okay"; -}; - -&usbphy { - usb1_vbus-supply = <®_ldo3>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun5i-a13-q8-tablet.dts b/arch/arm/dts/sun5i-a13-q8-tablet.dts deleted file mode 100644 index f9fc1c8b60b..00000000000 --- a/arch/arm/dts/sun5i-a13-q8-tablet.dts +++ /dev/null @@ -1,80 +0,0 @@ -/* - * Copyright 2015 Hans de Goede <hdegoede@redhat.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun5i-a13.dtsi" -#include "sun5i-reference-design-tablet.dtsi" - -/ { - model = "Q8 A13 Tablet"; - compatible = "allwinner,q8-a13", "allwinner,sun5i-a13"; - - panel: panel { - compatible = "bananapi,s070wv20-ct16"; - power-supply = <®_vcc3v3>; - enable-gpios = <&axp_gpio 0 GPIO_ACTIVE_HIGH>; /* AXP GPIO0 */ - backlight = <&backlight>; - - port { - panel_input: endpoint { - remote-endpoint = <&tcon0_out_lcd>; - }; - }; - }; -}; - -&be0 { - status = "okay"; -}; - -&tcon0 { - pinctrl-names = "default"; - pinctrl-0 = <&lcd_rgb666_pins>; - status = "okay"; -}; - -&tcon0_out { - tcon0_out_lcd: endpoint@0 { - reg = <0>; - remote-endpoint = <&panel_input>; - }; -}; diff --git a/arch/arm/dts/sun5i-a13-utoo-p66.dts b/arch/arm/dts/sun5i-a13-utoo-p66.dts deleted file mode 100644 index be486d28d04..00000000000 --- a/arch/arm/dts/sun5i-a13-utoo-p66.dts +++ /dev/null @@ -1,116 +0,0 @@ -/* - * Copyright 2015 Hans de Goede <hdegoede@redhat.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun5i-a13.dtsi" -#include "sun5i-reference-design-tablet.dtsi" -#include <dt-bindings/interrupt-controller/irq.h> - -/ { - model = "Utoo P66"; - compatible = "utoo,p66", "allwinner,sun5i-a13"; - - /* The P66 uses the uart pins as gpios */ - aliases { - /delete-property/serial0; - }; - - chosen { - /delete-property/stdout-path; - }; - - i2c_lcd: i2c { - /* The lcd panel i2c interface is hooked up via gpios */ - compatible = "i2c-gpio"; - sda-gpios = <&pio 6 12 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PG12 */ - scl-gpios = <&pio 6 10 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PG10 */ - i2c-gpio,delay-us = <5>; - }; -}; - -&backlight { - /* Note levels of 10 / 20% result in backlight off */ - brightness-levels = <0 30 40 50 60 70 80 90 100>; - default-brightness-level = <6>; -}; - -&codec { - allwinner,pa-gpios = <&pio 6 3 GPIO_ACTIVE_HIGH>; /* PG3 */ -}; - -&mmc2 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc2_8bit_pins>; - vmmc-supply = <®_vcc3v3>; - bus-width = <8>; - non-removable; - status = "okay"; - - mmccard: mmccard@0 { - reg = <0>; - compatible = "mmc-card"; - broken-hpi; - }; -}; - -®_usb0_vbus { - gpio = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ -}; - -&touchscreen { - compatible = "chipone,icn8318"; - reg = <0x40>; - /* The P66 uses a different EINT then the reference design */ - interrupts = <6 9 IRQ_TYPE_EDGE_FALLING>; /* EINT9 (PG9) */ - /* The icn8318 binding expects wake-gpios instead of power-gpios */ - wake-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */ - touchscreen-size-x = <800>; - touchscreen-size-y = <480>; - touchscreen-inverted-x; - touchscreen-swapped-x-y; - status = "okay"; -}; - -&uart1 { - /* The P66 uses the uart pins as gpios */ - status = "disabled"; -}; diff --git a/arch/arm/dts/sun5i-a13.dtsi b/arch/arm/dts/sun5i-a13.dtsi deleted file mode 100644 index 2c9152b151b..00000000000 --- a/arch/arm/dts/sun5i-a13.dtsi +++ /dev/null @@ -1,118 +0,0 @@ -/* - * Copyright 2012 Maxime Ripard - * - * Maxime Ripard <maxime.ripard@free-electrons.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include "sun5i.dtsi" - -#include <dt-bindings/thermal/thermal.h> - -/ { - thermal-zones { - cpu-thermal { - /* milliseconds */ - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&rtp>; - - cooling-maps { - map0 { - trip = <&cpu_alert0>; - cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - - trips { - cpu_alert0: cpu-alert0 { - /* milliCelsius */ - temperature = <85000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu_crit: cpu-crit { - /* milliCelsius */ - temperature = <100000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - }; - }; - - display-engine { - compatible = "allwinner,sun5i-a13-display-engine"; - allwinner,pipelines = <&fe0>; - }; - - soc { - pwm: pwm@1c20e00 { - compatible = "allwinner,sun5i-a13-pwm"; - reg = <0x01c20e00 0xc>; - clocks = <&ccu CLK_HOSC>; - #pwm-cells = <3>; - status = "disabled"; - }; - - }; -}; - -&ccu { - compatible = "allwinner,sun5i-a13-ccu"; -}; - -&cpu0 { - clock-latency = <244144>; /* 8 32k periods */ - operating-points = - /* kHz uV */ - <1008000 1400000>, - <912000 1350000>, - <864000 1300000>, - <624000 1200000>, - <576000 1200000>, - <432000 1200000>; - #cooling-cells = <2>; -}; - -&pio { - compatible = "allwinner,sun5i-a13-pinctrl"; -}; diff --git a/arch/arm/dts/sun5i-gr8-chip-pro.dts b/arch/arm/dts/sun5i-gr8-chip-pro.dts deleted file mode 100644 index ffbd99c176d..00000000000 --- a/arch/arm/dts/sun5i-gr8-chip-pro.dts +++ /dev/null @@ -1,238 +0,0 @@ -/* - * Copyright 2016 Free Electrons - * Copyright 2016 NextThing Co - * - * Maxime Ripard <maxime.ripard@free-electrons.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun5i-gr8.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/interrupt-controller/irq.h> - -/ { - model = "NextThing C.H.I.P. Pro"; - compatible = "nextthing,chip-pro", "nextthing,gr8"; - - aliases { - i2c0 = &i2c0; - i2c1 = &i2c1; - serial0 = &uart1; - serial1 = &uart2; - serial2 = &uart3; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - leds { - compatible = "gpio-leds"; - - led-0 { - label = "chip-pro:white:status"; - gpios = <&axp_gpio 2 GPIO_ACTIVE_HIGH>; - default-state = "on"; - }; - }; - - mmc0_pwrseq: pwrseq { - compatible = "mmc-pwrseq-simple"; - reset-gpios = <&pio 1 10 GPIO_ACTIVE_LOW>; /* PB10 */ - }; -}; - -&codec { - status = "okay"; -}; - -&ehci0 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - axp209: pmic@34 { - reg = <0x34>; - - /* - * The interrupt is routed through the "External Fast - * Interrupt Request" pin (ball G13 of the module) - * directly to the main interrupt controller, without - * any other controller interfering. - */ - interrupts = <0>; - }; -}; - -#include "axp209.dtsi" - -&i2c1 { - status = "disabled"; -}; - -&i2s0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2s0_mclk_pin>, <&i2s0_data_pins>; - status = "disabled"; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - mmc-pwrseq = <&mmc0_pwrseq>; - bus-width = <4>; - non-removable; - status = "okay"; -}; - -&nfc { - pinctrl-names = "default"; - pinctrl-0 = <&nand_pins &nand_cs0_pin &nand_rb0_pin>; - status = "okay"; - - nand@0 { - reg = <0>; - allwinner,rb = <0>; - nand-ecc-mode = "hw"; - }; -}; - -&ohci0 { - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -&pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_pin>, <&pwm1_pins>; - status = "disabled"; -}; - -®_dcdc2 { - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-cpu"; - regulator-always-on; -}; - -®_dcdc3 { - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1300000>; - regulator-name = "vdd-sys"; - regulator-always-on; -}; - -®_ldo1 { - regulator-name = "vdd-rtc"; -}; - -®_ldo2 { - regulator-min-microvolt = <2700000>; - regulator-max-microvolt = <3300000>; - regulator-name = "avcc"; - regulator-always-on; -}; - -/* - * Both LDO3 and LDO4 are used in parallel to power up the - * WiFi/BT chip. - */ -®_ldo3 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc-wifi-1"; - regulator-always-on; -}; - -®_ldo4 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc-wifi-2"; - regulator-always-on; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&uart1_pg_pins>, <&uart1_cts_rts_pins>; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&uart2_pd_pins>, <&uart2_cts_rts_pd_pins>; - status = "disabled"; -}; - -&uart3 { - pinctrl-names = "default"; - pinctrl-0 = <&uart3_pg_pins>, <&uart3_cts_rts_pg_pins>; - status = "okay"; -}; - -&usb_otg { - /* - * The CHIP Pro doesn't have a controllable VBUS, nor does it - * have any 5v rail on the board itself. - * - * If one wants to use it as a true OTG port, it should be - * done in the baseboard, and its DT / overlay will add it. - */ - dr_mode = "otg"; - status = "okay"; -}; - -&usb_power_supply { - status = "okay"; -}; - -&usbphy { - usb0_id_det-gpios = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */ - usb0_vbus_power-supply = <&usb_power_supply>; - usb1_vbus-supply = <®_vcc5v0>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun5i-gr8-evb.dts b/arch/arm/dts/sun5i-gr8-evb.dts deleted file mode 100644 index f4fe258ef06..00000000000 --- a/arch/arm/dts/sun5i-gr8-evb.dts +++ /dev/null @@ -1,333 +0,0 @@ -/* - * Copyright 2016 Free Electrons - * Copyright 2016 NextThing Co - * - * Mylène Josserand <mylene.josserand@free-electrons.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun5i-gr8.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/interrupt-controller/irq.h> - -/ { - model = "NextThing GR8-EVB"; - compatible = "nextthing,gr8-evb", "nextthing,gr8"; - - aliases { - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - serial0 = &uart1; - serial1 = &uart2; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - backlight: backlight { - compatible = "pwm-backlight"; - pwms = <&pwm 0 10000 0>; - enable-gpios = <&axp_gpio 1 GPIO_ACTIVE_HIGH>; - power-supply = <®_vcc3v3>; - brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; - default-brightness-level = <8>; - }; - - sound-analog { - compatible = "simple-audio-card"; - simple-audio-card,name = "gr8-evb-wm8978"; - simple-audio-card,format = "i2s"; - simple-audio-card,mclk-fs = <512>; - - simple-audio-card,cpu { - sound-dai = <&i2s0>; - }; - - simple-audio-card,codec { - sound-dai = <&wm8978>; - }; - }; - - sound-spdif { - compatible = "simple-audio-card"; - simple-audio-card,name = "On-board SPDIF"; - - simple-audio-card,cpu { - sound-dai = <&spdif>; - }; - - simple-audio-card,codec { - sound-dai = <&spdif_out>; - }; - }; - - spdif_out: spdif-out { - #sound-dai-cells = <0>; - compatible = "linux,spdif-dit"; - }; -}; - -&be0 { - status = "okay"; -}; - -&codec { - status = "okay"; -}; - -&ehci0 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - axp209: pmic@34 { - reg = <0x34>; - - /* - * The interrupt is routed through the "External Fast - * Interrupt Request" pin (ball G13 of the module) - * directly to the main interrupt controller, without - * any other controller interfering. - */ - interrupts = <0>; - }; -}; - -#include "axp209.dtsi" - -&i2c1 { - status = "okay"; - - wm8978: codec@1a { - #sound-dai-cells = <0>; - compatible = "wlf,wm8978"; - reg = <0x1a>; - }; - - pcf8563: rtc@51 { - compatible = "nxp,pcf8563"; - reg = <0x51>; - }; -}; - -&i2c2 { - status = "okay"; -}; - -&i2s0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2s0_mclk_pin>, <&i2s0_data_pins>; - status = "okay"; -}; - -&ir0 { - pinctrl-names = "default"; - pinctrl-0 = <&ir0_rx_pin>; - status = "okay"; -}; - -&lradc { - vref-supply = <®_ldo2>; - status = "okay"; - - button-190 { - label = "Volume Up"; - linux,code = <KEY_VOLUMEUP>; - channel = <0>; - voltage = <190000>; - }; - - button-390 { - label = "Volume Down"; - linux,code = <KEY_VOLUMEDOWN>; - channel = <0>; - voltage = <390000>; - }; - - button-600 { - label = "Menu"; - linux,code = <KEY_MENU>; - channel = <0>; - voltage = <600000>; - }; - - button-800 { - label = "Search"; - linux,code = <KEY_SEARCH>; - channel = <0>; - voltage = <800000>; - }; - - button-980 { - label = "Home"; - linux,code = <KEY_HOMEPAGE>; - channel = <0>; - voltage = <980000>; - }; - - button-1180 { - label = "Esc"; - linux,code = <KEY_ESC>; - channel = <0>; - voltage = <1180000>; - }; - - button-1400 { - label = "Enter"; - linux,code = <KEY_ENTER>; - channel = <0>; - voltage = <1400000>; - }; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - bus-width = <4>; - cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */ - status = "okay"; -}; - -&nfc { - pinctrl-names = "default"; - pinctrl-0 = <&nand_pins &nand_cs0_pin &nand_rb0_pin>; - - /* MLC Support sucks for now */ - status = "disabled"; -}; - -&ohci0 { - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -&pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_pin>; - status = "okay"; -}; - -®_dcdc2 { - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-cpu"; - regulator-always-on; -}; - -®_dcdc3 { - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1300000>; - regulator-name = "vdd-sys"; - regulator-always-on; -}; - -®_ldo1 { - regulator-name = "vdd-rtc"; -}; - -®_ldo2 { - regulator-min-microvolt = <2700000>; - regulator-max-microvolt = <3300000>; - regulator-name = "avcc"; - regulator-always-on; -}; - -®_usb1_vbus { - gpio = <&pio 6 13 GPIO_ACTIVE_HIGH>; - status = "okay"; -}; - -&rtp { - allwinner,ts-attached; -}; - -&spdif { - pinctrl-names = "default"; - pinctrl-0 = <&spdif_tx_pin>; - status = "okay"; -}; - -&tve0 { - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&uart1_pg_pins>, <&uart1_cts_rts_pins>; - status = "okay"; -}; - -&usb_otg { - /* - * The GR8-EVB has a somewhat interesting design. There's a - * pin supposed to control VBUS, an ID pin, a VBUS detect pin, - * so everything should work just fine. - * - * Except that the pin supposed to control VBUS is not - * connected to any controllable output, neither to the SoC - * through a GPIO or to the PMIC, and it is pulled down, - * meaning that we will never be able to enable VBUS on this - * board. - */ - dr_mode = "otg"; - status = "okay"; -}; - -&usb_power_supply { - status = "okay"; -}; - -&usbphy { - usb0_id_det-gpios = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */ - usb0_vbus_det-gpios = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */ - usb0_vbus_power-supply = <&usb_power_supply>; - usb1_vbus-supply = <®_usb1_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun5i-gr8.dtsi b/arch/arm/dts/sun5i-gr8.dtsi deleted file mode 100644 index 98a8fd5e89e..00000000000 --- a/arch/arm/dts/sun5i-gr8.dtsi +++ /dev/null @@ -1,126 +0,0 @@ -/* - * Copyright 2016 Mylène Josserand - * - * Mylène Josserand <mylene.josserand@free-electrons.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include "sun5i.dtsi" - -#include <dt-bindings/clock/sun5i-ccu.h> -#include <dt-bindings/dma/sun4i-a10.h> -#include <dt-bindings/reset/sun5i-ccu.h> - -/ { - display-engine { - compatible = "allwinner,sun5i-a13-display-engine"; - allwinner,pipelines = <&fe0>; - }; - - soc { - pwm: pwm@1c20e00 { - compatible = "allwinner,sun5i-a10s-pwm"; - reg = <0x01c20e00 0xc>; - clocks = <&ccu CLK_HOSC>; - #pwm-cells = <3>; - status = "disabled"; - }; - - spdif: spdif@1c21000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sun4i-a10-spdif"; - reg = <0x01c21000 0x400>; - interrupts = <13>; - clocks = <&ccu CLK_APB0_SPDIF>, <&ccu CLK_SPDIF>; - clock-names = "apb", "spdif"; - dmas = <&dma SUN4I_DMA_NORMAL 2>, - <&dma SUN4I_DMA_NORMAL 2>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - i2s0: i2s@1c22400 { - #sound-dai-cells = <0>; - compatible = "allwinner,sun4i-a10-i2s"; - reg = <0x01c22400 0x400>; - interrupts = <16>; - clocks = <&ccu CLK_APB0_I2S>, <&ccu CLK_I2S>; - clock-names = "apb", "mod"; - dmas = <&dma SUN4I_DMA_NORMAL 3>, - <&dma SUN4I_DMA_NORMAL 3>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - }; -}; - -&ccu { - compatible = "nextthing,gr8-ccu"; -}; - -&pio { - compatible = "nextthing,gr8-pinctrl"; - - i2s0_data_pins: i2s0-data-pins { - pins = "PB6", "PB7", "PB8", "PB9"; - function = "i2s0"; - }; - - i2s0_mclk_pin: i2s0-mclk-pin { - pins = "PB5"; - function = "i2s0"; - }; - - pwm1_pins: pwm1-pin { - pins = "PG13"; - function = "pwm1"; - }; - - spdif_tx_pin: spdif-tx-pin { - pins = "PB10"; - function = "spdif"; - bias-pull-up; - }; - - uart1_cts_rts_pins: uart1-cts-rts-pins { - pins = "PG5", "PG6"; - function = "uart1"; - }; -}; diff --git a/arch/arm/dts/sun5i-r8-chip.dts b/arch/arm/dts/sun5i-r8-chip.dts deleted file mode 100644 index 8c784a2c086..00000000000 --- a/arch/arm/dts/sun5i-r8-chip.dts +++ /dev/null @@ -1,282 +0,0 @@ -/* - * Copyright 2015 Free Electrons - * Copyright 2015 NextThing Co - * - * Maxime Ripard <maxime.ripard@free-electrons.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun5i-r8.dtsi" -#include "sunxi-common-regulators.dtsi" - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/interrupt-controller/irq.h> - -/ { - model = "NextThing C.H.I.P."; - compatible = "nextthing,chip", "allwinner,sun5i-r8", "allwinner,sun5i-a13"; - - aliases { - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - serial0 = &uart1; - serial1 = &uart3; - spi0 = &spi2; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - leds { - compatible = "gpio-leds"; - - led-0 { - label = "chip:white:status"; - gpios = <&axp_gpio 2 GPIO_ACTIVE_HIGH>; - default-state = "on"; - }; - }; - - mmc0_pwrseq: pwrseq { - compatible = "mmc-pwrseq-simple"; - reset-gpios = <&pio 2 19 GPIO_ACTIVE_LOW>; /* PC19 */ - }; - - onewire { - compatible = "w1-gpio"; - gpios = <&pio 3 2 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PD2 */ - }; -}; - -&be0 { - status = "okay"; -}; - -&codec { - status = "okay"; -}; - -&cpu0 { - cpu-supply = <®_dcdc2>; -}; - -&ehci0 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - axp209: pmic@34 { - reg = <0x34>; - - /* - * The interrupt is routed through the "External Fast - * Interrupt Request" pin (ball G13 of the module) - * directly to the main interrupt controller, without - * any other controller interfering. - */ - interrupts = <0>; - }; -}; - -#include "axp209.dtsi" - -&ac_power_supply { - status = "okay"; -}; - -&battery_power_supply { - status = "okay"; -}; - -&i2c1 { - status = "disabled"; -}; - -&i2c2 { - status = "okay"; - - xio: gpio@38 { - compatible = "nxp,pcf8574a"; - reg = <0x38>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-parent = <&pio>; - interrupts = <6 0 IRQ_TYPE_EDGE_FALLING>; - interrupt-controller; - #interrupt-cells = <2>; - }; -}; - -&mmc0_pins { - bias-pull-up; -}; - -&mmc0 { - vmmc-supply = <®_vcc3v3>; - mmc-pwrseq = <&mmc0_pwrseq>; - bus-width = <4>; - non-removable; - status = "okay"; -}; - -&ohci0 { - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -®_dcdc2 { - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1400000>; - regulator-name = "cpuvdd"; - regulator-always-on; -}; - -®_dcdc3 { - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1300000>; - regulator-name = "corevdd"; - regulator-always-on; -}; - -®_ldo1 { - regulator-name = "rtcvdd"; -}; - -®_ldo2 { - regulator-min-microvolt = <2700000>; - regulator-max-microvolt = <3300000>; - regulator-name = "avcc"; - regulator-always-on; -}; - -/* - * Both LDO3 and LDO4 are used in parallel to power up the WiFi/BT - * Chip. - * - * If those are not enabled, the SDIO part will not enumerate, and - * since there's no way currently to pass DT infos to an SDIO device, - * we cannot really do better than this ugly hack for now. - */ -®_ldo3 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc-wifi-1"; - regulator-always-on; -}; - -®_ldo4 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc-wifi-2"; - regulator-always-on; -}; - -®_ldo5 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc-1v8"; -}; - -®_usb0_vbus { - vin-supply = <®_vcc5v0>; - gpio = <&pio 1 10 GPIO_ACTIVE_HIGH>; /* PB10 */ - status = "okay"; -}; - -&spi2 { - pinctrl-names = "default"; - pinctrl-0 = <&spi2_pe_pins>; - status = "disabled"; -}; - -&tcon0 { - status = "okay"; -}; - -&tve0 { - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&uart1_pg_pins>; - status = "okay"; -}; - -&uart3 { - pinctrl-names = "default"; - pinctrl-0 = <&uart3_pg_pins>, - <&uart3_cts_rts_pg_pins>; - status = "okay"; - - bluetooth { - compatible = "realtek,rtl8723bs-bt"; - device-wake-gpios = <&axp_gpio 3 GPIO_ACTIVE_HIGH>; - host-wake-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */ - }; -}; - -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - -&usb_power_supply { - status = "okay"; -}; - -&usbphy { - status = "okay"; - - usb0_id_det-gpios = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */ - usb0_vbus_power-supply = <&usb_power_supply>; - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_vcc5v0>; -}; diff --git a/arch/arm/dts/sun5i-r8.dtsi b/arch/arm/dts/sun5i-r8.dtsi deleted file mode 100644 index de35dbcd119..00000000000 --- a/arch/arm/dts/sun5i-r8.dtsi +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Copyright 2015 Free Electrons - * Copyright 2015 NextThing Co - * - * Maxime Ripard <maxime.ripard@free-electrons.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include "sun5i-a13.dtsi" - diff --git a/arch/arm/dts/sun5i-reference-design-tablet.dtsi b/arch/arm/dts/sun5i-reference-design-tablet.dtsi deleted file mode 100644 index 6847f66699a..00000000000 --- a/arch/arm/dts/sun5i-reference-design-tablet.dtsi +++ /dev/null @@ -1,194 +0,0 @@ -/* - * Copyright 2015 Hans de Goede <hdegoede@redhat.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ -#include "sunxi-reference-design-tablet.dtsi" - -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/pwm/pwm.h> - -/ { - aliases { - serial0 = &uart1; - }; - - backlight: backlight { - compatible = "pwm-backlight"; - pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; - brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; - default-brightness-level = <8>; - enable-gpios = <&axp_gpio 1 GPIO_ACTIVE_HIGH>; /* AXP GPIO1 */ - power-supply = <®_vcc3v0>; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&codec { - allwinner,pa-gpios = <&pio 6 10 GPIO_ACTIVE_HIGH>; /* PG10 */ - status = "okay"; -}; - -&cpu0 { - cpu-supply = <®_dcdc2>; -}; - -&ehci0 { - status = "okay"; -}; - -&i2c0 { - axp209: pmic@34 { - reg = <0x34>; - interrupts = <0>; - }; -}; - -&i2c1 { - /* - * The gsl1680 is rated at 400KHz and it will not work reliable at - * 100KHz, this has been confirmed on multiple different q8 tablets. - * All other devices on this bus are also rated for 400KHz. - */ - clock-frequency = <400000>; - - touchscreen: touchscreen@40 { - reg = <0x40>; - interrupt-parent = <&pio>; - interrupts = <6 11 IRQ_TYPE_EDGE_FALLING>; /* EINT11 (PG11) */ - power-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */ - /* Tablet dts must provide reg and compatible */ - status = "disabled"; - }; - - pcf8563: rtc@51 { - compatible = "nxp,pcf8563"; - reg = <0x51>; - }; -}; - -#include "axp209.dtsi" - -&ac_power_supply { - status = "okay"; -}; - -&battery_power_supply { - status = "okay"; -}; - -&lradc { - vref-supply = <®_ldo2>; -}; - -&mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins>; - vmmc-supply = <®_vcc3v0>; - bus-width = <4>; - cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */ - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1500000>; - regulator-name = "vdd-cpu"; -}; - -®_dcdc3 { - regulator-always-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1400000>; - regulator-name = "vdd-int-pll"; -}; - -®_ldo1 { - regulator-name = "vdd-rtc"; -}; - -®_ldo2 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "avcc"; -}; - -®_ldo3 { - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc-wifi"; -}; - -®_usb0_vbus { - gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&uart1_pg_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - -&usb_power_supply { - status = "okay"; -}; - -&usbphy { - usb0_id_det-gpios = <&pio 6 2 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PG2 */ - usb0_vbus_det-gpios = <&pio 6 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PG1 */ - usb0_vbus_power-supply = <&usb_power_supply>; - usb0_vbus-supply = <®_usb0_vbus>; - usb1_vbus-supply = <®_ldo3>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun5i.dtsi b/arch/arm/dts/sun5i.dtsi deleted file mode 100644 index d7c7b454a11..00000000000 --- a/arch/arm/dts/sun5i.dtsi +++ /dev/null @@ -1,819 +0,0 @@ -/* - * Copyright 2012-2015 Maxime Ripard - * - * Maxime Ripard <maxime.ripard@free-electrons.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include <dt-bindings/clock/sun5i-ccu.h> -#include <dt-bindings/dma/sun4i-a10.h> -#include <dt-bindings/reset/sun5i-ccu.h> - -/ { - interrupt-parent = <&intc>; - #address-cells = <1>; - #size-cells = <1>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a8"; - reg = <0x0>; - clocks = <&ccu CLK_CPU>; - }; - }; - - chosen { - #address-cells = <1>; - #size-cells = <1>; - ranges; - - framebuffer-lcd0 { - compatible = "allwinner,simple-framebuffer", - "simple-framebuffer"; - allwinner,pipeline = "de_be0-lcd0"; - clocks = <&ccu CLK_AHB_LCD>, <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>, - <&ccu CLK_TCON_CH0>, <&ccu CLK_DRAM_DE_BE>; - status = "disabled"; - }; - - framebuffer-lcd0-tve0 { - compatible = "allwinner,simple-framebuffer", - "simple-framebuffer"; - allwinner,pipeline = "de_be0-lcd0-tve0"; - clocks = <&ccu CLK_AHB_TVE>, <&ccu CLK_AHB_LCD>, - <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>, - <&ccu CLK_TCON_CH1>, <&ccu CLK_DRAM_DE_BE>; - status = "disabled"; - }; - }; - - clocks { - #address-cells = <1>; - #size-cells = <1>; - ranges; - - osc24M: clk-24M { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "osc24M"; - }; - - osc32k: clk-32k { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <32768>; - clock-output-names = "osc32k"; - }; - }; - - reserved-memory { - #address-cells = <1>; - #size-cells = <1>; - ranges; - - /* Address must be kept in the lower 256 MiBs of DRAM for VE. */ - default-pool { - compatible = "shared-dma-pool"; - size = <0x6000000>; - alloc-ranges = <0x40000000 0x10000000>; - reusable; - linux,cma-default; - }; - }; - - soc { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - dma-ranges; - ranges; - - system-control@1c00000 { - compatible = "allwinner,sun5i-a13-system-control"; - reg = <0x01c00000 0x30>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - sram_a: sram@0 { - compatible = "mmio-sram"; - reg = <0x00000000 0xc000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x00000000 0xc000>; - - emac_sram: sram-section@8000 { - compatible = "allwinner,sun5i-a13-sram-a3-a4", - "allwinner,sun4i-a10-sram-a3-a4"; - reg = <0x8000 0x4000>; - status = "disabled"; - }; - }; - - sram_d: sram@10000 { - compatible = "mmio-sram"; - reg = <0x00010000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x00010000 0x1000>; - - otg_sram: sram-section@0 { - compatible = "allwinner,sun5i-a13-sram-d", - "allwinner,sun4i-a10-sram-d"; - reg = <0x0000 0x1000>; - status = "disabled"; - }; - }; - - sram_c: sram@1d00000 { - compatible = "mmio-sram"; - reg = <0x01d00000 0xd0000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x01d00000 0xd0000>; - - ve_sram: sram-section@0 { - compatible = "allwinner,sun5i-a13-sram-c1", - "allwinner,sun4i-a10-sram-c1"; - reg = <0x000000 0x80000>; - }; - }; - }; - - mbus: dram-controller@1c01000 { - compatible = "allwinner,sun5i-a13-mbus"; - reg = <0x01c01000 0x1000>; - clocks = <&ccu CLK_MBUS>; - #address-cells = <1>; - #size-cells = <1>; - dma-ranges = <0x00000000 0x40000000 0x20000000>; - #interconnect-cells = <1>; - }; - - dma: dma-controller@1c02000 { - compatible = "allwinner,sun4i-a10-dma"; - reg = <0x01c02000 0x1000>; - interrupts = <27>; - clocks = <&ccu CLK_AHB_DMA>; - #dma-cells = <2>; - }; - - nfc: nand-controller@1c03000 { - compatible = "allwinner,sun4i-a10-nand"; - reg = <0x01c03000 0x1000>; - interrupts = <37>; - clocks = <&ccu CLK_AHB_NAND>, <&ccu CLK_NAND>; - clock-names = "ahb", "mod"; - dmas = <&dma SUN4I_DMA_DEDICATED 3>; - dma-names = "rxtx"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - spi0: spi@1c05000 { - compatible = "allwinner,sun4i-a10-spi"; - reg = <0x01c05000 0x1000>; - interrupts = <10>; - clocks = <&ccu CLK_AHB_SPI0>, <&ccu CLK_SPI0>; - clock-names = "ahb", "mod"; - dmas = <&dma SUN4I_DMA_DEDICATED 27>, - <&dma SUN4I_DMA_DEDICATED 26>; - dma-names = "rx", "tx"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - spi1: spi@1c06000 { - compatible = "allwinner,sun4i-a10-spi"; - reg = <0x01c06000 0x1000>; - interrupts = <11>; - clocks = <&ccu CLK_AHB_SPI1>, <&ccu CLK_SPI1>; - clock-names = "ahb", "mod"; - dmas = <&dma SUN4I_DMA_DEDICATED 9>, - <&dma SUN4I_DMA_DEDICATED 8>; - dma-names = "rx", "tx"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - tve0: tv-encoder@1c0a000 { - compatible = "allwinner,sun4i-a10-tv-encoder"; - reg = <0x01c0a000 0x1000>; - clocks = <&ccu CLK_AHB_TVE>; - resets = <&ccu RST_TVE>; - status = "disabled"; - - port { - - tve0_in_tcon0: endpoint { - remote-endpoint = <&tcon0_out_tve0>; - }; - }; - }; - - emac: ethernet@1c0b000 { - compatible = "allwinner,sun4i-a10-emac"; - reg = <0x01c0b000 0x1000>; - interrupts = <55>; - clocks = <&ccu CLK_AHB_EMAC>; - allwinner,sram = <&emac_sram 1>; - status = "disabled"; - }; - - mdio: mdio@1c0b080 { - compatible = "allwinner,sun4i-a10-mdio"; - reg = <0x01c0b080 0x14>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - tcon0: lcd-controller@1c0c000 { - compatible = "allwinner,sun5i-a13-tcon"; - reg = <0x01c0c000 0x1000>; - interrupts = <44>; - dmas = <&dma SUN4I_DMA_DEDICATED 14>; - resets = <&ccu RST_LCD>; - reset-names = "lcd"; - clocks = <&ccu CLK_AHB_LCD>, - <&ccu CLK_TCON_CH0>, - <&ccu CLK_TCON_CH1>; - clock-names = "ahb", - "tcon-ch0", - "tcon-ch1"; - clock-output-names = "tcon-data-clock"; - #clock-cells = <0>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - tcon0_in: port@0 { - reg = <0>; - - tcon0_in_be0: endpoint { - remote-endpoint = <&be0_out_tcon0>; - }; - }; - - tcon0_out: port@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - - tcon0_out_tve0: endpoint@1 { - reg = <1>; - remote-endpoint = <&tve0_in_tcon0>; - allwinner,tcon-channel = <1>; - }; - }; - }; - }; - - video-codec@1c0e000 { - compatible = "allwinner,sun5i-a13-video-engine"; - reg = <0x01c0e000 0x1000>; - clocks = <&ccu CLK_AHB_VE>, <&ccu CLK_VE>, - <&ccu CLK_DRAM_VE>; - clock-names = "ahb", "mod", "ram"; - resets = <&ccu RST_VE>; - interrupts = <53>; - allwinner,sram = <&ve_sram 1>; - }; - - mmc0: mmc@1c0f000 { - compatible = "allwinner,sun5i-a13-mmc"; - reg = <0x01c0f000 0x1000>; - clocks = <&ccu CLK_AHB_MMC0>, <&ccu CLK_MMC0>; - clock-names = "ahb", "mmc"; - interrupts = <32>; - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - mmc1: mmc@1c10000 { - compatible = "allwinner,sun5i-a13-mmc"; - reg = <0x01c10000 0x1000>; - clocks = <&ccu CLK_AHB_MMC1>, <&ccu CLK_MMC1>; - clock-names = "ahb", "mmc"; - interrupts = <33>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - mmc2: mmc@1c11000 { - compatible = "allwinner,sun5i-a13-mmc"; - reg = <0x01c11000 0x1000>; - clocks = <&ccu CLK_AHB_MMC2>, <&ccu CLK_MMC2>; - clock-names = "ahb", "mmc"; - interrupts = <34>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - usb_otg: usb@1c13000 { - compatible = "allwinner,sun4i-a10-musb"; - reg = <0x01c13000 0x0400>; - clocks = <&ccu CLK_AHB_OTG>; - interrupts = <38>; - interrupt-names = "mc"; - phys = <&usbphy 0>; - phy-names = "usb"; - extcon = <&usbphy 0>; - allwinner,sram = <&otg_sram 1>; - dr_mode = "otg"; - status = "disabled"; - }; - - usbphy: phy@1c13400 { - #phy-cells = <1>; - compatible = "allwinner,sun5i-a13-usb-phy"; - reg = <0x01c13400 0x10>, <0x01c14800 0x4>; - reg-names = "phy_ctrl", "pmu1"; - clocks = <&ccu CLK_USB_PHY0>; - clock-names = "usb_phy"; - resets = <&ccu RST_USB_PHY0>, <&ccu RST_USB_PHY1>; - reset-names = "usb0_reset", "usb1_reset"; - status = "disabled"; - }; - - ehci0: usb@1c14000 { - compatible = "allwinner,sun5i-a13-ehci", "generic-ehci"; - reg = <0x01c14000 0x100>; - interrupts = <39>; - clocks = <&ccu CLK_AHB_EHCI>; - phys = <&usbphy 1>; - phy-names = "usb"; - status = "disabled"; - }; - - ohci0: usb@1c14400 { - compatible = "allwinner,sun5i-a13-ohci", "generic-ohci"; - reg = <0x01c14400 0x100>; - interrupts = <40>; - clocks = <&ccu CLK_USB_OHCI>, <&ccu CLK_AHB_OHCI>; - phys = <&usbphy 1>; - phy-names = "usb"; - status = "disabled"; - }; - - crypto: crypto-engine@1c15000 { - compatible = "allwinner,sun5i-a13-crypto", - "allwinner,sun4i-a10-crypto"; - reg = <0x01c15000 0x1000>; - interrupts = <54>; - clocks = <&ccu CLK_AHB_SS>, <&ccu CLK_SS>; - clock-names = "ahb", "mod"; - }; - - spi2: spi@1c17000 { - compatible = "allwinner,sun4i-a10-spi"; - reg = <0x01c17000 0x1000>; - interrupts = <12>; - clocks = <&ccu CLK_AHB_SPI2>, <&ccu CLK_SPI2>; - clock-names = "ahb", "mod"; - dmas = <&dma SUN4I_DMA_DEDICATED 29>, - <&dma SUN4I_DMA_DEDICATED 28>; - dma-names = "rx", "tx"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - ccu: clock@1c20000 { - reg = <0x01c20000 0x400>; - clocks = <&osc24M>, <&osc32k>; - clock-names = "hosc", "losc"; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - intc: interrupt-controller@1c20400 { - compatible = "allwinner,sun4i-a10-ic"; - reg = <0x01c20400 0x400>; - interrupt-controller; - #interrupt-cells = <1>; - }; - - pio: pinctrl@1c20800 { - reg = <0x01c20800 0x400>; - interrupts = <28>; - clocks = <&ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>; - clock-names = "apb", "hosc", "losc"; - gpio-controller; - interrupt-controller; - #interrupt-cells = <3>; - #gpio-cells = <3>; - - emac_pd_pins: emac-pd-pins { - pins = "PD6", "PD7", "PD10", - "PD11", "PD12", "PD13", "PD14", - "PD15", "PD18", "PD19", "PD20", - "PD21", "PD22", "PD23", "PD24", - "PD25", "PD26", "PD27"; - function = "emac"; - }; - - i2c0_pins: i2c0-pins { - pins = "PB0", "PB1"; - function = "i2c0"; - }; - - i2c1_pins: i2c1-pins { - pins = "PB15", "PB16"; - function = "i2c1"; - }; - - i2c2_pins: i2c2-pins { - pins = "PB17", "PB18"; - function = "i2c2"; - }; - - ir0_rx_pin: ir0-rx-pin { - pins = "PB4"; - function = "ir0"; - }; - - lcd_rgb565_pins: lcd-rgb565-pins { - pins = "PD3", "PD4", "PD5", "PD6", "PD7", - "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", - "PD19", "PD20", "PD21", "PD22", "PD23", - "PD24", "PD25", "PD26", "PD27"; - function = "lcd0"; - }; - - lcd_rgb666_pins: lcd-rgb666-pins { - pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", - "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", - "PD18", "PD19", "PD20", "PD21", "PD22", "PD23", - "PD24", "PD25", "PD26", "PD27"; - function = "lcd0"; - }; - - mmc0_pins: mmc0-pins { - pins = "PF0", "PF1", "PF2", "PF3", - "PF4", "PF5"; - function = "mmc0"; - drive-strength = <30>; - bias-pull-up; - }; - - mmc2_4bit_pc_pins: mmc2-4bit-pc-pins { - pins = "PC6", "PC7", "PC8", "PC9", - "PC10", "PC11"; - function = "mmc2"; - drive-strength = <30>; - bias-pull-up; - }; - - /omit-if-no-ref/ - mmc2_4bit_pe_pins: mmc2-4bit-pe-pins { - pins = "PE4", "PE5", "PE6", "PE7", - "PE8", "PE9"; - function = "mmc2"; - drive-strength = <30>; - bias-pull-up; - }; - - mmc2_8bit_pins: mmc2-8bit-pins { - pins = "PC6", "PC7", "PC8", "PC9", - "PC10", "PC11", "PC12", "PC13", - "PC14", "PC15"; - function = "mmc2"; - drive-strength = <30>; - bias-pull-up; - }; - - nand_pins: nand-pins { - pins = "PC0", "PC1", "PC2", - "PC5", "PC8", "PC9", "PC10", - "PC11", "PC12", "PC13", "PC14", - "PC15"; - function = "nand0"; - }; - - nand_cs0_pin: nand-cs0-pin { - pins = "PC4"; - function = "nand0"; - }; - - nand_rb0_pin: nand-rb0-pin { - pins = "PC6"; - function = "nand0"; - }; - - pwm0_pin: pwm0-pin { - pins = "PB2"; - function = "pwm"; - }; - - spi2_pe_pins: spi2-pe-pins { - pins = "PE1", "PE2", "PE3"; - function = "spi2"; - }; - - spi2_cs0_pe_pin: spi2-cs0-pe-pin { - pins = "PE0"; - function = "spi2"; - }; - - uart1_pe_pins: uart1-pe-pins { - pins = "PE10", "PE11"; - function = "uart1"; - }; - - uart1_pg_pins: uart1-pg-pins { - pins = "PG3", "PG4"; - function = "uart1"; - }; - - uart2_pd_pins: uart2-pd-pins { - pins = "PD2", "PD3"; - function = "uart2"; - }; - - uart2_cts_rts_pd_pins: uart2-cts-rts-pd-pins { - pins = "PD4", "PD5"; - function = "uart2"; - }; - - uart3_pg_pins: uart3-pg-pins { - pins = "PG9", "PG10"; - function = "uart3"; - }; - - uart3_cts_rts_pg_pins: uart3-cts-rts-pg-pins { - pins = "PG11", "PG12"; - function = "uart3"; - }; - }; - - timer@1c20c00 { - compatible = "allwinner,sun4i-a10-timer"; - reg = <0x01c20c00 0x90>; - interrupts = <22>, - <23>, - <24>, - <25>, - <67>, - <68>; - clocks = <&ccu CLK_HOSC>; - }; - - wdt: watchdog@1c20c90 { - compatible = "allwinner,sun4i-a10-wdt"; - reg = <0x01c20c90 0x10>; - interrupts = <24>; - clocks = <&osc24M>; - }; - - ir0: ir@1c21800 { - compatible = "allwinner,sun4i-a10-ir"; - clocks = <&ccu CLK_APB0_IR>, <&ccu CLK_IR>; - clock-names = "apb", "ir"; - interrupts = <5>; - reg = <0x01c21800 0x40>; - status = "disabled"; - }; - - lradc: lradc@1c22800 { - compatible = "allwinner,sun4i-a10-lradc-keys"; - reg = <0x01c22800 0x100>; - interrupts = <31>; - status = "disabled"; - }; - - codec: codec@1c22c00 { - #sound-dai-cells = <0>; - compatible = "allwinner,sun4i-a10-codec"; - reg = <0x01c22c00 0x40>; - interrupts = <30>; - clocks = <&ccu CLK_APB0_CODEC>, <&ccu CLK_CODEC>; - clock-names = "apb", "codec"; - dmas = <&dma SUN4I_DMA_NORMAL 19>, - <&dma SUN4I_DMA_NORMAL 19>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - sid: eeprom@1c23800 { - compatible = "allwinner,sun4i-a10-sid"; - reg = <0x01c23800 0x10>; - }; - - rtp: rtp@1c25000 { - compatible = "allwinner,sun5i-a13-ts"; - reg = <0x01c25000 0x100>; - interrupts = <29>; - #thermal-sensor-cells = <0>; - }; - - uart0: serial@1c28000 { - compatible = "snps,dw-apb-uart"; - reg = <0x01c28000 0x400>; - interrupts = <1>; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&ccu CLK_APB1_UART0>; - status = "disabled"; - }; - - uart1: serial@1c28400 { - compatible = "snps,dw-apb-uart"; - reg = <0x01c28400 0x400>; - interrupts = <2>; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&ccu CLK_APB1_UART1>; - status = "disabled"; - }; - - uart2: serial@1c28800 { - compatible = "snps,dw-apb-uart"; - reg = <0x01c28800 0x400>; - interrupts = <3>; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&ccu CLK_APB1_UART2>; - status = "disabled"; - }; - - uart3: serial@1c28c00 { - compatible = "snps,dw-apb-uart"; - reg = <0x01c28c00 0x400>; - interrupts = <4>; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&ccu CLK_APB1_UART3>; - status = "disabled"; - }; - - i2c0: i2c@1c2ac00 { - compatible = "allwinner,sun4i-a10-i2c"; - reg = <0x01c2ac00 0x400>; - interrupts = <7>; - clocks = <&ccu CLK_APB1_I2C0>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c1: i2c@1c2b000 { - compatible = "allwinner,sun4i-a10-i2c"; - reg = <0x01c2b000 0x400>; - interrupts = <8>; - clocks = <&ccu CLK_APB1_I2C1>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c2: i2c@1c2b400 { - compatible = "allwinner,sun4i-a10-i2c"; - reg = <0x01c2b400 0x400>; - interrupts = <9>; - clocks = <&ccu CLK_APB1_I2C2>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - mali: gpu@1c40000 { - compatible = "allwinner,sun4i-a10-mali", "arm,mali-400"; - reg = <0x01c40000 0x10000>; - interrupts = <69>, <70>, <71>, <72>, <73>; - interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pmu"; - clocks = <&ccu CLK_AHB_GPU>, <&ccu CLK_GPU>; - clock-names = "bus", "core"; - resets = <&ccu RST_GPU>; - assigned-clocks = <&ccu CLK_GPU>; - assigned-clock-rates = <320000000>; - }; - - timer@1c60000 { - compatible = "allwinner,sun5i-a13-hstimer"; - reg = <0x01c60000 0x1000>; - interrupts = <82>, <83>; - clocks = <&ccu CLK_AHB_HSTIMER>; - }; - - fe0: display-frontend@1e00000 { - compatible = "allwinner,sun5i-a13-display-frontend"; - reg = <0x01e00000 0x20000>; - interrupts = <47>; - clocks = <&ccu CLK_DE_FE>, <&ccu CLK_DE_FE>, - <&ccu CLK_DRAM_DE_FE>; - clock-names = "ahb", "mod", - "ram"; - resets = <&ccu RST_DE_FE>; - interconnects = <&mbus 19>; - interconnect-names = "dma-mem"; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - fe0_out: port@1 { - reg = <1>; - - fe0_out_be0: endpoint { - remote-endpoint = <&be0_in_fe0>; - }; - }; - }; - }; - - be0: display-backend@1e60000 { - compatible = "allwinner,sun5i-a13-display-backend"; - reg = <0x01e60000 0x10000>; - interrupts = <47>; - clocks = <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>, - <&ccu CLK_DRAM_DE_BE>; - clock-names = "ahb", "mod", - "ram"; - resets = <&ccu RST_DE_BE>; - interconnects = <&mbus 18>; - interconnect-names = "dma-mem"; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - be0_in: port@0 { - reg = <0>; - - be0_in_fe0: endpoint { - remote-endpoint = <&fe0_out_be0>; - }; - }; - - be0_out: port@1 { - reg = <1>; - - be0_out_tcon0: endpoint { - remote-endpoint = <&tcon0_in_be0>; - }; - }; - }; - }; - }; -}; diff --git a/arch/arm/dts/suniv-f1c100s-licheepi-nano.dts b/arch/arm/dts/suniv-f1c100s-licheepi-nano.dts deleted file mode 100644 index 43896723a99..00000000000 --- a/arch/arm/dts/suniv-f1c100s-licheepi-nano.dts +++ /dev/null @@ -1,73 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR X11) -/* - * Copyright 2018 Icenowy Zheng <icenowy@aosc.io> - */ - -/dts-v1/; -#include "suniv-f1c100s.dtsi" - -#include <dt-bindings/gpio/gpio.h> - -/ { - model = "Lichee Pi Nano"; - compatible = "licheepi,licheepi-nano", "allwinner,suniv-f1c100s"; - - aliases { - mmc0 = &mmc0; - serial0 = &uart0; - spi0 = &spi0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - reg_vcc3v3: vcc3v3 { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; -}; - -&mmc0 { - broken-cd; - bus-width = <4>; - disable-wp; - status = "okay"; - vmmc-supply = <®_vcc3v3>; -}; - -&spi0 { - pinctrl-names = "default"; - pinctrl-0 = <&spi0_pc_pins>; - status = "okay"; - - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "winbond,w25q128", "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <40000000>; - }; -}; - -&otg_sram { - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pe_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "otg"; - status = "okay"; -}; - -&usbphy { - usb0_id_det-gpios = <&pio 4 2 GPIO_ACTIVE_HIGH>; /* PE2 */ - status = "okay"; -}; diff --git a/arch/arm/dts/suniv-f1c100s.dtsi b/arch/arm/dts/suniv-f1c100s.dtsi deleted file mode 100644 index 3c61d59ab5f..00000000000 --- a/arch/arm/dts/suniv-f1c100s.dtsi +++ /dev/null @@ -1,330 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR X11) -/* - * Copyright 2018 Icenowy Zheng <icenowy@aosc.io> - * Copyright 2018 Mesih Kilinc <mesihkilinc@gmail.com> - */ - -#include <dt-bindings/clock/suniv-ccu-f1c100s.h> -#include <dt-bindings/reset/suniv-ccu-f1c100s.h> - -/ { - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&intc>; - - clocks { - osc24M: clk-24M { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "osc24M"; - }; - - osc32k: clk-32k { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <32768>; - clock-output-names = "osc32k"; - }; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - compatible = "arm,arm926ej-s"; - device_type = "cpu"; - reg = <0x0>; - }; - }; - - soc { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - sram-controller@1c00000 { - compatible = "allwinner,suniv-f1c100s-system-control", - "allwinner,sun4i-a10-system-control"; - reg = <0x01c00000 0x30>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - sram_d: sram@10000 { - compatible = "mmio-sram"; - reg = <0x00010000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x00010000 0x1000>; - - otg_sram: sram-section@0 { - compatible = "allwinner,suniv-f1c100s-sram-d", - "allwinner,sun4i-a10-sram-d"; - reg = <0x0000 0x1000>; - status = "disabled"; - }; - }; - }; - - spi0: spi@1c05000 { - compatible = "allwinner,suniv-f1c100s-spi", - "allwinner,sun8i-h3-spi"; - reg = <0x01c05000 0x1000>; - interrupts = <10>; - clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_BUS_SPI0>; - clock-names = "ahb", "mod"; - resets = <&ccu RST_BUS_SPI0>; - status = "disabled"; - num-cs = <1>; - #address-cells = <1>; - #size-cells = <0>; - }; - - spi1: spi@1c06000 { - compatible = "allwinner,suniv-f1c100s-spi", - "allwinner,sun8i-h3-spi"; - reg = <0x01c06000 0x1000>; - interrupts = <11>; - clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_BUS_SPI1>; - clock-names = "ahb", "mod"; - resets = <&ccu RST_BUS_SPI1>; - status = "disabled"; - num-cs = <1>; - #address-cells = <1>; - #size-cells = <0>; - }; - - mmc0: mmc@1c0f000 { - compatible = "allwinner,suniv-f1c100s-mmc", - "allwinner,sun7i-a20-mmc"; - reg = <0x01c0f000 0x1000>; - clocks = <&ccu CLK_BUS_MMC0>, - <&ccu CLK_MMC0>, - <&ccu CLK_MMC0_OUTPUT>, - <&ccu CLK_MMC0_SAMPLE>; - clock-names = "ahb", "mmc", "output", "sample"; - resets = <&ccu RST_BUS_MMC0>; - reset-names = "ahb"; - interrupts = <23>; - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - mmc1: mmc@1c10000 { - compatible = "allwinner,suniv-f1c100s-mmc", - "allwinner,sun7i-a20-mmc"; - reg = <0x01c10000 0x1000>; - clocks = <&ccu CLK_BUS_MMC1>, - <&ccu CLK_MMC1>, - <&ccu CLK_MMC1_OUTPUT>, - <&ccu CLK_MMC1_SAMPLE>; - clock-names = "ahb", "mmc", "output", "sample"; - resets = <&ccu RST_BUS_MMC1>; - reset-names = "ahb"; - interrupts = <24>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - usb_otg: usb@1c13000 { - compatible = "allwinner,suniv-f1c100s-musb"; - reg = <0x01c13000 0x0400>; - clocks = <&ccu CLK_BUS_OTG>; - resets = <&ccu RST_BUS_OTG>; - interrupts = <26>; - interrupt-names = "mc"; - phys = <&usbphy 0>; - phy-names = "usb"; - extcon = <&usbphy 0>; - allwinner,sram = <&otg_sram 1>; - status = "disabled"; - }; - - usbphy: phy@1c13400 { - compatible = "allwinner,suniv-f1c100s-usb-phy"; - reg = <0x01c13400 0x10>; - reg-names = "phy_ctrl"; - clocks = <&ccu CLK_USB_PHY0>; - clock-names = "usb0_phy"; - resets = <&ccu RST_USB_PHY0>; - reset-names = "usb0_reset"; - #phy-cells = <1>; - status = "disabled"; - }; - - ccu: clock@1c20000 { - compatible = "allwinner,suniv-f1c100s-ccu"; - reg = <0x01c20000 0x400>; - clocks = <&osc24M>, <&osc32k>; - clock-names = "hosc", "losc"; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - intc: interrupt-controller@1c20400 { - compatible = "allwinner,suniv-f1c100s-ic"; - reg = <0x01c20400 0x400>; - interrupt-controller; - #interrupt-cells = <1>; - }; - - pio: pinctrl@1c20800 { - compatible = "allwinner,suniv-f1c100s-pinctrl"; - reg = <0x01c20800 0x400>; - interrupts = <38>, <39>, <40>; - clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>; - clock-names = "apb", "hosc", "losc"; - gpio-controller; - interrupt-controller; - #interrupt-cells = <3>; - #gpio-cells = <3>; - - mmc0_pins: mmc0-pins { - pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; - function = "mmc0"; - drive-strength = <30>; - }; - - /omit-if-no-ref/ - i2c0_pd_pins: i2c0-pd-pins { - pins = "PD0", "PD12"; - function = "i2c0"; - }; - - spi0_pc_pins: spi0-pc-pins { - pins = "PC0", "PC1", "PC2", "PC3"; - function = "spi0"; - }; - - uart0_pe_pins: uart0-pe-pins { - pins = "PE0", "PE1"; - function = "uart0"; - }; - - /omit-if-no-ref/ - uart1_pa_pins: uart1-pa-pins { - pins = "PA2", "PA3"; - function = "uart1"; - }; - }; - - i2c0: i2c@1c27000 { - compatible = "allwinner,suniv-f1c100s-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x01c27000 0x400>; - interrupts = <7>; - clocks = <&ccu CLK_BUS_I2C0>; - resets = <&ccu RST_BUS_I2C0>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c1: i2c@1c27400 { - compatible = "allwinner,suniv-f1c100s-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x01c27400 0x400>; - interrupts = <8>; - clocks = <&ccu CLK_BUS_I2C1>; - resets = <&ccu RST_BUS_I2C1>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c2: i2c@1c27800 { - compatible = "allwinner,suniv-f1c100s-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x01c27800 0x400>; - interrupts = <9>; - clocks = <&ccu CLK_BUS_I2C2>; - resets = <&ccu RST_BUS_I2C2>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - timer@1c20c00 { - compatible = "allwinner,suniv-f1c100s-timer"; - reg = <0x01c20c00 0x90>; - interrupts = <13>, <14>, <15>; - clocks = <&osc24M>; - }; - - wdt: watchdog@1c20ca0 { - compatible = "allwinner,suniv-f1c100s-wdt", - "allwinner,sun6i-a31-wdt"; - reg = <0x01c20ca0 0x20>; - interrupts = <16>; - clocks = <&osc32k>; - }; - - pwm: pwm@1c21000 { - compatible = "allwinner,suniv-f1c100s-pwm", - "allwinner,sun7i-a20-pwm"; - reg = <0x01c21000 0x400>; - clocks = <&osc24M>; - #pwm-cells = <3>; - status = "disabled"; - }; - - ir: ir@1c22c00 { - compatible = "allwinner,suniv-f1c100s-ir", - "allwinner,sun6i-a31-ir"; - reg = <0x01c22c00 0x400>; - clocks = <&ccu CLK_BUS_IR>, <&ccu CLK_IR>; - clock-names = "apb", "ir"; - resets = <&ccu RST_BUS_IR>; - interrupts = <6>; - status = "disabled"; - }; - - lradc: lradc@1c23400 { - compatible = "allwinner,suniv-f1c100s-lradc", - "allwinner,sun8i-a83t-r-lradc"; - reg = <0x01c23400 0x400>; - interrupts = <22>; - status = "disabled"; - }; - - uart0: serial@1c25000 { - compatible = "snps,dw-apb-uart"; - reg = <0x01c25000 0x400>; - interrupts = <1>; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&ccu CLK_BUS_UART0>; - resets = <&ccu RST_BUS_UART0>; - status = "disabled"; - }; - - uart1: serial@1c25400 { - compatible = "snps,dw-apb-uart"; - reg = <0x01c25400 0x400>; - interrupts = <2>; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&ccu CLK_BUS_UART1>; - resets = <&ccu RST_BUS_UART1>; - status = "disabled"; - }; - - uart2: serial@1c25800 { - compatible = "snps,dw-apb-uart"; - reg = <0x01c25800 0x400>; - interrupts = <3>; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&ccu CLK_BUS_UART2>; - resets = <&ccu RST_BUS_UART2>; - status = "disabled"; - }; - }; -}; diff --git a/arch/arm/dts/suniv-f1c200s-lctech-pi.dts b/arch/arm/dts/suniv-f1c200s-lctech-pi.dts deleted file mode 100644 index 2d2a3f026df..00000000000 --- a/arch/arm/dts/suniv-f1c200s-lctech-pi.dts +++ /dev/null @@ -1,76 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright 2022 Arm Ltd, - * based on work: - * Copyright 2022 Icenowy Zheng <uwu@icenowy.me> - */ - -/dts-v1/; -#include "suniv-f1c100s.dtsi" - -#include <dt-bindings/gpio/gpio.h> - -/ { - model = "Lctech Pi F1C200s"; - compatible = "lctech,pi-f1c200s", "allwinner,suniv-f1c200s", - "allwinner,suniv-f1c100s"; - - aliases { - serial0 = &uart1; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - reg_vcc3v3: regulator-3v3 { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; -}; - -&mmc0 { - broken-cd; - bus-width = <4>; - disable-wp; - vmmc-supply = <®_vcc3v3>; - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -&spi0 { - pinctrl-names = "default"; - pinctrl-0 = <&spi0_pc_pins>; - status = "okay"; - - flash@0 { - compatible = "spi-nand"; - reg = <0>; - spi-max-frequency = <40000000>; - }; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&uart1_pa_pins>; - status = "okay"; -}; - -/* - * This is a Type-C socket, but CC1/2 are not connected, and VBUS is connected - * to Vin, which supplies the board. Host mode works (if the board is powered - * otherwise), but peripheral is probably the intention. - */ -&usb_otg { - dr_mode = "peripheral"; - status = "okay"; -}; - -&usbphy { - status = "okay"; -}; diff --git a/arch/arm/dts/suniv-f1c200s-popstick-v1.1.dts b/arch/arm/dts/suniv-f1c200s-popstick-v1.1.dts deleted file mode 100644 index 184c245041a..00000000000 --- a/arch/arm/dts/suniv-f1c200s-popstick-v1.1.dts +++ /dev/null @@ -1,81 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright 2022 Icenowy Zheng <uwu@icenowy.me> - */ - -/dts-v1/; -#include "suniv-f1c100s.dtsi" - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/leds/common.h> - -/ { - model = "Popcorn Computer PopStick v1.1"; - compatible = "sourceparts,popstick-v1.1", "sourceparts,popstick", - "allwinner,suniv-f1c200s", "allwinner,suniv-f1c100s"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - leds { - compatible = "gpio-leds"; - - led { - function = LED_FUNCTION_STATUS; - color = <LED_COLOR_ID_GREEN>; - gpios = <&pio 4 6 GPIO_ACTIVE_HIGH>; /* PE6 */ - linux,default-trigger = "heartbeat"; - }; - }; - - reg_vcc3v3: regulator-3v3 { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; -}; - -&mmc0 { - cd-gpios = <&pio 4 3 GPIO_ACTIVE_LOW>; /* PE3 */ - bus-width = <4>; - disable-wp; - vmmc-supply = <®_vcc3v3>; - status = "okay"; -}; - -&otg_sram { - status = "okay"; -}; - -&spi0 { - pinctrl-names = "default"; - pinctrl-0 = <&spi0_pc_pins>; - status = "okay"; - - flash@0 { - compatible = "spi-nand"; - reg = <0>; - spi-max-frequency = <40000000>; - }; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pe_pins>; - status = "okay"; -}; - -&usb_otg { - dr_mode = "peripheral"; - status = "okay"; -}; - -&usbphy { - status = "okay"; -}; diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi index 60d1b1acf9a..385fed8a852 100644 --- a/arch/arm/dts/zynqmp-clk-ccf.dtsi +++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi @@ -10,39 +10,44 @@ #include <dt-bindings/clock/xlnx-zynqmp-clk.h> / { - pss_ref_clk: pss_ref_clk { + pss_ref_clk: pss-ref-clk { bootph-all; compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <33333333>; + clock-output-names = "pss_ref_clk"; }; - video_clk: video_clk { + video_clk: video-clk { bootph-all; compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <27000000>; + clock-output-names = "video_clk"; }; - pss_alt_ref_clk: pss_alt_ref_clk { + pss_alt_ref_clk: pss-alt-ref-clk { bootph-all; compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <0>; + clock-output-names = "pss_alt_ref_clk"; }; - gt_crx_ref_clk: gt_crx_ref_clk { + gt_crx_ref_clk: gt-crx-ref-clk { bootph-all; compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <108000000>; + clock-output-names = "gt_crx_ref_clk"; }; - aux_ref_clk: aux_ref_clk { + aux_ref_clk: aux-ref-clk { bootph-all; compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <27000000>; + clock-output-names = "aux_ref_clk"; }; }; diff --git a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts index 4e0587fd441..6e2d9542012 100644 --- a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts @@ -494,6 +494,7 @@ /* Use for storing information about SC board */ eeprom: eeprom@54 { /* u34 - m24128 16kB */ compatible = "st,24c128", "atmel,24c128"; + label = "eeprom_cc"; reg = <0x54>; /* 0x5c too */ }; si570_ref_clk: clock-generator@5d { /* u32 */ @@ -509,6 +510,7 @@ /* and connector J212D */ eeprom_ebm: eeprom@52 { /* x-ebm module */ compatible = "st,24c128", "atmel,24c128"; + label = "eeprom_ebm"; reg = <0x52>; }; }; @@ -520,6 +522,7 @@ /* expected eeprom 0x50 FMC cards */ eeprom_fmc1: eeprom@50 { compatible = "st,24c128", "atmel,24c128"; + label = "eeprom_fmc1"; reg = <0x50>; }; }; @@ -531,6 +534,7 @@ /* expected eeprom 0x50 FMC cards */ eeprom_fmc2: eeprom@50 { compatible = "st,24c128", "atmel,24c128"; + label = "eeprom_fmc2"; reg = <0x50>; }; }; diff --git a/arch/arm/dts/zynqmp-sc-revB.dts b/arch/arm/dts/zynqmp-sc-revB.dts index c4f70581695..6f5856017bf 100644 --- a/arch/arm/dts/zynqmp-sc-revB.dts +++ b/arch/arm/dts/zynqmp-sc-revB.dts @@ -175,6 +175,7 @@ /* Use for storing information about SC board */ eeprom: eeprom@54 { /* u34 - m24128 16kB */ compatible = "st,24c128", "atmel,24c128"; + label = "eeprom_cc"; reg = <0x54>; /* & 0x5c */ bootph-all; }; diff --git a/arch/arm/dts/zynqmp-sm-k26-revA.dts b/arch/arm/dts/zynqmp-sm-k26-revA.dts index 620f5185cc4..70acd3eb88b 100644 --- a/arch/arm/dts/zynqmp-sm-k26-revA.dts +++ b/arch/arm/dts/zynqmp-sm-k26-revA.dts @@ -90,20 +90,6 @@ }; }; - ams { - compatible = "iio-hwmon"; - io-channels = <&xilinx_ams 0>, <&xilinx_ams 1>, <&xilinx_ams 2>, - <&xilinx_ams 3>, <&xilinx_ams 4>, <&xilinx_ams 5>, - <&xilinx_ams 6>, <&xilinx_ams 7>, <&xilinx_ams 8>, - <&xilinx_ams 9>, <&xilinx_ams 10>, <&xilinx_ams 11>, - <&xilinx_ams 12>, <&xilinx_ams 13>, <&xilinx_ams 14>, - <&xilinx_ams 15>, <&xilinx_ams 16>, <&xilinx_ams 17>, - <&xilinx_ams 18>, <&xilinx_ams 19>, <&xilinx_ams 20>, - <&xilinx_ams 21>, <&xilinx_ams 22>, <&xilinx_ams 23>, - <&xilinx_ams 24>, <&xilinx_ams 25>, <&xilinx_ams 26>, - <&xilinx_ams 27>, <&xilinx_ams 28>, <&xilinx_ams 29>; - }; - pwm-fan { compatible = "pwm-fan"; status = "okay"; @@ -111,6 +97,10 @@ }; }; +&ams { + status = "okay"; +}; + &modepin_gpio { label = "modepin"; }; @@ -369,10 +359,6 @@ "", "", "", ""; /* 170 - 173 */ }; -&xilinx_ams { - status = "okay"; -}; - &ams_ps { status = "okay"; }; diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts b/arch/arm/dts/zynqmp-zcu100-revC.dts index c9051360931..3542844e697 100644 --- a/arch/arm/dts/zynqmp-zcu100-revC.dts +++ b/arch/arm/dts/zynqmp-zcu100-revC.dts @@ -593,10 +593,6 @@ status = "okay"; }; -&xilinx_ams { - status = "okay"; -}; - &ams_ps { status = "okay"; }; diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index dd63d22f45e..955810ae717 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -1065,10 +1065,6 @@ status = "okay"; }; -&xilinx_ams { - status = "okay"; -}; - &ams_ps { status = "okay"; }; diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts b/arch/arm/dts/zynqmp-zcu104-revA.dts index 31effbf27a8..64d822255ec 100644 --- a/arch/arm/dts/zynqmp-zcu104-revA.dts +++ b/arch/arm/dts/zynqmp-zcu104-revA.dts @@ -527,10 +527,6 @@ status = "okay"; }; -&xilinx_ams { - status = "okay"; -}; - &ams_ps { status = "okay"; }; diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts index 999b2431bdf..3e883d717c2 100644 --- a/arch/arm/dts/zynqmp-zcu104-revC.dts +++ b/arch/arm/dts/zynqmp-zcu104-revC.dts @@ -539,10 +539,6 @@ status = "okay"; }; -&xilinx_ams { - status = "okay"; -}; - &ams_ps { status = "okay"; }; diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 70ca5e6379f..0e0436ecce8 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -18,6 +18,7 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/power/xlnx-zynqmp-power.h> #include <dt-bindings/reset/xlnx-zynqmp-resets.h> +#include <dt-bindings/thermal/thermal.h> / { compatible = "xlnx,zynqmp"; @@ -36,6 +37,7 @@ #size-cells = <0>; cpu0: cpu@0 { + #cooling-cells = <2>; compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "psci"; @@ -46,6 +48,7 @@ }; cpu1: cpu@1 { + #cooling-cells = <2>; compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "psci"; @@ -56,6 +59,7 @@ }; cpu2: cpu@2 { + #cooling-cells = <2>; compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "psci"; @@ -66,6 +70,7 @@ }; cpu3: cpu@3 { + #cooling-cells = <2>; compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "psci"; @@ -388,6 +393,102 @@ }; }; + ams: ams { + compatible = "iio-hwmon"; + status = "disabled"; + io-channels = <&xilinx_ams 0>, <&xilinx_ams 1>, <&xilinx_ams 2>, + <&xilinx_ams 3>, <&xilinx_ams 4>, <&xilinx_ams 5>, + <&xilinx_ams 6>, <&xilinx_ams 7>, <&xilinx_ams 8>, + <&xilinx_ams 9>, <&xilinx_ams 10>, <&xilinx_ams 11>, + <&xilinx_ams 12>, <&xilinx_ams 13>, <&xilinx_ams 14>, + <&xilinx_ams 15>, <&xilinx_ams 16>, <&xilinx_ams 17>, + <&xilinx_ams 18>, <&xilinx_ams 19>, <&xilinx_ams 20>, + <&xilinx_ams 21>, <&xilinx_ams 22>, <&xilinx_ams 23>, + <&xilinx_ams 24>, <&xilinx_ams 25>, <&xilinx_ams 26>, + <&xilinx_ams 27>, <&xilinx_ams 28>, <&xilinx_ams 29>; + }; + + + tsens_apu: thermal-sensor-apu { + compatible = "generic-adc-thermal"; + #thermal-sensor-cells = <0>; + io-channels = <&xilinx_ams 7>; + io-channel-names = "sensor-channel"; + }; + + tsens_rpu: thermal-sensor-rpu { + compatible = "generic-adc-thermal"; + #thermal-sensor-cells = <0>; + io-channels = <&xilinx_ams 8>; + io-channel-names = "sensor-channel"; + }; + + tsens_pl: thermal-sensor-pl { + compatible = "generic-adc-thermal"; + #thermal-sensor-cells = <0>; + io-channels = <&xilinx_ams 20>; + io-channel-names = "sensor-channel"; + }; + + thermal-zones { + apu-thermal { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tsens_apu>; + + trips { + apu_passive: passive { + temperature = <93000>; + hysteresis = <3500>; + type = "passive"; + }; + + apu_critical: critical { + temperature = <96500>; + hysteresis = <3500>; + type = "critical"; + }; + }; + + cooling-maps { + map { + trip = <&apu_passive>; + cooling-device = + <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + rpu-thermal { + polling-delay = <10000>; + thermal-sensors = <&tsens_rpu>; + + trips { + critical { + temperature = <96500>; + hysteresis = <3500>; + type = "critical"; + }; + }; + }; + + pl-thermal { + polling-delay = <10000>; + thermal-sensors = <&tsens_pl>; + + trips { + critical { + temperature = <96500>; + hysteresis = <3500>; + type = "critical"; + }; + }; + }; + }; + amba: axi { compatible = "simple-bus"; bootph-all; @@ -1153,7 +1254,6 @@ xilinx_ams: ams@ffa50000 { compatible = "xlnx,zynqmp-ams"; - status = "disabled"; interrupt-parent = <&gic>; interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; reg = <0x0 0xffa50000 0x0 0x800>; diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3588.h b/arch/arm/include/asm/arch-rockchip/cru_rk3588.h index dad484813fa..afce8a44af3 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_rk3588.h +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3588.h @@ -346,7 +346,7 @@ enum { ACLK_VOP_LOW_ROOT_SEL_100M, ACLK_VOP_LOW_ROOT_SEL_24M, ACLK_VOP_ROOT_SEL_SHIFT = 5, - ACLK_VOP_ROOT_SEL_MASK = 3 << ACLK_VOP_ROOT_SEL_SHIFT, + ACLK_VOP_ROOT_SEL_MASK = 7 << ACLK_VOP_ROOT_SEL_SHIFT, ACLK_VOP_ROOT_SEL_GPLL = 0, ACLK_VOP_ROOT_SEL_CPLL, ACLK_VOP_ROOT_SEL_AUPLL, diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h b/arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h index a84a57e5b41..76dd33c9477 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h @@ -267,31 +267,23 @@ struct sunxi_ccm_reg { #define CCM_CPU_AXI_DEFAULT_FACTORS 0x301 #ifdef CONFIG_MACH_SUN50I_H6 /* H6 */ -#define CCM_PLL6_DEFAULT 0xa0006300 -/* psi_ahb1_ahb2 bit field */ +#define CCM_PLL6_DEFAULT 0xa0006300 #define CCM_PSI_AHB1_AHB2_DEFAULT 0x03000102 - -/* ahb3 bit field */ #define CCM_AHB3_DEFAULT 0x03000002 - -/* apb1 bit field */ #define CCM_APB1_DEFAULT 0x03000102 + #elif CONFIG_MACH_SUN50I_H616 /* H616 */ -#define CCM_PLL6_DEFAULT 0xa8003100 -/* psi_ahb1_ahb2 bit field */ +#define CCM_PLL6_DEFAULT 0xa8003100 #define CCM_PSI_AHB1_AHB2_DEFAULT 0x03000002 - -/* ahb3 bit field */ #define CCM_AHB3_DEFAULT 0x03000002 - -/* apb1 bit field */ #define CCM_APB1_DEFAULT 0x03000102 + #elif CONFIG_MACH_SUN8I_R528 /* R528 */ + #define CCM_PLL6_DEFAULT 0xe8216300 #define CCM_PSI_AHB1_AHB2_DEFAULT 0x03000002 -//#define CCM_AHB3_DEFAULT 0x03000002 #define CCM_APB1_DEFAULT 0x03000102 #endif diff --git a/arch/arm/include/asm/armv8/cpu.h b/arch/arm/include/asm/armv8/cpu.h index 40d54dc85ab..4dbb589aab8 100644 --- a/arch/arm/include/asm/armv8/cpu.h +++ b/arch/arm/include/asm/armv8/cpu.h @@ -3,11 +3,13 @@ * Copyright 2018 NXP */ -#define MIDR_PARTNUM_CORTEX_A35 0xD04 -#define MIDR_PARTNUM_CORTEX_A53 0xD03 -#define MIDR_PARTNUM_CORTEX_A72 0xD08 -#define MIDR_PARTNUM_SHIFT 0x4 -#define MIDR_PARTNUM_MASK (0xFFF << 0x4) +#define MIDR_PARTNUM_CORTEX_A35 0xD04 +#define MIDR_PARTNUM_CORTEX_A53 0xD03 +#define MIDR_PARTNUM_CORTEX_A57 0xD07 +#define MIDR_PARTNUM_CORTEX_A72 0xD08 +#define MIDR_PARTNUM_CORTEX_A76 0xD0B +#define MIDR_PARTNUM_SHIFT 0x4 +#define MIDR_PARTNUM_MASK (0xFFF << MIDR_PARTNUM_SHIFT) static inline unsigned int read_midr(void) { @@ -18,9 +20,17 @@ static inline unsigned int read_midr(void) return val; } -#define is_cortex_a35() (((read_midr() & MIDR_PARTNUM_MASK) >> \ - MIDR_PARTNUM_SHIFT) == MIDR_PARTNUM_CORTEX_A35) -#define is_cortex_a53() (((read_midr() & MIDR_PARTNUM_MASK) >> \ - MIDR_PARTNUM_SHIFT) == MIDR_PARTNUM_CORTEX_A53) -#define is_cortex_a72() (((read_midr() & MIDR_PARTNUM_MASK) >>\ - MIDR_PARTNUM_SHIFT) == MIDR_PARTNUM_CORTEX_A72) +#define is_cortex_a(__n) \ + static inline int is_cortex_a##__n(void) \ + { \ + unsigned int midr = read_midr(); \ + midr &= MIDR_PARTNUM_MASK; \ + midr >>= MIDR_PARTNUM_SHIFT; \ + return midr == MIDR_PARTNUM_CORTEX_A##__n; \ + } + +is_cortex_a(35) +is_cortex_a(53) +is_cortex_a(57) +is_cortex_a(72) +is_cortex_a(76) diff --git a/arch/arm/lib/crt0_aarch64_efi.S b/arch/arm/lib/crt0_aarch64_efi.S index fe6eca576ec..e21b54fdbcb 100644 --- a/arch/arm/lib/crt0_aarch64_efi.S +++ b/arch/arm/lib/crt0_aarch64_efi.S @@ -41,7 +41,7 @@ optional_header: .byte 0x02 /* MajorLinkerVersion */ .byte 0x14 /* MinorLinkerVersion */ .long _etext - _start /* SizeOfCode */ - .long 0 /* SizeOfInitializedData */ + .long _data_size /* SizeOfInitializedData */ .long 0 /* SizeOfUninitializedData */ .long _start - ImageBase /* AddressOfEntryPoint */ .long _start - ImageBase /* BaseOfCode */ diff --git a/arch/arm/lib/crt0_arm_efi.S b/arch/arm/lib/crt0_arm_efi.S index b5dfd4e3819..91b0fe12c51 100644 --- a/arch/arm/lib/crt0_arm_efi.S +++ b/arch/arm/lib/crt0_arm_efi.S @@ -38,16 +38,16 @@ optional_header: .short IMAGE_NT_OPTIONAL_HDR32_MAGIC /* PE32 format */ .byte 0x02 /* MajorLinkerVersion */ .byte 0x14 /* MinorLinkerVersion */ - .long _edata - _start /* SizeOfCode */ - .long 0 /* SizeOfInitializedData */ + .long _etext - _start /* SizeOfCode */ + .long _data_size /* SizeOfInitializedData */ .long 0 /* SizeOfUninitializedData */ .long _start - image_base /* AddressOfEntryPoint */ .long _start - image_base /* BaseOfCode */ .long 0 /* BaseOfData */ extra_header_fields: - .long 0 /* image_base */ - .long 0x200 /* SectionAlignment */ + .long 0 /* ImageBase */ + .long 0x1000 /* SectionAlignment */ .long 0x200 /* FileAlignment */ .short 0 /* MajorOperatingSystemVersion */ .short 0 /* MinorOperatingSystemVersion */ @@ -84,6 +84,7 @@ extra_header_fields: .quad 0 /* CertificationTable */ .quad 0 /* BaseRelocationTable */ + /* Section table */ section_table: /* @@ -111,9 +112,9 @@ section_table: .byte 0 .byte 0 .byte 0 /* end of 0 padding of section name */ - .long _text_size /* VirtualSize */ + .long _etext - _start /* VirtualSize */ .long _start - image_base /* VirtualAddress */ - .long _text_size /* SizeOfRawData */ + .long _etext - _start /* SizeOfRawData */ .long _start - image_base /* PointerToRawData */ .long 0 /* PointerToRelocations */ .long 0 /* PointerToLineNumbers */ diff --git a/arch/arm/lib/elf_aarch64_efi.lds b/arch/arm/lib/elf_aarch64_efi.lds index 5dd98091698..453d3511c28 100644 --- a/arch/arm/lib/elf_aarch64_efi.lds +++ b/arch/arm/lib/elf_aarch64_efi.lds @@ -8,70 +8,4 @@ OUTPUT_FORMAT("elf64-littleaarch64", "elf64-littleaarch64", "elf64-littleaarch64") OUTPUT_ARCH(aarch64) -PHDRS -{ - data PT_LOAD FLAGS(3); /* SHF_WRITE | SHF_ALLOC */ -} - -ENTRY(_start) -SECTIONS -{ - .text 0x0 : { - _text = .; - *(.text.head) - *(.text) - *(.text.*) - *(.gnu.linkonce.t.*) - *(.srodata) - *(.rodata*) - . = ALIGN(16); - *(.dynamic); - . = ALIGN(512); - } - .rela.dyn : { *(.rela.dyn) } - .rela.plt : { *(.rela.plt) } - .rela.got : { *(.rela.got) } - .rela.data : { *(.rela.data) *(.rela.data*) } - _etext = .; - _text_size = . - _text; - . = ALIGN(4096); - .data : { - _data = .; - *(.sdata) - *(.data) - *(.data1) - *(.data.*) - *(.got.plt) - *(.got) - - /* - * The EFI loader doesn't seem to like a .bss section, so we - * stick it all into .data: - */ - . = ALIGN(16); - _bss = .; - *(.sbss) - *(.scommon) - *(.dynbss) - *(.bss) - *(.bss.*) - *(COMMON) - . = ALIGN(512); - _bss_end = .; - _edata = .; - } :data - _data_size = _edata - _data; - - . = ALIGN(4096); - .dynsym : { *(.dynsym) } - . = ALIGN(4096); - .dynstr : { *(.dynstr) } - . = ALIGN(4096); - .note.gnu.build-id : { *(.note.gnu.build-id) } - /DISCARD/ : { - *(.rel.reloc) - *(.eh_frame) - *(.note.GNU-stack) - } - .comment 0 : { *(.comment) } -} +INCLUDE lib/efi_loader/elf_efi.ldsi diff --git a/arch/arm/lib/elf_arm_efi.lds b/arch/arm/lib/elf_arm_efi.lds index 41440594aa6..eb16fae74cf 100644 --- a/arch/arm/lib/elf_arm_efi.lds +++ b/arch/arm/lib/elf_arm_efi.lds @@ -8,73 +8,4 @@ OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") OUTPUT_ARCH(arm) -PHDRS -{ - data PT_LOAD FLAGS(3); /* PF_W | PF_X */ -} - -ENTRY(_start) -SECTIONS -{ - .text 0x0 : { - _text = .; - *(.text.head) - *(.text) - *(.text.*) - *(.gnu.linkonce.t.*) - *(.srodata) - *(.rodata*) - . = ALIGN(16); - *(.dynamic); - . = ALIGN(512); - } - _etext = .; - _text_size = . - _text; - . = ALIGN(4096); - .data : { - _data = .; - *(.sdata) - *(.data) - *(.data1) - *(.data.*) - *(.got.plt) - *(.got) - - /* - * The EFI loader doesn't seem to like a .bss section, so we - * stick it all into .data: - */ - . = ALIGN(16); - _bss = .; - *(.sbss) - *(.scommon) - *(.dynbss) - *(.bss) - *(.bss.*) - *(COMMON) - . = ALIGN(512); - _bss_end = .; - _edata = .; - } :data - _data_size = . - _data; - - /DISCARD/ : { - /* - * We don't support relocations. These would have to be - * translated from ELF to PE format and added to the .reloc - * section. - */ - *(.rel.dyn) - *(.rel.plt) - *(.rel.got) - *(.rel.data) - *(.rel.data*) - *(.rel.reloc) - *(.eh_frame) - *(.note.GNU-stack) - *(.dynsym) - *(.dynstr) - *(.note.gnu.build-id) - *(.comment) - } -} +INCLUDE lib/efi_loader/elf_efi.ldsi diff --git a/arch/arm/mach-bcmbca/bcm4908/Kconfig b/arch/arm/mach-bcmbca/bcm4908/Kconfig index 564bc8d2d66..9131505fa7c 100644 --- a/arch/arm/mach-bcmbca/bcm4908/Kconfig +++ b/arch/arm/mach-bcmbca/bcm4908/Kconfig @@ -8,6 +8,7 @@ if BCM4908 config TARGET_BCM94908 bool "Broadcom 4908 Reference Board" depends on ARCH_BCMBCA + imply OF_UPSTREAM config SYS_SOC default "bcm4908" diff --git a/arch/arm/mach-bcmbca/bcm63138/Kconfig b/arch/arm/mach-bcmbca/bcm63138/Kconfig index a34888d231d..9b7db352f84 100644 --- a/arch/arm/mach-bcmbca/bcm63138/Kconfig +++ b/arch/arm/mach-bcmbca/bcm63138/Kconfig @@ -8,6 +8,7 @@ if BCM63138 config TARGET_BCM963138 bool "Broadcom 63138 Reference Board" depends on ARCH_BCMBCA + imply OF_UPSTREAM config SYS_SOC default "bcm63138" diff --git a/arch/arm/mach-bcmbca/bcm63148/Kconfig b/arch/arm/mach-bcmbca/bcm63148/Kconfig index f81504c25cb..a3c7b5bf8e4 100644 --- a/arch/arm/mach-bcmbca/bcm63148/Kconfig +++ b/arch/arm/mach-bcmbca/bcm63148/Kconfig @@ -8,6 +8,7 @@ if BCM63148 config TARGET_BCM963148 bool "Broadcom 63148 Reference Board" depends on ARCH_BCMBCA + imply OF_UPSTREAM config SYS_SOC default "bcm63148" diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 3fee5a4299b..28193039cb8 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -18,8 +18,7 @@ config ARCH_EXYNOS4 bool "Exynos4 SoC family" select BOARD_EARLY_INIT_F select CPU_V7A - select BLK - select DM_MMC + select MMC help Samsung Exynos4 SoC family are based on ARM Cortex-A9 CPU. There are multiple SoCs in this family including Exynos4210, Exynos4412, @@ -39,8 +38,7 @@ config ARCH_EXYNOS5 imply USB_ETHER_ASIX imply USB_ETHER_RTL8152 imply USB_ETHER_SMSC95XX - select BLK - select DM_MMC + select MMC help Samsung Exynos5 SoC family are based on ARM Cortex-A15 CPU (and @@ -51,8 +49,7 @@ config ARCH_EXYNOS7 bool "Exynos7 SoC family" select ARM64 select BOARD_EARLY_INIT_F - select BLK - select DM_MMC + select MMC help Samsung Exynos7 SoC family are based on ARM Cortex-A57 CPU or Cortex-A53 CPU (and some in a big.LITTLE configuration). There are @@ -61,8 +58,7 @@ config ARCH_EXYNOS7 config ARCH_EXYNOS9 bool "Exynos9 SoC family" select ARM64 - select BLK - select DM_MMC + select MMC help Samsung Exynos9 SoC family are based on ARMv8 Cortex CPU. There are multiple SoCs in this family including Exynos850. diff --git a/arch/arm/mach-imx/fdt.c b/arch/arm/mach-imx/fdt.c index 103c1fc5968..f19ab9edce4 100644 --- a/arch/arm/mach-imx/fdt.c +++ b/arch/arm/mach-imx/fdt.c @@ -39,7 +39,7 @@ static void disable_thermal_cpu_nodes(void *blob, u32 num_disabled_cores, u32 ma for (j = 0; j < cnt; j++) cooling_dev[j] = cpu_to_fdt32(cooling_dev[j]); - ret = fdt_setprop(blob, nodeoff, "cooling-device", &cooling_dev, + ret = fdt_setprop(blob, nodeoff, "cooling-device", cooling_dev, sizeof(__le32) * (num_le32 - num_disabled_cores * 3)); if (ret < 0) { printf("Warning: %s, cooling-device setprop failed %d\n", diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig index b254a50b091..0fe9c46e499 100644 --- a/arch/arm/mach-imx/imx8m/Kconfig +++ b/arch/arm/mach-imx/imx8m/Kconfig @@ -37,6 +37,17 @@ config SYS_HAS_ARMV8_SECURE_BASE If enabled, please also define the value for ARMV8_SECURE_BASE, for i.MX8M, it could be some address in OCRAM. +config IMX8M_OPTEE_LOAD_ADDR + hex "Load address of OPTEE image" + default 0xbe000000 if IMX8MM + default 0xbe000000 if IMX8MN + default 0x56000000 if IMX8MP + default 0xfe000000 if IMX8MQ + help + The load and entry address for the OPTEE image. This value defaults to + the one defined in tf-a if not provided in the board defconfig file. + + choice prompt "NXP i.MX8M board select" optional @@ -54,6 +65,8 @@ config TARGET_IMX8MQ_EVK select ARCH_MISC_INIT select SPL_CRYPTO if SPL imply OF_UPSTREAM + imply BOOTSTD_FULL + imply BOOTSTD_BOOTCOMMAND config TARGET_IMX8MQ_PHANBELL bool "imx8mq_phanbell" @@ -154,6 +167,8 @@ config TARGET_IMX8MN_EVK select FSL_CAAM select SPL_CRYPTO if SPL imply OF_UPSTREAM + imply BOOTSTD_FULL + imply BOOTSTD_BOOTCOMMAND config TARGET_IMX8MN_DDR4_EVK bool "imx8mn DDR4 EVK board" @@ -163,6 +178,8 @@ config TARGET_IMX8MN_DDR4_EVK select FSL_CAAM select SPL_CRYPTO if SPL imply OF_UPSTREAM + imply BOOTSTD_FULL + imply BOOTSTD_BOOTCOMMAND config TARGET_IMX8MN_VENICE bool "Support Gateworks Venice iMX8M Nano module" @@ -227,6 +244,8 @@ config TARGET_IMX8MP_EVK select ARCH_MISC_INIT select SPL_CRYPTO if SPL imply OF_UPSTREAM + imply BOOTSTD_FULL + imply BOOTSTD_BOOTCOMMAND config TARGET_IMX8MP_NAVQP bool "Emcraft Systems i.MX8M Plus NavQ+ board" diff --git a/arch/arm/mach-imx/imx9/Kconfig b/arch/arm/mach-imx/imx9/Kconfig index 54c6b117fcf..49220c0955e 100644 --- a/arch/arm/mach-imx/imx9/Kconfig +++ b/arch/arm/mach-imx/imx9/Kconfig @@ -34,6 +34,8 @@ config TARGET_IMX91_11X11_EVK select OF_BOARD_FIXUP select IMX91 imply OF_UPSTREAM + imply BOOTSTD_FULL + imply BOOTSTD_BOOTCOMMAND config TARGET_IMX93_9X9_QSB bool "imx93_qsb" @@ -41,12 +43,16 @@ config TARGET_IMX93_9X9_QSB select IMX93 select IMX9_LPDDR4X imply OF_UPSTREAM + imply BOOTSTD_FULL + imply BOOTSTD_BOOTCOMMAND config TARGET_IMX93_11X11_EVK bool "imx93_11x11_evk" select OF_BOARD_FIXUP select IMX93 imply OF_UPSTREAM + imply BOOTSTD_FULL + imply BOOTSTD_BOOTCOMMAND config TARGET_IMX93_VAR_SOM bool "imx93_var_som" diff --git a/arch/arm/mach-imx/mx5/Kconfig b/arch/arm/mach-imx/mx5/Kconfig index d282663dcf1..0dfd6849687 100644 --- a/arch/arm/mach-imx/mx5/Kconfig +++ b/arch/arm/mach-imx/mx5/Kconfig @@ -27,8 +27,8 @@ config TARGET_KP_IMX53 select DM_PMIC select DM_SERIAL select DM_MMC - select BLK select DM_REGULATOR + select MMC select MX53 imply CMD_DM diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index 1f8022ee685..4020e16d92d 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -81,8 +81,8 @@ config MX6UL_OPOS6UL select BOARD_LATE_INIT select DM select DM_GPIO - select DM_MMC select DM_THERMAL + select MMC select SPL_DM if SPL select SPL_OF_CONTROL if SPL select SPL_PINCTRL if SPL @@ -176,9 +176,9 @@ config TARGET_DART_6UL select DM select DM_GPIO select DM_I2C - select DM_MMC select DM_SERIAL select DM_THERMAL + select MMC select SUPPORT_SPL config TARGET_DHCOMIMX6 @@ -197,10 +197,10 @@ config TARGET_DISPLAY5 depends on MX6Q select DM select DM_I2C - select DM_MMC select DM_SPI select DM_GPIO select DM_SERIAL + select MMC select MTD select SUPPORT_SPL imply CMD_DM @@ -245,7 +245,7 @@ config TARGET_KOSAGI_NOVENA bool "Kosagi Novena" select BOARD_LATE_INIT select DM_GPIO - select DM_MMC + select MMC select PCI select SCSI select VIDEO @@ -280,8 +280,8 @@ config TARGET_MX6LOGICPD select DM select DM_GPIO select DM_I2C - select DM_MMC select DM_PMIC + select MMC select OF_CONTROL imply CMD_DM @@ -300,10 +300,10 @@ config TARGET_MX6DL_MAMOJ select DM select DM_GPIO select DM_I2C - select DM_MMC select DM_PMIC select DM_PMIC_PFUZE100 select DM_THERMAL + select MMC select OF_CONTROL select PINCTRL select SPL @@ -332,8 +332,8 @@ config TARGET_MX6Q_ENGICAM select DM select DM_GPIO select DM_I2C - select DM_MMC select DM_THERMAL + select MMC select OF_CONTROL select SPL_DM if SPL select SPL_OF_CONTROL if SPL @@ -352,8 +352,8 @@ config TARGET_MX6Q_ACC select DM select DM_GPIO select DM_I2C - select DM_MMC select DM_THERMAL + select MMC select SUPPORT_SPL config TARGET_MX6S_SIELAFF @@ -453,8 +453,8 @@ config TARGET_MX6UL_ENGICAM select DM select DM_GPIO select DM_I2C - select DM_MMC select DM_THERMAL + select MMC select OF_CONTROL select SPL_DM if SPL select SPL_OF_CONTROL if SPL @@ -490,9 +490,9 @@ config TARGET_MYS_6ULX select DM select DM_GPIO select DM_I2C - select DM_MMC select DM_SERIAL select DM_THERMAL + select MMC select SUPPORT_SPL config TARGET_NITROGEN6X @@ -507,10 +507,10 @@ config TARGET_NPI_IMX6ULL bool "Seeed NPI-IMX6ULL" depends on MX6ULL select DM - select DM_MMC select DM_GPIO select DM_SERIAL select DM_THERMAL + select MMC select SUPPORT_SPL config TARGET_OPOS6ULDEV @@ -566,9 +566,9 @@ config TARGET_PCL063 select DM select DM_GPIO select DM_I2C - select DM_MMC select DM_SERIAL select DM_THERMAL + select MMC select SUPPORT_SPL config TARGET_PCL063_ULL @@ -577,9 +577,9 @@ config TARGET_PCL063_ULL select DM select DM_GPIO select DM_I2C - select DM_MMC select DM_SERIAL select DM_THERMAL + select MMC select SUPPORT_SPL config TARGET_SOMLABS_VISIONSOM_6ULL @@ -588,9 +588,9 @@ config TARGET_SOMLABS_VISIONSOM_6ULL select BOARD_LATE_INIT select DM select DM_GPIO - select DM_MMC select DM_SERIAL select DM_THERMAL + select MMC imply CMD_DM config TARGET_TBS2910 @@ -605,7 +605,7 @@ config TARGET_KP_IMX6Q_TPC select DM select SPL_DM if SPL select DM_THERMAL - select DM_MMC + select MMC select DM_REGULATOR select SPL_DM_REGULATOR if SPL select DM_SERIAL @@ -673,7 +673,7 @@ config TARGET_BRPPT2 select DM select DM_GPIO select DM_I2C - select DM_MMC + select MMC select SUPPORT_SPL select SPL_DM if SPL select SPL_OF_CONTROL if SPL diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig index f3f42b39213..a3ac490f677 100644 --- a/arch/arm/mach-k3/Kconfig +++ b/arch/arm/mach-k3/Kconfig @@ -156,6 +156,9 @@ config K3_X509_SWRV help SWRV for X509 certificate used for boot images +config NR_DRAM_BANKS + default 2 + if CPU_V7R source "arch/arm/mach-k3/r5/Kconfig" endif diff --git a/arch/arm/mach-k3/Makefile b/arch/arm/mach-k3/Makefile index 8c4f6786a5b..5ce7fc62d80 100644 --- a/arch/arm/mach-k3/Makefile +++ b/arch/arm/mach-k3/Makefile @@ -6,7 +6,7 @@ obj-$(CONFIG_ARM64) += arm64/ obj-$(CONFIG_CPU_V7R) += r5/ obj-$(CONFIG_OF_LIBFDT) += common_fdt.o -obj-y += common.o security.o +obj-y += common.o security.o k3-ddr.o obj-$(CONFIG_SOC_K3_AM62A7) += am62ax/ obj-$(CONFIG_SOC_K3_AM62P5) += am62px/ obj-$(CONFIG_SOC_K3_AM625) += am62x/ diff --git a/arch/arm/mach-k3/am62ax/am62a7_init.c b/arch/arm/mach-k3/am62ax/am62a7_init.c index 5c0d3ee6869..78153c97a58 100644 --- a/arch/arm/mach-k3/am62ax/am62a7_init.c +++ b/arch/arm/mach-k3/am62ax/am62a7_init.c @@ -171,6 +171,25 @@ void board_init_f(ulong dummy) debug("am62a_init: %s done\n", __func__); } +u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device) +{ + u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT); + u32 bootmode = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK) >> + MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT; + u32 bootmode_cfg = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_MASK) >> + MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_SHIFT; + + switch (bootmode) { + case BOOT_DEVICE_EMMC: + return MMCSD_MODE_EMMCBOOT; + case BOOT_DEVICE_MMC: + if (bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_FS_RAW_MASK) + return MMCSD_MODE_RAW; + default: + return MMCSD_MODE_FS; + } +} + u32 spl_boot_device(void) { return get_boot_device(); diff --git a/arch/arm/mach-k3/am62px/am62p5_fdt.c b/arch/arm/mach-k3/am62px/am62p5_fdt.c index 29c832d28ac..2c40fa5a594 100644 --- a/arch/arm/mach-k3/am62px/am62p5_fdt.c +++ b/arch/arm/mach-k3/am62px/am62p5_fdt.c @@ -7,8 +7,91 @@ #include "../common_fdt.h" #include <fdt_support.h> +static void fdt_fixup_cores_wdt_nodes_am62p(void *blob, int core_nr) +{ + char node_path[32]; + + if (core_nr < 1) + return; + + for (; core_nr < 4; core_nr++) { + snprintf(node_path, sizeof(node_path), "/cpus/cpu@%d", core_nr); + fdt_del_node_path(blob, node_path); + snprintf(node_path, sizeof(node_path), "/cpus/cpu-map/cluster0/core%d", core_nr); + fdt_del_node_path(blob, node_path); + snprintf(node_path, sizeof(node_path), "/bus@f0000/watchdog@e0%d0000", core_nr); + fdt_del_node_path(blob, node_path); + } +} + +static void fdt_fixup_video_codec_nodes_am62p(void *blob, bool has_video_codec) +{ + if (!has_video_codec) + fdt_del_node_path(blob, "/bus@f0000/video-codec@30210000"); +} + +static void fdt_fixup_canfd_nodes_am62p(void *blob, bool has_canfd) +{ + if (!has_canfd) { + fdt_del_node_path(blob, "/bus@f0000/can@20701000"); + fdt_del_node_path(blob, "/bus@f0000/can@20711000"); + } +} + +static int fdt_fixup_trips_node(void *blob, int zoneoffset, int maxc) +{ + int node, trip; + + node = fdt_subnode_offset(blob, zoneoffset, "trips"); + if (node < 0) + return -1; + + fdt_for_each_subnode(trip, blob, node) { + const char *type = fdt_getprop(blob, trip, "type", NULL); + + if (!type || (strncmp(type, "critical", 8) != 0)) + continue; + + if (fdt_setprop_u32(blob, trip, "temperature", 1000 * maxc) < 0) + return -1; + } + + return 0; +} + +static void fdt_fixup_thermal_zone_nodes_am62p(void *blob, int maxc) +{ + int node, zone; + + node = fdt_path_offset(blob, "/thermal-zones"); + if (node < 0) + return; + + fdt_for_each_subnode(zone, blob, node) { + if (fdt_fixup_trips_node(blob, zone, maxc) < 0) + printf("Failed to set temperature in %s critical trips\n", + fdt_get_name(blob, zone, NULL)); + } +} + +static void fdt_fixup_cpu_freq_nodes_am62p(void *blob, int max_freq) +{ + if (max_freq >= 1250000000) + return; + + if (max_freq <= 1000000000) { + fdt_del_node_path(blob, "/opp-table/opp-1250000000"); + fdt_del_node_path(blob, "/opp-table/opp-1400000000"); + } +} + int ft_system_setup(void *blob, struct bd_info *bd) { + fdt_fixup_cores_wdt_nodes_am62p(blob, k3_get_core_nr()); + fdt_fixup_video_codec_nodes_am62p(blob, k3_has_video_codec()); + fdt_fixup_canfd_nodes_am62p(blob, k3_has_canfd()); + fdt_fixup_thermal_zone_nodes_am62p(blob, k3_get_max_temp()); + fdt_fixup_cpu_freq_nodes_am62p(blob, k3_get_a53_max_frequency()); fdt_fixup_reserved(blob, "tfa", CONFIG_K3_ATF_LOAD_ADDR, 0x80000); fdt_fixup_reserved(blob, "optee", CONFIG_K3_OPTEE_LOAD_ADDR, 0x1800000); diff --git a/arch/arm/mach-k3/am62px/am62p5_init.c b/arch/arm/mach-k3/am62px/am62p5_init.c index 2d35a7ce77e..7a24cf39c7b 100644 --- a/arch/arm/mach-k3/am62px/am62p5_init.c +++ b/arch/arm/mach-k3/am62px/am62p5_init.c @@ -11,10 +11,14 @@ #include <dm.h> #include <dm/uclass-internal.h> #include <dm/pinctrl.h> +#include <dm/ofnode.h> #include "../sysfw-loader.h" #include "../common.h" +/* TISCI DEV ID for A53 Clock */ +#define AM62PX_DEV_A53SS0_CORE_0_DEV_ID 135 + struct fwl_data cbass_main_fwls[] = { { "FSS_DAT_REG3", 7, 8 }, }; @@ -67,6 +71,62 @@ static void ctrl_mmr_unlock(void) mmr_unlock(PADCFG_MMR1_BASE, 1); } +#if CONFIG_IS_ENABLED(OF_CONTROL) +static int get_a53_cpu_clock_index(ofnode node) +{ + int count, i; + struct ofnode_phandle_args *args; + ofnode clknode; + + clknode = ofnode_path("/bus@f0000/system-controller@44043000/clock-controller"); + if (!ofnode_valid(clknode)) + return -1; + + count = ofnode_count_phandle_with_args(node, "assigned-clocks", "#clock-cells", 0); + + for (i = 0; i < count; i++) { + if (!ofnode_parse_phandle_with_args(node, "assigned-clocks", + "#clock-cells", 0, i, args)) { + if (ofnode_equal(clknode, args->node) && + args->args[0] == AM62PX_DEV_A53SS0_CORE_0_DEV_ID) + return i; + } + } + + return -1; +} + +static void fixup_a53_cpu_freq_by_speed_grade(void) +{ + int index, size; + u32 *rates; + ofnode node; + + node = ofnode_path("/a53@0"); + if (!ofnode_valid(node)) + return; + + rates = fdt_getprop_w(ofnode_to_fdt(node), ofnode_to_offset(node), + "assigned-clock-rates", &size); + + index = get_a53_cpu_clock_index(node); + + if (!rates || index < 0 || index >= (size / sizeof(u32))) { + printf("Wrong A53 assigned-clocks configuration\n"); + return; + } + + rates[index] = cpu_to_fdt32(k3_get_a53_max_frequency()); + + printf("Changed A53 CPU frequency to %dHz (%c grade) in DT\n", + k3_get_a53_max_frequency(), k3_get_speed_grade()); +} +#else +static void fixup_a53_cpu_freq_by_speed_grade(void) +{ +} +#endif + void board_init_f(ulong dummy) { struct udevice *dev; @@ -162,6 +222,8 @@ void board_init_f(ulong dummy) setup_qos(); debug("am62px_init: %s done\n", __func__); + + fixup_a53_cpu_freq_by_speed_grade(); } u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device) diff --git a/arch/arm/mach-k3/common_fdt.c b/arch/arm/mach-k3/common_fdt.c index 3bdedd7b509..4a016711566 100644 --- a/arch/arm/mach-k3/common_fdt.c +++ b/arch/arm/mach-k3/common_fdt.c @@ -65,6 +65,7 @@ static int fdt_fixup_msmc_ram(void *blob, char *parent_path, char *node_name) subnode, addr, size); if (addr + size > msmc_size || !strncmp(fdt_get_name(blob, subnode, &len), "sysfw", 5) || + !strncmp(fdt_get_name(blob, subnode, &len), "tifs", 4) || !strncmp(fdt_get_name(blob, subnode, &len), "l3cache", 7)) { fdt_del_node(blob, subnode); debug("%s: deleting subnode %d\n", __func__, subnode); diff --git a/arch/arm/mach-k3/include/mach/am62p_hardware.h b/arch/arm/mach-k3/include/mach/am62p_hardware.h index 923466c41f4..95af5c5c547 100644 --- a/arch/arm/mach-k3/include/mach/am62p_hardware.h +++ b/arch/arm/mach-k3/include/mach/am62p_hardware.h @@ -19,6 +19,22 @@ #define MCU_CTRL_MMR0_BASE 0x04500000 #define WKUP_CTRL_MMR0_BASE 0x43000000 +#define CTRLMMR_WKUP_JTAG_DEVICE_ID (WKUP_CTRL_MMR0_BASE + 0x18) +#define JTAG_DEV_CORE_NR_MASK GENMASK(19, 18) +#define JTAG_DEV_CORE_NR_SHIFT 18 +#define JTAG_DEV_CANFD_MASK BIT(15) +#define JTAG_DEV_CANFD_SHIFT 15 +#define JTAG_DEV_VIDEO_CODEC_MASK BIT(14) +#define JTAG_DEV_VIDEO_CODEC_SHIFT 14 +#define JTAG_DEV_SPEED_MASK GENMASK(10, 6) +#define JTAG_DEV_SPEED_SHIFT 6 +#define JTAG_DEV_TEMP_MASK GENMASK(5, 3) +#define JTAG_DEV_TEMP_SHIFT 3 + +#define JTAG_DEV_TEMP_AUTOMOTIVE 0x5 +#define JTAG_DEV_TEMP_EXTENDED_VALUE 105 +#define JTAG_DEV_TEMP_AUTOMOTIVE_VALUE 125 + #define CTRLMMR_MAIN_DEVSTAT (WKUP_CTRL_MMR0_BASE + 0x30) #define MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK GENMASK(6, 3) #define MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT 3 @@ -72,6 +88,55 @@ #define TI_SRAM_SCRATCH_BOARD_EEPROM_START 0x43c30000 +static inline int k3_get_core_nr(void) +{ + u32 dev_id = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID); + + return ((dev_id & JTAG_DEV_CORE_NR_MASK) >> JTAG_DEV_CORE_NR_SHIFT) + 1; +} + +static inline int k3_has_video_codec(void) +{ + u32 dev_id = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID); + + return !((dev_id & JTAG_DEV_VIDEO_CODEC_MASK) >> JTAG_DEV_VIDEO_CODEC_SHIFT); +} + +static inline int k3_has_canfd(void) +{ + u32 dev_id = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID); + + return (dev_id & JTAG_DEV_CANFD_MASK) >> JTAG_DEV_CANFD_SHIFT; +} + +static inline int k3_get_max_temp(void) +{ + u32 dev_id = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID); + u32 dev_temp = (dev_id & JTAG_DEV_TEMP_MASK) >> JTAG_DEV_TEMP_SHIFT; + + if (dev_temp == JTAG_DEV_TEMP_AUTOMOTIVE) + return JTAG_DEV_TEMP_AUTOMOTIVE_VALUE; + else + return JTAG_DEV_TEMP_EXTENDED_VALUE; +} + +static inline char k3_get_speed_grade(void) +{ + u32 dev_id = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID); + u32 speed_grade = (dev_id & JTAG_DEV_SPEED_MASK) >> + JTAG_DEV_SPEED_SHIFT; + + return 'A' - 1 + speed_grade; +} + +static inline int k3_get_a53_max_frequency(void) +{ + if (k3_get_speed_grade() == 'O') + return 1000000000; + else + return 1250000000; +} + #if defined(CONFIG_SYS_K3_SPL_ATF) && !defined(__ASSEMBLY__) static const u32 put_device_ids[] = {}; diff --git a/arch/arm/mach-k3/include/mach/k3-ddr.h b/arch/arm/mach-k3/include/mach/k3-ddr.h new file mode 100644 index 00000000000..95496e1c59d --- /dev/null +++ b/arch/arm/mach-k3/include/mach/k3-ddr.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2024, Texas Instruments Incorporated - https://www.ti.com/ + */ + +#ifndef _K3_DDR_H_ +#define _K3_DDR_H_ + +int dram_init(void); +int dram_init_banksize(void); + +void fixup_ddr_driver_for_ecc(struct spl_image_info *spl_image); +void fixup_memory_node(struct spl_image_info *spl_image); + +#endif /* _K3_DDR_H_ */ diff --git a/arch/arm/mach-k3/j784s4/j784s4_init.c b/arch/arm/mach-k3/j784s4/j784s4_init.c index 8a41cd3bb50..787cf6261e4 100644 --- a/arch/arm/mach-k3/j784s4/j784s4_init.c +++ b/arch/arm/mach-k3/j784s4/j784s4_init.c @@ -23,6 +23,9 @@ #define J784S4_MAX_DDR_CONTROLLERS 4 +#define CTRL_MMR_CFG0_AUDIO_REFCLK1_CTRL 0x001082e4 +#define AUDIO_REFCLK1_DEFAULT 0x1c + /* NAVSS North Bridge (NB) */ #define NAVSS0_NBSS_NB0_CFG_MMRS 0x03702000 #define NAVSS0_NBSS_NB1_CFG_MMRS 0x03703000 @@ -201,6 +204,8 @@ void k3_spl_init(void) remove_fwl_configs(navss_cbass0_fwls, ARRAY_SIZE(navss_cbass0_fwls)); } + writel(AUDIO_REFCLK1_DEFAULT, (uintptr_t)CTRL_MMR_CFG0_AUDIO_REFCLK1_CTRL); + /* Output System Firmware version info */ k3_sysfw_print_ver(); } diff --git a/arch/arm/mach-k3/k3-ddr.c b/arch/arm/mach-k3/k3-ddr.c new file mode 100644 index 00000000000..6e3e60cdc86 --- /dev/null +++ b/arch/arm/mach-k3/k3-ddr.c @@ -0,0 +1,72 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2024, Texas Instruments Incorporated - https://www.ti.com/ + */ + +#include <fdt_support.h> +#include <dm/uclass.h> +#include <k3-ddrss.h> +#include <spl.h> + +#include <asm/arch/k3-ddr.h> + +__weak int dram_init(void) +{ + return 0; +} + +__weak int dram_init_banksize(void) +{ + return 0; +} + +#if defined(CONFIG_SPL_BUILD) +void fixup_ddr_driver_for_ecc(struct spl_image_info *spl_image) +{ + struct udevice *dev; + int ret, ctr = 1; + + dram_init_banksize(); + + ret = uclass_get_device(UCLASS_RAM, 0, &dev); + if (ret) + panic("Cannnot get RAM device for ddr size fixup: %d\n", ret); + + ret = k3_ddrss_ddr_fdt_fixup(dev, spl_image->fdt_addr, gd->bd); + if (ret) + printf("Error fixing up ddr node for ECC use! %d\n", ret); + + ret = uclass_next_device_err(&dev); + + while (ret && ret != -ENODEV) { + ret = k3_ddrss_ddr_fdt_fixup(dev, spl_image->fdt_addr, gd->bd); + if (ret) + printf("Error fixing up ddr node %d for ECC use! %d\n", ctr, ret); + + ret = uclass_next_device_err(&dev); + ctr++; + } +} + +void fixup_memory_node(struct spl_image_info *spl_image) +{ + u64 start[CONFIG_NR_DRAM_BANKS]; + u64 size[CONFIG_NR_DRAM_BANKS]; + int bank; + int ret; + + dram_init(); + dram_init_banksize(); + + for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { + start[bank] = gd->bd->bi_dram[bank].start; + size[bank] = gd->bd->bi_dram[bank].size; + } + + ret = fdt_fixup_memory_banks(spl_image->fdt_addr, start, size, + CONFIG_NR_DRAM_BANKS); + + if (ret) + printf("Error fixing up memory node! %d\n", ret); +} +#endif diff --git a/arch/arm/mach-omap2/omap3/Kconfig b/arch/arm/mach-omap2/omap3/Kconfig index f15f44fe7d4..a175e5ce6ed 100644 --- a/arch/arm/mach-omap2/omap3/Kconfig +++ b/arch/arm/mach-omap2/omap3/Kconfig @@ -30,8 +30,8 @@ config TARGET_AM3517_EVM select DM select DM_GPIO select DM_I2C - select DM_MMC select DM_SERIAL + select MMC imply CMD_DM config TARGET_CM_T35 diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 269c219a6f8..4d3157b2edd 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -48,6 +48,7 @@ config ROCKCHIP_RK3066 select TPL select TPL_ROCKCHIP_BACK_TO_BROM select TPL_ROCKCHIP_EARLYRETURN_TO_BROM + imply OF_UPSTREAM imply ROCKCHIP_COMMON_BOARD imply SPL_ROCKCHIP_COMMON_BOARD imply SPL_SERIAL @@ -84,6 +85,7 @@ config ROCKCHIP_RK3188 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM select SPL_ROCKCHIP_BACK_TO_BROM select BOARD_LATE_INIT + imply OF_UPSTREAM imply ROCKCHIP_COMMON_BOARD imply SPL_ROCKCHIP_COMMON_BOARD help diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig index 69a5614b449..e563bf455e6 100644 --- a/arch/arm/mach-rockchip/rk3288/Kconfig +++ b/arch/arm/mach-rockchip/rk3288/Kconfig @@ -75,7 +75,7 @@ config TARGET_FENNEC_RK3288 config TARGET_FIREFLY_RK3288 bool "Firefly-RK3288" select BOARD_LATE_INIT - select SPL_BOARD_INIT if SPL + select ROCKCHIP_COMMON_STACK_ADDR select TPL help Firefly is a RK3288-based development board with 2 USB ports, @@ -86,6 +86,8 @@ config TARGET_FIREFLY_RK3288 config TARGET_MIQI_RK3288 bool "MiQi-RK3288" select BOARD_LATE_INIT + select ROCKCHIP_COMMON_STACK_ADDR + select TPL help MiQi-RK3288 is a RK3288-based development board with 4 USB 2.0 ports, HDMI, micro-SD card, 16 GB eMMC and Gigabit Ethernet. It @@ -132,6 +134,7 @@ config TARGET_ROCK2 config TARGET_TINKER_RK3288 bool "Tinker-RK3288" select BOARD_LATE_INIT + select ROCKCHIP_COMMON_STACK_ADDR select TPL help Tinker is a RK3288-based development board with 2 USB ports, HDMI, @@ -160,7 +163,7 @@ config SYS_SOC default "rk3288" config SYS_MALLOC_F_LEN - default 0x2000 + default 0x2000 if !SPL_SHARES_INIT_SP_ADDR config SPL_DRIVERS_MISC default y @@ -177,6 +180,9 @@ config SPL_SERIAL config TPL_STACK default 0xff718000 +config TPL_SYS_MALLOC_F_LEN + default 0x2000 + config TPL_TEXT_BASE default 0xff704000 diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c index c6b1a35f47e..03d97e1d746 100644 --- a/arch/arm/mach-rockchip/rk3308/rk3308.c +++ b/arch/arm/mach-rockchip/rk3308/rk3308.c @@ -216,3 +216,19 @@ int arch_cpu_init(void) return 0; } #endif + +#define RK3308_GRF_CHIP_ID 0xFF000800 + +int checkboard(void) +{ + u32 chip_id = readl(RK3308_GRF_CHIP_ID); + + if (chip_id == 0x3308) + printf("SoC: RK3308B\n"); + else if (chip_id == 0x3308c) + printf("SoC: RK3308B-S\n"); + else + printf("SoC: RK3308\n"); + + return 0; +} diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig index 04a84e2f6a0..500cfcd87af 100644 --- a/arch/arm/mach-rockchip/rk3399/Kconfig +++ b/arch/arm/mach-rockchip/rk3399/Kconfig @@ -146,15 +146,6 @@ config SYS_SOC config ROCKCHIP_COMMON_STACK_ADDR default y -config SYS_MALLOC_F_LEN - default 0x4000 if !SPL_SHARES_INIT_SP_ADDR - -config SPL_LIBCOMMON_SUPPORT - default y - -config SPL_LIBGENERIC_SUPPORT - default y - config TPL_LDSCRIPT default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds" @@ -164,9 +155,6 @@ config TPL_STACK config TPL_TEXT_BASE default 0xff8c2000 -config SPL_STACK_R_ADDR - default 0x04000000 if !SPL_SHARES_INIT_SP_ADDR - if BOOTCOUNT_LIMIT config BOOTCOUNT_BOOTLIMIT diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index 0c28241c603..1ce43c6f0d4 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -7,7 +7,6 @@ #include <init.h> #include <log.h> #include <spl.h> -#include <spl_gpio.h> #include <syscon.h> #include <asm/armv8/mmu.h> #include <asm/arch-rockchip/bootrom.h> @@ -16,6 +15,7 @@ #include <asm/arch-rockchip/gpio.h> #include <asm/arch-rockchip/grf_rk3399.h> #include <asm/arch-rockchip/hardware.h> +#include <asm/gpio.h> #include <linux/bitops.h> #include <linux/printk.h> #include <power/regulator.h> @@ -133,27 +133,6 @@ void board_debug_uart_init(void) GRF_GPIO3B7_SEL_MASK, GRF_UART3_SOUT << GRF_GPIO3B7_SEL_SHIFT); #else - struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE; - struct rockchip_gpio_regs * const gpio = (void *)GPIO0_BASE; - - if (IS_ENABLED(CONFIG_XPL_BUILD) && - (IS_ENABLED(CONFIG_TARGET_CHROMEBOOK_BOB) || - IS_ENABLED(CONFIG_TARGET_CHROMEBOOK_KEVIN))) { - rk_setreg(&grf->io_vsel, 1 << 0); - - /* - * Let's enable these power rails here, we are already running - * the SPI-Flash-based code. - */ - spl_gpio_output(gpio, GPIO(BANK_B, 2), 1); /* PP1500_EN */ - spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_B, 2), - GPIO_PULL_NORMAL); - - spl_gpio_output(gpio, GPIO(BANK_B, 4), 1); /* PP3000_EN */ - spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_B, 4), - GPIO_PULL_NORMAL); - } - /* Enable early UART2 channel C on the RK3399 */ rk_clrsetreg(&grf->gpio4c_iomux, GRF_GPIO4C3_SEL_MASK, diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c index c9a32287e92..c2b96902d2d 100644 --- a/arch/arm/mach-rockchip/rk3568/rk3568.c +++ b/arch/arm/mach-rockchip/rk3568/rk3568.c @@ -3,7 +3,10 @@ * (C) Copyright 2021 Rockchip Electronics Co., Ltd */ +#define LOG_CATEGORY LOGC_ARCH + #include <dm.h> +#include <misc.h> #include <asm/armv8/mmu.h> #include <asm/arch-rockchip/bootrom.h> #include <asm/arch-rockchip/grf_rk3568.h> @@ -139,3 +142,61 @@ int arch_cpu_init(void) #endif return 0; } + +#define RK3568_OTP_CPU_CODE_OFFSET 0x02 +#define RK3568_OTP_SPECIFICATION_OFFSET 0x07 +#define RK3568_OTP_PERFORMANCE_OFFSET 0x22 + +int checkboard(void) +{ + u8 cpu_code[2], specification, package, performance; + struct udevice *dev; + char suffix[3]; + int ret; + + if (!IS_ENABLED(CONFIG_ROCKCHIP_OTP) || !CONFIG_IS_ENABLED(MISC)) + return 0; + + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_DRIVER_GET(rockchip_otp), &dev); + if (ret) { + log_debug("Could not find otp device, ret=%d\n", ret); + return 0; + } + + /* cpu-code: SoC model, e.g. 0x35 0x66 or 0x35 0x68 */ + ret = misc_read(dev, RK3568_OTP_CPU_CODE_OFFSET, cpu_code, 2); + if (ret < 0) { + log_debug("Could not read cpu-code, ret=%d\n", ret); + return 0; + } + + /* specification: SoC variant, e.g. 0x2 for RK3568B2 and 0xA for RK3568J */ + ret = misc_read(dev, RK3568_OTP_SPECIFICATION_OFFSET, &specification, 1); + if (ret < 0) { + log_debug("Could not read specification, ret=%d\n", ret); + return 0; + } + /* package: likely SoC variant revision, 0x2 for RK3568B2 */ + package = specification >> 5; + specification &= 0x1f; + + /* performance: used to identify RK3566T SoC variant */ + ret = misc_read(dev, RK3568_OTP_PERFORMANCE_OFFSET, &performance, 1); + if (ret < 0) { + log_debug("Could not read performance, ret=%d\n", ret); + return 0; + } + if (performance & 0x0f) + specification = 0x14; /* T-variant */ + + /* for RK3568J i.e. '@' + 0xA = 'J' */ + suffix[0] = specification > 1 ? '@' + specification : '\0'; + /* for RK3568B2 i.e. '0' + 0x2 = '2' */ + suffix[1] = package > 1 ? '0' + package : '\0'; + suffix[2] = '\0'; + + printf("SoC: RK%02x%02x%s\n", cpu_code[0], cpu_code[1], suffix); + + return 0; +} diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig b/arch/arm/mach-rockchip/rk3588/Kconfig index b5a0e624a53..155b8f00ca2 100644 --- a/arch/arm/mach-rockchip/rk3588/Kconfig +++ b/arch/arm/mach-rockchip/rk3588/Kconfig @@ -74,6 +74,28 @@ config TARGET_JAGUAR_RK3588 - fan controller (AMC6821 emulation) * 80-pin Mezzanine connector +config TARGET_KHADAS_EDGE2_RK3588 + bool "Khadas Edge2 RK3588 board" + select BOARD_LATE_INIT + help + Khadas Edge2 is a Rockchip RK3588S based SBC (Single Board Computer) + by Khadas. + + There are tree variants depending on the DRAM size : 8G and 16G. + + Specification: + + Rockchip RK3588S SoC + 4x ARM Cortex-A76, 4x ARM Cortex-A55 + 8/16GB memory LPDDR4x + Mali G610MP4 GPU + 3x MIPI CSI 4x lanes + 2x MIPI-DSI DPHY 4x lanes + 32/64GB eMMC + 1x USB 2.0, 1x USB 3.0, 2x USB-Type-C + 1x HDMI 2.1 output, 1x DP 1.4 output + USB PD over USB Type-C + config TARGET_NANOPCT6_RK3588 bool "FriendlyElec NanoPC-T6 RK3588 board" select BOARD_LATE_INIT @@ -260,6 +282,26 @@ config TARGET_ROCK_5_ITX_RK3588 Front-panel connectors for audio and case-power, -leds Powered by either 12V, ATX power-supply or PoE +config TARGET_ROCK_5C_RK3588S + bool "Radxa ROCK 5C RK3588S2 board" + select BOARD_LATE_INIT + help + Radxa ROCK 5C is a Rockchip RK3588S2 based single board computer. + + Specification: + + Quad A76 and Quad A55 CPU + 6 TOPS NPU + up to 32GB LPDDR4x RAM + eMMC / SPI flash connector + Micro SD Card slot + Gigabit ethernet port (supports PoE with add-on PoE HAT) + WiFi6 / BT5.4 + 1x USB 3.0 Type-A HOST port + 1x USB 3.0 Type-A OTG port + 2x USB 2.0 Type-A HOST port + 1x USB Type-C 5V power port + config TARGET_SIGE7_RK3588 bool "ArmSoM Sige7 RK3588 board" select BOARD_LATE_INIT @@ -393,11 +435,13 @@ source "board/friendlyelec/nanopi-r6c-rk3588s/Kconfig" source "board/friendlyelec/nanopi-r6s-rk3588s/Kconfig" source "board/hardkernel/odroid_m2/Kconfig" source "board/indiedroid/nova/Kconfig" +source "board/khadas/khadas-edge2-rk3588s/Kconfig" source "board/pine64/quartzpro64-rk3588/Kconfig" source "board/turing/turing-rk1-rk3588/Kconfig" source "board/radxa/rock5a-rk3588s/Kconfig" source "board/radxa/rock5b-rk3588/Kconfig" source "board/radxa/rock-5-itx-rk3588/Kconfig" +source "board/radxa/rock-5c-rk3588s/Kconfig" source "board/rockchip/evb_rk3588/Kconfig" source "board/rockchip/toybrick_rk3588/Kconfig" source "board/theobroma-systems/jaguar_rk3588/Kconfig" diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c index e2dac2a5b80..c1dce3ee370 100644 --- a/arch/arm/mach-rockchip/rk3588/rk3588.c +++ b/arch/arm/mach-rockchip/rk3588/rk3588.c @@ -4,6 +4,10 @@ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd. */ +#define LOG_CATEGORY LOGC_ARCH + +#include <dm.h> +#include <misc.h> #include <spl.h> #include <asm/armv8/mmu.h> #include <asm/arch-rockchip/bootrom.h> @@ -178,3 +182,51 @@ int arch_cpu_init(void) return 0; } #endif + +#define RK3588_OTP_CPU_CODE_OFFSET 0x02 +#define RK3588_OTP_SPECIFICATION_OFFSET 0x06 + +int checkboard(void) +{ + u8 cpu_code[2], specification, package; + struct udevice *dev; + char suffix[3]; + int ret; + + if (!IS_ENABLED(CONFIG_ROCKCHIP_OTP) || !CONFIG_IS_ENABLED(MISC)) + return 0; + + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_DRIVER_GET(rockchip_otp), &dev); + if (ret) { + log_debug("Could not find otp device, ret=%d\n", ret); + return 0; + } + + /* cpu-code: SoC model, e.g. 0x35 0x82 or 0x35 0x88 */ + ret = misc_read(dev, RK3588_OTP_CPU_CODE_OFFSET, cpu_code, 2); + if (ret < 0) { + log_debug("Could not read cpu-code, ret=%d\n", ret); + return 0; + } + + /* specification: SoC variant, e.g. 0xA for RK3588J and 0x13 for RK3588S */ + ret = misc_read(dev, RK3588_OTP_SPECIFICATION_OFFSET, &specification, 1); + if (ret < 0) { + log_debug("Could not read specification, ret=%d\n", ret); + return 0; + } + /* package: likely SoC variant revision, 0x2 for RK3588S2 */ + package = specification >> 5; + specification &= 0x1f; + + /* for RK3588J i.e. '@' + 0xA = 'J' */ + suffix[0] = specification > 1 ? '@' + specification : '\0'; + /* for RK3588S2 i.e. '0' + 0x2 = '2' */ + suffix[1] = package > 1 ? '0' + package : '\0'; + suffix[2] = '\0'; + + printf("SoC: RK%02x%02x%s\n", cpu_code[0], cpu_code[1], suffix); + + return 0; +} diff --git a/arch/arm/mach-s5pc1xx/Kconfig b/arch/arm/mach-s5pc1xx/Kconfig index b6a4b0b653f..d8b85f80e63 100644 --- a/arch/arm/mach-s5pc1xx/Kconfig +++ b/arch/arm/mach-s5pc1xx/Kconfig @@ -7,9 +7,8 @@ choice config TARGET_S5P_GONI bool "S5P Goni board" select OF_CONTROL - select BLK - select DM_MMC select MISC_COMMON + select MMC config TARGET_SMDKC100 bool "Support smdkc100 board" diff --git a/arch/arm/mach-snapdragon/board.c b/arch/arm/mach-snapdragon/board.c index f1319df4314..2ef936aab75 100644 --- a/arch/arm/mach-snapdragon/board.c +++ b/arch/arm/mach-snapdragon/board.c @@ -88,20 +88,21 @@ int dram_init_banksize(void) return 0; } -static void qcom_parse_memory(void) +static void qcom_parse_memory(const void *fdt) { - ofnode node; + int offset; const fdt64_t *memory; int memsize; phys_addr_t ram_end = 0; int i, j, banks; - node = ofnode_path("/memory"); - if (!ofnode_valid(node)) { + offset = fdt_path_offset(fdt, "/memory"); + if (offset < 0) { log_err("No memory node found in device tree!\n"); return; } - memory = ofnode_read_prop(node, "reg", &memsize); + + memory = fdt_getprop(fdt, offset, "reg", &memsize); if (!memory) { log_err("No memory configuration was provided by the previous bootloader!\n"); return; @@ -158,7 +159,7 @@ int board_fdt_blob_setup(void **fdtp) fdt = (struct fdt_header *)get_prev_bl_fdt_addr(); external_valid = fdt && !fdt_check_header(fdt); - internal_valid = !fdt_check_header(gd->fdt_blob); + internal_valid = !fdt_check_header(*fdtp); /* * There is no point returning an error here, U-Boot can't do anything useful in this situation. @@ -181,7 +182,7 @@ int board_fdt_blob_setup(void **fdtp) * Parse the /memory node while we're here, * this makes it easy to do other things early. */ - qcom_parse_memory(); + qcom_parse_memory(*fdtp); return ret; } diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index 8065161e61e..ba1b1541437 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -52,78 +52,76 @@ config DRAM_SUN50I_H616 like H616. if DRAM_SUN50I_H616 -config DRAM_SUN50I_H616_DX_ODT - hex "H616 DRAM DX ODT parameter" +config DRAM_SUNXI_DX_ODT + hex "DRAM DX ODT parameter" help DX ODT value from vendor DRAM settings. -config DRAM_SUN50I_H616_DX_DRI - hex "H616 DRAM DX DRI parameter" +config DRAM_SUNXI_DX_DRI + hex "DRAM DX DRI parameter" help DX DRI value from vendor DRAM settings. -config DRAM_SUN50I_H616_CA_DRI - hex "H616 DRAM CA DRI parameter" +config DRAM_SUNXI_CA_DRI + hex "DRAM CA DRI parameter" help CA DRI value from vendor DRAM settings. -config DRAM_SUN50I_H616_ODT_EN - hex "H616 DRAM ODT EN parameter" +config DRAM_SUNXI_ODT_EN + hex "DRAM ODT EN parameter" default 0x1 help ODT EN value from vendor DRAM settings. -config DRAM_SUN50I_H616_TPR0 - hex "H616 DRAM TPR0 parameter" +config DRAM_SUNXI_TPR0 + hex "DRAM TPR0 parameter" default 0x0 help TPR0 value from vendor DRAM settings. -config DRAM_SUN50I_H616_TPR2 - hex "H616 DRAM TPR2 parameter" +config DRAM_SUNXI_TPR2 + hex "DRAM TPR2 parameter" default 0x0 help TPR2 value from vendor DRAM settings. -config DRAM_SUN50I_H616_TPR6 - hex "H616 DRAM TPR6 parameter" +config DRAM_SUNXI_TPR6 + hex "DRAM TPR6 parameter" default 0x3300c080 help TPR6 value from vendor DRAM settings. -config DRAM_SUN50I_H616_TPR10 - hex "H616 DRAM TPR10 parameter" +config DRAM_SUNXI_TPR10 + hex "DRAM TPR10 parameter" help TPR10 value from vendor DRAM settings. It tells which features should be configured, like write leveling, read calibration, etc. -config DRAM_SUN50I_H616_TPR11 - hex "H616 DRAM TPR11 parameter" +config DRAM_SUNXI_TPR11 + hex "DRAM TPR11 parameter" default 0x0 help TPR11 value from vendor DRAM settings. -config DRAM_SUN50I_H616_TPR12 - hex "H616 DRAM TPR12 parameter" +config DRAM_SUNXI_TPR12 + hex "DRAM TPR12 parameter" default 0x0 help TPR12 value from vendor DRAM settings. choice - prompt "H616 PHY pin mapping selection" - default DRAM_SUN50I_H616_PHY_ADDR_MAP_0 + prompt "DRAM PHY pin mapping selection" + default DRAM_SUNXI_PHY_ADDR_MAP_0 -config DRAM_SUN50I_H616_PHY_ADDR_MAP_0 - bool "H313/H616/H618" +config DRAM_SUNXI_PHY_ADDR_MAP_0 + bool "DRAM PHY address map 0" help - The pin mapping selection used by the H313, H616, H618, and - possibly other dies which use the H616 DRAM controller. + This pin mapping selection should be used by the H313, H616, H618. -config DRAM_SUN50I_H616_PHY_ADDR_MAP_1 - bool "H700" +config DRAM_SUNXI_PHY_ADDR_MAP_1 + bool "DRAM PHY address map 1" help - The pin mapping selection used by the H700 and possibly other - dies which use the H616 DRAM controller. + This pin mapping selection should be used by the H700. endchoice endif @@ -279,6 +277,7 @@ config MACH_SUNIV select SUPPORT_SPL select SKIP_LOWLEVEL_INIT_ONLY select SPL_SKIP_LOWLEVEL_INIT_ONLY + imply OF_UPSTREAM config MACH_SUN4I bool "sun4i (Allwinner A10)" @@ -288,6 +287,7 @@ config MACH_SUN4I select SUPPORT_SPL imply SPL_SYS_I2C_LEGACY imply SYS_I2C_LEGACY + imply OF_UPSTREAM config MACH_SUN5I bool "sun5i (Allwinner A13)" @@ -297,6 +297,7 @@ config MACH_SUN5I select SUPPORT_SPL imply SPL_SYS_I2C_LEGACY imply SYS_I2C_LEGACY + imply OF_UPSTREAM config MACH_SUN6I bool "sun6i (Allwinner A31)" diff --git a/arch/arm/mach-sunxi/dram_sun50i_h616.c b/arch/arm/mach-sunxi/dram_sun50i_h616.c index 863c4f1d7a8..b3554cc64bf 100644 --- a/arch/arm/mach-sunxi/dram_sun50i_h616.c +++ b/arch/arm/mach-sunxi/dram_sun50i_h616.c @@ -226,7 +226,7 @@ static void mctl_set_addrmap(const struct dram_config *config) mctl_ctl->addrmap[8] = 0x3F3F; } -#ifdef CONFIG_DRAM_SUN50I_H616_PHY_ADDR_MAP_1 +#ifdef CONFIG_DRAM_SUNXI_PHY_ADDR_MAP_1 static const u8 phy_init[] = { #ifdef CONFIG_SUNXI_DRAM_H616_DDR3_1333 0x08, 0x02, 0x12, 0x05, 0x15, 0x17, 0x18, 0x0b, @@ -245,7 +245,7 @@ static const u8 phy_init[] = { 0x18, 0x04, 0x1a #endif }; -#else /* CONFIG_DRAM_SUN50I_H616_PHY_ADDR_MAP_0 */ +#else /* CONFIG_DRAM_SUNXI_PHY_ADDR_MAP_0 */ static const u8 phy_init[] = { #ifdef CONFIG_SUNXI_DRAM_H616_DDR3_1333 0x07, 0x0b, 0x02, 0x16, 0x0d, 0x0e, 0x14, 0x19, @@ -264,7 +264,7 @@ static const u8 phy_init[] = { 0x18, 0x03, 0x1a #endif }; -#endif /* CONFIG_DRAM_SUN50I_H616_PHY_ADDR_MAP_0 */ +#endif /* CONFIG_DRAM_SUNXI_PHY_ADDR_MAP_0 */ #define MASK_BYTE(reg, nr) (((reg) >> ((nr) * 8)) & 0x1f) static void mctl_phy_configure_odt(const struct dram_para *para) { @@ -1409,16 +1409,16 @@ static const struct dram_para para = { #elif defined(CONFIG_SUNXI_DRAM_H616_LPDDR4) .type = SUNXI_DRAM_TYPE_LPDDR4, #endif - .dx_odt = CONFIG_DRAM_SUN50I_H616_DX_ODT, - .dx_dri = CONFIG_DRAM_SUN50I_H616_DX_DRI, - .ca_dri = CONFIG_DRAM_SUN50I_H616_CA_DRI, - .odt_en = CONFIG_DRAM_SUN50I_H616_ODT_EN, - .tpr0 = CONFIG_DRAM_SUN50I_H616_TPR0, - .tpr2 = CONFIG_DRAM_SUN50I_H616_TPR2, - .tpr6 = CONFIG_DRAM_SUN50I_H616_TPR6, - .tpr10 = CONFIG_DRAM_SUN50I_H616_TPR10, - .tpr11 = CONFIG_DRAM_SUN50I_H616_TPR11, - .tpr12 = CONFIG_DRAM_SUN50I_H616_TPR12, + .dx_odt = CONFIG_DRAM_SUNXI_DX_ODT, + .dx_dri = CONFIG_DRAM_SUNXI_DX_DRI, + .ca_dri = CONFIG_DRAM_SUNXI_CA_DRI, + .odt_en = CONFIG_DRAM_SUNXI_ODT_EN, + .tpr0 = CONFIG_DRAM_SUNXI_TPR0, + .tpr2 = CONFIG_DRAM_SUNXI_TPR2, + .tpr6 = CONFIG_DRAM_SUNXI_TPR6, + .tpr10 = CONFIG_DRAM_SUNXI_TPR10, + .tpr11 = CONFIG_DRAM_SUNXI_TPR11, + .tpr12 = CONFIG_DRAM_SUNXI_TPR12, }; unsigned long sunxi_dram_init(void) diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 04612895576..78b89729f19 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -48,13 +48,13 @@ config TEGRA_COMMON select DM_GPIO select DM_I2C select DM_KEYBOARD - select DM_MMC select DM_PWM select DM_RESET select DM_SERIAL select DM_SPI select DM_SPI_FLASH select MISC + select MMC select MTD select OF_CONTROL select SPI diff --git a/arch/arm/mach-zynqmp/zynqmp.c b/arch/arm/mach-zynqmp/zynqmp.c index 8ee25e4c316..3aa218545bb 100644 --- a/arch/arm/mach-zynqmp/zynqmp.c +++ b/arch/arm/mach-zynqmp/zynqmp.c @@ -349,7 +349,7 @@ static int do_zynqmp_reboot(struct cmd_tbl *cmdtp, int flag, multiboot = hextoul(argv[2], NULL); - ret = zynqmp_mmio_write(0xFFCA0010, 0xfff, multiboot); + ret = zynqmp_mmio_write((ulong)&csu_base->multi_boot, 0xfff, multiboot); if (ret != 0) { printf("Failed: mmio write\n"); return ret; diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index a160d24fb03..faf70cb5d4c 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -14,6 +14,9 @@ config TARGET_ANDES_AE350 config TARGET_BANANAPI_F3 bool "Support BananaPi F3 Board" +config TARGET_K230_CANMV + bool "Support K230 CanMV Board" + config TARGET_LICHEERV_NANO bool "Support LicheeRV Nano Board" @@ -91,6 +94,7 @@ config SPL_ZERO_MEM_BEFORE_USE # board-specific options below source "board/andestech/ae350/Kconfig" source "board/aspeed/ibex_ast2700/Kconfig" +source "board/canaan/k230_canmv/Kconfig" source "board/emulation/qemu-riscv/Kconfig" source "board/microchip/mpfs_icicle/Kconfig" source "board/openpiton/riscv64/Kconfig" @@ -113,6 +117,7 @@ source "arch/riscv/cpu/ast2700/Kconfig" source "arch/riscv/cpu/generic/Kconfig" source "arch/riscv/cpu/jh7110/Kconfig" source "arch/riscv/cpu/k1/Kconfig" +source "arch/riscv/cpu/k230/Kconfig" # architecture-specific options below diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c index affe70081b5..06ecd92b9bc 100644 --- a/arch/riscv/cpu/cpu.c +++ b/arch/riscv/cpu/cpu.c @@ -14,8 +14,12 @@ #include <log.h> #include <asm/encoding.h> #include <asm/system.h> +#include <asm/hwcap.h> +#include <asm/cpufeature.h> #include <dm/uclass-internal.h> #include <linux/bitops.h> +#include <linux/log2.h> +#include <linux/ctype.h> /* * The variables here must be stored in the data section since they are used @@ -33,60 +37,565 @@ u32 available_harts_lock = 1; #endif #endif -static inline bool supports_extension(char ext) +/* Host ISA bitmap */ +static DECLARE_BITMAP(riscv_isa, RISCV_ISA_EXT_MAX) __section(".data"); + +static unsigned int riscv_cbom_block_size __section(".data"); +static unsigned int riscv_cboz_block_size __section(".data"); +/** + * __riscv_isa_extension_available() - Check whether given extension + * is available or not + * + * @bit: bit position of the desired extension + * Return: true or false + * + */ +static bool __riscv_isa_extension_available(unsigned int bit) +{ + if (bit >= RISCV_ISA_EXT_MAX) + return false; + + return test_bit(bit, riscv_isa) ? true : false; +} + +inline unsigned int riscv_get_cbom_block_size(void) +{ + return riscv_cbom_block_size; +} + +inline unsigned int riscv_get_cboz_block_size(void) +{ + return riscv_cboz_block_size; +} + +static int riscv_ext_zicbom_validate(const struct riscv_isa_ext_data *data, + const unsigned long *isa_bitmap) { -#if CONFIG_IS_ENABLED(RISCV_MMODE) - return csr_read(CSR_MISA) & (1 << (ext - 'a')); -#elif CONFIG_CPU - char sext[2] = {ext}; struct udevice *dev; - const char *isa; - int ret, i; - uclass_find_first_device(UCLASS_CPU, &dev); + if (!CONFIG_IS_ENABLED(RISCV_ISA_ZICBOM) || riscv_cbom_block_size) + return 0; + + uclass_first_device(UCLASS_CPU, &dev); if (!dev) { - debug("unable to find the RISC-V cpu device\n"); - return false; + log_info("Failed to get cpu device!\n"); + return -ENXIO; } - ret = dev_read_stringlist_search(dev, "riscv,isa-extensions", sext); - if (ret >= 0) - return true; + if (!dev_read_u32(dev, "riscv,cbom-block-size", + &riscv_cbom_block_size)) { + if (!riscv_cbom_block_size) { + log_err("Zicbom detected in ISA string, disabling as no cbom-block-size found\n"); + return -EINVAL; + } + if (!is_power_of_2(riscv_cbom_block_size)) { + log_err("Zicbom disabled as cbom-block-size present, but is not a power-of-2\n"); + return -EINVAL; + } + return 0; + } else { + return -EINVAL; + } +} - /* - * Only if the property is not found (ENODATA) is the fallback to - * riscv,isa used, otherwise the extension is not present in this - * CPU. - */ - if (ret != -ENODATA) - return false; +static int riscv_ext_zicboz_validate(const struct riscv_isa_ext_data *data, + const unsigned long *isa_bitmap) +{ + struct udevice *dev; - isa = dev_read_string(dev, "riscv,isa"); - if (!isa) - return false; + if (!CONFIG_IS_ENABLED(RISCV_ISA_ZICBOM) || riscv_cboz_block_size) + return 0; + + uclass_first_device(UCLASS_CPU, &dev); + if (!dev) { + log_debug("Failed to get cpu device!\n"); + return -ENXIO; + } + + if (!dev_read_u32(dev, "riscv,cboz-block-size", + &riscv_cboz_block_size)) { + if (!riscv_cboz_block_size) { + log_err("Zicboz detected in ISA string, disabling as no cboz-block-size found\n"); + return -EINVAL; + } + if (!is_power_of_2(riscv_cboz_block_size)) { + log_err("Zicboz disabled as cboz-block-size present, but is not a power-of-2\n"); + return -EINVAL; + } + return 0; + } else { + return -EINVAL; + } +} + +static int riscv_ext_zca_depends(const struct riscv_isa_ext_data *data, + const unsigned long *isa_bitmap) +{ + if (__riscv_isa_extension_available(RISCV_ISA_EXT_ZCA)) + return 0; + + return -EINVAL; +} + +static int riscv_ext_zcd_validate(const struct riscv_isa_ext_data *data, + const unsigned long *isa_bitmap) +{ + if (__riscv_isa_extension_available(RISCV_ISA_EXT_ZCA) && + __riscv_isa_extension_available(RISCV_ISA_EXT_d)) + return 0; + + return -EINVAL; +} + +static int riscv_ext_zcf_validate(const struct riscv_isa_ext_data *data, + const unsigned long *isa_bitmap) +{ + if (IS_ENABLED(CONFIG_64BIT)) + return -EINVAL; + + if (__riscv_isa_extension_available(RISCV_ISA_EXT_ZCA) && + __riscv_isa_extension_available(RISCV_ISA_EXT_f)) + return 0; + + return -EINVAL; +} + +static const unsigned int riscv_zk_bundled_exts[] = { + RISCV_ISA_EXT_ZBKB, + RISCV_ISA_EXT_ZBKC, + RISCV_ISA_EXT_ZBKX, + RISCV_ISA_EXT_ZKND, + RISCV_ISA_EXT_ZKNE, + RISCV_ISA_EXT_ZKR, + RISCV_ISA_EXT_ZKT, +}; + +static const unsigned int riscv_zkn_bundled_exts[] = { + RISCV_ISA_EXT_ZBKB, + RISCV_ISA_EXT_ZBKC, + RISCV_ISA_EXT_ZBKX, + RISCV_ISA_EXT_ZKND, + RISCV_ISA_EXT_ZKNE, + RISCV_ISA_EXT_ZKNH, +}; + +static const unsigned int riscv_zks_bundled_exts[] = { + RISCV_ISA_EXT_ZBKB, + RISCV_ISA_EXT_ZBKC, + RISCV_ISA_EXT_ZKSED, + RISCV_ISA_EXT_ZKSH +}; + +#define RISCV_ISA_EXT_ZVKN \ + RISCV_ISA_EXT_ZVKNED, \ + RISCV_ISA_EXT_ZVKNHB, \ + RISCV_ISA_EXT_ZVKB, \ + RISCV_ISA_EXT_ZVKT + +static const unsigned int riscv_zvkn_bundled_exts[] = { + RISCV_ISA_EXT_ZVKN +}; + +static const unsigned int riscv_zvknc_bundled_exts[] = { + RISCV_ISA_EXT_ZVKN, + RISCV_ISA_EXT_ZVBC +}; + +static const unsigned int riscv_zvkng_bundled_exts[] = { + RISCV_ISA_EXT_ZVKN, + RISCV_ISA_EXT_ZVKG +}; + +#define RISCV_ISA_EXT_ZVKS \ + RISCV_ISA_EXT_ZVKSED, \ + RISCV_ISA_EXT_ZVKSH, \ + RISCV_ISA_EXT_ZVKB, \ + RISCV_ISA_EXT_ZVKT + +static const unsigned int riscv_zvks_bundled_exts[] = { + RISCV_ISA_EXT_ZVKS +}; + +static const unsigned int riscv_zvksc_bundled_exts[] = { + RISCV_ISA_EXT_ZVKS, + RISCV_ISA_EXT_ZVBC +}; + +static const unsigned int riscv_zvksg_bundled_exts[] = { + RISCV_ISA_EXT_ZVKS, + RISCV_ISA_EXT_ZVKG +}; + +static const unsigned int riscv_zvbb_exts[] = { + RISCV_ISA_EXT_ZVKB +}; + +#define RISCV_ISA_EXT_ZVE64F_IMPLY_LIST \ + RISCV_ISA_EXT_ZVE64X, \ + RISCV_ISA_EXT_ZVE32F, \ + RISCV_ISA_EXT_ZVE32X + +#define RISCV_ISA_EXT_ZVE64D_IMPLY_LIST \ + RISCV_ISA_EXT_ZVE64F, \ + RISCV_ISA_EXT_ZVE64F_IMPLY_LIST + +#define RISCV_ISA_EXT_V_IMPLY_LIST \ + RISCV_ISA_EXT_ZVE64D, \ + RISCV_ISA_EXT_ZVE64D_IMPLY_LIST + +static const unsigned int riscv_zve32f_exts[] = { + RISCV_ISA_EXT_ZVE32X +}; + +static const unsigned int riscv_zve64f_exts[] = { + RISCV_ISA_EXT_ZVE64F_IMPLY_LIST +}; + +static const unsigned int riscv_zve64d_exts[] = { + RISCV_ISA_EXT_ZVE64D_IMPLY_LIST +}; + +static const unsigned int riscv_v_exts[] = { + RISCV_ISA_EXT_V_IMPLY_LIST +}; + +static const unsigned int riscv_zve64x_exts[] = { + RISCV_ISA_EXT_ZVE32X, + RISCV_ISA_EXT_ZVE64X +}; +/* + * While the [ms]envcfg CSRs were not defined until version 1.12 of the RISC-V + * privileged ISA, the existence of the CSRs is implied by any extension which + * specifies [ms]envcfg bit(s). Hence, we define a custom ISA extension for the + * existence of the CSR, and treat it as a subset of those other extensions. + */ +static const unsigned int riscv_xlinuxenvcfg_exts[] = { + RISCV_ISA_EXT_XLINUXENVCFG +}; + +/* + * Zc* spec states that: + * - C always implies Zca + * - C+F implies Zcf (RV32 only) + * - C+D implies Zcd + * + * These extensions will be enabled and then validated depending on the + * availability of F/D RV32. + */ +static const unsigned int riscv_c_exts[] = { + RISCV_ISA_EXT_ZCA, + RISCV_ISA_EXT_ZCF, + RISCV_ISA_EXT_ZCD, +}; + +/* + * The canonical order of ISA extension names in the ISA string is defined in + * chapter 27 of the unprivileged specification. + * + * Ordinarily, for in-kernel data structures, this order is unimportant but + * isa_ext_arr defines the order of the ISA string in /proc/cpuinfo. + * + * The specification uses vague wording, such as should, when it comes to + * ordering, so for our purposes the following rules apply: + * + * 1. All multi-letter extensions must be separated from other extensions by an + * underscore. + * + * 2. Additional standard extensions (starting with 'Z') must be sorted after + * single-letter extensions and before any higher-privileged extensions. + * + * 3. The first letter following the 'Z' conventionally indicates the most + * closely related alphabetical extension category, IMAFDQLCBKJTPVH. + * If multiple 'Z' extensions are named, they must be ordered first by + * category, then alphabetically within a category. + * + * 3. Standard supervisor-level extensions (starting with 'S') must be listed + * after standard unprivileged extensions. If multiple supervisor-level + * extensions are listed, they must be ordered alphabetically. + * + * 4. Standard machine-level extensions (starting with 'Zxm') must be listed + * after any lower-privileged, standard extensions. If multiple + * machine-level extensions are listed, they must be ordered + * alphabetically. + * + * 5. Non-standard extensions (starting with 'X') must be listed after all + * standard extensions. If multiple non-standard extensions are listed, they + * must be ordered alphabetically. + * + * An example string following the order is: + * rv64imadc_zifoo_zigoo_zafoo_sbar_scar_zxmbaz_xqux_xrux + * + * New entries to this struct should follow the ordering rules described above. + */ +const struct riscv_isa_ext_data riscv_isa_ext[] = { + __RISCV_ISA_EXT_DATA(i, RISCV_ISA_EXT_i), + __RISCV_ISA_EXT_DATA(m, RISCV_ISA_EXT_m), + __RISCV_ISA_EXT_DATA(a, RISCV_ISA_EXT_a), + __RISCV_ISA_EXT_DATA(f, RISCV_ISA_EXT_f), + __RISCV_ISA_EXT_DATA(d, RISCV_ISA_EXT_d), + __RISCV_ISA_EXT_DATA(q, RISCV_ISA_EXT_q), + __RISCV_ISA_EXT_SUPERSET(c, RISCV_ISA_EXT_c, riscv_c_exts), + __RISCV_ISA_EXT_SUPERSET(v, RISCV_ISA_EXT_v, riscv_v_exts), + __RISCV_ISA_EXT_DATA(h, RISCV_ISA_EXT_h), + __RISCV_ISA_EXT_SUPERSET_VALIDATE(zicbom, RISCV_ISA_EXT_ZICBOM, riscv_xlinuxenvcfg_exts, + riscv_ext_zicbom_validate), + __RISCV_ISA_EXT_SUPERSET_VALIDATE(zicboz, RISCV_ISA_EXT_ZICBOZ, riscv_xlinuxenvcfg_exts, + riscv_ext_zicboz_validate), + __RISCV_ISA_EXT_DATA(zicntr, RISCV_ISA_EXT_ZICNTR), + __RISCV_ISA_EXT_DATA(zicond, RISCV_ISA_EXT_ZICOND), + __RISCV_ISA_EXT_DATA(zicsr, RISCV_ISA_EXT_ZICSR), + __RISCV_ISA_EXT_DATA(zifencei, RISCV_ISA_EXT_ZIFENCEI), + __RISCV_ISA_EXT_DATA(zihintntl, RISCV_ISA_EXT_ZIHINTNTL), + __RISCV_ISA_EXT_DATA(zihintpause, RISCV_ISA_EXT_ZIHINTPAUSE), + __RISCV_ISA_EXT_DATA(zihpm, RISCV_ISA_EXT_ZIHPM), + __RISCV_ISA_EXT_DATA(zimop, RISCV_ISA_EXT_ZIMOP), + __RISCV_ISA_EXT_DATA(zacas, RISCV_ISA_EXT_ZACAS), + __RISCV_ISA_EXT_DATA(zawrs, RISCV_ISA_EXT_ZAWRS), + __RISCV_ISA_EXT_DATA(zfa, RISCV_ISA_EXT_ZFA), + __RISCV_ISA_EXT_DATA(zfh, RISCV_ISA_EXT_ZFH), + __RISCV_ISA_EXT_DATA(zfhmin, RISCV_ISA_EXT_ZFHMIN), + __RISCV_ISA_EXT_DATA(zca, RISCV_ISA_EXT_ZCA), + __RISCV_ISA_EXT_DATA_VALIDATE(zcb, RISCV_ISA_EXT_ZCB, riscv_ext_zca_depends), + __RISCV_ISA_EXT_DATA_VALIDATE(zcd, RISCV_ISA_EXT_ZCD, riscv_ext_zcd_validate), + __RISCV_ISA_EXT_DATA_VALIDATE(zcf, RISCV_ISA_EXT_ZCF, riscv_ext_zcf_validate), + __RISCV_ISA_EXT_DATA_VALIDATE(zcmop, RISCV_ISA_EXT_ZCMOP, riscv_ext_zca_depends), + __RISCV_ISA_EXT_DATA(zba, RISCV_ISA_EXT_ZBA), + __RISCV_ISA_EXT_DATA(zbb, RISCV_ISA_EXT_ZBB), + __RISCV_ISA_EXT_DATA(zbc, RISCV_ISA_EXT_ZBC), + __RISCV_ISA_EXT_DATA(zbkb, RISCV_ISA_EXT_ZBKB), + __RISCV_ISA_EXT_DATA(zbkc, RISCV_ISA_EXT_ZBKC), + __RISCV_ISA_EXT_DATA(zbkx, RISCV_ISA_EXT_ZBKX), + __RISCV_ISA_EXT_DATA(zbs, RISCV_ISA_EXT_ZBS), + __RISCV_ISA_EXT_BUNDLE(zk, riscv_zk_bundled_exts), + __RISCV_ISA_EXT_BUNDLE(zkn, riscv_zkn_bundled_exts), + __RISCV_ISA_EXT_DATA(zknd, RISCV_ISA_EXT_ZKND), + __RISCV_ISA_EXT_DATA(zkne, RISCV_ISA_EXT_ZKNE), + __RISCV_ISA_EXT_DATA(zknh, RISCV_ISA_EXT_ZKNH), + __RISCV_ISA_EXT_DATA(zkr, RISCV_ISA_EXT_ZKR), + __RISCV_ISA_EXT_BUNDLE(zks, riscv_zks_bundled_exts), + __RISCV_ISA_EXT_DATA(zkt, RISCV_ISA_EXT_ZKT), + __RISCV_ISA_EXT_DATA(zksed, RISCV_ISA_EXT_ZKSED), + __RISCV_ISA_EXT_DATA(zksh, RISCV_ISA_EXT_ZKSH), + __RISCV_ISA_EXT_DATA(ztso, RISCV_ISA_EXT_ZTSO), + __RISCV_ISA_EXT_SUPERSET(zvbb, RISCV_ISA_EXT_ZVBB, riscv_zvbb_exts), + __RISCV_ISA_EXT_DATA(zvbc, RISCV_ISA_EXT_ZVBC), + __RISCV_ISA_EXT_SUPERSET(zve32f, RISCV_ISA_EXT_ZVE32F, riscv_zve32f_exts), + __RISCV_ISA_EXT_DATA(zve32x, RISCV_ISA_EXT_ZVE32X), + __RISCV_ISA_EXT_SUPERSET(zve64d, RISCV_ISA_EXT_ZVE64D, riscv_zve64d_exts), + __RISCV_ISA_EXT_SUPERSET(zve64f, RISCV_ISA_EXT_ZVE64F, riscv_zve64f_exts), + __RISCV_ISA_EXT_SUPERSET(zve64x, RISCV_ISA_EXT_ZVE64X, riscv_zve64x_exts), + __RISCV_ISA_EXT_DATA(zvfh, RISCV_ISA_EXT_ZVFH), + __RISCV_ISA_EXT_DATA(zvfhmin, RISCV_ISA_EXT_ZVFHMIN), + __RISCV_ISA_EXT_DATA(zvkb, RISCV_ISA_EXT_ZVKB), + __RISCV_ISA_EXT_DATA(zvkg, RISCV_ISA_EXT_ZVKG), + __RISCV_ISA_EXT_BUNDLE(zvkn, riscv_zvkn_bundled_exts), + __RISCV_ISA_EXT_BUNDLE(zvknc, riscv_zvknc_bundled_exts), + __RISCV_ISA_EXT_DATA(zvkned, RISCV_ISA_EXT_ZVKNED), + __RISCV_ISA_EXT_BUNDLE(zvkng, riscv_zvkng_bundled_exts), + __RISCV_ISA_EXT_DATA(zvknha, RISCV_ISA_EXT_ZVKNHA), + __RISCV_ISA_EXT_DATA(zvknhb, RISCV_ISA_EXT_ZVKNHB), + __RISCV_ISA_EXT_BUNDLE(zvks, riscv_zvks_bundled_exts), + __RISCV_ISA_EXT_BUNDLE(zvksc, riscv_zvksc_bundled_exts), + __RISCV_ISA_EXT_DATA(zvksed, RISCV_ISA_EXT_ZVKSED), + __RISCV_ISA_EXT_DATA(zvksh, RISCV_ISA_EXT_ZVKSH), + __RISCV_ISA_EXT_BUNDLE(zvksg, riscv_zvksg_bundled_exts), + __RISCV_ISA_EXT_DATA(zvkt, RISCV_ISA_EXT_ZVKT), + __RISCV_ISA_EXT_DATA(smaia, RISCV_ISA_EXT_SMAIA), + __RISCV_ISA_EXT_DATA(smmpm, RISCV_ISA_EXT_SMMPM), + __RISCV_ISA_EXT_SUPERSET(smnpm, RISCV_ISA_EXT_SMNPM, riscv_xlinuxenvcfg_exts), + __RISCV_ISA_EXT_DATA(smstateen, RISCV_ISA_EXT_SMSTATEEN), + __RISCV_ISA_EXT_DATA(ssaia, RISCV_ISA_EXT_SSAIA), + __RISCV_ISA_EXT_DATA(sscofpmf, RISCV_ISA_EXT_SSCOFPMF), + __RISCV_ISA_EXT_SUPERSET(ssnpm, RISCV_ISA_EXT_SSNPM, riscv_xlinuxenvcfg_exts), + __RISCV_ISA_EXT_DATA(sstc, RISCV_ISA_EXT_SSTC), + __RISCV_ISA_EXT_DATA(svinval, RISCV_ISA_EXT_SVINVAL), + __RISCV_ISA_EXT_DATA(svnapot, RISCV_ISA_EXT_SVNAPOT), + __RISCV_ISA_EXT_DATA(svpbmt, RISCV_ISA_EXT_SVPBMT), + __RISCV_ISA_EXT_DATA(svvptc, RISCV_ISA_EXT_SVVPTC), +}; + +const size_t riscv_isa_ext_count = ARRAY_SIZE(riscv_isa_ext); + +static void riscv_isa_set_ext(const struct riscv_isa_ext_data *ext, unsigned long *bitmap) +{ + if (ext->id != RISCV_ISA_EXT_INVALID) + __set_bit(ext->id, bitmap); + + for (int i = 0; i < ext->subset_ext_size; i++) { + if (ext->subset_ext_ids[i] != RISCV_ISA_EXT_INVALID) + __set_bit(ext->subset_ext_ids[i], bitmap); + } +} + +static void match_isa_ext(const char *name, const char *name_end) +{ + for (int i = 0; i < riscv_isa_ext_count; i++) { + const struct riscv_isa_ext_data *ext = &riscv_isa_ext[i]; + + if ((name_end - name == strlen(ext->name)) && + !strncasecmp(name, ext->name, name_end - name)) { + if (ext->validate && !ext->validate(ext, riscv_isa)) + riscv_isa_set_ext(ext, riscv_isa); + break; + } + } +} + +static void riscv_parse_isa_string(const char *isa) +{ /* - * Skip the first 4 characters (rv32|rv64). + * For all possible cpus, we have already validated in + * the boot process that they at least contain "rv" and + * whichever of "32"/"64" this kernel supports, and so this + * section can be skipped. */ - for (i = 4; i < sizeof(isa); i++) { - switch (isa[i]) { - case 's': + isa += 4; + + while (*isa) { + const char *ext = isa++; + const char *ext_end = isa; + bool ext_err = false; + + switch (*ext) { case 'x': + case 'X': + log_warning("Vendor extensions are ignored in riscv,isa. Use riscv,isa-extensions instead."); + /* + * To skip an extension, we find its end. + * As multi-letter extensions must be split from other multi-letter + * extensions with an "_", the end of a multi-letter extension will + * either be the null character or the "_" at the start of the next + * multi-letter extension. + */ + for (; *isa && *isa != '_'; ++isa) + ; + ext_err = true; + break; + case 's': + /* + * Workaround for invalid single-letter 's' & 'u' (QEMU). + * No need to set the bit in riscv_isa as 's' & 'u' are + * not valid ISA extensions. It works unless the first + * multi-letter extension in the ISA string begins with + * "Su" and is not prefixed with an underscore. + */ + if (ext[-1] != '_' && ext[1] == 'u') { + ++isa; + ext_err = true; + break; + } + fallthrough; + case 'S': case 'z': - case '_': - case '\0': + case 'Z': /* - * Any of these characters mean the single - * letter extensions have all been consumed. + * Before attempting to parse the extension itself, we find its end. + * As multi-letter extensions must be split from other multi-letter + * extensions with an "_", the end of a multi-letter extension will + * either be the null character or the "_" at the start of the next + * multi-letter extension. + * + * Next, as the extensions version is currently ignored, we + * eliminate that portion. This is done by parsing backwards from + * the end of the extension, removing any numbers. This may be a + * major or minor number however, so the process is repeated if a + * minor number was found. + * + * ext_end is intended to represent the first character *after* the + * name portion of an extension, but will be decremented to the last + * character itself while eliminating the extensions version number. + * A simple re-increment solves this problem. */ - return false; + for (; *isa && *isa != '_'; ++isa) + if (unlikely(!isalnum(*isa))) + ext_err = true; + + ext_end = isa; + if (unlikely(ext_err)) + break; + + if (!isdigit(ext_end[-1])) + break; + + while (isdigit(*--ext_end)) + ; + + if (tolower(ext_end[0]) != 'p' || !isdigit(ext_end[-1])) { + ++ext_end; + break; + } + + while (isdigit(*--ext_end)) + ; + + ++ext_end; + break; default: - if (isa[i] == ext) - return true; + /* + * Things are a little easier for single-letter extensions, as they + * are parsed forwards. + * + * After checking that our starting position is valid, we need to + * ensure that, when isa was incremented at the start of the loop, + * that it arrived at the start of the next extension. + * + * If we are already on a non-digit, there is nothing to do. Either + * we have a multi-letter extension's _, or the start of an + * extension. + * + * Otherwise we have found the current extension's major version + * number. Parse past it, and a subsequent p/minor version number + * if present. The `p` extension must not appear immediately after + * a number, so there is no fear of missing it. + * + */ + if (unlikely(!isalpha(*ext))) { + ext_err = true; + break; + } + + if (!isdigit(*isa)) + break; + + while (isdigit(*++isa)) + ; + + if (tolower(*isa) != 'p') + break; + + if (!isdigit(*++isa)) { + --isa; + break; + } + + while (isdigit(*++isa)) + ; + + break; } + + /* + * The parser expects that at the start of an iteration isa points to the + * first character of the next extension. As we stop parsing an extension + * on meeting a non-alphanumeric character, an extra increment is needed + * where the succeeding extension is a multi-letter prefixed with an "_". + */ + if (*isa == '_') + ++isa; + + if (unlikely(ext_err)) + continue; + match_isa_ext(ext, ext_end); } +} - return false; +static inline bool supports_extension(char ext) +{ +#if CONFIG_IS_ENABLED(RISCV_MMODE) + return csr_read(CSR_MISA) & (1 << (ext - 'a')); +#elif CONFIG_CPU + return __riscv_isa_extension_available(ext); #else /* !CONFIG_CPU */ #warning "There is no way to determine the available extensions in S-mode." #warning "Please convert your board to use the RISC-V CPU driver." @@ -122,7 +631,26 @@ static void dummy_pending_ipi_clear(ulong hart, ulong arg0, ulong arg1) int riscv_cpu_setup(void) { - int __maybe_unused ret; + int ret = -ENODEV, ext_count, i; + const char *isa, **exts; + struct udevice *dev; + + uclass_find_first_device(UCLASS_CPU, &dev); + if (!dev) { + debug("unable to find the RISC-V cpu device\n"); + return ret; + } + + ext_count = dev_read_string_list(dev, "riscv,isa-extensions", &exts); + if (ext_count > 0) { + for (i = 0; i < ext_count; i++) + match_isa_ext(exts[i], exts[i] + strlen(exts[i])); + } else { + isa = dev_read_string(dev, "riscv,isa"); + if (!isa) + return ret; + riscv_parse_isa_string(isa); + } /* Enable FPU */ if (supports_extension('d') || supports_extension('f')) { diff --git a/arch/riscv/cpu/k230/Kconfig b/arch/riscv/cpu/k230/Kconfig new file mode 100644 index 00000000000..d76ad92a049 --- /dev/null +++ b/arch/riscv/cpu/k230/Kconfig @@ -0,0 +1,14 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (c) 2025, Junhui Liu <junhui.liu@pigmoral.tech> + +config CANAAN_K230 + bool + select ARCH_EARLY_INIT_R + select BINMAN + imply CPU + imply CPU_RISCV + imply RISCV_TIMER + imply CMD_CPU + imply SYSRESET + imply SYSRESET_SYSCON diff --git a/arch/riscv/cpu/k230/Makefile b/arch/riscv/cpu/k230/Makefile new file mode 100644 index 00000000000..6e321cf3ed1 --- /dev/null +++ b/arch/riscv/cpu/k230/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (c) 2025, Junhui Liu <junhui.liu@pigmoral.tech> + +obj-y += dram.o +obj-y += cpu.o diff --git a/arch/riscv/cpu/k230/cpu.c b/arch/riscv/cpu/k230/cpu.c new file mode 100644 index 00000000000..417a25f0a8b --- /dev/null +++ b/arch/riscv/cpu/k230/cpu.c @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2025, Junhui Liu <junhui.liu@pigmoral.tech> + */ + +int cleanup_before_linux(void) +{ + return 0; +} diff --git a/arch/riscv/cpu/k230/dram.c b/arch/riscv/cpu/k230/dram.c new file mode 100644 index 00000000000..b2d3e4fd6a9 --- /dev/null +++ b/arch/riscv/cpu/k230/dram.c @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com> + */ + +#include <asm/global_data.h> +#include <fdtdec.h> +#include <init.h> +#include <linux/sizes.h> + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + return fdtdec_setup_mem_size_base(); +} + +int dram_init_banksize(void) +{ + return fdtdec_setup_memory_banksize(); +} diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile index b64fc0daf3c..cf1872f3fdc 100644 --- a/arch/riscv/dts/Makefile +++ b/arch/riscv/dts/Makefile @@ -2,6 +2,7 @@ dtb-$(CONFIG_TARGET_ANDES_AE350) += ae350_32.dtb ae350_64.dtb dtb-$(CONFIG_TARGET_BANANAPI_F3) += k1-bananapi-f3.dtb +dtb-$(CONFIG_TARGET_K230_CANMV) += k230-canmv.dtb dtb-$(CONFIG_TARGET_MICROCHIP_ICICLE) += mpfs-icicle-kit.dtb dtb-$(CONFIG_TARGET_MILKV_DUO) += cv1800b-milkv-duo.dtb dtb-$(CONFIG_TARGET_LICHEERV_NANO) += sg2002-licheerv-nano-b.dtb diff --git a/arch/riscv/dts/jh7110-common-u-boot.dtsi b/arch/riscv/dts/jh7110-common-u-boot.dtsi index 7871294e90d..6d85b2d91a7 100644 --- a/arch/riscv/dts/jh7110-common-u-boot.dtsi +++ b/arch/riscv/dts/jh7110-common-u-boot.dtsi @@ -3,7 +3,6 @@ * Copyright (C) 2023 StarFive Technology Co., Ltd. */ -#include "binman.dtsi" #include "jh7110-u-boot.dtsi" / { aliases { @@ -19,11 +18,6 @@ bootph-pre-ram; }; - config { - bootph-pre-ram; - u-boot,spl-payload-offset = <0x100000>; - }; - memory@40000000 { bootph-pre-ram; }; @@ -104,92 +98,3 @@ pagesize = <16>; }; }; - -&binman { - itb { - fit { - images { - fdt-jh7110-milkv-mars { - description = "jh7110-milkv-mars"; - load = <0x40400000>; - compression = "none"; - - blob-ext { - filename = "dts/upstream/src/riscv/starfive/jh7110-milkv-mars.dtb"; - }; - }; - - fdt-jh7110-pine64-star64 { - description = "jh7110-pine64-star64"; - load = <0x40400000>; - compression = "none"; - - blob-ext { - filename = "dts/upstream/src/riscv/starfive/jh7110-pine64-star64.dtb"; - }; - }; - - fdt-jh7110-starfive-visionfive-2-v1.2a { - description = "jh7110-starfive-visionfive-2-v1.2a"; - load = <0x40400000>; - compression = "none"; - - blob-ext { - filename = "dts/upstream/src/riscv/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb"; - }; - }; - - fdt-jh7110-starfive-visionfive-2-v1.3b { - description = "jh7110-starfive-visionfive-2-v1.3b"; - load = <0x40400000>; - compression = "none"; - - blob-ext { - filename = "dts/upstream/src/riscv/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb"; - }; - }; - }; - - configurations { - conf-jh7110-milkv-mars { - description = "jh7110-milkv-mars"; - firmware = "opensbi"; - loadables = "uboot"; - fdt = "fdt-jh7110-milkv-mars"; - }; - - conf-jh7110-pine64-star64 { - description = "jh7110-pine64-star64"; - firmware = "opensbi"; - loadables = "uboot"; - fdt = "fdt-jh7110-pine64-star64"; - }; - - conf-jh7110-starfive-visionfive-2-v1.2a { - description = "jh7110-starfive-visionfive-2-v1.2a"; - firmware = "opensbi"; - loadables = "uboot"; - fdt = "fdt-jh7110-starfive-visionfive-2-v1.2a"; - }; - - conf-jh7110-starfive-visionfive-2-v1.3b { - description = "jh7110-starfive-visionfive-2-v1.3b"; - firmware = "opensbi"; - loadables = "uboot"; - fdt = "fdt-jh7110-starfive-visionfive-2-v1.3b"; - }; - }; - }; - }; - - spl-img { - filename = "spl/u-boot-spl.bin.normal.out"; - - mkimage { - args = "-T sfspl"; - - u-boot-spl { - }; - }; - }; -}; diff --git a/arch/riscv/dts/jh7110-milkv-mars-u-boot.dtsi b/arch/riscv/dts/jh7110-milkv-mars-u-boot.dtsi index 9df1e5db553..ab882d07f6f 100644 --- a/arch/riscv/dts/jh7110-milkv-mars-u-boot.dtsi +++ b/arch/riscv/dts/jh7110-milkv-mars-u-boot.dtsi @@ -4,3 +4,4 @@ */ #include "jh7110-common-u-boot.dtsi" +#include "starfive-visionfive2-binman.dtsi" diff --git a/arch/riscv/dts/jh7110-pine64-star64-u-boot.dtsi b/arch/riscv/dts/jh7110-pine64-star64-u-boot.dtsi index 9df1e5db553..ab882d07f6f 100644 --- a/arch/riscv/dts/jh7110-pine64-star64-u-boot.dtsi +++ b/arch/riscv/dts/jh7110-pine64-star64-u-boot.dtsi @@ -4,3 +4,4 @@ */ #include "jh7110-common-u-boot.dtsi" +#include "starfive-visionfive2-binman.dtsi" diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi b/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi index 9df1e5db553..ab882d07f6f 100644 --- a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi +++ b/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi @@ -4,3 +4,4 @@ */ #include "jh7110-common-u-boot.dtsi" +#include "starfive-visionfive2-binman.dtsi" diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi b/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi index e6bc6630dcd..874074174ff 100644 --- a/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi +++ b/arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi @@ -4,3 +4,4 @@ */ #include "jh7110-common-u-boot.dtsi" +#include "starfive-visionfive2-binman.dtsi" diff --git a/arch/riscv/dts/k230-canmv.dts b/arch/riscv/dts/k230-canmv.dts new file mode 100644 index 00000000000..ced9c457cc2 --- /dev/null +++ b/arch/riscv/dts/k230-canmv.dts @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2024 Yangyu Chen <cyy@cyyself.name> + * Copyright (C) 2025 Junhui Liu <junhui.liu@pigmoral.tech> + */ + +/dts-v1/; +#include "k230.dtsi" + +/ { + model = "Canaan CanMV-K230"; + compatible = "canaan,canmv-k230", "canaan,kendryte-k230"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x20000000>; + }; +}; + +&uart0 { + status = "okay"; +}; + +/* onboard RTL8152 */ +&usb1 { + status = "okay"; +}; diff --git a/arch/riscv/dts/k230-u-boot.dtsi b/arch/riscv/dts/k230-u-boot.dtsi new file mode 100644 index 00000000000..bb66ad3c153 --- /dev/null +++ b/arch/riscv/dts/k230-u-boot.dtsi @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2025 Junhui Liu <junhui.liu@pigmoral.tech> + */ + +#include <linux/stringify.h> + +/ { + binman: binman { + }; +}; + +&binman { + mkimage { + filename = "u-boot-gz.img"; + args = "-A", "riscv", "-T", "firmware", "-O", "u-boot", + "-C", "gzip", "-n", "uboot", + "-a", __stringify(CONFIG_TEXT_BASE), + "-e", __stringify(CONFIG_TEXT_BASE); + blob { + filename = "u-boot.bin"; + compress = "gzip"; + }; + }; +}; diff --git a/arch/riscv/dts/k230.dtsi b/arch/riscv/dts/k230.dtsi new file mode 100644 index 00000000000..cf596677de1 --- /dev/null +++ b/arch/riscv/dts/k230.dtsi @@ -0,0 +1,175 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2024 Yangyu Chen <cyy@cyyself.name> + * Copyright (C) 2025 Junhui Liu <junhui.liu@pigmoral.tech> + */ + +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + #address-cells = <2>; + #size-cells = <2>; + compatible = "canaan,kendryte-k230"; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + timebase-frequency = <27000000>; + + cpu@0 { + compatible = "thead,c908", "riscv"; + device_type = "cpu"; + reg = <0>; + riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zfh_zba_zbb_zbc_zbs_zvfh_svpbmt"; + riscv,isa-base = "rv64i"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "v", "zicbom", + "zicbop", "zicboz", "zicntr", "zicsr", "zifencei", + "zihpm", "zfh", "zba", "zbb", "zbc", "zbs", "zvfh", + "svpbmt"; + riscv,cbom-block-size = <64>; + riscv,cbop-block-size = <64>; + riscv,cboz-block-size = <64>; + mmu-type = "riscv,sv39"; + + cpu0_intc: interrupt-controller { + compatible = "riscv,cpu-intc"; + interrupt-controller; + #interrupt-cells = <1>; + }; + }; + }; + + apb_clk: apb-clk-clock { + compatible = "fixed-clock"; + clock-frequency = <50000000>; + clock-output-names = "apb_clk"; + #clock-cells = <0>; + }; + + clk_dummy: clock-dummy { + compatible = "fixed-clock"; + clock-frequency = <0>; + clock-output-names = "clk_dummy"; + #clock-cells = <0>; + }; + + reboot: syscon-reboot { + compatible = "syscon-reboot"; + regmap = <&bootctl>; + offset = <0x60>; + mask = <0x10001>; + value = <0x10001>; + }; + + soc { + compatible = "simple-bus"; + interrupt-parent = <&plic>; + #address-cells = <2>; + #size-cells = <2>; + dma-noncoherent; + ranges; + + bootctl: syscon@0x91102000 { + compatible = "syscon"; + reg = <0x0 0x91102000 0x0 0x1000>; + }; + + plic: interrupt-controller@f00000000 { + compatible = "canaan,k230-plic" ,"thead,c900-plic"; + reg = <0xf 0x00000000 0x0 0x04000000>; + interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + riscv,ndev = <208>; + }; + + clint: timer@f04000000 { + compatible = "canaan,k230-clint", "thead,c900-clint"; + reg = <0xf 0x04000000 0x0 0x00010000>; + interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>; + }; + + uart0: serial@91400000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x91400000 0x0 0x1000>; + clocks = <&apb_clk>; + interrupts = <16 IRQ_TYPE_LEVEL_HIGH>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart1: serial@91401000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x91401000 0x0 0x1000>; + clocks = <&apb_clk>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart2: serial@91402000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x91402000 0x0 0x1000>; + clocks = <&apb_clk>; + interrupts = <18 IRQ_TYPE_LEVEL_HIGH>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart3: serial@91403000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x91403000 0x0 0x1000>; + clocks = <&apb_clk>; + interrupts = <19 IRQ_TYPE_LEVEL_HIGH>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart4: serial@91404000 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x91404000 0x0 0x1000>; + clocks = <&apb_clk>; + interrupts = <20 IRQ_TYPE_LEVEL_HIGH>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + usb0: usb@91500000 { + compatible = "canaan,k230-otg", "snps,dwc2"; + reg = <0x0 0x91500000 0x0 0x40000>; + interrupts = <173 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk_dummy>; + clock-names = "otg"; + g-rx-fifo-size = <512>; + g-np-tx-fifo-size = <64>; + g-tx-fifo-size = <512 1024 64 64 64 64>; + status = "disabled"; + }; + + usb1: usb@91540000 { + compatible = "canaan,k230-otg", "snps,dwc2"; + reg = <0x0 0x91540000 0x0 0x40000>; + interrupts = <174 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk_dummy>; + clock-names = "otg"; + g-rx-fifo-size = <512>; + g-np-tx-fifo-size = <64>; + g-tx-fifo-size = <512 1024 64 64 64 64>; + status = "disabled"; + }; + }; +}; diff --git a/arch/riscv/dts/starfive-visionfive2-binman.dtsi b/arch/riscv/dts/starfive-visionfive2-binman.dtsi new file mode 100644 index 00000000000..4cce001e80d --- /dev/null +++ b/arch/riscv/dts/starfive-visionfive2-binman.dtsi @@ -0,0 +1,102 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2023 StarFive Technology Co., Ltd. + */ + +#include "binman.dtsi" + +/ { + config { + bootph-pre-ram; + u-boot,spl-payload-offset = <0x100000>; + }; +}; + +&binman { + itb { + fit { + images { + fdt-jh7110-milkv-mars { + description = "jh7110-milkv-mars"; + load = <0x40400000>; + compression = "none"; + + blob-ext { + filename = "dts/upstream/src/riscv/starfive/jh7110-milkv-mars.dtb"; + }; + }; + + fdt-jh7110-pine64-star64 { + description = "jh7110-pine64-star64"; + load = <0x40400000>; + compression = "none"; + + blob-ext { + filename = "dts/upstream/src/riscv/starfive/jh7110-pine64-star64.dtb"; + }; + }; + + fdt-jh7110-starfive-visionfive-2-v1.2a { + description = "jh7110-starfive-visionfive-2-v1.2a"; + load = <0x40400000>; + compression = "none"; + + blob-ext { + filename = "dts/upstream/src/riscv/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb"; + }; + }; + + fdt-jh7110-starfive-visionfive-2-v1.3b { + description = "jh7110-starfive-visionfive-2-v1.3b"; + load = <0x40400000>; + compression = "none"; + + blob-ext { + filename = "dts/upstream/src/riscv/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb"; + }; + }; + }; + + configurations { + conf-jh7110-milkv-mars { + description = "jh7110-milkv-mars"; + firmware = "opensbi"; + loadables = "uboot"; + fdt = "fdt-jh7110-milkv-mars"; + }; + + conf-jh7110-pine64-star64 { + description = "jh7110-pine64-star64"; + firmware = "opensbi"; + loadables = "uboot"; + fdt = "fdt-jh7110-pine64-star64"; + }; + + conf-jh7110-starfive-visionfive-2-v1.2a { + description = "jh7110-starfive-visionfive-2-v1.2a"; + firmware = "opensbi"; + loadables = "uboot"; + fdt = "fdt-jh7110-starfive-visionfive-2-v1.2a"; + }; + + conf-jh7110-starfive-visionfive-2-v1.3b { + description = "jh7110-starfive-visionfive-2-v1.3b"; + firmware = "opensbi"; + loadables = "uboot"; + fdt = "fdt-jh7110-starfive-visionfive-2-v1.3b"; + }; + }; + }; + }; + + spl-img { + filename = "spl/u-boot-spl.bin.normal.out"; + + mkimage { + args = "-T sfspl"; + + u-boot-spl { + }; + }; + }; +}; diff --git a/arch/riscv/include/asm/cpufeature.h b/arch/riscv/include/asm/cpufeature.h new file mode 100644 index 00000000000..655180c993e --- /dev/null +++ b/arch/riscv/include/asm/cpufeature.h @@ -0,0 +1,37 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _ASM_CPUFEATURE_H +#define _ASM_CPUFEATURE_H +struct riscv_isa_ext_data { + const unsigned int id; + const char *name; + const char *property; + const unsigned int *subset_ext_ids; + const unsigned int subset_ext_size; + int (*validate)(const struct riscv_isa_ext_data *data, const unsigned long *isa_bitmap); +}; + +#define _RISCV_ISA_EXT_DATA(_name, _id, _subset_exts, _subset_exts_size, _validate) { \ + .name = #_name, \ + .property = #_name, \ + .id = _id, \ + .subset_ext_ids = _subset_exts, \ + .subset_ext_size = _subset_exts_size, \ + .validate = _validate \ +} + +#define __RISCV_ISA_EXT_DATA(_name, _id) _RISCV_ISA_EXT_DATA(_name, _id, NULL, 0, NULL) +#define __RISCV_ISA_EXT_DATA_VALIDATE(_name, _id, _validate) \ + _RISCV_ISA_EXT_DATA(_name, _id, NULL, 0, _validate) + +/* Used to declare pure "lasso" extension (Zk for instance) */ +#define __RISCV_ISA_EXT_BUNDLE(_name, _bundled_exts) \ + _RISCV_ISA_EXT_DATA(_name, RISCV_ISA_EXT_INVALID, _bundled_exts, \ + ARRAY_SIZE(_bundled_exts), NULL) + +/* Used to declare extensions that are a superset of other extensions (Zvbb for instance) */ +#define __RISCV_ISA_EXT_SUPERSET(_name, _id, _sub_exts) \ + _RISCV_ISA_EXT_DATA(_name, _id, _sub_exts, ARRAY_SIZE(_sub_exts), NULL) +#define __RISCV_ISA_EXT_SUPERSET_VALIDATE(_name, _id, _sub_exts, _validate) \ + _RISCV_ISA_EXT_DATA(_name, _id, _sub_exts, ARRAY_SIZE(_sub_exts), _validate) +#endif diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h new file mode 100644 index 00000000000..aa68ada6b2b --- /dev/null +++ b/arch/riscv/include/asm/hwcap.h @@ -0,0 +1,105 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef _ASM_RISCV_HWCAP_H +#define _ASM_RISCV_HWCAP_H + +#define RISCV_ISA_EXT_a ('a' - 'a') +#define RISCV_ISA_EXT_c ('c' - 'a') +#define RISCV_ISA_EXT_d ('d' - 'a') +#define RISCV_ISA_EXT_f ('f' - 'a') +#define RISCV_ISA_EXT_h ('h' - 'a') +#define RISCV_ISA_EXT_i ('i' - 'a') +#define RISCV_ISA_EXT_m ('m' - 'a') +#define RISCV_ISA_EXT_q ('q' - 'a') +#define RISCV_ISA_EXT_v ('v' - 'a') + +/* + * These macros represent the logical IDs of each multi-letter RISC-V ISA + * extension and are used in the ISA bitmap. The logical IDs start from + * RISCV_ISA_EXT_BASE, which allows the 0-25 range to be reserved for single + * letter extensions. The maximum, RISCV_ISA_EXT_MAX, is defined in order + * to allocate the bitmap and may be increased when necessary. + * + * New extensions should just be added to the bottom, rather than added + * alphabetically, in order to avoid unnecessary shuffling. + */ +#define RISCV_ISA_EXT_BASE 26 + +#define RISCV_ISA_EXT_SSCOFPMF 26 +#define RISCV_ISA_EXT_SSTC 27 +#define RISCV_ISA_EXT_SVINVAL 28 +#define RISCV_ISA_EXT_SVPBMT 29 +#define RISCV_ISA_EXT_ZBB 30 +#define RISCV_ISA_EXT_ZICBOM 31 +#define RISCV_ISA_EXT_ZIHINTPAUSE 32 +#define RISCV_ISA_EXT_SVNAPOT 33 +#define RISCV_ISA_EXT_ZICBOZ 34 +#define RISCV_ISA_EXT_SMAIA 35 +#define RISCV_ISA_EXT_SSAIA 36 +#define RISCV_ISA_EXT_ZBA 37 +#define RISCV_ISA_EXT_ZBS 38 +#define RISCV_ISA_EXT_ZICNTR 39 +#define RISCV_ISA_EXT_ZICSR 40 +#define RISCV_ISA_EXT_ZIFENCEI 41 +#define RISCV_ISA_EXT_ZIHPM 42 +#define RISCV_ISA_EXT_SMSTATEEN 43 +#define RISCV_ISA_EXT_ZICOND 44 +#define RISCV_ISA_EXT_ZBC 45 +#define RISCV_ISA_EXT_ZBKB 46 +#define RISCV_ISA_EXT_ZBKC 47 +#define RISCV_ISA_EXT_ZBKX 48 +#define RISCV_ISA_EXT_ZKND 49 +#define RISCV_ISA_EXT_ZKNE 50 +#define RISCV_ISA_EXT_ZKNH 51 +#define RISCV_ISA_EXT_ZKR 52 +#define RISCV_ISA_EXT_ZKSED 53 +#define RISCV_ISA_EXT_ZKSH 54 +#define RISCV_ISA_EXT_ZKT 55 +#define RISCV_ISA_EXT_ZVBB 56 +#define RISCV_ISA_EXT_ZVBC 57 +#define RISCV_ISA_EXT_ZVKB 58 +#define RISCV_ISA_EXT_ZVKG 59 +#define RISCV_ISA_EXT_ZVKNED 60 +#define RISCV_ISA_EXT_ZVKNHA 61 +#define RISCV_ISA_EXT_ZVKNHB 62 +#define RISCV_ISA_EXT_ZVKSED 63 +#define RISCV_ISA_EXT_ZVKSH 64 +#define RISCV_ISA_EXT_ZVKT 65 +#define RISCV_ISA_EXT_ZFH 66 +#define RISCV_ISA_EXT_ZFHMIN 67 +#define RISCV_ISA_EXT_ZIHINTNTL 68 +#define RISCV_ISA_EXT_ZVFH 69 +#define RISCV_ISA_EXT_ZVFHMIN 70 +#define RISCV_ISA_EXT_ZFA 71 +#define RISCV_ISA_EXT_ZTSO 72 +#define RISCV_ISA_EXT_ZACAS 73 +#define RISCV_ISA_EXT_ZVE32X 74 +#define RISCV_ISA_EXT_ZVE32F 75 +#define RISCV_ISA_EXT_ZVE64X 76 +#define RISCV_ISA_EXT_ZVE64F 77 +#define RISCV_ISA_EXT_ZVE64D 78 +#define RISCV_ISA_EXT_ZIMOP 79 +#define RISCV_ISA_EXT_ZCA 80 +#define RISCV_ISA_EXT_ZCB 81 +#define RISCV_ISA_EXT_ZCD 82 +#define RISCV_ISA_EXT_ZCF 83 +#define RISCV_ISA_EXT_ZCMOP 84 +#define RISCV_ISA_EXT_ZAWRS 85 +#define RISCV_ISA_EXT_SVVPTC 86 +#define RISCV_ISA_EXT_SMMPM 87 +#define RISCV_ISA_EXT_SMNPM 88 +#define RISCV_ISA_EXT_SSNPM 89 + +#define RISCV_ISA_EXT_XLINUXENVCFG 127 + +#define RISCV_ISA_EXT_MAX 128 +#define RISCV_ISA_EXT_INVALID U32_MAX + +#ifdef CONFIG_RISCV_M_MODE +#define RISCV_ISA_EXT_SxAIA RISCV_ISA_EXT_SMAIA +#define RISCV_ISA_EXT_SUPM RISCV_ISA_EXT_SMNPM +#else +#define RISCV_ISA_EXT_SxAIA RISCV_ISA_EXT_SSAIA +#define RISCV_ISA_EXT_SUPM RISCV_ISA_EXT_SSNPM +#endif + +#endif /* _ASM_RISCV_HWCAP_H */ diff --git a/arch/riscv/lib/cache.c b/arch/riscv/lib/cache.c index e184d5e2059..71e4937ab54 100644 --- a/arch/riscv/lib/cache.c +++ b/arch/riscv/lib/cache.c @@ -24,7 +24,7 @@ enum { CBO_INVAL } riscv_cbo_ops; static int zicbom_block_size; - +extern unsigned int riscv_get_cbom_block_size(void); static inline void do_cbo_clean(unsigned long base) { asm volatile ("add a0, %0, zero\n" CBO_CLEAN(%0) :: @@ -79,25 +79,6 @@ void cbo_inval(unsigned long start, unsigned long end) cbo_op(CBO_INVAL, start, end); } -static int riscv_zicbom_init(void) -{ - struct udevice *dev; - - if (!CONFIG_IS_ENABLED(RISCV_ISA_ZICBOM) || zicbom_block_size) - return 1; - - uclass_first_device(UCLASS_CPU, &dev); - if (!dev) { - log_debug("Failed to get cpu device!\n"); - return 0; - } - - if (dev_read_u32(dev, "riscv,cbom-block-size", &zicbom_block_size)) - log_debug("riscv,cbom-block-size DT property not present\n"); - - return zicbom_block_size; -} - void invalidate_icache_all(void) { asm volatile ("fence.i" ::: "memory"); @@ -166,6 +147,7 @@ __weak int dcache_status(void) __weak void enable_caches(void) { - if (!riscv_zicbom_init()) - log_info("Zicbom not initialized.\n"); + zicbom_block_size = riscv_get_cbom_block_size(); + if (!zicbom_block_size) + log_debug("Zicbom not initialized.\n"); } diff --git a/arch/riscv/lib/crt0_riscv_efi.S b/arch/riscv/lib/crt0_riscv_efi.S index c7a4559eac8..9eacbe4a859 100644 --- a/arch/riscv/lib/crt0_riscv_efi.S +++ b/arch/riscv/lib/crt0_riscv_efi.S @@ -63,8 +63,8 @@ optional_header: .short PE_MAGIC /* PE32(+) format */ .byte 0x02 /* MajorLinkerVersion */ .byte 0x14 /* MinorLinkerVersion */ - .long _edata - _start /* SizeOfCode */ - .long 0 /* SizeOfInitializedData */ + .long _etext - _start /* SizeOfCode */ + .long _data_size /* SizeOfInitializedData */ .long 0 /* SizeOfUninitializedData */ .long _start - ImageBase /* AddressOfEntryPoint */ .long _start - ImageBase /* BaseOfCode */ diff --git a/arch/riscv/lib/elf_riscv32_efi.lds b/arch/riscv/lib/elf_riscv32_efi.lds index 7b9bd7b7f15..e23521c4931 100644 --- a/arch/riscv/lib/elf_riscv32_efi.lds +++ b/arch/riscv/lib/elf_riscv32_efi.lds @@ -8,70 +8,4 @@ OUTPUT_FORMAT("elf32-littleriscv", "elf32-littleriscv", "elf32-littleriscv") OUTPUT_ARCH(riscv) -PHDRS -{ - data PT_LOAD FLAGS(3); /* SHF_WRITE | SHF_ALLOC */ -} - -ENTRY(_start) -SECTIONS -{ - .text 0x0 : { - _text = .; - *(.text.head) - *(.text) - *(.text.*) - *(.gnu.linkonce.t.*) - *(.srodata) - *(.rodata*) - . = ALIGN(16); - *(.dynamic); - . = ALIGN(512); - } - .rela.dyn : { *(.rela.dyn) } - .rela.plt : { *(.rela.plt) } - .rela.got : { *(.rela.got) } - .rela.data : { *(.rela.data) *(.rela.data*) } - _etext = .; - _text_size = . - _text; - . = ALIGN(4096); - .data : { - _data = .; - *(.sdata) - *(.data) - *(.data1) - *(.data.*) - *(.got.plt) - *(.got) - - /* - * The EFI loader doesn't seem to like a .bss section, so we - * stick it all into .data: - */ - . = ALIGN(16); - _bss = .; - *(.sbss) - *(.scommon) - *(.dynbss) - *(.bss) - *(.bss.*) - *(COMMON) - . = ALIGN(512); - _bss_end = .; - _edata = .; - } :data - _data_size = _edata - _data; - - . = ALIGN(4096); - .dynsym : { *(.dynsym) } - . = ALIGN(4096); - .dynstr : { *(.dynstr) } - . = ALIGN(4096); - .note.gnu.build-id : { *(.note.gnu.build-id) } - /DISCARD/ : { - *(.rel.reloc) - *(.eh_frame) - *(.note.GNU-stack) - } - .comment 0 : { *(.comment) } -} +INCLUDE lib/efi_loader/elf_efi.ldsi diff --git a/arch/riscv/lib/elf_riscv64_efi.lds b/arch/riscv/lib/elf_riscv64_efi.lds index d0b4f3d1d64..8e4844c2eea 100644 --- a/arch/riscv/lib/elf_riscv64_efi.lds +++ b/arch/riscv/lib/elf_riscv64_efi.lds @@ -8,70 +8,4 @@ OUTPUT_FORMAT("elf64-littleriscv", "elf64-littleriscv", "elf64-littleriscv") OUTPUT_ARCH(riscv) -PHDRS -{ - data PT_LOAD FLAGS(3); /* SHF_WRITE | SHF_ALLOC */ -} - -ENTRY(_start) -SECTIONS -{ - .text 0x0 : { - _text = .; - *(.text.head) - *(.text) - *(.text.*) - *(.gnu.linkonce.t.*) - *(.srodata) - *(.rodata*) - . = ALIGN(16); - *(.dynamic); - . = ALIGN(512); - } - .rela.dyn : { *(.rela.dyn) } - .rela.plt : { *(.rela.plt) } - .rela.got : { *(.rela.got) } - .rela.data : { *(.rela.data) *(.rela.data*) } - _etext = .; - _text_size = . - _text; - . = ALIGN(4096); - .data : { - _data = .; - *(.sdata) - *(.data) - *(.data1) - *(.data.*) - *(.got.plt) - *(.got) - - /* - * The EFI loader doesn't seem to like a .bss section, so we - * stick it all into .data: - */ - . = ALIGN(16); - _bss = .; - *(.sbss) - *(.scommon) - *(.dynbss) - *(.bss) - *(.bss.*) - *(COMMON) - . = ALIGN(512); - _bss_end = .; - _edata = .; - } :data - _data_size = _edata - _data; - - . = ALIGN(4096); - .dynsym : { *(.dynsym) } - . = ALIGN(4096); - .dynstr : { *(.dynstr) } - . = ALIGN(4096); - .note.gnu.build-id : { *(.note.gnu.build-id) } - /DISCARD/ : { - *(.rel.reloc) - *(.eh_frame) - *(.note.GNU-stack) - } - .comment 0 : { *(.comment) } -} +INCLUDE lib/efi_loader/elf_efi.ldsi diff --git a/arch/sandbox/config.mk b/arch/sandbox/config.mk index 405843800e9..dd9b7473fa9 100644 --- a/arch/sandbox/config.mk +++ b/arch/sandbox/config.mk @@ -22,7 +22,9 @@ SANITIZERS += -fsanitize=fuzzer endif KBUILD_CFLAGS += $(SANITIZERS) -cmd_u-boot__ = $(CC) -o $@ -Wl,-T u-boot.lds $(u-boot-init) \ +cmd_u-boot__ = \ + touch $(u-boot-main) ; \ + $(CC) -o $@ -Wl,-T u-boot.lds $(u-boot-init) \ $(KBUILD_LDFLAGS:%=-Wl,%) \ $(SANITIZERS) \ $(LTO_FINAL_LDFLAGS) \ @@ -32,7 +34,9 @@ cmd_u-boot__ = $(CC) -o $@ -Wl,-T u-boot.lds $(u-boot-init) \ -Wl,--no-whole-archive \ $(PLATFORM_LIBS) -Wl,-Map -Wl,u-boot.map -Wl,--gc-sections -cmd_u-boot-spl = (cd $(obj) && $(CC) -o $(SPL_BIN) -Wl,-T u-boot-spl.lds \ +cmd_u-boot-spl = (cd $(obj) && \ + touch $(patsubst $(obj)/%,%,$(u-boot-spl-main)) && \ + $(CC) -o $(SPL_BIN) -Wl,-T u-boot-spl.lds \ $(KBUILD_LDFLAGS:%=-Wl,%) \ $(SANITIZERS) \ $(LTO_FINAL_LDFLAGS) \ diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h index 8c1ef4c8cc1..fd389d4024c 100644 --- a/arch/x86/include/asm/cpu.h +++ b/arch/x86/include/asm/cpu.h @@ -284,15 +284,6 @@ u32 cpu_get_family_model(void); */ u32 cpu_get_stepping(void); -/** - * cpu_phys_address_size() - Get the physical address size in bits - * - * This is 32 for older CPUs but newer ones may support 36. - * - * Return: address size (typically 32 or 36) - */ -int cpu_phys_address_size(void); - void board_final_init(void); void board_final_cleanup(void); diff --git a/arch/x86/lib/bdinfo.c b/arch/x86/lib/bdinfo.c index 2a78f578dee..4b016d4a0fc 100644 --- a/arch/x86/lib/bdinfo.c +++ b/arch/x86/lib/bdinfo.c @@ -5,6 +5,7 @@ * Copyright 2021 Google LLC */ +#include <cpu.h> #include <efi.h> #include <init.h> #include <asm/cpu.h> @@ -32,6 +33,8 @@ void arch_print_bdinfo(void) bdinfo_print_num_l(" high start", gd->arch.table_start_high); bdinfo_print_num_l(" high end", gd->arch.table_end_high); + bdinfo_print_num_ll("tsc", rdtsc()); + if (IS_ENABLED(CONFIG_EFI_STUB)) efi_show_bdinfo(); } diff --git a/arch/x86/lib/bootm.c b/arch/x86/lib/bootm.c index 0cf3824d203..0827a884b1d 100644 --- a/arch/x86/lib/bootm.c +++ b/arch/x86/lib/bootm.c @@ -105,8 +105,8 @@ static int boot_prep_linux(struct bootm_headers *images) #if defined(CONFIG_FIT) } else if (images->fit_uname_os && is_zimage) { ret = fit_image_get_data(images->fit_hdr_os, - images->fit_noffset_os, - (const void **)&data, &len); + images->fit_noffset_os, + (const void **)&data, &len); if (ret) { puts("Can't get image data/size!\n"); goto error; @@ -259,3 +259,14 @@ int do_bootm_linux(int flag, struct bootm_info *bmi) return boot_jump_linux(images); } + +int arch_upl_jump(ulong entry, const struct abuf *buf) +{ + typedef EFIAPI void (*h_func)(void *hoff); + h_func func; + + func = (h_func)(ulong)entry; + func(buf->data); + + return -EFAULT; +} diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index f761fbc8bc3..7a033505101 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -298,11 +298,19 @@ void spl_board_init(void) if (IS_ENABLED(CONFIG_QEMU)) qemu_chipset_init(); + if (CONFIG_IS_ENABLED(UPL_OUT)) + gd->flags |= GD_FLG_UPL; + if (CONFIG_IS_ENABLED(VIDEO)) { struct udevice *dev; + int ret; /* Set up PCI video in SPL if required */ - uclass_first_device_err(UCLASS_PCI, &dev); - uclass_first_device_err(UCLASS_VIDEO, &dev); + ret = uclass_first_device_err(UCLASS_PCI, &dev); + if (ret) + panic("Failed to set up PCI"); + ret = uclass_first_device_err(UCLASS_VIDEO, &dev); + if (ret) + panic("Failed to set up video"); } } diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c index 45a70e92763..44fe80c5224 100644 --- a/arch/x86/lib/tables.c +++ b/arch/x86/lib/tables.c @@ -16,6 +16,7 @@ #include <asm/tables.h> #include <asm/coreboot_tables.h> #include <linux/log2.h> +#include <linux/sizes.h> DECLARE_GLOBAL_DATA_PTR; @@ -59,10 +60,14 @@ static struct table_info table_list[] = { * that the calculation of gd->table_end works properly */ #ifdef CONFIG_GENERATE_ACPI_TABLE - { "acpi", write_acpi_tables, BLOBLISTT_ACPI_TABLES, 0x10000, 0x1000}, + { "acpi", write_acpi_tables, BLOBLISTT_ACPI_TABLES, SZ_64K, SZ_4K}, #endif -#if defined(CONFIG_GENERATE_SMBIOS_TABLE) && !defined(CONFIG_QFW_SMBIOS) - { "smbios", write_smbios_table, BLOBLISTT_SMBIOS_TABLES, 0x1000, 0x100}, +#ifdef CONFIG_GENERATE_SMBIOS_TABLE + /* + * align this to a 4K boundary, since UPL adds a reserved-memory node + * for it + */ + { "smbios", write_smbios_table, BLOBLISTT_SMBIOS_TABLES, SZ_4K, SZ_4K}, #endif }; diff --git a/board/aspeed/evb_ast2600/MAINTAINERS b/board/aspeed/evb_ast2600/MAINTAINERS index e83aae5d6ac..5368e8ee5fe 100644 --- a/board/aspeed/evb_ast2600/MAINTAINERS +++ b/board/aspeed/evb_ast2600/MAINTAINERS @@ -4,3 +4,4 @@ S: Maintained F: board/aspeed/evb_ast2600/ F: include/configs/evb_ast2600.h F: configs/evb-ast2600_defconfig +F: configs/ibm-sbp1_defconfig diff --git a/board/canaan/k230_canmv/Kconfig b/board/canaan/k230_canmv/Kconfig new file mode 100644 index 00000000000..e793e9993e8 --- /dev/null +++ b/board/canaan/k230_canmv/Kconfig @@ -0,0 +1,19 @@ +if TARGET_K230_CANMV + +config SYS_BOARD + default "k230_canmv" + +config SYS_VENDOR + default "canaan" + +config SYS_CPU + default "k230" + +config TEXT_BASE + default 0x0 + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select CANAAN_K230 + +endif diff --git a/board/canaan/k230_canmv/MAINTAINERS b/board/canaan/k230_canmv/MAINTAINERS new file mode 100644 index 00000000000..fb925e1b167 --- /dev/null +++ b/board/canaan/k230_canmv/MAINTAINERS @@ -0,0 +1,6 @@ +K230 CANMV +M: Junhui Liu <junhui.liu@pigmoral.tech> +S: Maintained +F: board/canaan/k230_canmv/ +F: configs/k230_canmv_defconfig +F: doc/board/canaan/k230_canmv.rst diff --git a/board/canaan/k230_canmv/Makefile b/board/canaan/k230_canmv/Makefile new file mode 100644 index 00000000000..acab631106a --- /dev/null +++ b/board/canaan/k230_canmv/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (c) 2025, Junhui Liu <junhui.liu@pigmoral.tech> + +obj-y += board.o diff --git a/board/canaan/k230_canmv/board.c b/board/canaan/k230_canmv/board.c new file mode 100644 index 00000000000..a705ee8f67b --- /dev/null +++ b/board/canaan/k230_canmv/board.c @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2025, Junhui Liu <junhui.liu@pigmoral.tech> + */ + +int board_init(void) +{ + return 0; +} diff --git a/board/firefly/firefly-rk3288/MAINTAINERS b/board/firefly/firefly-rk3288/MAINTAINERS index 42db0bd5e1f..174027e770b 100644 --- a/board/firefly/firefly-rk3288/MAINTAINERS +++ b/board/firefly/firefly-rk3288/MAINTAINERS @@ -1,6 +1,7 @@ FIREFLY M: Simon Glass <sjg@chromium.org> S: Maintained +F: arch/arm/dts/rk3288-firefly-u-boot.dtsi F: board/firefly/firefly-rk3288 F: include/configs/firefly-rk3288.h F: configs/firefly-rk3288_defconfig diff --git a/board/firefly/firefly-rk3288/Makefile b/board/firefly/firefly-rk3288/Makefile deleted file mode 100644 index 671684597d2..00000000000 --- a/board/firefly/firefly-rk3288/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -# -# (C) Copyright 2015 Google, Inc -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y += firefly-rk3288.o diff --git a/board/firefly/firefly-rk3288/firefly-rk3288.c b/board/firefly/firefly-rk3288/firefly-rk3288.c deleted file mode 100644 index c65ce5890e5..00000000000 --- a/board/firefly/firefly-rk3288/firefly-rk3288.c +++ /dev/null @@ -1,46 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2015 Google, Inc - */ - -#include <hang.h> -#include <led.h> -#include <log.h> -#include <asm/global_data.h> -#include <dm/ofnode.h> - -#ifdef CONFIG_XPL_BUILD -static int setup_led(void) -{ -#ifdef CONFIG_SPL_LED - struct udevice *dev; - char *led_name; - int ret; - - led_name = ofnode_conf_read_str("u-boot,boot-led"); - if (!led_name) - return 0; - ret = led_get_by_label(led_name, &dev); - if (ret) { - debug("%s: get=%d\n", __func__, ret); - return ret; - } - ret = led_set_state(dev, LEDST_ON); - if (ret) - return ret; -#endif - - return 0; -} - -void spl_board_init(void) -{ - int ret; - - ret = setup_led(); - if (ret) { - debug("LED ret=%d\n", ret); - hang(); - } -} -#endif diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile index c2c86c0dd08..468a06725c1 100644 --- a/board/freescale/common/Makefile +++ b/board/freescale/common/Makefile @@ -59,7 +59,7 @@ obj-$(CONFIG_POWER_PFUZE100) += pfuze.o endif obj-$(CONFIG_DM_PMIC_PFUZE100) += pfuze.o obj-$(CONFIG_POWER_MC34VR500) += mc34vr500.o -ifneq (,$(filter $(SOC), imx8ulp imx9)) +ifneq (,$(filter $(SOC), imx8m imx8ulp imx9)) obj-y += mmc.o endif diff --git a/board/freescale/imx8mm_evk/imx8mm_evk.c b/board/freescale/imx8mm_evk/imx8mm_evk.c index 4c4436af3b1..d41db8d31d8 100644 --- a/board/freescale/imx8mm_evk/imx8mm_evk.c +++ b/board/freescale/imx8mm_evk/imx8mm_evk.c @@ -59,6 +59,9 @@ int board_mmc_get_env_dev(int devno) int board_late_init(void) { + if (IS_ENABLED(CONFIG_ENV_IS_IN_MMC)) + board_late_mmc_env_init(); + if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) { env_set("board_name", "EVK"); env_set("board_rev", "iMX8MM"); diff --git a/board/freescale/imx8mm_evk/imx8mm_evk.env b/board/freescale/imx8mm_evk/imx8mm_evk.env new file mode 100644 index 00000000000..29690e75b15 --- /dev/null +++ b/board/freescale/imx8mm_evk/imx8mm_evk.env @@ -0,0 +1,67 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ + +boot_fdt=try +boot_fit=no +boot_targets=mmc1 mmc2 dhcp +bootm_size=0x10000000 +console=ttymxc1,115200 +fdt_addr_r=0x48000000 +fdtfile=CONFIG_DEFAULT_FDT_FILE +fdtoverlay_addr_r=0x49000000 +initrd_addr=0x48080000 +image=Image +ip_dyn=yes +kernel_addr_r=0x42000000 +loadaddr=CONFIG_SYS_LOAD_ADDR +mmcautodetect=yes +mmcdev=CONFIG_SYS_MMC_ENV_DEV +mmcpart=1 +mmcroot=/dev/mmcblk1p2 rootwait rw +prepare_mcore=setenv mcore_clk clk-imx8mm.mcore_booted; +pxefile_addr_r=0x40100000 +ramdisk_addr_r=0x48080000 +scriptaddr=0x40000000 + +mmcargs=setenv bootargs ${jh_clk} ${mcore_clk} console=${console} root=${mmcroot} +prepare_mcore=setenv mcore_clk clk-imx8mn.mcore_booted +loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image} +loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile} +mmcboot=echo Booting from mmc ...; + run mmcargs; + if test ${boot_fit} = yes || test ${boot_fit} = try; then + bootm ${loadaddr}; + else + if run loadfdt; then + booti ${loadaddr} - ${fdt_addr_r}; + else + echo WARN: Cannot load the DT; + fi; + fi +netargs=setenv bootargs ${jh_clk} ${mcore_clk} console=${console} root=/dev/nfs + ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp +netboot=echo Booting from net ...; + run netargs; + if test ${ip_dyn} = yes; then + setenv get_cmd dhcp; + else + setenv get_cmd tftp; + fi; + ${get_cmd} ${loadaddr} ${image}; + if test ${boot_fit} = yes || test ${boot_fit} = try; then + bootm ${loadaddr}; + else + if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then + booti ${loadaddr} - ${fdt_addr_r}; + else + echo WARN: Cannot load the DT; + fi; + fi; +bsp_bootcmd=echo Running BSP bootcmd ...; + mmc dev ${mmcdev}; + if mmc rescan; then + if run loadimage; then + run mmcboot; + else + run netboot; + fi; + fi; diff --git a/board/freescale/imx8mn_evk/imx8mn_evk.c b/board/freescale/imx8mn_evk/imx8mn_evk.c index 6b6fb0a7dd2..c62d7a47e21 100644 --- a/board/freescale/imx8mn_evk/imx8mn_evk.c +++ b/board/freescale/imx8mn_evk/imx8mn_evk.c @@ -3,14 +3,10 @@ * Copyright 2019 NXP */ +#include <asm/arch/sys_proto.h> +#include <asm/io.h> #include <env.h> #include <init.h> -#include <asm/global_data.h> -#include <miiphy.h> -#include <netdev.h> -#include <asm/io.h> - -DECLARE_GLOBAL_DATA_PTR; int board_mmc_get_env_dev(int devno) { @@ -35,6 +31,10 @@ int board_init(void) int board_late_init(void) { +#if CONFIG_IS_ENABLED(ENV_IS_IN_MMC) + board_late_mmc_env_init(); +#endif + #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG env_set("board_name", "DDR4 EVK"); env_set("board_rev", "iMX8MN"); diff --git a/board/freescale/imx8mn_evk/imx8mn_evk.env b/board/freescale/imx8mn_evk/imx8mn_evk.env new file mode 100644 index 00000000000..16a6543ffc6 --- /dev/null +++ b/board/freescale/imx8mn_evk/imx8mn_evk.env @@ -0,0 +1,67 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ + +boot_fdt=try +boot_fit=no +boot_targets=mmc1 mmc2 dhcp +bootm_size=0x10000000 +console=ttymxc1,115200 +fdt_addr_r=0x48000000 +fdtfile=CONFIG_DEFAULT_FDT_FILE +fdtoverlay_addr_r=0x49000000 +initrd_addr=0x48080000 +image=Image +ip_dyn=yes +kernel_addr_r=0x42000000 +loadaddr=CONFIG_SYS_LOAD_ADDR +mmcautodetect=yes +mmcdev=CONFIG_SYS_MMC_ENV_DEV +mmcpart=1 +mmcroot=/dev/mmcblk1p2 rootwait rw +prepare_mcore=setenv mcore_clk clk-imx8mn.mcore_booted; +pxefile_addr_r=0x40100000 +ramdisk_addr_r=0x48080000 +scriptaddr=0x40000000 + +mmcargs=setenv bootargs ${jh_clk} ${mcore_clk} console=${console} root=${mmcroot} +prepare_mcore=setenv mcore_clk clk-imx8mn.mcore_booted +loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image} +loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile} +mmcboot=echo Booting from mmc ...; + run mmcargs; + if test ${boot_fit} = yes || test ${boot_fit} = try; then + bootm ${loadaddr}; + else + if run loadfdt; then + booti ${loadaddr} - ${fdt_addr_r}; + else + echo WARN: Cannot load the DT; + fi; + fi +netargs=setenv bootargs ${jh_clk} ${mcore_clk} console=${console} root=/dev/nfs + ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp +netboot=echo Booting from net ...; + run netargs; + if test ${ip_dyn} = yes; then + setenv get_cmd dhcp; + else + setenv get_cmd tftp; + fi; + ${get_cmd} ${loadaddr} ${image}; + if test ${boot_fit} = yes || test ${boot_fit} = try; then + bootm ${loadaddr}; + else + if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then + booti ${loadaddr} - ${fdt_addr_r}; + else + echo WARN: Cannot load the DT; + fi; + fi; +bsp_bootcmd=echo Running BSP bootcmd ...; + mmc dev ${mmcdev}; + if mmc rescan; then + if run loadimage; then + run mmcboot; + else + run netboot; + fi; + fi; diff --git a/board/freescale/imx8mp_evk/imx8mp_evk.c b/board/freescale/imx8mp_evk/imx8mp_evk.c index 024b46ef8bc..2ff067bc675 100644 --- a/board/freescale/imx8mp_evk/imx8mp_evk.c +++ b/board/freescale/imx8mp_evk/imx8mp_evk.c @@ -3,6 +3,7 @@ * Copyright 2019 NXP */ +#include <asm/arch/sys_proto.h> #include <env.h> int board_init(void) @@ -12,6 +13,10 @@ int board_init(void) int board_late_init(void) { +#if CONFIG_IS_ENABLED(ENV_IS_IN_MMC) + board_late_mmc_env_init(); +#endif + #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG env_set("board_name", "EVK"); env_set("board_rev", "iMX8MP"); diff --git a/board/freescale/imx8mp_evk/imx8mp_evk.env b/board/freescale/imx8mp_evk/imx8mp_evk.env new file mode 100644 index 00000000000..18f6c6e200e --- /dev/null +++ b/board/freescale/imx8mp_evk/imx8mp_evk.env @@ -0,0 +1,57 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ + +boot_fdt=try +boot_fit=no +boot_targets=mmc1 mmc2 +bootm_size=0x10000000 +console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200 +fdt_addr_r=0x43000000 +fdt_addr=0x43000000 +fdtfile=CONFIG_DEFAULT_FDT_FILE +image=Image +ip_dyn=yes +mmcdev=CONFIG_SYS_MMC_ENV_DEV +mmcpart=1 +mmcroot=/dev/mmcblk1p2 rootwait rw +mmcautodetect=yes +mmcargs=setenv bootargs ${jh_clk} ${mcore_clk} console=${console} root=${mmcroot} +prepare_mcore=setenv mcore_clk clk-imx8mp.mcore_booted +loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image} +loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile} +mmcboot=echo Booting from mmc ...; + run mmcargs; + if test ${boot_fit} = yes || test ${boot_fit} = try; then + bootm ${loadaddr}; + else + if run loadfdt; then + booti ${loadaddr} - ${fdt_addr_r}; + else + echo WARN: Cannot load the DT; + fi; + fi; +netargs=setenv bootargs ${jh_clk} ${mcore_clk} console=${console} root=/dev/nfs + ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp +netboot=echo Booting from net ...; + run netargs; + if test ${ip_dyn} = yes; then + setenv get_cmd dhcp; + else + setenv get_cmd tftp; + fi; + ${get_cmd} ${loadaddr} ${image}; + if test ${boot_fit} = yes || test ${boot_fit} = try; then + bootm ${loadaddr}; + else + if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then + booti ${loadaddr} - ${fdt_addr_r}; + else + echo WARN: Cannot load the DT; + fi; + fi; +bsp_bootcmd=echo Running BSP bootcmd ...; + mmc dev ${mmcdev}; + if run loadimage; then + run mmcboot; + else + run netboot; + fi; diff --git a/board/freescale/imx8mq_evk/imx8mq_evk.c b/board/freescale/imx8mq_evk/imx8mq_evk.c index ab920a4539c..18e83d90a08 100644 --- a/board/freescale/imx8mq_evk/imx8mq_evk.c +++ b/board/freescale/imx8mq_evk/imx8mq_evk.c @@ -3,30 +3,11 @@ * Copyright 2018 NXP */ -#include <env.h> -#include <init.h> -#include <malloc.h> -#include <errno.h> -#include <asm/global_data.h> -#include <asm/io.h> -#include <miiphy.h> -#include <netdev.h> -#include <asm/mach-imx/iomux-v3.h> -#include <asm-generic/gpio.h> -#include <fsl_esdhc_imx.h> -#include <mmc.h> +#include <asm/arch/clock.h> #include <asm/arch/imx8mq_pins.h> #include <asm/arch/sys_proto.h> -#include <asm/mach-imx/gpio.h> -#include <asm/mach-imx/mxc_i2c.h> -#include <asm/arch/clock.h> -#include <spl.h> -#include <linux/bitops.h> -#include <power/pmic.h> -#include <power/pfuze100_pmic.h> -#include "../common/pfuze.h" - -DECLARE_GLOBAL_DATA_PTR; +#include <asm/mach-imx/iomux-v3.h> +#include <env.h> #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1) @@ -69,6 +50,10 @@ int board_mmc_get_env_dev(int devno) int board_late_init(void) { +#if CONFIG_IS_ENABLED(ENV_IS_IN_MMC) + board_late_mmc_env_init(); +#endif + #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG env_set("board_name", "EVK"); env_set("board_rev", "iMX8MQ"); diff --git a/board/freescale/imx8mq_evk/imx8mq_evk.env b/board/freescale/imx8mq_evk/imx8mq_evk.env new file mode 100644 index 00000000000..dcfe1c2f2d4 --- /dev/null +++ b/board/freescale/imx8mq_evk/imx8mq_evk.env @@ -0,0 +1,60 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ + +boot_fdt=try +boot_targets=mmc1 mmc2 dhcp +bootm_size=0x10000000 +console=ttymxc0,115200 +fdt_addr_r=0x43000000 +fdtfile=CONFIG_DEFAULT_FDT_FILE +initrd_addr=0x43800000 +image=Image +ip_dyn=yes +kernel_addr_r=CONFIG_SYS_LOAD_ADDR +loadaddr=CONFIG_SYS_LOAD_ADDR +mmcautodetect=yes +mmcdev=CONFIG_SYS_MMC_ENV_DEV +mmcpart=1 +mmcroot=/dev/mmcblk1p2 rootwait rw +prepare_mcore=setenv mcore_clk clk-imx8mq.mcore_booted; +scriptaddr=CONFIG_SYS_LOAD_ADDR + +mmcargs=setenv bootargs ${jh_clk} ${mcore_clk} console=${console} root=${mmcroot} +loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image} +loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile} +mmcboot=echo Booting from mmc ...; + run mmcargs; + if test ${boot_fdt} = yes || test ${boot_fdt} = try; then + if run loadfdt; then + booti ${loadaddr} - ${fdt_addr_r}; + else + echo WARN: Cannot load the DT; + fi; + else + echo wait for boot; + fi; +netargs=setenv bootargs ${jh_clk} ${mcore_clk} console=${console} root=/dev/nfs + ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp +netboot=echo Booting from net ...; + run netargs; + if test ${ip_dyn} = yes; then + setenv get_cmd dhcp; + else + setenv get_cmd tftp; + fi; + ${get_cmd} ${loadaddr} ${image}; + if test ${boot_fdt} = yes || test ${boot_fit} = try; then + if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then + booti ${loadaddr} - ${fdt_addr_r}; + else + echo WARN: Cannot load the DT; + fi; + fi; +bsp_bootcmd=echo Running BSP bootcmd ...; + mmc dev ${mmcdev}; + if mmc rescan; then + if run loadimage; then + run mmcboot; + else + run netboot; + fi; + fi; diff --git a/board/freescale/imx91_evk/imx91_evk.env b/board/freescale/imx91_evk/imx91_evk.env index 92486c6f74d..c972d3eb251 100644 --- a/board/freescale/imx91_evk/imx91_evk.env +++ b/board/freescale/imx91_evk/imx91_evk.env @@ -10,6 +10,7 @@ fdt_addr_r=0x83000000 fdt_addr=0x83000000 fdtfile=CONFIG_DEFAULT_FDT_FILE image=Image +mmcdev=CONFIG_SYS_MMC_ENV_DEV mmcpart=1 mmcroot=/dev/mmcblk1p2 rootwait rw mmcautodetect=yes @@ -19,12 +20,13 @@ loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image} loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile} loadcntr=fatload mmc ${mmcdev}:${mmcpart} ${cntr_addr} ${cntr_file} auth_os=auth_cntr ${cntr_addr} +sec_boot=no boot_os=booti ${loadaddr} - ${fdt_addr_r} mmcboot= echo Booting from mmc ...; run mmcargs; if test ${sec_boot} = yes; then - if run auth_os; then + if run true; then run boot_os; else echo ERR: failed to authenticate; @@ -48,7 +50,7 @@ netboot= fi; if test ${sec_boot} = yes; then ${get_cmd} ${cntr_addr} ${cntr_file}; - if run auth_os; then + if true; then run boot_os; else echo ERR: failed to authenticate; @@ -61,3 +63,26 @@ netboot= echo WARN: Cannot load the DT; fi; fi; +bsp_bootcmd= + echo Running BSP bootcmd ...; + mmc dev ${mmcdev}; + if mmc rescan; then + if run loadbootscript; then + run bootscript; + else + if test ${sec_boot} = yes; then + if run loadcntr; then + run mmcboot; + else + run netboot; + fi; + else + if run loadimage; then + run mmcboot; + else + run netboot; + fi; + fi; + fi; + fi; +scriptaddr=0x83500000 diff --git a/board/freescale/imx93_evk/imx93_evk.env b/board/freescale/imx93_evk/imx93_evk.env new file mode 100644 index 00000000000..f692f42f78a --- /dev/null +++ b/board/freescale/imx93_evk/imx93_evk.env @@ -0,0 +1,88 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ + +boot_targets=mmc0 mmc1 +boot_fit=no +bootm_size=0x10000000 +cntr_addr=0x98000000 +cntr_file=os_cntr_signed.bin +console=ttyLP0,115200 earlycon +fdt_addr_r=0x83000000 +fdt_addr=0x83000000 +fdtfile=CONFIG_DEFAULT_FDT_FILE +image=Image +mmcdev=CONFIG_SYS_MMC_ENV_DEV +mmcpart=1 +mmcroot=/dev/mmcblk1p2 rootwait rw +mmcautodetect=yes +mmcargs=setenv bootargs ${jh_clk} ${mcore_clk} console=${console} root=${mmcroot} +prepare_mcore=setenv mcore_clk clk-imx93.mcore_booted +loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image} +loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile} +loadcntr=fatload mmc ${mmcdev}:${mmcpart} ${cntr_addr} ${cntr_file} +auth_os=auth_cntr ${cntr_addr} +sec_boot=no +boot_os=booti ${loadaddr} - ${fdt_addr_r} +mmcboot= + echo Booting from mmc ...; + run mmcargs; + if test ${sec_boot} = yes; then + if true; then + run boot_os; + else + echo ERR: failed to authenticate; + fi; + else + if run loadfdt; then + run boot_os; + else + echo WARN: Cannot load the DT; + fi; + fi; +netargs=setenv bootargs ${jh_clk} ${mcore_clk} console=${console} root=/dev/nfs + ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp +netboot= + echo Booting from net ...; + run netargs; + if test ${ip_dyn} = yes; then + setenv get_cmd dhcp; + else + setenv get_cmd tftp; + fi; + if test ${sec_boot} = yes; then + ${get_cmd} ${cntr_addr} ${cntr_file}; + if true; then + run boot_os; + else + echo ERR: failed to authenticate; + fi; + else + ${get_cmd} ${loadaddr} ${image}; + if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then + run boot_os; + else + echo WARN: Cannot load the DT; + fi; + fi; +bsp_bootcmd= + echo Running BSP bootcmd ...; + mmc dev ${mmcdev}; + if mmc rescan; then + if run loadbootscript; then + run bootscript; + else + if test ${sec_boot} = yes; then + if run loadcntr; then + run mmcboot; + else + run netboot; + fi; + else + if run loadimage; then + run mmcboot; + else + run netboot; + fi; + fi; + fi; + fi; +scriptaddr=0x83500000 diff --git a/board/freescale/imx93_qsb/imx93_qsb.env b/board/freescale/imx93_qsb/imx93_qsb.env index 92486c6f74d..c972d3eb251 100644 --- a/board/freescale/imx93_qsb/imx93_qsb.env +++ b/board/freescale/imx93_qsb/imx93_qsb.env @@ -10,6 +10,7 @@ fdt_addr_r=0x83000000 fdt_addr=0x83000000 fdtfile=CONFIG_DEFAULT_FDT_FILE image=Image +mmcdev=CONFIG_SYS_MMC_ENV_DEV mmcpart=1 mmcroot=/dev/mmcblk1p2 rootwait rw mmcautodetect=yes @@ -19,12 +20,13 @@ loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image} loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile} loadcntr=fatload mmc ${mmcdev}:${mmcpart} ${cntr_addr} ${cntr_file} auth_os=auth_cntr ${cntr_addr} +sec_boot=no boot_os=booti ${loadaddr} - ${fdt_addr_r} mmcboot= echo Booting from mmc ...; run mmcargs; if test ${sec_boot} = yes; then - if run auth_os; then + if run true; then run boot_os; else echo ERR: failed to authenticate; @@ -48,7 +50,7 @@ netboot= fi; if test ${sec_boot} = yes; then ${get_cmd} ${cntr_addr} ${cntr_file}; - if run auth_os; then + if true; then run boot_os; else echo ERR: failed to authenticate; @@ -61,3 +63,26 @@ netboot= echo WARN: Cannot load the DT; fi; fi; +bsp_bootcmd= + echo Running BSP bootcmd ...; + mmc dev ${mmcdev}; + if mmc rescan; then + if run loadbootscript; then + run bootscript; + else + if test ${sec_boot} = yes; then + if run loadcntr; then + run mmcboot; + else + run netboot; + fi; + else + if run loadimage; then + run mmcboot; + else + run netboot; + fi; + fi; + fi; + fi; +scriptaddr=0x83500000 diff --git a/board/friendlyelec/nanopc-t6-rk3588/MAINTAINERS b/board/friendlyelec/nanopc-t6-rk3588/MAINTAINERS index 63ff6fafc8d..27853188e59 100644 --- a/board/friendlyelec/nanopc-t6-rk3588/MAINTAINERS +++ b/board/friendlyelec/nanopc-t6-rk3588/MAINTAINERS @@ -5,5 +5,4 @@ S: Maintained F: board/friendlyelec/nanopc-t6-rk3588 F: include/configs/nanopc-t6-rk3588.h F: configs/nanopc-t6-rk3588_defconfig -F: arch/arm/dts/rk3588-nanopc-t6.dts -F: arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi +F: arch/arm/dts/rk3588-nanopc-t6* diff --git a/board/hoperun/hihope-rzg2/hihope-rzg2.c b/board/hoperun/hihope-rzg2/hihope-rzg2.c index 8b635ef71ac..d2c5aaacf66 100644 --- a/board/hoperun/hihope-rzg2/hihope-rzg2.c +++ b/board/hoperun/hihope-rzg2/hihope-rzg2.c @@ -6,6 +6,7 @@ * Copyright (C) 2021 Renesas Electronics Corporation */ +#include <asm/armv8/cpu.h> #include <asm/global_data.h> #include <asm/io.h> #include <asm/processor.h> @@ -66,12 +67,7 @@ int board_init(void) void reset_cpu(void) { - unsigned long midr, cputype; - - asm volatile("mrs %0, midr_el1" : "=r" (midr)); - cputype = (midr >> 4) & 0xfff; - - if (cputype == 0xd03) + if (is_cortex_a53()) writel(RST_CA53_CODE, RST_CA53RESCNT); else writel(RST_CA57_CODE, RST_CA57RESCNT); diff --git a/board/khadas/khadas-edge2-rk3588s/Kconfig b/board/khadas/khadas-edge2-rk3588s/Kconfig new file mode 100644 index 00000000000..dd7b6cd8054 --- /dev/null +++ b/board/khadas/khadas-edge2-rk3588s/Kconfig @@ -0,0 +1,12 @@ +if TARGET_KHADAS_EDGE2_RK3588 + +config SYS_BOARD + default "khadas-edge2-rk3588s" + +config SYS_VENDOR + default "khadas" + +config SYS_CONFIG_NAME + default "khadas-edge2-rk3588s" + +endif diff --git a/board/khadas/khadas-edge2-rk3588s/MAINTAINERS b/board/khadas/khadas-edge2-rk3588s/MAINTAINERS new file mode 100644 index 00000000000..3f16923b0f2 --- /dev/null +++ b/board/khadas/khadas-edge2-rk3588s/MAINTAINERS @@ -0,0 +1,6 @@ +KHADAS-EDGE2-RK3588S +M: Jacobe Zang <jacobe.zang@wesion.com> +S: Maintained +F: configs/khadas-edge2-rk3588s_defconfig +F: include/configs/khadas-edge2-rk3588s.h +F: dts/upstream/src/arm64/rockchip/rk3588s-khadas-edge2.dts
\ No newline at end of file diff --git a/board/mediatek/mt7622/mt7622_rfb.c b/board/mediatek/mt7622/mt7622_rfb.c index e7f492a13bc..9d24c8cd412 100644 --- a/board/mediatek/mt7622/mt7622_rfb.c +++ b/board/mediatek/mt7622/mt7622_rfb.c @@ -15,10 +15,3 @@ int board_init(void) { return 0; } - -int board_late_init(void) -{ - gd->env_valid = 1; //to load environment variable from persistent store - env_relocate(); - return 0; -} diff --git a/board/mqmaker/miqi_rk3288/MAINTAINERS b/board/mqmaker/miqi_rk3288/MAINTAINERS index 1cb5f790fe7..d7e55b02fe3 100644 --- a/board/mqmaker/miqi_rk3288/MAINTAINERS +++ b/board/mqmaker/miqi_rk3288/MAINTAINERS @@ -1,7 +1,6 @@ MIQI M: Jernej Skrabec <jernej.skrabec@siol.net> S: Maintained -F: arch/arm/dts/rk3288-miqi.dts F: arch/arm/dts/rk3288-miqi-u-boot.dtsi F: board/mqmaker/miqi_rk3288 F: include/configs/miqi_rk3288.h diff --git a/board/phytec/common/k3/board.c b/board/phytec/common/k3/board.c index 9ff861cd3f4..ebdd5fb2abe 100644 --- a/board/phytec/common/k3/board.c +++ b/board/phytec/common/k3/board.c @@ -148,6 +148,12 @@ int board_late_init(void) case BOOT_DEVICE_ETHERNET: env_set("boot", "net"); break; + case BOOT_DEVICE_UART: + env_set("boot", "uart"); + break; + case BOOT_DEVICE_DFU: + env_set("boot", "usbdfu"); + break; }; if (IS_ENABLED(CONFIG_PHYTEC_SOM_DETECTION_BLOCKS)) { diff --git a/board/phytec/phycore_am62x/phycore-am62x.c b/board/phytec/phycore_am62x/phycore-am62x.c index a0e098e010e..b199fdaa59b 100644 --- a/board/phytec/phycore_am62x/phycore-am62x.c +++ b/board/phytec/phycore_am62x/phycore-am62x.c @@ -7,6 +7,7 @@ #include <asm/arch/hardware.h> #include <asm/io.h> #include <spl.h> +#include <asm/arch/k3-ddr.h> #include <fdt_support.h> #include "phycore-ddr-data.h" @@ -97,6 +98,8 @@ int dram_init_banksize(void) { u8 ram_size; + memset(gd->bd->bi_dram, 0, sizeof(gd->bd->bi_dram[0]) * CONFIG_NR_DRAM_BANKS); + if (!IS_ENABLED(CONFIG_CPU_V7R)) return fdtdec_setup_memory_banksize(); @@ -178,17 +181,11 @@ int update_ddrss_timings(void) int do_board_detect(void) { - return update_ddrss_timings(); -} -#endif - -#if IS_ENABLED(CONFIG_XPL_BUILD) -void spl_perform_fixups(struct spl_image_info *spl_image) -{ + int ret; + void *fdt = (void *)gd->fdt_blob; + int bank; u64 start[CONFIG_NR_DRAM_BANKS]; u64 size[CONFIG_NR_DRAM_BANKS]; - int bank; - int ret; dram_init(); dram_init_banksize(); @@ -198,7 +195,21 @@ void spl_perform_fixups(struct spl_image_info *spl_image) size[bank] = gd->bd->bi_dram[bank].size; } - ret = fdt_fixup_memory_banks(spl_image->fdt_addr, start, size, CONFIG_NR_DRAM_BANKS); + ret = fdt_fixup_memory_banks(fdt, start, size, CONFIG_NR_DRAM_BANKS); + if (ret) + return ret; + + return update_ddrss_timings(); +} +#endif + +#if IS_ENABLED(CONFIG_XPL_BUILD) +void spl_perform_fixups(struct spl_image_info *spl_image) +{ + if (IS_ENABLED(CONFIG_K3_DDRSS) && IS_ENABLED(CONFIG_K3_INLINE_ECC)) + fixup_ddr_driver_for_ecc(spl_image); + else + fixup_memory_node(spl_image); } #endif diff --git a/board/phytec/phycore_imx8mm/MAINTAINERS b/board/phytec/phycore_imx8mm/MAINTAINERS index 58c5e2d0af9..7631e1cb331 100644 --- a/board/phytec/phycore_imx8mm/MAINTAINERS +++ b/board/phytec/phycore_imx8mm/MAINTAINERS @@ -9,5 +9,6 @@ F: configs/imx8mm-phygate-tauri-l_defconfig F: configs/phycore-imx8mm_defconfig F: doc/board/phytec/imx8mm-phygate-tauri-l.rst F: doc/board/phytec/index.rst +F: doc/board/phytec/imx8mm-optee-build.rsti F: doc/board/phytec/phycore_imx8mm.rst F: include/configs/phycore_imx8mm.h diff --git a/board/phytec/phycore_imx8mp/spl.c b/board/phytec/phycore_imx8mp/spl.c index 0610d8bbd0b..cb8e450b995 100644 --- a/board/phytec/phycore_imx8mp/spl.c +++ b/board/phytec/phycore_imx8mp/spl.c @@ -165,6 +165,8 @@ int power_init_board(void) void spl_board_init(void) { + arch_misc_init(); + /* Set GIC clock to 500Mhz for OD VDD_SOC. */ clock_enable(CCGR_GIC, 0); clock_set_target_val(GIC_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(5)); diff --git a/board/radxa/rock-5c-rk3588s/Kconfig b/board/radxa/rock-5c-rk3588s/Kconfig new file mode 100644 index 00000000000..ec964bdcb93 --- /dev/null +++ b/board/radxa/rock-5c-rk3588s/Kconfig @@ -0,0 +1,12 @@ +if TARGET_ROCK_5C_RK3588S + +config SYS_BOARD + default "rock-5c-rk3588s" + +config SYS_VENDOR + default "radxa" + +config SYS_CONFIG_NAME + default "rock-5c-rk3588s" + +endif diff --git a/board/radxa/rock-5c-rk3588s/MAINTAINERS b/board/radxa/rock-5c-rk3588s/MAINTAINERS new file mode 100644 index 00000000000..17183c739d6 --- /dev/null +++ b/board/radxa/rock-5c-rk3588s/MAINTAINERS @@ -0,0 +1,7 @@ +ROCK-5C-RK3588S +M: FUKAUMI Naoki <naoki@radxa.com> +S: Maintained +F: arch/arm/dts/rk3588s-rock-5c-u-boot.dtsi +F: board/radxa/rock-5c-rk3588s/ +F: configs/rock-5c-rk3588s_defconfig +F: include/configs/rock-5c-rk3588s.h diff --git a/board/radxa/rockpi4-rk3399/MAINTAINERS b/board/radxa/rockpi4-rk3399/MAINTAINERS index da5273fb9a3..f50d9289ed6 100644 --- a/board/radxa/rockpi4-rk3399/MAINTAINERS +++ b/board/radxa/rockpi4-rk3399/MAINTAINERS @@ -15,7 +15,7 @@ F: configs/rock-4c-plus-rk3399_defconfig F: arch/arm/dts/rk3399-rock-4c-plus* ROCK-4SE -M: Christopher Obbard <chris.obbard@collabora.com> +M: Christopher Obbard <christopher.obbard@linaro.org> R: Jonas Karlman <jonas@kwiboo.se> S: Maintained F: configs/rock-4se-rk3399_defconfig diff --git a/board/radxa/rockpi4-rk3399/rockpi4-rk3399.c b/board/radxa/rockpi4-rk3399/rockpi4-rk3399.c index fd827467b30..856b434df36 100644 --- a/board/radxa/rockpi4-rk3399/rockpi4-rk3399.c +++ b/board/radxa/rockpi4-rk3399/rockpi4-rk3399.c @@ -52,6 +52,8 @@ void rockchip_capsule_update_board_setup(void) fw_images[0].fw_name = u"ROCKPI4C-IDBLOADER"; fw_images[1].fw_name = u"ROCKPI4C-UBOOT"; + } else { + update_info.num_images = 0; } } #endif /* CONFIG_EFI_HAVE_CAPSULE_SUPPORT && CONFIG_EFI_PARTITION */ diff --git a/board/renesas/rcar-common/gen3-common.c b/board/renesas/rcar-common/gen3-common.c index 4291e1d5bcb..004feca6180 100644 --- a/board/renesas/rcar-common/gen3-common.c +++ b/board/renesas/rcar-common/gen3-common.c @@ -7,6 +7,7 @@ * Copyright (C) 2015 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> */ +#include <asm/armv8/cpu.h> #include <dm.h> #include <fdt_support.h> #include <hang.h> @@ -50,14 +51,9 @@ int fdtdec_board_setup(const void *fdt_blob) void __weak reset_cpu(void) { - unsigned long midr, cputype; - - asm volatile("mrs %0, midr_el1" : "=r" (midr)); - cputype = (midr >> 4) & 0xfff; - - if (cputype == 0xd03) + if (is_cortex_a53()) writel(RST_CA53_CODE, RST_CA53RESCNT); - else if (cputype == 0xd07) + else if (is_cortex_a57()) writel(RST_CA57_CODE, RST_CA57RESCNT); else hang(); diff --git a/board/rockchip/evb_rk3568/MAINTAINERS b/board/rockchip/evb_rk3568/MAINTAINERS index 588134ecb27..b2780401a39 100644 --- a/board/rockchip/evb_rk3568/MAINTAINERS +++ b/board/rockchip/evb_rk3568/MAINTAINERS @@ -28,6 +28,13 @@ F: configs/lubancat-2-rk3568_defconfig F: arch/arm/dts/rk3568-lubancat-2.dts F: arch/arm/dts/rk3568-lubancat-2-u-boot.dtsi +NANOPI-R3S +M: Tianling Shen <cnsztl@gmail.com> +R: Jonas Karlman <jonas@kwiboo.se> +S: Maintained +F: configs/nanopi-r3s-rk3566_defconfig +F: arch/arm/dts/rk3566-nanopi-r3s-u-boot.dtsi + NANOPI-R5C M: Tianling Shen <cnsztl@gmail.com> R: Jonas Karlman <jonas@kwiboo.se> diff --git a/board/rockchip/tinker_rk3288/MAINTAINERS b/board/rockchip/tinker_rk3288/MAINTAINERS index 3869d5dc853..ab1ce72a77b 100644 --- a/board/rockchip/tinker_rk3288/MAINTAINERS +++ b/board/rockchip/tinker_rk3288/MAINTAINERS @@ -1,10 +1,7 @@ TINKER-RK3288 M: Lin Huang <hl@rock-chips.com> +R: Jonas Karlman <jonas@kwiboo.se> S: Maintained -F: arch/arm/dts/rk3288-tinker.dts -F: arch/arm/dts/rk3288-tinker.dtsi -F: arch/arm/dts/rk3288-tinker-s.dts -F: arch/arm/dts/rk3288-tinker-s-u-boot.dtsi F: arch/arm/dts/rk3288-tinker-u-boot.dtsi F: board/rockchip/tinker_rk3288 F: include/configs/tinker_rk3288.h @@ -12,7 +9,9 @@ F: configs/tinker-rk3288_defconfig TINKER-S-RK3288 M: Michael Trimarchi <michael@amarulasolutions.com> +R: Jonas Karlman <jonas@kwiboo.se> S: Maintained +F: arch/arm/dts/rk3288-tinker-s-u-boot.dtsi F: board/rockchip/tinker_rk3288 F: include/configs/tinker_rk3288.h F: configs/tinker-s-rk3288_defconfig diff --git a/board/rockchip/tinker_rk3288/tinker-rk3288.c b/board/rockchip/tinker_rk3288/tinker-rk3288.c index e966e9f201a..dfd553d1aa5 100644 --- a/board/rockchip/tinker_rk3288/tinker-rk3288.c +++ b/board/rockchip/tinker_rk3288/tinker-rk3288.c @@ -22,7 +22,7 @@ static int get_ethaddr_from_eeprom(u8 *addr) return i2c_eeprom_read(dev, 0, addr, 6); } -int rk3288_board_late_init(void) +int rockchip_early_misc_init_r(void) { u8 ethaddr[6]; diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 824c322a0dc..c7a2205ed61 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -14,6 +14,7 @@ #include <dm.h> #include <env.h> #include <hang.h> +#include <i2c.h> #include <image.h> #include <init.h> #include <log.h> @@ -577,7 +578,6 @@ void sunxi_board_init(void) #ifdef CONFIG_AXP_DCDC1_VOLT power_failed |= axp_set_dcdc1(CONFIG_AXP_DCDC1_VOLT); - power_failed |= axp_set_dcdc5(CONFIG_AXP_DCDC5_VOLT); #endif #ifdef CONFIG_AXP_DCDC2_VOLT power_failed |= axp_set_dcdc2(CONFIG_AXP_DCDC2_VOLT); @@ -586,6 +586,9 @@ void sunxi_board_init(void) #ifdef CONFIG_AXP_DCDC4_VOLT power_failed |= axp_set_dcdc4(CONFIG_AXP_DCDC4_VOLT); #endif +#ifdef CONFIG_AXP_DCDC5_VOLT + power_failed |= axp_set_dcdc5(CONFIG_AXP_DCDC5_VOLT); +#endif #ifdef CONFIG_AXP_ALDO1_VOLT power_failed |= axp_set_aldo1(CONFIG_AXP_ALDO1_VOLT); @@ -876,6 +879,27 @@ static void bluetooth_dt_fixup(void *blob) "local-bd-address", bdaddr, ETH_ALEN, 1); } +#define PINEPHONE_LIS3MDL_I2C_ADDR 0x1e +#define PINEPHONE_LIS3MDL_I2C_BUS 1 /* I2C1 */ + +static void board_dt_fixup(void *blob) +{ + struct udevice *bus, *dev; + + if (IS_ENABLED(CONFIG_PINEPHONE_DT_SELECTION) && + !fdt_node_check_compatible(blob, 0, "pine64,pinephone-1.2")) { + if (!uclass_get_device_by_seq(UCLASS_I2C, + PINEPHONE_LIS3MDL_I2C_BUS, + &bus)) { + dm_i2c_probe(bus, PINEPHONE_LIS3MDL_I2C_ADDR, 0, &dev); + fdt_set_status_by_compatible(blob, "st,lis3mdl-magn", + dev ? FDT_STATUS_OKAY : FDT_STATUS_DISABLED); + fdt_set_status_by_compatible(blob, "voltafield,af8133j", + dev ? FDT_STATUS_DISABLED : FDT_STATUS_OKAY); + } + } +} + int ft_board_setup(void *blob, struct bd_info *bd) { int __maybe_unused r; @@ -889,6 +913,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) fdt_fixup_ethernet(blob); bluetooth_dt_fixup(blob); + board_dt_fixup(blob); #ifdef CONFIG_VIDEO_DT_SIMPLEFB r = sunxi_simplefb_setup(blob); diff --git a/board/ti/am62ax/evm.c b/board/ti/am62ax/evm.c index 62d3664936e..3351544c5b3 100644 --- a/board/ti/am62ax/evm.c +++ b/board/ti/am62ax/evm.c @@ -12,6 +12,7 @@ #include <env.h> #include <fdt_support.h> #include <spl.h> +#include <asm/arch/k3-ddr.h> #include "../common/fdt_ops.h" @@ -20,15 +21,17 @@ int board_init(void) return 0; } -int dram_init(void) +#if defined(CONFIG_XPL_BUILD) +void spl_perform_fixups(struct spl_image_info *spl_image) { - return fdtdec_setup_mem_size_base(); -} - -int dram_init_banksize(void) -{ - return fdtdec_setup_memory_banksize(); + if (IS_ENABLED(CONFIG_K3_DDRSS)) { + if (IS_ENABLED(CONFIG_K3_INLINE_ECC)) + fixup_ddr_driver_for_ecc(spl_image); + } else { + fixup_memory_node(spl_image); + } } +#endif #ifdef CONFIG_BOARD_LATE_INIT int board_late_init(void) diff --git a/board/ti/am62px/evm.c b/board/ti/am62px/evm.c index 7362fa4520a..75359fa1614 100644 --- a/board/ti/am62px/evm.c +++ b/board/ti/am62px/evm.c @@ -13,6 +13,7 @@ #include <env.h> #include <fdt_support.h> #include <spl.h> +#include <asm/arch/k3-ddr.h> #include "../common/fdt_ops.h" struct efi_fw_image fw_images[] = { @@ -53,15 +54,17 @@ int board_init(void) return 0; } -int dram_init(void) +#if defined(CONFIG_XPL_BUILD) +void spl_perform_fixups(struct spl_image_info *spl_image) { - return fdtdec_setup_mem_size_base(); -} - -int dram_init_banksize(void) -{ - return fdtdec_setup_memory_banksize(); + if (IS_ENABLED(CONFIG_K3_DDRSS)) { + if (IS_ENABLED(CONFIG_K3_INLINE_ECC)) + fixup_ddr_driver_for_ecc(spl_image); + } else { + fixup_memory_node(spl_image); + } } +#endif #if IS_ENABLED(CONFIG_BOARD_LATE_INIT) int board_late_init(void) diff --git a/board/ti/am62x/evm.c b/board/ti/am62x/evm.c index 9075df01cac..279ceba9554 100644 --- a/board/ti/am62x/evm.c +++ b/board/ti/am62x/evm.c @@ -20,6 +20,7 @@ #include <asm/io.h> #include <asm/arch/hardware.h> #include <dm/uclass.h> +#include <asm/arch/k3-ddr.h> #include "../common/fdt_ops.h" @@ -86,11 +87,6 @@ int board_init(void) return 0; } -int dram_init(void) -{ - return fdtdec_setup_mem_size_base(); -} - #ifdef CONFIG_BOARD_LATE_INIT int board_late_init(void) { @@ -99,13 +95,7 @@ int board_late_init(void) } #endif -int dram_init_banksize(void) -{ - return fdtdec_setup_memory_banksize(); -} - #if defined(CONFIG_XPL_BUILD) - void spl_board_init(void) { enable_caches(); @@ -114,53 +104,14 @@ void spl_board_init(void) } -#if defined(CONFIG_K3_AM64_DDRSS) -static void fixup_ddr_driver_for_ecc(struct spl_image_info *spl_image) -{ - struct udevice *dev; - int ret; - - dram_init_banksize(); - - ret = uclass_get_device(UCLASS_RAM, 0, &dev); - if (ret) - panic("Cannot get RAM device for ddr size fixup: %d\n", ret); - - ret = k3_ddrss_ddr_fdt_fixup(dev, spl_image->fdt_addr, gd->bd); - if (ret) - printf("Error fixing up ddr node for ECC use! %d\n", ret); -} -#else -static void fixup_memory_node(struct spl_image_info *spl_image) -{ - u64 start[CONFIG_NR_DRAM_BANKS]; - u64 size[CONFIG_NR_DRAM_BANKS]; - int bank; - int ret; - - dram_init(); - dram_init_banksize(); - - for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { - start[bank] = gd->bd->bi_dram[bank].start; - size[bank] = gd->bd->bi_dram[bank].size; - } - - /* dram_init functions use SPL fdt, and we must fixup u-boot fdt */ - ret = fdt_fixup_memory_banks(spl_image->fdt_addr, start, size, - CONFIG_NR_DRAM_BANKS); - if (ret) - printf("Error fixing up memory node! %d\n", ret); -} -#endif - void spl_perform_fixups(struct spl_image_info *spl_image) { -#if defined(CONFIG_K3_AM64_DDRSS) - fixup_ddr_driver_for_ecc(spl_image); -#else - fixup_memory_node(spl_image); -#endif + if (IS_ENABLED(CONFIG_K3_DDRSS)) { + if (IS_ENABLED(CONFIG_K3_INLINE_ECC)) + fixup_ddr_driver_for_ecc(spl_image); + } else { + fixup_memory_node(spl_image); + } } #endif diff --git a/board/ti/am64x/evm.c b/board/ti/am64x/evm.c index 00b8317d6bf..6f7e1f82866 100644 --- a/board/ti/am64x/evm.c +++ b/board/ti/am64x/evm.c @@ -15,6 +15,7 @@ #include <fdt_support.h> #include <asm/arch/hardware.h> #include <env.h> +#include <asm/arch/k3-ddr.h> #include "../common/board_detect.h" #include "../common/fdt_ops.h" @@ -66,28 +67,6 @@ int board_init(void) return 0; } -int dram_init(void) -{ - s32 ret; - - ret = fdtdec_setup_mem_size_base(); - if (ret) - printf("Error setting up mem size and base. %d\n", ret); - - return ret; -} - -int dram_init_banksize(void) -{ - s32 ret; - - ret = fdtdec_setup_memory_banksize(); - if (ret) - printf("Error setting up memory banksize. %d\n", ret); - - return ret; -} - #if defined(CONFIG_SPL_LOAD_FIT) int board_fit_config_name_match(const char *name) { @@ -132,52 +111,14 @@ static int fixup_usb_boot(const void *fdt_blob) } #endif -#if defined(CONFIG_K3_AM64_DDRSS) -static void fixup_ddr_driver_for_ecc(struct spl_image_info *spl_image) -{ - struct udevice *dev; - int ret; - - dram_init_banksize(); - - ret = uclass_get_device(UCLASS_RAM, 0, &dev); - if (ret) - panic("Cannot get RAM device for ddr size fixup: %d\n", ret); - - ret = k3_ddrss_ddr_fdt_fixup(dev, spl_image->fdt_addr, gd->bd); - if (ret) - printf("Error fixing up ddr node for ECC use! %d\n", ret); -} -#else -static void fixup_memory_node(struct spl_image_info *spl_image) -{ - u64 start[CONFIG_NR_DRAM_BANKS]; - u64 size[CONFIG_NR_DRAM_BANKS]; - int bank; - int ret; - - dram_init(); - dram_init_banksize(); - - for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { - start[bank] = gd->bd->bi_dram[bank].start; - size[bank] = gd->bd->bi_dram[bank].size; - } - - /* dram_init functions use SPL fdt, and we must fixup u-boot fdt */ - ret = fdt_fixup_memory_banks(spl_image->fdt_addr, start, size, CONFIG_NR_DRAM_BANKS); - if (ret) - printf("Error fixing up memory node! %d\n", ret); -} -#endif - void spl_perform_fixups(struct spl_image_info *spl_image) { -#if defined(CONFIG_K3_AM64_DDRSS) - fixup_ddr_driver_for_ecc(spl_image); -#else - fixup_memory_node(spl_image); -#endif + if (IS_ENABLED(CONFIG_K3_DDRSS)) { + if (IS_ENABLED(CONFIG_K3_INLINE_ECC)) + fixup_ddr_driver_for_ecc(spl_image); + } else { + fixup_memory_node(spl_image); + } #if CONFIG_IS_ENABLED(USB_STORAGE) fixup_usb_boot(spl_image->fdt_addr); diff --git a/board/ti/am65x/evm.c b/board/ti/am65x/evm.c index 07073a5940b..6658794a137 100644 --- a/board/ti/am65x/evm.c +++ b/board/ti/am65x/evm.c @@ -20,6 +20,7 @@ #include <env.h> #include <spl.h> #include <linux/printk.h> +#include <asm/arch/k3-ddr.h> #include "../common/board_detect.h" #include "../common/fdt_ops.h" @@ -49,17 +50,6 @@ int board_init(void) return 0; } -int dram_init(void) -{ -#ifdef CONFIG_PHYS_64BIT - gd->ram_size = 0x100000000; -#else - gd->ram_size = 0x80000000; -#endif - - return 0; -} - phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { #ifdef CONFIG_PHYS_64BIT @@ -71,23 +61,6 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size) return gd->ram_top; } -int dram_init_banksize(void) -{ - /* Bank 0 declares the memory available in the DDR low region */ - gd->bd->bi_dram[0].start = 0x80000000; - gd->bd->bi_dram[0].size = 0x80000000; - gd->ram_size = 0x80000000; - -#ifdef CONFIG_PHYS_64BIT - /* Bank 1 declares the memory available in the DDR high region */ - gd->bd->bi_dram[1].start = 0x880000000; - gd->bd->bi_dram[1].size = 0x80000000; - gd->ram_size = 0x100000000; -#endif - - return 0; -} - #ifdef CONFIG_SPL_LOAD_FIT int board_fit_config_name_match(const char *name) { diff --git a/board/ti/common/Makefile b/board/ti/common/Makefile index 5ac361ba7fc..caf6b9fa8c1 100644 --- a/board/ti/common/Makefile +++ b/board/ti/common/Makefile @@ -4,3 +4,4 @@ obj-${CONFIG_TI_I2C_BOARD_DETECT} += board_detect.o obj-${CONFIG_CMD_EXTENSION} += cape_detect.o obj-${CONFIG_OF_LIBFDT} += fdt_ops.o +obj-${CONFIG_ARCH_K3} += k3-ddr.o diff --git a/board/ti/common/k3-ddr.c b/board/ti/common/k3-ddr.c new file mode 100644 index 00000000000..a8425da8de5 --- /dev/null +++ b/board/ti/common/k3-ddr.c @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2024, Texas Instruments Incorporated - https://www.ti.com/ + */ + +#include <fdt_support.h> +#include <dm/uclass.h> +#include <k3-ddrss.h> +#include <spl.h> + +#include "k3-ddr.h" + +int dram_init(void) +{ + s32 ret; + + ret = fdtdec_setup_mem_size_base_lowest(); + if (ret) + printf("Error setting up mem size and base. %d\n", ret); + + return ret; +} + +int dram_init_banksize(void) +{ + s32 ret; + + ret = fdtdec_setup_memory_banksize(); + if (ret) + printf("Error setting up memory banksize. %d\n", ret); + + return ret; +} diff --git a/board/ti/common/k3-ddr.h b/board/ti/common/k3-ddr.h new file mode 100644 index 00000000000..737d45e2e50 --- /dev/null +++ b/board/ti/common/k3-ddr.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2024, Texas Instruments Incorporated - https://www.ti.com/ + */ + +#ifndef __K3_DDR_INIT_H +#define __K3_DDR_INIT_H + +int dram_init(void); +int dram_init_banksize(void); + +#endif /* __K3_DDR_INIT_H */ diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c index 6221be9dcff..4b5b9dded7b 100644 --- a/board/ti/j721e/evm.c +++ b/board/ti/j721e/evm.c @@ -15,6 +15,7 @@ #include <asm/gpio.h> #include <spl.h> #include <dm.h> +#include <asm/arch/k3-ddr.h> #include "../common/board_detect.h" #include "../common/fdt_ops.h" @@ -77,17 +78,6 @@ int board_init(void) return 0; } -int dram_init(void) -{ -#ifdef CONFIG_PHYS_64BIT - gd->ram_size = 0x100000000; -#else - gd->ram_size = 0x80000000; -#endif - - return 0; -} - phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { #ifdef CONFIG_PHYS_64BIT @@ -99,23 +89,6 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size) return gd->ram_top; } -int dram_init_banksize(void) -{ - /* Bank 0 declares the memory available in the DDR low region */ - gd->bd->bi_dram[0].start = 0x80000000; - gd->bd->bi_dram[0].size = 0x80000000; - gd->ram_size = 0x80000000; - -#ifdef CONFIG_PHYS_64BIT - /* Bank 1 declares the memory available in the DDR high region */ - gd->bd->bi_dram[1].start = 0x880000000; - gd->bd->bi_dram[1].size = 0x80000000; - gd->ram_size = 0x100000000; -#endif - - return 0; -} - #ifdef CONFIG_SPL_LOAD_FIT int board_fit_config_name_match(const char *name) { diff --git a/board/ti/j721s2/evm.c b/board/ti/j721s2/evm.c index 9bcf67b7bfb..b3eea3b73e6 100644 --- a/board/ti/j721s2/evm.c +++ b/board/ti/j721s2/evm.c @@ -21,6 +21,7 @@ #include <dm.h> #include <dm/uclass-internal.h> #include <dm/root.h> +#include <asm/arch/k3-ddr.h> #include "../common/board_detect.h" #include "../common/fdt_ops.h" @@ -32,17 +33,6 @@ int board_init(void) return 0; } -int dram_init(void) -{ -#ifdef CONFIG_PHYS_64BIT - gd->ram_size = 0x100000000; -#else - gd->ram_size = 0x80000000; -#endif - - return 0; -} - phys_addr_t board_get_usable_ram_top(phys_size_t total_size) { #ifdef CONFIG_PHYS_64BIT @@ -54,22 +44,17 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size) return gd->ram_top; } -int dram_init_banksize(void) +#if defined(CONFIG_XPL_BUILD) +void spl_perform_fixups(struct spl_image_info *spl_image) { - /* Bank 0 declares the memory available in the DDR low region */ - gd->bd->bi_dram[0].start = 0x80000000; - gd->bd->bi_dram[0].size = 0x7fffffff; - gd->ram_size = 0x80000000; - -#ifdef CONFIG_PHYS_64BIT - /* Bank 1 declares the memory available in the DDR high region */ - gd->bd->bi_dram[1].start = 0x880000000; - gd->bd->bi_dram[1].size = 0x37fffffff; - gd->ram_size = 0x400000000; -#endif - - return 0; + if (IS_ENABLED(CONFIG_K3_DDRSS)) { + if (IS_ENABLED(CONFIG_K3_INLINE_ECC)) + fixup_ddr_driver_for_ecc(spl_image); + } else { + fixup_memory_node(spl_image); + } } +#endif #ifdef CONFIG_TI_I2C_BOARD_DETECT /* diff --git a/board/ti/j722s/evm.c b/board/ti/j722s/evm.c index 29e06a5442f..f085ecfd37e 100644 --- a/board/ti/j722s/evm.c +++ b/board/ti/j722s/evm.c @@ -12,6 +12,7 @@ #include <env.h> #include <fdt_support.h> #include <spl.h> +#include <asm/arch/k3-ddr.h> #include "../common/fdt_ops.h" int board_init(void) @@ -19,15 +20,17 @@ int board_init(void) return 0; } -int dram_init(void) +#if defined(CONFIG_XPL_BUILD) +void spl_perform_fixups(struct spl_image_info *spl_image) { - return fdtdec_setup_mem_size_base(); -} - -int dram_init_banksize(void) -{ - return fdtdec_setup_memory_banksize(); + if (IS_ENABLED(CONFIG_K3_DDRSS)) { + if (IS_ENABLED(CONFIG_K3_INLINE_ECC)) + fixup_ddr_driver_for_ecc(spl_image); + } else { + fixup_memory_node(spl_image); + } } +#endif #if IS_ENABLED(CONFIG_BOARD_LATE_INIT) int board_late_init(void) diff --git a/board/ti/j722s/j722s.env b/board/ti/j722s/j722s.env index f8b6aff2c2f..10d62034e1a 100644 --- a/board/ti/j722s/j722s.env +++ b/board/ti/j722s/j722s.env @@ -1,6 +1,10 @@ #include <env/ti/ti_common.env> #include <env/ti/mmc.env> +#if CONFIG_CMD_REMOTEPROC +#include <env/ti/k3_rproc.env> +#endif + name_kern=Image console=ttyS2,115200n8 args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x02800000 @@ -13,3 +17,5 @@ mmcdev=1 bootpart=1:2 bootdir=/boot rd_spec=- + +rproc_fw_binaries= 0 /lib/firmware/j722s-mcu-r5f0_0-fw 2 /lib/firmware/j722s-main-r5f0_0-fw 3 /lib/firmware/j722s-c71_0-fw 4 /lib/firmware/j722s-c71_1-fw diff --git a/board/ti/j784s4/evm.c b/board/ti/j784s4/evm.c index 548dbd5925d..d317f3eccbb 100644 --- a/board/ti/j784s4/evm.c +++ b/board/ti/j784s4/evm.c @@ -10,6 +10,7 @@ #include <efi_loader.h> #include <init.h> #include <spl.h> +#include <asm/arch/k3-ddr.h> #include "../common/fdt_ops.h" DECLARE_GLOBAL_DATA_PTR; @@ -52,15 +53,17 @@ int board_init(void) return 0; } -int dram_init(void) +#if defined(CONFIG_XPL_BUILD) +void spl_perform_fixups(struct spl_image_info *spl_image) { - return fdtdec_setup_mem_size_base(); -} - -int dram_init_banksize(void) -{ - return fdtdec_setup_memory_banksize(); + if (IS_ENABLED(CONFIG_K3_DDRSS)) { + if (IS_ENABLED(CONFIG_K3_INLINE_ECC)) + fixup_ddr_driver_for_ecc(spl_image); + } else { + fixup_memory_node(spl_image); + } } +#endif #ifdef CONFIG_BOARD_LATE_INIT int board_late_init(void) diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c index fd5c6ced795..b4483d00ad1 100644 --- a/board/xilinx/versal/board.c +++ b/board/xilinx/versal/board.c @@ -6,6 +6,7 @@ #include <command.h> #include <cpu_func.h> +#include <dfu.h> #include <env.h> #include <fdtdec.h> #include <init.h> @@ -14,6 +15,7 @@ #include <malloc.h> #include <memalign.h> #include <mmc.h> +#include <mtd.h> #include <time.h> #include <asm/cache.h> #include <asm/global_data.h> @@ -35,9 +37,36 @@ static xilinx_desc versalpl = { }; #endif +static u8 versal_get_bootmode(void) +{ + u8 bootmode; + u32 reg = 0; + + reg = readl(&crp_base->boot_mode_usr); + + if (reg >> BOOT_MODE_ALT_SHIFT) + reg >>= BOOT_MODE_ALT_SHIFT; + + bootmode = reg & BOOT_MODES_MASK; + + return bootmode; +} + +static u32 versal_multi_boot(void) +{ + u8 bootmode = versal_get_bootmode(); + + /* Mostly workaround for QEMU CI pipeline */ + if (bootmode == JTAG_MODE) + return 0; + + return readl(0xF1110004); +} + int board_init(void) { printf("EL Level:\tEL%d\n", current_el()); + printf("Multiboot:\t%d\n", versal_multi_boot()); #if defined(CONFIG_FPGA_VERSALPL) fpga_init(); @@ -113,21 +142,6 @@ unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc, return ret; } -static u8 versal_get_bootmode(void) -{ - u8 bootmode; - u32 reg = 0; - - reg = readl(&crp_base->boot_mode_usr); - - if (reg >> BOOT_MODE_ALT_SHIFT) - reg >>= BOOT_MODE_ALT_SHIFT; - - bootmode = reg & BOOT_MODES_MASK; - - return bootmode; -} - static int boot_targets_setup(void) { u8 bootmode; @@ -346,9 +360,35 @@ enum env_location env_get_location(enum env_operation op, int prio) #define DFU_ALT_BUF_LEN SZ_1K +static void mtd_found_part(u32 *base, u32 *size) +{ + struct mtd_info *part, *mtd; + + mtd_probe_devices(); + + mtd = get_mtd_device_nm("nor0"); + if (!IS_ERR_OR_NULL(mtd)) { + list_for_each_entry(part, &mtd->partitions, node) { + debug("0x%012llx-0x%012llx : \"%s\"\n", + part->offset, part->offset + part->size, + part->name); + + if (*base >= part->offset && + *base < part->offset + part->size) { + debug("Found my partition: %d/%s\n", + part->index, part->name); + *base = part->offset; + *size = part->size; + break; + } + } + } +} + void set_dfu_alt_info(char *interface, char *devstr) { int bootseq = 0, len = 0; + u32 multiboot = versal_multi_boot(); u32 bootmode = versal_get_bootmode(); ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN); @@ -358,6 +398,8 @@ void set_dfu_alt_info(char *interface, char *devstr) memset(buf, 0, sizeof(buf)); + multiboot = env_get_hex("multiboot", multiboot); + switch (bootmode) { case EMMC_MODE: case SD_MODE: @@ -368,9 +410,28 @@ void set_dfu_alt_info(char *interface, char *devstr) len += snprintf(buf + len, DFU_ALT_BUF_LEN, "mmc %d=boot", bootseq); + if (multiboot) + len += snprintf(buf + len, DFU_ALT_BUF_LEN, + "%04d", multiboot); + len += snprintf(buf + len, DFU_ALT_BUF_LEN, ".bin fat %d 1", bootseq); break; + case QSPI_MODE_24BIT: + case QSPI_MODE_32BIT: + case OSPI_MODE: + { + u32 base = multiboot * SZ_32K; + u32 size = 0x1500000; + u32 limit = size; + + mtd_found_part(&base, &limit); + + len += snprintf(buf + len, DFU_ALT_BUF_LEN, + "sf 0:0=boot.bin raw 0x%x 0x%x", + base, limit); + } + break; default: return; } diff --git a/board/xilinx/zynqmp/zynqmp-sm-k26-revA/psu_init_gpl.c b/board/xilinx/zynqmp/zynqmp-sm-k26-revA/psu_init_gpl.c index e5598807e8c..f8d7c8466f6 100644 --- a/board/xilinx/zynqmp/zynqmp-sm-k26-revA/psu_init_gpl.c +++ b/board/xilinx/zynqmp/zynqmp-sm-k26-revA/psu_init_gpl.c @@ -465,7 +465,7 @@ static unsigned long psu_peripherals_pre_init_data(void) static unsigned long psu_peripherals_init_data(void) { - psu_mask_write(0xFD1A0100, 0x0000807CU, 0x00000000U); + psu_mask_write(0xFD1A0100, 0x0001807CU, 0x00000000U); psu_mask_write(0xFF5E0238, 0x001A0000U, 0x00000000U); psu_mask_write(0xFF5E023C, 0x0093C018U, 0x00000000U); psu_mask_write(0xFF5E0238, 0x00000001U, 0x00000000U); diff --git a/board/xilinx/zynqmp/zynqmp_kria.env b/board/xilinx/zynqmp/zynqmp_kria.env index ff3a0924de7..b0c2ac6f2e8 100644 --- a/board/xilinx/zynqmp/zynqmp_kria.env +++ b/board/xilinx/zynqmp/zynqmp_kria.env @@ -62,14 +62,8 @@ bootmenu_0=eMMC Boot=run som_mmc_boot bootmenu_1=SD Boot=run som_cc_boot bootmenu_delay=5 -usb_hub_init=mw 1000 0056 && sleep 1 && i2c write 1000 2d aa 2 -s - -# usb hub init -kv260_setup=i2c dev 1 && run usb_hub_init -# usb hub init -kr260_setup=i2c dev 1 && run usb_hub_init; i2c dev 2 && run usb_hub_init; -# usb hub init with enabling PM nodes for ... -kd240_setup=i2c dev 1 && run usb_hub_init;zynqmp pmufw node 33; zynqmp pmufw node 47 +# Enabling PM nodes for uart0 and can0 +kd240_setup=zynqmp pmufw node 33; zynqmp pmufw node 47 tpm_setup=tpm autostart; tpm_reset=echo "!!! For TPM reset a full power cycle or pressing the POR_B button is required !!!"; @@ -79,7 +73,7 @@ tpm_kd240=if test ${card1_rev} = A; then run tpm_reset; fi board_setup=\ rtc dev 0; \ zynqmp mmio_write 0xFFCA0010 0xfff 0; \ -if test ${card1_name} = SCK-KV-G; then run kv260_setup; run tpm_kv260; fi;\ -if test ${card1_name} = SCK-KR-G; then run kr260_setup; run tpm_reset; fi;\ +if test ${card1_name} = SCK-KV-G; then run tpm_kv260; fi;\ +if test ${card1_name} = SCK-KR-G; then run tpm_reset; fi;\ if test ${card1_name} = SCK-KD-G; then run kd240_setup; run tpm_kd240; fi;\ run tpm_setup diff --git a/boot/Makefile b/boot/Makefile index a24fd90c510..c2753de8163 100644 --- a/boot/Makefile +++ b/boot/Makefile @@ -65,7 +65,7 @@ endif obj-$(CONFIG_$(PHASE_)BOOTMETH_VBE) += vbe.o obj-$(CONFIG_$(PHASE_)BOOTMETH_VBE_REQUEST) += vbe_request.o -obj-$(CONFIG_$(PHASE_)BOOTMETH_VBE_SIMPLE) += vbe_simple.o +obj-$(CONFIG_$(PHASE_)BOOTMETH_VBE_SIMPLE) += vbe_simple.o vbe_common.o obj-$(CONFIG_$(PHASE_)BOOTMETH_VBE_SIMPLE_FW) += vbe_simple_fw.o obj-$(CONFIG_$(PHASE_)BOOTMETH_VBE_SIMPLE_OS) += vbe_simple_os.o diff --git a/boot/bootdev-uclass.c b/boot/bootdev-uclass.c index 2e61c853142..c39147940b6 100644 --- a/boot/bootdev-uclass.c +++ b/boot/bootdev-uclass.c @@ -33,55 +33,38 @@ enum { BOOT_TARGETS_MAX_LEN = 100, }; -int bootdev_add_bootflow(struct bootflow *bflow) +int bootdev_first_bootflow(struct udevice *dev, struct bootflow **bflowp) { struct bootstd_priv *std; - struct bootflow *new; + struct bootflow *bflow; int ret; ret = bootstd_get_priv(&std); if (ret) - return ret; - - new = malloc(sizeof(*bflow)); - if (!new) - return log_msg_ret("bflow", -ENOMEM); - memcpy(new, bflow, sizeof(*bflow)); - - list_add_tail(&new->glob_node, &std->glob_head); - if (bflow->dev) { - struct bootdev_uc_plat *ucp = dev_get_uclass_plat(bflow->dev); - - list_add_tail(&new->bm_node, &ucp->bootflow_head); - } - - return 0; -} + return log_msg_ret("bff", ret); -int bootdev_first_bootflow(struct udevice *dev, struct bootflow **bflowp) -{ - struct bootdev_uc_plat *ucp = dev_get_uclass_plat(dev); - - if (list_empty(&ucp->bootflow_head)) + bflow = alist_getw(&std->bootflows, 0, struct bootflow); + if (!bflow) return -ENOENT; - - *bflowp = list_first_entry(&ucp->bootflow_head, struct bootflow, - bm_node); + *bflowp = bflow; return 0; } int bootdev_next_bootflow(struct bootflow **bflowp) { - struct bootflow *bflow = *bflowp; - struct bootdev_uc_plat *ucp = dev_get_uclass_plat(bflow->dev); + struct bootstd_priv *std; + struct bootflow *bflow; + int ret; - *bflowp = NULL; + ret = bootstd_get_priv(&std); + if (ret) + return log_msg_ret("bff", ret); - if (list_is_last(&bflow->bm_node, &ucp->bootflow_head)) + bflow = alist_nextw(&std->bootflows, *bflowp); + if (!bflow) return -ENOENT; - - *bflowp = list_entry(bflow->bm_node.next, struct bootflow, bm_node); + *bflowp = bflow; return 0; } @@ -342,7 +325,7 @@ int bootdev_get_sibling_blk(struct udevice *dev, struct udevice **blkp) return 0; } -static int bootdev_get_from_blk(struct udevice *blk, struct udevice **bootdevp) +int bootdev_get_from_blk(struct udevice *blk, struct udevice **bootdevp) { struct udevice *parent = dev_get_parent(blk); struct udevice *bootdev; @@ -588,19 +571,6 @@ int bootdev_get_bootflow(struct udevice *dev, struct bootflow_iter *iter, return ops->get_bootflow(dev, iter, bflow); } -void bootdev_clear_bootflows(struct udevice *dev) -{ - struct bootdev_uc_plat *ucp = dev_get_uclass_plat(dev); - - while (!list_empty(&ucp->bootflow_head)) { - struct bootflow *bflow; - - bflow = list_first_entry(&ucp->bootflow_head, struct bootflow, - bm_node); - bootflow_remove(bflow); - } -} - int bootdev_next_label(struct bootflow_iter *iter, struct udevice **devp, int *method_flagsp) { @@ -955,18 +925,13 @@ void bootdev_list_hunters(struct bootstd_priv *std) printf("(total hunters: %d)\n", n_ent); } -static int bootdev_post_bind(struct udevice *dev) -{ - struct bootdev_uc_plat *ucp = dev_get_uclass_plat(dev); - - INIT_LIST_HEAD(&ucp->bootflow_head); - - return 0; -} - static int bootdev_pre_unbind(struct udevice *dev) { - bootdev_clear_bootflows(dev); + int ret; + + ret = bootstd_clear_bootflows_for_bootdev(dev); + if (ret) + return log_msg_ret("bun", ret); return 0; } @@ -976,6 +941,5 @@ UCLASS_DRIVER(bootdev) = { .name = "bootdev", .flags = DM_UC_FLAG_SEQ_ALIAS, .per_device_plat_auto = sizeof(struct bootdev_uc_plat), - .post_bind = bootdev_post_bind, .pre_unbind = bootdev_pre_unbind, }; diff --git a/boot/bootflow.c b/boot/bootflow.c index d8807eb109d..58a1afa7a75 100644 --- a/boot/bootflow.c +++ b/boot/bootflow.c @@ -23,6 +23,13 @@ enum { BF_NO_MORE_DEVICES = -ENODEV, }; +static const char *const bootflow_img[BFI_COUNT - BFI_FIRST] = { + "extlinux_cfg", + "logo", + "efi", + "cmdline", +}; + /** * bootflow_state - name for each state * @@ -55,11 +62,10 @@ int bootflow_first_glob(struct bootflow **bflowp) if (ret) return ret; - if (list_empty(&std->glob_head)) + if (!std->bootflows.count) return -ENOENT; - *bflowp = list_first_entry(&std->glob_head, struct bootflow, - glob_node); + *bflowp = alist_getw(&std->bootflows, 0, struct bootflow); return 0; } @@ -67,20 +73,16 @@ int bootflow_first_glob(struct bootflow **bflowp) int bootflow_next_glob(struct bootflow **bflowp) { struct bootstd_priv *std; - struct bootflow *bflow = *bflowp; int ret; ret = bootstd_get_priv(&std); if (ret) return ret; - *bflowp = NULL; - - if (list_is_last(&bflow->glob_node, &std->glob_head)) + *bflowp = alist_nextw(&std->bootflows, *bflowp); + if (!*bflowp) return -ENOENT; - *bflowp = list_entry(bflow->glob_node.next, struct bootflow, glob_node); - return 0; } @@ -460,10 +462,13 @@ void bootflow_init(struct bootflow *bflow, struct udevice *bootdev, bflow->dev = bootdev; bflow->method = meth; bflow->state = BOOTFLOWST_BASE; + alist_init_struct(&bflow->images, struct bootflow_img); } void bootflow_free(struct bootflow *bflow) { + struct bootflow_img *img; + free(bflow->name); free(bflow->subdir); free(bflow->fname); @@ -472,16 +477,15 @@ void bootflow_free(struct bootflow *bflow) free(bflow->os_name); free(bflow->fdt_fname); free(bflow->bootmeth_priv); + + alist_for_each(img, &bflow->images) + free(img->fname); + alist_empty(&bflow->images); } void bootflow_remove(struct bootflow *bflow) { - if (bflow->dev) - list_del(&bflow->bm_node); - list_del(&bflow->glob_node); - bootflow_free(bflow); - free(bflow); } #if CONFIG_IS_ENABLED(BOOTSTD_FULL) @@ -960,3 +964,48 @@ int bootflow_cmdline_auto(struct bootflow *bflow, const char *arg) return 0; } + +const char *bootflow_img_type_name(enum bootflow_img_t type) +{ + const char *name; + + if (type >= BFI_FIRST && type < BFI_COUNT) + name = bootflow_img[type - BFI_FIRST]; + else + name = genimg_get_type_short_name(type); + + return name; +} + +struct bootflow_img *bootflow_img_add(struct bootflow *bflow, const char *fname, + enum bootflow_img_t type, ulong addr, + ulong size) +{ + struct bootflow_img img, *ptr; + + memset(&img, '\0', sizeof(struct bootflow_img)); + img.fname = strdup(fname); + if (!img.fname) + return NULL; + + img.type = type; + img.addr = addr; + img.size = size; + ptr = alist_add(&bflow->images, img); + if (!ptr) + return NULL; + + return ptr; +} + +int bootflow_get_seq(const struct bootflow *bflow) +{ + struct bootstd_priv *std; + int ret; + + ret = bootstd_get_priv(&std); + if (ret) + return ret; + + return alist_calc_index(&std->bootflows, bflow); +} diff --git a/boot/bootmeth-uclass.c b/boot/bootmeth-uclass.c index 5b5fea39b3b..014b7588e8d 100644 --- a/boot/bootmeth-uclass.c +++ b/boot/bootmeth-uclass.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY UCLASS_BOOTSTD +#include <alist.h> #include <blk.h> #include <bootflow.h> #include <bootmeth.h> @@ -83,14 +84,15 @@ int bootmeth_boot(struct udevice *dev, struct bootflow *bflow) } int bootmeth_read_file(struct udevice *dev, struct bootflow *bflow, - const char *file_path, ulong addr, ulong *sizep) + const char *file_path, ulong addr, + enum bootflow_img_t type, ulong *sizep) { const struct bootmeth_ops *ops = bootmeth_get_ops(dev); if (!ops->read_file) return -ENOSYS; - return ops->read_file(dev, bflow, file_path, addr, sizep); + return ops->read_file(dev, bflow, file_path, addr, type, sizep); } int bootmeth_get_bootflow(struct udevice *dev, struct bootflow *bflow) @@ -326,8 +328,10 @@ int bootmeth_try_file(struct bootflow *bflow, struct blk_desc *desc, return 0; } -int bootmeth_alloc_file(struct bootflow *bflow, uint size_limit, uint align) +int bootmeth_alloc_file(struct bootflow *bflow, uint size_limit, uint align, + enum bootflow_img_t type) { + struct blk_desc *desc = NULL; void *buf; uint size; int ret; @@ -344,11 +348,18 @@ int bootmeth_alloc_file(struct bootflow *bflow, uint size_limit, uint align) bflow->state = BOOTFLOWST_READY; bflow->buf = buf; + if (bflow->blk) + desc = dev_get_uclass_plat(bflow->blk); + + if (!bootflow_img_add(bflow, bflow->fname, type, map_to_sysmem(buf), + size)) + return log_msg_ret("bai", -ENOMEM); + return 0; } int bootmeth_alloc_other(struct bootflow *bflow, const char *fname, - void **bufp, uint *sizep) + enum bootflow_img_t type, void **bufp, uint *sizep) { struct blk_desc *desc = NULL; char path[200]; @@ -377,6 +388,10 @@ int bootmeth_alloc_other(struct bootflow *bflow, const char *fname, if (ret) return log_msg_ret("all", ret); + if (!bootflow_img_add(bflow, bflow->fname, type, map_to_sysmem(buf), + size)) + return log_msg_ret("boi", -ENOMEM); + *bufp = buf; *sizep = size; @@ -384,7 +399,8 @@ int bootmeth_alloc_other(struct bootflow *bflow, const char *fname, } int bootmeth_common_read_file(struct udevice *dev, struct bootflow *bflow, - const char *file_path, ulong addr, ulong *sizep) + const char *file_path, ulong addr, + enum bootflow_img_t type, ulong *sizep) { struct blk_desc *desc = NULL; loff_t len_read; @@ -413,6 +429,9 @@ int bootmeth_common_read_file(struct udevice *dev, struct bootflow *bflow, return ret; *sizep = len_read; + if (!bootflow_img_add(bflow, bflow->fname, type, addr, size)) + return log_msg_ret("bci", -ENOMEM); + return 0; } diff --git a/boot/bootmeth_android.c b/boot/bootmeth_android.c index 3a5144aaa3b..d8c92b44a99 100644 --- a/boot/bootmeth_android.c +++ b/boot/bootmeth_android.c @@ -323,7 +323,8 @@ static int android_read_bootflow(struct udevice *dev, struct bootflow *bflow) } static int android_read_file(struct udevice *dev, struct bootflow *bflow, - const char *file_path, ulong addr, ulong *sizep) + const char *file_path, ulong addr, + enum bootflow_img_t type, ulong *sizep) { /* * Reading individual files is not supported since we only diff --git a/boot/bootmeth_cros.c b/boot/bootmeth_cros.c index 676f550ca25..c7b862e512a 100644 --- a/boot/bootmeth_cros.c +++ b/boot/bootmeth_cros.c @@ -243,8 +243,17 @@ static int cros_read_buf(struct bootflow *bflow, void *buf, ulong size, ret = copy_cmdline(map_sysmem(cmdline, 0), uuid, &bflow->cmdline); if (ret) return log_msg_ret("cmd", ret); + + if (!bootflow_img_add(bflow, "setup", + (enum bootflow_img_t)IH_TYPE_X86_SETUP, + setup, 0x3000)) + return log_msg_ret("cri", -ENOMEM); + bflow->x86_setup = map_sysmem(setup, 0); + if (!bootflow_img_add(bflow, "cmdline", BFI_CMDLINE, cmdline, 0x1000)) + return log_msg_ret("crc", -ENOMEM); + return 0; } @@ -306,6 +315,11 @@ static int cros_read_info(struct bootflow *bflow, const char *uuid, } priv->info_buf = buf; + if (!bootflow_img_add(bflow, "kernel", + (enum bootflow_img_t)IH_TYPE_KERNEL, 0, + priv->body_size)) + return log_msg_ret("crk", -ENOMEM); + return 0; } @@ -400,7 +414,8 @@ static int cros_read_bootflow(struct udevice *dev, struct bootflow *bflow) } static int cros_read_file(struct udevice *dev, struct bootflow *bflow, - const char *file_path, ulong addr, ulong *sizep) + const char *file_path, ulong addr, + enum bootflow_img_t type, ulong *sizep) { return -ENOSYS; } diff --git a/boot/bootmeth_efi.c b/boot/bootmeth_efi.c index f836aa655f5..a2998452666 100644 --- a/boot/bootmeth_efi.c +++ b/boot/bootmeth_efi.c @@ -89,18 +89,17 @@ static void set_efi_bootdev(struct blk_desc *desc, struct bootflow *bflow) static int efiload_read_file(struct bootflow *bflow, ulong addr) { struct blk_desc *desc = NULL; - loff_t bytes_read; + ulong size; int ret; if (bflow->blk) desc = dev_get_uclass_plat(bflow->blk); - ret = bootmeth_setup_fs(bflow, desc); - if (ret) - return log_msg_ret("set", ret); - ret = fs_read(bflow->fname, addr, 0, bflow->size, &bytes_read); + size = SZ_1G; + ret = bootmeth_common_read_file(bflow->method, bflow, bflow->fname, + addr, BFI_EFI, &size); if (ret) - return log_msg_ret("read", ret); + return log_msg_ret("rdf", ret); bflow->buf = map_sysmem(addr, bflow->size); set_efi_bootdev(desc, bflow); @@ -173,7 +172,8 @@ static int distro_efi_try_bootflow_files(struct udevice *dev, /* Limit FDT files to 4MB */ size = SZ_4M; ret = bootmeth_common_read_file(dev, bflow, fname, - fdt_addr, &size); + fdt_addr, (enum bootflow_img_t)IH_TYPE_FLATDT, + &size); } } @@ -252,6 +252,8 @@ static int distro_efi_read_bootflow_net(struct bootflow *bflow) if (!bootfile_name) return log_msg_ret("bootfile_name", ret); bflow->fname = strdup(bootfile_name); + if (!bflow->fname) + return log_msg_ret("fi0", -ENOMEM); /* do the hideous EFI hack */ efi_set_bootdev("Net", "", bflow->fname, map_sysmem(addr, 0), diff --git a/boot/bootmeth_efi_mgr.c b/boot/bootmeth_efi_mgr.c index 23ae1e610ac..42b8863815e 100644 --- a/boot/bootmeth_efi_mgr.c +++ b/boot/bootmeth_efi_mgr.c @@ -74,7 +74,8 @@ static int efi_mgr_read_bootflow(struct udevice *dev, struct bootflow *bflow) } static int efi_mgr_read_file(struct udevice *dev, struct bootflow *bflow, - const char *file_path, ulong addr, ulong *sizep) + const char *file_path, ulong addr, + enum bootflow_img_t type, ulong *sizep) { /* Files are loaded by the 'bootefi bootmgr' command */ diff --git a/boot/bootmeth_extlinux.c b/boot/bootmeth_extlinux.c index c6ae6dffcb7..17c6cebd2f4 100644 --- a/boot/bootmeth_extlinux.c +++ b/boot/bootmeth_extlinux.c @@ -69,7 +69,8 @@ static int extlinux_get_state_desc(struct udevice *dev, char *buf, int maxsize) } static int extlinux_getfile(struct pxe_context *ctx, const char *file_path, - char *file_addr, ulong *sizep) + char *file_addr, enum bootflow_img_t type, + ulong *sizep) { struct extlinux_info *info = ctx->userdata; ulong addr; @@ -80,7 +81,7 @@ static int extlinux_getfile(struct pxe_context *ctx, const char *file_path, /* Allow up to 1GB */ *sizep = 1 << 30; ret = bootmeth_read_file(info->dev, info->bflow, file_path, addr, - sizep); + type, sizep); if (ret) return log_msg_ret("read", ret); @@ -160,7 +161,8 @@ static int extlinux_read_bootflow(struct udevice *dev, struct bootflow *bflow) return log_msg_ret("try", ret); size = bflow->size; - ret = bootmeth_alloc_file(bflow, 0x10000, ARCH_DMA_MINALIGN); + ret = bootmeth_alloc_file(bflow, 0x10000, ARCH_DMA_MINALIGN, + BFI_EXTLINUX_CFG); if (ret) return log_msg_ret("read", ret); diff --git a/boot/bootmeth_pxe.c b/boot/bootmeth_pxe.c index 05c6bece2c1..b91e61bcbc4 100644 --- a/boot/bootmeth_pxe.c +++ b/boot/bootmeth_pxe.c @@ -23,7 +23,8 @@ #include <pxe_utils.h> static int extlinux_pxe_getfile(struct pxe_context *ctx, const char *file_path, - char *file_addr, ulong *sizep) + char *file_addr, enum bootflow_img_t type, + ulong *sizep) { struct extlinux_info *info = ctx->userdata; ulong addr; @@ -34,7 +35,7 @@ static int extlinux_pxe_getfile(struct pxe_context *ctx, const char *file_path, /* Allow up to 1GB */ *sizep = 1 << 30; ret = bootmeth_read_file(info->dev, info->bflow, file_path, addr, - sizep); + type, sizep); if (ret) return log_msg_ret("read", ret); @@ -113,7 +114,7 @@ static int extlinux_pxe_read_bootflow(struct udevice *dev, static int extlinux_pxe_read_file(struct udevice *dev, struct bootflow *bflow, const char *file_path, ulong addr, - ulong *sizep) + enum bootflow_img_t type, ulong *sizep) { char *tftp_argv[] = {"tftp", NULL, NULL, NULL}; struct pxe_context *ctx = dev_get_priv(dev); @@ -134,6 +135,9 @@ static int extlinux_pxe_read_file(struct udevice *dev, struct bootflow *bflow, return log_msg_ret("spc", -ENOSPC); *sizep = size; + if (!bootflow_img_add(bflow, file_path, type, addr, size)) + return log_msg_ret("pxi", -ENOMEM); + return 0; } diff --git a/boot/bootmeth_qfw.c b/boot/bootmeth_qfw.c index 2f8e00cf350..028c2481583 100644 --- a/boot/bootmeth_qfw.c +++ b/boot/bootmeth_qfw.c @@ -52,7 +52,8 @@ static int qfw_read_bootflow(struct udevice *dev, struct bootflow *bflow) } static int qfw_read_file(struct udevice *dev, struct bootflow *bflow, - const char *file_path, ulong addr, ulong *sizep) + const char *file_path, ulong addr, + enum bootflow_img_t type, ulong *sizep) { return -ENOSYS; } diff --git a/boot/bootmeth_sandbox.c b/boot/bootmeth_sandbox.c index 26c713bb5f3..92ba2e3f050 100644 --- a/boot/bootmeth_sandbox.c +++ b/boot/bootmeth_sandbox.c @@ -27,7 +27,8 @@ static int sandbox_read_bootflow(struct udevice *dev, struct bootflow *bflow) } static int sandbox_read_file(struct udevice *dev, struct bootflow *bflow, - const char *file_path, ulong addr, ulong *sizep) + const char *file_path, ulong addr, + enum bootflow_img_t type, ulong *sizep) { return -ENOSYS; } diff --git a/boot/bootmeth_script.c b/boot/bootmeth_script.c index c5cbf18c2e6..020cb8a7aec 100644 --- a/boot/bootmeth_script.c +++ b/boot/bootmeth_script.c @@ -98,7 +98,8 @@ static int script_read_bootflow_file(struct udevice *bootstd, if (!bflow->subdir) return log_msg_ret("prefix", -ENOMEM); - ret = bootmeth_alloc_file(bflow, 0x10000, ARCH_DMA_MINALIGN); + ret = bootmeth_alloc_file(bflow, 0x10000, ARCH_DMA_MINALIGN, + (enum bootflow_img_t)IH_TYPE_SCRIPT); if (ret) return log_msg_ret("read", ret); @@ -106,8 +107,8 @@ static int script_read_bootflow_file(struct udevice *bootstd, if (ret) return log_msg_ret("inf", ret); - ret = bootmeth_alloc_other(bflow, "boot.bmp", &bflow->logo, - &bflow->logo_size); + ret = bootmeth_alloc_other(bflow, "boot.bmp", BFI_LOGO, + &bflow->logo, &bflow->logo_size); /* ignore error */ return 0; diff --git a/boot/bootstd-uclass.c b/boot/bootstd-uclass.c index fdb8d69e320..8c0fd4e63c3 100644 --- a/boot/bootstd-uclass.c +++ b/boot/bootstd-uclass.c @@ -6,6 +6,7 @@ * Written by Simon Glass <sjg@chromium.org> */ +#include <alist.h> #include <bootflow.h> #include <bootstd.h> #include <dm.h> @@ -42,13 +43,11 @@ static int bootstd_of_to_plat(struct udevice *dev) static void bootstd_clear_glob_(struct bootstd_priv *priv) { - while (!list_empty(&priv->glob_head)) { - struct bootflow *bflow; + struct bootflow *bflow; - bflow = list_first_entry(&priv->glob_head, struct bootflow, - glob_node); + alist_for_each(bflow, &priv->bootflows) bootflow_remove(bflow); - } + alist_empty(&priv->bootflows); } void bootstd_clear_glob(void) @@ -61,6 +60,44 @@ void bootstd_clear_glob(void) bootstd_clear_glob_(std); } +int bootstd_add_bootflow(struct bootflow *bflow) +{ + struct bootstd_priv *std; + int ret; + + ret = bootstd_get_priv(&std); + if (ret) + return ret; + + ret = std->bootflows.count; + bflow = alist_add(&std->bootflows, *bflow); + if (!bflow) + return log_msg_ret("bf2", -ENOMEM); + + return ret; +} + +int bootstd_clear_bootflows_for_bootdev(struct udevice *dev) +{ + struct bootstd_priv *std = bootstd_try_priv(); + struct bootflow *from, *to; + + /* if bootstd does not exist we cannot have any bootflows */ + if (!std) + return 0; + + /* Drop any bootflows that mention this dev */ + alist_for_each_filter(from, to, &std->bootflows) { + if (from->dev == dev) + bootflow_remove(from); + else + *to++ = *from; + } + alist_update_end(&std->bootflows, to); + + return 0; +} + static int bootstd_remove(struct udevice *dev) { struct bootstd_priv *priv = dev_get_priv(dev); @@ -100,6 +137,17 @@ const char *const *const bootstd_get_prefixes(struct udevice *dev) return std->prefixes ? std->prefixes : default_prefixes; } +struct bootstd_priv *bootstd_try_priv(void) +{ + struct udevice *dev; + + dev = uclass_try_first_device(UCLASS_BOOTSTD); + if (!dev || !device_active(dev)) + return NULL; + + return dev_get_priv(dev); +} + int bootstd_get_priv(struct bootstd_priv **stdp) { struct udevice *dev; @@ -117,7 +165,7 @@ static int bootstd_probe(struct udevice *dev) { struct bootstd_priv *std = dev_get_priv(dev); - INIT_LIST_HEAD(&std->glob_head); + alist_init_struct(&std->bootflows, struct bootflow); return 0; } diff --git a/boot/fdt_support.c b/boot/fdt_support.c index 2392027d40b..49efeec3681 100644 --- a/boot/fdt_support.c +++ b/boot/fdt_support.c @@ -321,7 +321,7 @@ int fdt_kaslrseed(void *fdt, bool overwrite) * board_fdt_chosen_bootargs - boards may override this function to use * alternative kernel command line arguments */ -__weak char *board_fdt_chosen_bootargs(void) +__weak const char *board_fdt_chosen_bootargs(const struct fdt_property *fdt_ba) { return env_get("bootargs"); } @@ -331,7 +331,7 @@ int fdt_chosen(void *fdt) struct abuf buf = {}; int nodeoffset; int err; - char *str; /* used to set string properties */ + const char *str; /* used to set string properties */ err = fdt_check_header(fdt); if (err < 0) { @@ -364,7 +364,8 @@ int fdt_chosen(void *fdt) } } - str = board_fdt_chosen_bootargs(); + str = board_fdt_chosen_bootargs(fdt_get_property(fdt, nodeoffset, + "bootargs", NULL)); if (str) { err = fdt_setprop(fdt, nodeoffset, "bootargs", str, diff --git a/boot/image-board.c b/boot/image-board.c index 4e86a9a2271..514f8e63f9c 100644 --- a/boot/image-board.c +++ b/boot/image-board.c @@ -1087,8 +1087,8 @@ fallback: } /* get script subimage data address and length */ - if (fit_image_get_data_and_size(fit_hdr, noffset, - &fit_data, &fit_len)) { + if (fit_image_get_data(fit_hdr, noffset, &fit_data, + &fit_len)) { puts("Could not find script subimage data\n"); return 1; } diff --git a/boot/image-fit.c b/boot/image-fit.c index db7fb61bca9..70080d1a6c0 100644 --- a/boot/image-fit.c +++ b/boot/image-fit.c @@ -509,7 +509,7 @@ void fit_image_print(const void *fit, int image_noffset, const char *p) fit_image_get_comp(fit, image_noffset, &comp); printf("%s Compression: %s\n", p, genimg_get_comp_name(comp)); - ret = fit_image_get_data_and_size(fit, image_noffset, &data, &size); + ret = fit_image_get_data(fit, image_noffset, &data, &size); if (!tools_build()) { printf("%s Data Start: ", p); @@ -902,13 +902,13 @@ int fit_image_get_entry(const void *fit, int noffset, ulong *entry) } /** - * fit_image_get_data - get data property and its size for a given component image node + * fit_image_get_emb_data - get data property and its size for a given component image node * @fit: pointer to the FIT format image header * @noffset: component image node offset * @data: double pointer to void, will hold data property's data address * @size: pointer to size_t, will hold data property's data size * - * fit_image_get_data() finds data property in a given component image node. + * fit_image_get_emb_data() finds data property in a given component image node. * If the property is found its data start address and size are returned to * the caller. * @@ -916,8 +916,8 @@ int fit_image_get_entry(const void *fit, int noffset, ulong *entry) * 0, on success * -1, on failure */ -int fit_image_get_data(const void *fit, int noffset, - const void **data, size_t *size) +int fit_image_get_emb_data(const void *fit, int noffset, const void **data, + size_t *size) { int len; @@ -1031,14 +1031,14 @@ int fit_image_get_data_size_unciphered(const void *fit, int noffset, } /** - * fit_image_get_data_and_size - get data and its size including + * fit_image_get_data - get data and its size including * both embedded and external data * @fit: pointer to the FIT format image header * @noffset: component image node offset * @data: double pointer to void, will hold data property's data address * @size: pointer to size_t, will hold data property's data size * - * fit_image_get_data_and_size() finds data and its size including + * fit_image_get_data() finds data and its size including * both embedded and external data. If the property is found * its data start address and size are returned to the caller. * @@ -1046,8 +1046,8 @@ int fit_image_get_data_size_unciphered(const void *fit, int noffset, * 0, on success * otherwise, on failure */ -int fit_image_get_data_and_size(const void *fit, int noffset, - const void **data, size_t *size) +int fit_image_get_data(const void *fit, int noffset, const void **data, + size_t *size) { bool external_data = false; int offset; @@ -1074,7 +1074,7 @@ int fit_image_get_data_and_size(const void *fit, int noffset, *size = len; } } else { - ret = fit_image_get_data(fit, noffset, data, size); + ret = fit_image_get_emb_data(fit, noffset, data, size); } return ret; @@ -1432,7 +1432,7 @@ int fit_image_verify(const void *fit, int image_noffset) goto err; } /* Get image data and data length */ - if (fit_image_get_data_and_size(fit, image_noffset, &data, &size)) { + if (fit_image_get_data(fit, image_noffset, &data, &size)) { err_msg = "Can't get image data/size"; goto err; } @@ -1781,8 +1781,7 @@ int fit_conf_find_compat(const void *fit, const void *fdt) } /* search in this config's kernel FDT */ - if (fit_image_get_data_and_size(fit, kfdt_noffset, - &fdt, &sz)) { + if (fit_image_get_data(fit, kfdt_noffset, &fdt, &sz)) { debug("Failed to get fdt \"%s\".\n", kfdt_name); continue; } @@ -1941,7 +1940,7 @@ static int fit_get_data_tail(const void *fit, int noffset, if (!fit_image_verify(fit, noffset)) return -EINVAL; - if (fit_image_get_data_and_size(fit, noffset, data, size)) + if (fit_image_get_data(fit, noffset, data, size)) return -ENOENT; if (!fit_get_desc(fit, noffset, &desc)) @@ -2198,8 +2197,7 @@ int fit_image_load(struct bootm_headers *images, ulong addr, bootstage_mark(bootstage_id + BOOTSTAGE_SUB_CHECK_ALL_OK); /* get image data address and length */ - if (fit_image_get_data_and_size(fit, noffset, - (const void **)&buf, &size)) { + if (fit_image_get_data(fit, noffset, (const void **)&buf, &size)) { printf("Could not find %s subimage data!\n", prop_name); bootstage_error(bootstage_id + BOOTSTAGE_SUB_GET_DATA); return -ENOENT; diff --git a/boot/pxe_utils.c b/boot/pxe_utils.c index 3ae17553c6d..82f217aaf86 100644 --- a/boot/pxe_utils.c +++ b/boot/pxe_utils.c @@ -6,6 +6,7 @@ #define LOG_CATEGORY LOGC_BOOT +#include <bootflow.h> #include <command.h> #include <dm.h> #include <env.h> @@ -97,7 +98,8 @@ int format_mac_pxe(char *outbuf, size_t outbuf_len) * Returns 1 for success, or < 0 on error */ static int get_relfile(struct pxe_context *ctx, const char *file_path, - unsigned long file_addr, ulong *filesizep) + unsigned long file_addr, enum bootflow_img_t type, + ulong *filesizep) { size_t path_len; char relfile[MAX_TFTP_PATH_LEN + 1]; @@ -124,7 +126,7 @@ static int get_relfile(struct pxe_context *ctx, const char *file_path, sprintf(addr_buf, "%lx", file_addr); - ret = ctx->getfile(ctx, relfile, addr_buf, &size); + ret = ctx->getfile(ctx, relfile, addr_buf, type, &size); if (ret < 0) return log_msg_ret("get", ret); if (filesizep) @@ -133,16 +135,6 @@ static int get_relfile(struct pxe_context *ctx, const char *file_path, return 1; } -/** - * get_pxe_file() - read a file - * - * The file is read and nul-terminated - * - * @ctx: PXE context - * @file_path: File path to read (relative to the PXE file) - * @file_addr: Address to load file to - * Returns 1 for success, or < 0 on error - */ int get_pxe_file(struct pxe_context *ctx, const char *file_path, ulong file_addr) { @@ -150,7 +142,8 @@ int get_pxe_file(struct pxe_context *ctx, const char *file_path, int err; char *buf; - err = get_relfile(ctx, file_path, file_addr, &size); + err = get_relfile(ctx, file_path, file_addr, BFI_EXTLINUX_CFG, + &size); if (err < 0) return err; @@ -199,13 +192,15 @@ int get_pxelinux_path(struct pxe_context *ctx, const char *file, * @file_path: File path to read (relative to the PXE file) * @envaddr_name: Name of environment variable which contains the address to * load to + * @type: File type * @filesizep: Returns the file size in bytes * Returns 1 on success, -ENOENT if @envaddr_name does not exist as an * environment variable, -EINVAL if its format is not valid hex, or other * value < 0 on other error */ static int get_relfile_envaddr(struct pxe_context *ctx, const char *file_path, - const char *envaddr_name, ulong *filesizep) + const char *envaddr_name, + enum bootflow_img_t type, ulong *filesizep) { unsigned long file_addr; char *envaddr; @@ -217,7 +212,7 @@ static int get_relfile_envaddr(struct pxe_context *ctx, const char *file_path, if (strict_strtoul(envaddr, 16, &file_addr) < 0) return -EINVAL; - return get_relfile(ctx, file_path, file_addr, filesizep); + return get_relfile(ctx, file_path, file_addr, type, filesizep); } /** @@ -405,6 +400,7 @@ static void label_boot_fdtoverlay(struct pxe_context *ctx, /* Load overlay file */ err = get_relfile_envaddr(ctx, overlayfile, "fdtoverlay_addr_r", + (enum bootflow_img_t)IH_TYPE_FLATDT, NULL); if (err < 0) { printf("Failed loading overlay %s\n", overlayfile); @@ -490,7 +486,8 @@ static int label_boot(struct pxe_context *ctx, struct pxe_label *label) } if (get_relfile_envaddr(ctx, label->kernel, "kernel_addr_r", - NULL) < 0) { + (enum bootflow_img_t)IH_TYPE_KERNEL, NULL) + < 0) { printf("Skipping %s for failure retrieving kernel\n", label->name); return 1; @@ -516,6 +513,7 @@ static int label_boot(struct pxe_context *ctx, struct pxe_label *label) } else if (label->initrd) { ulong size; if (get_relfile_envaddr(ctx, label->initrd, "ramdisk_addr_r", + (enum bootflow_img_t)IH_TYPE_RAMDISK, &size) < 0) { printf("Skipping %s for failure retrieving initrd\n", label->name); @@ -661,7 +659,8 @@ static int label_boot(struct pxe_context *ctx, struct pxe_label *label) if (fdtfile) { int err = get_relfile_envaddr(ctx, fdtfile, - "fdt_addr_r", NULL); + "fdt_addr_r", + (enum bootflow_img_t)IH_TYPE_FLATDT, NULL); free(fdtfilefree); if (err < 0) { @@ -1548,7 +1547,8 @@ void handle_pxe_menu(struct pxe_context *ctx, struct pxe_menu *cfg) if (IS_ENABLED(CONFIG_CMD_BMP)) { /* display BMP if available */ if (cfg->bmp) { - if (get_relfile(ctx, cfg->bmp, image_load_addr, NULL)) { + if (get_relfile(ctx, cfg->bmp, image_load_addr, + BFI_LOGO, NULL)) { #if defined(CONFIG_VIDEO) struct udevice *dev; diff --git a/boot/vbe_common.c b/boot/vbe_common.c new file mode 100644 index 00000000000..0d51fe762c3 --- /dev/null +++ b/boot/vbe_common.c @@ -0,0 +1,375 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Verified Boot for Embedded (VBE) common functions + * + * Copyright 2024 Google LLC + * Written by Simon Glass <sjg@chromium.org> + */ + +#include <bootstage.h> +#include <dm.h> +#include <blk.h> +#include <image.h> +#include <mapmem.h> +#include <memalign.h> +#include <spl.h> +#include <u-boot/crc.h> +#include "vbe_common.h" + +binman_sym_declare(ulong, u_boot_vpl_nodtb, size); +binman_sym_declare(ulong, u_boot_vpl_bss_pad, size); +binman_sym_declare(ulong, u_boot_spl_nodtb, size); +binman_sym_declare(ulong, u_boot_spl_bss_pad, size); + +int vbe_get_blk(const char *storage, struct udevice **blkp) +{ + struct blk_desc *desc; + char devname[16]; + const char *end; + int devnum; + + /* First figure out the block device */ + log_debug("storage=%s\n", storage); + devnum = trailing_strtoln_end(storage, NULL, &end); + if (devnum == -1) + return log_msg_ret("num", -ENODEV); + if (end - storage >= sizeof(devname)) + return log_msg_ret("end", -E2BIG); + strlcpy(devname, storage, end - storage + 1); + log_debug("dev=%s, %x\n", devname, devnum); + + desc = blk_get_dev(devname, devnum); + if (!desc) + return log_msg_ret("get", -ENXIO); + *blkp = desc->bdev; + + return 0; +} + +int vbe_read_version(struct udevice *blk, ulong offset, char *version, + int max_size) +{ + ALLOC_CACHE_ALIGN_BUFFER(u8, buf, MMC_MAX_BLOCK_LEN); + + /* we can use an assert() here since we already read only one block */ + assert(max_size <= MMC_MAX_BLOCK_LEN); + + /* + * we can use an assert() here since reading the wrong block will just + * cause an invalid version-string to be (safely) read + */ + assert(!(offset & (MMC_MAX_BLOCK_LEN - 1))); + + offset /= MMC_MAX_BLOCK_LEN; + + if (blk_read(blk, offset, 1, buf) != 1) + return log_msg_ret("read", -EIO); + strlcpy(version, buf, max_size); + log_debug("version=%s\n", version); + + return 0; +} + +int vbe_read_nvdata(struct udevice *blk, ulong offset, ulong size, u8 *buf) +{ + uint hdr_ver, hdr_size, data_size, crc; + const struct vbe_nvdata *nvd; + + /* we can use an assert() here since we already read only one block */ + assert(size <= MMC_MAX_BLOCK_LEN); + + /* + * We can use an assert() here since reading the wrong block will just + * cause invalid state to be (safely) read. If the crc passes, then we + * obtain invalid state and it will likely cause booting to fail. + * + * VBE relies on valid values being in U-Boot's devicetree, so this + * should not every be wrong on a production device. + */ + assert(!(offset & (MMC_MAX_BLOCK_LEN - 1))); + + if (offset & (MMC_MAX_BLOCK_LEN - 1)) + return log_msg_ret("get", -EBADF); + offset /= MMC_MAX_BLOCK_LEN; + + if (blk_read(blk, offset, 1, buf) != 1) + return log_msg_ret("read", -EIO); + nvd = (struct vbe_nvdata *)buf; + hdr_ver = (nvd->hdr & NVD_HDR_VER_MASK) >> NVD_HDR_VER_SHIFT; + hdr_size = (nvd->hdr & NVD_HDR_SIZE_MASK) >> NVD_HDR_SIZE_SHIFT; + if (hdr_ver != NVD_HDR_VER_CUR) + return log_msg_ret("hdr", -EPERM); + data_size = 1 << hdr_size; + if (!data_size || data_size > sizeof(*nvd)) + return log_msg_ret("sz", -EPERM); + + crc = crc8(0, buf + 1, data_size - 1); + if (crc != nvd->crc8) + return log_msg_ret("crc", -EPERM); + + return 0; +} + +/** + * h_vbe_load_read() - Handler for reading an SPL image from a FIT + * + * See spl_load_reader for the definition + */ +ulong h_vbe_load_read(struct spl_load_info *load, ulong off, ulong size, + void *buf) +{ + struct blk_desc *desc = load->priv; + lbaint_t sector = off >> desc->log2blksz; + lbaint_t count = size >> desc->log2blksz; + int ret; + + log_debug("vbe read log2blksz %x offset %lx sector %lx count %lx\n", + desc->log2blksz, (ulong)off, (long)sector, (ulong)count); + + ret = blk_dread(desc, sector, count, buf); + log_debug("ret=%x\n", ret); + if (ret < 0) + return ret; + + return ret << desc->log2blksz; +} + +int vbe_read_fit(struct udevice *blk, ulong area_offset, ulong area_size, + struct spl_image_info *image, ulong *load_addrp, ulong *lenp, + char **namep) +{ + ALLOC_CACHE_ALIGN_BUFFER(u8, sbuf, MMC_MAX_BLOCK_LEN); + ulong size, blknum, addr, len, load_addr, num_blks, spl_load_addr; + ulong aligned_size, fdt_load_addr, fdt_size; + const char *fit_uname, *fit_uname_config; + struct bootm_headers images = {}; + enum image_phase_t phase; + struct blk_desc *desc; + int node, ret; + bool for_xpl; + void *buf; + + desc = dev_get_uclass_plat(blk); + + /* read in one block to find the FIT size */ + blknum = area_offset / desc->blksz; + log_debug("read at %lx, blknum %lx\n", area_offset, blknum); + ret = blk_read(blk, blknum, 1, sbuf); + if (ret < 0) + return log_msg_ret("rd", ret); + else if (ret != 1) + return log_msg_ret("rd2", -EIO); + + ret = fdt_check_header(sbuf); + if (ret < 0) + return log_msg_ret("fdt", -EINVAL); + size = fdt_totalsize(sbuf); + if (size > area_size) + return log_msg_ret("fdt", -E2BIG); + log_debug("FIT size %lx\n", size); + aligned_size = ALIGN(size, desc->blksz); + + /* + * Load the FIT into the SPL memory. This is typically a FIT with + * external data, so this is quite small, perhaps a few KB. + */ + if (IS_ENABLED(CONFIG_SANDBOX)) { + addr = CONFIG_VAL(TEXT_BASE); + buf = map_sysmem(addr, size); + } else { + buf = malloc(aligned_size); + if (!buf) + return log_msg_ret("fit", -ENOMEM); + addr = map_to_sysmem(buf); + } + num_blks = aligned_size / desc->blksz; + log_debug("read %lx, %lx blocks to %lx / %p\n", aligned_size, num_blks, + addr, buf); + ret = blk_read(blk, blknum, num_blks, buf); + if (ret < 0) + return log_msg_ret("rd3", ret); + else if (ret != num_blks) + return log_msg_ret("rd4", -EIO); + log_debug("check total size %x off_dt_strings %x\n", fdt_totalsize(buf), + fdt_off_dt_strings(buf)); + +#if CONFIG_IS_ENABLED(SYS_MALLOC_F) + log_debug("malloc base %lx ptr %x limit %x top %lx\n", + gd->malloc_base, gd->malloc_ptr, gd->malloc_limit, + gd->malloc_base + gd->malloc_limit); +#endif + /* figure out the phase to load */ + phase = IS_ENABLED(CONFIG_TPL_BUILD) ? IH_PHASE_NONE : + IS_ENABLED(CONFIG_VPL_BUILD) ? IH_PHASE_SPL : IH_PHASE_U_BOOT; + + /* + * Load the image from the FIT. We ignore any load-address information + * so in practice this simply locates the image in the external-data + * region and returns its address and size. Since we only loaded the FIT + * itself, only a part of the image will be present, at best. + */ + fit_uname = NULL; + fit_uname_config = NULL; + log_debug("loading FIT\n"); + + if (xpl_phase() == PHASE_SPL && !IS_ENABLED(CONFIG_SANDBOX)) { + struct spl_load_info info; + + spl_load_init(&info, h_vbe_load_read, desc, desc->blksz); + xpl_set_phase(&info, IH_PHASE_U_BOOT); + log_debug("doing SPL from %s blksz %lx log2blksz %x area_offset %lx + fdt_size %lx\n", + blk->name, desc->blksz, desc->log2blksz, area_offset, ALIGN(size, 4)); + ret = spl_load_simple_fit(image, &info, area_offset, buf); + log_debug("spl_load_abrec_fit() ret=%d\n", ret); + + return ret; + } + + ret = fit_image_load(&images, addr, &fit_uname, &fit_uname_config, + IH_ARCH_DEFAULT, image_ph(phase, IH_TYPE_FIRMWARE), + BOOTSTAGE_ID_FIT_SPL_START, FIT_LOAD_IGNORED, + &load_addr, &len); + if (ret == -ENOENT) { + ret = fit_image_load(&images, addr, &fit_uname, + &fit_uname_config, IH_ARCH_DEFAULT, + image_ph(phase, IH_TYPE_LOADABLE), + BOOTSTAGE_ID_FIT_SPL_START, + FIT_LOAD_IGNORED, &load_addr, &len); + } + if (ret < 0) + return log_msg_ret("ld", ret); + node = ret; + log_debug("load %lx size %lx\n", load_addr, len); + + fdt_load_addr = 0; + fdt_size = 0; + if ((xpl_phase() == PHASE_TPL || xpl_phase() == PHASE_VPL) && + !IS_ENABLED(CONFIG_SANDBOX)) { + /* allow use of a different image from the configuration node */ + fit_uname = NULL; + ret = fit_image_load(&images, addr, &fit_uname, + &fit_uname_config, IH_ARCH_DEFAULT, + image_ph(phase, IH_TYPE_FLATDT), + BOOTSTAGE_ID_FIT_SPL_START, + FIT_LOAD_IGNORED, &fdt_load_addr, + &fdt_size); + fdt_size = ALIGN(fdt_size, desc->blksz); + log_debug("FDT noload to %lx size %lx\n", fdt_load_addr, + fdt_size); + } + + for_xpl = !USE_BOOTMETH && CONFIG_IS_ENABLED(RELOC_LOADER); + if (for_xpl) { + image->size = len; + image->fdt_size = fdt_size; + ret = spl_reloc_prepare(image, &spl_load_addr); + if (ret) + return log_msg_ret("spl", ret); + } + if (!IS_ENABLED(CONFIG_SANDBOX)) + image->os = IH_OS_U_BOOT; + + /* For FIT external data, read in the external data */ + log_debug("load_addr %lx len %lx addr %lx aligned_size %lx\n", + load_addr, len, addr, aligned_size); + if (load_addr + len > addr + aligned_size) { + ulong base, full_size, offset, extra, fdt_base, fdt_full_size; + ulong fdt_offset; + void *base_buf, *fdt_base_buf; + + /* Find the start address to load from */ + base = ALIGN_DOWN(load_addr, desc->blksz); + + offset = area_offset + load_addr - addr; + blknum = offset / desc->blksz; + extra = offset % desc->blksz; + + /* + * Get the total number of bytes to load, taking care of + * block alignment + */ + full_size = len + extra; + + /* + * Get the start block number, number of blocks and the address + * to load to, then load the blocks + */ + num_blks = DIV_ROUND_UP(full_size, desc->blksz); + if (for_xpl) + base = spl_load_addr; + base_buf = map_sysmem(base, full_size); + ret = blk_read(blk, blknum, num_blks, base_buf); + log_debug("read foffset %lx blknum %lx full_size %lx num_blks %lx to %lx / %p: ret=%d\n", + offset - 0x8000, blknum, full_size, num_blks, base, base_buf, + ret); + if (ret < 0) + return log_msg_ret("rd", ret); + if (ret != num_blks) + return log_msg_ret("rd", -EIO); + if (extra && !IS_ENABLED(CONFIG_SANDBOX)) { + log_debug("move %p %p %lx\n", base_buf, + base_buf + extra, len); + memmove(base_buf, base_buf + extra, len); + } + + if ((xpl_phase() == PHASE_VPL || xpl_phase() == PHASE_TPL) && + !IS_ENABLED(CONFIG_SANDBOX)) { + image->load_addr = spl_get_image_text_base(); + image->entry_point = image->load_addr; + } + + /* now the FDT */ + if (fdt_size) { + fdt_offset = area_offset + fdt_load_addr - addr; + blknum = fdt_offset / desc->blksz; + extra = fdt_offset % desc->blksz; + fdt_full_size = fdt_size + extra; + num_blks = DIV_ROUND_UP(fdt_full_size, desc->blksz); + fdt_base = ALIGN(base + len, 4); + fdt_base_buf = map_sysmem(fdt_base, fdt_size); + ret = blk_read(blk, blknum, num_blks, fdt_base_buf); + log_debug("fdt read foffset %lx blknum %lx full_size %lx num_blks %lx to %lx / %p: ret=%d\n", + fdt_offset - 0x8000, blknum, fdt_full_size, num_blks, + fdt_base, fdt_base_buf, ret); + if (ret != num_blks) + return log_msg_ret("rdf", -EIO); + if (extra) { + log_debug("move %p %p %lx\n", fdt_base_buf, + fdt_base_buf + extra, fdt_size); + memmove(fdt_base_buf, fdt_base_buf + extra, + fdt_size); + } +#if CONFIG_IS_ENABLED(RELOC_LOADER) + image->fdt_buf = fdt_base_buf; + + ulong xpl_size; + ulong xpl_pad; + ulong fdt_start; + + if (xpl_phase() == PHASE_TPL) { + xpl_size = binman_sym(ulong, u_boot_vpl_nodtb, size); + xpl_pad = binman_sym(ulong, u_boot_vpl_bss_pad, size); + } else { + xpl_size = binman_sym(ulong, u_boot_spl_nodtb, size); + xpl_pad = binman_sym(ulong, u_boot_spl_bss_pad, size); + } + fdt_start = image->load_addr + xpl_size + xpl_pad; + log_debug("load_addr %lx xpl_size %lx copy-to %lx\n", + image->load_addr, xpl_size + xpl_pad, + fdt_start); + image->fdt_start = map_sysmem(fdt_start, fdt_size); +#endif + } + } + if (load_addrp) + *load_addrp = load_addr; + if (lenp) + *lenp = len; + if (namep) { + *namep = strdup(fdt_get_name(buf, node, NULL)); + if (!namep) + return log_msg_ret("nam", -ENOMEM); + } + + return 0; +} diff --git a/boot/vbe_common.h b/boot/vbe_common.h new file mode 100644 index 00000000000..84117815a19 --- /dev/null +++ b/boot/vbe_common.h @@ -0,0 +1,137 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Verified Boot for Embedded (VBE) common functions + * + * Copyright 2024 Google LLC + * Written by Simon Glass <sjg@chromium.org> + */ + +#ifndef __VBE_COMMON_H +#define __VBE_COMMON_H + +#include <linux/types.h> + +struct spl_image_info; +struct udevice; + +/* + * Controls whether we use a full bootmeth driver with VBE in this phase, or + * just access the information directly. + * + * For now VBE-simple uses the full bootmeth, but VBE-abrec does not, to reduce + * code size + */ +#define USE_BOOTMETH CONFIG_IS_ENABLED(BOOTMETH_VBE_SIMPLE) + +enum { + MAX_VERSION_LEN = 256, + + NVD_HDR_VER_SHIFT = 0, + NVD_HDR_VER_MASK = 0xf, + NVD_HDR_SIZE_SHIFT = 4, + NVD_HDR_SIZE_MASK = 0xf << NVD_HDR_SIZE_SHIFT, + + /* Firmware key-version is in the top 16 bits of fw_ver */ + FWVER_KEY_SHIFT = 16, + FWVER_FW_MASK = 0xffff, + + NVD_HDR_VER_CUR = 1, /* current version */ +}; + +/** + * struct vbe_nvdata - basic storage format for non-volatile data + * + * This is used for all VBE methods + * + * @crc8: crc8 for the entire record except @crc8 field itself + * @hdr: header size and version (NVD_HDR_...) + * @spare1: unused, must be 0 + * @fw_vernum: version and key version (FWVER_...) + * @flags: Flags controlling operation (enum vbe_flags) + */ +struct vbe_nvdata { + u8 crc8; + u8 hdr; + u16 spare1; + u32 fw_vernum; + u32 flags; + u8 spare2[0x34]; +}; + +/** + * vbe_get_blk() - Obtain the block device to use for VBE + * + * Decodes the string to produce a block device + * + * @storage: String indicating the device to use, e.g. "mmc1" + * @blkp: Returns associated block device, on success + * Return 0 if OK, -ENODEV if @storage does not end with a number, -E2BIG if + * the device name is more than 15 characters, -ENXIO if the block device could + * not be found + */ +int vbe_get_blk(const char *storage, struct udevice **blkp); + +/** + * vbe_read_version() - Read version-string from a block device + * + * Reads the VBE version-string from a device. This function reads a single + * block from the device, so the string cannot be larger than that. It uses a + * temporary buffer for the read, then copies in up to @size bytes + * + * @blk: Device to read from + * @offset: Offset to read, in bytes + * @version: Place to put the string + * @max_size: Maximum size of @version + * Return: 0 if OK, -E2BIG if @max_size > block size, -EBADF if the offset is + * not block-aligned, -EIO if an I/O error occurred + */ +int vbe_read_version(struct udevice *blk, ulong offset, char *version, + int max_size); + +/** + * vbe_read_nvdata() - Read non-volatile data from a block device + * + * Reads the VBE nvdata from a device. This function reads a single block from + * the device, so the nvdata cannot be larger than that. + * + * @blk: Device to read from + * @offset: Offset to read, in bytes + * @size: Number of bytes to read + * @buf: Buffer to hold the data + * Return: 0 if OK, -E2BIG if @size > block size, -EBADF if the offset is not + * block-aligned, -EIO if an I/O error occurred, -EPERM if the header version is + * incorrect, the header size is invalid or the data fails its CRC check + */ +int vbe_read_nvdata(struct udevice *blk, ulong offset, ulong size, u8 *buf); + +/** + * vbe_read_fit() - Read an image from a FIT + * + * This handles most of the VBE logic for reading from a FIT. It reads the FIT + * metadata, decides which image to load and loads it to a suitable address, + * ready for jumping to the next phase of VBE. + * + * This supports transition from VPL to SPL as well as SPL to U-Boot proper. For + * now, TPL->VPL is not supported. + * + * Both embedded and external data are supported for the FIT + * + * @blk: Block device containing FIT + * @area_offset: Byte offset of the VBE area in @blk containing the FIT + * @area_size: Size of the VBE area + * @image: SPL image to fill in with details of the loaded image, or NULL + * @load_addrp: If non-null, returns the address where the image was loaded + * @lenp: If non-null, returns the size of the image loaded, in bytes + * @namep: If non-null, returns the name of the FIT-image node that was loaded + * (allocated by this function) + * Return: 0 if OK, -EINVAL if the area does not contain an FDT (the underlying + * format for FIT), -E2BIG if the FIT extends past @area_size, -ENOMEM if there + * was not space to allocate the image-node name, other error if a read error + * occurred (see blk_read()), or something went wrong with the actually + * FIT-parsing (see fit_image_load()). + */ +int vbe_read_fit(struct udevice *blk, ulong area_offset, ulong area_size, + struct spl_image_info *image, ulong *load_addrp, ulong *lenp, + char **namep); + +#endif /* __VBE_ABREC_H */ diff --git a/boot/vbe_simple.c b/boot/vbe_simple.c index 189e86d2a22..c6766c532f2 100644 --- a/boot/vbe_simple.c +++ b/boot/vbe_simple.c @@ -18,70 +18,21 @@ #include <vbe.h> #include <dm/device-internal.h> #include <dm/ofnode.h> -#include <u-boot/crc.h> #include "vbe_simple.h" -/** struct simple_nvdata - storage format for non-volatile data */ -struct simple_nvdata { - u8 crc8; - u8 hdr; - u16 spare1; - u32 fw_vernum; - u8 spare2[0x38]; -}; - -static int simple_read_version(struct udevice *dev, struct blk_desc *desc, - u8 *buf, struct simple_state *state) +static int simple_read_nvdata(const struct simple_priv *priv, + struct udevice *blk, struct simple_state *state) { - struct simple_priv *priv = dev_get_priv(dev); - int start; - - if (priv->version_size > MMC_MAX_BLOCK_LEN) - return log_msg_ret("ver", -E2BIG); - - start = priv->area_start + priv->version_offset; - if (start & (MMC_MAX_BLOCK_LEN - 1)) - return log_msg_ret("get", -EBADF); - start /= MMC_MAX_BLOCK_LEN; - - if (blk_dread(desc, start, 1, buf) != 1) - return log_msg_ret("read", -EIO); - strlcpy(state->fw_version, buf, MAX_VERSION_LEN); - log_debug("version=%s\n", state->fw_version); + ALLOC_CACHE_ALIGN_BUFFER(u8, buf, MMC_MAX_BLOCK_LEN); + const struct vbe_nvdata *nvd; + int ret; - return 0; -} + ret = vbe_read_nvdata(blk, priv->area_start + priv->state_offset, + priv->state_size, buf); + if (ret) + return log_msg_ret("nv", ret); -static int simple_read_nvdata(struct udevice *dev, struct blk_desc *desc, - u8 *buf, struct simple_state *state) -{ - struct simple_priv *priv = dev_get_priv(dev); - uint hdr_ver, hdr_size, size, crc; - const struct simple_nvdata *nvd; - int start; - - if (priv->state_size > MMC_MAX_BLOCK_LEN) - return log_msg_ret("state", -E2BIG); - - start = priv->area_start + priv->state_offset; - if (start & (MMC_MAX_BLOCK_LEN - 1)) - return log_msg_ret("get", -EBADF); - start /= MMC_MAX_BLOCK_LEN; - - if (blk_dread(desc, start, 1, buf) != 1) - return log_msg_ret("read", -EIO); - nvd = (struct simple_nvdata *)buf; - hdr_ver = (nvd->hdr & NVD_HDR_VER_MASK) >> NVD_HDR_VER_SHIFT; - hdr_size = (nvd->hdr & NVD_HDR_SIZE_MASK) >> NVD_HDR_SIZE_SHIFT; - if (hdr_ver != NVD_HDR_VER_CUR) - return log_msg_ret("hdr", -EPERM); - size = 1 << hdr_size; - if (size > sizeof(*nvd)) - return log_msg_ret("sz", -ENOEXEC); - - crc = crc8(0, buf + 1, size - 1); - if (crc != nvd->crc8) - return log_msg_ret("crc", -EPERM); + nvd = (struct vbe_nvdata *)buf; state->fw_vernum = nvd->fw_vernum; log_debug("version=%s\n", state->fw_version); @@ -91,33 +42,20 @@ static int simple_read_nvdata(struct udevice *dev, struct blk_desc *desc, int vbe_simple_read_state(struct udevice *dev, struct simple_state *state) { - ALLOC_CACHE_ALIGN_BUFFER(u8, buf, MMC_MAX_BLOCK_LEN); struct simple_priv *priv = dev_get_priv(dev); - struct blk_desc *desc; - char devname[16]; - const char *end; - int devnum; + struct udevice *blk; int ret; - /* First figure out the block device */ - log_debug("storage=%s\n", priv->storage); - devnum = trailing_strtoln_end(priv->storage, NULL, &end); - if (devnum == -1) - return log_msg_ret("num", -ENODEV); - if (end - priv->storage >= sizeof(devname)) - return log_msg_ret("end", -E2BIG); - strlcpy(devname, priv->storage, end - priv->storage + 1); - log_debug("dev=%s, %x\n", devname, devnum); - - desc = blk_get_dev(devname, devnum); - if (!desc) - return log_msg_ret("get", -ENXIO); - - ret = simple_read_version(dev, desc, buf, state); + ret = vbe_get_blk(priv->storage, &blk); + if (ret) + return log_msg_ret("blk", ret); + + ret = vbe_read_version(blk, priv->area_start + priv->version_offset, + state->fw_version, MAX_VERSION_LEN); if (ret) return log_msg_ret("ver", ret); - ret = simple_read_nvdata(dev, desc, buf, state); + ret = simple_read_nvdata(priv, blk, state); if (ret) return log_msg_ret("nvd", ret); @@ -160,13 +98,14 @@ static int vbe_simple_read_bootflow(struct udevice *dev, struct bootflow *bflow) } static int vbe_simple_read_file(struct udevice *dev, struct bootflow *bflow, - const char *file_path, ulong addr, ulong *sizep) + const char *file_path, ulong addr, + enum bootflow_img_t type, ulong *sizep) { int ret; if (vbe_phase() == VBE_PHASE_OS) { ret = bootmeth_common_read_file(dev, bflow, file_path, addr, - sizep); + type, sizep); if (ret) return log_msg_ret("os", ret); } diff --git a/boot/vbe_simple.h b/boot/vbe_simple.h index 56d319206f2..dc3f70052b0 100644 --- a/boot/vbe_simple.h +++ b/boot/vbe_simple.h @@ -9,20 +9,8 @@ #ifndef __VBE_SIMPLE_H #define __VBE_SIMPLE_H -enum { - MAX_VERSION_LEN = 256, - - NVD_HDR_VER_SHIFT = 0, - NVD_HDR_VER_MASK = 0xf, - NVD_HDR_SIZE_SHIFT = 4, - NVD_HDR_SIZE_MASK = 0xf << NVD_HDR_SIZE_SHIFT, - - /* Firmware key-version is in the top 16 bits of fw_ver */ - FWVER_KEY_SHIFT = 16, - FWVER_FW_MASK = 0xffff, - - NVD_HDR_VER_CUR = 1, /* current version */ -}; +#include <linux/types.h> +#include "vbe_common.h" /** struct simple_priv - information read from the device tree */ struct simple_priv { diff --git a/boot/vbe_simple_fw.c b/boot/vbe_simple_fw.c index da9701f9eb9..cb5534fc731 100644 --- a/boot/vbe_simple_fw.c +++ b/boot/vbe_simple_fw.c @@ -8,6 +8,7 @@ #define LOG_CATEGORY LOGC_BOOT +#include <binman_sym.h> #include <bloblist.h> #include <bootdev.h> #include <bootflow.h> @@ -17,13 +18,24 @@ #include <image.h> #include <log.h> #include <mapmem.h> -#include <memalign.h> #include <mmc.h> #include <spl.h> #include <vbe.h> #include <dm/device-internal.h> +#include "vbe_common.h" #include "vbe_simple.h" +#ifdef CONFIG_BOOTMETH_VBE_SIMPLE +binman_sym_extern(ulong, vbe_a, image_pos); +binman_sym_extern(ulong, vbe_a, size); +#else +binman_sym_declare(ulong, vbe_a, image_pos); +binman_sym_declare(ulong, vbe_a, size); +#endif + +binman_sym_declare(ulong, vpl, image_pos); +binman_sym_declare(ulong, vpl, size); + /** * vbe_simple_read_bootflow_fw() - Create a bootflow for firmware * @@ -38,109 +50,26 @@ */ int vbe_simple_read_bootflow_fw(struct udevice *dev, struct bootflow *bflow) { - ALLOC_CACHE_ALIGN_BUFFER(u8, sbuf, MMC_MAX_BLOCK_LEN); struct udevice *media = dev_get_parent(bflow->dev); struct udevice *meth = bflow->method; struct simple_priv *priv = dev_get_priv(meth); - const char *fit_uname, *fit_uname_config; - struct bootm_headers images = {}; - ulong offset, size, blknum, addr, len, load_addr, num_blks; - enum image_phase_t phase; - struct blk_desc *desc; + ulong len, load_addr; struct udevice *blk; - int node, ret; - void *buf; + int ret; log_debug("media=%s\n", media->name); ret = blk_get_from_parent(media, &blk); if (ret) return log_msg_ret("med", ret); log_debug("blk=%s\n", blk->name); - desc = dev_get_uclass_plat(blk); - - offset = priv->area_start + priv->skip_offset; - - /* read in one block to find the FIT size */ - blknum = offset / desc->blksz; - log_debug("read at %lx, blknum %lx\n", offset, blknum); - ret = blk_read(blk, blknum, 1, sbuf); - if (ret < 0) - return log_msg_ret("rd", ret); - - ret = fdt_check_header(sbuf); - if (ret < 0) - return log_msg_ret("fdt", -EINVAL); - size = fdt_totalsize(sbuf); - if (size > priv->area_size) - return log_msg_ret("fdt", -E2BIG); - log_debug("FIT size %lx\n", size); - - /* - * Load the FIT into the SPL memory. This is typically a FIT with - * external data, so this is quite small, perhaps a few KB. - */ - addr = CONFIG_VAL(TEXT_BASE); - buf = map_sysmem(addr, size); - num_blks = DIV_ROUND_UP(size, desc->blksz); - log_debug("read %lx, %lx blocks to %lx / %p\n", size, num_blks, addr, - buf); - ret = blk_read(blk, blknum, num_blks, buf); - if (ret < 0) - return log_msg_ret("rd", ret); - - /* figure out the phase to load */ - phase = IS_ENABLED(CONFIG_VPL_BUILD) ? IH_PHASE_SPL : IH_PHASE_U_BOOT; - - /* - * Load the image from the FIT. We ignore any load-address information - * so in practice this simply locates the image in the external-data - * region and returns its address and size. Since we only loaded the FIT - * itself, only a part of the image will be present, at best. - */ - fit_uname = NULL; - fit_uname_config = NULL; - log_debug("loading FIT\n"); - ret = fit_image_load(&images, addr, &fit_uname, &fit_uname_config, - IH_ARCH_SANDBOX, image_ph(phase, IH_TYPE_FIRMWARE), - BOOTSTAGE_ID_FIT_SPL_START, FIT_LOAD_IGNORED, - &load_addr, &len); - if (ret < 0) - return log_msg_ret("ld", ret); - node = ret; - log_debug("loaded to %lx\n", load_addr); - - /* For FIT external data, read in the external data */ - if (load_addr + len > addr + size) { - ulong base, full_size; - void *base_buf; - - /* Find the start address to load from */ - base = ALIGN_DOWN(load_addr, desc->blksz); - - /* - * Get the total number of bytes to load, taking care of - * block alignment - */ - full_size = load_addr + len - base; - - /* - * Get the start block number, number of blocks and the address - * to load to, then load the blocks - */ - blknum = (offset + base - addr) / desc->blksz; - num_blks = DIV_ROUND_UP(full_size, desc->blksz); - base_buf = map_sysmem(base, full_size); - ret = blk_read(blk, blknum, num_blks, base_buf); - log_debug("read %lx %lx, %lx blocks to %lx / %p: ret=%d\n", - blknum, full_size, num_blks, base, base_buf, ret); - if (ret < 0) - return log_msg_ret("rd", ret); - } + + ret = vbe_read_fit(blk, priv->area_start + priv->skip_offset, + priv->area_size, NULL, &load_addr, &len, + &bflow->name); + if (ret) + return log_msg_ret("vbe", ret); /* set up the bootflow with the info we obtained */ - bflow->name = strdup(fdt_get_name(buf, node, NULL)); - if (!bflow->name) - return log_msg_ret("name", -ENOMEM); bflow->blk = blk; bflow->buf = map_sysmem(load_addr, len); bflow->size = len; @@ -148,16 +77,14 @@ int vbe_simple_read_bootflow_fw(struct udevice *dev, struct bootflow *bflow) return 0; } -static int simple_load_from_image(struct spl_image_info *spl_image, +static int simple_load_from_image(struct spl_image_info *image, struct spl_boot_device *bootdev) { - struct udevice *meth, *bdev; - struct simple_priv *priv; - struct bootflow bflow; struct vbe_handoff *handoff; int ret; - if (xpl_phase() != PHASE_VPL && xpl_phase() != PHASE_SPL) + if (xpl_phase() != PHASE_VPL && xpl_phase() != PHASE_SPL && + xpl_phase() != PHASE_TPL) return -ENOENT; ret = bloblist_ensure_size(BLOBLISTT_VBE, sizeof(struct vbe_handoff), @@ -165,36 +92,64 @@ static int simple_load_from_image(struct spl_image_info *spl_image, if (ret) return log_msg_ret("ro", ret); - vbe_find_first_device(&meth); - if (!meth) - return log_msg_ret("vd", -ENODEV); - log_debug("vbe dev %s\n", meth->name); - ret = device_probe(meth); - if (ret) - return log_msg_ret("probe", ret); - - priv = dev_get_priv(meth); - log_debug("simple %s\n", priv->storage); - ret = bootdev_find_by_label(priv->storage, &bdev, NULL); - if (ret) - return log_msg_ret("bd", ret); - log_debug("bootdev %s\n", bdev->name); - - bootflow_init(&bflow, bdev, meth); - ret = bootmeth_read_bootflow(meth, &bflow); - log_debug("\nfw ret=%d\n", ret); - if (ret) - return log_msg_ret("rd", ret); - - /* jump to the image */ - spl_image->flags = SPL_SANDBOXF_ARG_IS_BUF; - spl_image->arg = bflow.buf; - spl_image->size = bflow.size; - log_debug("Image: %s at %p size %x\n", bflow.name, bflow.buf, - bflow.size); + if (USE_BOOTMETH) { + struct udevice *meth, *bdev; + struct simple_priv *priv; + struct bootflow bflow; + + vbe_find_first_device(&meth); + if (!meth) + return log_msg_ret("vd", -ENODEV); + log_debug("vbe dev %s\n", meth->name); + ret = device_probe(meth); + if (ret) + return log_msg_ret("probe", ret); + + priv = dev_get_priv(meth); + log_debug("simple %s\n", priv->storage); + ret = bootdev_find_by_label(priv->storage, &bdev, NULL); + if (ret) + return log_msg_ret("bd", ret); + log_debug("bootdev %s\n", bdev->name); + + bootflow_init(&bflow, bdev, meth); + ret = bootmeth_read_bootflow(meth, &bflow); + log_debug("\nfw ret=%d\n", ret); + if (ret) + return log_msg_ret("rd", ret); - /* this is not used from now on, so free it */ - bootflow_free(&bflow); + /* jump to the image */ + image->flags = SPL_SANDBOXF_ARG_IS_BUF; + image->arg = bflow.buf; + image->size = bflow.size; + log_debug("Image: %s at %p size %x\n", bflow.name, bflow.buf, + bflow.size); + + /* this is not used from now on, so free it */ + bootflow_free(&bflow); + } else { + struct udevice *media, *blk; + ulong offset, size; + + ret = uclass_get_device_by_seq(UCLASS_MMC, 1, &media); + if (ret) + return log_msg_ret("vdv", ret); + ret = blk_get_from_parent(media, &blk); + if (ret) + return log_msg_ret("med", ret); + if (xpl_phase() == PHASE_TPL) { + offset = binman_sym(ulong, vpl, image_pos); + size = binman_sym(ulong, vpl, size); + } else { + offset = binman_sym(ulong, vbe_a, image_pos); + size = binman_sym(ulong, vbe_a, size); + printf("offset=%lx\n", offset); + } + + ret = vbe_read_fit(blk, offset, size, image, NULL, NULL, NULL); + if (ret) + return log_msg_ret("vbe", ret); + } /* Record that VBE was used in this phase */ handoff->phases |= 1 << xpl_phase(); diff --git a/cmd/Kconfig b/cmd/Kconfig index 93efeaec6f4..d00e743db36 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -178,7 +178,6 @@ config CMD_CPU config CMD_UFETCH bool "U-Boot fetch" - depends on BLK help Fetch utility for U-Boot (akin to neofetch). Prints information about U-Boot and the board it is running on in a pleasing format. @@ -328,6 +327,15 @@ config CMD_BOOTMETH This command is not necessary for bootstd to work. +config CMD_BOOTSTD + bool "bootstd" + depends on BOOTSTD + default y if BOOTSTD_FULL + help + Provide general information and control for bootstd. + + This command is not necessary for bootstd to work. + config BOOTM_EFI bool "Support booting UEFI FIT images" depends on EFI_BINARY_EXEC && CMD_BOOTM && FIT @@ -892,14 +900,14 @@ config MD5SUM_VERIFY config CMD_MEMINFO bool "meminfo" - default y if SANDBOX + default y if SANDBOX || X86 help Display memory information. config CMD_MEMINFO_MAP bool "- with memory map" depends on CMD_MEMINFO - default y if SANDBOX + default y if SANDBOX || X86 help Shows a memory map, in addition to just the DRAM size. This allows seeing where U-Boot's memory area is, at the top of DRAM, as well as @@ -1453,6 +1461,12 @@ config CMD_OPTEE_RPMB in the Replay Protection Memory Block partition in eMMC by using Persistent Objects in OPTEE +config CMD_OPTEE + bool "Enable OP-TEE commands" + depends on OPTEE + help + OP-TEE commands support. + config CMD_MTD bool "mtd" depends on MTD @@ -2866,17 +2880,6 @@ config MTDPARTS_DEFAULT Defines a default MTD partitioning scheme in the Linux MTD command line partitions format -config CMD_YAFFS2 - bool "yaffs2 - Access of YAFFS2 filesystem" - depends on YAFFS2 - default y - help - This provides commands for accessing a YAFFS2 filesystem. Yet - Another Flash Filesystem 2 is a filesystem designed specifically - for NAND flash. It incorporates bad-block management and ensures - that device writes are sequential regardless of filesystem - activity. - config CMD_ZFS bool "zfs - Access of ZFS filesystem" help diff --git a/cmd/Makefile b/cmd/Makefile index 1e6d3128c8c..8410be576bb 100644 --- a/cmd/Makefile +++ b/cmd/Makefile @@ -23,6 +23,7 @@ obj-$(CONFIG_BLK) += blk_common.o obj-$(CONFIG_CMD_BOOTDEV) += bootdev.o obj-$(CONFIG_CMD_BOOTFLOW) += bootflow.o obj-$(CONFIG_CMD_BOOTMETH) += bootmeth.o +obj-$(CONFIG_CMD_BOOTSTD) += bootstd.o obj-$(CONFIG_CMD_SOURCE) += source.o obj-$(CONFIG_CMD_BCB) += bcb.o obj-$(CONFIG_CMD_BDI) += bdinfo.o @@ -119,6 +120,7 @@ obj-$(CONFIG_CMD_PAUSE) += pause.o obj-$(CONFIG_CMD_SLEEP) += sleep.o obj-$(CONFIG_CMD_MMC) += mmc.o obj-$(CONFIG_CMD_OPTEE_RPMB) += optee_rpmb.o +obj-$(CONFIG_CMD_OPTEE) += optee.o obj-$(CONFIG_CMD_MP) += mp.o obj-$(CONFIG_CMD_MTD) += mtd.o obj-$(CONFIG_CMD_MTDPARTS) += mtdparts.o @@ -212,7 +214,6 @@ obj-$(CONFIG_CMD_THOR_DOWNLOAD) += thordown.o obj-$(CONFIG_CMD_VBE) += vbe.o obj-$(CONFIG_CMD_XIMG) += ximg.o obj-$(CONFIG_CMD_XXD) += xxd.o -obj-$(CONFIG_CMD_YAFFS2) += yaffs2.o obj-$(CONFIG_CMD_SPL) += spl.o obj-$(CONFIG_CMD_W1) += w1.o obj-$(CONFIG_CMD_ZIP) += zip.o diff --git a/cmd/bootdev.c b/cmd/bootdev.c index fa7285ba25e..4bc229e809a 100644 --- a/cmd/bootdev.c +++ b/cmd/bootdev.c @@ -81,7 +81,7 @@ static int do_bootdev_info(struct cmd_tbl *cmdtp, int flag, int argc, dev = priv->cur_bootdev; - /* Count the number of bootflows, including how many are valid*/ + /* Count the number of bootflows, including how many are valid */ num_valid = 0; for (ret = bootdev_first_bootflow(dev, &bflow), i = 0; !ret; diff --git a/cmd/bootflow.c b/cmd/bootflow.c index f67948d7368..f88995a478f 100644 --- a/cmd/bootflow.c +++ b/cmd/bootflow.c @@ -197,7 +197,7 @@ static int do_bootflow_scan(struct cmd_tbl *cmdtp, int flag, int argc, show_header(); } if (dev) - bootdev_clear_bootflows(dev); + bootstd_clear_bootflows_for_bootdev(dev); else bootstd_clear_glob(); for (i = 0, @@ -207,8 +207,8 @@ static int do_bootflow_scan(struct cmd_tbl *cmdtp, int flag, int argc, bflow.err = ret; if (!ret) num_valid++; - ret = bootdev_add_bootflow(&bflow); - if (ret) { + ret = bootstd_add_bootflow(&bflow); + if (ret < 0) { printf("Out of memory\n"); return CMD_RET_FAILURE; } diff --git a/cmd/bootmenu.c b/cmd/bootmenu.c index b633aedf011..a5c979079f4 100644 --- a/cmd/bootmenu.c +++ b/cmd/bootmenu.c @@ -330,7 +330,13 @@ static int prepare_uefi_bootorder_entry(struct bootmenu_data *menu, } #endif -static struct bootmenu_data *bootmenu_create(int delay) +/** + * bootmenu_create() - create boot menu entries + * + * @uefi: consider UEFI boot options + * @delay: autostart delay in seconds + */ +static struct bootmenu_data *bootmenu_create(int uefi, int delay) { int ret; unsigned short int i = 0; @@ -357,7 +363,7 @@ static struct bootmenu_data *bootmenu_create(int delay) goto cleanup; #if (IS_ENABLED(CONFIG_CMD_BOOTEFI_BOOTMGR)) && (IS_ENABLED(CONFIG_CMD_EFICONFIG)) - if (i < MAX_COUNT - 1) { + if (uefi && i < MAX_COUNT - 1) { efi_status_t efi_ret; /* @@ -481,7 +487,13 @@ static void handle_uefi_bootnext(void) run_command("bootefi bootmgr", 0); } -static enum bootmenu_ret bootmenu_show(int delay) +/** + * bootmenu_show - display boot menu + * + * @uefi: generated entries for UEFI boot options + * @delay: autoboot delay in seconds + */ +static enum bootmenu_ret bootmenu_show(int uefi, int delay) { int cmd_ret; int init = 0; @@ -495,7 +507,7 @@ static enum bootmenu_ret bootmenu_show(int delay) efi_status_t efi_ret = EFI_SUCCESS; char *option, *sep; - if (IS_ENABLED(CONFIG_CMD_BOOTEFI_BOOTMGR)) + if (IS_ENABLED(CONFIG_CMD_BOOTEFI_BOOTMGR) && uefi) handle_uefi_bootnext(); /* If delay is 0 do not create menu, just run first entry */ @@ -514,7 +526,7 @@ static enum bootmenu_ret bootmenu_show(int delay) return (cmd_ret == CMD_RET_SUCCESS ? BOOTMENU_RET_SUCCESS : BOOTMENU_RET_FAIL); } - bootmenu = bootmenu_create(delay); + bootmenu = bootmenu_create(uefi, delay); if (!bootmenu) return BOOTMENU_RET_FAIL; @@ -609,7 +621,7 @@ int menu_show(int bootdelay) int ret; while (1) { - ret = bootmenu_show(bootdelay); + ret = bootmenu_show(1, bootdelay); bootdelay = -1; if (ret == BOOTMENU_RET_UPDATED) continue; @@ -635,11 +647,19 @@ int do_bootmenu(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { char *delay_str = NULL; int delay = 10; + int uefi = 0; #if defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY >= 0) delay = CONFIG_BOOTDELAY; #endif + if (argc >= 2) { + if (!strcmp("-e", argv[1])) { + uefi = 1; + --argc; + ++argv; + } + } if (argc >= 2) delay_str = argv[1]; @@ -649,13 +669,14 @@ int do_bootmenu(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) if (delay_str) delay = (int)simple_strtol(delay_str, NULL, 10); - bootmenu_show(delay); + bootmenu_show(uefi, delay); return 0; } U_BOOT_CMD( bootmenu, 2, 1, do_bootmenu, "ANSI terminal bootmenu", - "[delay]\n" - " - show ANSI terminal bootmenu with autoboot delay" + "[-e] [delay]\n" + "-e - show UEFI entries\n" + "delay - show ANSI terminal bootmenu with autoboot delay" ); diff --git a/cmd/bootstd.c b/cmd/bootstd.c new file mode 100644 index 00000000000..e1d82744eb5 --- /dev/null +++ b/cmd/bootstd.c @@ -0,0 +1,65 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * 'bootstd' command + * + * Copyright 2024 Google LLC + * Written by Simon Glass <sjg@chromium.org> + */ + +#include <bootdev.h> +#include <bootflow.h> +#include <bootmeth.h> +#include <bootstd.h> +#include <command.h> +#include <dm.h> +#include <malloc.h> +#include <dm/uclass-internal.h> + +static int do_bootstd_images(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + const struct bootflow *bflow; + struct bootstd_priv *std; + int ret, i; + + ret = bootstd_get_priv(&std); + if (ret) { + printf("Cannot get bootstd (err=%d)\n", ret); + return CMD_RET_FAILURE; + } + + printf("Seq Bootflow Type At Size Filename\n"); + printf("--- ------------------- -------------- -------- -------- ----------------\n"); + + /* + * Use the ordering if we have one, so long as we are not trying to list + * all bootmethds + */ + i = 0; + alist_for_each(bflow, &std->bootflows) { + const struct bootflow_img *img; + + alist_for_each(img, &bflow->images) { + printf("%3d %-20.20s %-15.15s ", + bootflow_get_seq(bflow), bflow->name, + bootflow_img_type_name(img->type)); + if (img->addr) + printf("%8lx", img->addr); + else + printf("%8s", "-"); + printf(" %8lx %s\n", img->size, img->fname); + i++; + } + } + + printf("--- ------------------- -------------- -------- -------- ----------------\n"); + printf("(%d image%s)\n", i, i != 1 ? "s" : ""); + + return 0; +} + +U_BOOT_LONGHELP(bootstd, + "images - list loaded images"); + +U_BOOT_CMD_WITH_SUBCMDS(bootstd, "Standard-boot operation", bootstd_help_text, + U_BOOT_SUBCMD_MKENT(images, 1, 1, do_bootstd_images)); diff --git a/cmd/efidebug.c b/cmd/efidebug.c index 02f1e080e88..2461425e291 100644 --- a/cmd/efidebug.c +++ b/cmd/efidebug.c @@ -555,18 +555,19 @@ static const struct efi_mem_attrs { const char *text; } efi_mem_attrs[] = { {EFI_MEMORY_UC, "UC"}, - {EFI_MEMORY_UC, "UC"}, {EFI_MEMORY_WC, "WC"}, {EFI_MEMORY_WT, "WT"}, {EFI_MEMORY_WB, "WB"}, {EFI_MEMORY_UCE, "UCE"}, {EFI_MEMORY_WP, "WP"}, {EFI_MEMORY_RP, "RP"}, - {EFI_MEMORY_XP, "WP"}, + {EFI_MEMORY_XP, "XP"}, {EFI_MEMORY_NV, "NV"}, {EFI_MEMORY_MORE_RELIABLE, "REL"}, {EFI_MEMORY_RO, "RO"}, {EFI_MEMORY_SP, "SP"}, + {EFI_MEMORY_CPU_CRYPTO, "CRYPT"}, + {EFI_MEMORY_HOT_PLUGGABLE, "HOTPL"}, {EFI_MEMORY_RUNTIME, "RT"}, }; diff --git a/cmd/optee.c b/cmd/optee.c new file mode 100644 index 00000000000..d0d37293986 --- /dev/null +++ b/cmd/optee.c @@ -0,0 +1,70 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * (C) Copyright 2024, Advanced Micro Devices, Inc. + */ +#include <command.h> +#include <errno.h> +#include <tee.h> +#include <vsprintf.h> + +#define TA_HELLO_WORLD_CMD_INC_VALUE 0 +/* This needs to match the UUID of the Hello World TA. */ +#define TA_HELLO_WORLD_UUID \ + { 0x8aaaf200, 0x2450, 0x11e4, \ + { 0xab, 0xe2, 0x00, 0x02, 0xa5, 0xd5, 0xc5, 0x1b} } + +static int hello_world_ta(unsigned int value) +{ + const struct tee_optee_ta_uuid uuid = TA_HELLO_WORLD_UUID; + struct tee_open_session_arg session_arg; + struct udevice *tee = NULL; + struct tee_invoke_arg arg; + struct tee_param param[2]; + int rc; + + tee = tee_find_device(tee, NULL, NULL, NULL); + if (!tee) + return -ENODEV; + + memset(&session_arg, 0, sizeof(session_arg)); + tee_optee_ta_uuid_to_octets(session_arg.uuid, &uuid); + rc = tee_open_session(tee, &session_arg, 0, NULL); + if (rc) { + printf("tee_open_session(): failed(%d)\n", rc); + return rc; + } + + arg.func = TA_HELLO_WORLD_CMD_INC_VALUE; + arg.session = session_arg.session; + + param[0].attr = TEE_PARAM_ATTR_TYPE_VALUE_INOUT; + param[0].u.value.a = value; + + printf("Value before: 0x%x\n", (int)param[0].u.value.a); + printf("Calling TA\n"); + tee_invoke_func(tee, &arg, 1, param); + + printf("Value after: 0x%x\n", (int)param[0].u.value.a); + return tee_close_session(tee, session_arg.session); +} + +static int do_optee_hello_world_ta(struct cmd_tbl *cmdtp, int flag, int argc, + char * const argv[]) +{ + int ret, value = 0; + + if (strcmp(argv[1], NULL)) + value = hextoul(argv[1], NULL); + + ret = hello_world_ta(value); + if (ret) + return CMD_RET_FAILURE; + + return CMD_RET_SUCCESS; +} + +U_BOOT_LONGHELP(optee, + "hello [<value>] Invoke the OP-TEE 'Hello World' TA\n"); + +U_BOOT_CMD_WITH_SUBCMDS(optee, "OP-TEE commands", optee_help_text, + U_BOOT_SUBCMD_MKENT(hello, 2, 1, do_optee_hello_world_ta)); diff --git a/cmd/pxe.c b/cmd/pxe.c index 982e2b1e7ea..37b8dea6ad6 100644 --- a/cmd/pxe.c +++ b/cmd/pxe.c @@ -27,7 +27,7 @@ const char *pxe_default_paths[] = { }; static int do_get_tftp(struct pxe_context *ctx, const char *file_path, - char *file_addr, ulong *sizep) + char *file_addr, enum bootflow_img_t type, ulong *sizep) { char *tftp_argv[] = {"tftp", NULL, NULL, NULL}; int ret; diff --git a/cmd/smbios.c b/cmd/smbios.c index d3bd8b12a67..562dd7959be 100644 --- a/cmd/smbios.c +++ b/cmd/smbios.c @@ -14,16 +14,109 @@ DECLARE_GLOBAL_DATA_PTR; -static const char * const wakeup_type_strings[] = { - "Reserved", /* 0x00 */ - "Other", /* 0x01 */ - "Unknown", /* 0x02 */ - "APM Timer", /* 0x03 */ - "Modem Ring", /* 0x04 */ - "Lan Remote", /* 0x05 */ - "Power Switch", /* 0x06 */ - "PCI PME#", /* 0x07 */ - "AC Power Restored", /* 0x08 */ +static const struct str_lookup_table wakeup_type_strings[] = { + { SMBIOS_WAKEUP_TYPE_RESERVED, "Reserved" }, + { SMBIOS_WAKEUP_TYPE_OTHER, "Other" }, + { SMBIOS_WAKEUP_TYPE_UNKNOWN, "Unknown" }, + { SMBIOS_WAKEUP_TYPE_APM_TIMER, "APM Timer" }, + { SMBIOS_WAKEUP_TYPE_MODEM_RING, "Modem Ring" }, + { SMBIOS_WAKEUP_TYPE_LAN_REMOTE, "Lan Remote" }, + { SMBIOS_WAKEUP_TYPE_POWER_SWITCH, "Power Switch" }, + { SMBIOS_WAKEUP_TYPE_PCI_PME, "PCI PME#" }, + { SMBIOS_WAKEUP_TYPE_AC_POWER_RESTORED, "AC Power Restored" }, +}; + +static const struct str_lookup_table boardtype_strings[] = { + { SMBIOS_BOARD_TYPE_UNKNOWN, "Unknown" }, + { SMBIOS_BOARD_TYPE_OTHER, "Other" }, + { SMBIOS_BOARD_TYPE_SERVER_BLADE, "Server Blade" }, + { SMBIOS_BOARD_TYPE_CON_SWITCH, "Connectivity Switch" }, + { SMBIOS_BOARD_TYPE_SM_MODULE, "System Management Module" }, + { SMBIOS_BOARD_TYPE_PROCESSOR_MODULE, "Processor Module" }, + { SMBIOS_BOARD_TYPE_IO_MODULE, "I/O Module" }, + { SMBIOS_BOARD_TYPE_MEM_MODULE, "Memory Module" }, + { SMBIOS_BOARD_TYPE_DAUGHTER_BOARD, "Daughter board" }, + { SMBIOS_BOARD_TYPE_MOTHERBOARD, "Motherboard" }, + { SMBIOS_BOARD_TYPE_PROC_MEM_MODULE, "Processor/Memory Module" }, + { SMBIOS_BOARD_TYPE_PROC_IO_MODULE, "Processor/IO Module" }, + { SMBIOS_BOARD_TYPE_INTERCON, "Interconnect board" }, +}; + +static const struct str_lookup_table chassis_state_strings[] = { + { SMBIOS_STATE_OTHER, "Other" }, + { SMBIOS_STATE_UNKNOWN, "Unknown" }, + { SMBIOS_STATE_SAFE, "Safe" }, + { SMBIOS_STATE_WARNING, "Warning" }, + { SMBIOS_STATE_CRITICAL, "Critical" }, + { SMBIOS_STATE_NONRECOVERABLE, "Non-recoverable" }, +}; + +static const struct str_lookup_table chassis_security_strings[] = { + { SMBIOS_SECURITY_OTHER, "Other" }, + { SMBIOS_SECURITY_UNKNOWN, "Unknown" }, + { SMBIOS_SECURITY_NONE, "None" }, + { SMBIOS_SECURITY_EXTINT_LOCK, "External interface locked out" }, + { SMBIOS_SECURITY_EXTINT_EN, "External interface enabled" }, +}; + +static const struct str_lookup_table processor_type_strings[] = { + { SMBIOS_PROCESSOR_TYPE_OTHER, "Other" }, + { SMBIOS_PROCESSOR_TYPE_UNKNOWN, "Unknown" }, + { SMBIOS_PROCESSOR_TYPE_CENTRAL, "Central Processor" }, + { SMBIOS_PROCESSOR_TYPE_MATH, "Math Processor" }, + { SMBIOS_PROCESSOR_TYPE_DSP, "DSP Processor" }, + { SMBIOS_PROCESSOR_TYPE_VIDEO, "Video Processor" }, +}; + +static const struct str_lookup_table processor_family_strings[] = { + { SMBIOS_PROCESSOR_FAMILY_OTHER, "Other" }, + { SMBIOS_PROCESSOR_FAMILY_UNKNOWN, "Unknown" }, + { SMBIOS_PROCESSOR_FAMILY_RSVD, "Reserved" }, + { SMBIOS_PROCESSOR_FAMILY_ARMV7, "ARMv7" }, + { SMBIOS_PROCESSOR_FAMILY_ARMV8, "ARMv8" }, + { SMBIOS_PROCESSOR_FAMILY_RV32, "RISC-V RV32" }, + { SMBIOS_PROCESSOR_FAMILY_RV64, "RISC-V RV64" }, +}; + +static const struct str_lookup_table processor_upgrade_strings[] = { + { SMBIOS_PROCESSOR_UPGRADE_OTHER, "Other" }, + { SMBIOS_PROCESSOR_UPGRADE_UNKNOWN, "Unknown" }, + { SMBIOS_PROCESSOR_UPGRADE_NONE, "None" }, +}; + +static const struct str_lookup_table err_corr_type_strings[] = { + { SMBIOS_CACHE_ERRCORR_OTHER, "Other" }, + { SMBIOS_CACHE_ERRCORR_UNKNOWN, "Unknown" }, + { SMBIOS_CACHE_ERRCORR_NONE, "None" }, + { SMBIOS_CACHE_ERRCORR_PARITY, "Parity" }, + { SMBIOS_CACHE_ERRCORR_SBITECC, "Single-bit ECC" }, + { SMBIOS_CACHE_ERRCORR_MBITECC, "Multi-bit ECC" }, +}; + +static const struct str_lookup_table sys_cache_type_strings[] = { + { SMBIOS_CACHE_SYSCACHE_TYPE_OTHER, "Other" }, + { SMBIOS_CACHE_SYSCACHE_TYPE_UNKNOWN, "Unknown" }, + { SMBIOS_CACHE_SYSCACHE_TYPE_INST, "Instruction" }, + { SMBIOS_CACHE_SYSCACHE_TYPE_DATA, "Data" }, + { SMBIOS_CACHE_SYSCACHE_TYPE_UNIFIED, "Unified" }, +}; + +static const struct str_lookup_table associativity_strings[] = { + { SMBIOS_CACHE_ASSOC_OTHER, "Other" }, + { SMBIOS_CACHE_ASSOC_UNKNOWN, "Unknown" }, + { SMBIOS_CACHE_ASSOC_DMAPPED, "Direct Mapped" }, + { SMBIOS_CACHE_ASSOC_2WAY, "2-way Set-Associative" }, + { SMBIOS_CACHE_ASSOC_4WAY, "4-way Set-Associative" }, + { SMBIOS_CACHE_ASSOC_FULLY, "Fully Associative" }, + { SMBIOS_CACHE_ASSOC_8WAY, "8-way Set-Associative" }, + { SMBIOS_CACHE_ASSOC_16WAY, "16-way Set-Associative" }, + { SMBIOS_CACHE_ASSOC_12WAY, "12-way Set-Associative" }, + { SMBIOS_CACHE_ASSOC_24WAY, "24-way Set-Associative" }, + { SMBIOS_CACHE_ASSOC_32WAY, "32-way Set-Associative" }, + { SMBIOS_CACHE_ASSOC_48WAY, "48-way Set-Associative" }, + { SMBIOS_CACHE_ASSOC_64WAY, "64-way Set-Associative" }, + { SMBIOS_CACHE_ASSOC_20WAY, "20-way Set-Associative" }, + }; /** @@ -37,7 +130,7 @@ static const char *smbios_get_string(void *table, int index) { const char *str = (char *)table + ((struct smbios_header *)table)->length; - static const char fallback[] = "Not Specified"; + static const char fallback[] = ""; if (!index) return fallback; @@ -79,17 +172,53 @@ static void smbios_print_generic(struct smbios_header *table) } } -void smbios_print_str(const char *label, void *table, u8 index) +static void smbios_print_str(const char *label, void *table, u8 index) { printf("\t%s: %s\n", label, smbios_get_string(table, index)); } -const char *smbios_wakeup_type_str(u8 wakeup_type) +static void smbios_print_lookup_str(const struct str_lookup_table *table, + u16 index, u16 array_size, + const char *prefix) +{ + int i; + const char *str = NULL; + + for (i = 0; i < array_size; i++) { + if ((table + i)->idx == index) + str = (table + i)->str; + } + + if (str) + printf("\t%s: %s\n", prefix, str); + else + printf("\t%s: [%04x]\n", prefix, index); +} + +static void smbios_print_type0(struct smbios_type0 *table) { - if (wakeup_type >= ARRAY_SIZE(wakeup_type_strings)) - /* Values over 0x08 are reserved. */ - wakeup_type = 0; - return wakeup_type_strings[wakeup_type]; + printf("BIOS Information\n"); + smbios_print_str("Vendor", table, table->vendor); + smbios_print_str("BIOS Version", table, table->bios_ver); + /* Keep table->bios_start_segment as 0 for UEFI-based systems */ + smbios_print_str("BIOS Release Date", table, table->bios_release_date); + printf("\tBIOS ROM Size: 0x%02x\n", table->bios_rom_size); + printf("\tBIOS Characteristics: 0x%016llx\n", + table->bios_characteristics); + printf("\tBIOS Characteristics Extension Byte 1: 0x%02x\n", + table->bios_characteristics_ext1); + printf("\tBIOS Characteristics Extension Byte 2: 0x%02x\n", + table->bios_characteristics_ext2); + printf("\tSystem BIOS Major Release: 0x%02x\n", + table->bios_major_release); + printf("\tSystem BIOS Minor Release: 0x%02x\n", + table->bios_minor_release); + printf("\tEmbedded Controller Firmware Major Release: 0x%02x\n", + table->ec_major_release); + printf("\tEmbedded Controller Firmware Minor Release: 0x%02x\n", + table->ec_minor_release); + printf("\tExtended BIOS ROM Size: 0x%04x\n", + table->extended_bios_rom_size); } static void smbios_print_type1(struct smbios_type1 *table) @@ -99,12 +228,14 @@ static void smbios_print_type1(struct smbios_type1 *table) smbios_print_str("Product Name", table, table->product_name); smbios_print_str("Version", table, table->version); smbios_print_str("Serial Number", table, table->serial_number); - if (table->length >= 0x19) { + if (table->hdr.length >= SMBIOS_TYPE1_LENGTH_V21) { printf("\tUUID: %pUl\n", table->uuid); - printf("\tWake-up Type: %s\n", - smbios_wakeup_type_str(table->wakeup_type)); + smbios_print_lookup_str(wakeup_type_strings, + table->wakeup_type, + ARRAY_SIZE(wakeup_type_strings), + "Wake-up Type"); } - if (table->length >= 0x1b) { + if (table->hdr.length >= SMBIOS_TYPE1_LENGTH_V24) { smbios_print_str("SKU Number", table, table->sku_number); smbios_print_str("Family", table, table->family); } @@ -112,25 +243,166 @@ static void smbios_print_type1(struct smbios_type1 *table) static void smbios_print_type2(struct smbios_type2 *table) { - u16 *handle; + int i; + u8 *addr = (u8 *)table + offsetof(struct smbios_type2, eos); - printf("Base Board Information\n"); + printf("Baseboard Information\n"); smbios_print_str("Manufacturer", table, table->manufacturer); smbios_print_str("Product Name", table, table->product_name); smbios_print_str("Version", table, table->version); smbios_print_str("Serial Number", table, table->serial_number); smbios_print_str("Asset Tag", table, table->asset_tag_number); - printf("\tFeature Flags: 0x%04x\n", table->feature_flags); + printf("\tFeature Flags: 0x%02x\n", table->feature_flags); smbios_print_str("Chassis Location", table, table->chassis_location); printf("\tChassis Handle: 0x%04x\n", table->chassis_handle); - smbios_print_str("Board Type", table, table->board_type); - printf("\tContained Object Handles: "); - handle = (void *)table->eos; - for (int i = 0; i < table->number_contained_objects; ++i) - printf("0x%04x ", handle[i]); + smbios_print_lookup_str(boardtype_strings, + table->board_type, + ARRAY_SIZE(boardtype_strings), + "Board Type"); + printf("\tNumber of Contained Object Handles: 0x%02x\n", + table->number_contained_objects); + if (!table->number_contained_objects) + return; + + printf("\tContained Object Handles:\n"); + for (i = 0; i < table->number_contained_objects; i++) { + printf("\t\tObject[%03d]:\n", i); + if (CONFIG_IS_ENABLED(HEXDUMP)) + print_hex_dump("\t\t", DUMP_PREFIX_OFFSET, 16, 1, addr, + sizeof(u16), false); + addr += sizeof(u16); + } printf("\n"); } +static void smbios_print_type3(struct smbios_type3 *table) +{ + int i; + u8 *addr = (u8 *)table + offsetof(struct smbios_type3, sku_number); + + printf("Baseboard Information\n"); + smbios_print_str("Manufacturer", table, table->manufacturer); + printf("\tType: 0x%02x\n", table->chassis_type); + smbios_print_str("Version", table, table->version); + smbios_print_str("Serial Number", table, table->serial_number); + smbios_print_str("Asset Tag", table, table->asset_tag_number); + smbios_print_lookup_str(chassis_state_strings, + table->bootup_state, + ARRAY_SIZE(chassis_state_strings), + "Boot-up State"); + smbios_print_lookup_str(chassis_state_strings, + table->power_supply_state, + ARRAY_SIZE(chassis_state_strings), + "Power Supply State"); + smbios_print_lookup_str(chassis_state_strings, + table->thermal_state, + ARRAY_SIZE(chassis_state_strings), + "Thermal State"); + smbios_print_lookup_str(chassis_security_strings, + table->security_status, + ARRAY_SIZE(chassis_security_strings), + "Security Status"); + printf("\tOEM-defined: 0x%08x\n", table->oem_defined); + printf("\tHeight: 0x%02x\n", table->height); + printf("\tNumber of Power Cords: 0x%02x\n", + table->number_of_power_cords); + printf("\tContained Element Count: 0x%02x\n", table->element_count); + printf("\tContained Element Record Length: 0x%02x\n", + table->element_record_length); + if (table->element_count) { + printf("\tContained Elements:\n"); + for (i = 0; i < table->element_count; i++) { + printf("\t\tElement[%03d]:\n", i); + if (CONFIG_IS_ENABLED(HEXDUMP)) + print_hex_dump("\t\t", DUMP_PREFIX_OFFSET, 16, + 1, addr, + table->element_record_length, + false); + printf("\t\tContained Element Type: 0x%02x\n", *addr); + printf("\t\tContained Element Minimum: 0x%02x\n", + *(addr + 1)); + printf("\t\tContained Element Maximum: 0x%02x\n", + *(addr + 2)); + addr += table->element_record_length; + } + } + smbios_print_str("SKU Number", table, *addr); +} + +static void smbios_print_type4(struct smbios_type4 *table) +{ + printf("Processor Information:\n"); + smbios_print_str("Socket Designation", table, table->socket_design); + smbios_print_lookup_str(processor_type_strings, + table->processor_type, + ARRAY_SIZE(processor_type_strings), + "Processor Type"); + smbios_print_lookup_str(processor_family_strings, + table->processor_family, + ARRAY_SIZE(processor_family_strings), + "Processor Family"); + smbios_print_str("Processor Manufacturer", table, + table->processor_manufacturer); + printf("\tProcessor ID word 0: 0x%08x\n", table->processor_id[0]); + printf("\tProcessor ID word 1: 0x%08x\n", table->processor_id[1]); + smbios_print_str("Processor Version", table, table->processor_version); + printf("\tVoltage: 0x%02x\n", table->voltage); + printf("\tExternal Clock: 0x%04x\n", table->external_clock); + printf("\tMax Speed: 0x%04x\n", table->max_speed); + printf("\tCurrent Speed: 0x%04x\n", table->current_speed); + printf("\tStatus: 0x%02x\n", table->status); + smbios_print_lookup_str(processor_upgrade_strings, + table->processor_upgrade, + ARRAY_SIZE(processor_upgrade_strings), + "Processor Upgrade"); + printf("\tL1 Cache Handle: 0x%04x\n", table->l1_cache_handle); + printf("\tL2 Cache Handle: 0x%04x\n", table->l2_cache_handle); + printf("\tL3 Cache Handle: 0x%04x\n", table->l3_cache_handle); + smbios_print_str("Serial Number", table, table->serial_number); + smbios_print_str("Asset Tag", table, table->asset_tag); + smbios_print_str("Part Number", table, table->part_number); + printf("\tCore Count: 0x%02x\n", table->core_count); + printf("\tCore Enabled: 0x%02x\n", table->core_enabled); + printf("\tThread Count: 0x%02x\n", table->thread_count); + printf("\tProcessor Characteristics: 0x%04x\n", + table->processor_characteristics); + smbios_print_lookup_str(processor_family_strings, + table->processor_family2, + ARRAY_SIZE(processor_family_strings), + "Processor Family 2"); + printf("\tCore Count 2: 0x%04x\n", table->core_count2); + printf("\tCore Enabled 2: 0x%04x\n", table->core_enabled2); + printf("\tThread Count 2: 0x%04x\n", table->thread_count2); + printf("\tThread Enabled: 0x%04x\n", table->thread_enabled); +} + +static void smbios_print_type7(struct smbios_type7 *table) +{ + printf("Cache Information:\n"); + smbios_print_str("Socket Designation", table, + table->socket_design); + printf("\tCache Configuration: 0x%04x\n", table->config.data); + printf("\tMaximum Cache Size: 0x%04x\n", table->max_size.data); + printf("\tInstalled Size: 0x%04x\n", table->inst_size.data); + printf("\tSupported SRAM Type: 0x%04x\n", table->supp_sram_type.data); + printf("\tCurrent SRAM Type: 0x%04x\n", table->curr_sram_type.data); + printf("\tCache Speed: 0x%02x\n", table->speed); + smbios_print_lookup_str(err_corr_type_strings, + table->err_corr_type, + ARRAY_SIZE(err_corr_type_strings), + "Error Correction Type"); + smbios_print_lookup_str(sys_cache_type_strings, + table->sys_cache_type, + ARRAY_SIZE(sys_cache_type_strings), + "System Cache Type"); + smbios_print_lookup_str(associativity_strings, + table->associativity, + ARRAY_SIZE(associativity_strings), + "Associativity"); + printf("\tMaximum Cache Size 2: 0x%08x\n", table->max_size2.data); + printf("\tInstalled Cache Size 2: 0x%08x\n", table->inst_size2.data); +} + static void smbios_print_type127(struct smbios_type127 *table) { printf("End Of Table\n"); @@ -192,13 +464,25 @@ static int do_smbios(struct cmd_tbl *cmdtp, int flag, int argc, pos->handle, pos->type, pos->length, (unsigned long long)map_to_sysmem(pos)); switch (pos->type) { - case 1: + case SMBIOS_BIOS_INFORMATION: + smbios_print_type0((struct smbios_type0 *)pos); + break; + case SMBIOS_SYSTEM_INFORMATION: smbios_print_type1((struct smbios_type1 *)pos); break; - case 2: + case SMBIOS_BOARD_INFORMATION: smbios_print_type2((struct smbios_type2 *)pos); break; - case 127: + case SMBIOS_SYSTEM_ENCLOSURE: + smbios_print_type3((struct smbios_type3 *)pos); + break; + case SMBIOS_PROCESSOR_INFORMATION: + smbios_print_type4((struct smbios_type4 *)pos); + break; + case SMBIOS_CACHE_INFORMATION: + smbios_print_type7((struct smbios_type7 *)pos); + break; + case SMBIOS_END_OF_TABLE: smbios_print_type127((struct smbios_type127 *)pos); break; default: diff --git a/cmd/sysboot.c b/cmd/sysboot.c index 8a060780cab..93d4a400830 100644 --- a/cmd/sysboot.c +++ b/cmd/sysboot.c @@ -23,7 +23,8 @@ struct sysboot_info { }; static int sysboot_read_file(struct pxe_context *ctx, const char *file_path, - char *file_addr, ulong *sizep) + char *file_addr, enum bootflow_img_t type, + ulong *sizep) { struct sysboot_info *info = ctx->userdata; loff_t len_read; @@ -110,7 +111,8 @@ static int do_sysboot(struct cmd_tbl *cmdtp, int flag, int argc, return CMD_RET_FAILURE; } - if (get_pxe_file(&ctx, filename, pxefile_addr_r) < 0) { + if (get_pxe_file(&ctx, filename, pxefile_addr_r) + < 0) { printf("Error reading config file\n"); pxe_destroy_ctx(&ctx); return 1; diff --git a/cmd/ufetch.c b/cmd/ufetch.c index 0b825d7e8c7..ed5a856c7ab 100644 --- a/cmd/ufetch.c +++ b/cmd/ufetch.c @@ -89,14 +89,12 @@ enum output_lines { static int do_ufetch(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { - int num_lines = max(LAST_LINE + 1, ARRAY_SIZE(logo_lines)); + int num_lines = max((size_t)LAST_LINE + 1, ARRAY_SIZE(logo_lines)); const char *model, *compatible; char *ipaddr; - int n_cmds, n_cpus = 0, ret, compatlen; + int n_cmds, n_cpus = 0, compatlen; size_t size; ofnode np; - struct udevice *dev; - struct blk_desc *desc; bool skip_ascii = false; if (argc > 1 && strcmp(argv[1], "-n") == 0) { @@ -190,7 +188,7 @@ static int do_ufetch(struct cmd_tbl *cmdtp, int flag, int argc, if (ofnode_name_eq(np, "cpu")) n_cpus++; } - printf("CPU:" RESET " %d (1 in use)\n", n_cpus); + printf("CPU: " RESET CONFIG_SYS_ARCH " (%d cores, 1 in use)\n", n_cpus); break; case MEMORY: for (int j = 0; j < CONFIG_NR_DRAM_BANKS && gd->bd->bi_dram[j].size; j++) @@ -199,7 +197,12 @@ static int do_ufetch(struct cmd_tbl *cmdtp, int flag, int argc, print_size(size, "\n"); break; case STORAGE: - default: + default: { +#ifdef CONFIG_BLK + struct udevice *dev; + struct blk_desc *desc; + int ret; + ret = uclass_find_device_by_seq(UCLASS_BLK, line - STORAGE, &dev); if (!ret && dev) { desc = dev_get_uclass_plat(dev); @@ -213,8 +216,10 @@ static int do_ufetch(struct cmd_tbl *cmdtp, int flag, int argc, } else if (ret == -ENODEV && (skip_ascii || line > ARRAY_SIZE(logo_lines))) { break; } +#endif printf("\n"); } + } } printf(RESET "\n\n"); diff --git a/cmd/ximg.c b/cmd/ximg.c index 1c96f5a0a1f..29d7c3279b3 100644 --- a/cmd/ximg.c +++ b/cmd/ximg.c @@ -161,8 +161,7 @@ do_imgextract(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) } /* get subimage/external data address and length */ - if (fit_image_get_data_and_size(fit_hdr, noffset, - &fit_data, &fit_len)) { + if (fit_image_get_data(fit_hdr, noffset, &fit_data, &fit_len)) { puts("Could not find script subimage data\n"); return 1; } diff --git a/cmd/yaffs2.c b/cmd/yaffs2.c deleted file mode 100644 index daa44abeb72..00000000000 --- a/cmd/yaffs2.c +++ /dev/null @@ -1,324 +0,0 @@ -/* Yaffs commands. - * Modified by Charles Manning by adding ydevconfig command. - * - * Use ydevconfig to configure a mountpoint before use. - * For example: - * # Configure mountpt xxx using nand device 0 using blocks 100-500 - * ydevconfig xxx 0 100 500 - * # Mount it - * ymount xxx - * # yls, yrdm etc - * yls -l xxx - * yrdm xxx/boot-image 82000000 - * ... - */ - -#include <config.h> -#include <command.h> - -#ifdef YAFFS2_DEBUG -#define PRINTF(fmt, args...) printf(fmt, ##args) -#else -#define PRINTF(fmt, args...) do { } while (0) -#endif - -extern void cmd_yaffs_dev_ls(void); -extern void cmd_yaffs_tracemask(unsigned set, unsigned mask); -extern void cmd_yaffs_devconfig(char *mp, int flash_dev, - int start_block, int end_block); -extern void cmd_yaffs_mount(char *mp); -extern void cmd_yaffs_umount(char *mp); -extern void cmd_yaffs_read_file(char *fn); -extern void cmd_yaffs_write_file(char *fn, char bval, int sizeOfFile); -extern void cmd_yaffs_ls(const char *mountpt, int longlist); -extern void cmd_yaffs_mwrite_file(char *fn, char *addr, int size); -extern void cmd_yaffs_mread_file(char *fn, char *addr); -extern void cmd_yaffs_mkdir(const char *dir); -extern void cmd_yaffs_rmdir(const char *dir); -extern void cmd_yaffs_rm(const char *path); -extern void cmd_yaffs_mv(const char *oldPath, const char *newPath); - -extern int yaffs_dump_dev(const char *path); - -/* ytrace - show/set yaffs trace mask */ -int do_ytrace(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -{ - if (argc > 1) - cmd_yaffs_tracemask(1, simple_strtol(argv[1], NULL, 16)); - else - cmd_yaffs_tracemask(0, 0); - - return 0; -} - -/* ydevls - lists yaffs mount points. */ -int do_ydevls(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -{ - cmd_yaffs_dev_ls(); - - return 0; -} - -/* ydevconfig mount_pt mtd_dev_num start_block end_block */ -int do_ydevconfig(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -{ - char *mtpoint; - int mtd_dev; - int start_block; - int end_block; - - if (argc != 5) { - printf - ("Bad arguments: ydevconfig mount_pt mtd_dev start_block end_block\n"); - return -1; - } - - mtpoint = argv[1]; - mtd_dev = simple_strtol(argv[2], NULL, 16); - start_block = simple_strtol(argv[3], NULL, 16); - end_block = simple_strtol(argv[4], NULL, 16); - - cmd_yaffs_devconfig(mtpoint, mtd_dev, start_block, end_block); - - return 0; -} - -int do_ymount(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -{ - char *mtpoint; - - if (argc != 2) { - printf("Bad arguments: ymount mount_pt\n"); - return -1; - } - - mtpoint = argv[1]; - printf("Mounting yaffs2 mount point %s\n", mtpoint); - - cmd_yaffs_mount(mtpoint); - - return 0; -} - -int do_yumount(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -{ - char *mtpoint; - - if (argc != 2) { - printf("Bad arguments: yumount mount_pt\n"); - return -1; - } - - mtpoint = argv[1]; - printf("Unmounting yaffs2 mount point %s\n", mtpoint); - cmd_yaffs_umount(mtpoint); - - return 0; -} - -int do_yls(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -{ - char *dirname; - - if (argc < 2 || argc > 3 || (argc == 3 && strcmp(argv[1], "-l"))) { - printf("Bad arguments: yls [-l] dir\n"); - return -1; - } - - dirname = argv[argc - 1]; - - cmd_yaffs_ls(dirname, (argc > 2) ? 1 : 0); - - return 0; -} - -int do_yrd(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -{ - char *filename; - - if (argc != 2) { - printf("Bad arguments: yrd file_name\n"); - return -1; - } - - filename = argv[1]; - - printf("Reading file %s ", filename); - - cmd_yaffs_read_file(filename); - - printf("done\n"); - return 0; -} - -int do_ywr(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -{ - char *filename; - ulong value; - ulong numValues; - - if (argc != 4) { - printf("Bad arguments: ywr file_name value n_values\n"); - return -1; - } - - filename = argv[1]; - value = hextoul(argv[2], NULL); - numValues = hextoul(argv[3], NULL); - - printf("Writing value (%lx) %lx times to %s... ", value, numValues, - filename); - - cmd_yaffs_write_file(filename, value, numValues); - - printf("done\n"); - return 0; -} - -int do_yrdm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -{ - char *filename; - ulong addr; - - if (argc != 3) { - printf("Bad arguments: yrdm file_name addr\n"); - return -1; - } - - filename = argv[1]; - addr = hextoul(argv[2], NULL); - - cmd_yaffs_mread_file(filename, (char *)addr); - - return 0; -} - -int do_ywrm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -{ - char *filename; - ulong addr; - ulong size; - - if (argc != 4) { - printf("Bad arguments: ywrm file_name addr size\n"); - return -1; - } - - filename = argv[1]; - addr = hextoul(argv[2], NULL); - size = hextoul(argv[3], NULL); - - cmd_yaffs_mwrite_file(filename, (char *)addr, size); - - return 0; -} - -int do_ymkdir(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -{ - char *dirname; - - if (argc != 2) { - printf("Bad arguments: ymkdir dir_name\n"); - return -1; - } - - dirname = argv[1]; - cmd_yaffs_mkdir(dirname); - - return 0; -} - -int do_yrmdir(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -{ - char *dirname; - - if (argc != 2) { - printf("Bad arguments: yrmdir dir_name\n"); - return -1; - } - - dirname = argv[1]; - cmd_yaffs_rmdir(dirname); - - return 0; -} - -int do_yrm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -{ - char *name; - - if (argc != 2) { - printf("Bad arguments: yrm name\n"); - return -1; - } - - name = argv[1]; - - cmd_yaffs_rm(name); - - return 0; -} - -int do_ymv(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -{ - char *oldPath; - char *newPath; - - if (argc != 3) { - printf("Bad arguments: ymv old_path new_path\n"); - return -1; - } - - oldPath = argv[1]; - newPath = argv[2]; - - cmd_yaffs_mv(newPath, oldPath); - - return 0; -} - -U_BOOT_CMD(ytrace, 2, 0, do_ytrace, - "show/set yaffs trace mask", - "[new_mask] show/set yaffs trace mask"); - -U_BOOT_CMD(ydevls, 1, 0, do_ydevls, - "list yaffs mount points", "list yaffs mount points"); - -U_BOOT_CMD(ydevconfig, 5, 0, do_ydevconfig, - "configure yaffs mount point", - "mtpoint mtd_id start_block end_block configures a yaffs2 mount point"); - -U_BOOT_CMD(ymount, 2, 0, do_ymount, - "mount yaffs", "mtpoint mounts a yaffs2 mount point"); - -U_BOOT_CMD(yumount, 2, 0, do_yumount, - "unmount yaffs", "mtpoint unmounts a yaffs2 mount point"); - -U_BOOT_CMD(yls, 3, 0, do_yls, "yaffs ls", "[-l] dirname"); - -U_BOOT_CMD(yrd, 2, 0, do_yrd, - "read file from yaffs", "path read file from yaffs"); - -U_BOOT_CMD(ywr, 4, 0, do_ywr, - "write file to yaffs", - "filename value num_vlues write values to yaffs file"); - -U_BOOT_CMD(yrdm, 3, 0, do_yrdm, - "read file to memory from yaffs", - "filename offset reads yaffs file into memory"); - -U_BOOT_CMD(ywrm, 4, 0, do_ywrm, - "write file from memory to yaffs", - "filename offset size writes memory to yaffs file"); - -U_BOOT_CMD(ymkdir, 2, 0, do_ymkdir, - "YAFFS mkdir", "dir create a yaffs directory"); - -U_BOOT_CMD(yrmdir, 2, 0, do_yrmdir, - "YAFFS rmdir", "dirname removes a yaffs directory"); - -U_BOOT_CMD(yrm, 2, 0, do_yrm, "YAFFS rm", "path removes a yaffs file"); - -U_BOOT_CMD(ymv, 4, 0, do_ymv, - "YAFFS mv", - "old_path new_path moves/rename files within a yaffs mount point"); diff --git a/common/Kconfig b/common/Kconfig index 0e8c44f3f74..7685914fa6f 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -1047,6 +1047,8 @@ if BLOBLIST choice prompt "Bloblist location" + default BLOBLIST_FIXED if SANDBOX + default BLOBLIST_ALLOC help Select the location of the bloblist, via various means. diff --git a/common/board_f.c b/common/board_f.c index 54c48d42ee9..6c5c3bfab48 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -815,21 +815,26 @@ static int initf_bootstage(void) static int initf_dm(void) { -#if defined(CONFIG_DM) && CONFIG_IS_ENABLED(SYS_MALLOC_F) int ret; + if (!CONFIG_IS_ENABLED(SYS_MALLOC_F)) + return 0; + bootstage_start(BOOTSTAGE_ID_ACCUM_DM_F, "dm_f"); ret = dm_init_and_scan(true); bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F); if (ret) return ret; + ret = dm_autoprobe(); + if (ret) + return ret; + if (IS_ENABLED(CONFIG_TIMER_EARLY)) { ret = dm_timer_init(); if (ret) return ret; } -#endif return 0; } diff --git a/common/board_r.c b/common/board_r.c index f63c6aed4d5..179259b00de 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -250,7 +250,7 @@ static int initr_dm(void) if (ret) return ret; - return 0; + return dm_autoprobe(); } #endif diff --git a/common/cyclic.c b/common/cyclic.c index 196797fd61e..fad071a39c6 100644 --- a/common/cyclic.c +++ b/common/cyclic.c @@ -36,7 +36,7 @@ void cyclic_register(struct cyclic_info *cyclic, cyclic_func_t func, cyclic->func = func; cyclic->name = name; cyclic->delay_us = delay_us; - cyclic->start_time_us = timer_get_us(); + cyclic->start_time_us = get_timer_us(0); hlist_add_head(&cyclic->list, cyclic_get_list()); } @@ -61,13 +61,13 @@ static void cyclic_run(void) * Check if this cyclic function needs to get called, e.g. * do not call the cyclic func too often */ - now = timer_get_us(); + now = get_timer_us(0); if (time_after_eq64(now, cyclic->next_call)) { /* Call cyclic function and account it's cpu-time */ cyclic->next_call = now + cyclic->delay_us; cyclic->func(cyclic); cyclic->run_cnt++; - cpu_time = timer_get_us() - now; + cpu_time = get_timer_us(0) - now; cyclic->cpu_time_us += cpu_time; /* Check if cpu-time exceeds max allowed time */ diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 4e56d9909c8..94e118f8465 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -983,6 +983,14 @@ config SPL_NAND_IDENT help SPL uses the chip ID list to identify the NAND flash. +config SPL_RELOC_LOADER + bool "Allow relocating the next phase" + help + In some cases multiple U-Boot phases need to run in SRAM, typically + at the same address. Enable this to support loading the next phase + to temporary memory, then copying it into place afterwards, then + jumping to it. + config SPL_UBI bool "Support UBI" help diff --git a/common/spl/Kconfig.tpl b/common/spl/Kconfig.tpl index 92d4d43ec87..22ca7016453 100644 --- a/common/spl/Kconfig.tpl +++ b/common/spl/Kconfig.tpl @@ -268,6 +268,14 @@ config TPL_RAM_DEVICE be already in memory when TPL takes over, e.g. loaded by the boot ROM. +config TPL_RELOC_LOADER + bool "Allow relocating the next phase" + help + In some cases multiple U-Boot phases need to run in SRAM, typically + at the same address. Enable this to support loading the next phase + to temporary memory, then copying it into place afterwards, then + jumping to it. + config TPL_RTC bool "Support RTC drivers" help diff --git a/common/spl/Kconfig.vpl b/common/spl/Kconfig.vpl index eb57dfabea5..97dfc630152 100644 --- a/common/spl/Kconfig.vpl +++ b/common/spl/Kconfig.vpl @@ -181,6 +181,14 @@ config VPL_PCI necessary driver support. This enables the drivers in drivers/pci as part of a VPL build. +config VPL_RELOC_LOADER + bool "Allow relocating the next phase" + help + In some cases multiple U-Boot phases need to run in SRAM, typically + at the same address. Enable this to support loading the next phase + to temporary memory, then copying it into place afterwards, then + jumping to it. + config VPL_RTC bool "Support RTC drivers" help diff --git a/common/spl/Makefile b/common/spl/Makefile index 75123eb666b..4c9482bd309 100644 --- a/common/spl/Makefile +++ b/common/spl/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_$(PHASE_)BOOTROM_SUPPORT) += spl_bootrom.o obj-$(CONFIG_$(PHASE_)LOAD_FIT) += spl_fit.o obj-$(CONFIG_$(PHASE_)BLK_FS) += spl_blk_fs.o obj-$(CONFIG_$(PHASE_)LEGACY_IMAGE_FORMAT) += spl_legacy.o +obj-$(CONFIG_$(PHASE_)RELOC_LOADER) += spl_reloc.o obj-$(CONFIG_$(PHASE_)NOR_SUPPORT) += spl_nor.o obj-$(CONFIG_$(PHASE_)XIP_SUPPORT) += spl_xip.o obj-$(CONFIG_$(PHASE_)YMODEM_SUPPORT) += spl_ymodem.o diff --git a/common/spl/spl.c b/common/spl/spl.c index ad31a2f8b6c..9af0a4954d4 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -500,6 +500,10 @@ static int spl_common_init(bool setup_malloc) debug("dm_init_and_scan() returned error %d\n", ret); return ret; } + + ret = dm_autoprobe(); + if (ret) + return ret; } return 0; @@ -671,8 +675,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2) BOOT_DEVICE_NONE, BOOT_DEVICE_NONE, }; - typedef void __noreturn (*jump_to_image_t)(struct spl_image_info *); - jump_to_image_t jump_to_image = &jump_to_image_no_args; + spl_jump_to_image_t jump_to_image = &jump_to_image_no_args; struct spl_image_info spl_image; int ret, os; @@ -827,6 +830,18 @@ void board_init_r(gd_t *dummy1, ulong dummy2) } spl_board_prepare_for_boot(); + + if (CONFIG_IS_ENABLED(RELOC_LOADER)) { + int ret; + + ret = spl_reloc_jump(&spl_image, jump_to_image); + if (ret) { + if (xpl_phase() == PHASE_VPL) + printf("jump failed %d\n", ret); + hang(); + } + } + jump_to_image(&spl_image); } diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c index ac8462577ff..64c4349b138 100644 --- a/common/spl/spl_fit.c +++ b/common/spl/spl_fit.c @@ -289,7 +289,7 @@ static int load_simple_fit(struct spl_load_info *info, ulong fit_offset, src = src_ptr + overhead; } else { /* Embedded data */ - if (fit_image_get_data(fit, node, &data, &length)) { + if (fit_image_get_emb_data(fit, node, &data, &length)) { puts("Cannot get image data/size\n"); return -ENOENT; } diff --git a/common/spl/spl_reloc.c b/common/spl/spl_reloc.c new file mode 100644 index 00000000000..be8349b535b --- /dev/null +++ b/common/spl/spl_reloc.c @@ -0,0 +1,183 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2024 Google LLC + * Written by Simon Glass <sjg@chromium.org> + */ + +#include <gzip.h> +#include <image.h> +#include <log.h> +#include <mapmem.h> +#include <spl.h> +#include <asm/global_data.h> +#include <asm/io.h> +#include <asm/sections.h> +#include <asm/unaligned.h> +#include <linux/types.h> +#include <lzma/LzmaTypes.h> +#include <lzma/LzmaDec.h> +#include <lzma/LzmaTools.h> +#include <u-boot/crc.h> +#include <u-boot/lz4.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* provide a way to jump straight into the relocation code, for debugging */ +#define DEBUG_JUMP 0 + +enum { + /* margin to allow for stack growth */ + RELOC_STACK_MARGIN = 0x800, + + /* align base address for DMA controllers which require it */ + BASE_ALIGN = 0x200, + + STACK_PROT_VALUE = 0x51ce4697, +}; + +typedef int (*rcode_func)(struct spl_image_info *image); + +static int setup_layout(struct spl_image_info *image, ulong *addrp) +{ + ulong base, fdt_size; + ulong limit, rcode_base; + uint rcode_size; + int buf_size, margin; + char *rcode_buf; + + limit = ALIGN(map_to_sysmem(&limit) - RELOC_STACK_MARGIN, 8); + image->stack_prot = map_sysmem(limit, sizeof(uint)); + *image->stack_prot = STACK_PROT_VALUE; + + fdt_size = fdt_totalsize(gd->fdt_blob); + base = ALIGN(map_to_sysmem(gd->fdt_blob) + fdt_size + BASE_ALIGN - 1, + BASE_ALIGN); + + rcode_size = _rcode_end - _rcode_start; + rcode_base = limit - rcode_size; + buf_size = rcode_base - base; + uint need_size = image->size + image->fdt_size; + margin = buf_size - need_size; + log_debug("spl_reloc %s->%s: margin%s%lx limit %lx fdt_size %lx base %lx avail %x image %x fdt %lx need %x\n", + spl_phase_name(spl_phase()), spl_phase_name(spl_phase() + 1), + margin >= 0 ? " " : " -", abs(margin), limit, fdt_size, base, + buf_size, image->size, image->fdt_size, need_size); + if (margin < 0) { + log_err("Image size %x but buffer is only %x\n", need_size, + buf_size); + return -ENOSPC; + } + + rcode_buf = map_sysmem(rcode_base, rcode_size); + log_debug("_rcode_start %p: %x -- func %p %x\n", _rcode_start, + *(uint *)_rcode_start, setup_layout, *(uint *)setup_layout); + + image->reloc_offset = rcode_buf - _rcode_start; + log_debug("_rcode start %lx base %lx size %x offset %lx\n", + (ulong)map_to_sysmem(_rcode_start), rcode_base, rcode_size, + image->reloc_offset); + + memcpy(rcode_buf, _rcode_start, rcode_size); + + image->buf = map_sysmem(base, need_size); + image->fdt_buf = image->buf + image->size; + image->rcode_buf = rcode_buf; + *addrp = base; + + return 0; +} + +int spl_reloc_prepare(struct spl_image_info *image, ulong *addrp) +{ + int ret; + + ret = setup_layout(image, addrp); + if (ret) + return ret; + + return 0; +} + +typedef void __noreturn (*image_entry_noargs_t)(uint crc, uint unc_len); + +/* this is the relocation + jump code that is copied to the top of memory */ +__rcode int rcode_reloc_and_jump(struct spl_image_info *image) +{ + image_entry_noargs_t entry = (image_entry_noargs_t)image->entry_point; + u32 *dst; + ulong image_len; + size_t unc_len; + int ret, crc; + uint magic; + + dst = map_sysmem(image->load_addr, image->size); + unc_len = (void *)image->rcode_buf - (void *)dst; + image_len = image->size; + if (*image->stack_prot != STACK_PROT_VALUE) + return -EFAULT; + magic = get_unaligned_le32(image->buf); + if (CONFIG_IS_ENABLED(LZMA)) { + SizeT lzma_len = unc_len; + + ret = lzmaBuffToBuffDecompress((u8 *)dst, &lzma_len, + image->buf, image_len); + unc_len = lzma_len; + } else if (CONFIG_IS_ENABLED(GZIP)) { + ret = gunzip(dst, unc_len, image->buf, &image_len); + } else if (CONFIG_IS_ENABLED(LZ4) && magic == LZ4F_MAGIC) { + ret = ulz4fn(image->buf, image_len, dst, &unc_len); + if (ret) + return ret; + } else { + u32 *src, *end, *ptr; + + unc_len = image->size; + for (src = image->buf, end = (void *)src + image->size, + ptr = dst; src < end;) + *ptr++ = *src++; + } + if (*image->stack_prot != STACK_PROT_VALUE) + return -EFAULT; + + /* copy in the FDT if needed */ + if (image->fdt_size) + memcpy(image->fdt_start, image->fdt_buf, image->fdt_size); + + crc = crc8(0, (u8 *)dst, unc_len); + + /* jump to the entry point */ + entry(crc, unc_len); +} + +int spl_reloc_jump(struct spl_image_info *image, spl_jump_to_image_t jump) +{ + rcode_func loader; + int ret; + + log_debug("malloc usage %lx bytes (%ld KB of %d KB)\n", gd->malloc_ptr, + gd->malloc_ptr / 1024, CONFIG_VAL(SYS_MALLOC_F_LEN) / 1024); + + if (*image->stack_prot != STACK_PROT_VALUE) { + log_err("stack busted, cannot continue\n"); + return -EFAULT; + } + loader = (rcode_func)(void *)rcode_reloc_and_jump + image->reloc_offset; + log_debug("Jumping via %p to %lx - image %p size %x load %lx\n", loader, + image->entry_point, image, image->size, image->load_addr); + + log_debug("unc_len %lx\n", + image->rcode_buf - map_sysmem(image->load_addr, image->size)); + if (DEBUG_JUMP) { + rcode_reloc_and_jump(image); + } else { + /* + * Must disable LOG_DEBUG since the decompressor cannot call + * log functions, printf(), etc. + */ + _Static_assert(DEBUG_JUMP || !_DEBUG, + "Cannot have debug output from decompressor"); + ret = loader(image); + } + + return -EFAULT; +} diff --git a/common/splash_source.c b/common/splash_source.c index f43e7cc1be7..2df78a4f2d7 100644 --- a/common/splash_source.c +++ b/common/splash_source.c @@ -395,19 +395,10 @@ static int splash_load_fit(struct splash_location *location, u32 bmp_load_addr) } /* Extract the splash data from FIT */ - /* 1. Test if splash is in FIT internal data. */ - if (!fit_image_get_data(fit_header, node_offset, &internal_splash_data, &internal_splash_size)) - memmove((void *)(uintptr_t)bmp_load_addr, internal_splash_data, internal_splash_size); - /* 2. Test if splash is in FIT external data with fixed position. */ - else if (!fit_image_get_data_position(fit_header, node_offset, &external_splash_addr)) - is_splash_external = true; - /* 3. Test if splash is in FIT external data with offset. */ - else if (!fit_image_get_data_offset(fit_header, node_offset, &external_splash_addr)) { - /* Align data offset to 4-byte boundary */ - fit_size = ALIGN(fdt_totalsize(fit_header), 4); - /* External splash offset means the offset by end of FIT header */ - external_splash_addr += location->offset + fit_size; - is_splash_external = true; + if (!fit_image_get_data(fit_header, node_offset, &internal_splash_data, + &internal_splash_size)) { + memmove((void *)(uintptr_t)bmp_load_addr, internal_splash_data, + internal_splash_size); } else { printf("Failed to get splash image from FIT\n"); return -ENODATA; diff --git a/configs/A10-OLinuXino-Lime_defconfig b/configs/A10-OLinuXino-Lime_defconfig index 57e91d0f017..96e3d19038b 100644 --- a/configs/A10-OLinuXino-Lime_defconfig +++ b/configs/A10-OLinuXino-Lime_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-olinuxino-lime" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun4i-a10-olinuxino-lime" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=480 diff --git a/configs/A10s-OLinuXino-M_defconfig b/configs/A10s-OLinuXino-M_defconfig index 841fe0d3f09..5a10fce7273 100644 --- a/configs/A10s-OLinuXino-M_defconfig +++ b/configs/A10s-OLinuXino-M_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-olinuxino-micro" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun5i-a10s-olinuxino-micro" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=432 diff --git a/configs/A13-OLinuXinoM_defconfig b/configs/A13-OLinuXinoM_defconfig index befe6d86b25..5001ce9ce52 100644 --- a/configs/A13-OLinuXinoM_defconfig +++ b/configs/A13-OLinuXinoM_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino-micro" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun5i-a13-olinuxino-micro" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=408 diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig index 689ea533ee9..bc0fc0efe0a 100644 --- a/configs/A13-OLinuXino_defconfig +++ b/configs/A13-OLinuXino_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun5i-a13-olinuxino" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=408 diff --git a/configs/Ampe_A76_defconfig b/configs/Ampe_A76_defconfig index 1087512235a..e38ecf56929 100644 --- a/configs/Ampe_A76_defconfig +++ b/configs/Ampe_A76_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-ampe-a76" +# CONFIG_OF_UPSTREAM is not set CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=432 diff --git a/configs/Auxtek-T003_defconfig b/configs/Auxtek-T003_defconfig index 7d81f12f766..520939538f8 100644 --- a/configs/Auxtek-T003_defconfig +++ b/configs/Auxtek-T003_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-auxtek-t003" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun5i-a10s-auxtek-t003" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=408 diff --git a/configs/Auxtek-T004_defconfig b/configs/Auxtek-T004_defconfig index 4c7154b04c4..8b3a9eac788 100644 --- a/configs/Auxtek-T004_defconfig +++ b/configs/Auxtek-T004_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-auxtek-t004" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun5i-a10s-auxtek-t004" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=432 diff --git a/configs/CHIP_defconfig b/configs/CHIP_defconfig index cd9bdbfd36f..c220d269ab6 100644 --- a/configs/CHIP_defconfig +++ b/configs/CHIP_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun5i-r8-chip" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun5i-r8-chip" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y diff --git a/configs/CHIP_pro_defconfig b/configs/CHIP_pro_defconfig index 59df41a1502..05874125f4b 100644 --- a/configs/CHIP_pro_defconfig +++ b/configs/CHIP_pro_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun5i-gr8-chip-pro" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun5i-gr8-chip-pro" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y diff --git a/configs/Chuwi_V7_CW0825_defconfig b/configs/Chuwi_V7_CW0825_defconfig index 02b3e69584f..40f52d1a8d3 100644 --- a/configs/Chuwi_V7_CW0825_defconfig +++ b/configs/Chuwi_V7_CW0825_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-chuwi-v7-cw0825" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun4i-a10-chuwi-v7-cw0825" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=408 diff --git a/configs/Cubieboard_defconfig b/configs/Cubieboard_defconfig index ab3f65ad667..9fc57c23f43 100644 --- a/configs/Cubieboard_defconfig +++ b/configs/Cubieboard_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-cubieboard" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun4i-a10-cubieboard" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=480 diff --git a/configs/Empire_electronix_d709_defconfig b/configs/Empire_electronix_d709_defconfig index 4bd3b569392..18b1cfaa811 100644 --- a/configs/Empire_electronix_d709_defconfig +++ b/configs/Empire_electronix_d709_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-empire-electronix-d709" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun5i-a13-empire-electronix-d709" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=432 diff --git a/configs/Empire_electronix_m712_defconfig b/configs/Empire_electronix_m712_defconfig index 18873dba340..abaf386563e 100644 --- a/configs/Empire_electronix_m712_defconfig +++ b/configs/Empire_electronix_m712_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-empire-electronix-m712" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun5i-a13-empire-electronix-m712" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=408 diff --git a/configs/Hyundai_A7HD_defconfig b/configs/Hyundai_A7HD_defconfig index 482e0fb7a83..541f98db9e1 100644 --- a/configs/Hyundai_A7HD_defconfig +++ b/configs/Hyundai_A7HD_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-hyundai-a7hd" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun4i-a10-hyundai-a7hd" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_EMR1=4 diff --git a/configs/Linksprite_pcDuino_defconfig b/configs/Linksprite_pcDuino_defconfig index 49dcfa098ee..0e1a7780c3d 100644 --- a/configs/Linksprite_pcDuino_defconfig +++ b/configs/Linksprite_pcDuino_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-pcduino" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun4i-a10-pcduino" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_USB1_VBUS_PIN="" diff --git a/configs/Marsboard_A10_defconfig b/configs/Marsboard_A10_defconfig index 3c5312d8824..c7608ed0fdc 100644 --- a/configs/Marsboard_A10_defconfig +++ b/configs/Marsboard_A10_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-marsboard" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun4i-a10-marsboard" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_AHCI=y diff --git a/configs/Mele_A1000_defconfig b/configs/Mele_A1000_defconfig index 9ac2e4839d9..93e73ebe3f1 100644 --- a/configs/Mele_A1000_defconfig +++ b/configs/Mele_A1000_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-a1000" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun4i-a10-a1000" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_VIDEO_VGA=y diff --git a/configs/Mini-X_defconfig b/configs/Mini-X_defconfig index e8bc1485766..e64352b4b6a 100644 --- a/configs/Mini-X_defconfig +++ b/configs/Mini-X_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mini-xplus" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun4i-a10-mini-xplus" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_USB0_VBUS_PIN="PB9" diff --git a/configs/UTOO_P66_defconfig b/configs/UTOO_P66_defconfig index 88a082c0567..d74ef2127d9 100644 --- a/configs/UTOO_P66_defconfig +++ b/configs/UTOO_P66_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-utoo-p66" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun5i-a13-utoo-p66" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=432 diff --git a/configs/Wobo_i5_defconfig b/configs/Wobo_i5_defconfig index 9e9bddb7649..9f6d2a78f48 100644 --- a/configs/Wobo_i5_defconfig +++ b/configs/Wobo_i5_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-wobo-i5" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun5i-a10s-wobo-i5" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=432 diff --git a/configs/am62ax_evm_a53_defconfig b/configs/am62ax_evm_a53_defconfig index 7d63340c903..bf6e9639901 100644 --- a/configs/am62ax_evm_a53_defconfig +++ b/configs/am62ax_evm_a53_defconfig @@ -1,13 +1,14 @@ CONFIG_ARM=y CONFIG_ARCH_K3=y CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM62A7=y CONFIG_TARGET_AM62A7_A53_EVM=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 +CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am62a7-sk" CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y @@ -32,11 +33,14 @@ CONFIG_SPL_PAD_TO=0x0 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MMCSD_RAW_MODE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 +CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" +CONFIG_SPL_I2C=y CONFIG_SPL_DM_MAILBOX=y CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_CMD_MMC=y +CONFIG_MMC_SPEED_MODE_SET=y CONFIG_CMD_REMOTEPROC=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y @@ -56,10 +60,21 @@ CONFIG_CLK_TI_SCI=y CONFIG_DMA_CHANNELS=y CONFIG_TI_K3_NAVSS_UDMA=y CONFIG_TI_SCI_PROTOCOL=y -# CONFIG_GPIO is not set -# CONFIG_I2C is not set +CONFIG_SPL_DM_GPIO_LOOKUP_LABEL=y +CONFIG_DA8XX_GPIO=y +CONFIG_DM_PCA953X=y +CONFIG_SPL_DM_PCA953X=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_OMAP24XX=y CONFIG_DM_MAILBOX=y CONFIG_K3_SEC_PROXY=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_SPL_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_SPL_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS200_SUPPORT=y +CONFIG_SPL_MMC_HS200_SUPPORT=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ADMA=y CONFIG_SPL_MMC_SDHCI_ADMA=y @@ -73,6 +88,12 @@ CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_SINGLE=y CONFIG_POWER_DOMAIN=y CONFIG_TI_SCI_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_SPL_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_SPL_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_SPL_DM_REGULATOR_GPIO=y CONFIG_K3_SYSTEM_CONTROLLER=y CONFIG_REMOTEPROC_TI_K3_ARM64=y CONFIG_REMOTEPROC_TI_K3_DSP=y diff --git a/configs/am62ax_evm_r5_defconfig b/configs/am62ax_evm_r5_defconfig index ec712b14492..274cd20e1c1 100644 --- a/configs/am62ax_evm_r5_defconfig +++ b/configs/am62ax_evm_r5_defconfig @@ -8,7 +8,6 @@ CONFIG_TARGET_AM62A7_R5_EVM=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x43c3a7f0 CONFIG_ENV_SIZE=0x20000 -CONFIG_ENV_OFFSET=0x680000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-am62a7-r5-sk" CONFIG_DM_RESET=y @@ -63,9 +62,7 @@ CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_IS_NOWHERE=y -CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_SYS_MMC_ENV_PART=1 CONFIG_NO_NET=y CONFIG_SPL_DM=y CONFIG_SPL_DM_DEVICE_REMOVE=y @@ -88,6 +85,7 @@ CONFIG_DM_MAILBOX=y CONFIG_K3_SEC_PROXY=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ADMA=y +CONFIG_SPL_MMC_SDHCI_ADMA=y CONFIG_MMC_SDHCI_AM654=y CONFIG_MTD=y CONFIG_PINCTRL=y diff --git a/configs/am62px_evm_a53_defconfig b/configs/am62px_evm_a53_defconfig index 9635beb1b27..30b4a24ee9a 100644 --- a/configs/am62px_evm_a53_defconfig +++ b/configs/am62px_evm_a53_defconfig @@ -4,7 +4,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM62P5=y CONFIG_TARGET_AM62P5_A53_EVM=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y diff --git a/configs/am62px_evm_r5_defconfig b/configs/am62px_evm_r5_defconfig index a0eaa128f47..9df90e05d36 100644 --- a/configs/am62px_evm_r5_defconfig +++ b/configs/am62px_evm_r5_defconfig @@ -10,7 +10,6 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x43c4a7f0 CONFIG_SF_DEFAULT_SPEED=25000000 CONFIG_SF_DEFAULT_MODE=0 CONFIG_ENV_SIZE=0x20000 -CONFIG_ENV_OFFSET=0x680000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-am62p5-r5-sk" CONFIG_DM_RESET=y @@ -67,9 +66,7 @@ CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_IS_NOWHERE=y -CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_SYS_MMC_ENV_PART=1 CONFIG_NO_NET=y CONFIG_SPL_DM=y CONFIG_SPL_DM_DEVICE_REMOVE=y diff --git a/configs/am62x_a53_usbdfu.config b/configs/am62x_a53_usbdfu.config index 0d3c6df1e73..812f99ee70b 100644 --- a/configs/am62x_a53_usbdfu.config +++ b/configs/am62x_a53_usbdfu.config @@ -10,7 +10,7 @@ CONFIG_SYSCON=y CONFIG_SPL_SYSCON=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y -CONFIG_SYS_DFU_DATA_BUF_SIZE=0x5000 +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x40000 CONFIG_SYS_DFU_MAX_FILE_SIZE=0x800000 CONFIG_USB=y CONFIG_DM_USB_GADGET=y diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig index 003fa4f8681..c77e09db156 100644 --- a/configs/am62x_evm_a53_defconfig +++ b/configs/am62x_evm_a53_defconfig @@ -1,14 +1,15 @@ CONFIG_ARM=y CONFIG_ARCH_K3=y CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM625=y CONFIG_TARGET_AM625_A53_EVM=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80b80000 CONFIG_SF_DEFAULT_SPEED=25000000 +CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am625-sk" CONFIG_SPL_TEXT_BASE=0x80080000 @@ -41,7 +42,9 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MMCSD_RAW_MODE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 +CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" +CONFIG_SPL_I2C=y CONFIG_SPL_DM_MAILBOX=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_POWER_DOMAIN=y @@ -75,9 +78,21 @@ CONFIG_DFU_SF=y CONFIG_DMA_CHANNELS=y CONFIG_TI_K3_NAVSS_UDMA=y CONFIG_TI_SCI_PROTOCOL=y +CONFIG_SPL_DM_GPIO_LOOKUP_LABEL=y +CONFIG_DA8XX_GPIO=y +CONFIG_DM_PCA953X=y +CONFIG_SPL_DM_PCA953X=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_OMAP24XX=y CONFIG_DM_MAILBOX=y CONFIG_K3_SEC_PROXY=y CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_SPL_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_SPL_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS200_SUPPORT=y +CONFIG_SPL_MMC_HS200_SUPPORT=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ADMA=y CONFIG_SPL_MMC_SDHCI_ADMA=y @@ -98,6 +113,12 @@ CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_SINGLE=y CONFIG_POWER_DOMAIN=y CONFIG_TI_SCI_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_SPL_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_SPL_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_SPL_DM_REGULATOR_GPIO=y CONFIG_K3_SYSTEM_CONTROLLER=y CONFIG_REMOTEPROC_TI_K3_ARM64=y CONFIG_RESET_TI_SCI=y diff --git a/configs/am62x_evm_r5_defconfig b/configs/am62x_evm_r5_defconfig index fcc5eb02867..b47f2f2d1f3 100644 --- a/configs/am62x_evm_r5_defconfig +++ b/configs/am62x_evm_r5_defconfig @@ -4,7 +4,6 @@ CONFIG_SYS_MALLOC_LEN=0x08000000 CONFIG_SYS_MALLOC_F_LEN=0x9000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM625=y CONFIG_TARGET_AM625_R5_EVM=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y diff --git a/configs/am62x_r5_usbdfu.config b/configs/am62x_r5_usbdfu.config index 772bb2ab935..efaae504c1a 100644 --- a/configs/am62x_r5_usbdfu.config +++ b/configs/am62x_r5_usbdfu.config @@ -1,7 +1,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SYSCON=y CONFIG_SPL_SYSCON=y -CONFIG_SYS_DFU_DATA_BUF_SIZE=0x5000 +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x40000 CONFIG_MISC=y CONFIG_USB=y CONFIG_DM_USB_GADGET=y diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig index e6e3e018da6..a501f3f567e 100644 --- a/configs/am64x_evm_a53_defconfig +++ b/configs/am64x_evm_a53_defconfig @@ -6,7 +6,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM642=y CONFIG_K3_ATF_LOAD_ADDR=0x701c0000 CONFIG_TARGET_AM642_A53_EVM=y diff --git a/configs/am64x_evm_r5_defconfig b/configs/am64x_evm_r5_defconfig index c4e498a6ae7..0ceac16dd20 100644 --- a/configs/am64x_evm_r5_defconfig +++ b/configs/am64x_evm_r5_defconfig @@ -5,14 +5,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x80000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM642=y CONFIG_TARGET_AM642_R5_EVM=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7019b800 CONFIG_SF_DEFAULT_SPEED=25000000 CONFIG_ENV_SIZE=0x20000 -CONFIG_ENV_OFFSET=0x680000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-am642-r5-evm" @@ -85,9 +83,7 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_OF_LIST="k3-am642-r5-evm k3-am642-r5-sk" CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y -CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_SYS_MMC_ENV_PART=1 CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig index b6df8b428c6..e9b736714a5 100644 --- a/configs/am65x_evm_a53_defconfig +++ b/configs/am65x_evm_a53_defconfig @@ -5,7 +5,6 @@ CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM654=y CONFIG_TARGET_AM654_A53_EVM=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index 083522ce9b4..4bd5e8f63ff 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -5,7 +5,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x55000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM654=y CONFIG_K3_EARLY_CONS=y CONFIG_TARGET_AM654_R5_EVM=y diff --git a/configs/am65x_evm_r5_usbdfu_defconfig b/configs/am65x_evm_r5_usbdfu_defconfig index e60e0d6588d..ae57007d898 100644 --- a/configs/am65x_evm_r5_usbdfu_defconfig +++ b/configs/am65x_evm_r5_usbdfu_defconfig @@ -5,7 +5,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x55000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM654=y CONFIG_K3_EARLY_CONS=y CONFIG_TARGET_AM654_R5_EVM=y diff --git a/configs/am65x_evm_r5_usbmsc_defconfig b/configs/am65x_evm_r5_usbmsc_defconfig index ecd48c45ea1..3aa17eb77f0 100644 --- a/configs/am65x_evm_r5_usbmsc_defconfig +++ b/configs/am65x_evm_r5_usbmsc_defconfig @@ -5,7 +5,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x55000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM654=y CONFIG_K3_EARLY_CONS=y CONFIG_TARGET_AM654_R5_EVM=y diff --git a/configs/amd_versal2_mini_qspi_defconfig b/configs/amd_versal2_mini_qspi_defconfig index eb63f060c1b..2750fa2cc27 100644 --- a/configs/amd_versal2_mini_qspi_defconfig +++ b/configs/amd_versal2_mini_qspi_defconfig @@ -74,5 +74,6 @@ CONFIG_PL01X_SERIAL=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_ZYNQMP_GQSPI=y +CONFIG_SPI_STACKED_PARALLEL=y # CONFIG_GZIP is not set # CONFIG_LMB is not set diff --git a/configs/anbernic_rg35xx_h700_defconfig b/configs/anbernic_rg35xx_h700_defconfig index cd3d6bfba06..c5c40a158d3 100644 --- a/configs/anbernic_rg35xx_h700_defconfig +++ b/configs/anbernic_rg35xx_h700_defconfig @@ -2,16 +2,16 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun50i-h700-anbernic-rg35xx-2024" CONFIG_SPL=y -CONFIG_DRAM_SUN50I_H616_DX_ODT=0x08080808 -CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0e0e0e0e -CONFIG_DRAM_SUN50I_H616_CA_DRI=0x0e0e -CONFIG_DRAM_SUN50I_H616_ODT_EN=0x7887bbbb -CONFIG_DRAM_SUN50I_H616_TPR2=0x1 -CONFIG_DRAM_SUN50I_H616_TPR6=0x40808080 -CONFIG_DRAM_SUN50I_H616_TPR10=0x402f6633 -CONFIG_DRAM_SUN50I_H616_TPR11=0x1b1f1e1c -CONFIG_DRAM_SUN50I_H616_TPR12=0x06060606 -CONFIG_DRAM_SUN50I_H616_PHY_ADDR_MAP_1=y +CONFIG_DRAM_SUNXI_DX_ODT=0x08080808 +CONFIG_DRAM_SUNXI_DX_DRI=0x0e0e0e0e +CONFIG_DRAM_SUNXI_CA_DRI=0x0e0e +CONFIG_DRAM_SUNXI_ODT_EN=0x7887bbbb +CONFIG_DRAM_SUNXI_TPR2=0x1 +CONFIG_DRAM_SUNXI_TPR6=0x40808080 +CONFIG_DRAM_SUNXI_TPR10=0x402f6633 +CONFIG_DRAM_SUNXI_TPR11=0x1b1f1e1c +CONFIG_DRAM_SUNXI_TPR12=0x06060606 +CONFIG_DRAM_SUNXI_PHY_ADDR_MAP_1=y CONFIG_MACH_SUN50I_H616=y CONFIG_SUNXI_DRAM_H616_LPDDR4=y CONFIG_DRAM_CLK=672 diff --git a/configs/arbel_evb_defconfig b/configs/arbel_evb_defconfig index 4a58146e614..c93fa34eb57 100644 --- a/configs/arbel_evb_defconfig +++ b/configs/arbel_evb_defconfig @@ -80,6 +80,10 @@ CONFIG_PINCTRL=y CONFIG_PINCONF=y CONFIG_PINCTRL_NPCM8XX=y CONFIG_DM_REGULATOR=y +CONFIG_BITBANGMII=y +CONFIG_BITBANGMII_MULTI=y +CONFIG_PHY_ADDR_ENABLE=y +CONFIG_PHY_ADDR=0 CONFIG_DM_REGULATOR_NPCM8XX=y CONFIG_RNG_NPCM=y CONFIG_DM_SERIAL=y diff --git a/configs/ba10_tv_box_defconfig b/configs/ba10_tv_box_defconfig index b89dd8ea62b..c76f36ec37e 100644 --- a/configs/ba10_tv_box_defconfig +++ b/configs/ba10_tv_box_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-ba10-tvbox" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun4i-a10-ba10-tvbox" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=384 diff --git a/configs/bcm94908_defconfig b/configs/bcm94908_defconfig index 3979c29e932..e651212d685 100644 --- a/configs/bcm94908_defconfig +++ b/configs/bcm94908_defconfig @@ -9,13 +9,22 @@ CONFIG_TARGET_BCM94908=y CONFIG_NR_DRAM_BANKS=2 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 -CONFIG_DEFAULT_DEVICE_TREE="bcm94908" +CONFIG_DEFAULT_DEVICE_TREE="broadcom/bcmbca/bcm94908" CONFIG_SYS_LOAD_ADDR=0x01000000 CONFIG_IDENT_STRING=" Broadcom BCM4908" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_NAND=y CONFIG_CMD_CACHE=y +CONFIG_OF_CONTROL=y +CONFIG_OF_UPSTREAM=y CONFIG_OF_EMBED=y +CONFIG_DM=y CONFIG_CLK=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_RAW_NAND=y +CONFIG_NAND_BRCMNAND=y +CONFIG_NAND_BRCMNAND_BCMBCA=y diff --git a/configs/bcm963138_defconfig b/configs/bcm963138_defconfig index cc2ffe5fcd2..f1f83dc2f1b 100644 --- a/configs/bcm963138_defconfig +++ b/configs/bcm963138_defconfig @@ -8,7 +8,7 @@ CONFIG_TARGET_BCM963138=y CONFIG_NR_DRAM_BANKS=1 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 -CONFIG_DEFAULT_DEVICE_TREE="bcm963138" +CONFIG_DEFAULT_DEVICE_TREE="broadcom/bcm963138" CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_SYS_LOAD_ADDR=0x01000000 CONFIG_IDENT_STRING=" Broadcom BCM63138" @@ -16,6 +16,15 @@ CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_NAND=y CONFIG_CMD_CACHE=y +CONFIG_OF_CONTROL=y +CONFIG_OF_UPSTREAM=y CONFIG_OF_EMBED=y +CONFIG_DM=y CONFIG_CLK=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_RAW_NAND=y +CONFIG_NAND_BRCMNAND=y +CONFIG_NAND_BRCMNAND_BCMBCA=y diff --git a/configs/bcm963148_defconfig b/configs/bcm963148_defconfig index a0dd06ba505..579fdd5d22c 100644 --- a/configs/bcm963148_defconfig +++ b/configs/bcm963148_defconfig @@ -9,7 +9,7 @@ CONFIG_TARGET_BCM963148=y CONFIG_NR_DRAM_BANKS=1 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 -CONFIG_DEFAULT_DEVICE_TREE="bcm963148" +CONFIG_DEFAULT_DEVICE_TREE="broadcom/bcm963148" CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_SYS_LOAD_ADDR=0x01000000 CONFIG_IDENT_STRING=" Broadcom BCM63148" @@ -17,6 +17,15 @@ CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_NAND=y CONFIG_CMD_CACHE=y +CONFIG_OF_CONTROL=y +CONFIG_OF_UPSTREAM=y CONFIG_OF_EMBED=y +CONFIG_DM=y CONFIG_CLK=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_RAW_NAND=y +CONFIG_NAND_BRCMNAND=y +CONFIG_NAND_BRCMNAND_BCMBCA=y diff --git a/configs/capricorn_cxg3_defconfig b/configs/capricorn_cxg3_defconfig index 276445528a9..fa1c279ef94 100644 --- a/configs/capricorn_cxg3_defconfig +++ b/configs/capricorn_cxg3_defconfig @@ -76,6 +76,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_READ=y +CONFIG_CMD_WDT=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig index decac2e1935..1b018ef4d7c 100644 --- a/configs/chromebook_bob_defconfig +++ b/configs/chromebook_bob_defconfig @@ -1,28 +1,16 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y -CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-gru-bob" CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3399=y CONFIG_ROCKCHIP_BOOT_MODE_REG=0 -CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 # CONFIG_SPL_MMC is not set -CONFIG_SPL_STACK=0xff8effff -CONFIG_SPL_TEXT_BASE=0xff8c2000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0xff8e0000 -CONFIG_SPL_BSS_MAX_SIZE=0x10000 -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_SF_DEFAULT_BUS=1 CONFIG_DEBUG_UART_BASE=0xff1a0000 @@ -30,22 +18,23 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DEBUG_UART=y -# CONFIG_SPL_FIT_SIGNATURE is not set CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_BLOBLIST=y +# CONFIG_TPL_BLOBLIST is not set +CONFIG_BLOBLIST_FIXED=y CONFIG_BLOBLIST_ADDR=0x100000 CONFIG_BLOBLIST_SIZE=0x1000 -CONFIG_SPL_MAX_SIZE=0x1e000 +CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_HANDOFF=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0xE0000 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_TPL=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y @@ -60,7 +49,7 @@ CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_LOG=y CONFIG_SPL_OF_CONTROL=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ROCKCHIP_GPIO=y @@ -76,6 +65,7 @@ CONFIG_MMC_PWRSEQ=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_WINBOND=y @@ -85,6 +75,7 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_TYPEC=y CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y +CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_CROS_EC=y diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index 0fb73049738..93e3355219b 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -2,6 +2,7 @@ CONFIG_X86=y CONFIG_TEXT_BASE=0x1110000 CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SYS_MALLOC_F_LEN=0x3d00 +CONFIG_BLOBLIST_SIZE_RELOC=0x30000 CONFIG_NR_DRAM_BANKS=8 CONFIG_MAX_CPUS=8 CONFIG_SPL_DM_SPI=y @@ -44,8 +45,9 @@ CONFIG_LOGF_FUNC=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BLOBLIST=y # CONFIG_TPL_BLOBLIST is not set -CONFIG_BLOBLIST_ADDR=0x100000 -CONFIG_BLOBLIST_SIZE=0x30000 +CONFIG_BLOBLIST_FIXED=y +CONFIG_BLOBLIST_ADDR=0xfef10000 +CONFIG_BLOBLIST_SIZE=0x1000 CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_HANDOFF=y CONFIG_SPL_SEPARATE_BSS=y @@ -127,4 +129,3 @@ CONFIG_GENERATE_ACPI_TABLE=y CONFIG_CMD_DHRYSTONE=y CONFIG_TPM=y # CONFIG_GZIP is not set -CONFIG_BLOBLIST_TABLES=y diff --git a/configs/chromebook_kevin_defconfig b/configs/chromebook_kevin_defconfig index 5bbea6c42a8..1ee0c0e6c9d 100644 --- a/configs/chromebook_kevin_defconfig +++ b/configs/chromebook_kevin_defconfig @@ -1,29 +1,17 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y -CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-gru-kevin" CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3399=y CONFIG_ROCKCHIP_BOOT_MODE_REG=0 -CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 # CONFIG_SPL_MMC is not set CONFIG_TARGET_CHROMEBOOK_KEVIN=y -CONFIG_SPL_STACK=0xff8effff -CONFIG_SPL_TEXT_BASE=0xff8c2000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0xff8e0000 -CONFIG_SPL_BSS_MAX_SIZE=0x10000 -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_SF_DEFAULT_BUS=1 CONFIG_DEBUG_UART_BASE=0xff1a0000 @@ -31,22 +19,23 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DEBUG_UART=y -# CONFIG_SPL_FIT_SIGNATURE is not set CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-kevin.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_BLOBLIST=y +# CONFIG_TPL_BLOBLIST is not set +CONFIG_BLOBLIST_FIXED=y CONFIG_BLOBLIST_ADDR=0x100000 CONFIG_BLOBLIST_SIZE=0x1000 -CONFIG_SPL_MAX_SIZE=0x1e000 +CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_HANDOFF=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0xE0000 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_TPL=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y @@ -61,7 +50,7 @@ CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_LOG=y CONFIG_SPL_OF_CONTROL=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ROCKCHIP_GPIO=y @@ -77,6 +66,7 @@ CONFIG_MMC_PWRSEQ=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_WINBOND=y @@ -86,6 +76,7 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_TYPEC=y CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y +CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_CROS_EC=y diff --git a/configs/chromebook_samus_tpl_defconfig b/configs/chromebook_samus_tpl_defconfig index fc524da5480..42337d7a11e 100644 --- a/configs/chromebook_samus_tpl_defconfig +++ b/configs/chromebook_samus_tpl_defconfig @@ -34,6 +34,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_BLOBLIST=y +CONFIG_BLOBLIST_FIXED=y CONFIG_BLOBLIST_ADDR=0xff7c0000 CONFIG_BLOBLIST_SIZE=0x1000 CONFIG_SPL_NO_BSS_LIMIT=y diff --git a/configs/difrnce_dit4350_defconfig b/configs/difrnce_dit4350_defconfig index f54a83d929d..b0604302c97 100644 --- a/configs/difrnce_dit4350_defconfig +++ b/configs/difrnce_dit4350_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-difrnce-dit4350" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun5i-a13-difrnce-dit4350" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=408 diff --git a/configs/dserve_dsrv9703c_defconfig b/configs/dserve_dsrv9703c_defconfig index f5ff69d7d63..06a79c935d7 100644 --- a/configs/dserve_dsrv9703c_defconfig +++ b/configs/dserve_dsrv9703c_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-dserve-dsrv9703c" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun4i-a10-dserve-dsrv9703c" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_USB0_VBUS_PIN="PB9" diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 00f23174210..d8a671b7a8a 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -4,20 +4,13 @@ CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x01000000 +CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_SF_DEFAULT_SPEED=20000000 -CONFIG_ENV_OFFSET=0x3F8000 -CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly" +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3288-firefly" CONFIG_DM_RESET=y -CONFIG_SYS_MONITOR_LEN=614400 CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_FIREFLY_RK3288=y -CONFIG_SPL_STACK_R_ADDR=0x80000 -CONFIG_SPL_STACK=0xff718000 -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_SPL_SIZE_LIMIT=0x40000 @@ -25,13 +18,15 @@ CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set -CONFIG_USE_PREBOOT=y -CONFIG_DEFAULT_FDT_FILE="rk3288-firefly.dtb" -CONFIG_SILENT_CONSOLE=y -CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3288-firefly.dtb" +CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x7f8000 -CONFIG_SPL_NO_BSS_LIMIT=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -47,10 +42,12 @@ CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SPL_OF_CONTROL=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_LIVE=y +CONFIG_OF_UPSTREAM=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_SYSCON=y @@ -63,17 +60,22 @@ CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_LED=y CONFIG_LED_GPIO=y +CONFIG_MISC=y +CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH_PHY=y +CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_DM_PMIC=y -# CONFIG_SPL_PMIC_CHILDREN is not set CONFIG_PMIC_ACT8846=y CONFIG_REGULATOR_ACT8846=y CONFIG_DM_REGULATOR_FIXED=y +CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y @@ -96,4 +98,5 @@ CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_CMD_DHRYSTONE=y +CONFIG_SPL_CRC32=y CONFIG_ERRNO_STR=y diff --git a/configs/iNet_3F_defconfig b/configs/iNet_3F_defconfig index 5cc1a1d57f4..5ab210b345b 100644 --- a/configs/iNet_3F_defconfig +++ b/configs/iNet_3F_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet-3f" +# CONFIG_OF_UPSTREAM is not set CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=432 diff --git a/configs/iNet_3W_defconfig b/configs/iNet_3W_defconfig index 38b20109a57..415575cc228 100644 --- a/configs/iNet_3W_defconfig +++ b/configs/iNet_3W_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet-3w" +# CONFIG_OF_UPSTREAM is not set CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=408 diff --git a/configs/iNet_86VS_defconfig b/configs/iNet_86VS_defconfig index 2c8ecb51de0..42c9da9f947 100644 --- a/configs/iNet_86VS_defconfig +++ b/configs/iNet_86VS_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-inet-86vs" +# CONFIG_OF_UPSTREAM is not set CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=408 diff --git a/configs/ibm-sbp1_defconfig b/configs/ibm-sbp1_defconfig new file mode 100644 index 00000000000..cf667217ccc --- /dev/null +++ b/configs/ibm-sbp1_defconfig @@ -0,0 +1,126 @@ +CONFIG_ARM=y +CONFIG_SYS_DCACHE_OFF=y +CONFIG_POSITION_INDEPENDENT=y +CONFIG_SPL_SYS_THUMB_BUILD=y +CONFIG_ARCH_ASPEED=y +CONFIG_TEXT_BASE=0x80000000 +CONFIG_SYS_MALLOC_LEN=0x2000000 +CONFIG_SYS_MALLOC_F_LEN=0x800 +CONFIG_ASPEED_AST2600=y +CONFIG_TARGET_EVB_AST2600=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_SPL_LDSCRIPT="arch/arm/mach-aspeed/ast2600/u-boot-spl.lds" +CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_OFFSET=0xe0000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="ast2600-sbp1" +CONFIG_DM_RESET=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK_R_ADDR=0x83000000 +CONFIG_SPL_SIZE_LIMIT=0x10000 +CONFIG_SPL=y +# CONFIG_ARMV7_NONSEC is not set +CONFIG_SYS_LOAD_ADDR=0x83000000 +CONFIG_SPL_PAYLOAD="u-boot.img" +CONFIG_BUILD_TARGET="u-boot-with-spl.bin" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_FIT=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_LOAD_FIT_ADDRESS=0x10000 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200n8 root=/dev/ram rw earlycon" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="run bootspi" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y +CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x83000000 +CONFIG_SPL_BSS_MAX_SIZE=0x1000000 +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000000 +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SPL_FIT_IMAGE_TINY=y +CONFIG_SPL_DM_RESET=y +CONFIG_SPL_RAM_SUPPORT=y +CONFIG_SPL_RAM_DEVICE=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_CBSIZE=256 +CONFIG_SYS_PBSIZE=276 +CONFIG_CMD_BOOTZ=y +# CONFIG_BOOTM_NETBSD is not set +# CONFIG_BOOTM_PLAN9 is not set +# CONFIG_BOOTM_RTEMS is not set +# CONFIG_BOOTM_VXWORKS is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +CONFIG_CMD_EEPROM=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_NCSI=y +CONFIG_CMD_EXT4=y +CONFIG_DOS_PARTITION=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_EFI_PARTITION=y +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_ENV_SECT_SIZE_AUTO=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_REGMAP=y +CONFIG_SPL_OF_TRANSLATE=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_ASPEED_GPIO=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_ASPEED=y +CONFIG_I2C_EEPROM=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ASPEED=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_ISSI=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PHY_REALTEK=y +CONFIG_PHY_NCSI=y +CONFIG_DM_MDIO=y +CONFIG_FTGMAC100=y +CONFIG_ASPEED_MDIO=y +CONFIG_PHY=y +CONFIG_PINCTRL=y +CONFIG_RAM=y +CONFIG_SPL_RAM=y +CONFIG_DM_SERIAL=y +CONFIG_SYS_NS16550=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_SPI_DIRMAP=y +CONFIG_SPI_ASPEED_SMC=y +CONFIG_SYSRESET=y +CONFIG_SPL_SYSRESET=y +CONFIG_WDT=y +CONFIG_SHA384=y +CONFIG_SPL_CRC32=y +CONFIG_HEXDUMP=y +# CONFIG_EFI_LOADER is not set +CONFIG_PHANDLE_CHECK_SEQ=y diff --git a/configs/imx8mm-phygate-tauri-l_defconfig b/configs/imx8mm-phygate-tauri-l_defconfig index 18fffa7405e..c87062404da 100644 --- a/configs/imx8mm-phygate-tauri-l_defconfig +++ b/configs/imx8mm-phygate-tauri-l_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_IMX8M_OPTEE_LOAD_ADDR=0x56000000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3C0000 CONFIG_DM_GPIO=y diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index 90757100c72..2c583c41571 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -24,8 +24,9 @@ CONFIG_SPL=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_SYSTEM_SETUP=y +CONFIG_BOOTCOMMAND="bootflow scan -lb; run bsp_bootcmd" +CONFIG_DEFAULT_FDT_FILE="imx8mp-evk.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_BOARD_LATE_INIT=y diff --git a/configs/imx8mm_evk_fspi_defconfig b/configs/imx8mm_evk_fspi_defconfig index fb4a4421cf0..af49b82c74c 100644 --- a/configs/imx8mm_evk_fspi_defconfig +++ b/configs/imx8mm_evk_fspi_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_ENV_SOURCE_FILE="imx8mn_evk" CONFIG_SF_DEFAULT_SPEED=40000000 CONFIG_SF_DEFAULT_MODE=0 CONFIG_ENV_SIZE=0x1000 @@ -27,8 +28,9 @@ CONFIG_SPL=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_SYSTEM_SETUP=y +CONFIG_BOOTCOMMAND="bootflow scan -lb; run bsp_bootcmd" +CONFIG_DEFAULT_FDT_FILE="imx8mp-evk.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 CONFIG_BOARD_LATE_INIT=y diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig index 43860fe3f56..967eeea4051 100644 --- a/configs/imx8mn_evk_defconfig +++ b/configs/imx8mn_evk_defconfig @@ -26,8 +26,8 @@ CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_SYSTEM_SETUP=y +CONFIG_BOOTCOMMAND="bootflow scan -lb; run bsp_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx8mn-evk.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index 5369f8b84a4..2438ab5d26a 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -26,8 +26,8 @@ CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_SYSTEM_SETUP=y +CONFIG_BOOTCOMMAND="bootflow scan -lb; run bsp_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx8mp-evk.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index a3a2333c982..97ef352dfb8 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -30,8 +30,9 @@ CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_SYSTEM_SETUP=y +CONFIG_BOOTCOMMAND="bootflow scan -lb; run bsp_bootcmd" +CONFIG_DEFAULT_FDT_FILE="imx8mp-evk.dtb" CONFIG_SYS_PBSIZE=1050 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y diff --git a/configs/imx91_11x11_evk_defconfig b/configs/imx91_11x11_evk_defconfig index 6ee0b448f99..55ba71953c2 100644 --- a/configs/imx91_11x11_evk_defconfig +++ b/configs/imx91_11x11_evk_defconfig @@ -6,7 +6,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x18000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 -CONFIG_ENV_SOURCE_FILE="imx91_evk" CONFIG_SF_DEFAULT_SPEED=40000000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x700000 @@ -31,7 +30,7 @@ CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x88000000 CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_REMAKE_ELF=y -CONFIG_DISTRO_DEFAULTS=y +CONFIG_BOOTCOMMAND="bootflow scan -lb; run bsp_bootcmd" CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx91-11x11-evk.dtb" CONFIG_SYS_CBSIZE=2048 diff --git a/configs/imx91_11x11_evk_inline_ecc_defconfig b/configs/imx91_11x11_evk_inline_ecc_defconfig index 761a6666264..0eabd7aa8b3 100644 --- a/configs/imx91_11x11_evk_inline_ecc_defconfig +++ b/configs/imx91_11x11_evk_inline_ecc_defconfig @@ -6,7 +6,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x18000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 -CONFIG_ENV_SOURCE_FILE="imx91_evk" CONFIG_SF_DEFAULT_SPEED=40000000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x700000 @@ -31,7 +30,7 @@ CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x88000000 CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_REMAKE_ELF=y -CONFIG_DISTRO_DEFAULTS=y +CONFIG_BOOTCOMMAND="bootflow scan -lb; run bsp_bootcmd" CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx91-11x11-evk.dtb" CONFIG_SYS_CBSIZE=2048 diff --git a/configs/imx93_11x11_evk_defconfig b/configs/imx93_11x11_evk_defconfig index df62eecdde4..43a67232d04 100644 --- a/configs/imx93_11x11_evk_defconfig +++ b/configs/imx93_11x11_evk_defconfig @@ -26,7 +26,7 @@ CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x88000000 CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_REMAKE_ELF=y -CONFIG_DISTRO_DEFAULTS=y +CONFIG_BOOTCOMMAND="bootflow scan -lb; run bsp_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx93-11x11-evk.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 diff --git a/configs/imx93_9x9_qsb_defconfig b/configs/imx93_9x9_qsb_defconfig index 582fe5a318d..8bd2ddda7da 100644 --- a/configs/imx93_9x9_qsb_defconfig +++ b/configs/imx93_9x9_qsb_defconfig @@ -6,7 +6,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x20000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 -CONFIG_ENV_SOURCE_FILE="imx93_qsb" CONFIG_SF_DEFAULT_SPEED=40000000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x700000 @@ -29,7 +28,7 @@ CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x88000000 CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_REMAKE_ELF=y -CONFIG_DISTRO_DEFAULTS=y +CONFIG_BOOTCOMMAND="bootflow scan -lb; run bsp_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx93-9x9-qsb.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 diff --git a/configs/imx93_9x9_qsb_inline_ecc_defconfig b/configs/imx93_9x9_qsb_inline_ecc_defconfig index c95145cce0e..3d07dfb0029 100644 --- a/configs/imx93_9x9_qsb_inline_ecc_defconfig +++ b/configs/imx93_9x9_qsb_inline_ecc_defconfig @@ -6,7 +6,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x20000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 -CONFIG_ENV_SOURCE_FILE="imx93_qsb" CONFIG_SF_DEFAULT_SPEED=40000000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x700000 @@ -29,7 +28,7 @@ CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x88000000 CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_REMAKE_ELF=y -CONFIG_DISTRO_DEFAULTS=y +CONFIG_BOOTCOMMAND="bootflow scan -lb; run bsp_bootcmd" CONFIG_DEFAULT_FDT_FILE="imx93-9x9-qsb.dtb" CONFIG_SYS_CBSIZE=2048 CONFIG_SYS_PBSIZE=2074 diff --git a/configs/inet1_defconfig b/configs/inet1_defconfig index f81120b1197..68a6df50e42 100644 --- a/configs/inet1_defconfig +++ b/configs/inet1_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet1" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun4i-a10-inet1" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=432 diff --git a/configs/inet97fv2_defconfig b/configs/inet97fv2_defconfig index d5d2dc32c93..a5414e2c502 100644 --- a/configs/inet97fv2_defconfig +++ b/configs/inet97fv2_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet97fv2" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun4i-a10-inet97fv2" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=408 diff --git a/configs/inet98v_rev2_defconfig b/configs/inet98v_rev2_defconfig index e4da6c14d04..48b20c0eefa 100644 --- a/configs/inet98v_rev2_defconfig +++ b/configs/inet98v_rev2_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-inet-98v-rev2" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun5i-a13-inet-98v-rev2" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=432 diff --git a/configs/inet9f_rev03_defconfig b/configs/inet9f_rev03_defconfig index 4485f930236..5b0cda10f3b 100644 --- a/configs/inet9f_rev03_defconfig +++ b/configs/inet9f_rev03_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-inet9f-rev03" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun4i-a10-inet9f-rev03" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=408 diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig index 6e6105fb216..d693e191d0e 100644 --- a/configs/j7200_evm_a72_defconfig +++ b/configs/j7200_evm_a72_defconfig @@ -5,7 +5,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_J721E=y CONFIG_TARGET_J7200_A72_EVM=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index bb031db9e0f..3928430f166 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -5,7 +5,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_J721E=y CONFIG_TARGET_J721E_A72_EVM=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig index a2c39ae0ab6..8f9ebed2b3b 100644 --- a/configs/j721s2_evm_a72_defconfig +++ b/configs/j721s2_evm_a72_defconfig @@ -5,7 +5,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_J721S2=y CONFIG_TARGET_J721S2_A72_EVM=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y diff --git a/configs/j722s_evm_a53_defconfig b/configs/j722s_evm_a53_defconfig index 81eb934ed6e..011b3a4a645 100644 --- a/configs/j722s_evm_a53_defconfig +++ b/configs/j722s_evm_a53_defconfig @@ -4,7 +4,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_J722S=y CONFIG_TARGET_J722S_A53_EVM=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y diff --git a/configs/j784s4_evm_a72_defconfig b/configs/j784s4_evm_a72_defconfig index 49775dc9a5b..f058e3b1c00 100644 --- a/configs/j784s4_evm_a72_defconfig +++ b/configs/j784s4_evm_a72_defconfig @@ -5,7 +5,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_J784S4=y CONFIG_TARGET_J784S4_A72_EVM=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y diff --git a/configs/jesurun_q5_defconfig b/configs/jesurun_q5_defconfig index c99be7cea4e..b41c2cf3c05 100644 --- a/configs/jesurun_q5_defconfig +++ b/configs/jesurun_q5_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-jesurun-q5" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun4i-a10-jesurun-q5" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=312 diff --git a/configs/k230_canmv_defconfig b/configs/k230_canmv_defconfig new file mode 100644 index 00000000000..47fa1add2a9 --- /dev/null +++ b/configs/k230_canmv_defconfig @@ -0,0 +1,19 @@ +CONFIG_RISCV=y +CONFIG_SYS_MALLOC_F_LEN=0x40000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80400000 +CONFIG_DEFAULT_DEVICE_TREE="k230-canmv" +CONFIG_SYS_LOAD_ADDR=0xc000000 +CONFIG_TARGET_K230_CANMV=y +CONFIG_ARCH_RV64I=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="K230# " +CONFIG_CMD_USB=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SYS_NS16550=y +CONFIG_SYS_NS16550_MEM32=y +CONFIG_USB=y +CONFIG_USB_DWC2=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_RTL8152=y diff --git a/configs/khadas-edge2-rk3588s_defconfig b/configs/khadas-edge2-rk3588s_defconfig new file mode 100644 index 00000000000..208c72ca425 --- /dev/null +++ b/configs/khadas-edge2-rk3588s_defconfig @@ -0,0 +1,215 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588s-khadas-edge2" +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x80000 +CONFIG_ROCKCHIP_RK3588=y +CONFIG_ROCKCHIP_FIT_IMAGE=y +CONFIG_SPL_SERIAL=y +CONFIG_TARGET_KHADAS_EDGE2_RK3588=y +CONFIG_DEBUG_UART_BASE=0xFEB50000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-khadas-edge2.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SPL_MMC_WRITE=y +CONFIG_SPL_MTD_SUPPORT=y +CONFIG_SPL_ATF=y +CONFIG_SPL_AB=y +CONFIG_SYS_PROMPT="kedge2# " +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot\n" +CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DTIMG=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_SPI=y +CONFIG_SPL_SPI_SUPPORT=y +CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_MMC=y +# CONFIG_DM_SPI_FLASH=y +CONFIG_MMC=y +# CONFIG_MMC_SPI=y +CONFIG_CMD_SF=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_TFTP_BOOTM=y +CONFIG_CMD_TFTP_FLASH=y +CONFIG_CMD_MTD_BLK=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64 +CONFIG_SPL_OF_CONTROL=y +CONFIG_SPL_DTB_MINIMUM=y +CONFIG_OF_LIVE=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_OF_U_BOOT_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +CONFIG_SARADC_ROCKCHIP_V2=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1 +CONFIG_FASTBOOT_BUF_ADDR=0xc00800 +CONFIG_FASTBOOT_BUF_SIZE=0x07000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_ROCKCHIP_GPIO=y +CONFIG_ROCKCHIP_GPIO_V2=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_I2C_MUX=y +CONFIG_DM_KEY=y +CONFIG_RK8XX_PWRKEY=y +CONFIG_ADC_KEY=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_SPL_MISC=y +CONFIG_MISC_DECOMPRESS=y +CONFIG_SPL_MISC_DECOMPRESS=y +CONFIG_ROCKCHIP_OTP=y +CONFIG_ROCKCHIP_HW_DECOMPRESS=y +CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y +CONFIG_SPL_ROCKCHIP_SECURE_OTP=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_HS200_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_MTD=y +CONFIG_MTD_BLK=y +CONFIG_MTD_DEVICE=y +# CONFIG_NAND=y +# CONFIG_MTD_SPI_NAND=y +CONFIG_SPI_FLASH=y +CONFIG_SF_DEFAULT_SPEED=80000000 +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_XMC=y +CONFIG_SPI_FLASH_XTX=y +CONFIG_SPI_FLASH_MTD=y +CONFIG_DM_ETH=y +CONFIG_DM_ETH_PHY=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y +CONFIG_GMAC_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_PHY_ROCKCHIP_USBDP=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_DM_FUEL_GAUGE=y +CONFIG_POWER_FG_CW201X=y +CONFIG_POWER_FG_CW221X=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_SPI_RK8XX=y +CONFIG_DM_POWER_DELIVERY=y +CONFIG_TYPEC_TCPM=y +CONFIG_TYPEC_TCPCI=y +CONFIG_TYPEC_HUSB311=y +CONFIG_TYPEC_FUSB302=y +CONFIG_REGULATOR_PWM=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_REGULATOR_RK860X=y +CONFIG_REGULATOR_RK806=y +CONFIG_CHARGER_BQ25700=y +CONFIG_CHARGER_BQ25890=y +CONFIG_CHARGER_SC8551=y +CONFIG_CHARGER_SGM41542=y +CONFIG_DM_CHARGE_DISPLAY=y +CONFIG_CHARGE_ANIMATION=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_RAM=y +CONFIG_SPL_RAM=y +CONFIG_TPL_RAM=y +CONFIG_DM_RAMDISK=y +CONFIG_RAMDISK_RO=y +CONFIG_DM_RESET=y +CONFIG_SPL_DM_RESET=y +CONFIG_SPL_RESET_ROCKCHIP=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_ROCKCHIP_SPI=y +CONFIG_ROCKCHIP_SFC=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Rockchip" +CONFIG_USB_GADGET_VENDOR_NUM=0x2207 +CONFIG_USB_GADGET_PRODUCT_NUM=0x350a +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_DM_VIDEO=y +CONFIG_DISPLAY=y +CONFIG_DRM_ROCKCHIP=y +CONFIG_DRM_MAXIM_MAX96745=y +CONFIG_DRM_MAXIM_MAX96755F=y +CONFIG_DRM_PANEL_ROHM_BU18RL82=y +CONFIG_DRM_PANEL_MAXIM_MAX96752F=y +CONFIG_DRM_ROHM_BU18XL82=y +CONFIG_DRM_ROCKCHIP_DW_HDMI_QP=y +CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI2=y +CONFIG_DRM_ROCKCHIP_DW_DP=y +CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y +CONFIG_DRM_ROCKCHIP_SAMSUNG_MIPI_DCPHY=y +CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX_HDMI=y +CONFIG_USE_TINY_PRINTF=y +CONFIG_LIB_RAND=y +CONFIG_SPL_TINY_MEMSET=y +CONFIG_RSA=y +CONFIG_SPL_RSA=y +CONFIG_RSA_N_SIZE=0x200 +CONFIG_RSA_E_SIZE=0x10 +CONFIG_RSA_C_SIZE=0x20 +CONFIG_XBC=y +CONFIG_LZ4=y +CONFIG_LZMA=y +CONFIG_ERRNO_STR=y +CONFIG_AVB_LIBAVB=y +CONFIG_AVB_LIBAVB_AB=y +CONFIG_AVB_LIBAVB_ATX=y +CONFIG_AVB_LIBAVB_USER=y +CONFIG_RK_AVB_LIBAVB_USER=y +CONFIG_OPTEE_CLIENT=y +CONFIG_OPTEE_V2=y +CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y diff --git a/configs/lctech_pi_f1c200s_defconfig b/configs/lctech_pi_f1c200s_defconfig index e1e8d3aaaa3..1588b3b4955 100644 --- a/configs/lctech_pi_f1c200s_defconfig +++ b/configs/lctech_pi_f1c200s_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="suniv-f1c200s-lctech-pi" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/suniv-f1c200s-lctech-pi" CONFIG_SPL=y CONFIG_MACH_SUNIV=y CONFIG_DRAM_CLK=156 diff --git a/configs/licheepi_nano_defconfig b/configs/licheepi_nano_defconfig index d59affb0d9c..051b1901f20 100644 --- a/configs/licheepi_nano_defconfig +++ b/configs/licheepi_nano_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="suniv-f1c100s-licheepi-nano" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/suniv-f1c100s-licheepi-nano" CONFIG_SPL=y CONFIG_MACH_SUNIV=y CONFIG_DRAM_CLK=156 diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig index 420a8bd1e79..166468fd4e7 100644 --- a/configs/miqi-rk3288_defconfig +++ b/configs/miqi-rk3288_defconfig @@ -1,37 +1,31 @@ CONFIG_ARM=y CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y +CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y -CONFIG_TEXT_BASE=0x00000000 +CONFIG_TEXT_BASE=0x01000000 +CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_SF_DEFAULT_SPEED=20000000 -CONFIG_ENV_OFFSET=0x3F8000 -CONFIG_DEFAULT_DEVICE_TREE="rk3288-miqi" +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3288-miqi" CONFIG_DM_RESET=y -CONFIG_SYS_MONITOR_LEN=614400 CONFIG_ROCKCHIP_RK3288=y -CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y CONFIG_TARGET_MIQI_RK3288=y -CONFIG_SPL_STACK_R_ADDR=0x80000 -CONFIG_SPL_STACK=0xff718000 -CONFIG_SPL_TEXT_BASE=0xff704000 -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set -CONFIG_USE_PREBOOT=y -CONFIG_DEFAULT_FDT_FILE="rk3288-miqi.dtb" -CONFIG_SILENT_CONSOLE=y -CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3288-miqi.dtb" +CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x7f8000 -CONFIG_SPL_NO_BSS_LIMIT=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -47,10 +41,12 @@ CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SPL_OF_CONTROL=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_LIVE=y +CONFIG_OF_UPSTREAM=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_SYSCON=y @@ -61,8 +57,13 @@ CONFIG_SPL_CLK=y CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MISC=y +CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH_PHY=y +CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y CONFIG_PINCTRL=y @@ -71,6 +72,7 @@ CONFIG_DM_PMIC=y CONFIG_PMIC_ACT8846=y CONFIG_REGULATOR_ACT8846=y CONFIG_DM_REGULATOR_FIXED=y +CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y @@ -93,4 +95,5 @@ CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_CMD_DHRYSTONE=y +CONFIG_SPL_CRC32=y CONFIG_ERRNO_STR=y diff --git a/configs/mk802_a10s_defconfig b/configs/mk802_a10s_defconfig index 21f7a6e535d..d3d7402f828 100644 --- a/configs/mk802_a10s_defconfig +++ b/configs/mk802_a10s_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-mk802" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun5i-a10s-mk802" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=432 diff --git a/configs/mk802_defconfig b/configs/mk802_defconfig index 416565e5af2..8ebd5e9cbc3 100644 --- a/configs/mk802_defconfig +++ b/configs/mk802_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mk802" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun4i-a10-mk802" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_USB2_VBUS_PIN="PH12" diff --git a/configs/mk802ii_defconfig b/configs/mk802ii_defconfig index 965a9cd5c4b..c56a4c7c6a0 100644 --- a/configs/mk802ii_defconfig +++ b/configs/mk802ii_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mk802ii" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun4i-a10-mk802ii" CONFIG_SPL=y CONFIG_MACH_SUN4I=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set diff --git a/configs/mk808_defconfig b/configs/mk808_defconfig index 12a37054b4d..e47d0b594f3 100644 --- a/configs/mk808_defconfig +++ b/configs/mk808_defconfig @@ -14,7 +14,7 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x78000000 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_ENV_SIZE=0x8000 -CONFIG_DEFAULT_DEVICE_TREE="rk3066a-mk808" +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3066a-mk808" CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3066=y # CONFIG_ROCKCHIP_STIMER is not set @@ -35,7 +35,7 @@ CONFIG_SPL_PAYLOAD="u-boot.bin" CONFIG_DEBUG_UART=y CONFIG_SD_BOOT=y CONFIG_USE_PREBOOT=y -CONFIG_DEFAULT_FDT_FILE="rk3066a-mk808.dtb" +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3066a-mk808.dtb" CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/mt7629_rfb_defconfig b/configs/mt7629_rfb_defconfig index abdf3d0cc49..f69be08cc3f 100644 --- a/configs/mt7629_rfb_defconfig +++ b/configs/mt7629_rfb_defconfig @@ -9,7 +9,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41fffef0 CONFIG_ENV_SIZE=0x1000 -CONFIG_DEFAULT_DEVICE_TREE="mt7629-rfb" +CONFIG_DEFAULT_DEVICE_TREE="mediatek/mt7629-rfb" CONFIG_TARGET_MT7629=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -18,7 +18,7 @@ CONFIG_SPL_STACK=0x106000 CONFIG_SPL_TEXT_BASE=0x201000 CONFIG_SPL_STACK_R=y CONFIG_SYS_BOOTM_LEN=0x4000000 -CONFIG_SYS_LOAD_ADDR=0x42007f1c +CONFIG_SYS_LOAD_ADDR=0x42000000 CONFIG_SPL_PAYLOAD="u-boot-lzma.img" CONFIG_BUILD_TARGET="u-boot-mtk.bin" CONFIG_SPL_IMAGE="spl/u-boot-spl-mtk.bin" @@ -52,6 +52,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_LOG=y +CONFIG_OF_UPSTREAM=y CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-parents" CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/mt7988_rfb_defconfig b/configs/mt7988_rfb_defconfig index 4d7454d5d39..eebf7fb43ba 100644 --- a/configs/mt7988_rfb_defconfig +++ b/configs/mt7988_rfb_defconfig @@ -7,7 +7,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DEFAULT_DEVICE_TREE="mt7988-rfb" CONFIG_TARGET_MT7988=y -CONFIG_SYS_LOAD_ADDR=0x46000000 +CONFIG_SYS_LOAD_ADDR=0x44000000 CONFIG_DEBUG_UART_BASE=0x11000000 CONFIG_DEBUG_UART_CLOCK=40000000 CONFIG_DEBUG_UART=y diff --git a/configs/nanopi-r3s-rk3566_defconfig b/configs/nanopi-r3s-rk3566_defconfig new file mode 100644 index 00000000000..870613f690a --- /dev/null +++ b/configs/nanopi-r3s-rk3566_defconfig @@ -0,0 +1,75 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_HAS_NONCACHED_MEMORY=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3566-nanopi-r3s" +CONFIG_ROCKCHIP_RK3568=y +CONFIG_SPL_SERIAL=y +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_DEBUG_UART_BASE=0xFE660000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_PCI=y +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-nanopi-r3s.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_SPL_ATF=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_CLK=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y +CONFIG_RTL8169=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_SPL_PINCTRL=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_SPL_RAM=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_ERRNO_STR=y diff --git a/configs/orangepi_zero2_defconfig b/configs/orangepi_zero2_defconfig index f60ee7375da..f2265ea5179 100644 --- a/configs/orangepi_zero2_defconfig +++ b/configs/orangepi_zero2_defconfig @@ -2,10 +2,10 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun50i-h616-orangepi-zero2" CONFIG_SPL=y -CONFIG_DRAM_SUN50I_H616_DX_ODT=0x08080808 -CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0e0e0e0e -CONFIG_DRAM_SUN50I_H616_CA_DRI=0x0e0e -CONFIG_DRAM_SUN50I_H616_TPR10=0xf83438 +CONFIG_DRAM_SUNXI_DX_ODT=0x08080808 +CONFIG_DRAM_SUNXI_DX_DRI=0x0e0e0e0e +CONFIG_DRAM_SUNXI_CA_DRI=0x0e0e +CONFIG_DRAM_SUNXI_TPR10=0xf83438 CONFIG_MACH_SUN50I_H616=y CONFIG_SUNXI_DRAM_H616_DDR3_1333=y CONFIG_USB1_VBUS_PIN="PC16" diff --git a/configs/orangepi_zero2w_defconfig b/configs/orangepi_zero2w_defconfig index cbb702d85b3..ec030f32403 100644 --- a/configs/orangepi_zero2w_defconfig +++ b/configs/orangepi_zero2w_defconfig @@ -2,14 +2,14 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun50i-h618-orangepi-zero2w" CONFIG_SPL=y -CONFIG_DRAM_SUN50I_H616_DX_ODT=0x07070707 -CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0e0e0e0e -CONFIG_DRAM_SUN50I_H616_CA_DRI=0x0e0e -CONFIG_DRAM_SUN50I_H616_ODT_EN=0xaaaaeeee -CONFIG_DRAM_SUN50I_H616_TPR6=0x48808080 -CONFIG_DRAM_SUN50I_H616_TPR10=0x402f6663 -CONFIG_DRAM_SUN50I_H616_TPR11=0x26262524 -CONFIG_DRAM_SUN50I_H616_TPR12=0x100f100f +CONFIG_DRAM_SUNXI_DX_ODT=0x07070707 +CONFIG_DRAM_SUNXI_DX_DRI=0x0e0e0e0e +CONFIG_DRAM_SUNXI_CA_DRI=0x0e0e +CONFIG_DRAM_SUNXI_ODT_EN=0xaaaaeeee +CONFIG_DRAM_SUNXI_TPR6=0x48808080 +CONFIG_DRAM_SUNXI_TPR10=0x402f6663 +CONFIG_DRAM_SUNXI_TPR11=0x26262524 +CONFIG_DRAM_SUNXI_TPR12=0x100f100f CONFIG_MACH_SUN50I_H616=y CONFIG_SUNXI_DRAM_H616_LPDDR4=y CONFIG_DRAM_CLK=792 diff --git a/configs/orangepi_zero3_defconfig b/configs/orangepi_zero3_defconfig index 4e9b0ec4d33..63f9a735378 100644 --- a/configs/orangepi_zero3_defconfig +++ b/configs/orangepi_zero3_defconfig @@ -2,14 +2,14 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun50i-h618-orangepi-zero3" CONFIG_SPL=y -CONFIG_DRAM_SUN50I_H616_DX_ODT=0x07070707 -CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0e0e0e0e -CONFIG_DRAM_SUN50I_H616_CA_DRI=0x0e0e -CONFIG_DRAM_SUN50I_H616_ODT_EN=0xaaaaeeee -CONFIG_DRAM_SUN50I_H616_TPR6=0x44000000 -CONFIG_DRAM_SUN50I_H616_TPR10=0x402f6663 -CONFIG_DRAM_SUN50I_H616_TPR11=0x24242624 -CONFIG_DRAM_SUN50I_H616_TPR12=0x0f0f100f +CONFIG_DRAM_SUNXI_DX_ODT=0x07070707 +CONFIG_DRAM_SUNXI_DX_DRI=0x0e0e0e0e +CONFIG_DRAM_SUNXI_CA_DRI=0x0e0e +CONFIG_DRAM_SUNXI_ODT_EN=0xaaaaeeee +CONFIG_DRAM_SUNXI_TPR6=0x44000000 +CONFIG_DRAM_SUNXI_TPR10=0x402f6663 +CONFIG_DRAM_SUNXI_TPR11=0x24242624 +CONFIG_DRAM_SUNXI_TPR12=0x0f0f100f CONFIG_MACH_SUN50I_H616=y CONFIG_SUNXI_DRAM_H616_LPDDR4=y CONFIG_DRAM_CLK=792 diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig index 3f4336837e9..5a3e8162799 100644 --- a/configs/phycore-imx8mm_defconfig +++ b/configs/phycore-imx8mm_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_IMX8M_OPTEE_LOAD_ADDR=0x56000000 CONFIG_SF_DEFAULT_SPEED=80000000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3C0000 diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig index 23981826109..c0501907b2c 100644 --- a/configs/phycore-imx8mp_defconfig +++ b/configs/phycore-imx8mp_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_IMX8M_OPTEE_LOAD_ADDR=0x56000000 CONFIG_PHYTEC_SOM_DETECTION=y CONFIG_SF_DEFAULT_SPEED=80000000 CONFIG_ENV_SIZE=0x10000 @@ -51,7 +52,6 @@ CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x42200000 CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 CONFIG_SPL_SYS_MMCSD_RAW_MODE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 -# CONFIG_SPL_CRYPTO is not set CONFIG_SPL_I2C=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_POWER=y @@ -179,4 +179,3 @@ CONFIG_USB_GADGET_MANUFACTURER="PHYTEC" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_IMX_WATCHDOG=y -# CONFIG_SPL_SHA_HW_ACCEL is not set diff --git a/configs/phycore_am62x_r5_defconfig b/configs/phycore_am62x_r5_defconfig index a856e69d88c..c5ddcd72852 100644 --- a/configs/phycore_am62x_r5_defconfig +++ b/configs/phycore_am62x_r5_defconfig @@ -21,7 +21,7 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 -CONFIG_SPL_SYS_MALLOC_F_LEN=0x7000 +CONFIG_SPL_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL_TEXT_BASE=0x43c00000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x43c3b000 diff --git a/configs/phycore_am64x_a53_defconfig b/configs/phycore_am64x_a53_defconfig index bc450004722..3027a94b0d1 100644 --- a/configs/phycore_am64x_a53_defconfig +++ b/configs/phycore_am64x_a53_defconfig @@ -72,6 +72,7 @@ CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_ASKENV=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_DFU=y +CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -88,6 +89,8 @@ CONFIG_OF_OVERLAY_LIST="ti/k3-am6xx-phycore-disable-spi-nor ti/k3-am6xx-phycore- CONFIG_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_NOWHERE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_MMC_ENV_DEV=1 @@ -112,11 +115,9 @@ CONFIG_SYS_DFU_MAX_FILE_SIZE=0x800000 CONFIG_DMA_CHANNELS=y CONFIG_TI_K3_NAVSS_UDMA=y CONFIG_TI_SCI_PROTOCOL=y -CONFIG_DM_PCA953X=y -CONFIG_SPL_DM_PCA953X=y +CONFIG_DA8XX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y -CONFIG_DM_I2C_GPIO=y CONFIG_SYS_I2C_OMAP24XX=y CONFIG_DM_MAILBOX=y CONFIG_K3_SEC_PROXY=y diff --git a/configs/pinephone_defconfig b/configs/pinephone_defconfig index 9d39204a439..99aa29622ba 100644 --- a/configs/pinephone_defconfig +++ b/configs/pinephone_defconfig @@ -10,7 +10,10 @@ CONFIG_DRAM_ZQ=3881949 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_PINEPHONE_DT_SELECTION=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_CMD_PSTORE=y +CONFIG_CMD_PSTORE_MEM_ADDR=0x61000000 CONFIG_OF_LIST="sun50i-a64-pinephone-1.1 sun50i-a64-pinephone-1.2" +CONFIG_SYS_I2C_MVTWSI=y CONFIG_LED_STATUS=y CONFIG_LED_STATUS_GPIO=y CONFIG_LED_STATUS0=y diff --git a/configs/pov_protab2_ips9_defconfig b/configs/pov_protab2_ips9_defconfig index a62c9f8fa37..330c97fd6dc 100644 --- a/configs/pov_protab2_ips9_defconfig +++ b/configs/pov_protab2_ips9_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-pov-protab2-ips9" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun4i-a10-pov-protab2-ips9" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=432 diff --git a/configs/q8_a13_tablet_defconfig b/configs/q8_a13_tablet_defconfig index 36252e5f89a..93a257853b3 100644 --- a/configs/q8_a13_tablet_defconfig +++ b/configs/q8_a13_tablet_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-q8-tablet" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun5i-a13-q8-tablet" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=384 diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig index cd94315f176..a4e7a21c311 100644 --- a/configs/qcom_defconfig +++ b/configs/qcom_defconfig @@ -37,6 +37,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_CAT=y CONFIG_CMD_BMP=y CONFIG_CMD_EFIDEBUG=y +CONFIG_CMD_RNG=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_LOG=y CONFIG_OF_LIVE=y @@ -48,12 +49,14 @@ CONFIG_CLK_QCOM_APQ8016=y CONFIG_CLK_QCOM_APQ8096=y CONFIG_CLK_QCOM_QCM2290=y CONFIG_CLK_QCOM_QCS404=y +CONFIG_CLK_QCOM_SA8775P=y CONFIG_CLK_QCOM_SDM845=y CONFIG_CLK_QCOM_SM6115=y CONFIG_CLK_QCOM_SM8150=y CONFIG_CLK_QCOM_SM8250=y CONFIG_CLK_QCOM_SM8550=y CONFIG_CLK_QCOM_SM8650=y +CONFIG_CLK_QCOM_X1E80100=y CONFIG_CLK_QCOM_SC7280=y CONFIG_DFU_MMC=y CONFIG_DFU_SCSI=y @@ -99,11 +102,14 @@ CONFIG_PINCTRL_QCOM_SM8150=y CONFIG_PINCTRL_QCOM_SM8250=y CONFIG_PINCTRL_QCOM_SM8550=y CONFIG_PINCTRL_QCOM_SM8650=y +CONFIG_PINCTRL_QCOM_X1E80100=y CONFIG_DM_PMIC=y CONFIG_PMIC_QCOM=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_QCOM_RPMH=y +CONFIG_DM_RNG=y +CONFIG_RNG_MSM=y CONFIG_SCSI=y CONFIG_MSM_SERIAL=y CONFIG_MSM_GENI_SERIAL=y diff --git a/configs/qcs9100_defconfig b/configs/qcs9100_defconfig new file mode 100644 index 00000000000..10ff4d25398 --- /dev/null +++ b/configs/qcs9100_defconfig @@ -0,0 +1,18 @@ +# Configuration for building U-Boot to be flashed +# to the uefi partition of QCS9100 based dev boards with +# the "Linux Embedded" partition layout (which have +# a dedicated "uefi" partition for edk2/U-Boot) + +#include "qcom_defconfig" + +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_BASE=0xA8C000 +CONFIG_DEBUG_UART_MSM_GENI=y +CONFIG_DEBUG_UART_CLOCK=14745600 + +# Address where U-Boot will be loaded +CONFIG_TEXT_BASE=0xaf000000 +CONFIG_REMAKE_ELF=y + +CONFIG_DEFAULT_DEVICE_TREE="qcom/qcs9100-ride-r3" diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig index 812b20687e5..792ba06c2b8 100644 --- a/configs/qemu-x86_64_defconfig +++ b/configs/qemu-x86_64_defconfig @@ -1,13 +1,14 @@ CONFIG_X86=y CONFIG_TEXT_BASE=0x1110000 CONFIG_SYS_MALLOC_F_LEN=0x1000 +CONFIG_BLOBLIST_SIZE_RELOC=0x20000 CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x40000 CONFIG_MAX_CPUS=2 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="qemu-x86_i440fx" -CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 -CONFIG_SPL_TEXT_BASE=0xfffd4000 +CONFIG_SPL_SYS_MALLOC_F_LEN=0x3000 +CONFIG_SPL_TEXT_BASE=0xfffd0000 CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 CONFIG_X86_RUN_64BIT=y @@ -34,6 +35,7 @@ CONFIG_SPL_LOG=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_PCI_INIT_R=y CONFIG_BLOBLIST=y +CONFIG_BLOBLIST_FIXED=y CONFIG_BLOBLIST_ADDR=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig index 947d15cd727..0b0e10c795f 100644 --- a/configs/qemu-x86_defconfig +++ b/configs/qemu-x86_defconfig @@ -1,6 +1,7 @@ CONFIG_X86=y CONFIG_TEXT_BASE=0xFFF00000 CONFIG_SYS_MALLOC_F_LEN=0x1000 +CONFIG_BLOBLIST_SIZE_RELOC=0x20000 CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x40000 CONFIG_MAX_CPUS=2 @@ -23,6 +24,9 @@ CONFIG_LOG=y CONFIG_LOGF_FUNC=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_PCI_INIT_R=y +CONFIG_BLOBLIST=y +CONFIG_BLOBLIST_FIXED=y +CONFIG_BLOBLIST_ADDR=0x10000 CONFIG_CMD_CPU=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig index 06ac6fed3bc..11a4c4e0a7f 100644 --- a/configs/qemu_arm64_defconfig +++ b/configs/qemu_arm64_defconfig @@ -26,6 +26,8 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_PCI_INIT_R=y +CONFIG_BLOBLIST=y +CONFIG_BLOBLIST_SIZE_RELOC=0x2000 CONFIG_CMD_SMBIOS=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_BOOTEFI_SELFTEST=y @@ -61,6 +63,8 @@ CONFIG_PCIE_ECAM_GENERIC=y CONFIG_SCSI=y CONFIG_DEBUG_UART_PL011=y CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y CONFIG_SYSRESET=y CONFIG_SYSRESET_CMD_POWEROFF=y CONFIG_SYSRESET_PSCI=y @@ -70,3 +74,4 @@ CONFIG_USB_EHCI_PCI=y CONFIG_SEMIHOSTING=y CONFIG_MBEDTLS_LIB=y CONFIG_TPM=y +CONFIG_GENERATE_SMBIOS_TABLE_VERBOSE=y diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig index e164407d494..d8e916dd2b3 100644 --- a/configs/qemu_arm_defconfig +++ b/configs/qemu_arm_defconfig @@ -27,6 +27,8 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_PCI_INIT_R=y +CONFIG_BLOBLIST=y +CONFIG_BLOBLIST_SIZE_RELOC=0x2000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_DFU=y diff --git a/configs/r7-tv-dongle_defconfig b/configs/r7-tv-dongle_defconfig index 8875a09b2c9..0c9f6197c2c 100644 --- a/configs/r7-tv-dongle_defconfig +++ b/configs/r7-tv-dongle_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun5i-a10s-r7-tv-dongle" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun5i-a10s-r7-tv-dongle" CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=384 diff --git a/configs/rock-5c-rk3588s_defconfig b/configs/rock-5c-rk3588s_defconfig new file mode 100644 index 00000000000..59f9f25edcb --- /dev/null +++ b/configs/rock-5c-rk3588s_defconfig @@ -0,0 +1,84 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_HAS_NONCACHED_MEMORY=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588s-rock-5c" +CONFIG_ROCKCHIP_RK3588=y +CONFIG_SPL_SERIAL=y +CONFIG_TARGET_ROCK_5C_RK3588S=y +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_DEBUG_UART_BASE=0xFEB50000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_PCI=y +CONFIG_DEBUG_UART=y +CONFIG_AHCI=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-rock-5c.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_SPL_ATF=y +CONFIG_CMD_ADC=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_SCSI_AHCI=y +CONFIG_AHCI_PCI=y +CONFIG_SPL_CLK=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y +CONFIG_RTL8169=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_PHY_ROCKCHIP_USBDP=y +CONFIG_SPL_PINCTRL=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_SPL_RAM=y +CONFIG_SCSI=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_ROCKCHIP_SPI=y +CONFIG_SYSRESET=y +CONFIG_SYSRESET_PSCI=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_ERRNO_STR=y diff --git a/configs/rock_defconfig b/configs/rock_defconfig index d7f11310cba..9c05bf45146 100644 --- a/configs/rock_defconfig +++ b/configs/rock_defconfig @@ -11,7 +11,7 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_ENV_OFFSET=0x3F8000 -CONFIG_DEFAULT_DEVICE_TREE="rk3188-radxarock" +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3188-radxarock" CONFIG_ROCKCHIP_RK3188=y # CONFIG_ROCKCHIP_STIMER is not set CONFIG_TARGET_ROCK=y @@ -25,7 +25,7 @@ CONFIG_DEBUG_UART_BASE=0x20064000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y -CONFIG_DEFAULT_FDT_FILE="rk3188-radxarock.dtb" +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3188-radxarock.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x7800 diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig index 08b7e2784e9..75322073285 100644 --- a/configs/rockpro64-rk3399_defconfig +++ b/configs/rockpro64-rk3399_defconfig @@ -20,8 +20,6 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_PCI=y CONFIG_DEBUG_UART=y -CONFIG_BOOTSTAGE=y -CONFIG_BOOTSTAGE_REPORT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x40000 @@ -39,7 +37,6 @@ CONFIG_CMD_POWEROFF=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y -CONFIG_CMD_BOOTSTAGE=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_SPI_FLASH=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index e96a0d63f70..7b35ad8a88f 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -144,7 +144,6 @@ CONFIG_CMD_SQUASHFS=y CONFIG_CMD_MTDPARTS=y CONFIG_CMD_STACKPROTECTOR_TEST=y CONFIG_MAC_PARTITION=y -CONFIG_AMIGA_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_OF_LIVE=y CONFIG_ENV_IS_NOWHERE=y @@ -355,6 +354,8 @@ CONFIG_ADDR_MAP=y CONFIG_PANIC_HANG=y CONFIG_CMD_DHRYSTONE=y CONFIG_MBEDTLS_LIB=y +CONFIG_MBEDTLS_LIB_CRYPTO=y +CONFIG_HKDF_MBEDTLS=y CONFIG_ECDSA=y CONFIG_ECDSA_VERIFY=y CONFIG_TPM=y diff --git a/configs/sunxi_Gemei_G9_defconfig b/configs/sunxi_Gemei_G9_defconfig index 3fee7c2e50c..4f3d0ec7443 100644 --- a/configs/sunxi_Gemei_G9_defconfig +++ b/configs/sunxi_Gemei_G9_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y -CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-gemei-g9" +CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun4i-a10-gemei-g9" CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_DRAM_CLK=432 diff --git a/configs/tanix_tx1_defconfig b/configs/tanix_tx1_defconfig index 706306b1444..28cf9513c30 100644 --- a/configs/tanix_tx1_defconfig +++ b/configs/tanix_tx1_defconfig @@ -2,14 +2,14 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun50i-h313-tanix-tx1" CONFIG_SPL=y -CONFIG_DRAM_SUN50I_H616_DX_ODT=0x06060606 -CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0d0d0d0d -CONFIG_DRAM_SUN50I_H616_CA_DRI=0x1919 -CONFIG_DRAM_SUN50I_H616_ODT_EN=0x9988eeee -CONFIG_DRAM_SUN50I_H616_TPR6=0x2fb08080 -CONFIG_DRAM_SUN50I_H616_TPR10=0x402f4469 -CONFIG_DRAM_SUN50I_H616_TPR11=0x0e0f0d0d -CONFIG_DRAM_SUN50I_H616_TPR12=0x11131213 +CONFIG_DRAM_SUNXI_DX_ODT=0x06060606 +CONFIG_DRAM_SUNXI_DX_DRI=0x0d0d0d0d +CONFIG_DRAM_SUNXI_CA_DRI=0x1919 +CONFIG_DRAM_SUNXI_ODT_EN=0x9988eeee +CONFIG_DRAM_SUNXI_TPR6=0x2fb08080 +CONFIG_DRAM_SUNXI_TPR10=0x402f4469 +CONFIG_DRAM_SUNXI_TPR11=0x0e0f0d0d +CONFIG_DRAM_SUNXI_TPR12=0x11131213 CONFIG_MACH_SUN50I_H616=y CONFIG_SUNXI_DRAM_H616_LPDDR3=y CONFIG_R_I2C_ENABLE=y diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig index 42dbef9c2c3..bc5379d4343 100644 --- a/configs/tinker-rk3288_defconfig +++ b/configs/tinker-rk3288_defconfig @@ -4,21 +4,12 @@ CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x01000000 -CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_SF_DEFAULT_SPEED=20000000 -CONFIG_ENV_OFFSET=0x3F8000 -CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker" +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3288-tinker" CONFIG_DM_RESET=y -CONFIG_SYS_MONITOR_LEN=614400 CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_TINKER_RK3288=y -CONFIG_SPL_STACK_R_ADDR=0x80000 -CONFIG_SPL_STACK=0xff718000 -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_SPL_SIZE_LIMIT=0x4b000 @@ -26,15 +17,15 @@ CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set -CONFIG_USE_PREBOOT=y -CONFIG_DEFAULT_FDT_FILE="rk3288-tinker.dtb" -CONFIG_SILENT_CONSOLE=y -CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3288-tinker.dtb" +CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x7f8000 -CONFIG_SPL_NO_BSS_LIMIT=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_I2C=y -CONFIG_SPL_POWER=y +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -43,6 +34,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_PMIC=y @@ -50,10 +42,13 @@ CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_UPSTREAM=y CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_SYSCON=y @@ -65,19 +60,20 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y +CONFIG_ROCKCHIP_EFUSE=y CONFIG_I2C_EEPROM=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH_PHY=y +CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y -CONFIG_SPL_PMIC_RK8XX=y -CONFIG_SPL_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y @@ -95,8 +91,11 @@ CONFIG_USB_ETHER_SMSC95XX=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y +CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_CMD_DHRYSTONE=y +CONFIG_SPL_CRC32=y CONFIG_ERRNO_STR=y diff --git a/configs/tinker-s-rk3288_defconfig b/configs/tinker-s-rk3288_defconfig index e62a03e066c..f0c8cc5bbc1 100644 --- a/configs/tinker-s-rk3288_defconfig +++ b/configs/tinker-s-rk3288_defconfig @@ -4,21 +4,12 @@ CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x01000000 -CONFIG_SYS_MALLOC_F_LEN=0x4000 -CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_SF_DEFAULT_SPEED=20000000 -CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker-s" +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3288-tinker-s" CONFIG_DM_RESET=y -CONFIG_SYS_MONITOR_LEN=614400 CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_TINKER_RK3288=y -CONFIG_SPL_STACK_R_ADDR=0x800000 -CONFIG_SPL_STACK=0xff718000 -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x300000 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_SPL_SIZE_LIMIT=0x4b000 @@ -26,15 +17,15 @@ CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set -CONFIG_USE_PREBOOT=y -CONFIG_DEFAULT_FDT_FILE="rk3288-tinker-s.dtb" -CONFIG_SILENT_CONSOLE=y -CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3288-tinker-s.dtb" +CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x7f8000 -CONFIG_SPL_NO_BSS_LIMIT=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_I2C=y -CONFIG_SPL_POWER=y +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -51,10 +42,13 @@ CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_UPSTREAM=y CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_SYSCON=y @@ -66,19 +60,20 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y +CONFIG_ROCKCHIP_EFUSE=y CONFIG_I2C_EEPROM=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH_PHY=y +CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y -CONFIG_SPL_PMIC_RK8XX=y -CONFIG_SPL_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y @@ -102,4 +97,5 @@ CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_CMD_DHRYSTONE=y +CONFIG_SPL_CRC32=y CONFIG_ERRNO_STR=y diff --git a/configs/transpeed-8k618-t_defconfig b/configs/transpeed-8k618-t_defconfig index 1d5a0c264b3..221614762e8 100644 --- a/configs/transpeed-8k618-t_defconfig +++ b/configs/transpeed-8k618-t_defconfig @@ -2,13 +2,13 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun50i-h618-transpeed-8k618-t" CONFIG_SPL=y -CONFIG_DRAM_SUN50I_H616_DX_ODT=0x03030303 -CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0e0e0e0e -CONFIG_DRAM_SUN50I_H616_CA_DRI=0x1f12 -CONFIG_DRAM_SUN50I_H616_TPR0=0xc0001002 -CONFIG_DRAM_SUN50I_H616_TPR10=0x2f1107 -CONFIG_DRAM_SUN50I_H616_TPR11=0xddddcccc -CONFIG_DRAM_SUN50I_H616_TPR12=0xeddc7665 +CONFIG_DRAM_SUNXI_DX_ODT=0x03030303 +CONFIG_DRAM_SUNXI_DX_DRI=0x0e0e0e0e +CONFIG_DRAM_SUNXI_CA_DRI=0x1f12 +CONFIG_DRAM_SUNXI_TPR0=0xc0001002 +CONFIG_DRAM_SUNXI_TPR10=0x2f1107 +CONFIG_DRAM_SUNXI_TPR11=0xddddcccc +CONFIG_DRAM_SUNXI_TPR12=0xeddc7665 CONFIG_MACH_SUN50I_H616=y CONFIG_SUNXI_DRAM_H616_DDR3_1333=y CONFIG_DRAM_CLK=648 diff --git a/configs/x96_mate_defconfig b/configs/x96_mate_defconfig index f876cc91f6e..bd9b611d6f5 100644 --- a/configs/x96_mate_defconfig +++ b/configs/x96_mate_defconfig @@ -2,13 +2,13 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun50i-h616-x96-mate" CONFIG_SPL=y -CONFIG_DRAM_SUN50I_H616_DX_ODT=0x03030303 -CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0e0e0e0e -CONFIG_DRAM_SUN50I_H616_CA_DRI=0x1c12 -CONFIG_DRAM_SUN50I_H616_TPR0=0xc0000c05 -CONFIG_DRAM_SUN50I_H616_TPR10=0x2f0007 -CONFIG_DRAM_SUN50I_H616_TPR11=0xffffdddd -CONFIG_DRAM_SUN50I_H616_TPR12=0xfedf7557 +CONFIG_DRAM_SUNXI_DX_ODT=0x03030303 +CONFIG_DRAM_SUNXI_DX_DRI=0x0e0e0e0e +CONFIG_DRAM_SUNXI_CA_DRI=0x1c12 +CONFIG_DRAM_SUNXI_TPR0=0xc0000c05 +CONFIG_DRAM_SUNXI_TPR10=0x2f0007 +CONFIG_DRAM_SUNXI_TPR11=0xffffdddd +CONFIG_DRAM_SUNXI_TPR12=0xfedf7557 CONFIG_MACH_SUN50I_H616=y CONFIG_SUNXI_DRAM_H616_DDR3_1333=y CONFIG_R_I2C_ENABLE=y diff --git a/configs/xilinx_versal_mini_qspi_defconfig b/configs/xilinx_versal_mini_qspi_defconfig index 4d23b353409..529815afe16 100644 --- a/configs/xilinx_versal_mini_qspi_defconfig +++ b/configs/xilinx_versal_mini_qspi_defconfig @@ -78,4 +78,5 @@ CONFIG_ARM_DCC=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_ZYNQMP_GQSPI=y +CONFIG_SPI_STACKED_PARALLEL=y # CONFIG_LMB is not set diff --git a/configs/xilinx_versal_net_mini_qspi_defconfig b/configs/xilinx_versal_net_mini_qspi_defconfig index 8453be5a590..818c62c6959 100644 --- a/configs/xilinx_versal_net_mini_qspi_defconfig +++ b/configs/xilinx_versal_net_mini_qspi_defconfig @@ -76,4 +76,5 @@ CONFIG_ARM_DCC=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_ZYNQMP_GQSPI=y +CONFIG_SPI_STACKED_PARALLEL=y # CONFIG_LMB is not set diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index c8f166c1221..fb757c1067d 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -83,6 +83,7 @@ CONFIG_CLK_VERSAL=y CONFIG_DFU_TIMEOUT=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y +CONFIG_DFU_SF=y CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1800000 CONFIG_ARM_FFA_TRANSPORT=y CONFIG_FPGA_XILINX=y diff --git a/configs/xilinx_zynqmp_kria_defconfig b/configs/xilinx_zynqmp_kria_defconfig index 8fb66f7cb08..a68bd522f90 100644 --- a/configs/xilinx_zynqmp_kria_defconfig +++ b/configs/xilinx_zynqmp_kria_defconfig @@ -197,6 +197,7 @@ CONFIG_SOC_XILINX_ZYNQMP=y CONFIG_SPI=y CONFIG_ZYNQ_SPI=y CONFIG_ZYNQMP_GQSPI=y +CONFIG_SPI_STACKED_PARALLEL=y CONFIG_SYSRESET=y CONFIG_SYSRESET_CMD_POWEROFF=y CONFIG_SYSRESET_PSCI=y diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index 9d785413a8e..7667e67a05a 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -93,6 +93,7 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_ARM_DCC=y CONFIG_SPI=y CONFIG_ZYNQMP_GQSPI=y +CONFIG_SPI_STACKED_PARALLEL=y # CONFIG_BINMAN_FDT is not set CONFIG_BINMAN_DTB="./arch/arm/dts/zynqmp-binman-mini.dtb" CONFIG_PANIC_HANG=y diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 09f487acf0d..b13079cdf70 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -110,7 +110,7 @@ CONFIG_CMD_UBI=y CONFIG_PARTITION_TYPE_GUID=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_BOARD=y -CONFIG_OF_LIST="avnet-ultra96-rev1 zynqmp-a2197-revA zynqmp-e-a2197-00-revA zynqmp-e-a2197-00-revB zynqmp-g-a2197-00-revA zynqmp-m-a2197-01-revA zynqmp-m-a2197-02-revA zynqmp-m-a2197-03-revA zynqmp-p-a2197-00-revA zynqmp-zc1232-revA zynqmp-zc1254-revA zynqmp-zc1751-xm015-dc1 zynqmp-zc1751-xm016-dc2 zynqmp-zc1751-xm017-dc3 zynqmp-zc1751-xm018-dc4 zynqmp-zc1751-xm019-dc5 zynqmp-zcu100-revC zynqmp-zcu102-rev1.1 zynqmp-zcu102-rev1.0 zynqmp-zcu102-revA zynqmp-zcu102-revB zynqmp-zcu104-revA zynqmp-zcu104-revC zynqmp-zcu106-revA zynqmp-zcu106-rev1.0 zynqmp-zcu111-revA zynqmp-zcu1275-revA zynqmp-zcu1275-revB zynqmp-zcu1285-revA zynqmp-zcu208-revA zynqmp-zcu216-revA zynqmp-topic-miamimp-xilinx-xdp-v1r1 zynqmp-sm-k26-revA zynqmp-smk-k26-revA zynqmp-dlc21-revA" +CONFIG_OF_LIST="avnet-ultra96-rev1 zynqmp-a2197-revA zynqmp-dlc21-revA zynqmp-e-a2197-00-revA zynqmp-e-a2197-00-revB zynqmp-g-a2197-00-revA zynqmp-m-a2197-01-revA zynqmp-m-a2197-02-revA zynqmp-m-a2197-03-revA zynqmp-p-a2197-00-revA zynqmp-sm-k26-revA zynqmp-smk-k26-revA zynqmp-topic-miamimp-xilinx-xdp-v1r1 zynqmp-vpk120-revA zynqmp-vp-x-a2785-00-revA zynqmp-zc1232-revA zynqmp-zc1254-revA zynqmp-zc1751-xm015-dc1 zynqmp-zc1751-xm016-dc2 zynqmp-zc1751-xm017-dc3 zynqmp-zc1751-xm018-dc4 zynqmp-zc1751-xm019-dc5 zynqmp-zcu100-revC zynqmp-zcu102-rev1.0 zynqmp-zcu102-rev1.1 zynqmp-zcu102-revA zynqmp-zcu102-revB zynqmp-zcu104-revA zynqmp-zcu104-revC zynqmp-zcu106-rev1.0 zynqmp-zcu106-revA zynqmp-zcu111-revA zynqmp-zcu1275-revA zynqmp-zcu1275-revB zynqmp-zcu1285-revA zynqmp-zcu208-revA zynqmp-zcu216-revA zynqmp-zcu670-revA zynqmp-zcu670-revB" CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent interrupts iommus power-domains" CONFIG_ENV_IS_NOWHERE=y CONFIG_ENV_IS_IN_FAT=y diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index cd84df1e290..6a5e1dd5d95 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -92,6 +92,7 @@ CONFIG_SPI_FLASH_WINBOND=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_ARM_DCC=y CONFIG_ZYNQ_QSPI=y +CONFIG_SPI_STACKED_PARALLEL=y CONFIG_SYS_TIMER_COUNTS_DOWN=y # CONFIG_GZIP is not set # CONFIG_LMB is not set diff --git a/doc/board/canaan/index.rst b/doc/board/canaan/index.rst new file mode 100644 index 00000000000..e2892d2a7f3 --- /dev/null +++ b/doc/board/canaan/index.rst @@ -0,0 +1,8 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Canaan +====== +.. toctree:: + :maxdepth: 1 + + k230_canmv diff --git a/doc/board/canaan/k230_canmv.rst b/doc/board/canaan/k230_canmv.rst new file mode 100644 index 00000000000..534ad7cb7a8 --- /dev/null +++ b/doc/board/canaan/k230_canmv.rst @@ -0,0 +1,88 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +K230 CanMV +========== + +K230 RISC-V SoC +------------------ +The K230 chip is the latest generation SoC product in Canaan Technology's +Kendryte series of AIOT chips. + +Mainline support +---------------- + +The support for following drivers are already enabled: + +1. ns16550 UART +2. DWC2 OTG USB controller + +Building +~~~~~~~~ + +1. Get the RISC-V toolchain. +2. Setup cross compilation environment variable: +3. Get the `firmware_gen.py`_ from vendor. + +.. code-block:: console + + export CROSS_COMPILE=riscv64-linux-gnu- + cd <U-Boot-dir> + make k230_canmv_defconfig + make + cp u-boot-gz.img u-boot-gz.img.tmp + pip install gmssl pycryptodome + python3 firmware_gen.py -i u-boot-gz.img.tmp -o u-boot-head.img -n + +This will generate u-boot-head.img. + +.. _firmware_gen.py: https://raw.githubusercontent.com/kendryte/k230_sdk/refs/tags/v1.8/src/little/uboot/tools/firmware_gen.py + +Booting +~~~~~~~ + +Currently, we rely on vendor u-boot-spl to initialize the +ddr and load the u-boot image, then bootup from it. + +1. Prepare a SD card with the `vendor image`_ burned on it. + +2. Write the U-Boot image to the SD card at offset 2MB. + +.. code-block:: console + + dd if=u-boot-head.img of=/dev/sd[x] bs=1M seek=2 + +3. Insert the SD card into the board and power it on. + +.. _vendor image: https://kendryte-download.canaan-creative.com/developer/k230/CanMV-K230_debian_sdcard_sdk_1.3.img.gz + +Sample boot log from K230 CanMV board +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +.. code-block:: none + + U-Boot 2025.01-00645-g2d81c4788455 (Jan 14 2025 - 23:15:07 +0800) + + DRAM: 512 MiB + Core: 15 devices, 11 uclasses, devicetree: separate + Loading Environment from nowhere... OK + In: serial@91400000 + Out: serial@91400000 + Err: serial@91400000 + Net: No ethernet found. + K230# cpu list + 0: cpu@0 thead,c908 + K230# usb start + starting USB... + Bus usb@91540000: USB DWC2 + scanning bus usb@91540000 for devices... + Warning: r8152_eth (eth0) using random MAC address - 1e:33:97:47:e6:32 + 2 USB Device(s) found + K230# usb tree + USB device tree: + 1 Hub (480 Mb/s, 0mA) + | U-Boot Root Hub + | + +-2 Vendor specific (480 Mb/s, 100mA) + Realtek USB 10/100 LAN 000000000000 + + K230# diff --git a/doc/board/coolpi/genbook_cm5_rk3588.rst b/doc/board/coolpi/genbook_cm5_rk3588.rst index cad2a28acbd..26cddac9207 100644 --- a/doc/board/coolpi/genbook_cm5_rk3588.rst +++ b/doc/board/coolpi/genbook_cm5_rk3588.rst @@ -28,7 +28,7 @@ Get the TF-A and DDR init (TPL) binaries cd u-boot export ROCKCHIP_TPL=../rkbin/bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.17.bin export BL31=../rkbin/bin/rk35/rk3588_bl31_v1.46.elf - make coolpi-genbook-cm5-rk3588_defconfig + make coolpi-cm5-genbook-rk3588_defconfig make CROSS_COMPILE=aarch64-linux-gnu- This will build ``u-boot-rockchip.bin`` for eMMC and ``u-boot-rockchip-spi.bin`` for SPI Nor. diff --git a/doc/board/google/chromebook_coral.rst b/doc/board/google/chromebook_coral.rst index 1eda769c752..b48afb27938 100644 --- a/doc/board/google/chromebook_coral.rst +++ b/doc/board/google/chromebook_coral.rst @@ -243,7 +243,7 @@ board_init_r(), as per the rules, and DRAM is available then. SPL sets up a bloblist and passes the SPL hand-off information to U-Boot proper. This includes a pointer to the HOB list as well as DRAM information. See struct arch_spl_handoff. The bloblist address is set by CONFIG_BLOBLIST_ADDR, -normally 100000. +normally fef10000. SPL uses SPI flash to update the MRC caches in ROM. This speeds up subsequent boots. Be warned that SPL can take 30 seconds without this cache! This is a diff --git a/doc/board/index.rst b/doc/board/index.rst index b1c470eb2cb..74c4dd1f42d 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -21,6 +21,7 @@ Board-specific doc beagle/index broadcom/index bsh/index + canaan/index cloos/index congatec/index coolpi/index diff --git a/doc/board/phytec/imx8mm-optee-build.rsti b/doc/board/phytec/imx8mm-optee-build.rsti new file mode 100644 index 00000000000..c83de5cc7cf --- /dev/null +++ b/doc/board/phytec/imx8mm-optee-build.rsti @@ -0,0 +1,14 @@ +Build the OP-TEE binary (optional) +---------------------------------- + +.. code-block:: bash + + $ git clone https://github.com/OP-TEE/optee_os.git + $ cd optee_os + $ make CFG_TEE_BENCHMARK=n \ + CROSS_COMPILE=aarch64-linux-gnu- \ + O=out/arm \ + PLATFORM=imx-mx8mmevk \ + CFG_TZDRAM_START=0x56000000 \ + CFG_DDR_SIZE=0x80000000 \ + CFG_UART_BASE=UART3_BASE diff --git a/doc/board/phytec/imx8mm-phygate-tauri-l.rst b/doc/board/phytec/imx8mm-phygate-tauri-l.rst index 28b614fd144..0d9e1024f8c 100644 --- a/doc/board/phytec/imx8mm-phygate-tauri-l.rst +++ b/doc/board/phytec/imx8mm-phygate-tauri-l.rst @@ -9,6 +9,7 @@ Quick Start ----------- - Build the ARM Trusted firmware binary +- Build the OP-TEE binary (optional) - Get ddr firmware - Build U-Boot - Boot @@ -20,10 +21,15 @@ Build the ARM Trusted firmware binary $ git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git $ cd trusted-firmware-a - $ export CROSS_COMPILE=aarch64-linux-gnu + $ export CROSS_COMPILE=aarch64-linux-gnu- $ export IMX_BOOT_UART_BASE=0x30880000 + $ # with optee + $ make PLAT=imx8mm BL32_BASE=0x56000000 SPD=opteed bl31 + $ # without optee $ make PLAT=imx8mm bl31 +.. include:: imx8mm-optee-build.rsti + Get the ddr firmware -------------------- @@ -42,6 +48,7 @@ Copy binaries .. code-block:: bash $ cp <TF-A dir>/build/imx8mm/release/bl31.bin . + $ cp <OP-TEE dir>/out/arm/core/tee-raw.bin tee.bin $ cp firmware-imx-8.23/firmware/ddr/synopsys/lpddr4*.bin . Build U-Boot diff --git a/doc/board/phytec/phycore-imx8mm.rst b/doc/board/phytec/phycore-imx8mm.rst index e9dc2259907..08f5949e02d 100644 --- a/doc/board/phytec/phycore-imx8mm.rst +++ b/doc/board/phytec/phycore-imx8mm.rst @@ -9,6 +9,7 @@ Quick Start ----------- - Build the ARM Trusted firmware binary +- Build the OP-TEE binary (optional) - Get ddr firmware - Build U-Boot - Boot @@ -20,10 +21,15 @@ Build the ARM Trusted firmware binary $ git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git $ cd trusted-firmware-a - $ export CROSS_COMPILE=aarch64-linux-gnu + $ export CROSS_COMPILE=aarch64-linux-gnu- $ export IMX_BOOT_UART_BASE=0x30880000 + $ # with optee + $ make PLAT=imx8mm BL32_BASE=0x56000000 SPD=opteed bl31 + $ # without optee $ make PLAT=imx8mm bl31 +.. include:: imx8mm-optee-build.rsti + Get the ddr firmware -------------------- diff --git a/doc/board/phytec/phycore-imx8mp.rst b/doc/board/phytec/phycore-imx8mp.rst index fda751aeffb..50be9912653 100644 --- a/doc/board/phytec/phycore-imx8mp.rst +++ b/doc/board/phytec/phycore-imx8mp.rst @@ -9,6 +9,7 @@ Quick Start ----------- - Build the ARM Trusted firmware binary +- Build the OP-TEE binary (optional) - Get ddr firmware - Build U-Boot - Boot @@ -20,10 +21,26 @@ Build the ARM Trusted firmware binary $ git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git $ cd trusted-firmware-a - $ export CROSS_COMPILE=aarch64-linux-gnu + $ export CROSS_COMPILE=aarch64-linux-gnu- $ export IMX_BOOT_UART_BASE=0x30860000 + $ # with optee + $ make PLAT=imx8mp SPD=opteed bl31 + $ # without optee $ make PLAT=imx8mp bl31 +Build the OP-TEE binary (optional) +---------------------------------- + +.. code-block:: bash + + $ git clone https://github.com/OP-TEE/optee_os.git + $ cd optee_os + $ make CFG_TEE_BENCHMARK=n \ + CROSS_COMPILE=aarch64-linux-gnu- \ + O=out/arm \ + PLATFORM=imx-mx8mp_phyboard_pollux \ + CFG_TZDRAM_START=0x56000000 + Get the ddr firmware -------------------- @@ -42,6 +59,7 @@ Copy binaries .. code-block:: bash $ cp <TF-A dir>/build/imx8mp/release/bl31.bin . + $ cp <OP-TEE dir>/out/arm/core/tee-raw.bin tee.bin $ cp firmware-imx-8.19/firmware/ddr/synopsys/lpddr4*.bin . Build U-Boot diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 9bab86d2347..1407080f1f4 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -99,6 +99,7 @@ List of mainline supported Rockchip boards: * rk3566 - Anbernic RGxx3 (anbernic-rgxx3-rk3566) + - FriendlyElec NanoPi R3S (nanopi-r3s-rk3566) - Hardkernel ODROID-M1S (odroid-m1s-rk3566) - Pine64 PineTab2 (pinetab2-rk3566) - Pine64 Quartz64-A Board (quartz64-a-rk3566) @@ -137,10 +138,12 @@ List of mainline supported Rockchip boards: - Generic RK3588S/RK3588 (generic-rk3588) - Hardkernel ODROID-M2 (odroid-m2-rk3588s) - Indiedroid Nova (nova-rk3588s) + - Khadas Edge2 (khadas-edge2-rk3588s) - Pine64 QuartzPro64 (quartzpro64-rk3588) - Radxa ROCK 5 ITX (rock-5-itx-rk3588) - Radxa ROCK 5A (rock5a-rk3588s) - Radxa ROCK 5B (rock5b-rk3588) + - Radxa ROCK 5C (rock-5c-rk3588s) - Rockchip Toybrick TB-RK3588X (toybrick-rk3588) - Theobroma Systems RK3588-SBC Jaguar (jaguar-rk3588) - Theobroma Systems SOM-RK3588-Q7 - Tiger (tiger-rk3588) diff --git a/doc/board/theobroma-systems/jaguar_rk3588.rst b/doc/board/theobroma-systems/jaguar_rk3588.rst index db15f945d3b..cba4fd066ab 100644 --- a/doc/board/theobroma-systems/jaguar_rk3588.rst +++ b/doc/board/theobroma-systems/jaguar_rk3588.rst @@ -40,10 +40,10 @@ Get the TF-A and DDR init (TPL) binaries git clone https://github.com/rockchip-linux/rkbin cd rkbin export RKBIN=$(pwd) - export BL31=$RKBIN/bin/rk35/rk3588_bl31_v1.38.elf - export ROCKCHIP_TPL=$RKBIN/bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2736MHz_v1.11.bin + export BL31=$RKBIN/bin/rk35/rk3588_bl31_v1.47.elf + export ROCKCHIP_TPL=$RKBIN/bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.18.bin sed -i 's/^uart baudrate=.*$/uart baudrate=115200/' tools/ddrbin_param.txt - ./tools/ddrbin_tool tools/ddrbin_param.txt "$ROCKCHIP_TPL" + ./tools/ddrbin_tool rk3588 tools/ddrbin_param.txt "$ROCKCHIP_TPL" ./tools/boot_merger RKBOOT/RK3588MINIALL.ini export RKDB=$RKBIN/rk3588_spl_loader_v1.11.112.bin diff --git a/doc/board/theobroma-systems/tiger_rk3588.rst b/doc/board/theobroma-systems/tiger_rk3588.rst index 46112544c82..4586b8d8b5a 100644 --- a/doc/board/theobroma-systems/tiger_rk3588.rst +++ b/doc/board/theobroma-systems/tiger_rk3588.rst @@ -47,11 +47,11 @@ Get the TF-A and DDR init (TPL) binaries git clone https://github.com/rockchip-linux/rkbin cd rkbin export RKBIN=$(pwd) - export BL31=$RKBIN/bin/rk35/rk3588_bl31_v1.38.elf - export ROCKCHIP_TPL=$RKBIN/bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2736MHz_v1.11.bin + export BL31=$RKBIN/bin/rk35/rk3588_bl31_v1.47.elf + export ROCKCHIP_TPL=$RKBIN/bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2400MHz_v1.18.bin sed -i 's/^uart baudrate=.*$/uart baudrate=115200/' tools/ddrbin_param.txt sed -i 's/^uart iomux=.*$/uart iomux=2/' tools/ddrbin_param.txt - ./tools/ddrbin_tool tools/ddrbin_param.txt "$ROCKCHIP_TPL" + ./tools/ddrbin_tool rk3588 tools/ddrbin_param.txt "$ROCKCHIP_TPL" ./tools/boot_merger RKBOOT/RK3588MINIALL.ini export RKDB=$RKBIN/rk3588_spl_loader_v1.11.112.bin diff --git a/doc/develop/bootstd/overview.rst b/doc/develop/bootstd/overview.rst index a2913cd47be..e3ce97cc4f5 100644 --- a/doc/develop/bootstd/overview.rst +++ b/doc/develop/bootstd/overview.rst @@ -453,7 +453,7 @@ drivers are bound automatically. Command interface ----------------- -Three commands are available: +Four commands are available: `bootdev` Allows listing of available bootdevs, selecting a particular one and @@ -468,6 +468,25 @@ Three commands are available: Allow listing of available bootmethds, setting the order in which they are tried and bootmeth specific configuration. See :doc:`/usage/cmd/bootmeth` +`bootstd` + Allow access to standard boot itself, so far only for listing images across + all bootflows. See :doc:`/usage/cmd/bootstd` + +Images +------ + +Standard boot keeps track of images which can or have been loaded. These are +kept in a list attached to each bootflow. They can be listed using the +``bootstd images`` command (see :doc:`/usage/cmd/bootstd`). + +For now most bootmeths load their images when scanning. Over time, some may +adjust to load them only when needed, but in this case the images will still +be visible. + +Once a bootflow has been selected, images for those that are not selected can +potentially be dropped from the memory map. For now, this is not implemented. + + .. _BootflowStates: Bootflow states diff --git a/doc/develop/distro.rst b/doc/develop/distro.rst index 637bc27fc2d..1d2f9c4c32b 100644 --- a/doc/develop/distro.rst +++ b/doc/develop/distro.rst @@ -67,11 +67,16 @@ Boot Configuration Files ------------------------ The standard format for boot configuration files is that of extlinux.conf, as -handled by U-Boot's "syslinux" (disk) or "pxe boot" (network). This is roughly -as specified at `Boot Loader Specification`_: +handled by U-Boot's "syslinux" (disk) or "pxe boot" (network). This format is +not formally standardized and documented in a single location. However, other +implementations do document it and we attempt to be as compatible as possible. +* The UAPI Group Specifications `Boot Loader Specification`_ -... with the exceptions that the Boot Loader Specification document: +* The Syslinux Project documents both `PXELINUX`_ and `SYSLINUX`_ files and is + the originator of the format. + +That said, we have some differences to these documents, namely: * Prescribes a separate configuration per boot menu option, whereas U-Boot lumps all options into a single extlinux.conf file. Hence, U-Boot searches @@ -440,7 +445,9 @@ way in future u-boot versions. In particular the <device type>_boot variables (e.g. mmc_boot, usb_boot) are a strictly internal implementation detail and must not be used as a public interface. -.. _`Boot Loader Specification`: https://systemd.io/BOOT_LOADER_SPECIFICATION/ +.. _`Boot Loader Specification`: https://uapi-group.org/specifications/specs/boot_loader_specification/ +.. _`PXELINUX`: https://wiki.syslinux.org/wiki/index.php?title=PXELINUX +.. _`SYSLINUX`: https://wiki.syslinux.org/wiki/index.php?title=SYSLINUX .. sectionauthor:: (C) Copyright 2014 Red Hat Inc. .. sectionauthor:: Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. diff --git a/doc/develop/driver-model/design.rst b/doc/develop/driver-model/design.rst index 8c2c81d7ac9..92f638a0204 100644 --- a/doc/develop/driver-model/design.rst +++ b/doc/develop/driver-model/design.rst @@ -842,6 +842,23 @@ steps (see device_probe()): cause the uclass to do some housekeeping to record the device as activated and 'known' by the uclass. +For some platforms, certain devices must be probed to get the platform into +a working state. To help with this, drivers marked with DM_FLAG_PROBE_AFTER_BIND +will be probed immediately after all devices are bound. For now, this happens in +SPL, before relocation and after relocation. See the call to ``dm_autoprobe()`` +for where this is done. + +The auto-probe feature is tricky because it bypasses the normal ordering of +probing. General, if device A (e.g. video) needs device B (e.g. clock), then +A's probe() method uses ``clk_get_by_index()`` and B is probed before A. But +A is only probed when it is used. Therefore care should be taken when using +auto-probe, limiting it to devices which truly are essential, such as power +domains or critical clocks. + +See here for more discussion of this feature: + +:Link: https://patchwork.ozlabs.org/project/uboot/patch/20240626235717.272219-1-marex@denx.de/ + Running stage ^^^^^^^^^^^^^ diff --git a/doc/develop/gdb.rst b/doc/develop/gdb.rst index 4e359c7f226..79510ee94d3 100644 --- a/doc/develop/gdb.rst +++ b/doc/develop/gdb.rst @@ -8,12 +8,12 @@ Using a JTAG adapter it is possible to debug a running U-Boot with GDB. A common way is to connect a debug adapter to the JTAG connector of your board, run a GDB server, connect GDB to the GDB server, and use GDB as usual. -Similarly QEMU can provide a GDB server. +Similarly, QEMU can provide a GDB server. Preparing build --------------- -Building U-Boot with with reduced optimization (-Og) and without link time +Building U-Boot with reduced optimization (-Og) and without link time optimization is recommended for easier debugging:: CONFIG_CC_OPTIMIZE_FOR_DEBUG=y @@ -24,7 +24,7 @@ Otherwise build, install, and run U-Boot as usual. Using OpenOCD as GDB server --------------------------- -`OpenOCD <https://openocd.org/>`_ is an open source tool supporting hardware +`OpenOCD <https://openocd.org/>`_ is an open-source tool supporting hardware debug probes, and providing a GDB server. It is readily available in major Linux distributions or you can build it from source. @@ -144,7 +144,7 @@ riscv gp sh r13 ============ ======== -On these architecture the relocation address cat be determined by +On these architectures the relocation address can be determined by dereferencing the global data pointer stored in register, *r9* in the example: .. code-block:: console @@ -153,7 +153,7 @@ dereferencing the global data pointer stored in register, *r9* in the example: $1 = 0x27f7a000 In the GDB shell discard the previously loaded symbol file and add it once -again with the relocation address like this: +again, with the relocation address like this: .. code-block:: console diff --git a/doc/develop/release_cycle.rst b/doc/develop/release_cycle.rst index 449d0375a1b..859ae3b1974 100644 --- a/doc/develop/release_cycle.rst +++ b/doc/develop/release_cycle.rst @@ -51,13 +51,15 @@ Examples:: Current Status -------------- -* U-Boot v2024.10 was released on Mon 07 October 2024. +* U-Boot v2025.01 was released on Mon 06 January 2025. -* The Merge Window for the next release (v2025.01) is **closed**. +* The Merge Window for the next release (v2025.04) is **open** until the -rc1 + release on Mon 27 January 2025. -* The next branch is now **open**. +* The next branch is now **closed** until the -rc2 release on Mon 10 February + 2025. -* Release "v2025.01" is scheduled for 06 January 2025. +* Release "v2025.04" is scheduled for 07 April 2025. Future Releases --------------- @@ -65,31 +67,29 @@ Future Releases .. The following commented out dates are for when release candidates are planned to be tagged. -For the next scheduled release, release candidates were made on:: +.. For the next scheduled release, release candidates were made on:: -* U-Boot v2025.01-rc1 was released on Mon 28 October 2024. +.. * U-Boot v2025.04-rc1 was released on Mon 27 January 2025. -* U-Boot v2025.01-rc2 was released on Mon 11 November 2024. +.. * U-Boot v2025.04-rc2 was released on Mon 10 February 2025. -* U-Boot v2025.01-rc3 was released on Mon 25 November 2024. +.. * U-Boot v2025.04-rc3 was released on Mon 24 February 2025. -* U-Boot v2025.01-rc4 was released on Mon 09 December 2024. +.. * U-Boot v2025.04-rc4 was released on Mon 10 March 2025. -* U-Boot v2025.01-rc5 was released on Mon 23 December 2024. - -* U-Boot v2025.01-rc6 was released on Mon 30 December 2024. +.. * U-Boot v2025.04-rc5 was released on Mon 24 March 2025. Please note that the following dates are planned only and may be deviated from as needed. -* "v2025.01": end of MW = Mon, Oct 21, 2024; release = Mon, Jan 06, 2025 - * "v2025.04": end of MW = Mon, Jan 27, 2025; release = Mon, Apr 07, 2025 * "v2025.07": end of MW = Mon, Apr 21, 2025; release = Mon, Jul 07, 2025 * "v2025.10": end of MW = Mon, Jul 21, 2025; release = Mon, Oct 06, 2025 +* "v2026.01": end of MW = Mon, Oct 20, 2025; release = Mon, Jan 05, 2026 + Previous Releases ----------------- @@ -97,6 +97,8 @@ Note: these statistics are generated by our fork of `gitdm <https://source.denx.de/u-boot/gitdm>`_, which was originally created by Jonathan Corbet. +* :doc:`statistics/u-boot-stats-v2025.01` which was released on 06 January 2025. + * :doc:`statistics/u-boot-stats-v2024.10` which was released on 07 October 2024. * :doc:`statistics/u-boot-stats-v2024.07` which was released on 01 July 2024. diff --git a/doc/develop/statistics/u-boot-stats-v2025.01.rst b/doc/develop/statistics/u-boot-stats-v2025.01.rst new file mode 100644 index 00000000000..668ccffba0b --- /dev/null +++ b/doc/develop/statistics/u-boot-stats-v2025.01.rst @@ -0,0 +1,907 @@ +:orphan: + +Release Statistics for U-Boot v2025.01 +====================================== + +* Processed 1768 changesets from 205 developers + +* 27 employers found + +* A total of 1040983 lines added, 82958 removed (delta 958025) + +.. table:: Developers with the most changesets + :widths: auto + + ==================================== ===== + Name Count + ==================================== ===== + Simon Glass 352 (19.9%) + Marek Vasut 114 (6.4%) + Heinrich Schuchardt 88 (5.0%) + Christian Marangi 68 (3.8%) + Sughosh Ganu 56 (3.2%) + Jerome Forissier 51 (2.9%) + Caleb Connolly 46 (2.6%) + Sam Protsenko 42 (2.4%) + Neil Armstrong 40 (2.3%) + Patrick Rudolph 34 (1.9%) + Tom Rini 33 (1.9%) + Michal Simek 32 (1.8%) + Ilias Apalodimas 29 (1.6%) + Rasmus Villemoes 29 (1.6%) + Raymond Mao 28 (1.6%) + Peng Fan 25 (1.4%) + Jonas Karlman 24 (1.4%) + Venkatesh Yadav Abbarapu 23 (1.3%) + Oliver Gaskell 21 (1.2%) + Fabio Estevam 19 (1.1%) + Heiko Stuebner 17 (1.0%) + Ye Li 16 (0.9%) + Svyatoslav Ryhel 15 (0.8%) + Paul Kocialkowski 15 (0.8%) + Richard Weinberger 14 (0.8%) + Chia-Wei Wang 12 (0.7%) + Takahiro Kuwano 12 (0.7%) + Daniel Schultz 12 (0.7%) + Zixun LI 11 (0.6%) + Paul Barker 10 (0.6%) + Anatolij Gustschin 10 (0.6%) + Manorit Chawdhry 9 (0.5%) + Patrice Chotard 9 (0.5%) + Padmarao Begari 9 (0.5%) + Romain Naour 9 (0.5%) + Bhupesh Sharma 9 (0.5%) + Chris Packham 8 (0.5%) + Andy Shevchenko 8 (0.5%) + Wadim Egorov 8 (0.5%) + Bastien Curutchet 8 (0.5%) + Hanyuan Zhao 8 (0.5%) + Chris Morgan 8 (0.5%) + Tim Harvey 8 (0.5%) + Quentin Schulz 7 (0.4%) + Andrew Goodbody 7 (0.4%) + Mattijs Korpershoek 6 (0.3%) + William Zhang 6 (0.3%) + Janne Grunau 6 (0.3%) + Jan Kiszka 6 (0.3%) + Dmitry Rokosov 6 (0.3%) + Sebastian Reichel 6 (0.3%) + Kishon Vijay Abraham I 6 (0.3%) + Jonathan Humphreys 5 (0.3%) + Patrick Delaunay 5 (0.3%) + Michael Walle 5 (0.3%) + Yuri Zaporozhets 5 (0.3%) + Linus Walleij 5 (0.3%) + Julius Lehmann 5 (0.3%) + Boyan Karatotev 5 (0.3%) + Baocheng Su 5 (0.3%) + Prasad Kummari 5 (0.3%) + Jim Liu 5 (0.3%) + Jacky Chou 5 (0.3%) + Philip Oberfichtner 5 (0.3%) + Andy Yan 4 (0.2%) + Siddharth Vadapalli 4 (0.2%) + david regan 4 (0.2%) + Ion Agorria 4 (0.2%) + Andrejs Cainikovs 4 (0.2%) + Billy Tsai 4 (0.2%) + Marcin Juszkiewicz 4 (0.2%) + Jesse Taube 4 (0.2%) + Alexander Kochetkov 4 (0.2%) + Chintan Vankar 4 (0.2%) + Martyn Welch 4 (0.2%) + Jernej Skrabec 4 (0.2%) + John Watts 4 (0.2%) + Sean Anderson 4 (0.2%) + Kongyang Liu 4 (0.2%) + Prasanth Babu Mantena 3 (0.2%) + J. Neuschäfer 3 (0.2%) + E Shattow 3 (0.2%) + Nicolas Belin 3 (0.2%) + Udit Kumar 3 (0.2%) + Leo Yan 3 (0.2%) + Love Kumar 3 (0.2%) + Weijie Gao 3 (0.2%) + Erik Schumacher 3 (0.2%) + Conor Dooley 3 (0.2%) + LekKit 3 (0.2%) + Maksim Kiselev 3 (0.2%) + Maximilian Brune 3 (0.2%) + FUKAUMI Naoki 3 (0.2%) + Hiago De Franco 3 (0.2%) + Devarsh Thakkar 3 (0.2%) + Joy Zou 3 (0.2%) + Andre Przywara 3 (0.2%) + Tomas Paukrt 3 (0.2%) + Arseniy Krasnov 3 (0.2%) + Andreas Schwab 2 (0.1%) + Tony Dinh 2 (0.1%) + Khoa Hoang 2 (0.1%) + Nam Cao 2 (0.1%) + Javier Tia 2 (0.1%) + Lad Prabhakar 2 (0.1%) + Ian Ray 2 (0.1%) + Paul Geurts 2 (0.1%) + Moritz Fischer 2 (0.1%) + Gilles Talis 2 (0.1%) + Vaishnav Achath 2 (0.1%) + Mayuresh Chitale 2 (0.1%) + Frank Sae 2 (0.1%) + Alex Shumsky 2 (0.1%) + John Vicky Vykuntapu 2 (0.1%) + Miquel Raynal 2 (0.1%) + Santhosh Kumar K 2 (0.1%) + Brian Ruley 2 (0.1%) + Ashok Reddy Soma 2 (0.1%) + Daniel Palmer 2 (0.1%) + Matthias Pritschet 2 (0.1%) + Dario Binacchi 2 (0.1%) + Vignesh Raghavendra 2 (0.1%) + Benjamin Hahn 2 (0.1%) + Yashwanth Varakala 2 (0.1%) + Yasuharu Shibata 2 (0.1%) + Mikhail Kshevetskiy 2 (0.1%) + Geert Uytterhoeven 1 (0.1%) + Ronald Wahl 1 (0.1%) + Francois Berder 1 (0.1%) + Wei Ming Chen 1 (0.1%) + Leonard Anderweit 1 (0.1%) + Johan Jonker 1 (0.1%) + Roger Quadros 1 (0.1%) + Peter Robinson 1 (0.1%) + Vincent Stehlé 1 (0.1%) + Evgeny Bachinin 1 (0.1%) + Mark Kettenis 1 (0.1%) + Dominik Wernberger 1 (0.1%) + Joel Stanley 1 (0.1%) + Ben Horgan 1 (0.1%) + Holger Brunck 1 (0.1%) + Dominique Martinet 1 (0.1%) + Francesco Dolcini 1 (0.1%) + Heiko Schocher 1 (0.1%) + Vasileios Amoiridis 1 (0.1%) + Peter Korsgaard 1 (0.1%) + Loic Poulain 1 (0.1%) + Saeed Nowshadi 1 (0.1%) + Sergey Bostandzhyan 1 (0.1%) + Chris Paterson 1 (0.1%) + Benjamin SzÅ‘ke 1 (0.1%) + mason1920 1 (0.1%) + Uwe Kleine-König 1 (0.1%) + Nick Hu 1 (0.1%) + Henrik Grimler 1 (0.1%) + Baruch Siach 1 (0.1%) + Markus Volk 1 (0.1%) + Tudor Ambarus 1 (0.1%) + Jonas Jelonek 1 (0.1%) + Alexander Dahl 1 (0.1%) + Anton Blanchard 1 (0.1%) + Li Hua Qian 1 (0.1%) + Daniel Semkowicz 1 (0.1%) + Lukasz Czechowski 1 (0.1%) + Paul Alvin 1 (0.1%) + Philip Balister 1 (0.1%) + Han Xu 1 (0.1%) + Dmitry Dunaev 1 (0.1%) + Guillaume La Roque 1 (0.1%) + Eva Kurchatova 1 (0.1%) + Dmitrii Merkurev 1 (0.1%) + Ken Kurematsu 1 (0.1%) + Ray Chang 1 (0.1%) + Bhavya Kapoor 1 (0.1%) + Parth Pancholi 1 (0.1%) + Eugen Hristev 1 (0.1%) + Godfrey Mwangi 1 (0.1%) + Callum Parsey 1 (0.1%) + Jonas Schwöbel 1 (0.1%) + Sidharth Prabukumar 1 (0.1%) + Chris Webb 1 (0.1%) + Ying-Chun Liu (PaulLiu) 1 (0.1%) + Vitor Soares 1 (0.1%) + Arturo Buzarra 1 (0.1%) + Joakim Tjernlund 1 (0.1%) + Vitaliy Vasylskyy 1 (0.1%) + Jacky Bai 1 (0.1%) + Frank Li 1 (0.1%) + Stanley Chu 1 (0.1%) + Francis Laniel 1 (0.1%) + John Keeping 1 (0.1%) + Keerthy 1 (0.1%) + Kuan Lim Lee 1 (0.1%) + Rogerio Guerra Borin 1 (0.1%) + Mathieu Othacehe 1 (0.1%) + Franco Venturi 1 (0.1%) + Maxim Moskalets 1 (0.1%) + Derald D. Woods 1 (0.1%) + MD Danish Anwar 1 (0.1%) + Andrew Davis 1 (0.1%) + Primoz Fiser 1 (0.1%) + Lukasz Majewski 1 (0.1%) + Jianfeng A Zhu 1 (0.1%) + Ravi Minnikanti 1 (0.1%) + Michael Polyntsov 1 (0.1%) + ==================================== ===== + + +.. table:: Developers with the most changed lines + :widths: auto + + ==================================== ===== + Name Count + ==================================== ===== + Tom Rini 929361 (86.0%) + Simon Glass 18229 (1.7%) + Marek Vasut 12581 (1.2%) + Chia-Wei Wang 12218 (1.1%) + Peng Fan 9088 (0.8%) + Caleb Connolly 6163 (0.6%) + Christian Marangi 5779 (0.5%) + Sebastian Reichel 5023 (0.5%) + Vitaliy Vasylskyy 4735 (0.4%) + Fabio Estevam 4727 (0.4%) + Jerome Forissier 4086 (0.4%) + Patrick Rudolph 4001 (0.4%) + Bhupesh Sharma 3827 (0.4%) + Andrew Davis 3676 (0.3%) + Andre Przywara 3267 (0.3%) + Raymond Mao 3040 (0.3%) + Gilles Talis 2897 (0.3%) + Vaishnav Achath 2852 (0.3%) + david regan 2790 (0.3%) + Paul Barker 2574 (0.2%) + Sughosh Ganu 2518 (0.2%) + Kongyang Liu 2406 (0.2%) + Jonas Karlman 2194 (0.2%) + Oliver Gaskell 1930 (0.2%) + Venkatesh Yadav Abbarapu 1762 (0.2%) + Svyatoslav Ryhel 1540 (0.1%) + Jan Kiszka 1362 (0.1%) + Neil Armstrong 1225 (0.1%) + Sam Protsenko 1078 (0.1%) + Marcin Juszkiewicz 1045 (0.1%) + Heinrich Schuchardt 1022 (0.1%) + Conor Dooley 890 (0.1%) + Michal Simek 881 (0.1%) + Siddharth Vadapalli 879 (0.1%) + Heiko Stuebner 803 (0.1%) + Jim Liu 772 (0.1%) + Love Kumar 707 (0.1%) + Derald D. Woods 695 (0.1%) + Philip Oberfichtner 645 (0.1%) + Andy Yan 614 (0.1%) + Ilias Apalodimas 580 (0.1%) + Billy Tsai 563 (0.1%) + Julius Lehmann 561 (0.1%) + Frank Sae 499 (0.0%) + Chris Packham 485 (0.0%) + Janne Grunau 473 (0.0%) + Johan Jonker 469 (0.0%) + Alexander Kochetkov 457 (0.0%) + Chris Morgan 425 (0.0%) + Ye Li 413 (0.0%) + Bastien Curutchet 385 (0.0%) + Dmitry Rokosov 376 (0.0%) + Kuan Lim Lee 375 (0.0%) + Maximilian Brune 334 (0.0%) + Linus Walleij 328 (0.0%) + Manorit Chawdhry 302 (0.0%) + Rasmus Villemoes 297 (0.0%) + Martyn Welch 292 (0.0%) + Zixun LI 269 (0.0%) + Romain Naour 229 (0.0%) + Lad Prabhakar 215 (0.0%) + Richard Weinberger 212 (0.0%) + Paul Kocialkowski 209 (0.0%) + Chintan Vankar 202 (0.0%) + Keerthy 191 (0.0%) + Wadim Egorov 188 (0.0%) + Santhosh Kumar K 173 (0.0%) + Tim Harvey 168 (0.0%) + Anatolij Gustschin 155 (0.0%) + Prasad Kummari 154 (0.0%) + Hanyuan Zhao 147 (0.0%) + William Zhang 147 (0.0%) + Mayuresh Chitale 139 (0.0%) + Quentin Schulz 133 (0.0%) + Dmitrii Merkurev 124 (0.0%) + FUKAUMI Naoki 117 (0.0%) + Padmarao Begari 116 (0.0%) + Lukasz Czechowski 112 (0.0%) + Mathieu Othacehe 110 (0.0%) + Andrew Goodbody 106 (0.0%) + Francis Laniel 98 (0.0%) + Takahiro Kuwano 96 (0.0%) + Boyan Karatotev 94 (0.0%) + Jacky Chou 90 (0.0%) + Andy Shevchenko 87 (0.0%) + Baocheng Su 86 (0.0%) + Ashok Reddy Soma 83 (0.0%) + Mattijs Korpershoek 82 (0.0%) + Kishon Vijay Abraham I 80 (0.0%) + Daniel Schultz 73 (0.0%) + Jernej Skrabec 72 (0.0%) + Arseniy Krasnov 72 (0.0%) + Guillaume La Roque 71 (0.0%) + Benjamin Hahn 62 (0.0%) + Vasileios Amoiridis 58 (0.0%) + Udit Kumar 56 (0.0%) + Paul Alvin 54 (0.0%) + Leo Yan 53 (0.0%) + Paul Geurts 53 (0.0%) + Ion Agorria 51 (0.0%) + Patrick Delaunay 50 (0.0%) + Brian Ruley 49 (0.0%) + Maksim Kiselev 48 (0.0%) + Matthias Pritschet 47 (0.0%) + J. Neuschäfer 46 (0.0%) + Javier Tia 45 (0.0%) + Jesse Taube 41 (0.0%) + Joy Zou 41 (0.0%) + Tony Dinh 40 (0.0%) + Ravi Minnikanti 39 (0.0%) + Sean Anderson 38 (0.0%) + Prasanth Babu Mantena 37 (0.0%) + Khoa Hoang 37 (0.0%) + Parth Pancholi 36 (0.0%) + Yasuharu Shibata 35 (0.0%) + Dmitry Dunaev 35 (0.0%) + Weijie Gao 34 (0.0%) + Sergey Bostandzhyan 32 (0.0%) + Arturo Buzarra 32 (0.0%) + Patrice Chotard 30 (0.0%) + Jonathan Humphreys 30 (0.0%) + Erik Schumacher 30 (0.0%) + Alex Shumsky 30 (0.0%) + Nick Hu 30 (0.0%) + Tomas Paukrt 27 (0.0%) + Devarsh Thakkar 24 (0.0%) + Michael Polyntsov 24 (0.0%) + Callum Parsey 23 (0.0%) + Yuri Zaporozhets 22 (0.0%) + Hiago De Franco 21 (0.0%) + Chris Webb 21 (0.0%) + Francois Berder 20 (0.0%) + John Watts 19 (0.0%) + Nicolas Belin 19 (0.0%) + Daniel Palmer 19 (0.0%) + Michael Walle 18 (0.0%) + Bhavya Kapoor 18 (0.0%) + Jonas Schwöbel 18 (0.0%) + Stanley Chu 18 (0.0%) + Benjamin SzÅ‘ke 17 (0.0%) + John Keeping 17 (0.0%) + Ian Ray 14 (0.0%) + John Vicky Vykuntapu 13 (0.0%) + Peter Korsgaard 13 (0.0%) + MD Danish Anwar 13 (0.0%) + Vignesh Raghavendra 12 (0.0%) + Andrejs Cainikovs 11 (0.0%) + Li Hua Qian 10 (0.0%) + Moritz Fischer 9 (0.0%) + Evgeny Bachinin 9 (0.0%) + Loic Poulain 9 (0.0%) + Joakim Tjernlund 9 (0.0%) + Miquel Raynal 8 (0.0%) + Lukasz Majewski 8 (0.0%) + Jianfeng A Zhu 8 (0.0%) + Nam Cao 7 (0.0%) + Holger Brunck 7 (0.0%) + Heiko Schocher 7 (0.0%) + Andreas Schwab 6 (0.0%) + Geert Uytterhoeven 6 (0.0%) + Anton Blanchard 6 (0.0%) + Jacky Bai 6 (0.0%) + E Shattow 5 (0.0%) + Ray Chang 5 (0.0%) + LekKit 4 (0.0%) + Yashwanth Varakala 4 (0.0%) + Peter Robinson 4 (0.0%) + Maxim Moskalets 4 (0.0%) + Ronald Wahl 3 (0.0%) + Uwe Kleine-König 3 (0.0%) + Markus Volk 3 (0.0%) + Eugen Hristev 3 (0.0%) + Godfrey Mwangi 3 (0.0%) + Dario Binacchi 2 (0.0%) + Mikhail Kshevetskiy 2 (0.0%) + Wei Ming Chen 2 (0.0%) + Leonard Anderweit 2 (0.0%) + Dominik Wernberger 2 (0.0%) + Joel Stanley 2 (0.0%) + Saeed Nowshadi 2 (0.0%) + Henrik Grimler 2 (0.0%) + Eva Kurchatova 2 (0.0%) + Frank Li 2 (0.0%) + Rogerio Guerra Borin 2 (0.0%) + Roger Quadros 1 (0.0%) + Vincent Stehlé 1 (0.0%) + Mark Kettenis 1 (0.0%) + Ben Horgan 1 (0.0%) + Dominique Martinet 1 (0.0%) + Francesco Dolcini 1 (0.0%) + Chris Paterson 1 (0.0%) + mason1920 1 (0.0%) + Baruch Siach 1 (0.0%) + Tudor Ambarus 1 (0.0%) + Jonas Jelonek 1 (0.0%) + Alexander Dahl 1 (0.0%) + Daniel Semkowicz 1 (0.0%) + Philip Balister 1 (0.0%) + Han Xu 1 (0.0%) + Ken Kurematsu 1 (0.0%) + Sidharth Prabukumar 1 (0.0%) + Ying-Chun Liu (PaulLiu) 1 (0.0%) + Vitor Soares 1 (0.0%) + Franco Venturi 1 (0.0%) + Primoz Fiser 1 (0.0%) + ==================================== ===== + + +.. table:: Developers with the most lines removed + :widths: auto + + ==================================== ===== + Name Count + ==================================== ===== + Marek Vasut 6902 (8.3%) + Andrew Davis 3578 (4.3%) + Andre Przywara 3255 (3.9%) + david regan 2650 (3.2%) + Paul Barker 2432 (2.9%) + Fabio Estevam 2002 (2.4%) + Caleb Connolly 1697 (2.0%) + Jan Kiszka 1189 (1.4%) + Conor Dooley 758 (0.9%) + Derald D. Woods 693 (0.8%) + Johan Jonker 469 (0.6%) + Lad Prabhakar 182 (0.2%) + Paul Kocialkowski 134 (0.2%) + Andy Shevchenko 44 (0.1%) + Tony Dinh 18 (0.0%) + Manorit Chawdhry 13 (0.0%) + Maximilian Brune 8 (0.0%) + Holger Brunck 7 (0.0%) + Jacky Bai 6 (0.0%) + Anatolij Gustschin 5 (0.0%) + Li Hua Qian 5 (0.0%) + Miquel Raynal 3 (0.0%) + E Shattow 3 (0.0%) + Geert Uytterhoeven 2 (0.0%) + Maxim Moskalets 2 (0.0%) + Uwe Kleine-König 2 (0.0%) + Hiago De Franco 1 (0.0%) + Anton Blanchard 1 (0.0%) + Roger Quadros 1 (0.0%) + ==================================== ===== + + +.. table:: Developers with the most signoffs (total 307) + :widths: auto + + ==================================== ===== + Name Count + ==================================== ===== + Minkyu Kang 41 (13.4%) + Mattijs Korpershoek 34 (11.1%) + Michal Simek 27 (8.8%) + Peng Fan 25 (8.1%) + Neil Armstrong 19 (6.2%) + Nathan Barrett-Morrison 13 (4.2%) + Greg Malysa 12 (3.9%) + Ilias Apalodimas 10 (3.3%) + Heiko Stuebner 10 (3.3%) + Chintan Vankar 8 (2.6%) + Siddharth Vadapalli 7 (2.3%) + Jan Kiszka 6 (2.0%) + Miquel Raynal 6 (2.0%) + Trevor Woerner 6 (2.0%) + Linus Walleij 6 (2.0%) + Leo Yan 5 (1.6%) + Svyatoslav Ryhel 5 (1.6%) + Jonas Karlman 5 (1.6%) + Tom Rini 5 (1.6%) + Max Krummenacher 4 (1.3%) + Ashok Reddy Soma 4 (1.3%) + Patrick Rudolph 4 (1.3%) + Simon Glass 3 (1.0%) + Marek Vasut 2 (0.7%) + Tejas Bhumkar 2 (0.7%) + Nishanth Menon 2 (0.7%) + Alice Guo 2 (0.7%) + Wang Jie 2 (0.7%) + Chen-Yu Tsai 2 (0.7%) + Prasanth Babu Mantena 2 (0.7%) + Guillaume La Roque 2 (0.7%) + Venkatesh Yadav Abbarapu 2 (0.7%) + Caleb Connolly 1 (0.3%) + Lad Prabhakar 1 (0.3%) + Hiago De Franco 1 (0.3%) + Mikhail Kshevetskiy 1 (0.3%) + Francesco Dolcini 1 (0.3%) + Chris Paterson 1 (0.3%) + T Karthik Reddy 1 (0.3%) + Srinivas Goud 1 (0.3%) + Shawn Guo 1 (0.3%) + Jackson Cooper-Driver 1 (0.3%) + Cody Schuffelen 1 (0.3%) + Jayesh Choudhary 1 (0.3%) + Ian Roberts 1 (0.3%) + Wei Liang Lim 1 (0.3%) + Andreas Dannenberg 1 (0.3%) + Vignesh Raghavendra 1 (0.3%) + Benjamin SzÅ‘ke 1 (0.3%) + Jernej Skrabec 1 (0.3%) + Francis Laniel 1 (0.3%) + Daniel Schultz 1 (0.3%) + Kishon Vijay Abraham I 1 (0.3%) + William Zhang 1 (0.3%) + Heinrich Schuchardt 1 (0.3%) + Ye Li 1 (0.3%) + ==================================== ===== + + +.. table:: Developers with the most reviews (total 1015) + :widths: auto + + ==================================== ===== + Name Count + ==================================== ===== + Simon Glass 195 (19.2%) + Ilias Apalodimas 103 (10.1%) + Tom Rini 62 (6.1%) + Mattijs Korpershoek 57 (5.6%) + Kever Yang 57 (5.6%) + Marek Vasut 39 (3.8%) + Leo Yu-Chi Liang 36 (3.5%) + Peng Fan 30 (3.0%) + Neil Armstrong 30 (3.0%) + Quentin Schulz 30 (3.0%) + Stefan Roese 28 (2.8%) + Heiko Schocher 26 (2.6%) + Peter Robinson 25 (2.5%) + Heinrich Schuchardt 24 (2.4%) + Patrick Delaunay 21 (2.1%) + Caleb Connolly 19 (1.9%) + Fabio Estevam 15 (1.5%) + Michael Nazzareno Trimarchi 12 (1.2%) + William Zhang 11 (1.1%) + Sumit Garg 11 (1.1%) + Sean Anderson 11 (1.1%) + Jaehoon Chung 10 (1.0%) + Neha Malcom Francis 10 (1.0%) + Aniket Limaye 9 (0.9%) + Michal Simek 8 (0.8%) + Alexander Sverdlin 8 (0.8%) + Jerome Forissier 8 (0.8%) + Jonas Karlman 6 (0.6%) + Ye Li 6 (0.6%) + Tudor Ambarus 6 (0.6%) + Patrice Chotard 6 (0.6%) + Miquel Raynal 5 (0.5%) + Moritz Fischer 5 (0.5%) + Bryan Brattlof 5 (0.5%) + Love Kumar 5 (0.5%) + Andre Przywara 4 (0.4%) + Paul Kocialkowski 4 (0.4%) + Anand Gore 4 (0.4%) + Pratyush Yadav 4 (0.4%) + Florian Fainelli 4 (0.4%) + Linus Walleij 3 (0.3%) + Guillaume La Roque 3 (0.3%) + Paul Barker 3 (0.3%) + Daniel Golle 3 (0.3%) + Dhruva Gole 3 (0.3%) + Venkatesh Yadav Abbarapu 2 (0.2%) + Andrew Davis 2 (0.2%) + david regan 2 (0.2%) + Roger Quadros 2 (0.2%) + Heiko Thiery 2 (0.2%) + Dragan Simic 2 (0.2%) + Jagan Teki 2 (0.2%) + Udit Kumar 2 (0.2%) + Siddharth Vadapalli 1 (0.1%) + Leo Yan 1 (0.1%) + Francesco Dolcini 1 (0.1%) + Jayesh Choudhary 1 (0.1%) + Vignesh Raghavendra 1 (0.1%) + Andy Shevchenko 1 (0.1%) + Tony Dinh 1 (0.1%) + Frieder Schrempf 1 (0.1%) + Qu Wenruo 1 (0.1%) + Igor Opaniuk 1 (0.1%) + Christoph Niedermaier 1 (0.1%) + Andrew Lunn 1 (0.1%) + Patrick Wildt 1 (0.1%) + Aurelien Jarno 1 (0.1%) + Kamal Dasu 1 (0.1%) + Julien Masson 1 (0.1%) + Hari Prasath Gujulan Elango 1 (0.1%) + Jacky Cao 1 (0.1%) + Toyama, Yoshihiro 1 (0.1%) + Andrejs Cainikovs 1 (0.1%) + Padmarao Begari 1 (0.1%) + Benjamin Hahn 1 (0.1%) + Tim Harvey 1 (0.1%) + Sughosh Ganu 1 (0.1%) + Raymond Mao 1 (0.1%) + ==================================== ===== + + +.. table:: Developers with the most test credits (total 164) + :widths: auto + + ==================================== ===== + Name Count + ==================================== ===== + Tom Rini 23 (14.0%) + Julius Lehmann 17 (10.4%) + Uwe Kleine-König 14 (8.5%) + Venkatesh Yadav Abbarapu 13 (7.9%) + Derald D. Woods 12 (7.3%) + Michal Simek 9 (5.5%) + Mattijs Korpershoek 8 (4.9%) + Caleb Connolly 7 (4.3%) + Guillaume La Roque 6 (3.7%) + Soeren Moch 5 (3.0%) + Anand Moon 5 (3.0%) + Frank Wunderlich 4 (2.4%) + Chris Morgan 4 (2.4%) + Ilias Apalodimas 3 (1.8%) + Daniel Golle 3 (1.8%) + Quentin Schulz 2 (1.2%) + Heiko Schocher 2 (1.2%) + Patrick Delaunay 2 (1.2%) + Patrice Chotard 2 (1.2%) + Heiko Thiery 2 (1.2%) + Loic Devulder 2 (1.2%) + Adam Ford 2 (1.2%) + Javier Fernandez Pastrana 2 (1.2%) + Vaishnav Achath 2 (1.2%) + Neil Armstrong 1 (0.6%) + Fabio Estevam 1 (0.6%) + William Zhang 1 (0.6%) + Sughosh Ganu 1 (0.6%) + Johan Jonker 1 (0.6%) + E Shattow 1 (0.6%) + Enric Balletbo i Serra 1 (0.6%) + Ryan Walklin 1 (0.6%) + Teresa Remmet 1 (0.6%) + Andreas Schwab 1 (0.6%) + Andrew Goodbody 1 (0.6%) + Jonathan Humphreys 1 (0.6%) + Gilles Talis 1 (0.6%) + ==================================== ===== + + +.. table:: Developers who gave the most tested-by credits (total 164) + :widths: auto + + ==================================== ===== + Name Count + ==================================== ===== + Neil Armstrong 23 (14.0%) + Simon Glass 21 (12.8%) + Heiko Stuebner 14 (8.5%) + Paul Kocialkowski 13 (7.9%) + Bhupesh Sharma 12 (7.3%) + Sughosh Ganu 10 (6.1%) + Sebastian Reichel 10 (6.1%) + Dmitry Rokosov 9 (5.5%) + Marek Vasut 8 (4.9%) + Heinrich Schuchardt 6 (3.7%) + Jerome Forissier 4 (2.4%) + Jernej Skrabec 4 (2.4%) + Weijie Gao 4 (2.4%) + Christian Marangi 4 (2.4%) + Peng Fan 2 (1.2%) + Nam Cao 2 (1.2%) + Michael Walle 2 (1.2%) + Sam Protsenko 2 (1.2%) + Tom Rini 1 (0.6%) + Venkatesh Yadav Abbarapu 1 (0.6%) + Caleb Connolly 1 (0.6%) + Chris Morgan 1 (0.6%) + Ilias Apalodimas 1 (0.6%) + William Zhang 1 (0.6%) + Jonas Karlman 1 (0.6%) + Prasanth Babu Mantena 1 (0.6%) + Mark Kettenis 1 (0.6%) + Lukasz Majewski 1 (0.6%) + Ion Agorria 1 (0.6%) + Tomas Paukrt 1 (0.6%) + Rasmus Villemoes 1 (0.6%) + Dmitrii Merkurev 1 (0.6%) + ==================================== ===== + + +.. table:: Developers with the most report credits (total 32) + :widths: auto + + ==================================== ===== + Name Count + ==================================== ===== + Tom Rini 5 (15.6%) + Simon Glass 3 (9.4%) + Patrick Delaunay 3 (9.4%) + Heinrich Schuchardt 2 (6.2%) + Ilias Apalodimas 2 (6.2%) + Jonas Karlman 1 (3.1%) + Mattijs Korpershoek 1 (3.1%) + Patrice Chotard 1 (3.1%) + Heiko Thiery 1 (3.1%) + Vaishnav Achath 1 (3.1%) + E Shattow 1 (3.1%) + Enric Balletbo i Serra 1 (3.1%) + Gilles Talis 1 (3.1%) + Leo Yu-Chi Liang 1 (3.1%) + Michael Nazzareno Trimarchi 1 (3.1%) + Conor Dooley 1 (3.1%) + Vinh Nguyen 1 (3.1%) + João Paulo Gonçalves 1 (3.1%) + Adriano Cordova 1 (3.1%) + Rudi Heitbaum 1 (3.1%) + kernel test robot 1 (3.1%) + Alexander Dahl 1 (3.1%) + ==================================== ===== + + +.. table:: Developers who gave the most report credits (total 32) + :widths: auto + + ==================================== ===== + Name Count + ==================================== ===== + Jerome Forissier 7 (21.9%) + Heinrich Schuchardt 6 (18.8%) + Marek Vasut 4 (12.5%) + Ilias Apalodimas 3 (9.4%) + Tom Rini 1 (3.1%) + Simon Glass 1 (3.1%) + Sughosh Ganu 1 (3.1%) + Peng Fan 1 (3.1%) + Michael Walle 1 (3.1%) + Michal Simek 1 (3.1%) + Quentin Schulz 1 (3.1%) + Geert Uytterhoeven 1 (3.1%) + Markus Volk 1 (3.1%) + Eva Kurchatova 1 (3.1%) + Devarsh Thakkar 1 (3.1%) + Yasuharu Shibata 1 (3.1%) + ==================================== ===== + + +.. table:: Top changeset contributors by employer + :widths: auto + + ==================================== ===== + Name Count + ==================================== ===== + (Unknown) 576 (32.6%) + Google LLC 355 (20.1%) + Linaro 314 (17.8%) + DENX Software Engineering 96 (5.4%) + AMD 78 (4.4%) + Renesas Electronics 67 (3.8%) + NXP 47 (2.7%) + Texas Instruments 47 (2.7%) + Konsulko Group 33 (1.9%) + Phytec 25 (1.4%) + Analog Devices 21 (1.2%) + ST Microelectronics 14 (0.8%) + ARM 13 (0.7%) + Siemens 12 (0.7%) + Toradex 11 (0.6%) + BayLibre SAS 10 (0.6%) + Bootlin 10 (0.6%) + Broadcom 10 (0.6%) + Collabora Ltd. 10 (0.6%) + Intel 8 (0.5%) + Amarula Solutions 3 (0.2%) + linutronix 2 (0.1%) + SUSE 2 (0.1%) + Sony 1 (0.1%) + Debian.org 1 (0.1%) + Digi International 1 (0.1%) + Marvell 1 (0.1%) + ==================================== ===== + + +.. table:: Top lines changed by employer + :widths: auto + + ==================================== ===== + Name Count + ==================================== ===== + Konsulko Group 929361 (86.0%) + (Unknown) 52999 (4.9%) + Linaro 20228 (1.9%) + Google LLC 18362 (1.7%) + DENX Software Engineering 13574 (1.3%) + NXP 9551 (0.9%) + Texas Instruments 8545 (0.8%) + Renesas Electronics 7339 (0.7%) + Collabora Ltd. 5315 (0.5%) + AMD 3772 (0.3%) + ARM 3416 (0.3%) + Broadcom 2937 (0.3%) + Analog Devices 1930 (0.2%) + Siemens 1458 (0.1%) + Bootlin 393 (0.0%) + Phytec 329 (0.0%) + BayLibre SAS 172 (0.0%) + Amarula Solutions 100 (0.0%) + Intel 87 (0.0%) + ST Microelectronics 80 (0.0%) + Toradex 72 (0.0%) + Marvell 39 (0.0%) + Digi International 32 (0.0%) + Sony 8 (0.0%) + linutronix 7 (0.0%) + SUSE 6 (0.0%) + Debian.org 3 (0.0%) + ==================================== ===== + + +.. table:: Employers with the most signoffs (total 307) + :widths: auto + + ==================================== ===== + Name Count + ==================================== ===== + (Unknown) 63 (20.5%) + Samsung 41 (13.4%) + Linaro 36 (11.7%) + AMD 36 (11.7%) + BayLibre SAS 36 (11.7%) + NXP 28 (9.1%) + Texas Instruments 23 (7.5%) + ARM 6 (2.0%) + Siemens 6 (2.0%) + Bootlin 6 (2.0%) + Toradex 6 (2.0%) + Konsulko Group 5 (1.6%) + Google LLC 4 (1.3%) + Renesas Electronics 4 (1.3%) + Rockchip 2 (0.7%) + Broadcom 1 (0.3%) + Phytec 1 (0.3%) + Amarula Solutions 1 (0.3%) + Canonical 1 (0.3%) + Xilinx 1 (0.3%) + ==================================== ===== + + +.. table:: Employers with the most hackers (total 206) + :widths: auto + + ==================================== ===== + Name Count + ==================================== ===== + (Unknown) 107 (51.9%) + Linaro 15 (7.3%) + Texas Instruments 15 (7.3%) + AMD 9 (4.4%) + NXP 6 (2.9%) + Toradex 6 (2.9%) + DENX Software Engineering 6 (2.9%) + ARM 5 (2.4%) + Phytec 5 (2.4%) + Renesas Electronics 4 (1.9%) + BayLibre SAS 3 (1.5%) + Siemens 3 (1.5%) + Google LLC 3 (1.5%) + Bootlin 2 (1.0%) + Broadcom 2 (1.0%) + Amarula Solutions 2 (1.0%) + Collabora Ltd. 2 (1.0%) + ST Microelectronics 2 (1.0%) + Konsulko Group 1 (0.5%) + Analog Devices 1 (0.5%) + Intel 1 (0.5%) + Marvell 1 (0.5%) + Digi International 1 (0.5%) + Sony 1 (0.5%) + linutronix 1 (0.5%) + SUSE 1 (0.5%) + Debian.org 1 (0.5%) + ==================================== ===== diff --git a/doc/device-tree-bindings/usb/dwc2.txt b/doc/device-tree-bindings/usb/dwc2.txt index 7a533f65934..9a87202d4b9 100644 --- a/doc/device-tree-bindings/usb/dwc2.txt +++ b/doc/device-tree-bindings/usb/dwc2.txt @@ -4,6 +4,7 @@ Platform DesignWare HS OTG USB 2.0 controller Required properties: - compatible : One of: - brcm,bcm2835-usb: The DWC2 USB controller instance in the BCM2835 SoC. + - canaan,k230-otg: The DWC2 USB controller instance in the K230 SoC. - hisilicon,hi6220-usb: The DWC2 USB controller instance in the hi6220 SoC. - "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs; - "lantiq,xrx200-usb": The DWC2 USB controller instance in Lantiq XRX SoCs; diff --git a/doc/usage/cmd/bootmenu.rst b/doc/usage/cmd/bootmenu.rst index 294cc02b17a..cd5597bc646 100644 --- a/doc/usage/cmd/bootmenu.rst +++ b/doc/usage/cmd/bootmenu.rst @@ -11,7 +11,7 @@ Synopsis -------- :: - bootmenu [delay] + bootmenu [-e] [delay] Description ----------- @@ -28,6 +28,14 @@ The "bootmenu" command interprets ANSI escape sequences, so an ANSI terminal is required for proper menu rendering and item selection. +-e + show menu entries based on UEFI boot options + +delay + is the autoboot delay in seconds, after which the first + menu entry will be selected automatically + + The assembling of the menu is done via a set of environment variables "bootmenu_<num>" and "bootmenu_delay", i.e.:: @@ -35,8 +43,7 @@ The assembling of the menu is done via a set of environment variables bootmenu_<num>="<title>=<commands>" <delay> - is the autoboot delay in seconds, after which the first - menu entry will be selected automatically + autostart delay in seconds <num> is the boot menu entry number, starting from zero diff --git a/doc/usage/cmd/bootstd.rst b/doc/usage/cmd/bootstd.rst new file mode 100644 index 00000000000..7d933852a91 --- /dev/null +++ b/doc/usage/cmd/bootstd.rst @@ -0,0 +1,79 @@ +.. SPDX-License-Identifier: GPL-2.0+: + +.. index:: + single: bootstd (command) + +bootstd command +=============== + +Synopsis +-------- + +:: + + bootstd images + +Description +----------- + +The `bootstd` command is used to manage standard boot. At present the only +functionality available is to look at the images which have been loaded, or +could be loaded should a particular bootflow be selected. + +See :doc:`/develop/bootstd/index` for more information. + +bootflow images +~~~~~~~~~~~~~~~ + +Lists the available images and their location in memory. + +Example +------- + +This shows listing images attached to various bootflows, then checking the +content of a few of them:: + + => bootflow scan + => bootflow list + Showing all bootflows + Seq Method State Uclass Part Name Filename + --- ----------- ------ -------- ---- ------------------------ ---------------- + 0 extlinux ready mmc 1 mmc1.bootdev.part_1 /extlinux/extlinux.conf + 1 script ready mmc 1 mmc4.bootdev.part_1 /boot/boot.scr + 2 cros ready mmc 2 mmc5.bootdev.part_2 + 3 cros ready mmc 4 mmc5.bootdev.part_4 + --- ----------- ------ -------- ---- ------------------------ ---------------- + (4 bootflows, 4 valid) + => + => bootstd images + Seq Bootflow Type At Size Filename + --- ------------------- -------------- -------- -------- ---------------- + 0 mmc1.bootdev.part_1 extlinux_cfg 8ed5a70 253 /extlinux/extlinux.conf + 1 mmc4.bootdev.part_1 script 8ed9550 c73 /boot/boot.scr + 1 mmc4.bootdev.part_1 logo 8eda2a0 5d42 boot.bmp + 2 mmc5.bootdev.part_2 x86_setup 8ee84d0 3000 setup + 2 mmc5.bootdev.part_2 cmdline 8ee84d0 1000 cmdline + 2 mmc5.bootdev.part_2 kernel - 4000 kernel + 3 mmc5.bootdev.part_4 x86_setup 8eeb4e0 3000 setup + 3 mmc5.bootdev.part_4 cmdline 8eeb4e0 1000 cmdline + 3 mmc5.bootdev.part_4 kernel - 4000 kernel + --- ------------------- -------------- -------- -------- ---------------- + (9 images) + => md 8eda2a0 10 + 08eda2a0: 5d424d42 00000000 008a0000 007c0000 BMB]..........|. + 08eda2b0: 00ac0000 002e0000 00010000 00000018 ................ + 08eda2c0: 5cb80000 0b130000 0b130000 00000000 ...\............ + 08eda2d0: 00000000 00000000 ff0000ff 00ff0000 ................ + => md 8ee84d0 10 + 08ee84d0: 544f4f42 414d495f 2f3d4547 696c6d76 BOOT_IMAGE=/vmli + 08ee84e0: 2d7a756e 35312e35 312d302e 672d3132 nuz-5.15.0-121-g + 08ee84f0: 72656e65 72206369 3d746f6f 7665642f eneric root=/dev + 08ee8500: 6d766e2f 316e3065 72203170 7571206f /nvme0n1p1 ro qu + +Return value +------------ + +The return value $? is always 0 (true). + + +.. BootflowStates_: diff --git a/doc/usage/cmd/optee.rst b/doc/usage/cmd/optee.rst new file mode 100644 index 00000000000..46c569a105f --- /dev/null +++ b/doc/usage/cmd/optee.rst @@ -0,0 +1,70 @@ +.. SPDX-License-Identifier: GPL-2.0 + +.. index:: + single: optee (command) + +optee command +============= + +Synopsis +-------- + +:: + + optee hello + optee hello <value> + +Description +----------- + +This is an OP-TEE sanity test which invokes the "Hello World" +Trusted Application (TA). The TA does two things: +- It prints debug and information messages to the secure console (if logging is enabled) +- It increments the integer value passed as a parameter and returns it + + +value + Integer value that the TA is expected to increment and return. + The default value is 0. + +To enable the OP-TEE Hello World example please refer +https://optee.readthedocs.io/en/latest/building/gits/optee_examples/optee_examples.html + +Examples +-------- + +:: + + ==> optee hello + D/TA: TA_CreateEntryPoint:39 has been called + I/TA: Hello World! + Value before: 0x0 + Calling TA + D/TA: inc_value:105 has been called + I/TA: Got value: 0 from NW + I/TA: Increase value to: 1 + Value after: 0x1 + I/TA: Goodbye! + D/TA: TA_DestroyEntryPoint:50 has been called + + ==> optee hello 74 + D/TA: TA_CreateEntryPoint:39 has been called + I/TA: Hello World! + Value before: 0x74 + Calling TA + D/TA: inc_value:105 has been called + I/TA: Got value: 116 from NW + I/TA: Increase value to: 117 + Value after: 0x75 + I/TA: Goodbye! + D/TA: TA_DestroyEntryPoint:50 has been called + +Configuration +------------- + +The optee command is enabled by CONFIG_OPTEE=y and CONFIG_CMD_OPTEE=y. + +Return value +------------ + +The return value $? is 0 (true) if the command succeeds, 1 (false) otherwise. diff --git a/doc/usage/cmd/sb.rst b/doc/usage/cmd/sb.rst index 37431aff7c8..6fe14629b8f 100644 --- a/doc/usage/cmd/sb.rst +++ b/doc/usage/cmd/sb.rst @@ -1,10 +1,10 @@ .. SPDX-License-Identifier: GPL-2.0+ .. index:: - single: sbi (command) + single: sb (command) -sbi command -=========== +sb command +========== Synopsis -------- diff --git a/doc/usage/index.rst b/doc/usage/index.rst index cb7a23f1170..bf2335dc8f0 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -40,6 +40,7 @@ Shell commands cmd/bootm cmd/bootmenu cmd/bootmeth + cmd/bootstd cmd/bootz cmd/button cmd/cat @@ -92,6 +93,7 @@ Shell commands cmd/msr cmd/mtest cmd/mtrr + cmd/optee cmd/panic cmd/part cmd/pause diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index 4fbb63a148a..29ceab849c0 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig @@ -1,6 +1,7 @@ config AHCI bool "Support SATA controllers with driver model" depends on DM + select BLK help This enables a uclass for disk controllers in U-Boot. Various driver types can use this, such as AHCI/SATA. It does not provide any standard @@ -9,6 +10,7 @@ config AHCI config SATA bool "Support SATA controllers" + select BLK help This enables support for SATA (Serial Advanced Technology Attachment), a serial bus standard for connecting to hard drives and diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig index 5283d8981e0..cc75bad02b8 100644 --- a/drivers/block/Kconfig +++ b/drivers/block/Kconfig @@ -1,8 +1,5 @@ config BLK - bool # "Support block devices" - depends on DM - def_bool y if MMC || USB || SCSI || NVME || IDE || AHCI || SATA - def_bool y if EFI_MEDIA || VIRTIO_BLK || PVBLOCK + bool help Enable support for block devices, such as SCSI, MMC and USB flash sticks. These provide a block-level interface which permits @@ -100,6 +97,7 @@ config TPL_BLOCK_CACHE config EFI_MEDIA bool "Support EFI media drivers" default y if EFI || SANDBOX + select BLK help Enable this to support media devices on top of UEFI. This enables just the uclass so you also need a specific driver to make this do @@ -139,6 +137,7 @@ endif # EFI_MEDIA config IDE bool "Support IDE controllers" + select BLK help Enables support for IDE (Integrated Drive Electronics) hard drives. This allows access to raw blocks and filesystems on an IDE drive diff --git a/drivers/button/button-qcom-pmic.c b/drivers/button/button-qcom-pmic.c index ad7fed3ddaa..f9f0948ae09 100644 --- a/drivers/button/button-qcom-pmic.c +++ b/drivers/button/button-qcom-pmic.c @@ -15,6 +15,7 @@ #include <power/pmic.h> #include <spmi/spmi.h> #include <linux/bitops.h> +#include <time.h> #define REG_TYPE 0x4 #define REG_SUBTYPE 0x5 @@ -31,6 +32,7 @@ struct qcom_pmic_btn_priv { u32 status_bit; int code; struct udevice *pmic; + ulong last_release_time; }; #define PON_INT_RT_STS 0x10 @@ -42,13 +44,21 @@ struct qcom_pmic_btn_priv { static enum button_state_t qcom_pwrkey_get_state(struct udevice *dev) { struct qcom_pmic_btn_priv *priv = dev_get_priv(dev); + bool pressed; + int reg; - int reg = pmic_reg_read(priv->pmic, priv->base + PON_INT_RT_STS); + if (get_timer_us(0) - priv->last_release_time < 25000) + return BUTTON_OFF; + reg = pmic_reg_read(priv->pmic, priv->base + PON_INT_RT_STS); if (reg < 0) return 0; - return (reg & BIT(priv->status_bit)) != 0; + pressed = !!(reg & BIT(priv->status_bit)); + if (!pressed) + priv->last_release_time = get_timer_us(0); + + return pressed; } static int qcom_pwrkey_get_code(struct udevice *dev) diff --git a/drivers/clk/mediatek/clk-mt7629.c b/drivers/clk/mediatek/clk-mt7629.c index 380ab9b9b0b..94fc5e51456 100644 --- a/drivers/clk/mediatek/clk-mt7629.c +++ b/drivers/clk/mediatek/clk-mt7629.c @@ -574,6 +574,18 @@ static const struct mtk_clk_tree mt7629_clk_tree = { .muxes = top_muxes, }; +static const struct mtk_clk_tree mt7629_peri_clk_tree = { + .xtal_rate = 40 * MHZ, + .xtal2_rate = 20 * MHZ, + .gates_offs = CLK_PERI_PWM1_PD, + .fdivs_offs = CLK_TOP_TO_USB3_SYS, + .muxes_offs = CLK_TOP_AXI_SEL, + .plls = apmixed_plls, + .fclks = top_fixed_clks, + .fdivs = top_fixed_divs, + .muxes = top_muxes, +}; + static int mt7629_mcucfg_probe(struct udevice *dev) { void __iomem *base; @@ -619,7 +631,7 @@ static int mt7629_infracfg_probe(struct udevice *dev) static int mt7629_pericfg_probe(struct udevice *dev) { - return mtk_common_clk_gate_init(dev, &mt7629_clk_tree, peri_cgs); + return mtk_common_clk_gate_init(dev, &mt7629_peri_clk_tree, peri_cgs); } static int mt7629_ethsys_probe(struct udevice *dev) diff --git a/drivers/clk/mediatek/clk-mt7981.c b/drivers/clk/mediatek/clk-mt7981.c index 97073918006..60814652322 100644 --- a/drivers/clk/mediatek/clk-mt7981.c +++ b/drivers/clk/mediatek/clk-mt7981.c @@ -359,6 +359,7 @@ static const struct mtk_parent infra_pcie_parents[] = { .id = _id, .mux_reg = (_reg) + 0x8, \ .mux_set_reg = (_reg) + 0x0, .mux_clr_reg = (_reg) + 0x4, \ .mux_shift = _shift, .mux_mask = BIT(_width) - 1, \ + .gate_shift = -1, .upd_shift = -1, \ .parent_flags = _parents, .num_parents = ARRAY_SIZE(_parents), \ .flags = CLK_MUX_SETCLR_UPD | CLK_PARENT_MIXED, \ } diff --git a/drivers/clk/mediatek/clk-mt7986.c b/drivers/clk/mediatek/clk-mt7986.c index c5cc77243d0..f9d6f9c1749 100644 --- a/drivers/clk/mediatek/clk-mt7986.c +++ b/drivers/clk/mediatek/clk-mt7986.c @@ -366,6 +366,7 @@ static const struct mtk_parent infra_pcie_parents[] = { .id = _id, .mux_reg = (_reg) + 0x8, \ .mux_set_reg = (_reg) + 0x0, .mux_clr_reg = (_reg) + 0x4, \ .mux_shift = _shift, .mux_mask = BIT(_width) - 1, \ + .gate_shift = -1, .upd_shift = -1, \ .parent_flags = _parents, .num_parents = ARRAY_SIZE(_parents), \ .flags = CLK_MUX_SETCLR_UPD | CLK_PARENT_MIXED, \ } diff --git a/drivers/clk/mediatek/clk-mt7988.c b/drivers/clk/mediatek/clk-mt7988.c index 8f4e8f4e8c9..73fd9c6bea6 100644 --- a/drivers/clk/mediatek/clk-mt7988.c +++ b/drivers/clk/mediatek/clk-mt7988.c @@ -485,6 +485,7 @@ static const int infra_pcie_gfmux_tl_ck_o_p3_parents[] = { .id = _id, .mux_reg = _reg + 0x8, .mux_set_reg = _reg + 0x0, \ .mux_clr_reg = _reg + 0x4, .mux_shift = _shift, \ .mux_mask = BIT(_width) - 1, .parent = _parents, \ + .gate_shift = -1, .upd_shift = -1, \ .num_parents = ARRAY_SIZE(_parents), \ .flags = CLK_MUX_SETCLR_UPD | CLK_PARENT_TOPCKGEN, \ } diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig index d76fca5dba4..cb867acc48c 100644 --- a/drivers/clk/qcom/Kconfig +++ b/drivers/clk/qcom/Kconfig @@ -47,6 +47,14 @@ config CLK_QCOM_QCS404 on the Snapdragon QCS404 SoC. This driver supports the clocks and resets exposed by the GCC hardware block. +config CLK_QCOM_SA8775P + bool "Qualcomm SA8775 GCC" + select CLK_QCOM + help + Say Y here to enable support for the Global Clock Controller + on the Snapdragon SA8775 SoC. This driver supports the clocks + and resets exposed by the GCC hardware block. + config CLK_QCOM_SDM845 bool "Qualcomm SDM845 GCC" select CLK_QCOM @@ -103,6 +111,14 @@ config CLK_QCOM_SC7280 on the Snapdragon SC7280 SoC. This driver supports the clocks and resets exposed by the GCC hardware block. +config CLK_QCOM_X1E80100 + bool "Qualcomm X1E80100 GCC" + select CLK_QCOM + help + Say Y here to enable support for the Global Clock Controller + on the Snapdragon X1E80100 SoC. This driver supports the clocks + and resets exposed by the GCC hardware block. + endmenu endif diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile index ab33f1c5faf..1bc0f15005b 100644 --- a/drivers/clk/qcom/Makefile +++ b/drivers/clk/qcom/Makefile @@ -9,9 +9,11 @@ obj-$(CONFIG_CLK_QCOM_APQ8096) += clock-apq8096.o obj-$(CONFIG_CLK_QCOM_IPQ4019) += clock-ipq4019.o obj-$(CONFIG_CLK_QCOM_QCM2290) += clock-qcm2290.o obj-$(CONFIG_CLK_QCOM_QCS404) += clock-qcs404.o +obj-$(CONFIG_CLK_QCOM_SA8775P) += clock-sa8775p.o obj-$(CONFIG_CLK_QCOM_SC7280) += clock-sc7280.o obj-$(CONFIG_CLK_QCOM_SM6115) += clock-sm6115.o obj-$(CONFIG_CLK_QCOM_SM8150) += clock-sm8150.o obj-$(CONFIG_CLK_QCOM_SM8250) += clock-sm8250.o obj-$(CONFIG_CLK_QCOM_SM8550) += clock-sm8550.o obj-$(CONFIG_CLK_QCOM_SM8650) += clock-sm8650.o +obj-$(CONFIG_CLK_QCOM_X1E80100) += clock-x1e80100.o diff --git a/drivers/clk/qcom/clock-qcom.c b/drivers/clk/qcom/clock-qcom.c index 25ca67e537d..7687bbe6a23 100644 --- a/drivers/clk/qcom/clock-qcom.c +++ b/drivers/clk/qcom/clock-qcom.c @@ -166,6 +166,25 @@ void clk_rcg_set_rate(phys_addr_t base, uint32_t cmd_rcgr, int div, clk_bcr_update(base + cmd_rcgr); } +#define PHY_MUX_MASK GENMASK(1, 0) +#define PHY_MUX_PHY_SRC 0 +#define PHY_MUX_REF_SRC 2 + +void clk_phy_mux_enable(phys_addr_t base, uint32_t cmd_rcgr, bool enabled) +{ + u32 cfg; + + /* setup src select and divider */ + cfg = readl(base + cmd_rcgr); + cfg &= ~(PHY_MUX_MASK); + if (enabled) + cfg |= FIELD_PREP(PHY_MUX_MASK, PHY_MUX_PHY_SRC); + else + cfg |= FIELD_PREP(PHY_MUX_MASK, PHY_MUX_REF_SRC); + + writel(cfg, base + cmd_rcgr); +} + const struct freq_tbl *qcom_find_freq(const struct freq_tbl *f, uint rate) { if (!f) diff --git a/drivers/clk/qcom/clock-qcom.h b/drivers/clk/qcom/clock-qcom.h index 78d9b1d81ec..ff336dea39c 100644 --- a/drivers/clk/qcom/clock-qcom.h +++ b/drivers/clk/qcom/clock-qcom.h @@ -6,6 +6,7 @@ #define _CLOCK_QCOM_H #include <asm/io.h> +#include <linux/bitfield.h> #define CFG_CLK_SRC_CXO (0 << 8) #define CFG_CLK_SRC_GPLL0 (1 << 8) @@ -102,6 +103,7 @@ void clk_rcg_set_rate_mnd(phys_addr_t base, uint32_t cmd_rcgr, int div, int m, int n, int source, u8 mnd_width); void clk_rcg_set_rate(phys_addr_t base, uint32_t cmd_rcgr, int div, int source); +void clk_phy_mux_enable(phys_addr_t base, uint32_t cmd_rcgr, bool enabled); static inline void qcom_gate_clk_en(const struct msm_clk_priv *priv, unsigned long id) { diff --git a/drivers/clk/qcom/clock-sa8775p.c b/drivers/clk/qcom/clock-sa8775p.c new file mode 100644 index 00000000000..e31f24ed4f0 --- /dev/null +++ b/drivers/clk/qcom/clock-sa8775p.c @@ -0,0 +1,142 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Clock drivers for Qualcomm sa8775p + * + * (C) Copyright 2024 Linaro Ltd. + */ + +#include <linux/types.h> +#include <clk-uclass.h> +#include <dm.h> +#include <linux/delay.h> +#include <asm/io.h> +#include <linux/bug.h> +#include <linux/bitops.h> +#include <dt-bindings/clock/qcom,sa8775p-gcc.h> +#include "clock-qcom.h" + +#define USB30_PRIM_MOCK_UTMI_CLK_CMD_RCGR 0xf038 +#define USB30_PRIM_MASTER_CLK_CMD_RCGR 0xf020 + +static ulong sa8775p_set_rate(struct clk *clk, ulong rate) +{ + struct msm_clk_priv *priv = dev_get_priv(clk->dev); + + if (clk->id < priv->data->num_clks) + debug("%s: %s, requested rate=%ld\n", __func__, + priv->data->clks[clk->id].name, rate); + + switch (clk->id) { + case GCC_USB30_PRIM_MOCK_UTMI_CLK: + WARN(rate != 19200000, "Unexpected rate for USB30_PRIM_MOCK_UTMI_CLK: %lu\n", rate); + clk_rcg_set_rate(priv->base, USB30_PRIM_MOCK_UTMI_CLK_CMD_RCGR, 0, CFG_CLK_SRC_CXO); + return rate; + case GCC_USB30_PRIM_MASTER_CLK: + WARN(rate != 200000000, "Unexpected rate for USB30_PRIM_MASTER_CLK: %lu\n", rate); + clk_rcg_set_rate_mnd(priv->base, USB30_PRIM_MASTER_CLK_CMD_RCGR, + 1, 0, 0, CFG_CLK_SRC_GPLL0_ODD, 8); + clk_rcg_set_rate(priv->base, 0xf064, 0, 0); + return rate; + default: + return 0; + } +} + +static const struct gate_clk sa8775p_clks[] = { + GATE_CLK(GCC_CFG_NOC_USB3_PRIM_AXI_CLK, 0x1b088, 1), + GATE_CLK(GCC_USB30_PRIM_MASTER_CLK, 0x1b018, 1), + GATE_CLK(GCC_AGGRE_USB3_PRIM_AXI_CLK, 0x1b084, 1), + GATE_CLK(GCC_USB30_PRIM_SLEEP_CLK, 0x1b020, 1), + GATE_CLK(GCC_USB30_PRIM_MOCK_UTMI_CLK, 0x1b024, 1), + GATE_CLK(GCC_USB3_PRIM_PHY_AUX_CLK, 0x1b05c, 1), + GATE_CLK(GCC_USB3_PRIM_PHY_COM_AUX_CLK, 0x1b060, 1), +}; + +static int sa8775p_enable(struct clk *clk) +{ + struct msm_clk_priv *priv = dev_get_priv(clk->dev); + + if (priv->data->num_clks < clk->id) { + debug("%s: unknown clk id %lu\n", __func__, clk->id); + return 0; + } + + debug("%s: clk %ld: %s\n", __func__, clk->id, sa8775p_clks[clk->id].name); + + switch (clk->id) { + case GCC_AGGRE_USB3_PRIM_AXI_CLK: + qcom_gate_clk_en(priv, GCC_USB30_PRIM_MASTER_CLK); + fallthrough; + case GCC_USB30_PRIM_MASTER_CLK: + qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_AUX_CLK); + qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_COM_AUX_CLK); + break; + } + + qcom_gate_clk_en(priv, clk->id); + + return 0; +} + +static const struct qcom_reset_map sa8775p_gcc_resets[] = { + [GCC_CAMERA_BCR] = { 0x32000 }, + [GCC_DISPLAY1_BCR] = { 0xC7000 }, + [GCC_DISPLAY_BCR] = { 0x33000 }, + [GCC_EMAC0_BCR] = { 0xB6000 }, + [GCC_EMAC1_BCR] = { 0xB4000 }, + [GCC_GPU_BCR] = { 0x7D000 }, + [GCC_MMSS_BCR] = { 0x17000 }, + [GCC_PCIE_0_BCR] = { 0xa9000 }, + [GCC_PCIE_0_LINK_DOWN_BCR] = { 0xBF000 }, + [GCC_PCIE_0_NOCSR_COM_PHY_BCR] = { 0xBF008 }, + [GCC_PCIE_0_PHY_BCR] = { 0xAD144 }, + [GCC_PCIE_0_PHY_NOCSR_COM_PHY_BCR] = { 0xBF00C }, + [GCC_PCIE_1_BCR] = { 0x77000 }, + [GCC_PCIE_1_LINK_DOWN_BCR] = { 0xAE084 }, + [GCC_PCIE_1_NOCSR_COM_PHY_BCR] = { 0xAE090 }, + [GCC_PCIE_1_PHY_BCR] = { 0xAE08C }, + [GCC_PCIE_1_PHY_NOCSR_COM_PHY_BCR] = { 0xAE094 }, + [GCC_PDM_BCR] = { 0x3F000 }, + [GCC_QUPV3_WRAPPER_0_BCR] = { 0x23000 }, + [GCC_QUPV3_WRAPPER_1_BCR] = { 0x24000 }, + [GCC_QUPV3_WRAPPER_2_BCR] = { 0x2A000 }, + [GCC_QUPV3_WRAPPER_3_BCR] = { 0xC4000 }, + [GCC_SDCC1_BCR] = { 0x20000 }, + [GCC_TSCSS_BCR] = { 0x21000 }, + [GCC_UFS_CARD_BCR] = { 0x81000 }, + [GCC_UFS_PHY_BCR] = { 0x83000 }, +}; + +static const struct qcom_power_map sa8775p_gdscs[] = { + [UFS_PHY_GDSC] = { 0x83004 }, + [USB30_PRIM_GDSC] = { 0x1B004 }, +}; + +static struct msm_clk_data sa8775_gcc_data = { + .resets = sa8775p_gcc_resets, + .num_resets = ARRAY_SIZE(sa8775p_gcc_resets), + .clks = sa8775p_clks, + .num_clks = ARRAY_SIZE(sa8775p_clks), + + .power_domains = sa8775p_gdscs, + .num_power_domains = ARRAY_SIZE(sa8775p_gdscs), + + .enable = sa8775p_enable, + .set_rate = sa8775p_set_rate, +}; + +static const struct udevice_id gcc_sa8775p_of_match[] = { + { + .compatible = "qcom,sa8775p-gcc", + .data = (ulong)&sa8775_gcc_data, + }, + { } +}; + +U_BOOT_DRIVER(gcc_sa8775p) = { + .name = "gcc_sa8775p", + .id = UCLASS_NOP, + .of_match = gcc_sa8775p_of_match, + .bind = qcom_cc_bind, + .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF, +}; diff --git a/drivers/clk/qcom/clock-sm8550.c b/drivers/clk/qcom/clock-sm8550.c index c0249925cc7..62b5a409e8e 100644 --- a/drivers/clk/qcom/clock-sm8550.c +++ b/drivers/clk/qcom/clock-sm8550.c @@ -57,6 +57,16 @@ static const struct freq_tbl ftbl_gcc_usb30_prim_master_clk_src[] = { { } }; +static const struct freq_tbl ftbl_gcc_pcie_0_aux_clk_src[] = { + F(19200000, CFG_CLK_SRC_CXO, 1, 0, 0), + { } +}; + +static const struct freq_tbl ftbl_gcc_pcie_0_phy_rchng_clk_src[] = { + F(100000000, CFG_CLK_SRC_GPLL0_EVEN, 3, 0, 0), + { } +}; + static ulong sm8550_set_rate(struct clk *clk, ulong rate) { struct msm_clk_priv *priv = dev_get_priv(clk->dev); @@ -84,6 +94,24 @@ static ulong sm8550_set_rate(struct clk *clk, ulong rate) case GCC_USB3_PRIM_PHY_AUX_CLK_SRC: clk_rcg_set_rate(priv->base, 0x39070, 0, 0); return TCXO_DIV2_RATE; + case GCC_PCIE_0_AUX_CLK: + freq = qcom_find_freq(ftbl_gcc_pcie_0_aux_clk_src, rate); + clk_rcg_set_rate_mnd(priv->base, 0x6b074, + freq->pre_div, freq->m, freq->n, freq->src, 16); + return freq->freq; + case GCC_PCIE_1_AUX_CLK: + freq = qcom_find_freq(ftbl_gcc_pcie_0_aux_clk_src, rate); + clk_rcg_set_rate_mnd(priv->base, 0x8d07c, + freq->pre_div, freq->m, freq->n, freq->src, 16); + return freq->freq; + case GCC_PCIE_0_PHY_RCHNG_CLK: + freq = qcom_find_freq(ftbl_gcc_pcie_0_phy_rchng_clk_src, rate); + clk_rcg_set_rate(priv->base, 0x6b058, freq->pre_div, freq->src); + return freq->freq; + case GCC_PCIE_1_PHY_RCHNG_CLK: + freq = qcom_find_freq(ftbl_gcc_pcie_0_phy_rchng_clk_src, rate); + clk_rcg_set_rate(priv->base, 0x8d060, freq->pre_div, freq->src); + return freq->freq; default: return 0; } @@ -182,6 +210,14 @@ static int sm8550_enable(struct clk *clk) qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_AUX_CLK); qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_COM_AUX_CLK); break; + case GCC_PCIE_0_PIPE_CLK: + // GCC_PCIE_0_PIPE_CLK_SRC + clk_phy_mux_enable(priv->base, 0x6b070, true); + break; + case GCC_PCIE_1_PIPE_CLK: + // GCC_PCIE_1_PIPE_CLK_SRC + clk_phy_mux_enable(priv->base, 0x8d078, true); + break; } qcom_gate_clk_en(priv, clk->id); diff --git a/drivers/clk/qcom/clock-sm8650.c b/drivers/clk/qcom/clock-sm8650.c index 0ce83e9b243..9baaecb571f 100644 --- a/drivers/clk/qcom/clock-sm8650.c +++ b/drivers/clk/qcom/clock-sm8650.c @@ -54,6 +54,16 @@ static const struct freq_tbl ftbl_gcc_usb30_prim_master_clk_src[] = { { } }; +static const struct freq_tbl ftbl_gcc_pcie_0_aux_clk_src[] = { + F(19200000, CFG_CLK_SRC_CXO, 1, 0, 0), + { } +}; + +static const struct freq_tbl ftbl_gcc_pcie_0_phy_rchng_clk_src[] = { + F(100000000, CFG_CLK_SRC_GPLL0_EVEN, 3, 0, 0), + { } +}; + static ulong sm8650_set_rate(struct clk *clk, ulong rate) { struct msm_clk_priv *priv = dev_get_priv(clk->dev); @@ -81,6 +91,24 @@ static ulong sm8650_set_rate(struct clk *clk, ulong rate) case GCC_USB3_PRIM_PHY_AUX_CLK_SRC: clk_rcg_set_rate(priv->base, 0x39070, 0, 0); return TCXO_DIV2_RATE; + case GCC_PCIE_0_AUX_CLK: + freq = qcom_find_freq(ftbl_gcc_pcie_0_aux_clk_src, rate); + clk_rcg_set_rate_mnd(priv->base, 0x6b074, + freq->pre_div, freq->m, freq->n, freq->src, 16); + return freq->freq; + case GCC_PCIE_1_AUX_CLK: + freq = qcom_find_freq(ftbl_gcc_pcie_0_aux_clk_src, rate); + clk_rcg_set_rate_mnd(priv->base, 0x8d07c, + freq->pre_div, freq->m, freq->n, freq->src, 16); + return freq->freq; + case GCC_PCIE_0_PHY_RCHNG_CLK: + freq = qcom_find_freq(ftbl_gcc_pcie_0_phy_rchng_clk_src, rate); + clk_rcg_set_rate(priv->base, 0x6b058, freq->pre_div, freq->src); + return freq->freq; + case GCC_PCIE_1_PHY_RCHNG_CLK: + freq = qcom_find_freq(ftbl_gcc_pcie_0_phy_rchng_clk_src, rate); + clk_rcg_set_rate(priv->base, 0x8d060, freq->pre_div, freq->src); + return freq->freq; default: return 0; } @@ -179,6 +207,14 @@ static int sm8650_enable(struct clk *clk) qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_AUX_CLK); qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_COM_AUX_CLK); break; + case GCC_PCIE_0_PIPE_CLK: + // GCC_PCIE_0_PIPE_CLK_SRC + clk_phy_mux_enable(priv->base, 0x6b070, true); + break; + case GCC_PCIE_1_PIPE_CLK: + // GCC_PCIE_1_PIPE_CLK_SRC + clk_phy_mux_enable(priv->base, 0x8d078, true); + break; } qcom_gate_clk_en(priv, clk->id); diff --git a/drivers/clk/qcom/clock-x1e80100.c b/drivers/clk/qcom/clock-x1e80100.c new file mode 100644 index 00000000000..bd9c6ed1c8a --- /dev/null +++ b/drivers/clk/qcom/clock-x1e80100.c @@ -0,0 +1,402 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Clock drivers for Qualcomm x1e80100 + * + * (C) Copyright 2024 Linaro Ltd. + */ + +#include <clk-uclass.h> +#include <dm.h> +#include <linux/delay.h> +#include <errno.h> +#include <asm/io.h> +#include <linux/bug.h> +#include <linux/bitops.h> +#include <dt-bindings/clock/qcom,x1e80100-gcc.h> +#include <dt-bindings/clock/qcom,x1e80100-tcsr.h> + +#include "clock-qcom.h" + +/* On-board TCXO, TOFIX get from DT */ +#define TCXO_RATE 38400000 + +/* bi_tcxo_div2 divided after RPMh output */ +#define TCXO_DIV2_RATE (TCXO_RATE / 2) + +static const struct freq_tbl ftbl_gcc_qupv3_wrap0_s4_clk_src[] = { + F(7372800, CFG_CLK_SRC_GPLL0_EVEN, 1, 384, 15625), + F(14745600, CFG_CLK_SRC_GPLL0_EVEN, 1, 768, 15625), + F(19200000, CFG_CLK_SRC_CXO, 1, 0, 0), + F(29491200, CFG_CLK_SRC_GPLL0_EVEN, 1, 1536, 15625), + F(32000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 8, 75), + F(48000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 4, 25), + F(64000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 16, 75), + F(75000000, CFG_CLK_SRC_GPLL0_EVEN, 4, 0, 0), + F(80000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 4, 15), + F(96000000, CFG_CLK_SRC_GPLL0_EVEN, 1, 8, 25), + F(100000000, CFG_CLK_SRC_GPLL0, 6, 0, 0), + { } +}; + +static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src[] = { + F(400000, CFG_CLK_SRC_CXO, 12, 1, 4), + F(25000000, CFG_CLK_SRC_GPLL0_EVEN, 12, 0, 0), + F(100000000, CFG_CLK_SRC_GPLL0_EVEN, 3, 0, 0), + /* TOFIX F(202000000, CFG_CLK_SRC_GPLL9, 4, 0, 0), */ + { } +}; + +static const struct freq_tbl ftbl_gcc_usb30_prim_master_clk_src[] = { + F(66666667, CFG_CLK_SRC_GPLL0_EVEN, 4.5, 0, 0), + F(133333333, CFG_CLK_SRC_GPLL0, 4.5, 0, 0), + F(200000000, CFG_CLK_SRC_GPLL0, 3, 0, 0), + F(240000000, CFG_CLK_SRC_GPLL0, 2.5, 0, 0), + { } +}; + +static const struct freq_tbl ftbl_gcc_pcie_0_aux_clk_src[] = { + F(19200000, CFG_CLK_SRC_CXO, 1, 0, 0), + { } +}; + +static const struct freq_tbl ftbl_gcc_pcie_0_phy_rchng_clk_src[] = { + F(100000000, CFG_CLK_SRC_GPLL0_EVEN, 3, 0, 0), + { } +}; + +static ulong x1e80100_set_rate(struct clk *clk, ulong rate) +{ + struct msm_clk_priv *priv = dev_get_priv(clk->dev); + const struct freq_tbl *freq; + + switch (clk->id) { + case GCC_QUPV3_WRAP2_S5_CLK: /* UART21 */ + freq = qcom_find_freq(ftbl_gcc_qupv3_wrap0_s4_clk_src, rate); + clk_rcg_set_rate_mnd(priv->base, 0x1e500, + freq->pre_div, freq->m, freq->n, freq->src, 16); + return freq->freq; + case GCC_SDCC2_APPS_CLK: + freq = qcom_find_freq(ftbl_gcc_sdcc2_apps_clk_src, rate); + clk_rcg_set_rate_mnd(priv->base, 0x14018, + freq->pre_div, freq->m, freq->n, freq->src, 8); + return freq->freq; + case GCC_USB30_PRIM_MASTER_CLK: + freq = qcom_find_freq(ftbl_gcc_usb30_prim_master_clk_src, rate); + clk_rcg_set_rate_mnd(priv->base, 0x3902c, + freq->pre_div, freq->m, freq->n, freq->src, 8); + return freq->freq; + case GCC_USB30_PRIM_MOCK_UTMI_CLK: + clk_rcg_set_rate(priv->base, 0x39044, 0, 0); + return TCXO_DIV2_RATE; + case GCC_PCIE_4_AUX_CLK: + freq = qcom_find_freq(ftbl_gcc_pcie_0_aux_clk_src, rate); + clk_rcg_set_rate_mnd(priv->base, 0x6b080, + freq->pre_div, freq->m, freq->n, freq->src, 16); + return freq->freq; + case GCC_PCIE_4_PHY_RCHNG_CLK: + freq = qcom_find_freq(ftbl_gcc_pcie_0_phy_rchng_clk_src, rate); + clk_rcg_set_rate(priv->base, 0x6b064, freq->pre_div, freq->src); + return freq->freq; + case GCC_PCIE_6A_AUX_CLK: + freq = qcom_find_freq(ftbl_gcc_pcie_0_aux_clk_src, rate); + clk_rcg_set_rate_mnd(priv->base, 0x3108c, + freq->pre_div, freq->m, freq->n, freq->src, 16); + return freq->freq; + case GCC_PCIE_6A_PHY_RCHNG_CLK: + freq = qcom_find_freq(ftbl_gcc_pcie_0_phy_rchng_clk_src, rate); + clk_rcg_set_rate(priv->base, 0x31070, freq->pre_div, freq->src); + return freq->freq; + default: + return 0; + } +} + +static const struct gate_clk x1e80100_clks[] = { + GATE_CLK(GCC_AGGRE_UFS_PHY_AXI_CLK, 0x770e4, BIT(0)), + GATE_CLK(GCC_CFG_NOC_USB3_PRIM_AXI_CLK, 0x3908c, BIT(0)), + GATE_CLK(GCC_CFG_NOC_PCIE_ANOC_SOUTH_AHB_CLK, 0x52000, BIT(20)), + GATE_CLK(GCC_CFG_NOC_PCIE_ANOC_NORTH_AHB_CLK, 0x52028, BIT(22)), + GATE_CLK(GCC_CNOC_PCIE_SOUTH_SF_AXI_CLK, 0x52028, BIT(12)), + GATE_CLK(GCC_CNOC_PCIE_NORTH_SF_AXI_CLK, 0x52008, BIT(6)), + GATE_CLK(GCC_PCIE_4_AUX_CLK, 0x52008, BIT(3)), + GATE_CLK(GCC_PCIE_4_CFG_AHB_CLK, 0x52008, BIT(2)), + GATE_CLK(GCC_PCIE_4_MSTR_AXI_CLK, 0x52008, BIT(1)), + GATE_CLK(GCC_PCIE_4_PHY_RCHNG_CLK, 0x52000, BIT(22)), + GATE_CLK(GCC_PCIE_4_PIPE_CLK, 0x52008, BIT(4)), + GATE_CLK(GCC_PCIE_4_SLV_AXI_CLK, 0x52008, BIT(0)), + GATE_CLK(GCC_PCIE_4_SLV_Q2A_AXI_CLK, 0x52008, BIT(5)), + GATE_CLK(GCC_PCIE_6A_AUX_CLK, 0x52018, BIT(24)), + GATE_CLK(GCC_PCIE_6A_CFG_AHB_CLK, 0x52018, BIT(23)), + GATE_CLK(GCC_PCIE_6A_MSTR_AXI_CLK, 0x52018, BIT(22)), + GATE_CLK(GCC_PCIE_6A_PHY_RCHNG_CLK, 0x52018, BIT(27)), + GATE_CLK(GCC_PCIE_6A_PIPE_CLK, 0x52018, BIT(26)), + GATE_CLK(GCC_PCIE_6A_SLV_AXI_CLK, 0x52018, BIT(21)), + GATE_CLK(GCC_PCIE_6A_SLV_Q2A_AXI_CLK, 0x52018, BIT(20)), + GATE_CLK(GCC_QUPV3_WRAP2_CORE_2X_CLK, 0x52010, BIT(3)), + GATE_CLK(GCC_QUPV3_WRAP2_CORE_CLK, 0x52010, BIT(0)), + GATE_CLK(GCC_QUPV3_WRAP2_S0_CLK, 0x52010, BIT(4)), + GATE_CLK(GCC_QUPV3_WRAP2_S1_CLK, 0x52010, BIT(5)), + GATE_CLK(GCC_QUPV3_WRAP2_S2_CLK, 0x52010, BIT(6)), + GATE_CLK(GCC_QUPV3_WRAP2_S3_CLK, 0x52010, BIT(7)), + GATE_CLK(GCC_QUPV3_WRAP2_S4_CLK, 0x52010, BIT(8)), + GATE_CLK(GCC_QUPV3_WRAP2_S5_CLK, 0x52010, BIT(9)), + GATE_CLK(GCC_QUPV3_WRAP2_S6_CLK, 0x52010, BIT(10)), + GATE_CLK(GCC_QUPV3_WRAP2_S7_CLK, 0x52010, BIT(17)), + GATE_CLK(GCC_QUPV3_WRAP_2_M_AHB_CLK, 0x52010, BIT(2)), + GATE_CLK(GCC_QUPV3_WRAP_2_S_AHB_CLK, 0x52010, BIT(1)), + GATE_CLK(GCC_USB30_PRIM_MASTER_CLK, 0x39018, BIT(0)), + GATE_CLK(GCC_USB30_PRIM_MOCK_UTMI_CLK, 0x39028, BIT(0)), + GATE_CLK(GCC_USB30_PRIM_SLEEP_CLK, 0x39024, BIT(0)), + GATE_CLK(GCC_USB3_PRIM_PHY_AUX_CLK, 0x39060, BIT(0)), + GATE_CLK(GCC_USB3_PRIM_PHY_COM_AUX_CLK, 0x39064, BIT(0)), + GATE_CLK(GCC_USB3_PRIM_PHY_PIPE_CLK, 0x39068, BIT(0)), +}; + +static int x1e80100_enable(struct clk *clk) +{ + struct msm_clk_priv *priv = dev_get_priv(clk->dev); + + switch (clk->id) { + case GCC_AGGRE_USB3_PRIM_AXI_CLK: + qcom_gate_clk_en(priv, GCC_USB30_PRIM_MASTER_CLK); + fallthrough; + case GCC_USB30_PRIM_MASTER_CLK: + qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_AUX_CLK); + qcom_gate_clk_en(priv, GCC_USB3_PRIM_PHY_COM_AUX_CLK); + break; + case GCC_PCIE_4_PIPE_CLK: + // GCC_PCIE_4_PIPE_CLK_SRC + clk_phy_mux_enable(priv->base, 0x6b07c, true); + break; + case GCC_PCIE_6A_PIPE_CLK: + // GCC_PCIE_6A_PIPE_CLK_SRC + clk_phy_mux_enable(priv->base, 0x31088, true); + break; + } + + qcom_gate_clk_en(priv, clk->id); + + return 0; +} + +static const struct qcom_reset_map x1e80100_gcc_resets[] = { + [GCC_AV1E_BCR] = { 0x4a000 }, + [GCC_CAMERA_BCR] = { 0x26000 }, + [GCC_DISPLAY_BCR] = { 0x27000 }, + [GCC_GPU_BCR] = { 0x71000 }, + [GCC_PCIE_0_LINK_DOWN_BCR] = { 0x6c014 }, + [GCC_PCIE_0_NOCSR_COM_PHY_BCR] = { 0x6c020 }, + [GCC_PCIE_0_PHY_BCR] = { 0x6c01c }, + [GCC_PCIE_0_PHY_NOCSR_COM_PHY_BCR] = { 0x6c028 }, + [GCC_PCIE_0_TUNNEL_BCR] = { 0xa0000 }, + [GCC_PCIE_1_LINK_DOWN_BCR] = { 0x8e014 }, + [GCC_PCIE_1_NOCSR_COM_PHY_BCR] = { 0x8e020 }, + [GCC_PCIE_1_PHY_BCR] = { 0x8e01c }, + [GCC_PCIE_1_PHY_NOCSR_COM_PHY_BCR] = { 0x8e024 }, + [GCC_PCIE_1_TUNNEL_BCR] = { 0x2c000 }, + [GCC_PCIE_2_LINK_DOWN_BCR] = { 0xa5014 }, + [GCC_PCIE_2_NOCSR_COM_PHY_BCR] = { 0xa5020 }, + [GCC_PCIE_2_PHY_BCR] = { 0xa501c }, + [GCC_PCIE_2_PHY_NOCSR_COM_PHY_BCR] = { 0xa5028 }, + [GCC_PCIE_2_TUNNEL_BCR] = { 0x13000 }, + [GCC_PCIE_3_BCR] = { 0x58000 }, + [GCC_PCIE_3_LINK_DOWN_BCR] = { 0xab014 }, + [GCC_PCIE_3_NOCSR_COM_PHY_BCR] = { 0xab020 }, + [GCC_PCIE_3_PHY_BCR] = { 0xab01c }, + [GCC_PCIE_3_PHY_NOCSR_COM_PHY_BCR] = { 0xab024 }, + [GCC_PCIE_4_BCR] = { 0x6b000 }, + [GCC_PCIE_4_LINK_DOWN_BCR] = { 0xb3014 }, + [GCC_PCIE_4_NOCSR_COM_PHY_BCR] = { 0xb3020 }, + [GCC_PCIE_4_PHY_BCR] = { 0xb301c }, + [GCC_PCIE_4_PHY_NOCSR_COM_PHY_BCR] = { 0xb3028 }, + [GCC_PCIE_5_BCR] = { 0x2f000 }, + [GCC_PCIE_5_LINK_DOWN_BCR] = { 0xaa014 }, + [GCC_PCIE_5_NOCSR_COM_PHY_BCR] = { 0xaa020 }, + [GCC_PCIE_5_PHY_BCR] = { 0xaa01c }, + [GCC_PCIE_5_PHY_NOCSR_COM_PHY_BCR] = { 0xaa028 }, + [GCC_PCIE_6A_BCR] = { 0x31000 }, + [GCC_PCIE_6A_LINK_DOWN_BCR] = { 0xac014 }, + [GCC_PCIE_6A_NOCSR_COM_PHY_BCR] = { 0xac020 }, + [GCC_PCIE_6A_PHY_BCR] = { 0xac01c }, + [GCC_PCIE_6A_PHY_NOCSR_COM_PHY_BCR] = { 0xac024 }, + [GCC_PCIE_6B_BCR] = { 0x8d000 }, + [GCC_PCIE_6B_LINK_DOWN_BCR] = { 0xb5014 }, + [GCC_PCIE_6B_NOCSR_COM_PHY_BCR] = { 0xb5020 }, + [GCC_PCIE_6B_PHY_BCR] = { 0xb501c }, + [GCC_PCIE_6B_PHY_NOCSR_COM_PHY_BCR] = { 0xb5024 }, + [GCC_PCIE_PHY_BCR] = { 0x6f000 }, + [GCC_PCIE_PHY_CFG_AHB_BCR] = { 0x6f00c }, + [GCC_PCIE_PHY_COM_BCR] = { 0x6f010 }, + [GCC_PCIE_RSCC_BCR] = { 0xa4000 }, + [GCC_PDM_BCR] = { 0x33000 }, + [GCC_QUPV3_WRAPPER_0_BCR] = { 0x42000 }, + [GCC_QUPV3_WRAPPER_1_BCR] = { 0x18000 }, + [GCC_QUPV3_WRAPPER_2_BCR] = { 0x1e000 }, + [GCC_QUSB2PHY_HS0_MP_BCR] = { 0x1200c }, + [GCC_QUSB2PHY_HS1_MP_BCR] = { 0x12010 }, + [GCC_QUSB2PHY_PRIM_BCR] = { 0x12000 }, + [GCC_QUSB2PHY_SEC_BCR] = { 0x12004 }, + [GCC_QUSB2PHY_TERT_BCR] = { 0x12008 }, + [GCC_QUSB2PHY_USB20_HS_BCR] = { 0x12014 }, + [GCC_SDCC2_BCR] = { 0x14000 }, + [GCC_SDCC4_BCR] = { 0x16000 }, + [GCC_UFS_PHY_BCR] = { 0x77000 }, + [GCC_USB20_PRIM_BCR] = { 0x29000 }, + [GCC_USB30_MP_BCR] = { 0x17000 }, + [GCC_USB30_PRIM_BCR] = { 0x39000 }, + [GCC_USB30_SEC_BCR] = { 0xa1000 }, + [GCC_USB30_TERT_BCR] = { 0xa2000 }, + [GCC_USB3_MP_SS0_PHY_BCR] = { 0x19008 }, + [GCC_USB3_MP_SS1_PHY_BCR] = { 0x54008 }, + [GCC_USB3_PHY_PRIM_BCR] = { 0x50000 }, + [GCC_USB3_PHY_SEC_BCR] = { 0x2a000 }, + [GCC_USB3_PHY_TERT_BCR] = { 0xa3000 }, + [GCC_USB3_UNIPHY_MP0_BCR] = { 0x19000 }, + [GCC_USB3_UNIPHY_MP1_BCR] = { 0x54000 }, + [GCC_USB3PHY_PHY_PRIM_BCR] = { 0x50004 }, + [GCC_USB3PHY_PHY_SEC_BCR] = { 0x2a004 }, + [GCC_USB3PHY_PHY_TERT_BCR] = { 0xa3004 }, + [GCC_USB3UNIPHY_PHY_MP0_BCR] = { 0x19004 }, + [GCC_USB3UNIPHY_PHY_MP1_BCR] = { 0x54004 }, + [GCC_USB4_0_BCR] = { 0x9f000 }, + [GCC_USB4_0_DP0_PHY_PRIM_BCR] = { 0x50010 }, + [GCC_USB4_1_DP0_PHY_SEC_BCR] = { 0x2a010 }, + [GCC_USB4_2_DP0_PHY_TERT_BCR] = { 0xa3010 }, + [GCC_USB4_1_BCR] = { 0x2b000 }, + [GCC_USB4_2_BCR] = { 0x11000 }, + [GCC_USB_0_PHY_BCR] = { 0x50020 }, + [GCC_USB_1_PHY_BCR] = { 0x2a020 }, + [GCC_USB_2_PHY_BCR] = { 0xa3020 }, + [GCC_VIDEO_BCR] = { 0x32000 }, +}; + +static const struct qcom_power_map x1e80100_gdscs[] = { + [GCC_PCIE_0_TUNNEL_GDSC] = { 0xa0004 }, + [GCC_PCIE_1_TUNNEL_GDSC] = { 0x2c004 }, + [GCC_PCIE_2_TUNNEL_GDSC] = { 0x13004 }, + [GCC_PCIE_3_GDSC] = { 0x58004 }, + [GCC_PCIE_3_PHY_GDSC] = { 0x3e000 }, + [GCC_PCIE_4_GDSC] = { 0x6b004 }, + [GCC_PCIE_4_PHY_GDSC] = { 0x6c000 }, + [GCC_PCIE_5_GDSC] = { 0x2f004 }, + [GCC_PCIE_5_PHY_GDSC] = { 0x30000 }, + [GCC_PCIE_6_PHY_GDSC] = { 0x8e000 }, + [GCC_PCIE_6A_GDSC] = { 0x31004 }, + [GCC_PCIE_6B_GDSC] = { 0x8d004 }, + [GCC_UFS_MEM_PHY_GDSC] = { 0x9e000 }, + [GCC_UFS_PHY_GDSC] = { 0x77004 }, + [GCC_USB20_PRIM_GDSC] = { 0x29004 }, + [GCC_USB30_MP_GDSC] = { 0x17004 }, + [GCC_USB30_PRIM_GDSC] = { 0x39004 }, + [GCC_USB30_SEC_GDSC] = { 0xa1004 }, + [GCC_USB30_TERT_GDSC] = { 0xa2004 }, + [GCC_USB3_MP_SS0_PHY_GDSC] = { 0x1900c }, + [GCC_USB3_MP_SS1_PHY_GDSC] = { 0x5400c }, + [GCC_USB4_0_GDSC] = { 0x9f004 }, + [GCC_USB4_1_GDSC] = { 0x2b004 }, + [GCC_USB4_2_GDSC] = { 0x11004 }, + [GCC_USB_0_PHY_GDSC] = { 0x50024 }, + [GCC_USB_1_PHY_GDSC] = { 0x2a024 }, + [GCC_USB_2_PHY_GDSC] = { 0xa3024 }, +}; + +static struct msm_clk_data x1e80100_gcc_data = { + .resets = x1e80100_gcc_resets, + .num_resets = ARRAY_SIZE(x1e80100_gcc_resets), + .clks = x1e80100_clks, + .num_clks = ARRAY_SIZE(x1e80100_clks), + .power_domains = x1e80100_gdscs, + .num_power_domains = ARRAY_SIZE(x1e80100_gdscs), + + .enable = x1e80100_enable, + .set_rate = x1e80100_set_rate, +}; + +static const struct udevice_id gcc_x1e80100_of_match[] = { + { + .compatible = "qcom,x1e80100-gcc", + .data = (ulong)&x1e80100_gcc_data, + }, + { } +}; + +U_BOOT_DRIVER(gcc_x1e80100) = { + .name = "gcc_x1e80100", + .id = UCLASS_NOP, + .of_match = gcc_x1e80100_of_match, + .bind = qcom_cc_bind, + .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF, +}; + +/* TCSRCC */ + +static const struct gate_clk x1e80100_tcsr_clks[] = { + GATE_CLK(TCSR_PCIE_2L_4_CLKREF_EN, 0x15100, BIT(0)), + GATE_CLK(TCSR_PCIE_2L_5_CLKREF_EN, 0x15104, BIT(0)), + GATE_CLK(TCSR_PCIE_8L_CLKREF_EN, 0x15108, BIT(0)), + GATE_CLK(TCSR_USB3_MP0_CLKREF_EN, 0x1510c, BIT(0)), + GATE_CLK(TCSR_USB3_MP1_CLKREF_EN, 0x15110, BIT(0)), + GATE_CLK(TCSR_USB2_1_CLKREF_EN, 0x15114, BIT(0)), + GATE_CLK(TCSR_UFS_PHY_CLKREF_EN, 0x15118, BIT(0)), + GATE_CLK(TCSR_USB4_1_CLKREF_EN, 0x15120, BIT(0)), + GATE_CLK(TCSR_USB4_2_CLKREF_EN, 0x15124, BIT(0)), + GATE_CLK(TCSR_USB2_2_CLKREF_EN, 0x15128, BIT(0)), + GATE_CLK(TCSR_PCIE_4L_CLKREF_EN, 0x1512c, BIT(0)), + GATE_CLK(TCSR_EDP_CLKREF_EN, 0x15130, BIT(0)), +}; + +static struct msm_clk_data x1e80100_tcsrcc_data = { + .clks = x1e80100_tcsr_clks, + .num_clks = ARRAY_SIZE(x1e80100_tcsr_clks), +}; + +static int tcsrcc_x1e80100_clk_enable(struct clk *clk) +{ + struct msm_clk_priv *priv = dev_get_priv(clk->dev); + + qcom_gate_clk_en(priv, clk->id); + + return 0; +} + +static ulong tcsrcc_x1e80100_clk_get_rate(struct clk *clk) +{ + return TCXO_RATE; +} + +static int tcsrcc_x1e80100_clk_probe(struct udevice *dev) +{ + struct msm_clk_data *data = (struct msm_clk_data *)dev_get_driver_data(dev); + struct msm_clk_priv *priv = dev_get_priv(dev); + + priv->base = dev_read_addr(dev); + if (priv->base == FDT_ADDR_T_NONE) + return -EINVAL; + + priv->data = data; + + return 0; +} + +static struct clk_ops tcsrcc_x1e80100_clk_ops = { + .enable = tcsrcc_x1e80100_clk_enable, + .get_rate = tcsrcc_x1e80100_clk_get_rate, +}; + +static const struct udevice_id tcsrcc_x1e80100_of_match[] = { + { + .compatible = "qcom,x1e80100-tcsr", + .data = (ulong)&x1e80100_tcsrcc_data, + }, + { } +}; + +U_BOOT_DRIVER(tcsrcc_x1e80100) = { + .name = "tcsrcc_x1e80100", + .id = UCLASS_CLK, + .of_match = tcsrcc_x1e80100_of_match, + .ops = &tcsrcc_x1e80100_clk_ops, + .priv_auto = sizeof(struct msm_clk_priv), + .probe = tcsrcc_x1e80100_clk_probe, + .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF, +}; diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c index 43c44fadbe7..a4ff1c41abb 100644 --- a/drivers/clk/rockchip/clk_rk3288.c +++ b/drivers/clk/rockchip/clk_rk3288.c @@ -903,11 +903,11 @@ static int __maybe_unused rk3288_gmac_set_parent(struct clk *clk, struct clk *pa int ret; /* - * If the requested parent is in the same clock-controller and - * the id is SCLK_MAC_PLL ("mac_pll_src"), switch to the internal - * clock. + * If the requested parent is in the same clock-controller the + * likely parent is the unexported SCLK_MAC_PLL ("mac_pll_src"), + * switch to the internal clock. */ - if ((parent->dev == clk->dev) && (parent->id == SCLK_MAC_PLL)) { + if (parent->dev == clk->dev) { debug("%s: switching GAMC to SCLK_MAC_PLL\n", __func__); rk_clrsetreg(&cru->cru_clksel_con[21], RMII_EXTCLK_MASK, 0); return 0; diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c index c8161827d1c..26e014d5c53 100644 --- a/drivers/core/ofnode.c +++ b/drivers/core/ofnode.c @@ -118,7 +118,7 @@ int oftree_new(oftree *treep) return log_msg_ret("liv", ret); tree = oftree_from_np(root); } else { - const int size = 1024; + const int size = 4096; void *fdt; ret = check_tree_count(); @@ -309,6 +309,29 @@ bool ofnode_name_eq(ofnode node, const char *name) return (strlen(name) == len) && !strncmp(node_name, name, len); } +bool ofnode_name_eq_unit(ofnode node, const char *name) +{ + const char *node_name, *p; + int len; + + assert(ofnode_valid(node)); + + node_name = ofnode_get_name(node); + + /* check the whole name */ + if (!strcmp(node_name, name)) + return true; + + /* if @name has no unit address, try the node name without it */ + len = strlen(name); + p = strchr(node_name, '@'); + if (p && !strchr(name, '@') && len == p - node_name && + !strncmp(node_name, name, len)) + return true; + + return false; +} + int ofnode_read_u8(ofnode node, const char *propname, u8 *outp) { const u8 *cell; @@ -576,14 +599,9 @@ ofnode ofnode_find_subnode(ofnode node, const char *subnode_name) log_debug("%s: %s: ", __func__, subnode_name); if (ofnode_is_np(node)) { - struct device_node *np = ofnode_to_np(node); - - for (np = np->child; np; np = np->sibling) { - if (!strcmp(subnode_name, np->name)) - break; - } - subnode = np_to_ofnode(np); + subnode = ofnode_find_subnode_unit(node, subnode_name); } else { + /* special case to avoid code-size increase */ int ooffset = fdt_subnode_offset(ofnode_to_fdt(node), ofnode_to_offset(node), subnode_name); subnode = noffset_to_ofnode(node, ooffset); @@ -594,6 +612,26 @@ ofnode ofnode_find_subnode(ofnode node, const char *subnode_name) return subnode; } +ofnode ofnode_find_subnode_unit(ofnode node, const char *subnode_name) +{ + ofnode subnode, found = ofnode_null(); + + assert(ofnode_valid(node)); + log_debug("%s: ", subnode_name); + + ofnode_for_each_subnode(subnode, node) { + if (ofnode_name_eq_unit(subnode, subnode_name)) { + found = subnode; + break; + } + } + + log_debug("%s\n", ofnode_valid(found) ? + ofnode_get_name(found) : "<none>"); + + return found; +} + int ofnode_read_u32_array(ofnode node, const char *propname, u32 *out_values, size_t sz) { @@ -1710,9 +1748,10 @@ ofnode ofnode_by_prop_value(ofnode from, const char *propname, int ofnode_write_prop(ofnode node, const char *propname, const void *value, int len, bool copy) { + int ret; + if (of_live_active()) { void *newval; - int ret; if (copy) { newval = malloc(len); @@ -1726,8 +1765,12 @@ int ofnode_write_prop(ofnode node, const char *propname, const void *value, free(newval); return ret; } else { - return fdt_setprop(ofnode_to_fdt(node), ofnode_to_offset(node), - propname, value, len); + ret = fdt_setprop(ofnode_to_fdt(node), ofnode_to_offset(node), + propname, value, len); + if (ret) + return ret == -FDT_ERR_NOSPACE ? -ENOSPC : -EINVAL; + + return 0; } } @@ -2015,7 +2058,7 @@ int ofnode_add_subnode(ofnode node, const char *name, ofnode *subnodep) ret = -EEXIST; } if (offset < 0) - return -EINVAL; + return offset == -FDT_ERR_NOSPACE ? -ENOSPC : -EINVAL; subnode = noffset_to_ofnode(node, offset); } diff --git a/drivers/core/root.c b/drivers/core/root.c index c7fb58285ca..15b8c83fee9 100644 --- a/drivers/core/root.c +++ b/drivers/core/root.c @@ -288,26 +288,40 @@ void *dm_priv_to_rw(void *priv) } #endif -static int dm_probe_devices(struct udevice *dev, bool pre_reloc_only) +/** + * dm_probe_devices() - Check whether to probe a device and all children + * + * Probes the device if DM_FLAG_PROBE_AFTER_BIND is enabled for it. Then scans + * all its children recursively to do the same. + * + * @dev: Device to (maybe) probe + * Return 0 if OK, -ve on error + */ +static int dm_probe_devices(struct udevice *dev) { - ofnode node = dev_ofnode(dev); struct udevice *child; - int ret; - - if (pre_reloc_only && - (!ofnode_valid(node) || !ofnode_pre_reloc(node)) && - !(dev->driver->flags & DM_FLAG_PRE_RELOC)) - goto probe_children; if (dev_get_flags(dev) & DM_FLAG_PROBE_AFTER_BIND) { + int ret; + ret = device_probe(dev); if (ret) return ret; } -probe_children: list_for_each_entry(child, &dev->child_head, sibling_node) - dm_probe_devices(child, pre_reloc_only); + dm_probe_devices(child); + + return 0; +} + +int dm_autoprobe(void) +{ + int ret; + + ret = dm_probe_devices(gd->dm_root); + if (ret) + return log_msg_ret("pro", ret); return 0; } @@ -344,7 +358,7 @@ static int dm_scan(bool pre_reloc_only) if (ret) return ret; - return dm_probe_devices(gd->dm_root, pre_reloc_only); + return 0; } int dm_init_and_scan(bool pre_reloc_only) diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c index dac4023ccfd..3013c4741d0 100644 --- a/drivers/dma/ti/k3-udma.c +++ b/drivers/dma/ti/k3-udma.c @@ -1331,6 +1331,8 @@ static int udma_get_mmrs(struct udevice *dev) continue; if (i == MMR_RCHANRT && ud->rchan_cnt == 0) continue; + if (i == MMR_RFLOW && ud->match_data->type == DMA_TYPE_BCDMA) + continue; ud->mmrs[i] = dev_read_addr_name_ptr(dev, mmr_names[i]); if (!ud->mmrs[i]) diff --git a/drivers/gpio/adp5585_gpio.c b/drivers/gpio/adp5585_gpio.c index ea0cb75459b..114583b3c3b 100644 --- a/drivers/gpio/adp5585_gpio.c +++ b/drivers/gpio/adp5585_gpio.c @@ -224,7 +224,7 @@ static int adp5585_probe(struct udevice *dev) } static const struct udevice_id adp5585_ids[] = { - { .compatible = "adp5585" }, + { .compatible = "adi,adp5585" }, { } }; diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 6009d55f400..da84b35e804 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -568,7 +568,7 @@ config QFW_MMIO config QFW_SMBIOS bool default y - depends on QFW && SMBIOS && !SANDBOX + depends on QFW && SMBIOS && !SANDBOX && !SYSINFO_SMBIOS help Hidden option to read SMBIOS tables from QEMU. diff --git a/drivers/misc/qfw_acpi.c b/drivers/misc/qfw_acpi.c index 7ffed1e8c02..0d0cf764689 100644 --- a/drivers/misc/qfw_acpi.c +++ b/drivers/misc/qfw_acpi.c @@ -7,6 +7,7 @@ #define LOG_CATEGORY UCLASS_QFW #include <acpi/acpi_table.h> +#include <bloblist.h> #include <errno.h> #include <malloc.h> #include <mapmem.h> @@ -160,6 +161,15 @@ ulong write_acpi_tables(ulong addr) struct bios_linker_entry *entry; uint32_t size; struct udevice *dev; + struct acpi_ctx *ctx; + + ctx = malloc(sizeof(*ctx)); + if (!ctx) { + printf("error: out of memory for acpi ctx\n"); + return addr; + } + + acpi_setup_ctx(ctx, addr); ret = qfw_get_dev(&dev); if (ret) { @@ -257,6 +267,29 @@ ulong acpi_get_rsdp_addr(void) return file->addr; } +void acpi_write_rsdp(struct acpi_rsdp *rsdp, struct acpi_rsdt *rsdt, + struct acpi_xsdt *xsdt) +{ + memset(rsdp, 0, sizeof(struct acpi_rsdp)); + + memcpy(rsdp->signature, RSDP_SIG, 8); + memcpy(rsdp->oem_id, OEM_ID, 6); + + if (rsdt) + rsdp->rsdt_address = nomap_to_sysmem(rsdt); + + if (xsdt) + rsdp->xsdt_address = nomap_to_sysmem(xsdt); + + rsdp->length = sizeof(struct acpi_rsdp); + rsdp->revision = ACPI_RSDP_REV_ACPI_2_0; + + /* Calculate checksums */ + rsdp->checksum = table_compute_checksum(rsdp, 20); + rsdp->ext_checksum = table_compute_checksum(rsdp, + sizeof(struct acpi_rsdp)); +} + #ifndef CONFIG_X86 static int evt_write_acpi_tables(void) { @@ -264,9 +297,9 @@ static int evt_write_acpi_tables(void) void *ptr; /* Reserve 64K for ACPI tables, aligned to a 4K boundary */ - ptr = memalign(SZ_4K, SZ_64K); + ptr = bloblist_add(BLOBLISTT_ACPI_TABLES, SZ_64K, 12); if (!ptr) - return -ENOMEM; + return -ENOBUFS; addr = map_to_sysmem(ptr); /* Generate ACPI tables */ diff --git a/drivers/misc/qfw_smbios.c b/drivers/misc/qfw_smbios.c index c3e8c310d00..93c4a80286b 100644 --- a/drivers/misc/qfw_smbios.c +++ b/drivers/misc/qfw_smbios.c @@ -5,6 +5,7 @@ #define LOG_CATEGORY UCLASS_QFW +#include <bloblist.h> #include <efi_loader.h> #include <errno.h> #include <log.h> @@ -15,6 +16,7 @@ #include <tables_csum.h> #include <linux/sizes.h> #include <asm/global_data.h> +#include <linux/err.h> DECLARE_GLOBAL_DATA_PTR; @@ -105,11 +107,10 @@ out: /** * qfw_write_smbios_tables() - copy SMBIOS tables from QEMU * - * @addr: target buffer - * @size: size of target buffer + * @addr: address of target buffer * Return: 0 for success, -ve on error */ -static int qfw_write_smbios_tables(u8 *addr, uint32_t size) +ulong write_smbios_table(ulong addr) { int ret; struct udevice *dev; @@ -143,16 +144,13 @@ static int qfw_write_smbios_tables(u8 *addr, uint32_t size) table = qfw_load_smbios_table(dev, &table_size, "etc/smbios/smbios-tables"); - if (table_size + sizeof(struct smbios3_entry) > size) { - free(table); - return -ENOMEM; - } - memcpy(addr, table, table_size); + memcpy((void *)addr, table, table_size); free(table); - return 0; + return addr + table_size; } +#ifndef CONFIG_X86 /** * qfw_evt_write_smbios_tables() - event handler for copying QEMU SMBIOS tables * @@ -160,9 +158,9 @@ static int qfw_write_smbios_tables(u8 *addr, uint32_t size) */ static int qfw_evt_write_smbios_tables(void) { - phys_addr_t addr; + ulong addr, end; void *ptr; - int ret; + /* * TODO: * This size is currently hard coded in lib/efi_loader/efi_smbios.c. @@ -170,22 +168,21 @@ static int qfw_evt_write_smbios_tables(void) */ uint32_t size = SZ_4K; - /* Reserve 64K for SMBIOS tables, aligned to a 4K boundary */ - ptr = memalign(SZ_4K, size); - if (!ptr) { - log_err("Out of memory\n"); - return -ENOMEM; - } + log_debug("qfw_evt_write_smbios_tables bloblist\n"); + /* Reserve 4K for SMBIOS tables, aligned to a 4K boundary */ + ptr = bloblist_add(BLOBLISTT_SMBIOS_TABLES, size, 12); + if (!ptr) + return log_msg_ret("bloblist", -ENOBUFS); + addr = map_to_sysmem(ptr); /* Generate SMBIOS tables */ - ret = qfw_write_smbios_tables(ptr, size); - if (ret) { - if (CONFIG_IS_ENABLED(GENERATE_SMBIOS_TABLE)) { - log_info("Falling back to U-Boot generated SMBIOS tables\n"); - write_smbios_table(addr); - } + end = write_smbios_table(addr); + if (IS_ERR_VALUE(end)) { + log_warning("SMBIOS: Failed to write (err=%dE)\n", (int)end); } else { + if (end - addr > size) + return -ENOMEM; log_debug("SMBIOS tables copied from QEMU\n"); } @@ -193,5 +190,5 @@ static int qfw_evt_write_smbios_tables(void) return 0; } - EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT, qfw_evt_write_smbios_tables); +#endif /* !X86 */ diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index f4fdf15242c..4827834b4aa 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -3,7 +3,8 @@ menu "MMC Host controller Support" config MMC bool "MMC/SD/SDIO card support" default ARM || PPC || SANDBOX - select DM_MMC if DM + select BLK + select DM_MMC help This selects MultiMediaCard, Secure Digital and Secure Digital I/O support. @@ -39,14 +40,14 @@ config MMC_BROKEN_CD If card detection feature is broken, just poll to detect. config DM_MMC - bool "Enable MMC controllers using Driver Model" + bool depends on DM help - This enables the MultiMediaCard (MMC) uclass which supports MMC and - Secure Digital I/O (SDIO) cards. Both removable (SD, micro-SD, etc.) - and non-removable (e.g. eMMC chip) devices are supported. These - appear as block devices in U-Boot and can support filesystems such - as EXT4 and FAT. + This enables the MultiMediaCard (MMC) driver model uclass which + supports MMC and Secure Digital I/O (SDIO) cards. Both removable (SD, + micro-SD, etc.) and non-removable (e.g. eMMC chip) devices are + supported. These appear as block devices in U-Boot and can support + filesystems such as EXT4 and FAT. config SPL_DM_MMC bool "Enable MMC controllers using Driver Model in SPL" @@ -79,7 +80,7 @@ config MMC_SDHCI_ADMA_HELPERS config MMC_SPI bool "Support for SPI-based MMC controller" - depends on DM_MMC && DM_SPI + depends on DM_SPI help This selects SPI-based MMC controllers. If you have an MMC controller on a SPI bus, say Y here. @@ -97,7 +98,6 @@ config MMC_SPI_CRC_ON config ARM_PL180_MMCI bool "ARM AMBA Multimedia Card Interface and compatible support" - depends on DM_MMC help This selects the ARM(R) AMBA(R) PrimeCell Multimedia Card Interface (PL180, PL181 and compatible) support. @@ -258,7 +258,6 @@ config MMC_DW config MMC_DW_CORTINA bool "Cortina specific extensions for Synopsys DW Memory Card Interface" - depends on DM_MMC depends on MMC_DW help This selects support for Cortina SoC specific extensions to the @@ -285,7 +284,7 @@ config MMC_DW_K3 config MMC_DW_ROCKCHIP bool "Rockchip SD/MMC controller support" - depends on DM_MMC && OF_CONTROL + depends on OF_CONTROL depends on MMC_DW help This enables support for the Rockchip SD/MMM controller, which is @@ -306,7 +305,6 @@ config MMC_DW_SOCFPGA config MMC_DW_SNPS bool "Extensions for DW Memory Card Interface used in Synopsys ARC devboards" depends on MMC_DW - depends on DM_MMC depends on OF_CONTROL depends on CLK help @@ -317,13 +315,12 @@ config NEXELL_DWMMC bool "Nexell SD/MMC controller support" depends on ARCH_NEXELL depends on MMC_DW - depends on DM_MMC depends on PINCTRL_NEXELL default y config MMC_MESON_GX bool "Meson GX EMMC controller support" - depends on DM_MMC && ARCH_MESON + depends on ARCH_MESON help Support for EMMC host controller on Meson GX ARM SoCs platform (S905) @@ -338,7 +335,7 @@ config MMC_MXC config MMC_OWL bool "Actions OWL Multimedia Card Interface support" - depends on ARCH_OWL && DM_MMC && BLK + depends on ARCH_OWL help This selects the OWL SD/MMC host controller found on board based on Actions S700/S900 SoC. @@ -366,7 +363,6 @@ config MMC_PCI config MMC_OCTEONTX bool "Marvell Octeon Multimedia Card Interface support" depends on (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2) - depends on DM_MMC select MMC_SUPPORTS_TUNING if ARCH_OCTEONTX2 help This selects the Octeon Multimedia card Interface. @@ -377,7 +373,7 @@ config MMC_OCTEONTX config MVEBU_MMC bool "Kirkwood MMC controller support" - depends on DM_MMC && ARCH_KIRKWOOD + depends on ARCH_KIRKWOOD help Support for MMC host controller on Kirkwood SoCs. If you are on a Kirkwood architecture, say Y here. @@ -386,8 +382,7 @@ config MVEBU_MMC config MMC_OMAP_HS bool "TI OMAP High Speed Multimedia Card Interface support" - select DM_REGULATOR_PBIAS if DM_MMC && DM_REGULATOR - select DM_REGULATOR_PBIAS if DM_MMC && DM_REGULATOR + select DM_REGULATOR_PBIAS if DM_REGULATOR help This selects the TI OMAP High Speed Multimedia card Interface. If you have an omap2plus board with a Multimedia Card slot, @@ -430,7 +425,6 @@ config SH_MMCIF config MMC_UNIPHIER bool "UniPhier SD/MMC Host Controller support" depends on ARCH_UNIPHIER - depends on DM_MMC depends on OF_CONTROL help This selects support for the Matsushita SD/MMC Host Controller on @@ -439,7 +433,6 @@ config MMC_UNIPHIER config RENESAS_SDHI bool "Renesas R-Car SD/MMC Host Controller support" depends on ARCH_RENESAS - depends on DM_MMC depends on OF_CONTROL select BOUNCE_BUFFER help @@ -449,7 +442,6 @@ config RENESAS_SDHI config MMC_BCM2835 bool "BCM2835 family custom SD/MMC Host Controller support" depends on ARCH_BCM283X - depends on DM_MMC depends on OF_CONTROL default y help @@ -469,7 +461,7 @@ config JZ47XX_MMC config MMC_SANDBOX bool "Sandbox MMC support" depends on SANDBOX - depends on DM_MMC && OF_CONTROL + depends on OF_CONTROL help This select a dummy sandbox MMC driver. At present this does nothing other than allow sandbox to be build with MMC support. This @@ -559,7 +551,6 @@ config FIXED_SDHCI_ALIGNED_BUFFER config MMC_SDHCI_ASPEED bool "Aspeed SDHCI controller" depends on ARCH_ASPEED - depends on DM_MMC depends on MMC_SDHCI select MISC help @@ -571,7 +562,7 @@ config MMC_SDHCI_ASPEED config MMC_SDHCI_ATMEL bool "Atmel SDHCI controller support" depends on ARCH_AT91 - depends on DM_MMC && ARCH_AT91 + depends on ARCH_AT91 depends on MMC_SDHCI help This enables support for the Atmel SDHCI controller, which supports @@ -606,7 +597,6 @@ config MMC_SDHCI_BCMSTB config MMC_SDHCI_CADENCE bool "SDHCI support for the Cadence SD/SDIO/eMMC controller" - depends on DM_MMC depends on MMC_SDHCI depends on OF_CONTROL help @@ -618,7 +608,6 @@ config MMC_SDHCI_CADENCE config MMC_SDHCI_CV1800B bool "SDHCI support for the CV1800B SD/SDIO/eMMC controller" - depends on DM_MMC depends on MMC_SDHCI depends on OF_CONTROL help @@ -633,7 +622,7 @@ config MMC_SDHCI_AM654 bool "SDHCI Controller on TI's Am654 devices" depends on ARCH_K3 depends on MMC_SDHCI - depends on DM_MMC && OF_CONTROL && BLK + depends on OF_CONTROL depends on REGMAP select MMC_SDHCI_IO_ACCESSORS help @@ -653,7 +642,6 @@ config MMC_SDHCI_IPROC config MMC_SDHCI_F_SDH30 bool "SDHCI support for Fujitsu Semiconductor/Socionext F_SDH30" - depends on DM_MMC depends on MMC_SDHCI help This selects the Secure Digital Host Controller Interface (SDHCI) @@ -673,7 +661,6 @@ config MMC_SDHCI_KONA config MMC_SDHCI_MSM bool "Qualcomm SDHCI controller" - depends on DM_MMC depends on MMC_SDHCI help Enables support for SDHCI 2.0 controller present on some Qualcomm @@ -685,7 +672,6 @@ config MMC_SDHCI_MV bool "SDHCI support on Marvell platform" depends on ARCH_MVEBU depends on MMC_SDHCI - depends on DM_MMC help This selects the Secure Digital Host Controller Interface on Marvell platform. @@ -697,7 +683,6 @@ config MMC_SDHCI_MV config MMC_SDHCI_NPCM bool "SDHCI support on Nuvoton NPCM device" depends on MMC_SDHCI - depends on DM_MMC help This selects the Secure Digital Host Controller Interface (SDHCI) on Nuvoton NPCM device. @@ -708,7 +693,7 @@ config MMC_SDHCI_NPCM config MMC_SDHCI_PIC32 bool "Microchip PIC32 on-chip SDHCI support" - depends on DM_MMC && MACH_PIC32 + depends on MACH_PIC32 depends on MMC_SDHCI help Support for Microchip PIC32 SDHCI controller. @@ -716,7 +701,6 @@ config MMC_SDHCI_PIC32 config MMC_SDHCI_ROCKCHIP bool "Arasan SDHCI controller for Rockchip support" depends on ARCH_ROCKCHIP - depends on DM_MMC && BLK depends on MMC_SDHCI help Support for Arasan SDHCI host controller on Rockchip ARM SoCs platform @@ -735,7 +719,6 @@ config MMC_SDHCI_S5P config MMC_SDHCI_SNPS bool "Synopsys DesignWare SDHCI controller" depends on MMC_SDHCI - depends on DM_MMC help Support for DesignWare SDHCI host controller on Alibaba TH1520 SoC. This is a highly configurable and programmable, high performance @@ -753,7 +736,7 @@ config MMC_SDHCI_STI config MMC_SDHCI_XENON bool "SDHCI support for the Xenon SDHCI controller" - depends on MMC_SDHCI && DM_MMC && OF_CONTROL + depends on MMC_SDHCI && OF_CONTROL help Support for Xenon SDHCI host controller on Marvell Armada 3700 7k/8k ARM SoCs platforms @@ -764,7 +747,6 @@ config MMC_SDHCI_XENON config MMC_SDHCI_TANGIER bool "Tangier SDHCI controller support" - depends on DM_MMC && BLK depends on MMC_SDHCI help This selects support for SDHCI controller on Tanginer @@ -800,7 +782,7 @@ config TEGRA124_MMC_DISABLE_EXT_LOOPBACK config MMC_SDHCI_ZYNQ bool "Arasan SDHCI controller support" - depends on DM_MMC && OF_CONTROL && BLK + depends on OF_CONTROL depends on MMC_SDHCI help Support for Arasan SDHCI host controller on Zynq/ZynqMP ARM SoCs platform @@ -842,7 +824,6 @@ config MMC_SUNXI_HAS_MODE_SWITCH config MMC_PITON bool "MMC support for OpenPiton SoC" - depends on DM_MMC && BLK help This selects support for the SD host controller on OpenPiton SoC. Note that this SD controller directly exposes the contents of the @@ -851,7 +832,7 @@ config MMC_PITON config GENERIC_ATMEL_MCI bool "Atmel Multimedia Card Interface support" - depends on DM_MMC && ARCH_AT91 + depends on ARCH_AT91 help This enables support for Atmel High Speed Multimedia Card Interface (HSMCI), which supports the MultiMedia Card (MMC) Specification V4.3, @@ -860,7 +841,7 @@ config GENERIC_ATMEL_MCI config STM32_SDMMC2 bool "STMicroelectronics STM32H7 SD/MMC Host Controller support" - depends on DM_MMC && OF_CONTROL + depends on OF_CONTROL help This selects support for the SD/MMC controller on STM32H7 SoCs. If you have a board based on such a SoC and with a SD/MMC slot, @@ -880,7 +861,6 @@ config FTSDC010_SDIO config MMC_MTK bool "MediaTek SD/MMC Card Interface support" depends on ARCH_MEDIATEK || ARCH_MTMIPS - depends on DM_MMC depends on OF_CONTROL help This selects the MediaTek(R) Secure digital and Multimedia card Interface. @@ -911,7 +891,7 @@ config FSL_ESDHC_SUPPORT_ADMA2 config FSL_ESDHC_33V_IO_RELIABILITY_WORKAROUND bool "enable eSDHC workaround for 3.3v IO reliability issue" - depends on FSL_ESDHC && DM_MMC + depends on FSL_ESDHC help When eSDHC operates at 3.3v, damage can accumulate in an internal level shifter at a higher than expected rate. The faster the interface diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index c71c1e5547c..185e8346213 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -34,7 +34,7 @@ config MTD_CONCAT config MTD_BLOCK bool "Enable block device access to MTD devices" - depends on BLK + select BLK help Enable support for block device access to MTD devices using blk_ops abstraction. diff --git a/drivers/mtd/ubi/Kconfig b/drivers/mtd/ubi/Kconfig index c027d898a64..ba77c034736 100644 --- a/drivers/mtd/ubi/Kconfig +++ b/drivers/mtd/ubi/Kconfig @@ -116,7 +116,7 @@ config MTD_UBI_FM_DEBUG config UBI_BLOCK bool "Enable UBI block device support" - depends on BLK + select BLK help Enable UBI block device support using blk_ops abstraction. diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index e48e28d00a3..1563404ca17 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -1000,6 +1000,20 @@ config FSL_ENETC This driver supports the NXP ENETC Ethernet controller found on some of the NXP SoCs. +config FSL_ENETC_NETC_BLK_CTRL + bool "NXP ENETC NETC blocks control driver" + depends on FSL_ENETC && IMX95 + default y if IMX95 + help + This driver configures Integrated Endpoint Register Block (IERB) and + Privileged Register Block (PRB) of NETC. For i.MX platforms, it also + includes the configuration of NETCMIX block. + The IERB contains registers that are used for pre-boot initialization, + debug, and non-customer configuration. The PRB controls global reset + and global error handling for NETC. The NETCMIX block is mainly used + to set MII protocol and PCS protocol of the links, it also contains + settings for some other functions. + config MDIO_GPIO_BITBANG bool "GPIO bitbanging MDIO driver" depends on DM_MDIO && DM_GPIO diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 6f3d63dc4cd..80d70212971 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -44,6 +44,7 @@ obj-$(CONFIG_FEC_MXC) += fec_mxc.o obj-$(CONFIG_FMAN_ENET) += fm/ obj-$(CONFIG_FMAN_ENET) += fsl_mdio.o obj-$(CONFIG_FSL_ENETC) += fsl_enetc.o fsl_enetc_mdio.o +obj-$(CONFIG_FSL_ENETC_NETC_BLK_CTRL) += fsl_enetc_netc_blk_ctrl.o obj-$(CONFIG_FSL_LS_MDIO) += fsl_ls_mdio.o obj-$(CONFIG_FSL_MC_ENET) += fsl-mc/ obj-$(CONFIG_FSL_MC_ENET) += ldpaa_eth/ diff --git a/drivers/net/designware.c b/drivers/net/designware.c index 07b0f49ef58..94d8f1b4c04 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -784,6 +784,39 @@ int designware_eth_probe(struct udevice *dev) priv->bus = miiphy_get_dev_by_name(dev->name); priv->dev = dev; +#if IS_ENABLED(CONFIG_BITBANGMII) && IS_ENABLED(CONFIG_DM_GPIO) + if (dev_read_bool(dev, "snps,bitbang-mii")) { + int bus_idx; + + debug("\n%s: use bitbang mii..\n", dev->name); + ret = gpio_request_by_name(dev, "snps,mdc-gpio", 0, + &priv->mdc_gpio, GPIOD_IS_OUT + | GPIOD_IS_OUT_ACTIVE); + if (ret) { + debug("no mdc-gpio\n"); + return ret; + } + ret = gpio_request_by_name(dev, "snps,mdio-gpio", 0, + &priv->mdio_gpio, GPIOD_IS_OUT + | GPIOD_IS_OUT_ACTIVE); + if (ret) { + debug("no mdio-gpio\n"); + return ret; + } + priv->bb_delay = dev_read_u32_default(dev, "snps,bitbang-delay", 1); + + for (bus_idx = 0; bus_idx < bb_miiphy_buses_num; bus_idx++) { + if (!bb_miiphy_buses[bus_idx].priv) { + bb_miiphy_buses[bus_idx].priv = priv; + strlcpy(bb_miiphy_buses[bus_idx].name, priv->bus->name, + MDIO_NAME_LEN); + priv->bus->read = bb_miiphy_read; + priv->bus->write = bb_miiphy_write; + break; + } + } + } +#endif ret = dw_phy_init(priv, dev); debug("%s, ret=%d\n", __func__, ret); if (!ret) @@ -894,3 +927,83 @@ static struct pci_device_id supported[] = { }; U_BOOT_PCI_DEVICE(eth_designware, supported); + +#if IS_ENABLED(CONFIG_BITBANGMII) && IS_ENABLED(CONFIG_DM_GPIO) +static int dw_eth_bb_mdio_active(struct bb_miiphy_bus *bus) +{ + struct dw_eth_dev *priv = bus->priv; + struct gpio_desc *desc = &priv->mdio_gpio; + + desc->flags = 0; + dm_gpio_set_dir_flags(&priv->mdio_gpio, GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE); + + return 0; +} + +static int dw_eth_bb_mdio_tristate(struct bb_miiphy_bus *bus) +{ + struct dw_eth_dev *priv = bus->priv; + struct gpio_desc *desc = &priv->mdio_gpio; + + desc->flags = 0; + dm_gpio_set_dir_flags(&priv->mdio_gpio, GPIOD_IS_IN); + + return 0; +} + +static int dw_eth_bb_set_mdio(struct bb_miiphy_bus *bus, int v) +{ + struct dw_eth_dev *priv = bus->priv; + + if (v) + dm_gpio_set_value(&priv->mdio_gpio, 1); + else + dm_gpio_set_value(&priv->mdio_gpio, 0); + + return 0; +} + +static int dw_eth_bb_get_mdio(struct bb_miiphy_bus *bus, int *v) +{ + struct dw_eth_dev *priv = bus->priv; + + *v = dm_gpio_get_value(&priv->mdio_gpio); + + return 0; +} + +static int dw_eth_bb_set_mdc(struct bb_miiphy_bus *bus, int v) +{ + struct dw_eth_dev *priv = bus->priv; + + if (v) + dm_gpio_set_value(&priv->mdc_gpio, 1); + else + dm_gpio_set_value(&priv->mdc_gpio, 0); + + return 0; +} + +static int dw_eth_bb_delay(struct bb_miiphy_bus *bus) +{ + struct dw_eth_dev *priv = bus->priv; + + udelay(priv->bb_delay); + return 0; +} + +struct bb_miiphy_bus bb_miiphy_buses[] = { + { + .name = BB_MII_DEVNAME, + .mdio_active = dw_eth_bb_mdio_active, + .mdio_tristate = dw_eth_bb_mdio_tristate, + .set_mdio = dw_eth_bb_set_mdio, + .get_mdio = dw_eth_bb_get_mdio, + .set_mdc = dw_eth_bb_set_mdc, + .delay = dw_eth_bb_delay, + .priv = NULL, + } +}; + +int bb_miiphy_buses_num = ARRAY_SIZE(bb_miiphy_buses); +#endif diff --git a/drivers/net/designware.h b/drivers/net/designware.h index e47101ccaf6..cccf9d54e02 100644 --- a/drivers/net/designware.h +++ b/drivers/net/designware.h @@ -229,7 +229,11 @@ struct dw_eth_dev { u32 max_speed; u32 tx_currdescnum; u32 rx_currdescnum; - +#if IS_ENABLED(CONFIG_BITBANGMII) && IS_ENABLED(CONFIG_DM_GPIO) + u32 bb_delay; + struct gpio_desc mdc_gpio; + struct gpio_desc mdio_gpio; +#endif struct eth_mac_regs *mac_regs_p; struct eth_dma_regs *dma_regs_p; #if CONFIG_IS_ENABLED(DM_GPIO) diff --git a/drivers/net/fsl_enetc.c b/drivers/net/fsl_enetc.c index a6b0bafc8c6..67ef5f34a8a 100644 --- a/drivers/net/fsl_enetc.c +++ b/drivers/net/fsl_enetc.c @@ -2,6 +2,7 @@ /* * ENETC ethernet controller driver * Copyright 2017-2021 NXP + * Copyright 2023-2025 NXP */ #include <dm.h> @@ -16,52 +17,267 @@ #include <miiphy.h> #include <linux/bug.h> #include <linux/delay.h> +#include <linux/build_bug.h> + +#ifdef CONFIG_ARCH_IMX9 +#include <asm/mach-imx/sys_proto.h> +#include <cpu_func.h> +#endif #include "fsl_enetc.h" #define ENETC_DRIVER_NAME "enetc_eth" +/* + * Calculate number of buffer descriptors per cacheline, and compile-time + * validate that: + * - the RX and TX descriptors are the same size + * - the descriptors fit exactly into cachelines without overlap + * - all descriptors fit exactly into cachelines + */ +#define ENETC_NUM_BD_IN_CL \ + ((ARCH_DMA_MINALIGN / sizeof(struct enetc_tx_bd)) + \ + BUILD_BUG_ON_ZERO(sizeof(struct enetc_tx_bd) != \ + sizeof(union enetc_rx_bd)) + \ + BUILD_BUG_ON_ZERO(ARCH_DMA_MINALIGN % sizeof(struct enetc_tx_bd)) + \ + BUILD_BUG_ON_ZERO(ARCH_DMA_MINALIGN % sizeof(union enetc_rx_bd)) + \ + BUILD_BUG_ON_ZERO(ENETC_BD_CNT % \ + (ARCH_DMA_MINALIGN / sizeof(struct enetc_tx_bd)))) + static int enetc_remove(struct udevice *dev); +static int enetc_is_imx95(struct udevice *dev) +{ + struct pci_child_plat *pplat = dev_get_parent_plat(dev); + + /* Test whether this is i.MX95 ENETCv4. This may be optimized out. */ + return IS_ENABLED(CONFIG_ARCH_IMX9) && + pplat->vendor == PCI_VENDOR_ID_PHILIPS; +} + +static int enetc_is_ls1028a(struct udevice *dev) +{ + struct pci_child_plat *pplat = dev_get_parent_plat(dev); + + /* Test whether this is LS1028A ENETC. This may be optimized out. */ + return IS_ENABLED(CONFIG_ARCH_LS1028A) && + pplat->vendor == PCI_VENDOR_ID_FREESCALE; +} + +static int enetc_dev_id(struct udevice *dev) +{ + if (enetc_is_imx95(dev)) + return PCI_DEV(pci_get_devfn(dev)) >> 3; + if (enetc_is_ls1028a(dev)) + return PCI_FUNC(pci_get_devfn(dev)); + + return 0; +} + +static void enetc_inval_rxbd(struct udevice *dev) +{ + struct enetc_priv *priv = dev_get_priv(dev); + union enetc_rx_bd *desc = &priv->enetc_rxbd[priv->rx_bdr.next_prod_idx]; + unsigned long start = rounddown((unsigned long)desc, ARCH_DMA_MINALIGN); + unsigned long end = roundup((unsigned long)desc + sizeof(*desc), + ARCH_DMA_MINALIGN); + + if (enetc_is_imx95(dev)) + invalidate_dcache_range(start, end); +} + +static void enetc_flush_bd(struct udevice *dev, int pi, bool tx) +{ + struct enetc_priv *priv = dev_get_priv(dev); + union enetc_rx_bd *rxdesc = &priv->enetc_rxbd[pi]; + struct enetc_tx_bd *txdesc = &priv->enetc_txbd[pi]; + unsigned long desc = tx ? (unsigned long)txdesc : (unsigned long)rxdesc; + unsigned long size = tx ? sizeof(*txdesc) : sizeof(*rxdesc); + unsigned long start = rounddown(desc, ARCH_DMA_MINALIGN); + unsigned long end = roundup(desc + size, ARCH_DMA_MINALIGN); + + if (enetc_is_imx95(dev)) + flush_dcache_range(start, end); +} + +static void enetc_inval_buffer(struct udevice *dev, void *buf, size_t size) +{ + unsigned long start = rounddown((unsigned long)buf, ARCH_DMA_MINALIGN); + unsigned long end = roundup((unsigned long)buf + size, + ARCH_DMA_MINALIGN); + + if (enetc_is_imx95(dev)) + invalidate_dcache_range(start, end); +} + +static void enetc_flush_buffer(struct udevice *dev, void *buf, size_t size) +{ + unsigned long start = rounddown((unsigned long)buf, ARCH_DMA_MINALIGN); + unsigned long end = roundup((unsigned long)buf + size, + ARCH_DMA_MINALIGN); + + if (enetc_is_imx95(dev)) + flush_dcache_range(start, end); +} + +/* register accessors */ +static u32 enetc_read_reg(void __iomem *addr) +{ + return readl(addr); +} + +static void enetc_write_reg(void __iomem *addr, u32 val) +{ + writel(val, addr); +} + +static void enetc_write(struct enetc_priv *priv, u32 off, u32 val) +{ + enetc_write_reg(priv->regs_base + off, val); +} + +/* base port register accessors */ +static void enetc_write_pmr(struct udevice *dev, u32 val) +{ + struct enetc_data *data = (struct enetc_data *)dev_get_driver_data(dev); + struct enetc_priv *priv = dev_get_priv(dev); + const u32 off = ENETC_PMR + data->reg_offset_pmr; + + enetc_write_reg(priv->port_regs + off, val); +} + +static void enetc_write_psipmar(struct udevice *dev, int n, u32 val) +{ + struct enetc_data *data = (struct enetc_data *)dev_get_driver_data(dev); + struct enetc_priv *priv = dev_get_priv(dev); + const u32 off = (n ? ENETC_PSIPMAR1 : ENETC_PSIPMAR0) + + data->reg_offset_psipmar; + + enetc_write_reg(priv->port_regs + off, val); +} + +/* port station register accessors */ +static void enetc_write_psicfgr(struct udevice *dev, int port, u32 val) +{ + struct enetc_data *data = (struct enetc_data *)dev_get_driver_data(dev); + struct enetc_priv *priv = dev_get_priv(dev); + const u32 off = ENETC_PSICFGR(port, ENETC_PSICFGR_SHIFT_LS) + + data->reg_offset_psicfgr; + + enetc_write_reg(priv->port_regs + off, val); +} + +/* port register accessors */ +static u32 enetc_read_pcapr_mdio(struct udevice *dev) +{ + struct enetc_data *data = (struct enetc_data *)dev_get_driver_data(dev); + struct enetc_priv *priv = dev_get_priv(dev); + const u32 off = ENETC_PCAPR0 + data->reg_offset_pcapr; + const u32 reg = enetc_read_reg(priv->port_regs + off); + + if (enetc_is_imx95(dev)) + return reg & ENETC_PCS_PROT; + else if (enetc_is_ls1028a(dev)) + return reg & ENETC_PCAPRO_MDIO; + + return 0; +} + +static void enetc_write_port(struct enetc_priv *priv, u32 off, u32 val) +{ + enetc_write_reg(priv->port_regs + off, val); +} + +/* MAC port register accessors */ +static u32 enetc_read_mac_port(struct udevice *dev, u32 off) +{ + struct enetc_data *data = (struct enetc_data *)dev_get_driver_data(dev); + struct enetc_priv *priv = dev_get_priv(dev); + + return enetc_read_reg(priv->port_regs + data->reg_offset_mac + off); +} + +static void enetc_write_mac_port(struct udevice *dev, u32 off, u32 val) +{ + struct enetc_data *data = (struct enetc_data *)dev_get_driver_data(dev); + struct enetc_priv *priv = dev_get_priv(dev); + + enetc_write_reg(priv->port_regs + data->reg_offset_mac + off, val); +} + +/* BDR register accessor, see also ENETC_BDR() */ +static void enetc_bdr_write(struct enetc_priv *priv, int type, int n, + u32 off, u32 val) +{ + enetc_write(priv, ENETC_BDR(type, n, off), val); +} + /* * sets the MAC address in IERB registers, this setting is persistent and * carried over to Linux. */ -static void enetc_set_ierb_primary_mac(struct udevice *dev, int devfn, - const u8 *enetaddr) -{ -#ifdef CONFIG_ARCH_LS1028A -/* - * LS1028A is the only part with IERB at this time and there are plans to change - * its structure, keep this LS1028A specific for now - */ #define IERB_BASE 0x1f0800000ULL #define IERB_PFMAC(pf, vf, n) (IERB_BASE + 0x8000 + (pf) * 0x100 + (vf) * 8 \ + (n) * 4) -static int ierb_fn_to_pf[] = {0, 1, 2, -1, -1, -1, 3}; - +static void enetc_set_ierb_primary_mac(struct udevice *dev, void *blob) +{ + static int ierb_fn_to_pf[] = { 0, 1, 2, -1, -1, -1, 3 }; + struct pci_child_plat *ppdata = dev_get_parent_plat(dev); + struct eth_pdata *pdata = dev_get_plat(dev); + struct enetc_priv *priv = dev_get_priv(dev); + const u8 *enetaddr = pdata->enetaddr; u16 lower = *(const u16 *)(enetaddr + 4); u32 upper = *(const u32 *)enetaddr; + int devfn, offset; + char path[256]; + + if (enetc_is_imx95(dev)) { + /* + * Configure the ENETC primary MAC addresses - Set register + * PMAR0/1 for SI 0 and PSIaPMAR0/1 for SI 1, 2 .. a + * (optionally pre-configured in IERB). + */ + devfn = enetc_dev_id(dev); + if (devfn > 2) + return; + + enetc_write(priv, IMX95_ENETC_SIPMAR0, upper); + enetc_write(priv, IMX95_ENETC_SIPMAR1, lower); + + snprintf(path, 256, "/soc/pcie@%x/ethernet@%x,%x", + PCI_BUS(dm_pci_get_bdf(dev)), PCI_DEV(ppdata->devfn), + PCI_FUNC(ppdata->devfn)); + } else if (enetc_is_ls1028a(dev)) { + /* + * LS1028A is the only part with IERB at this time and + * there are plans to change its structure, keep this + * LS1028A specific for now. + */ + devfn = PCI_FUNC(ppdata->devfn); + + if (ierb_fn_to_pf[devfn] < 0) + return; - if (ierb_fn_to_pf[devfn] < 0) + out_le32(IERB_PFMAC(ierb_fn_to_pf[devfn], 0, 0), upper); + out_le32(IERB_PFMAC(ierb_fn_to_pf[devfn], 0, 1), (u32)lower); + + snprintf(path, 256, "/soc/pcie@1f0000000/ethernet@%x,%x", + PCI_DEV(ppdata->devfn), PCI_FUNC(ppdata->devfn)); + } else { return; + } - out_le32(IERB_PFMAC(ierb_fn_to_pf[devfn], 0, 0), upper); - out_le32(IERB_PFMAC(ierb_fn_to_pf[devfn], 0, 1), (u32)lower); -#endif + offset = fdt_path_offset(blob, path); + if (offset >= 0) + fdt_setprop(blob, offset, "mac-address", pdata->enetaddr, 6); } /* sets up primary MAC addresses in DT/IERB */ void fdt_fixup_enetc_mac(void *blob) { - struct pci_child_plat *ppdata; - struct eth_pdata *pdata; struct udevice *dev; struct uclass *uc; - char path[256]; - int offset; - int devfn; uclass_get(UCLASS_ETH, &uc); uclass_foreach_dev(dev, uc) { @@ -69,18 +285,7 @@ void fdt_fixup_enetc_mac(void *blob) strcmp(dev->driver->name, ENETC_DRIVER_NAME)) continue; - pdata = dev_get_plat(dev); - ppdata = dev_get_parent_plat(dev); - devfn = PCI_FUNC(ppdata->devfn); - - enetc_set_ierb_primary_mac(dev, devfn, pdata->enetaddr); - - snprintf(path, 256, "/soc/pcie@1f0000000/ethernet@%x,%x", - PCI_DEV(ppdata->devfn), PCI_FUNC(ppdata->devfn)); - offset = fdt_path_offset(blob, path); - if (offset < 0) - continue; - fdt_setprop(blob, offset, "mac-address", pdata->enetaddr, 6); + enetc_set_ierb_primary_mac(dev, blob); } } @@ -101,7 +306,7 @@ static int enetc_bind(struct udevice *dev) * PCI function # and enetc#N based on interface count */ if (ofnode_valid(dev_ofnode(dev))) - sprintf(name, "enetc-%u", PCI_FUNC(pci_get_devfn(dev))); + sprintf(name, "enetc-%u", enetc_dev_id(dev)); else sprintf(name, "enetc#%u", eth_num_devices++); device_set_name(dev, name); @@ -181,10 +386,9 @@ static int enetc_init_sgmii(struct udevice *dev) /* set up MAC for RGMII */ static void enetc_init_rgmii(struct udevice *dev, struct phy_device *phydev) { - struct enetc_priv *priv = dev_get_priv(dev); - u32 old_val, val; + u32 old_val, val, dpx = 0; - old_val = val = enetc_read_port(priv, ENETC_PM_IF_MODE); + old_val = val = enetc_read_mac_port(dev, ENETC_PM_IF_MODE); /* disable unreliable RGMII in-band signaling and force the MAC into * the speed negotiated by the PHY. @@ -202,15 +406,20 @@ static void enetc_init_rgmii(struct udevice *dev, struct phy_device *phydev) val |= ENETC_PM_IFM_SSP_10; } + if (enetc_is_imx95(dev)) + dpx = ENETC_PM_IFM_FULL_DPX_IMX; + else if (enetc_is_ls1028a(dev)) + dpx = ENETC_PM_IFM_FULL_DPX_LS; + if (phydev->duplex == DUPLEX_FULL) - val |= ENETC_PM_IFM_FULL_DPX; + val |= dpx; else - val &= ~ENETC_PM_IFM_FULL_DPX; + val &= ~dpx; if (val == old_val) return; - enetc_write_port(priv, ENETC_PM_IF_MODE, val); + enetc_write_mac_port(dev, ENETC_PM_IF_MODE, val); } /* set up MAC configuration for the given interface type */ @@ -230,9 +439,12 @@ static void enetc_setup_mac_iface(struct udevice *dev, case PHY_INTERFACE_MODE_USXGMII: case PHY_INTERFACE_MODE_10GBASER: /* set ifmode to (US)XGMII */ - if_mode = enetc_read_port(priv, ENETC_PM_IF_MODE); - if_mode &= ~ENETC_PM_IF_IFMODE_MASK; - enetc_write_port(priv, ENETC_PM_IF_MODE, if_mode); + if_mode = enetc_read_mac_port(dev, ENETC_PM_IF_MODE); + if (enetc_is_imx95(dev)) + if_mode &= ~ENETC_PM_IF_IFMODE_MASK_IMX; + else if (enetc_is_ls1028a(dev)) + if_mode &= ~ENETC_PM_IF_IFMODE_MASK_LS; + enetc_write_mac_port(dev, ENETC_PM_IF_MODE, if_mode); break; }; } @@ -263,7 +475,7 @@ static void enetc_start_pcs(struct udevice *dev) struct enetc_priv *priv = dev_get_priv(dev); /* register internal MDIO for debug purposes */ - if (enetc_read_port(priv, ENETC_PCAPR0) & ENETC_PCAPRO_MDIO) { + if (enetc_read_pcapr_mdio(dev)) { priv->imdio.read = enetc_mdio_read; priv->imdio.write = enetc_mdio_write; priv->imdio.priv = priv->port_regs + ENETC_PM_IMDIO_BASE; @@ -375,6 +587,21 @@ static int enetc_remove(struct udevice *dev) return 0; } +static int enetc_imx95_write_hwaddr(struct udevice *dev) +{ + struct eth_pdata *plat = dev_get_plat(dev); + struct enetc_priv *priv = dev_get_priv(dev); + u8 *addr = plat->enetaddr; + + u16 lower = *(const u16 *)(addr + 4); + u32 upper = *(const u32 *)addr; + + enetc_write_port(priv, IMX95_ENETC_PMAR0, upper); + enetc_write_port(priv, IMX95_ENETC_PMAR1, lower); + + return 0; +} + /* * LS1028A is the only part with IERB at this time and there are plans to * change its structure, keep this LS1028A specific for now. @@ -413,39 +640,46 @@ static int enetc_ls1028a_write_hwaddr(struct udevice *dev) static int enetc_write_hwaddr(struct udevice *dev) { struct eth_pdata *plat = dev_get_plat(dev); - struct enetc_priv *priv = dev_get_priv(dev); u8 *addr = plat->enetaddr; - if (IS_ENABLED(CONFIG_ARCH_LS1028A)) + if (enetc_is_imx95(dev)) + return enetc_imx95_write_hwaddr(dev); + if (enetc_is_ls1028a(dev)) return enetc_ls1028a_write_hwaddr(dev); u16 lower = *(const u16 *)(addr + 4); u32 upper = *(const u32 *)addr; - enetc_write_port(priv, ENETC_PSIPMAR0, upper); - enetc_write_port(priv, ENETC_PSIPMAR1, lower); + enetc_write_psipmar(dev, 0, upper); + enetc_write_psipmar(dev, 1, lower); return 0; } /* Configure port parameters (# of rings, frame size, enable port) */ -static void enetc_enable_si_port(struct enetc_priv *priv) +static void enetc_enable_si_port(struct udevice *dev) { - u32 val; + struct enetc_priv *priv = dev_get_priv(dev); + u32 val = ENETC_PM_CC_TXP_IMX | ENETC_PM_CC_TX | ENETC_PM_CC_RX; /* set Rx/Tx BDR count */ - val = ENETC_PSICFGR_SET_TXBDR(ENETC_TX_BDR_CNT); - val |= ENETC_PSICFGR_SET_RXBDR(ENETC_RX_BDR_CNT); - enetc_write_port(priv, ENETC_PSICFGR(0), val); + enetc_write_psicfgr(dev, 0, ENETC_PSICFGR_SET_BDR(ENETC_RX_BDR_CNT, + ENETC_TX_BDR_CNT)); /* set Rx max frame size */ - enetc_write_port(priv, ENETC_PM_MAXFRM, ENETC_RX_MAXFRM_SIZE); + enetc_write_mac_port(dev, ENETC_PM_MAXFRM, ENETC_RX_MAXFRM_SIZE); /* enable MAC port */ - enetc_write_port(priv, ENETC_PM_CC, ENETC_PM_CC_RX_TX_EN); + if (enetc_is_ls1028a(dev)) + val |= ENETC_PM_CC_TXP_LS | ENETC_PM_CC_PROMIS; + enetc_write_mac_port(dev, ENETC_PM_CC, val); /* enable port */ - enetc_write_port(priv, ENETC_PMR, ENETC_PMR_SI0_EN); + if (enetc_is_imx95(dev)) + enetc_write_port(priv, ENETC_POR, 0x0); + enetc_write_pmr(dev, ENETC_PMR_SI0_EN); /* set SI cache policy */ - enetc_write(priv, ENETC_SICAR0, - ENETC_SICAR_RD_CFG | ENETC_SICAR_WR_CFG); + enetc_write(priv, ENETC_SICAR0, ENETC_SICAR_WR_CFG | + (enetc_is_imx95(dev) ? + ENETC_SICAR_RD_CFG_IMX : + ENETC_SICAR_RD_CFG_LS)); /* enable SI */ enetc_write(priv, ENETC_SIMR, ENETC_SIMR_EN); } @@ -536,6 +770,8 @@ static void enetc_setup_rx_bdr(struct udevice *dev) priv->enetc_rxbd[i].w.addr = enetc_rxb_address(dev, i); /* each RX buffer must be aligned to 64B */ WARN_ON(priv->enetc_rxbd[i].w.addr & (ARCH_DMA_MINALIGN - 1)); + + enetc_flush_bd(dev, i, false); } /* reset producer (ENETC owned) and consumer (SW owned) index */ @@ -556,6 +792,7 @@ static void enetc_setup_rx_bdr(struct udevice *dev) */ static int enetc_start(struct udevice *dev) { + int ret; struct enetc_priv *priv = dev_get_priv(dev); /* reset and enable the PCI device */ @@ -563,15 +800,19 @@ static int enetc_start(struct udevice *dev) dm_pci_clrset_config16(dev, PCI_COMMAND, 0, PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); - enetc_enable_si_port(priv); + enetc_enable_si_port(dev); /* setup Tx/Rx buffer descriptors */ enetc_setup_tx_bdr(dev); enetc_setup_rx_bdr(dev); + ret = phy_startup(priv->phy); + if (ret) + return ret; + enetc_setup_mac_iface(dev, priv->phy); - return phy_startup(priv->phy); + return 0; } /* @@ -614,6 +855,8 @@ static int enetc_send(struct udevice *dev, void *packet, int length) enetc_dbg(dev, "TxBD[%d]send: pkt_len=%d, buff @0x%x%08x\n", pi, length, upper_32_bits((u64)nv_packet), lower_32_bits((u64)nv_packet)); + enetc_flush_buffer(dev, packet, length); + /* prepare Tx BD */ memset(&priv->enetc_txbd[pi], 0x0, sizeof(struct enetc_tx_bd)); priv->enetc_txbd[pi].addr = @@ -621,7 +864,10 @@ static int enetc_send(struct udevice *dev, void *packet, int length) priv->enetc_txbd[pi].buf_len = cpu_to_le16(length); priv->enetc_txbd[pi].frm_len = cpu_to_le16(length); priv->enetc_txbd[pi].flags = cpu_to_le16(ENETC_TXBD_FLAGS_F); + dmb(); + enetc_flush_bd(dev, pi, true); + /* send frame: increment producer index */ pi = (pi + 1) % txr->bd_count; txr->next_prod_idx = pi; @@ -643,15 +889,15 @@ static int enetc_recv(struct udevice *dev, int flags, uchar **packetp) { struct enetc_priv *priv = dev_get_priv(dev); struct bd_ring *rxr = &priv->rx_bdr; - int tries = ENETC_POLL_TRIES; int pi = rxr->next_prod_idx; - int ci = rxr->next_cons_idx; + int tries = ENETC_POLL_TRIES; u32 status; int len; u8 rdy; do { dmb(); + enetc_inval_rxbd(dev); status = le32_to_cpu(priv->enetc_rxbd[pi].r.lstatus); /* check if current BD is ready to be consumed */ rdy = ENETC_RXBD_STATUS_R(status); @@ -663,45 +909,142 @@ static int enetc_recv(struct udevice *dev, int flags, uchar **packetp) dmb(); len = le16_to_cpu(priv->enetc_rxbd[pi].r.buf_len); *packetp = (uchar *)enetc_rxb_address(dev, pi); + enetc_inval_buffer(dev, *packetp, len); enetc_dbg(dev, "RxBD[%d]: len=%d err=%d pkt=0x%x%08x\n", pi, len, ENETC_RXBD_STATUS_ERRORS(status), upper_32_bits((u64)*packetp), lower_32_bits((u64)*packetp)); - /* BD clean up and advance to next in ring */ - memset(&priv->enetc_rxbd[pi], 0, sizeof(union enetc_rx_bd)); - priv->enetc_rxbd[pi].w.addr = enetc_rxb_address(dev, pi); + return len; +} + +static int enetc_free_pkt(struct udevice *dev, uchar *packet, int length) +{ + const int bd_num_in_cl = enetc_is_imx95(dev) ? ENETC_NUM_BD_IN_CL : 1; + struct enetc_priv *priv = dev_get_priv(dev); + struct bd_ring *rxr = &priv->rx_bdr; + int pi = rxr->next_prod_idx; + int ci = rxr->next_cons_idx; + uchar *packet_expected; + int i; + + packet_expected = (uchar *)enetc_rxb_address(dev, pi); + if (packet != packet_expected) { + printf("%s: Unexpected packet (expected %p)\n", __func__, + packet_expected); + return -EINVAL; + } + rxr->next_prod_idx = (pi + 1) % rxr->bd_count; ci = (ci + 1) % rxr->bd_count; rxr->next_cons_idx = ci; dmb(); - /* free up the slot in the ring for HW */ - enetc_write_reg(rxr->cons_idx, ci); - return len; + if ((pi + 1) % bd_num_in_cl == 0) { + /* BD clean up and advance to next in ring */ + for (i = 0; i < bd_num_in_cl; i++) { + memset(&priv->enetc_rxbd[pi - i], 0, sizeof(union enetc_rx_bd)); + priv->enetc_rxbd[pi - i].w.addr = enetc_rxb_address(dev, pi - i); + } + + /* Will flush all bds in one cacheline */ + enetc_flush_bd(dev, pi - bd_num_in_cl + 1, false); + + /* free up the slot in the ring for HW */ + enetc_write_reg(rxr->cons_idx, ci); + } + + return 0; } -static const struct eth_ops enetc_ops = { +#if IS_ENABLED(CONFIG_ARCH_IMX9) +static int enetc_read_rom_hwaddr(struct udevice *dev) +{ + struct eth_pdata *pdata = dev_get_plat(dev); + unsigned int dev_id = enetc_dev_id(dev); + unsigned char *mac = pdata->enetaddr; + + if (dev_id > 2) + return -EINVAL; + + imx_get_mac_from_fuse(dev_id, mac); + + return !is_valid_ethaddr(mac); +} + +static const struct eth_ops enetc_ops_imx = { + .start = enetc_start, + .send = enetc_send, + .recv = enetc_recv, + .stop = enetc_stop, + .free_pkt = enetc_free_pkt, + .write_hwaddr = enetc_write_hwaddr, + .read_rom_hwaddr = enetc_read_rom_hwaddr, +}; + +U_BOOT_DRIVER(eth_enetc_imx) = { + .name = ENETC_DRIVER_NAME, + .id = UCLASS_ETH, + .bind = enetc_bind, + .probe = enetc_probe, + .remove = enetc_remove, + .ops = &enetc_ops_imx, + .priv_auto = sizeof(struct enetc_priv), + .plat_auto = sizeof(struct eth_pdata), +}; + +static const struct enetc_data enetc_data_imx = { + .reg_offset_pmr = ENETC_PMR_OFFSET_IMX, + .reg_offset_psipmar = ENETC_PSIPMARn_OFFSET_IMX, + .reg_offset_pcapr = ENETC_PCAPR_OFFSET_IMX, + .reg_offset_psicfgr = ENETC_PSICFGR_OFFSET_IMX, + .reg_offset_mac = ENETC_PM_OFFSET_IMX, +}; + +static struct pci_device_id enetc_ids_imx[] = { + { + PCI_DEVICE(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_ENETC4_ETH), + .driver_data = (ulong)&enetc_data_imx, + }, + {} +}; + +U_BOOT_PCI_DEVICE(eth_enetc_imx, enetc_ids_imx); +#endif + +static const struct eth_ops enetc_ops_ls = { .start = enetc_start, .send = enetc_send, .recv = enetc_recv, .stop = enetc_stop, + .free_pkt = enetc_free_pkt, .write_hwaddr = enetc_write_hwaddr, }; -U_BOOT_DRIVER(eth_enetc) = { +U_BOOT_DRIVER(eth_enetc_ls) = { .name = ENETC_DRIVER_NAME, .id = UCLASS_ETH, .bind = enetc_bind, .probe = enetc_probe, .remove = enetc_remove, - .ops = &enetc_ops, + .ops = &enetc_ops_ls, .priv_auto = sizeof(struct enetc_priv), .plat_auto = sizeof(struct eth_pdata), }; -static struct pci_device_id enetc_ids[] = { - { PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, PCI_DEVICE_ID_ENETC_ETH) }, +static const struct enetc_data enetc_data_ls = { + .reg_offset_pmr = ENETC_PMR_OFFSET_LS, + .reg_offset_psipmar = ENETC_PSIPMARn_OFFSET_LS, + .reg_offset_pcapr = ENETC_PCAPR_OFFSET_LS, + .reg_offset_psicfgr = ENETC_PSICFGR_OFFSET_LS, + .reg_offset_mac = ENETC_PM_OFFSET_LS, +}; + +static struct pci_device_id enetc_ids_ls[] = { + { + PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, PCI_DEVICE_ID_ENETC_ETH), + .driver_data = (ulong)&enetc_data_ls, + }, {} }; -U_BOOT_PCI_DEVICE(eth_enetc, enetc_ids); +U_BOOT_PCI_DEVICE(eth_enetc_ls, enetc_ids_ls); diff --git a/drivers/net/fsl_enetc.h b/drivers/net/fsl_enetc.h index f2acf367aa3..804df853bf5 100644 --- a/drivers/net/fsl_enetc.h +++ b/drivers/net/fsl_enetc.h @@ -12,7 +12,9 @@ /* PCI function IDs */ #define PCI_DEVICE_ID_ENETC_ETH 0xE100 +#define PCI_DEVICE_ID_ENETC4_ETH 0xE101 #define PCI_DEVICE_ID_ENETC_MDIO 0xEE01 +#define PCI_DEVICE_ID_ENETC4_EMDIO 0xEE00 /* ENETC Ethernet controller registers */ /* Station interface register offsets */ @@ -22,7 +24,8 @@ /* write cache cfg: snoop, no allocate, data & BD coherent */ #define ENETC_SICAR_WR_CFG 0x6767 /* read cache cfg: coherent copy, look up, don't alloc in cache */ -#define ENETC_SICAR_RD_CFG 0x27270000 +#define ENETC_SICAR_RD_CFG_LS 0x27270000 +#define ENETC_SICAR_RD_CFG_IMX 0x2b2b0000 #define ENETC_SIROCT 0x300 #define ENETC_SIRFRM 0x308 #define ENETC_SITOCT 0x320 @@ -57,32 +60,60 @@ enum enetc_bdr_type {TX, RX}; #define ENETC_PORT_REGS_OFF 0x10000 /* Port registers */ +#define ENETC_PMR_OFFSET_IMX 0x0010 +#define ENETC_PMR_OFFSET_LS 0x0000 #define ENETC_PMR 0x0000 #define ENETC_PMR_SI0_EN BIT(16) #define ENETC_PSIPMMR 0x0018 -#define ENETC_PSIPMAR0 0x0100 -#define ENETC_PSIPMAR1 0x0104 -#define ENETC_PCAPR0 0x0900 -#define ENETC_PCAPRO_MDIO BIT(11) -#define ENETC_PSICFGR(n) (0x0940 + (n) * 0x10) -#define ENETC_PSICFGR_SET_TXBDR(val) ((val) & 0xff) -#define ENETC_PSICFGR_SET_RXBDR(val) (((val) & 0xff) << 16) +#define ENETC_PSIPMARn_OFFSET_IMX 0x0000 +#define ENETC_PSIPMARn_OFFSET_LS 0x0080 +#define ENETC_PSIPMAR0 0x0080 +#define ENETC_PSIPMAR1 0x0084 +#define ENETC_PCAPR_OFFSET_IMX 0x4008 +#define ENETC_PCAPR_OFFSET_LS 0x0900 +#define ENETC_PCAPR0 0x0000 +#define ENETC_PCAPRO_MDIO BIT(11) /* LS only */ +#define ENETC_PCS_PROT GENMASK(15, 0) /* IMX only */ +/* ENETC base registers */ +#define ENETC_PSICFGR_OFFSET_LS 0x0940 +#define ENETC_PSICFGR_SHIFT_LS 0x10 +#define ENETC_PSICFGR_OFFSET_IMX 0x2010 +#define ENETC_PSICFGR_SHIFT_IMX 0x80 +#define ENETC_PSICFGR(n, s) ((n) * (s)) +#define ENETC_PSICFGR_SET_BDR(rx, tx) (((rx) << 16) | (tx)) /* MAC configuration */ -#define ENETC_PM_CC 0x8008 +#define ENETC_PM_OFFSET_IMX 0x5000 +#define ENETC_PM_OFFSET_LS 0x8000 +#define ENETC_PM_CC 0x0008 #define ENETC_PM_CC_DEFAULT 0x0810 -#define ENETC_PM_CC_RX_TX_EN 0x8813 -#define ENETC_PM_MAXFRM 0x8014 +#define ENETC_PM_CC_TXP_IMX BIT(15) +#define ENETC_PM_CC_TXP_LS BIT(11) +#define ENETC_PM_CC_PROMIS BIT(4) +#define ENETC_PM_CC_TX BIT(1) +#define ENETC_PM_CC_RX BIT(0) +#define ENETC_PM_MAXFRM 0x0014 #define ENETC_RX_MAXFRM_SIZE PKTSIZE_ALIGN -#define ENETC_PM_IMDIO_BASE 0x8030 -#define ENETC_PM_IF_MODE 0x8300 +#define ENETC_PM_IMDIO_BASE 0x0030 +#define ENETC_PM_IF_MODE 0x0300 #define ENETC_PM_IF_MODE_RG BIT(2) #define ENETC_PM_IF_MODE_AN_ENA BIT(15) #define ENETC_PM_IFM_SSP_MASK GENMASK(14, 13) #define ENETC_PM_IFM_SSP_1000 (2 << 13) #define ENETC_PM_IFM_SSP_100 (0 << 13) #define ENETC_PM_IFM_SSP_10 (1 << 13) -#define ENETC_PM_IFM_FULL_DPX BIT(12) -#define ENETC_PM_IF_IFMODE_MASK GENMASK(1, 0) +#define ENETC_PM_IFM_FULL_DPX_IMX BIT(6) +#define ENETC_PM_IFM_FULL_DPX_LS BIT(12) +#define ENETC_PM_IF_IFMODE_MASK_IMX GENMASK(2, 0) +#define ENETC_PM_IF_IFMODE_MASK_LS GENMASK(1, 0) + +/* i.MX95 specific registers */ +#define IMX95_ENETC_SIPMAR0 0x80 +#define IMX95_ENETC_SIPMAR1 0x84 + +/* Port registers */ +#define IMX95_ENETC_PMAR0 0x4020 +#define IMX95_ENETC_PMAR1 0x4024 +#define ENETC_POR 0x4100 /* buffer descriptors count must be multiple of 8 and aligned to 128 bytes */ #define ENETC_BD_CNT CONFIG_SYS_RX_ETH_BUFFER @@ -163,25 +194,14 @@ struct enetc_priv { struct phy_device *phy; }; -/* register accessors */ -#define enetc_read_reg(x) readl((x)) -#define enetc_write_reg(x, val) writel((val), (x)) -#define enetc_read(priv, off) enetc_read_reg((priv)->regs_base + (off)) -#define enetc_write(priv, off, v) \ - enetc_write_reg((priv)->regs_base + (off), v) - -/* port register accessors */ -#define enetc_port_regs(priv, off) ((priv)->port_regs + (off)) -#define enetc_read_port(priv, off) \ - enetc_read_reg(enetc_port_regs((priv), (off))) -#define enetc_write_port(priv, off, v) \ - enetc_write_reg(enetc_port_regs((priv), (off)), v) - -/* BDR register accessors, see ENETC_BDR() */ -#define enetc_bdr_read(priv, t, n, off) \ - enetc_read(priv, ENETC_BDR(t, n, off)) -#define enetc_bdr_write(priv, t, n, off, val) \ - enetc_write(priv, ENETC_BDR(t, n, off), val) +struct enetc_data { + /* Register layout offsets */ + u16 reg_offset_pmr; + u16 reg_offset_psipmar; + u16 reg_offset_pcapr; + u16 reg_offset_psicfgr; + u16 reg_offset_mac; +}; /* PCS / internal SoC PHY ID, it defaults to 0 on all interfaces */ #define ENETC_PCS_PHY_ADDR 0 diff --git a/drivers/net/fsl_enetc_mdio.c b/drivers/net/fsl_enetc_mdio.c index 2d5fcbb6dbd..c1d491f2c5a 100644 --- a/drivers/net/fsl_enetc_mdio.c +++ b/drivers/net/fsl_enetc_mdio.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * ENETC ethernet controller driver - * Copyright 2019 NXP + * Copyright 2019-2025 NXP */ #include <dm.h> @@ -14,6 +14,16 @@ #include "fsl_enetc.h" +static u32 enetc_read(struct enetc_mdio_priv *priv, u32 off) +{ + return readl(priv->regs_base + off); +} + +static void enetc_write(struct enetc_mdio_priv *priv, u32 off, u32 val) +{ + writel(val, priv->regs_base + off); +} + static void enetc_mdio_wait_bsy(struct enetc_mdio_priv *priv) { int to = 10000; @@ -122,7 +132,9 @@ static int enetc_mdio_bind(struct udevice *dev) static int enetc_mdio_probe(struct udevice *dev) { + struct pci_child_plat *pplat = dev_get_parent_plat(dev); struct enetc_mdio_priv *priv = dev_get_priv(dev); + u16 cmd = PCI_COMMAND_MEMORY; priv->regs_base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, 0, 0, PCI_REGION_TYPE, 0); if (!priv->regs_base) { @@ -132,7 +144,10 @@ static int enetc_mdio_probe(struct udevice *dev) priv->regs_base += ENETC_MDIO_BASE; - dm_pci_clrset_config16(dev, PCI_COMMAND, 0, PCI_COMMAND_MEMORY); + if (pplat->vendor == PCI_VENDOR_ID_PHILIPS) /* i.MX95 */ + cmd |= PCI_COMMAND_MASTER; + + dm_pci_clrset_config16(dev, PCI_COMMAND, 0, cmd); return 0; } @@ -148,6 +163,7 @@ U_BOOT_DRIVER(enetc_mdio) = { static struct pci_device_id enetc_mdio_ids[] = { { PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, PCI_DEVICE_ID_ENETC_MDIO) }, + { PCI_DEVICE(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_ENETC4_EMDIO) }, { } }; diff --git a/drivers/net/fsl_enetc_netc_blk_ctrl.c b/drivers/net/fsl_enetc_netc_blk_ctrl.c new file mode 100644 index 00000000000..46b68d3d8a4 --- /dev/null +++ b/drivers/net/fsl_enetc_netc_blk_ctrl.c @@ -0,0 +1,346 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * NXP NETC Blocks Control Driver + * + * Copyright 2024 NXP + * + * This driver is used for pre-initialization of NETC, such as PCS and MII + * protocols, LDID, warm reset, etc. Therefore, all NETC device drivers can + * only be probed after the netc-blk-crtl driver has completed initialization. + * In addition, when the system enters suspend mode, IERB, PRB, and NETCMIX + * will be powered off, except for WOL. Therefore, when the system resumes, + * these blocks need to be reinitialized. + */ + +#include <asm/io.h> +#include <clk.h> +#include <dm.h> +#include <dm/device_compat.h> +#include <linux/bitfield.h> +#include <linux/delay.h> +#include <linux/errno.h> +#include <linux/iopoll.h> +#include <phy_interface.h> + +/* NETCMIX registers */ +#define IMX95_CFG_LINK_IO_VAR 0x0 +#define IO_VAR_16FF_16G_SERDES 0x1 +#define IO_VAR(port, var) (((var) & 0xf) << ((port) << 2)) + +#define IMX95_CFG_LINK_MII_PROT 0x4 +#define CFG_LINK_MII_PORT_0 GENMASK(3, 0) +#define CFG_LINK_MII_PORT_1 GENMASK(7, 4) +#define MII_PROT_MII 0x0 +#define MII_PROT_RMII 0x1 +#define MII_PROT_RGMII 0x2 +#define MII_PROT_SERIAL 0x3 +#define MII_PROT(port, prot) (((prot) & 0xf) << ((port) << 2)) + +#define IMX95_CFG_LINK_PCS_PROT(a) (0x8 + (a) * 4) +#define PCS_PROT_1G_SGMII BIT(0) +#define PCS_PROT_2500M_SGMII BIT(1) +#define PCS_PROT_XFI BIT(3) +#define PCS_PROT_SFI BIT(4) +#define PCS_PROT_10G_SXGMII BIT(6) + +/* NETC privileged register block register */ +#define PRB_NETCRR 0x100 +#define NETCRR_SR BIT(0) +#define NETCRR_LOCK BIT(1) + +#define PRB_NETCSR 0x104 +#define NETCSR_ERROR BIT(0) +#define NETCSR_STATE BIT(1) + +/* NETC integrated endpoint register block register */ +#define IERB_EMDIOFAUXR 0x344 +#define IERB_T0FAUXR 0x444 +#define IERB_EFAUXR(a) (0x3044 + 0x100 * (a)) +#define IERB_VFAUXR(a) (0x4004 + 0x40 * (a)) +#define FAUXR_LDID GENMASK(3, 0) + +/* Platform information */ +#define IMX95_ENETC0_BUS_DEVFN 0x0 +#define IMX95_ENETC1_BUS_DEVFN 0x40 +#define IMX95_ENETC2_BUS_DEVFN 0x80 + +/* Flags for different platforms */ +#define NETC_HAS_NETCMIX BIT(0) + +struct netc_blk_ctrl { + void __iomem *prb; + void __iomem *ierb; + void __iomem *netcmix; +}; + +static void netc_reg_write(void __iomem *base, u32 offset, u32 val) +{ + writel(val, base + offset); +} + +static u32 netc_reg_read(void __iomem *base, u32 offset) +{ + return readl(base + offset); +} + +static int netc_of_pci_get_bus_devfn(ofnode node) +{ + u32 reg[5]; + int error; + + error = ofnode_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg)); + if (error) + return error; + + return (reg[0] >> 8) & 0xffff; +} + +static int netc_get_link_mii_protocol(phy_interface_t interface) +{ + switch (interface) { + case PHY_INTERFACE_MODE_MII: + return MII_PROT_MII; + case PHY_INTERFACE_MODE_RMII: + return MII_PROT_RMII; + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_ID: + case PHY_INTERFACE_MODE_RGMII_RXID: + case PHY_INTERFACE_MODE_RGMII_TXID: + return MII_PROT_RGMII; + case PHY_INTERFACE_MODE_SGMII: + case PHY_INTERFACE_MODE_2500BASEX: + case PHY_INTERFACE_MODE_10GBASER: + case PHY_INTERFACE_MODE_XGMII: + case PHY_INTERFACE_MODE_USXGMII: + return MII_PROT_SERIAL; + default: + return -EINVAL; + } +} + +static int imx95_netcmix_init(struct udevice *dev) +{ + struct netc_blk_ctrl *priv = dev_get_priv(dev); + ofnode child, gchild; + phy_interface_t interface; + int bus_devfn, mii_proto; + u32 val; + + /* Default setting of MII protocol */ + val = MII_PROT(0, MII_PROT_RGMII) | MII_PROT(1, MII_PROT_RGMII) | + MII_PROT(2, MII_PROT_SERIAL); + + /* Update the link MII protocol through parsing phy-mode */ + dev_for_each_subnode(child, dev) { + if (!ofnode_is_enabled(child)) + continue; + + ofnode_for_each_subnode(gchild, child) { + if (!ofnode_is_enabled(gchild)) + continue; + + if (!ofnode_device_is_compatible(gchild, "pci1131,e101")) + continue; + + bus_devfn = netc_of_pci_get_bus_devfn(gchild); + if (bus_devfn < 0) + return -EINVAL; + + if (bus_devfn == IMX95_ENETC2_BUS_DEVFN) + continue; + + interface = ofnode_read_phy_mode(gchild); + if (interface == -1) + continue; + + mii_proto = netc_get_link_mii_protocol(interface); + if (mii_proto < 0) + return -EINVAL; + + switch (bus_devfn) { + case IMX95_ENETC0_BUS_DEVFN: + val &= ~CFG_LINK_MII_PORT_0; + val |= FIELD_PREP(CFG_LINK_MII_PORT_0, mii_proto); + break; + case IMX95_ENETC1_BUS_DEVFN: + val &= ~CFG_LINK_MII_PORT_1; + val |= FIELD_PREP(CFG_LINK_MII_PORT_1, mii_proto); + break; + default: + return -EINVAL; + } + } + } + + /* Configure Link I/O variant */ + netc_reg_write(priv->netcmix, IMX95_CFG_LINK_IO_VAR, + IO_VAR(2, IO_VAR_16FF_16G_SERDES)); + /* Configure Link 2 PCS protocol */ + netc_reg_write(priv->netcmix, IMX95_CFG_LINK_PCS_PROT(2), + PCS_PROT_10G_SXGMII); + netc_reg_write(priv->netcmix, IMX95_CFG_LINK_MII_PROT, val); + + return 0; +} + +static bool netc_ierb_is_locked(struct netc_blk_ctrl *priv) +{ + return !!(netc_reg_read(priv->prb, PRB_NETCRR) & NETCRR_LOCK); +} + +static int netc_lock_ierb(struct netc_blk_ctrl *priv) +{ + u32 val; + + netc_reg_write(priv->prb, PRB_NETCRR, NETCRR_LOCK); + + return readl_poll_timeout(priv->prb + PRB_NETCSR, val, + !(val & NETCSR_STATE), 2000); +} + +static int netc_unlock_ierb_with_warm_reset(struct netc_blk_ctrl *priv) +{ + u32 val; + + netc_reg_write(priv->prb, PRB_NETCRR, 0); + + return readl_poll_timeout(priv->prb + PRB_NETCRR, val, + !(val & NETCRR_LOCK), 100000); +} + +static int imx95_ierb_init(struct udevice *dev) +{ + struct netc_blk_ctrl *priv = dev_get_priv(dev); + + /* EMDIO : No MSI-X intterupt */ + netc_reg_write(priv->ierb, IERB_EMDIOFAUXR, 0); + /* ENETC0 PF */ + netc_reg_write(priv->ierb, IERB_EFAUXR(0), 0); + /* ENETC0 VF0 */ + netc_reg_write(priv->ierb, IERB_VFAUXR(0), 1); + /* ENETC0 VF1 */ + netc_reg_write(priv->ierb, IERB_VFAUXR(1), 2); + /* ENETC1 PF */ + netc_reg_write(priv->ierb, IERB_EFAUXR(1), 3); + /* ENETC1 VF0 */ + netc_reg_write(priv->ierb, IERB_VFAUXR(2), 5); + /* ENETC1 VF1 */ + netc_reg_write(priv->ierb, IERB_VFAUXR(3), 6); + /* ENETC2 PF */ + netc_reg_write(priv->ierb, IERB_EFAUXR(2), 4); + /* ENETC2 VF0 */ + netc_reg_write(priv->ierb, IERB_VFAUXR(4), 5); + /* ENETC2 VF1 */ + netc_reg_write(priv->ierb, IERB_VFAUXR(5), 6); + /* NETC TIMER */ + netc_reg_write(priv->ierb, IERB_T0FAUXR, 7); + + return 0; +} + +static int netc_ierb_init(struct udevice *dev) +{ + struct netc_blk_ctrl *priv = dev_get_priv(dev); + int err; + + if (netc_ierb_is_locked(priv)) { + err = netc_unlock_ierb_with_warm_reset(priv); + if (err) { + dev_err(dev, "Unlock IERB failed.\n"); + return err; + } + } + + err = imx95_ierb_init(dev); + if (err) + return err; + + err = netc_lock_ierb(priv); + if (err) { + dev_err(dev, "Lock IERB failed.\n"); + return err; + } + + return 0; +} + +static int netc_prb_check_error(struct netc_blk_ctrl *priv) +{ + if (netc_reg_read(priv->prb, PRB_NETCSR) & NETCSR_ERROR) + return -1; + + return 0; +} + +static const struct udevice_id netc_blk_ctrl_match[] = { + { .compatible = "nxp,imx95-netc-blk-ctrl" }, + {}, +}; + +static int netc_blk_ctrl_probe(struct udevice *dev) +{ + struct netc_blk_ctrl *priv = dev_get_priv(dev); + struct clk *ipg_clk; + fdt_addr_t regs; + int err; + + ipg_clk = devm_clk_get_optional(dev, "ipg"); + if (IS_ERR(ipg_clk)) { + dev_err(dev, "Set ipg clock failed\n"); + return PTR_ERR(ipg_clk); + } + + err = clk_prepare_enable(ipg_clk); + if (err) { + dev_err(dev, "Enable ipg clock failed\n"); + return PTR_ERR(ipg_clk); + } + + regs = dev_read_addr_name(dev, "ierb"); + if (regs == FDT_ADDR_T_NONE) { + dev_err(dev, "Missing IERB resource\n"); + return -EINVAL; + } + + priv->ierb = (void __iomem *)regs; + regs = dev_read_addr_name(dev, "prb"); + if (regs == FDT_ADDR_T_NONE) { + dev_err(dev, "Missing PRB resource\n"); + return -EINVAL; + } + + priv->prb = (void __iomem *)regs; + regs = dev_read_addr_name(dev, "netcmix"); + if (regs == FDT_ADDR_T_NONE) { + dev_err(dev, "Missing NETCMIX resource\n"); + return -EINVAL; + } + + priv->netcmix = (void __iomem *)regs; + + err = imx95_netcmix_init(dev); + if (err) { + dev_err(dev, "Initializing NETCMIX failed\n"); + return err; + } + + err = netc_ierb_init(dev); + if (err) { + dev_err(dev, "Initializing IERB failed\n"); + return err; + } + + if (netc_prb_check_error(priv) < 0) + dev_warn(dev, "The current IERB configuration is invalid\n"); + + return 0; +} + +U_BOOT_DRIVER(netc_blk_ctrl_drv) = { + .name = "netc_blk_ctrl", + .id = UCLASS_SIMPLE_BUS, + .of_match = netc_blk_ctrl_match, + .probe = netc_blk_ctrl_probe, + .priv_auto = sizeof(struct netc_blk_ctrl), + .flags = DM_FLAG_PRE_RELOC, +}; diff --git a/drivers/net/phy/motorcomm.c b/drivers/net/phy/motorcomm.c index 4d67203ee70..e1630e1c229 100644 --- a/drivers/net/phy/motorcomm.c +++ b/drivers/net/phy/motorcomm.c @@ -1,8 +1,9 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Motorcomm 8531 PHY driver. + * Motorcomm YT8511/YT8531/YT8531S/YT8821/YT8521S PHY driver. * * Copyright (C) 2023 StarFive Technology Co., Ltd. + * Copyright (C) 2024 Motorcomm Electronic Technology Co., Ltd. */ #include <config.h> @@ -13,6 +14,8 @@ #define PHY_ID_YT8511 0x0000010a #define PHY_ID_YT8531 0x4f51e91b #define PHY_ID_YT8821 0x4f51ea19 +#define PHY_ID_YT8531S 0x4f51e91a +#define PHY_ID_YT8521S 0x0000011a #define PHY_ID_MASK GENMASK(31, 0) /* Extended Register's Address Offset Register */ @@ -33,6 +36,17 @@ #define YTPHY_DTS_OUTPUT_CLK_25M 25000000 #define YTPHY_DTS_OUTPUT_CLK_125M 125000000 +#define YT8521S_SCR_SYNCE_ENABLE BIT(5) +/* 1b0 output 25m clock *default* + * 1b1 output 125m clock + */ +#define YT8521S_SCR_CLK_FRE_SEL_125M BIT(3) +#define YT8521S_SCR_CLK_SRC_MASK GENMASK(2, 1) +#define YT8521S_SCR_CLK_SRC_PLL_125M 0 +#define YT8521S_SCR_CLK_SRC_UTP_RX 1 +#define YT8521S_SCR_CLK_SRC_SDS_RX 2 +#define YT8521S_SCR_CLK_SRC_REF_25M 3 + #define YT8511_EXT_CLK_GATE 0x0c #define YT8511_EXT_DELAY_DRIVE 0x0d #define YT8511_EXT_SLEEP_CTRL 0x27 @@ -1114,6 +1128,151 @@ static int yt8821_startup(struct phy_device *phydev) return 0; } +static int yt8521s_config(struct phy_device *phydev) +{ + struct ytphy_plat_priv *priv = phydev->priv; + u16 mask, val; + int ret; + + ret = genphy_config_aneg(phydev); + if (ret < 0) + return ret; + + ytphy_dt_parse(phydev); + switch (priv->clk_out_frequency) { + case YTPHY_DTS_OUTPUT_CLK_DIS: + mask = YT8521S_SCR_SYNCE_ENABLE; + val = 0; + break; + case YTPHY_DTS_OUTPUT_CLK_25M: + mask = YT8521S_SCR_SYNCE_ENABLE | YT8521S_SCR_CLK_SRC_MASK | + YT8521S_SCR_CLK_FRE_SEL_125M; + val = YT8521S_SCR_SYNCE_ENABLE | + FIELD_PREP(YT8521S_SCR_CLK_SRC_MASK, + YT8521S_SCR_CLK_SRC_REF_25M); + break; + case YTPHY_DTS_OUTPUT_CLK_125M: + mask = YT8521S_SCR_SYNCE_ENABLE | YT8521S_SCR_CLK_SRC_MASK | + YT8521S_SCR_CLK_FRE_SEL_125M; + val = YT8521S_SCR_SYNCE_ENABLE | YT8521S_SCR_CLK_FRE_SEL_125M | + FIELD_PREP(YT8521S_SCR_CLK_SRC_MASK, + YT8521S_SCR_CLK_SRC_PLL_125M); + break; + default: + pr_warn("Freq err:%u\n", priv->clk_out_frequency); + return -EINVAL; + } + + ret = ytphy_modify_ext(phydev, YTPHY_SYNCE_CFG_REG, mask, + val); + if (ret < 0) + return ret; + + ret = ytphy_rgmii_clk_delay_config(phydev); + if (ret < 0) + return ret; + + if (priv->flag & AUTO_SLEEP_DISABLED) { + /* disable auto sleep */ + ret = ytphy_modify_ext(phydev, + YT8531_EXTREG_SLEEP_CONTROL1_REG, + YT8531_ESC1R_SLEEP_SW, 0); + if (ret < 0) + return ret; + } + + if (priv->flag & KEEP_PLL_ENABLED) { + /* enable RXC clock when no wire plug */ + ret = ytphy_modify_ext(phydev, + YT8531_CLOCK_GATING_REG, + YT8531_CGR_RX_CLK_EN, 0); + if (ret < 0) + return ret; + } + + return 0; +} + +static int yt8531s_config(struct phy_device *phydev) +{ + struct ytphy_plat_priv *priv = phydev->priv; + u16 mask, val; + int ret; + + ret = genphy_config_aneg(phydev); + if (ret < 0) + return ret; + + ytphy_dt_parse(phydev); + switch (priv->clk_out_frequency) { + case YTPHY_DTS_OUTPUT_CLK_DIS: + mask = YT8531_SCR_SYNCE_ENABLE; + val = 0; + break; + case YTPHY_DTS_OUTPUT_CLK_25M: + mask = YT8531_SCR_SYNCE_ENABLE | YT8531_SCR_CLK_SRC_MASK | + YT8531_SCR_CLK_FRE_SEL_125M; + val = YT8531_SCR_SYNCE_ENABLE | + FIELD_PREP(YT8531_SCR_CLK_SRC_MASK, + YT8531_SCR_CLK_SRC_REF_25M); + break; + case YTPHY_DTS_OUTPUT_CLK_125M: + mask = YT8531_SCR_SYNCE_ENABLE | YT8531_SCR_CLK_SRC_MASK | + YT8531_SCR_CLK_FRE_SEL_125M; + val = YT8531_SCR_SYNCE_ENABLE | YT8531_SCR_CLK_FRE_SEL_125M | + FIELD_PREP(YT8531_SCR_CLK_SRC_MASK, + YT8531_SCR_CLK_SRC_PLL_125M); + break; + default: + pr_warn("Freq err:%u\n", priv->clk_out_frequency); + return -EINVAL; + } + + ret = ytphy_modify_ext(phydev, YTPHY_SYNCE_CFG_REG, mask, + val); + if (ret < 0) + return ret; + + ret = ytphy_rgmii_clk_delay_config(phydev); + if (ret < 0) + return ret; + + if (priv->flag & AUTO_SLEEP_DISABLED) { + /* disable auto sleep */ + ret = ytphy_modify_ext(phydev, + YT8531_EXTREG_SLEEP_CONTROL1_REG, + YT8531_ESC1R_SLEEP_SW, 0); + if (ret < 0) + return ret; + } + + if (priv->flag & KEEP_PLL_ENABLED) { + /* enable RXC clock when no wire plug */ + ret = ytphy_modify_ext(phydev, + YT8531_CLOCK_GATING_REG, + YT8531_CGR_RX_CLK_EN, 0); + if (ret < 0) + return ret; + } + + return 0; +} + +static int yt8531s_startup(struct phy_device *phydev) +{ + int ret; + + ret = genphy_update_link(phydev); + if (ret) + return ret; + + ret = yt8531_parse_status(phydev); + if (ret) + return ret; + + return 0; +} + U_BOOT_PHY_DRIVER(motorcomm8511) = { .name = "YT8511 Gigabit Ethernet", .uid = PHY_ID_YT8511, @@ -1145,3 +1304,25 @@ U_BOOT_PHY_DRIVER(motorcomm8821) = { .startup = &yt8821_startup, .shutdown = &genphy_shutdown, }; + +U_BOOT_PHY_DRIVER(motorcomm8531S) = { + .name = "YT8531S Gigabit Ethernet Transceiver", + .uid = PHY_ID_YT8531S, + .mask = PHY_ID_MASK, + .features = PHY_GBIT_FEATURES, + .probe = &yt8531_probe, + .config = &yt8531s_config, + .startup = &yt8531s_startup, + .shutdown = &genphy_shutdown, +}; + +U_BOOT_PHY_DRIVER(motorcomm8521S) = { + .name = "YT8521S Gigabit Ethernet Transceiver", + .uid = PHY_ID_YT8521S, + .mask = PHY_ID_MASK, + .features = PHY_GBIT_FEATURES, + .probe = &yt8531_probe, + .config = &yt8521s_config, + .startup = &yt8531s_startup, + .shutdown = &genphy_shutdown, +}; diff --git a/drivers/nvme/Kconfig b/drivers/nvme/Kconfig index 73edb355160..d138867666b 100644 --- a/drivers/nvme/Kconfig +++ b/drivers/nvme/Kconfig @@ -4,6 +4,7 @@ config NVME bool "NVM Express device support" + select BLK help This option enables support for NVM Express devices. It supports basic functions of NVMe (read/write). diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index 41901433e8c..4f876d39875 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -371,6 +371,14 @@ config PCIE_DW_MESON Say Y here if you want to enable DW PCIe controller support on Amlogic SoCs. +config PCIE_DW_QCOM + bool "Qualcomm DesignWare based PCIe controller" + depends on ARCH_SNAPDRAGON + select PCIE_DW_COMMON + help + Say Y here if you want to enable DW PCIe controller support on + Qualcomm SoCs. + config PCIE_ROCKCHIP bool "Enable Rockchip PCIe driver" depends on ARCH_ROCKCHIP diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile index bf361cd0fba..ba53f594963 100644 --- a/drivers/pci/Makefile +++ b/drivers/pci/Makefile @@ -47,6 +47,7 @@ obj-$(CONFIG_PCIE_MEDIATEK_GEN3) += pcie_mediatek_gen3.o obj-$(CONFIG_PCIE_ROCKCHIP) += pcie_rockchip.o obj-$(CONFIG_PCIE_DW_ROCKCHIP) += pcie_dw_rockchip.o obj-$(CONFIG_PCIE_DW_MESON) += pcie_dw_meson.o +obj-$(CONFIG_PCIE_DW_QCOM) += pcie_dw_qcom.o obj-$(CONFIG_PCI_BRCMSTB) += pcie_brcmstb.o obj-$(CONFIG_PCI_OCTEONTX) += pci_octeontx.o obj-$(CONFIG_PCIE_OCTEON) += pcie_octeon.o diff --git a/drivers/pci/pci_rom.c b/drivers/pci/pci_rom.c index 2753df275ca..3697ad00be2 100644 --- a/drivers/pci/pci_rom.c +++ b/drivers/pci/pci_rom.c @@ -347,6 +347,7 @@ int vesa_setup_video_priv(struct vesa_mode_info *vesa, u64 fb, case 32: case 24: uc_priv->bpix = VIDEO_BPP32; + uc_priv->format = VIDEO_X8B8G8R8; break; case 16: uc_priv->bpix = VIDEO_BPP16; @@ -392,6 +393,7 @@ int vesa_setup_video(struct udevice *dev, int (*int15_handler)(void)) uc_priv->ysize = ho->ysize; uc_priv->line_length = ho->line_length; uc_priv->bpix = ho->bpix; + uc_priv->format = ho->format; } else { bootstage_start(BOOTSTAGE_ID_ACCUM_LCD, "vesa display"); ret = dm_pci_run_vga_bios(dev, int15_handler, @@ -438,6 +440,7 @@ int vesa_setup_video(struct udevice *dev, int (*int15_handler)(void)) ho->ysize = uc_priv->ysize; ho->line_length = uc_priv->line_length; ho->bpix = uc_priv->bpix; + ho->format = uc_priv->format; } return 0; diff --git a/drivers/pci/pcie_dw_common.c b/drivers/pci/pcie_dw_common.c index 0673e516c6f..78961271a8e 100644 --- a/drivers/pci/pcie_dw_common.c +++ b/drivers/pci/pcie_dw_common.c @@ -267,6 +267,48 @@ int pcie_dw_write_config(struct udevice *bus, pci_dev_t bdf, pcie->io.bus_start, pcie->io.size); } +/* + * These interfaces resemble the pci_find_*capability() interfaces, but these + * are for configuring host controllers, which are bridges *to* PCI devices but + * are not PCI devices themselves. + */ +static u8 pcie_dw_find_next_cap(struct pcie_dw *pci, u8 cap_ptr, u8 cap) +{ + u8 cap_id, next_cap_ptr; + u32 val; + u16 reg; + + if (!cap_ptr) + return 0; + + val = readl(pci->dbi_base + (cap_ptr & ~0x3)); + reg = pci_conv_32_to_size(val, cap_ptr, 2); + cap_id = (reg & 0x00ff); + + if (cap_id > PCI_CAP_ID_MAX) + return 0; + + if (cap_id == cap) + return cap_ptr; + + next_cap_ptr = (reg & 0xff00) >> 8; + return pcie_dw_find_next_cap(pci, next_cap_ptr, cap); +} + +u8 pcie_dw_find_capability(struct pcie_dw *pci, u8 cap) +{ + u8 next_cap_ptr; + u32 val; + u16 reg; + + val = readl(pci->dbi_base + (PCI_CAPABILITY_LIST & ~0x3)); + reg = pci_conv_32_to_size(val, PCI_CAPABILITY_LIST, 2); + + next_cap_ptr = (reg & 0x00ff); + + return pcie_dw_find_next_cap(pci, next_cap_ptr, cap); +} + /** * pcie_dw_setup_host() - Setup the PCIe controller for RC opertaion * diff --git a/drivers/pci/pcie_dw_common.h b/drivers/pci/pcie_dw_common.h index e0f7796f2a8..8cb99a12ea1 100644 --- a/drivers/pci/pcie_dw_common.h +++ b/drivers/pci/pcie_dw_common.h @@ -139,6 +139,8 @@ int pcie_dw_read_config(const struct udevice *bus, pci_dev_t bdf, uint offset, u int pcie_dw_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, ulong value, enum pci_size_t size); +u8 pcie_dw_find_capability(struct pcie_dw *pci, u8 cap); + static inline void dw_pcie_dbi_write_enable(struct pcie_dw *pci, bool en) { u32 val; diff --git a/drivers/pci/pcie_dw_qcom.c b/drivers/pci/pcie_dw_qcom.c new file mode 100644 index 00000000000..39b4cd4efe2 --- /dev/null +++ b/drivers/pci/pcie_dw_qcom.c @@ -0,0 +1,571 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include <clk.h> +#include <dm.h> +#include <generic-phy.h> +#include <pci.h> +#include <u-boot/crc.h> +#include <power-domain.h> +#include <reset.h> +#include <syscon.h> +#include <malloc.h> +#include <power/regulator.h> +#include <asm/global_data.h> +#include <asm/io.h> +#include <asm-generic/gpio.h> +#include <dm/device_compat.h> +#include <linux/iopoll.h> +#include <linux/delay.h> +#include <linux/log2.h> +#include <linux/bitfield.h> + +#include "pcie_dw_common.h" + +DECLARE_GLOBAL_DATA_PTR; + +struct qcom_pcie; + +struct qcom_pcie_ops { + int (*config_sid)(struct qcom_pcie *priv); +}; + +#define NUM_SUPPLIES 2 + +struct qcom_pcie { + /* Must be first member of the struct */ + struct pcie_dw dw; + void *parf; + struct phy phy; + struct reset_ctl_bulk rsts; + struct clk_bulk clks; + struct gpio_desc rst_gpio; + struct qcom_pcie_ops *ops; + struct udevice *vregs[NUM_SUPPLIES]; +}; + +/* PARF registers */ +#define PARF_SYS_CTRL 0x00 +#define PARF_PM_CTRL 0x20 +#define PARF_PCS_DEEMPH 0x34 +#define PARF_PCS_SWING 0x38 +#define PARF_PHY_CTRL 0x40 +#define PARF_PHY_REFCLK 0x4c +#define PARF_CONFIG_BITS 0x50 +#define PARF_DBI_BASE_ADDR 0x168 +#define PARF_MHI_CLOCK_RESET_CTRL 0x174 +#define PARF_AXI_MSTR_WR_ADDR_HALT 0x178 +#define PARF_AXI_MSTR_WR_ADDR_HALT_V2 0x1a8 +#define PARF_Q2A_FLUSH 0x1ac +#define PARF_LTSSM 0x1b0 +#define PARF_SID_OFFSET 0x234 +#define PARF_BDF_TRANSLATE_CFG 0x24c +#define PARF_SLV_ADDR_SPACE_SIZE 0x358 +#define PARF_DEVICE_TYPE 0x1000 +#define PARF_BDF_TO_SID_TABLE_N 0x2000 + +/* ELBI registers */ +#define ELBI_SYS_CTRL 0x04 + +/* DBI registers */ +#define AXI_MSTR_RESP_COMP_CTRL0 0x818 +#define AXI_MSTR_RESP_COMP_CTRL1 0x81c +#define MISC_CONTROL_1_REG 0x8bc + +/* MHI registers */ +#define PARF_DEBUG_CNT_PM_LINKST_IN_L2 0xc04 +#define PARF_DEBUG_CNT_PM_LINKST_IN_L1 0xc0c +#define PARF_DEBUG_CNT_PM_LINKST_IN_L0S 0xc10 +#define PARF_DEBUG_CNT_AUX_CLK_IN_L1SUB_L1 0xc84 +#define PARF_DEBUG_CNT_AUX_CLK_IN_L1SUB_L2 0xc88 + +/* PARF_SYS_CTRL register fields */ +#define MAC_PHY_POWERDOWN_IN_P2_D_MUX_EN BIT(29) +#define MST_WAKEUP_EN BIT(13) +#define SLV_WAKEUP_EN BIT(12) +#define MSTR_ACLK_CGC_DIS BIT(10) +#define SLV_ACLK_CGC_DIS BIT(9) +#define CORE_CLK_CGC_DIS BIT(6) +#define AUX_PWR_DET BIT(4) +#define L23_CLK_RMV_DIS BIT(2) +#define L1_CLK_RMV_DIS BIT(1) + +/* PARF_PM_CTRL register fields */ +#define REQ_NOT_ENTR_L1 BIT(5) + +/* PARF_PCS_DEEMPH register fields */ +#define PCS_DEEMPH_TX_DEEMPH_GEN1(x) FIELD_PREP(GENMASK(21, 16), x) +#define PCS_DEEMPH_TX_DEEMPH_GEN2_3_5DB(x) FIELD_PREP(GENMASK(13, 8), x) +#define PCS_DEEMPH_TX_DEEMPH_GEN2_6DB(x) FIELD_PREP(GENMASK(5, 0), x) + +/* PARF_PCS_SWING register fields */ +#define PCS_SWING_TX_SWING_FULL(x) FIELD_PREP(GENMASK(14, 8), x) +#define PCS_SWING_TX_SWING_LOW(x) FIELD_PREP(GENMASK(6, 0), x) + +/* PARF_PHY_CTRL register fields */ +#define PHY_CTRL_PHY_TX0_TERM_OFFSET_MASK GENMASK(20, 16) +#define PHY_CTRL_PHY_TX0_TERM_OFFSET(x) FIELD_PREP(PHY_CTRL_PHY_TX0_TERM_OFFSET_MASK, x) +#define PHY_TEST_PWR_DOWN BIT(0) + +/* PARF_PHY_REFCLK register fields */ +#define PHY_REFCLK_SSP_EN BIT(16) +#define PHY_REFCLK_USE_PAD BIT(12) + +/* PARF_CONFIG_BITS register fields */ +#define PHY_RX0_EQ(x) FIELD_PREP(GENMASK(26, 24), x) + +/* PARF_SLV_ADDR_SPACE_SIZE register value */ +#define SLV_ADDR_SPACE_SZ 0x10000000 + +/* PARF_MHI_CLOCK_RESET_CTRL register fields */ +#define AHB_CLK_EN BIT(0) +#define MSTR_AXI_CLK_EN BIT(1) +#define BYPASS BIT(4) + +/* PARF_AXI_MSTR_WR_ADDR_HALT register fields */ +#define EN BIT(31) + +/* PARF_LTSSM register fields */ +#define LTSSM_EN BIT(8) + +/* PARF_DEVICE_TYPE register fields */ +#define DEVICE_TYPE_RC 0x4 + +/* ELBI_SYS_CTRL register fields */ +#define ELBI_SYS_CTRL_LT_ENABLE BIT(0) + +/* AXI_MSTR_RESP_COMP_CTRL0 register fields */ +#define CFG_REMOTE_RD_REQ_BRIDGE_SIZE_2K 0x4 +#define CFG_REMOTE_RD_REQ_BRIDGE_SIZE_4K 0x5 + +/* AXI_MSTR_RESP_COMP_CTRL1 register fields */ +#define CFG_BRIDGE_SB_INIT BIT(0) + +/* MISC_CONTROL_1_REG register fields */ +#define DBI_RO_WR_EN 1 + +/* PCI_EXP_SLTCAP register fields */ +#define PCIE_CAP_SLOT_POWER_LIMIT_VAL FIELD_PREP(PCI_EXP_SLTCAP_SPLV, 250) +#define PCIE_CAP_SLOT_POWER_LIMIT_SCALE FIELD_PREP(PCI_EXP_SLTCAP_SPLS, 1) +#define PCIE_CAP_SLOT_VAL (PCI_EXP_SLTCAP_ABP | \ + PCI_EXP_SLTCAP_PCP | \ + PCI_EXP_SLTCAP_MRLSP | \ + PCI_EXP_SLTCAP_AIP | \ + PCI_EXP_SLTCAP_PIP | \ + PCI_EXP_SLTCAP_HPS | \ + PCI_EXP_SLTCAP_HPC | \ + PCI_EXP_SLTCAP_EIP | \ + PCIE_CAP_SLOT_POWER_LIMIT_VAL | \ + PCIE_CAP_SLOT_POWER_LIMIT_SCALE) + +#define PERST_DELAY_US 1000 + +#define LINK_WAIT_MAX_RETRIES 10 +#define LINK_WAIT_USLEEP 100000 + +#define QCOM_PCIE_CRC8_POLYNOMIAL (BIT(2) | BIT(1) | BIT(0)) + +#define CRC8_TABLE_SIZE 256 + +static bool qcom_pcie_wait_link_up(struct qcom_pcie *priv) +{ + u8 offset = pcie_dw_find_capability(&priv->dw, PCI_CAP_ID_EXP); + unsigned int cnt = 0; + u16 val; + + do { + val = readw(priv->dw.dbi_base + offset + PCI_EXP_LNKSTA); + + if ((val & PCI_EXP_LNKSTA_DLLLA)) + return true; + cnt++; + + udelay(LINK_WAIT_USLEEP); + } while (cnt < LINK_WAIT_MAX_RETRIES); + + return false; +} + +static void qcom_pcie_clear_aspm_l0s(struct qcom_pcie *priv) +{ + u8 offset = pcie_dw_find_capability(&priv->dw, PCI_CAP_ID_EXP); + u32 val; + + dw_pcie_dbi_write_enable(&priv->dw, true); + + val = readl(priv->dw.dbi_base + offset + PCI_EXP_LNKCAP); + val &= ~PCI_EXP_LNKCAP_ASPM_L0S; + writel(val, priv->dw.dbi_base + offset + PCI_EXP_LNKCAP); + + dw_pcie_dbi_write_enable(&priv->dw, false); +} + +static void qcom_pcie_clear_hpc(struct qcom_pcie *priv) +{ + u8 offset = pcie_dw_find_capability(&priv->dw, PCI_CAP_ID_EXP); + u32 val; + + dw_pcie_dbi_write_enable(&priv->dw, true); + + val = readl(priv->dw.dbi_base + offset + PCI_EXP_SLTCAP); + val &= ~PCI_EXP_SLTCAP_HPC; + writel(val, priv->dw.dbi_base + offset + PCI_EXP_SLTCAP); + + dw_pcie_dbi_write_enable(&priv->dw, false); +} + +static void qcom_pcie_set_lanes(struct qcom_pcie *priv, unsigned int lanes) +{ + u8 offset = pcie_dw_find_capability(&priv->dw, PCI_CAP_ID_EXP); + u32 val; + + val = readl(priv->dw.dbi_base + offset + PCI_EXP_LNKCAP); + val &= ~PCI_EXP_LNKCAP_MLW; + val |= FIELD_PREP(PCI_EXP_LNKCAP_MLW, lanes); + writel(val, priv->dw.dbi_base + offset + PCI_EXP_LNKCAP); +} + +static int qcom_pcie_config_sid_1_9_0(struct qcom_pcie *priv) +{ + /* iommu map structure */ + struct { + u32 bdf; + u32 phandle; + u32 smmu_sid; + u32 smmu_sid_len; + } *map; + void *bdf_to_sid_base = priv->parf + PARF_BDF_TO_SID_TABLE_N; + int i, nr_map, size = 0; + u32 smmu_sid_base; + + dev_read_prop(priv->dw.dev, "iommu-map", &size); + if (!size) + return 0; + + map = malloc(size); + if (!map) + return -ENOMEM; + + dev_read_u32_array(priv->dw.dev, "iommu-map", (u32 *)map, size / sizeof(u32)); + + nr_map = size / (sizeof(*map)); + + /* Registers need to be zero out first */ + memset_io(bdf_to_sid_base, 0, CRC8_TABLE_SIZE * sizeof(u32)); + + /* Extract the SMMU SID base from the first entry of iommu-map */ + smmu_sid_base = map[0].smmu_sid; + + /* Look for an available entry to hold the mapping */ + for (i = 0; i < nr_map; i++) { + __be16 bdf_be = cpu_to_be16(map[i].bdf); + u32 val; + u8 hash; + + hash = crc8(QCOM_PCIE_CRC8_POLYNOMIAL, (u8 *)&bdf_be, sizeof(bdf_be)); + + val = readl(bdf_to_sid_base + hash * sizeof(u32)); + + /* If the register is already populated, look for next available entry */ + while (val) { + u8 current_hash = hash++; + u8 next_mask = 0xff; + + /* If NEXT field is NULL then update it with next hash */ + if (!(val & next_mask)) { + val |= (u32)hash; + writel(val, bdf_to_sid_base + current_hash * sizeof(u32)); + } + + val = readl(bdf_to_sid_base + hash * sizeof(u32)); + } + + /* BDF [31:16] | SID [15:8] | NEXT [7:0] */ + val = map[i].bdf << 16 | (map[i].smmu_sid - smmu_sid_base) << 8 | 0; + writel(val, bdf_to_sid_base + hash * sizeof(u32)); + } + + free(map); + + return 0; +} + +static void qcom_pcie_configure(struct qcom_pcie *priv) +{ + u32 val; + + dw_pcie_dbi_write_enable(&priv->dw, true); + + val = readl(priv->dw.dbi_base + PCIE_PORT_LINK_CONTROL); + val &= ~PORT_LINK_FAST_LINK_MODE; + val |= PORT_LINK_DLL_LINK_EN; + val &= ~PORT_LINK_MODE_MASK; + val |= PORT_LINK_MODE_2_LANES; + writel(val, priv->dw.dbi_base + PCIE_PORT_LINK_CONTROL); + + val = readl(priv->dw.dbi_base + PCIE_LINK_WIDTH_SPEED_CONTROL); + val &= ~PORT_LOGIC_LINK_WIDTH_MASK; + val |= PORT_LOGIC_LINK_WIDTH_2_LANES; + writel(val, priv->dw.dbi_base + PCIE_LINK_WIDTH_SPEED_CONTROL); + + qcom_pcie_set_lanes(priv, 2); + + dw_pcie_dbi_write_enable(&priv->dw, false); +} + +static int qcom_pcie_init_port(struct udevice *dev) +{ + struct qcom_pcie *priv = dev_get_priv(dev); + int vreg, ret; + u32 val; + + dm_gpio_set_value(&priv->rst_gpio, 1); + udelay(PERST_DELAY_US); + + ret = generic_phy_init(&priv->phy); + if (ret) { + dev_err(dev, "failed to init phy (%d)\n", ret); + return ret; + } + + udelay(PERST_DELAY_US); + + for (vreg = 0; vreg < NUM_SUPPLIES; ++vreg) { + ret = regulator_set_enable(priv->vregs[vreg], true); + if (ret && ret != -ENOSYS) + dev_warn(dev, "failed to enable regulator %d (%d)\n", vreg, ret); + } + + ret = clk_enable_bulk(&priv->clks); + if (ret) { + dev_err(dev, "failed to enable clocks (%d)\n", ret); + goto err_power_off_phy; + } + + ret = reset_assert_bulk(&priv->rsts); + if (ret) { + dev_err(dev, "failed to assert resets (%d)\n", ret); + goto err_disable_clks; + } + + udelay(PERST_DELAY_US); + + ret = reset_deassert_bulk(&priv->rsts); + if (ret) { + dev_err(dev, "failed to deassert resets (%d)\n", ret); + goto err_power_off_phy; + } + + udelay(PERST_DELAY_US); + + /* configure PCIe to RC mode */ + writel(DEVICE_TYPE_RC, priv->parf + PARF_DEVICE_TYPE); + + /* enable PCIe clocks and resets */ + val = readl(priv->parf + PARF_PHY_CTRL); + val &= ~PHY_TEST_PWR_DOWN; + writel(val, priv->parf + PARF_PHY_CTRL); + + /* change DBI base address */ + writel(0, priv->parf + PARF_DBI_BASE_ADDR); + + /* MAC PHY_POWERDOWN MUX DISABLE */ + val = readl(priv->parf + PARF_SYS_CTRL); + val &= ~MAC_PHY_POWERDOWN_IN_P2_D_MUX_EN; + writel(val, priv->parf + PARF_SYS_CTRL); + + val = readl(priv->parf + PARF_MHI_CLOCK_RESET_CTRL); + val |= BYPASS; + writel(val, priv->parf + PARF_MHI_CLOCK_RESET_CTRL); + + /* Enable L1 and L1SS */ + val = readl(priv->parf + PARF_PM_CTRL); + val &= ~REQ_NOT_ENTR_L1; + writel(val, priv->parf + PARF_PM_CTRL); + + val = readl(priv->parf + PARF_AXI_MSTR_WR_ADDR_HALT_V2); + val |= EN; + writel(val, priv->parf + PARF_AXI_MSTR_WR_ADDR_HALT_V2); + + ret = generic_phy_power_on(&priv->phy); + if (ret) { + dev_err(dev, "failed to power on phy (%d)\n", ret); + goto err_exit_phy; + } + + qcom_pcie_clear_aspm_l0s(priv); + qcom_pcie_clear_hpc(priv); + + mdelay(100); + dm_gpio_set_value(&priv->rst_gpio, 0); + udelay(PERST_DELAY_US); + + if (priv->ops && priv->ops->config_sid) { + ret = priv->ops->config_sid(priv); + if (ret) + goto err_deassert_bulk; + } + + qcom_pcie_configure(priv); + + pcie_dw_setup_host(&priv->dw); + + /* enable link training */ + val = readl(priv->parf + PARF_LTSSM); + val |= LTSSM_EN; + writel(val, priv->parf + PARF_LTSSM); + + return 0; +err_deassert_bulk: + reset_assert_bulk(&priv->rsts); +err_disable_clks: + clk_disable_bulk(&priv->clks); +err_power_off_phy: + generic_phy_power_off(&priv->phy); +err_exit_phy: + generic_phy_exit(&priv->phy); + + return ret; +} + +static const char *qcom_pcie_vregs[NUM_SUPPLIES] = { + "vdda-supply", + "vddpe-3v3-supply", +}; + +static int qcom_pcie_parse_dt(struct udevice *dev) +{ + struct qcom_pcie *priv = dev_get_priv(dev); + int vreg, ret; + + priv->dw.dbi_base = dev_read_addr_name_ptr(dev, "dbi"); + if (!priv->dw.dbi_base) + return -EINVAL; + + dev_dbg(dev, "DBI address is 0x%p\n", priv->dw.dbi_base); + + priv->dw.atu_base = dev_read_addr_name_ptr(dev, "atu"); + if (!priv->dw.atu_base) + return -EINVAL; + + dev_dbg(dev, "ATU address is 0x%p\n", priv->dw.atu_base); + + priv->parf = dev_read_addr_name_ptr(dev, "parf"); + if (!priv->parf) + return -EINVAL; + + dev_dbg(dev, "PARF address is 0x%p\n", priv->parf); + + ret = gpio_request_by_name(dev, "perst-gpios", 0, + &priv->rst_gpio, GPIOD_IS_OUT); + if (ret) { + dev_err(dev, "failed to find reset-gpios property\n"); + return ret; + } + + ret = reset_get_bulk(dev, &priv->rsts); + if (ret) { + dev_err(dev, "failed to get resets (%d)\n", ret); + return ret; + } + + ret = clk_get_bulk(dev, &priv->clks); + if (ret) { + dev_err(dev, "failed to get clocks (%d)\n", ret); + return ret; + } + + ret = generic_phy_get_by_index(dev, 0, &priv->phy); + if (ret) { + dev_err(dev, "failed to get pcie phy (%d)\n", ret); + return ret; + } + + for (vreg = 0; vreg < NUM_SUPPLIES; ++vreg) { + ret = device_get_supply_regulator(dev, qcom_pcie_vregs[vreg], &priv->vregs[vreg]); + if (ret) + dev_warn(dev, "failed to get regulator %d (%d)\n", vreg, ret); + } + + return 0; +} + +/** + * qcom_pcie_probe() - Probe the PCIe bus for active link + * + * @dev: A pointer to the device being operated on + * + * Probe for an active link on the PCIe bus and configure the controller + * to enable this port. + * + * Return: 0 on success, else -ENODEV + */ +static int qcom_pcie_probe(struct udevice *dev) +{ + struct qcom_pcie *priv = dev_get_priv(dev); + struct udevice *ctlr = pci_get_controller(dev); + struct pci_controller *hose = dev_get_uclass_priv(ctlr); + int ret = 0; + + priv->dw.first_busno = dev_seq(dev); + priv->dw.dev = dev; + + ret = qcom_pcie_parse_dt(dev); + if (ret) + return ret; + + ret = qcom_pcie_init_port(dev); + if (ret) { + dm_gpio_free(dev, &priv->rst_gpio); + return ret; + } + + if (qcom_pcie_wait_link_up(priv)) + printf("PCIE-%d: Link up (Gen%d-x%d, Bus%d)\n", + dev_seq(dev), pcie_dw_get_link_speed(&priv->dw), + pcie_dw_get_link_width(&priv->dw), + hose->first_busno); + else + printf("PCIE-%d: Link up timeout\n", dev_seq(dev)); + + return pcie_dw_prog_outbound_atu_unroll(&priv->dw, + PCIE_ATU_REGION_INDEX0, + PCIE_ATU_TYPE_MEM, + priv->dw.mem.phys_start, + priv->dw.mem.bus_start, + priv->dw.mem.size); +} + +static const struct dm_pci_ops qcom_pcie_ops = { + .read_config = pcie_dw_read_config, + .write_config = pcie_dw_write_config, +}; + +static const struct qcom_pcie_ops ops_1_9_0 = { + .config_sid = qcom_pcie_config_sid_1_9_0, +}; + +static const struct udevice_id qcom_pcie_ids[] = { + { .compatible = "qcom,pcie-sa8540p", .data = (ulong)&ops_1_9_0 }, + { .compatible = "qcom,pcie-sc7280", .data = (ulong)&ops_1_9_0 }, + { .compatible = "qcom,pcie-sc8180x", .data = (ulong)&ops_1_9_0 }, + { .compatible = "qcom,pcie-sc8280xp", .data = (ulong)&ops_1_9_0 }, + { .compatible = "qcom,pcie-sdm845" }, + { .compatible = "qcom,pcie-sdx55", .data = (ulong)&ops_1_9_0 }, + { .compatible = "qcom,pcie-sm8150", .data = (ulong)&ops_1_9_0 }, + { .compatible = "qcom,pcie-sm8250", .data = (ulong)&ops_1_9_0 }, + { .compatible = "qcom,pcie-sm8350", .data = (ulong)&ops_1_9_0 }, + { .compatible = "qcom,pcie-sm8450-pcie0", .data = (ulong)&ops_1_9_0 }, + { .compatible = "qcom,pcie-sm8450-pcie1", .data = (ulong)&ops_1_9_0 }, + { .compatible = "qcom,pcie-sm8550", .data = (ulong)&ops_1_9_0 }, + { .compatible = "qcom,pcie-x1e80100", .data = (ulong)&ops_1_9_0 }, + { } +}; + +U_BOOT_DRIVER(qcom_dw_pcie) = { + .name = "pcie_dw_qcom", + .id = UCLASS_PCI, + .of_match = qcom_pcie_ids, + .ops = &qcom_pcie_ops, + .probe = qcom_pcie_probe, + .priv_auto = sizeof(struct qcom_pcie), +}; diff --git a/drivers/pci/pcie_mediatek_gen3.c b/drivers/pci/pcie_mediatek_gen3.c index 0149edae0bf..1818d4c1e30 100644 --- a/drivers/pci/pcie_mediatek_gen3.c +++ b/drivers/pci/pcie_mediatek_gen3.c @@ -83,6 +83,28 @@ struct mtk_pcie { struct phy phy; }; +static pci_dev_t convert_bdf(const struct udevice *controller, pci_dev_t bdf) +{ + int bdfs[3]; + + bdfs[0] = PCI_BUS(bdf); + bdfs[1] = PCI_DEV(bdf); + bdfs[2] = PCI_FUNC(bdf); + + /* + * One MediaTek PCIe Gen3 controller has only one port, where PCI bus 0 on + * this port represents the controller itself and bus 1 represents the + * external PCIe device. If multiple PCIe controllers are probed in U-Boot, + * U-Boot will use bus numbers greater than 2 as input parameters. Therefore, + * we should convert the BDF bus number to either 0 or 1 by subtracting the + * offset by controller->seq_ + */ + + bdfs[0] = bdfs[0] - controller->seq_; + + return PCI_BDF(bdfs[0], bdfs[1], bdfs[2]); +} + static void mtk_pcie_config_tlp_header(const struct udevice *bus, pci_dev_t devfn, int where, int size) @@ -91,6 +113,8 @@ static void mtk_pcie_config_tlp_header(const struct udevice *bus, int bytes; u32 val; + devfn = convert_bdf(bus, devfn); + size = 1 << size; bytes = (GENMASK(size - 1, 0) & 0xf) << (where & 0x3); diff --git a/drivers/phy/qcom/Kconfig b/drivers/phy/qcom/Kconfig index 5c77203d606..61e5e2fca41 100644 --- a/drivers/phy/qcom/Kconfig +++ b/drivers/phy/qcom/Kconfig @@ -12,6 +12,12 @@ config PHY_QCOM_IPQ4019_USB help Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s. +config PHY_QCOM_QMP_PCIE + tristate "Qualcomm QMP PCIe PHY driver" + depends on PHY && ARCH_SNAPDRAGON + help + Enable this to support the PCIe QMP PHY on various Qualcomm chipsets. + config PHY_QCOM_QMP_UFS tristate "Qualcomm QMP UFS PHY driver" depends on PHY && ARCH_SNAPDRAGON diff --git a/drivers/phy/qcom/Makefile b/drivers/phy/qcom/Makefile index dc3ed492696..1c4e7d8d391 100644 --- a/drivers/phy/qcom/Makefile +++ b/drivers/phy/qcom/Makefile @@ -1,5 +1,6 @@ obj-$(CONFIG_PHY_QCOM_IPQ4019_USB) += phy-qcom-ipq4019-usb.o obj-$(CONFIG_MSM8916_USB_PHY) += msm8916-usbh-phy.o +obj-$(CONFIG_PHY_QCOM_QMP_PCIE) += phy-qcom-qmp-pcie.o obj-$(CONFIG_PHY_QCOM_QMP_UFS) += phy-qcom-qmp-ufs.o obj-$(CONFIG_PHY_QCOM_QUSB2) += phy-qcom-qusb2.o obj-$(CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2) += phy-qcom-snps-femto-v2.o diff --git a/drivers/phy/qcom/phy-qcom-qmp-pcie-qhp.h b/drivers/phy/qcom/phy-qcom-qmp-pcie-qhp.h new file mode 100644 index 00000000000..e4a4d2cd85e --- /dev/null +++ b/drivers/phy/qcom/phy-qcom-qmp-pcie-qhp.h @@ -0,0 +1,123 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2017, The Linux Foundation. All rights reserved. + */ + +#ifndef QCOM_PHY_QMP_PCIE_QHP_H_ +#define QCOM_PHY_QMP_PCIE_QHP_H_ + +/* PCIE GEN3 COM registers */ +#define PCIE_GEN3_QHP_COM_SSC_EN_CENTER 0x14 +#define PCIE_GEN3_QHP_COM_SSC_PER1 0x20 +#define PCIE_GEN3_QHP_COM_SSC_PER2 0x24 +#define PCIE_GEN3_QHP_COM_SSC_STEP_SIZE1 0x28 +#define PCIE_GEN3_QHP_COM_SSC_STEP_SIZE2 0x2c +#define PCIE_GEN3_QHP_COM_SSC_STEP_SIZE1_MODE1 0x34 +#define PCIE_GEN3_QHP_COM_SSC_STEP_SIZE2_MODE1 0x38 +#define PCIE_GEN3_QHP_COM_BIAS_EN_CKBUFLR_EN 0x54 +#define PCIE_GEN3_QHP_COM_CLK_ENABLE1 0x58 +#define PCIE_GEN3_QHP_COM_LOCK_CMP1_MODE0 0x6c +#define PCIE_GEN3_QHP_COM_LOCK_CMP2_MODE0 0x70 +#define PCIE_GEN3_QHP_COM_LOCK_CMP1_MODE1 0x78 +#define PCIE_GEN3_QHP_COM_LOCK_CMP2_MODE1 0x7c +#define PCIE_GEN3_QHP_COM_BGV_TRIM 0x98 +#define PCIE_GEN3_QHP_COM_CP_CTRL_MODE0 0xb4 +#define PCIE_GEN3_QHP_COM_CP_CTRL_MODE1 0xb8 +#define PCIE_GEN3_QHP_COM_PLL_RCTRL_MODE0 0xc0 +#define PCIE_GEN3_QHP_COM_PLL_RCTRL_MODE1 0xc4 +#define PCIE_GEN3_QHP_COM_PLL_CCTRL_MODE0 0xcc +#define PCIE_GEN3_QHP_COM_PLL_CCTRL_MODE1 0xd0 +#define PCIE_GEN3_QHP_COM_SYSCLK_EN_SEL 0xdc +#define PCIE_GEN3_QHP_COM_RESTRIM_CTRL2 0xf0 +#define PCIE_GEN3_QHP_COM_LOCK_CMP_EN 0xf8 +#define PCIE_GEN3_QHP_COM_DEC_START_MODE0 0x100 +#define PCIE_GEN3_QHP_COM_DEC_START_MODE1 0x108 +#define PCIE_GEN3_QHP_COM_DIV_FRAC_START1_MODE0 0x11c +#define PCIE_GEN3_QHP_COM_DIV_FRAC_START2_MODE0 0x120 +#define PCIE_GEN3_QHP_COM_DIV_FRAC_START3_MODE0 0x124 +#define PCIE_GEN3_QHP_COM_DIV_FRAC_START1_MODE1 0x128 +#define PCIE_GEN3_QHP_COM_DIV_FRAC_START2_MODE1 0x12c +#define PCIE_GEN3_QHP_COM_DIV_FRAC_START3_MODE1 0x130 +#define PCIE_GEN3_QHP_COM_INTEGLOOP_GAIN0_MODE0 0x150 +#define PCIE_GEN3_QHP_COM_INTEGLOOP_GAIN0_MODE1 0x158 +#define PCIE_GEN3_QHP_COM_VCO_TUNE_MAP 0x178 +#define PCIE_GEN3_QHP_COM_BG_CTRL 0x1c8 +#define PCIE_GEN3_QHP_COM_CLK_SELECT 0x1cc +#define PCIE_GEN3_QHP_COM_HSCLK_SEL1 0x1d0 +#define PCIE_GEN3_QHP_COM_CORECLK_DIV 0x1e0 +#define PCIE_GEN3_QHP_COM_CORE_CLK_EN 0x1e8 +#define PCIE_GEN3_QHP_COM_CMN_CONFIG 0x1f0 +#define PCIE_GEN3_QHP_COM_SVS_MODE_CLK_SEL 0x1fc +#define PCIE_GEN3_QHP_COM_CORECLK_DIV_MODE1 0x21c +#define PCIE_GEN3_QHP_COM_CMN_MODE 0x224 +#define PCIE_GEN3_QHP_COM_VREGCLK_DIV1 0x228 +#define PCIE_GEN3_QHP_COM_VREGCLK_DIV2 0x22c + +/* PCIE GEN3 QHP Lane registers */ +#define PCIE_GEN3_QHP_L0_DRVR_CTRL0 0xc +#define PCIE_GEN3_QHP_L0_DRVR_CTRL1 0x10 +#define PCIE_GEN3_QHP_L0_DRVR_CTRL2 0x14 +#define PCIE_GEN3_QHP_L0_DRVR_TAP_EN 0x18 +#define PCIE_GEN3_QHP_L0_TX_BAND_MODE 0x60 +#define PCIE_GEN3_QHP_L0_LANE_MODE 0x64 +#define PCIE_GEN3_QHP_L0_PARALLEL_RATE 0x7c +#define PCIE_GEN3_QHP_L0_CML_CTRL_MODE0 0xc0 +#define PCIE_GEN3_QHP_L0_CML_CTRL_MODE1 0xc4 +#define PCIE_GEN3_QHP_L0_CML_CTRL_MODE2 0xc8 +#define PCIE_GEN3_QHP_L0_PREAMP_CTRL_MODE1 0xd0 +#define PCIE_GEN3_QHP_L0_PREAMP_CTRL_MODE2 0xd4 +#define PCIE_GEN3_QHP_L0_MIXER_CTRL_MODE0 0xd8 +#define PCIE_GEN3_QHP_L0_MIXER_CTRL_MODE1 0xdc +#define PCIE_GEN3_QHP_L0_MIXER_CTRL_MODE2 0xe0 +#define PCIE_GEN3_QHP_L0_CTLE_THRESH_DFE 0xfc +#define PCIE_GEN3_QHP_L0_CGA_THRESH_DFE 0x100 +#define PCIE_GEN3_QHP_L0_RXENGINE_EN0 0x108 +#define PCIE_GEN3_QHP_L0_CTLE_TRAIN_TIME 0x114 +#define PCIE_GEN3_QHP_L0_CTLE_DFE_OVRLP_TIME 0x118 +#define PCIE_GEN3_QHP_L0_DFE_REFRESH_TIME 0x11c +#define PCIE_GEN3_QHP_L0_DFE_ENABLE_TIME 0x120 +#define PCIE_GEN3_QHP_L0_VGA_GAIN 0x124 +#define PCIE_GEN3_QHP_L0_DFE_GAIN 0x128 +#define PCIE_GEN3_QHP_L0_EQ_GAIN 0x130 +#define PCIE_GEN3_QHP_L0_OFFSET_GAIN 0x134 +#define PCIE_GEN3_QHP_L0_PRE_GAIN 0x138 +#define PCIE_GEN3_QHP_L0_VGA_INITVAL 0x13c +#define PCIE_GEN3_QHP_L0_EQ_INTVAL 0x154 +#define PCIE_GEN3_QHP_L0_EDAC_INITVAL 0x160 +#define PCIE_GEN3_QHP_L0_RXEQ_INITB0 0x168 +#define PCIE_GEN3_QHP_L0_RXEQ_INITB1 0x16c +#define PCIE_GEN3_QHP_L0_RCVRDONE_THRESH1 0x178 +#define PCIE_GEN3_QHP_L0_RXEQ_CTRL 0x180 +#define PCIE_GEN3_QHP_L0_UCDR_FO_GAIN_MODE0 0x184 +#define PCIE_GEN3_QHP_L0_UCDR_FO_GAIN_MODE1 0x188 +#define PCIE_GEN3_QHP_L0_UCDR_FO_GAIN_MODE2 0x18c +#define PCIE_GEN3_QHP_L0_UCDR_SO_GAIN_MODE0 0x190 +#define PCIE_GEN3_QHP_L0_UCDR_SO_GAIN_MODE1 0x194 +#define PCIE_GEN3_QHP_L0_UCDR_SO_GAIN_MODE2 0x198 +#define PCIE_GEN3_QHP_L0_UCDR_SO_CONFIG 0x19c +#define PCIE_GEN3_QHP_L0_RX_BAND 0x1a4 +#define PCIE_GEN3_QHP_L0_RX_RCVR_PATH1_MODE0 0x1c0 +#define PCIE_GEN3_QHP_L0_RX_RCVR_PATH1_MODE1 0x1c4 +#define PCIE_GEN3_QHP_L0_RX_RCVR_PATH1_MODE2 0x1c8 +#define PCIE_GEN3_QHP_L0_SIGDET_ENABLES 0x230 +#define PCIE_GEN3_QHP_L0_SIGDET_CNTRL 0x234 +#define PCIE_GEN3_QHP_L0_SIGDET_DEGLITCH_CNTRL 0x238 +#define PCIE_GEN3_QHP_L0_DCC_GAIN 0x2a4 +#define PCIE_GEN3_QHP_L0_RSM_START 0x2a8 +#define PCIE_GEN3_QHP_L0_RX_EN_SIGNAL 0x2ac +#define PCIE_GEN3_QHP_L0_PSM_RX_EN_CAL 0x2b0 +#define PCIE_GEN3_QHP_L0_RX_MISC_CNTRL0 0x2b8 +#define PCIE_GEN3_QHP_L0_TS0_TIMER 0x2c0 +#define PCIE_GEN3_QHP_L0_DLL_HIGHDATARATE 0x2c4 +#define PCIE_GEN3_QHP_L0_RX_RESETCODE_OFFSET 0x2cc + +/* PCIE GEN3 PCS registers */ +#define PCIE_GEN3_QHP_PHY_TXMGN_MAIN_V0_M3P5DB 0x2c +#define PCIE_GEN3_QHP_PHY_TXMGN_POST_V0_M3P5DB 0x40 +#define PCIE_GEN3_QHP_PHY_TXMGN_MAIN_V0_M6DB 0x54 +#define PCIE_GEN3_QHP_PHY_TXMGN_POST_V0_M6DB 0x68 +#define PCIE_GEN3_QHP_PHY_POWER_STATE_CONFIG 0x15c +#define PCIE_GEN3_QHP_PHY_POWER_STATE_CONFIG5 0x16c +#define PCIE_GEN3_QHP_PHY_PCS_TX_RX_CONFIG 0x174 + +#endif diff --git a/drivers/phy/qcom/phy-qcom-qmp-pcie.c b/drivers/phy/qcom/phy-qcom-qmp-pcie.c new file mode 100644 index 00000000000..2f6ff259b35 --- /dev/null +++ b/drivers/phy/qcom/phy-qcom-qmp-pcie.c @@ -0,0 +1,1131 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2023 Bhupesh Sharma <bhupesh.sharma@linaro.org> + * + * Based on Linux driver + */ + +#include <clk.h> +#include <clk-uclass.h> +#include <dm.h> +#include <dm/device_compat.h> +#include <dm/devres.h> +#include <generic-phy.h> +#include <malloc.h> +#include <reset.h> +#include <power/regulator.h> + +#include <asm/io.h> +#include <linux/bitops.h> +#include <linux/clk-provider.h> +#include <linux/delay.h> +#include <linux/iopoll.h> +#include <linux/ioport.h> + +#include "phy-qcom-qmp.h" +#include "phy-qcom-qmp-pcs-misc-v3.h" +#include "phy-qcom-qmp-pcs-v5.h" +#include "phy-qcom-qmp-pcs-v6.h" +#include "phy-qcom-qmp-pcs-v6_20.h" +#include "phy-qcom-qmp-pcs-pcie-v6.h" +#include "phy-qcom-qmp-pcs-pcie-v6_20.h" +#include "phy-qcom-qmp-pcie-qhp.h" +#include "phy-qcom-qmp-qserdes-com-v6.h" +#include "phy-qcom-qmp-qserdes-txrx-v6.h" +#include "phy-qcom-qmp-qserdes-txrx-v6_20.h" +#include "phy-qcom-qmp-qserdes-ln-shrd-v6.h" + +/* QPHY_SW_RESET bit */ +#define SW_RESET BIT(0) +/* QPHY_POWER_DOWN_CONTROL */ +#define SW_PWRDN BIT(0) +#define REFCLK_DRV_DSBL BIT(1) +/* QPHY_START_CONTROL bits */ +#define SERDES_START BIT(0) +#define PCS_START BIT(1) +/* QPHY_PCS_READY_STATUS bit */ +#define PCS_READY BIT(0) + +/* QPHY_PCS_STATUS bit */ +#define PHYSTATUS BIT(6) +#define PHYSTATUS_4_20 BIT(7) + +#define PHY_INIT_COMPLETE_TIMEOUT (200 * 10000) + +#define NUM_SUPPLIES 3 + +struct qmp_pcie_init_tbl { + unsigned int offset; + unsigned int val; + /* + * mask of lanes for which this register is written + * for cases when second lane needs different values + */ + u8 lane_mask; +}; + +#define QMP_PHY_INIT_CFG(o, v) \ + { \ + .offset = o, \ + .val = v, \ + .lane_mask = 0xff, \ + } + +#define QMP_PHY_INIT_CFG_LANE(o, v, l) \ + { \ + .offset = o, \ + .val = v, \ + .lane_mask = l, \ + } + +/* set of registers with offsets different per-PHY */ +enum qphy_reg_layout { + /* PCS registers */ + QPHY_SW_RESET, + QPHY_START_CTRL, + QPHY_PCS_STATUS, + QPHY_PCS_POWER_DOWN_CONTROL, + /* Keep last to ensure regs_layout arrays are properly initialized */ + QPHY_LAYOUT_SIZE +}; + +static const unsigned int pciephy_v5_regs_layout[QPHY_LAYOUT_SIZE] = { + [QPHY_SW_RESET] = QPHY_V5_PCS_SW_RESET, + [QPHY_START_CTRL] = QPHY_V5_PCS_START_CONTROL, + [QPHY_PCS_STATUS] = QPHY_V5_PCS_PCS_STATUS1, + [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V5_PCS_POWER_DOWN_CONTROL, +}; + +static const unsigned int pciephy_v6_regs_layout[QPHY_LAYOUT_SIZE] = { + [QPHY_SW_RESET] = QPHY_V6_PCS_SW_RESET, + [QPHY_START_CTRL] = QPHY_V6_PCS_START_CONTROL, + [QPHY_PCS_STATUS] = QPHY_V6_PCS_PCS_STATUS1, + [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V6_PCS_POWER_DOWN_CONTROL, +}; + +static const struct qmp_pcie_init_tbl sm8550_qmp_gen3x2_pcie_serdes_tbl[] = { + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_EN_CENTER, 0x01), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_PER1, 0x62), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_PER2, 0x02), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE1_MODE0, 0xf8), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE2_MODE0, 0x01), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE1_MODE1, 0x93), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE2_MODE1, 0x01), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CLK_ENABLE1, 0x90), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SYS_CLK_CTRL, 0x82), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_IVCO, 0x07), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CP_CTRL_MODE0, 0x02), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CP_CTRL_MODE1, 0x02), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_RCTRL_MODE0, 0x16), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_RCTRL_MODE1, 0x16), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_CCTRL_MODE0, 0x36), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_CCTRL_MODE1, 0x36), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SYSCLK_EN_SEL, 0x08), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_BG_TIMER, 0x0a), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP_EN, 0x42), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP1_MODE0, 0x04), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP2_MODE0, 0x0d), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP1_MODE1, 0x0a), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP2_MODE1, 0x1a), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DEC_START_MODE0, 0x41), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DEC_START_MODE1, 0x34), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START1_MODE0, 0xab), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START2_MODE0, 0xaa), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START3_MODE0, 0x01), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START1_MODE1, 0x55), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START2_MODE1, 0x55), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START3_MODE1, 0x01), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_VCO_TUNE_MAP, 0x14), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CLK_SELECT, 0x34), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_HSCLK_SEL_1, 0x01), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CORECLK_DIV_MODE1, 0x04), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CMN_CONFIG_1, 0x16), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_ADDITIONAL_MISC_3, 0x0f), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CORE_CLK_EN, 0xa0), +}; + +static const struct qmp_pcie_init_tbl sm8550_qmp_gen3x2_pcie_tx_tbl[] = { + QMP_PHY_INIT_CFG(QSERDES_V6_TX_LANE_MODE_1, 0x15), + QMP_PHY_INIT_CFG(QSERDES_V6_TX_LANE_MODE_4, 0x3f), + QMP_PHY_INIT_CFG(QSERDES_V6_TX_PI_QEC_CTRL, 0x02), + QMP_PHY_INIT_CFG(QSERDES_V6_TX_RES_CODE_LANE_OFFSET_RX, 0x06), + QMP_PHY_INIT_CFG(QSERDES_V6_TX_RES_CODE_LANE_OFFSET_TX, 0x18), +}; + +static const struct qmp_pcie_init_tbl sm8550_qmp_gen3x2_pcie_rx_tbl[] = { + QMP_PHY_INIT_CFG(QSERDES_V6_RX_DFE_CTLE_POST_CAL_OFFSET, 0x38), + QMP_PHY_INIT_CFG(QSERDES_V6_RX_GM_CAL, 0x11), + QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_MODE_00_HIGH, 0xbf), + QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_MODE_00_HIGH2, 0xbf), + QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_MODE_00_HIGH3, 0xb7), + QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_MODE_00_HIGH4, 0xea), + QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_MODE_00_LOW, 0x3f), + QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_MODE_01_HIGH, 0x5c), + QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_MODE_01_HIGH2, 0x9c), + QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_MODE_01_HIGH3, 0x1a), + QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_MODE_01_HIGH4, 0x89), + QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_MODE_01_LOW, 0xdc), + QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_MODE_10_HIGH, 0x94), + QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_MODE_10_HIGH2, 0x5b), + QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_MODE_10_HIGH3, 0x1a), + QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_MODE_10_HIGH4, 0x89), + QMP_PHY_INIT_CFG(QSERDES_V6_RX_TX_ADAPT_POST_THRESH, 0x00), + QMP_PHY_INIT_CFG(QSERDES_V6_RX_UCDR_FO_GAIN, 0x09), + QMP_PHY_INIT_CFG(QSERDES_V6_RX_UCDR_SO_GAIN, 0x05), + QMP_PHY_INIT_CFG(QSERDES_V6_RX_UCDR_SB2_THRESH1, 0x08), + QMP_PHY_INIT_CFG(QSERDES_V6_RX_UCDR_SB2_THRESH2, 0x08), + QMP_PHY_INIT_CFG(QSERDES_V6_RX_VGA_CAL_CNTRL2, 0x0f), + QMP_PHY_INIT_CFG(QSERDES_V6_RX_SIDGET_ENABLES, 0x1c), + QMP_PHY_INIT_CFG(QSERDES_V6_RX_RX_IDAC_TSETTLE_LOW, 0x07), + QMP_PHY_INIT_CFG(QSERDES_V6_RX_SIGDET_CAL_TRIM, 0x08), +}; + +static const struct qmp_pcie_init_tbl sm8550_qmp_gen3x2_pcie_pcs_tbl[] = { + QMP_PHY_INIT_CFG(QPHY_V6_PCS_REFGEN_REQ_CONFIG1, 0x05), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_RX_SIGDET_LVL, 0x77), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_RATE_SLEW_CNTRL1, 0x0b), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_EQ_CONFIG2, 0x0f), + QMP_PHY_INIT_CFG(QPHY_V6_PCS_PCS_TX_RX_CONFIG, 0x8c), +}; + +static const struct qmp_pcie_init_tbl sm8550_qmp_gen3x2_pcie_pcs_misc_tbl[] = { + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_PCS_PCIE_EQ_CONFIG1, 0x1e), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_PCS_PCIE_RXEQEVAL_TIME, 0x27), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_PCS_PCIE_POWER_STATE_CONFIG2, 0x1d), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_PCS_PCIE_POWER_STATE_CONFIG4, 0x07), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_PCS_PCIE_ENDPOINT_REFCLK_DRIVE, 0xc1), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_PCS_PCIE_OSC_DTCT_ACTIONS, 0x00), +}; + +static const struct qmp_pcie_init_tbl sm8550_qmp_gen4x2_pcie_serdes_tbl[] = { + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE1_MODE1, 0x26), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE2_MODE1, 0x03), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CP_CTRL_MODE1, 0x06), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_RCTRL_MODE1, 0x16), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_CCTRL_MODE1, 0x36), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CORECLK_DIV_MODE1, 0x04), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP1_MODE1, 0x0a), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP2_MODE1, 0x1a), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DEC_START_MODE1, 0x68), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START1_MODE1, 0xab), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START2_MODE1, 0xaa), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START3_MODE1, 0x02), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_HSCLK_SEL_1, 0x12), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE1_MODE0, 0xf8), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE2_MODE0, 0x01), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CP_CTRL_MODE0, 0x06), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_RCTRL_MODE0, 0x16), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_CCTRL_MODE0, 0x36), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_CORE_CLK_DIV_MODE0, 0x0a), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP1_MODE0, 0x04), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP2_MODE0, 0x0d), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DEC_START_MODE0, 0x41), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START1_MODE0, 0xab), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START2_MODE0, 0xaa), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START3_MODE0, 0x01), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_HSCLK_HS_SWITCH_SEL_1, 0x00), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_BG_TIMER, 0x0a), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_EN_CENTER, 0x01), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_PER1, 0x62), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_PER2, 0x02), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_POST_DIV_MUX, 0x40), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_BIAS_EN_CLK_BUFLR_EN, 0x14), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CLK_ENABLE1, 0x90), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SYS_CLK_CTRL, 0x82), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_IVCO, 0x0f), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SYSCLK_EN_SEL, 0x08), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP_EN, 0x46), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP_CFG, 0x04), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_VCO_TUNE_MAP, 0x14), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CLK_SELECT, 0x34), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CORE_CLK_EN, 0xa0), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CMN_CONFIG_1, 0x06), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CMN_MISC_1, 0x88), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CMN_MODE, 0x14), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_VCO_DC_LEVEL_CTRL, 0x0f), +}; + +static const struct qmp_pcie_init_tbl sm8550_qmp_gen4x2_pcie_ln_shrd_tbl[] = { + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RXCLK_DIV2_CTRL, 0x01), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_DFE_DAC_ENABLE1, 0x00), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_TX_ADAPT_POST_THRESH1, 0x02), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_TX_ADAPT_POST_THRESH2, 0x0d), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B0, 0x12), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B1, 0x12), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B2, 0xdb), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B3, 0x9a), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B4, 0x38), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B5, 0xb6), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B6, 0x64), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH1_RATE210, 0x1f), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH1_RATE3, 0x1f), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH2_RATE210, 0x1f), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH2_RATE3, 0x1f), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH3_RATE210, 0x1f), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH3_RATE3, 0x1f), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH4_RATE3, 0x1f), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH5_RATE3, 0x1f), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH6_RATE3, 0x1f), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_SUMMER_CAL_SPD_MODE, 0x5b), +}; + +static const struct qmp_pcie_init_tbl sm8550_qmp_gen4x2_pcie_tx_tbl[] = { + QMP_PHY_INIT_CFG(QSERDES_V6_20_TX_RES_CODE_LANE_OFFSET_TX, 0x1d), + QMP_PHY_INIT_CFG(QSERDES_V6_20_TX_RES_CODE_LANE_OFFSET_RX, 0x03), + QMP_PHY_INIT_CFG(QSERDES_V6_20_TX_LANE_MODE_1, 0x01), + QMP_PHY_INIT_CFG(QSERDES_V6_20_TX_LANE_MODE_2, 0x00), + QMP_PHY_INIT_CFG(QSERDES_V6_20_TX_LANE_MODE_3, 0x51), + QMP_PHY_INIT_CFG(QSERDES_V6_20_TX_TRAN_DRVR_EMP_EN, 0x34), +}; + +static const struct qmp_pcie_init_tbl sm8550_qmp_gen4x2_pcie_rx_tbl[] = { + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_UCDR_FO_GAIN_RATE_2, 0x0c), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_UCDR_FO_GAIN_RATE_3, 0x0a), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_UCDR_SO_GAIN_RATE_2, 0x04), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_UCDR_PI_CONTROLS, 0x16), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_UCDR_SO_ACC_DEFAULT_VAL_RATE3, 0x00), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_IVCM_CAL_CTRL2, 0x80), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_IVCM_POSTCAL_OFFSET, 0x7c), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_DFE_3, 0x05), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_TX_ADPT_CTRL, 0x10), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_VGA_CAL_MAN_VAL, 0x0a), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_GM_CAL, 0x0d), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_EQU_ADAPTOR_CNTRL4, 0x0b), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_SIGDET_ENABLES, 0x1c), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_PHPRE_CTRL, 0x20), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_DFE_CTLE_POST_CAL_OFFSET, 0x30), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_Q_PI_INTRINSIC_BIAS_RATE32, 0x09), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE2_B0, 0x14), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE2_B1, 0xb3), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE2_B2, 0x58), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE2_B3, 0x9a), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE2_B4, 0x26), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE2_B5, 0xb6), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE2_B6, 0xee), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE3_B0, 0xdb), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE3_B1, 0xdb), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE3_B2, 0xa0), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE3_B3, 0xdf), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE3_B4, 0x78), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE3_B5, 0x76), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE3_B6, 0xff), + QMP_PHY_INIT_CFG(QSERDES_V6_20_VGA_CAL_CNTRL1, 0x00), +}; + +static const struct qmp_pcie_init_tbl sm8550_qmp_gen4x2_pcie_pcs_tbl[] = { + QMP_PHY_INIT_CFG(QPHY_V6_20_PCS_G12S1_TXDEEMPH_M6DB, 0x17), + QMP_PHY_INIT_CFG(QPHY_V6_20_PCS_G3S2_PRE_GAIN, 0x2e), + QMP_PHY_INIT_CFG(QPHY_V6_20_PCS_RX_SIGDET_LVL, 0xcc), + QMP_PHY_INIT_CFG(QPHY_V6_20_PCS_EQ_CONFIG4, 0x00), + QMP_PHY_INIT_CFG(QPHY_V6_20_PCS_EQ_CONFIG5, 0x22), + QMP_PHY_INIT_CFG(QPHY_V6_20_PCS_TX_RX_CONFIG1, 0x04), + QMP_PHY_INIT_CFG(QPHY_V6_20_PCS_TX_RX_CONFIG2, 0x02), +}; + +static const struct qmp_pcie_init_tbl sm8550_qmp_gen4x2_pcie_pcs_misc_tbl[] = { + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_20_PCS_ENDPOINT_REFCLK_DRIVE, 0xc1), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_20_PCS_OSC_DTCT_ATCIONS, 0x00), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_20_PCS_EQ_CONFIG1, 0x16), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_20_PCS_G3_RXEQEVAL_TIME, 0x27), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_20_PCS_G4_RXEQEVAL_TIME, 0x27), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_20_PCS_EQ_CONFIG5, 0x02), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_20_PCS_G4_PRE_GAIN, 0x2e), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_20_PCS_RX_MARGINING_CONFIG1, 0x03), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_20_PCS_RX_MARGINING_CONFIG3, 0x28), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_20_PCS_TX_RX_CONFIG, 0xc0), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_20_PCS_POWER_STATE_CONFIG2, 0x1d), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_20_PCS_RX_MARGINING_CONFIG5, 0x0f), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_20_PCS_G3_FOM_EQ_CONFIG5, 0xf2), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_20_PCS_G4_FOM_EQ_CONFIG5, 0xf2), +}; + +static const struct qmp_pcie_init_tbl sm8650_qmp_gen4x2_pcie_rx_tbl[] = { + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_UCDR_FO_GAIN_RATE_2, 0x0a), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_UCDR_FO_GAIN_RATE_3, 0x0a), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_UCDR_PI_CONTROLS, 0x16), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_UCDR_SO_ACC_DEFAULT_VAL_RATE3, 0x00), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_IVCM_CAL_CTRL2, 0x82), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_DFE_3, 0x05), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_VGA_CAL_MAN_VAL, 0x0a), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_GM_CAL, 0x0d), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_EQU_ADAPTOR_CNTRL4, 0x0b), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_SIGDET_ENABLES, 0x1c), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_PHPRE_CTRL, 0x20), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_DFE_CTLE_POST_CAL_OFFSET, 0x38), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE2_B0, 0xd3), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE2_B1, 0xd3), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE2_B2, 0x00), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE2_B3, 0x9a), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE2_B4, 0x06), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE2_B5, 0xb6), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE2_B6, 0xee), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE3_B0, 0x23), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE3_B1, 0x9b), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE3_B2, 0x60), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE3_B3, 0xdf), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE3_B4, 0x43), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE3_B5, 0x76), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE3_B6, 0xff), +}; + +static const struct qmp_pcie_init_tbl x1e80100_qmp_gen4x2_pcie_serdes_tbl[] = { + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE1_MODE1, 0x26), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE2_MODE1, 0x03), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CP_CTRL_MODE1, 0x06), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_RCTRL_MODE1, 0x16), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_CCTRL_MODE1, 0x36), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CORECLK_DIV_MODE1, 0x04), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP1_MODE1, 0x0a), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP2_MODE1, 0x1a), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DEC_START_MODE1, 0x68), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START1_MODE1, 0xab), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START2_MODE1, 0xaa), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START3_MODE1, 0x02), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_HSCLK_SEL_1, 0x12), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE1_MODE0, 0xf8), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_STEP_SIZE2_MODE0, 0x01), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CP_CTRL_MODE0, 0x06), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_RCTRL_MODE0, 0x16), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_CCTRL_MODE0, 0x36), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_CORE_CLK_DIV_MODE0, 0x0a), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP1_MODE0, 0x04), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP2_MODE0, 0x0d), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DEC_START_MODE0, 0x41), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START1_MODE0, 0xab), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START2_MODE0, 0xaa), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_DIV_FRAC_START3_MODE0, 0x01), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_HSCLK_HS_SWITCH_SEL_1, 0x00), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_BG_TIMER, 0x0a), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_EN_CENTER, 0x01), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_PER1, 0x62), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SSC_PER2, 0x02), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_POST_DIV_MUX, 0x40), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_BIAS_EN_CLK_BUFLR_EN, 0x14), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CLK_ENABLE1, 0x90), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SYS_CLK_CTRL, 0x82), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_IVCO, 0x0f), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_SYSCLK_EN_SEL, 0x08), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP_EN, 0x46), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_LOCK_CMP_CFG, 0x04), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_VCO_TUNE_MAP, 0x14), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CLK_SELECT, 0x34), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CORE_CLK_EN, 0xa0), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CMN_CONFIG_1, 0x06), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CMN_MISC_1, 0x88), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_CMN_MODE, 0x14), + QMP_PHY_INIT_CFG(QSERDES_V6_COM_PLL_VCO_DC_LEVEL_CTRL, 0x0f), +}; + +static const struct qmp_pcie_init_tbl x1e80100_qmp_gen4x2_pcie_ln_shrd_tbl[] = { + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RXCLK_DIV2_CTRL, 0x01), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_DFE_DAC_ENABLE1, 0x88), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_TX_ADAPT_POST_THRESH1, 0x02), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_TX_ADAPT_POST_THRESH2, 0x0d), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B0, 0xd4), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B1, 0x12), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B2, 0xdb), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B3, 0x9a), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B4, 0x32), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B5, 0xb6), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B6, 0x64), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH1_RATE210, 0x1f), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH1_RATE3, 0x1f), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH2_RATE210, 0x1f), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH2_RATE3, 0x1f), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH3_RATE210, 0x1f), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH3_RATE3, 0x1f), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH4_RATE3, 0x1f), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH5_RATE3, 0x1f), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH6_RATE3, 0x1f), + QMP_PHY_INIT_CFG(QSERDES_V6_LN_SHRD_RX_SUMMER_CAL_SPD_MODE, 0x5b), +}; + +static const struct qmp_pcie_init_tbl x1e80100_qmp_gen4x2_pcie_tx_tbl[] = { + QMP_PHY_INIT_CFG(QSERDES_V6_20_TX_RES_CODE_LANE_OFFSET_TX, 0x1d), + QMP_PHY_INIT_CFG(QSERDES_V6_20_TX_RES_CODE_LANE_OFFSET_RX, 0x03), + QMP_PHY_INIT_CFG(QSERDES_V6_20_TX_LANE_MODE_1, 0x01), + QMP_PHY_INIT_CFG(QSERDES_V6_20_TX_LANE_MODE_2, 0x10), + QMP_PHY_INIT_CFG(QSERDES_V6_20_TX_LANE_MODE_3, 0x51), + QMP_PHY_INIT_CFG(QSERDES_V6_20_TX_TRAN_DRVR_EMP_EN, 0x34), +}; + +static const struct qmp_pcie_init_tbl x1e80100_qmp_gen4x2_pcie_rx_tbl[] = { + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_UCDR_FO_GAIN_RATE_2, 0x0c), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_UCDR_SO_GAIN_RATE_2, 0x04), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_UCDR_FO_GAIN_RATE_3, 0x0a), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_UCDR_PI_CONTROLS, 0x16), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_UCDR_SO_ACC_DEFAULT_VAL_RATE3, 0x00), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_IVCM_CAL_CTRL2, 0x80), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_IVCM_POSTCAL_OFFSET, 0x00), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_BKUP_CTRL1, 0x15), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_DFE_1, 0x01), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_DFE_2, 0x01), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_DFE_3, 0x45), + QMP_PHY_INIT_CFG_LANE(QSERDES_V6_20_RX_VGA_CAL_MAN_VAL, 0x0a, 1), + QMP_PHY_INIT_CFG_LANE(QSERDES_V6_20_RX_VGA_CAL_MAN_VAL, 0x0b, 2), + QMP_PHY_INIT_CFG(QSERDES_V6_20_VGA_CAL_CNTRL1, 0x00), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_GM_CAL, 0x0d), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_EQU_ADAPTOR_CNTRL4, 0x0b), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_SIGDET_ENABLES, 0x1c), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_PHPRE_CTRL, 0x20), + QMP_PHY_INIT_CFG_LANE(QSERDES_V6_20_RX_DFE_CTLE_POST_CAL_OFFSET, 0x3a, 1), + QMP_PHY_INIT_CFG_LANE(QSERDES_V6_20_RX_DFE_CTLE_POST_CAL_OFFSET, 0x38, 2), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_Q_PI_INTRINSIC_BIAS_RATE32, 0x39), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE2_B0, 0x14), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE2_B1, 0xb3), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE2_B2, 0x58), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE2_B3, 0x9a), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE2_B4, 0x26), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE2_B5, 0xb6), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE2_B6, 0xee), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE3_B0, 0xe4), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE3_B1, 0xa4), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE3_B2, 0x60), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE3_B3, 0xdf), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE3_B4, 0x4b), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE3_B5, 0x76), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_MODE_RATE3_B6, 0xff), + QMP_PHY_INIT_CFG(QSERDES_V6_20_RX_TX_ADPT_CTRL, 0x10), +}; + +static const struct qmp_pcie_init_tbl x1e80100_qmp_gen4x2_pcie_pcs_tbl[] = { + QMP_PHY_INIT_CFG(QPHY_V6_20_PCS_G3S2_PRE_GAIN, 0x2e), + QMP_PHY_INIT_CFG(QPHY_V6_20_PCS_RX_SIGDET_LVL, 0xcc), + QMP_PHY_INIT_CFG(QPHY_V6_20_PCS_EQ_CONFIG4, 0x00), + QMP_PHY_INIT_CFG(QPHY_V6_20_PCS_EQ_CONFIG5, 0x22), + QMP_PHY_INIT_CFG(QPHY_V6_20_PCS_TX_RX_CONFIG1, 0x04), + QMP_PHY_INIT_CFG(QPHY_V6_20_PCS_TX_RX_CONFIG2, 0x02), +}; + +static const struct qmp_pcie_init_tbl x1e80100_qmp_gen4x2_pcie_pcs_misc_tbl[] = { + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_20_PCS_ENDPOINT_REFCLK_DRIVE, 0xc1), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_20_PCS_OSC_DTCT_ATCIONS, 0x00), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_20_PCS_EQ_CONFIG1, 0x16), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_20_PCS_EQ_CONFIG5, 0x02), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_20_PCS_G4_PRE_GAIN, 0x2e), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_20_PCS_RX_MARGINING_CONFIG1, 0x03), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_20_PCS_RX_MARGINING_CONFIG3, 0x28), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_20_PCS_G3_RXEQEVAL_TIME, 0x27), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_20_PCS_G4_RXEQEVAL_TIME, 0x27), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_20_PCS_TX_RX_CONFIG, 0xc0), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_20_PCS_POWER_STATE_CONFIG2, 0x1d), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_20_PCS_RX_MARGINING_CONFIG5, 0x18), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_20_PCS_G3_FOM_EQ_CONFIG5, 0x7a), + QMP_PHY_INIT_CFG(QPHY_PCIE_V6_20_PCS_G4_FOM_EQ_CONFIG5, 0x8a), +}; + +struct qmp_pcie_offsets { + u16 serdes; + u16 pcs; + u16 pcs_misc; + u16 tx; + u16 rx; + u16 tx2; + u16 rx2; + u16 ln_shrd; +}; + +struct qmp_pcie_cfg_tbls { + /* Init sequence for PHY blocks - serdes, tx, rx, pcs */ + const struct qmp_pcie_init_tbl *serdes; + int serdes_num; + const struct qmp_pcie_init_tbl *tx; + int tx_num; + const struct qmp_pcie_init_tbl *rx; + int rx_num; + const struct qmp_pcie_init_tbl *pcs; + int pcs_num; + const struct qmp_pcie_init_tbl *pcs_misc; + int pcs_misc_num; + const struct qmp_pcie_init_tbl *ln_shrd; + int ln_shrd_num; +}; + +/* struct qmp_pcie_cfg - per-PHY initialization config */ +struct qmp_pcie_cfg { + int lanes; + + const struct qmp_pcie_offsets *offsets; + + /* Main init sequence for PHY blocks - serdes, tx, rx, pcs */ + const struct qmp_pcie_cfg_tbls tbls; + + /* regulators to be requested */ + const char * const *vreg_list; + int num_vregs; + /* resets to be requested */ + const char * const *reset_list; + int num_resets; + + /* array of registers with different offsets */ + const unsigned int *regs; + + unsigned int pwrdn_ctrl; + /* bit offset of PHYSTATUS in QPHY_PCS_STATUS register */ + unsigned int phy_status; + + bool has_nocsr_reset; +}; + +struct qmp_pcie_priv { + struct phy *phy; + + void __iomem *serdes; + void __iomem *pcs; + void __iomem *pcs_misc; + void __iomem *tx; + void __iomem *rx; + void __iomem *tx2; + void __iomem *rx2; + void __iomem *ln_shrd; + + struct clk *clks; + unsigned int clk_count; + + struct clk pipe_clk; + + struct reset_ctl *resets; + unsigned int reset_count; + + struct reset_ctl nocsr_reset; + + struct udevice *vregs[NUM_SUPPLIES]; + unsigned int vreg_count; + + const struct qmp_pcie_cfg *cfg; + struct udevice *dev; +}; + +static inline void qphy_setbits(void __iomem *base, u32 offset, u32 val) +{ + u32 reg; + + reg = readl(base + offset); + reg |= val; + writel(reg, base + offset); + + /* ensure that above write is through */ + readl(base + offset); +} + +static inline void qphy_clrbits(void __iomem *base, u32 offset, u32 val) +{ + u32 reg; + + reg = readl(base + offset); + reg &= ~val; + writel(reg, base + offset); + + /* ensure that above write is through */ + readl(base + offset); +} + +/* list of clocks required by phy */ +static const char * const qmp_pciephy_clk_l[] = { + "aux", "cfg_ahb", "ref", "rchng", +}; + +/* list of regulators */ +static const char * const qmp_phy_vreg_l[] = { + "vdda-phy-supply", "vdda-pll-supply", +}; + +static const char * const sm8550_qmp_phy_vreg_l[] = { + "vdda-phy-supply", "vdda-pll-supply", "vdda-qref-supply", +}; + +/* list of resets */ +static const char * const sdm845_pciephy_reset_l[] = { + "phy", +}; + +static const struct qmp_pcie_offsets qmp_pcie_offsets_v5 = { + .serdes = 0, + .pcs = 0x0200, + .pcs_misc = 0x0600, + .tx = 0x0e00, + .rx = 0x1000, + .tx2 = 0x1600, + .rx2 = 0x1800, +}; + +static const struct qmp_pcie_offsets qmp_pcie_offsets_v6_20 = { + .serdes = 0x1000, + .pcs = 0x1200, + .pcs_misc = 0x1400, + .tx = 0x0000, + .rx = 0x0200, + .tx2 = 0x0800, + .rx2 = 0x0a00, + .ln_shrd = 0x0e00, +}; + +static const struct qmp_pcie_cfg sm8550_qmp_gen3x2_pciephy_cfg = { + .lanes = 2, + + .offsets = &qmp_pcie_offsets_v5, + + .tbls = { + .serdes = sm8550_qmp_gen3x2_pcie_serdes_tbl, + .serdes_num = ARRAY_SIZE(sm8550_qmp_gen3x2_pcie_serdes_tbl), + .tx = sm8550_qmp_gen3x2_pcie_tx_tbl, + .tx_num = ARRAY_SIZE(sm8550_qmp_gen3x2_pcie_tx_tbl), + .rx = sm8550_qmp_gen3x2_pcie_rx_tbl, + .rx_num = ARRAY_SIZE(sm8550_qmp_gen3x2_pcie_rx_tbl), + .pcs = sm8550_qmp_gen3x2_pcie_pcs_tbl, + .pcs_num = ARRAY_SIZE(sm8550_qmp_gen3x2_pcie_pcs_tbl), + .pcs_misc = sm8550_qmp_gen3x2_pcie_pcs_misc_tbl, + .pcs_misc_num = ARRAY_SIZE(sm8550_qmp_gen3x2_pcie_pcs_misc_tbl), + }, + .reset_list = sdm845_pciephy_reset_l, + .num_resets = ARRAY_SIZE(sdm845_pciephy_reset_l), + .vreg_list = qmp_phy_vreg_l, + .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), + .regs = pciephy_v5_regs_layout, + + .pwrdn_ctrl = SW_PWRDN | REFCLK_DRV_DSBL, + .phy_status = PHYSTATUS, +}; + +static const struct qmp_pcie_cfg sm8550_qmp_gen4x2_pciephy_cfg = { + .lanes = 2, + + .offsets = &qmp_pcie_offsets_v6_20, + + .tbls = { + .serdes = sm8550_qmp_gen4x2_pcie_serdes_tbl, + .serdes_num = ARRAY_SIZE(sm8550_qmp_gen4x2_pcie_serdes_tbl), + .tx = sm8550_qmp_gen4x2_pcie_tx_tbl, + .tx_num = ARRAY_SIZE(sm8550_qmp_gen4x2_pcie_tx_tbl), + .rx = sm8550_qmp_gen4x2_pcie_rx_tbl, + .rx_num = ARRAY_SIZE(sm8550_qmp_gen4x2_pcie_rx_tbl), + .pcs = sm8550_qmp_gen4x2_pcie_pcs_tbl, + .pcs_num = ARRAY_SIZE(sm8550_qmp_gen4x2_pcie_pcs_tbl), + .pcs_misc = sm8550_qmp_gen4x2_pcie_pcs_misc_tbl, + .pcs_misc_num = ARRAY_SIZE(sm8550_qmp_gen4x2_pcie_pcs_misc_tbl), + .ln_shrd = sm8550_qmp_gen4x2_pcie_ln_shrd_tbl, + .ln_shrd_num = ARRAY_SIZE(sm8550_qmp_gen4x2_pcie_ln_shrd_tbl), + }, + .reset_list = sdm845_pciephy_reset_l, + .num_resets = ARRAY_SIZE(sdm845_pciephy_reset_l), + .vreg_list = sm8550_qmp_phy_vreg_l, + .num_vregs = ARRAY_SIZE(sm8550_qmp_phy_vreg_l), + .regs = pciephy_v6_regs_layout, + + .pwrdn_ctrl = SW_PWRDN | REFCLK_DRV_DSBL, + .phy_status = PHYSTATUS_4_20, + .has_nocsr_reset = true, +}; + +static const struct qmp_pcie_cfg sm8650_qmp_gen4x2_pciephy_cfg = { + .lanes = 2, + + .offsets = &qmp_pcie_offsets_v6_20, + + .tbls = { + .serdes = sm8550_qmp_gen4x2_pcie_serdes_tbl, + .serdes_num = ARRAY_SIZE(sm8550_qmp_gen4x2_pcie_serdes_tbl), + .tx = sm8550_qmp_gen4x2_pcie_tx_tbl, + .tx_num = ARRAY_SIZE(sm8550_qmp_gen4x2_pcie_tx_tbl), + .rx = sm8650_qmp_gen4x2_pcie_rx_tbl, + .rx_num = ARRAY_SIZE(sm8650_qmp_gen4x2_pcie_rx_tbl), + .pcs = sm8550_qmp_gen4x2_pcie_pcs_tbl, + .pcs_num = ARRAY_SIZE(sm8550_qmp_gen4x2_pcie_pcs_tbl), + .pcs_misc = sm8550_qmp_gen4x2_pcie_pcs_misc_tbl, + .pcs_misc_num = ARRAY_SIZE(sm8550_qmp_gen4x2_pcie_pcs_misc_tbl), + .ln_shrd = sm8550_qmp_gen4x2_pcie_ln_shrd_tbl, + .ln_shrd_num = ARRAY_SIZE(sm8550_qmp_gen4x2_pcie_ln_shrd_tbl), + }, + .reset_list = sdm845_pciephy_reset_l, + .num_resets = ARRAY_SIZE(sdm845_pciephy_reset_l), + .vreg_list = sm8550_qmp_phy_vreg_l, + .num_vregs = ARRAY_SIZE(sm8550_qmp_phy_vreg_l), + .regs = pciephy_v6_regs_layout, + + .pwrdn_ctrl = SW_PWRDN | REFCLK_DRV_DSBL, + .phy_status = PHYSTATUS_4_20, + .has_nocsr_reset = true, +}; + +static const struct qmp_pcie_cfg x1e80100_qmp_gen4x2_pciephy_cfg = { + .lanes = 2, + + .offsets = &qmp_pcie_offsets_v6_20, + + .tbls = { + .serdes = x1e80100_qmp_gen4x2_pcie_serdes_tbl, + .serdes_num = ARRAY_SIZE(x1e80100_qmp_gen4x2_pcie_serdes_tbl), + .tx = x1e80100_qmp_gen4x2_pcie_tx_tbl, + .tx_num = ARRAY_SIZE(x1e80100_qmp_gen4x2_pcie_tx_tbl), + .rx = x1e80100_qmp_gen4x2_pcie_rx_tbl, + .rx_num = ARRAY_SIZE(x1e80100_qmp_gen4x2_pcie_rx_tbl), + .pcs = x1e80100_qmp_gen4x2_pcie_pcs_tbl, + .pcs_num = ARRAY_SIZE(x1e80100_qmp_gen4x2_pcie_pcs_tbl), + .pcs_misc = x1e80100_qmp_gen4x2_pcie_pcs_misc_tbl, + .pcs_misc_num = ARRAY_SIZE(x1e80100_qmp_gen4x2_pcie_pcs_misc_tbl), + .ln_shrd = x1e80100_qmp_gen4x2_pcie_ln_shrd_tbl, + .ln_shrd_num = ARRAY_SIZE(x1e80100_qmp_gen4x2_pcie_ln_shrd_tbl), + }, + .reset_list = sdm845_pciephy_reset_l, + .num_resets = ARRAY_SIZE(sdm845_pciephy_reset_l), + .vreg_list = qmp_phy_vreg_l, + .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), + .regs = pciephy_v6_regs_layout, + + .pwrdn_ctrl = SW_PWRDN | REFCLK_DRV_DSBL, + .phy_status = PHYSTATUS_4_20, + .has_nocsr_reset = true, +}; + +static void qmp_pcie_configure_lane(void __iomem *base, + const struct qmp_pcie_init_tbl tbl[], + int num, u8 lane_mask) +{ + int i; + const struct qmp_pcie_init_tbl *t = tbl; + + if (!t) + return; + + for (i = 0; i < num; i++, t++) { + if (!(t->lane_mask & lane_mask)) + continue; + + writel(t->val, base + t->offset); + } +} + +static void qmp_pcie_configure(void __iomem *base, + const struct qmp_pcie_init_tbl tbl[], + int num) +{ + qmp_pcie_configure_lane(base, tbl, num, 0xff); +} + +static void qmp_pcie_init_registers(struct qmp_pcie_priv *qmp, const struct qmp_pcie_cfg *cfg) +{ + const struct qmp_pcie_cfg_tbls *tbls = &cfg->tbls; + void __iomem *serdes = qmp->serdes; + void __iomem *tx = qmp->tx; + void __iomem *rx = qmp->rx; + void __iomem *tx2 = qmp->tx2; + void __iomem *rx2 = qmp->rx2; + void __iomem *pcs = qmp->pcs; + void __iomem *pcs_misc = qmp->pcs_misc; + void __iomem *ln_shrd = qmp->ln_shrd; + + qmp_pcie_configure(serdes, tbls->serdes, tbls->serdes_num); + + qmp_pcie_configure_lane(tx, tbls->tx, tbls->tx_num, 1); + qmp_pcie_configure_lane(rx, tbls->rx, tbls->rx_num, 1); + + if (cfg->lanes >= 2) { + qmp_pcie_configure_lane(tx2, tbls->tx, tbls->tx_num, 2); + qmp_pcie_configure_lane(rx2, tbls->rx, tbls->rx_num, 2); + } + + qmp_pcie_configure(pcs, tbls->pcs, tbls->pcs_num); + qmp_pcie_configure(pcs_misc, tbls->pcs_misc, tbls->pcs_misc_num); + + qmp_pcie_configure(ln_shrd, tbls->ln_shrd, tbls->ln_shrd_num); +} + +static int qmp_pcie_do_reset(struct qmp_pcie_priv *qmp) +{ + const struct qmp_pcie_cfg *cfg = qmp->cfg; + int i, ret; + + for (i = 0; i < qmp->reset_count; i++) { + ret = reset_assert(&qmp->resets[i]); + if (ret) + return ret; + } + + if (cfg->has_nocsr_reset) + reset_assert(&qmp->nocsr_reset); + + udelay(10); + + for (i = 0; i < qmp->reset_count; i++) { + ret = reset_deassert(&qmp->resets[i]); + if (ret) + return ret; + } + + udelay(50); + + return 0; +} + +static int qmp_pcie_power_on(struct phy *phy) +{ + struct qmp_pcie_priv *qmp = dev_get_priv(phy->dev); + const struct qmp_pcie_cfg *cfg = qmp->cfg; + void __iomem *pcs = qmp->pcs; + void __iomem *status; + unsigned int mask, val; + int ret, i; + + for (i = 0; i < qmp->vreg_count; i++) { + ret = regulator_set_enable(qmp->vregs[i], true); + if (ret && ret != -ENOSYS) + dev_err(phy->dev, "failed to enable regulator %d (%d)\n", i, ret); + } + + ret = qmp_pcie_do_reset(qmp); + if (ret) + return ret; + + for (i = 0; i < qmp->clk_count; i++) { + ret = clk_enable(&qmp->clks[i]); + if (ret && ret != -ENOSYS) { + dev_err(phy->dev, "failed to enable clock %d\n", i); + return ret; + } + } + + /* Power down PHY */ + qphy_setbits(pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], cfg->pwrdn_ctrl); + + qmp_pcie_init_registers(qmp, cfg); + + clk_enable(&qmp->pipe_clk); + + if (cfg->has_nocsr_reset) + reset_deassert(&qmp->nocsr_reset); + + /* Pull PHY out of reset state */ + qphy_clrbits(pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); + + /* start SerDes */ + qphy_setbits(pcs, cfg->regs[QPHY_START_CTRL], SERDES_START | PCS_START); + + status = pcs + cfg->regs[QPHY_PCS_STATUS]; + mask = cfg->phy_status; + ret = readl_poll_timeout(status, val, !(val & mask), PHY_INIT_COMPLETE_TIMEOUT); + if (ret) { + dev_err(phy->dev, "phy initialization timed-out\n"); + return ret; + } + + return 0; +} + +static int qmp_pcie_power_off(struct phy *phy) +{ + struct qmp_pcie_priv *qmp = dev_get_priv(phy->dev); + const struct qmp_pcie_cfg *cfg = qmp->cfg; + + clk_disable(&qmp->pipe_clk); + + /* PHY reset */ + qphy_setbits(qmp->pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); + + /* stop SerDes and Phy-Coding-Sublayer */ + qphy_clrbits(qmp->pcs, cfg->regs[QPHY_START_CTRL], + SERDES_START | PCS_START); + + /* Put PHY into POWER DOWN state: active low */ + qphy_clrbits(qmp->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], + cfg->pwrdn_ctrl); + + return 0; +} + +static int qmp_pcie_vreg_init(struct udevice *dev, struct qmp_pcie_priv *qmp) +{ + const struct qmp_pcie_cfg *cfg = qmp->cfg; + unsigned int vreg; + int ret; + + qmp->vreg_count = cfg->num_vregs; + + for (vreg = 0; vreg < NUM_SUPPLIES && vreg < qmp->vreg_count; ++vreg) { + ret = device_get_supply_regulator(dev, cfg->vreg_list[vreg], &qmp->vregs[vreg]); + if (ret) + dev_warn(dev, "failed to get regulator %d (%d)\n", vreg, ret); + + regulator_set_enable(qmp->vregs[vreg], true); + } + + return 0; +} + +static int qmp_pcie_reset_init(struct udevice *dev, struct qmp_pcie_priv *qmp) +{ + const struct qmp_pcie_cfg *cfg = qmp->cfg; + int num = cfg->num_resets; + int i, ret; + + qmp->reset_count = 0; + qmp->resets = devm_kcalloc(dev, num, sizeof(*qmp->resets), GFP_KERNEL); + if (!qmp->resets) + return -ENOMEM; + + for (i = 0; i < num; i++) { + ret = reset_get_by_name(dev, cfg->reset_list[i], &qmp->resets[i]); + if (ret) { + dev_err(dev, "failed to get reset %d\n", i); + goto reset_get_err; + } + + ++qmp->reset_count; + } + + if (cfg->has_nocsr_reset) { + ret = reset_get_by_name(dev, "phy_nocsr", &qmp->nocsr_reset); + if (ret) + dev_warn(dev, "failed to get nocsr reset\n"); + } + + return 0; + +reset_get_err: + reset_release_all(qmp->resets, qmp->reset_count); + + return ret; +} + +static int qmp_pcie_clk_init(struct udevice *dev, struct qmp_pcie_priv *qmp) +{ + int num = ARRAY_SIZE(qmp_pciephy_clk_l); + int i, ret; + + qmp->clk_count = 0; + qmp->clks = devm_kcalloc(dev, num, sizeof(*qmp->clks), GFP_KERNEL); + if (!qmp->clks) + return -ENOMEM; + + for (i = 0; i < num; i++) { + ret = clk_get_by_name(dev, qmp_pciephy_clk_l[i], &qmp->clks[i]); + /* Ignore failure to get ref clock */ + if (ret && strcmp(qmp_pciephy_clk_l[i], "ref") != 0) { + dev_err(dev, "failed to get clock %d\n", i); + goto clk_get_err; + } + + ++qmp->clk_count; + } + + ret = clk_get_by_name(dev, "pipe", &qmp->pipe_clk); + if (ret) + dev_warn(dev, "failed to get pipe clock\n"); + + return 0; + +clk_get_err: + clk_release_all(qmp->clks, qmp->clk_count); + + return ret; +} + +static int qmp_pcie_parse_dt(struct udevice *dev, struct qmp_pcie_priv *qmp) +{ + const struct qmp_pcie_offsets *offs = qmp->cfg->offsets; + const struct qmp_pcie_cfg *cfg = qmp->cfg; + struct resource res; + int ret; + + if (!qmp->cfg->offsets) { + dev_err(dev, "missing PCIE offsets\n"); + return -EINVAL; + } + + ret = ofnode_read_resource(dev_ofnode(dev), 0, &res); + if (ret) { + dev_err(dev, "can't get reg property\n"); + return ret; + } + + qmp->serdes = (void __iomem *)res.start + offs->serdes; + qmp->pcs = (void __iomem *)res.start + offs->pcs; + qmp->pcs_misc = (void __iomem *)res.start + offs->pcs_misc; + qmp->tx = (void __iomem *)res.start + offs->tx; + qmp->rx = (void __iomem *)res.start + offs->rx; + + if (qmp->cfg->lanes >= 2) { + qmp->tx2 = (void __iomem *)res.start + offs->tx2; + qmp->rx2 = (void __iomem *)res.start + offs->rx2; + } + + if (cfg->tbls.ln_shrd) + qmp->ln_shrd = (void __iomem *)res.start + offs->ln_shrd; + + return 0; +} + +static int qmp_pcie_probe(struct udevice *dev) +{ + struct qmp_pcie_priv *qmp = dev_get_priv(dev); + int ret; + + qmp->serdes = (void __iomem *)dev_read_addr(dev); + if (IS_ERR(qmp->serdes)) + return PTR_ERR(qmp->serdes); + + qmp->cfg = (const struct qmp_pcie_cfg *)dev_get_driver_data(dev); + if (!qmp->cfg) + return -EINVAL; + + ret = qmp_pcie_clk_init(dev, qmp); + if (ret) { + dev_err(dev, "failed to get PCIE clks\n"); + return ret; + } + + ret = qmp_pcie_vreg_init(dev, qmp); + if (ret) { + dev_err(dev, "failed to get PCIE voltage regulators\n"); + return ret; + } + + ret = qmp_pcie_reset_init(dev, qmp); + if (ret) { + dev_err(dev, "failed to get PCIE resets\n"); + return ret; + } + + qmp->dev = dev; + + return qmp_pcie_parse_dt(dev, qmp); +} + +static struct phy_ops qmp_pcie_ops = { + .power_on = qmp_pcie_power_on, + .power_off = qmp_pcie_power_off, +}; + +static const struct udevice_id qmp_pcie_ids[] = { + { + .compatible = "qcom,sm8550-qmp-gen3x2-pcie-phy", + .data = (ulong)&sm8550_qmp_gen3x2_pciephy_cfg, + }, { + .compatible = "qcom,sm8550-qmp-gen4x2-pcie-phy", + .data = (ulong)&sm8550_qmp_gen4x2_pciephy_cfg + }, { + .compatible = "qcom,sm8650-qmp-gen3x2-pcie-phy", + .data = (ulong)&sm8550_qmp_gen3x2_pciephy_cfg, + }, { + .compatible = "qcom,sm8650-qmp-gen4x2-pcie-phy", + .data = (ulong)&sm8650_qmp_gen4x2_pciephy_cfg + }, { + .compatible = "qcom,x1e80100-qmp-gen3x2-pcie-phy", + .data = (ulong)&sm8550_qmp_gen3x2_pciephy_cfg + }, { + .compatible = "qcom,x1e80100-qmp-gen4x2-pcie-phy", + .data = (ulong)&x1e80100_qmp_gen4x2_pciephy_cfg + }, { + .compatible = "qcom,x1e80100-qmp-gen4x4-pcie-phy", + .data = (ulong)&x1e80100_qmp_gen4x2_pciephy_cfg + }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(qcom_qmp_pcie) = { + .name = "qcom-qmp-pcie", + .id = UCLASS_PHY, + .of_match = qmp_pcie_ids, + .ops = &qmp_pcie_ops, + .probe = qmp_pcie_probe, + .priv_auto = sizeof(struct qmp_pcie_priv), +}; diff --git a/drivers/phy/qcom/phy-qcom-qmp-pcs-misc-v3.h b/drivers/phy/qcom/phy-qcom-qmp-pcs-misc-v3.h new file mode 100644 index 00000000000..a45bd301bc9 --- /dev/null +++ b/drivers/phy/qcom/phy-qcom-qmp-pcs-misc-v3.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2017, The Linux Foundation. All rights reserved. + */ + +#ifndef QCOM_PHY_QMP_PCS_MISC_V3_H_ +#define QCOM_PHY_QMP_PCS_MISC_V3_H_ + +/* Only for QMP V3 PHY - PCS_MISC registers */ +#define QPHY_V3_PCS_MISC_CLAMP_ENABLE 0x0c +#define QPHY_V3_PCS_MISC_OSC_DTCT_CONFIG2 0x2c +#define QPHY_V3_PCS_MISC_PCIE_INT_AUX_CLK_CONFIG1 0x44 +#define QPHY_V3_PCS_MISC_OSC_DTCT_MODE2_CONFIG2 0x54 +#define QPHY_V3_PCS_MISC_OSC_DTCT_MODE2_CONFIG4 0x5c +#define QPHY_V3_PCS_MISC_OSC_DTCT_MODE2_CONFIG5 0x60 + +#endif diff --git a/drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v4.h b/drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v4.h new file mode 100644 index 00000000000..4cc02288d41 --- /dev/null +++ b/drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v4.h @@ -0,0 +1,72 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2017, The Linux Foundation. All rights reserved. + */ + +#ifndef QCOM_PHY_QMP_PCS_PCIE_V4_H_ +#define QCOM_PHY_QMP_PCS_PCIE_V4_H_ + +/* Only for QMP V4 PHY - PCS_PCIE registers (same as PCS_MISC?) */ +#define QPHY_V4_PCS_PCIE_INT_AUX_CLK_STATUS 0x00 +#define QPHY_V4_PCS_PCIE_OSC_DTCT_STATUS 0x04 +#define QPHY_V4_PCS_PCIE_POWER_STATE_CONFIG1 0x08 +#define QPHY_V4_PCS_PCIE_POWER_STATE_CONFIG2 0x0c +#define QPHY_V4_PCS_PCIE_POWER_STATE_CONFIG3 0x10 +#define QPHY_V4_PCS_PCIE_POWER_STATE_CONFIG4 0x14 +#define QPHY_V4_PCS_PCIE_PCS_TX_RX_CONFIG 0x18 +#define QPHY_V4_PCS_PCIE_ENDPOINT_REFCLK_DRIVE 0x1c +#define QPHY_V4_PCS_PCIE_ENDPOINT_REFCLK_CNTRL 0x20 +#define QPHY_V4_PCS_PCIE_EPCLK_PRE_PLL_LOCK_DLY_AUXCLK 0x24 +#define QPHY_V4_PCS_PCIE_EPCLK_DLY_COUNT_VAL_L 0x28 +#define QPHY_V4_PCS_PCIE_EPCLK_DLY_COUNT_VAL_H 0x2c +#define QPHY_V4_PCS_PCIE_RX_IDLE_DTCT_CNTRL1 0x30 +#define QPHY_V4_PCS_PCIE_RX_IDLE_DTCT_CNTRL2 0x34 +#define QPHY_V4_PCS_PCIE_SIGDET_CNTRL 0x38 +#define QPHY_V4_PCS_PCIE_SIGDET_LOW_2_IDLE_TIME 0x3c +#define QPHY_V4_PCS_PCIE_L1P1_WAKEUP_DLY_TIME_AUXCLK_L 0x40 +#define QPHY_V4_PCS_PCIE_L1P1_WAKEUP_DLY_TIME_AUXCLK_H 0x44 +#define QPHY_V4_PCS_PCIE_L1P2_WAKEUP_DLY_TIME_AUXCLK_L 0x48 +#define QPHY_V4_PCS_PCIE_L1P2_WAKEUP_DLY_TIME_AUXCLK_H 0x4c +#define QPHY_V4_PCS_PCIE_INT_AUX_CLK_CONFIG1 0x50 +#define QPHY_V4_PCS_PCIE_INT_AUX_CLK_CONFIG2 0x54 +#define QPHY_V4_PCS_PCIE_OSC_DTCT_CONFIG1 0x58 +#define QPHY_V4_PCS_PCIE_OSC_DTCT_CONFIG2 0x5c +#define QPHY_V4_PCS_PCIE_OSC_DTCT_CONFIG3 0x60 +#define QPHY_V4_PCS_PCIE_OSC_DTCT_CONFIG4 0x64 +#define QPHY_V4_PCS_PCIE_OSC_DTCT_CONFIG5 0x68 +#define QPHY_V4_PCS_PCIE_OSC_DTCT_CONFIG6 0x6c +#define QPHY_V4_PCS_PCIE_OSC_DTCT_CONFIG7 0x70 +#define QPHY_V4_PCS_PCIE_OSC_DTCT_MODE2_CONFIG1 0x74 +#define QPHY_V4_PCS_PCIE_OSC_DTCT_MODE2_CONFIG2 0x78 +#define QPHY_V4_PCS_PCIE_OSC_DTCT_MODE2_CONFIG3 0x7c +#define QPHY_V4_PCS_PCIE_OSC_DTCT_MODE2_CONFIG4 0x80 +#define QPHY_V4_PCS_PCIE_OSC_DTCT_MODE2_CONFIG5 0x84 +#define QPHY_V4_PCS_PCIE_OSC_DTCT_MODE2_CONFIG6 0x88 +#define QPHY_V4_PCS_PCIE_OSC_DTCT_MODE2_CONFIG7 0x8c +#define QPHY_V4_PCS_PCIE_OSC_DTCT_ACTIONS 0x90 +#define QPHY_V4_PCS_PCIE_LOCAL_FS 0x94 +#define QPHY_V4_PCS_PCIE_LOCAL_LF 0x98 +#define QPHY_V4_PCS_PCIE_LOCAL_FS_RS 0x9c +#define QPHY_V4_PCS_PCIE_EQ_CONFIG1 0xa0 +#define QPHY_V4_PCS_PCIE_EQ_CONFIG2 0xa4 +#define QPHY_V4_PCS_PCIE_PRESET_P0_P1_PRE 0xa8 +#define QPHY_V4_PCS_PCIE_PRESET_P2_P3_PRE 0xac +#define QPHY_V4_PCS_PCIE_PRESET_P4_P5_PRE 0xb0 +#define QPHY_V4_PCS_PCIE_PRESET_P6_P7_PRE 0xb4 +#define QPHY_V4_PCS_PCIE_PRESET_P8_P9_PRE 0xb8 +#define QPHY_V4_PCS_PCIE_PRESET_P10_PRE 0xbc +#define QPHY_V4_PCS_PCIE_PRESET_P1_P3_PRE_RS 0xc0 +#define QPHY_V4_PCS_PCIE_PRESET_P4_P5_PRE_RS 0xc4 +#define QPHY_V4_PCS_PCIE_PRESET_P6_P9_PRE_RS 0xc8 +#define QPHY_V4_PCS_PCIE_PRESET_P0_P1_POST 0xcc +#define QPHY_V4_PCS_PCIE_PRESET_P2_P3_POST 0xd0 +#define QPHY_V4_PCS_PCIE_PRESET_P4_P5_POST 0xd4 +#define QPHY_V4_PCS_PCIE_PRESET_P6_P7_POST 0xd8 +#define QPHY_V4_PCS_PCIE_PRESET_P8_P9_POST 0xdc +#define QPHY_V4_PCS_PCIE_PRESET_P10_POST 0xe0 +#define QPHY_V4_PCS_PCIE_PRESET_P1_P3_POST_RS 0xe4 +#define QPHY_V4_PCS_PCIE_PRESET_P4_P5_POST_RS 0xe8 +#define QPHY_V4_PCS_PCIE_PRESET_P6_P9_POST_RS 0xec +#define QPHY_V4_PCS_PCIE_RXEQEVAL_TIME 0xf0 + +#endif diff --git a/drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v4_20.h b/drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v4_20.h new file mode 100644 index 00000000000..ac872a9eff9 --- /dev/null +++ b/drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v4_20.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2017, The Linux Foundation. All rights reserved. + */ + +#ifndef QCOM_PHY_QMP_PCS_PCIE_V4_20_H_ +#define QCOM_PHY_QMP_PCS_PCIE_V4_20_H_ + +#define QPHY_V4_20_PCS_PCIE_ENDPOINT_REFCLK_DRIVE 0x01c +#define QPHY_V4_20_PCS_PCIE_OSC_DTCT_ACTIONS 0x090 +#define QPHY_V4_20_PCS_PCIE_EQ_CONFIG1 0x0a0 +#define QPHY_V4_20_PCS_PCIE_G3_RXEQEVAL_TIME 0x0f0 +#define QPHY_V4_20_PCS_PCIE_G4_RXEQEVAL_TIME 0x0f4 +#define QPHY_V4_20_PCS_PCIE_G4_EQ_CONFIG2 0x0fc +#define QPHY_V4_20_PCS_PCIE_G4_EQ_CONFIG5 0x108 +#define QPHY_V4_20_PCS_LANE1_INSIG_SW_CTRL2 0x824 +#define QPHY_V4_20_PCS_LANE1_INSIG_MX_CTRL2 0x828 + +#endif diff --git a/drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v5.h b/drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v5.h new file mode 100644 index 00000000000..2801bcf10f2 --- /dev/null +++ b/drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v5.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2017, The Linux Foundation. All rights reserved. + */ + +#ifndef QCOM_PHY_QMP_PCS_PCIE_V5_H_ +#define QCOM_PHY_QMP_PCS_PCIE_V5_H_ + +/* Only for QMP V5 PHY - PCS_PCIE registers */ +#define QPHY_V5_PCS_PCIE_POWER_STATE_CONFIG2 0x0c +#define QPHY_V5_PCS_PCIE_POWER_STATE_CONFIG4 0x14 +#define QPHY_V5_PCS_PCIE_ENDPOINT_REFCLK_DRIVE 0x20 +#define QPHY_V5_PCS_PCIE_INT_AUX_CLK_CONFIG1 0x54 +#define QPHY_V5_PCS_PCIE_OSC_DTCT_ACTIONS 0x94 +#define QPHY_V5_PCS_PCIE_EQ_CONFIG2 0xa8 + +#endif diff --git a/drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v5_20.h b/drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v5_20.h new file mode 100644 index 00000000000..cdf8c04ea07 --- /dev/null +++ b/drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v5_20.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2017, The Linux Foundation. All rights reserved. + */ + +#ifndef QCOM_PHY_QMP_PCS_PCIE_V5_20_H_ +#define QCOM_PHY_QMP_PCS_PCIE_V5_20_H_ + +/* Only for QMP V5_20 PHY - PCIe PCS registers */ +#define QPHY_V5_20_PCS_PCIE_POWER_STATE_CONFIG2 0x00c +#define QPHY_V5_20_PCS_PCIE_ENDPOINT_REFCLK_DRIVE 0x01c +#define QPHY_V5_20_PCS_PCIE_OSC_DTCT_MODE2_CONFIG5 0x084 +#define QPHY_V5_20_PCS_PCIE_OSC_DTCT_ACTIONS 0x090 +#define QPHY_V5_20_PCS_PCIE_EQ_CONFIG1 0x0a0 +#define QPHY_V5_20_PCS_PCIE_PRESET_P10_POST 0x0e0 +#define QPHY_V5_20_PCS_PCIE_G4_EQ_CONFIG2 0x0fc +#define QPHY_V5_20_PCS_PCIE_G4_EQ_CONFIG5 0x108 +#define QPHY_V5_20_PCS_PCIE_G4_PRE_GAIN 0x15c +#define QPHY_V5_20_PCS_PCIE_RX_MARGINING_CONFIG3 0x184 +#define QPHY_V5_20_PCS_LANE1_INSIG_SW_CTRL2 0xa24 +#define QPHY_V5_20_PCS_LANE1_INSIG_MX_CTRL2 0xa28 + +#endif diff --git a/drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v6.h b/drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v6.h new file mode 100644 index 00000000000..0ca79333d94 --- /dev/null +++ b/drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v6.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2023, Linaro Limited + */ + +#ifndef QCOM_PHY_QMP_PCS_PCIE_V6_H_ +#define QCOM_PHY_QMP_PCS_PCIE_V6_H_ + +/* Only for QMP V6 PHY - PCIE have different offsets than V5 */ +#define QPHY_PCIE_V6_PCS_PCIE_EQ_CONFIG1 0xa4 +#define QPHY_PCIE_V6_PCS_PCIE_RXEQEVAL_TIME 0xf4 +#define QPHY_PCIE_V6_PCS_PCIE_POWER_STATE_CONFIG2 0x0c +#define QPHY_PCIE_V6_PCS_PCIE_POWER_STATE_CONFIG4 0x14 +#define QPHY_PCIE_V6_PCS_PCIE_ENDPOINT_REFCLK_DRIVE 0x20 +#define QPHY_PCIE_V6_PCS_PCIE_OSC_DTCT_ACTIONS 0x94 + +#endif diff --git a/drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v6_20.h b/drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v6_20.h new file mode 100644 index 00000000000..dfcecf31a60 --- /dev/null +++ b/drivers/phy/qcom/phy-qcom-qmp-pcs-pcie-v6_20.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2023, Linaro Limited + */ + +#ifndef QCOM_PHY_QMP_PCS_PCIE_V6_20_H_ +#define QCOM_PHY_QMP_PCS_PCIE_V6_20_H_ + +/* Only for QMP V6_20 PHY - PCIE have different offsets than V5 */ +#define QPHY_PCIE_V6_20_PCS_POWER_STATE_CONFIG2 0x00c +#define QPHY_PCIE_V6_20_PCS_TX_RX_CONFIG 0x018 +#define QPHY_PCIE_V6_20_PCS_ENDPOINT_REFCLK_DRIVE 0x01c +#define QPHY_PCIE_V6_20_PCS_OSC_DTCT_ATCIONS 0x090 +#define QPHY_PCIE_V6_20_PCS_EQ_CONFIG1 0x0a0 +#define QPHY_PCIE_V6_20_PCS_G3_RXEQEVAL_TIME 0x0f0 +#define QPHY_PCIE_V6_20_PCS_G4_RXEQEVAL_TIME 0x0f4 +#define QPHY_PCIE_V6_20_PCS_EQ_CONFIG5 0x108 +#define QPHY_PCIE_V6_20_PCS_G4_PRE_GAIN 0x15c +#define QPHY_PCIE_V6_20_PCS_RX_MARGINING_CONFIG1 0x17c +#define QPHY_PCIE_V6_20_PCS_RX_MARGINING_CONFIG3 0x184 +#define QPHY_PCIE_V6_20_PCS_RX_MARGINING_CONFIG5 0x18c +#define QPHY_PCIE_V6_20_PCS_G3_FOM_EQ_CONFIG5 0x1ac +#define QPHY_PCIE_V6_20_PCS_G4_FOM_EQ_CONFIG5 0x1c0 + +#endif diff --git a/drivers/phy/qcom/phy-qcom-qmp-pcs-v5.h b/drivers/phy/qcom/phy-qcom-qmp-pcs-v5.h new file mode 100644 index 00000000000..36cc80bb905 --- /dev/null +++ b/drivers/phy/qcom/phy-qcom-qmp-pcs-v5.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2017, The Linux Foundation. All rights reserved. + */ + +#ifndef QCOM_PHY_QMP_PCS_V5_H_ +#define QCOM_PHY_QMP_PCS_V5_H_ + +/* Only for QMP V5 PHY - USB/PCIe PCS registers */ +#define QPHY_V5_PCS_SW_RESET 0x000 +#define QPHY_V5_PCS_PCS_STATUS1 0x014 +#define QPHY_V5_PCS_POWER_DOWN_CONTROL 0x040 +#define QPHY_V5_PCS_START_CONTROL 0x044 +#define QPHY_V5_PCS_LOCK_DETECT_CONFIG1 0x0c4 +#define QPHY_V5_PCS_LOCK_DETECT_CONFIG2 0x0c8 +#define QPHY_V5_PCS_LOCK_DETECT_CONFIG3 0x0cc +#define QPHY_V5_PCS_LOCK_DETECT_CONFIG6 0x0d8 +#define QPHY_V5_PCS_REFGEN_REQ_CONFIG1 0x0dc +#define QPHY_V5_PCS_G3S2_PRE_GAIN 0x170 +#define QPHY_V5_PCS_RX_SIGDET_LVL 0x188 +#define QPHY_V5_PCS_RCVR_DTCT_DLY_P1U2_L 0x190 +#define QPHY_V5_PCS_RCVR_DTCT_DLY_P1U2_H 0x194 +#define QPHY_V5_PCS_RATE_SLEW_CNTRL1 0x198 +#define QPHY_V5_PCS_CDR_RESET_TIME 0x1b0 +#define QPHY_V5_PCS_RX_CONFIG 0x1b0 +#define QPHY_V5_PCS_ALIGN_DETECT_CONFIG1 0x1c0 +#define QPHY_V5_PCS_ALIGN_DETECT_CONFIG2 0x1c4 +#define QPHY_V5_PCS_PCS_TX_RX_CONFIG 0x1d0 +#define QPHY_V5_PCS_EQ_CONFIG1 0x1dc +#define QPHY_V5_PCS_EQ_CONFIG2 0x1e0 +#define QPHY_V5_PCS_EQ_CONFIG3 0x1e4 +#define QPHY_V5_PCS_EQ_CONFIG5 0x1ec + +#endif diff --git a/drivers/phy/qcom/phy-qcom-qmp-pcs-v6.h b/drivers/phy/qcom/phy-qcom-qmp-pcs-v6.h new file mode 100644 index 00000000000..08299d2b78f --- /dev/null +++ b/drivers/phy/qcom/phy-qcom-qmp-pcs-v6.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2023, Linaro Limited + */ + +#ifndef QCOM_PHY_QMP_PCS_V6_H_ +#define QCOM_PHY_QMP_PCS_V6_H_ + +/* Only for QMP V6 PHY - USB/PCIe PCS registers */ +#define QPHY_V6_PCS_SW_RESET 0x000 +#define QPHY_V6_PCS_PCS_STATUS1 0x014 +#define QPHY_V6_PCS_POWER_DOWN_CONTROL 0x040 +#define QPHY_V6_PCS_START_CONTROL 0x044 +#define QPHY_V6_PCS_POWER_STATE_CONFIG1 0x090 +#define QPHY_V6_PCS_LOCK_DETECT_CONFIG1 0x0c4 +#define QPHY_V6_PCS_LOCK_DETECT_CONFIG2 0x0c8 +#define QPHY_V6_PCS_LOCK_DETECT_CONFIG3 0x0cc +#define QPHY_V6_PCS_LOCK_DETECT_CONFIG6 0x0d8 +#define QPHY_V6_PCS_REFGEN_REQ_CONFIG1 0x0dc +#define QPHY_V6_PCS_RX_SIGDET_LVL 0x188 +#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190 +#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194 +#define QPHY_V6_PCS_RATE_SLEW_CNTRL1 0x198 +#define QPHY_V6_PCS_CDR_RESET_TIME 0x1b0 +#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG1 0x1c0 +#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG2 0x1c4 +#define QPHY_V6_PCS_PCS_TX_RX_CONFIG 0x1d0 +#define QPHY_V6_PCS_EQ_CONFIG1 0x1dc +#define QPHY_V6_PCS_EQ_CONFIG2 0x1e0 +#define QPHY_V6_PCS_EQ_CONFIG5 0x1ec + +#endif diff --git a/drivers/phy/qcom/phy-qcom-qmp-pcs-v6_20.h b/drivers/phy/qcom/phy-qcom-qmp-pcs-v6_20.h new file mode 100644 index 00000000000..4d9615cc038 --- /dev/null +++ b/drivers/phy/qcom/phy-qcom-qmp-pcs-v6_20.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2023, Linaro Limited + */ + +#ifndef QCOM_PHY_QMP_PCS_V6_20_H_ +#define QCOM_PHY_QMP_PCS_V6_20_H_ + +/* Only for QMP V6_20 PHY - USB/PCIe PCS registers */ +#define QPHY_V6_20_PCS_G12S1_TXDEEMPH_M6DB 0x170 +#define QPHY_V6_20_PCS_G3S2_PRE_GAIN 0x178 +#define QPHY_V6_20_PCS_RX_SIGDET_LVL 0x190 +#define QPHY_V6_20_PCS_COM_ELECIDLE_DLY_SEL 0x1b8 +#define QPHY_V6_20_PCS_TX_RX_CONFIG1 0x1dc +#define QPHY_V6_20_PCS_TX_RX_CONFIG2 0x1e0 +#define QPHY_V6_20_PCS_EQ_CONFIG4 0x1f8 +#define QPHY_V6_20_PCS_EQ_CONFIG5 0x1fc + +#endif diff --git a/drivers/phy/qcom/phy-qcom-qmp-qserdes-com-v5.h b/drivers/phy/qcom/phy-qcom-qmp-qserdes-com-v5.h new file mode 100644 index 00000000000..c8afdf7bc1e --- /dev/null +++ b/drivers/phy/qcom/phy-qcom-qmp-qserdes-com-v5.h @@ -0,0 +1,124 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2017, The Linux Foundation. All rights reserved. + */ + +#ifndef QCOM_PHY_QMP_QSERDES_COM_V5_H_ +#define QCOM_PHY_QMP_QSERDES_COM_V5_H_ + +/* Only for QMP V5 PHY - QSERDES COM registers */ +#define QSERDES_V5_COM_ATB_SEL1 0x000 +#define QSERDES_V5_COM_ATB_SEL2 0x004 +#define QSERDES_V5_COM_FREQ_UPDATE 0x008 +#define QSERDES_V5_COM_BG_TIMER 0x00c +#define QSERDES_V5_COM_SSC_EN_CENTER 0x010 +#define QSERDES_V5_COM_SSC_ADJ_PER1 0x014 +#define QSERDES_V5_COM_SSC_ADJ_PER2 0x018 +#define QSERDES_V5_COM_SSC_PER1 0x01c +#define QSERDES_V5_COM_SSC_PER2 0x020 +#define QSERDES_V5_COM_SSC_STEP_SIZE1_MODE0 0x024 +#define QSERDES_V5_COM_SSC_STEP_SIZE2_MODE0 0x028 +#define QSERDES_V5_COM_SSC_STEP_SIZE3_MODE0 0x02c +#define QSERDES_V5_COM_SSC_STEP_SIZE1_MODE1 0x030 +#define QSERDES_V5_COM_SSC_STEP_SIZE2_MODE1 0x034 +#define QSERDES_V5_COM_SSC_STEP_SIZE3_MODE1 0x038 +#define QSERDES_V5_COM_POST_DIV 0x03c +#define QSERDES_V5_COM_POST_DIV_MUX 0x040 +#define QSERDES_V5_COM_BIAS_EN_CLKBUFLR_EN 0x044 +#define QSERDES_V5_COM_CLK_ENABLE1 0x048 +#define QSERDES_V5_COM_SYS_CLK_CTRL 0x04c +#define QSERDES_V5_COM_SYSCLK_BUF_ENABLE 0x050 +#define QSERDES_V5_COM_PLL_EN 0x054 +#define QSERDES_V5_COM_PLL_IVCO 0x058 +#define QSERDES_V5_COM_CMN_IETRIM 0x05c +#define QSERDES_V5_COM_CMN_IPTRIM 0x060 +#define QSERDES_V5_COM_EP_CLOCK_DETECT_CTRL 0x064 +#define QSERDES_V5_COM_SYSCLK_DET_COMP_STATUS 0x068 +#define QSERDES_V5_COM_CLK_EP_DIV_MODE0 0x06c +#define QSERDES_V5_COM_CLK_EP_DIV_MODE1 0x070 +#define QSERDES_V5_COM_CP_CTRL_MODE0 0x074 +#define QSERDES_V5_COM_CP_CTRL_MODE1 0x078 +#define QSERDES_V5_COM_PLL_RCTRL_MODE0 0x07c +#define QSERDES_V5_COM_PLL_RCTRL_MODE1 0x080 +#define QSERDES_V5_COM_PLL_CCTRL_MODE0 0x084 +#define QSERDES_V5_COM_PLL_CCTRL_MODE1 0x088 +#define QSERDES_V5_COM_PLL_CNTRL 0x08c +#define QSERDES_V5_COM_BIAS_EN_CTRL_BY_PSM 0x090 +#define QSERDES_V5_COM_SYSCLK_EN_SEL 0x094 +#define QSERDES_V5_COM_CML_SYSCLK_SEL 0x098 +#define QSERDES_V5_COM_RESETSM_CNTRL 0x09c +#define QSERDES_V5_COM_RESETSM_CNTRL2 0x0a0 +#define QSERDES_V5_COM_LOCK_CMP_EN 0x0a4 +#define QSERDES_V5_COM_LOCK_CMP_CFG 0x0a8 +#define QSERDES_V5_COM_LOCK_CMP1_MODE0 0x0ac +#define QSERDES_V5_COM_LOCK_CMP2_MODE0 0x0b0 +#define QSERDES_V5_COM_LOCK_CMP1_MODE1 0x0b4 +#define QSERDES_V5_COM_LOCK_CMP2_MODE1 0x0b8 +#define QSERDES_V5_COM_DEC_START_MODE0 0x0bc +#define QSERDES_V5_COM_DEC_START_MSB_MODE0 0x0c0 +#define QSERDES_V5_COM_DEC_START_MODE1 0x0c4 +#define QSERDES_V5_COM_DEC_START_MSB_MODE1 0x0c8 +#define QSERDES_V5_COM_DIV_FRAC_START1_MODE0 0x0cc +#define QSERDES_V5_COM_DIV_FRAC_START2_MODE0 0x0d0 +#define QSERDES_V5_COM_DIV_FRAC_START3_MODE0 0x0d4 +#define QSERDES_V5_COM_DIV_FRAC_START1_MODE1 0x0d8 +#define QSERDES_V5_COM_DIV_FRAC_START2_MODE1 0x0dc +#define QSERDES_V5_COM_DIV_FRAC_START3_MODE1 0x0e0 +#define QSERDES_V5_COM_INTEGLOOP_INITVAL 0x0e4 +#define QSERDES_V5_COM_INTEGLOOP_EN 0x0e8 +#define QSERDES_V5_COM_INTEGLOOP_GAIN0_MODE0 0x0ec +#define QSERDES_V5_COM_INTEGLOOP_GAIN1_MODE0 0x0f0 +#define QSERDES_V5_COM_INTEGLOOP_GAIN0_MODE1 0x0f4 +#define QSERDES_V5_COM_INTEGLOOP_GAIN1_MODE1 0x0f8 +#define QSERDES_V5_COM_INTEGLOOP_P_PATH_GAIN0 0x0fc +#define QSERDES_V5_COM_INTEGLOOP_P_PATH_GAIN1 0x100 +#define QSERDES_V5_COM_VCOCAL_DEADMAN_CTRL 0x104 +#define QSERDES_V5_COM_VCO_TUNE_CTRL 0x108 +#define QSERDES_V5_COM_VCO_TUNE_MAP 0x10c +#define QSERDES_V5_COM_VCO_TUNE1_MODE0 0x110 +#define QSERDES_V5_COM_VCO_TUNE2_MODE0 0x114 +#define QSERDES_V5_COM_VCO_TUNE1_MODE1 0x118 +#define QSERDES_V5_COM_VCO_TUNE2_MODE1 0x11c +#define QSERDES_V5_COM_VCO_TUNE_INITVAL1 0x120 +#define QSERDES_V5_COM_VCO_TUNE_INITVAL2 0x124 +#define QSERDES_V5_COM_VCO_TUNE_MINVAL1 0x128 +#define QSERDES_V5_COM_VCO_TUNE_MINVAL2 0x12c +#define QSERDES_V5_COM_VCO_TUNE_MAXVAL1 0x130 +#define QSERDES_V5_COM_VCO_TUNE_MAXVAL2 0x134 +#define QSERDES_V5_COM_VCO_TUNE_TIMER1 0x138 +#define QSERDES_V5_COM_VCO_TUNE_TIMER2 0x13c +#define QSERDES_V5_COM_CMN_STATUS 0x140 +#define QSERDES_V5_COM_RESET_SM_STATUS 0x144 +#define QSERDES_V5_COM_RESTRIM_CODE_STATUS 0x148 +#define QSERDES_V5_COM_PLLCAL_CODE1_STATUS 0x14c +#define QSERDES_V5_COM_PLLCAL_CODE2_STATUS 0x150 +#define QSERDES_V5_COM_CLK_SELECT 0x154 +#define QSERDES_V5_COM_HSCLK_SEL 0x158 +#define QSERDES_V5_COM_HSCLK_HS_SWITCH_SEL 0x15c +#define QSERDES_V5_COM_INTEGLOOP_BINCODE_STATUS 0x160 +#define QSERDES_V5_COM_PLL_ANALOG 0x164 +#define QSERDES_V5_COM_CORECLK_DIV_MODE0 0x168 +#define QSERDES_V5_COM_CORECLK_DIV_MODE1 0x16c +#define QSERDES_V5_COM_SW_RESET 0x170 +#define QSERDES_V5_COM_CORE_CLK_EN 0x174 +#define QSERDES_V5_COM_C_READY_STATUS 0x178 +#define QSERDES_V5_COM_CMN_CONFIG 0x17c +#define QSERDES_V5_COM_CMN_RATE_OVERRIDE 0x180 +#define QSERDES_V5_COM_SVS_MODE_CLK_SEL 0x184 +#define QSERDES_V5_COM_DEBUG_BUS0 0x188 +#define QSERDES_V5_COM_DEBUG_BUS1 0x18c +#define QSERDES_V5_COM_DEBUG_BUS2 0x190 +#define QSERDES_V5_COM_DEBUG_BUS3 0x194 +#define QSERDES_V5_COM_DEBUG_BUS_SEL 0x198 +#define QSERDES_V5_COM_CMN_MISC1 0x19c +#define QSERDES_V5_COM_CMN_MODE 0x1a0 +#define QSERDES_V5_COM_CMN_MODE_CONTD 0x1a4 +#define QSERDES_V5_COM_VCO_DC_LEVEL_CTRL 0x1a8 +#define QSERDES_V5_COM_BIN_VCOCAL_CMP_CODE1_MODE0 0x1ac +#define QSERDES_V5_COM_BIN_VCOCAL_CMP_CODE2_MODE0 0x1b0 +#define QSERDES_V5_COM_BIN_VCOCAL_CMP_CODE1_MODE1 0x1b4 +#define QSERDES_V5_COM_BIN_VCOCAL_CMP_CODE2_MODE1 0x1b8 +#define QSERDES_V5_COM_BIN_VCOCAL_HSCLK_SEL 0x1bc +#define QSERDES_V5_COM_RESERVED_1 0x1c0 + +#endif diff --git a/drivers/phy/qcom/phy-qcom-qmp-qserdes-ln-shrd-v6.h b/drivers/phy/qcom/phy-qcom-qmp-qserdes-ln-shrd-v6.h new file mode 100644 index 00000000000..86d7d796d5d --- /dev/null +++ b/drivers/phy/qcom/phy-qcom-qmp-qserdes-ln-shrd-v6.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2023, Linaro Limited + */ + +#ifndef QCOM_PHY_QMP_QSERDES_LN_SHRD_V6_H_ +#define QCOM_PHY_QMP_QSERDES_LN_SHRD_V6_H_ + +#define QSERDES_V6_LN_SHRD_RXCLK_DIV2_CTRL 0xa0 +#define QSERDES_V6_LN_SHRD_RX_Q_EN_RATES 0xb0 +#define QSERDES_V6_LN_SHRD_DFE_DAC_ENABLE1 0xb4 +#define QSERDES_V6_LN_SHRD_TX_ADAPT_POST_THRESH1 0xc4 +#define QSERDES_V6_LN_SHRD_TX_ADAPT_POST_THRESH2 0xc8 +#define QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B0 0xd4 +#define QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B1 0xd8 +#define QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B2 0xdc +#define QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B3 0xe0 +#define QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B4 0xe4 +#define QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B5 0xe8 +#define QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B6 0xec +#define QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH1_RATE210 0xf0 +#define QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH1_RATE3 0xf4 +#define QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH2_RATE210 0xf8 +#define QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH2_RATE3 0xfc +#define QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH3_RATE210 0x100 +#define QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH3_RATE3 0x104 +#define QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH4_RATE3 0x10c +#define QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH5_RATE3 0x114 +#define QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH6_RATE3 0x11c +#define QSERDES_V6_LN_SHRD_RX_SUMMER_CAL_SPD_MODE 0x128 + +#endif diff --git a/drivers/phy/qcom/phy-qcom-qmp-qserdes-txrx-v5.h b/drivers/phy/qcom/phy-qcom-qmp-qserdes-txrx-v5.h new file mode 100644 index 00000000000..fe8f3e330d0 --- /dev/null +++ b/drivers/phy/qcom/phy-qcom-qmp-qserdes-txrx-v5.h @@ -0,0 +1,231 @@ + +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2017, The Linux Foundation. All rights reserved. + */ + +#ifndef QCOM_PHY_QMP_QSERDES_TXRX_V5_H_ +#define QCOM_PHY_QMP_QSERDES_TXRX_V5_H_ + +/* Only for QMP V5 PHY - TX registers */ +#define QSERDES_V5_TX_BIST_MODE_LANENO 0x000 +#define QSERDES_V5_TX_BIST_INVERT 0x004 +#define QSERDES_V5_TX_CLKBUF_ENABLE 0x008 +#define QSERDES_V5_TX_TX_EMP_POST1_LVL 0x00c +#define QSERDES_V5_TX_TX_IDLE_LVL_LARGE_AMP 0x010 +#define QSERDES_V5_TX_TX_DRV_LVL 0x014 +#define QSERDES_V5_TX_TX_DRV_LVL_OFFSET 0x018 +#define QSERDES_V5_TX_RESET_TSYNC_EN 0x01c +#define QSERDES_V5_TX_PRE_STALL_LDO_BOOST_EN 0x020 +#define QSERDES_V5_TX_TX_BAND 0x024 +#define QSERDES_V5_TX_SLEW_CNTL 0x028 +#define QSERDES_V5_TX_INTERFACE_SELECT 0x02c +#define QSERDES_V5_TX_LPB_EN 0x030 +#define QSERDES_V5_TX_RES_CODE_LANE_TX 0x034 +#define QSERDES_V5_TX_RES_CODE_LANE_RX 0x038 +#define QSERDES_V5_TX_RES_CODE_LANE_OFFSET_TX 0x03c +#define QSERDES_V5_TX_RES_CODE_LANE_OFFSET_RX 0x040 +#define QSERDES_V5_TX_PERL_LENGTH1 0x044 +#define QSERDES_V5_TX_PERL_LENGTH2 0x048 +#define QSERDES_V5_TX_SERDES_BYP_EN_OUT 0x04c +#define QSERDES_V5_TX_DEBUG_BUS_SEL 0x050 +#define QSERDES_V5_TX_TRANSCEIVER_BIAS_EN 0x054 +#define QSERDES_V5_TX_HIGHZ_DRVR_EN 0x058 +#define QSERDES_V5_TX_TX_POL_INV 0x05c +#define QSERDES_V5_TX_PARRATE_REC_DETECT_IDLE_EN 0x060 +#define QSERDES_V5_TX_BIST_PATTERN1 0x064 +#define QSERDES_V5_TX_BIST_PATTERN2 0x068 +#define QSERDES_V5_TX_BIST_PATTERN3 0x06c +#define QSERDES_V5_TX_BIST_PATTERN4 0x070 +#define QSERDES_V5_TX_BIST_PATTERN5 0x074 +#define QSERDES_V5_TX_BIST_PATTERN6 0x078 +#define QSERDES_V5_TX_BIST_PATTERN7 0x07c +#define QSERDES_V5_TX_BIST_PATTERN8 0x080 +#define QSERDES_V5_TX_LANE_MODE_1 0x084 +#define QSERDES_V5_TX_LANE_MODE_2 0x088 +#define QSERDES_V5_TX_LANE_MODE_3 0x08c +#define QSERDES_V5_TX_LANE_MODE_4 0x090 +#define QSERDES_V5_TX_LANE_MODE_5 0x094 +#define QSERDES_V5_TX_ATB_SEL1 0x098 +#define QSERDES_V5_TX_ATB_SEL2 0x09c +#define QSERDES_V5_TX_RCV_DETECT_LVL 0x0a0 +#define QSERDES_V5_TX_RCV_DETECT_LVL_2 0x0a4 +#define QSERDES_V5_TX_PRBS_SEED1 0x0a8 +#define QSERDES_V5_TX_PRBS_SEED2 0x0ac +#define QSERDES_V5_TX_PRBS_SEED3 0x0b0 +#define QSERDES_V5_TX_PRBS_SEED4 0x0b4 +#define QSERDES_V5_TX_RESET_GEN 0x0b8 +#define QSERDES_V5_TX_RESET_GEN_MUXES 0x0bc +#define QSERDES_V5_TX_TRAN_DRVR_EMP_EN 0x0c0 +#define QSERDES_V5_TX_TX_INTERFACE_MODE 0x0c4 +#define QSERDES_V5_TX_VMODE_CTRL1 0x0c8 +#define QSERDES_V5_TX_ALOG_OBSV_BUS_CTRL_1 0x0cc +#define QSERDES_V5_TX_BIST_STATUS 0x0d0 +#define QSERDES_V5_TX_BIST_ERROR_COUNT1 0x0d4 +#define QSERDES_V5_TX_BIST_ERROR_COUNT2 0x0d8 +#define QSERDES_V5_TX_ALOG_OBSV_BUS_STATUS_1 0x0dc +#define QSERDES_V5_TX_LANE_DIG_CONFIG 0x0e0 +#define QSERDES_V5_TX_PI_QEC_CTRL 0x0e4 +#define QSERDES_V5_TX_PRE_EMPH 0x0e8 +#define QSERDES_V5_TX_SW_RESET 0x0ec +#define QSERDES_V5_TX_DCC_OFFSET 0x0f0 +#define QSERDES_V5_TX_DCC_CMUX_POSTCAL_OFFSET 0x0f4 +#define QSERDES_V5_TX_DCC_CMUX_CAL_CTRL1 0x0f8 +#define QSERDES_V5_TX_DCC_CMUX_CAL_CTRL2 0x0fc +#define QSERDES_V5_TX_DIG_BKUP_CTRL 0x100 +#define QSERDES_V5_TX_DEBUG_BUS0 0x104 +#define QSERDES_V5_TX_DEBUG_BUS1 0x108 +#define QSERDES_V5_TX_DEBUG_BUS2 0x10c +#define QSERDES_V5_TX_DEBUG_BUS3 0x110 +#define QSERDES_V5_TX_READ_EQCODE 0x114 +#define QSERDES_V5_TX_READ_OFFSETCODE 0x118 +#define QSERDES_V5_TX_IA_ERROR_COUNTER_LOW 0x11c +#define QSERDES_V5_TX_IA_ERROR_COUNTER_HIGH 0x120 +#define QSERDES_V5_TX_VGA_READ_CODE 0x124 +#define QSERDES_V5_TX_VTH_READ_CODE 0x128 +#define QSERDES_V5_TX_DFE_TAP1_READ_CODE 0x12c +#define QSERDES_V5_TX_DFE_TAP2_READ_CODE 0x130 +#define QSERDES_V5_TX_IDAC_STATUS_I 0x134 +#define QSERDES_V5_TX_IDAC_STATUS_IBAR 0x138 +#define QSERDES_V5_TX_IDAC_STATUS_Q 0x13c +#define QSERDES_V5_TX_IDAC_STATUS_QBAR 0x140 +#define QSERDES_V5_TX_IDAC_STATUS_A 0x144 +#define QSERDES_V5_TX_IDAC_STATUS_ABAR 0x148 +#define QSERDES_V5_TX_IDAC_STATUS_SM_ON 0x14c +#define QSERDES_V5_TX_IDAC_STATUS_CAL_DONE 0x150 +#define QSERDES_V5_TX_IDAC_STATUS_SIGNERROR 0x154 +#define QSERDES_V5_TX_DCC_CAL_STATUS 0x158 +#define QSERDES_V5_TX_DCC_READ_CODE_STATUS 0x15c + +/* Only for QMP V5 PHY - RX registers */ +#define QSERDES_V5_RX_UCDR_FO_GAIN_HALF 0x000 +#define QSERDES_V5_RX_UCDR_FO_GAIN_QUARTER 0x004 +#define QSERDES_V5_RX_UCDR_FO_GAIN 0x008 +#define QSERDES_V5_RX_UCDR_SO_GAIN_HALF 0x00c +#define QSERDES_V5_RX_UCDR_SO_GAIN_QUARTER 0x010 +#define QSERDES_V5_RX_UCDR_SO_GAIN 0x014 +#define QSERDES_V5_RX_UCDR_SVS_FO_GAIN_HALF 0x018 +#define QSERDES_V5_RX_UCDR_SVS_FO_GAIN_QUARTER 0x01c +#define QSERDES_V5_RX_UCDR_SVS_FO_GAIN 0x020 +#define QSERDES_V5_RX_UCDR_SVS_SO_GAIN_HALF 0x024 +#define QSERDES_V5_RX_UCDR_SVS_SO_GAIN_QUARTER 0x028 +#define QSERDES_V5_RX_UCDR_SVS_SO_GAIN 0x02c +#define QSERDES_V5_RX_UCDR_FASTLOCK_FO_GAIN 0x030 +#define QSERDES_V5_RX_UCDR_SO_SATURATION_AND_ENABLE 0x034 +#define QSERDES_V5_RX_UCDR_FO_TO_SO_DELAY 0x038 +#define QSERDES_V5_RX_UCDR_FASTLOCK_COUNT_LOW 0x03c +#define QSERDES_V5_RX_UCDR_FASTLOCK_COUNT_HIGH 0x040 +#define QSERDES_V5_RX_UCDR_PI_CONTROLS 0x044 +#define QSERDES_V5_RX_UCDR_PI_CTRL2 0x048 +#define QSERDES_V5_RX_UCDR_SB2_THRESH1 0x04c +#define QSERDES_V5_RX_UCDR_SB2_THRESH2 0x050 +#define QSERDES_V5_RX_UCDR_SB2_GAIN1 0x054 +#define QSERDES_V5_RX_UCDR_SB2_GAIN2 0x058 +#define QSERDES_V5_RX_AUX_CONTROL 0x05c +#define QSERDES_V5_RX_AUX_DATA_TCOARSE_TFINE 0x060 +#define QSERDES_V5_RX_RCLK_AUXDATA_SEL 0x064 +#define QSERDES_V5_RX_AC_JTAG_ENABLE 0x068 +#define QSERDES_V5_RX_AC_JTAG_INITP 0x06c +#define QSERDES_V5_RX_AC_JTAG_INITN 0x070 +#define QSERDES_V5_RX_AC_JTAG_LVL 0x074 +#define QSERDES_V5_RX_AC_JTAG_MODE 0x078 +#define QSERDES_V5_RX_AC_JTAG_RESET 0x07c +#define QSERDES_V5_RX_RX_TERM_BW 0x080 +#define QSERDES_V5_RX_RX_RCVR_IQ_EN 0x084 +#define QSERDES_V5_RX_RX_IDAC_I_DC_OFFSETS 0x088 +#define QSERDES_V5_RX_RX_IDAC_IBAR_DC_OFFSETS 0x08c +#define QSERDES_V5_RX_RX_IDAC_Q_DC_OFFSETS 0x090 +#define QSERDES_V5_RX_RX_IDAC_QBAR_DC_OFFSETS 0x094 +#define QSERDES_V5_RX_RX_IDAC_A_DC_OFFSETS 0x098 +#define QSERDES_V5_RX_RX_IDAC_ABAR_DC_OFFSETS 0x09c +#define QSERDES_V5_RX_RX_IDAC_EN 0x0a0 +#define QSERDES_V5_RX_RX_IDAC_ENABLES 0x0a4 +#define QSERDES_V5_RX_RX_IDAC_SIGN 0x0a8 +#define QSERDES_V5_RX_RX_HIGHZ_HIGHRATE 0x0ac +#define QSERDES_V5_RX_RX_TERM_AC_BYPASS_DC_COUPLE_OFFSET 0x0b0 +#define QSERDES_V5_RX_DFE_1 0x0b4 +#define QSERDES_V5_RX_DFE_2 0x0b8 +#define QSERDES_V5_RX_DFE_3 0x0bc +#define QSERDES_V5_RX_DFE_4 0x0c0 +#define QSERDES_V5_RX_TX_ADAPT_PRE_THRESH1 0x0c4 +#define QSERDES_V5_RX_TX_ADAPT_PRE_THRESH2 0x0c8 +#define QSERDES_V5_RX_TX_ADAPT_POST_THRESH 0x0cc +#define QSERDES_V5_RX_TX_ADAPT_MAIN_THRESH 0x0d0 +#define QSERDES_V5_RX_VGA_CAL_CNTRL1 0x0d4 +#define QSERDES_V5_RX_VGA_CAL_CNTRL2 0x0d8 +#define QSERDES_V5_RX_GM_CAL 0x0dc +#define QSERDES_V5_RX_RX_VGA_GAIN2_LSB 0x0e0 +#define QSERDES_V5_RX_RX_VGA_GAIN2_MSB 0x0e4 +#define QSERDES_V5_RX_RX_EQU_ADAPTOR_CNTRL1 0x0e8 +#define QSERDES_V5_RX_RX_EQU_ADAPTOR_CNTRL2 0x0ec +#define QSERDES_V5_RX_RX_EQU_ADAPTOR_CNTRL3 0x0f0 +#define QSERDES_V5_RX_RX_EQU_ADAPTOR_CNTRL4 0x0f4 +#define QSERDES_V5_RX_RX_IDAC_TSETTLE_LOW 0x0f8 +#define QSERDES_V5_RX_RX_IDAC_TSETTLE_HIGH 0x0fc +#define QSERDES_V5_RX_RX_IDAC_MEASURE_TIME 0x100 +#define QSERDES_V5_RX_RX_IDAC_ACCUMULATOR 0x104 +#define QSERDES_V5_RX_RX_EQ_OFFSET_LSB 0x108 +#define QSERDES_V5_RX_RX_EQ_OFFSET_MSB 0x10c +#define QSERDES_V5_RX_RX_EQ_OFFSET_ADAPTOR_CNTRL1 0x110 +#define QSERDES_V5_RX_RX_OFFSET_ADAPTOR_CNTRL2 0x114 +#define QSERDES_V5_RX_SIGDET_ENABLES 0x118 +#define QSERDES_V5_RX_SIGDET_CNTRL 0x11c +#define QSERDES_V5_RX_SIGDET_LVL 0x120 +#define QSERDES_V5_RX_SIGDET_DEGLITCH_CNTRL 0x124 +#define QSERDES_V5_RX_RX_BAND 0x128 +#define QSERDES_V5_RX_CDR_FREEZE_UP_DN 0x12c +#define QSERDES_V5_RX_CDR_RESET_OVERRIDE 0x130 +#define QSERDES_V5_RX_RX_INTERFACE_MODE 0x134 +#define QSERDES_V5_RX_JITTER_GEN_MODE 0x138 +#define QSERDES_V5_RX_SJ_AMP1 0x13c +#define QSERDES_V5_RX_SJ_AMP2 0x140 +#define QSERDES_V5_RX_SJ_PER1 0x144 +#define QSERDES_V5_RX_SJ_PER2 0x148 +#define QSERDES_V5_RX_PPM_OFFSET1 0x14c +#define QSERDES_V5_RX_PPM_OFFSET2 0x150 +#define QSERDES_V5_RX_SIGN_PPM_PERIOD1 0x154 +#define QSERDES_V5_RX_SIGN_PPM_PERIOD2 0x158 +#define QSERDES_V5_RX_RX_MODE_00_LOW 0x15c +#define QSERDES_V5_RX_RX_MODE_00_HIGH 0x160 +#define QSERDES_V5_RX_RX_MODE_00_HIGH2 0x164 +#define QSERDES_V5_RX_RX_MODE_00_HIGH3 0x168 +#define QSERDES_V5_RX_RX_MODE_00_HIGH4 0x16c +#define QSERDES_V5_RX_RX_MODE_01_LOW 0x170 +#define QSERDES_V5_RX_RX_MODE_01_HIGH 0x174 +#define QSERDES_V5_RX_RX_MODE_01_HIGH2 0x178 +#define QSERDES_V5_RX_RX_MODE_01_HIGH3 0x17c +#define QSERDES_V5_RX_RX_MODE_01_HIGH4 0x180 +#define QSERDES_V5_RX_RX_MODE_10_LOW 0x184 +#define QSERDES_V5_RX_RX_MODE_10_HIGH 0x188 +#define QSERDES_V5_RX_RX_MODE_10_HIGH2 0x18c +#define QSERDES_V5_RX_RX_MODE_10_HIGH3 0x190 +#define QSERDES_V5_RX_RX_MODE_10_HIGH4 0x194 +#define QSERDES_V5_RX_PHPRE_CTRL 0x198 +#define QSERDES_V5_RX_PHPRE_INITVAL 0x19c +#define QSERDES_V5_RX_DFE_EN_TIMER 0x1a0 +#define QSERDES_V5_RX_DFE_CTLE_POST_CAL_OFFSET 0x1a4 +#define QSERDES_V5_RX_DCC_CTRL1 0x1a8 +#define QSERDES_V5_RX_DCC_CTRL2 0x1ac +#define QSERDES_V5_RX_VTH_CODE 0x1b0 +#define QSERDES_V5_RX_VTH_MIN_THRESH 0x1b4 +#define QSERDES_V5_RX_VTH_MAX_THRESH 0x1b8 +#define QSERDES_V5_RX_ALOG_OBSV_BUS_CTRL_1 0x1bc +#define QSERDES_V5_RX_PI_CTRL1 0x1c0 +#define QSERDES_V5_RX_PI_CTRL2 0x1c4 +#define QSERDES_V5_RX_PI_QUAD 0x1c8 +#define QSERDES_V5_RX_IDATA1 0x1cc +#define QSERDES_V5_RX_IDATA2 0x1d0 +#define QSERDES_V5_RX_AUX_DATA1 0x1d4 +#define QSERDES_V5_RX_AUX_DATA2 0x1d8 +#define QSERDES_V5_RX_AC_JTAG_OUTP 0x1dc +#define QSERDES_V5_RX_AC_JTAG_OUTN 0x1e0 +#define QSERDES_V5_RX_RX_SIGDET 0x1e4 +#define QSERDES_V5_RX_ALOG_OBSV_BUS_STATUS_1 0x1e8 + +/* Only for QMP V5 UFS ? */ +#define QSERDES_V5_TX_PWM_GEAR_1_DIVIDER_BAND0_1 0x178 +#define QSERDES_V5_TX_PWM_GEAR_2_DIVIDER_BAND0_1 0x17c +#define QSERDES_V5_TX_PWM_GEAR_3_DIVIDER_BAND0_1 0x180 +#define QSERDES_V5_TX_PWM_GEAR_4_DIVIDER_BAND0_1 0x184 + +#endif diff --git a/drivers/phy/qcom/phy-qcom-qmp-qserdes-txrx-v6.h b/drivers/phy/qcom/phy-qcom-qmp-qserdes-txrx-v6.h new file mode 100644 index 00000000000..23ffcfae9ef --- /dev/null +++ b/drivers/phy/qcom/phy-qcom-qmp-qserdes-txrx-v6.h @@ -0,0 +1,83 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2023, Linaro Limited + */ + +#ifndef QCOM_PHY_QMP_QSERDES_TXRX_USB_V6_H_ +#define QCOM_PHY_QMP_QSERDES_TXRX_USB_V6_H_ + +#define QSERDES_V6_TX_CLKBUF_ENABLE 0x08 +#define QSERDES_V6_TX_TX_EMP_POST1_LVL 0x0c +#define QSERDES_V6_TX_TX_DRV_LVL 0x14 +#define QSERDES_V6_TX_RESET_TSYNC_EN 0x1c +#define QSERDES_V6_TX_PRE_STALL_LDO_BOOST_EN 0x20 +#define QSERDES_V6_TX_TX_BAND 0x24 +#define QSERDES_V6_TX_INTERFACE_SELECT 0x2c +#define QSERDES_V6_TX_RES_CODE_LANE_TX 0x34 +#define QSERDES_V6_TX_RES_CODE_LANE_RX 0x38 +#define QSERDES_V6_TX_RES_CODE_LANE_OFFSET_TX 0x3c +#define QSERDES_V6_TX_RES_CODE_LANE_OFFSET_RX 0x40 +#define QSERDES_V6_TX_TRANSCEIVER_BIAS_EN 0x54 +#define QSERDES_V6_TX_HIGHZ_DRVR_EN 0x58 +#define QSERDES_V6_TX_TX_POL_INV 0x5c +#define QSERDES_V6_TX_PARRATE_REC_DETECT_IDLE_EN 0x60 +#define QSERDES_V6_TX_BIST_PATTERN7 0x7c +#define QSERDES_V6_TX_LANE_MODE_1 0x84 +#define QSERDES_V6_TX_LANE_MODE_2 0x88 +#define QSERDES_V6_TX_LANE_MODE_3 0x8c +#define QSERDES_V6_TX_LANE_MODE_4 0x90 +#define QSERDES_V6_TX_LANE_MODE_5 0x94 +#define QSERDES_V6_TX_RCV_DETECT_LVL_2 0xa4 +#define QSERDES_V6_TX_TRAN_DRVR_EMP_EN 0xc0 +#define QSERDES_V6_TX_TX_INTERFACE_MODE 0xc4 +#define QSERDES_V6_TX_VMODE_CTRL1 0xc8 +#define QSERDES_V6_TX_PI_QEC_CTRL 0xe4 + +#define QSERDES_V6_RX_UCDR_FO_GAIN 0x08 +#define QSERDES_V6_RX_UCDR_SO_GAIN 0x14 +#define QSERDES_V6_RX_UCDR_FASTLOCK_FO_GAIN 0x30 +#define QSERDES_V6_RX_UCDR_SO_SATURATION_AND_ENABLE 0x34 +#define QSERDES_V6_RX_UCDR_FASTLOCK_COUNT_LOW 0x3c +#define QSERDES_V6_RX_UCDR_FASTLOCK_COUNT_HIGH 0x40 +#define QSERDES_V6_RX_UCDR_PI_CONTROLS 0x44 +#define QSERDES_V6_RX_UCDR_SB2_THRESH1 0x4c +#define QSERDES_V6_RX_UCDR_SB2_THRESH2 0x50 +#define QSERDES_V6_RX_UCDR_SB2_GAIN1 0x54 +#define QSERDES_V6_RX_UCDR_SB2_GAIN2 0x58 +#define QSERDES_V6_RX_AUX_DATA_TCOARSE_TFINE 0x60 +#define QSERDES_V6_RX_TX_ADAPT_POST_THRESH 0xcc +#define QSERDES_V6_RX_VGA_CAL_CNTRL1 0xd4 +#define QSERDES_V6_RX_VGA_CAL_CNTRL2 0xd8 +#define QSERDES_V6_RX_GM_CAL 0xdc +#define QSERDES_V6_RX_RX_EQU_ADAPTOR_CNTRL2 0xec +#define QSERDES_V6_RX_RX_EQU_ADAPTOR_CNTRL3 0xf0 +#define QSERDES_V6_RX_RX_EQU_ADAPTOR_CNTRL4 0xf4 +#define QSERDES_V6_RX_RX_IDAC_TSETTLE_LOW 0xf8 +#define QSERDES_V6_RX_RX_IDAC_TSETTLE_HIGH 0xfc +#define QSERDES_V6_RX_RX_EQ_OFFSET_ADAPTOR_CNTRL1 0x110 +#define QSERDES_V6_RX_SIDGET_ENABLES 0x118 +#define QSERDES_V6_RX_SIGDET_CNTRL 0x11c +#define QSERDES_V6_RX_SIGDET_DEGLITCH_CNTRL 0x124 +#define QSERDES_V6_RX_RX_MODE_00_LOW 0x15c +#define QSERDES_V6_RX_RX_MODE_00_HIGH 0x160 +#define QSERDES_V6_RX_RX_MODE_00_HIGH2 0x164 +#define QSERDES_V6_RX_RX_MODE_00_HIGH3 0x168 +#define QSERDES_V6_RX_RX_MODE_00_HIGH4 0x16c +#define QSERDES_V6_RX_RX_MODE_01_LOW 0x170 +#define QSERDES_V6_RX_RX_MODE_01_HIGH 0x174 +#define QSERDES_V6_RX_RX_MODE_01_HIGH2 0x178 +#define QSERDES_V6_RX_RX_MODE_01_HIGH3 0x17c +#define QSERDES_V6_RX_RX_MODE_01_HIGH4 0x180 +#define QSERDES_V6_RX_RX_MODE_10_LOW 0x184 +#define QSERDES_V6_RX_RX_MODE_10_HIGH 0x188 +#define QSERDES_V6_RX_RX_MODE_10_HIGH2 0x18c +#define QSERDES_V6_RX_RX_MODE_10_HIGH3 0x190 +#define QSERDES_V6_RX_RX_MODE_10_HIGH4 0x194 +#define QSERDES_V6_RX_DFE_EN_TIMER 0x1a0 +#define QSERDES_V6_RX_DFE_CTLE_POST_CAL_OFFSET 0x1a4 +#define QSERDES_V6_RX_DCC_CTRL1 0x1a8 +#define QSERDES_V6_RX_VTH_CODE 0x1b0 +#define QSERDES_V6_RX_SIGDET_CAL_CTRL1 0x1e4 +#define QSERDES_V6_RX_SIGDET_CAL_TRIM 0x1f8 + +#endif diff --git a/drivers/phy/qcom/phy-qcom-qmp-qserdes-txrx-v6_20.h b/drivers/phy/qcom/phy-qcom-qmp-qserdes-txrx-v6_20.h new file mode 100644 index 00000000000..7bac5d5c6c3 --- /dev/null +++ b/drivers/phy/qcom/phy-qcom-qmp-qserdes-txrx-v6_20.h @@ -0,0 +1,51 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2023, Linaro Limited + */ + +#ifndef QCOM_PHY_QMP_QSERDES_TXRX_PCIE_V6_20_H_ +#define QCOM_PHY_QMP_QSERDES_TXRX_PCIE_V6_20_H_ + +#define QSERDES_V6_20_TX_RES_CODE_LANE_OFFSET_TX 0x30 +#define QSERDES_V6_20_TX_RES_CODE_LANE_OFFSET_RX 0x34 +#define QSERDES_V6_20_TX_TRAN_DRVR_EMP_EN 0xac +#define QSERDES_V6_20_TX_LANE_MODE_1 0x78 +#define QSERDES_V6_20_TX_LANE_MODE_2 0x7c +#define QSERDES_V6_20_TX_LANE_MODE_3 0x80 + +#define QSERDES_V6_20_RX_UCDR_FO_GAIN_RATE_2 0x08 +#define QSERDES_V6_20_RX_UCDR_FO_GAIN_RATE_3 0x0c +#define QSERDES_V6_20_RX_UCDR_SO_GAIN_RATE_2 0x18 +#define QSERDES_V6_20_RX_UCDR_PI_CONTROLS 0x20 +#define QSERDES_V6_20_RX_UCDR_SO_ACC_DEFAULT_VAL_RATE3 0x34 +#define QSERDES_V6_20_RX_IVCM_CAL_CTRL2 0x9c +#define QSERDES_V6_20_RX_IVCM_POSTCAL_OFFSET 0xa0 +#define QSERDES_V6_20_RX_DFE_1 0xac +#define QSERDES_V6_20_RX_DFE_2 0xb0 +#define QSERDES_V6_20_RX_DFE_3 0xb4 +#define QSERDES_V6_20_RX_TX_ADPT_CTRL 0xd4 +#define QSERDES_V6_20_VGA_CAL_CNTRL1 0xe0 +#define QSERDES_V6_20_RX_VGA_CAL_MAN_VAL 0xe8 +#define QSERDES_V6_20_RX_GM_CAL 0x10c +#define QSERDES_V6_20_RX_EQU_ADAPTOR_CNTRL4 0x120 +#define QSERDES_V6_20_RX_SIGDET_ENABLES 0x148 +#define QSERDES_V6_20_RX_PHPRE_CTRL 0x188 +#define QSERDES_V6_20_RX_DFE_CTLE_POST_CAL_OFFSET 0x194 +#define QSERDES_V6_20_RX_Q_PI_INTRINSIC_BIAS_RATE32 0x1dc +#define QSERDES_V6_20_RX_MODE_RATE2_B0 0x1f4 +#define QSERDES_V6_20_RX_MODE_RATE2_B1 0x1f8 +#define QSERDES_V6_20_RX_MODE_RATE2_B2 0x1fc +#define QSERDES_V6_20_RX_MODE_RATE2_B3 0x200 +#define QSERDES_V6_20_RX_MODE_RATE2_B4 0x204 +#define QSERDES_V6_20_RX_MODE_RATE2_B5 0x208 +#define QSERDES_V6_20_RX_MODE_RATE2_B6 0x20c +#define QSERDES_V6_20_RX_MODE_RATE3_B0 0x210 +#define QSERDES_V6_20_RX_MODE_RATE3_B1 0x214 +#define QSERDES_V6_20_RX_MODE_RATE3_B2 0x218 +#define QSERDES_V6_20_RX_MODE_RATE3_B3 0x21c +#define QSERDES_V6_20_RX_MODE_RATE3_B4 0x220 +#define QSERDES_V6_20_RX_MODE_RATE3_B5 0x224 +#define QSERDES_V6_20_RX_MODE_RATE3_B6 0x228 +#define QSERDES_V6_20_RX_BKUP_CTRL1 0x22c + +#endif diff --git a/drivers/phy/qcom/phy-qcom-qmp-ufs.c b/drivers/phy/qcom/phy-qcom-qmp-ufs.c index 5c90d60e7d1..449b9767778 100644 --- a/drivers/phy/qcom/phy-qcom-qmp-ufs.c +++ b/drivers/phy/qcom/phy-qcom-qmp-ufs.c @@ -33,8 +33,10 @@ #include "phy-qcom-qmp-pcs-ufs-v6.h" #include "phy-qcom-qmp-qserdes-com-v4.h" +#include "phy-qcom-qmp-qserdes-com-v5.h" #include "phy-qcom-qmp-qserdes-com-v6.h" #include "phy-qcom-qmp-qserdes-txrx-v4.h" +#include "phy-qcom-qmp-qserdes-txrx-v5.h" #include "phy-qcom-qmp-qserdes-txrx-ufs-v6.h" /* QPHY_SW_RESET bit */ @@ -97,6 +99,13 @@ static const unsigned int ufsphy_v4_regs_layout[QPHY_LAYOUT_SIZE] = { [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V4_PCS_UFS_POWER_DOWN_CONTROL, }; +static const unsigned int ufsphy_v5_regs_layout[QPHY_LAYOUT_SIZE] = { + [QPHY_START_CTRL] = QPHY_V5_PCS_UFS_PHY_START, + [QPHY_PCS_READY_STATUS] = QPHY_V5_PCS_UFS_READY_STATUS, + [QPHY_SW_RESET] = QPHY_V5_PCS_UFS_SW_RESET, + [QPHY_PCS_POWER_DOWN_CONTROL] = QPHY_V5_PCS_UFS_POWER_DOWN_CONTROL, +}; + static const unsigned int ufsphy_v6_regs_layout[QPHY_LAYOUT_SIZE] = { [QPHY_START_CTRL] = QPHY_V6_PCS_UFS_PHY_START, [QPHY_PCS_READY_STATUS] = QPHY_V6_PCS_UFS_READY_STATUS, @@ -458,6 +467,128 @@ static const struct qmp_ufs_init_tbl sm8650_ufsphy_rx[] = { QMP_PHY_INIT_CFG(QSERDES_UFS_V6_RX_DLL0_FTUNE_CTRL, 0x30), }; +static const struct qmp_ufs_init_tbl sm8350_ufsphy_serdes[] = { + QMP_PHY_INIT_CFG(QSERDES_V5_COM_SYSCLK_EN_SEL, 0xd9), + QMP_PHY_INIT_CFG(QSERDES_V5_COM_HSCLK_SEL, 0x11), + QMP_PHY_INIT_CFG(QSERDES_V5_COM_HSCLK_HS_SWITCH_SEL, 0x00), + QMP_PHY_INIT_CFG(QSERDES_V5_COM_LOCK_CMP_EN, 0x42), + QMP_PHY_INIT_CFG(QSERDES_V5_COM_VCO_TUNE_MAP, 0x02), + QMP_PHY_INIT_CFG(QSERDES_V5_COM_PLL_IVCO, 0x0f), + QMP_PHY_INIT_CFG(QSERDES_V5_COM_VCO_TUNE_INITVAL2, 0x00), + QMP_PHY_INIT_CFG(QSERDES_V5_COM_BIN_VCOCAL_HSCLK_SEL, 0x11), + QMP_PHY_INIT_CFG(QSERDES_V5_COM_DEC_START_MODE0, 0x82), + QMP_PHY_INIT_CFG(QSERDES_V5_COM_CP_CTRL_MODE0, 0x14), + QMP_PHY_INIT_CFG(QSERDES_V5_COM_PLL_RCTRL_MODE0, 0x18), + QMP_PHY_INIT_CFG(QSERDES_V5_COM_PLL_CCTRL_MODE0, 0x18), + QMP_PHY_INIT_CFG(QSERDES_V5_COM_LOCK_CMP1_MODE0, 0xff), + QMP_PHY_INIT_CFG(QSERDES_V5_COM_LOCK_CMP2_MODE0, 0x19), + QMP_PHY_INIT_CFG(QSERDES_V5_COM_BIN_VCOCAL_CMP_CODE1_MODE0, 0xac), + QMP_PHY_INIT_CFG(QSERDES_V5_COM_BIN_VCOCAL_CMP_CODE2_MODE0, 0x1e), + QMP_PHY_INIT_CFG(QSERDES_V5_COM_DEC_START_MODE1, 0x98), + QMP_PHY_INIT_CFG(QSERDES_V5_COM_CP_CTRL_MODE1, 0x14), + QMP_PHY_INIT_CFG(QSERDES_V5_COM_PLL_RCTRL_MODE1, 0x18), + QMP_PHY_INIT_CFG(QSERDES_V5_COM_PLL_CCTRL_MODE1, 0x18), + QMP_PHY_INIT_CFG(QSERDES_V5_COM_LOCK_CMP1_MODE1, 0x65), + QMP_PHY_INIT_CFG(QSERDES_V5_COM_LOCK_CMP2_MODE1, 0x1e), + QMP_PHY_INIT_CFG(QSERDES_V5_COM_BIN_VCOCAL_CMP_CODE1_MODE1, 0xdd), + QMP_PHY_INIT_CFG(QSERDES_V5_COM_BIN_VCOCAL_CMP_CODE2_MODE1, 0x23), +}; + +static const struct qmp_ufs_init_tbl sm8350_ufsphy_hs_b_serdes[] = { + QMP_PHY_INIT_CFG(QSERDES_V5_COM_VCO_TUNE_MAP, 0x06), +}; + +static const struct qmp_ufs_init_tbl sm8350_ufsphy_tx[] = { + QMP_PHY_INIT_CFG(QSERDES_V5_TX_PWM_GEAR_1_DIVIDER_BAND0_1, 0x06), + QMP_PHY_INIT_CFG(QSERDES_V5_TX_PWM_GEAR_2_DIVIDER_BAND0_1, 0x03), + QMP_PHY_INIT_CFG(QSERDES_V5_TX_PWM_GEAR_3_DIVIDER_BAND0_1, 0x01), + QMP_PHY_INIT_CFG(QSERDES_V5_TX_PWM_GEAR_4_DIVIDER_BAND0_1, 0x00), + QMP_PHY_INIT_CFG(QSERDES_V5_TX_LANE_MODE_1, 0xf5), + QMP_PHY_INIT_CFG(QSERDES_V5_TX_LANE_MODE_3, 0x3f), + QMP_PHY_INIT_CFG(QSERDES_V5_TX_RES_CODE_LANE_OFFSET_TX, 0x09), + QMP_PHY_INIT_CFG(QSERDES_V5_TX_RES_CODE_LANE_OFFSET_RX, 0x09), + QMP_PHY_INIT_CFG(QSERDES_V5_TX_TRAN_DRVR_EMP_EN, 0x0c), +}; + +static const struct qmp_ufs_init_tbl sm8350_ufsphy_rx[] = { + QMP_PHY_INIT_CFG(QSERDES_V5_RX_SIGDET_LVL, 0x24), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_SIGDET_CNTRL, 0x0f), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_SIGDET_DEGLITCH_CNTRL, 0x1e), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_BAND, 0x18), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_UCDR_FASTLOCK_FO_GAIN, 0x0a), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_UCDR_SO_SATURATION_AND_ENABLE, 0x5a), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_UCDR_PI_CONTROLS, 0xf1), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_UCDR_FASTLOCK_COUNT_LOW, 0x80), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_UCDR_PI_CTRL2, 0x80), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_UCDR_FO_GAIN, 0x0e), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_UCDR_SO_GAIN, 0x04), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_TERM_BW, 0x1b), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_EQU_ADAPTOR_CNTRL1, 0x04), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_EQU_ADAPTOR_CNTRL2, 0x06), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_EQU_ADAPTOR_CNTRL3, 0x04), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_EQU_ADAPTOR_CNTRL4, 0x1a), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_EQ_OFFSET_ADAPTOR_CNTRL1, 0x17), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_OFFSET_ADAPTOR_CNTRL2, 0x00), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_IDAC_MEASURE_TIME, 0x10), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_IDAC_TSETTLE_LOW, 0xc0), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_IDAC_TSETTLE_HIGH, 0x00), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_00_LOW, 0x6d), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_00_HIGH, 0x6d), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_00_HIGH2, 0xed), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_00_HIGH3, 0x3b), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_00_HIGH4, 0x3c), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_01_LOW, 0xe0), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_01_HIGH, 0xc8), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_01_HIGH2, 0xc8), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_01_HIGH3, 0x3b), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_01_HIGH4, 0xb7), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_10_LOW, 0xe0), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_10_HIGH, 0xc8), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_10_HIGH2, 0xc8), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_10_HIGH3, 0x3b), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_10_HIGH4, 0xb7), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_DCC_CTRL1, 0x0c), +}; + +static const struct qmp_ufs_init_tbl sm8350_ufsphy_pcs[] = { + QMP_PHY_INIT_CFG(QPHY_V5_PCS_UFS_RX_SIGDET_CTRL2, 0x6d), + QMP_PHY_INIT_CFG(QPHY_V5_PCS_UFS_TX_LARGE_AMP_DRV_LVL, 0x0a), + QMP_PHY_INIT_CFG(QPHY_V5_PCS_UFS_TX_SMALL_AMP_DRV_LVL, 0x02), + QMP_PHY_INIT_CFG(QPHY_V5_PCS_UFS_TX_MID_TERM_CTRL1, 0x43), + QMP_PHY_INIT_CFG(QPHY_V5_PCS_UFS_DEBUG_BUS_CLKSEL, 0x1f), + QMP_PHY_INIT_CFG(QPHY_V5_PCS_UFS_RX_MIN_HIBERN8_TIME, 0xff), + QMP_PHY_INIT_CFG(QPHY_V5_PCS_UFS_RX_SIGDET_CTRL1, 0x0e), + QMP_PHY_INIT_CFG(QPHY_V5_PCS_UFS_MULTI_LANE_CTRL1, 0x02), +}; + +static const struct qmp_ufs_init_tbl sm8350_ufsphy_g4_tx[] = { + QMP_PHY_INIT_CFG(QSERDES_V5_TX_LANE_MODE_1, 0xe5), +}; + +static const struct qmp_ufs_init_tbl sm8350_ufsphy_g4_rx[] = { + QMP_PHY_INIT_CFG(QSERDES_V5_RX_UCDR_PI_CTRL2, 0x81), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_TERM_BW, 0x6f), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_EQU_ADAPTOR_CNTRL2, 0x00), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_EQU_ADAPTOR_CNTRL3, 0x4a), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_EQU_ADAPTOR_CNTRL4, 0x0a), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_IDAC_MEASURE_TIME, 0x20), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_IDAC_TSETTLE_LOW, 0x80), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_IDAC_TSETTLE_HIGH, 0x01), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_00_LOW, 0xbf), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_00_HIGH, 0xbf), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_00_HIGH2, 0x7f), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_00_HIGH3, 0x7f), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_00_HIGH4, 0x2d), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_01_LOW, 0x6d), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_01_HIGH, 0x6d), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_01_HIGH2, 0xed), + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_01_HIGH4, 0x3c), +}; + +static const struct qmp_ufs_init_tbl sm8350_ufsphy_g4_pcs[] = { + QMP_PHY_INIT_CFG(QPHY_V5_PCS_UFS_BIST_FIXED_PAT_CTRL, 0x0a), +}; + static const struct qmp_ufs_init_tbl sm8650_ufsphy_pcs[] = { QMP_PHY_INIT_CFG(QPHY_V6_PCS_UFS_MULTI_LANE_CTRL1, 0x02), QMP_PHY_INIT_CFG(QPHY_V6_PCS_UFS_TX_MID_TERM_CTRL1, 0x43), @@ -690,6 +821,11 @@ static const char * const sdm845_ufs_phy_clk_l[] = { "ref", "ref_aux", }; +/* the primary usb3 phy on sm8250 doesn't have a ref clock */ +static const char * const sm8450_ufs_phy_clk_l[] = { + "qref", "ref", "ref_aux", +}; + /* list of regulators */ static const char * const qmp_ufs_vreg_l[] = { "vdda-phy", "vdda-pll", @@ -909,6 +1045,40 @@ static const struct qmp_ufs_cfg sc7280_ufsphy_cfg = { .regs = ufsphy_v4_regs_layout, }; +static const struct qmp_ufs_cfg sa8775p_ufsphy_cfg = { + .lanes = 2, + + .offsets = &qmp_ufs_offsets, + + .tbls = { + .serdes = sm8350_ufsphy_serdes, + .serdes_num = ARRAY_SIZE(sm8350_ufsphy_serdes), + .tx = sm8350_ufsphy_tx, + .tx_num = ARRAY_SIZE(sm8350_ufsphy_tx), + .rx = sm8350_ufsphy_rx, + .rx_num = ARRAY_SIZE(sm8350_ufsphy_rx), + .pcs = sm8350_ufsphy_pcs, + .pcs_num = ARRAY_SIZE(sm8350_ufsphy_pcs), + }, + .tbls_hs_b = { + .serdes = sm8350_ufsphy_hs_b_serdes, + .serdes_num = ARRAY_SIZE(sm8350_ufsphy_hs_b_serdes), + }, + .tbls_hs_g4 = { + .tx = sm8350_ufsphy_g4_tx, + .tx_num = ARRAY_SIZE(sm8350_ufsphy_g4_tx), + .rx = sm8350_ufsphy_g4_rx, + .rx_num = ARRAY_SIZE(sm8350_ufsphy_g4_rx), + .pcs = sm8350_ufsphy_g4_pcs, + .pcs_num = ARRAY_SIZE(sm8350_ufsphy_g4_pcs), + }, + .clk_list = sm8450_ufs_phy_clk_l, + .num_clks = ARRAY_SIZE(sm8450_ufs_phy_clk_l), + .vreg_list = qmp_ufs_vreg_l, + .num_vregs = ARRAY_SIZE(qmp_ufs_vreg_l), + .regs = ufsphy_v5_regs_layout, +}; + static void qmp_ufs_configure_lane(void __iomem *base, const struct qmp_ufs_init_tbl tbl[], int num, @@ -1295,6 +1465,7 @@ static struct phy_ops qmp_ufs_ops = { }; static const struct udevice_id qmp_ufs_ids[] = { + { .compatible = "qcom,sa8775p-qmp-ufs-phy", .data = (ulong)&sa8775p_ufsphy_cfg, }, { .compatible = "qcom,sdm845-qmp-ufs-phy", .data = (ulong)&sdm845_ufsphy_cfg }, { .compatible = "qcom,sm8150-qmp-ufs-phy", .data = (ulong)&sm8150_ufsphy_cfg }, { .compatible = "qcom,sm8250-qmp-ufs-phy", .data = (ulong)&sm8250_ufsphy_cfg }, diff --git a/drivers/pinctrl/nxp/pinctrl-imx.c b/drivers/pinctrl/nxp/pinctrl-imx.c index b1960c56b51..54cec37327c 100644 --- a/drivers/pinctrl/nxp/pinctrl-imx.c +++ b/drivers/pinctrl/nxp/pinctrl-imx.c @@ -219,7 +219,7 @@ int imx_pinctrl_probe(struct udevice *dev, if (info->flags & IMX8_USE_SCU) return 0; - addr = ofnode_get_addr_size_index(dev_ofnode(dev), 0, &size); + addr = ofnode_get_addr_size_index(node, 0, &size); if (addr == FDT_ADDR_T_NONE) return -EINVAL; @@ -228,7 +228,7 @@ int imx_pinctrl_probe(struct udevice *dev, return -ENOMEM; priv->info = info; - info->mux_mask = ofnode_read_u32(node, "fsl,mux_mask", 0); + info->mux_mask = ofnode_read_u32_default(node, "fsl,mux_mask", 0); /* * Refer to linux documentation for details: * Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig index 4f93a34281d..d3eb6998551 100644 --- a/drivers/pinctrl/qcom/Kconfig +++ b/drivers/pinctrl/qcom/Kconfig @@ -83,6 +83,13 @@ config PINCTRL_QCOM_SM8650 Say Y here to enable support for pinctrl on the Snapdragon SM8650 SoC, as well as the associated GPIO driver. +config PINCTRL_QCOM_X1E80100 + bool "Qualcomm X1E80100 GCC" + select PINCTRL_QCOM + help + Say Y here to enable support for pinctrl on the Snapdragon X1E80100 SoC, + as well as the associated GPIO driver. + endmenu endif diff --git a/drivers/pinctrl/qcom/Makefile b/drivers/pinctrl/qcom/Makefile index 43d0dd29222..06d3c95f93a 100644 --- a/drivers/pinctrl/qcom/Makefile +++ b/drivers/pinctrl/qcom/Makefile @@ -14,3 +14,4 @@ obj-$(CONFIG_PINCTRL_QCOM_SM8150) += pinctrl-sm8150.o obj-$(CONFIG_PINCTRL_QCOM_SM8250) += pinctrl-sm8250.o obj-$(CONFIG_PINCTRL_QCOM_SM8550) += pinctrl-sm8550.o obj-$(CONFIG_PINCTRL_QCOM_SM8650) += pinctrl-sm8650.o +obj-$(CONFIG_PINCTRL_QCOM_X1E80100) += pinctrl-x1e80100.o diff --git a/drivers/pinctrl/qcom/pinctrl-sm8550.c b/drivers/pinctrl/qcom/pinctrl-sm8550.c index c65dfe0435e..25b972a6d82 100644 --- a/drivers/pinctrl/qcom/pinctrl-sm8550.c +++ b/drivers/pinctrl/qcom/pinctrl-sm8550.c @@ -16,6 +16,7 @@ static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); static const struct pinctrl_function msm_pinctrl_functions[] = { {"qup1_se7", 1}, {"gpio", 0}, + {"pcie1_clk_req_n", 1}, }; #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \ diff --git a/drivers/pinctrl/qcom/pinctrl-sm8650.c b/drivers/pinctrl/qcom/pinctrl-sm8650.c index 58fc94e71ac..9146d6abd9a 100644 --- a/drivers/pinctrl/qcom/pinctrl-sm8650.c +++ b/drivers/pinctrl/qcom/pinctrl-sm8650.c @@ -16,6 +16,8 @@ static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); static const struct pinctrl_function msm_pinctrl_functions[] = { {"qup2_se7", 1}, {"gpio", 0}, + {"pcie0_clk_req_n", 1}, + {"pcie1_clk_req_n", 1}, }; #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \ diff --git a/drivers/pinctrl/qcom/pinctrl-x1e80100.c b/drivers/pinctrl/qcom/pinctrl-x1e80100.c new file mode 100644 index 00000000000..f39dc426d68 --- /dev/null +++ b/drivers/pinctrl/qcom/pinctrl-x1e80100.c @@ -0,0 +1,105 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Qualcomm x1e80100 pinctrl + * + * (C) Copyright 2024 Linaro Ltd. + * + */ + +#include <dm.h> + +#include "pinctrl-qcom.h" + +#define MAX_PIN_NAME_LEN 32 +static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); + +static const struct pinctrl_function msm_pinctrl_functions[] = { + {"qup2_se5", 1}, + {"pcie3_clk", 1}, + {"pcie4_clk", 1}, + {"pcie5_clk", 1}, + {"pcie6a_clk", 1}, + {"pcie6b_clk", 1}, + {"gpio", 0}, +}; + +#define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \ + { \ + .name = pg_name, \ + .ctl_reg = ctl, \ + .io_reg = 0, \ + .pull_bit = pull, \ + .drv_bit = drv, \ + .oe_bit = -1, \ + .in_bit = -1, \ + .out_bit = -1, \ + } + +#define UFS_RESET(pg_name, ctl) \ + { \ + .name = pg_name, \ + .ctl_reg = ctl, \ + .io_reg = ctl + 0x4, \ + .pull_bit = 3, \ + .drv_bit = 0, \ + .oe_bit = -1, \ + .in_bit = -1, \ + .out_bit = 0, \ + } + +static const struct msm_special_pin_data msm_special_pins_data[] = { + [0] = UFS_RESET("ufs_reset", 0xf9000), + [1] = SDC_QDSD_PINGROUP("sdc2_clk", 0xf2000, 14, 6), + [2] = SDC_QDSD_PINGROUP("sdc2_cmd", 0xf2000, 11, 3), + [3] = SDC_QDSD_PINGROUP("sdc2_data", 0xf2000, 9, 0), +}; + +static const char *x1e80100_get_function_name(struct udevice *dev, + unsigned int selector) +{ + return msm_pinctrl_functions[selector].name; +} + +static const char *x1e80100_get_pin_name(struct udevice *dev, + unsigned int selector) +{ + if (selector >= 238 && selector <= 241) + snprintf(pin_name, MAX_PIN_NAME_LEN, + msm_special_pins_data[selector - 238].name); + else + snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); + + return pin_name; +} + +static unsigned int x1e80100_get_function_mux(__maybe_unused unsigned int pin, + unsigned int selector) +{ + return msm_pinctrl_functions[selector].val; +} + +static struct msm_pinctrl_data x1e80100_data = { + .pin_data = { + .pin_count = 242, + .special_pins_start = 238, + .special_pins_data = msm_special_pins_data, + }, + .functions_count = ARRAY_SIZE(msm_pinctrl_functions), + .get_function_name = x1e80100_get_function_name, + .get_function_mux = x1e80100_get_function_mux, + .get_pin_name = x1e80100_get_pin_name, +}; + +static const struct udevice_id msm_pinctrl_ids[] = { + { .compatible = "qcom,x1e80100-tlmm", .data = (ulong)&x1e80100_data }, + { /* Sentinel */ } +}; + +U_BOOT_DRIVER(pinctrl_x1e80100) = { + .name = "pinctrl_x1e80100", + .id = UCLASS_NOP, + .of_match = msm_pinctrl_ids, + .ops = &msm_pinctrl_ops, + .bind = msm_pinctrl_bind, +}; + diff --git a/drivers/power/pmic/tps65941.c b/drivers/power/pmic/tps65941.c index c3490db2a08..57d470521fc 100644 --- a/drivers/power/pmic/tps65941.c +++ b/drivers/power/pmic/tps65941.c @@ -74,7 +74,7 @@ static const struct udevice_id tps65941_ids[] = { { .compatible = "ti,tps659412", .data = TPS659411 }, { .compatible = "ti,tps659413", .data = TPS659413 }, { .compatible = "ti,lp876441", .data = LP876441 }, - { .compatible = "ti,tps65224", .data = TPS65224 }, + { .compatible = "ti,tps65224-q1", .data = TPS65224 }, { .compatible = "ti,tps6594-q1", .data = TPS659411 }, { .compatible = "ti,tps6593-q1", .data = TPS659413 }, { .compatible = "ti,lp8764-q1", .data = LP876441 }, diff --git a/drivers/power/regulator/qcom-rpmh-regulator.c b/drivers/power/regulator/qcom-rpmh-regulator.c index 2dc261d83e3..70df51b5fa4 100644 --- a/drivers/power/regulator/qcom-rpmh-regulator.c +++ b/drivers/power/regulator/qcom-rpmh-regulator.c @@ -536,6 +536,21 @@ static const struct rpmh_vreg_init_data pm8550ve_vreg_data[] = { {} }; +static const struct rpmh_vreg_init_data pmc8380_vreg_data[] = { + RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525_lv, "vdd-s1"), + RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525_lv, "vdd-s2"), + RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525_lv, "vdd-s3"), + RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525_mv, "vdd-s4"), + RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525_lv, "vdd-s5"), + RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525_lv, "vdd-s6"), + RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps525_lv, "vdd-s7"), + RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps525_lv, "vdd-s8"), + RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1"), + RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2"), + RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"), + {} +}; + /* probe an individual regulator */ static int rpmh_regulator_probe(struct udevice *dev) { @@ -662,6 +677,10 @@ static const struct udevice_id rpmh_regulator_ids[] = { .compatible = "qcom,pm8550vs-rpmh-regulators", .data = (ulong)pm8550vs_vreg_data, }, + { + .compatible = "qcom,pmc8380-rpmh-regulators", + .data = (ulong)pmc8380_vreg_data, + }, { /* sentinal */ }, }; diff --git a/drivers/power/regulator/tps65219_regulator.c b/drivers/power/regulator/tps65219_regulator.c index b7124fed024..88abc896b3a 100644 --- a/drivers/power/regulator/tps65219_regulator.c +++ b/drivers/power/regulator/tps65219_regulator.c @@ -72,12 +72,12 @@ static int tps65219_buck_enable(struct udevice *dev, int op, bool *enable) static int tps65219_buck_volt2val(int uV) { - if (uV > TPS65219_BUCK_VOLT_MAX) + if (uV > TPS65219_BUCK_3V4) return -EINVAL; - else if (uV >= 1400000) - return (uV - 1400000) / 100000 + 0x20; - else if (uV >= 600000) - return (uV - 600000) / 25000 + 0x00; + else if (uV >= TPS65219_BUCK_1V4) + return (uV - TPS65219_BUCK_1V4) / TPS65219_VOLT_STEP_100MV + TPS65219_BUCK_REG_1V4; + else if (uV >= TPS65219_BUCK_0V6) + return (uV - TPS65219_BUCK_0V6) / TPS65219_VOLT_STEP_25MV + TPS65219_BUCK_REG_0V6; else return -EINVAL; } @@ -86,12 +86,12 @@ static int tps65219_buck_val2volt(int val) { if (val > TPS65219_VOLT_MASK) return -EINVAL; - else if (val > 0x34) - return TPS65219_BUCK_VOLT_MAX; - else if (val > 0x20) - return 1400000 + (val - 0x20) * 100000; - else if (val >= 0) - return 600000 + val * 25000; + else if (val > TPS65219_BUCK_REG_3V4) + return TPS65219_BUCK_3V4; + else if (val > TPS65219_BUCK_REG_1V4) + return TPS65219_BUCK_1V4 + (val - TPS65219_BUCK_REG_1V4) * TPS65219_VOLT_STEP_100MV; + else if (val >= TPS65219_BUCK_REG_0V6) + return TPS65219_BUCK_0V6 + val * TPS65219_VOLT_STEP_25MV; else return -EINVAL; } @@ -161,7 +161,7 @@ static int tps65219_ldo_volt2val(int idx, int uV) if (uV > max) return -EINVAL; else if (uV >= base) - return (uV - TPS65219_LDO12_VOLT_MIN) / 50000; + return (uV - TPS65219_LDO12_VOLT_MIN) / TPS65219_VOLT_STEP_50MV; else return -EINVAL; } @@ -187,7 +187,7 @@ static int tps65219_ldo_val2volt(int idx, int val) else if (val <= reg_base) return base; else if (val >= 0) - return TPS65219_LDO12_VOLT_MIN + (50000 * val); + return TPS65219_LDO12_VOLT_MIN + (TPS65219_VOLT_STEP_50MV * val); else return -EINVAL; } @@ -250,7 +250,7 @@ static int tps65219_ldo_probe(struct udevice *dev) /* idx must be in 1..TPS65219_LDO_NUM */ idx = dev->driver_data; if (idx < 1 || idx > TPS65219_LDO_NUM) { - printf("Wrong ID for regulator\n"); + pr_err("Wrong ID for regulator\n"); return -EINVAL; } @@ -271,7 +271,7 @@ static int tps65219_buck_probe(struct udevice *dev) /* idx must be in 1..TPS65219_BUCK_NUM */ idx = dev->driver_data; if (idx < 1 || idx > TPS65219_BUCK_NUM) { - printf("Wrong ID for regulator\n"); + pr_err("Wrong ID for regulator\n"); return -EINVAL; } diff --git a/drivers/pwm/pwm-mtk.c b/drivers/pwm/pwm-mtk.c index 9776a41ff48..5cf2eba2ba0 100644 --- a/drivers/pwm/pwm-mtk.c +++ b/drivers/pwm/pwm-mtk.c @@ -192,7 +192,7 @@ static const struct mtk_pwm_soc mt7629_data = { }; static const struct mtk_pwm_soc mt7981_data = { - .num_pwms = 2, + .num_pwms = 3, .pwm45_fixup = false, .reg_ver = PWM_REG_V2, }; diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig index 2b0cd312883..899d7585489 100644 --- a/drivers/ram/Kconfig +++ b/drivers/ram/Kconfig @@ -116,6 +116,16 @@ config IMXRT_SDRAM to support external memories like sdram, psram & nand. This driver is for the sdram memory interface with the SEMC. +config K3_INLINE_ECC + bool "Enable TI Inline ECC support" + depends on K3_DDRSS + help + Enable Inline ECC support on K3 platforms. 1/9th of the SDRAM space + is used for ECC storage and the rest 8/9th is available for system + use. Enabling ECC increases boot time as the ECC protected regions + need to be primed with a predefined value prior to enabling ECC + check. + source "drivers/ram/aspeed/Kconfig" source "drivers/ram/cadence/Kconfig" source "drivers/ram/octeon/Kconfig" diff --git a/drivers/ram/k3-ddrss/k3-ddrss.c b/drivers/ram/k3-ddrss/k3-ddrss.c index 6e9202b9579..05ea61bbfe9 100644 --- a/drivers/ram/k3-ddrss/k3-ddrss.c +++ b/drivers/ram/k3-ddrss/k3-ddrss.c @@ -6,6 +6,7 @@ */ #include <config.h> +#include <time.h> #include <clk.h> #include <div64.h> #include <dm.h> @@ -44,6 +45,11 @@ #define DDRSS_ECC_R2_STR_ADDR_REG 0x0140 #define DDRSS_ECC_R2_END_ADDR_REG 0x0144 #define DDRSS_ECC_1B_ERR_CNT_REG 0x0150 +#define DDRSS_V2A_INT_SET_REG 0x00a8 + +#define DDRSS_V2A_INT_SET_REG_ECC1BERR_EN BIT(3) +#define DDRSS_V2A_INT_SET_REG_ECC2BERR_EN BIT(4) +#define DDRSS_V2A_INT_SET_REG_ECCM1BERR_EN BIT(5) #define SINGLE_DDR_SUBSYSTEM 0x1 #define MULTI_DDR_SUBSYSTEM 0x2 @@ -120,8 +126,8 @@ struct k3_msmc { #define K3_DDRSS_MAX_ECC_REGIONS 3 struct k3_ddrss_ecc_region { - u32 start; - u32 range; + u64 start; + u64 range; }; struct k3_ddrss_desc { @@ -145,7 +151,9 @@ struct k3_ddrss_desc { lpddr4_privatedata pd; struct k3_ddrss_ecc_region ecc_regions[K3_DDRSS_MAX_ECC_REGIONS]; u64 ecc_reserved_space; - bool ti_ecc_enabled; + u64 ddr_bank_base[CONFIG_NR_DRAM_BANKS]; + u64 ddr_bank_size[CONFIG_NR_DRAM_BANKS]; + u64 ddr_ram_size; }; struct reginitdata { @@ -399,8 +407,6 @@ static int k3_ddrss_ofdata_to_priv(struct udevice *dev) if (ret) dev_err(dev, "ddr fhs cnt not populated %d\n", ret); - ddrss->ti_ecc_enabled = dev_read_bool(dev, "ti,ecc-enable"); - return ret; } @@ -542,27 +548,174 @@ void k3_lpddr4_start(struct k3_ddrss_desc *ddrss) } } -static void k3_ddrss_set_ecc_range_r0(u32 base, u32 start_address, u32 size) +static void k3_ddrss_set_ecc_range_r0(u32 base, u64 start_address, u64 size) { writel((start_address) >> 16, base + DDRSS_ECC_R0_STR_ADDR_REG); writel((start_address + size - 1) >> 16, base + DDRSS_ECC_R0_END_ADDR_REG); } -static void k3_ddrss_preload_ecc_mem_region(u32 *addr, u32 size, u32 word) +#define BIST_MODE_MEM_INIT 4 +#define BIST_MEM_INIT_TIMEOUT 10000 /* 1msec loops per block = 10s */ +static void k3_lpddr4_bist_init_mem_region(struct k3_ddrss_desc *ddrss, + u64 addr, u64 size, + u32 pattern) { - int i; + lpddr4_obj *driverdt = ddrss->driverdt; + lpddr4_privatedata *pd = &ddrss->pd; + u32 status, offset, regval; + bool int_status; + int i = 0; + + /* Set BIST_START_ADDR_0 [31:0] */ + regval = (u32)(addr & TH_FLD_MASK(LPDDR4__BIST_START_ADDRESS_0__FLD)); + TH_OFFSET_FROM_REG(LPDDR4__BIST_START_ADDRESS_0__REG, CTL_SHIFT, offset); + driverdt->writereg(pd, LPDDR4_CTL_REGS, offset, regval); + + /* Set BIST_START_ADDR_1 [32 or 34:32] */ + regval = (u32)(addr >> TH_FLD_WIDTH(LPDDR4__BIST_START_ADDRESS_0__FLD)); + regval &= TH_FLD_MASK(LPDDR4__BIST_START_ADDRESS_1__FLD); + TH_OFFSET_FROM_REG(LPDDR4__BIST_START_ADDRESS_1__REG, CTL_SHIFT, offset); + driverdt->writereg(pd, LPDDR4_CTL_REGS, offset, regval); + + /* Set ADDR_SPACE = log2(size) */ + regval = (u32)(ilog2(size) << TH_FLD_SHIFT(LPDDR4__ADDR_SPACE__FLD)); + TH_OFFSET_FROM_REG(LPDDR4__ADDR_SPACE__REG, CTL_SHIFT, offset); + driverdt->writereg(pd, LPDDR4_CTL_REGS, offset, regval); + + /* Enable the BIST data check. On 32bit lpddr4 (e.g J7) this shares a + * register with ADDR_SPACE and BIST_GO. + */ + TH_OFFSET_FROM_REG(LPDDR4__BIST_DATA_CHECK__REG, CTL_SHIFT, offset); + driverdt->readreg(pd, LPDDR4_CTL_REGS, offset, ®val); + regval |= TH_FLD_MASK(LPDDR4__BIST_DATA_CHECK__FLD); + driverdt->writereg(pd, LPDDR4_CTL_REGS, offset, regval); + /* Clear the address check bit */ + TH_OFFSET_FROM_REG(LPDDR4__BIST_ADDR_CHECK__REG, CTL_SHIFT, offset); + driverdt->readreg(pd, LPDDR4_CTL_REGS, offset, ®val); + regval &= ~TH_FLD_MASK(LPDDR4__BIST_ADDR_CHECK__FLD); + driverdt->writereg(pd, LPDDR4_CTL_REGS, offset, regval); + + /* Set BIST_TEST_MODE[2:0] to memory initialize (4) */ + regval = BIST_MODE_MEM_INIT; + TH_OFFSET_FROM_REG(LPDDR4__BIST_TEST_MODE__REG, CTL_SHIFT, offset); + driverdt->writereg(pd, LPDDR4_CTL_REGS, offset, regval); + + /* Set BIST_DATA_PATTERN[31:0] */ + TH_OFFSET_FROM_REG(LPDDR4__BIST_DATA_PATTERN_0__REG, CTL_SHIFT, offset); + driverdt->writereg(pd, LPDDR4_CTL_REGS, offset, pattern); + + /* Set BIST_DATA_PATTERN[63:32] */ + TH_OFFSET_FROM_REG(LPDDR4__BIST_DATA_PATTERN_1__REG, CTL_SHIFT, offset); + driverdt->writereg(pd, LPDDR4_CTL_REGS, offset, pattern); + + udelay(1000); + + /* Enable the programmed BIST operation - BIST_GO = 1 */ + TH_OFFSET_FROM_REG(LPDDR4__BIST_GO__REG, CTL_SHIFT, offset); + driverdt->readreg(pd, LPDDR4_CTL_REGS, offset, ®val); + regval |= TH_FLD_MASK(LPDDR4__BIST_GO__FLD); + driverdt->writereg(pd, LPDDR4_CTL_REGS, offset, regval); + + /* Wait for the BIST_DONE interrupt */ + while (i < BIST_MEM_INIT_TIMEOUT) { + status = driverdt->checkctlinterrupt(pd, LPDDR4_INTR_BIST_DONE, + &int_status); + if (!status & int_status) { + /* Clear LPDDR4_INTR_BIST_DONE */ + driverdt->ackctlinterrupt(pd, LPDDR4_INTR_BIST_DONE); + break; + } + udelay(1000); + i++; + } + + /* Before continuing we have to stop BIST - BIST_GO = 0 */ + TH_OFFSET_FROM_REG(LPDDR4__BIST_GO__REG, CTL_SHIFT, offset); + driverdt->writereg(pd, LPDDR4_CTL_REGS, offset, 0); + /* Timeout hit while priming the memory. We can't continue, + * since the memory is not fully initialized and we most + * likely get an uncorrectable error exception while booting. + */ + if (i == BIST_MEM_INIT_TIMEOUT) { + printf("ERROR: Timeout while priming the memory.\n"); + hang(); + } +} + +static void k3_ddrss_lpddr4_preload_full_mem(struct k3_ddrss_desc *ddrss, + u64 total_size, u32 pattern) +{ + u32 done, max_size2; + + /* Get the max size (log2) supported in this config (16/32 lpddr4) + * from the start_addess width - 16bit: 8G, 32bit: 32G + */ + max_size2 = TH_FLD_WIDTH(LPDDR4__BIST_START_ADDRESS_0__FLD) + + TH_FLD_WIDTH(LPDDR4__BIST_START_ADDRESS_1__FLD) + 1; + + /* ECC is enabled in dt but we can't preload the memory if + * the memory configuration is recognized and supported. + */ + if (!total_size || total_size > (1ull << max_size2) || + total_size & (total_size - 1)) { + printf("ECC: the memory configuration is not supported\n"); + hang(); + } printf("ECC is enabled, priming DDR which will take several seconds.\n"); + done = get_timer(0); + k3_lpddr4_bist_init_mem_region(ddrss, 0, total_size, pattern); + printf("ECC: priming DDR completed in %lu msec\n", get_timer(done)); +} + +static void k3_ddrss_ddr_bank_base_size_calc(struct k3_ddrss_desc *ddrss) +{ + int bank, na, ns, len, parent; + const fdt32_t *ptr, *end; + + for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { + ddrss->ddr_bank_base[bank] = 0; + ddrss->ddr_bank_size[bank] = 0; + } + + ofnode mem = ofnode_null(); + + do { + mem = ofnode_by_prop_value(mem, "device_type", "memory", 7); + } while (!ofnode_is_enabled(mem)); + + const void *fdt = ofnode_to_fdt(mem); + int node = ofnode_to_offset(mem); + const char *property = "reg"; + + parent = fdt_parent_offset(fdt, node); + na = fdt_address_cells(fdt, parent); + ns = fdt_size_cells(fdt, parent); + ptr = fdt_getprop(fdt, node, property, &len); + end = ptr + len / sizeof(*ptr); + + for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { + if (ptr + na + ns <= end) { + if (CONFIG_IS_ENABLED(OF_TRANSLATE)) + ddrss->ddr_bank_base[bank] = fdt_translate_address(fdt, node, ptr); + else + ddrss->ddr_bank_base[bank] = fdtdec_get_number(ptr, na); + + ddrss->ddr_bank_size[bank] = fdtdec_get_number(&ptr[na], ns); + } - for (i = 0; i < (size / 4); i++) - addr[i] = word; + ptr += na + ns; + } + + for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) + ddrss->ddr_ram_size += ddrss->ddr_bank_size[bank]; } static void k3_ddrss_lpddr4_ecc_calc_reserved_mem(struct k3_ddrss_desc *ddrss) { fdtdec_setup_mem_size_base_lowest(); - ddrss->ecc_reserved_space = gd->ram_size; + ddrss->ecc_reserved_space = ddrss->ddr_ram_size; do_div(ddrss->ecc_reserved_space, 9); /* Round to clean number */ @@ -571,25 +724,29 @@ static void k3_ddrss_lpddr4_ecc_calc_reserved_mem(struct k3_ddrss_desc *ddrss) static void k3_ddrss_lpddr4_ecc_init(struct k3_ddrss_desc *ddrss) { - u32 ecc_region_start = ddrss->ecc_regions[0].start; - u32 ecc_range = ddrss->ecc_regions[0].range; + u64 ecc_region_start = ddrss->ecc_regions[0].start; + u64 ecc_range = ddrss->ecc_regions[0].range; u32 base = (u32)ddrss->ddrss_ss_cfg; u32 val; /* Only Program region 0 which covers full ddr space */ - k3_ddrss_set_ecc_range_r0(base, ecc_region_start - gd->ram_base, ecc_range); + k3_ddrss_set_ecc_range_r0(base, ecc_region_start - ddrss->ddr_bank_base[0], ecc_range); /* Enable ECC, RMW, WR_ALLOC */ writel(DDRSS_ECC_CTRL_REG_ECC_EN | DDRSS_ECC_CTRL_REG_RMW_EN | DDRSS_ECC_CTRL_REG_WR_ALLOC, base + DDRSS_ECC_CTRL_REG); - /* Preload ECC Mem region with 0's */ - k3_ddrss_preload_ecc_mem_region((u32 *)ecc_region_start, ecc_range, - 0x00000000); + /* Preload the full memory with 0's using the BIST engine of + * the LPDDR4 controller. + */ + k3_ddrss_lpddr4_preload_full_mem(ddrss, ddrss->ddr_ram_size, 0); /* Clear Error Count Register */ writel(0x1, base + DDRSS_ECC_1B_ERR_CNT_REG); + writel(DDRSS_V2A_INT_SET_REG_ECC1BERR_EN | DDRSS_V2A_INT_SET_REG_ECC2BERR_EN | + DDRSS_V2A_INT_SET_REG_ECCM1BERR_EN, base + DDRSS_V2A_INT_SET_REG); + /* Enable ECC Check */ val = readl(base + DDRSS_ECC_CTRL_REG); val |= DDRSS_ECC_CTRL_REG_ECC_CK; @@ -630,7 +787,9 @@ static int k3_ddrss_probe(struct udevice *dev) k3_lpddr4_start(ddrss); - if (ddrss->ti_ecc_enabled) { + k3_ddrss_ddr_bank_base_size_calc(ddrss); + + if (IS_ENABLED(CONFIG_K3_INLINE_ECC)) { if (!ddrss->ddrss_ss_cfg) { printf("%s: ss_cfg is required if ecc is enabled but not provided.", __func__); @@ -640,8 +799,8 @@ static int k3_ddrss_probe(struct udevice *dev) k3_ddrss_lpddr4_ecc_calc_reserved_mem(ddrss); /* Always configure one region that covers full DDR space */ - ddrss->ecc_regions[0].start = gd->ram_base; - ddrss->ecc_regions[0].range = gd->ram_size - ddrss->ecc_reserved_space; + ddrss->ecc_regions[0].start = ddrss->ddr_bank_base[0]; + ddrss->ecc_regions[0].range = ddrss->ddr_ram_size - ddrss->ecc_reserved_space; k3_ddrss_lpddr4_ecc_init(ddrss); } @@ -650,30 +809,24 @@ static int k3_ddrss_probe(struct udevice *dev) int k3_ddrss_ddr_fdt_fixup(struct udevice *dev, void *blob, struct bd_info *bd) { - struct k3_ddrss_desc *ddrss = dev_get_priv(dev); - u64 start[CONFIG_NR_DRAM_BANKS]; - u64 size[CONFIG_NR_DRAM_BANKS]; int bank; + struct k3_ddrss_desc *ddrss = dev_get_priv(dev); if (ddrss->ecc_reserved_space == 0) return 0; for (bank = CONFIG_NR_DRAM_BANKS - 1; bank >= 0; bank--) { - if (ddrss->ecc_reserved_space > bd->bi_dram[bank].size) { - ddrss->ecc_reserved_space -= bd->bi_dram[bank].size; - bd->bi_dram[bank].size = 0; + if (ddrss->ecc_reserved_space > ddrss->ddr_bank_size[bank]) { + ddrss->ecc_reserved_space -= ddrss->ddr_bank_size[bank]; + ddrss->ddr_bank_size[bank] = 0; } else { - bd->bi_dram[bank].size -= ddrss->ecc_reserved_space; + ddrss->ddr_bank_size[bank] -= ddrss->ecc_reserved_space; break; } } - for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { - start[bank] = bd->bi_dram[bank].start; - size[bank] = bd->bi_dram[bank].size; - } - - return fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS); + return fdt_fixup_memory_banks(blob, ddrss->ddr_bank_base, + ddrss->ddr_bank_size, CONFIG_NR_DRAM_BANKS); } static int k3_ddrss_get_info(struct udevice *dev, struct ram_info *info) diff --git a/drivers/rng/msm_rng.c b/drivers/rng/msm_rng.c index 658c153d3ed..f790d3b60f9 100644 --- a/drivers/rng/msm_rng.c +++ b/drivers/rng/msm_rng.c @@ -34,6 +34,7 @@ struct msm_rng_priv { phys_addr_t base; struct clk clk; + bool skip_init; }; static int msm_rng_read(struct udevice *dev, void *data, size_t len) @@ -100,10 +101,15 @@ static int msm_rng_probe(struct udevice *dev) int ret; + priv->skip_init = (bool)dev_get_driver_data(dev); + priv->base = dev_read_addr(dev); if (priv->base == FDT_ADDR_T_NONE) return -EINVAL; + if (priv->skip_init) + return 0; + ret = clk_get_by_index(dev, 0, &priv->clk); if (ret) return ret; @@ -119,6 +125,9 @@ static int msm_rng_remove(struct udevice *dev) { struct msm_rng_priv *priv = dev_get_priv(dev); + if (priv->skip_init) + return 0; + return msm_rng_enable(priv, 0); } @@ -127,7 +136,9 @@ static const struct dm_rng_ops msm_rng_ops = { }; static const struct udevice_id msm_rng_match[] = { - { .compatible = "qcom,prng", }, + { .compatible = "qcom,prng", .data = (ulong)false }, + { .compatible = "qcom,prng-ee", .data = (ulong)true }, + { .compatible = "qcom,trng", .data = (ulong)true }, {}, }; diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 9c2d1398247..6467f20422b 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -294,7 +294,7 @@ config RTC_DAVINCI config RTC_ZYNQMP bool "Enable ZynqMP RTC driver" - depends on ARCH_ZYNQMP + depends on DM_RTC && (ARCH_ZYNQMP || ARCH_VERSAL || ARCH_VERSAL_NET || ARCH_VERSAL2) help Say "yes" here to support the on chip real time clock present on Xilinx ZynqMP SoC. diff --git a/drivers/scsi/Kconfig b/drivers/scsi/Kconfig index 7e21c4ae2bb..fc87d34cca3 100644 --- a/drivers/scsi/Kconfig +++ b/drivers/scsi/Kconfig @@ -1,5 +1,6 @@ config SCSI bool "Support SCSI controllers with driver model" + select BLK help This enables support for SCSI (Small Computer System Interface), a parallel interface widely used with storage peripherals such as diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index c3b884b6d00..039da835f5f 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -464,7 +464,7 @@ int ns16550_serial_getinfo(struct udevice *dev, struct serial_device_info *info) struct ns16550_plat *plat = com_port->plat; /* save code size */ - if (!not_xpl()) + if (!not_xpl() && !CONFIG_IS_ENABLED(UPL_OUT)) return -ENOSYS; info->type = SERIAL_CHIP_16550_COMPATIBLE; diff --git a/drivers/spi/atmel_spi.h b/drivers/spi/atmel_spi.h deleted file mode 100644 index 9663cca5e66..00000000000 --- a/drivers/spi/atmel_spi.h +++ /dev/null @@ -1,86 +0,0 @@ -/* - * Register definitions for the Atmel AT32/AT91 SPI Controller - */ - -/* Register offsets */ -#include <linux/bitops.h> -#define ATMEL_SPI_CR 0x0000 -#define ATMEL_SPI_MR 0x0004 -#define ATMEL_SPI_RDR 0x0008 -#define ATMEL_SPI_TDR 0x000c -#define ATMEL_SPI_SR 0x0010 -#define ATMEL_SPI_IER 0x0014 -#define ATMEL_SPI_IDR 0x0018 -#define ATMEL_SPI_IMR 0x001c -#define ATMEL_SPI_CSR(x) (0x0030 + 4 * (x)) -#define ATMEL_SPI_VERSION 0x00fc - -/* Bits in CR */ -#define ATMEL_SPI_CR_SPIEN BIT(0) -#define ATMEL_SPI_CR_SPIDIS BIT(1) -#define ATMEL_SPI_CR_SWRST BIT(7) -#define ATMEL_SPI_CR_LASTXFER BIT(24) - -/* Bits in MR */ -#define ATMEL_SPI_MR_MSTR BIT(0) -#define ATMEL_SPI_MR_PS BIT(1) -#define ATMEL_SPI_MR_PCSDEC BIT(2) -#define ATMEL_SPI_MR_FDIV BIT(3) -#define ATMEL_SPI_MR_MODFDIS BIT(4) -#define ATMEL_SPI_MR_WDRBT BIT(5) -#define ATMEL_SPI_MR_LLB BIT(7) -#define ATMEL_SPI_MR_PCS(x) (((x) & 15) << 16) -#define ATMEL_SPI_MR_DLYBCS(x) ((x) << 24) - -/* Bits in RDR */ -#define ATMEL_SPI_RDR_RD(x) (x) -#define ATMEL_SPI_RDR_PCS(x) ((x) << 16) - -/* Bits in TDR */ -#define ATMEL_SPI_TDR_TD(x) (x) -#define ATMEL_SPI_TDR_PCS(x) ((x) << 16) -#define ATMEL_SPI_TDR_LASTXFER BIT(24) - -/* Bits in SR/IER/IDR/IMR */ -#define ATMEL_SPI_SR_RDRF BIT(0) -#define ATMEL_SPI_SR_TDRE BIT(1) -#define ATMEL_SPI_SR_MODF BIT(2) -#define ATMEL_SPI_SR_OVRES BIT(3) -#define ATMEL_SPI_SR_ENDRX BIT(4) -#define ATMEL_SPI_SR_ENDTX BIT(5) -#define ATMEL_SPI_SR_RXBUFF BIT(6) -#define ATMEL_SPI_SR_TXBUFE BIT(7) -#define ATMEL_SPI_SR_NSSR BIT(8) -#define ATMEL_SPI_SR_TXEMPTY BIT(9) -#define ATMEL_SPI_SR_SPIENS BIT(16) - -/* Bits in CSRx */ -#define ATMEL_SPI_CSRx_CPOL BIT(0) -#define ATMEL_SPI_CSRx_NCPHA BIT(1) -#define ATMEL_SPI_CSRx_CSAAT BIT(3) -#define ATMEL_SPI_CSRx_BITS(x) ((x) << 4) -#define ATMEL_SPI_CSRx_SCBR(x) ((x) << 8) -#define ATMEL_SPI_CSRx_SCBR_MAX GENMASK(7, 0) -#define ATMEL_SPI_CSRx_DLYBS(x) ((x) << 16) -#define ATMEL_SPI_CSRx_DLYBCT(x) ((x) << 24) - -/* Bits in VERSION */ -#define ATMEL_SPI_VERSION_REV(x) ((x) & 0xfff) -#define ATMEL_SPI_VERSION_MFN(x) ((x) << 16) - -/* Constants for CSRx:BITS */ -#define ATMEL_SPI_BITS_8 0 -#define ATMEL_SPI_BITS_9 1 -#define ATMEL_SPI_BITS_10 2 -#define ATMEL_SPI_BITS_11 3 -#define ATMEL_SPI_BITS_12 4 -#define ATMEL_SPI_BITS_13 5 -#define ATMEL_SPI_BITS_14 6 -#define ATMEL_SPI_BITS_15 7 -#define ATMEL_SPI_BITS_16 8 - -/* Register access macros */ -#define spi_readl(as, reg) \ - readl(as->regs + ATMEL_SPI_##reg) -#define spi_writel(as, reg, value) \ - writel(value, as->regs + ATMEL_SPI_##reg) diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index 93ab2b5635f..f2f69cf9f12 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -151,9 +151,9 @@ static int cadence_qspi_set_protocol(struct cadence_spi_priv *priv, /* Return 1 if idle, otherwise return 0 (busy). */ static unsigned int cadence_qspi_wait_idle(void *reg_base) { - unsigned int start, count = 0; + unsigned long start, count = 0; /* timeout in unit of ms */ - unsigned int timeout = 5000; + unsigned long timeout = 5000; start = get_timer(0); for ( ; get_timer(start) < timeout ; ) { @@ -170,7 +170,7 @@ static unsigned int cadence_qspi_wait_idle(void *reg_base) } /* Timeout, still in busy mode. */ - printf("QSPI: QSPI is still busy after poll for %d ms.\n", timeout); + printf("QSPI: QSPI is still busy after poll for %lu ms.\n", timeout); return 0; } diff --git a/drivers/spi/mtk_spim.c b/drivers/spi/mtk_spim.c index b66bcfc4233..2b2c31b4b3f 100644 --- a/drivers/spi/mtk_spim.c +++ b/drivers/spi/mtk_spim.c @@ -359,6 +359,9 @@ static bool mtk_spim_supports_op(struct spi_slave *slave, struct udevice *bus = dev_get_parent(slave->dev); struct mtk_spim_priv *priv = dev_get_priv(bus); + if (!spi_mem_default_supports_op(slave, op)) + return false; + if (op->cmd.buswidth == 0 || op->cmd.buswidth > 4 || op->addr.buswidth > 4 || op->dummy.buswidth > 4 || op->data.buswidth > 4) @@ -648,7 +651,7 @@ static int mtk_spim_probe(struct udevice *dev) struct mtk_spim_priv *priv = dev_get_priv(dev); int ret; - priv->base = devfdt_get_addr_ptr(dev); + priv->base = dev_read_addr_ptr(dev); if (!priv->base) return -EINVAL; diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c index 4251bf28cd3..2a095d0c58e 100644 --- a/drivers/spi/zynqmp_gqspi.c +++ b/drivers/spi/zynqmp_gqspi.c @@ -255,7 +255,7 @@ static u32 zynqmp_qspi_bus_select(struct zynqmp_qspi_priv *priv) GQSPI_GFIFO_CS_LOWER | GQSPI_GFIFO_CS_UPPER; else - debug("Wrong Bus selection:0x%x\n", priv->bus); + log_debug("Wrong Bus selection:0x%x\n", priv->bus); } else { if (priv->u_page) gqspi_fifo_reg = GQSPI_GFIFO_LOW_BUS | diff --git a/drivers/sysinfo/sandbox.c b/drivers/sysinfo/sandbox.c index d39720958f0..af54fe87596 100644 --- a/drivers/sysinfo/sandbox.c +++ b/drivers/sysinfo/sandbox.c @@ -13,6 +13,7 @@ struct sysinfo_sandbox_priv { bool called_detect; int test_i1; int test_i2; + u32 test_data[2]; }; char vacation_spots[][64] = {"R'lyeh", "Dreamlands", "Plateau of Leng", @@ -24,6 +25,8 @@ int sysinfo_sandbox_detect(struct udevice *dev) priv->called_detect = true; priv->test_i2 = 100; + priv->test_data[0] = 0xabcdabcd; + priv->test_data[1] = 0xdeadbeef; return 0; } @@ -79,6 +82,21 @@ int sysinfo_sandbox_get_str(struct udevice *dev, int id, size_t size, char *val) return -ENOENT; } +int sysinfo_sandbox_get_data(struct udevice *dev, int id, void **buf, + size_t *size) +{ + struct sysinfo_sandbox_priv *priv = dev_get_priv(dev); + + switch (id) { + case DATA_TEST: + *buf = priv->test_data; + *size = sizeof(priv->test_data); + return 0; + } + + return -ENOENT; +} + static const struct udevice_id sysinfo_sandbox_ids[] = { { .compatible = "sandbox,sysinfo-sandbox" }, { /* sentinel */ } @@ -89,6 +107,7 @@ static const struct sysinfo_ops sysinfo_sandbox_ops = { .get_bool = sysinfo_sandbox_get_bool, .get_int = sysinfo_sandbox_get_int, .get_str = sysinfo_sandbox_get_str, + .get_data = sysinfo_sandbox_get_data, }; int sysinfo_sandbox_probe(struct udevice *dev) diff --git a/drivers/sysinfo/sandbox.h b/drivers/sysinfo/sandbox.h index a7cbac0ce18..47b7f5ef9fe 100644 --- a/drivers/sysinfo/sandbox.h +++ b/drivers/sysinfo/sandbox.h @@ -9,4 +9,5 @@ enum { INT_TEST1, INT_TEST2, STR_VACATIONSPOT, + DATA_TEST, }; diff --git a/drivers/sysinfo/smbios.c b/drivers/sysinfo/smbios.c index a7ac8e3f072..99104274f72 100644 --- a/drivers/sysinfo/smbios.c +++ b/drivers/sysinfo/smbios.c @@ -5,14 +5,240 @@ */ #include <dm.h> +#include <smbios_plat.h> #include <sysinfo.h> +/* platform information storage */ +struct processor_info processor_info; +struct cache_info cache_info[SYSINFO_CACHE_LVL_MAX]; +struct sysinfo_plat sysinfo_smbios_p = { + /* Processor Information */ + .processor = &processor_info, + /* Cache Information */ + .cache = &cache_info[0], +}; + +/* structure for smbios private data storage */ +struct sysinfo_plat_priv { + struct processor_info *t4; + struct smbios_type7 t7[SYSINFO_CACHE_LVL_MAX]; + u16 cache_handles[SYSINFO_CACHE_LVL_MAX]; + u8 cache_level; +}; + +static void smbios_cache_info_dump(struct smbios_type7 *cache_info) +{ + log_debug("SMBIOS Type 7 (Cache Information):\n"); + log_debug("Cache Configuration: 0x%04x\n", cache_info->config.data); + log_debug("Maximum Cache Size: %u KB\n", cache_info->max_size.data); + log_debug("Installed Size: %u KB\n", cache_info->inst_size.data); + log_debug("Supported SRAM Type: 0x%04x\n", + cache_info->supp_sram_type.data); + log_debug("Current SRAM Type: 0x%04x\n", + cache_info->curr_sram_type.data); + log_debug("Cache Speed: %u\n", cache_info->speed); + log_debug("Error Correction Type: %u\n", cache_info->err_corr_type); + log_debug("System Cache Type: %u\n", cache_info->sys_cache_type); + log_debug("Associativity: %u\n", cache_info->associativity); + log_debug("Maximum Cache Size 2: %u KB\n", cache_info->max_size2.data); + log_debug("Installed Cache Size 2: %u KB\n", + cache_info->inst_size2.data); +} + +/* weak function for the platforms not yet supported */ +__weak int sysinfo_get_cache_info(u8 level, struct cache_info *cache_info) +{ + return -ENOSYS; +} + +__weak int sysinfo_get_processor_info(struct processor_info *pinfo) +{ + return -ENOSYS; +} + +void sysinfo_cache_info_default(struct cache_info *ci) +{ + memset(ci, 0, sizeof(*ci)); + ci->config.data = SMBIOS_CACHE_LOCATE_UNKNOWN | SMBIOS_CACHE_OP_UND; + ci->supp_sram_type.fields.unknown = 1; + ci->curr_sram_type.fields.unknown = 1; + ci->speed = SMBIOS_CACHE_SPEED_UNKNOWN; + ci->err_corr_type = SMBIOS_CACHE_ERRCORR_UNKNOWN; + ci->cache_type = SMBIOS_CACHE_SYSCACHE_TYPE_UNKNOWN; +} + +static int sysinfo_plat_detect(struct udevice *dev) +{ + return 0; +} + +static int sysinfo_plat_get_str(struct udevice *dev, int id, + size_t size, char *val) +{ + struct sysinfo_plat_priv *priv = dev_get_priv(dev); + const char *str = NULL; + + switch (id) { + case SYSID_SM_PROCESSOR_MANUFACT: + str = priv->t4->manufacturer; + break; + default: + break; + } + + if (!str) + return -ENOSYS; + + strlcpy(val, str, size); + + return 0; +} + +static int sysinfo_plat_get_int(struct udevice *dev, int id, int *val) +{ + struct sysinfo_plat_priv *priv = dev_get_priv(dev); + u8 i; + + if (id >= SYSID_SM_CACHE_INFO_START && + id <= SYSID_SM_CACHE_INFO_END) { + /* For smbios type 7 */ + for (i = 0; i < priv->cache_level; i++) { + switch (id - i) { + case SYSID_SM_CACHE_MAX_SIZE: + *val = priv->t7[i].max_size.data; + return 0; + case SYSID_SM_CACHE_INST_SIZE: + *val = priv->t7[i].inst_size.data; + return 0; + case SYSID_SM_CACHE_SCACHE_TYPE: + *val = priv->t7[i].sys_cache_type; + return 0; + case SYSID_SM_CACHE_ASSOC: + *val = priv->t7[i].associativity; + return 0; + case SYSID_SM_CACHE_MAX_SIZE2: + *val = priv->t7[i].max_size2.data; + return 0; + case SYSID_SM_CACHE_INST_SIZE2: + *val = priv->t7[i].inst_size2.data; + return 0; + default: + break; + } + } + return -ENOSYS; + } + + switch (id) { + case SYSID_SM_PROCESSOR_CORE_CNT: + *val = priv->t4->core_count; + break; + case SYSID_SM_PROCESSOR_CORE_EN: + *val = priv->t4->core_enabled; + break; + case SYSID_SM_PROCESSOR_CHARA: + *val = priv->t4->characteristics; + break; + case SYSID_SM_CACHE_LEVEL: + if (!priv->cache_level) /* No cache detected */ + return -ENOSYS; + *val = priv->cache_level - 1; + break; + default: + return -ENOSYS; + } + + return 0; +} + +static int sysinfo_plat_get_data(struct udevice *dev, int id, void **buf, + size_t *size) +{ + struct sysinfo_plat_priv *priv = dev_get_priv(dev); + + switch (id) { + case SYSID_SM_PROCESSOR_ID: + *buf = priv->t4->id; + *size = sizeof(priv->t4->id); + break; + case SYSID_SM_CACHE_HANDLE: + *buf = &priv->cache_handles[0]; + *size = sizeof(priv->cache_handles); + break; + default: + return -EOPNOTSUPP; + } + return 0; +} + +static int sysinfo_plat_probe(struct udevice *dev) +{ + struct sysinfo_plat_priv *priv = dev_get_priv(dev); + struct sysinfo_plat *plat = &sysinfo_smbios_p; + u8 level; + + if (!sysinfo_get_processor_info(plat->processor)) + priv->t4 = plat->processor; + + for (level = 0; level < SYSINFO_CACHE_LVL_MAX; level++) { + struct cache_info *pcache = plat->cache + level; + + if (sysinfo_get_cache_info(level, pcache)) + break; /* no more levels */ + + /* + * Fill in the SMBIOS type 7 structure, + * skip the header members (type, length, handle), + * and the ones in DT smbios node. + */ + priv->t7[level].sys_cache_type = pcache->cache_type; + priv->t7[level].associativity = pcache->associativity; + + if (pcache->max_size > SMBIOS_CACHE_SIZE_EXT_KB) { + priv->t7[level].max_size.data = 0xFFFF; + priv->t7[level].max_size2.fields.size = + pcache->max_size / 64; + priv->t7[level].max_size2.fields.granu = + SMBIOS_CACHE_GRANU_64K; + } else { + priv->t7[level].max_size.fields.size = pcache->max_size; + priv->t7[level].max_size.fields.granu = + SMBIOS_CACHE_GRANU_1K; + priv->t7[level].max_size2.data = 0; + } + if (pcache->inst_size > SMBIOS_CACHE_SIZE_EXT_KB) { + priv->t7[level].inst_size.data = 0xFFFF; + priv->t7[level].inst_size2.fields.size = + pcache->inst_size / 64; + priv->t7[level].inst_size2.fields.granu = + SMBIOS_CACHE_GRANU_64K; + } else { + priv->t7[level].inst_size.fields.size = + pcache->inst_size; + priv->t7[level].inst_size.fields.granu = + SMBIOS_CACHE_GRANU_1K; + priv->t7[level].inst_size2.data = 0; + } + smbios_cache_info_dump(&priv->t7[level]); + } + if (!level) /* no cache detected */ + return -ENOSYS; + + priv->cache_level = level; + + return 0; +} + static const struct udevice_id sysinfo_smbios_ids[] = { { .compatible = "u-boot,sysinfo-smbios" }, { /* sentinel */ } }; static const struct sysinfo_ops sysinfo_smbios_ops = { + .detect = sysinfo_plat_detect, + .get_str = sysinfo_plat_get_str, + .get_int = sysinfo_plat_get_int, + .get_data = sysinfo_plat_get_data, }; U_BOOT_DRIVER(sysinfo_smbios) = { @@ -20,4 +246,6 @@ U_BOOT_DRIVER(sysinfo_smbios) = { .id = UCLASS_SYSINFO, .of_match = sysinfo_smbios_ids, .ops = &sysinfo_smbios_ops, + .priv_auto = sizeof(struct sysinfo_plat_priv), + .probe = sysinfo_plat_probe, }; diff --git a/drivers/sysinfo/sysinfo-uclass.c b/drivers/sysinfo/sysinfo-uclass.c index d77d1e3ee44..3c0cd51273e 100644 --- a/drivers/sysinfo/sysinfo-uclass.c +++ b/drivers/sysinfo/sysinfo-uclass.c @@ -99,6 +99,26 @@ int sysinfo_get_str(struct udevice *dev, int id, size_t size, char *val) return ops->get_str(dev, id, size, val); } +int sysinfo_get_data(struct udevice *dev, int id, void **data, size_t *size) +{ + struct sysinfo_priv *priv; + struct sysinfo_ops *ops; + + if (!dev) + return -ENOSYS; + + priv = dev_get_uclass_priv(dev); + ops = sysinfo_get_ops(dev); + + if (!priv->detected) + return -EPERM; + + if (!ops->get_data) + return -ENOSYS; + + return ops->get_data(dev, id, data, size); +} + UCLASS_DRIVER(sysinfo) = { .id = UCLASS_SYSINFO, .name = "sysinfo", diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig index 960b6a906ac..99c6649e417 100644 --- a/drivers/usb/Kconfig +++ b/drivers/usb/Kconfig @@ -1,5 +1,6 @@ menuconfig USB bool "USB support" + select BLK ---help--- Universal Serial Bus (USB) is a specification for a serial bus subsystem which offers higher speeds and more features than the diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 24786a2bc91..a656265890e 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -217,14 +217,14 @@ config USB_EHCI_MX6 Enables support for the on-chip EHCI controller on i.MX6 SoCs. config USB_EHCI_MX7 - bool "Support for i.MX7 on-chip EHCI USB controller" - depends on ARCH_MX7 || IMX8M || IMX93 + bool "Support for i.MX7/i.MX8M/i.MX9 on-chip EHCI USB controller" + depends on ARCH_MX7 || IMX8M || IMX93 || IMX95 select EHCI_HCD_INIT_AFTER_RESET if ARCH_MX7 - select PHY if IMX8M || IMX93 - select NOP_PHY if IMX8M || IMX93 + select PHY if IMX8M || IMX93 || IMX95 + select NOP_PHY if IMX8M || IMX93 || IMX95 default y ---help--- - Enables support for the on-chip EHCI controller on i.MX7 SoCs. + Enables support for the on-chip EHCI controller on i.MX7/i.MX8M/i.MX9 SoCs. config USB_EHCI_MXS bool "Support for i.MX23/i.MX28 EHCI USB controller" diff --git a/drivers/usb/host/ehci-mx5.c b/drivers/usb/host/ehci-mx5.c index d8f521befe1..1392d29bc13 100644 --- a/drivers/usb/host/ehci-mx5.c +++ b/drivers/usb/host/ehci-mx5.c @@ -287,9 +287,9 @@ static int ehci_usb_probe(struct udevice *dev) debug("%s: No vbus supply\n", dev->name); if (!ret && priv->vbus_supply) { - ret = regulator_set_enable(priv->vbus_supply, - (type == USB_INIT_DEVICE) ? - false : true); + ret = regulator_set_enable_if_allowed(priv->vbus_supply, + (type == USB_INIT_DEVICE) ? + false : true); if (ret) { puts("Error enabling VBUS supply\n"); return ret; diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index a93fa5d5455..a8748cef7ad 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -479,9 +479,9 @@ static int mx6_init_after_reset(struct ehci_ctrl *dev) #if CONFIG_IS_ENABLED(DM_REGULATOR) if (priv->vbus_supply) { int ret; - ret = regulator_set_enable(priv->vbus_supply, - (type == USB_INIT_DEVICE) ? - false : true); + ret = regulator_set_enable_if_allowed(priv->vbus_supply, + (type == USB_INIT_DEVICE) ? + false : true); if (ret && ret != -ENOSYS) { printf("Error enabling VBUS supply (ret=%i)\n", ret); return ret; diff --git a/drivers/video/bochs.c b/drivers/video/bochs.c index 00e673a4db0..c34bc23f274 100644 --- a/drivers/video/bochs.c +++ b/drivers/video/bochs.c @@ -64,6 +64,7 @@ static int bochs_init_fb(struct udevice *dev) uc_priv->xsize = xsize; uc_priv->ysize = ysize; uc_priv->bpix = VIDEO_BPP32; + uc_priv->format = VIDEO_X8B8G8R8; /* setup video mode */ bochs_write(mmio, INDEX_ENABLE, 0); diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c index a5b3e898066..ff4f2199585 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c @@ -589,6 +589,7 @@ static int video_post_probe(struct udevice *dev) ho->ysize = priv->ysize; ho->line_length = priv->line_length; ho->bpix = priv->bpix; + ho->format = priv->format; } if (IS_ENABLED(CONFIG_VIDEO_COPY) && plat->copy_base) diff --git a/drivers/virtio/Kconfig b/drivers/virtio/Kconfig index 1de68867d52..512ac376f18 100644 --- a/drivers/virtio/Kconfig +++ b/drivers/virtio/Kconfig @@ -64,6 +64,7 @@ config VIRTIO_NET config VIRTIO_BLK bool "virtio block driver" depends on VIRTIO + select BLK help This is the virtual block driver for virtio. It can be used with QEMU based targets. diff --git a/drivers/watchdog/rti_wdt.c b/drivers/watchdog/rti_wdt.c index 99168d0cad0..7b387266b99 100644 --- a/drivers/watchdog/rti_wdt.c +++ b/drivers/watchdog/rti_wdt.c @@ -131,18 +131,19 @@ static int rti_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags) u32 timer_margin; int ret; - if (readl(priv->regs + RTIDWDCTRL) == WDENABLE_KEY) + timer_margin = timeout_ms * priv->clk_hz / 1000; + timer_margin >>= WDT_PRELOAD_SHIFT; + if (timer_margin > WDT_PRELOAD_MAX) + timer_margin = WDT_PRELOAD_MAX; + + if (readl(priv->regs + RTIDWDCTRL) == WDENABLE_KEY && + readl(priv->regs + RTIDWDPRLD) != timer_margin) return -EBUSY; ret = rti_wdt_load_fw(dev); if (ret < 0) return ret; - timer_margin = timeout_ms * priv->clk_hz / 1000; - timer_margin >>= WDT_PRELOAD_SHIFT; - if (timer_margin > WDT_PRELOAD_MAX) - timer_margin = WDT_PRELOAD_MAX; - writel(timer_margin, priv->regs + RTIDWDPRLD); writel(RTIWWDRX_NMI, priv->regs + RTIWWDRXCTRL); writel(RTIWWDSIZE_50P, priv->regs + RTIWWDSIZECTRL); @@ -186,14 +187,6 @@ static int rti_wdt_probe(struct udevice *dev) priv->clk_hz = clk_get_rate(&clk); - /* - * If watchdog is running at 32k clock, it is not accurate. - * Adjust frequency down in this case so that it does not expire - * earlier than expected. - */ - if (priv->clk_hz < 32768) - priv->clk_hz = priv->clk_hz * 9 / 10; - return 0; } diff --git a/dts/Kconfig b/dts/Kconfig index ffd50c04846..6a5141b56e9 100644 --- a/dts/Kconfig +++ b/dts/Kconfig @@ -183,7 +183,6 @@ config OF_BOARD config OF_HAS_PRIOR_STAGE bool - depends on !BLOBLIST help Indicates that a prior stage of the firmware (before U-Boot proper) makes use of device tree and this board normally boots with that prior diff --git a/dts/upstream/src/arm64/qcom/qcs9100-ride-r3.dts b/dts/upstream/src/arm64/qcom/qcs9100-ride-r3.dts new file mode 100644 index 00000000000..759d1ec694b --- /dev/null +++ b/dts/upstream/src/arm64/qcom/qcs9100-ride-r3.dts @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; + +#include "sa8775p-ride-r3.dts" +/ { + model = "Qualcomm QCS9100 Ride Rev3"; + compatible = "qcom,qcs9100-ride-r3", "qcom,qcs9100", "qcom,sa8775p"; +}; diff --git a/dts/upstream/src/arm64/qcom/qcs9100-ride.dts b/dts/upstream/src/arm64/qcom/qcs9100-ride.dts new file mode 100644 index 00000000000..979462dfec3 --- /dev/null +++ b/dts/upstream/src/arm64/qcom/qcs9100-ride.dts @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; + +#include "sa8775p-ride.dts" +/ { + model = "Qualcomm QCS9100 Ride"; + compatible = "qcom,qcs9100-ride", "qcom,qcs9100", "qcom,sa8775p"; +}; diff --git a/dts/upstream/src/arm64/rockchip/rk3566-nanopi-r3s.dts b/dts/upstream/src/arm64/rockchip/rk3566-nanopi-r3s.dts new file mode 100644 index 00000000000..fb1f65c8688 --- /dev/null +++ b/dts/upstream/src/arm64/rockchip/rk3566-nanopi-r3s.dts @@ -0,0 +1,554 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) 2020 Rockchip Electronics Co., Ltd. + * + * Copyright (c) 2024 FriendlyElec Computer Tech. Co., Ltd. + * (http://www.friendlyelec.com) + * + * Copyright (c) 2024 Tianling Shen <cnsztl@gmail.com> + */ + +/dts-v1/; +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include <dt-bindings/soc/rockchip,vop2.h> +#include "rk3566.dtsi" + +/ { + model = "FriendlyElec NanoPi R3S"; + compatible = "friendlyarm,nanopi-r3s", "rockchip,rk3566"; + + aliases { + ethernet0 = &gmac1; + mmc0 = &sdhci; + mmc1 = &sdmmc0; + }; + + chosen: chosen { + stdout-path = "serial2:1500000n8"; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&reset_button_pin>; + + button-reset { + label = "reset"; + gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>; + linux,code = <KEY_RESTART>; + debounce-interval = <50>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&power_led_pin>, <&lan_led_pin>, <&wan_led_pin>; + + power_led: led-0 { + color = <LED_COLOR_ID_RED>; + function = LED_FUNCTION_POWER; + gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + + lan_led: led-1 { + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_LAN; + gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>; + }; + + wan_led: led-2 { + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_WAN; + gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>; + }; + }; + + vcc3v3_sys: regulator-vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc5v0_sys: regulator-vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vdd_usbc>; + }; + + vcc5v0_usb: regulator-vcc5v0_usb { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_usb_host_en>; + regulator-name = "vcc5v0_usb"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v0_sys>; + }; + + vdd_usbc: regulator-vdd-usbc { + compatible = "regulator-fixed"; + regulator-name = "vdd_usbc"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; +}; + +&combphy1 { + status = "okay"; +}; + +&combphy2 { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply = <&vdd_cpu>; +}; + +&gmac1 { + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>; + assigned-clock-rates = <0>, <125000000>; + clock_in_out = "output"; + phy-mode = "rgmii-id"; + phy-handle = <&rgmii_phy1>; + pinctrl-names = "default"; + pinctrl-0 = <&gmac1m0_miim + &gmac1m0_tx_bus2_level3 + &gmac1m0_rx_bus2 + &gmac1m0_rgmii_clk_level2 + &gmac1m0_rgmii_bus_level3>; + status = "okay"; +}; + +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + vdd_cpu: regulator@1c { + compatible = "tcs,tcs4525"; + reg = <0x1c>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1150000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + rk809: pmic@20 { + compatible = "rockchip,rk809"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int>; + system-power-controller; + vcc1-supply = <&vcc3v3_sys>; + vcc2-supply = <&vcc3v3_sys>; + vcc3-supply = <&vcc3v3_sys>; + vcc4-supply = <&vcc3v3_sys>; + vcc5-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc3v3_sys>; + vcc7-supply = <&vcc3v3_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc3v3_sys>; + wakeup-source; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name = "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-name = "vdd_gpu"; + regulator-always-on; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_npu: DCDC_REG4 { + regulator-name = "vdd_npu"; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG5 { + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_image: LDO_REG1 { + regulator-name = "vdda0v9_image"; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <950000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-name = "vdda_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-name = "vdda0v9_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-name = "vccio_acodec"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-name = "vccio_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-name = "vcc3v3_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca_1v8: LDO_REG7 { + regulator-name = "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pmu: LDO_REG8 { + regulator-name = "vcca1v8_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca1v8_image: LDO_REG9 { + regulator-name = "vcca1v8_image"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3: SWITCH_REG1 { + regulator-name = "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sd: SWITCH_REG2 { + regulator-name = "vcc3v3_sd"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&i2c1 { + status = "okay"; + + hym8563: rtc@51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + #clock-cells = <0>; + clock-output-names = "hym8563"; + pinctrl-names = "default"; + pinctrl-0 = <&hym8563_int>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>; + wakeup-source; + }; +}; + +&mdio1 { + rgmii_phy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + interrupt-parent = <&gpio4>; + interrupts = <RK_PC3 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <ð_phy_reset_pin>; + reset-assert-us = <20000>; + reset-deassert-us = <100000>; + reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>; + }; +}; + +&pcie2x1 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie_reset_h>; + reset-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&pinctrl { + gpio-leds { + lan_led_pin: lan-led-pin { + rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + power_led_pin: power-led-pin { + rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + wan_led_pin: wan-led-pin { + rockchip,pins = <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + gmac { + eth_phy_reset_pin: eth-phy-reset-pin { + rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + pcie { + pcie_reset_h: pcie-reset-h { + rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + pmic { + pmic_int: pmic-int { + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + rockchip-key { + reset_button_pin: reset-button-pin { + rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + rtc { + hym8563_int: hym8563-int { + rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + usb { + vcc5v0_usb_host_en: vcc5v0-usb-host-en { + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pmu_io_domains { + pmuio1-supply = <&vcc3v3_pmu>; + pmuio2-supply = <&vcc3v3_pmu>; + vccio1-supply = <&vccio_acodec>; + vccio2-supply = <&vcc_1v8>; + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcc_3v3>; + vccio5-supply = <&vcc_1v8>; + vccio6-supply = <&vcc_3v3>; + vccio7-supply = <&vcc_3v3>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + max-frequency = <200000000>; + mmc-hs200-1_8v; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; + status = "okay"; +}; + +&sdmmc0 { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + no-sdio; + no-mmc; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; + sd-uhs-sdr50; + vmmc-supply = <&vcc3v3_sd>; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +&tsadc { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&usb2phy0 { + status = "okay"; +}; + +&usb2phy0_host { + phy-supply = <&vcc5v0_usb>; + status = "okay"; +}; + +&usb2phy0_otg { + status = "okay"; +}; + +&usb_host0_xhci { + extcon = <&usb2phy0>; + status = "okay"; +}; + +&usb_host1_xhci { + status = "okay"; +}; + +&vop { + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +}; diff --git a/dts/upstream/src/arm64/rockchip/rk3588-base-pinctrl.dtsi b/dts/upstream/src/arm64/rockchip/rk3588-base-pinctrl.dtsi index d1368418502..7f874c77410 100644 --- a/dts/upstream/src/arm64/rockchip/rk3588-base-pinctrl.dtsi +++ b/dts/upstream/src/arm64/rockchip/rk3588-base-pinctrl.dtsi @@ -1612,23 +1612,43 @@ pcie20x1 { /omit-if-no-ref/ - pcie20x1m0_pins: pcie20x1m0-pins { + pcie20x1m0_clkreqn: pcie20x1m0-clkreqn { rockchip,pins = /* pcie20x1_2_clkreqn_m0 */ - <3 RK_PC7 4 &pcfg_pull_none>, + <3 RK_PC7 4 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie20x1m0_perstn: pcie20x1m0-perstn { + rockchip,pins = /* pcie20x1_2_perstn_m0 */ - <3 RK_PD1 4 &pcfg_pull_none>, + <3 RK_PD1 4 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie20x1m0_waken: pcie20x1m0-waken { + rockchip,pins = /* pcie20x1_2_waken_m0 */ <3 RK_PD0 4 &pcfg_pull_none>; }; /omit-if-no-ref/ - pcie20x1m1_pins: pcie20x1m1-pins { + pcie20x1m1_clkreqn: pcie20x1m1-clkreqn { rockchip,pins = /* pcie20x1_2_clkreqn_m1 */ - <4 RK_PB7 4 &pcfg_pull_none>, + <4 RK_PB7 4 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie20x1m1_perstn: pcie20x1m1-perstn { + rockchip,pins = /* pcie20x1_2_perstn_m1 */ - <4 RK_PC1 4 &pcfg_pull_none>, + <4 RK_PC1 4 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie20x1m1_waken: pcie20x1m1-waken { + rockchip,pins = /* pcie20x1_2_waken_m1 */ <4 RK_PC0 4 &pcfg_pull_none>; }; @@ -1654,52 +1674,127 @@ pcie30x1 { /omit-if-no-ref/ - pcie30x1m0_pins: pcie30x1m0-pins { + pcie30x1m0_0_clkreqn: pcie30x1m0-0-clkreqn { rockchip,pins = /* pcie30x1_0_clkreqn_m0 */ - <0 RK_PC0 12 &pcfg_pull_none>, + <0 RK_PC0 12 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x1m0_0_perstn: pcie30x1m0-0-perstn { + rockchip,pins = /* pcie30x1_0_perstn_m0 */ - <0 RK_PC5 12 &pcfg_pull_none>, + <0 RK_PC5 12 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x1m0_0_waken: pcie30x1m0-0-waken { + rockchip,pins = /* pcie30x1_0_waken_m0 */ - <0 RK_PC4 12 &pcfg_pull_none>, + <0 RK_PC4 12 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x1m0_1_clkreqn: pcie30x1m0-1-clkreqn { + rockchip,pins = /* pcie30x1_1_clkreqn_m0 */ - <0 RK_PB5 12 &pcfg_pull_none>, + <0 RK_PB5 12 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x1m0_1_perstn: pcie30x1m0-1-perstn { + rockchip,pins = /* pcie30x1_1_perstn_m0 */ - <0 RK_PB7 12 &pcfg_pull_none>, + <0 RK_PB7 12 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x1m0_1_waken: pcie30x1m0-1-waken { + rockchip,pins = /* pcie30x1_1_waken_m0 */ <0 RK_PB6 12 &pcfg_pull_none>; }; /omit-if-no-ref/ - pcie30x1m1_pins: pcie30x1m1-pins { + pcie30x1m1_0_clkreqn: pcie30x1m1-0-clkreqn { rockchip,pins = /* pcie30x1_0_clkreqn_m1 */ - <4 RK_PA3 4 &pcfg_pull_none>, + <4 RK_PA3 4 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x1m1_0_perstn: pcie30x1m1-0-perstn { + rockchip,pins = /* pcie30x1_0_perstn_m1 */ - <4 RK_PA5 4 &pcfg_pull_none>, + <4 RK_PA5 4 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x1m1_0_waken: pcie30x1m1-0-waken { + rockchip,pins = /* pcie30x1_0_waken_m1 */ - <4 RK_PA4 4 &pcfg_pull_none>, + <4 RK_PA4 4 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x1m1_1_clkreqn: pcie30x1m1-1-clkreqn { + rockchip,pins = /* pcie30x1_1_clkreqn_m1 */ - <4 RK_PA0 4 &pcfg_pull_none>, + <4 RK_PA0 4 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x1m1_1_perstn: pcie30x1m1-1-perstn { + rockchip,pins = /* pcie30x1_1_perstn_m1 */ - <4 RK_PA2 4 &pcfg_pull_none>, + <4 RK_PA2 4 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x1m1_1_waken: pcie30x1m1-1-waken { + rockchip,pins = /* pcie30x1_1_waken_m1 */ <4 RK_PA1 4 &pcfg_pull_none>; }; /omit-if-no-ref/ - pcie30x1m2_pins: pcie30x1m2-pins { + pcie30x1m2_0_clkreqn: pcie30x1m2-0-clkreqn { rockchip,pins = /* pcie30x1_0_clkreqn_m2 */ - <1 RK_PB5 4 &pcfg_pull_none>, + <1 RK_PB5 4 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x1m2_0_perstn: pcie30x1m2-0-perstn { + rockchip,pins = /* pcie30x1_0_perstn_m2 */ - <1 RK_PB4 4 &pcfg_pull_none>, + <1 RK_PB4 4 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x1m2_0_waken: pcie30x1m2-0-waken { + rockchip,pins = /* pcie30x1_0_waken_m2 */ - <1 RK_PB3 4 &pcfg_pull_none>, + <1 RK_PB3 4 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x1m2_1_clkreqn: pcie30x1m2-1-clkreqn { + rockchip,pins = /* pcie30x1_1_clkreqn_m2 */ - <1 RK_PA0 4 &pcfg_pull_none>, + <1 RK_PA0 4 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x1m2_1_perstn: pcie30x1m2-1-perstn { + rockchip,pins = /* pcie30x1_1_perstn_m2 */ - <1 RK_PA7 4 &pcfg_pull_none>, + <1 RK_PA7 4 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x1m2_1_waken: pcie30x1m2-1-waken { + rockchip,pins = /* pcie30x1_1_waken_m2 */ <1 RK_PA1 4 &pcfg_pull_none>; }; @@ -1721,45 +1816,85 @@ pcie30x2 { /omit-if-no-ref/ - pcie30x2m0_pins: pcie30x2m0-pins { + pcie30x2m0_clkreqn: pcie30x2m0-clkreqn { rockchip,pins = /* pcie30x2_clkreqn_m0 */ - <0 RK_PD1 12 &pcfg_pull_none>, + <0 RK_PD1 12 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x2m0_perstn: pcie30x2m0-perstn { + rockchip,pins = /* pcie30x2_perstn_m0 */ - <0 RK_PD4 12 &pcfg_pull_none>, + <0 RK_PD4 12 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x2m0_waken: pcie30x2m0-waken { + rockchip,pins = /* pcie30x2_waken_m0 */ <0 RK_PD2 12 &pcfg_pull_none>; }; /omit-if-no-ref/ - pcie30x2m1_pins: pcie30x2m1-pins { + pcie30x2m1_clkreqn: pcie30x2m1-clkreqn { rockchip,pins = /* pcie30x2_clkreqn_m1 */ - <4 RK_PA6 4 &pcfg_pull_none>, + <4 RK_PA6 4 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x2m1_perstn: pcie30x2m1-perstn { + rockchip,pins = /* pcie30x2_perstn_m1 */ - <4 RK_PB0 4 &pcfg_pull_none>, + <4 RK_PB0 4 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x2m1_waken: pcie30x2m1-waken { + rockchip,pins = /* pcie30x2_waken_m1 */ <4 RK_PA7 4 &pcfg_pull_none>; }; /omit-if-no-ref/ - pcie30x2m2_pins: pcie30x2m2-pins { + pcie30x2m2_clkreqn: pcie30x2m2-clkreqn { rockchip,pins = /* pcie30x2_clkreqn_m2 */ - <3 RK_PD2 4 &pcfg_pull_none>, + <3 RK_PD2 4 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x2m2_perstn: pcie30x2m2-perstn { + rockchip,pins = /* pcie30x2_perstn_m2 */ - <3 RK_PD4 4 &pcfg_pull_none>, + <3 RK_PD4 4 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x2m2_waken: pcie30x2m2-waken { + rockchip,pins = /* pcie30x2_waken_m2 */ <3 RK_PD3 4 &pcfg_pull_none>; }; /omit-if-no-ref/ - pcie30x2m3_pins: pcie30x2m3-pins { + pcie30x2m3_clkreqn: pcie30x2m3-clkreqn { rockchip,pins = /* pcie30x2_clkreqn_m3 */ - <1 RK_PD7 4 &pcfg_pull_none>, + <1 RK_PD7 4 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x2m3_perstn: pcie30x2m3-perstn { + rockchip,pins = /* pcie30x2_perstn_m3 */ - <1 RK_PB7 4 &pcfg_pull_none>, + <1 RK_PB7 4 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x2m3_waken: pcie30x2m3-waken { + rockchip,pins = /* pcie30x2_waken_m3 */ <1 RK_PB6 4 &pcfg_pull_none>; }; @@ -1774,45 +1909,85 @@ pcie30x4 { /omit-if-no-ref/ - pcie30x4m0_pins: pcie30x4m0-pins { + pcie30x4m0_clkreqn: pcie30x4m0-clkreqn { rockchip,pins = /* pcie30x4_clkreqn_m0 */ - <0 RK_PC6 12 &pcfg_pull_none>, + <0 RK_PC6 12 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x4m0_perstn: pcie30x4m0-perstn { + rockchip,pins = /* pcie30x4_perstn_m0 */ - <0 RK_PD0 12 &pcfg_pull_none>, + <0 RK_PD0 12 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x4m0_waken: pcie30x4m0-waken { + rockchip,pins = /* pcie30x4_waken_m0 */ <0 RK_PC7 12 &pcfg_pull_none>; }; /omit-if-no-ref/ - pcie30x4m1_pins: pcie30x4m1-pins { + pcie30x4m1_clkreqn: pcie30x4m1-clkreqn { rockchip,pins = /* pcie30x4_clkreqn_m1 */ - <4 RK_PB4 4 &pcfg_pull_none>, + <4 RK_PB4 4 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x4m1_perstn: pcie30x4m1-perstn { + rockchip,pins = /* pcie30x4_perstn_m1 */ - <4 RK_PB6 4 &pcfg_pull_none>, + <4 RK_PB6 4 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x4m1_waken: pcie30x4m1-waken { + rockchip,pins = /* pcie30x4_waken_m1 */ <4 RK_PB5 4 &pcfg_pull_none>; }; /omit-if-no-ref/ - pcie30x4m2_pins: pcie30x4m2-pins { + pcie30x4m2_clkreqn: pcie30x4m2-clkreqn { rockchip,pins = /* pcie30x4_clkreqn_m2 */ - <3 RK_PC4 4 &pcfg_pull_none>, + <3 RK_PC4 4 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x4m2_perstn: pcie30x4m2-perstn { + rockchip,pins = /* pcie30x4_perstn_m2 */ - <3 RK_PC6 4 &pcfg_pull_none>, + <3 RK_PC6 4 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x4m2_waken: pcie30x4m2-waken { + rockchip,pins = /* pcie30x4_waken_m2 */ <3 RK_PC5 4 &pcfg_pull_none>; }; /omit-if-no-ref/ - pcie30x4m3_pins: pcie30x4m3-pins { + pcie30x4m3_clkreqn: pcie30x4m3-clkreqn { rockchip,pins = /* pcie30x4_clkreqn_m3 */ - <1 RK_PB0 4 &pcfg_pull_none>, + <1 RK_PB0 4 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x4m3_perstn: pcie30x4m3-perstn { + rockchip,pins = /* pcie30x4_perstn_m3 */ - <1 RK_PB2 4 &pcfg_pull_none>, + <1 RK_PB2 4 &pcfg_pull_none>; + }; + + /omit-if-no-ref/ + pcie30x4m3_waken: pcie30x4m3-waken { + rockchip,pins = /* pcie30x4_waken_m3 */ <1 RK_PB1 4 &pcfg_pull_none>; }; diff --git a/dts/upstream/src/arm64/rockchip/rk3588-base.dtsi b/dts/upstream/src/arm64/rockchip/rk3588-base.dtsi index fc67585b64b..a337f3fb837 100644 --- a/dts/upstream/src/arm64/rockchip/rk3588-base.dtsi +++ b/dts/upstream/src/arm64/rockchip/rk3588-base.dtsi @@ -1370,6 +1370,47 @@ status = "disabled"; }; + hdmi0: hdmi@fde80000 { + compatible = "rockchip,rk3588-dw-hdmi-qp"; + reg = <0x0 0xfde80000 0x0 0x20000>; + clocks = <&cru PCLK_HDMITX0>, + <&cru CLK_HDMITX0_EARC>, + <&cru CLK_HDMITX0_REF>, + <&cru MCLK_I2S5_8CH_TX>, + <&cru CLK_HDMIHDP0>, + <&cru HCLK_VO1>; + clock-names = "pclk", "earc", "ref", "aud", "hdp", "hclk_vo1"; + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH 0>; + interrupt-names = "avp", "cec", "earc", "main", "hpd"; + phys = <&hdptxphy_hdmi0>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd + &hdmim0_tx0_scl &hdmim0_tx0_sda>; + power-domains = <&power RK3588_PD_VO1>; + resets = <&cru SRST_HDMITX0_REF>, <&cru SRST_HDMIHDP0>; + reset-names = "ref", "hdp"; + rockchip,grf = <&sys_grf>; + rockchip,vo-grf = <&vo1_grf>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + hdmi0_in: port@0 { + reg = <0>; + }; + + hdmi0_out: port@1 { + reg = <1>; + }; + }; + }; + qos_gpu_m0: qos@fdf35000 { compatible = "rockchip,rk3588-qos", "syscon"; reg = <0x0 0xfdf35000 0x0 0x20>; diff --git a/dts/upstream/src/arm64/rockchip/rk3588s-rock-5a.dts b/dts/upstream/src/arm64/rockchip/rk3588s-rock-5a.dts index 294b99dd50d..87fce8d9a96 100644 --- a/dts/upstream/src/arm64/rockchip/rk3588s-rock-5a.dts +++ b/dts/upstream/src/arm64/rockchip/rk3588s-rock-5a.dts @@ -310,7 +310,7 @@ }; &pcie2x1l2 { - pinctrl-0 = <&pcie20x1m0_pins>; + pinctrl-0 = <&pcie2_reset>, <&pcie20x1m0_clkreqn>, <&pcie20x1m0_waken>; pinctrl-names = "default"; reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; vpcie3v3-supply = <&vcc3v3_wf>; @@ -328,6 +328,10 @@ pow_en: pow-en { rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; }; + + pcie2_reset: pcie2-reset { + rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; + }; }; power { diff --git a/dts/upstream/src/arm64/rockchip/rk3588s-rock-5c.dts b/dts/upstream/src/arm64/rockchip/rk3588s-rock-5c.dts new file mode 100644 index 00000000000..9b14d5383cd --- /dev/null +++ b/dts/upstream/src/arm64/rockchip/rk3588s-rock-5c.dts @@ -0,0 +1,920 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2024 Radxa Computer (Shenzhen) Co., Ltd. + */ + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include <dt-bindings/soc/rockchip,vop2.h> +#include "rk3588s.dtsi" + +/ { + model = "Radxa ROCK 5C"; + compatible = "radxa,rock-5c", "rockchip,rk3588s"; + + aliases { + ethernet0 = &gmac1; + mmc0 = &sdhci; + mmc1 = &sdmmc; + }; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + analog-sound { + compatible = "audio-graph-card"; + label = "rk3588-es8316"; + dais = <&i2s0_8ch_p0>; + routing = "MIC2", "Mic Jack", + "Headphones", "HPOL", + "Headphones", "HPOR"; + widgets = "Microphone", "Mic Jack", + "Headphone", "Headphones"; + }; + + hdmi0-con { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi0_con_in: endpoint { + remote-endpoint = <&hdmi0_out_con>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pins>; + + led-0 { + color = <LED_COLOR_ID_GREEN>; + default-state = "on"; + function = LED_FUNCTION_POWER; + gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_HIGH>; + }; + + led-1 { + color = <LED_COLOR_ID_BLUE>; + default-state = "on"; + function = LED_FUNCTION_HEARTBEAT; + gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; + + fan { + compatible = "pwm-fan"; + #cooling-cells = <2>; + cooling-levels = <0 64 128 192 255>; + fan-supply = <&vcc_5v0>; + pwms = <&pwm3 0 10000 0>; + }; + + pcie2x1l2_3v3: regulator-pcie2x1l2-3v3 { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pow_en>; + regulator-name = "pcie2x1l2_3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_sysin>; + }; + + vcc5v_dcin: regulator-vcc5v-dcin { + compatible = "regulator-fixed"; + regulator-name = "vcc5v_dcin"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + vcc5v0_usb_host: regulator-vcc5v0-usb-host { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&usb_host_pwren_h>; + regulator-name = "vcc5v0_usb_host"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc_sysin>; + }; + + vcc5v0_usb_otg0: regulator-vcc5v0-usb-otg0 { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&usb_otg_pwren_h>; + regulator-name = "vcc5v0_usb_otg0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc_sysin>; + }; + + vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { + compatible = "regulator-fixed"; + regulator-name = "vcc_1v1_nldo_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + vin-supply = <&vcc_sysin>; + }; + + vcc_3v3_pmu: regulator-vcc-3v3-pmu { + compatible = "regulator-fixed"; + regulator-name = "vcc_3v3_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_3v3_s3>; + }; + + vcc_3v3_s0: regulator-vcc-3v3-s0 { + compatible = "regulator-fixed"; + regulator-name = "vcc_3v3_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_1v8_s0>; + }; + + vcc_5v0: regulator-vcc-5v0 { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc_5v0_pwren_h>; + regulator-name = "vcc_5v0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc_sysin>; + }; + + vcc_sysin: regulator-vcc-sysin { + compatible = "regulator-fixed"; + regulator-name = "vcc_sysin"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v_dcin>; + }; + + vcca: regulator-vcca { + compatible = "regulator-fixed"; + regulator-name = "vcca"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <4000000>; + regulator-max-microvolt = <4000000>; + vin-supply = <&vcc_sysin>; + }; + + vdd_3v3: regulator-vdd-3v3 { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&usb_wifi_pwr>; + regulator-name = "vdd_3v3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_3v3_s3>; + }; +}; + +&combphy0_ps { + status = "okay"; +}; + +&combphy2_psu { + status = "okay"; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_big0_s0>; +}; + +&cpu_b1 { + cpu-supply = <&vdd_cpu_big0_s0>; +}; + +&cpu_b2 { + cpu-supply = <&vdd_cpu_big1_s0>; +}; + +&cpu_b3 { + cpu-supply = <&vdd_cpu_big1_s0>; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&gmac1 { + phy-handle = <&rgmii_phy1>; + phy-mode = "rgmii-id"; + phy-supply = <&vcc_3v3_s0>; + pinctrl-0 = <&gmac1_miim + &gmac1_tx_bus2 + &gmac1_rx_bus2 + &gmac1_rgmii_clk + &gmac1_rgmii_bus + &gmac1_clkinout>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpu { + mali-supply = <&vdd_gpu_s0>; + status = "okay"; +}; + +&hdmi0 { + pinctrl-names = "default"; + pinctrl-0 = <&hdmim0_tx0_cec + &hdmim1_tx0_hpd + &hdmim0_tx0_scl + &hdmim0_tx0_sda>; + status = "okay"; +}; + +&hdmi0_in { + hdmi0_in_vp0: endpoint { + remote-endpoint = <&vp0_out_hdmi0>; + }; +}; + +&hdmi0_out { + hdmi0_out_con: endpoint { + remote-endpoint = <&hdmi0_con_in>; + }; +}; + +&hdptxphy_hdmi0 { + status = "okay"; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0m2_xfer>; + status = "okay"; + + vdd_cpu_big0_s0: regulator@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu_big0_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc_sysin>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_big1_s0: regulator@43 { + compatible = "rockchip,rk8603", "rockchip,rk8602"; + reg = <0x43>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu_big1_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc_sysin>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + eeprom@50 { + compatible = "belling,bl24c16a", "atmel,24c16"; + reg = <0x50>; + pagesize = <16>; + vcc-supply = <&vcc_3v3_pmu>; + }; +}; + +&i2c2 { + status = "okay"; + + vdd_npu_s0: regulator@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_npu_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc_sysin>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c5 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c5m2_xfer>; + status = "okay"; + + rtc@51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + #clock-cells = <0>; + clock-output-names = "rtcic_32kout"; + interrupt-parent = <&gpio0>; + interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&rtc_int_l>; + }; +}; + +&i2c7 { + status = "okay"; + + audio-codec@11 { + compatible = "everest,es8316"; + reg = <0x11>; + assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; + assigned-clock-rates = <12288000>; + clocks = <&cru I2S0_8CH_MCLKOUT>; + clock-names = "mclk"; + #sound-dai-cells = <0>; + + port { + es8316_p0_0: endpoint { + remote-endpoint = <&i2s0_8ch_p0_0>; + }; + }; + }; +}; + +&i2s0_8ch { + pinctrl-names = "default"; + pinctrl-0 = <&i2s0_lrck + &i2s0_mclk + &i2s0_sclk + &i2s0_sdi0 + &i2s0_sdo0>; + status = "okay"; + + i2s0_8ch_p0: port { + i2s0_8ch_p0_0: endpoint { + dai-format = "i2s"; + mclk-fs = <256>; + remote-endpoint = <&es8316_p0_0>; + }; + }; +}; + +&mdio1 { + rgmii_phy1: ethernet-phy@1 { + compatible = "ethernet-phy-id001c.c916"; + reg = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&gmac1_rstn>; + reset-assert-us = <20000>; + reset-deassert-us = <100000>; + reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; + }; +}; + +&pcie2x1l2 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie20x1_2_perstn_m0>; + reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&pcie2x1l2_3v3>; + status = "okay"; +}; + +&pinctrl { + leds { + led_pins: led-pins { + rockchip,pins = <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, + <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + mdio { + gmac1_rstn: gmac1-rstn { + rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pcie { + pcie20x1_2_perstn_m0: pcie20x1-2-perstn-m0 { + rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pow_en: pow-en { + rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + rtc { + rtc_int_l: rtc-int-l { + rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb { + usb_host_pwren_h: usb-host-pwren-h { + rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + usb_otg_pwren_h: usb-otg-pwren-h { + rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + usb_wifi_pwr: usb-wifi-pwr { + rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + vcc_5v0_pwren_h: vcc-5v0-pwren-h { + rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pwm3 { + pinctrl-names = "default"; + pinctrl-0 = <&pwm3m1_pins>; + status = "okay"; +}; + +&saradc { + vref-supply = <&vcca_1v8_s0>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + no-sdio; + no-sd; + non-removable; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + no-sdio; + no-mmc; + sd-uhs-sdr104; + vmmc-supply = <&vcc_3v3_s3>; + vqmmc-supply = <&vccio_sd_s0>; + status = "okay"; +}; + +&sfc { + pinctrl-names = "default"; + pinctrl-0 = <&fspim0_pins>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <104000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <1>; + }; +}; + +&spi2 { + status = "okay"; + assigned-clocks = <&cru CLK_SPI2>; + assigned-clock-rates = <200000000>; + num-cs = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; + + pmic@0 { + compatible = "rockchip,rk806"; + reg = <0>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&gpio0>; + interrupts = <7 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, + <&rk806_dvs2_null>, <&rk806_dvs3_null>; + spi-max-frequency = <1000000>; + system-power-controller; + + vcc1-supply = <&vcc_sysin>; + vcc2-supply = <&vcc_sysin>; + vcc3-supply = <&vcc_sysin>; + vcc4-supply = <&vcc_sysin>; + vcc5-supply = <&vcc_sysin>; + vcc6-supply = <&vcc_sysin>; + vcc7-supply = <&vcc_sysin>; + vcc8-supply = <&vcc_sysin>; + vcc9-supply = <&vcc_sysin>; + vcc10-supply = <&vcc_sysin>; + vcc11-supply = <&vcc_2v0_pldo_s3>; + vcc12-supply = <&vcc_sysin>; + vcc13-supply = <&vcc_1v1_nldo_s3>; + vcc14-supply = <&vcc_1v1_nldo_s3>; + vcca-supply = <&vcca>; + + rk806_dvs1_null: dvs1-null-pins { + pins = "gpio_pwrctrl1"; + function = "pin_fun0"; + }; + + rk806_dvs2_null: dvs2-null-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun0"; + }; + + rk806_dvs3_null: dvs3-null-pins { + pins = "gpio_pwrctrl3"; + function = "pin_fun0"; + }; + + regulators { + vdd_gpu_s0: dcdc-reg1 { + regulator-name = "vdd_gpu_s0"; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + regulator-enable-ramp-delay = <400>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_lit_s0: dcdc-reg2 { + regulator-name = "vdd_cpu_lit_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_logic_s0: dcdc-reg3 { + regulator-name = "vdd_logic_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <750000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vdd_vdenc_s0: dcdc-reg4 { + regulator-name = "vdd_vdenc_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_ddr_s0: dcdc-reg5 { + regulator-name = "vdd_ddr_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <900000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <850000>; + }; + }; + + vdd2_ddr_s3: dcdc-reg6 { + regulator-name = "vdd2_ddr_s3"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_2v0_pldo_s3: dcdc-reg7 { + regulator-name = "vdd_2v0_pldo_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2000000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <2000000>; + }; + }; + + vcc_3v3_s3: dcdc-reg8 { + regulator-name = "vcc_3v3_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vddq_ddr_s0: dcdc-reg9 { + regulator-name = "vddq_ddr_s0"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc1v8_pmu_ddr_s3: dcdc-reg10 { + regulator-name = "vcc1v8_pmu_ddr_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc_1v8_s0: pldo-reg1 { + regulator-name = "vcc_1v8_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca_1v8_s0: pldo-reg2 { + regulator-name = "vcca_1v8_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdda_1v2_s0: pldo-reg3 { + regulator-name = "vdda_1v2_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca_3v3_s0: pldo-reg4 { + regulator-name = "vcca_3v3_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vccio_sd_s0: pldo-reg5 { + regulator-name = "vccio_sd_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + pldo6_s3: pldo-reg6 { + regulator-name = "pldo6_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd_0v75_s3: nldo-reg1 { + regulator-name = "vdd_0v75_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vdda_ddr_pll_s0: nldo-reg2 { + regulator-name = "vdda_ddr_pll_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <850000>; + }; + }; + + vdda_0v75_s0: nldo-reg3 { + regulator-name = "vdda_0v75_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v85_s0: nldo-reg4 { + regulator-name = "vdda_0v85_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_0v75_s0: nldo-reg5 { + regulator-name = "vdd_0v75_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&tsadc { + status = "okay"; +}; + +&u2phy0 { + status = "okay"; +}; + +&u2phy0_otg { + phy-supply = <&vcc5v0_usb_otg0>; + status = "okay"; +}; + +&u2phy2 { + status = "okay"; +}; + +&u2phy2_host { + /* connected to USB hub, which is powered by vcc_5v0 */ + phy-supply = <&vcc_5v0>; + status = "okay"; +}; + +&u2phy3 { + status = "okay"; +}; + +&u2phy3_host { + phy-supply = <&vcc5v0_usb_host>; + status = "okay"; +}; + +&uart2 { + pinctrl-0 = <&uart2m0_xfer>; + status = "okay"; +}; + +&usbdp_phy0 { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_xhci { + dr_mode = "host"; + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usb_host2_xhci { + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +}; + +&vop { + status = "okay"; +}; + +&vp0 { + vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg = <ROCKCHIP_VOP2_EP_HDMI0>; + remote-endpoint = <&hdmi0_in_vp0>; + }; +}; diff --git a/examples/api/Makefile b/examples/api/Makefile index ec1643e4875..722c7e45904 100644 --- a/examples/api/Makefile +++ b/examples/api/Makefile @@ -22,6 +22,9 @@ else LOAD_ADDR = 0x80200000 endif endif +ifeq ($(ARCH),riscv) +LOAD_ADDR = 0x84000000 +endif # Resulting ELF and binary exectuables will be named demo and demo.bin extra-y = demo @@ -43,8 +46,8 @@ EXT_COBJ-y += lib/vsprintf.o EXT_COBJ-y += lib/charset.o EXT_COBJ-$(CONFIG_LIB_UUID) += lib/uuid.o EXT_SOBJ-$(CONFIG_PPC) += arch/powerpc/lib/ppcstring.o -ifeq ($(ARCH),arm) -EXT_SOBJ-$(CONFIG_USE_ARCH_MEMSET) += arch/arm/lib/memset.o +ifneq ($(CONFIG_ARM)$(CONFIG_RISCV),) +EXT_SOBJ-$(CONFIG_USE_ARCH_MEMSET) += arch/$(ARCH)/lib/memset.o endif # Create a list of object files to be compiled diff --git a/examples/api/crt0.S b/examples/api/crt0.S index f1b88ed8a3d..d2a97557817 100644 --- a/examples/api/crt0.S +++ b/examples/api/crt0.S @@ -80,6 +80,38 @@ syscall: return_addr: .align 8 .long 0 +#elif defined(CONFIG_ARCH_RV32I) + + .text + .globl _start +_start: + la t0, search_hint + sw sp, 0(t0) + la t0, main + jalr x0, t0 + + .globl syscall +syscall: + la t0, syscall_ptr + lw t0, 0(t0) + jalr x0, t0 + +#elif defined(CONFIG_ARCH_RV64I) + + .text + .globl _start +_start: + la t0, search_hint + sd sp, 0(t0) + la t0, main + jalr x0, t0 + + .globl syscall +syscall: + la t0, syscall_ptr + ld t0, 0(t0) + jalr x0, t0 + #else #error No support for this arch! #endif diff --git a/fs/Kconfig b/fs/Kconfig index 744c9812b12..5e83cb27059 100644 --- a/fs/Kconfig +++ b/fs/Kconfig @@ -20,8 +20,6 @@ source "fs/ubifs/Kconfig" source "fs/cramfs/Kconfig" -source "fs/yaffs2/Kconfig" - source "fs/squashfs/Kconfig" source "fs/erofs/Kconfig" diff --git a/fs/Makefile b/fs/Makefile index 1e54ac11ab7..1c2ff180bda 100644 --- a/fs/Makefile +++ b/fs/Makefile @@ -22,7 +22,6 @@ obj-$(CONFIG_FS_JFFS2) += jffs2/ obj-$(CONFIG_SANDBOX) += sandbox/ obj-$(CONFIG_SEMIHOSTING) += semihostingfs.o obj-$(CONFIG_CMD_UBIFS) += ubifs/ -obj-$(CONFIG_YAFFS2) += yaffs2/ obj-$(CONFIG_CMD_ZFS) += zfs/ obj-$(CONFIG_FS_SQUASHFS) += squashfs/ obj-$(CONFIG_FS_EROFS) += erofs/ diff --git a/fs/squashfs/sqfs_inode.c b/fs/squashfs/sqfs_inode.c index bb3ccd37e33..ce9a8ff8e2a 100644 --- a/fs/squashfs/sqfs_inode.c +++ b/fs/squashfs/sqfs_inode.c @@ -19,7 +19,9 @@ int sqfs_inode_size(struct squashfs_base_inode *inode, u32 blk_size) { - switch (get_unaligned_le16(&inode->inode_type)) { + u16 inode_type = get_unaligned_le16(&inode->inode_type); + + switch (inode_type) { case SQFS_DIR_TYPE: return sizeof(struct squashfs_dir_inode); @@ -87,7 +89,7 @@ int sqfs_inode_size(struct squashfs_base_inode *inode, u32 blk_size) get_unaligned_le32(&symlink->symlink_size), &size)) return -EINVAL; - return size; + return (inode_type == SQFS_SYMLINK_TYPE) ? size : size + sizeof(u32); } case SQFS_BLKDEV_TYPE: diff --git a/fs/yaffs2/Kconfig b/fs/yaffs2/Kconfig deleted file mode 100644 index c81f4555d60..00000000000 --- a/fs/yaffs2/Kconfig +++ /dev/null @@ -1,19 +0,0 @@ -config YAFFS_DIRECT - bool - -config YAFFS_PROVIDE_DEFS - bool - -config YAFFSFS_PROVIDE_VALUES - bool - -config YAFFS2 - bool "YAFFS2 filesystem support" - select YAFFS_DIRECT - select YAFFS_PROVIDE_DEFS - select YAFFSFS_PROVIDE_VALUES - help - This provides access to YAFFS2 filesystems. Yet Another Flash - Filesystem 2 is a filesystem designed specifically for NAND flash. - It incorporates bad-block management and ensures that device - writes are sequential regardless of filesystem activity. diff --git a/fs/yaffs2/Makefile b/fs/yaffs2/Makefile deleted file mode 100644 index 02cae265550..00000000000 --- a/fs/yaffs2/Makefile +++ /dev/null @@ -1,18 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -# Makefile for YAFFS direct test -# YAFFS: Yet another Flash File System. A NAND-flash specific file system. -# -# Copyright (C) 2003 Aleph One Ltd. -# -# -# Created by Charles Manning <charles@aleph1.co.uk> -# -# - -obj-y := \ - yaffs_allocator.o yaffs_attribs.o yaffs_bitmap.o yaffs_uboot_glue.o\ - yaffs_checkptrw.o yaffs_ecc.o yaffs_error.o \ - yaffsfs.o yaffs_guts.o yaffs_nameval.o yaffs_nand.o\ - yaffs_packedtags1.o yaffs_packedtags2.o yaffs_qsort.o \ - yaffs_summary.o yaffs_tagscompat.o yaffs_verify.o yaffs_yaffs1.o \ - yaffs_yaffs2.o yaffs_mtdif.o yaffs_mtdif2.o diff --git a/fs/yaffs2/yaffs_allocator.c b/fs/yaffs2/yaffs_allocator.c deleted file mode 100644 index 961dc22ef3d..00000000000 --- a/fs/yaffs2/yaffs_allocator.c +++ /dev/null @@ -1,357 +0,0 @@ -/* - * YAFFS: Yet Another Flash File System. A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include "yaffs_allocator.h" -#include "yaffs_guts.h" -#include "yaffs_trace.h" -#include "yportenv.h" -#include <dm/devres.h> - -/* - * Each entry in yaffs_tnode_list and yaffs_obj_list hold blocks - * of approx 100 objects that are themn allocated singly. - * This is basically a simplified slab allocator. - * - * We don't use the Linux slab allocator because slab does not allow - * us to dump all the objects in one hit when we do a umount and tear - * down all the tnodes and objects. slab requires that we first free - * the individual objects. - * - * Once yaffs has been mainlined I shall try to motivate for a change - * to slab to provide the extra features we need here. - */ - -struct yaffs_tnode_list { - struct yaffs_tnode_list *next; - struct yaffs_tnode *tnodes; -}; - -struct yaffs_obj_list { - struct yaffs_obj_list *next; - struct yaffs_obj *objects; -}; - -struct yaffs_allocator { - int n_tnodes_created; - struct yaffs_tnode *free_tnodes; - int n_free_tnodes; - struct yaffs_tnode_list *alloc_tnode_list; - - int n_obj_created; - struct list_head free_objs; - int n_free_objects; - - struct yaffs_obj_list *allocated_obj_list; -}; - -static void yaffs_deinit_raw_tnodes(struct yaffs_dev *dev) -{ - struct yaffs_allocator *allocator = - (struct yaffs_allocator *)dev->allocator; - struct yaffs_tnode_list *tmp; - - if (!allocator) { - BUG(); - return; - } - - while (allocator->alloc_tnode_list) { - tmp = allocator->alloc_tnode_list->next; - - kfree(allocator->alloc_tnode_list->tnodes); - kfree(allocator->alloc_tnode_list); - allocator->alloc_tnode_list = tmp; - } - - allocator->free_tnodes = NULL; - allocator->n_free_tnodes = 0; - allocator->n_tnodes_created = 0; -} - -static void yaffs_init_raw_tnodes(struct yaffs_dev *dev) -{ - struct yaffs_allocator *allocator = dev->allocator; - - if (!allocator) { - BUG(); - return; - } - - allocator->alloc_tnode_list = NULL; - allocator->free_tnodes = NULL; - allocator->n_free_tnodes = 0; - allocator->n_tnodes_created = 0; -} - -static int yaffs_create_tnodes(struct yaffs_dev *dev, int n_tnodes) -{ - struct yaffs_allocator *allocator = - (struct yaffs_allocator *)dev->allocator; - int i; - struct yaffs_tnode *new_tnodes; - u8 *mem; - struct yaffs_tnode *curr; - struct yaffs_tnode *next; - struct yaffs_tnode_list *tnl; - - if (!allocator) { - BUG(); - return YAFFS_FAIL; - } - - if (n_tnodes < 1) - return YAFFS_OK; - - /* make these things */ - new_tnodes = kmalloc(n_tnodes * dev->tnode_size, GFP_NOFS); - mem = (u8 *) new_tnodes; - - if (!new_tnodes) { - yaffs_trace(YAFFS_TRACE_ERROR, - "yaffs: Could not allocate Tnodes"); - return YAFFS_FAIL; - } - - /* New hookup for wide tnodes */ - for (i = 0; i < n_tnodes - 1; i++) { - curr = (struct yaffs_tnode *)&mem[i * dev->tnode_size]; - next = (struct yaffs_tnode *)&mem[(i + 1) * dev->tnode_size]; - curr->internal[0] = next; - } - - curr = (struct yaffs_tnode *)&mem[(n_tnodes - 1) * dev->tnode_size]; - curr->internal[0] = allocator->free_tnodes; - allocator->free_tnodes = (struct yaffs_tnode *)mem; - - allocator->n_free_tnodes += n_tnodes; - allocator->n_tnodes_created += n_tnodes; - - /* Now add this bunch of tnodes to a list for freeing up. - * NB If we can't add this to the management list it isn't fatal - * but it just means we can't free this bunch of tnodes later. - */ - tnl = kmalloc(sizeof(struct yaffs_tnode_list), GFP_NOFS); - if (!tnl) { - yaffs_trace(YAFFS_TRACE_ERROR, - "Could not add tnodes to management list"); - return YAFFS_FAIL; - } else { - tnl->tnodes = new_tnodes; - tnl->next = allocator->alloc_tnode_list; - allocator->alloc_tnode_list = tnl; - } - - yaffs_trace(YAFFS_TRACE_ALLOCATE, "Tnodes added"); - - return YAFFS_OK; -} - -struct yaffs_tnode *yaffs_alloc_raw_tnode(struct yaffs_dev *dev) -{ - struct yaffs_allocator *allocator = - (struct yaffs_allocator *)dev->allocator; - struct yaffs_tnode *tn = NULL; - - if (!allocator) { - BUG(); - return NULL; - } - - /* If there are none left make more */ - if (!allocator->free_tnodes) - yaffs_create_tnodes(dev, YAFFS_ALLOCATION_NTNODES); - - if (allocator->free_tnodes) { - tn = allocator->free_tnodes; - allocator->free_tnodes = allocator->free_tnodes->internal[0]; - allocator->n_free_tnodes--; - } - - return tn; -} - -/* FreeTnode frees up a tnode and puts it back on the free list */ -void yaffs_free_raw_tnode(struct yaffs_dev *dev, struct yaffs_tnode *tn) -{ - struct yaffs_allocator *allocator = dev->allocator; - - if (!allocator) { - BUG(); - return; - } - - if (tn) { - tn->internal[0] = allocator->free_tnodes; - allocator->free_tnodes = tn; - allocator->n_free_tnodes++; - } - dev->checkpoint_blocks_required = 0; /* force recalculation */ -} - -/*--------------- yaffs_obj alloaction ------------------------ - * - * Free yaffs_objs are stored in a list using obj->siblings. - * The blocks of allocated objects are stored in a linked list. - */ - -static void yaffs_init_raw_objs(struct yaffs_dev *dev) -{ - struct yaffs_allocator *allocator = dev->allocator; - - if (!allocator) { - BUG(); - return; - } - - allocator->allocated_obj_list = NULL; - INIT_LIST_HEAD(&allocator->free_objs); - allocator->n_free_objects = 0; -} - -static void yaffs_deinit_raw_objs(struct yaffs_dev *dev) -{ - struct yaffs_allocator *allocator = dev->allocator; - struct yaffs_obj_list *tmp; - - if (!allocator) { - BUG(); - return; - } - - while (allocator->allocated_obj_list) { - tmp = allocator->allocated_obj_list->next; - kfree(allocator->allocated_obj_list->objects); - kfree(allocator->allocated_obj_list); - allocator->allocated_obj_list = tmp; - } - - INIT_LIST_HEAD(&allocator->free_objs); - allocator->n_free_objects = 0; - allocator->n_obj_created = 0; -} - -static int yaffs_create_free_objs(struct yaffs_dev *dev, int n_obj) -{ - struct yaffs_allocator *allocator = dev->allocator; - int i; - struct yaffs_obj *new_objs; - struct yaffs_obj_list *list; - - if (!allocator) { - BUG(); - return YAFFS_FAIL; - } - - if (n_obj < 1) - return YAFFS_OK; - - /* make these things */ - new_objs = kmalloc(n_obj * sizeof(struct yaffs_obj), GFP_NOFS); - list = kmalloc(sizeof(struct yaffs_obj_list), GFP_NOFS); - - if (!new_objs || !list) { - kfree(new_objs); - new_objs = NULL; - kfree(list); - list = NULL; - yaffs_trace(YAFFS_TRACE_ALLOCATE, - "Could not allocate more objects"); - return YAFFS_FAIL; - } - - /* Hook them into the free list */ - for (i = 0; i < n_obj; i++) - list_add(&new_objs[i].siblings, &allocator->free_objs); - - allocator->n_free_objects += n_obj; - allocator->n_obj_created += n_obj; - - /* Now add this bunch of Objects to a list for freeing up. */ - - list->objects = new_objs; - list->next = allocator->allocated_obj_list; - allocator->allocated_obj_list = list; - - return YAFFS_OK; -} - -struct yaffs_obj *yaffs_alloc_raw_obj(struct yaffs_dev *dev) -{ - struct yaffs_obj *obj = NULL; - struct list_head *lh; - struct yaffs_allocator *allocator = dev->allocator; - - if (!allocator) { - BUG(); - return obj; - } - - /* If there are none left make more */ - if (list_empty(&allocator->free_objs)) - yaffs_create_free_objs(dev, YAFFS_ALLOCATION_NOBJECTS); - - if (!list_empty(&allocator->free_objs)) { - lh = allocator->free_objs.next; - obj = list_entry(lh, struct yaffs_obj, siblings); - list_del_init(lh); - allocator->n_free_objects--; - } - - return obj; -} - -void yaffs_free_raw_obj(struct yaffs_dev *dev, struct yaffs_obj *obj) -{ - - struct yaffs_allocator *allocator = dev->allocator; - - if (!allocator) { - BUG(); - return; - } - - /* Link into the free list. */ - list_add(&obj->siblings, &allocator->free_objs); - allocator->n_free_objects++; -} - -void yaffs_deinit_raw_tnodes_and_objs(struct yaffs_dev *dev) -{ - - if (!dev->allocator) { - BUG(); - return; - } - - yaffs_deinit_raw_tnodes(dev); - yaffs_deinit_raw_objs(dev); - kfree(dev->allocator); - dev->allocator = NULL; -} - -void yaffs_init_raw_tnodes_and_objs(struct yaffs_dev *dev) -{ - struct yaffs_allocator *allocator; - - if (dev->allocator) { - BUG(); - return; - } - - allocator = kmalloc(sizeof(struct yaffs_allocator), GFP_NOFS); - if (allocator) { - dev->allocator = allocator; - yaffs_init_raw_tnodes(dev); - yaffs_init_raw_objs(dev); - } -} diff --git a/fs/yaffs2/yaffs_allocator.h b/fs/yaffs2/yaffs_allocator.h deleted file mode 100644 index a8cc3226421..00000000000 --- a/fs/yaffs2/yaffs_allocator.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -#ifndef __YAFFS_ALLOCATOR_H__ -#define __YAFFS_ALLOCATOR_H__ - -#include "yaffs_guts.h" - -void yaffs_init_raw_tnodes_and_objs(struct yaffs_dev *dev); -void yaffs_deinit_raw_tnodes_and_objs(struct yaffs_dev *dev); - -struct yaffs_tnode *yaffs_alloc_raw_tnode(struct yaffs_dev *dev); -void yaffs_free_raw_tnode(struct yaffs_dev *dev, struct yaffs_tnode *tn); - -struct yaffs_obj *yaffs_alloc_raw_obj(struct yaffs_dev *dev); -void yaffs_free_raw_obj(struct yaffs_dev *dev, struct yaffs_obj *obj); - -#endif diff --git a/fs/yaffs2/yaffs_attribs.c b/fs/yaffs2/yaffs_attribs.c deleted file mode 100644 index 81927cb9437..00000000000 --- a/fs/yaffs2/yaffs_attribs.c +++ /dev/null @@ -1,150 +0,0 @@ -/* - * YAFFS: Yet Another Flash File System. A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include "yaffs_attribs.h" - -void yaffs_load_attribs(struct yaffs_obj *obj, struct yaffs_obj_hdr *oh) -{ - obj->yst_uid = oh->yst_uid; - obj->yst_gid = oh->yst_gid; - obj->yst_atime = oh->yst_atime; - obj->yst_mtime = oh->yst_mtime; - obj->yst_ctime = oh->yst_ctime; - obj->yst_rdev = oh->yst_rdev; -} - -void yaffs_load_attribs_oh(struct yaffs_obj_hdr *oh, struct yaffs_obj *obj) -{ -#ifdef CONFIG_YAFFS_WINCE - oh->win_atime[0] = obj->win_atime[0]; - oh->win_ctime[0] = obj->win_ctime[0]; - oh->win_mtime[0] = obj->win_mtime[0]; - oh->win_atime[1] = obj->win_atime[1]; - oh->win_ctime[1] = obj->win_ctime[1]; - oh->win_mtime[1] = obj->win_mtime[1]; -#else - oh->yst_uid = obj->yst_uid; - oh->yst_gid = obj->yst_gid; - oh->yst_atime = obj->yst_atime; - oh->yst_mtime = obj->yst_mtime; - oh->yst_ctime = obj->yst_ctime; - oh->yst_rdev = obj->yst_rdev; -#endif - -} - -void yaffs_attribs_init(struct yaffs_obj *obj, u32 gid, u32 uid, u32 rdev) -{ - -#ifdef CONFIG_YAFFS_WINCE - yfsd_win_file_time_now(obj->win_atime); - obj->win_ctime[0] = obj->win_mtime[0] = obj->win_atime[0]; - obj->win_ctime[1] = obj->win_mtime[1] = obj->win_atime[1]; - -#else - yaffs_load_current_time(obj, 1, 1); - obj->yst_rdev = rdev; - obj->yst_uid = uid; - obj->yst_gid = gid; -#endif -} - -void yaffs_load_current_time(struct yaffs_obj *obj, int do_a, int do_c) -{ -#ifdef CONFIG_YAFFS_WINCE - yfsd_win_file_time_now(the_obj->win_atime); - the_obj->win_ctime[0] = the_obj->win_mtime[0] = - the_obj->win_atime[0]; - the_obj->win_ctime[1] = the_obj->win_mtime[1] = - the_obj->win_atime[1]; - -#else - - obj->yst_mtime = Y_CURRENT_TIME; - if (do_a) - obj->yst_atime = obj->yst_atime; - if (do_c) - obj->yst_ctime = obj->yst_atime; -#endif -} - -loff_t yaffs_get_file_size(struct yaffs_obj *obj) -{ - YCHAR *alias = NULL; - obj = yaffs_get_equivalent_obj(obj); - - switch (obj->variant_type) { - case YAFFS_OBJECT_TYPE_FILE: - return obj->variant.file_variant.file_size; - case YAFFS_OBJECT_TYPE_SYMLINK: - alias = obj->variant.symlink_variant.alias; - if (!alias) - return 0; - return yaffs_strnlen(alias, YAFFS_MAX_ALIAS_LENGTH); - default: - return 0; - } -} - -int yaffs_set_attribs(struct yaffs_obj *obj, struct iattr *attr) -{ - unsigned int valid = attr->ia_valid; - - if (valid & ATTR_MODE) - obj->yst_mode = attr->ia_mode; - if (valid & ATTR_UID) - obj->yst_uid = attr->ia_uid; - if (valid & ATTR_GID) - obj->yst_gid = attr->ia_gid; - - if (valid & ATTR_ATIME) - obj->yst_atime = Y_TIME_CONVERT(attr->ia_atime); - if (valid & ATTR_CTIME) - obj->yst_ctime = Y_TIME_CONVERT(attr->ia_ctime); - if (valid & ATTR_MTIME) - obj->yst_mtime = Y_TIME_CONVERT(attr->ia_mtime); - - if (valid & ATTR_SIZE) - yaffs_resize_file(obj, attr->ia_size); - - yaffs_update_oh(obj, NULL, 1, 0, 0, NULL); - - return YAFFS_OK; - -} - -int yaffs_get_attribs(struct yaffs_obj *obj, struct iattr *attr) -{ - unsigned int valid = 0; - - attr->ia_mode = obj->yst_mode; - valid |= ATTR_MODE; - attr->ia_uid = obj->yst_uid; - valid |= ATTR_UID; - attr->ia_gid = obj->yst_gid; - valid |= ATTR_GID; - - Y_TIME_CONVERT(attr->ia_atime) = obj->yst_atime; - valid |= ATTR_ATIME; - Y_TIME_CONVERT(attr->ia_ctime) = obj->yst_ctime; - valid |= ATTR_CTIME; - Y_TIME_CONVERT(attr->ia_mtime) = obj->yst_mtime; - valid |= ATTR_MTIME; - - attr->ia_size = yaffs_get_file_size(obj); - valid |= ATTR_SIZE; - - attr->ia_valid = valid; - - return YAFFS_OK; -} diff --git a/fs/yaffs2/yaffs_attribs.h b/fs/yaffs2/yaffs_attribs.h deleted file mode 100644 index 5b21b085b73..00000000000 --- a/fs/yaffs2/yaffs_attribs.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -#ifndef __YAFFS_ATTRIBS_H__ -#define __YAFFS_ATTRIBS_H__ - -#include "yaffs_guts.h" - -void yaffs_load_attribs(struct yaffs_obj *obj, struct yaffs_obj_hdr *oh); -void yaffs_load_attribs_oh(struct yaffs_obj_hdr *oh, struct yaffs_obj *obj); -void yaffs_attribs_init(struct yaffs_obj *obj, u32 gid, u32 uid, u32 rdev); -void yaffs_load_current_time(struct yaffs_obj *obj, int do_a, int do_c); -int yaffs_set_attribs(struct yaffs_obj *obj, struct iattr *attr); -int yaffs_get_attribs(struct yaffs_obj *obj, struct iattr *attr); - -#endif diff --git a/fs/yaffs2/yaffs_bitmap.c b/fs/yaffs2/yaffs_bitmap.c deleted file mode 100644 index 4440e930d6b..00000000000 --- a/fs/yaffs2/yaffs_bitmap.c +++ /dev/null @@ -1,97 +0,0 @@ -/* - * YAFFS: Yet Another Flash File System. A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include "yaffs_bitmap.h" -#include "yaffs_trace.h" -/* - * Chunk bitmap manipulations - */ - -static inline u8 *yaffs_block_bits(struct yaffs_dev *dev, int blk) -{ - if (blk < dev->internal_start_block || blk > dev->internal_end_block) { - yaffs_trace(YAFFS_TRACE_ERROR, - "BlockBits block %d is not valid", - blk); - BUG(); - } - return dev->chunk_bits + - (dev->chunk_bit_stride * (blk - dev->internal_start_block)); -} - -void yaffs_verify_chunk_bit_id(struct yaffs_dev *dev, int blk, int chunk) -{ - if (blk < dev->internal_start_block || blk > dev->internal_end_block || - chunk < 0 || chunk >= dev->param.chunks_per_block) { - yaffs_trace(YAFFS_TRACE_ERROR, - "Chunk Id (%d:%d) invalid", - blk, chunk); - BUG(); - } -} - -void yaffs_clear_chunk_bits(struct yaffs_dev *dev, int blk) -{ - u8 *blk_bits = yaffs_block_bits(dev, blk); - - memset(blk_bits, 0, dev->chunk_bit_stride); -} - -void yaffs_clear_chunk_bit(struct yaffs_dev *dev, int blk, int chunk) -{ - u8 *blk_bits = yaffs_block_bits(dev, blk); - - yaffs_verify_chunk_bit_id(dev, blk, chunk); - blk_bits[chunk / 8] &= ~(1 << (chunk & 7)); -} - -void yaffs_set_chunk_bit(struct yaffs_dev *dev, int blk, int chunk) -{ - u8 *blk_bits = yaffs_block_bits(dev, blk); - - yaffs_verify_chunk_bit_id(dev, blk, chunk); - blk_bits[chunk / 8] |= (1 << (chunk & 7)); -} - -int yaffs_check_chunk_bit(struct yaffs_dev *dev, int blk, int chunk) -{ - u8 *blk_bits = yaffs_block_bits(dev, blk); - - yaffs_verify_chunk_bit_id(dev, blk, chunk); - return (blk_bits[chunk / 8] & (1 << (chunk & 7))) ? 1 : 0; -} - -int yaffs_still_some_chunks(struct yaffs_dev *dev, int blk) -{ - u8 *blk_bits = yaffs_block_bits(dev, blk); - int i; - - for (i = 0; i < dev->chunk_bit_stride; i++) { - if (*blk_bits) - return 1; - blk_bits++; - } - return 0; -} - -int yaffs_count_chunk_bits(struct yaffs_dev *dev, int blk) -{ - u8 *blk_bits = yaffs_block_bits(dev, blk); - int i; - int n = 0; - - for (i = 0; i < dev->chunk_bit_stride; i++, blk_bits++) - n += hweight8(*blk_bits); - - return n; -} diff --git a/fs/yaffs2/yaffs_bitmap.h b/fs/yaffs2/yaffs_bitmap.h deleted file mode 100644 index e26b37d89ae..00000000000 --- a/fs/yaffs2/yaffs_bitmap.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -/* - * Chunk bitmap manipulations - */ - -#ifndef __YAFFS_BITMAP_H__ -#define __YAFFS_BITMAP_H__ - -#include "yaffs_guts.h" - -void yaffs_verify_chunk_bit_id(struct yaffs_dev *dev, int blk, int chunk); -void yaffs_clear_chunk_bits(struct yaffs_dev *dev, int blk); -void yaffs_clear_chunk_bit(struct yaffs_dev *dev, int blk, int chunk); -void yaffs_set_chunk_bit(struct yaffs_dev *dev, int blk, int chunk); -int yaffs_check_chunk_bit(struct yaffs_dev *dev, int blk, int chunk); -int yaffs_still_some_chunks(struct yaffs_dev *dev, int blk); -int yaffs_count_chunk_bits(struct yaffs_dev *dev, int blk); - -#endif diff --git a/fs/yaffs2/yaffs_checkptrw.c b/fs/yaffs2/yaffs_checkptrw.c deleted file mode 100644 index 628f02bb48d..00000000000 --- a/fs/yaffs2/yaffs_checkptrw.c +++ /dev/null @@ -1,409 +0,0 @@ -/* - * YAFFS: Yet Another Flash File System. A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include "yaffs_checkptrw.h" -#include "yaffs_getblockinfo.h" -#include <dm/devres.h> - -static int yaffs2_checkpt_space_ok(struct yaffs_dev *dev) -{ - int blocks_avail = dev->n_erased_blocks - dev->param.n_reserved_blocks; - - yaffs_trace(YAFFS_TRACE_CHECKPOINT, - "checkpt blocks_avail = %d", blocks_avail); - - return (blocks_avail <= 0) ? 0 : 1; -} - -static int yaffs_checkpt_erase(struct yaffs_dev *dev) -{ - int i; - - if (!dev->param.erase_fn) - return 0; - yaffs_trace(YAFFS_TRACE_CHECKPOINT, - "checking blocks %d to %d", - dev->internal_start_block, dev->internal_end_block); - - for (i = dev->internal_start_block; i <= dev->internal_end_block; i++) { - struct yaffs_block_info *bi = yaffs_get_block_info(dev, i); - if (bi->block_state == YAFFS_BLOCK_STATE_CHECKPOINT) { - yaffs_trace(YAFFS_TRACE_CHECKPOINT, - "erasing checkpt block %d", i); - - dev->n_erasures++; - - if (dev->param. - erase_fn(dev, - i - dev->block_offset /* realign */)) { - bi->block_state = YAFFS_BLOCK_STATE_EMPTY; - dev->n_erased_blocks++; - dev->n_free_chunks += - dev->param.chunks_per_block; - } else { - dev->param.bad_block_fn(dev, i); - bi->block_state = YAFFS_BLOCK_STATE_DEAD; - } - } - } - - dev->blocks_in_checkpt = 0; - - return 1; -} - -static void yaffs2_checkpt_find_erased_block(struct yaffs_dev *dev) -{ - int i; - int blocks_avail = dev->n_erased_blocks - dev->param.n_reserved_blocks; - - yaffs_trace(YAFFS_TRACE_CHECKPOINT, - "allocating checkpt block: erased %d reserved %d avail %d next %d ", - dev->n_erased_blocks, dev->param.n_reserved_blocks, - blocks_avail, dev->checkpt_next_block); - - if (dev->checkpt_next_block >= 0 && - dev->checkpt_next_block <= dev->internal_end_block && - blocks_avail > 0) { - - for (i = dev->checkpt_next_block; i <= dev->internal_end_block; - i++) { - struct yaffs_block_info *bi = - yaffs_get_block_info(dev, i); - if (bi->block_state == YAFFS_BLOCK_STATE_EMPTY) { - dev->checkpt_next_block = i + 1; - dev->checkpt_cur_block = i; - yaffs_trace(YAFFS_TRACE_CHECKPOINT, - "allocating checkpt block %d", i); - return; - } - } - } - yaffs_trace(YAFFS_TRACE_CHECKPOINT, "out of checkpt blocks"); - - dev->checkpt_next_block = -1; - dev->checkpt_cur_block = -1; -} - -static void yaffs2_checkpt_find_block(struct yaffs_dev *dev) -{ - int i; - struct yaffs_ext_tags tags; - - yaffs_trace(YAFFS_TRACE_CHECKPOINT, - "find next checkpt block: start: blocks %d next %d", - dev->blocks_in_checkpt, dev->checkpt_next_block); - - if (dev->blocks_in_checkpt < dev->checkpt_max_blocks) - for (i = dev->checkpt_next_block; i <= dev->internal_end_block; - i++) { - int chunk = i * dev->param.chunks_per_block; - int realigned_chunk = chunk - dev->chunk_offset; - - dev->param.read_chunk_tags_fn(dev, realigned_chunk, - NULL, &tags); - yaffs_trace(YAFFS_TRACE_CHECKPOINT, - "find next checkpt block: search: block %d oid %d seq %d eccr %d", - i, tags.obj_id, tags.seq_number, - tags.ecc_result); - - if (tags.seq_number == YAFFS_SEQUENCE_CHECKPOINT_DATA) { - /* Right kind of block */ - dev->checkpt_next_block = tags.obj_id; - dev->checkpt_cur_block = i; - dev->checkpt_block_list[dev-> - blocks_in_checkpt] = i; - dev->blocks_in_checkpt++; - yaffs_trace(YAFFS_TRACE_CHECKPOINT, - "found checkpt block %d", i); - return; - } - } - - yaffs_trace(YAFFS_TRACE_CHECKPOINT, "found no more checkpt blocks"); - - dev->checkpt_next_block = -1; - dev->checkpt_cur_block = -1; -} - -int yaffs2_checkpt_open(struct yaffs_dev *dev, int writing) -{ - int i; - - dev->checkpt_open_write = writing; - - /* Got the functions we need? */ - if (!dev->param.write_chunk_tags_fn || - !dev->param.read_chunk_tags_fn || - !dev->param.erase_fn || !dev->param.bad_block_fn) - return 0; - - if (writing && !yaffs2_checkpt_space_ok(dev)) - return 0; - - if (!dev->checkpt_buffer) - dev->checkpt_buffer = - kmalloc(dev->param.total_bytes_per_chunk, GFP_NOFS); - if (!dev->checkpt_buffer) - return 0; - - dev->checkpt_page_seq = 0; - dev->checkpt_byte_count = 0; - dev->checkpt_sum = 0; - dev->checkpt_xor = 0; - dev->checkpt_cur_block = -1; - dev->checkpt_cur_chunk = -1; - dev->checkpt_next_block = dev->internal_start_block; - - /* Erase all the blocks in the checkpoint area */ - if (writing) { - memset(dev->checkpt_buffer, 0, dev->data_bytes_per_chunk); - dev->checkpt_byte_offs = 0; - return yaffs_checkpt_erase(dev); - } - - /* Set to a value that will kick off a read */ - dev->checkpt_byte_offs = dev->data_bytes_per_chunk; - /* A checkpoint block list of 1 checkpoint block per 16 block is - * (hopefully) going to be way more than we need */ - dev->blocks_in_checkpt = 0; - dev->checkpt_max_blocks = - (dev->internal_end_block - dev->internal_start_block) / 16 + 2; - dev->checkpt_block_list = - kmalloc(sizeof(int) * dev->checkpt_max_blocks, GFP_NOFS); - - if (!dev->checkpt_block_list) - return 0; - - for (i = 0; i < dev->checkpt_max_blocks; i++) - dev->checkpt_block_list[i] = -1; - - return 1; -} - -int yaffs2_get_checkpt_sum(struct yaffs_dev *dev, u32 * sum) -{ - u32 composite_sum; - - composite_sum = (dev->checkpt_sum << 8) | (dev->checkpt_xor & 0xff); - *sum = composite_sum; - return 1; -} - -static int yaffs2_checkpt_flush_buffer(struct yaffs_dev *dev) -{ - int chunk; - int realigned_chunk; - struct yaffs_ext_tags tags; - - if (dev->checkpt_cur_block < 0) { - yaffs2_checkpt_find_erased_block(dev); - dev->checkpt_cur_chunk = 0; - } - - if (dev->checkpt_cur_block < 0) - return 0; - - tags.is_deleted = 0; - tags.obj_id = dev->checkpt_next_block; /* Hint to next place to look */ - tags.chunk_id = dev->checkpt_page_seq + 1; - tags.seq_number = YAFFS_SEQUENCE_CHECKPOINT_DATA; - tags.n_bytes = dev->data_bytes_per_chunk; - if (dev->checkpt_cur_chunk == 0) { - /* First chunk we write for the block? Set block state to - checkpoint */ - struct yaffs_block_info *bi = - yaffs_get_block_info(dev, dev->checkpt_cur_block); - bi->block_state = YAFFS_BLOCK_STATE_CHECKPOINT; - dev->blocks_in_checkpt++; - } - - chunk = - dev->checkpt_cur_block * dev->param.chunks_per_block + - dev->checkpt_cur_chunk; - - yaffs_trace(YAFFS_TRACE_CHECKPOINT, - "checkpoint wite buffer nand %d(%d:%d) objid %d chId %d", - chunk, dev->checkpt_cur_block, dev->checkpt_cur_chunk, - tags.obj_id, tags.chunk_id); - - realigned_chunk = chunk - dev->chunk_offset; - - dev->n_page_writes++; - - dev->param.write_chunk_tags_fn(dev, realigned_chunk, - dev->checkpt_buffer, &tags); - dev->checkpt_byte_offs = 0; - dev->checkpt_page_seq++; - dev->checkpt_cur_chunk++; - if (dev->checkpt_cur_chunk >= dev->param.chunks_per_block) { - dev->checkpt_cur_chunk = 0; - dev->checkpt_cur_block = -1; - } - memset(dev->checkpt_buffer, 0, dev->data_bytes_per_chunk); - - return 1; -} - -int yaffs2_checkpt_wr(struct yaffs_dev *dev, const void *data, int n_bytes) -{ - int i = 0; - int ok = 1; - u8 *data_bytes = (u8 *) data; - - if (!dev->checkpt_buffer) - return 0; - - if (!dev->checkpt_open_write) - return -1; - - while (i < n_bytes && ok) { - dev->checkpt_buffer[dev->checkpt_byte_offs] = *data_bytes; - dev->checkpt_sum += *data_bytes; - dev->checkpt_xor ^= *data_bytes; - - dev->checkpt_byte_offs++; - i++; - data_bytes++; - dev->checkpt_byte_count++; - - if (dev->checkpt_byte_offs < 0 || - dev->checkpt_byte_offs >= dev->data_bytes_per_chunk) - ok = yaffs2_checkpt_flush_buffer(dev); - } - - return i; -} - -int yaffs2_checkpt_rd(struct yaffs_dev *dev, void *data, int n_bytes) -{ - int i = 0; - int ok = 1; - struct yaffs_ext_tags tags; - int chunk; - int realigned_chunk; - u8 *data_bytes = (u8 *) data; - - if (!dev->checkpt_buffer) - return 0; - - if (dev->checkpt_open_write) - return -1; - - while (i < n_bytes && ok) { - - if (dev->checkpt_byte_offs < 0 || - dev->checkpt_byte_offs >= dev->data_bytes_per_chunk) { - - if (dev->checkpt_cur_block < 0) { - yaffs2_checkpt_find_block(dev); - dev->checkpt_cur_chunk = 0; - } - - if (dev->checkpt_cur_block < 0) { - ok = 0; - break; - } - - chunk = dev->checkpt_cur_block * - dev->param.chunks_per_block + - dev->checkpt_cur_chunk; - - realigned_chunk = chunk - dev->chunk_offset; - dev->n_page_reads++; - - /* read in the next chunk */ - dev->param.read_chunk_tags_fn(dev, - realigned_chunk, - dev->checkpt_buffer, - &tags); - - if (tags.chunk_id != (dev->checkpt_page_seq + 1) || - tags.ecc_result > YAFFS_ECC_RESULT_FIXED || - tags.seq_number != YAFFS_SEQUENCE_CHECKPOINT_DATA) { - ok = 0; - break; - } - - dev->checkpt_byte_offs = 0; - dev->checkpt_page_seq++; - dev->checkpt_cur_chunk++; - - if (dev->checkpt_cur_chunk >= - dev->param.chunks_per_block) - dev->checkpt_cur_block = -1; - } - - *data_bytes = dev->checkpt_buffer[dev->checkpt_byte_offs]; - dev->checkpt_sum += *data_bytes; - dev->checkpt_xor ^= *data_bytes; - dev->checkpt_byte_offs++; - i++; - data_bytes++; - dev->checkpt_byte_count++; - } - - return i; -} - -int yaffs_checkpt_close(struct yaffs_dev *dev) -{ - int i; - - if (dev->checkpt_open_write) { - if (dev->checkpt_byte_offs != 0) - yaffs2_checkpt_flush_buffer(dev); - } else if (dev->checkpt_block_list) { - for (i = 0; - i < dev->blocks_in_checkpt && - dev->checkpt_block_list[i] >= 0; i++) { - int blk = dev->checkpt_block_list[i]; - struct yaffs_block_info *bi = NULL; - - if (dev->internal_start_block <= blk && - blk <= dev->internal_end_block) - bi = yaffs_get_block_info(dev, blk); - if (bi && bi->block_state == YAFFS_BLOCK_STATE_EMPTY) - bi->block_state = YAFFS_BLOCK_STATE_CHECKPOINT; - } - kfree(dev->checkpt_block_list); - dev->checkpt_block_list = NULL; - } - - dev->n_free_chunks -= - dev->blocks_in_checkpt * dev->param.chunks_per_block; - dev->n_erased_blocks -= dev->blocks_in_checkpt; - - yaffs_trace(YAFFS_TRACE_CHECKPOINT, "checkpoint byte count %d", - dev->checkpt_byte_count); - - if (dev->checkpt_buffer) { - /* free the buffer */ - kfree(dev->checkpt_buffer); - dev->checkpt_buffer = NULL; - return 1; - } else { - return 0; - } -} - -int yaffs2_checkpt_invalidate_stream(struct yaffs_dev *dev) -{ - /* Erase the checkpoint data */ - - yaffs_trace(YAFFS_TRACE_CHECKPOINT, - "checkpoint invalidate of %d blocks", - dev->blocks_in_checkpt); - - return yaffs_checkpt_erase(dev); -} diff --git a/fs/yaffs2/yaffs_checkptrw.h b/fs/yaffs2/yaffs_checkptrw.h deleted file mode 100644 index cdbaba7153e..00000000000 --- a/fs/yaffs2/yaffs_checkptrw.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -#ifndef __YAFFS_CHECKPTRW_H__ -#define __YAFFS_CHECKPTRW_H__ - -#include "yaffs_guts.h" - -int yaffs2_checkpt_open(struct yaffs_dev *dev, int writing); - -int yaffs2_checkpt_wr(struct yaffs_dev *dev, const void *data, int n_bytes); - -int yaffs2_checkpt_rd(struct yaffs_dev *dev, void *data, int n_bytes); - -int yaffs2_get_checkpt_sum(struct yaffs_dev *dev, u32 * sum); - -int yaffs_checkpt_close(struct yaffs_dev *dev); - -int yaffs2_checkpt_invalidate_stream(struct yaffs_dev *dev); - -#endif diff --git a/fs/yaffs2/yaffs_ecc.c b/fs/yaffs2/yaffs_ecc.c deleted file mode 100644 index 0860a3c7843..00000000000 --- a/fs/yaffs2/yaffs_ecc.c +++ /dev/null @@ -1,280 +0,0 @@ -/* - * YAFFS: Yet Another Flash File System. A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/* - * This code implements the ECC algorithm used in SmartMedia. - * - * The ECC comprises 22 bits of parity information and is stuffed into 3 bytes. - * The two unused bit are set to 1. - * The ECC can correct single bit errors in a 256-byte page of data. Thus, two - * such ECC blocks are used on a 512-byte NAND page. - * - */ - -#include "yportenv.h" - -#include "yaffs_ecc.h" - -/* Table generated by gen-ecc.c - * Using a table means we do not have to calculate p1..p4 and p1'..p4' - * for each byte of data. These are instead provided in a table in bits7..2. - * Bit 0 of each entry indicates whether the entry has an odd or even parity, - * and therefore this bytes influence on the line parity. - */ - -static const unsigned char column_parity_table[] = { - 0x00, 0x55, 0x59, 0x0c, 0x65, 0x30, 0x3c, 0x69, - 0x69, 0x3c, 0x30, 0x65, 0x0c, 0x59, 0x55, 0x00, - 0x95, 0xc0, 0xcc, 0x99, 0xf0, 0xa5, 0xa9, 0xfc, - 0xfc, 0xa9, 0xa5, 0xf0, 0x99, 0xcc, 0xc0, 0x95, - 0x99, 0xcc, 0xc0, 0x95, 0xfc, 0xa9, 0xa5, 0xf0, - 0xf0, 0xa5, 0xa9, 0xfc, 0x95, 0xc0, 0xcc, 0x99, - 0x0c, 0x59, 0x55, 0x00, 0x69, 0x3c, 0x30, 0x65, - 0x65, 0x30, 0x3c, 0x69, 0x00, 0x55, 0x59, 0x0c, - 0xa5, 0xf0, 0xfc, 0xa9, 0xc0, 0x95, 0x99, 0xcc, - 0xcc, 0x99, 0x95, 0xc0, 0xa9, 0xfc, 0xf0, 0xa5, - 0x30, 0x65, 0x69, 0x3c, 0x55, 0x00, 0x0c, 0x59, - 0x59, 0x0c, 0x00, 0x55, 0x3c, 0x69, 0x65, 0x30, - 0x3c, 0x69, 0x65, 0x30, 0x59, 0x0c, 0x00, 0x55, - 0x55, 0x00, 0x0c, 0x59, 0x30, 0x65, 0x69, 0x3c, - 0xa9, 0xfc, 0xf0, 0xa5, 0xcc, 0x99, 0x95, 0xc0, - 0xc0, 0x95, 0x99, 0xcc, 0xa5, 0xf0, 0xfc, 0xa9, - 0xa9, 0xfc, 0xf0, 0xa5, 0xcc, 0x99, 0x95, 0xc0, - 0xc0, 0x95, 0x99, 0xcc, 0xa5, 0xf0, 0xfc, 0xa9, - 0x3c, 0x69, 0x65, 0x30, 0x59, 0x0c, 0x00, 0x55, - 0x55, 0x00, 0x0c, 0x59, 0x30, 0x65, 0x69, 0x3c, - 0x30, 0x65, 0x69, 0x3c, 0x55, 0x00, 0x0c, 0x59, - 0x59, 0x0c, 0x00, 0x55, 0x3c, 0x69, 0x65, 0x30, - 0xa5, 0xf0, 0xfc, 0xa9, 0xc0, 0x95, 0x99, 0xcc, - 0xcc, 0x99, 0x95, 0xc0, 0xa9, 0xfc, 0xf0, 0xa5, - 0x0c, 0x59, 0x55, 0x00, 0x69, 0x3c, 0x30, 0x65, - 0x65, 0x30, 0x3c, 0x69, 0x00, 0x55, 0x59, 0x0c, - 0x99, 0xcc, 0xc0, 0x95, 0xfc, 0xa9, 0xa5, 0xf0, - 0xf0, 0xa5, 0xa9, 0xfc, 0x95, 0xc0, 0xcc, 0x99, - 0x95, 0xc0, 0xcc, 0x99, 0xf0, 0xa5, 0xa9, 0xfc, - 0xfc, 0xa9, 0xa5, 0xf0, 0x99, 0xcc, 0xc0, 0x95, - 0x00, 0x55, 0x59, 0x0c, 0x65, 0x30, 0x3c, 0x69, - 0x69, 0x3c, 0x30, 0x65, 0x0c, 0x59, 0x55, 0x00, -}; - -/* Calculate the ECC for a 256-byte block of data */ -void yaffs_ecc_calc(const unsigned char *data, unsigned char *ecc) -{ - unsigned int i; - unsigned char col_parity = 0; - unsigned char line_parity = 0; - unsigned char line_parity_prime = 0; - unsigned char t; - unsigned char b; - - for (i = 0; i < 256; i++) { - b = column_parity_table[*data++]; - col_parity ^= b; - - if (b & 0x01) { /* odd number of bits in the byte */ - line_parity ^= i; - line_parity_prime ^= ~i; - } - } - - ecc[2] = (~col_parity) | 0x03; - - t = 0; - if (line_parity & 0x80) - t |= 0x80; - if (line_parity_prime & 0x80) - t |= 0x40; - if (line_parity & 0x40) - t |= 0x20; - if (line_parity_prime & 0x40) - t |= 0x10; - if (line_parity & 0x20) - t |= 0x08; - if (line_parity_prime & 0x20) - t |= 0x04; - if (line_parity & 0x10) - t |= 0x02; - if (line_parity_prime & 0x10) - t |= 0x01; - ecc[1] = ~t; - - t = 0; - if (line_parity & 0x08) - t |= 0x80; - if (line_parity_prime & 0x08) - t |= 0x40; - if (line_parity & 0x04) - t |= 0x20; - if (line_parity_prime & 0x04) - t |= 0x10; - if (line_parity & 0x02) - t |= 0x08; - if (line_parity_prime & 0x02) - t |= 0x04; - if (line_parity & 0x01) - t |= 0x02; - if (line_parity_prime & 0x01) - t |= 0x01; - ecc[0] = ~t; - -} - -/* Correct the ECC on a 256 byte block of data */ - -int yaffs_ecc_correct(unsigned char *data, unsigned char *read_ecc, - const unsigned char *test_ecc) -{ - unsigned char d0, d1, d2; /* deltas */ - - d0 = read_ecc[0] ^ test_ecc[0]; - d1 = read_ecc[1] ^ test_ecc[1]; - d2 = read_ecc[2] ^ test_ecc[2]; - - if ((d0 | d1 | d2) == 0) - return 0; /* no error */ - - if (((d0 ^ (d0 >> 1)) & 0x55) == 0x55 && - ((d1 ^ (d1 >> 1)) & 0x55) == 0x55 && - ((d2 ^ (d2 >> 1)) & 0x54) == 0x54) { - /* Single bit (recoverable) error in data */ - - unsigned byte; - unsigned bit; - - bit = byte = 0; - - if (d1 & 0x80) - byte |= 0x80; - if (d1 & 0x20) - byte |= 0x40; - if (d1 & 0x08) - byte |= 0x20; - if (d1 & 0x02) - byte |= 0x10; - if (d0 & 0x80) - byte |= 0x08; - if (d0 & 0x20) - byte |= 0x04; - if (d0 & 0x08) - byte |= 0x02; - if (d0 & 0x02) - byte |= 0x01; - - if (d2 & 0x80) - bit |= 0x04; - if (d2 & 0x20) - bit |= 0x02; - if (d2 & 0x08) - bit |= 0x01; - - data[byte] ^= (1 << bit); - - return 1; /* Corrected the error */ - } - - if ((hweight8(d0) + hweight8(d1) + hweight8(d2)) == 1) { - /* Reccoverable error in ecc */ - - read_ecc[0] = test_ecc[0]; - read_ecc[1] = test_ecc[1]; - read_ecc[2] = test_ecc[2]; - - return 1; /* Corrected the error */ - } - - /* Unrecoverable error */ - - return -1; - -} - -/* - * ECCxxxOther does ECC calcs on arbitrary n bytes of data - */ -void yaffs_ecc_calc_other(const unsigned char *data, unsigned n_bytes, - struct yaffs_ecc_other *ecc_other) -{ - unsigned int i; - unsigned char col_parity = 0; - unsigned line_parity = 0; - unsigned line_parity_prime = 0; - unsigned char b; - - for (i = 0; i < n_bytes; i++) { - b = column_parity_table[*data++]; - col_parity ^= b; - - if (b & 0x01) { - /* odd number of bits in the byte */ - line_parity ^= i; - line_parity_prime ^= ~i; - } - - } - - ecc_other->col_parity = (col_parity >> 2) & 0x3f; - ecc_other->line_parity = line_parity; - ecc_other->line_parity_prime = line_parity_prime; -} - -int yaffs_ecc_correct_other(unsigned char *data, unsigned n_bytes, - struct yaffs_ecc_other *read_ecc, - const struct yaffs_ecc_other *test_ecc) -{ - unsigned char delta_col; /* column parity delta */ - unsigned delta_line; /* line parity delta */ - unsigned delta_line_prime; /* line parity delta */ - unsigned bit; - - delta_col = read_ecc->col_parity ^ test_ecc->col_parity; - delta_line = read_ecc->line_parity ^ test_ecc->line_parity; - delta_line_prime = - read_ecc->line_parity_prime ^ test_ecc->line_parity_prime; - - if ((delta_col | delta_line | delta_line_prime) == 0) - return 0; /* no error */ - - if (delta_line == ~delta_line_prime && - (((delta_col ^ (delta_col >> 1)) & 0x15) == 0x15)) { - /* Single bit (recoverable) error in data */ - - bit = 0; - - if (delta_col & 0x20) - bit |= 0x04; - if (delta_col & 0x08) - bit |= 0x02; - if (delta_col & 0x02) - bit |= 0x01; - - if (delta_line >= n_bytes) - return -1; - - data[delta_line] ^= (1 << bit); - - return 1; /* corrected */ - } - - if ((hweight32(delta_line) + - hweight32(delta_line_prime) + - hweight8(delta_col)) == 1) { - /* Reccoverable error in ecc */ - - *read_ecc = *test_ecc; - return 1; /* corrected */ - } - - /* Unrecoverable error */ - - return -1; -} diff --git a/fs/yaffs2/yaffs_ecc.h b/fs/yaffs2/yaffs_ecc.h deleted file mode 100644 index 17d47bd80f3..00000000000 --- a/fs/yaffs2/yaffs_ecc.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -/* - * This code implements the ECC algorithm used in SmartMedia. - * - * The ECC comprises 22 bits of parity information and is stuffed into 3 bytes. - * The two unused bit are set to 1. - * The ECC can correct single bit errors in a 256-byte page of data. - * Thus, two such ECC blocks are used on a 512-byte NAND page. - * - */ - -#ifndef __YAFFS_ECC_H__ -#define __YAFFS_ECC_H__ - -struct yaffs_ecc_other { - unsigned char col_parity; - unsigned line_parity; - unsigned line_parity_prime; -}; - -void yaffs_ecc_calc(const unsigned char *data, unsigned char *ecc); -int yaffs_ecc_correct(unsigned char *data, unsigned char *read_ecc, - const unsigned char *test_ecc); - -void yaffs_ecc_calc_other(const unsigned char *data, unsigned n_bytes, - struct yaffs_ecc_other *ecc); -int yaffs_ecc_correct_other(unsigned char *data, unsigned n_bytes, - struct yaffs_ecc_other *read_ecc, - const struct yaffs_ecc_other *test_ecc); -#endif diff --git a/fs/yaffs2/yaffs_error.c b/fs/yaffs2/yaffs_error.c deleted file mode 100644 index 11b75f7a0b2..00000000000 --- a/fs/yaffs2/yaffs_error.c +++ /dev/null @@ -1,58 +0,0 @@ -/* - * YAFFS: Yet another FFS. A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Timothy Manning <timothy@yaffs.net> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include "yaffsfs.h" - -struct error_entry { - int code; - const char *text; -}; - -static const struct error_entry error_list[] = { - { ENOMEM , "ENOMEM" }, - { EBUSY , "EBUSY"}, - { ENODEV , "ENODEV"}, - { EINVAL , "EINVAL"}, - { EBADF , "EBADF"}, - { EACCES , "EACCES"}, - { EXDEV , "EXDEV" }, - { ENOENT , "ENOENT"}, - { ENOSPC , "ENOSPC"}, - { ERANGE , "ERANGE"}, - { ENODATA, "ENODATA"}, - { ENOTEMPTY, "ENOTEMPTY"}, - { ENAMETOOLONG, "ENAMETOOLONG"}, - { ENOMEM , "ENOMEM"}, - { EEXIST , "EEXIST"}, - { ENOTDIR , "ENOTDIR"}, - { EISDIR , "EISDIR"}, - { ENFILE, "ENFILE"}, - { EROFS, "EROFS"}, - { EFAULT, "EFAULT"}, - { 0, NULL } -}; - -const char *yaffs_error_to_str(int err) -{ - const struct error_entry *e = error_list; - - if (err < 0) - err = -err; - - while (e->code && e->text) { - if (err == e->code) - return e->text; - e++; - } - return "Unknown error code"; -} diff --git a/fs/yaffs2/yaffs_flashif.h b/fs/yaffs2/yaffs_flashif.h deleted file mode 100644 index 886901a0ff5..00000000000 --- a/fs/yaffs2/yaffs_flashif.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -#ifndef __YAFFS_FLASH_H__ -#define __YAFFS_FLASH_H__ - -#include "yaffs_guts.h" -int yflash_EraseBlockInNAND(struct yaffs_dev *dev, int blockNumber); -int yflash_WriteChunkToNAND(struct yaffs_dev *dev, int nand_chunk, - const u8 *data, const struct yaffs_spare *spare); -int yflash_WriteChunkWithTagsToNAND(struct yaffs_dev *dev, int nand_chunk, - const u8 *data, const struct yaffs_ext_tags *tags); -int yflash_ReadChunkFromNAND(struct yaffs_dev *dev, int nand_chunk, - u8 *data, struct yaffs_spare *spare); -int yflash_ReadChunkWithTagsFromNAND(struct yaffs_dev *dev, int nand_chunk, - u8 *data, struct yaffs_ext_tags *tags); -int yflash_InitialiseNAND(struct yaffs_dev *dev); -int yflash_MarkNANDBlockBad(struct yaffs_dev *dev, int block_no); -int yflash_QueryNANDBlock(struct yaffs_dev *dev, int block_no, - enum yaffs_block_state *state, u32 *seq_number); - -#endif diff --git a/fs/yaffs2/yaffs_flashif2.h b/fs/yaffs2/yaffs_flashif2.h deleted file mode 100644 index c69862668b1..00000000000 --- a/fs/yaffs2/yaffs_flashif2.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -#ifndef __YAFFS_FLASH2_H__ -#define __YAFFS_FLASH2_H__ - -#include "yaffs_guts.h" -int yflash2_EraseBlockInNAND(struct yaffs_dev *dev, int blockNumber); -int yflash2_WriteChunkToNAND(struct yaffs_dev *dev, int nand_chunk, - const u8 *data, const struct yaffs_spare *spare); -int yflash2_WriteChunkWithTagsToNAND(struct yaffs_dev *dev, int nand_chunk, - const u8 *data, const struct yaffs_ext_tags *tags); -int yflash2_ReadChunkFromNAND(struct yaffs_dev *dev, int nand_chunk, - u8 *data, struct yaffs_spare *spare); -int yflash2_ReadChunkWithTagsFromNAND(struct yaffs_dev *dev, int nand_chunk, - u8 *data, struct yaffs_ext_tags *tags); -int yflash2_InitialiseNAND(struct yaffs_dev *dev); -int yflash2_MarkNANDBlockBad(struct yaffs_dev *dev, int block_no); -int yflash2_QueryNANDBlock(struct yaffs_dev *dev, int block_no, - enum yaffs_block_state *state, u32 *seq_number); - -#endif diff --git a/fs/yaffs2/yaffs_getblockinfo.h b/fs/yaffs2/yaffs_getblockinfo.h deleted file mode 100644 index 8fd0802bddd..00000000000 --- a/fs/yaffs2/yaffs_getblockinfo.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -#ifndef __YAFFS_GETBLOCKINFO_H__ -#define __YAFFS_GETBLOCKINFO_H__ - -#include "yaffs_guts.h" -#include "yaffs_trace.h" - -/* Function to manipulate block info */ -static inline struct yaffs_block_info *yaffs_get_block_info(struct yaffs_dev - *dev, int blk) -{ - if (blk < dev->internal_start_block || blk > dev->internal_end_block) { - yaffs_trace(YAFFS_TRACE_ERROR, - "**>> yaffs: get_block_info block %d is not valid", - blk); - BUG(); - } - return &dev->block_info[blk - dev->internal_start_block]; -} - -#endif diff --git a/fs/yaffs2/yaffs_guts.c b/fs/yaffs2/yaffs_guts.c deleted file mode 100644 index c20f2f8298f..00000000000 --- a/fs/yaffs2/yaffs_guts.c +++ /dev/null @@ -1,4995 +0,0 @@ -/* - * YAFFS: Yet Another Flash File System. A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include "yportenv.h" -#include "yaffs_trace.h" -#include <dm/devres.h> - -#include "yaffs_guts.h" -#include "yaffs_getblockinfo.h" -#include "yaffs_tagscompat.h" -#include "yaffs_nand.h" -#include "yaffs_yaffs1.h" -#include "yaffs_yaffs2.h" -#include "yaffs_bitmap.h" -#include "yaffs_verify.h" -#include "yaffs_nand.h" -#include "yaffs_packedtags2.h" -#include "yaffs_nameval.h" -#include "yaffs_allocator.h" -#include "yaffs_attribs.h" -#include "yaffs_summary.h" - -/* Note YAFFS_GC_GOOD_ENOUGH must be <= YAFFS_GC_PASSIVE_THRESHOLD */ -#define YAFFS_GC_GOOD_ENOUGH 2 -#define YAFFS_GC_PASSIVE_THRESHOLD 4 - -#include "yaffs_ecc.h" - -/* Forward declarations */ - -static int yaffs_wr_data_obj(struct yaffs_obj *in, int inode_chunk, - const u8 *buffer, int n_bytes, int use_reserve); - -/* Function to calculate chunk and offset */ - -void yaffs_addr_to_chunk(struct yaffs_dev *dev, loff_t addr, - int *chunk_out, u32 *offset_out) -{ - int chunk; - u32 offset; - - chunk = (u32) (addr >> dev->chunk_shift); - - if (dev->chunk_div == 1) { - /* easy power of 2 case */ - offset = (u32) (addr & dev->chunk_mask); - } else { - /* Non power-of-2 case */ - - loff_t chunk_base; - - chunk /= dev->chunk_div; - - chunk_base = ((loff_t) chunk) * dev->data_bytes_per_chunk; - offset = (u32) (addr - chunk_base); - } - - *chunk_out = chunk; - *offset_out = offset; -} - -/* Function to return the number of shifts for a power of 2 greater than or - * equal to the given number - * Note we don't try to cater for all possible numbers and this does not have to - * be hellishly efficient. - */ - -static inline u32 calc_shifts_ceiling(u32 x) -{ - int extra_bits; - int shifts; - - shifts = extra_bits = 0; - - while (x > 1) { - if (x & 1) - extra_bits++; - x >>= 1; - shifts++; - } - - if (extra_bits) - shifts++; - - return shifts; -} - -/* Function to return the number of shifts to get a 1 in bit 0 - */ - -static inline u32 calc_shifts(u32 x) -{ - u32 shifts; - - shifts = 0; - - if (!x) - return 0; - - while (!(x & 1)) { - x >>= 1; - shifts++; - } - - return shifts; -} - -/* - * Temporary buffer manipulations. - */ - -static int yaffs_init_tmp_buffers(struct yaffs_dev *dev) -{ - int i; - u8 *buf = (u8 *) 1; - - memset(dev->temp_buffer, 0, sizeof(dev->temp_buffer)); - - for (i = 0; buf && i < YAFFS_N_TEMP_BUFFERS; i++) { - dev->temp_buffer[i].in_use = 0; - buf = kmalloc(dev->param.total_bytes_per_chunk, GFP_NOFS); - dev->temp_buffer[i].buffer = buf; - } - - return buf ? YAFFS_OK : YAFFS_FAIL; -} - -u8 *yaffs_get_temp_buffer(struct yaffs_dev * dev) -{ - int i; - - dev->temp_in_use++; - if (dev->temp_in_use > dev->max_temp) - dev->max_temp = dev->temp_in_use; - - for (i = 0; i < YAFFS_N_TEMP_BUFFERS; i++) { - if (dev->temp_buffer[i].in_use == 0) { - dev->temp_buffer[i].in_use = 1; - return dev->temp_buffer[i].buffer; - } - } - - yaffs_trace(YAFFS_TRACE_BUFFERS, "Out of temp buffers"); - /* - * If we got here then we have to allocate an unmanaged one - * This is not good. - */ - - dev->unmanaged_buffer_allocs++; - return kmalloc(dev->data_bytes_per_chunk, GFP_NOFS); - -} - -void yaffs_release_temp_buffer(struct yaffs_dev *dev, u8 *buffer) -{ - int i; - - dev->temp_in_use--; - - for (i = 0; i < YAFFS_N_TEMP_BUFFERS; i++) { - if (dev->temp_buffer[i].buffer == buffer) { - dev->temp_buffer[i].in_use = 0; - return; - } - } - - if (buffer) { - /* assume it is an unmanaged one. */ - yaffs_trace(YAFFS_TRACE_BUFFERS, - "Releasing unmanaged temp buffer"); - kfree(buffer); - dev->unmanaged_buffer_deallocs++; - } - -} - -/* - * Determine if we have a managed buffer. - */ -int yaffs_is_managed_tmp_buffer(struct yaffs_dev *dev, const u8 *buffer) -{ - int i; - - for (i = 0; i < YAFFS_N_TEMP_BUFFERS; i++) { - if (dev->temp_buffer[i].buffer == buffer) - return 1; - } - - for (i = 0; i < dev->param.n_caches; i++) { - if (dev->cache[i].data == buffer) - return 1; - } - - if (buffer == dev->checkpt_buffer) - return 1; - - yaffs_trace(YAFFS_TRACE_ALWAYS, - "yaffs: unmaged buffer detected."); - return 0; -} - -/* - * Functions for robustisizing TODO - * - */ - -static void yaffs_handle_chunk_wr_ok(struct yaffs_dev *dev, int nand_chunk, - const u8 *data, - const struct yaffs_ext_tags *tags) -{ -} - -static void yaffs_handle_chunk_update(struct yaffs_dev *dev, int nand_chunk, - const struct yaffs_ext_tags *tags) -{ -} - -void yaffs_handle_chunk_error(struct yaffs_dev *dev, - struct yaffs_block_info *bi) -{ - if (!bi->gc_prioritise) { - bi->gc_prioritise = 1; - dev->has_pending_prioritised_gc = 1; - bi->chunk_error_strikes++; - - if (bi->chunk_error_strikes > 3) { - bi->needs_retiring = 1; /* Too many stikes, so retire */ - yaffs_trace(YAFFS_TRACE_ALWAYS, - "yaffs: Block struck out"); - - } - } -} - -static void yaffs_handle_chunk_wr_error(struct yaffs_dev *dev, int nand_chunk, - int erased_ok) -{ - int flash_block = nand_chunk / dev->param.chunks_per_block; - struct yaffs_block_info *bi = yaffs_get_block_info(dev, flash_block); - - yaffs_handle_chunk_error(dev, bi); - - if (erased_ok) { - /* Was an actual write failure, - * so mark the block for retirement.*/ - bi->needs_retiring = 1; - yaffs_trace(YAFFS_TRACE_ERROR | YAFFS_TRACE_BAD_BLOCKS, - "**>> Block %d needs retiring", flash_block); - } - - /* Delete the chunk */ - yaffs_chunk_del(dev, nand_chunk, 1, __LINE__); - yaffs_skip_rest_of_block(dev); -} - -/* - * Verification code - */ - -/* - * Simple hash function. Needs to have a reasonable spread - */ - -static inline int yaffs_hash_fn(int n) -{ - if (n < 0) - n = -n; - return n % YAFFS_NOBJECT_BUCKETS; -} - -/* - * Access functions to useful fake objects. - * Note that root might have a presence in NAND if permissions are set. - */ - -struct yaffs_obj *yaffs_root(struct yaffs_dev *dev) -{ - return dev->root_dir; -} - -struct yaffs_obj *yaffs_lost_n_found(struct yaffs_dev *dev) -{ - return dev->lost_n_found; -} - -/* - * Erased NAND checking functions - */ - -int yaffs_check_ff(u8 *buffer, int n_bytes) -{ - /* Horrible, slow implementation */ - while (n_bytes--) { - if (*buffer != 0xff) - return 0; - buffer++; - } - return 1; -} - -static int yaffs_check_chunk_erased(struct yaffs_dev *dev, int nand_chunk) -{ - int retval = YAFFS_OK; - u8 *data = yaffs_get_temp_buffer(dev); - struct yaffs_ext_tags tags; - - yaffs_rd_chunk_tags_nand(dev, nand_chunk, data, &tags); - - if (tags.ecc_result > YAFFS_ECC_RESULT_NO_ERROR) - retval = YAFFS_FAIL; - - if (!yaffs_check_ff(data, dev->data_bytes_per_chunk) || - tags.chunk_used) { - yaffs_trace(YAFFS_TRACE_NANDACCESS, - "Chunk %d not erased", nand_chunk); - retval = YAFFS_FAIL; - } - - yaffs_release_temp_buffer(dev, data); - - return retval; - -} - -static int yaffs_verify_chunk_written(struct yaffs_dev *dev, - int nand_chunk, - const u8 *data, - struct yaffs_ext_tags *tags) -{ - int retval = YAFFS_OK; - struct yaffs_ext_tags temp_tags; - u8 *buffer = yaffs_get_temp_buffer(dev); - - yaffs_rd_chunk_tags_nand(dev, nand_chunk, buffer, &temp_tags); - if (memcmp(buffer, data, dev->data_bytes_per_chunk) || - temp_tags.obj_id != tags->obj_id || - temp_tags.chunk_id != tags->chunk_id || - temp_tags.n_bytes != tags->n_bytes) - retval = YAFFS_FAIL; - - yaffs_release_temp_buffer(dev, buffer); - - return retval; -} - -int yaffs_check_alloc_available(struct yaffs_dev *dev, int n_chunks) -{ - int reserved_chunks; - int reserved_blocks = dev->param.n_reserved_blocks; - int checkpt_blocks; - - checkpt_blocks = yaffs_calc_checkpt_blocks_required(dev); - - reserved_chunks = - (reserved_blocks + checkpt_blocks) * dev->param.chunks_per_block; - - return (dev->n_free_chunks > (reserved_chunks + n_chunks)); -} - -static int yaffs_find_alloc_block(struct yaffs_dev *dev) -{ - int i; - struct yaffs_block_info *bi; - - if (dev->n_erased_blocks < 1) { - /* Hoosterman we've got a problem. - * Can't get space to gc - */ - yaffs_trace(YAFFS_TRACE_ERROR, - "yaffs tragedy: no more erased blocks"); - - return -1; - } - - /* Find an empty block. */ - - for (i = dev->internal_start_block; i <= dev->internal_end_block; i++) { - dev->alloc_block_finder++; - if (dev->alloc_block_finder < dev->internal_start_block - || dev->alloc_block_finder > dev->internal_end_block) { - dev->alloc_block_finder = dev->internal_start_block; - } - - bi = yaffs_get_block_info(dev, dev->alloc_block_finder); - - if (bi->block_state == YAFFS_BLOCK_STATE_EMPTY) { - bi->block_state = YAFFS_BLOCK_STATE_ALLOCATING; - dev->seq_number++; - bi->seq_number = dev->seq_number; - dev->n_erased_blocks--; - yaffs_trace(YAFFS_TRACE_ALLOCATE, - "Allocated block %d, seq %d, %d left" , - dev->alloc_block_finder, dev->seq_number, - dev->n_erased_blocks); - return dev->alloc_block_finder; - } - } - - yaffs_trace(YAFFS_TRACE_ALWAYS, - "yaffs tragedy: no more erased blocks, but there should have been %d", - dev->n_erased_blocks); - - return -1; -} - -static int yaffs_alloc_chunk(struct yaffs_dev *dev, int use_reserver, - struct yaffs_block_info **block_ptr) -{ - int ret_val; - struct yaffs_block_info *bi; - - if (dev->alloc_block < 0) { - /* Get next block to allocate off */ - dev->alloc_block = yaffs_find_alloc_block(dev); - dev->alloc_page = 0; - } - - if (!use_reserver && !yaffs_check_alloc_available(dev, 1)) { - /* No space unless we're allowed to use the reserve. */ - return -1; - } - - if (dev->n_erased_blocks < dev->param.n_reserved_blocks - && dev->alloc_page == 0) - yaffs_trace(YAFFS_TRACE_ALLOCATE, "Allocating reserve"); - - /* Next page please.... */ - if (dev->alloc_block >= 0) { - bi = yaffs_get_block_info(dev, dev->alloc_block); - - ret_val = (dev->alloc_block * dev->param.chunks_per_block) + - dev->alloc_page; - bi->pages_in_use++; - yaffs_set_chunk_bit(dev, dev->alloc_block, dev->alloc_page); - - dev->alloc_page++; - - dev->n_free_chunks--; - - /* If the block is full set the state to full */ - if (dev->alloc_page >= dev->param.chunks_per_block) { - bi->block_state = YAFFS_BLOCK_STATE_FULL; - dev->alloc_block = -1; - } - - if (block_ptr) - *block_ptr = bi; - - return ret_val; - } - - yaffs_trace(YAFFS_TRACE_ERROR, - "!!!!!!!!! Allocator out !!!!!!!!!!!!!!!!!"); - - return -1; -} - -static int yaffs_get_erased_chunks(struct yaffs_dev *dev) -{ - int n; - - n = dev->n_erased_blocks * dev->param.chunks_per_block; - - if (dev->alloc_block > 0) - n += (dev->param.chunks_per_block - dev->alloc_page); - - return n; - -} - -/* - * yaffs_skip_rest_of_block() skips over the rest of the allocation block - * if we don't want to write to it. - */ -void yaffs_skip_rest_of_block(struct yaffs_dev *dev) -{ - struct yaffs_block_info *bi; - - if (dev->alloc_block > 0) { - bi = yaffs_get_block_info(dev, dev->alloc_block); - if (bi->block_state == YAFFS_BLOCK_STATE_ALLOCATING) { - bi->block_state = YAFFS_BLOCK_STATE_FULL; - dev->alloc_block = -1; - } - } -} - -static int yaffs_write_new_chunk(struct yaffs_dev *dev, - const u8 *data, - struct yaffs_ext_tags *tags, int use_reserver) -{ - int attempts = 0; - int write_ok = 0; - int chunk; - - yaffs2_checkpt_invalidate(dev); - - do { - struct yaffs_block_info *bi = 0; - int erased_ok = 0; - - chunk = yaffs_alloc_chunk(dev, use_reserver, &bi); - if (chunk < 0) { - /* no space */ - break; - } - - /* First check this chunk is erased, if it needs - * checking. The checking policy (unless forced - * always on) is as follows: - * - * Check the first page we try to write in a block. - * If the check passes then we don't need to check any - * more. If the check fails, we check again... - * If the block has been erased, we don't need to check. - * - * However, if the block has been prioritised for gc, - * then we think there might be something odd about - * this block and stop using it. - * - * Rationale: We should only ever see chunks that have - * not been erased if there was a partially written - * chunk due to power loss. This checking policy should - * catch that case with very few checks and thus save a - * lot of checks that are most likely not needed. - * - * Mods to the above - * If an erase check fails or the write fails we skip the - * rest of the block. - */ - - /* let's give it a try */ - attempts++; - - if (dev->param.always_check_erased) - bi->skip_erased_check = 0; - - if (!bi->skip_erased_check) { - erased_ok = yaffs_check_chunk_erased(dev, chunk); - if (erased_ok != YAFFS_OK) { - yaffs_trace(YAFFS_TRACE_ERROR, - "**>> yaffs chunk %d was not erased", - chunk); - - /* If not erased, delete this one, - * skip rest of block and - * try another chunk */ - yaffs_chunk_del(dev, chunk, 1, __LINE__); - yaffs_skip_rest_of_block(dev); - continue; - } - } - - write_ok = yaffs_wr_chunk_tags_nand(dev, chunk, data, tags); - - if (!bi->skip_erased_check) - write_ok = - yaffs_verify_chunk_written(dev, chunk, data, tags); - - if (write_ok != YAFFS_OK) { - /* Clean up aborted write, skip to next block and - * try another chunk */ - yaffs_handle_chunk_wr_error(dev, chunk, erased_ok); - continue; - } - - bi->skip_erased_check = 1; - - /* Copy the data into the robustification buffer */ - yaffs_handle_chunk_wr_ok(dev, chunk, data, tags); - - } while (write_ok != YAFFS_OK && - (yaffs_wr_attempts <= 0 || attempts <= yaffs_wr_attempts)); - - if (!write_ok) - chunk = -1; - - if (attempts > 1) { - yaffs_trace(YAFFS_TRACE_ERROR, - "**>> yaffs write required %d attempts", - attempts); - dev->n_retried_writes += (attempts - 1); - } - - return chunk; -} - -/* - * Block retiring for handling a broken block. - */ - -static void yaffs_retire_block(struct yaffs_dev *dev, int flash_block) -{ - struct yaffs_block_info *bi = yaffs_get_block_info(dev, flash_block); - - yaffs2_checkpt_invalidate(dev); - - yaffs2_clear_oldest_dirty_seq(dev, bi); - - if (yaffs_mark_bad(dev, flash_block) != YAFFS_OK) { - if (yaffs_erase_block(dev, flash_block) != YAFFS_OK) { - yaffs_trace(YAFFS_TRACE_ALWAYS, - "yaffs: Failed to mark bad and erase block %d", - flash_block); - } else { - struct yaffs_ext_tags tags; - int chunk_id = - flash_block * dev->param.chunks_per_block; - - u8 *buffer = yaffs_get_temp_buffer(dev); - - memset(buffer, 0xff, dev->data_bytes_per_chunk); - memset(&tags, 0, sizeof(tags)); - tags.seq_number = YAFFS_SEQUENCE_BAD_BLOCK; - if (dev->param.write_chunk_tags_fn(dev, chunk_id - - dev->chunk_offset, - buffer, - &tags) != YAFFS_OK) - yaffs_trace(YAFFS_TRACE_ALWAYS, - "yaffs: Failed to write bad block marker to block %d", - flash_block); - - yaffs_release_temp_buffer(dev, buffer); - } - } - - bi->block_state = YAFFS_BLOCK_STATE_DEAD; - bi->gc_prioritise = 0; - bi->needs_retiring = 0; - - dev->n_retired_blocks++; -} - -/*---------------- Name handling functions ------------*/ - -static u16 yaffs_calc_name_sum(const YCHAR *name) -{ - u16 sum = 0; - u16 i = 1; - - if (!name) - return 0; - - while ((*name) && i < (YAFFS_MAX_NAME_LENGTH / 2)) { - - /* 0x1f mask is case insensitive */ - sum += ((*name) & 0x1f) * i; - i++; - name++; - } - return sum; -} - -void yaffs_set_obj_name(struct yaffs_obj *obj, const YCHAR * name) -{ - memset(obj->short_name, 0, sizeof(obj->short_name)); - if (name && - yaffs_strnlen(name, YAFFS_SHORT_NAME_LENGTH + 1) <= - YAFFS_SHORT_NAME_LENGTH) - yaffs_strcpy(obj->short_name, name); - else - obj->short_name[0] = _Y('\0'); - obj->sum = yaffs_calc_name_sum(name); -} - -void yaffs_set_obj_name_from_oh(struct yaffs_obj *obj, - const struct yaffs_obj_hdr *oh) -{ -#ifdef CONFIG_YAFFS_AUTO_UNICODE - YCHAR tmp_name[YAFFS_MAX_NAME_LENGTH + 1]; - memset(tmp_name, 0, sizeof(tmp_name)); - yaffs_load_name_from_oh(obj->my_dev, tmp_name, oh->name, - YAFFS_MAX_NAME_LENGTH + 1); - yaffs_set_obj_name(obj, tmp_name); -#else - yaffs_set_obj_name(obj, oh->name); -#endif -} - -loff_t yaffs_max_file_size(struct yaffs_dev *dev) -{ - return ((loff_t) YAFFS_MAX_CHUNK_ID) * dev->data_bytes_per_chunk; -} - -/*-------------------- TNODES ------------------- - - * List of spare tnodes - * The list is hooked together using the first pointer - * in the tnode. - */ - -struct yaffs_tnode *yaffs_get_tnode(struct yaffs_dev *dev) -{ - struct yaffs_tnode *tn = yaffs_alloc_raw_tnode(dev); - - if (tn) { - memset(tn, 0, dev->tnode_size); - dev->n_tnodes++; - } - - dev->checkpoint_blocks_required = 0; /* force recalculation */ - - return tn; -} - -/* FreeTnode frees up a tnode and puts it back on the free list */ -static void yaffs_free_tnode(struct yaffs_dev *dev, struct yaffs_tnode *tn) -{ - yaffs_free_raw_tnode(dev, tn); - dev->n_tnodes--; - dev->checkpoint_blocks_required = 0; /* force recalculation */ -} - -static void yaffs_deinit_tnodes_and_objs(struct yaffs_dev *dev) -{ - yaffs_deinit_raw_tnodes_and_objs(dev); - dev->n_obj = 0; - dev->n_tnodes = 0; -} - -void yaffs_load_tnode_0(struct yaffs_dev *dev, struct yaffs_tnode *tn, - unsigned pos, unsigned val) -{ - u32 *map = (u32 *) tn; - u32 bit_in_map; - u32 bit_in_word; - u32 word_in_map; - u32 mask; - - pos &= YAFFS_TNODES_LEVEL0_MASK; - val >>= dev->chunk_grp_bits; - - bit_in_map = pos * dev->tnode_width; - word_in_map = bit_in_map / 32; - bit_in_word = bit_in_map & (32 - 1); - - mask = dev->tnode_mask << bit_in_word; - - map[word_in_map] &= ~mask; - map[word_in_map] |= (mask & (val << bit_in_word)); - - if (dev->tnode_width > (32 - bit_in_word)) { - bit_in_word = (32 - bit_in_word); - word_in_map++; - mask = - dev->tnode_mask >> bit_in_word; - map[word_in_map] &= ~mask; - map[word_in_map] |= (mask & (val >> bit_in_word)); - } -} - -u32 yaffs_get_group_base(struct yaffs_dev *dev, struct yaffs_tnode *tn, - unsigned pos) -{ - u32 *map = (u32 *) tn; - u32 bit_in_map; - u32 bit_in_word; - u32 word_in_map; - u32 val; - - pos &= YAFFS_TNODES_LEVEL0_MASK; - - bit_in_map = pos * dev->tnode_width; - word_in_map = bit_in_map / 32; - bit_in_word = bit_in_map & (32 - 1); - - val = map[word_in_map] >> bit_in_word; - - if (dev->tnode_width > (32 - bit_in_word)) { - bit_in_word = (32 - bit_in_word); - word_in_map++; - val |= (map[word_in_map] << bit_in_word); - } - - val &= dev->tnode_mask; - val <<= dev->chunk_grp_bits; - - return val; -} - -/* ------------------- End of individual tnode manipulation -----------------*/ - -/* ---------Functions to manipulate the look-up tree (made up of tnodes) ------ - * The look up tree is represented by the top tnode and the number of top_level - * in the tree. 0 means only the level 0 tnode is in the tree. - */ - -/* FindLevel0Tnode finds the level 0 tnode, if one exists. */ -struct yaffs_tnode *yaffs_find_tnode_0(struct yaffs_dev *dev, - struct yaffs_file_var *file_struct, - u32 chunk_id) -{ - struct yaffs_tnode *tn = file_struct->top; - u32 i; - int required_depth; - int level = file_struct->top_level; - - /* Check sane level and chunk Id */ - if (level < 0 || level > YAFFS_TNODES_MAX_LEVEL) - return NULL; - - if (chunk_id > YAFFS_MAX_CHUNK_ID) - return NULL; - - /* First check we're tall enough (ie enough top_level) */ - - i = chunk_id >> YAFFS_TNODES_LEVEL0_BITS; - required_depth = 0; - while (i) { - i >>= YAFFS_TNODES_INTERNAL_BITS; - required_depth++; - } - - if (required_depth > file_struct->top_level) - return NULL; /* Not tall enough, so we can't find it */ - - /* Traverse down to level 0 */ - while (level > 0 && tn) { - tn = tn->internal[(chunk_id >> - (YAFFS_TNODES_LEVEL0_BITS + - (level - 1) * - YAFFS_TNODES_INTERNAL_BITS)) & - YAFFS_TNODES_INTERNAL_MASK]; - level--; - } - - return tn; -} - -/* add_find_tnode_0 finds the level 0 tnode if it exists, - * otherwise first expands the tree. - * This happens in two steps: - * 1. If the tree isn't tall enough, then make it taller. - * 2. Scan down the tree towards the level 0 tnode adding tnodes if required. - * - * Used when modifying the tree. - * - * If the tn argument is NULL, then a fresh tnode will be added otherwise the - * specified tn will be plugged into the ttree. - */ - -struct yaffs_tnode *yaffs_add_find_tnode_0(struct yaffs_dev *dev, - struct yaffs_file_var *file_struct, - u32 chunk_id, - struct yaffs_tnode *passed_tn) -{ - int required_depth; - int i; - int l; - struct yaffs_tnode *tn; - u32 x; - - /* Check sane level and page Id */ - if (file_struct->top_level < 0 || - file_struct->top_level > YAFFS_TNODES_MAX_LEVEL) - return NULL; - - if (chunk_id > YAFFS_MAX_CHUNK_ID) - return NULL; - - /* First check we're tall enough (ie enough top_level) */ - - x = chunk_id >> YAFFS_TNODES_LEVEL0_BITS; - required_depth = 0; - while (x) { - x >>= YAFFS_TNODES_INTERNAL_BITS; - required_depth++; - } - - if (required_depth > file_struct->top_level) { - /* Not tall enough, gotta make the tree taller */ - for (i = file_struct->top_level; i < required_depth; i++) { - - tn = yaffs_get_tnode(dev); - - if (tn) { - tn->internal[0] = file_struct->top; - file_struct->top = tn; - file_struct->top_level++; - } else { - yaffs_trace(YAFFS_TRACE_ERROR, - "yaffs: no more tnodes"); - return NULL; - } - } - } - - /* Traverse down to level 0, adding anything we need */ - - l = file_struct->top_level; - tn = file_struct->top; - - if (l > 0) { - while (l > 0 && tn) { - x = (chunk_id >> - (YAFFS_TNODES_LEVEL0_BITS + - (l - 1) * YAFFS_TNODES_INTERNAL_BITS)) & - YAFFS_TNODES_INTERNAL_MASK; - - if ((l > 1) && !tn->internal[x]) { - /* Add missing non-level-zero tnode */ - tn->internal[x] = yaffs_get_tnode(dev); - if (!tn->internal[x]) - return NULL; - } else if (l == 1) { - /* Looking from level 1 at level 0 */ - if (passed_tn) { - /* If we already have one, release it */ - if (tn->internal[x]) - yaffs_free_tnode(dev, - tn->internal[x]); - tn->internal[x] = passed_tn; - - } else if (!tn->internal[x]) { - /* Don't have one, none passed in */ - tn->internal[x] = yaffs_get_tnode(dev); - if (!tn->internal[x]) - return NULL; - } - } - - tn = tn->internal[x]; - l--; - } - } else { - /* top is level 0 */ - if (passed_tn) { - memcpy(tn, passed_tn, - (dev->tnode_width * YAFFS_NTNODES_LEVEL0) / 8); - yaffs_free_tnode(dev, passed_tn); - } - } - - return tn; -} - -static int yaffs_tags_match(const struct yaffs_ext_tags *tags, int obj_id, - int chunk_obj) -{ - return (tags->chunk_id == chunk_obj && - tags->obj_id == obj_id && - !tags->is_deleted) ? 1 : 0; - -} - -static int yaffs_find_chunk_in_group(struct yaffs_dev *dev, int the_chunk, - struct yaffs_ext_tags *tags, int obj_id, - int inode_chunk) -{ - int j; - - for (j = 0; the_chunk && j < dev->chunk_grp_size; j++) { - if (yaffs_check_chunk_bit - (dev, the_chunk / dev->param.chunks_per_block, - the_chunk % dev->param.chunks_per_block)) { - - if (dev->chunk_grp_size == 1) - return the_chunk; - else { - yaffs_rd_chunk_tags_nand(dev, the_chunk, NULL, - tags); - if (yaffs_tags_match(tags, - obj_id, inode_chunk)) { - /* found it; */ - return the_chunk; - } - } - } - the_chunk++; - } - return -1; -} - -static int yaffs_find_chunk_in_file(struct yaffs_obj *in, int inode_chunk, - struct yaffs_ext_tags *tags) -{ - /*Get the Tnode, then get the level 0 offset chunk offset */ - struct yaffs_tnode *tn; - int the_chunk = -1; - struct yaffs_ext_tags local_tags; - int ret_val = -1; - struct yaffs_dev *dev = in->my_dev; - - if (!tags) { - /* Passed a NULL, so use our own tags space */ - tags = &local_tags; - } - - tn = yaffs_find_tnode_0(dev, &in->variant.file_variant, inode_chunk); - - if (!tn) - return ret_val; - - the_chunk = yaffs_get_group_base(dev, tn, inode_chunk); - - ret_val = yaffs_find_chunk_in_group(dev, the_chunk, tags, in->obj_id, - inode_chunk); - return ret_val; -} - -static int yaffs_find_del_file_chunk(struct yaffs_obj *in, int inode_chunk, - struct yaffs_ext_tags *tags) -{ - /* Get the Tnode, then get the level 0 offset chunk offset */ - struct yaffs_tnode *tn; - int the_chunk = -1; - struct yaffs_ext_tags local_tags; - struct yaffs_dev *dev = in->my_dev; - int ret_val = -1; - - if (!tags) { - /* Passed a NULL, so use our own tags space */ - tags = &local_tags; - } - - tn = yaffs_find_tnode_0(dev, &in->variant.file_variant, inode_chunk); - - if (!tn) - return ret_val; - - the_chunk = yaffs_get_group_base(dev, tn, inode_chunk); - - ret_val = yaffs_find_chunk_in_group(dev, the_chunk, tags, in->obj_id, - inode_chunk); - - /* Delete the entry in the filestructure (if found) */ - if (ret_val != -1) - yaffs_load_tnode_0(dev, tn, inode_chunk, 0); - - return ret_val; -} - -int yaffs_put_chunk_in_file(struct yaffs_obj *in, int inode_chunk, - int nand_chunk, int in_scan) -{ - /* NB in_scan is zero unless scanning. - * For forward scanning, in_scan is > 0; - * for backward scanning in_scan is < 0 - * - * nand_chunk = 0 is a dummy insert to make sure the tnodes are there. - */ - - struct yaffs_tnode *tn; - struct yaffs_dev *dev = in->my_dev; - int existing_cunk; - struct yaffs_ext_tags existing_tags; - struct yaffs_ext_tags new_tags; - unsigned existing_serial, new_serial; - - if (in->variant_type != YAFFS_OBJECT_TYPE_FILE) { - /* Just ignore an attempt at putting a chunk into a non-file - * during scanning. - * If it is not during Scanning then something went wrong! - */ - if (!in_scan) { - yaffs_trace(YAFFS_TRACE_ERROR, - "yaffs tragedy:attempt to put data chunk into a non-file" - ); - BUG(); - } - - yaffs_chunk_del(dev, nand_chunk, 1, __LINE__); - return YAFFS_OK; - } - - tn = yaffs_add_find_tnode_0(dev, - &in->variant.file_variant, - inode_chunk, NULL); - if (!tn) - return YAFFS_FAIL; - - if (!nand_chunk) - /* Dummy insert, bail now */ - return YAFFS_OK; - - existing_cunk = yaffs_get_group_base(dev, tn, inode_chunk); - - if (in_scan != 0) { - /* If we're scanning then we need to test for duplicates - * NB This does not need to be efficient since it should only - * happen when the power fails during a write, then only one - * chunk should ever be affected. - * - * Correction for YAFFS2: This could happen quite a lot and we - * need to think about efficiency! TODO - * Update: For backward scanning we don't need to re-read tags - * so this is quite cheap. - */ - - if (existing_cunk > 0) { - /* NB Right now existing chunk will not be real - * chunk_id if the chunk group size > 1 - * thus we have to do a FindChunkInFile to get the - * real chunk id. - * - * We have a duplicate now we need to decide which - * one to use: - * - * Backwards scanning YAFFS2: The old one is what - * we use, dump the new one. - * YAFFS1: Get both sets of tags and compare serial - * numbers. - */ - - if (in_scan > 0) { - /* Only do this for forward scanning */ - yaffs_rd_chunk_tags_nand(dev, - nand_chunk, - NULL, &new_tags); - - /* Do a proper find */ - existing_cunk = - yaffs_find_chunk_in_file(in, inode_chunk, - &existing_tags); - } - - if (existing_cunk <= 0) { - /*Hoosterman - how did this happen? */ - - yaffs_trace(YAFFS_TRACE_ERROR, - "yaffs tragedy: existing chunk < 0 in scan" - ); - - } - - /* NB The deleted flags should be false, otherwise - * the chunks will not be loaded during a scan - */ - - if (in_scan > 0) { - new_serial = new_tags.serial_number; - existing_serial = existing_tags.serial_number; - } - - if ((in_scan > 0) && - (existing_cunk <= 0 || - ((existing_serial + 1) & 3) == new_serial)) { - /* Forward scanning. - * Use new - * Delete the old one and drop through to - * update the tnode - */ - yaffs_chunk_del(dev, existing_cunk, 1, - __LINE__); - } else { - /* Backward scanning or we want to use the - * existing one - * Delete the new one and return early so that - * the tnode isn't changed - */ - yaffs_chunk_del(dev, nand_chunk, 1, __LINE__); - return YAFFS_OK; - } - } - - } - - if (existing_cunk == 0) - in->n_data_chunks++; - - yaffs_load_tnode_0(dev, tn, inode_chunk, nand_chunk); - - return YAFFS_OK; -} - -static void yaffs_soft_del_chunk(struct yaffs_dev *dev, int chunk) -{ - struct yaffs_block_info *the_block; - unsigned block_no; - - yaffs_trace(YAFFS_TRACE_DELETION, "soft delete chunk %d", chunk); - - block_no = chunk / dev->param.chunks_per_block; - the_block = yaffs_get_block_info(dev, block_no); - if (the_block) { - the_block->soft_del_pages++; - dev->n_free_chunks++; - yaffs2_update_oldest_dirty_seq(dev, block_no, the_block); - } -} - -/* SoftDeleteWorker scans backwards through the tnode tree and soft deletes all - * the chunks in the file. - * All soft deleting does is increment the block's softdelete count and pulls - * the chunk out of the tnode. - * Thus, essentially this is the same as DeleteWorker except that the chunks - * are soft deleted. - */ - -static int yaffs_soft_del_worker(struct yaffs_obj *in, struct yaffs_tnode *tn, - u32 level, int chunk_offset) -{ - int i; - int the_chunk; - int all_done = 1; - struct yaffs_dev *dev = in->my_dev; - - if (!tn) - return 1; - - if (level > 0) { - for (i = YAFFS_NTNODES_INTERNAL - 1; - all_done && i >= 0; - i--) { - if (tn->internal[i]) { - all_done = - yaffs_soft_del_worker(in, - tn->internal[i], - level - 1, - (chunk_offset << - YAFFS_TNODES_INTERNAL_BITS) - + i); - if (all_done) { - yaffs_free_tnode(dev, - tn->internal[i]); - tn->internal[i] = NULL; - } else { - /* Can this happen? */ - } - } - } - return (all_done) ? 1 : 0; - } - - /* level 0 */ - for (i = YAFFS_NTNODES_LEVEL0 - 1; i >= 0; i--) { - the_chunk = yaffs_get_group_base(dev, tn, i); - if (the_chunk) { - yaffs_soft_del_chunk(dev, the_chunk); - yaffs_load_tnode_0(dev, tn, i, 0); - } - } - return 1; -} - -static void yaffs_remove_obj_from_dir(struct yaffs_obj *obj) -{ - struct yaffs_dev *dev = obj->my_dev; - struct yaffs_obj *parent; - - yaffs_verify_obj_in_dir(obj); - parent = obj->parent; - - yaffs_verify_dir(parent); - - if (dev && dev->param.remove_obj_fn) - dev->param.remove_obj_fn(obj); - - list_del_init(&obj->siblings); - obj->parent = NULL; - - yaffs_verify_dir(parent); -} - -void yaffs_add_obj_to_dir(struct yaffs_obj *directory, struct yaffs_obj *obj) -{ - if (!directory) { - yaffs_trace(YAFFS_TRACE_ALWAYS, - "tragedy: Trying to add an object to a null pointer directory" - ); - BUG(); - return; - } - if (directory->variant_type != YAFFS_OBJECT_TYPE_DIRECTORY) { - yaffs_trace(YAFFS_TRACE_ALWAYS, - "tragedy: Trying to add an object to a non-directory" - ); - BUG(); - } - - if (obj->siblings.prev == NULL) { - /* Not initialised */ - BUG(); - } - - yaffs_verify_dir(directory); - - yaffs_remove_obj_from_dir(obj); - - /* Now add it */ - list_add(&obj->siblings, &directory->variant.dir_variant.children); - obj->parent = directory; - - if (directory == obj->my_dev->unlinked_dir - || directory == obj->my_dev->del_dir) { - obj->unlinked = 1; - obj->my_dev->n_unlinked_files++; - obj->rename_allowed = 0; - } - - yaffs_verify_dir(directory); - yaffs_verify_obj_in_dir(obj); -} - -static int yaffs_change_obj_name(struct yaffs_obj *obj, - struct yaffs_obj *new_dir, - const YCHAR *new_name, int force, int shadows) -{ - int unlink_op; - int del_op; - struct yaffs_obj *existing_target; - - if (new_dir == NULL) - new_dir = obj->parent; /* use the old directory */ - - if (new_dir->variant_type != YAFFS_OBJECT_TYPE_DIRECTORY) { - yaffs_trace(YAFFS_TRACE_ALWAYS, - "tragedy: yaffs_change_obj_name: new_dir is not a directory" - ); - BUG(); - } - - unlink_op = (new_dir == obj->my_dev->unlinked_dir); - del_op = (new_dir == obj->my_dev->del_dir); - - existing_target = yaffs_find_by_name(new_dir, new_name); - - /* If the object is a file going into the unlinked directory, - * then it is OK to just stuff it in since duplicate names are OK. - * else only proceed if the new name does not exist and we're putting - * it into a directory. - */ - if (!(unlink_op || del_op || force || - shadows > 0 || !existing_target) || - new_dir->variant_type != YAFFS_OBJECT_TYPE_DIRECTORY) - return YAFFS_FAIL; - - yaffs_set_obj_name(obj, new_name); - obj->dirty = 1; - yaffs_add_obj_to_dir(new_dir, obj); - - if (unlink_op) - obj->unlinked = 1; - - /* If it is a deletion then we mark it as a shrink for gc */ - if (yaffs_update_oh(obj, new_name, 0, del_op, shadows, NULL) >= 0) - return YAFFS_OK; - - return YAFFS_FAIL; -} - -/*------------------------ Short Operations Cache ------------------------------ - * In many situations where there is no high level buffering a lot of - * reads might be short sequential reads, and a lot of writes may be short - * sequential writes. eg. scanning/writing a jpeg file. - * In these cases, a short read/write cache can provide a huge perfomance - * benefit with dumb-as-a-rock code. - * In Linux, the page cache provides read buffering and the short op cache - * provides write buffering. - * - * There are a small number (~10) of cache chunks per device so that we don't - * need a very intelligent search. - */ - -static int yaffs_obj_cache_dirty(struct yaffs_obj *obj) -{ - struct yaffs_dev *dev = obj->my_dev; - int i; - struct yaffs_cache *cache; - int n_caches = obj->my_dev->param.n_caches; - - for (i = 0; i < n_caches; i++) { - cache = &dev->cache[i]; - if (cache->object == obj && cache->dirty) - return 1; - } - - return 0; -} - -static void yaffs_flush_file_cache(struct yaffs_obj *obj) -{ - struct yaffs_dev *dev = obj->my_dev; - int lowest = -99; /* Stop compiler whining. */ - int i; - struct yaffs_cache *cache; - int chunk_written = 0; - int n_caches = obj->my_dev->param.n_caches; - - if (n_caches < 1) - return; - do { - cache = NULL; - - /* Find the lowest dirty chunk for this object */ - for (i = 0; i < n_caches; i++) { - if (dev->cache[i].object == obj && - dev->cache[i].dirty) { - if (!cache || - dev->cache[i].chunk_id < lowest) { - cache = &dev->cache[i]; - lowest = cache->chunk_id; - } - } - } - - if (cache && !cache->locked) { - /* Write it out and free it up */ - chunk_written = - yaffs_wr_data_obj(cache->object, - cache->chunk_id, - cache->data, - cache->n_bytes, 1); - cache->dirty = 0; - cache->object = NULL; - } - } while (cache && chunk_written > 0); - - if (cache) - /* Hoosterman, disk full while writing cache out. */ - yaffs_trace(YAFFS_TRACE_ERROR, - "yaffs tragedy: no space during cache write"); -} - -/*yaffs_flush_whole_cache(dev) - * - * - */ - -void yaffs_flush_whole_cache(struct yaffs_dev *dev) -{ - struct yaffs_obj *obj; - int n_caches = dev->param.n_caches; - int i; - - /* Find a dirty object in the cache and flush it... - * until there are no further dirty objects. - */ - do { - obj = NULL; - for (i = 0; i < n_caches && !obj; i++) { - if (dev->cache[i].object && dev->cache[i].dirty) - obj = dev->cache[i].object; - } - if (obj) - yaffs_flush_file_cache(obj); - } while (obj); - -} - -/* Grab us a cache chunk for use. - * First look for an empty one. - * Then look for the least recently used non-dirty one. - * Then look for the least recently used dirty one...., flush and look again. - */ -static struct yaffs_cache *yaffs_grab_chunk_worker(struct yaffs_dev *dev) -{ - int i; - - if (dev->param.n_caches > 0) { - for (i = 0; i < dev->param.n_caches; i++) { - if (!dev->cache[i].object) - return &dev->cache[i]; - } - } - return NULL; -} - -static struct yaffs_cache *yaffs_grab_chunk_cache(struct yaffs_dev *dev) -{ - struct yaffs_cache *cache; - struct yaffs_obj *the_obj; - int usage; - int i; - - if (dev->param.n_caches < 1) - return NULL; - - /* Try find a non-dirty one... */ - - cache = yaffs_grab_chunk_worker(dev); - - if (!cache) { - /* They were all dirty, find the LRU object and flush - * its cache, then find again. - * NB what's here is not very accurate, - * we actually flush the object with the LRU chunk. - */ - - /* With locking we can't assume we can use entry zero, - * Set the_obj to a valid pointer for Coverity. */ - the_obj = dev->cache[0].object; - usage = -1; - cache = NULL; - - for (i = 0; i < dev->param.n_caches; i++) { - if (dev->cache[i].object && - !dev->cache[i].locked && - (dev->cache[i].last_use < usage || - !cache)) { - usage = dev->cache[i].last_use; - the_obj = dev->cache[i].object; - cache = &dev->cache[i]; - } - } - - if (!cache || cache->dirty) { - /* Flush and try again */ - yaffs_flush_file_cache(the_obj); - cache = yaffs_grab_chunk_worker(dev); - } - } - return cache; -} - -/* Find a cached chunk */ -static struct yaffs_cache *yaffs_find_chunk_cache(const struct yaffs_obj *obj, - int chunk_id) -{ - struct yaffs_dev *dev = obj->my_dev; - int i; - - if (dev->param.n_caches < 1) - return NULL; - - for (i = 0; i < dev->param.n_caches; i++) { - if (dev->cache[i].object == obj && - dev->cache[i].chunk_id == chunk_id) { - dev->cache_hits++; - - return &dev->cache[i]; - } - } - return NULL; -} - -/* Mark the chunk for the least recently used algorithym */ -static void yaffs_use_cache(struct yaffs_dev *dev, struct yaffs_cache *cache, - int is_write) -{ - int i; - - if (dev->param.n_caches < 1) - return; - - if (dev->cache_last_use < 0 || - dev->cache_last_use > 100000000) { - /* Reset the cache usages */ - for (i = 1; i < dev->param.n_caches; i++) - dev->cache[i].last_use = 0; - - dev->cache_last_use = 0; - } - dev->cache_last_use++; - cache->last_use = dev->cache_last_use; - - if (is_write) - cache->dirty = 1; -} - -/* Invalidate a single cache page. - * Do this when a whole page gets written, - * ie the short cache for this page is no longer valid. - */ -static void yaffs_invalidate_chunk_cache(struct yaffs_obj *object, int chunk_id) -{ - struct yaffs_cache *cache; - - if (object->my_dev->param.n_caches > 0) { - cache = yaffs_find_chunk_cache(object, chunk_id); - - if (cache) - cache->object = NULL; - } -} - -/* Invalidate all the cache pages associated with this object - * Do this whenever ther file is deleted or resized. - */ -static void yaffs_invalidate_whole_cache(struct yaffs_obj *in) -{ - int i; - struct yaffs_dev *dev = in->my_dev; - - if (dev->param.n_caches > 0) { - /* Invalidate it. */ - for (i = 0; i < dev->param.n_caches; i++) { - if (dev->cache[i].object == in) - dev->cache[i].object = NULL; - } - } -} - -static void yaffs_unhash_obj(struct yaffs_obj *obj) -{ - int bucket; - struct yaffs_dev *dev = obj->my_dev; - - /* If it is still linked into the bucket list, free from the list */ - if (!list_empty(&obj->hash_link)) { - list_del_init(&obj->hash_link); - bucket = yaffs_hash_fn(obj->obj_id); - dev->obj_bucket[bucket].count--; - } -} - -/* FreeObject frees up a Object and puts it back on the free list */ -static void yaffs_free_obj(struct yaffs_obj *obj) -{ - struct yaffs_dev *dev; - - if (!obj) { - BUG(); - return; - } - dev = obj->my_dev; - yaffs_trace(YAFFS_TRACE_OS, "FreeObject %p inode %p", - obj, obj->my_inode); - if (obj->parent) - BUG(); - if (!list_empty(&obj->siblings)) - BUG(); - - if (obj->my_inode) { - /* We're still hooked up to a cached inode. - * Don't delete now, but mark for later deletion - */ - obj->defered_free = 1; - return; - } - - yaffs_unhash_obj(obj); - - yaffs_free_raw_obj(dev, obj); - dev->n_obj--; - dev->checkpoint_blocks_required = 0; /* force recalculation */ -} - -void yaffs_handle_defered_free(struct yaffs_obj *obj) -{ - if (obj->defered_free) - yaffs_free_obj(obj); -} - -static int yaffs_generic_obj_del(struct yaffs_obj *in) -{ - /* Iinvalidate the file's data in the cache, without flushing. */ - yaffs_invalidate_whole_cache(in); - - if (in->my_dev->param.is_yaffs2 && in->parent != in->my_dev->del_dir) { - /* Move to unlinked directory so we have a deletion record */ - yaffs_change_obj_name(in, in->my_dev->del_dir, _Y("deleted"), 0, - 0); - } - - yaffs_remove_obj_from_dir(in); - yaffs_chunk_del(in->my_dev, in->hdr_chunk, 1, __LINE__); - in->hdr_chunk = 0; - - yaffs_free_obj(in); - return YAFFS_OK; - -} - -static void yaffs_soft_del_file(struct yaffs_obj *obj) -{ - if (!obj->deleted || - obj->variant_type != YAFFS_OBJECT_TYPE_FILE || - obj->soft_del) - return; - - if (obj->n_data_chunks <= 0) { - /* Empty file with no duplicate object headers, - * just delete it immediately */ - yaffs_free_tnode(obj->my_dev, obj->variant.file_variant.top); - obj->variant.file_variant.top = NULL; - yaffs_trace(YAFFS_TRACE_TRACING, - "yaffs: Deleting empty file %d", - obj->obj_id); - yaffs_generic_obj_del(obj); - } else { - yaffs_soft_del_worker(obj, - obj->variant.file_variant.top, - obj->variant. - file_variant.top_level, 0); - obj->soft_del = 1; - } -} - -/* Pruning removes any part of the file structure tree that is beyond the - * bounds of the file (ie that does not point to chunks). - * - * A file should only get pruned when its size is reduced. - * - * Before pruning, the chunks must be pulled from the tree and the - * level 0 tnode entries must be zeroed out. - * Could also use this for file deletion, but that's probably better handled - * by a special case. - * - * This function is recursive. For levels > 0 the function is called again on - * any sub-tree. For level == 0 we just check if the sub-tree has data. - * If there is no data in a subtree then it is pruned. - */ - -static struct yaffs_tnode *yaffs_prune_worker(struct yaffs_dev *dev, - struct yaffs_tnode *tn, u32 level, - int del0) -{ - int i; - int has_data; - - if (!tn) - return tn; - - has_data = 0; - - if (level > 0) { - for (i = 0; i < YAFFS_NTNODES_INTERNAL; i++) { - if (tn->internal[i]) { - tn->internal[i] = - yaffs_prune_worker(dev, - tn->internal[i], - level - 1, - (i == 0) ? del0 : 1); - } - - if (tn->internal[i]) - has_data++; - } - } else { - int tnode_size_u32 = dev->tnode_size / sizeof(u32); - u32 *map = (u32 *) tn; - - for (i = 0; !has_data && i < tnode_size_u32; i++) { - if (map[i]) - has_data++; - } - } - - if (has_data == 0 && del0) { - /* Free and return NULL */ - yaffs_free_tnode(dev, tn); - tn = NULL; - } - return tn; -} - -static int yaffs_prune_tree(struct yaffs_dev *dev, - struct yaffs_file_var *file_struct) -{ - int i; - int has_data; - int done = 0; - struct yaffs_tnode *tn; - - if (file_struct->top_level < 1) - return YAFFS_OK; - - file_struct->top = - yaffs_prune_worker(dev, file_struct->top, file_struct->top_level, 0); - - /* Now we have a tree with all the non-zero branches NULL but - * the height is the same as it was. - * Let's see if we can trim internal tnodes to shorten the tree. - * We can do this if only the 0th element in the tnode is in use - * (ie all the non-zero are NULL) - */ - - while (file_struct->top_level && !done) { - tn = file_struct->top; - - has_data = 0; - for (i = 1; i < YAFFS_NTNODES_INTERNAL; i++) { - if (tn->internal[i]) - has_data++; - } - - if (!has_data) { - file_struct->top = tn->internal[0]; - file_struct->top_level--; - yaffs_free_tnode(dev, tn); - } else { - done = 1; - } - } - - return YAFFS_OK; -} - -/*-------------------- End of File Structure functions.-------------------*/ - -/* alloc_empty_obj gets us a clean Object.*/ -static struct yaffs_obj *yaffs_alloc_empty_obj(struct yaffs_dev *dev) -{ - struct yaffs_obj *obj = yaffs_alloc_raw_obj(dev); - - if (!obj) - return obj; - - dev->n_obj++; - - /* Now sweeten it up... */ - - memset(obj, 0, sizeof(struct yaffs_obj)); - obj->being_created = 1; - - obj->my_dev = dev; - obj->hdr_chunk = 0; - obj->variant_type = YAFFS_OBJECT_TYPE_UNKNOWN; - INIT_LIST_HEAD(&(obj->hard_links)); - INIT_LIST_HEAD(&(obj->hash_link)); - INIT_LIST_HEAD(&obj->siblings); - - /* Now make the directory sane */ - if (dev->root_dir) { - obj->parent = dev->root_dir; - list_add(&(obj->siblings), - &dev->root_dir->variant.dir_variant.children); - } - - /* Add it to the lost and found directory. - * NB Can't put root or lost-n-found in lost-n-found so - * check if lost-n-found exists first - */ - if (dev->lost_n_found) - yaffs_add_obj_to_dir(dev->lost_n_found, obj); - - obj->being_created = 0; - - dev->checkpoint_blocks_required = 0; /* force recalculation */ - - return obj; -} - -static int yaffs_find_nice_bucket(struct yaffs_dev *dev) -{ - int i; - int l = 999; - int lowest = 999999; - - /* Search for the shortest list or one that - * isn't too long. - */ - - for (i = 0; i < 10 && lowest > 4; i++) { - dev->bucket_finder++; - dev->bucket_finder %= YAFFS_NOBJECT_BUCKETS; - if (dev->obj_bucket[dev->bucket_finder].count < lowest) { - lowest = dev->obj_bucket[dev->bucket_finder].count; - l = dev->bucket_finder; - } - } - - return l; -} - -static int yaffs_new_obj_id(struct yaffs_dev *dev) -{ - int bucket = yaffs_find_nice_bucket(dev); - int found = 0; - struct list_head *i; - u32 n = (u32) bucket; - - /* Now find an object value that has not already been taken - * by scanning the list. - */ - - while (!found) { - found = 1; - n += YAFFS_NOBJECT_BUCKETS; - list_for_each(i, &dev->obj_bucket[bucket].list) { - /* If there is already one in the list */ - if (list_entry(i, struct yaffs_obj, - hash_link)->obj_id == n) { - found = 0; - break; - } - } - } - return n; -} - -static void yaffs_hash_obj(struct yaffs_obj *in) -{ - int bucket = yaffs_hash_fn(in->obj_id); - struct yaffs_dev *dev = in->my_dev; - - list_add(&in->hash_link, &dev->obj_bucket[bucket].list); - dev->obj_bucket[bucket].count++; -} - -struct yaffs_obj *yaffs_find_by_number(struct yaffs_dev *dev, u32 number) -{ - int bucket = yaffs_hash_fn(number); - struct list_head *i; - struct yaffs_obj *in; - - list_for_each(i, &dev->obj_bucket[bucket].list) { - /* Look if it is in the list */ - in = list_entry(i, struct yaffs_obj, hash_link); - if (in->obj_id == number) { - /* Don't show if it is defered free */ - if (in->defered_free) - return NULL; - return in; - } - } - - return NULL; -} - -struct yaffs_obj *yaffs_new_obj(struct yaffs_dev *dev, int number, - enum yaffs_obj_type type) -{ - struct yaffs_obj *the_obj = NULL; - struct yaffs_tnode *tn = NULL; - - if (number < 0) - number = yaffs_new_obj_id(dev); - - if (type == YAFFS_OBJECT_TYPE_FILE) { - tn = yaffs_get_tnode(dev); - if (!tn) - return NULL; - } - - the_obj = yaffs_alloc_empty_obj(dev); - if (!the_obj) { - if (tn) - yaffs_free_tnode(dev, tn); - return NULL; - } - - the_obj->fake = 0; - the_obj->rename_allowed = 1; - the_obj->unlink_allowed = 1; - the_obj->obj_id = number; - yaffs_hash_obj(the_obj); - the_obj->variant_type = type; - yaffs_load_current_time(the_obj, 1, 1); - - switch (type) { - case YAFFS_OBJECT_TYPE_FILE: - the_obj->variant.file_variant.file_size = 0; - the_obj->variant.file_variant.scanned_size = 0; - the_obj->variant.file_variant.shrink_size = - yaffs_max_file_size(dev); - the_obj->variant.file_variant.top_level = 0; - the_obj->variant.file_variant.top = tn; - break; - case YAFFS_OBJECT_TYPE_DIRECTORY: - INIT_LIST_HEAD(&the_obj->variant.dir_variant.children); - INIT_LIST_HEAD(&the_obj->variant.dir_variant.dirty); - break; - case YAFFS_OBJECT_TYPE_SYMLINK: - case YAFFS_OBJECT_TYPE_HARDLINK: - case YAFFS_OBJECT_TYPE_SPECIAL: - /* No action required */ - break; - case YAFFS_OBJECT_TYPE_UNKNOWN: - /* todo this should not happen */ - break; - } - return the_obj; -} - -static struct yaffs_obj *yaffs_create_fake_dir(struct yaffs_dev *dev, - int number, u32 mode) -{ - - struct yaffs_obj *obj = - yaffs_new_obj(dev, number, YAFFS_OBJECT_TYPE_DIRECTORY); - - if (!obj) - return NULL; - - obj->fake = 1; /* it is fake so it might not use NAND */ - obj->rename_allowed = 0; - obj->unlink_allowed = 0; - obj->deleted = 0; - obj->unlinked = 0; - obj->yst_mode = mode; - obj->my_dev = dev; - obj->hdr_chunk = 0; /* Not a valid chunk. */ - return obj; - -} - -static void yaffs_init_tnodes_and_objs(struct yaffs_dev *dev) -{ - int i; - - dev->n_obj = 0; - dev->n_tnodes = 0; - yaffs_init_raw_tnodes_and_objs(dev); - - for (i = 0; i < YAFFS_NOBJECT_BUCKETS; i++) { - INIT_LIST_HEAD(&dev->obj_bucket[i].list); - dev->obj_bucket[i].count = 0; - } -} - -struct yaffs_obj *yaffs_find_or_create_by_number(struct yaffs_dev *dev, - int number, - enum yaffs_obj_type type) -{ - struct yaffs_obj *the_obj = NULL; - - if (number > 0) - the_obj = yaffs_find_by_number(dev, number); - - if (!the_obj) - the_obj = yaffs_new_obj(dev, number, type); - - return the_obj; - -} - -YCHAR *yaffs_clone_str(const YCHAR *str) -{ - YCHAR *new_str = NULL; - int len; - - if (!str) - str = _Y(""); - - len = yaffs_strnlen(str, YAFFS_MAX_ALIAS_LENGTH); - new_str = kmalloc((len + 1) * sizeof(YCHAR), GFP_NOFS); - if (new_str) { - yaffs_strncpy(new_str, str, len); - new_str[len] = 0; - } - return new_str; - -} -/* - *yaffs_update_parent() handles fixing a directories mtime and ctime when a new - * link (ie. name) is created or deleted in the directory. - * - * ie. - * create dir/a : update dir's mtime/ctime - * rm dir/a: update dir's mtime/ctime - * modify dir/a: don't update dir's mtimme/ctime - * - * This can be handled immediately or defered. Defering helps reduce the number - * of updates when many files in a directory are changed within a brief period. - * - * If the directory updating is defered then yaffs_update_dirty_dirs must be - * called periodically. - */ - -static void yaffs_update_parent(struct yaffs_obj *obj) -{ - struct yaffs_dev *dev; - - if (!obj) - return; - dev = obj->my_dev; - obj->dirty = 1; - yaffs_load_current_time(obj, 0, 1); - if (dev->param.defered_dir_update) { - struct list_head *link = &obj->variant.dir_variant.dirty; - - if (list_empty(link)) { - list_add(link, &dev->dirty_dirs); - yaffs_trace(YAFFS_TRACE_BACKGROUND, - "Added object %d to dirty directories", - obj->obj_id); - } - - } else { - yaffs_update_oh(obj, NULL, 0, 0, 0, NULL); - } -} - -void yaffs_update_dirty_dirs(struct yaffs_dev *dev) -{ - struct list_head *link; - struct yaffs_obj *obj; - struct yaffs_dir_var *d_s; - union yaffs_obj_var *o_v; - - yaffs_trace(YAFFS_TRACE_BACKGROUND, "Update dirty directories"); - - while (!list_empty(&dev->dirty_dirs)) { - link = dev->dirty_dirs.next; - list_del_init(link); - - d_s = list_entry(link, struct yaffs_dir_var, dirty); - o_v = list_entry(d_s, union yaffs_obj_var, dir_variant); - obj = list_entry(o_v, struct yaffs_obj, variant); - - yaffs_trace(YAFFS_TRACE_BACKGROUND, "Update directory %d", - obj->obj_id); - - if (obj->dirty) - yaffs_update_oh(obj, NULL, 0, 0, 0, NULL); - } -} - -/* - * Mknod (create) a new object. - * equiv_obj only has meaning for a hard link; - * alias_str only has meaning for a symlink. - * rdev only has meaning for devices (a subset of special objects) - */ - -static struct yaffs_obj *yaffs_create_obj(enum yaffs_obj_type type, - struct yaffs_obj *parent, - const YCHAR *name, - u32 mode, - u32 uid, - u32 gid, - struct yaffs_obj *equiv_obj, - const YCHAR *alias_str, u32 rdev) -{ - struct yaffs_obj *in; - YCHAR *str = NULL; - struct yaffs_dev *dev = parent->my_dev; - - /* Check if the entry exists. - * If it does then fail the call since we don't want a dup. */ - if (yaffs_find_by_name(parent, name)) - return NULL; - - if (type == YAFFS_OBJECT_TYPE_SYMLINK) { - str = yaffs_clone_str(alias_str); - if (!str) - return NULL; - } - - in = yaffs_new_obj(dev, -1, type); - - if (!in) { - kfree(str); - return NULL; - } - - in->hdr_chunk = 0; - in->valid = 1; - in->variant_type = type; - - in->yst_mode = mode; - - yaffs_attribs_init(in, gid, uid, rdev); - - in->n_data_chunks = 0; - - yaffs_set_obj_name(in, name); - in->dirty = 1; - - yaffs_add_obj_to_dir(parent, in); - - in->my_dev = parent->my_dev; - - switch (type) { - case YAFFS_OBJECT_TYPE_SYMLINK: - in->variant.symlink_variant.alias = str; - break; - case YAFFS_OBJECT_TYPE_HARDLINK: - in->variant.hardlink_variant.equiv_obj = equiv_obj; - in->variant.hardlink_variant.equiv_id = equiv_obj->obj_id; - list_add(&in->hard_links, &equiv_obj->hard_links); - break; - case YAFFS_OBJECT_TYPE_FILE: - case YAFFS_OBJECT_TYPE_DIRECTORY: - case YAFFS_OBJECT_TYPE_SPECIAL: - case YAFFS_OBJECT_TYPE_UNKNOWN: - /* do nothing */ - break; - } - - if (yaffs_update_oh(in, name, 0, 0, 0, NULL) < 0) { - /* Could not create the object header, fail */ - yaffs_del_obj(in); - in = NULL; - } - - if (in) - yaffs_update_parent(parent); - - return in; -} - -struct yaffs_obj *yaffs_create_file(struct yaffs_obj *parent, - const YCHAR *name, u32 mode, u32 uid, - u32 gid) -{ - return yaffs_create_obj(YAFFS_OBJECT_TYPE_FILE, parent, name, mode, - uid, gid, NULL, NULL, 0); -} - -struct yaffs_obj *yaffs_create_dir(struct yaffs_obj *parent, const YCHAR *name, - u32 mode, u32 uid, u32 gid) -{ - return yaffs_create_obj(YAFFS_OBJECT_TYPE_DIRECTORY, parent, name, - mode, uid, gid, NULL, NULL, 0); -} - -struct yaffs_obj *yaffs_create_special(struct yaffs_obj *parent, - const YCHAR *name, u32 mode, u32 uid, - u32 gid, u32 rdev) -{ - return yaffs_create_obj(YAFFS_OBJECT_TYPE_SPECIAL, parent, name, mode, - uid, gid, NULL, NULL, rdev); -} - -struct yaffs_obj *yaffs_create_symlink(struct yaffs_obj *parent, - const YCHAR *name, u32 mode, u32 uid, - u32 gid, const YCHAR *alias) -{ - return yaffs_create_obj(YAFFS_OBJECT_TYPE_SYMLINK, parent, name, mode, - uid, gid, NULL, alias, 0); -} - -/* yaffs_link_obj returns the object id of the equivalent object.*/ -struct yaffs_obj *yaffs_link_obj(struct yaffs_obj *parent, const YCHAR * name, - struct yaffs_obj *equiv_obj) -{ - /* Get the real object in case we were fed a hard link obj */ - equiv_obj = yaffs_get_equivalent_obj(equiv_obj); - - if (yaffs_create_obj(YAFFS_OBJECT_TYPE_HARDLINK, - parent, name, 0, 0, 0, - equiv_obj, NULL, 0)) - return equiv_obj; - - return NULL; - -} - -/*---------------------- Block Management and Page Allocation -------------*/ - -static void yaffs_deinit_blocks(struct yaffs_dev *dev) -{ - if (dev->block_info_alt && dev->block_info) - vfree(dev->block_info); - else - kfree(dev->block_info); - - dev->block_info_alt = 0; - - dev->block_info = NULL; - - if (dev->chunk_bits_alt && dev->chunk_bits) - vfree(dev->chunk_bits); - else - kfree(dev->chunk_bits); - dev->chunk_bits_alt = 0; - dev->chunk_bits = NULL; -} - -static int yaffs_init_blocks(struct yaffs_dev *dev) -{ - int n_blocks = dev->internal_end_block - dev->internal_start_block + 1; - - dev->block_info = NULL; - dev->chunk_bits = NULL; - dev->alloc_block = -1; /* force it to get a new one */ - - /* If the first allocation strategy fails, thry the alternate one */ - dev->block_info = - kmalloc(n_blocks * sizeof(struct yaffs_block_info), GFP_NOFS); - if (!dev->block_info) { - dev->block_info = - vmalloc(n_blocks * sizeof(struct yaffs_block_info)); - dev->block_info_alt = 1; - } else { - dev->block_info_alt = 0; - } - - if (!dev->block_info) - goto alloc_error; - - /* Set up dynamic blockinfo stuff. Round up bytes. */ - dev->chunk_bit_stride = (dev->param.chunks_per_block + 7) / 8; - dev->chunk_bits = - kmalloc(dev->chunk_bit_stride * n_blocks, GFP_NOFS); - if (!dev->chunk_bits) { - dev->chunk_bits = - vmalloc(dev->chunk_bit_stride * n_blocks); - dev->chunk_bits_alt = 1; - } else { - dev->chunk_bits_alt = 0; - } - if (!dev->chunk_bits) - goto alloc_error; - - memset(dev->block_info, 0, n_blocks * sizeof(struct yaffs_block_info)); - memset(dev->chunk_bits, 0, dev->chunk_bit_stride * n_blocks); - return YAFFS_OK; - -alloc_error: - yaffs_deinit_blocks(dev); - return YAFFS_FAIL; -} - -void yaffs_block_became_dirty(struct yaffs_dev *dev, int block_no) -{ - struct yaffs_block_info *bi = yaffs_get_block_info(dev, block_no); - int erased_ok = 0; - int i; - - /* If the block is still healthy erase it and mark as clean. - * If the block has had a data failure, then retire it. - */ - - yaffs_trace(YAFFS_TRACE_GC | YAFFS_TRACE_ERASE, - "yaffs_block_became_dirty block %d state %d %s", - block_no, bi->block_state, - (bi->needs_retiring) ? "needs retiring" : ""); - - yaffs2_clear_oldest_dirty_seq(dev, bi); - - bi->block_state = YAFFS_BLOCK_STATE_DIRTY; - - /* If this is the block being garbage collected then stop gc'ing */ - if (block_no == dev->gc_block) - dev->gc_block = 0; - - /* If this block is currently the best candidate for gc - * then drop as a candidate */ - if (block_no == dev->gc_dirtiest) { - dev->gc_dirtiest = 0; - dev->gc_pages_in_use = 0; - } - - if (!bi->needs_retiring) { - yaffs2_checkpt_invalidate(dev); - erased_ok = yaffs_erase_block(dev, block_no); - if (!erased_ok) { - dev->n_erase_failures++; - yaffs_trace(YAFFS_TRACE_ERROR | YAFFS_TRACE_BAD_BLOCKS, - "**>> Erasure failed %d", block_no); - } - } - - /* Verify erasure if needed */ - if (erased_ok && - ((yaffs_trace_mask & YAFFS_TRACE_ERASE) || - !yaffs_skip_verification(dev))) { - for (i = 0; i < dev->param.chunks_per_block; i++) { - if (!yaffs_check_chunk_erased(dev, - block_no * dev->param.chunks_per_block + i)) { - yaffs_trace(YAFFS_TRACE_ERROR, - ">>Block %d erasure supposedly OK, but chunk %d not erased", - block_no, i); - } - } - } - - if (!erased_ok) { - /* We lost a block of free space */ - dev->n_free_chunks -= dev->param.chunks_per_block; - yaffs_retire_block(dev, block_no); - yaffs_trace(YAFFS_TRACE_ERROR | YAFFS_TRACE_BAD_BLOCKS, - "**>> Block %d retired", block_no); - return; - } - - /* Clean it up... */ - bi->block_state = YAFFS_BLOCK_STATE_EMPTY; - bi->seq_number = 0; - dev->n_erased_blocks++; - bi->pages_in_use = 0; - bi->soft_del_pages = 0; - bi->has_shrink_hdr = 0; - bi->skip_erased_check = 1; /* Clean, so no need to check */ - bi->gc_prioritise = 0; - bi->has_summary = 0; - - yaffs_clear_chunk_bits(dev, block_no); - - yaffs_trace(YAFFS_TRACE_ERASE, "Erased block %d", block_no); -} - -static inline int yaffs_gc_process_chunk(struct yaffs_dev *dev, - struct yaffs_block_info *bi, - int old_chunk, u8 *buffer) -{ - int new_chunk; - int mark_flash = 1; - struct yaffs_ext_tags tags; - struct yaffs_obj *object; - int matching_chunk; - int ret_val = YAFFS_OK; - - memset(&tags, 0, sizeof(tags)); - yaffs_rd_chunk_tags_nand(dev, old_chunk, - buffer, &tags); - object = yaffs_find_by_number(dev, tags.obj_id); - - yaffs_trace(YAFFS_TRACE_GC_DETAIL, - "Collecting chunk in block %d, %d %d %d ", - dev->gc_chunk, tags.obj_id, - tags.chunk_id, tags.n_bytes); - - if (object && !yaffs_skip_verification(dev)) { - if (tags.chunk_id == 0) - matching_chunk = - object->hdr_chunk; - else if (object->soft_del) - /* Defeat the test */ - matching_chunk = old_chunk; - else - matching_chunk = - yaffs_find_chunk_in_file - (object, tags.chunk_id, - NULL); - - if (old_chunk != matching_chunk) - yaffs_trace(YAFFS_TRACE_ERROR, - "gc: page in gc mismatch: %d %d %d %d", - old_chunk, - matching_chunk, - tags.obj_id, - tags.chunk_id); - } - - if (!object) { - yaffs_trace(YAFFS_TRACE_ERROR, - "page %d in gc has no object: %d %d %d ", - old_chunk, - tags.obj_id, tags.chunk_id, - tags.n_bytes); - } - - if (object && - object->deleted && - object->soft_del && tags.chunk_id != 0) { - /* Data chunk in a soft deleted file, - * throw it away. - * It's a soft deleted data chunk, - * No need to copy this, just forget - * about it and fix up the object. - */ - - /* Free chunks already includes - * softdeleted chunks, how ever this - * chunk is going to soon be really - * deleted which will increment free - * chunks. We have to decrement free - * chunks so this works out properly. - */ - dev->n_free_chunks--; - bi->soft_del_pages--; - - object->n_data_chunks--; - if (object->n_data_chunks <= 0) { - /* remeber to clean up obj */ - dev->gc_cleanup_list[dev->n_clean_ups] = tags.obj_id; - dev->n_clean_ups++; - } - mark_flash = 0; - } else if (object) { - /* It's either a data chunk in a live - * file or an ObjectHeader, so we're - * interested in it. - * NB Need to keep the ObjectHeaders of - * deleted files until the whole file - * has been deleted off - */ - tags.serial_number++; - dev->n_gc_copies++; - - if (tags.chunk_id == 0) { - /* It is an object Id, - * We need to nuke the - * shrinkheader flags since its - * work is done. - * Also need to clean up - * shadowing. - */ - struct yaffs_obj_hdr *oh; - oh = (struct yaffs_obj_hdr *) buffer; - - oh->is_shrink = 0; - tags.extra_is_shrink = 0; - oh->shadows_obj = 0; - oh->inband_shadowed_obj_id = 0; - tags.extra_shadows = 0; - - /* Update file size */ - if (object->variant_type == YAFFS_OBJECT_TYPE_FILE) { - yaffs_oh_size_load(oh, - object->variant.file_variant.file_size); - tags.extra_file_size = - object->variant.file_variant.file_size; - } - - yaffs_verify_oh(object, oh, &tags, 1); - new_chunk = - yaffs_write_new_chunk(dev, (u8 *) oh, &tags, 1); - } else { - new_chunk = - yaffs_write_new_chunk(dev, buffer, &tags, 1); - } - - if (new_chunk < 0) { - ret_val = YAFFS_FAIL; - } else { - - /* Now fix up the Tnodes etc. */ - - if (tags.chunk_id == 0) { - /* It's a header */ - object->hdr_chunk = new_chunk; - object->serial = tags.serial_number; - } else { - /* It's a data chunk */ - yaffs_put_chunk_in_file(object, tags.chunk_id, - new_chunk, 0); - } - } - } - if (ret_val == YAFFS_OK) - yaffs_chunk_del(dev, old_chunk, mark_flash, __LINE__); - return ret_val; -} - -static int yaffs_gc_block(struct yaffs_dev *dev, int block, int whole_block) -{ - int old_chunk; - int ret_val = YAFFS_OK; - int i; - int is_checkpt_block; - int max_copies; - int chunks_before = yaffs_get_erased_chunks(dev); - int chunks_after; - struct yaffs_block_info *bi = yaffs_get_block_info(dev, block); - - is_checkpt_block = (bi->block_state == YAFFS_BLOCK_STATE_CHECKPOINT); - - yaffs_trace(YAFFS_TRACE_TRACING, - "Collecting block %d, in use %d, shrink %d, whole_block %d", - block, bi->pages_in_use, bi->has_shrink_hdr, - whole_block); - - /*yaffs_verify_free_chunks(dev); */ - - if (bi->block_state == YAFFS_BLOCK_STATE_FULL) - bi->block_state = YAFFS_BLOCK_STATE_COLLECTING; - - bi->has_shrink_hdr = 0; /* clear the flag so that the block can erase */ - - dev->gc_disable = 1; - - yaffs_summary_gc(dev, block); - - if (is_checkpt_block || !yaffs_still_some_chunks(dev, block)) { - yaffs_trace(YAFFS_TRACE_TRACING, - "Collecting block %d that has no chunks in use", - block); - yaffs_block_became_dirty(dev, block); - } else { - - u8 *buffer = yaffs_get_temp_buffer(dev); - - yaffs_verify_blk(dev, bi, block); - - max_copies = (whole_block) ? dev->param.chunks_per_block : 5; - old_chunk = block * dev->param.chunks_per_block + dev->gc_chunk; - - for (/* init already done */ ; - ret_val == YAFFS_OK && - dev->gc_chunk < dev->param.chunks_per_block && - (bi->block_state == YAFFS_BLOCK_STATE_COLLECTING) && - max_copies > 0; - dev->gc_chunk++, old_chunk++) { - if (yaffs_check_chunk_bit(dev, block, dev->gc_chunk)) { - /* Page is in use and might need to be copied */ - max_copies--; - ret_val = yaffs_gc_process_chunk(dev, bi, - old_chunk, buffer); - } - } - yaffs_release_temp_buffer(dev, buffer); - } - - yaffs_verify_collected_blk(dev, bi, block); - - if (bi->block_state == YAFFS_BLOCK_STATE_COLLECTING) { - /* - * The gc did not complete. Set block state back to FULL - * because checkpointing does not restore gc. - */ - bi->block_state = YAFFS_BLOCK_STATE_FULL; - } else { - /* The gc completed. */ - /* Do any required cleanups */ - for (i = 0; i < dev->n_clean_ups; i++) { - /* Time to delete the file too */ - struct yaffs_obj *object = - yaffs_find_by_number(dev, dev->gc_cleanup_list[i]); - if (object) { - yaffs_free_tnode(dev, - object->variant.file_variant.top); - object->variant.file_variant.top = NULL; - yaffs_trace(YAFFS_TRACE_GC, - "yaffs: About to finally delete object %d", - object->obj_id); - yaffs_generic_obj_del(object); - object->my_dev->n_deleted_files--; - } - - } - chunks_after = yaffs_get_erased_chunks(dev); - if (chunks_before >= chunks_after) - yaffs_trace(YAFFS_TRACE_GC, - "gc did not increase free chunks before %d after %d", - chunks_before, chunks_after); - dev->gc_block = 0; - dev->gc_chunk = 0; - dev->n_clean_ups = 0; - } - - dev->gc_disable = 0; - - return ret_val; -} - -/* - * find_gc_block() selects the dirtiest block (or close enough) - * for garbage collection. - */ - -static unsigned yaffs_find_gc_block(struct yaffs_dev *dev, - int aggressive, int background) -{ - int i; - int iterations; - unsigned selected = 0; - int prioritised = 0; - int prioritised_exist = 0; - struct yaffs_block_info *bi; - int threshold; - - /* First let's see if we need to grab a prioritised block */ - if (dev->has_pending_prioritised_gc && !aggressive) { - dev->gc_dirtiest = 0; - bi = dev->block_info; - for (i = dev->internal_start_block; - i <= dev->internal_end_block && !selected; i++) { - - if (bi->gc_prioritise) { - prioritised_exist = 1; - if (bi->block_state == YAFFS_BLOCK_STATE_FULL && - yaffs_block_ok_for_gc(dev, bi)) { - selected = i; - prioritised = 1; - } - } - bi++; - } - - /* - * If there is a prioritised block and none was selected then - * this happened because there is at least one old dirty block - * gumming up the works. Let's gc the oldest dirty block. - */ - - if (prioritised_exist && - !selected && dev->oldest_dirty_block > 0) - selected = dev->oldest_dirty_block; - - if (!prioritised_exist) /* None found, so we can clear this */ - dev->has_pending_prioritised_gc = 0; - } - - /* If we're doing aggressive GC then we are happy to take a less-dirty - * block, and search harder. - * else (leasurely gc), then we only bother to do this if the - * block has only a few pages in use. - */ - - if (!selected) { - int pages_used; - int n_blocks = - dev->internal_end_block - dev->internal_start_block + 1; - if (aggressive) { - threshold = dev->param.chunks_per_block; - iterations = n_blocks; - } else { - int max_threshold; - - if (background) - max_threshold = dev->param.chunks_per_block / 2; - else - max_threshold = dev->param.chunks_per_block / 8; - - if (max_threshold < YAFFS_GC_PASSIVE_THRESHOLD) - max_threshold = YAFFS_GC_PASSIVE_THRESHOLD; - - threshold = background ? (dev->gc_not_done + 2) * 2 : 0; - if (threshold < YAFFS_GC_PASSIVE_THRESHOLD) - threshold = YAFFS_GC_PASSIVE_THRESHOLD; - if (threshold > max_threshold) - threshold = max_threshold; - - iterations = n_blocks / 16 + 1; - if (iterations > 100) - iterations = 100; - } - - for (i = 0; - i < iterations && - (dev->gc_dirtiest < 1 || - dev->gc_pages_in_use > YAFFS_GC_GOOD_ENOUGH); - i++) { - dev->gc_block_finder++; - if (dev->gc_block_finder < dev->internal_start_block || - dev->gc_block_finder > dev->internal_end_block) - dev->gc_block_finder = - dev->internal_start_block; - - bi = yaffs_get_block_info(dev, dev->gc_block_finder); - - pages_used = bi->pages_in_use - bi->soft_del_pages; - - if (bi->block_state == YAFFS_BLOCK_STATE_FULL && - pages_used < dev->param.chunks_per_block && - (dev->gc_dirtiest < 1 || - pages_used < dev->gc_pages_in_use) && - yaffs_block_ok_for_gc(dev, bi)) { - dev->gc_dirtiest = dev->gc_block_finder; - dev->gc_pages_in_use = pages_used; - } - } - - if (dev->gc_dirtiest > 0 && dev->gc_pages_in_use <= threshold) - selected = dev->gc_dirtiest; - } - - /* - * If nothing has been selected for a while, try the oldest dirty - * because that's gumming up the works. - */ - - if (!selected && dev->param.is_yaffs2 && - dev->gc_not_done >= (background ? 10 : 20)) { - yaffs2_find_oldest_dirty_seq(dev); - if (dev->oldest_dirty_block > 0) { - selected = dev->oldest_dirty_block; - dev->gc_dirtiest = selected; - dev->oldest_dirty_gc_count++; - bi = yaffs_get_block_info(dev, selected); - dev->gc_pages_in_use = - bi->pages_in_use - bi->soft_del_pages; - } else { - dev->gc_not_done = 0; - } - } - - if (selected) { - yaffs_trace(YAFFS_TRACE_GC, - "GC Selected block %d with %d free, prioritised:%d", - selected, - dev->param.chunks_per_block - dev->gc_pages_in_use, - prioritised); - - dev->n_gc_blocks++; - if (background) - dev->bg_gcs++; - - dev->gc_dirtiest = 0; - dev->gc_pages_in_use = 0; - dev->gc_not_done = 0; - if (dev->refresh_skip > 0) - dev->refresh_skip--; - } else { - dev->gc_not_done++; - yaffs_trace(YAFFS_TRACE_GC, - "GC none: finder %d skip %d threshold %d dirtiest %d using %d oldest %d%s", - dev->gc_block_finder, dev->gc_not_done, threshold, - dev->gc_dirtiest, dev->gc_pages_in_use, - dev->oldest_dirty_block, background ? " bg" : ""); - } - - return selected; -} - -/* New garbage collector - * If we're very low on erased blocks then we do aggressive garbage collection - * otherwise we do "leasurely" garbage collection. - * Aggressive gc looks further (whole array) and will accept less dirty blocks. - * Passive gc only inspects smaller areas and only accepts more dirty blocks. - * - * The idea is to help clear out space in a more spread-out manner. - * Dunno if it really does anything useful. - */ -static int yaffs_check_gc(struct yaffs_dev *dev, int background) -{ - int aggressive = 0; - int gc_ok = YAFFS_OK; - int max_tries = 0; - int min_erased; - int erased_chunks; - int checkpt_block_adjust; - - if (dev->param.gc_control && (dev->param.gc_control(dev) & 1) == 0) - return YAFFS_OK; - - if (dev->gc_disable) - /* Bail out so we don't get recursive gc */ - return YAFFS_OK; - - /* This loop should pass the first time. - * Only loops here if the collection does not increase space. - */ - - do { - max_tries++; - - checkpt_block_adjust = yaffs_calc_checkpt_blocks_required(dev); - - min_erased = - dev->param.n_reserved_blocks + checkpt_block_adjust + 1; - erased_chunks = - dev->n_erased_blocks * dev->param.chunks_per_block; - - /* If we need a block soon then do aggressive gc. */ - if (dev->n_erased_blocks < min_erased) - aggressive = 1; - else { - if (!background - && erased_chunks > (dev->n_free_chunks / 4)) - break; - - if (dev->gc_skip > 20) - dev->gc_skip = 20; - if (erased_chunks < dev->n_free_chunks / 2 || - dev->gc_skip < 1 || background) - aggressive = 0; - else { - dev->gc_skip--; - break; - } - } - - dev->gc_skip = 5; - - /* If we don't already have a block being gc'd then see if we - * should start another */ - - if (dev->gc_block < 1 && !aggressive) { - dev->gc_block = yaffs2_find_refresh_block(dev); - dev->gc_chunk = 0; - dev->n_clean_ups = 0; - } - if (dev->gc_block < 1) { - dev->gc_block = - yaffs_find_gc_block(dev, aggressive, background); - dev->gc_chunk = 0; - dev->n_clean_ups = 0; - } - - if (dev->gc_block > 0) { - dev->all_gcs++; - if (!aggressive) - dev->passive_gc_count++; - - yaffs_trace(YAFFS_TRACE_GC, - "yaffs: GC n_erased_blocks %d aggressive %d", - dev->n_erased_blocks, aggressive); - - gc_ok = yaffs_gc_block(dev, dev->gc_block, aggressive); - } - - if (dev->n_erased_blocks < (dev->param.n_reserved_blocks) && - dev->gc_block > 0) { - yaffs_trace(YAFFS_TRACE_GC, - "yaffs: GC !!!no reclaim!!! n_erased_blocks %d after try %d block %d", - dev->n_erased_blocks, max_tries, - dev->gc_block); - } - } while ((dev->n_erased_blocks < dev->param.n_reserved_blocks) && - (dev->gc_block > 0) && (max_tries < 2)); - - return aggressive ? gc_ok : YAFFS_OK; -} - -/* - * yaffs_bg_gc() - * Garbage collects. Intended to be called from a background thread. - * Returns non-zero if at least half the free chunks are erased. - */ -int yaffs_bg_gc(struct yaffs_dev *dev, unsigned urgency) -{ - int erased_chunks = dev->n_erased_blocks * dev->param.chunks_per_block; - - yaffs_trace(YAFFS_TRACE_BACKGROUND, "Background gc %u", urgency); - - yaffs_check_gc(dev, 1); - return erased_chunks > dev->n_free_chunks / 2; -} - -/*-------------------- Data file manipulation -----------------*/ - -static int yaffs_rd_data_obj(struct yaffs_obj *in, int inode_chunk, u8 * buffer) -{ - int nand_chunk = yaffs_find_chunk_in_file(in, inode_chunk, NULL); - - if (nand_chunk >= 0) - return yaffs_rd_chunk_tags_nand(in->my_dev, nand_chunk, - buffer, NULL); - else { - yaffs_trace(YAFFS_TRACE_NANDACCESS, - "Chunk %d not found zero instead", - nand_chunk); - /* get sane (zero) data if you read a hole */ - memset(buffer, 0, in->my_dev->data_bytes_per_chunk); - return 0; - } - -} - -void yaffs_chunk_del(struct yaffs_dev *dev, int chunk_id, int mark_flash, - int lyn) -{ - int block; - int page; - struct yaffs_ext_tags tags; - struct yaffs_block_info *bi; - - if (chunk_id <= 0) - return; - - dev->n_deletions++; - block = chunk_id / dev->param.chunks_per_block; - page = chunk_id % dev->param.chunks_per_block; - - if (!yaffs_check_chunk_bit(dev, block, page)) - yaffs_trace(YAFFS_TRACE_VERIFY, - "Deleting invalid chunk %d", chunk_id); - - bi = yaffs_get_block_info(dev, block); - - yaffs2_update_oldest_dirty_seq(dev, block, bi); - - yaffs_trace(YAFFS_TRACE_DELETION, - "line %d delete of chunk %d", - lyn, chunk_id); - - if (!dev->param.is_yaffs2 && mark_flash && - bi->block_state != YAFFS_BLOCK_STATE_COLLECTING) { - - memset(&tags, 0, sizeof(tags)); - tags.is_deleted = 1; - yaffs_wr_chunk_tags_nand(dev, chunk_id, NULL, &tags); - yaffs_handle_chunk_update(dev, chunk_id, &tags); - } else { - dev->n_unmarked_deletions++; - } - - /* Pull out of the management area. - * If the whole block became dirty, this will kick off an erasure. - */ - if (bi->block_state == YAFFS_BLOCK_STATE_ALLOCATING || - bi->block_state == YAFFS_BLOCK_STATE_FULL || - bi->block_state == YAFFS_BLOCK_STATE_NEEDS_SCAN || - bi->block_state == YAFFS_BLOCK_STATE_COLLECTING) { - dev->n_free_chunks++; - yaffs_clear_chunk_bit(dev, block, page); - bi->pages_in_use--; - - if (bi->pages_in_use == 0 && - !bi->has_shrink_hdr && - bi->block_state != YAFFS_BLOCK_STATE_ALLOCATING && - bi->block_state != YAFFS_BLOCK_STATE_NEEDS_SCAN) { - yaffs_block_became_dirty(dev, block); - } - } -} - -static int yaffs_wr_data_obj(struct yaffs_obj *in, int inode_chunk, - const u8 *buffer, int n_bytes, int use_reserve) -{ - /* Find old chunk Need to do this to get serial number - * Write new one and patch into tree. - * Invalidate old tags. - */ - - int prev_chunk_id; - struct yaffs_ext_tags prev_tags; - int new_chunk_id; - struct yaffs_ext_tags new_tags; - struct yaffs_dev *dev = in->my_dev; - - yaffs_check_gc(dev, 0); - - /* Get the previous chunk at this location in the file if it exists. - * If it does not exist then put a zero into the tree. This creates - * the tnode now, rather than later when it is harder to clean up. - */ - prev_chunk_id = yaffs_find_chunk_in_file(in, inode_chunk, &prev_tags); - if (prev_chunk_id < 1 && - !yaffs_put_chunk_in_file(in, inode_chunk, 0, 0)) - return 0; - - /* Set up new tags */ - memset(&new_tags, 0, sizeof(new_tags)); - - new_tags.chunk_id = inode_chunk; - new_tags.obj_id = in->obj_id; - new_tags.serial_number = - (prev_chunk_id > 0) ? prev_tags.serial_number + 1 : 1; - new_tags.n_bytes = n_bytes; - - if (n_bytes < 1 || n_bytes > dev->param.total_bytes_per_chunk) { - yaffs_trace(YAFFS_TRACE_ERROR, - "Writing %d bytes to chunk!!!!!!!!!", - n_bytes); - BUG(); - } - - new_chunk_id = - yaffs_write_new_chunk(dev, buffer, &new_tags, use_reserve); - - if (new_chunk_id > 0) { - yaffs_put_chunk_in_file(in, inode_chunk, new_chunk_id, 0); - - if (prev_chunk_id > 0) - yaffs_chunk_del(dev, prev_chunk_id, 1, __LINE__); - - yaffs_verify_file_sane(in); - } - return new_chunk_id; - -} - -static int yaffs_do_xattrib_mod(struct yaffs_obj *obj, int set, - const YCHAR *name, const void *value, int size, - int flags) -{ - struct yaffs_xattr_mod xmod; - int result; - - xmod.set = set; - xmod.name = name; - xmod.data = value; - xmod.size = size; - xmod.flags = flags; - xmod.result = -ENOSPC; - - result = yaffs_update_oh(obj, NULL, 0, 0, 0, &xmod); - - if (result > 0) - return xmod.result; - else - return -ENOSPC; -} - -static int yaffs_apply_xattrib_mod(struct yaffs_obj *obj, char *buffer, - struct yaffs_xattr_mod *xmod) -{ - int retval = 0; - int x_offs = sizeof(struct yaffs_obj_hdr); - struct yaffs_dev *dev = obj->my_dev; - int x_size = dev->data_bytes_per_chunk - sizeof(struct yaffs_obj_hdr); - char *x_buffer = buffer + x_offs; - - if (xmod->set) - retval = - nval_set(x_buffer, x_size, xmod->name, xmod->data, - xmod->size, xmod->flags); - else - retval = nval_del(x_buffer, x_size, xmod->name); - - obj->has_xattr = nval_hasvalues(x_buffer, x_size); - obj->xattr_known = 1; - xmod->result = retval; - - return retval; -} - -static int yaffs_do_xattrib_fetch(struct yaffs_obj *obj, const YCHAR *name, - void *value, int size) -{ - char *buffer = NULL; - int result; - struct yaffs_ext_tags tags; - struct yaffs_dev *dev = obj->my_dev; - int x_offs = sizeof(struct yaffs_obj_hdr); - int x_size = dev->data_bytes_per_chunk - sizeof(struct yaffs_obj_hdr); - char *x_buffer; - int retval = 0; - - if (obj->hdr_chunk < 1) - return -ENODATA; - - /* If we know that the object has no xattribs then don't do all the - * reading and parsing. - */ - if (obj->xattr_known && !obj->has_xattr) { - if (name) - return -ENODATA; - else - return 0; - } - - buffer = (char *)yaffs_get_temp_buffer(dev); - if (!buffer) - return -ENOMEM; - - result = - yaffs_rd_chunk_tags_nand(dev, obj->hdr_chunk, (u8 *) buffer, &tags); - - if (result != YAFFS_OK) - retval = -ENOENT; - else { - x_buffer = buffer + x_offs; - - if (!obj->xattr_known) { - obj->has_xattr = nval_hasvalues(x_buffer, x_size); - obj->xattr_known = 1; - } - - if (name) - retval = nval_get(x_buffer, x_size, name, value, size); - else - retval = nval_list(x_buffer, x_size, value, size); - } - yaffs_release_temp_buffer(dev, (u8 *) buffer); - return retval; -} - -int yaffs_set_xattrib(struct yaffs_obj *obj, const YCHAR * name, - const void *value, int size, int flags) -{ - return yaffs_do_xattrib_mod(obj, 1, name, value, size, flags); -} - -int yaffs_remove_xattrib(struct yaffs_obj *obj, const YCHAR * name) -{ - return yaffs_do_xattrib_mod(obj, 0, name, NULL, 0, 0); -} - -int yaffs_get_xattrib(struct yaffs_obj *obj, const YCHAR * name, void *value, - int size) -{ - return yaffs_do_xattrib_fetch(obj, name, value, size); -} - -int yaffs_list_xattrib(struct yaffs_obj *obj, char *buffer, int size) -{ - return yaffs_do_xattrib_fetch(obj, NULL, buffer, size); -} - -static void yaffs_check_obj_details_loaded(struct yaffs_obj *in) -{ - u8 *buf; - struct yaffs_obj_hdr *oh; - struct yaffs_dev *dev; - struct yaffs_ext_tags tags; - - if (!in || !in->lazy_loaded || in->hdr_chunk < 1) - return; - - dev = in->my_dev; - in->lazy_loaded = 0; - buf = yaffs_get_temp_buffer(dev); - - yaffs_rd_chunk_tags_nand(dev, in->hdr_chunk, buf, &tags); - oh = (struct yaffs_obj_hdr *)buf; - - in->yst_mode = oh->yst_mode; - yaffs_load_attribs(in, oh); - yaffs_set_obj_name_from_oh(in, oh); - - if (in->variant_type == YAFFS_OBJECT_TYPE_SYMLINK) { - in->variant.symlink_variant.alias = - yaffs_clone_str(oh->alias); - } - yaffs_release_temp_buffer(dev, buf); -} - -static void yaffs_load_name_from_oh(struct yaffs_dev *dev, YCHAR *name, - const YCHAR *oh_name, int buff_size) -{ -#ifdef CONFIG_YAFFS_AUTO_UNICODE - if (dev->param.auto_unicode) { - if (*oh_name) { - /* It is an ASCII name, do an ASCII to - * unicode conversion */ - const char *ascii_oh_name = (const char *)oh_name; - int n = buff_size - 1; - while (n > 0 && *ascii_oh_name) { - *name = *ascii_oh_name; - name++; - ascii_oh_name++; - n--; - } - } else { - yaffs_strncpy(name, oh_name + 1, buff_size - 1); - } - - return; - } -#endif - - yaffs_strncpy(name, oh_name, buff_size - 1); -} - -static void yaffs_load_oh_from_name(struct yaffs_dev *dev, YCHAR *oh_name, - const YCHAR *name) -{ -#ifdef CONFIG_YAFFS_AUTO_UNICODE - int is_ascii; - YCHAR *w; - - if (dev->param.auto_unicode) { - - is_ascii = 1; - w = name; - - /* Figure out if the name will fit in ascii character set */ - while (is_ascii && *w) { - if ((*w) & 0xff00) - is_ascii = 0; - w++; - } - - if (is_ascii) { - /* It is an ASCII name, so convert unicode to ascii */ - char *ascii_oh_name = (char *)oh_name; - int n = YAFFS_MAX_NAME_LENGTH - 1; - while (n > 0 && *name) { - *ascii_oh_name = *name; - name++; - ascii_oh_name++; - n--; - } - } else { - /* Unicode name, so save starting at the second YCHAR */ - *oh_name = 0; - yaffs_strncpy(oh_name + 1, name, YAFFS_MAX_NAME_LENGTH - 2); - } - - return; - } -#endif - - yaffs_strncpy(oh_name, name, YAFFS_MAX_NAME_LENGTH - 1); -} - -/* UpdateObjectHeader updates the header on NAND for an object. - * If name is not NULL, then that new name is used. - */ -int yaffs_update_oh(struct yaffs_obj *in, const YCHAR *name, int force, - int is_shrink, int shadows, struct yaffs_xattr_mod *xmod) -{ - - struct yaffs_block_info *bi; - struct yaffs_dev *dev = in->my_dev; - int prev_chunk_id; - int ret_val = 0; - int new_chunk_id; - struct yaffs_ext_tags new_tags; - struct yaffs_ext_tags old_tags; - const YCHAR *alias = NULL; - u8 *buffer = NULL; - YCHAR old_name[YAFFS_MAX_NAME_LENGTH + 1]; - struct yaffs_obj_hdr *oh = NULL; - loff_t file_size = 0; - - yaffs_strcpy(old_name, _Y("silly old name")); - - if (in->fake && in != dev->root_dir && !force && !xmod) - return ret_val; - - yaffs_check_gc(dev, 0); - yaffs_check_obj_details_loaded(in); - - buffer = yaffs_get_temp_buffer(in->my_dev); - oh = (struct yaffs_obj_hdr *)buffer; - - prev_chunk_id = in->hdr_chunk; - - if (prev_chunk_id > 0) { - yaffs_rd_chunk_tags_nand(dev, prev_chunk_id, - buffer, &old_tags); - - yaffs_verify_oh(in, oh, &old_tags, 0); - memcpy(old_name, oh->name, sizeof(oh->name)); - memset(buffer, 0xff, sizeof(struct yaffs_obj_hdr)); - } else { - memset(buffer, 0xff, dev->data_bytes_per_chunk); - } - - oh->type = in->variant_type; - oh->yst_mode = in->yst_mode; - oh->shadows_obj = oh->inband_shadowed_obj_id = shadows; - - yaffs_load_attribs_oh(oh, in); - - if (in->parent) - oh->parent_obj_id = in->parent->obj_id; - else - oh->parent_obj_id = 0; - - if (name && *name) { - memset(oh->name, 0, sizeof(oh->name)); - yaffs_load_oh_from_name(dev, oh->name, name); - } else if (prev_chunk_id > 0) { - memcpy(oh->name, old_name, sizeof(oh->name)); - } else { - memset(oh->name, 0, sizeof(oh->name)); - } - - oh->is_shrink = is_shrink; - - switch (in->variant_type) { - case YAFFS_OBJECT_TYPE_UNKNOWN: - /* Should not happen */ - break; - case YAFFS_OBJECT_TYPE_FILE: - if (oh->parent_obj_id != YAFFS_OBJECTID_DELETED && - oh->parent_obj_id != YAFFS_OBJECTID_UNLINKED) - file_size = in->variant.file_variant.file_size; - yaffs_oh_size_load(oh, file_size); - break; - case YAFFS_OBJECT_TYPE_HARDLINK: - oh->equiv_id = in->variant.hardlink_variant.equiv_id; - break; - case YAFFS_OBJECT_TYPE_SPECIAL: - /* Do nothing */ - break; - case YAFFS_OBJECT_TYPE_DIRECTORY: - /* Do nothing */ - break; - case YAFFS_OBJECT_TYPE_SYMLINK: - alias = in->variant.symlink_variant.alias; - if (!alias) - alias = _Y("no alias"); - yaffs_strncpy(oh->alias, alias, YAFFS_MAX_ALIAS_LENGTH); - oh->alias[YAFFS_MAX_ALIAS_LENGTH] = 0; - break; - } - - /* process any xattrib modifications */ - if (xmod) - yaffs_apply_xattrib_mod(in, (char *)buffer, xmod); - - /* Tags */ - memset(&new_tags, 0, sizeof(new_tags)); - in->serial++; - new_tags.chunk_id = 0; - new_tags.obj_id = in->obj_id; - new_tags.serial_number = in->serial; - - /* Add extra info for file header */ - new_tags.extra_available = 1; - new_tags.extra_parent_id = oh->parent_obj_id; - new_tags.extra_file_size = file_size; - new_tags.extra_is_shrink = oh->is_shrink; - new_tags.extra_equiv_id = oh->equiv_id; - new_tags.extra_shadows = (oh->shadows_obj > 0) ? 1 : 0; - new_tags.extra_obj_type = in->variant_type; - yaffs_verify_oh(in, oh, &new_tags, 1); - - /* Create new chunk in NAND */ - new_chunk_id = - yaffs_write_new_chunk(dev, buffer, &new_tags, - (prev_chunk_id > 0) ? 1 : 0); - - if (buffer) - yaffs_release_temp_buffer(dev, buffer); - - if (new_chunk_id < 0) - return new_chunk_id; - - in->hdr_chunk = new_chunk_id; - - if (prev_chunk_id > 0) - yaffs_chunk_del(dev, prev_chunk_id, 1, __LINE__); - - if (!yaffs_obj_cache_dirty(in)) - in->dirty = 0; - - /* If this was a shrink, then mark the block - * that the chunk lives on */ - if (is_shrink) { - bi = yaffs_get_block_info(in->my_dev, - new_chunk_id / - in->my_dev->param.chunks_per_block); - bi->has_shrink_hdr = 1; - } - - return new_chunk_id; -} - -/*--------------------- File read/write ------------------------ - * Read and write have very similar structures. - * In general the read/write has three parts to it - * An incomplete chunk to start with (if the read/write is not chunk-aligned) - * Some complete chunks - * An incomplete chunk to end off with - * - * Curve-balls: the first chunk might also be the last chunk. - */ - -int yaffs_file_rd(struct yaffs_obj *in, u8 * buffer, loff_t offset, int n_bytes) -{ - int chunk; - u32 start; - int n_copy; - int n = n_bytes; - int n_done = 0; - struct yaffs_cache *cache; - struct yaffs_dev *dev; - - dev = in->my_dev; - - while (n > 0) { - yaffs_addr_to_chunk(dev, offset, &chunk, &start); - chunk++; - - /* OK now check for the curveball where the start and end are in - * the same chunk. - */ - if ((start + n) < dev->data_bytes_per_chunk) - n_copy = n; - else - n_copy = dev->data_bytes_per_chunk - start; - - cache = yaffs_find_chunk_cache(in, chunk); - - /* If the chunk is already in the cache or it is less than - * a whole chunk or we're using inband tags then use the cache - * (if there is caching) else bypass the cache. - */ - if (cache || n_copy != dev->data_bytes_per_chunk || - dev->param.inband_tags) { - if (dev->param.n_caches > 0) { - - /* If we can't find the data in the cache, - * then load it up. */ - - if (!cache) { - cache = - yaffs_grab_chunk_cache(in->my_dev); - cache->object = in; - cache->chunk_id = chunk; - cache->dirty = 0; - cache->locked = 0; - yaffs_rd_data_obj(in, chunk, - cache->data); - cache->n_bytes = 0; - } - - yaffs_use_cache(dev, cache, 0); - - cache->locked = 1; - - memcpy(buffer, &cache->data[start], n_copy); - - cache->locked = 0; - } else { - /* Read into the local buffer then copy.. */ - - u8 *local_buffer = - yaffs_get_temp_buffer(dev); - yaffs_rd_data_obj(in, chunk, local_buffer); - - memcpy(buffer, &local_buffer[start], n_copy); - - yaffs_release_temp_buffer(dev, local_buffer); - } - } else { - /* A full chunk. Read directly into the buffer. */ - yaffs_rd_data_obj(in, chunk, buffer); - } - n -= n_copy; - offset += n_copy; - buffer += n_copy; - n_done += n_copy; - } - return n_done; -} - -int yaffs_do_file_wr(struct yaffs_obj *in, const u8 *buffer, loff_t offset, - int n_bytes, int write_through) -{ - - int chunk; - u32 start; - int n_copy; - int n = n_bytes; - int n_done = 0; - int n_writeback; - loff_t start_write = offset; - int chunk_written = 0; - u32 n_bytes_read; - loff_t chunk_start; - struct yaffs_dev *dev; - - dev = in->my_dev; - - while (n > 0 && chunk_written >= 0) { - yaffs_addr_to_chunk(dev, offset, &chunk, &start); - - if (((loff_t)chunk) * - dev->data_bytes_per_chunk + start != offset || - start >= dev->data_bytes_per_chunk) { - yaffs_trace(YAFFS_TRACE_ERROR, - "AddrToChunk of offset %lld gives chunk %d start %d", - offset, chunk, start); - } - chunk++; /* File pos to chunk in file offset */ - - /* OK now check for the curveball where the start and end are in - * the same chunk. - */ - - if ((start + n) < dev->data_bytes_per_chunk) { - n_copy = n; - - /* Now calculate how many bytes to write back.... - * If we're overwriting and not writing to then end of - * file then we need to write back as much as was there - * before. - */ - - chunk_start = (((loff_t)(chunk - 1)) * - dev->data_bytes_per_chunk); - - if (chunk_start > in->variant.file_variant.file_size) - n_bytes_read = 0; /* Past end of file */ - else - n_bytes_read = - in->variant.file_variant.file_size - - chunk_start; - - if (n_bytes_read > dev->data_bytes_per_chunk) - n_bytes_read = dev->data_bytes_per_chunk; - - n_writeback = - (n_bytes_read > - (start + n)) ? n_bytes_read : (start + n); - - if (n_writeback < 0 || - n_writeback > dev->data_bytes_per_chunk) - BUG(); - - } else { - n_copy = dev->data_bytes_per_chunk - start; - n_writeback = dev->data_bytes_per_chunk; - } - - if (n_copy != dev->data_bytes_per_chunk || - dev->param.inband_tags) { - /* An incomplete start or end chunk (or maybe both - * start and end chunk), or we're using inband tags, - * so we want to use the cache buffers. - */ - if (dev->param.n_caches > 0) { - struct yaffs_cache *cache; - - /* If we can't find the data in the cache, then - * load the cache */ - cache = yaffs_find_chunk_cache(in, chunk); - - if (!cache && - yaffs_check_alloc_available(dev, 1)) { - cache = yaffs_grab_chunk_cache(dev); - cache->object = in; - cache->chunk_id = chunk; - cache->dirty = 0; - cache->locked = 0; - yaffs_rd_data_obj(in, chunk, - cache->data); - } else if (cache && - !cache->dirty && - !yaffs_check_alloc_available(dev, - 1)) { - /* Drop the cache if it was a read cache - * item and no space check has been made - * for it. - */ - cache = NULL; - } - - if (cache) { - yaffs_use_cache(dev, cache, 1); - cache->locked = 1; - - memcpy(&cache->data[start], buffer, - n_copy); - - cache->locked = 0; - cache->n_bytes = n_writeback; - - if (write_through) { - chunk_written = - yaffs_wr_data_obj - (cache->object, - cache->chunk_id, - cache->data, - cache->n_bytes, 1); - cache->dirty = 0; - } - } else { - chunk_written = -1; /* fail write */ - } - } else { - /* An incomplete start or end chunk (or maybe - * both start and end chunk). Read into the - * local buffer then copy over and write back. - */ - - u8 *local_buffer = yaffs_get_temp_buffer(dev); - - yaffs_rd_data_obj(in, chunk, local_buffer); - memcpy(&local_buffer[start], buffer, n_copy); - - chunk_written = - yaffs_wr_data_obj(in, chunk, - local_buffer, - n_writeback, 0); - - yaffs_release_temp_buffer(dev, local_buffer); - } - } else { - /* A full chunk. Write directly from the buffer. */ - - chunk_written = - yaffs_wr_data_obj(in, chunk, buffer, - dev->data_bytes_per_chunk, 0); - - /* Since we've overwritten the cached data, - * we better invalidate it. */ - yaffs_invalidate_chunk_cache(in, chunk); - } - - if (chunk_written >= 0) { - n -= n_copy; - offset += n_copy; - buffer += n_copy; - n_done += n_copy; - } - } - - /* Update file object */ - - if ((start_write + n_done) > in->variant.file_variant.file_size) - in->variant.file_variant.file_size = (start_write + n_done); - - in->dirty = 1; - return n_done; -} - -int yaffs_wr_file(struct yaffs_obj *in, const u8 *buffer, loff_t offset, - int n_bytes, int write_through) -{ - yaffs2_handle_hole(in, offset); - return yaffs_do_file_wr(in, buffer, offset, n_bytes, write_through); -} - -/* ---------------------- File resizing stuff ------------------ */ - -static void yaffs_prune_chunks(struct yaffs_obj *in, loff_t new_size) -{ - - struct yaffs_dev *dev = in->my_dev; - loff_t old_size = in->variant.file_variant.file_size; - int i; - int chunk_id; - u32 dummy; - int last_del; - int start_del; - - if (old_size > 0) - yaffs_addr_to_chunk(dev, old_size - 1, &last_del, &dummy); - else - last_del = 0; - - yaffs_addr_to_chunk(dev, new_size + dev->data_bytes_per_chunk - 1, - &start_del, &dummy); - last_del++; - start_del++; - - /* Delete backwards so that we don't end up with holes if - * power is lost part-way through the operation. - */ - for (i = last_del; i >= start_del; i--) { - /* NB this could be optimised somewhat, - * eg. could retrieve the tags and write them without - * using yaffs_chunk_del - */ - - chunk_id = yaffs_find_del_file_chunk(in, i, NULL); - - if (chunk_id < 1) - continue; - - if (chunk_id < - (dev->internal_start_block * dev->param.chunks_per_block) || - chunk_id >= - ((dev->internal_end_block + 1) * - dev->param.chunks_per_block)) { - yaffs_trace(YAFFS_TRACE_ALWAYS, - "Found daft chunk_id %d for %d", - chunk_id, i); - } else { - in->n_data_chunks--; - yaffs_chunk_del(dev, chunk_id, 1, __LINE__); - } - } -} - -void yaffs_resize_file_down(struct yaffs_obj *obj, loff_t new_size) -{ - int new_full; - u32 new_partial; - struct yaffs_dev *dev = obj->my_dev; - - yaffs_addr_to_chunk(dev, new_size, &new_full, &new_partial); - - yaffs_prune_chunks(obj, new_size); - - if (new_partial != 0) { - int last_chunk = 1 + new_full; - u8 *local_buffer = yaffs_get_temp_buffer(dev); - - /* Rewrite the last chunk with its new size and zero pad */ - yaffs_rd_data_obj(obj, last_chunk, local_buffer); - memset(local_buffer + new_partial, 0, - dev->data_bytes_per_chunk - new_partial); - - yaffs_wr_data_obj(obj, last_chunk, local_buffer, - new_partial, 1); - - yaffs_release_temp_buffer(dev, local_buffer); - } - - obj->variant.file_variant.file_size = new_size; - - yaffs_prune_tree(dev, &obj->variant.file_variant); -} - -int yaffs_resize_file(struct yaffs_obj *in, loff_t new_size) -{ - struct yaffs_dev *dev = in->my_dev; - loff_t old_size = in->variant.file_variant.file_size; - - yaffs_flush_file_cache(in); - yaffs_invalidate_whole_cache(in); - - yaffs_check_gc(dev, 0); - - if (in->variant_type != YAFFS_OBJECT_TYPE_FILE) - return YAFFS_FAIL; - - if (new_size == old_size) - return YAFFS_OK; - - if (new_size > old_size) { - yaffs2_handle_hole(in, new_size); - in->variant.file_variant.file_size = new_size; - } else { - /* new_size < old_size */ - yaffs_resize_file_down(in, new_size); - } - - /* Write a new object header to reflect the resize. - * show we've shrunk the file, if need be - * Do this only if the file is not in the deleted directories - * and is not shadowed. - */ - if (in->parent && - !in->is_shadowed && - in->parent->obj_id != YAFFS_OBJECTID_UNLINKED && - in->parent->obj_id != YAFFS_OBJECTID_DELETED) - yaffs_update_oh(in, NULL, 0, 0, 0, NULL); - - return YAFFS_OK; -} - -int yaffs_flush_file(struct yaffs_obj *in, int update_time, int data_sync) -{ - if (!in->dirty) - return YAFFS_OK; - - yaffs_flush_file_cache(in); - - if (data_sync) - return YAFFS_OK; - - if (update_time) - yaffs_load_current_time(in, 0, 0); - - return (yaffs_update_oh(in, NULL, 0, 0, 0, NULL) >= 0) ? - YAFFS_OK : YAFFS_FAIL; -} - -/* yaffs_del_file deletes the whole file data - * and the inode associated with the file. - * It does not delete the links associated with the file. - */ -static int yaffs_unlink_file_if_needed(struct yaffs_obj *in) -{ - int ret_val; - int del_now = 0; - struct yaffs_dev *dev = in->my_dev; - - if (!in->my_inode) - del_now = 1; - - if (del_now) { - ret_val = - yaffs_change_obj_name(in, in->my_dev->del_dir, - _Y("deleted"), 0, 0); - yaffs_trace(YAFFS_TRACE_TRACING, - "yaffs: immediate deletion of file %d", - in->obj_id); - in->deleted = 1; - in->my_dev->n_deleted_files++; - if (dev->param.disable_soft_del || dev->param.is_yaffs2) - yaffs_resize_file(in, 0); - yaffs_soft_del_file(in); - } else { - ret_val = - yaffs_change_obj_name(in, in->my_dev->unlinked_dir, - _Y("unlinked"), 0, 0); - } - return ret_val; -} - -int yaffs_del_file(struct yaffs_obj *in) -{ - int ret_val = YAFFS_OK; - int deleted; /* Need to cache value on stack if in is freed */ - struct yaffs_dev *dev = in->my_dev; - - if (dev->param.disable_soft_del || dev->param.is_yaffs2) - yaffs_resize_file(in, 0); - - if (in->n_data_chunks > 0) { - /* Use soft deletion if there is data in the file. - * That won't be the case if it has been resized to zero. - */ - if (!in->unlinked) - ret_val = yaffs_unlink_file_if_needed(in); - - deleted = in->deleted; - - if (ret_val == YAFFS_OK && in->unlinked && !in->deleted) { - in->deleted = 1; - deleted = 1; - in->my_dev->n_deleted_files++; - yaffs_soft_del_file(in); - } - return deleted ? YAFFS_OK : YAFFS_FAIL; - } else { - /* The file has no data chunks so we toss it immediately */ - yaffs_free_tnode(in->my_dev, in->variant.file_variant.top); - in->variant.file_variant.top = NULL; - yaffs_generic_obj_del(in); - - return YAFFS_OK; - } -} - -int yaffs_is_non_empty_dir(struct yaffs_obj *obj) -{ - return (obj && - obj->variant_type == YAFFS_OBJECT_TYPE_DIRECTORY) && - !(list_empty(&obj->variant.dir_variant.children)); -} - -static int yaffs_del_dir(struct yaffs_obj *obj) -{ - /* First check that the directory is empty. */ - if (yaffs_is_non_empty_dir(obj)) - return YAFFS_FAIL; - - return yaffs_generic_obj_del(obj); -} - -static int yaffs_del_symlink(struct yaffs_obj *in) -{ - kfree(in->variant.symlink_variant.alias); - in->variant.symlink_variant.alias = NULL; - - return yaffs_generic_obj_del(in); -} - -static int yaffs_del_link(struct yaffs_obj *in) -{ - /* remove this hardlink from the list associated with the equivalent - * object - */ - list_del_init(&in->hard_links); - return yaffs_generic_obj_del(in); -} - -int yaffs_del_obj(struct yaffs_obj *obj) -{ - int ret_val = -1; - - switch (obj->variant_type) { - case YAFFS_OBJECT_TYPE_FILE: - ret_val = yaffs_del_file(obj); - break; - case YAFFS_OBJECT_TYPE_DIRECTORY: - if (!list_empty(&obj->variant.dir_variant.dirty)) { - yaffs_trace(YAFFS_TRACE_BACKGROUND, - "Remove object %d from dirty directories", - obj->obj_id); - list_del_init(&obj->variant.dir_variant.dirty); - } - return yaffs_del_dir(obj); - break; - case YAFFS_OBJECT_TYPE_SYMLINK: - ret_val = yaffs_del_symlink(obj); - break; - case YAFFS_OBJECT_TYPE_HARDLINK: - ret_val = yaffs_del_link(obj); - break; - case YAFFS_OBJECT_TYPE_SPECIAL: - ret_val = yaffs_generic_obj_del(obj); - break; - case YAFFS_OBJECT_TYPE_UNKNOWN: - ret_val = 0; - break; /* should not happen. */ - } - return ret_val; -} - -static int yaffs_unlink_worker(struct yaffs_obj *obj) -{ - int del_now = 0; - - if (!obj) - return YAFFS_FAIL; - - if (!obj->my_inode) - del_now = 1; - - yaffs_update_parent(obj->parent); - - if (obj->variant_type == YAFFS_OBJECT_TYPE_HARDLINK) { - return yaffs_del_link(obj); - } else if (!list_empty(&obj->hard_links)) { - /* Curve ball: We're unlinking an object that has a hardlink. - * - * This problem arises because we are not strictly following - * The Linux link/inode model. - * - * We can't really delete the object. - * Instead, we do the following: - * - Select a hardlink. - * - Unhook it from the hard links - * - Move it from its parent directory so that the rename works. - * - Rename the object to the hardlink's name. - * - Delete the hardlink - */ - - struct yaffs_obj *hl; - struct yaffs_obj *parent; - int ret_val; - YCHAR name[YAFFS_MAX_NAME_LENGTH + 1]; - - hl = list_entry(obj->hard_links.next, struct yaffs_obj, - hard_links); - - yaffs_get_obj_name(hl, name, YAFFS_MAX_NAME_LENGTH + 1); - parent = hl->parent; - - list_del_init(&hl->hard_links); - - yaffs_add_obj_to_dir(obj->my_dev->unlinked_dir, hl); - - ret_val = yaffs_change_obj_name(obj, parent, name, 0, 0); - - if (ret_val == YAFFS_OK) - ret_val = yaffs_generic_obj_del(hl); - - return ret_val; - - } else if (del_now) { - switch (obj->variant_type) { - case YAFFS_OBJECT_TYPE_FILE: - return yaffs_del_file(obj); - break; - case YAFFS_OBJECT_TYPE_DIRECTORY: - list_del_init(&obj->variant.dir_variant.dirty); - return yaffs_del_dir(obj); - break; - case YAFFS_OBJECT_TYPE_SYMLINK: - return yaffs_del_symlink(obj); - break; - case YAFFS_OBJECT_TYPE_SPECIAL: - return yaffs_generic_obj_del(obj); - break; - case YAFFS_OBJECT_TYPE_HARDLINK: - case YAFFS_OBJECT_TYPE_UNKNOWN: - default: - return YAFFS_FAIL; - } - } else if (yaffs_is_non_empty_dir(obj)) { - return YAFFS_FAIL; - } else { - return yaffs_change_obj_name(obj, obj->my_dev->unlinked_dir, - _Y("unlinked"), 0, 0); - } -} - -static int yaffs_unlink_obj(struct yaffs_obj *obj) -{ - if (obj && obj->unlink_allowed) - return yaffs_unlink_worker(obj); - - return YAFFS_FAIL; -} - -int yaffs_unlinker(struct yaffs_obj *dir, const YCHAR *name) -{ - struct yaffs_obj *obj; - - obj = yaffs_find_by_name(dir, name); - return yaffs_unlink_obj(obj); -} - -/* Note: - * If old_name is NULL then we take old_dir as the object to be renamed. - */ -int yaffs_rename_obj(struct yaffs_obj *old_dir, const YCHAR *old_name, - struct yaffs_obj *new_dir, const YCHAR *new_name) -{ - struct yaffs_obj *obj = NULL; - struct yaffs_obj *existing_target = NULL; - int force = 0; - int result; - struct yaffs_dev *dev; - - if (!old_dir || old_dir->variant_type != YAFFS_OBJECT_TYPE_DIRECTORY) { - BUG(); - return YAFFS_FAIL; - } - if (!new_dir || new_dir->variant_type != YAFFS_OBJECT_TYPE_DIRECTORY) { - BUG(); - return YAFFS_FAIL; - } - - dev = old_dir->my_dev; - -#ifdef CONFIG_YAFFS_CASE_INSENSITIVE - /* Special case for case insemsitive systems. - * While look-up is case insensitive, the name isn't. - * Therefore we might want to change x.txt to X.txt - */ - if (old_dir == new_dir && - old_name && new_name && - yaffs_strcmp(old_name, new_name) == 0) - force = 1; -#endif - - if (yaffs_strnlen(new_name, YAFFS_MAX_NAME_LENGTH + 1) > - YAFFS_MAX_NAME_LENGTH) - /* ENAMETOOLONG */ - return YAFFS_FAIL; - - if (old_name) - obj = yaffs_find_by_name(old_dir, old_name); - else{ - obj = old_dir; - old_dir = obj->parent; - } - - if (obj && obj->rename_allowed) { - /* Now handle an existing target, if there is one */ - existing_target = yaffs_find_by_name(new_dir, new_name); - if (yaffs_is_non_empty_dir(existing_target)) { - return YAFFS_FAIL; /* ENOTEMPTY */ - } else if (existing_target && existing_target != obj) { - /* Nuke the target first, using shadowing, - * but only if it isn't the same object. - * - * Note we must disable gc here otherwise it can mess - * up the shadowing. - * - */ - dev->gc_disable = 1; - yaffs_change_obj_name(obj, new_dir, new_name, force, - existing_target->obj_id); - existing_target->is_shadowed = 1; - yaffs_unlink_obj(existing_target); - dev->gc_disable = 0; - } - - result = yaffs_change_obj_name(obj, new_dir, new_name, 1, 0); - - yaffs_update_parent(old_dir); - if (new_dir != old_dir) - yaffs_update_parent(new_dir); - - return result; - } - return YAFFS_FAIL; -} - -/*----------------------- Initialisation Scanning ---------------------- */ - -void yaffs_handle_shadowed_obj(struct yaffs_dev *dev, int obj_id, - int backward_scanning) -{ - struct yaffs_obj *obj; - - if (backward_scanning) { - /* Handle YAFFS2 case (backward scanning) - * If the shadowed object exists then ignore. - */ - obj = yaffs_find_by_number(dev, obj_id); - if (obj) - return; - } - - /* Let's create it (if it does not exist) assuming it is a file so that - * it can do shrinking etc. - * We put it in unlinked dir to be cleaned up after the scanning - */ - obj = - yaffs_find_or_create_by_number(dev, obj_id, YAFFS_OBJECT_TYPE_FILE); - if (!obj) - return; - obj->is_shadowed = 1; - yaffs_add_obj_to_dir(dev->unlinked_dir, obj); - obj->variant.file_variant.shrink_size = 0; - obj->valid = 1; /* So that we don't read any other info. */ -} - -void yaffs_link_fixup(struct yaffs_dev *dev, struct list_head *hard_list) -{ - struct list_head *lh; - struct list_head *save; - struct yaffs_obj *hl; - struct yaffs_obj *in; - - list_for_each_safe(lh, save, hard_list) { - hl = list_entry(lh, struct yaffs_obj, hard_links); - in = yaffs_find_by_number(dev, - hl->variant.hardlink_variant.equiv_id); - - if (in) { - /* Add the hardlink pointers */ - hl->variant.hardlink_variant.equiv_obj = in; - list_add(&hl->hard_links, &in->hard_links); - } else { - /* Todo Need to report/handle this better. - * Got a problem... hardlink to a non-existant object - */ - hl->variant.hardlink_variant.equiv_obj = NULL; - INIT_LIST_HEAD(&hl->hard_links); - } - } -} - -static void yaffs_strip_deleted_objs(struct yaffs_dev *dev) -{ - /* - * Sort out state of unlinked and deleted objects after scanning. - */ - struct list_head *i; - struct list_head *n; - struct yaffs_obj *l; - - if (dev->read_only) - return; - - /* Soft delete all the unlinked files */ - list_for_each_safe(i, n, - &dev->unlinked_dir->variant.dir_variant.children) { - l = list_entry(i, struct yaffs_obj, siblings); - yaffs_del_obj(l); - } - - list_for_each_safe(i, n, &dev->del_dir->variant.dir_variant.children) { - l = list_entry(i, struct yaffs_obj, siblings); - yaffs_del_obj(l); - } -} - -/* - * This code iterates through all the objects making sure that they are rooted. - * Any unrooted objects are re-rooted in lost+found. - * An object needs to be in one of: - * - Directly under deleted, unlinked - * - Directly or indirectly under root. - * - * Note: - * This code assumes that we don't ever change the current relationships - * between directories: - * root_dir->parent == unlinked_dir->parent == del_dir->parent == NULL - * lost-n-found->parent == root_dir - * - * This fixes the problem where directories might have inadvertently been - * deleted leaving the object "hanging" without being rooted in the - * directory tree. - */ - -static int yaffs_has_null_parent(struct yaffs_dev *dev, struct yaffs_obj *obj) -{ - return (obj == dev->del_dir || - obj == dev->unlinked_dir || obj == dev->root_dir); -} - -static void yaffs_fix_hanging_objs(struct yaffs_dev *dev) -{ - struct yaffs_obj *obj; - struct yaffs_obj *parent; - int i; - struct list_head *lh; - struct list_head *n; - int depth_limit; - int hanging; - - if (dev->read_only) - return; - - /* Iterate through the objects in each hash entry, - * looking at each object. - * Make sure it is rooted. - */ - - for (i = 0; i < YAFFS_NOBJECT_BUCKETS; i++) { - list_for_each_safe(lh, n, &dev->obj_bucket[i].list) { - obj = list_entry(lh, struct yaffs_obj, hash_link); - parent = obj->parent; - - if (yaffs_has_null_parent(dev, obj)) { - /* These directories are not hanging */ - hanging = 0; - } else if (!parent || - parent->variant_type != - YAFFS_OBJECT_TYPE_DIRECTORY) { - hanging = 1; - } else if (yaffs_has_null_parent(dev, parent)) { - hanging = 0; - } else { - /* - * Need to follow the parent chain to - * see if it is hanging. - */ - hanging = 0; - depth_limit = 100; - - while (parent != dev->root_dir && - parent->parent && - parent->parent->variant_type == - YAFFS_OBJECT_TYPE_DIRECTORY && - depth_limit > 0) { - parent = parent->parent; - depth_limit--; - } - if (parent != dev->root_dir) - hanging = 1; - } - if (hanging) { - yaffs_trace(YAFFS_TRACE_SCAN, - "Hanging object %d moved to lost and found", - obj->obj_id); - yaffs_add_obj_to_dir(dev->lost_n_found, obj); - } - } - } -} - -/* - * Delete directory contents for cleaning up lost and found. - */ -static void yaffs_del_dir_contents(struct yaffs_obj *dir) -{ - struct yaffs_obj *obj; - struct list_head *lh; - struct list_head *n; - - if (dir->variant_type != YAFFS_OBJECT_TYPE_DIRECTORY) - BUG(); - - list_for_each_safe(lh, n, &dir->variant.dir_variant.children) { - obj = list_entry(lh, struct yaffs_obj, siblings); - if (obj->variant_type == YAFFS_OBJECT_TYPE_DIRECTORY) - yaffs_del_dir_contents(obj); - yaffs_trace(YAFFS_TRACE_SCAN, - "Deleting lost_found object %d", - obj->obj_id); - yaffs_unlink_obj(obj); - } -} - -static void yaffs_empty_l_n_f(struct yaffs_dev *dev) -{ - yaffs_del_dir_contents(dev->lost_n_found); -} - -struct yaffs_obj *yaffs_find_by_name(struct yaffs_obj *directory, - const YCHAR *name) -{ - int sum; - struct list_head *i; - YCHAR buffer[YAFFS_MAX_NAME_LENGTH + 1]; - struct yaffs_obj *l; - - if (!name) - return NULL; - - if (!directory) { - yaffs_trace(YAFFS_TRACE_ALWAYS, - "tragedy: yaffs_find_by_name: null pointer directory" - ); - BUG(); - return NULL; - } - if (directory->variant_type != YAFFS_OBJECT_TYPE_DIRECTORY) { - yaffs_trace(YAFFS_TRACE_ALWAYS, - "tragedy: yaffs_find_by_name: non-directory" - ); - BUG(); - } - - sum = yaffs_calc_name_sum(name); - - list_for_each(i, &directory->variant.dir_variant.children) { - l = list_entry(i, struct yaffs_obj, siblings); - - if (l->parent != directory) - BUG(); - - yaffs_check_obj_details_loaded(l); - - /* Special case for lost-n-found */ - if (l->obj_id == YAFFS_OBJECTID_LOSTNFOUND) { - if (!yaffs_strcmp(name, YAFFS_LOSTNFOUND_NAME)) - return l; - } else if (l->sum == sum || l->hdr_chunk <= 0) { - /* LostnFound chunk called Objxxx - * Do a real check - */ - yaffs_get_obj_name(l, buffer, - YAFFS_MAX_NAME_LENGTH + 1); - if (!yaffs_strncmp(name, buffer, YAFFS_MAX_NAME_LENGTH)) - return l; - } - } - return NULL; -} - -/* GetEquivalentObject dereferences any hard links to get to the - * actual object. - */ - -struct yaffs_obj *yaffs_get_equivalent_obj(struct yaffs_obj *obj) -{ - if (obj && obj->variant_type == YAFFS_OBJECT_TYPE_HARDLINK) { - obj = obj->variant.hardlink_variant.equiv_obj; - yaffs_check_obj_details_loaded(obj); - } - return obj; -} - -/* - * A note or two on object names. - * * If the object name is missing, we then make one up in the form objnnn - * - * * ASCII names are stored in the object header's name field from byte zero - * * Unicode names are historically stored starting from byte zero. - * - * Then there are automatic Unicode names... - * The purpose of these is to save names in a way that can be read as - * ASCII or Unicode names as appropriate, thus allowing a Unicode and ASCII - * system to share files. - * - * These automatic unicode are stored slightly differently... - * - If the name can fit in the ASCII character space then they are saved as - * ascii names as per above. - * - If the name needs Unicode then the name is saved in Unicode - * starting at oh->name[1]. - - */ -static void yaffs_fix_null_name(struct yaffs_obj *obj, YCHAR *name, - int buffer_size) -{ - /* Create an object name if we could not find one. */ - if (yaffs_strnlen(name, YAFFS_MAX_NAME_LENGTH) == 0) { - YCHAR local_name[20]; - YCHAR num_string[20]; - YCHAR *x = &num_string[19]; - unsigned v = obj->obj_id; - num_string[19] = 0; - while (v > 0) { - x--; - *x = '0' + (v % 10); - v /= 10; - } - /* make up a name */ - yaffs_strcpy(local_name, YAFFS_LOSTNFOUND_PREFIX); - yaffs_strcat(local_name, x); - yaffs_strncpy(name, local_name, buffer_size - 1); - } -} - -int yaffs_get_obj_name(struct yaffs_obj *obj, YCHAR *name, int buffer_size) -{ - memset(name, 0, buffer_size * sizeof(YCHAR)); - yaffs_check_obj_details_loaded(obj); - if (obj->obj_id == YAFFS_OBJECTID_LOSTNFOUND) { - yaffs_strncpy(name, YAFFS_LOSTNFOUND_NAME, buffer_size - 1); - } else if (obj->short_name[0]) { - yaffs_strcpy(name, obj->short_name); - } else if (obj->hdr_chunk > 0) { - u8 *buffer = yaffs_get_temp_buffer(obj->my_dev); - - struct yaffs_obj_hdr *oh = (struct yaffs_obj_hdr *)buffer; - - memset(buffer, 0, obj->my_dev->data_bytes_per_chunk); - - if (obj->hdr_chunk > 0) { - yaffs_rd_chunk_tags_nand(obj->my_dev, - obj->hdr_chunk, - buffer, NULL); - } - yaffs_load_name_from_oh(obj->my_dev, name, oh->name, - buffer_size); - - yaffs_release_temp_buffer(obj->my_dev, buffer); - } - - yaffs_fix_null_name(obj, name, buffer_size); - - return yaffs_strnlen(name, YAFFS_MAX_NAME_LENGTH); -} - -loff_t yaffs_get_obj_length(struct yaffs_obj *obj) -{ - /* Dereference any hard linking */ - obj = yaffs_get_equivalent_obj(obj); - - if (obj->variant_type == YAFFS_OBJECT_TYPE_FILE) - return obj->variant.file_variant.file_size; - if (obj->variant_type == YAFFS_OBJECT_TYPE_SYMLINK) { - if (!obj->variant.symlink_variant.alias) - return 0; - return yaffs_strnlen(obj->variant.symlink_variant.alias, - YAFFS_MAX_ALIAS_LENGTH); - } else { - /* Only a directory should drop through to here */ - return obj->my_dev->data_bytes_per_chunk; - } -} - -int yaffs_get_obj_link_count(struct yaffs_obj *obj) -{ - int count = 0; - - if (!obj->unlinked) - count++; /* the object itself */ - - /* add the hard links; */ - count += list_count_nodes(&obj->hard_links); - - return count; -} - -int yaffs_get_obj_inode(struct yaffs_obj *obj) -{ - obj = yaffs_get_equivalent_obj(obj); - - return obj->obj_id; -} - -unsigned yaffs_get_obj_type(struct yaffs_obj *obj) -{ - obj = yaffs_get_equivalent_obj(obj); - - switch (obj->variant_type) { - case YAFFS_OBJECT_TYPE_FILE: - return DT_REG; - break; - case YAFFS_OBJECT_TYPE_DIRECTORY: - return DT_DIR; - break; - case YAFFS_OBJECT_TYPE_SYMLINK: - return DT_LNK; - break; - case YAFFS_OBJECT_TYPE_HARDLINK: - return DT_REG; - break; - case YAFFS_OBJECT_TYPE_SPECIAL: - if (S_ISFIFO(obj->yst_mode)) - return DT_FIFO; - if (S_ISCHR(obj->yst_mode)) - return DT_CHR; - if (S_ISBLK(obj->yst_mode)) - return DT_BLK; - if (S_ISSOCK(obj->yst_mode)) - return DT_SOCK; - return DT_REG; - break; - default: - return DT_REG; - break; - } -} - -YCHAR *yaffs_get_symlink_alias(struct yaffs_obj *obj) -{ - obj = yaffs_get_equivalent_obj(obj); - if (obj->variant_type == YAFFS_OBJECT_TYPE_SYMLINK) - return yaffs_clone_str(obj->variant.symlink_variant.alias); - else - return yaffs_clone_str(_Y("")); -} - -/*--------------------------- Initialisation code -------------------------- */ - -static int yaffs_check_dev_fns(const struct yaffs_dev *dev) -{ - /* Common functions, gotta have */ - if (!dev->param.erase_fn || !dev->param.initialise_flash_fn) - return 0; - - /* Can use the "with tags" style interface for yaffs1 or yaffs2 */ - if (dev->param.write_chunk_tags_fn && - dev->param.read_chunk_tags_fn && - !dev->param.write_chunk_fn && - !dev->param.read_chunk_fn && - dev->param.bad_block_fn && dev->param.query_block_fn) - return 1; - - /* Can use the "spare" style interface for yaffs1 */ - if (!dev->param.is_yaffs2 && - !dev->param.write_chunk_tags_fn && - !dev->param.read_chunk_tags_fn && - dev->param.write_chunk_fn && - dev->param.read_chunk_fn && - !dev->param.bad_block_fn && !dev->param.query_block_fn) - return 1; - - return 0; /* bad */ -} - -static int yaffs_create_initial_dir(struct yaffs_dev *dev) -{ - /* Initialise the unlinked, deleted, root and lost+found directories */ - dev->lost_n_found = dev->root_dir = NULL; - dev->unlinked_dir = dev->del_dir = NULL; - dev->unlinked_dir = - yaffs_create_fake_dir(dev, YAFFS_OBJECTID_UNLINKED, S_IFDIR); - dev->del_dir = - yaffs_create_fake_dir(dev, YAFFS_OBJECTID_DELETED, S_IFDIR); - dev->root_dir = - yaffs_create_fake_dir(dev, YAFFS_OBJECTID_ROOT, - YAFFS_ROOT_MODE | S_IFDIR); - dev->lost_n_found = - yaffs_create_fake_dir(dev, YAFFS_OBJECTID_LOSTNFOUND, - YAFFS_LOSTNFOUND_MODE | S_IFDIR); - - if (dev->lost_n_found && dev->root_dir && dev->unlinked_dir - && dev->del_dir) { - yaffs_add_obj_to_dir(dev->root_dir, dev->lost_n_found); - return YAFFS_OK; - } - return YAFFS_FAIL; -} - -int yaffs_guts_initialise(struct yaffs_dev *dev) -{ - int init_failed = 0; - unsigned x; - int bits; - - yaffs_trace(YAFFS_TRACE_TRACING, "yaffs: yaffs_guts_initialise()"); - - /* Check stuff that must be set */ - - if (!dev) { - yaffs_trace(YAFFS_TRACE_ALWAYS, - "yaffs: Need a device" - ); - return YAFFS_FAIL; - } - - if (dev->is_mounted) { - yaffs_trace(YAFFS_TRACE_ALWAYS, "device already mounted"); - return YAFFS_FAIL; - } - - dev->internal_start_block = dev->param.start_block; - dev->internal_end_block = dev->param.end_block; - dev->block_offset = 0; - dev->chunk_offset = 0; - dev->n_free_chunks = 0; - - dev->gc_block = 0; - - if (dev->param.start_block == 0) { - dev->internal_start_block = dev->param.start_block + 1; - dev->internal_end_block = dev->param.end_block + 1; - dev->block_offset = 1; - dev->chunk_offset = dev->param.chunks_per_block; - } - - /* Check geometry parameters. */ - - if ((!dev->param.inband_tags && dev->param.is_yaffs2 && - dev->param.total_bytes_per_chunk < 1024) || - (!dev->param.is_yaffs2 && - dev->param.total_bytes_per_chunk < 512) || - (dev->param.inband_tags && !dev->param.is_yaffs2) || - dev->param.chunks_per_block < 2 || - dev->param.n_reserved_blocks < 2 || - dev->internal_start_block <= 0 || - dev->internal_end_block <= 0 || - dev->internal_end_block <= - (dev->internal_start_block + dev->param.n_reserved_blocks + 2) - ) { - /* otherwise it is too small */ - yaffs_trace(YAFFS_TRACE_ALWAYS, - "NAND geometry problems: chunk size %d, type is yaffs%s, inband_tags %d ", - dev->param.total_bytes_per_chunk, - dev->param.is_yaffs2 ? "2" : "", - dev->param.inband_tags); - return YAFFS_FAIL; - } - - if (yaffs_init_nand(dev) != YAFFS_OK) { - yaffs_trace(YAFFS_TRACE_ALWAYS, "InitialiseNAND failed"); - return YAFFS_FAIL; - } - - /* Sort out space for inband tags, if required */ - if (dev->param.inband_tags) - dev->data_bytes_per_chunk = - dev->param.total_bytes_per_chunk - - sizeof(struct yaffs_packed_tags2_tags_only); - else - dev->data_bytes_per_chunk = dev->param.total_bytes_per_chunk; - - /* Got the right mix of functions? */ - if (!yaffs_check_dev_fns(dev)) { - /* Function missing */ - yaffs_trace(YAFFS_TRACE_ALWAYS, - "device function(s) missing or wrong"); - - return YAFFS_FAIL; - } - - /* Finished with most checks. Further checks happen later on too. */ - - dev->is_mounted = 1; - - /* OK now calculate a few things for the device */ - - /* - * Calculate all the chunk size manipulation numbers: - */ - x = dev->data_bytes_per_chunk; - /* We always use dev->chunk_shift and dev->chunk_div */ - dev->chunk_shift = calc_shifts(x); - x >>= dev->chunk_shift; - dev->chunk_div = x; - /* We only use chunk mask if chunk_div is 1 */ - dev->chunk_mask = (1 << dev->chunk_shift) - 1; - - /* - * Calculate chunk_grp_bits. - * We need to find the next power of 2 > than internal_end_block - */ - - x = dev->param.chunks_per_block * (dev->internal_end_block + 1); - - bits = calc_shifts_ceiling(x); - - /* Set up tnode width if wide tnodes are enabled. */ - if (!dev->param.wide_tnodes_disabled) { - /* bits must be even so that we end up with 32-bit words */ - if (bits & 1) - bits++; - if (bits < 16) - dev->tnode_width = 16; - else - dev->tnode_width = bits; - } else { - dev->tnode_width = 16; - } - - dev->tnode_mask = (1 << dev->tnode_width) - 1; - - /* Level0 Tnodes are 16 bits or wider (if wide tnodes are enabled), - * so if the bitwidth of the - * chunk range we're using is greater than 16 we need - * to figure out chunk shift and chunk_grp_size - */ - - if (bits <= dev->tnode_width) - dev->chunk_grp_bits = 0; - else - dev->chunk_grp_bits = bits - dev->tnode_width; - - dev->tnode_size = (dev->tnode_width * YAFFS_NTNODES_LEVEL0) / 8; - if (dev->tnode_size < sizeof(struct yaffs_tnode)) - dev->tnode_size = sizeof(struct yaffs_tnode); - - dev->chunk_grp_size = 1 << dev->chunk_grp_bits; - - if (dev->param.chunks_per_block < dev->chunk_grp_size) { - /* We have a problem because the soft delete won't work if - * the chunk group size > chunks per block. - * This can be remedied by using larger "virtual blocks". - */ - yaffs_trace(YAFFS_TRACE_ALWAYS, "chunk group too large"); - - return YAFFS_FAIL; - } - - /* Finished verifying the device, continue with initialisation */ - - /* More device initialisation */ - dev->all_gcs = 0; - dev->passive_gc_count = 0; - dev->oldest_dirty_gc_count = 0; - dev->bg_gcs = 0; - dev->gc_block_finder = 0; - dev->buffered_block = -1; - dev->doing_buffered_block_rewrite = 0; - dev->n_deleted_files = 0; - dev->n_bg_deletions = 0; - dev->n_unlinked_files = 0; - dev->n_ecc_fixed = 0; - dev->n_ecc_unfixed = 0; - dev->n_tags_ecc_fixed = 0; - dev->n_tags_ecc_unfixed = 0; - dev->n_erase_failures = 0; - dev->n_erased_blocks = 0; - dev->gc_disable = 0; - dev->has_pending_prioritised_gc = 1; - /* Assume the worst for now, will get fixed on first GC */ - INIT_LIST_HEAD(&dev->dirty_dirs); - dev->oldest_dirty_seq = 0; - dev->oldest_dirty_block = 0; - - /* Initialise temporary buffers and caches. */ - if (!yaffs_init_tmp_buffers(dev)) - init_failed = 1; - - dev->cache = NULL; - dev->gc_cleanup_list = NULL; - - if (!init_failed && dev->param.n_caches > 0) { - int i; - void *buf; - int cache_bytes = - dev->param.n_caches * sizeof(struct yaffs_cache); - - if (dev->param.n_caches > YAFFS_MAX_SHORT_OP_CACHES) - dev->param.n_caches = YAFFS_MAX_SHORT_OP_CACHES; - - dev->cache = kmalloc(cache_bytes, GFP_NOFS); - - buf = (u8 *) dev->cache; - - if (dev->cache) - memset(dev->cache, 0, cache_bytes); - - for (i = 0; i < dev->param.n_caches && buf; i++) { - dev->cache[i].object = NULL; - dev->cache[i].last_use = 0; - dev->cache[i].dirty = 0; - dev->cache[i].data = buf = - kmalloc(dev->param.total_bytes_per_chunk, GFP_NOFS); - } - if (!buf) - init_failed = 1; - - dev->cache_last_use = 0; - } - - dev->cache_hits = 0; - - if (!init_failed) { - dev->gc_cleanup_list = - kmalloc(dev->param.chunks_per_block * sizeof(u32), - GFP_NOFS); - if (!dev->gc_cleanup_list) - init_failed = 1; - } - - if (dev->param.is_yaffs2) - dev->param.use_header_file_size = 1; - - if (!init_failed && !yaffs_init_blocks(dev)) - init_failed = 1; - - yaffs_init_tnodes_and_objs(dev); - - if (!init_failed && !yaffs_create_initial_dir(dev)) - init_failed = 1; - - if (!init_failed && dev->param.is_yaffs2 && - !dev->param.disable_summary && - !yaffs_summary_init(dev)) - init_failed = 1; - - if (!init_failed) { - /* Now scan the flash. */ - if (dev->param.is_yaffs2) { - if (yaffs2_checkpt_restore(dev)) { - yaffs_check_obj_details_loaded(dev->root_dir); - yaffs_trace(YAFFS_TRACE_CHECKPOINT | - YAFFS_TRACE_MOUNT, - "yaffs: restored from checkpoint" - ); - } else { - - /* Clean up the mess caused by an aborted - * checkpoint load then scan backwards. - */ - yaffs_deinit_blocks(dev); - - yaffs_deinit_tnodes_and_objs(dev); - - dev->n_erased_blocks = 0; - dev->n_free_chunks = 0; - dev->alloc_block = -1; - dev->alloc_page = -1; - dev->n_deleted_files = 0; - dev->n_unlinked_files = 0; - dev->n_bg_deletions = 0; - - if (!init_failed && !yaffs_init_blocks(dev)) - init_failed = 1; - - yaffs_init_tnodes_and_objs(dev); - - if (!init_failed - && !yaffs_create_initial_dir(dev)) - init_failed = 1; - - if (!init_failed && !yaffs2_scan_backwards(dev)) - init_failed = 1; - } - } else if (!yaffs1_scan(dev)) { - init_failed = 1; - } - - yaffs_strip_deleted_objs(dev); - yaffs_fix_hanging_objs(dev); - if (dev->param.empty_lost_n_found) - yaffs_empty_l_n_f(dev); - } - - if (init_failed) { - /* Clean up the mess */ - yaffs_trace(YAFFS_TRACE_TRACING, - "yaffs: yaffs_guts_initialise() aborted."); - - yaffs_deinitialise(dev); - return YAFFS_FAIL; - } - - /* Zero out stats */ - dev->n_page_reads = 0; - dev->n_page_writes = 0; - dev->n_erasures = 0; - dev->n_gc_copies = 0; - dev->n_retried_writes = 0; - - dev->n_retired_blocks = 0; - - yaffs_verify_free_chunks(dev); - yaffs_verify_blocks(dev); - - /* Clean up any aborted checkpoint data */ - if (!dev->is_checkpointed && dev->blocks_in_checkpt > 0) - yaffs2_checkpt_invalidate(dev); - - yaffs_trace(YAFFS_TRACE_TRACING, - "yaffs: yaffs_guts_initialise() done."); - return YAFFS_OK; -} - -void yaffs_deinitialise(struct yaffs_dev *dev) -{ - if (dev->is_mounted) { - int i; - - yaffs_deinit_blocks(dev); - yaffs_deinit_tnodes_and_objs(dev); - yaffs_summary_deinit(dev); - - if (dev->param.n_caches > 0 && dev->cache) { - - for (i = 0; i < dev->param.n_caches; i++) { - kfree(dev->cache[i].data); - dev->cache[i].data = NULL; - } - - kfree(dev->cache); - dev->cache = NULL; - } - - kfree(dev->gc_cleanup_list); - - for (i = 0; i < YAFFS_N_TEMP_BUFFERS; i++) - kfree(dev->temp_buffer[i].buffer); - - dev->is_mounted = 0; - - if (dev->param.deinitialise_flash_fn) - dev->param.deinitialise_flash_fn(dev); - } -} - -int yaffs_count_free_chunks(struct yaffs_dev *dev) -{ - int n_free = 0; - int b; - struct yaffs_block_info *blk; - - blk = dev->block_info; - for (b = dev->internal_start_block; b <= dev->internal_end_block; b++) { - switch (blk->block_state) { - case YAFFS_BLOCK_STATE_EMPTY: - case YAFFS_BLOCK_STATE_ALLOCATING: - case YAFFS_BLOCK_STATE_COLLECTING: - case YAFFS_BLOCK_STATE_FULL: - n_free += - (dev->param.chunks_per_block - blk->pages_in_use + - blk->soft_del_pages); - break; - default: - break; - } - blk++; - } - return n_free; -} - -int yaffs_get_n_free_chunks(struct yaffs_dev *dev) -{ - /* This is what we report to the outside world */ - int n_free; - int n_dirty_caches; - int blocks_for_checkpt; - int i; - - n_free = dev->n_free_chunks; - n_free += dev->n_deleted_files; - - /* Now count and subtract the number of dirty chunks in the cache. */ - - for (n_dirty_caches = 0, i = 0; i < dev->param.n_caches; i++) { - if (dev->cache[i].dirty) - n_dirty_caches++; - } - - n_free -= n_dirty_caches; - - n_free -= - ((dev->param.n_reserved_blocks + 1) * dev->param.chunks_per_block); - - /* Now figure checkpoint space and report that... */ - blocks_for_checkpt = yaffs_calc_checkpt_blocks_required(dev); - - n_free -= (blocks_for_checkpt * dev->param.chunks_per_block); - - if (n_free < 0) - n_free = 0; - - return n_free; -} - -/*\ - * Marshalling functions to get loff_t file sizes into aand out of - * object headers. - */ -void yaffs_oh_size_load(struct yaffs_obj_hdr *oh, loff_t fsize) -{ - oh->file_size_low = (fsize & 0xFFFFFFFF); - oh->file_size_high = ((fsize >> 32) & 0xFFFFFFFF); -} - -loff_t yaffs_oh_to_size(struct yaffs_obj_hdr *oh) -{ - loff_t retval; - - if (~(oh->file_size_high)) - retval = (((loff_t) oh->file_size_high) << 32) | - (((loff_t) oh->file_size_low) & 0xFFFFFFFF); - else - retval = (loff_t) oh->file_size_low; - - return retval; -} diff --git a/fs/yaffs2/yaffs_guts.h b/fs/yaffs2/yaffs_guts.h deleted file mode 100644 index f4e7f796bd1..00000000000 --- a/fs/yaffs2/yaffs_guts.h +++ /dev/null @@ -1,969 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -#ifndef __YAFFS_GUTS_H__ -#define __YAFFS_GUTS_H__ - -#include "yportenv.h" - -#define YAFFS_OK 1 -#define YAFFS_FAIL 0 - -/* Give us a Y=0x59, - * Give us an A=0x41, - * Give us an FF=0xff - * Give us an S=0x53 - * And what have we got... - */ -#define YAFFS_MAGIC 0x5941ff53 - -/* - * Tnodes form a tree with the tnodes in "levels" - * Levels greater than 0 hold 8 slots which point to other tnodes. - * Those at level 0 hold 16 slots which point to chunks in NAND. - * - * A maximum level of 8 thust supports files of size up to: - * - * 2^(3*MAX_LEVEL+4) - * - * Thus a max level of 8 supports files with up to 2^^28 chunks which gives - * a maximum file size of arounf 51Gbytees with 2k chunks. - */ -#define YAFFS_NTNODES_LEVEL0 16 -#define YAFFS_TNODES_LEVEL0_BITS 4 -#define YAFFS_TNODES_LEVEL0_MASK 0xf - -#define YAFFS_NTNODES_INTERNAL (YAFFS_NTNODES_LEVEL0 / 2) -#define YAFFS_TNODES_INTERNAL_BITS (YAFFS_TNODES_LEVEL0_BITS - 1) -#define YAFFS_TNODES_INTERNAL_MASK 0x7 -#define YAFFS_TNODES_MAX_LEVEL 8 -#define YAFFS_TNODES_MAX_BITS (YAFFS_TNODES_LEVEL0_BITS + \ - YAFFS_TNODES_INTERNAL_BITS * \ - YAFFS_TNODES_MAX_LEVEL) -#define YAFFS_MAX_CHUNK_ID ((1 << YAFFS_TNODES_MAX_BITS) - 1) - -/* Constants for YAFFS1 mode */ -#define YAFFS_BYTES_PER_SPARE 16 -#define YAFFS_BYTES_PER_CHUNK 512 -#define YAFFS_CHUNK_SIZE_SHIFT 9 -#define YAFFS_CHUNKS_PER_BLOCK 32 -#define YAFFS_BYTES_PER_BLOCK (YAFFS_CHUNKS_PER_BLOCK*YAFFS_BYTES_PER_CHUNK) - -#define YAFFS_MIN_YAFFS2_CHUNK_SIZE 1024 -#define YAFFS_MIN_YAFFS2_SPARE_SIZE 32 - -#define YAFFS_ALLOCATION_NOBJECTS 100 -#define YAFFS_ALLOCATION_NTNODES 100 -#define YAFFS_ALLOCATION_NLINKS 100 - -#define YAFFS_NOBJECT_BUCKETS 256 - -#define YAFFS_OBJECT_SPACE 0x40000 -#define YAFFS_MAX_OBJECT_ID (YAFFS_OBJECT_SPACE - 1) - -/* Binary data version stamps */ -#define YAFFS_SUMMARY_VERSION 1 -#define YAFFS_CHECKPOINT_VERSION 6 - -#ifdef CONFIG_YAFFS_UNICODE -#define YAFFS_MAX_NAME_LENGTH 127 -#define YAFFS_MAX_ALIAS_LENGTH 79 -#else -#define YAFFS_MAX_NAME_LENGTH 255 -#define YAFFS_MAX_ALIAS_LENGTH 159 -#endif - -#define YAFFS_SHORT_NAME_LENGTH 15 - -/* Some special object ids for pseudo objects */ -#define YAFFS_OBJECTID_ROOT 1 -#define YAFFS_OBJECTID_LOSTNFOUND 2 -#define YAFFS_OBJECTID_UNLINKED 3 -#define YAFFS_OBJECTID_DELETED 4 - -/* Fake object Id for summary data */ -#define YAFFS_OBJECTID_SUMMARY 0x10 - -/* Pseudo object ids for checkpointing */ -#define YAFFS_OBJECTID_CHECKPOINT_DATA 0x20 -#define YAFFS_SEQUENCE_CHECKPOINT_DATA 0x21 - -#define YAFFS_MAX_SHORT_OP_CACHES 20 - -#define YAFFS_N_TEMP_BUFFERS 6 - -/* We limit the number attempts at sucessfully saving a chunk of data. - * Small-page devices have 32 pages per block; large-page devices have 64. - * Default to something in the order of 5 to 10 blocks worth of chunks. - */ -#define YAFFS_WR_ATTEMPTS (5*64) - -/* Sequence numbers are used in YAFFS2 to determine block allocation order. - * The range is limited slightly to help distinguish bad numbers from good. - * This also allows us to perhaps in the future use special numbers for - * special purposes. - * EFFFFF00 allows the allocation of 8 blocks/second (~1Mbytes) for 15 years, - * and is a larger number than the lifetime of a 2GB device. - */ -#define YAFFS_LOWEST_SEQUENCE_NUMBER 0x00001000 -#define YAFFS_HIGHEST_SEQUENCE_NUMBER 0xefffff00 - -/* Special sequence number for bad block that failed to be marked bad */ -#define YAFFS_SEQUENCE_BAD_BLOCK 0xffff0000 - -/* ChunkCache is used for short read/write operations.*/ -struct yaffs_cache { - struct yaffs_obj *object; - int chunk_id; - int last_use; - int dirty; - int n_bytes; /* Only valid if the cache is dirty */ - int locked; /* Can't push out or flush while locked. */ - u8 *data; -}; - -/* yaffs1 tags structures in RAM - * NB This uses bitfield. Bitfields should not straddle a u32 boundary - * otherwise the structure size will get blown out. - */ - -struct yaffs_tags { - unsigned chunk_id:20; - unsigned serial_number:2; - unsigned n_bytes_lsb:10; - unsigned obj_id:18; - unsigned ecc:12; - unsigned n_bytes_msb:2; -}; - -union yaffs_tags_union { - struct yaffs_tags as_tags; - u8 as_bytes[8]; -}; - -/* Stuff used for extended tags in YAFFS2 */ - -enum yaffs_ecc_result { - YAFFS_ECC_RESULT_UNKNOWN, - YAFFS_ECC_RESULT_NO_ERROR, - YAFFS_ECC_RESULT_FIXED, - YAFFS_ECC_RESULT_UNFIXED -}; - -enum yaffs_obj_type { - YAFFS_OBJECT_TYPE_UNKNOWN, - YAFFS_OBJECT_TYPE_FILE, - YAFFS_OBJECT_TYPE_SYMLINK, - YAFFS_OBJECT_TYPE_DIRECTORY, - YAFFS_OBJECT_TYPE_HARDLINK, - YAFFS_OBJECT_TYPE_SPECIAL -}; - -#define YAFFS_OBJECT_TYPE_MAX YAFFS_OBJECT_TYPE_SPECIAL - -struct yaffs_ext_tags { - unsigned chunk_used; /* Status of the chunk: used or unused */ - unsigned obj_id; /* If 0 this is not used */ - unsigned chunk_id; /* If 0 this is a header, else a data chunk */ - unsigned n_bytes; /* Only valid for data chunks */ - - /* The following stuff only has meaning when we read */ - enum yaffs_ecc_result ecc_result; - unsigned block_bad; - - /* YAFFS 1 stuff */ - unsigned is_deleted; /* The chunk is marked deleted */ - unsigned serial_number; /* Yaffs1 2-bit serial number */ - - /* YAFFS2 stuff */ - unsigned seq_number; /* The sequence number of this block */ - - /* Extra info if this is an object header (YAFFS2 only) */ - - unsigned extra_available; /* Extra info available if not zero */ - unsigned extra_parent_id; /* The parent object */ - unsigned extra_is_shrink; /* Is it a shrink header? */ - unsigned extra_shadows; /* Does this shadow another object? */ - - enum yaffs_obj_type extra_obj_type; /* What object type? */ - - loff_t extra_file_size; /* Length if it is a file */ - unsigned extra_equiv_id; /* Equivalent object for a hard link */ -}; - -/* Spare structure for YAFFS1 */ -struct yaffs_spare { - u8 tb0; - u8 tb1; - u8 tb2; - u8 tb3; - u8 page_status; /* set to 0 to delete the chunk */ - u8 block_status; - u8 tb4; - u8 tb5; - u8 ecc1[3]; - u8 tb6; - u8 tb7; - u8 ecc2[3]; -}; - -/*Special structure for passing through to mtd */ -struct yaffs_nand_spare { - struct yaffs_spare spare; - int eccres1; - int eccres2; -}; - -/* Block data in RAM */ - -enum yaffs_block_state { - YAFFS_BLOCK_STATE_UNKNOWN = 0, - - YAFFS_BLOCK_STATE_SCANNING, - /* Being scanned */ - - YAFFS_BLOCK_STATE_NEEDS_SCAN, - /* The block might have something on it (ie it is allocating or full, - * perhaps empty) but it needs to be scanned to determine its true - * state. - * This state is only valid during scanning. - * NB We tolerate empty because the pre-scanner might be incapable of - * deciding - * However, if this state is returned on a YAFFS2 device, - * then we expect a sequence number - */ - - YAFFS_BLOCK_STATE_EMPTY, - /* This block is empty */ - - YAFFS_BLOCK_STATE_ALLOCATING, - /* This block is partially allocated. - * At least one page holds valid data. - * This is the one currently being used for page - * allocation. Should never be more than one of these. - * If a block is only partially allocated at mount it is treated as - * full. - */ - - YAFFS_BLOCK_STATE_FULL, - /* All the pages in this block have been allocated. - * If a block was only partially allocated when mounted we treat - * it as fully allocated. - */ - - YAFFS_BLOCK_STATE_DIRTY, - /* The block was full and now all chunks have been deleted. - * Erase me, reuse me. - */ - - YAFFS_BLOCK_STATE_CHECKPOINT, - /* This block is assigned to holding checkpoint data. */ - - YAFFS_BLOCK_STATE_COLLECTING, - /* This block is being garbage collected */ - - YAFFS_BLOCK_STATE_DEAD - /* This block has failed and is not in use */ -}; - -#define YAFFS_NUMBER_OF_BLOCK_STATES (YAFFS_BLOCK_STATE_DEAD + 1) - -struct yaffs_block_info { - - int soft_del_pages:10; /* number of soft deleted pages */ - int pages_in_use:10; /* number of pages in use */ - unsigned block_state:4; /* One of the above block states. */ - /* NB use unsigned because enum is sometimes - * an int */ - u32 needs_retiring:1; /* Data has failed on this block, */ - /*need to get valid data off and retire*/ - u32 skip_erased_check:1;/* Skip the erased check on this block */ - u32 gc_prioritise:1; /* An ECC check or blank check has failed. - Block should be prioritised for GC */ - u32 chunk_error_strikes:3; /* How many times we've had ecc etc - failures on this block and tried to reuse it */ - u32 has_summary:1; /* The block has a summary */ - - u32 has_shrink_hdr:1; /* This block has at least one shrink header */ - u32 seq_number; /* block sequence number for yaffs2 */ - -}; - -/* -------------------------- Object structure -------------------------------*/ -/* This is the object structure as stored on NAND */ - -struct yaffs_obj_hdr { - enum yaffs_obj_type type; - - /* Apply to everything */ - int parent_obj_id; - u16 sum_no_longer_used; /* checksum of name. No longer used */ - YCHAR name[YAFFS_MAX_NAME_LENGTH + 1]; - - /* The following apply to all object types except for hard links */ - u32 yst_mode; /* protection */ - - u32 yst_uid; - u32 yst_gid; - u32 yst_atime; - u32 yst_mtime; - u32 yst_ctime; - - /* File size applies to files only */ - u32 file_size_low; - - /* Equivalent object id applies to hard links only. */ - int equiv_id; - - /* Alias is for symlinks only. */ - YCHAR alias[YAFFS_MAX_ALIAS_LENGTH + 1]; - - u32 yst_rdev; /* stuff for block and char devices (major/min) */ - - u32 win_ctime[2]; - u32 win_atime[2]; - u32 win_mtime[2]; - - u32 inband_shadowed_obj_id; - u32 inband_is_shrink; - - u32 file_size_high; - u32 reserved[1]; - int shadows_obj; /* This object header shadows the - specified object if > 0 */ - - /* is_shrink applies to object headers written when wemake a hole. */ - u32 is_shrink; - -}; - -/*--------------------------- Tnode -------------------------- */ - -struct yaffs_tnode { - struct yaffs_tnode *internal[YAFFS_NTNODES_INTERNAL]; -}; - -/*------------------------ Object -----------------------------*/ -/* An object can be one of: - * - a directory (no data, has children links - * - a regular file (data.... not prunes :->). - * - a symlink [symbolic link] (the alias). - * - a hard link - */ - -struct yaffs_file_var { - loff_t file_size; - loff_t scanned_size; - loff_t shrink_size; - int top_level; - struct yaffs_tnode *top; -}; - -struct yaffs_dir_var { - struct list_head children; /* list of child links */ - struct list_head dirty; /* Entry for list of dirty directories */ -}; - -struct yaffs_symlink_var { - YCHAR *alias; -}; - -struct yaffs_hardlink_var { - struct yaffs_obj *equiv_obj; - u32 equiv_id; -}; - -union yaffs_obj_var { - struct yaffs_file_var file_variant; - struct yaffs_dir_var dir_variant; - struct yaffs_symlink_var symlink_variant; - struct yaffs_hardlink_var hardlink_variant; -}; - -struct yaffs_obj { - u8 deleted:1; /* This should only apply to unlinked files. */ - u8 soft_del:1; /* it has also been soft deleted */ - u8 unlinked:1; /* An unlinked file.*/ - u8 fake:1; /* A fake object has no presence on NAND. */ - u8 rename_allowed:1; /* Some objects cannot be renamed. */ - u8 unlink_allowed:1; - u8 dirty:1; /* the object needs to be written to flash */ - u8 valid:1; /* When the file system is being loaded up, this - * object might be created before the data - * is available - * ie. file data chunks encountered before - * the header. - */ - u8 lazy_loaded:1; /* This object has been lazy loaded and - * is missing some detail */ - - u8 defered_free:1; /* Object is removed from NAND, but is - * still in the inode cache. - * Free of object is defered. - * until the inode is released. - */ - u8 being_created:1; /* This object is still being created - * so skip some verification checks. */ - u8 is_shadowed:1; /* This object is shadowed on the way - * to being renamed. */ - - u8 xattr_known:1; /* We know if this has object has xattribs - * or not. */ - u8 has_xattr:1; /* This object has xattribs. - * Only valid if xattr_known. */ - - u8 serial; /* serial number of chunk in NAND.*/ - u16 sum; /* sum of the name to speed searching */ - - struct yaffs_dev *my_dev; /* The device I'm on */ - - struct list_head hash_link; /* list of objects in hash bucket */ - - struct list_head hard_links; /* hard linked object chain*/ - - /* directory structure stuff */ - /* also used for linking up the free list */ - struct yaffs_obj *parent; - struct list_head siblings; - - /* Where's my object header in NAND? */ - int hdr_chunk; - - int n_data_chunks; /* Number of data chunks for this file. */ - - u32 obj_id; /* the object id value */ - - u32 yst_mode; - - YCHAR short_name[YAFFS_SHORT_NAME_LENGTH + 1]; - -#ifdef CONFIG_YAFFS_WINCE - u32 win_ctime[2]; - u32 win_mtime[2]; - u32 win_atime[2]; -#else - u32 yst_uid; - u32 yst_gid; - u32 yst_atime; - u32 yst_mtime; - u32 yst_ctime; -#endif - - u32 yst_rdev; - - void *my_inode; - - enum yaffs_obj_type variant_type; - - union yaffs_obj_var variant; - -}; - -struct yaffs_obj_bucket { - struct list_head list; - int count; -}; - -/* yaffs_checkpt_obj holds the definition of an object as dumped - * by checkpointing. - */ - -struct yaffs_checkpt_obj { - int struct_type; - u32 obj_id; - u32 parent_id; - int hdr_chunk; - enum yaffs_obj_type variant_type:3; - u8 deleted:1; - u8 soft_del:1; - u8 unlinked:1; - u8 fake:1; - u8 rename_allowed:1; - u8 unlink_allowed:1; - u8 serial; - int n_data_chunks; - loff_t size_or_equiv_obj; -}; - -/*--------------------- Temporary buffers ---------------- - * - * These are chunk-sized working buffers. Each device has a few. - */ - -struct yaffs_buffer { - u8 *buffer; - int in_use; -}; - -/*----------------- Device ---------------------------------*/ - -struct yaffs_param { - const YCHAR *name; - - /* - * Entry parameters set up way early. Yaffs sets up the rest. - * The structure should be zeroed out before use so that unused - * and defualt values are zero. - */ - - int inband_tags; /* Use unband tags */ - u32 total_bytes_per_chunk; /* Should be >= 512, does not need to - be a power of 2 */ - int chunks_per_block; /* does not need to be a power of 2 */ - int spare_bytes_per_chunk; /* spare area size */ - int start_block; /* Start block we're allowed to use */ - int end_block; /* End block we're allowed to use */ - int n_reserved_blocks; /* Tuneable so that we can reduce - * reserved blocks on NOR and RAM. */ - - int n_caches; /* If <= 0, then short op caching is disabled, - * else the number of short op caches. - */ - int use_nand_ecc; /* Flag to decide whether or not to use - * NAND driver ECC on data (yaffs1) */ - int tags_9bytes; /* Use 9 byte tags */ - int no_tags_ecc; /* Flag to decide whether or not to do ECC - * on packed tags (yaffs2) */ - - int is_yaffs2; /* Use yaffs2 mode on this device */ - - int empty_lost_n_found; /* Auto-empty lost+found directory on mount */ - - int refresh_period; /* How often to check for a block refresh */ - - /* Checkpoint control. Can be set before or after initialisation */ - u8 skip_checkpt_rd; - u8 skip_checkpt_wr; - - int enable_xattr; /* Enable xattribs */ - - /* NAND access functions (Must be set before calling YAFFS) */ - - int (*write_chunk_fn) (struct yaffs_dev *dev, - int nand_chunk, const u8 *data, - const struct yaffs_spare *spare); - int (*read_chunk_fn) (struct yaffs_dev *dev, - int nand_chunk, u8 *data, - struct yaffs_spare *spare); - int (*erase_fn) (struct yaffs_dev *dev, int flash_block); - int (*initialise_flash_fn) (struct yaffs_dev *dev); - int (*deinitialise_flash_fn) (struct yaffs_dev *dev); - - /* yaffs2 mode functions */ - int (*write_chunk_tags_fn) (struct yaffs_dev *dev, - int nand_chunk, const u8 *data, - const struct yaffs_ext_tags *tags); - int (*read_chunk_tags_fn) (struct yaffs_dev *dev, - int nand_chunk, u8 *data, - struct yaffs_ext_tags *tags); - int (*bad_block_fn) (struct yaffs_dev *dev, int block_no); - int (*query_block_fn) (struct yaffs_dev *dev, int block_no, - enum yaffs_block_state *state, - u32 *seq_number); - - /* The remove_obj_fn function must be supplied by OS flavours that - * need it. - * yaffs direct uses it to implement the faster readdir. - * Linux uses it to protect the directory during unlocking. - */ - void (*remove_obj_fn) (struct yaffs_obj *obj); - - /* Callback to mark the superblock dirty */ - void (*sb_dirty_fn) (struct yaffs_dev *dev); - - /* Callback to control garbage collection. */ - unsigned (*gc_control) (struct yaffs_dev *dev); - - /* Debug control flags. Don't use unless you know what you're doing */ - int use_header_file_size; /* Flag to determine if we should use - * file sizes from the header */ - int disable_lazy_load; /* Disable lazy loading on this device */ - int wide_tnodes_disabled; /* Set to disable wide tnodes */ - int disable_soft_del; /* yaffs 1 only: Set to disable the use of - * softdeletion. */ - - int defered_dir_update; /* Set to defer directory updates */ - -#ifdef CONFIG_YAFFS_AUTO_UNICODE - int auto_unicode; -#endif - int always_check_erased; /* Force chunk erased check always on */ - - int disable_summary; - - int max_objects; /* - * Set to limit the number of objects created. - * 0 = no limit. - */ -}; - -struct yaffs_dev { - struct yaffs_param param; - - /* Context storage. Holds extra OS specific data for this device */ - - void *os_context; - void *driver_context; - - struct list_head dev_list; - - /* Runtime parameters. Set up by YAFFS. */ - int data_bytes_per_chunk; - - /* Non-wide tnode stuff */ - u16 chunk_grp_bits; /* Number of bits that need to be resolved if - * the tnodes are not wide enough. - */ - u16 chunk_grp_size; /* == 2^^chunk_grp_bits */ - - /* Stuff to support wide tnodes */ - u32 tnode_width; - u32 tnode_mask; - u32 tnode_size; - - /* Stuff for figuring out file offset to chunk conversions */ - u32 chunk_shift; /* Shift value */ - u32 chunk_div; /* Divisor after shifting: 1 for 2^n sizes */ - u32 chunk_mask; /* Mask to use for power-of-2 case */ - - int is_mounted; - int read_only; - int is_checkpointed; - - /* Stuff to support block offsetting to support start block zero */ - int internal_start_block; - int internal_end_block; - int block_offset; - int chunk_offset; - - /* Runtime checkpointing stuff */ - int checkpt_page_seq; /* running sequence number of checkpt pages */ - int checkpt_byte_count; - int checkpt_byte_offs; - u8 *checkpt_buffer; - int checkpt_open_write; - int blocks_in_checkpt; - int checkpt_cur_chunk; - int checkpt_cur_block; - int checkpt_next_block; - int *checkpt_block_list; - int checkpt_max_blocks; - u32 checkpt_sum; - u32 checkpt_xor; - - int checkpoint_blocks_required; /* Number of blocks needed to store - * current checkpoint set */ - - /* Block Info */ - struct yaffs_block_info *block_info; - u8 *chunk_bits; /* bitmap of chunks in use */ - unsigned block_info_alt:1; /* allocated using alternative alloc */ - unsigned chunk_bits_alt:1; /* allocated using alternative alloc */ - int chunk_bit_stride; /* Number of bytes of chunk_bits per block. - * Must be consistent with chunks_per_block. - */ - - int n_erased_blocks; - int alloc_block; /* Current block being allocated off */ - u32 alloc_page; - int alloc_block_finder; /* Used to search for next allocation block */ - - /* Object and Tnode memory management */ - void *allocator; - int n_obj; - int n_tnodes; - - int n_hardlinks; - - struct yaffs_obj_bucket obj_bucket[YAFFS_NOBJECT_BUCKETS]; - u32 bucket_finder; - - int n_free_chunks; - - /* Garbage collection control */ - u32 *gc_cleanup_list; /* objects to delete at the end of a GC. */ - u32 n_clean_ups; - - unsigned has_pending_prioritised_gc; /* We think this device might - have pending prioritised gcs */ - unsigned gc_disable; - unsigned gc_block_finder; - unsigned gc_dirtiest; - unsigned gc_pages_in_use; - unsigned gc_not_done; - unsigned gc_block; - unsigned gc_chunk; - unsigned gc_skip; - struct yaffs_summary_tags *gc_sum_tags; - - /* Special directories */ - struct yaffs_obj *root_dir; - struct yaffs_obj *lost_n_found; - - int buffered_block; /* Which block is buffered here? */ - int doing_buffered_block_rewrite; - - struct yaffs_cache *cache; - int cache_last_use; - - /* Stuff for background deletion and unlinked files. */ - struct yaffs_obj *unlinked_dir; /* Directory where unlinked and deleted - files live. */ - struct yaffs_obj *del_dir; /* Directory where deleted objects are - sent to disappear. */ - struct yaffs_obj *unlinked_deletion; /* Current file being - background deleted. */ - int n_deleted_files; /* Count of files awaiting deletion; */ - int n_unlinked_files; /* Count of unlinked files. */ - int n_bg_deletions; /* Count of background deletions. */ - - /* Temporary buffer management */ - struct yaffs_buffer temp_buffer[YAFFS_N_TEMP_BUFFERS]; - int max_temp; - int temp_in_use; - int unmanaged_buffer_allocs; - int unmanaged_buffer_deallocs; - - /* yaffs2 runtime stuff */ - unsigned seq_number; /* Sequence number of currently - allocating block */ - unsigned oldest_dirty_seq; - unsigned oldest_dirty_block; - - /* Block refreshing */ - int refresh_skip; /* A skip down counter. - * Refresh happens when this gets to zero. */ - - /* Dirty directory handling */ - struct list_head dirty_dirs; /* List of dirty directories */ - - /* Summary */ - int chunks_per_summary; - struct yaffs_summary_tags *sum_tags; - - /* Statistics */ - u32 n_page_writes; - u32 n_page_reads; - u32 n_erasures; - u32 n_erase_failures; - u32 n_gc_copies; - u32 all_gcs; - u32 passive_gc_count; - u32 oldest_dirty_gc_count; - u32 n_gc_blocks; - u32 bg_gcs; - u32 n_retried_writes; - u32 n_retired_blocks; - u32 n_ecc_fixed; - u32 n_ecc_unfixed; - u32 n_tags_ecc_fixed; - u32 n_tags_ecc_unfixed; - u32 n_deletions; - u32 n_unmarked_deletions; - u32 refresh_count; - u32 cache_hits; - u32 tags_used; - u32 summary_used; - -}; - -/* The CheckpointDevice structure holds the device information that changes - *at runtime and must be preserved over unmount/mount cycles. - */ -struct yaffs_checkpt_dev { - int struct_type; - int n_erased_blocks; - int alloc_block; /* Current block being allocated off */ - u32 alloc_page; - int n_free_chunks; - - int n_deleted_files; /* Count of files awaiting deletion; */ - int n_unlinked_files; /* Count of unlinked files. */ - int n_bg_deletions; /* Count of background deletions. */ - - /* yaffs2 runtime stuff */ - unsigned seq_number; /* Sequence number of currently - * allocating block */ - -}; - -struct yaffs_checkpt_validity { - int struct_type; - u32 magic; - u32 version; - u32 head; -}; - -struct yaffs_shadow_fixer { - int obj_id; - int shadowed_id; - struct yaffs_shadow_fixer *next; -}; - -/* Structure for doing xattr modifications */ -struct yaffs_xattr_mod { - int set; /* If 0 then this is a deletion */ - const YCHAR *name; - const void *data; - int size; - int flags; - int result; -}; - -/*----------------------- YAFFS Functions -----------------------*/ - -int yaffs_guts_initialise(struct yaffs_dev *dev); -void yaffs_deinitialise(struct yaffs_dev *dev); - -int yaffs_get_n_free_chunks(struct yaffs_dev *dev); - -int yaffs_rename_obj(struct yaffs_obj *old_dir, const YCHAR * old_name, - struct yaffs_obj *new_dir, const YCHAR * new_name); - -int yaffs_unlinker(struct yaffs_obj *dir, const YCHAR * name); -int yaffs_del_obj(struct yaffs_obj *obj); - -int yaffs_get_obj_name(struct yaffs_obj *obj, YCHAR * name, int buffer_size); -loff_t yaffs_get_obj_length(struct yaffs_obj *obj); -int yaffs_get_obj_inode(struct yaffs_obj *obj); -unsigned yaffs_get_obj_type(struct yaffs_obj *obj); -int yaffs_get_obj_link_count(struct yaffs_obj *obj); - -/* File operations */ -int yaffs_file_rd(struct yaffs_obj *obj, u8 * buffer, loff_t offset, - int n_bytes); -int yaffs_wr_file(struct yaffs_obj *obj, const u8 * buffer, loff_t offset, - int n_bytes, int write_trhrough); -int yaffs_resize_file(struct yaffs_obj *obj, loff_t new_size); - -struct yaffs_obj *yaffs_create_file(struct yaffs_obj *parent, - const YCHAR *name, u32 mode, u32 uid, - u32 gid); - -int yaffs_flush_file(struct yaffs_obj *obj, int update_time, int data_sync); - -/* Flushing and checkpointing */ -void yaffs_flush_whole_cache(struct yaffs_dev *dev); - -int yaffs_checkpoint_save(struct yaffs_dev *dev); -int yaffs_checkpoint_restore(struct yaffs_dev *dev); - -/* Directory operations */ -struct yaffs_obj *yaffs_create_dir(struct yaffs_obj *parent, const YCHAR *name, - u32 mode, u32 uid, u32 gid); -struct yaffs_obj *yaffs_find_by_name(struct yaffs_obj *the_dir, - const YCHAR *name); -struct yaffs_obj *yaffs_find_by_number(struct yaffs_dev *dev, u32 number); - -/* Link operations */ -struct yaffs_obj *yaffs_link_obj(struct yaffs_obj *parent, const YCHAR *name, - struct yaffs_obj *equiv_obj); - -struct yaffs_obj *yaffs_get_equivalent_obj(struct yaffs_obj *obj); - -/* Symlink operations */ -struct yaffs_obj *yaffs_create_symlink(struct yaffs_obj *parent, - const YCHAR *name, u32 mode, u32 uid, - u32 gid, const YCHAR *alias); -YCHAR *yaffs_get_symlink_alias(struct yaffs_obj *obj); - -/* Special inodes (fifos, sockets and devices) */ -struct yaffs_obj *yaffs_create_special(struct yaffs_obj *parent, - const YCHAR *name, u32 mode, u32 uid, - u32 gid, u32 rdev); - -int yaffs_set_xattrib(struct yaffs_obj *obj, const YCHAR *name, - const void *value, int size, int flags); -int yaffs_get_xattrib(struct yaffs_obj *obj, const YCHAR *name, void *value, - int size); -int yaffs_list_xattrib(struct yaffs_obj *obj, char *buffer, int size); -int yaffs_remove_xattrib(struct yaffs_obj *obj, const YCHAR *name); - -/* Special directories */ -struct yaffs_obj *yaffs_root(struct yaffs_dev *dev); -struct yaffs_obj *yaffs_lost_n_found(struct yaffs_dev *dev); - -void yaffs_handle_defered_free(struct yaffs_obj *obj); - -void yaffs_update_dirty_dirs(struct yaffs_dev *dev); - -int yaffs_bg_gc(struct yaffs_dev *dev, unsigned urgency); - -/* Debug dump */ -int yaffs_dump_obj(struct yaffs_obj *obj); - -void yaffs_guts_test(struct yaffs_dev *dev); - -/* A few useful functions to be used within the core files*/ -void yaffs_chunk_del(struct yaffs_dev *dev, int chunk_id, int mark_flash, - int lyn); -int yaffs_check_ff(u8 *buffer, int n_bytes); -void yaffs_handle_chunk_error(struct yaffs_dev *dev, - struct yaffs_block_info *bi); - -u8 *yaffs_get_temp_buffer(struct yaffs_dev *dev); -void yaffs_release_temp_buffer(struct yaffs_dev *dev, u8 *buffer); - -struct yaffs_obj *yaffs_find_or_create_by_number(struct yaffs_dev *dev, - int number, - enum yaffs_obj_type type); -int yaffs_put_chunk_in_file(struct yaffs_obj *in, int inode_chunk, - int nand_chunk, int in_scan); -void yaffs_set_obj_name(struct yaffs_obj *obj, const YCHAR *name); -void yaffs_set_obj_name_from_oh(struct yaffs_obj *obj, - const struct yaffs_obj_hdr *oh); -void yaffs_add_obj_to_dir(struct yaffs_obj *directory, struct yaffs_obj *obj); -YCHAR *yaffs_clone_str(const YCHAR *str); -void yaffs_link_fixup(struct yaffs_dev *dev, struct list_head *hard_list); -void yaffs_block_became_dirty(struct yaffs_dev *dev, int block_no); -int yaffs_update_oh(struct yaffs_obj *in, const YCHAR *name, - int force, int is_shrink, int shadows, - struct yaffs_xattr_mod *xop); -void yaffs_handle_shadowed_obj(struct yaffs_dev *dev, int obj_id, - int backward_scanning); -int yaffs_check_alloc_available(struct yaffs_dev *dev, int n_chunks); -struct yaffs_tnode *yaffs_get_tnode(struct yaffs_dev *dev); -struct yaffs_tnode *yaffs_add_find_tnode_0(struct yaffs_dev *dev, - struct yaffs_file_var *file_struct, - u32 chunk_id, - struct yaffs_tnode *passed_tn); - -int yaffs_do_file_wr(struct yaffs_obj *in, const u8 *buffer, loff_t offset, - int n_bytes, int write_trhrough); -void yaffs_resize_file_down(struct yaffs_obj *obj, loff_t new_size); -void yaffs_skip_rest_of_block(struct yaffs_dev *dev); - -int yaffs_count_free_chunks(struct yaffs_dev *dev); - -struct yaffs_tnode *yaffs_find_tnode_0(struct yaffs_dev *dev, - struct yaffs_file_var *file_struct, - u32 chunk_id); - -u32 yaffs_get_group_base(struct yaffs_dev *dev, struct yaffs_tnode *tn, - unsigned pos); - -int yaffs_is_non_empty_dir(struct yaffs_obj *obj); - -void yaffs_addr_to_chunk(struct yaffs_dev *dev, loff_t addr, - int *chunk_out, u32 *offset_out); -/* - * Marshalling functions to get loff_t file sizes into aand out of - * object headers. - */ -void yaffs_oh_size_load(struct yaffs_obj_hdr *oh, loff_t fsize); -loff_t yaffs_oh_to_size(struct yaffs_obj_hdr *oh); -loff_t yaffs_max_file_size(struct yaffs_dev *dev); - -#endif diff --git a/fs/yaffs2/yaffs_mtdif.c b/fs/yaffs2/yaffs_mtdif.c deleted file mode 100644 index d4af0a329ee..00000000000 --- a/fs/yaffs2/yaffs_mtdif.c +++ /dev/null @@ -1,159 +0,0 @@ -/* - * YAFFS: Yet Another Flash File System. A NAND-flash specific file system. - * - * Copyright (C) 2002-2007 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/* XXX U-BOOT XXX */ - -#include "yportenv.h" - -#include "yaffs_mtdif.h" - -#include <linux/mtd/mtd.h> -#include <linux/types.h> -#include <linux/time.h> -#include <linux/mtd/rawnand.h> - -static inline void translate_spare2oob(const struct yaffs_spare *spare, u8 *oob) -{ - oob[0] = spare->tb0; - oob[1] = spare->tb1; - oob[2] = spare->tb2; - oob[3] = spare->tb3; - oob[4] = spare->tb4; - oob[5] = spare->tb5 & 0x3f; - oob[5] |= spare->block_status == 'Y' ? 0 : 0x80; - oob[5] |= spare->page_status == 0 ? 0 : 0x40; - oob[6] = spare->tb6; - oob[7] = spare->tb7; -} - -static inline void translate_oob2spare(struct yaffs_spare *spare, u8 *oob) -{ - struct yaffs_nand_spare *nspare = (struct yaffs_nand_spare *)spare; - spare->tb0 = oob[0]; - spare->tb1 = oob[1]; - spare->tb2 = oob[2]; - spare->tb3 = oob[3]; - spare->tb4 = oob[4]; - spare->tb5 = oob[5] == 0xff ? 0xff : oob[5] & 0x3f; - spare->block_status = oob[5] & 0x80 ? 0xff : 'Y'; - spare->page_status = oob[5] & 0x40 ? 0xff : 0; - spare->ecc1[0] = spare->ecc1[1] = spare->ecc1[2] = 0xff; - spare->tb6 = oob[6]; - spare->tb7 = oob[7]; - spare->ecc2[0] = spare->ecc2[1] = spare->ecc2[2] = 0xff; - - nspare->eccres1 = nspare->eccres2 = 0; /* FIXME */ -} - -int nandmtd_WriteChunkToNAND(struct yaffs_dev *dev, int chunkInNAND, - const u8 *data, const struct yaffs_spare *spare) -{ - struct mtd_info *mtd = (struct mtd_info *)(dev->driver_context); - struct mtd_oob_ops ops; - size_t dummy; - int retval = 0; - loff_t addr = ((loff_t) chunkInNAND) * dev->data_bytes_per_chunk; - u8 spareAsBytes[8]; /* OOB */ - - if (data && !spare) - retval = mtd_write(mtd, addr, dev->data_bytes_per_chunk, - &dummy, data); - else if (spare) { - if (dev->param.use_nand_ecc) { - translate_spare2oob(spare, spareAsBytes); - ops.mode = MTD_OPS_AUTO_OOB; - ops.ooblen = 8; /* temp hack */ - } else { - ops.mode = MTD_OPS_RAW; - ops.ooblen = YAFFS_BYTES_PER_SPARE; - } - ops.len = data ? dev->data_bytes_per_chunk : ops.ooblen; - ops.datbuf = (u8 *)data; - ops.ooboffs = 0; - ops.oobbuf = spareAsBytes; - retval = mtd_write_oob(mtd, addr, &ops); - } - - if (retval == 0) - return YAFFS_OK; - else - return YAFFS_FAIL; -} - -int nandmtd_ReadChunkFromNAND(struct yaffs_dev *dev, int chunkInNAND, u8 *data, - struct yaffs_spare *spare) -{ - struct mtd_info *mtd = (struct mtd_info *)(dev->driver_context); - struct mtd_oob_ops ops; - size_t dummy; - int retval = 0; - - loff_t addr = ((loff_t) chunkInNAND) * dev->data_bytes_per_chunk; - u8 spareAsBytes[8]; /* OOB */ - - if (data && !spare) - retval = mtd_read(mtd, addr, dev->data_bytes_per_chunk, - &dummy, data); - else if (spare) { - if (dev->param.use_nand_ecc) { - ops.mode = MTD_OPS_AUTO_OOB; - ops.ooblen = 8; /* temp hack */ - } else { - ops.mode = MTD_OPS_RAW; - ops.ooblen = YAFFS_BYTES_PER_SPARE; - } - ops.len = data ? dev->data_bytes_per_chunk : ops.ooblen; - ops.datbuf = data; - ops.ooboffs = 0; - ops.oobbuf = spareAsBytes; - retval = mtd_read_oob(mtd, addr, &ops); - if (dev->param.use_nand_ecc) - translate_oob2spare(spare, spareAsBytes); - } - - if (retval == 0) - return YAFFS_OK; - else - return YAFFS_FAIL; -} - -int nandmtd_EraseBlockInNAND(struct yaffs_dev *dev, int blockNumber) -{ - struct mtd_info *mtd = (struct mtd_info *)(dev->driver_context); - __u32 addr = - ((loff_t) blockNumber) * dev->data_bytes_per_chunk - * dev->param.chunks_per_block; - struct erase_info ei; - int retval = 0; - - ei.mtd = mtd; - ei.addr = addr; - ei.len = dev->data_bytes_per_chunk * dev->param.chunks_per_block; - ei.time = 1000; - ei.retries = 2; - ei.priv = (u_long) dev; - - /* Todo finish off the ei if required */ - - retval = mtd_erase(mtd, &ei); - - if (retval == 0) - return YAFFS_OK; - else - return YAFFS_FAIL; -} - -int nandmtd_InitialiseNAND(struct yaffs_dev *dev) -{ - return YAFFS_OK; -} diff --git a/fs/yaffs2/yaffs_mtdif.h b/fs/yaffs2/yaffs_mtdif.h deleted file mode 100644 index 1a125823b60..00000000000 --- a/fs/yaffs2/yaffs_mtdif.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2007 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -#ifndef __YAFFS_MTDIF_H__ -#define __YAFFS_MTDIF_H__ - -#include "yaffs_guts.h" - -int nandmtd_WriteChunkToNAND(struct yaffs_dev *dev, int chunkInNAND, - const u8 *data, const struct yaffs_spare *spare); -int nandmtd_ReadChunkFromNAND(struct yaffs_dev *dev, int chunkInNAND, u8 *data, - struct yaffs_spare *spare); -int nandmtd_EraseBlockInNAND(struct yaffs_dev *dev, int blockNumber); -int nandmtd_InitialiseNAND(struct yaffs_dev *dev); -#endif diff --git a/fs/yaffs2/yaffs_mtdif2.c b/fs/yaffs2/yaffs_mtdif2.c deleted file mode 100644 index f21f15bfbd8..00000000000 --- a/fs/yaffs2/yaffs_mtdif2.c +++ /dev/null @@ -1,230 +0,0 @@ -/* - * YAFFS: Yet Another Flash File System. A NAND-flash specific file system. - * - * Copyright (C) 2002-2007 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/* mtd interface for YAFFS2 */ - -/* XXX U-BOOT XXX */ -#include <linux/bug.h> -#include <linux/errno.h> - -#include "yportenv.h" -#include "yaffs_trace.h" - -#include "yaffs_mtdif2.h" - -#include <linux/mtd/mtd.h> -#include <linux/types.h> -#include <linux/time.h> - -#include "yaffs_trace.h" -#include "yaffs_packedtags2.h" - -#define yaffs_dev_to_mtd(dev) ((struct mtd_info *)((dev)->driver_context)) -#define yaffs_dev_to_lc(dev) ((struct yaffs_linux_context *)((dev)->os_context)) - -/* NB For use with inband tags.... - * We assume that the data buffer is of size total_bytes_per_chunk so - * that we can also use it to load the tags. - */ -int nandmtd2_write_chunk_tags(struct yaffs_dev *dev, int nand_chunk, - const u8 *data, - const struct yaffs_ext_tags *tags) -{ - struct mtd_info *mtd = yaffs_dev_to_mtd(dev); - struct mtd_oob_ops ops; - - int retval = 0; - loff_t addr; - - struct yaffs_packed_tags2 pt; - - int packed_tags_size = - dev->param.no_tags_ecc ? sizeof(pt.t) : sizeof(pt); - void *packed_tags_ptr = - dev->param.no_tags_ecc ? (void *)&pt.t : (void *)&pt; - - yaffs_trace(YAFFS_TRACE_MTD, - "nandmtd2_write_chunk_tags chunk %d data %p tags %p", - nand_chunk, data, tags); - - addr = ((loff_t) nand_chunk) * dev->param.total_bytes_per_chunk; - - /* For yaffs2 writing there must be both data and tags. - * If we're using inband tags, then the tags are stuffed into - * the end of the data buffer. - */ - if (!data || !tags) - BUG(); - else if (dev->param.inband_tags) { - struct yaffs_packed_tags2_tags_only *pt2tp; - pt2tp = - (struct yaffs_packed_tags2_tags_only *)(data + - dev-> - data_bytes_per_chunk); - yaffs_pack_tags2_tags_only(pt2tp, tags); - } else { - yaffs_pack_tags2(&pt, tags, !dev->param.no_tags_ecc); - } - - ops.mode = MTD_OPS_AUTO_OOB; - ops.ooblen = (dev->param.inband_tags) ? 0 : packed_tags_size; - ops.len = dev->param.total_bytes_per_chunk; - ops.ooboffs = 0; - ops.datbuf = (u8 *) data; - ops.oobbuf = (dev->param.inband_tags) ? NULL : packed_tags_ptr; - retval = mtd_write_oob(mtd, addr, &ops); - - if (retval == 0) - return YAFFS_OK; - else - return YAFFS_FAIL; -} - -int nandmtd2_read_chunk_tags(struct yaffs_dev *dev, int nand_chunk, - u8 *data, struct yaffs_ext_tags *tags) -{ - struct mtd_info *mtd = yaffs_dev_to_mtd(dev); - u8 local_spare[128]; - struct mtd_oob_ops ops; - size_t dummy; - int retval = 0; - int local_data = 0; - struct yaffs_packed_tags2 pt; - loff_t addr = ((loff_t) nand_chunk) * dev->param.total_bytes_per_chunk; - int packed_tags_size = - dev->param.no_tags_ecc ? sizeof(pt.t) : sizeof(pt); - void *packed_tags_ptr = - dev->param.no_tags_ecc ? (void *)&pt.t : (void *)&pt; - - yaffs_trace(YAFFS_TRACE_MTD, - "nandmtd2_read_chunk_tags chunk %d data %p tags %p", - nand_chunk, data, tags); - - if (dev->param.inband_tags) { - - if (!data) { - local_data = 1; - data = yaffs_get_temp_buffer(dev); - } - - } - - if (dev->param.inband_tags || (data && !tags)) - retval = mtd_read(mtd, addr, dev->param.total_bytes_per_chunk, - &dummy, data); - else if (tags) { - ops.mode = MTD_OPS_AUTO_OOB; - ops.ooblen = packed_tags_size; - ops.len = data ? dev->data_bytes_per_chunk : packed_tags_size; - ops.ooboffs = 0; - ops.datbuf = data; - ops.oobbuf = local_spare; - retval = mtd_read_oob(mtd, addr, &ops); - } - - if (dev->param.inband_tags) { - if (tags) { - struct yaffs_packed_tags2_tags_only *pt2tp; - pt2tp = - (struct yaffs_packed_tags2_tags_only *) - &data[dev->data_bytes_per_chunk]; - yaffs_unpack_tags2_tags_only(tags, pt2tp); - } - } else { - if (tags) { - memcpy(packed_tags_ptr, - local_spare, - packed_tags_size); - yaffs_unpack_tags2(tags, &pt, !dev->param.no_tags_ecc); - } - } - - if (local_data) - yaffs_release_temp_buffer(dev, data); - - if (tags && retval == -EBADMSG - && tags->ecc_result == YAFFS_ECC_RESULT_NO_ERROR) { - tags->ecc_result = YAFFS_ECC_RESULT_UNFIXED; - dev->n_ecc_unfixed++; - } - if (tags && retval == -EUCLEAN - && tags->ecc_result == YAFFS_ECC_RESULT_NO_ERROR) { - tags->ecc_result = YAFFS_ECC_RESULT_FIXED; - dev->n_ecc_fixed++; - } - if (retval == 0) - return YAFFS_OK; - else - return YAFFS_FAIL; -} - -int nandmtd2_MarkNANDBlockBad(struct yaffs_dev *dev, int blockNo) -{ - struct mtd_info *mtd = (struct mtd_info *)(dev->driver_context); - int retval; - - yaffs_trace(YAFFS_TRACE_MTD, - "nandmtd2_MarkNANDBlockBad %d", blockNo); - - retval = - mtd_block_markbad(mtd, - blockNo * dev->param.chunks_per_block * - dev->data_bytes_per_chunk); - - if (retval == 0) - return YAFFS_OK; - else - return YAFFS_FAIL; - -} - -int nandmtd2_QueryNANDBlock(struct yaffs_dev *dev, int blockNo, - enum yaffs_block_state *state, u32 *sequenceNumber) -{ - struct mtd_info *mtd = (struct mtd_info *)(dev->driver_context); - int retval; - - yaffs_trace(YAFFS_TRACE_MTD, "nandmtd2_QueryNANDBlock %d", blockNo); - retval = - mtd_block_isbad(mtd, - blockNo * dev->param.chunks_per_block * - dev->data_bytes_per_chunk); - - if (retval) { - yaffs_trace(YAFFS_TRACE_MTD, "block is bad"); - - *state = YAFFS_BLOCK_STATE_DEAD; - *sequenceNumber = 0; - } else { - struct yaffs_ext_tags t; - nandmtd2_read_chunk_tags(dev, - blockNo * - dev->param.chunks_per_block, NULL, - &t); - - if (t.chunk_used) { - *sequenceNumber = t.seq_number; - *state = YAFFS_BLOCK_STATE_NEEDS_SCAN; - } else { - *sequenceNumber = 0; - *state = YAFFS_BLOCK_STATE_EMPTY; - } - } - yaffs_trace(YAFFS_TRACE_MTD, "block is bad seq %d state %d", - *sequenceNumber, *state); - - if (retval == 0) - return YAFFS_OK; - else - return YAFFS_FAIL; -} diff --git a/fs/yaffs2/yaffs_mtdif2.h b/fs/yaffs2/yaffs_mtdif2.h deleted file mode 100644 index 62be1736330..00000000000 --- a/fs/yaffs2/yaffs_mtdif2.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2007 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -#ifndef __YAFFS_MTDIF2_H__ -#define __YAFFS_MTDIF2_H__ - -#include "yaffs_guts.h" - -int nandmtd2_write_chunk_tags(struct yaffs_dev *dev, int chunkInNAND, - const u8 *data, - const struct yaffs_ext_tags *tags); -int nandmtd2_read_chunk_tags(struct yaffs_dev *dev, int chunkInNAND, - u8 *data, struct yaffs_ext_tags *tags); -int nandmtd2_MarkNANDBlockBad(struct yaffs_dev *dev, int blockNo); -int nandmtd2_QueryNANDBlock(struct yaffs_dev *dev, int blockNo, - enum yaffs_block_state *state, u32 *sequenceNumber); - -#endif diff --git a/fs/yaffs2/yaffs_nameval.c b/fs/yaffs2/yaffs_nameval.c deleted file mode 100644 index a20a3e47cea..00000000000 --- a/fs/yaffs2/yaffs_nameval.c +++ /dev/null @@ -1,208 +0,0 @@ -/* - * YAFFS: Yet Another Flash File System. A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/* - * This simple implementation of a name-value store assumes a small number of -* values and fits into a small finite buffer. - * - * Each attribute is stored as a record: - * sizeof(int) bytes record size. - * yaffs_strnlen+1 bytes name null terminated. - * nbytes value. - * ---------- - * total size stored in record size - * - * This code has not been tested with unicode yet. - */ - -#include "yaffs_nameval.h" - -#include "yportenv.h" - -static int nval_find(const char *xb, int xb_size, const YCHAR *name, - int *exist_size) -{ - int pos = 0; - int size; - - memcpy(&size, xb, sizeof(int)); - while (size > 0 && (size < xb_size) && (pos + size < xb_size)) { - if (!yaffs_strncmp((YCHAR *) (xb + pos + sizeof(int)), - name, size)) { - if (exist_size) - *exist_size = size; - return pos; - } - pos += size; - if (pos < xb_size - sizeof(int)) - memcpy(&size, xb + pos, sizeof(int)); - else - size = 0; - } - if (exist_size) - *exist_size = 0; - return -ENODATA; -} - -static int nval_used(const char *xb, int xb_size) -{ - int pos = 0; - int size; - - memcpy(&size, xb + pos, sizeof(int)); - while (size > 0 && (size < xb_size) && (pos + size < xb_size)) { - pos += size; - if (pos < xb_size - sizeof(int)) - memcpy(&size, xb + pos, sizeof(int)); - else - size = 0; - } - return pos; -} - -int nval_del(char *xb, int xb_size, const YCHAR *name) -{ - int pos = nval_find(xb, xb_size, name, NULL); - int size; - - if (pos < 0 || pos >= xb_size) - return -ENODATA; - - /* Find size, shift rest over this record, - * then zero out the rest of buffer */ - memcpy(&size, xb + pos, sizeof(int)); - memcpy(xb + pos, xb + pos + size, xb_size - (pos + size)); - memset(xb + (xb_size - size), 0, size); - return 0; -} - -int nval_set(char *xb, int xb_size, const YCHAR *name, const char *buf, - int bsize, int flags) -{ - int pos; - int namelen = yaffs_strnlen(name, xb_size); - int reclen; - int size_exist = 0; - int space; - int start; - - pos = nval_find(xb, xb_size, name, &size_exist); - - if (flags & XATTR_CREATE && pos >= 0) - return -EEXIST; - if (flags & XATTR_REPLACE && pos < 0) - return -ENODATA; - - start = nval_used(xb, xb_size); - space = xb_size - start + size_exist; - - reclen = (sizeof(int) + namelen + 1 + bsize); - - if (reclen > space) - return -ENOSPC; - - if (pos >= 0) { - nval_del(xb, xb_size, name); - start = nval_used(xb, xb_size); - } - - pos = start; - - memcpy(xb + pos, &reclen, sizeof(int)); - pos += sizeof(int); - yaffs_strncpy((YCHAR *) (xb + pos), name, reclen); - pos += (namelen + 1); - memcpy(xb + pos, buf, bsize); - return 0; -} - -int nval_get(const char *xb, int xb_size, const YCHAR * name, char *buf, - int bsize) -{ - int pos = nval_find(xb, xb_size, name, NULL); - int size; - - if (pos >= 0 && pos < xb_size) { - - memcpy(&size, xb + pos, sizeof(int)); - pos += sizeof(int); /* advance past record length */ - size -= sizeof(int); - - /* Advance over name string */ - while (xb[pos] && size > 0 && pos < xb_size) { - pos++; - size--; - } - /*Advance over NUL */ - pos++; - size--; - - /* If bsize is zero then this is a size query. - * Return the size, but don't copy. - */ - if (!bsize) - return size; - - if (size <= bsize) { - memcpy(buf, xb + pos, size); - return size; - } - } - if (pos >= 0) - return -ERANGE; - - return -ENODATA; -} - -int nval_list(const char *xb, int xb_size, char *buf, int bsize) -{ - int pos = 0; - int size; - int name_len; - int ncopied = 0; - int filled = 0; - - memcpy(&size, xb + pos, sizeof(int)); - while (size > sizeof(int) && - size <= xb_size && - (pos + size) < xb_size && - !filled) { - pos += sizeof(int); - size -= sizeof(int); - name_len = yaffs_strnlen((YCHAR *) (xb + pos), size); - if (ncopied + name_len + 1 < bsize) { - memcpy(buf, xb + pos, name_len * sizeof(YCHAR)); - buf += name_len; - *buf = '\0'; - buf++; - if (sizeof(YCHAR) > 1) { - *buf = '\0'; - buf++; - } - ncopied += (name_len + 1); - } else { - filled = 1; - } - pos += size; - if (pos < xb_size - sizeof(int)) - memcpy(&size, xb + pos, sizeof(int)); - else - size = 0; - } - return ncopied; -} - -int nval_hasvalues(const char *xb, int xb_size) -{ - return nval_used(xb, xb_size) > 0; -} diff --git a/fs/yaffs2/yaffs_nameval.h b/fs/yaffs2/yaffs_nameval.h deleted file mode 100644 index 951e64f872b..00000000000 --- a/fs/yaffs2/yaffs_nameval.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -#ifndef __NAMEVAL_H__ -#define __NAMEVAL_H__ - -#include "yportenv.h" - -int nval_del(char *xb, int xb_size, const YCHAR * name); -int nval_set(char *xb, int xb_size, const YCHAR * name, const char *buf, - int bsize, int flags); -int nval_get(const char *xb, int xb_size, const YCHAR * name, char *buf, - int bsize); -int nval_list(const char *xb, int xb_size, char *buf, int bsize); -int nval_hasvalues(const char *xb, int xb_size); -#endif diff --git a/fs/yaffs2/yaffs_nand.c b/fs/yaffs2/yaffs_nand.c deleted file mode 100644 index 165d01004d6..00000000000 --- a/fs/yaffs2/yaffs_nand.c +++ /dev/null @@ -1,120 +0,0 @@ -/* - * YAFFS: Yet Another Flash File System. A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include "yaffs_nand.h" -#include "yaffs_tagscompat.h" - -#include "yaffs_getblockinfo.h" -#include "yaffs_summary.h" - -int yaffs_rd_chunk_tags_nand(struct yaffs_dev *dev, int nand_chunk, - u8 *buffer, struct yaffs_ext_tags *tags) -{ - int result; - struct yaffs_ext_tags local_tags; - int flash_chunk = nand_chunk - dev->chunk_offset; - - dev->n_page_reads++; - - /* If there are no tags provided use local tags. */ - if (!tags) - tags = &local_tags; - - if (dev->param.read_chunk_tags_fn) - result = - dev->param.read_chunk_tags_fn(dev, flash_chunk, buffer, - tags); - else - result = yaffs_tags_compat_rd(dev, - flash_chunk, buffer, tags); - if (tags && tags->ecc_result > YAFFS_ECC_RESULT_NO_ERROR) { - - struct yaffs_block_info *bi; - bi = yaffs_get_block_info(dev, - nand_chunk / - dev->param.chunks_per_block); - yaffs_handle_chunk_error(dev, bi); - } - return result; -} - -int yaffs_wr_chunk_tags_nand(struct yaffs_dev *dev, - int nand_chunk, - const u8 *buffer, struct yaffs_ext_tags *tags) -{ - int result; - int flash_chunk = nand_chunk - dev->chunk_offset; - - dev->n_page_writes++; - - if (tags) { - tags->seq_number = dev->seq_number; - tags->chunk_used = 1; - yaffs_trace(YAFFS_TRACE_WRITE, - "Writing chunk %d tags %d %d", - nand_chunk, tags->obj_id, tags->chunk_id); - } else { - yaffs_trace(YAFFS_TRACE_ERROR, "Writing with no tags"); - BUG(); - return YAFFS_FAIL; - } - - if (dev->param.write_chunk_tags_fn) - result = dev->param.write_chunk_tags_fn(dev, flash_chunk, - buffer, tags); - else - result = yaffs_tags_compat_wr(dev, flash_chunk, buffer, tags); - - yaffs_summary_add(dev, tags, nand_chunk); - - return result; -} - -int yaffs_mark_bad(struct yaffs_dev *dev, int block_no) -{ - block_no -= dev->block_offset; - if (dev->param.bad_block_fn) - return dev->param.bad_block_fn(dev, block_no); - - return yaffs_tags_compat_mark_bad(dev, block_no); -} - -int yaffs_query_init_block_state(struct yaffs_dev *dev, - int block_no, - enum yaffs_block_state *state, - u32 *seq_number) -{ - block_no -= dev->block_offset; - if (dev->param.query_block_fn) - return dev->param.query_block_fn(dev, block_no, state, - seq_number); - - return yaffs_tags_compat_query_block(dev, block_no, state, seq_number); -} - -int yaffs_erase_block(struct yaffs_dev *dev, int flash_block) -{ - int result; - - flash_block -= dev->block_offset; - dev->n_erasures++; - result = dev->param.erase_fn(dev, flash_block); - return result; -} - -int yaffs_init_nand(struct yaffs_dev *dev) -{ - if (dev->param.initialise_flash_fn) - return dev->param.initialise_flash_fn(dev); - return YAFFS_OK; -} diff --git a/fs/yaffs2/yaffs_nand.h b/fs/yaffs2/yaffs_nand.h deleted file mode 100644 index 71346627fc0..00000000000 --- a/fs/yaffs2/yaffs_nand.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -#ifndef __YAFFS_NAND_H__ -#define __YAFFS_NAND_H__ -#include "yaffs_guts.h" - -int yaffs_rd_chunk_tags_nand(struct yaffs_dev *dev, int nand_chunk, - u8 *buffer, struct yaffs_ext_tags *tags); - -int yaffs_wr_chunk_tags_nand(struct yaffs_dev *dev, - int nand_chunk, - const u8 *buffer, struct yaffs_ext_tags *tags); - -int yaffs_mark_bad(struct yaffs_dev *dev, int block_no); - -int yaffs_query_init_block_state(struct yaffs_dev *dev, - int block_no, - enum yaffs_block_state *state, - unsigned *seq_number); - -int yaffs_erase_block(struct yaffs_dev *dev, int flash_block); - -int yaffs_init_nand(struct yaffs_dev *dev); - -#endif diff --git a/fs/yaffs2/yaffs_nandemul2k.h b/fs/yaffs2/yaffs_nandemul2k.h deleted file mode 100644 index cb0c4e64de2..00000000000 --- a/fs/yaffs2/yaffs_nandemul2k.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -/* Interface to emulated NAND functions (2k page size) */ - -#ifndef __YAFFS_NANDEMUL2K_H__ -#define __YAFFS_NANDEMUL2K_H__ - -#include "yaffs_guts.h" - -int nandemul2k_WriteChunkWithTagsToNAND(struct yaffs_dev *dev, - int nand_chunk, const u8 *data, - const struct yaffs_ext_tags *tags); -int nandemul2k_ReadChunkWithTagsFromNAND(struct yaffs_dev *dev, - int nand_chunk, u8 *data, - struct yaffs_ext_tags *tags); -int nandemul2k_MarkNANDBlockBad(struct yaffs_dev *dev, int block_no); -int nandemul2k_QueryNANDBlock(struct yaffs_dev *dev, int block_no, - enum yaffs_block_state *state, u32 *seq_number); -int nandemul2k_EraseBlockInNAND(struct yaffs_dev *dev, - int flash_block); -int nandemul2k_InitialiseNAND(struct yaffs_dev *dev); -int nandemul2k_GetBytesPerChunk(void); -int nandemul2k_GetChunksPerBlock(void); -int nandemul2k_GetNumberOfBlocks(void); - -#endif diff --git a/fs/yaffs2/yaffs_nandif.c b/fs/yaffs2/yaffs_nandif.c deleted file mode 100644 index 632f4275518..00000000000 --- a/fs/yaffs2/yaffs_nandif.c +++ /dev/null @@ -1,246 +0,0 @@ -/* - * YAFFS: Yet Another Flash File System. A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include "yportenv.h" -#include "yaffs_guts.h" -#include <malloc.h> - -#include "yaffs_nandif.h" -#include "yaffs_packedtags2.h" - -#include "yramsim.h" - -#include "yaffs_trace.h" -#include "yaffsfs.h" - -/* NB For use with inband tags.... - * We assume that the data buffer is of size totalBytersPerChunk so that - * we can also use it to load the tags. - */ -int ynandif_WriteChunkWithTagsToNAND(struct yaffs_dev *dev, int nand_chunk, - const u8 *data, - const struct yaffs_ext_tags *tags) -{ - - int retval = 0; - struct yaffs_packed_tags2 pt; - void *spare; - unsigned spareSize = 0; - struct ynandif_Geometry *geometry = (struct ynandif_Geometry *)(dev->driver_context); - - yaffs_trace(YAFFS_TRACE_MTD, - "nandmtd2_WriteChunkWithTagsToNAND chunk %d data %p tags %p", - nand_chunk, data, tags); - - /* For yaffs2 writing there must be both data and tags. - * If we're using inband tags, then the tags are stuffed into - * the end of the data buffer. - */ - - if (dev->param.inband_tags) { - struct yaffs_packed_tags2_tags_only *pt2tp; - - pt2tp = (struct yaffs_packed_tags2_tags_only *) - (data + dev->data_bytes_per_chunk); - yaffs_pack_tags2_tags_only(pt2tp, tags); - spare = NULL; - spareSize = 0; - } else { - yaffs_pack_tags2(&pt, tags, !dev->param.no_tags_ecc); - spare = &pt; - spareSize = sizeof(struct yaffs_packed_tags2); - } - - retval = geometry->writeChunk(dev, nand_chunk, - data, dev->param.total_bytes_per_chunk, - spare, spareSize); - - return retval; -} - -int ynandif_ReadChunkWithTagsFromNAND(struct yaffs_dev *dev, int nand_chunk, - u8 *data, struct yaffs_ext_tags *tags) -{ - struct yaffs_packed_tags2 pt; - int localData = 0; - void *spare = NULL; - unsigned spareSize; - int retval = 0; - int eccStatus; /* 0 = ok, 1 = fixed, -1 = unfixed */ - struct ynandif_Geometry *geometry = (struct ynandif_Geometry *)(dev->driver_context); - - yaffs_trace(YAFFS_TRACE_MTD, - "nandmtd2_ReadChunkWithTagsFromNAND chunk %d data %p tags %p", - nand_chunk, data, tags); - - if (!tags) { - spare = NULL; - spareSize = 0; - } else if (dev->param.inband_tags) { - - if (!data) { - localData = 1; - data = yaffs_get_temp_buffer(dev); - } - spare = NULL; - spareSize = 0; - } else { - spare = &pt; - spareSize = sizeof(struct yaffs_packed_tags2); - } - - retval = geometry->readChunk(dev, nand_chunk, - data, - data ? dev->param.total_bytes_per_chunk : 0, - spare, spareSize, - &eccStatus); - - if (dev->param.inband_tags) { - if (tags) { - struct yaffs_packed_tags2_tags_only *pt2tp; - pt2tp = (struct yaffs_packed_tags2_tags_only *) - &data[dev->data_bytes_per_chunk]; - yaffs_unpack_tags2_tags_only(tags, pt2tp); - } - } else { - if (tags) - yaffs_unpack_tags2(tags, &pt, !dev->param.no_tags_ecc); - } - - if (tags && tags->chunk_used) { - if (eccStatus < 0 || - tags->ecc_result == YAFFS_ECC_RESULT_UNFIXED) - tags->ecc_result = YAFFS_ECC_RESULT_UNFIXED; - else if (eccStatus > 0 || - tags->ecc_result == YAFFS_ECC_RESULT_FIXED) - tags->ecc_result = YAFFS_ECC_RESULT_FIXED; - else - tags->ecc_result = YAFFS_ECC_RESULT_NO_ERROR; - } - - if (localData) - yaffs_release_temp_buffer(dev, data); - - return retval; -} - -int ynandif_MarkNANDBlockBad(struct yaffs_dev *dev, int blockId) -{ - struct ynandif_Geometry *geometry = (struct ynandif_Geometry *)(dev->driver_context); - - return geometry->markBlockBad(dev, blockId); -} - -int ynandif_EraseBlockInNAND(struct yaffs_dev *dev, int blockId) -{ - struct ynandif_Geometry *geometry = (struct ynandif_Geometry *)(dev->driver_context); - - return geometry->eraseBlock(dev, blockId); - -} - -static int ynandif_IsBlockOk(struct yaffs_dev *dev, int blockId) -{ - struct ynandif_Geometry *geometry = (struct ynandif_Geometry *)(dev->driver_context); - - return geometry->checkBlockOk(dev, blockId); -} - -int ynandif_QueryNANDBlock(struct yaffs_dev *dev, int blockId, - enum yaffs_block_state *state, u32 *seq_number) -{ - unsigned chunkNo; - struct yaffs_ext_tags tags; - - *seq_number = 0; - - chunkNo = blockId * dev->param.chunks_per_block; - - if (!ynandif_IsBlockOk(dev, blockId)) { - *state = YAFFS_BLOCK_STATE_DEAD; - } else { - ynandif_ReadChunkWithTagsFromNAND(dev, chunkNo, NULL, &tags); - - if (!tags.chunk_used) { - *state = YAFFS_BLOCK_STATE_EMPTY; - } else { - *state = YAFFS_BLOCK_STATE_NEEDS_SCAN; - *seq_number = tags.seq_number; - } - } - - return YAFFS_OK; -} - -int ynandif_InitialiseNAND(struct yaffs_dev *dev) -{ - struct ynandif_Geometry *geometry = (struct ynandif_Geometry *)(dev->driver_context); - - geometry->initialise(dev); - - return YAFFS_OK; -} - -int ynandif_Deinitialise_flash_fn(struct yaffs_dev *dev) -{ - struct ynandif_Geometry *geometry = (struct ynandif_Geometry *)(dev->driver_context); - - geometry->deinitialise(dev); - - return YAFFS_OK; -} - -struct yaffs_dev * - yaffs_add_dev_from_geometry(const YCHAR *name, - const struct ynandif_Geometry *geometry) -{ - YCHAR *clonedName = malloc(sizeof(YCHAR) * - (strnlen(name, YAFFS_MAX_NAME_LENGTH)+1)); - struct yaffs_dev *dev = malloc(sizeof(struct yaffs_dev)); - struct yaffs_param *param; - - if (dev && clonedName) { - memset(dev, 0, sizeof(struct yaffs_dev)); - strcpy(clonedName, name); - - param = &dev->param; - - param->name = clonedName; - param->write_chunk_tags_fn = ynandif_WriteChunkWithTagsToNAND; - param->read_chunk_tags_fn = ynandif_ReadChunkWithTagsFromNAND; - param->erase_fn = ynandif_EraseBlockInNAND; - param->initialise_flash_fn = ynandif_InitialiseNAND; - param->query_block_fn = ynandif_QueryNANDBlock; - param->bad_block_fn = ynandif_MarkNANDBlockBad; - param->n_caches = 20; - param->start_block = geometry->start_block; - param->end_block = geometry->end_block; - param->total_bytes_per_chunk = geometry->dataSize; - param->spare_bytes_per_chunk = geometry->spareSize; - param->inband_tags = geometry->inband_tags; - param->chunks_per_block = geometry->pagesPerBlock; - param->use_nand_ecc = geometry->hasECC; - param->is_yaffs2 = geometry->useYaffs2; - param->n_reserved_blocks = 5; - dev->driver_context = (void *)geometry; - - yaffs_add_device(dev); - - return dev; - } - - free(dev); - free(clonedName); - - return NULL; -} diff --git a/fs/yaffs2/yaffs_nandif.h b/fs/yaffs2/yaffs_nandif.h deleted file mode 100644 index 6454cea20a0..00000000000 --- a/fs/yaffs2/yaffs_nandif.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -#ifndef __YNANDIF_H__ -#define __YNANDIF_H__ - -#include "yaffs_guts.h" - -struct ynandif_Geometry { - unsigned start_block; - unsigned end_block; - unsigned dataSize; - unsigned spareSize; - unsigned pagesPerBlock; - unsigned hasECC; - unsigned inband_tags; - unsigned useYaffs2; - - int (*initialise)(struct yaffs_dev *dev); - int (*deinitialise)(struct yaffs_dev *dev); - - int (*readChunk) (struct yaffs_dev *dev, - unsigned pageId, - unsigned char *data, - unsigned dataLength, - unsigned char *spare, - unsigned spareLength, - int *eccStatus); - /* ECC status is set to 0 for OK, 1 for fixed, -1 for unfixed. */ - - int (*writeChunk)(struct yaffs_dev *dev, - unsigned pageId, - const unsigned char *data, - unsigned dataLength, - const unsigned char *spare, - unsigned spareLength); - - int (*eraseBlock)(struct yaffs_dev *dev, unsigned blockId); - - int (*checkBlockOk)(struct yaffs_dev *dev, unsigned blockId); - int (*markBlockBad)(struct yaffs_dev *dev, unsigned blockId); - - void *privateData; - -}; - -struct yaffs_dev * - yaffs_add_dev_from_geometry(const YCHAR *name, - const struct ynandif_Geometry *geometry); - -#endif diff --git a/fs/yaffs2/yaffs_osglue.h b/fs/yaffs2/yaffs_osglue.h deleted file mode 100644 index c2bb682c92f..00000000000 --- a/fs/yaffs2/yaffs_osglue.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -/* - * Header file for using yaffs in an application via - * a direct interface. - */ - -#ifndef __YAFFS_OSGLUE_H__ -#define __YAFFS_OSGLUE_H__ - -#include "yportenv.h" - -void yaffsfs_Lock(void); -void yaffsfs_Unlock(void); - -u32 yaffsfs_CurrentTime(void); - -void yaffsfs_SetError(int err); - -void *yaffsfs_malloc(size_t size); -void yaffsfs_free(void *ptr); - -void yaffsfs_OSInitialisation(void); - -#endif diff --git a/fs/yaffs2/yaffs_packedtags1.c b/fs/yaffs2/yaffs_packedtags1.c deleted file mode 100644 index dd9a331d8fc..00000000000 --- a/fs/yaffs2/yaffs_packedtags1.c +++ /dev/null @@ -1,56 +0,0 @@ -/* - * YAFFS: Yet Another Flash File System. A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include "yaffs_packedtags1.h" -#include "yportenv.h" - -static const u8 all_ff[20] = { - 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff -}; - -void yaffs_pack_tags1(struct yaffs_packed_tags1 *pt, - const struct yaffs_ext_tags *t) -{ - pt->chunk_id = t->chunk_id; - pt->serial_number = t->serial_number; - pt->n_bytes = t->n_bytes; - pt->obj_id = t->obj_id; - pt->ecc = 0; - pt->deleted = (t->is_deleted) ? 0 : 1; - pt->unused_stuff = 0; - pt->should_be_ff = 0xffffffff; -} - -void yaffs_unpack_tags1(struct yaffs_ext_tags *t, - const struct yaffs_packed_tags1 *pt) -{ - - if (memcmp(all_ff, pt, sizeof(struct yaffs_packed_tags1))) { - t->block_bad = 0; - if (pt->should_be_ff != 0xffffffff) - t->block_bad = 1; - t->chunk_used = 1; - t->obj_id = pt->obj_id; - t->chunk_id = pt->chunk_id; - t->n_bytes = pt->n_bytes; - t->ecc_result = YAFFS_ECC_RESULT_NO_ERROR; - t->is_deleted = (pt->deleted) ? 0 : 1; - t->serial_number = pt->serial_number; - } else { - memset(t, 0, sizeof(struct yaffs_ext_tags)); - } -} diff --git a/fs/yaffs2/yaffs_packedtags1.h b/fs/yaffs2/yaffs_packedtags1.h deleted file mode 100644 index b80f0a5b157..00000000000 --- a/fs/yaffs2/yaffs_packedtags1.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -/* This is used to pack YAFFS1 tags, not YAFFS2 tags. */ - -#ifndef __YAFFS_PACKEDTAGS1_H__ -#define __YAFFS_PACKEDTAGS1_H__ - -#include "yaffs_guts.h" - -struct yaffs_packed_tags1 { - unsigned chunk_id:20; - unsigned serial_number:2; - unsigned n_bytes:10; - unsigned obj_id:18; - unsigned ecc:12; - unsigned deleted:1; - unsigned unused_stuff:1; - unsigned should_be_ff; - -}; - -void yaffs_pack_tags1(struct yaffs_packed_tags1 *pt, - const struct yaffs_ext_tags *t); -void yaffs_unpack_tags1(struct yaffs_ext_tags *t, - const struct yaffs_packed_tags1 *pt); -#endif diff --git a/fs/yaffs2/yaffs_packedtags2.c b/fs/yaffs2/yaffs_packedtags2.c deleted file mode 100644 index e1d18cc33c6..00000000000 --- a/fs/yaffs2/yaffs_packedtags2.c +++ /dev/null @@ -1,197 +0,0 @@ -/* - * YAFFS: Yet Another Flash File System. A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include "yaffs_packedtags2.h" -#include "yportenv.h" -#include "yaffs_trace.h" - -/* This code packs a set of extended tags into a binary structure for - * NAND storage - */ - -/* Some of the information is "extra" struff which can be packed in to - * speed scanning - * This is defined by having the EXTRA_HEADER_INFO_FLAG set. - */ - -/* Extra flags applied to chunk_id */ - -#define EXTRA_HEADER_INFO_FLAG 0x80000000 -#define EXTRA_SHRINK_FLAG 0x40000000 -#define EXTRA_SHADOWS_FLAG 0x20000000 -#define EXTRA_SPARE_FLAGS 0x10000000 - -#define ALL_EXTRA_FLAGS 0xf0000000 - -/* Also, the top 4 bits of the object Id are set to the object type. */ -#define EXTRA_OBJECT_TYPE_SHIFT (28) -#define EXTRA_OBJECT_TYPE_MASK ((0x0f) << EXTRA_OBJECT_TYPE_SHIFT) - -static void yaffs_dump_packed_tags2_tags_only( - const struct yaffs_packed_tags2_tags_only *ptt) -{ - yaffs_trace(YAFFS_TRACE_MTD, - "packed tags obj %d chunk %d byte %d seq %d", - ptt->obj_id, ptt->chunk_id, ptt->n_bytes, ptt->seq_number); -} - -static void yaffs_dump_packed_tags2(const struct yaffs_packed_tags2 *pt) -{ - yaffs_dump_packed_tags2_tags_only(&pt->t); -} - -static void yaffs_dump_tags2(const struct yaffs_ext_tags *t) -{ - yaffs_trace(YAFFS_TRACE_MTD, - "ext.tags eccres %d blkbad %d chused %d obj %d chunk%d byte %d del %d ser %d seq %d", - t->ecc_result, t->block_bad, t->chunk_used, t->obj_id, - t->chunk_id, t->n_bytes, t->is_deleted, t->serial_number, - t->seq_number); - -} - -static int yaffs_check_tags_extra_packable(const struct yaffs_ext_tags *t) -{ - if (t->chunk_id != 0 || !t->extra_available) - return 0; - - /* Check if the file size is too long to store */ - if (t->extra_obj_type == YAFFS_OBJECT_TYPE_FILE && - (t->extra_file_size >> 31) != 0) - return 0; - return 1; -} - -void yaffs_pack_tags2_tags_only(struct yaffs_packed_tags2_tags_only *ptt, - const struct yaffs_ext_tags *t) -{ - ptt->chunk_id = t->chunk_id; - ptt->seq_number = t->seq_number; - ptt->n_bytes = t->n_bytes; - ptt->obj_id = t->obj_id; - - /* Only store extra tags for object headers. - * If it is a file then only store if the file size is short\ - * enough to fit. - */ - if (yaffs_check_tags_extra_packable(t)) { - /* Store the extra header info instead */ - /* We save the parent object in the chunk_id */ - ptt->chunk_id = EXTRA_HEADER_INFO_FLAG | t->extra_parent_id; - if (t->extra_is_shrink) - ptt->chunk_id |= EXTRA_SHRINK_FLAG; - if (t->extra_shadows) - ptt->chunk_id |= EXTRA_SHADOWS_FLAG; - - ptt->obj_id &= ~EXTRA_OBJECT_TYPE_MASK; - ptt->obj_id |= (t->extra_obj_type << EXTRA_OBJECT_TYPE_SHIFT); - - if (t->extra_obj_type == YAFFS_OBJECT_TYPE_HARDLINK) - ptt->n_bytes = t->extra_equiv_id; - else if (t->extra_obj_type == YAFFS_OBJECT_TYPE_FILE) - ptt->n_bytes = (unsigned) t->extra_file_size; - else - ptt->n_bytes = 0; - } - - yaffs_dump_packed_tags2_tags_only(ptt); - yaffs_dump_tags2(t); -} - -void yaffs_pack_tags2(struct yaffs_packed_tags2 *pt, - const struct yaffs_ext_tags *t, int tags_ecc) -{ - yaffs_pack_tags2_tags_only(&pt->t, t); - - if (tags_ecc) - yaffs_ecc_calc_other((unsigned char *)&pt->t, - sizeof(struct yaffs_packed_tags2_tags_only), - &pt->ecc); -} - -void yaffs_unpack_tags2_tags_only(struct yaffs_ext_tags *t, - struct yaffs_packed_tags2_tags_only *ptt) -{ - memset(t, 0, sizeof(struct yaffs_ext_tags)); - - if (ptt->seq_number == 0xffffffff) - return; - - t->block_bad = 0; - t->chunk_used = 1; - t->obj_id = ptt->obj_id; - t->chunk_id = ptt->chunk_id; - t->n_bytes = ptt->n_bytes; - t->is_deleted = 0; - t->serial_number = 0; - t->seq_number = ptt->seq_number; - - /* Do extra header info stuff */ - if (ptt->chunk_id & EXTRA_HEADER_INFO_FLAG) { - t->chunk_id = 0; - t->n_bytes = 0; - - t->extra_available = 1; - t->extra_parent_id = ptt->chunk_id & (~(ALL_EXTRA_FLAGS)); - t->extra_is_shrink = ptt->chunk_id & EXTRA_SHRINK_FLAG ? 1 : 0; - t->extra_shadows = ptt->chunk_id & EXTRA_SHADOWS_FLAG ? 1 : 0; - t->extra_obj_type = ptt->obj_id >> EXTRA_OBJECT_TYPE_SHIFT; - t->obj_id &= ~EXTRA_OBJECT_TYPE_MASK; - - if (t->extra_obj_type == YAFFS_OBJECT_TYPE_HARDLINK) - t->extra_equiv_id = ptt->n_bytes; - else - t->extra_file_size = ptt->n_bytes; - } - yaffs_dump_packed_tags2_tags_only(ptt); - yaffs_dump_tags2(t); -} - -void yaffs_unpack_tags2(struct yaffs_ext_tags *t, struct yaffs_packed_tags2 *pt, - int tags_ecc) -{ - enum yaffs_ecc_result ecc_result = YAFFS_ECC_RESULT_NO_ERROR; - - if (pt->t.seq_number != 0xffffffff && tags_ecc) { - /* Chunk is in use and we need to do ECC */ - - struct yaffs_ecc_other ecc; - int result; - yaffs_ecc_calc_other((unsigned char *)&pt->t, - sizeof(struct yaffs_packed_tags2_tags_only), - &ecc); - result = - yaffs_ecc_correct_other((unsigned char *)&pt->t, - sizeof(struct yaffs_packed_tags2_tags_only), - &pt->ecc, &ecc); - switch (result) { - case 0: - ecc_result = YAFFS_ECC_RESULT_NO_ERROR; - break; - case 1: - ecc_result = YAFFS_ECC_RESULT_FIXED; - break; - case -1: - ecc_result = YAFFS_ECC_RESULT_UNFIXED; - break; - default: - ecc_result = YAFFS_ECC_RESULT_UNKNOWN; - } - } - yaffs_unpack_tags2_tags_only(t, &pt->t); - - t->ecc_result = ecc_result; - - yaffs_dump_packed_tags2(pt); - yaffs_dump_tags2(t); -} diff --git a/fs/yaffs2/yaffs_packedtags2.h b/fs/yaffs2/yaffs_packedtags2.h deleted file mode 100644 index 675e719460a..00000000000 --- a/fs/yaffs2/yaffs_packedtags2.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -/* This is used to pack YAFFS2 tags, not YAFFS1tags. */ - -#ifndef __YAFFS_PACKEDTAGS2_H__ -#define __YAFFS_PACKEDTAGS2_H__ - -#include "yaffs_guts.h" -#include "yaffs_ecc.h" - -struct yaffs_packed_tags2_tags_only { - unsigned seq_number; - unsigned obj_id; - unsigned chunk_id; - unsigned n_bytes; -}; - -struct yaffs_packed_tags2 { - struct yaffs_packed_tags2_tags_only t; - struct yaffs_ecc_other ecc; -}; - -/* Full packed tags with ECC, used for oob tags */ -void yaffs_pack_tags2(struct yaffs_packed_tags2 *pt, - const struct yaffs_ext_tags *t, int tags_ecc); -void yaffs_unpack_tags2(struct yaffs_ext_tags *t, struct yaffs_packed_tags2 *pt, - int tags_ecc); - -/* Only the tags part (no ECC for use with inband tags */ -void yaffs_pack_tags2_tags_only(struct yaffs_packed_tags2_tags_only *pt, - const struct yaffs_ext_tags *t); -void yaffs_unpack_tags2_tags_only(struct yaffs_ext_tags *t, - struct yaffs_packed_tags2_tags_only *pt); -#endif diff --git a/fs/yaffs2/yaffs_qsort.c b/fs/yaffs2/yaffs_qsort.c deleted file mode 100644 index 32c767f3599..00000000000 --- a/fs/yaffs2/yaffs_qsort.c +++ /dev/null @@ -1,141 +0,0 @@ -// SPDX-License-Identifier: BSD-3-Clause -/* - * Copyright (c) 1992, 1993 - * The Regents of the University of California. All rights reserved. - */ - -#include "yportenv.h" -#include <sort.h> -/* #include <linux/string.h> */ - -/* - * Qsort routine from Bentley & McIlroy's "Engineering a Sort Function". - */ -#define swapcode(TYPE, parmi, parmj, n) do { \ - long i = (n) / sizeof(TYPE); \ - register TYPE *pi = (TYPE *) (parmi); \ - register TYPE *pj = (TYPE *) (parmj); \ - do { \ - register TYPE t = *pi; \ - *pi++ = *pj; \ - *pj++ = t; \ - } while (--i > 0); \ -} while (0) - -#define SWAPINIT(a, es) swaptype = ((char *)a - (char *)0) % sizeof(long) || \ - es % sizeof(long) ? 2 : es == sizeof(long) ? 0 : 1; - -static inline void -swapfunc(char *a, char *b, int n, int swaptype) -{ - if (swaptype <= 1) - swapcode(long, a, b, n); - else - swapcode(char, a, b, n); -} - -#define yswap(a, b) do { \ - if (swaptype == 0) { \ - long t = *(long *)(a); \ - *(long *)(a) = *(long *)(b); \ - *(long *)(b) = t; \ - } else \ - swapfunc(a, b, es, swaptype); \ -} while (0) - -#define vecswap(a, b, n) if ((n) > 0) swapfunc(a, b, n, swaptype) - -static inline char * -med3(char *a, char *b, char *c, int (*cmp)(const void *, const void *)) -{ - return cmp(a, b) < 0 ? - (cmp(b, c) < 0 ? b : (cmp(a, c) < 0 ? c : a)) - : (cmp(b, c) > 0 ? b : (cmp(a, c) < 0 ? a : c)); -} - -#ifndef min -#define min(a, b) (((a) < (b)) ? (a) : (b)) -#endif - -void -yaffs_qsort(void *aa, size_t n, size_t es, - int (*cmp)(const void *, const void *)) -{ - char *pa, *pb, *pc, *pd, *pl, *pm, *pn; - int d, r, swaptype, swap_cnt; - register char *a = aa; - -loop: SWAPINIT(a, es); - swap_cnt = 0; - if (n < 7) { - for (pm = (char *)a + es; pm < (char *) a + n * es; pm += es) - for (pl = pm; pl > (char *) a && cmp(pl - es, pl) > 0; - pl -= es) - yswap(pl, pl - es); - return; - } - pm = (char *)a + (n / 2) * es; - if (n > 7) { - pl = (char *)a; - pn = (char *)a + (n - 1) * es; - if (n > 40) { - d = (n / 8) * es; - pl = med3(pl, pl + d, pl + 2 * d, cmp); - pm = med3(pm - d, pm, pm + d, cmp); - pn = med3(pn - 2 * d, pn - d, pn, cmp); - } - pm = med3(pl, pm, pn, cmp); - } - yswap(a, pm); - pa = pb = (char *)a + es; - - pc = pd = (char *)a + (n - 1) * es; - for (;;) { - while (pb <= pc && (r = cmp(pb, a)) <= 0) { - if (r == 0) { - swap_cnt = 1; - yswap(pa, pb); - pa += es; - } - pb += es; - } - while (pb <= pc && (r = cmp(pc, a)) >= 0) { - if (r == 0) { - swap_cnt = 1; - yswap(pc, pd); - pd -= es; - } - pc -= es; - } - if (pb > pc) - break; - yswap(pb, pc); - swap_cnt = 1; - pb += es; - pc -= es; - } - if (swap_cnt == 0) { /* Switch to insertion sort */ - for (pm = (char *) a + es; pm < (char *) a + n * es; pm += es) - for (pl = pm; pl > (char *) a && cmp(pl - es, pl) > 0; - pl -= es) - yswap(pl, pl - es); - return; - } - - pn = (char *)a + n * es; - r = min(pa - (char *)a, pb - pa); - vecswap(a, pb - r, r); - r = min((long)(pd - pc), (long)(pn - pd - es)); - vecswap(pb, pn - r, r); - r = pb - pa; - if (r > es) - yaffs_qsort(a, r / es, es, cmp); - r = pd - pc; - if (r > es) { - /* Iterate rather than recurse to save stack space */ - a = pn - r; - n = r / es; - goto loop; - } -/* yaffs_qsort(pn - r, r / es, es, cmp);*/ -} diff --git a/fs/yaffs2/yaffs_summary.c b/fs/yaffs2/yaffs_summary.c deleted file mode 100644 index 2efd73a0223..00000000000 --- a/fs/yaffs2/yaffs_summary.c +++ /dev/null @@ -1,306 +0,0 @@ -/* - * YAFFS: Yet Another Flash File System. A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/* Summaries write the useful part of the tags for the chunks in a block into an - * an array which is written to the last n chunks of the block. - * Reading the summaries gives all the tags for the block in one read. Much - * faster. - * - * Chunks holding summaries are marked with tags making it look like - * they are part of a fake file. - * - * The summary could also be used during gc. - * - */ - -#include "yaffs_summary.h" -#include "yaffs_packedtags2.h" -#include "yaffs_nand.h" -#include "yaffs_getblockinfo.h" -#include "yaffs_bitmap.h" -#include <dm/devres.h> - -/* - * The summary is built up in an array of summary tags. - * This gets written to the last one or two (maybe more) chunks in a block. - * A summary header is written as the first part of each chunk of summary data. - * The summary header must match or the summary is rejected. - */ - -/* Summary tags don't need the sequence number because that is redundant. */ -struct yaffs_summary_tags { - unsigned obj_id; - unsigned chunk_id; - unsigned n_bytes; -}; - -/* Summary header */ -struct yaffs_summary_header { - unsigned version; /* Must match current version */ - unsigned block; /* Must be this block */ - unsigned seq; /* Must be this sequence number */ - unsigned sum; /* Just add up all the bytes in the tags */ -}; - -static void yaffs_summary_clear(struct yaffs_dev *dev) -{ - if (!dev->sum_tags) - return; - memset(dev->sum_tags, 0, dev->chunks_per_summary * - sizeof(struct yaffs_summary_tags)); -} - -void yaffs_summary_deinit(struct yaffs_dev *dev) -{ - kfree(dev->sum_tags); - dev->sum_tags = NULL; - kfree(dev->gc_sum_tags); - dev->gc_sum_tags = NULL; - dev->chunks_per_summary = 0; -} - -int yaffs_summary_init(struct yaffs_dev *dev) -{ - int sum_bytes; - int chunks_used; /* Number of chunks used by summary */ - int sum_tags_bytes; - - sum_bytes = dev->param.chunks_per_block * - sizeof(struct yaffs_summary_tags); - - chunks_used = (sum_bytes + dev->data_bytes_per_chunk - 1)/ - (dev->data_bytes_per_chunk - - sizeof(struct yaffs_summary_header)); - - dev->chunks_per_summary = dev->param.chunks_per_block - chunks_used; - sum_tags_bytes = sizeof(struct yaffs_summary_tags) * - dev->chunks_per_summary; - dev->sum_tags = kmalloc(sum_tags_bytes, GFP_NOFS); - dev->gc_sum_tags = kmalloc(sum_tags_bytes, GFP_NOFS); - if (!dev->sum_tags || !dev->gc_sum_tags) { - yaffs_summary_deinit(dev); - return YAFFS_FAIL; - } - - yaffs_summary_clear(dev); - - return YAFFS_OK; -} - -static unsigned yaffs_summary_sum(struct yaffs_dev *dev) -{ - u8 *sum_buffer = (u8 *)dev->sum_tags; - int i; - unsigned sum = 0; - - i = sizeof(struct yaffs_summary_tags) * - dev->chunks_per_summary; - while (i > 0) { - sum += *sum_buffer; - sum_buffer++; - i--; - } - - return sum; -} - -static int yaffs_summary_write(struct yaffs_dev *dev, int blk) -{ - struct yaffs_ext_tags tags; - u8 *buffer; - u8 *sum_buffer = (u8 *)dev->sum_tags; - int n_bytes; - int chunk_in_nand; - int chunk_in_block; - int result; - int this_tx; - struct yaffs_summary_header hdr; - int sum_bytes_per_chunk = dev->data_bytes_per_chunk - sizeof(hdr); - struct yaffs_block_info *bi = yaffs_get_block_info(dev, blk); - - buffer = yaffs_get_temp_buffer(dev); - n_bytes = sizeof(struct yaffs_summary_tags) * - dev->chunks_per_summary; - memset(&tags, 0, sizeof(struct yaffs_ext_tags)); - tags.obj_id = YAFFS_OBJECTID_SUMMARY; - tags.chunk_id = 1; - chunk_in_block = dev->chunks_per_summary; - chunk_in_nand = dev->alloc_block * dev->param.chunks_per_block + - dev->chunks_per_summary; - hdr.version = YAFFS_SUMMARY_VERSION; - hdr.block = blk; - hdr.seq = bi->seq_number; - hdr.sum = yaffs_summary_sum(dev); - - do { - this_tx = n_bytes; - if (this_tx > sum_bytes_per_chunk) - this_tx = sum_bytes_per_chunk; - memcpy(buffer, &hdr, sizeof(hdr)); - memcpy(buffer + sizeof(hdr), sum_buffer, this_tx); - tags.n_bytes = this_tx + sizeof(hdr); - result = yaffs_wr_chunk_tags_nand(dev, chunk_in_nand, - buffer, &tags); - - if (result != YAFFS_OK) - break; - yaffs_set_chunk_bit(dev, blk, chunk_in_block); - bi->pages_in_use++; - dev->n_free_chunks--; - - n_bytes -= this_tx; - sum_buffer += this_tx; - chunk_in_nand++; - chunk_in_block++; - tags.chunk_id++; - } while (result == YAFFS_OK && n_bytes > 0); - yaffs_release_temp_buffer(dev, buffer); - - if (result == YAFFS_OK) - bi->has_summary = 1; - - return result; -} - -int yaffs_summary_read(struct yaffs_dev *dev, - struct yaffs_summary_tags *st, - int blk) -{ - struct yaffs_ext_tags tags; - u8 *buffer; - u8 *sum_buffer = (u8 *)st; - int n_bytes; - int chunk_id; - int chunk_in_nand; - int chunk_in_block; - int result; - int this_tx; - struct yaffs_summary_header hdr; - struct yaffs_block_info *bi = yaffs_get_block_info(dev, blk); - int sum_bytes_per_chunk = dev->data_bytes_per_chunk - sizeof(hdr); - - buffer = yaffs_get_temp_buffer(dev); - n_bytes = sizeof(struct yaffs_summary_tags) * dev->chunks_per_summary; - chunk_in_block = dev->chunks_per_summary; - chunk_in_nand = blk * dev->param.chunks_per_block + - dev->chunks_per_summary; - chunk_id = 1; - do { - this_tx = n_bytes; - if (this_tx > sum_bytes_per_chunk) - this_tx = sum_bytes_per_chunk; - result = yaffs_rd_chunk_tags_nand(dev, chunk_in_nand, - buffer, &tags); - - if (tags.chunk_id != chunk_id || - tags.obj_id != YAFFS_OBJECTID_SUMMARY || - tags.chunk_used == 0 || - tags.ecc_result > YAFFS_ECC_RESULT_FIXED || - tags.n_bytes != (this_tx + sizeof(hdr))) - result = YAFFS_FAIL; - if (result != YAFFS_OK) - break; - - if (st == dev->sum_tags) { - /* If we're scanning then update the block info */ - yaffs_set_chunk_bit(dev, blk, chunk_in_block); - bi->pages_in_use++; - } - memcpy(&hdr, buffer, sizeof(hdr)); - memcpy(sum_buffer, buffer + sizeof(hdr), this_tx); - n_bytes -= this_tx; - sum_buffer += this_tx; - chunk_in_nand++; - chunk_in_block++; - chunk_id++; - } while (result == YAFFS_OK && n_bytes > 0); - yaffs_release_temp_buffer(dev, buffer); - - if (result == YAFFS_OK) { - /* Verify header */ - if (hdr.version != YAFFS_SUMMARY_VERSION || - hdr.seq != bi->seq_number || - hdr.sum != yaffs_summary_sum(dev)) - result = YAFFS_FAIL; - } - - if (st == dev->sum_tags && result == YAFFS_OK) - bi->has_summary = 1; - - return result; -} - -int yaffs_summary_add(struct yaffs_dev *dev, - struct yaffs_ext_tags *tags, - int chunk_in_nand) -{ - struct yaffs_packed_tags2_tags_only tags_only; - struct yaffs_summary_tags *sum_tags; - int block_in_nand = chunk_in_nand / dev->param.chunks_per_block; - int chunk_in_block = chunk_in_nand % dev->param.chunks_per_block; - - if (!dev->sum_tags) - return YAFFS_OK; - - if (chunk_in_block >= 0 && chunk_in_block < dev->chunks_per_summary) { - yaffs_pack_tags2_tags_only(&tags_only, tags); - sum_tags = &dev->sum_tags[chunk_in_block]; - sum_tags->chunk_id = tags_only.chunk_id; - sum_tags->n_bytes = tags_only.n_bytes; - sum_tags->obj_id = tags_only.obj_id; - - if (chunk_in_block == dev->chunks_per_summary - 1) { - /* Time to write out the summary */ - yaffs_summary_write(dev, block_in_nand); - yaffs_summary_clear(dev); - yaffs_skip_rest_of_block(dev); - } - } - return YAFFS_OK; -} - -int yaffs_summary_fetch(struct yaffs_dev *dev, - struct yaffs_ext_tags *tags, - int chunk_in_block) -{ - struct yaffs_packed_tags2_tags_only tags_only; - struct yaffs_summary_tags *sum_tags; - if (chunk_in_block >= 0 && chunk_in_block < dev->chunks_per_summary) { - sum_tags = &dev->sum_tags[chunk_in_block]; - tags_only.chunk_id = sum_tags->chunk_id; - tags_only.n_bytes = sum_tags->n_bytes; - tags_only.obj_id = sum_tags->obj_id; - yaffs_unpack_tags2_tags_only(tags, &tags_only); - return YAFFS_OK; - } - return YAFFS_FAIL; -} - -void yaffs_summary_gc(struct yaffs_dev *dev, int blk) -{ - struct yaffs_block_info *bi = yaffs_get_block_info(dev, blk); - int i; - - if (!bi->has_summary) - return; - - for (i = dev->chunks_per_summary; - i < dev->param.chunks_per_block; - i++) { - if (yaffs_check_chunk_bit(dev, blk, i)) { - yaffs_clear_chunk_bit(dev, blk, i); - bi->pages_in_use--; - dev->n_free_chunks++; - } - } -} diff --git a/fs/yaffs2/yaffs_summary.h b/fs/yaffs2/yaffs_summary.h deleted file mode 100644 index e2e027b9257..00000000000 --- a/fs/yaffs2/yaffs_summary.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -#ifndef __YAFFS_SUMMARY_H__ -#define __YAFFS_SUMMARY_H__ - -#include "yaffs_packedtags2.h" - -int yaffs_summary_init(struct yaffs_dev *dev); -void yaffs_summary_deinit(struct yaffs_dev *dev); - -int yaffs_summary_add(struct yaffs_dev *dev, - struct yaffs_ext_tags *tags, - int chunk_in_block); -int yaffs_summary_fetch(struct yaffs_dev *dev, - struct yaffs_ext_tags *tags, - int chunk_in_block); -int yaffs_summary_read(struct yaffs_dev *dev, - struct yaffs_summary_tags *st, - int blk); -void yaffs_summary_gc(struct yaffs_dev *dev, int blk); - -#endif diff --git a/fs/yaffs2/yaffs_tagscompat.c b/fs/yaffs2/yaffs_tagscompat.c deleted file mode 100644 index 1a367fe6985..00000000000 --- a/fs/yaffs2/yaffs_tagscompat.c +++ /dev/null @@ -1,406 +0,0 @@ -/* - * YAFFS: Yet Another Flash File System. A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include "yaffs_guts.h" -#include "yaffs_tagscompat.h" -#include "yaffs_ecc.h" -#include "yaffs_getblockinfo.h" -#include "yaffs_trace.h" - -static void yaffs_handle_rd_data_error(struct yaffs_dev *dev, int nand_chunk); - -/********** Tags ECC calculations *********/ - -void yaffs_calc_ecc(const u8 *data, struct yaffs_spare *spare) -{ - yaffs_ecc_calc(data, spare->ecc1); - yaffs_ecc_calc(&data[256], spare->ecc2); -} - -void yaffs_calc_tags_ecc(struct yaffs_tags *tags) -{ - /* Calculate an ecc */ - unsigned char *b = ((union yaffs_tags_union *)tags)->as_bytes; - unsigned i, j; - unsigned ecc = 0; - unsigned bit = 0; - - tags->ecc = 0; - - for (i = 0; i < 8; i++) { - for (j = 1; j & 0xff; j <<= 1) { - bit++; - if (b[i] & j) - ecc ^= bit; - } - } - tags->ecc = ecc; -} - -int yaffs_check_tags_ecc(struct yaffs_tags *tags) -{ - unsigned ecc = tags->ecc; - - yaffs_calc_tags_ecc(tags); - - ecc ^= tags->ecc; - - if (ecc && ecc <= 64) { - /* TODO: Handle the failure better. Retire? */ - unsigned char *b = ((union yaffs_tags_union *)tags)->as_bytes; - - ecc--; - - b[ecc / 8] ^= (1 << (ecc & 7)); - - /* Now recvalc the ecc */ - yaffs_calc_tags_ecc(tags); - - return 1; /* recovered error */ - } else if (ecc) { - /* Wierd ecc failure value */ - /* TODO Need to do somethiong here */ - return -1; /* unrecovered error */ - } - return 0; -} - -/********** Tags **********/ - -static void yaffs_load_tags_to_spare(struct yaffs_spare *spare_ptr, - struct yaffs_tags *tags_ptr) -{ - union yaffs_tags_union *tu = (union yaffs_tags_union *)tags_ptr; - - yaffs_calc_tags_ecc(tags_ptr); - - spare_ptr->tb0 = tu->as_bytes[0]; - spare_ptr->tb1 = tu->as_bytes[1]; - spare_ptr->tb2 = tu->as_bytes[2]; - spare_ptr->tb3 = tu->as_bytes[3]; - spare_ptr->tb4 = tu->as_bytes[4]; - spare_ptr->tb5 = tu->as_bytes[5]; - spare_ptr->tb6 = tu->as_bytes[6]; - spare_ptr->tb7 = tu->as_bytes[7]; -} - -static void yaffs_get_tags_from_spare(struct yaffs_dev *dev, - struct yaffs_spare *spare_ptr, - struct yaffs_tags *tags_ptr) -{ - union yaffs_tags_union *tu = (union yaffs_tags_union *)tags_ptr; - int result; - - tu->as_bytes[0] = spare_ptr->tb0; - tu->as_bytes[1] = spare_ptr->tb1; - tu->as_bytes[2] = spare_ptr->tb2; - tu->as_bytes[3] = spare_ptr->tb3; - tu->as_bytes[4] = spare_ptr->tb4; - tu->as_bytes[5] = spare_ptr->tb5; - tu->as_bytes[6] = spare_ptr->tb6; - tu->as_bytes[7] = spare_ptr->tb7; - - result = yaffs_check_tags_ecc(tags_ptr); - if (result > 0) - dev->n_tags_ecc_fixed++; - else if (result < 0) - dev->n_tags_ecc_unfixed++; -} - -static void yaffs_spare_init(struct yaffs_spare *spare) -{ - memset(spare, 0xff, sizeof(struct yaffs_spare)); -} - -static int yaffs_wr_nand(struct yaffs_dev *dev, - int nand_chunk, const u8 *data, - struct yaffs_spare *spare) -{ - if (nand_chunk < dev->param.start_block * dev->param.chunks_per_block) { - yaffs_trace(YAFFS_TRACE_ERROR, - "**>> yaffs chunk %d is not valid", - nand_chunk); - return YAFFS_FAIL; - } - - return dev->param.write_chunk_fn(dev, nand_chunk, data, spare); -} - -static int yaffs_rd_chunk_nand(struct yaffs_dev *dev, - int nand_chunk, - u8 *data, - struct yaffs_spare *spare, - enum yaffs_ecc_result *ecc_result, - int correct_errors) -{ - int ret_val; - struct yaffs_spare local_spare; - - if (!spare) { - /* If we don't have a real spare, then we use a local one. */ - /* Need this for the calculation of the ecc */ - spare = &local_spare; - } - - if (!dev->param.use_nand_ecc) { - ret_val = - dev->param.read_chunk_fn(dev, nand_chunk, data, spare); - if (data && correct_errors) { - /* Do ECC correction */ - /* Todo handle any errors */ - int ecc_result1, ecc_result2; - u8 calc_ecc[3]; - - yaffs_ecc_calc(data, calc_ecc); - ecc_result1 = - yaffs_ecc_correct(data, spare->ecc1, calc_ecc); - yaffs_ecc_calc(&data[256], calc_ecc); - ecc_result2 = - yaffs_ecc_correct(&data[256], spare->ecc2, - calc_ecc); - - if (ecc_result1 > 0) { - yaffs_trace(YAFFS_TRACE_ERROR, - "**>>yaffs ecc error fix performed on chunk %d:0", - nand_chunk); - dev->n_ecc_fixed++; - } else if (ecc_result1 < 0) { - yaffs_trace(YAFFS_TRACE_ERROR, - "**>>yaffs ecc error unfixed on chunk %d:0", - nand_chunk); - dev->n_ecc_unfixed++; - } - - if (ecc_result2 > 0) { - yaffs_trace(YAFFS_TRACE_ERROR, - "**>>yaffs ecc error fix performed on chunk %d:1", - nand_chunk); - dev->n_ecc_fixed++; - } else if (ecc_result2 < 0) { - yaffs_trace(YAFFS_TRACE_ERROR, - "**>>yaffs ecc error unfixed on chunk %d:1", - nand_chunk); - dev->n_ecc_unfixed++; - } - - if (ecc_result1 || ecc_result2) { - /* We had a data problem on this page */ - yaffs_handle_rd_data_error(dev, nand_chunk); - } - - if (ecc_result1 < 0 || ecc_result2 < 0) - *ecc_result = YAFFS_ECC_RESULT_UNFIXED; - else if (ecc_result1 > 0 || ecc_result2 > 0) - *ecc_result = YAFFS_ECC_RESULT_FIXED; - else - *ecc_result = YAFFS_ECC_RESULT_NO_ERROR; - } - } else { - /* Must allocate enough memory for spare+2*sizeof(int) */ - /* for ecc results from device. */ - struct yaffs_nand_spare nspare; - - memset(&nspare, 0, sizeof(nspare)); - - ret_val = dev->param.read_chunk_fn(dev, nand_chunk, data, - (struct yaffs_spare *) - &nspare); - memcpy(spare, &nspare, sizeof(struct yaffs_spare)); - if (data && correct_errors) { - if (nspare.eccres1 > 0) { - yaffs_trace(YAFFS_TRACE_ERROR, - "**>>mtd ecc error fix performed on chunk %d:0", - nand_chunk); - } else if (nspare.eccres1 < 0) { - yaffs_trace(YAFFS_TRACE_ERROR, - "**>>mtd ecc error unfixed on chunk %d:0", - nand_chunk); - } - - if (nspare.eccres2 > 0) { - yaffs_trace(YAFFS_TRACE_ERROR, - "**>>mtd ecc error fix performed on chunk %d:1", - nand_chunk); - } else if (nspare.eccres2 < 0) { - yaffs_trace(YAFFS_TRACE_ERROR, - "**>>mtd ecc error unfixed on chunk %d:1", - nand_chunk); - } - - if (nspare.eccres1 || nspare.eccres2) { - /* We had a data problem on this page */ - yaffs_handle_rd_data_error(dev, nand_chunk); - } - - if (nspare.eccres1 < 0 || nspare.eccres2 < 0) - *ecc_result = YAFFS_ECC_RESULT_UNFIXED; - else if (nspare.eccres1 > 0 || nspare.eccres2 > 0) - *ecc_result = YAFFS_ECC_RESULT_FIXED; - else - *ecc_result = YAFFS_ECC_RESULT_NO_ERROR; - - } - } - return ret_val; -} - -/* - * Functions for robustisizing - */ - -static void yaffs_handle_rd_data_error(struct yaffs_dev *dev, int nand_chunk) -{ - int flash_block = nand_chunk / dev->param.chunks_per_block; - - /* Mark the block for retirement */ - yaffs_get_block_info(dev, flash_block + dev->block_offset)-> - needs_retiring = 1; - yaffs_trace(YAFFS_TRACE_ERROR | YAFFS_TRACE_BAD_BLOCKS, - "**>>Block %d marked for retirement", - flash_block); - - /* TODO: - * Just do a garbage collection on the affected block - * then retire the block - * NB recursion - */ -} - -int yaffs_tags_compat_wr(struct yaffs_dev *dev, - int nand_chunk, - const u8 *data, const struct yaffs_ext_tags *ext_tags) -{ - struct yaffs_spare spare; - struct yaffs_tags tags; - - yaffs_spare_init(&spare); - - if (ext_tags->is_deleted) - spare.page_status = 0; - else { - tags.obj_id = ext_tags->obj_id; - tags.chunk_id = ext_tags->chunk_id; - - tags.n_bytes_lsb = ext_tags->n_bytes & (1024 - 1); - - if (dev->data_bytes_per_chunk >= 1024) - tags.n_bytes_msb = (ext_tags->n_bytes >> 10) & 3; - else - tags.n_bytes_msb = 3; - - tags.serial_number = ext_tags->serial_number; - - if (!dev->param.use_nand_ecc && data) - yaffs_calc_ecc(data, &spare); - - yaffs_load_tags_to_spare(&spare, &tags); - } - return yaffs_wr_nand(dev, nand_chunk, data, &spare); -} - -int yaffs_tags_compat_rd(struct yaffs_dev *dev, - int nand_chunk, - u8 *data, struct yaffs_ext_tags *ext_tags) -{ - struct yaffs_spare spare; - struct yaffs_tags tags; - enum yaffs_ecc_result ecc_result = YAFFS_ECC_RESULT_UNKNOWN; - static struct yaffs_spare spare_ff; - static int init; - int deleted; - - if (!init) { - memset(&spare_ff, 0xff, sizeof(spare_ff)); - init = 1; - } - - if (!yaffs_rd_chunk_nand(dev, nand_chunk, - data, &spare, &ecc_result, 1)) - return YAFFS_FAIL; - - /* ext_tags may be NULL */ - if (!ext_tags) - return YAFFS_OK; - - deleted = (hweight8(spare.page_status) < 7) ? 1 : 0; - - ext_tags->is_deleted = deleted; - ext_tags->ecc_result = ecc_result; - ext_tags->block_bad = 0; /* We're reading it */ - /* therefore it is not a bad block */ - ext_tags->chunk_used = - memcmp(&spare_ff, &spare, sizeof(spare_ff)) ? 1 : 0; - - if (ext_tags->chunk_used) { - yaffs_get_tags_from_spare(dev, &spare, &tags); - ext_tags->obj_id = tags.obj_id; - ext_tags->chunk_id = tags.chunk_id; - ext_tags->n_bytes = tags.n_bytes_lsb; - - if (dev->data_bytes_per_chunk >= 1024) - ext_tags->n_bytes |= - (((unsigned)tags.n_bytes_msb) << 10); - - ext_tags->serial_number = tags.serial_number; - } - - return YAFFS_OK; -} - -int yaffs_tags_compat_mark_bad(struct yaffs_dev *dev, int flash_block) -{ - struct yaffs_spare spare; - - memset(&spare, 0xff, sizeof(struct yaffs_spare)); - - spare.block_status = 'Y'; - - yaffs_wr_nand(dev, flash_block * dev->param.chunks_per_block, NULL, - &spare); - yaffs_wr_nand(dev, flash_block * dev->param.chunks_per_block + 1, - NULL, &spare); - - return YAFFS_OK; -} - -int yaffs_tags_compat_query_block(struct yaffs_dev *dev, - int block_no, - enum yaffs_block_state *state, - u32 *seq_number) -{ - struct yaffs_spare spare0, spare1; - static struct yaffs_spare spare_ff; - static int init; - enum yaffs_ecc_result dummy; - - if (!init) { - memset(&spare_ff, 0xff, sizeof(spare_ff)); - init = 1; - } - - *seq_number = 0; - - yaffs_rd_chunk_nand(dev, block_no * dev->param.chunks_per_block, NULL, - &spare0, &dummy, 1); - yaffs_rd_chunk_nand(dev, block_no * dev->param.chunks_per_block + 1, - NULL, &spare1, &dummy, 1); - - if (hweight8(spare0.block_status & spare1.block_status) < 7) - *state = YAFFS_BLOCK_STATE_DEAD; - else if (memcmp(&spare_ff, &spare0, sizeof(spare_ff)) == 0) - *state = YAFFS_BLOCK_STATE_EMPTY; - else - *state = YAFFS_BLOCK_STATE_NEEDS_SCAN; - - return YAFFS_OK; -} diff --git a/fs/yaffs2/yaffs_tagscompat.h b/fs/yaffs2/yaffs_tagscompat.h deleted file mode 100644 index b3c66557725..00000000000 --- a/fs/yaffs2/yaffs_tagscompat.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -#ifndef __YAFFS_TAGSCOMPAT_H__ -#define __YAFFS_TAGSCOMPAT_H__ - -#include "yaffs_guts.h" -int yaffs_tags_compat_wr(struct yaffs_dev *dev, - int nand_chunk, - const u8 *data, const struct yaffs_ext_tags *tags); -int yaffs_tags_compat_rd(struct yaffs_dev *dev, - int nand_chunk, - u8 *data, struct yaffs_ext_tags *tags); -int yaffs_tags_compat_mark_bad(struct yaffs_dev *dev, int block_no); -int yaffs_tags_compat_query_block(struct yaffs_dev *dev, - int block_no, - enum yaffs_block_state *state, - u32 *seq_number); - -void yaffs_calc_tags_ecc(struct yaffs_tags *tags); -int yaffs_check_tags_ecc(struct yaffs_tags *tags); -int yaffs_count_bits(u8 byte); - -#endif diff --git a/fs/yaffs2/yaffs_trace.h b/fs/yaffs2/yaffs_trace.h deleted file mode 100644 index fd26054d391..00000000000 --- a/fs/yaffs2/yaffs_trace.h +++ /dev/null @@ -1,57 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -#ifndef __YTRACE_H__ -#define __YTRACE_H__ - -extern unsigned int yaffs_trace_mask; -extern unsigned int yaffs_wr_attempts; - -/* - * Tracing flags. - * The flags masked in YAFFS_TRACE_ALWAYS are always traced. - */ - -#define YAFFS_TRACE_OS 0x00000002 -#define YAFFS_TRACE_ALLOCATE 0x00000004 -#define YAFFS_TRACE_SCAN 0x00000008 -#define YAFFS_TRACE_BAD_BLOCKS 0x00000010 -#define YAFFS_TRACE_ERASE 0x00000020 -#define YAFFS_TRACE_GC 0x00000040 -#define YAFFS_TRACE_WRITE 0x00000080 -#define YAFFS_TRACE_TRACING 0x00000100 -#define YAFFS_TRACE_DELETION 0x00000200 -#define YAFFS_TRACE_BUFFERS 0x00000400 -#define YAFFS_TRACE_NANDACCESS 0x00000800 -#define YAFFS_TRACE_GC_DETAIL 0x00001000 -#define YAFFS_TRACE_SCAN_DEBUG 0x00002000 -#define YAFFS_TRACE_MTD 0x00004000 -#define YAFFS_TRACE_CHECKPOINT 0x00008000 - -#define YAFFS_TRACE_VERIFY 0x00010000 -#define YAFFS_TRACE_VERIFY_NAND 0x00020000 -#define YAFFS_TRACE_VERIFY_FULL 0x00040000 -#define YAFFS_TRACE_VERIFY_ALL 0x000f0000 - -#define YAFFS_TRACE_SYNC 0x00100000 -#define YAFFS_TRACE_BACKGROUND 0x00200000 -#define YAFFS_TRACE_LOCK 0x00400000 -#define YAFFS_TRACE_MOUNT 0x00800000 - -#define YAFFS_TRACE_ERROR 0x40000000 -#define YAFFS_TRACE_BUG 0x80000000 -#define YAFFS_TRACE_ALWAYS 0xf0000000 - -#endif diff --git a/fs/yaffs2/yaffs_uboot_glue.c b/fs/yaffs2/yaffs_uboot_glue.c deleted file mode 100644 index c52362b3eda..00000000000 --- a/fs/yaffs2/yaffs_uboot_glue.c +++ /dev/null @@ -1,457 +0,0 @@ -/* - * YAFFS: Yet Another Flash File System. A NAND-flash specific file system. - * - * Copyright (C) 2002-2007 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/* - * yaffscfg.c The configuration for the "direct" use of yaffs. - * - * This is set up for u-boot. - * - * This version now uses the ydevconfig mechanism to set up partitions. - */ - -#include <div64.h> -#include <malloc.h> -#include <linux/printk.h> - -#include <config.h> -#include "nand.h" -#include "yaffscfg.h" -#include "yaffsfs.h" -#include "yaffs_packedtags2.h" -#include "yaffs_mtdif.h" -#include "yaffs_mtdif2.h" -#if 0 -#include <errno.h> -#else -#include "malloc.h" -#endif -#include <linux/mtd/rawnand.h> - -unsigned yaffs_trace_mask = 0x0; /* Disable logging */ -static int yaffs_errno; - -void yaffs_bug_fn(const char *fn, int n) -{ - printf("yaffs bug at %s:%d\n", fn, n); -} - -void *yaffsfs_malloc(size_t x) -{ - return malloc(x); -} - -void yaffsfs_free(void *x) -{ - free(x); -} - -void yaffsfs_SetError(int err) -{ - yaffs_errno = err; -} - -int yaffsfs_GetLastError(void) -{ - return yaffs_errno; -} - -int yaffsfs_GetError(void) -{ - return yaffs_errno; -} - -void yaffsfs_Lock(void) -{ -} - -void yaffsfs_Unlock(void) -{ -} - -__u32 yaffsfs_CurrentTime(void) -{ - return 0; -} - -void *yaffs_malloc(size_t size) -{ - return malloc(size); -} - -void yaffs_free(void *ptr) -{ - free(ptr); -} - -void yaffsfs_LocalInitialisation(void) -{ - /* No locking used */ -} - -static const char *yaffs_file_type_str(struct yaffs_stat *stat) -{ - switch (stat->st_mode & S_IFMT) { - case S_IFREG: return "regular file"; - case S_IFDIR: return "directory"; - case S_IFLNK: return "symlink"; - default: return "unknown"; - } -} - -static const char *yaffs_error_str(void) -{ - int error = yaffsfs_GetLastError(); - - if (error < 0) - error = -error; - - switch (error) { - case EBUSY: return "Busy"; - case ENODEV: return "No such device"; - case EINVAL: return "Invalid parameter"; - case ENFILE: return "Too many open files"; - case EBADF: return "Bad handle"; - case EACCES: return "Wrong permissions"; - case EXDEV: return "Not on same device"; - case ENOENT: return "No such entry"; - case ENOSPC: return "Device full"; - case EROFS: return "Read only file system"; - case ERANGE: return "Range error"; - case ENOTEMPTY: return "Not empty"; - case ENAMETOOLONG: return "Name too long"; - case ENOMEM: return "Out of memory"; - case EFAULT: return "Fault"; - case EEXIST: return "Name exists"; - case ENOTDIR: return "Not a directory"; - case EISDIR: return "Not permitted on a directory"; - case ELOOP: return "Symlink loop"; - case 0: return "No error"; - default: return "Unknown error"; - } -} - -void cmd_yaffs_tracemask(unsigned set, unsigned mask) -{ - if (set) - yaffs_trace_mask = mask; - - printf("yaffs trace mask: %08x\n", yaffs_trace_mask); -} - -static int yaffs_regions_overlap(int a, int b, int x, int y) -{ - return (a <= x && x <= b) || - (a <= y && y <= b) || - (x <= a && a <= y) || - (x <= b && b <= y); -} - -void cmd_yaffs_devconfig(char *_mp, int flash_dev, - int start_block, int end_block) -{ - struct mtd_info *mtd = NULL; - struct yaffs_dev *dev = NULL; - struct yaffs_dev *chk; - char *mp = NULL; - struct nand_chip *chip; - - mtd = get_nand_dev_by_index(flash_dev); - if (!mtd) { - pr_err("\nno NAND devices available\n"); - return; - } - - dev = calloc(1, sizeof(*dev)); - mp = strdup(_mp); - - if (!dev || !mp) { - /* Alloc error */ - printf("Failed to allocate memory\n"); - goto err; - } - - if (flash_dev >= CONFIG_SYS_MAX_NAND_DEVICE) { - printf("Flash device invalid\n"); - goto err; - } - - if (end_block == 0) - end_block = lldiv(mtd->size, mtd->erasesize - 1); - - if (end_block < start_block) { - printf("Bad start/end\n"); - goto err; - } - - chip = mtd_to_nand(mtd); - - /* Check for any conflicts */ - yaffs_dev_rewind(); - while (1) { - chk = yaffs_next_dev(); - if (!chk) - break; - if (strcmp(chk->param.name, mp) == 0) { - printf("Mount point name already used\n"); - goto err; - } - if (chk->driver_context == mtd && - yaffs_regions_overlap( - chk->param.start_block, chk->param.end_block, - start_block, end_block)) { - printf("Region overlaps with partition %s\n", - chk->param.name); - goto err; - } - - } - - /* Seems sane, so configure */ - memset(dev, 0, sizeof(*dev)); - dev->param.name = mp; - dev->driver_context = mtd; - dev->param.start_block = start_block; - dev->param.end_block = end_block; - dev->param.chunks_per_block = mtd->erasesize / mtd->writesize; - dev->param.total_bytes_per_chunk = mtd->writesize; - dev->param.is_yaffs2 = 1; - dev->param.use_nand_ecc = 1; - dev->param.n_reserved_blocks = 5; - if (chip->ecc.layout->oobavail < sizeof(struct yaffs_packed_tags2)) - dev->param.inband_tags = 1; - dev->param.n_caches = 10; - dev->param.write_chunk_tags_fn = nandmtd2_write_chunk_tags; - dev->param.read_chunk_tags_fn = nandmtd2_read_chunk_tags; - dev->param.erase_fn = nandmtd_EraseBlockInNAND; - dev->param.initialise_flash_fn = nandmtd_InitialiseNAND; - dev->param.bad_block_fn = nandmtd2_MarkNANDBlockBad; - dev->param.query_block_fn = nandmtd2_QueryNANDBlock; - - yaffs_add_device(dev); - - printf("Configures yaffs mount %s: dev %d start block %d, end block %d %s\n", - mp, flash_dev, start_block, end_block, - dev->param.inband_tags ? "using inband tags" : ""); - return; - -err: - free(dev); - free(mp); -} - -void cmd_yaffs_dev_ls(void) -{ - struct yaffs_dev *dev; - int flash_dev; - int free_space; - - yaffs_dev_rewind(); - - while (1) { - dev = yaffs_next_dev(); - if (!dev) - return; - flash_dev = nand_mtd_to_devnum(dev->driver_context); - printf("%-10s %5d 0x%05x 0x%05x %s", - dev->param.name, flash_dev, - dev->param.start_block, dev->param.end_block, - dev->param.inband_tags ? "using inband tags, " : ""); - - free_space = yaffs_freespace(dev->param.name); - if (free_space < 0) - printf("not mounted\n"); - else - printf("free 0x%x\n", free_space); - - } -} - -void make_a_file(char *yaffsName, char bval, int sizeOfFile) -{ - int outh; - int i; - unsigned char buffer[100]; - - outh = yaffs_open(yaffsName, - O_CREAT | O_RDWR | O_TRUNC, - S_IREAD | S_IWRITE); - if (outh < 0) { - printf("Error opening file: %d. %s\n", outh, yaffs_error_str()); - return; - } - - memset(buffer, bval, 100); - - do { - i = sizeOfFile; - if (i > 100) - i = 100; - sizeOfFile -= i; - - yaffs_write(outh, buffer, i); - - } while (sizeOfFile > 0); - - yaffs_close(outh); -} - -void read_a_file(char *fn) -{ - int h; - int i = 0; - unsigned char b; - - h = yaffs_open(fn, O_RDWR, 0); - if (h < 0) { - printf("File not found\n"); - return; - } - - while (yaffs_read(h, &b, 1) > 0) { - printf("%02x ", b); - i++; - if (i > 32) { - printf("\n"); - i = 0; - } - } - printf("\n"); - yaffs_close(h); -} - -void cmd_yaffs_mount(char *mp) -{ - int retval = yaffs_mount(mp); - if (retval < 0) - printf("Error mounting %s, return value: %d, %s\n", mp, - yaffsfs_GetError(), yaffs_error_str()); -} - -void cmd_yaffs_umount(char *mp) -{ - if (yaffs_unmount(mp) == -1) - printf("Error umounting %s, return value: %d, %s\n", mp, - yaffsfs_GetError(), yaffs_error_str()); -} - -void cmd_yaffs_write_file(char *yaffsName, char bval, int sizeOfFile) -{ - make_a_file(yaffsName, bval, sizeOfFile); -} - -void cmd_yaffs_read_file(char *fn) -{ - read_a_file(fn); -} - -void cmd_yaffs_mread_file(char *fn, char *addr) -{ - int h; - struct yaffs_stat s; - - yaffs_stat(fn, &s); - - printf("Copy %s to 0x%p... ", fn, addr); - h = yaffs_open(fn, O_RDWR, 0); - if (h < 0) { - printf("File not found\n"); - return; - } - - yaffs_read(h, addr, (int)s.st_size); - printf("\t[DONE]\n"); - - yaffs_close(h); -} - -void cmd_yaffs_mwrite_file(char *fn, char *addr, int size) -{ - int outh; - - outh = yaffs_open(fn, O_CREAT | O_RDWR | O_TRUNC, S_IREAD | S_IWRITE); - if (outh < 0) - printf("Error opening file: %d, %s\n", outh, yaffs_error_str()); - - yaffs_write(outh, addr, size); - - yaffs_close(outh); -} - -void cmd_yaffs_ls(const char *mountpt, int longlist) -{ - int i; - yaffs_DIR *d; - struct yaffs_dirent *de; - struct yaffs_stat stat; - char tempstr[255]; - - d = yaffs_opendir(mountpt); - - if (!d) { - printf("opendir failed, %s\n", yaffs_error_str()); - return; - } - - for (i = 0; (de = yaffs_readdir(d)) != NULL; i++) { - if (longlist) { - sprintf(tempstr, "%s/%s", mountpt, de->d_name); - yaffs_lstat(tempstr, &stat); - printf("%-25s\t%7ld", - de->d_name, - (long)stat.st_size); - printf(" %5d %s\n", - stat.st_ino, - yaffs_file_type_str(&stat)); - } else { - printf("%s\n", de->d_name); - } - } - - yaffs_closedir(d); -} - -void cmd_yaffs_mkdir(const char *dir) -{ - int retval = yaffs_mkdir(dir, 0); - - if (retval < 0) - printf("yaffs_mkdir returning error: %d, %s\n", - retval, yaffs_error_str()); -} - -void cmd_yaffs_rmdir(const char *dir) -{ - int retval = yaffs_rmdir(dir); - - if (retval < 0) - printf("yaffs_rmdir returning error: %d, %s\n", - retval, yaffs_error_str()); -} - -void cmd_yaffs_rm(const char *path) -{ - int retval = yaffs_unlink(path); - - if (retval < 0) - printf("yaffs_unlink returning error: %d, %s\n", - retval, yaffs_error_str()); -} - -void cmd_yaffs_mv(const char *oldPath, const char *newPath) -{ - int retval = yaffs_rename(newPath, oldPath); - - if (retval < 0) - printf("yaffs_unlink returning error: %d, %s\n", - retval, yaffs_error_str()); -} diff --git a/fs/yaffs2/yaffs_verify.c b/fs/yaffs2/yaffs_verify.c deleted file mode 100644 index f10fe03bc42..00000000000 --- a/fs/yaffs2/yaffs_verify.c +++ /dev/null @@ -1,521 +0,0 @@ -/* - * YAFFS: Yet Another Flash File System. A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include "yaffs_verify.h" -#include "yaffs_trace.h" -#include "yaffs_bitmap.h" -#include "yaffs_getblockinfo.h" -#include "yaffs_nand.h" - -int yaffs_skip_verification(struct yaffs_dev *dev) -{ - return !(yaffs_trace_mask & - (YAFFS_TRACE_VERIFY | YAFFS_TRACE_VERIFY_FULL)); -} - -static int yaffs_skip_full_verification(struct yaffs_dev *dev) -{ - return !(yaffs_trace_mask & (YAFFS_TRACE_VERIFY_FULL)); -} - -static int yaffs_skip_nand_verification(struct yaffs_dev *dev) -{ - return !(yaffs_trace_mask & (YAFFS_TRACE_VERIFY_NAND)); -} - -static const char * const block_state_name[] = { - "Unknown", - "Needs scan", - "Scanning", - "Empty", - "Allocating", - "Full", - "Dirty", - "Checkpoint", - "Collecting", - "Dead" -}; - -void yaffs_verify_blk(struct yaffs_dev *dev, struct yaffs_block_info *bi, int n) -{ - int actually_used; - int in_use; - - if (yaffs_skip_verification(dev)) - return; - - /* Report illegal runtime states */ - if (bi->block_state >= YAFFS_NUMBER_OF_BLOCK_STATES) - yaffs_trace(YAFFS_TRACE_VERIFY, - "Block %d has undefined state %d", - n, bi->block_state); - - switch (bi->block_state) { - case YAFFS_BLOCK_STATE_UNKNOWN: - case YAFFS_BLOCK_STATE_SCANNING: - case YAFFS_BLOCK_STATE_NEEDS_SCAN: - yaffs_trace(YAFFS_TRACE_VERIFY, - "Block %d has bad run-state %s", - n, block_state_name[bi->block_state]); - } - - /* Check pages in use and soft deletions are legal */ - - actually_used = bi->pages_in_use - bi->soft_del_pages; - - if (bi->pages_in_use < 0 || - bi->pages_in_use > dev->param.chunks_per_block || - bi->soft_del_pages < 0 || - bi->soft_del_pages > dev->param.chunks_per_block || - actually_used < 0 || actually_used > dev->param.chunks_per_block) - yaffs_trace(YAFFS_TRACE_VERIFY, - "Block %d has illegal values pages_in_used %d soft_del_pages %d", - n, bi->pages_in_use, bi->soft_del_pages); - - /* Check chunk bitmap legal */ - in_use = yaffs_count_chunk_bits(dev, n); - if (in_use != bi->pages_in_use) - yaffs_trace(YAFFS_TRACE_VERIFY, - "Block %d has inconsistent values pages_in_use %d counted chunk bits %d", - n, bi->pages_in_use, in_use); -} - -void yaffs_verify_collected_blk(struct yaffs_dev *dev, - struct yaffs_block_info *bi, int n) -{ - yaffs_verify_blk(dev, bi, n); - - /* After collection the block should be in the erased state */ - - if (bi->block_state != YAFFS_BLOCK_STATE_COLLECTING && - bi->block_state != YAFFS_BLOCK_STATE_EMPTY) { - yaffs_trace(YAFFS_TRACE_ERROR, - "Block %d is in state %d after gc, should be erased", - n, bi->block_state); - } -} - -void yaffs_verify_blocks(struct yaffs_dev *dev) -{ - int i; - int state_count[YAFFS_NUMBER_OF_BLOCK_STATES]; - int illegal_states = 0; - - if (yaffs_skip_verification(dev)) - return; - - memset(state_count, 0, sizeof(state_count)); - - for (i = dev->internal_start_block; i <= dev->internal_end_block; i++) { - struct yaffs_block_info *bi = yaffs_get_block_info(dev, i); - yaffs_verify_blk(dev, bi, i); - - if (bi->block_state < YAFFS_NUMBER_OF_BLOCK_STATES) - state_count[bi->block_state]++; - else - illegal_states++; - } - - yaffs_trace(YAFFS_TRACE_VERIFY, "Block summary"); - - yaffs_trace(YAFFS_TRACE_VERIFY, - "%d blocks have illegal states", - illegal_states); - if (state_count[YAFFS_BLOCK_STATE_ALLOCATING] > 1) - yaffs_trace(YAFFS_TRACE_VERIFY, - "Too many allocating blocks"); - - for (i = 0; i < YAFFS_NUMBER_OF_BLOCK_STATES; i++) - yaffs_trace(YAFFS_TRACE_VERIFY, - "%s %d blocks", - block_state_name[i], state_count[i]); - - if (dev->blocks_in_checkpt != state_count[YAFFS_BLOCK_STATE_CHECKPOINT]) - yaffs_trace(YAFFS_TRACE_VERIFY, - "Checkpoint block count wrong dev %d count %d", - dev->blocks_in_checkpt, - state_count[YAFFS_BLOCK_STATE_CHECKPOINT]); - - if (dev->n_erased_blocks != state_count[YAFFS_BLOCK_STATE_EMPTY]) - yaffs_trace(YAFFS_TRACE_VERIFY, - "Erased block count wrong dev %d count %d", - dev->n_erased_blocks, - state_count[YAFFS_BLOCK_STATE_EMPTY]); - - if (state_count[YAFFS_BLOCK_STATE_COLLECTING] > 1) - yaffs_trace(YAFFS_TRACE_VERIFY, - "Too many collecting blocks %d (max is 1)", - state_count[YAFFS_BLOCK_STATE_COLLECTING]); -} - -/* - * Verify the object header. oh must be valid, but obj and tags may be NULL in - * which case those tests will not be performed. - */ -void yaffs_verify_oh(struct yaffs_obj *obj, struct yaffs_obj_hdr *oh, - struct yaffs_ext_tags *tags, int parent_check) -{ - if (obj && yaffs_skip_verification(obj->my_dev)) - return; - - if (!(tags && obj && oh)) { - yaffs_trace(YAFFS_TRACE_VERIFY, - "Verifying object header tags %p obj %p oh %p", - tags, obj, oh); - return; - } - - if (oh->type <= YAFFS_OBJECT_TYPE_UNKNOWN || - oh->type > YAFFS_OBJECT_TYPE_MAX) - yaffs_trace(YAFFS_TRACE_VERIFY, - "Obj %d header type is illegal value 0x%x", - tags->obj_id, oh->type); - - if (tags->obj_id != obj->obj_id) - yaffs_trace(YAFFS_TRACE_VERIFY, - "Obj %d header mismatch obj_id %d", - tags->obj_id, obj->obj_id); - - /* - * Check that the object's parent ids match if parent_check requested. - * - * Tests do not apply to the root object. - */ - - if (parent_check && tags->obj_id > 1 && !obj->parent) - yaffs_trace(YAFFS_TRACE_VERIFY, - "Obj %d header mismatch parent_id %d obj->parent is NULL", - tags->obj_id, oh->parent_obj_id); - - if (parent_check && obj->parent && - oh->parent_obj_id != obj->parent->obj_id && - (oh->parent_obj_id != YAFFS_OBJECTID_UNLINKED || - obj->parent->obj_id != YAFFS_OBJECTID_DELETED)) - yaffs_trace(YAFFS_TRACE_VERIFY, - "Obj %d header mismatch parent_id %d parent_obj_id %d", - tags->obj_id, oh->parent_obj_id, - obj->parent->obj_id); - - if (tags->obj_id > 1 && oh->name[0] == 0) /* Null name */ - yaffs_trace(YAFFS_TRACE_VERIFY, - "Obj %d header name is NULL", - obj->obj_id); - - if (tags->obj_id > 1 && ((u8) (oh->name[0])) == 0xff) /* Junk name */ - yaffs_trace(YAFFS_TRACE_VERIFY, - "Obj %d header name is 0xff", - obj->obj_id); -} - -void yaffs_verify_file(struct yaffs_obj *obj) -{ - u32 x; - int required_depth; - int last_chunk; - u32 offset_in_chunk; - u32 the_chunk; - - u32 i; - struct yaffs_dev *dev; - struct yaffs_ext_tags tags; - struct yaffs_tnode *tn; - u32 obj_id; - - if (!obj) - return; - - if (yaffs_skip_verification(obj->my_dev)) - return; - - dev = obj->my_dev; - obj_id = obj->obj_id; - - /* Check file size is consistent with tnode depth */ - yaffs_addr_to_chunk(dev, obj->variant.file_variant.file_size, - &last_chunk, &offset_in_chunk); - last_chunk++; - x = last_chunk >> YAFFS_TNODES_LEVEL0_BITS; - required_depth = 0; - while (x > 0) { - x >>= YAFFS_TNODES_INTERNAL_BITS; - required_depth++; - } - - /* Check that the chunks in the tnode tree are all correct. - * We do this by scanning through the tnode tree and - * checking the tags for every chunk match. - */ - - if (yaffs_skip_nand_verification(dev)) - return; - - for (i = 1; i <= last_chunk; i++) { - tn = yaffs_find_tnode_0(dev, &obj->variant.file_variant, i); - - if (!tn) - continue; - - the_chunk = yaffs_get_group_base(dev, tn, i); - if (the_chunk > 0) { - yaffs_rd_chunk_tags_nand(dev, the_chunk, NULL, - &tags); - if (tags.obj_id != obj_id || tags.chunk_id != i) - yaffs_trace(YAFFS_TRACE_VERIFY, - "Object %d chunk_id %d NAND mismatch chunk %d tags (%d:%d)", - obj_id, i, the_chunk, - tags.obj_id, tags.chunk_id); - } - } -} - -void yaffs_verify_link(struct yaffs_obj *obj) -{ - if (obj && yaffs_skip_verification(obj->my_dev)) - return; - - /* Verify sane equivalent object */ -} - -void yaffs_verify_symlink(struct yaffs_obj *obj) -{ - if (obj && yaffs_skip_verification(obj->my_dev)) - return; - - /* Verify symlink string */ -} - -void yaffs_verify_special(struct yaffs_obj *obj) -{ - if (obj && yaffs_skip_verification(obj->my_dev)) - return; -} - -void yaffs_verify_obj(struct yaffs_obj *obj) -{ - struct yaffs_dev *dev; - u32 chunk_min; - u32 chunk_max; - u32 chunk_id_ok; - u32 chunk_in_range; - u32 chunk_wrongly_deleted; - u32 chunk_valid; - - if (!obj) - return; - - if (obj->being_created) - return; - - dev = obj->my_dev; - - if (yaffs_skip_verification(dev)) - return; - - /* Check sane object header chunk */ - - chunk_min = dev->internal_start_block * dev->param.chunks_per_block; - chunk_max = - (dev->internal_end_block + 1) * dev->param.chunks_per_block - 1; - - chunk_in_range = (((unsigned)(obj->hdr_chunk)) >= chunk_min && - ((unsigned)(obj->hdr_chunk)) <= chunk_max); - chunk_id_ok = chunk_in_range || (obj->hdr_chunk == 0); - chunk_valid = chunk_in_range && - yaffs_check_chunk_bit(dev, - obj->hdr_chunk / dev->param.chunks_per_block, - obj->hdr_chunk % dev->param.chunks_per_block); - chunk_wrongly_deleted = chunk_in_range && !chunk_valid; - - if (!obj->fake && (!chunk_id_ok || chunk_wrongly_deleted)) - yaffs_trace(YAFFS_TRACE_VERIFY, - "Obj %d has chunk_id %d %s %s", - obj->obj_id, obj->hdr_chunk, - chunk_id_ok ? "" : ",out of range", - chunk_wrongly_deleted ? ",marked as deleted" : ""); - - if (chunk_valid && !yaffs_skip_nand_verification(dev)) { - struct yaffs_ext_tags tags; - struct yaffs_obj_hdr *oh; - u8 *buffer = yaffs_get_temp_buffer(dev); - - oh = (struct yaffs_obj_hdr *)buffer; - - yaffs_rd_chunk_tags_nand(dev, obj->hdr_chunk, buffer, &tags); - - yaffs_verify_oh(obj, oh, &tags, 1); - - yaffs_release_temp_buffer(dev, buffer); - } - - /* Verify it has a parent */ - if (obj && !obj->fake && (!obj->parent || obj->parent->my_dev != dev)) { - yaffs_trace(YAFFS_TRACE_VERIFY, - "Obj %d has parent pointer %p which does not look like an object", - obj->obj_id, obj->parent); - } - - /* Verify parent is a directory */ - if (obj->parent && - obj->parent->variant_type != YAFFS_OBJECT_TYPE_DIRECTORY) { - yaffs_trace(YAFFS_TRACE_VERIFY, - "Obj %d's parent is not a directory (type %d)", - obj->obj_id, obj->parent->variant_type); - } - - switch (obj->variant_type) { - case YAFFS_OBJECT_TYPE_FILE: - yaffs_verify_file(obj); - break; - case YAFFS_OBJECT_TYPE_SYMLINK: - yaffs_verify_symlink(obj); - break; - case YAFFS_OBJECT_TYPE_DIRECTORY: - yaffs_verify_dir(obj); - break; - case YAFFS_OBJECT_TYPE_HARDLINK: - yaffs_verify_link(obj); - break; - case YAFFS_OBJECT_TYPE_SPECIAL: - yaffs_verify_special(obj); - break; - case YAFFS_OBJECT_TYPE_UNKNOWN: - default: - yaffs_trace(YAFFS_TRACE_VERIFY, - "Obj %d has illegaltype %d", - obj->obj_id, obj->variant_type); - break; - } -} - -void yaffs_verify_objects(struct yaffs_dev *dev) -{ - struct yaffs_obj *obj; - int i; - struct list_head *lh; - - if (yaffs_skip_verification(dev)) - return; - - /* Iterate through the objects in each hash entry */ - - for (i = 0; i < YAFFS_NOBJECT_BUCKETS; i++) { - list_for_each(lh, &dev->obj_bucket[i].list) { - obj = list_entry(lh, struct yaffs_obj, hash_link); - yaffs_verify_obj(obj); - } - } -} - -void yaffs_verify_obj_in_dir(struct yaffs_obj *obj) -{ - struct list_head *lh; - struct yaffs_obj *list_obj; - int count = 0; - - if (!obj) { - yaffs_trace(YAFFS_TRACE_ALWAYS, "No object to verify"); - BUG(); - return; - } - - if (yaffs_skip_verification(obj->my_dev)) - return; - - if (!obj->parent) { - yaffs_trace(YAFFS_TRACE_ALWAYS, "Object does not have parent"); - BUG(); - return; - } - - if (obj->parent->variant_type != YAFFS_OBJECT_TYPE_DIRECTORY) { - yaffs_trace(YAFFS_TRACE_ALWAYS, "Parent is not directory"); - BUG(); - } - - /* Iterate through the objects in each hash entry */ - - list_for_each(lh, &obj->parent->variant.dir_variant.children) { - list_obj = list_entry(lh, struct yaffs_obj, siblings); - yaffs_verify_obj(list_obj); - if (obj == list_obj) - count++; - } - - if (count != 1) { - yaffs_trace(YAFFS_TRACE_ALWAYS, - "Object in directory %d times", - count); - BUG(); - } -} - -void yaffs_verify_dir(struct yaffs_obj *directory) -{ - struct list_head *lh; - struct yaffs_obj *list_obj; - - if (!directory) { - BUG(); - return; - } - - if (yaffs_skip_full_verification(directory->my_dev)) - return; - - if (directory->variant_type != YAFFS_OBJECT_TYPE_DIRECTORY) { - yaffs_trace(YAFFS_TRACE_ALWAYS, - "Directory has wrong type: %d", - directory->variant_type); - BUG(); - } - - /* Iterate through the objects in each hash entry */ - - list_for_each(lh, &directory->variant.dir_variant.children) { - list_obj = list_entry(lh, struct yaffs_obj, siblings); - if (list_obj->parent != directory) { - yaffs_trace(YAFFS_TRACE_ALWAYS, - "Object in directory list has wrong parent %p", - list_obj->parent); - BUG(); - } - yaffs_verify_obj_in_dir(list_obj); - } -} - -static int yaffs_free_verification_failures; - -void yaffs_verify_free_chunks(struct yaffs_dev *dev) -{ - int counted; - int difference; - - if (yaffs_skip_verification(dev)) - return; - - counted = yaffs_count_free_chunks(dev); - - difference = dev->n_free_chunks - counted; - - if (difference) { - yaffs_trace(YAFFS_TRACE_ALWAYS, - "Freechunks verification failure %d %d %d", - dev->n_free_chunks, counted, difference); - yaffs_free_verification_failures++; - } -} - -int yaffs_verify_file_sane(struct yaffs_obj *in) -{ - return YAFFS_OK; -} diff --git a/fs/yaffs2/yaffs_verify.h b/fs/yaffs2/yaffs_verify.h deleted file mode 100644 index 4f4af8d29aa..00000000000 --- a/fs/yaffs2/yaffs_verify.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -#ifndef __YAFFS_VERIFY_H__ -#define __YAFFS_VERIFY_H__ - -#include "yaffs_guts.h" - -void yaffs_verify_blk(struct yaffs_dev *dev, struct yaffs_block_info *bi, - int n); -void yaffs_verify_collected_blk(struct yaffs_dev *dev, - struct yaffs_block_info *bi, int n); -void yaffs_verify_blocks(struct yaffs_dev *dev); - -void yaffs_verify_oh(struct yaffs_obj *obj, struct yaffs_obj_hdr *oh, - struct yaffs_ext_tags *tags, int parent_check); -void yaffs_verify_file(struct yaffs_obj *obj); -void yaffs_verify_link(struct yaffs_obj *obj); -void yaffs_verify_symlink(struct yaffs_obj *obj); -void yaffs_verify_special(struct yaffs_obj *obj); -void yaffs_verify_obj(struct yaffs_obj *obj); -void yaffs_verify_objects(struct yaffs_dev *dev); -void yaffs_verify_obj_in_dir(struct yaffs_obj *obj); -void yaffs_verify_dir(struct yaffs_obj *directory); -void yaffs_verify_free_chunks(struct yaffs_dev *dev); - -int yaffs_verify_file_sane(struct yaffs_obj *obj); - -int yaffs_skip_verification(struct yaffs_dev *dev); - -#endif diff --git a/fs/yaffs2/yaffs_yaffs1.c b/fs/yaffs2/yaffs_yaffs1.c deleted file mode 100644 index 8c176b982fa..00000000000 --- a/fs/yaffs2/yaffs_yaffs1.c +++ /dev/null @@ -1,420 +0,0 @@ -/* - * YAFFS: Yet Another Flash File System. A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include "yaffs_yaffs1.h" -#include "yportenv.h" -#include "yaffs_trace.h" -#include "yaffs_bitmap.h" -#include "yaffs_getblockinfo.h" -#include "yaffs_nand.h" -#include "yaffs_attribs.h" -#include <dm/devres.h> - -int yaffs1_scan(struct yaffs_dev *dev) -{ - struct yaffs_ext_tags tags; - int blk; - int chunk; - int c; - int deleted; - enum yaffs_block_state state; - LIST_HEAD(hard_list); - struct yaffs_block_info *bi; - u32 seq_number; - struct yaffs_obj_hdr *oh; - struct yaffs_obj *in; - struct yaffs_obj *parent; - int alloc_failed = 0; - struct yaffs_shadow_fixer *shadow_fixers = NULL; - u8 *chunk_data; - - yaffs_trace(YAFFS_TRACE_SCAN, - "yaffs1_scan starts intstartblk %d intendblk %d...", - dev->internal_start_block, dev->internal_end_block); - - chunk_data = yaffs_get_temp_buffer(dev); - - dev->seq_number = YAFFS_LOWEST_SEQUENCE_NUMBER; - - /* Scan all the blocks to determine their state */ - bi = dev->block_info; - for (blk = dev->internal_start_block; blk <= dev->internal_end_block; - blk++) { - yaffs_clear_chunk_bits(dev, blk); - bi->pages_in_use = 0; - bi->soft_del_pages = 0; - - yaffs_query_init_block_state(dev, blk, &state, &seq_number); - - bi->block_state = state; - bi->seq_number = seq_number; - - if (bi->seq_number == YAFFS_SEQUENCE_BAD_BLOCK) - bi->block_state = state = YAFFS_BLOCK_STATE_DEAD; - - yaffs_trace(YAFFS_TRACE_SCAN_DEBUG, - "Block scanning block %d state %d seq %d", - blk, state, seq_number); - - if (state == YAFFS_BLOCK_STATE_DEAD) { - yaffs_trace(YAFFS_TRACE_BAD_BLOCKS, - "block %d is bad", blk); - } else if (state == YAFFS_BLOCK_STATE_EMPTY) { - yaffs_trace(YAFFS_TRACE_SCAN_DEBUG, "Block empty "); - dev->n_erased_blocks++; - dev->n_free_chunks += dev->param.chunks_per_block; - } - bi++; - } - - /* For each block.... */ - for (blk = dev->internal_start_block; - !alloc_failed && blk <= dev->internal_end_block; blk++) { - - cond_resched(); - - bi = yaffs_get_block_info(dev, blk); - state = bi->block_state; - - deleted = 0; - - /* For each chunk in each block that needs scanning.... */ - for (c = 0; - !alloc_failed && c < dev->param.chunks_per_block && - state == YAFFS_BLOCK_STATE_NEEDS_SCAN; c++) { - /* Read the tags and decide what to do */ - chunk = blk * dev->param.chunks_per_block + c; - - yaffs_rd_chunk_tags_nand(dev, chunk, NULL, &tags); - - /* Let's have a good look at this chunk... */ - - if (tags.ecc_result == YAFFS_ECC_RESULT_UNFIXED || - tags.is_deleted) { - /* YAFFS1 only... - * A deleted chunk - */ - deleted++; - dev->n_free_chunks++; - } else if (!tags.chunk_used) { - /* An unassigned chunk in the block - * This means that either the block is empty or - * this is the one being allocated from - */ - - if (c == 0) { - /* We're looking at the first chunk in - *the block so the block is unused */ - state = YAFFS_BLOCK_STATE_EMPTY; - dev->n_erased_blocks++; - } else { - /* this is the block being allocated */ - yaffs_trace(YAFFS_TRACE_SCAN, - " Allocating from %d %d", - blk, c); - state = YAFFS_BLOCK_STATE_ALLOCATING; - dev->alloc_block = blk; - dev->alloc_page = c; - dev->alloc_block_finder = blk; - - } - - dev->n_free_chunks += - (dev->param.chunks_per_block - c); - } else if (tags.chunk_id > 0) { - /* chunk_id > 0 so it is a data chunk... */ - unsigned int endpos; - - yaffs_set_chunk_bit(dev, blk, c); - bi->pages_in_use++; - - in = yaffs_find_or_create_by_number(dev, - tags.obj_id, - YAFFS_OBJECT_TYPE_FILE); - /* PutChunkIntoFile checks for a clash - * (two data chunks with the same chunk_id). - */ - - if (!in) - alloc_failed = 1; - - if (in) { - if (!yaffs_put_chunk_in_file - (in, tags.chunk_id, chunk, 1)) - alloc_failed = 1; - } - - endpos = - (tags.chunk_id - 1) * - dev->data_bytes_per_chunk + - tags.n_bytes; - if (in && - in->variant_type == - YAFFS_OBJECT_TYPE_FILE && - in->variant.file_variant.scanned_size < - endpos) { - in->variant.file_variant.scanned_size = - endpos; - if (!dev->param.use_header_file_size) { - in->variant. - file_variant.file_size = - in->variant. - file_variant.scanned_size; - } - - } - } else { - /* chunk_id == 0, so it is an ObjectHeader. - * Make the object - */ - yaffs_set_chunk_bit(dev, blk, c); - bi->pages_in_use++; - - yaffs_rd_chunk_tags_nand(dev, chunk, - chunk_data, NULL); - - oh = (struct yaffs_obj_hdr *)chunk_data; - - in = yaffs_find_by_number(dev, tags.obj_id); - if (in && in->variant_type != oh->type) { - /* This should not happen, but somehow - * Wev'e ended up with an obj_id that - * has been reused but not yet deleted, - * and worse still it has changed type. - * Delete the old object. - */ - - yaffs_del_obj(in); - in = NULL; - } - - in = yaffs_find_or_create_by_number(dev, - tags.obj_id, - oh->type); - - if (!in) - alloc_failed = 1; - - if (in && oh->shadows_obj > 0) { - - struct yaffs_shadow_fixer *fixer; - fixer = - kmalloc(sizeof - (struct yaffs_shadow_fixer), - GFP_NOFS); - if (fixer) { - fixer->next = shadow_fixers; - shadow_fixers = fixer; - fixer->obj_id = tags.obj_id; - fixer->shadowed_id = - oh->shadows_obj; - yaffs_trace(YAFFS_TRACE_SCAN, - " Shadow fixer: %d shadows %d", - fixer->obj_id, - fixer->shadowed_id); - - } - - } - - if (in && in->valid) { - /* We have already filled this one. - * We have a duplicate and need to - * resolve it. */ - - unsigned existing_serial = in->serial; - unsigned new_serial = - tags.serial_number; - - if (((existing_serial + 1) & 3) == - new_serial) { - /* Use new one - destroy the - * exisiting one */ - yaffs_chunk_del(dev, - in->hdr_chunk, - 1, __LINE__); - in->valid = 0; - } else { - /* Use existing - destroy - * this one. */ - yaffs_chunk_del(dev, chunk, 1, - __LINE__); - } - } - - if (in && !in->valid && - (tags.obj_id == YAFFS_OBJECTID_ROOT || - tags.obj_id == - YAFFS_OBJECTID_LOSTNFOUND)) { - /* We only load some info, don't fiddle - * with directory structure */ - in->valid = 1; - in->variant_type = oh->type; - - in->yst_mode = oh->yst_mode; - yaffs_load_attribs(in, oh); - in->hdr_chunk = chunk; - in->serial = tags.serial_number; - - } else if (in && !in->valid) { - /* we need to load this info */ - - in->valid = 1; - in->variant_type = oh->type; - - in->yst_mode = oh->yst_mode; - yaffs_load_attribs(in, oh); - in->hdr_chunk = chunk; - in->serial = tags.serial_number; - - yaffs_set_obj_name_from_oh(in, oh); - in->dirty = 0; - - /* directory stuff... - * hook up to parent - */ - - parent = - yaffs_find_or_create_by_number - (dev, oh->parent_obj_id, - YAFFS_OBJECT_TYPE_DIRECTORY); - if (!parent) - alloc_failed = 1; - if (parent && parent->variant_type == - YAFFS_OBJECT_TYPE_UNKNOWN) { - /* Set up as a directory */ - parent->variant_type = - YAFFS_OBJECT_TYPE_DIRECTORY; - INIT_LIST_HEAD(&parent-> - variant.dir_variant. - children); - } else if (!parent || - parent->variant_type != - YAFFS_OBJECT_TYPE_DIRECTORY) { - /* Hoosterman, a problem.... - * We're trying to use a - * non-directory as a directory - */ - - yaffs_trace(YAFFS_TRACE_ERROR, - "yaffs tragedy: attempting to use non-directory as a directory in scan. Put in lost+found." - ); - parent = dev->lost_n_found; - } - - yaffs_add_obj_to_dir(parent, in); - - switch (in->variant_type) { - case YAFFS_OBJECT_TYPE_UNKNOWN: - /* Todo got a problem */ - break; - case YAFFS_OBJECT_TYPE_FILE: - if (dev->param. - use_header_file_size) - in->variant. - file_variant.file_size - = yaffs_oh_to_size(oh); - break; - case YAFFS_OBJECT_TYPE_HARDLINK: - in->variant. - hardlink_variant.equiv_id = - oh->equiv_id; - list_add(&in->hard_links, - &hard_list); - break; - case YAFFS_OBJECT_TYPE_DIRECTORY: - /* Do nothing */ - break; - case YAFFS_OBJECT_TYPE_SPECIAL: - /* Do nothing */ - break; - case YAFFS_OBJECT_TYPE_SYMLINK: - in->variant.symlink_variant. - alias = - yaffs_clone_str(oh->alias); - if (!in->variant. - symlink_variant.alias) - alloc_failed = 1; - break; - } - } - } - } - - if (state == YAFFS_BLOCK_STATE_NEEDS_SCAN) { - /* If we got this far while scanning, - * then the block is fully allocated. */ - state = YAFFS_BLOCK_STATE_FULL; - } - - if (state == YAFFS_BLOCK_STATE_ALLOCATING) { - /* If the block was partially allocated then - * treat it as fully allocated. */ - state = YAFFS_BLOCK_STATE_FULL; - dev->alloc_block = -1; - } - - bi->block_state = state; - - /* Now let's see if it was dirty */ - if (bi->pages_in_use == 0 && - !bi->has_shrink_hdr && - bi->block_state == YAFFS_BLOCK_STATE_FULL) - yaffs_block_became_dirty(dev, blk); - } - - /* Ok, we've done all the scanning. - * Fix up the hard link chains. - * We should now have scanned all the objects, now it's time to add - * these hardlinks. - */ - - yaffs_link_fixup(dev, &hard_list); - - /* - * Fix up any shadowed objects. - * There should not be more than one of these. - */ - { - struct yaffs_shadow_fixer *fixer; - struct yaffs_obj *obj; - - while (shadow_fixers) { - fixer = shadow_fixers; - shadow_fixers = fixer->next; - /* Complete the rename transaction by deleting the - * shadowed object then setting the object header - to unshadowed. - */ - obj = yaffs_find_by_number(dev, fixer->shadowed_id); - if (obj) - yaffs_del_obj(obj); - - obj = yaffs_find_by_number(dev, fixer->obj_id); - - if (obj) - yaffs_update_oh(obj, NULL, 1, 0, 0, NULL); - - kfree(fixer); - } - } - - yaffs_release_temp_buffer(dev, chunk_data); - - if (alloc_failed) - return YAFFS_FAIL; - - yaffs_trace(YAFFS_TRACE_SCAN, "yaffs1_scan ends"); - - return YAFFS_OK; -} diff --git a/fs/yaffs2/yaffs_yaffs1.h b/fs/yaffs2/yaffs_yaffs1.h deleted file mode 100644 index 97e2fdd08a5..00000000000 --- a/fs/yaffs2/yaffs_yaffs1.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -#ifndef __YAFFS_YAFFS1_H__ -#define __YAFFS_YAFFS1_H__ - -#include "yaffs_guts.h" -int yaffs1_scan(struct yaffs_dev *dev); - -#endif diff --git a/fs/yaffs2/yaffs_yaffs2.c b/fs/yaffs2/yaffs_yaffs2.c deleted file mode 100644 index 627a701a45b..00000000000 --- a/fs/yaffs2/yaffs_yaffs2.c +++ /dev/null @@ -1,1526 +0,0 @@ -/* - * YAFFS: Yet Another Flash File System. A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include "yaffs_guts.h" -#include "yaffs_trace.h" -#include "yaffs_yaffs2.h" -#include "yaffs_checkptrw.h" -#include "yaffs_bitmap.h" -#include "yaffs_nand.h" -#include "yaffs_getblockinfo.h" -#include "yaffs_verify.h" -#include "yaffs_attribs.h" -#include "yaffs_summary.h" -#include <dm/devres.h> - -/* - * Checkpoints are really no benefit on very small partitions. - * - * To save space on small partitions don't bother with checkpoints unless - * the partition is at least this big. - */ -#define YAFFS_CHECKPOINT_MIN_BLOCKS 60 -#define YAFFS_SMALL_HOLE_THRESHOLD 4 - -/* - * Oldest Dirty Sequence Number handling. - */ - -/* yaffs_calc_oldest_dirty_seq() - * yaffs2_find_oldest_dirty_seq() - * Calculate the oldest dirty sequence number if we don't know it. - */ -void yaffs_calc_oldest_dirty_seq(struct yaffs_dev *dev) -{ - int i; - unsigned seq; - unsigned block_no = 0; - struct yaffs_block_info *b; - - if (!dev->param.is_yaffs2) - return; - - /* Find the oldest dirty sequence number. */ - seq = dev->seq_number + 1; - b = dev->block_info; - for (i = dev->internal_start_block; i <= dev->internal_end_block; i++) { - if (b->block_state == YAFFS_BLOCK_STATE_FULL && - (b->pages_in_use - b->soft_del_pages) < - dev->param.chunks_per_block && - b->seq_number < seq) { - seq = b->seq_number; - block_no = i; - } - b++; - } - - if (block_no) { - dev->oldest_dirty_seq = seq; - dev->oldest_dirty_block = block_no; - } -} - -void yaffs2_find_oldest_dirty_seq(struct yaffs_dev *dev) -{ - if (!dev->param.is_yaffs2) - return; - - if (!dev->oldest_dirty_seq) - yaffs_calc_oldest_dirty_seq(dev); -} - -/* - * yaffs_clear_oldest_dirty_seq() - * Called when a block is erased or marked bad. (ie. when its seq_number - * becomes invalid). If the value matches the oldest then we clear - * dev->oldest_dirty_seq to force its recomputation. - */ -void yaffs2_clear_oldest_dirty_seq(struct yaffs_dev *dev, - struct yaffs_block_info *bi) -{ - - if (!dev->param.is_yaffs2) - return; - - if (!bi || bi->seq_number == dev->oldest_dirty_seq) { - dev->oldest_dirty_seq = 0; - dev->oldest_dirty_block = 0; - } -} - -/* - * yaffs2_update_oldest_dirty_seq() - * Update the oldest dirty sequence number whenever we dirty a block. - * Only do this if the oldest_dirty_seq is actually being tracked. - */ -void yaffs2_update_oldest_dirty_seq(struct yaffs_dev *dev, unsigned block_no, - struct yaffs_block_info *bi) -{ - if (!dev->param.is_yaffs2) - return; - - if (dev->oldest_dirty_seq) { - if (dev->oldest_dirty_seq > bi->seq_number) { - dev->oldest_dirty_seq = bi->seq_number; - dev->oldest_dirty_block = block_no; - } - } -} - -int yaffs_block_ok_for_gc(struct yaffs_dev *dev, struct yaffs_block_info *bi) -{ - - if (!dev->param.is_yaffs2) - return 1; /* disqualification only applies to yaffs2. */ - - if (!bi->has_shrink_hdr) - return 1; /* can gc */ - - yaffs2_find_oldest_dirty_seq(dev); - - /* Can't do gc of this block if there are any blocks older than this - * one that have discarded pages. - */ - return (bi->seq_number <= dev->oldest_dirty_seq); -} - -/* - * yaffs2_find_refresh_block() - * periodically finds the oldest full block by sequence number for refreshing. - * Only for yaffs2. - */ -u32 yaffs2_find_refresh_block(struct yaffs_dev *dev) -{ - u32 b; - u32 oldest = 0; - u32 oldest_seq = 0; - struct yaffs_block_info *bi; - - if (!dev->param.is_yaffs2) - return oldest; - - /* - * If refresh period < 10 then refreshing is disabled. - */ - if (dev->param.refresh_period < 10) - return oldest; - - /* - * Fix broken values. - */ - if (dev->refresh_skip > dev->param.refresh_period) - dev->refresh_skip = dev->param.refresh_period; - - if (dev->refresh_skip > 0) - return oldest; - - /* - * Refresh skip is now zero. - * We'll do a refresh this time around.... - * Update the refresh skip and find the oldest block. - */ - dev->refresh_skip = dev->param.refresh_period; - dev->refresh_count++; - bi = dev->block_info; - for (b = dev->internal_start_block; b <= dev->internal_end_block; b++) { - - if (bi->block_state == YAFFS_BLOCK_STATE_FULL) { - - if (oldest < 1 || bi->seq_number < oldest_seq) { - oldest = b; - oldest_seq = bi->seq_number; - } - } - bi++; - } - - if (oldest > 0) { - yaffs_trace(YAFFS_TRACE_GC, - "GC refresh count %d selected block %d with seq_number %d", - dev->refresh_count, oldest, oldest_seq); - } - - return oldest; -} - -int yaffs2_checkpt_required(struct yaffs_dev *dev) -{ - int nblocks; - - if (!dev->param.is_yaffs2) - return 0; - - nblocks = dev->internal_end_block - dev->internal_start_block + 1; - - return !dev->param.skip_checkpt_wr && - !dev->read_only && (nblocks >= YAFFS_CHECKPOINT_MIN_BLOCKS); -} - -int yaffs_calc_checkpt_blocks_required(struct yaffs_dev *dev) -{ - int retval; - int n_bytes = 0; - int n_blocks; - int dev_blocks; - - if (!dev->param.is_yaffs2) - return 0; - - if (!dev->checkpoint_blocks_required && yaffs2_checkpt_required(dev)) { - /* Not a valid value so recalculate */ - dev_blocks = dev->param.end_block - dev->param.start_block + 1; - n_bytes += sizeof(struct yaffs_checkpt_validity); - n_bytes += sizeof(struct yaffs_checkpt_dev); - n_bytes += dev_blocks * sizeof(struct yaffs_block_info); - n_bytes += dev_blocks * dev->chunk_bit_stride; - n_bytes += - (sizeof(struct yaffs_checkpt_obj) + sizeof(u32)) * - dev->n_obj; - n_bytes += (dev->tnode_size + sizeof(u32)) * dev->n_tnodes; - n_bytes += sizeof(struct yaffs_checkpt_validity); - n_bytes += sizeof(u32); /* checksum */ - - /* Round up and add 2 blocks to allow for some bad blocks, - * so add 3 */ - - n_blocks = - (n_bytes / - (dev->data_bytes_per_chunk * - dev->param.chunks_per_block)) + 3; - - dev->checkpoint_blocks_required = n_blocks; - } - - retval = dev->checkpoint_blocks_required - dev->blocks_in_checkpt; - if (retval < 0) - retval = 0; - return retval; -} - -/*--------------------- Checkpointing --------------------*/ - -static int yaffs2_wr_checkpt_validity_marker(struct yaffs_dev *dev, int head) -{ - struct yaffs_checkpt_validity cp; - - memset(&cp, 0, sizeof(cp)); - - cp.struct_type = sizeof(cp); - cp.magic = YAFFS_MAGIC; - cp.version = YAFFS_CHECKPOINT_VERSION; - cp.head = (head) ? 1 : 0; - - return (yaffs2_checkpt_wr(dev, &cp, sizeof(cp)) == sizeof(cp)) ? 1 : 0; -} - -static int yaffs2_rd_checkpt_validity_marker(struct yaffs_dev *dev, int head) -{ - struct yaffs_checkpt_validity cp; - int ok; - - ok = (yaffs2_checkpt_rd(dev, &cp, sizeof(cp)) == sizeof(cp)); - - if (ok) - ok = (cp.struct_type == sizeof(cp)) && - (cp.magic == YAFFS_MAGIC) && - (cp.version == YAFFS_CHECKPOINT_VERSION) && - (cp.head == ((head) ? 1 : 0)); - return ok ? 1 : 0; -} - -static void yaffs2_dev_to_checkpt_dev(struct yaffs_checkpt_dev *cp, - struct yaffs_dev *dev) -{ - cp->n_erased_blocks = dev->n_erased_blocks; - cp->alloc_block = dev->alloc_block; - cp->alloc_page = dev->alloc_page; - cp->n_free_chunks = dev->n_free_chunks; - - cp->n_deleted_files = dev->n_deleted_files; - cp->n_unlinked_files = dev->n_unlinked_files; - cp->n_bg_deletions = dev->n_bg_deletions; - cp->seq_number = dev->seq_number; - -} - -static void yaffs_checkpt_dev_to_dev(struct yaffs_dev *dev, - struct yaffs_checkpt_dev *cp) -{ - dev->n_erased_blocks = cp->n_erased_blocks; - dev->alloc_block = cp->alloc_block; - dev->alloc_page = cp->alloc_page; - dev->n_free_chunks = cp->n_free_chunks; - - dev->n_deleted_files = cp->n_deleted_files; - dev->n_unlinked_files = cp->n_unlinked_files; - dev->n_bg_deletions = cp->n_bg_deletions; - dev->seq_number = cp->seq_number; -} - -static int yaffs2_wr_checkpt_dev(struct yaffs_dev *dev) -{ - struct yaffs_checkpt_dev cp; - u32 n_bytes; - u32 n_blocks = dev->internal_end_block - dev->internal_start_block + 1; - int ok; - - /* Write device runtime values */ - yaffs2_dev_to_checkpt_dev(&cp, dev); - cp.struct_type = sizeof(cp); - - ok = (yaffs2_checkpt_wr(dev, &cp, sizeof(cp)) == sizeof(cp)); - if (!ok) - return 0; - - /* Write block info */ - n_bytes = n_blocks * sizeof(struct yaffs_block_info); - ok = (yaffs2_checkpt_wr(dev, dev->block_info, n_bytes) == n_bytes); - if (!ok) - return 0; - - /* Write chunk bits */ - n_bytes = n_blocks * dev->chunk_bit_stride; - ok = (yaffs2_checkpt_wr(dev, dev->chunk_bits, n_bytes) == n_bytes); - - return ok ? 1 : 0; -} - -static int yaffs2_rd_checkpt_dev(struct yaffs_dev *dev) -{ - struct yaffs_checkpt_dev cp; - u32 n_bytes; - u32 n_blocks = - (dev->internal_end_block - dev->internal_start_block + 1); - int ok; - - ok = (yaffs2_checkpt_rd(dev, &cp, sizeof(cp)) == sizeof(cp)); - if (!ok) - return 0; - - if (cp.struct_type != sizeof(cp)) - return 0; - - yaffs_checkpt_dev_to_dev(dev, &cp); - - n_bytes = n_blocks * sizeof(struct yaffs_block_info); - - ok = (yaffs2_checkpt_rd(dev, dev->block_info, n_bytes) == n_bytes); - - if (!ok) - return 0; - - n_bytes = n_blocks * dev->chunk_bit_stride; - - ok = (yaffs2_checkpt_rd(dev, dev->chunk_bits, n_bytes) == n_bytes); - - return ok ? 1 : 0; -} - -static void yaffs2_obj_checkpt_obj(struct yaffs_checkpt_obj *cp, - struct yaffs_obj *obj) -{ - cp->obj_id = obj->obj_id; - cp->parent_id = (obj->parent) ? obj->parent->obj_id : 0; - cp->hdr_chunk = obj->hdr_chunk; - cp->variant_type = obj->variant_type; - cp->deleted = obj->deleted; - cp->soft_del = obj->soft_del; - cp->unlinked = obj->unlinked; - cp->fake = obj->fake; - cp->rename_allowed = obj->rename_allowed; - cp->unlink_allowed = obj->unlink_allowed; - cp->serial = obj->serial; - cp->n_data_chunks = obj->n_data_chunks; - - if (obj->variant_type == YAFFS_OBJECT_TYPE_FILE) - cp->size_or_equiv_obj = obj->variant.file_variant.file_size; - else if (obj->variant_type == YAFFS_OBJECT_TYPE_HARDLINK) - cp->size_or_equiv_obj = obj->variant.hardlink_variant.equiv_id; -} - -static int yaffs2_checkpt_obj_to_obj(struct yaffs_obj *obj, - struct yaffs_checkpt_obj *cp) -{ - struct yaffs_obj *parent; - - if (obj->variant_type != cp->variant_type) { - yaffs_trace(YAFFS_TRACE_ERROR, - "Checkpoint read object %d type %d chunk %d does not match existing object type %d", - cp->obj_id, cp->variant_type, cp->hdr_chunk, - obj->variant_type); - return 0; - } - - obj->obj_id = cp->obj_id; - - if (cp->parent_id) - parent = yaffs_find_or_create_by_number(obj->my_dev, - cp->parent_id, - YAFFS_OBJECT_TYPE_DIRECTORY); - else - parent = NULL; - - if (parent) { - if (parent->variant_type != YAFFS_OBJECT_TYPE_DIRECTORY) { - yaffs_trace(YAFFS_TRACE_ALWAYS, - "Checkpoint read object %d parent %d type %d chunk %d Parent type, %d, not directory", - cp->obj_id, cp->parent_id, - cp->variant_type, cp->hdr_chunk, - parent->variant_type); - return 0; - } - yaffs_add_obj_to_dir(parent, obj); - } - - obj->hdr_chunk = cp->hdr_chunk; - obj->variant_type = cp->variant_type; - obj->deleted = cp->deleted; - obj->soft_del = cp->soft_del; - obj->unlinked = cp->unlinked; - obj->fake = cp->fake; - obj->rename_allowed = cp->rename_allowed; - obj->unlink_allowed = cp->unlink_allowed; - obj->serial = cp->serial; - obj->n_data_chunks = cp->n_data_chunks; - - if (obj->variant_type == YAFFS_OBJECT_TYPE_FILE) - obj->variant.file_variant.file_size = cp->size_or_equiv_obj; - else if (obj->variant_type == YAFFS_OBJECT_TYPE_HARDLINK) - obj->variant.hardlink_variant.equiv_id = cp->size_or_equiv_obj; - - if (obj->hdr_chunk > 0) - obj->lazy_loaded = 1; - return 1; -} - -static int yaffs2_checkpt_tnode_worker(struct yaffs_obj *in, - struct yaffs_tnode *tn, u32 level, - int chunk_offset) -{ - int i; - struct yaffs_dev *dev = in->my_dev; - int ok = 1; - u32 base_offset; - - if (!tn) - return 1; - - if (level > 0) { - for (i = 0; i < YAFFS_NTNODES_INTERNAL && ok; i++) { - if (!tn->internal[i]) - continue; - ok = yaffs2_checkpt_tnode_worker(in, - tn->internal[i], - level - 1, - (chunk_offset << - YAFFS_TNODES_INTERNAL_BITS) + i); - } - return ok; - } - - /* Level 0 tnode */ - base_offset = chunk_offset << YAFFS_TNODES_LEVEL0_BITS; - ok = (yaffs2_checkpt_wr(dev, &base_offset, sizeof(base_offset)) == - sizeof(base_offset)); - if (ok) - ok = (yaffs2_checkpt_wr(dev, tn, dev->tnode_size) == - dev->tnode_size); - - return ok; -} - -static int yaffs2_wr_checkpt_tnodes(struct yaffs_obj *obj) -{ - u32 end_marker = ~0; - int ok = 1; - - if (obj->variant_type != YAFFS_OBJECT_TYPE_FILE) - return ok; - - ok = yaffs2_checkpt_tnode_worker(obj, - obj->variant.file_variant.top, - obj->variant.file_variant. - top_level, 0); - if (ok) - ok = (yaffs2_checkpt_wr(obj->my_dev, &end_marker, - sizeof(end_marker)) == sizeof(end_marker)); - - return ok ? 1 : 0; -} - -static int yaffs2_rd_checkpt_tnodes(struct yaffs_obj *obj) -{ - u32 base_chunk; - int ok = 1; - struct yaffs_dev *dev = obj->my_dev; - struct yaffs_file_var *file_stuct_ptr = &obj->variant.file_variant; - struct yaffs_tnode *tn; - int nread = 0; - - ok = (yaffs2_checkpt_rd(dev, &base_chunk, sizeof(base_chunk)) == - sizeof(base_chunk)); - - while (ok && (~base_chunk)) { - nread++; - /* Read level 0 tnode */ - - tn = yaffs_get_tnode(dev); - if (tn) - ok = (yaffs2_checkpt_rd(dev, tn, dev->tnode_size) == - dev->tnode_size); - else - ok = 0; - - if (tn && ok) - ok = yaffs_add_find_tnode_0(dev, - file_stuct_ptr, - base_chunk, tn) ? 1 : 0; - - if (ok) - ok = (yaffs2_checkpt_rd - (dev, &base_chunk, - sizeof(base_chunk)) == sizeof(base_chunk)); - } - - yaffs_trace(YAFFS_TRACE_CHECKPOINT, - "Checkpoint read tnodes %d records, last %d. ok %d", - nread, base_chunk, ok); - - return ok ? 1 : 0; -} - -static int yaffs2_wr_checkpt_objs(struct yaffs_dev *dev) -{ - struct yaffs_obj *obj; - struct yaffs_checkpt_obj cp; - int i; - int ok = 1; - struct list_head *lh; - - /* Iterate through the objects in each hash entry, - * dumping them to the checkpointing stream. - */ - - for (i = 0; ok && i < YAFFS_NOBJECT_BUCKETS; i++) { - list_for_each(lh, &dev->obj_bucket[i].list) { - obj = list_entry(lh, struct yaffs_obj, hash_link); - if (!obj->defered_free) { - yaffs2_obj_checkpt_obj(&cp, obj); - cp.struct_type = sizeof(cp); - - yaffs_trace(YAFFS_TRACE_CHECKPOINT, - "Checkpoint write object %d parent %d type %d chunk %d obj addr %p", - cp.obj_id, cp.parent_id, - cp.variant_type, cp.hdr_chunk, obj); - - ok = (yaffs2_checkpt_wr(dev, &cp, - sizeof(cp)) == sizeof(cp)); - - if (ok && - obj->variant_type == - YAFFS_OBJECT_TYPE_FILE) - ok = yaffs2_wr_checkpt_tnodes(obj); - } - } - } - - /* Dump end of list */ - memset(&cp, 0xff, sizeof(struct yaffs_checkpt_obj)); - cp.struct_type = sizeof(cp); - - if (ok) - ok = (yaffs2_checkpt_wr(dev, &cp, sizeof(cp)) == sizeof(cp)); - - return ok ? 1 : 0; -} - -static int yaffs2_rd_checkpt_objs(struct yaffs_dev *dev) -{ - struct yaffs_obj *obj; - struct yaffs_checkpt_obj cp; - int ok = 1; - int done = 0; - LIST_HEAD(hard_list); - - while (ok && !done) { - ok = (yaffs2_checkpt_rd(dev, &cp, sizeof(cp)) == sizeof(cp)); - if (cp.struct_type != sizeof(cp)) { - yaffs_trace(YAFFS_TRACE_CHECKPOINT, - "struct size %d instead of %d ok %d", - cp.struct_type, (int)sizeof(cp), ok); - ok = 0; - } - - yaffs_trace(YAFFS_TRACE_CHECKPOINT, - "Checkpoint read object %d parent %d type %d chunk %d ", - cp.obj_id, cp.parent_id, cp.variant_type, - cp.hdr_chunk); - - if (ok && cp.obj_id == ~0) { - done = 1; - } else if (ok) { - obj = - yaffs_find_or_create_by_number(dev, cp.obj_id, - cp.variant_type); - if (obj) { - ok = yaffs2_checkpt_obj_to_obj(obj, &cp); - if (!ok) - break; - if (obj->variant_type == - YAFFS_OBJECT_TYPE_FILE) { - ok = yaffs2_rd_checkpt_tnodes(obj); - } else if (obj->variant_type == - YAFFS_OBJECT_TYPE_HARDLINK) { - list_add(&obj->hard_links, &hard_list); - } - } else { - ok = 0; - } - } - } - - if (ok) - yaffs_link_fixup(dev, &hard_list); - - return ok ? 1 : 0; -} - -static int yaffs2_wr_checkpt_sum(struct yaffs_dev *dev) -{ - u32 checkpt_sum; - int ok; - - yaffs2_get_checkpt_sum(dev, &checkpt_sum); - - ok = (yaffs2_checkpt_wr(dev, &checkpt_sum, sizeof(checkpt_sum)) == - sizeof(checkpt_sum)); - - if (!ok) - return 0; - - return 1; -} - -static int yaffs2_rd_checkpt_sum(struct yaffs_dev *dev) -{ - u32 checkpt_sum0; - u32 checkpt_sum1; - int ok; - - yaffs2_get_checkpt_sum(dev, &checkpt_sum0); - - ok = (yaffs2_checkpt_rd(dev, &checkpt_sum1, sizeof(checkpt_sum1)) == - sizeof(checkpt_sum1)); - - if (!ok) - return 0; - - if (checkpt_sum0 != checkpt_sum1) - return 0; - - return 1; -} - -static int yaffs2_wr_checkpt_data(struct yaffs_dev *dev) -{ - int ok = 1; - - if (!yaffs2_checkpt_required(dev)) { - yaffs_trace(YAFFS_TRACE_CHECKPOINT, - "skipping checkpoint write"); - ok = 0; - } - - if (ok) - ok = yaffs2_checkpt_open(dev, 1); - - if (ok) { - yaffs_trace(YAFFS_TRACE_CHECKPOINT, - "write checkpoint validity"); - ok = yaffs2_wr_checkpt_validity_marker(dev, 1); - } - if (ok) { - yaffs_trace(YAFFS_TRACE_CHECKPOINT, - "write checkpoint device"); - ok = yaffs2_wr_checkpt_dev(dev); - } - if (ok) { - yaffs_trace(YAFFS_TRACE_CHECKPOINT, - "write checkpoint objects"); - ok = yaffs2_wr_checkpt_objs(dev); - } - if (ok) { - yaffs_trace(YAFFS_TRACE_CHECKPOINT, - "write checkpoint validity"); - ok = yaffs2_wr_checkpt_validity_marker(dev, 0); - } - - if (ok) - ok = yaffs2_wr_checkpt_sum(dev); - - if (!yaffs_checkpt_close(dev)) - ok = 0; - - if (ok) - dev->is_checkpointed = 1; - else - dev->is_checkpointed = 0; - - return dev->is_checkpointed; -} - -static int yaffs2_rd_checkpt_data(struct yaffs_dev *dev) -{ - int ok = 1; - - if (!dev->param.is_yaffs2) - ok = 0; - - if (ok && dev->param.skip_checkpt_rd) { - yaffs_trace(YAFFS_TRACE_CHECKPOINT, - "skipping checkpoint read"); - ok = 0; - } - - if (ok) - ok = yaffs2_checkpt_open(dev, 0); /* open for read */ - - if (ok) { - yaffs_trace(YAFFS_TRACE_CHECKPOINT, - "read checkpoint validity"); - ok = yaffs2_rd_checkpt_validity_marker(dev, 1); - } - if (ok) { - yaffs_trace(YAFFS_TRACE_CHECKPOINT, - "read checkpoint device"); - ok = yaffs2_rd_checkpt_dev(dev); - } - if (ok) { - yaffs_trace(YAFFS_TRACE_CHECKPOINT, - "read checkpoint objects"); - ok = yaffs2_rd_checkpt_objs(dev); - } - if (ok) { - yaffs_trace(YAFFS_TRACE_CHECKPOINT, - "read checkpoint validity"); - ok = yaffs2_rd_checkpt_validity_marker(dev, 0); - } - - if (ok) { - ok = yaffs2_rd_checkpt_sum(dev); - yaffs_trace(YAFFS_TRACE_CHECKPOINT, - "read checkpoint checksum %d", ok); - } - - if (!yaffs_checkpt_close(dev)) - ok = 0; - - if (ok) - dev->is_checkpointed = 1; - else - dev->is_checkpointed = 0; - - return ok ? 1 : 0; -} - -void yaffs2_checkpt_invalidate(struct yaffs_dev *dev) -{ - if (dev->is_checkpointed || dev->blocks_in_checkpt > 0) { - dev->is_checkpointed = 0; - yaffs2_checkpt_invalidate_stream(dev); - } - if (dev->param.sb_dirty_fn) - dev->param.sb_dirty_fn(dev); -} - -int yaffs_checkpoint_save(struct yaffs_dev *dev) -{ - yaffs_trace(YAFFS_TRACE_CHECKPOINT, - "save entry: is_checkpointed %d", - dev->is_checkpointed); - - yaffs_verify_objects(dev); - yaffs_verify_blocks(dev); - yaffs_verify_free_chunks(dev); - - if (!dev->is_checkpointed) { - yaffs2_checkpt_invalidate(dev); - yaffs2_wr_checkpt_data(dev); - } - - yaffs_trace(YAFFS_TRACE_CHECKPOINT | YAFFS_TRACE_MOUNT, - "save exit: is_checkpointed %d", - dev->is_checkpointed); - - return dev->is_checkpointed; -} - -int yaffs2_checkpt_restore(struct yaffs_dev *dev) -{ - int retval; - - yaffs_trace(YAFFS_TRACE_CHECKPOINT, - "restore entry: is_checkpointed %d", - dev->is_checkpointed); - - retval = yaffs2_rd_checkpt_data(dev); - - if (dev->is_checkpointed) { - yaffs_verify_objects(dev); - yaffs_verify_blocks(dev); - yaffs_verify_free_chunks(dev); - } - - yaffs_trace(YAFFS_TRACE_CHECKPOINT, - "restore exit: is_checkpointed %d", - dev->is_checkpointed); - - return retval; -} - -int yaffs2_handle_hole(struct yaffs_obj *obj, loff_t new_size) -{ - /* if new_size > old_file_size. - * We're going to be writing a hole. - * If the hole is small then write zeros otherwise write a start - * of hole marker. - */ - loff_t old_file_size; - loff_t increase; - int small_hole; - int result = YAFFS_OK; - struct yaffs_dev *dev = NULL; - u8 *local_buffer = NULL; - int small_increase_ok = 0; - - if (!obj) - return YAFFS_FAIL; - - if (obj->variant_type != YAFFS_OBJECT_TYPE_FILE) - return YAFFS_FAIL; - - dev = obj->my_dev; - - /* Bail out if not yaffs2 mode */ - if (!dev->param.is_yaffs2) - return YAFFS_OK; - - old_file_size = obj->variant.file_variant.file_size; - - if (new_size <= old_file_size) - return YAFFS_OK; - - increase = new_size - old_file_size; - - if (increase < YAFFS_SMALL_HOLE_THRESHOLD * dev->data_bytes_per_chunk && - yaffs_check_alloc_available(dev, YAFFS_SMALL_HOLE_THRESHOLD + 1)) - small_hole = 1; - else - small_hole = 0; - - if (small_hole) - local_buffer = yaffs_get_temp_buffer(dev); - - if (local_buffer) { - /* fill hole with zero bytes */ - loff_t pos = old_file_size; - int this_write; - int written; - memset(local_buffer, 0, dev->data_bytes_per_chunk); - small_increase_ok = 1; - - while (increase > 0 && small_increase_ok) { - this_write = increase; - if (this_write > dev->data_bytes_per_chunk) - this_write = dev->data_bytes_per_chunk; - written = - yaffs_do_file_wr(obj, local_buffer, pos, this_write, - 0); - if (written == this_write) { - pos += this_write; - increase -= this_write; - } else { - small_increase_ok = 0; - } - } - - yaffs_release_temp_buffer(dev, local_buffer); - - /* If out of space then reverse any chunks we've added */ - if (!small_increase_ok) - yaffs_resize_file_down(obj, old_file_size); - } - - if (!small_increase_ok && - obj->parent && - obj->parent->obj_id != YAFFS_OBJECTID_UNLINKED && - obj->parent->obj_id != YAFFS_OBJECTID_DELETED) { - /* Write a hole start header with the old file size */ - yaffs_update_oh(obj, NULL, 0, 1, 0, NULL); - } - - return result; -} - -struct yaffs_block_index { - int seq; - int block; -}; - -static int yaffs2_ybicmp(const void *a, const void *b) -{ - int aseq = ((struct yaffs_block_index *)a)->seq; - int bseq = ((struct yaffs_block_index *)b)->seq; - int ablock = ((struct yaffs_block_index *)a)->block; - int bblock = ((struct yaffs_block_index *)b)->block; - - if (aseq == bseq) - return ablock - bblock; - - return aseq - bseq; -} - -static inline int yaffs2_scan_chunk(struct yaffs_dev *dev, - struct yaffs_block_info *bi, - int blk, int chunk_in_block, - int *found_chunks, - u8 *chunk_data, - struct list_head *hard_list, - int summary_available) -{ - struct yaffs_obj_hdr *oh; - struct yaffs_obj *in; - struct yaffs_obj *parent; - int equiv_id; - loff_t file_size; - int is_shrink; - int is_unlinked; - struct yaffs_ext_tags tags; - int alloc_failed = 0; - int chunk = blk * dev->param.chunks_per_block + chunk_in_block; - struct yaffs_file_var *file_var; - struct yaffs_hardlink_var *hl_var; - struct yaffs_symlink_var *sl_var; - - if (summary_available) { - yaffs_summary_fetch(dev, &tags, chunk_in_block); - tags.seq_number = bi->seq_number; - } - - if (!summary_available || tags.obj_id == 0) { - yaffs_rd_chunk_tags_nand(dev, chunk, NULL, &tags); - dev->tags_used++; - } else { - dev->summary_used++; - } - - /* Let's have a good look at this chunk... */ - - if (!tags.chunk_used) { - /* An unassigned chunk in the block. - * If there are used chunks after this one, then - * it is a chunk that was skipped due to failing - * the erased check. Just skip it so that it can - * be deleted. - * But, more typically, We get here when this is - * an unallocated chunk and his means that - * either the block is empty or this is the one - * being allocated from - */ - - if (*found_chunks) { - /* This is a chunk that was skipped due - * to failing the erased check */ - } else if (chunk_in_block == 0) { - /* We're looking at the first chunk in - * the block so the block is unused */ - bi->block_state = YAFFS_BLOCK_STATE_EMPTY; - dev->n_erased_blocks++; - } else { - if (bi->block_state == YAFFS_BLOCK_STATE_NEEDS_SCAN || - bi->block_state == YAFFS_BLOCK_STATE_ALLOCATING) { - if (dev->seq_number == bi->seq_number) { - /* Allocating from this block*/ - yaffs_trace(YAFFS_TRACE_SCAN, - " Allocating from %d %d", - blk, chunk_in_block); - - bi->block_state = - YAFFS_BLOCK_STATE_ALLOCATING; - dev->alloc_block = blk; - dev->alloc_page = chunk_in_block; - dev->alloc_block_finder = blk; - } else { - /* This is a partially written block - * that is not the current - * allocation block. - */ - yaffs_trace(YAFFS_TRACE_SCAN, - "Partially written block %d detected. gc will fix this.", - blk); - } - } - } - - dev->n_free_chunks++; - - } else if (tags.ecc_result == - YAFFS_ECC_RESULT_UNFIXED) { - yaffs_trace(YAFFS_TRACE_SCAN, - " Unfixed ECC in chunk(%d:%d), chunk ignored", - blk, chunk_in_block); - dev->n_free_chunks++; - } else if (tags.obj_id > YAFFS_MAX_OBJECT_ID || - tags.chunk_id > YAFFS_MAX_CHUNK_ID || - tags.obj_id == YAFFS_OBJECTID_SUMMARY || - (tags.chunk_id > 0 && - tags.n_bytes > dev->data_bytes_per_chunk) || - tags.seq_number != bi->seq_number) { - yaffs_trace(YAFFS_TRACE_SCAN, - "Chunk (%d:%d) with bad tags:obj = %d, chunk_id = %d, n_bytes = %d, ignored", - blk, chunk_in_block, tags.obj_id, - tags.chunk_id, tags.n_bytes); - dev->n_free_chunks++; - } else if (tags.chunk_id > 0) { - /* chunk_id > 0 so it is a data chunk... */ - loff_t endpos; - loff_t chunk_base = (tags.chunk_id - 1) * - dev->data_bytes_per_chunk; - - *found_chunks = 1; - - yaffs_set_chunk_bit(dev, blk, chunk_in_block); - bi->pages_in_use++; - - in = yaffs_find_or_create_by_number(dev, - tags.obj_id, - YAFFS_OBJECT_TYPE_FILE); - if (!in) - /* Out of memory */ - alloc_failed = 1; - - if (in && - in->variant_type == YAFFS_OBJECT_TYPE_FILE && - chunk_base < in->variant.file_variant.shrink_size) { - /* This has not been invalidated by - * a resize */ - if (!yaffs_put_chunk_in_file(in, tags.chunk_id, - chunk, -1)) - alloc_failed = 1; - - /* File size is calculated by looking at - * the data chunks if we have not - * seen an object header yet. - * Stop this practice once we find an - * object header. - */ - endpos = chunk_base + tags.n_bytes; - - if (!in->valid && - in->variant.file_variant.scanned_size < endpos) { - in->variant.file_variant. - scanned_size = endpos; - in->variant.file_variant. - file_size = endpos; - } - } else if (in) { - /* This chunk has been invalidated by a - * resize, or a past file deletion - * so delete the chunk*/ - yaffs_chunk_del(dev, chunk, 1, __LINE__); - } - } else { - /* chunk_id == 0, so it is an ObjectHeader. - * Thus, we read in the object header and make - * the object - */ - *found_chunks = 1; - - yaffs_set_chunk_bit(dev, blk, chunk_in_block); - bi->pages_in_use++; - - oh = NULL; - in = NULL; - - if (tags.extra_available) { - in = yaffs_find_or_create_by_number(dev, - tags.obj_id, - tags.extra_obj_type); - if (!in) - alloc_failed = 1; - } - - if (!in || - (!in->valid && dev->param.disable_lazy_load) || - tags.extra_shadows || - (!in->valid && (tags.obj_id == YAFFS_OBJECTID_ROOT || - tags.obj_id == YAFFS_OBJECTID_LOSTNFOUND))) { - - /* If we don't have valid info then we - * need to read the chunk - * TODO In future we can probably defer - * reading the chunk and living with - * invalid data until needed. - */ - - yaffs_rd_chunk_tags_nand(dev, chunk, chunk_data, NULL); - - oh = (struct yaffs_obj_hdr *)chunk_data; - - if (dev->param.inband_tags) { - /* Fix up the header if they got - * corrupted by inband tags */ - oh->shadows_obj = - oh->inband_shadowed_obj_id; - oh->is_shrink = - oh->inband_is_shrink; - } - - if (!in) { - in = yaffs_find_or_create_by_number(dev, - tags.obj_id, oh->type); - if (!in) - alloc_failed = 1; - } - } - - if (!in) { - /* TODO Hoosterman we have a problem! */ - yaffs_trace(YAFFS_TRACE_ERROR, - "yaffs tragedy: Could not make object for object %d at chunk %d during scan", - tags.obj_id, chunk); - return YAFFS_FAIL; - } - - if (in->valid) { - /* We have already filled this one. - * We have a duplicate that will be - * discarded, but we first have to suck - * out resize info if it is a file. - */ - if ((in->variant_type == YAFFS_OBJECT_TYPE_FILE) && - ((oh && oh->type == YAFFS_OBJECT_TYPE_FILE) || - (tags.extra_available && - tags.extra_obj_type == YAFFS_OBJECT_TYPE_FILE) - )) { - loff_t this_size = (oh) ? - yaffs_oh_to_size(oh) : - tags.extra_file_size; - u32 parent_obj_id = (oh) ? - oh->parent_obj_id : - tags.extra_parent_id; - - is_shrink = (oh) ? - oh->is_shrink : - tags.extra_is_shrink; - - /* If it is deleted (unlinked - * at start also means deleted) - * we treat the file size as - * being zeroed at this point. - */ - if (parent_obj_id == YAFFS_OBJECTID_DELETED || - parent_obj_id == YAFFS_OBJECTID_UNLINKED) { - this_size = 0; - is_shrink = 1; - } - - if (is_shrink && - in->variant.file_variant.shrink_size > - this_size) - in->variant.file_variant.shrink_size = - this_size; - - if (is_shrink) - bi->has_shrink_hdr = 1; - } - /* Use existing - destroy this one. */ - yaffs_chunk_del(dev, chunk, 1, __LINE__); - } - - if (!in->valid && in->variant_type != - (oh ? oh->type : tags.extra_obj_type)) - yaffs_trace(YAFFS_TRACE_ERROR, - "yaffs tragedy: Bad object type, %d != %d, for object %d at chunk %d during scan", - oh ? oh->type : tags.extra_obj_type, - in->variant_type, tags.obj_id, - chunk); - - if (!in->valid && - (tags.obj_id == YAFFS_OBJECTID_ROOT || - tags.obj_id == YAFFS_OBJECTID_LOSTNFOUND)) { - /* We only load some info, don't fiddle - * with directory structure */ - in->valid = 1; - - if (oh) { - in->yst_mode = oh->yst_mode; - yaffs_load_attribs(in, oh); - in->lazy_loaded = 0; - } else { - in->lazy_loaded = 1; - } - in->hdr_chunk = chunk; - - } else if (!in->valid) { - /* we need to load this info */ - in->valid = 1; - in->hdr_chunk = chunk; - if (oh) { - in->variant_type = oh->type; - in->yst_mode = oh->yst_mode; - yaffs_load_attribs(in, oh); - - if (oh->shadows_obj > 0) - yaffs_handle_shadowed_obj(dev, - oh->shadows_obj, 1); - - yaffs_set_obj_name_from_oh(in, oh); - parent = yaffs_find_or_create_by_number(dev, - oh->parent_obj_id, - YAFFS_OBJECT_TYPE_DIRECTORY); - file_size = yaffs_oh_to_size(oh); - is_shrink = oh->is_shrink; - equiv_id = oh->equiv_id; - } else { - in->variant_type = tags.extra_obj_type; - parent = yaffs_find_or_create_by_number(dev, - tags.extra_parent_id, - YAFFS_OBJECT_TYPE_DIRECTORY); - file_size = tags.extra_file_size; - is_shrink = tags.extra_is_shrink; - equiv_id = tags.extra_equiv_id; - in->lazy_loaded = 1; - } - in->dirty = 0; - - if (!parent) - alloc_failed = 1; - - /* directory stuff... - * hook up to parent - */ - - if (parent && - parent->variant_type == YAFFS_OBJECT_TYPE_UNKNOWN) { - /* Set up as a directory */ - parent->variant_type = - YAFFS_OBJECT_TYPE_DIRECTORY; - INIT_LIST_HEAD(&parent-> - variant.dir_variant.children); - } else if (!parent || - parent->variant_type != - YAFFS_OBJECT_TYPE_DIRECTORY) { - /* Hoosterman, another problem.... - * Trying to use a non-directory as a directory - */ - - yaffs_trace(YAFFS_TRACE_ERROR, - "yaffs tragedy: attempting to use non-directory as a directory in scan. Put in lost+found." - ); - parent = dev->lost_n_found; - } - yaffs_add_obj_to_dir(parent, in); - - is_unlinked = (parent == dev->del_dir) || - (parent == dev->unlinked_dir); - - if (is_shrink) - /* Mark the block */ - bi->has_shrink_hdr = 1; - - /* Note re hardlinks. - * Since we might scan a hardlink before its equivalent - * object is scanned we put them all in a list. - * After scanning is complete, we should have all the - * objects, so we run through this list and fix up all - * the chains. - */ - - switch (in->variant_type) { - case YAFFS_OBJECT_TYPE_UNKNOWN: - /* Todo got a problem */ - break; - case YAFFS_OBJECT_TYPE_FILE: - file_var = &in->variant.file_variant; - if (file_var->scanned_size < file_size) { - /* This covers the case where the file - * size is greater than the data held. - * This will happen if the file is - * resized to be larger than its - * current data extents. - */ - file_var->file_size = file_size; - file_var->scanned_size = file_size; - } - - if (file_var->shrink_size > file_size) - file_var->shrink_size = file_size; - - break; - case YAFFS_OBJECT_TYPE_HARDLINK: - hl_var = &in->variant.hardlink_variant; - if (!is_unlinked) { - hl_var->equiv_id = equiv_id; - list_add(&in->hard_links, hard_list); - } - break; - case YAFFS_OBJECT_TYPE_DIRECTORY: - /* Do nothing */ - break; - case YAFFS_OBJECT_TYPE_SPECIAL: - /* Do nothing */ - break; - case YAFFS_OBJECT_TYPE_SYMLINK: - sl_var = &in->variant.symlink_variant; - if (oh) { - sl_var->alias = - yaffs_clone_str(oh->alias); - if (!sl_var->alias) - alloc_failed = 1; - } - break; - } - } - } - return alloc_failed ? YAFFS_FAIL : YAFFS_OK; -} - -int yaffs2_scan_backwards(struct yaffs_dev *dev) -{ - int blk; - int block_iter; - int start_iter; - int end_iter; - int n_to_scan = 0; - enum yaffs_block_state state; - int c; - LIST_HEAD(hard_list); - struct yaffs_block_info *bi; - u32 seq_number; - int n_blocks = dev->internal_end_block - dev->internal_start_block + 1; - u8 *chunk_data; - int found_chunks; - int alloc_failed = 0; - struct yaffs_block_index *block_index = NULL; - int alt_block_index = 0; - int summary_available; - - yaffs_trace(YAFFS_TRACE_SCAN, - "yaffs2_scan_backwards starts intstartblk %d intendblk %d...", - dev->internal_start_block, dev->internal_end_block); - - dev->seq_number = YAFFS_LOWEST_SEQUENCE_NUMBER; - - block_index = - kmalloc(n_blocks * sizeof(struct yaffs_block_index), GFP_NOFS); - - if (!block_index) { - block_index = - vmalloc(n_blocks * sizeof(struct yaffs_block_index)); - alt_block_index = 1; - } - - if (!block_index) { - yaffs_trace(YAFFS_TRACE_SCAN, - "yaffs2_scan_backwards() could not allocate block index!" - ); - return YAFFS_FAIL; - } - - dev->blocks_in_checkpt = 0; - - chunk_data = yaffs_get_temp_buffer(dev); - - /* Scan all the blocks to determine their state */ - bi = dev->block_info; - for (blk = dev->internal_start_block; blk <= dev->internal_end_block; - blk++) { - yaffs_clear_chunk_bits(dev, blk); - bi->pages_in_use = 0; - bi->soft_del_pages = 0; - - yaffs_query_init_block_state(dev, blk, &state, &seq_number); - - bi->block_state = state; - bi->seq_number = seq_number; - - if (bi->seq_number == YAFFS_SEQUENCE_CHECKPOINT_DATA) - bi->block_state = YAFFS_BLOCK_STATE_CHECKPOINT; - if (bi->seq_number == YAFFS_SEQUENCE_BAD_BLOCK) - bi->block_state = YAFFS_BLOCK_STATE_DEAD; - - yaffs_trace(YAFFS_TRACE_SCAN_DEBUG, - "Block scanning block %d state %d seq %d", - blk, bi->block_state, seq_number); - - if (bi->block_state == YAFFS_BLOCK_STATE_CHECKPOINT) { - dev->blocks_in_checkpt++; - - } else if (bi->block_state == YAFFS_BLOCK_STATE_DEAD) { - yaffs_trace(YAFFS_TRACE_BAD_BLOCKS, - "block %d is bad", blk); - } else if (bi->block_state == YAFFS_BLOCK_STATE_EMPTY) { - yaffs_trace(YAFFS_TRACE_SCAN_DEBUG, "Block empty "); - dev->n_erased_blocks++; - dev->n_free_chunks += dev->param.chunks_per_block; - } else if (bi->block_state == - YAFFS_BLOCK_STATE_NEEDS_SCAN) { - /* Determine the highest sequence number */ - if (seq_number >= YAFFS_LOWEST_SEQUENCE_NUMBER && - seq_number < YAFFS_HIGHEST_SEQUENCE_NUMBER) { - block_index[n_to_scan].seq = seq_number; - block_index[n_to_scan].block = blk; - n_to_scan++; - if (seq_number >= dev->seq_number) - dev->seq_number = seq_number; - } else { - /* TODO: Nasty sequence number! */ - yaffs_trace(YAFFS_TRACE_SCAN, - "Block scanning block %d has bad sequence number %d", - blk, seq_number); - } - } - bi++; - } - - yaffs_trace(YAFFS_TRACE_SCAN, "%d blocks to be sorted...", n_to_scan); - - cond_resched(); - - /* Sort the blocks by sequence number */ - sort(block_index, n_to_scan, sizeof(struct yaffs_block_index), - yaffs2_ybicmp, NULL); - - cond_resched(); - - yaffs_trace(YAFFS_TRACE_SCAN, "...done"); - - /* Now scan the blocks looking at the data. */ - start_iter = 0; - end_iter = n_to_scan - 1; - yaffs_trace(YAFFS_TRACE_SCAN_DEBUG, "%d blocks to scan", n_to_scan); - - /* For each block.... backwards */ - for (block_iter = end_iter; - !alloc_failed && block_iter >= start_iter; - block_iter--) { - /* Cooperative multitasking! This loop can run for so - long that watchdog timers expire. */ - cond_resched(); - - /* get the block to scan in the correct order */ - blk = block_index[block_iter].block; - bi = yaffs_get_block_info(dev, blk); - - summary_available = yaffs_summary_read(dev, dev->sum_tags, blk); - - /* For each chunk in each block that needs scanning.... */ - found_chunks = 0; - if (summary_available) - c = dev->chunks_per_summary - 1; - else - c = dev->param.chunks_per_block - 1; - - for (/* c is already initialised */; - !alloc_failed && c >= 0 && - (bi->block_state == YAFFS_BLOCK_STATE_NEEDS_SCAN || - bi->block_state == YAFFS_BLOCK_STATE_ALLOCATING); - c--) { - /* Scan backwards... - * Read the tags and decide what to do - */ - if (yaffs2_scan_chunk(dev, bi, blk, c, - &found_chunks, chunk_data, - &hard_list, summary_available) == - YAFFS_FAIL) - alloc_failed = 1; - } - - if (bi->block_state == YAFFS_BLOCK_STATE_NEEDS_SCAN) { - /* If we got this far while scanning, then the block - * is fully allocated. */ - bi->block_state = YAFFS_BLOCK_STATE_FULL; - } - - /* Now let's see if it was dirty */ - if (bi->pages_in_use == 0 && - !bi->has_shrink_hdr && - bi->block_state == YAFFS_BLOCK_STATE_FULL) { - yaffs_block_became_dirty(dev, blk); - } - } - - yaffs_skip_rest_of_block(dev); - - if (alt_block_index) - vfree(block_index); - else - kfree(block_index); - - /* Ok, we've done all the scanning. - * Fix up the hard link chains. - * We have scanned all the objects, now it's time to add these - * hardlinks. - */ - yaffs_link_fixup(dev, &hard_list); - - yaffs_release_temp_buffer(dev, chunk_data); - - if (alloc_failed) - return YAFFS_FAIL; - - yaffs_trace(YAFFS_TRACE_SCAN, "yaffs2_scan_backwards ends"); - - return YAFFS_OK; -} diff --git a/fs/yaffs2/yaffs_yaffs2.h b/fs/yaffs2/yaffs_yaffs2.h deleted file mode 100644 index 2363bfd8bca..00000000000 --- a/fs/yaffs2/yaffs_yaffs2.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -#ifndef __YAFFS_YAFFS2_H__ -#define __YAFFS_YAFFS2_H__ - -#include "yaffs_guts.h" - -void yaffs_calc_oldest_dirty_seq(struct yaffs_dev *dev); -void yaffs2_find_oldest_dirty_seq(struct yaffs_dev *dev); -void yaffs2_clear_oldest_dirty_seq(struct yaffs_dev *dev, - struct yaffs_block_info *bi); -void yaffs2_update_oldest_dirty_seq(struct yaffs_dev *dev, unsigned block_no, - struct yaffs_block_info *bi); -int yaffs_block_ok_for_gc(struct yaffs_dev *dev, struct yaffs_block_info *bi); -u32 yaffs2_find_refresh_block(struct yaffs_dev *dev); -int yaffs2_checkpt_required(struct yaffs_dev *dev); -int yaffs_calc_checkpt_blocks_required(struct yaffs_dev *dev); - -void yaffs2_checkpt_invalidate(struct yaffs_dev *dev); -int yaffs2_checkpt_save(struct yaffs_dev *dev); -int yaffs2_checkpt_restore(struct yaffs_dev *dev); - -int yaffs2_handle_hole(struct yaffs_obj *obj, loff_t new_size); -int yaffs2_scan_backwards(struct yaffs_dev *dev); - -#endif diff --git a/fs/yaffs2/yaffscfg.h b/fs/yaffs2/yaffscfg.h deleted file mode 100644 index 4f723d6480c..00000000000 --- a/fs/yaffs2/yaffscfg.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -/* - * Header file for using yaffs in an application via - * a direct interface. - */ - -#ifndef __YAFFSCFG_H__ -#define __YAFFSCFG_H__ - -#include "yportenv.h" - -#define YAFFSFS_N_HANDLES 100 -#define YAFFSFS_N_DSC 20 - -struct yaffsfs_DeviceConfiguration { - const YCHAR *prefix; - struct yaffs_dev *dev; -}; - -#endif diff --git a/fs/yaffs2/yaffsfs.c b/fs/yaffs2/yaffsfs.c deleted file mode 100644 index c4909af9fc5..00000000000 --- a/fs/yaffs2/yaffsfs.c +++ /dev/null @@ -1,3208 +0,0 @@ -/* - * YAFFS: Yet Another Flash File System. A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <div64.h> -#include "yaffsfs.h" -#include "yaffs_guts.h" -#include "yaffscfg.h" -#include "yportenv.h" -#include "yaffs_trace.h" -#include <dm/devres.h> - -#define YAFFSFS_MAX_SYMLINK_DEREFERENCES 5 - -#ifndef NULL -#define NULL ((void *)0) -#endif - -/* YAFFSFS_RW_SIZE must be a power of 2 */ -#define YAFFSFS_RW_SHIFT (13) -#define YAFFSFS_RW_SIZE (1<<YAFFSFS_RW_SHIFT) - -/* Some forward references */ -static struct yaffs_obj *yaffsfs_FindObject(struct yaffs_obj *relativeDirectory, - const YCHAR *path, - int symDepth, int getEquiv, - struct yaffs_obj **dirOut, - int *notDir, int *loop); - -static void yaffsfs_RemoveObjectCallback(struct yaffs_obj *obj); - -unsigned int yaffs_wr_attempts; - -/* - * Handle management. - * There are open inodes in struct yaffsfs_Inode. - * There are open file descriptors in yaffsfs_FileDes. - * There are open handles in yaffsfs_FileDes. - * - * Things are structured this way to be like the Linux VFS model - * so that interactions with the yaffs guts calls are similar. - * That means more common code paths and less special code. - * That means better testing etc. - * - * We have 3 layers because: - * A handle is different than an fd because you can use dup() - * to create a new handle that accesses the *same* fd. The two - * handles will use the same offset (part of the fd). We only close - * down the fd when there are no more handles accessing it. - * - * More than one fd can currently access one file, but each fd - * has its own permsiions and offset. - */ - -struct yaffsfs_Inode { - int count; /* Number of handles accessing this inode */ - struct yaffs_obj *iObj; -}; - -struct yaffsfs_FileDes { - u8 reading:1; - u8 writing:1; - u8 append:1; - u8 shareRead:1; - u8 shareWrite:1; - int inodeId:12; /* Index to corresponding yaffsfs_Inode */ - int handleCount:10; /* Number of handles for this fd */ - loff_t position; /* current position in file */ -}; - -struct yaffsfs_Handle { - short int fdId; - short int useCount; -}; - -struct yaffsfs_DirSearchContxt { - struct yaffs_dirent de; /* directory entry */ - YCHAR name[NAME_MAX + 1]; /* name of directory being searched */ - struct yaffs_obj *dirObj; /* ptr to directory being searched */ - struct yaffs_obj *nextReturn; /* obj returned by next readddir */ - struct list_head others; - int offset:20; - unsigned inUse:1; -}; - -static struct yaffsfs_DirSearchContxt yaffsfs_dsc[YAFFSFS_N_DSC]; -static struct yaffsfs_Inode yaffsfs_inode[YAFFSFS_N_HANDLES]; -static struct yaffsfs_FileDes yaffsfs_fd[YAFFSFS_N_HANDLES]; -static struct yaffsfs_Handle yaffsfs_handle[YAFFSFS_N_HANDLES]; - -static int yaffsfs_handlesInitialised; - -unsigned yaffs_set_trace(unsigned tm) -{ - yaffs_trace_mask = tm; - return yaffs_trace_mask; -} - -unsigned yaffs_get_trace(void) -{ - return yaffs_trace_mask; -} - -/* - * yaffsfs_InitHandle - * Inilitalise handle management on start-up. - */ - -static void yaffsfs_InitHandles(void) -{ - int i; - if (yaffsfs_handlesInitialised) - return; - - memset(yaffsfs_inode, 0, sizeof(yaffsfs_inode)); - memset(yaffsfs_fd, 0, sizeof(yaffsfs_fd)); - memset(yaffsfs_handle, 0, sizeof(yaffsfs_handle)); - memset(yaffsfs_dsc, 0, sizeof(yaffsfs_dsc)); - - for (i = 0; i < YAFFSFS_N_HANDLES; i++) - yaffsfs_fd[i].inodeId = -1; - for (i = 0; i < YAFFSFS_N_HANDLES; i++) - yaffsfs_handle[i].fdId = -1; -} - -static struct yaffsfs_Handle *yaffsfs_HandleToPointer(int h) -{ - if (h >= 0 && h < YAFFSFS_N_HANDLES) - return &yaffsfs_handle[h]; - return NULL; -} - -static struct yaffsfs_FileDes *yaffsfs_HandleToFileDes(int handle) -{ - struct yaffsfs_Handle *h = yaffsfs_HandleToPointer(handle); - - if (h && h->useCount > 0 && h->fdId >= 0 && h->fdId < YAFFSFS_N_HANDLES) - return &yaffsfs_fd[h->fdId]; - - return NULL; -} - -static struct yaffsfs_Inode *yaffsfs_HandleToInode(int handle) -{ - struct yaffsfs_FileDes *fd = yaffsfs_HandleToFileDes(handle); - - if (fd && fd->handleCount > 0 && - fd->inodeId >= 0 && fd->inodeId < YAFFSFS_N_HANDLES) - return &yaffsfs_inode[fd->inodeId]; - - return NULL; -} - -static struct yaffs_obj *yaffsfs_HandleToObject(int handle) -{ - struct yaffsfs_Inode *in = yaffsfs_HandleToInode(handle); - - if (in) - return in->iObj; - - return NULL; -} - -/* - * yaffsfs_FindInodeIdForObject - * Find the inode entry for an object, if it exists. - */ - -static int yaffsfs_FindInodeIdForObject(struct yaffs_obj *obj) -{ - int i; - int ret = -1; - - if (obj) - obj = yaffs_get_equivalent_obj(obj); - - /* Look for it in open inode table */ - for (i = 0; i < YAFFSFS_N_HANDLES && ret < 0; i++) { - if (yaffsfs_inode[i].iObj == obj) - ret = i; - } - return ret; -} - -/* - * yaffsfs_GetInodeIdForObject - * Grab an inode entry when opening a new inode. - */ -static int yaffsfs_GetInodeIdForObject(struct yaffs_obj *obj) -{ - int i; - int ret; - struct yaffsfs_Inode *in = NULL; - - if (obj) - obj = yaffs_get_equivalent_obj(obj); - - ret = yaffsfs_FindInodeIdForObject(obj); - - for (i = 0; i < YAFFSFS_N_HANDLES && ret < 0; i++) { - if (!yaffsfs_inode[i].iObj) - ret = i; - } - - if (ret >= 0) { - in = &yaffsfs_inode[ret]; - if (!in->iObj) - in->count = 0; - in->iObj = obj; - in->count++; - } - - return ret; -} - -static int yaffsfs_CountHandles(struct yaffs_obj *obj) -{ - int i = yaffsfs_FindInodeIdForObject(obj); - - if (i >= 0) - return yaffsfs_inode[i].count; - else - return 0; -} - -static void yaffsfs_ReleaseInode(struct yaffsfs_Inode *in) -{ - struct yaffs_obj *obj; - - obj = in->iObj; - - if (obj->unlinked) - yaffs_del_obj(obj); - - obj->my_inode = NULL; - in->iObj = NULL; - -} - -static void yaffsfs_PutInode(int inodeId) -{ - if (inodeId >= 0 && inodeId < YAFFSFS_N_HANDLES) { - struct yaffsfs_Inode *in = &yaffsfs_inode[inodeId]; - in->count--; - if (in->count <= 0) { - yaffsfs_ReleaseInode(in); - in->count = 0; - } - } -} - -static int yaffsfs_NewHandle(struct yaffsfs_Handle **hptr) -{ - int i; - struct yaffsfs_Handle *h; - - for (i = 0; i < YAFFSFS_N_HANDLES; i++) { - h = &yaffsfs_handle[i]; - if (h->useCount < 1) { - memset(h, 0, sizeof(struct yaffsfs_Handle)); - h->fdId = -1; - h->useCount = 1; - if (hptr) - *hptr = h; - return i; - } - } - return -1; -} - -static int yaffsfs_NewHandleAndFileDes(void) -{ - int i; - struct yaffsfs_FileDes *fd; - struct yaffsfs_Handle *h = NULL; - int handle = yaffsfs_NewHandle(&h); - - if (handle < 0) - return -1; - - for (i = 0; i < YAFFSFS_N_HANDLES; i++) { - fd = &yaffsfs_fd[i]; - if (fd->handleCount < 1) { - memset(fd, 0, sizeof(struct yaffsfs_FileDes)); - fd->inodeId = -1; - fd->handleCount = 1; - h->fdId = i; - return handle; - } - } - - /* Dump the handle because we could not get a fd */ - h->useCount = 0; - return -1; -} - -/* - * yaffs_get_handle - * Increase use of handle when reading/writing a file - * Also gets the file descriptor. - */ - -static int yaffsfs_GetHandle(int handle) -{ - struct yaffsfs_Handle *h = yaffsfs_HandleToPointer(handle); - - if (h && h->useCount > 0) { - h->useCount++; - return 0; - } - return -1; -} - -/* - * yaffs_put_handle - * Let go of a handle when closing a file or aborting an open or - * ending a read or write. - */ - -static int yaffsfs_PutFileDes(int fdId) -{ - struct yaffsfs_FileDes *fd; - - if (fdId >= 0 && fdId < YAFFSFS_N_HANDLES) { - fd = &yaffsfs_fd[fdId]; - fd->handleCount--; - if (fd->handleCount < 1) { - if (fd->inodeId >= 0) { - yaffsfs_PutInode(fd->inodeId); - fd->inodeId = -1; - } - } - } - return 0; -} - -static int yaffsfs_PutHandle(int handle) -{ - struct yaffsfs_Handle *h = yaffsfs_HandleToPointer(handle); - - if (h && h->useCount > 0) { - h->useCount--; - if (h->useCount < 1) { - yaffsfs_PutFileDes(h->fdId); - h->fdId = -1; - } - } - - return 0; -} - -static void yaffsfs_BreakDeviceHandles(struct yaffs_dev *dev) -{ - struct yaffsfs_FileDes *fd; - struct yaffsfs_Handle *h; - struct yaffs_obj *obj; - int i; - for (i = 0; i < YAFFSFS_N_HANDLES; i++) { - h = yaffsfs_HandleToPointer(i); - fd = yaffsfs_HandleToFileDes(i); - obj = yaffsfs_HandleToObject(i); - if (h && h->useCount > 0) { - h->useCount = 0; - h->fdId = 0; - } - if (fd && fd->handleCount > 0 && obj && obj->my_dev == dev) { - fd->handleCount = 0; - yaffsfs_PutInode(fd->inodeId); - fd->inodeId = -1; - } - } -} - -/* - * Stuff to handle names. - */ -#ifdef CONFIG_YAFFS_CASE_INSENSITIVE - -static int yaffs_toupper(YCHAR a) -{ - if (a >= 'a' && a <= 'z') - return (a - 'a') + 'A'; - else - return a; -} - -int yaffsfs_Match(YCHAR a, YCHAR b) -{ - return (yaffs_toupper(a) == yaffs_toupper(b)); -} -#else -int yaffsfs_Match(YCHAR a, YCHAR b) -{ - /* case sensitive */ - return (a == b); -} -#endif - -int yaffsfs_IsPathDivider(YCHAR ch) -{ - const YCHAR *str = YAFFS_PATH_DIVIDERS; - - while (*str) { - if (*str == ch) - return 1; - str++; - } - - return 0; -} - -int yaffsfs_CheckNameLength(const char *name) -{ - int retVal = 0; - - int nameLength = yaffs_strnlen(name, YAFFS_MAX_NAME_LENGTH + 1); - - if (nameLength == 0) { - yaffsfs_SetError(-ENOENT); - retVal = -1; - } else if (nameLength > YAFFS_MAX_NAME_LENGTH) { - yaffsfs_SetError(-ENAMETOOLONG); - retVal = -1; - } - - return retVal; -} - -static int yaffsfs_alt_dir_path(const YCHAR *path, YCHAR **ret_path) -{ - YCHAR *alt_path = NULL; - int path_length; - int i; - - /* - * We don't have a definition for max path length. - * We will use 3 * max name length instead. - */ - *ret_path = NULL; - path_length = yaffs_strnlen(path, (YAFFS_MAX_NAME_LENGTH + 1) * 3 + 1); - - /* If the last character is a path divider, then we need to - * trim it back so that the name look-up works properly. - * eg. /foo/new_dir/ -> /foo/newdir - * Curveball: Need to handle multiple path dividers: - * eg. /foof/sdfse///// -> /foo/sdfse - */ - if (path_length > 0 && yaffsfs_IsPathDivider(path[path_length - 1])) { - alt_path = kmalloc(path_length + 1, 0); - if (!alt_path) - return -1; - yaffs_strcpy(alt_path, path); - for (i = path_length - 1; - i >= 0 && yaffsfs_IsPathDivider(alt_path[i]); i--) - alt_path[i] = (YCHAR) 0; - } - *ret_path = alt_path; - return 0; -} - -static LIST_HEAD(yaffsfs_deviceList); - -/* - * yaffsfs_FindDevice - * yaffsfs_FindRoot - * Scan the configuration list to find the device - * Curveballs: Should match paths that end in '/' too - * Curveball2 Might have "/x/ and "/x/y". Need to return the longest match - */ -static struct yaffs_dev *yaffsfs_FindDevice(const YCHAR *path, - YCHAR **restOfPath) -{ - struct list_head *cfg; - const YCHAR *leftOver; - const YCHAR *p; - struct yaffs_dev *retval = NULL; - struct yaffs_dev *dev = NULL; - int thisMatchLength; - int longestMatch = -1; - int matching; - - /* - * Check all configs, choose the one that: - * 1) Actually matches a prefix (ie /a amd /abc will not match - * 2) Matches the longest. - */ - list_for_each(cfg, &yaffsfs_deviceList) { - dev = list_entry(cfg, struct yaffs_dev, dev_list); - leftOver = path; - p = dev->param.name; - thisMatchLength = 0; - matching = 1; - - while (matching && *p && *leftOver) { - /* Skip over any /s */ - while (yaffsfs_IsPathDivider(*p)) - p++; - - /* Skip over any /s */ - while (yaffsfs_IsPathDivider(*leftOver)) - leftOver++; - - /* Now match the text part */ - while (matching && - *p && !yaffsfs_IsPathDivider(*p) && - *leftOver && !yaffsfs_IsPathDivider(*leftOver)) { - if (yaffsfs_Match(*p, *leftOver)) { - p++; - leftOver++; - thisMatchLength++; - } else { - matching = 0; - } - } - } - - /* Skip over any /s in leftOver */ - while (yaffsfs_IsPathDivider(*leftOver)) - leftOver++; - - /*Skip over any /s in p */ - while (yaffsfs_IsPathDivider(*p)) - p++; - - /* p should now be at the end of the string if fully matched */ - if (*p) - matching = 0; - - if (matching && (thisMatchLength > longestMatch)) { - /* Matched prefix */ - *restOfPath = (YCHAR *) leftOver; - retval = dev; - longestMatch = thisMatchLength; - } - - } - return retval; -} - -static int yaffsfs_CheckPath(const YCHAR *path) -{ - int n = 0; - int divs = 0; - - while (*path && n < YAFFS_MAX_NAME_LENGTH && divs < 100) { - if (yaffsfs_IsPathDivider(*path)) { - n = 0; - divs++; - } else - n++; - path++; - } - - return (*path) ? -1 : 0; -} - -/* FindMountPoint only returns a dev entry if the path is a mount point */ -static struct yaffs_dev *yaffsfs_FindMountPoint(const YCHAR *path) -{ - struct yaffs_dev *dev; - YCHAR *restOfPath = NULL; - - dev = yaffsfs_FindDevice(path, &restOfPath); - if (dev && restOfPath && *restOfPath) - dev = NULL; - return dev; -} - -static struct yaffs_obj *yaffsfs_FindRoot(const YCHAR *path, - YCHAR **restOfPath) -{ - struct yaffs_dev *dev; - - dev = yaffsfs_FindDevice(path, restOfPath); - if (dev && dev->is_mounted) - return dev->root_dir; - - return NULL; -} - -static struct yaffs_obj *yaffsfs_FollowLink(struct yaffs_obj *obj, - int symDepth, int *loop) -{ - - if (obj) - obj = yaffs_get_equivalent_obj(obj); - - while (obj && obj->variant_type == YAFFS_OBJECT_TYPE_SYMLINK) { - YCHAR *alias = obj->variant.symlink_variant.alias; - - if (yaffsfs_IsPathDivider(*alias)) - /* Starts with a /, need to scan from root up */ - obj = yaffsfs_FindObject(NULL, alias, symDepth++, - 1, NULL, NULL, loop); - else - /* - * Relative to here so use the parent of the - * symlink as a start - */ - obj = yaffsfs_FindObject(obj->parent, alias, symDepth++, - 1, NULL, NULL, loop); - } - return obj; -} - -/* - * yaffsfs_FindDirectory - * Parse a path to determine the directory and the name within the directory. - * - * eg. "/data/xx/ff" --> puts name="ff" and returns the directory "/data/xx" - */ -static struct yaffs_obj *yaffsfs_DoFindDirectory(struct yaffs_obj *startDir, - const YCHAR *path, - YCHAR **name, int symDepth, - int *notDir, int *loop) -{ - struct yaffs_obj *dir; - YCHAR *restOfPath; - YCHAR str[YAFFS_MAX_NAME_LENGTH + 1]; - int i; - - if (symDepth > YAFFSFS_MAX_SYMLINK_DEREFERENCES) { - if (loop) - *loop = 1; - return NULL; - } - - if (startDir) { - dir = startDir; - restOfPath = (YCHAR *) path; - } else - dir = yaffsfs_FindRoot(path, &restOfPath); - - while (dir) { - /* - * parse off /. - * curve ball: also throw away surplus '/' - * eg. "/ram/x////ff" gets treated the same as "/ram/x/ff" - */ - while (yaffsfs_IsPathDivider(*restOfPath)) - restOfPath++; /* get rid of '/' */ - - *name = restOfPath; - i = 0; - - while (*restOfPath && !yaffsfs_IsPathDivider(*restOfPath)) { - if (i < YAFFS_MAX_NAME_LENGTH) { - str[i] = *restOfPath; - str[i + 1] = '\0'; - i++; - } - restOfPath++; - } - - if (!*restOfPath) - /* got to the end of the string */ - return dir; - else { - if (yaffs_strcmp(str, _Y(".")) == 0) { - /* Do nothing */ - } else if (yaffs_strcmp(str, _Y("..")) == 0) { - dir = dir->parent; - } else { - dir = yaffs_find_by_name(dir, str); - - dir = yaffsfs_FollowLink(dir, symDepth, loop); - - if (dir && dir->variant_type != - YAFFS_OBJECT_TYPE_DIRECTORY) { - if (notDir) - *notDir = 1; - dir = NULL; - } - - } - } - } - /* directory did not exist. */ - return NULL; -} - -static struct yaffs_obj *yaffsfs_FindDirectory(struct yaffs_obj *relDir, - const YCHAR *path, - YCHAR **name, - int symDepth, - int *notDir, int *loop) -{ - return yaffsfs_DoFindDirectory(relDir, path, name, symDepth, notDir, - loop); -} - -/* - * yaffsfs_FindObject turns a path for an existing object into the object - */ -static struct yaffs_obj *yaffsfs_FindObject(struct yaffs_obj *relDir, - const YCHAR *path, int symDepth, - int getEquiv, - struct yaffs_obj **dirOut, - int *notDir, int *loop) -{ - struct yaffs_obj *dir; - struct yaffs_obj *obj; - YCHAR *name; - - dir = - yaffsfs_FindDirectory(relDir, path, &name, symDepth, notDir, loop); - - if (dirOut) - *dirOut = dir; - - if (dir && *name) - obj = yaffs_find_by_name(dir, name); - else - obj = dir; - - if (getEquiv) - obj = yaffs_get_equivalent_obj(obj); - - return obj; -} - -/************************************************************************* - * Start of yaffsfs visible functions. - *************************************************************************/ - -int yaffs_dup(int handle) -{ - int newHandleNumber = -1; - struct yaffsfs_FileDes *existingFD = NULL; - struct yaffsfs_Handle *existingHandle = NULL; - struct yaffsfs_Handle *newHandle = NULL; - - yaffsfs_Lock(); - existingHandle = yaffsfs_HandleToPointer(handle); - existingFD = yaffsfs_HandleToFileDes(handle); - if (existingFD) - newHandleNumber = yaffsfs_NewHandle(&newHandle); - if (newHandle) { - newHandle->fdId = existingHandle->fdId; - existingFD->handleCount++; - } - - yaffsfs_Unlock(); - - if (!existingFD) - yaffsfs_SetError(-EBADF); - else if (!newHandle) - yaffsfs_SetError(-ENOMEM); - - return newHandleNumber; - -} - -static int yaffsfs_TooManyObjects(struct yaffs_dev *dev) -{ - int current_objects = dev->n_obj - dev->n_deleted_files; - - if (dev->param.max_objects && current_objects > dev->param.max_objects) - return 1; - else - return 0; -} - -int yaffs_open_sharing(const YCHAR *path, int oflag, int mode, int sharing) -{ - struct yaffs_obj *obj = NULL; - struct yaffs_obj *dir = NULL; - YCHAR *name; - int handle = -1; - struct yaffsfs_FileDes *fd = NULL; - int openDenied = 0; - int symDepth = 0; - int errorReported = 0; - int rwflags = oflag & (O_RDWR | O_RDONLY | O_WRONLY); - u8 shareRead = (sharing & YAFFS_SHARE_READ) ? 1 : 0; - u8 shareWrite = (sharing & YAFFS_SHARE_WRITE) ? 1 : 0; - u8 sharedReadAllowed; - u8 sharedWriteAllowed; - u8 alreadyReading; - u8 alreadyWriting; - u8 readRequested; - u8 writeRequested; - int notDir = 0; - int loop = 0; - - if (!path) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - if (yaffsfs_CheckPath(path) < 0) { - yaffsfs_SetError(-ENAMETOOLONG); - return -1; - } - - /* O_EXCL only has meaning if O_CREAT is specified */ - if (!(oflag & O_CREAT)) - oflag &= ~(O_EXCL); - - /* O_TRUNC has no meaning if (O_CREAT | O_EXCL) is specified */ - if ((oflag & O_CREAT) & (oflag & O_EXCL)) - oflag &= ~(O_TRUNC); - - /* Todo: Are there any more flag combos to sanitise ? */ - - /* Figure out if reading or writing is requested */ - - readRequested = (rwflags == O_RDWR || rwflags == O_RDONLY) ? 1 : 0; - writeRequested = (rwflags == O_RDWR || rwflags == O_WRONLY) ? 1 : 0; - - yaffsfs_Lock(); - - handle = yaffsfs_NewHandleAndFileDes(); - - if (handle < 0) { - yaffsfs_SetError(-ENFILE); - errorReported = 1; - } else { - - fd = yaffsfs_HandleToFileDes(handle); - - /* try to find the exisiting object */ - obj = yaffsfs_FindObject(NULL, path, 0, 1, NULL, NULL, NULL); - - obj = yaffsfs_FollowLink(obj, symDepth++, &loop); - - if (obj && - obj->variant_type != YAFFS_OBJECT_TYPE_FILE && - obj->variant_type != YAFFS_OBJECT_TYPE_DIRECTORY) - obj = NULL; - - if (obj) { - - /* The file already exists or it might be a directory */ - - /* A directory can't be opened as a file */ - if (obj->variant_type == YAFFS_OBJECT_TYPE_DIRECTORY) { - openDenied = 1; - yaffsfs_SetError(-EISDIR); - errorReported = 1; - } - - /* Open should fail if O_CREAT and O_EXCL are specified - * for a file that exists. - */ - if (!errorReported && - (oflag & O_EXCL) && (oflag & O_CREAT)) { - openDenied = 1; - yaffsfs_SetError(-EEXIST); - errorReported = 1; - } - - /* Check file permissions */ - if (readRequested && !(obj->yst_mode & S_IREAD)) - openDenied = 1; - - if (writeRequested && !(obj->yst_mode & S_IWRITE)) - openDenied = 1; - - if (!errorReported && writeRequested && - obj->my_dev->read_only) { - openDenied = 1; - yaffsfs_SetError(-EROFS); - errorReported = 1; - } - - if (openDenied && !errorReported) { - yaffsfs_SetError(-EACCES); - errorReported = 1; - } - - /* Check sharing of an existing object. */ - if (!openDenied) { - struct yaffsfs_FileDes *fdx; - int i; - - sharedReadAllowed = 1; - sharedWriteAllowed = 1; - alreadyReading = 0; - alreadyWriting = 0; - for (i = 0; i < YAFFSFS_N_HANDLES; i++) { - fdx = &yaffsfs_fd[i]; - if (fdx->handleCount > 0 && - fdx->inodeId >= 0 && - yaffsfs_inode[fdx->inodeId].iObj - == obj) { - if (!fdx->shareRead) - sharedReadAllowed = 0; - if (!fdx->shareWrite) - sharedWriteAllowed = 0; - if (fdx->reading) - alreadyReading = 1; - if (fdx->writing) - alreadyWriting = 1; - } - } - - if ((!sharedReadAllowed && readRequested) || - (!shareRead && alreadyReading) || - (!sharedWriteAllowed && writeRequested) || - (!shareWrite && alreadyWriting)) { - openDenied = 1; - yaffsfs_SetError(-EBUSY); - errorReported = 1; - } - } - - } - - /* If we could not open an existing object, then let's see if - * the directory exists. If not, error. - */ - if (!obj && !errorReported) { - dir = yaffsfs_FindDirectory(NULL, path, &name, 0, - ¬Dir, &loop); - if (!dir && notDir) { - yaffsfs_SetError(-ENOTDIR); - errorReported = 1; - } else if (loop) { - yaffsfs_SetError(-ELOOP); - errorReported = 1; - } else if (!dir) { - yaffsfs_SetError(-ENOENT); - errorReported = 1; - } - } - - if (!obj && dir && !errorReported && (oflag & O_CREAT)) { - /* Let's see if we can create this file */ - if (dir->my_dev->read_only) { - yaffsfs_SetError(-EROFS); - errorReported = 1; - } else if (yaffsfs_TooManyObjects(dir->my_dev)) { - yaffsfs_SetError(-ENFILE); - errorReported = 1; - } else - obj = yaffs_create_file(dir, name, mode, 0, 0); - - if (!obj && !errorReported) { - yaffsfs_SetError(-ENOSPC); - errorReported = 1; - } - } - - if (!obj && dir && !errorReported && !(oflag & O_CREAT)) { - yaffsfs_SetError(-ENOENT); - errorReported = 1; - } - - if (obj && !openDenied) { - int inodeId = yaffsfs_GetInodeIdForObject(obj); - - if (inodeId < 0) { - /* - * Todo: Fix any problem if inodes run out, - * That can't happen if the number of inode - * items >= number of handles. - */ - } - - fd->inodeId = inodeId; - fd->reading = readRequested; - fd->writing = writeRequested; - fd->append = (oflag & O_APPEND) ? 1 : 0; - fd->position = 0; - fd->shareRead = shareRead; - fd->shareWrite = shareWrite; - - /* Hook inode to object */ - obj->my_inode = (void *)&yaffsfs_inode[inodeId]; - - if ((oflag & O_TRUNC) && fd->writing) - yaffs_resize_file(obj, 0); - } else { - yaffsfs_PutHandle(handle); - if (!errorReported) - yaffsfs_SetError(0); /* Problem */ - handle = -1; - } - } - - yaffsfs_Unlock(); - - return handle; -} - -int yaffs_open(const YCHAR *path, int oflag, int mode) -{ - return yaffs_open_sharing(path, oflag, mode, - YAFFS_SHARE_READ | YAFFS_SHARE_WRITE); -} - -int yaffs_Dofsync(int handle, int datasync) -{ - int retVal = -1; - struct yaffs_obj *obj; - - yaffsfs_Lock(); - - obj = yaffsfs_HandleToObject(handle); - - if (!obj) - yaffsfs_SetError(-EBADF); - else if (obj->my_dev->read_only) - yaffsfs_SetError(-EROFS); - else { - yaffs_flush_file(obj, 1, datasync); - retVal = 0; - } - - yaffsfs_Unlock(); - - return retVal; -} - -int yaffs_fsync(int handle) -{ - return yaffs_Dofsync(handle, 0); -} - -int yaffs_flush(int handle) -{ - return yaffs_fsync(handle); -} - -int yaffs_fdatasync(int handle) -{ - return yaffs_Dofsync(handle, 1); -} - -int yaffs_close(int handle) -{ - struct yaffsfs_Handle *h = NULL; - struct yaffs_obj *obj = NULL; - int retVal = -1; - - yaffsfs_Lock(); - - h = yaffsfs_HandleToPointer(handle); - obj = yaffsfs_HandleToObject(handle); - - if (!h || !obj) - yaffsfs_SetError(-EBADF); - else { - /* clean up */ - yaffs_flush_file(obj, 1, 0); - yaffsfs_PutHandle(handle); - retVal = 0; - } - - yaffsfs_Unlock(); - - return retVal; -} - -int yaffsfs_do_read(int handle, void *vbuf, unsigned int nbyte, - int isPread, loff_t offset) -{ - struct yaffsfs_FileDes *fd = NULL; - struct yaffs_obj *obj = NULL; - loff_t pos = 0; - loff_t startPos = 0; - loff_t endPos = 0; - int nRead = 0; - int nToRead = 0; - int totalRead = 0; - loff_t maxRead; - u8 *buf = (u8 *) vbuf; - - if (!vbuf) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - yaffsfs_Lock(); - fd = yaffsfs_HandleToFileDes(handle); - obj = yaffsfs_HandleToObject(handle); - - if (!fd || !obj) { - /* bad handle */ - yaffsfs_SetError(-EBADF); - totalRead = -1; - } else if (!fd->reading) { - /* Not a reading handle */ - yaffsfs_SetError(-EINVAL); - totalRead = -1; - } else if (nbyte > YAFFS_MAX_FILE_SIZE) { - yaffsfs_SetError(-EINVAL); - totalRead = -1; - } else { - if (isPread) - startPos = offset; - else - startPos = fd->position; - - pos = startPos; - - if (yaffs_get_obj_length(obj) > pos) - maxRead = yaffs_get_obj_length(obj) - pos; - else - maxRead = 0; - - if (nbyte > maxRead) - nbyte = maxRead; - - yaffsfs_GetHandle(handle); - - endPos = pos + nbyte; - - if (pos < 0 || pos > YAFFS_MAX_FILE_SIZE || - nbyte > YAFFS_MAX_FILE_SIZE || - endPos < 0 || endPos > YAFFS_MAX_FILE_SIZE) { - totalRead = -1; - nbyte = 0; - } - - while (nbyte > 0) { - nToRead = YAFFSFS_RW_SIZE - - (pos & (YAFFSFS_RW_SIZE - 1)); - if (nToRead > nbyte) - nToRead = nbyte; - - /* Tricky bit... - * Need to reverify object in case the device was - * unmounted in another thread. - */ - obj = yaffsfs_HandleToObject(handle); - if (!obj) - nRead = 0; - else - nRead = yaffs_file_rd(obj, buf, pos, nToRead); - - if (nRead > 0) { - totalRead += nRead; - pos += nRead; - buf += nRead; - } - - if (nRead == nToRead) - nbyte -= nRead; - else - nbyte = 0; /* no more to read */ - - if (nbyte > 0) { - yaffsfs_Unlock(); - yaffsfs_Lock(); - } - - } - - yaffsfs_PutHandle(handle); - - if (!isPread) { - if (totalRead >= 0) - fd->position = startPos + totalRead; - else - yaffsfs_SetError(-EINVAL); - } - - } - - yaffsfs_Unlock(); - - return (totalRead >= 0) ? totalRead : -1; - -} - -int yaffs_read(int handle, void *buf, unsigned int nbyte) -{ - return yaffsfs_do_read(handle, buf, nbyte, 0, 0); -} - -int yaffs_pread(int handle, void *buf, unsigned int nbyte, loff_t offset) -{ - return yaffsfs_do_read(handle, buf, nbyte, 1, offset); -} - -int yaffsfs_do_write(int handle, const void *vbuf, unsigned int nbyte, - int isPwrite, loff_t offset) -{ - struct yaffsfs_FileDes *fd = NULL; - struct yaffs_obj *obj = NULL; - loff_t pos = 0; - loff_t startPos = 0; - loff_t endPos; - int nWritten = 0; - int totalWritten = 0; - int write_trhrough = 0; - int nToWrite = 0; - const u8 *buf = (const u8 *)vbuf; - - if (!vbuf) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - yaffsfs_Lock(); - fd = yaffsfs_HandleToFileDes(handle); - obj = yaffsfs_HandleToObject(handle); - - if (!fd || !obj) { - /* bad handle */ - yaffsfs_SetError(-EBADF); - totalWritten = -1; - } else if (!fd->writing) { - yaffsfs_SetError(-EINVAL); - totalWritten = -1; - } else if (obj->my_dev->read_only) { - yaffsfs_SetError(-EROFS); - totalWritten = -1; - } else { - if (fd->append) - startPos = yaffs_get_obj_length(obj); - else if (isPwrite) - startPos = offset; - else - startPos = fd->position; - - yaffsfs_GetHandle(handle); - pos = startPos; - endPos = pos + nbyte; - - if (pos < 0 || pos > YAFFS_MAX_FILE_SIZE || - nbyte > YAFFS_MAX_FILE_SIZE || - endPos < 0 || endPos > YAFFS_MAX_FILE_SIZE) { - totalWritten = -1; - nbyte = 0; - } - - while (nbyte > 0) { - - nToWrite = YAFFSFS_RW_SIZE - - (pos & (YAFFSFS_RW_SIZE - 1)); - if (nToWrite > nbyte) - nToWrite = nbyte; - - /* Tricky bit... - * Need to reverify object in case the device was - * remounted or unmounted in another thread. - */ - obj = yaffsfs_HandleToObject(handle); - if (!obj || obj->my_dev->read_only) - nWritten = 0; - else - nWritten = - yaffs_wr_file(obj, buf, pos, nToWrite, - write_trhrough); - if (nWritten > 0) { - totalWritten += nWritten; - pos += nWritten; - buf += nWritten; - } - - if (nWritten == nToWrite) - nbyte -= nToWrite; - else - nbyte = 0; - - if (nWritten < 1 && totalWritten < 1) { - yaffsfs_SetError(-ENOSPC); - totalWritten = -1; - } - - if (nbyte > 0) { - yaffsfs_Unlock(); - yaffsfs_Lock(); - } - } - - yaffsfs_PutHandle(handle); - - if (!isPwrite) { - if (totalWritten > 0) - fd->position = startPos + totalWritten; - else - yaffsfs_SetError(-EINVAL); - } - } - - yaffsfs_Unlock(); - - return (totalWritten >= 0) ? totalWritten : -1; -} - -int yaffs_write(int fd, const void *buf, unsigned int nbyte) -{ - return yaffsfs_do_write(fd, buf, nbyte, 0, 0); -} - -int yaffs_pwrite(int fd, const void *buf, unsigned int nbyte, loff_t offset) -{ - return yaffsfs_do_write(fd, buf, nbyte, 1, offset); -} - -int yaffs_truncate(const YCHAR *path, loff_t new_size) -{ - struct yaffs_obj *obj = NULL; - struct yaffs_obj *dir = NULL; - int result = YAFFS_FAIL; - int notDir = 0; - int loop = 0; - - if (!path) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - if (yaffsfs_CheckPath(path) < 0) { - yaffsfs_SetError(-ENAMETOOLONG); - return -1; - } - - yaffsfs_Lock(); - - obj = yaffsfs_FindObject(NULL, path, 0, 1, &dir, ¬Dir, &loop); - obj = yaffsfs_FollowLink(obj, 0, &loop); - - if (!dir && notDir) - yaffsfs_SetError(-ENOTDIR); - else if (loop) - yaffsfs_SetError(-ELOOP); - else if (!dir || !obj) - yaffsfs_SetError(-ENOENT); - else if (obj->my_dev->read_only) - yaffsfs_SetError(-EROFS); - else if (obj->variant_type != YAFFS_OBJECT_TYPE_FILE) - yaffsfs_SetError(-EISDIR); - else if (obj->my_dev->read_only) - yaffsfs_SetError(-EROFS); - else if (new_size < 0 || new_size > YAFFS_MAX_FILE_SIZE) - yaffsfs_SetError(-EINVAL); - else - result = yaffs_resize_file(obj, new_size); - - yaffsfs_Unlock(); - - return (result) ? 0 : -1; -} - -int yaffs_ftruncate(int handle, loff_t new_size) -{ - struct yaffsfs_FileDes *fd = NULL; - struct yaffs_obj *obj = NULL; - int result = 0; - - yaffsfs_Lock(); - fd = yaffsfs_HandleToFileDes(handle); - obj = yaffsfs_HandleToObject(handle); - - if (!fd || !obj) - /* bad handle */ - yaffsfs_SetError(-EBADF); - else if (!fd->writing) - yaffsfs_SetError(-EINVAL); - else if (obj->my_dev->read_only) - yaffsfs_SetError(-EROFS); - else if (new_size < 0 || new_size > YAFFS_MAX_FILE_SIZE) - yaffsfs_SetError(-EINVAL); - else - /* resize the file */ - result = yaffs_resize_file(obj, new_size); - yaffsfs_Unlock(); - - return (result) ? 0 : -1; - -} - -loff_t yaffs_lseek(int handle, loff_t offset, int whence) -{ - struct yaffsfs_FileDes *fd = NULL; - struct yaffs_obj *obj = NULL; - loff_t pos = -1; - loff_t fSize = -1; - - yaffsfs_Lock(); - fd = yaffsfs_HandleToFileDes(handle); - obj = yaffsfs_HandleToObject(handle); - - if (!fd || !obj) - yaffsfs_SetError(-EBADF); - else if (offset > YAFFS_MAX_FILE_SIZE) - yaffsfs_SetError(-EINVAL); - else { - if (whence == SEEK_SET) { - if (offset >= 0) - pos = offset; - } else if (whence == SEEK_CUR) { - if ((fd->position + offset) >= 0) - pos = (fd->position + offset); - } else if (whence == SEEK_END) { - fSize = yaffs_get_obj_length(obj); - if (fSize >= 0 && (fSize + offset) >= 0) - pos = fSize + offset; - } - - if (pos >= 0 && pos <= YAFFS_MAX_FILE_SIZE) - fd->position = pos; - else { - yaffsfs_SetError(-EINVAL); - pos = -1; - } - } - - yaffsfs_Unlock(); - - return pos; -} - -int yaffsfs_DoUnlink(const YCHAR *path, int isDirectory) -{ - struct yaffs_obj *dir = NULL; - struct yaffs_obj *obj = NULL; - YCHAR *name; - int result = YAFFS_FAIL; - int notDir = 0; - int loop = 0; - - if (!path) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - if (yaffsfs_CheckPath(path) < 0) { - yaffsfs_SetError(-ENAMETOOLONG); - return -1; - } - - yaffsfs_Lock(); - - obj = yaffsfs_FindObject(NULL, path, 0, 0, NULL, NULL, NULL); - dir = yaffsfs_FindDirectory(NULL, path, &name, 0, ¬Dir, &loop); - - if (!dir && notDir) - yaffsfs_SetError(-ENOTDIR); - else if (loop) - yaffsfs_SetError(-ELOOP); - else if (!dir) - yaffsfs_SetError(-ENOENT); - else if (yaffs_strncmp(name, _Y("."), 2) == 0) - yaffsfs_SetError(-EINVAL); - else if (!obj) - yaffsfs_SetError(-ENOENT); - else if (obj->my_dev->read_only) - yaffsfs_SetError(-EROFS); - else if (!isDirectory && - obj->variant_type == YAFFS_OBJECT_TYPE_DIRECTORY) - yaffsfs_SetError(-EISDIR); - else if (isDirectory && - obj->variant_type != YAFFS_OBJECT_TYPE_DIRECTORY) - yaffsfs_SetError(-ENOTDIR); - else if (isDirectory && obj == obj->my_dev->root_dir) - yaffsfs_SetError(-EBUSY); /* Can't rmdir a root */ - else { - result = yaffs_unlinker(dir, name); - - if (result == YAFFS_FAIL && isDirectory) - yaffsfs_SetError(-ENOTEMPTY); - } - - yaffsfs_Unlock(); - - return (result == YAFFS_FAIL) ? -1 : 0; -} - -int yaffs_unlink(const YCHAR *path) -{ - return yaffsfs_DoUnlink(path, 0); -} - -int yaffs_rename(const YCHAR *oldPath, const YCHAR *newPath) -{ - struct yaffs_obj *olddir = NULL; - struct yaffs_obj *newdir = NULL; - struct yaffs_obj *obj = NULL; - struct yaffs_obj *newobj = NULL; - YCHAR *oldname; - YCHAR *newname; - int result = YAFFS_FAIL; - int rename_allowed = 1; - int notOldDir = 0; - int notNewDir = 0; - int oldLoop = 0; - int newLoop = 0; - - YCHAR *alt_newpath = NULL; - - if (!oldPath || !newPath) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - if (yaffsfs_CheckPath(oldPath) < 0 || yaffsfs_CheckPath(newPath) < 0) { - yaffsfs_SetError(-ENAMETOOLONG); - return -1; - } - - if (yaffsfs_alt_dir_path(newPath, &alt_newpath) < 0) { - yaffsfs_SetError(-ENOMEM); - return -1; - } - if (alt_newpath) - newPath = alt_newpath; - - yaffsfs_Lock(); - - olddir = yaffsfs_FindDirectory(NULL, oldPath, &oldname, 0, - ¬OldDir, &oldLoop); - newdir = yaffsfs_FindDirectory(NULL, newPath, &newname, 0, - ¬NewDir, &newLoop); - obj = yaffsfs_FindObject(NULL, oldPath, 0, 0, NULL, NULL, NULL); - newobj = yaffsfs_FindObject(NULL, newPath, 0, 0, NULL, NULL, NULL); - - /* If the object being renamed is a directory and the - * path ended with a "/" then the olddir == obj. - * We pass through NULL for the old name to tell the lower layers - * to use olddir as the object. - */ - - if (olddir == obj) - oldname = NULL; - - if ((!olddir && notOldDir) || (!newdir && notNewDir)) { - yaffsfs_SetError(-ENOTDIR); - rename_allowed = 0; - } else if (oldLoop || newLoop) { - yaffsfs_SetError(-ELOOP); - rename_allowed = 0; - } else if (olddir && oldname && - yaffs_strncmp(oldname, _Y("."), 2) == 0) { - yaffsfs_SetError(-EINVAL); - rename_allowed = 0; - } else if (!olddir || !newdir || !obj) { - yaffsfs_SetError(-ENOENT); - rename_allowed = 0; - } else if (obj->my_dev->read_only) { - yaffsfs_SetError(-EROFS); - rename_allowed = 0; - } else if (yaffs_is_non_empty_dir(newobj)) { - yaffsfs_SetError(-ENOTEMPTY); - rename_allowed = 0; - } else if (olddir->my_dev != newdir->my_dev) { - /* Rename must be on same device */ - yaffsfs_SetError(-EXDEV); - rename_allowed = 0; - } else if (obj && obj->variant_type == YAFFS_OBJECT_TYPE_DIRECTORY) { - /* - * It is a directory, check that it is not being renamed to - * being its own decendent. - * Do this by tracing from the new directory back to the root, - * checking for obj - */ - - struct yaffs_obj *xx = newdir; - - while (rename_allowed && xx) { - if (xx == obj) - rename_allowed = 0; - xx = xx->parent; - } - if (!rename_allowed) - yaffsfs_SetError(-EINVAL); - } - - if (rename_allowed) - result = yaffs_rename_obj(olddir, oldname, newdir, newname); - - yaffsfs_Unlock(); - - kfree(alt_newpath); - - return (result == YAFFS_FAIL) ? -1 : 0; -} - -static int yaffsfs_DoStat(struct yaffs_obj *obj, struct yaffs_stat *buf) -{ - int retVal = -1; - - obj = yaffs_get_equivalent_obj(obj); - - if (obj && buf) { - buf->st_dev = (int)obj->my_dev->os_context; - buf->st_ino = obj->obj_id; - buf->st_mode = obj->yst_mode & ~S_IFMT; - - if (obj->variant_type == YAFFS_OBJECT_TYPE_DIRECTORY) - buf->st_mode |= S_IFDIR; - else if (obj->variant_type == YAFFS_OBJECT_TYPE_SYMLINK) - buf->st_mode |= S_IFLNK; - else if (obj->variant_type == YAFFS_OBJECT_TYPE_FILE) - buf->st_mode |= S_IFREG; - - buf->st_nlink = yaffs_get_obj_link_count(obj); - buf->st_uid = 0; - buf->st_gid = 0; - buf->st_rdev = obj->yst_rdev; - buf->st_size = yaffs_get_obj_length(obj); - buf->st_blksize = obj->my_dev->data_bytes_per_chunk; - buf->st_blocks = lldiv(buf->st_size + buf->st_blksize - 1, - buf->st_blksize); -#if CONFIG_YAFFS_WINCE - buf->yst_wince_atime[0] = obj->win_atime[0]; - buf->yst_wince_atime[1] = obj->win_atime[1]; - buf->yst_wince_ctime[0] = obj->win_ctime[0]; - buf->yst_wince_ctime[1] = obj->win_ctime[1]; - buf->yst_wince_mtime[0] = obj->win_mtime[0]; - buf->yst_wince_mtime[1] = obj->win_mtime[1]; -#else - buf->yst_atime = obj->yst_atime; - buf->yst_ctime = obj->yst_ctime; - buf->yst_mtime = obj->yst_mtime; -#endif - retVal = 0; - } - return retVal; -} - -static int yaffsfs_DoStatOrLStat(const YCHAR *path, - struct yaffs_stat *buf, int doLStat) -{ - struct yaffs_obj *obj = NULL; - struct yaffs_obj *dir = NULL; - int retVal = -1; - int notDir = 0; - int loop = 0; - - if (!path || !buf) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - if (yaffsfs_CheckPath(path) < 0) { - yaffsfs_SetError(-ENAMETOOLONG); - return -1; - } - - yaffsfs_Lock(); - - obj = yaffsfs_FindObject(NULL, path, 0, 1, &dir, ¬Dir, &loop); - - if (!doLStat && obj) - obj = yaffsfs_FollowLink(obj, 0, &loop); - - if (!dir && notDir) - yaffsfs_SetError(-ENOTDIR); - else if (loop) - yaffsfs_SetError(-ELOOP); - else if (!dir || !obj) - yaffsfs_SetError(-ENOENT); - else - retVal = yaffsfs_DoStat(obj, buf); - - yaffsfs_Unlock(); - - return retVal; - -} - -int yaffs_stat(const YCHAR *path, struct yaffs_stat *buf) -{ - return yaffsfs_DoStatOrLStat(path, buf, 0); -} - -int yaffs_lstat(const YCHAR *path, struct yaffs_stat *buf) -{ - return yaffsfs_DoStatOrLStat(path, buf, 1); -} - -int yaffs_fstat(int fd, struct yaffs_stat *buf) -{ - struct yaffs_obj *obj; - - int retVal = -1; - - if (!buf) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - yaffsfs_Lock(); - obj = yaffsfs_HandleToObject(fd); - - if (obj) - retVal = yaffsfs_DoStat(obj, buf); - else - /* bad handle */ - yaffsfs_SetError(-EBADF); - - yaffsfs_Unlock(); - - return retVal; -} - -static int yaffsfs_DoUtime(struct yaffs_obj *obj, - const struct yaffs_utimbuf *buf) -{ - int retVal = -1; - int result; - - struct yaffs_utimbuf local; - - obj = yaffs_get_equivalent_obj(obj); - - if (obj && obj->my_dev->read_only) { - yaffsfs_SetError(-EROFS); - return -1; - } - - if (!buf) { - local.actime = Y_CURRENT_TIME; - local.modtime = local.actime; - buf = &local; - } - - if (obj) { - obj->yst_atime = buf->actime; - obj->yst_mtime = buf->modtime; - obj->dirty = 1; - result = yaffs_flush_file(obj, 0, 0); - retVal = result == YAFFS_OK ? 0 : -1; - } - - return retVal; -} - -int yaffs_utime(const YCHAR *path, const struct yaffs_utimbuf *buf) -{ - struct yaffs_obj *obj = NULL; - struct yaffs_obj *dir = NULL; - int retVal = -1; - int notDir = 0; - int loop = 0; - - if (!path) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - if (yaffsfs_CheckPath(path) < 0) { - yaffsfs_SetError(-ENAMETOOLONG); - return -1; - } - - yaffsfs_Lock(); - - obj = yaffsfs_FindObject(NULL, path, 0, 1, &dir, ¬Dir, &loop); - - if (!dir && notDir) - yaffsfs_SetError(-ENOTDIR); - else if (loop) - yaffsfs_SetError(-ELOOP); - else if (!dir || !obj) - yaffsfs_SetError(-ENOENT); - else - retVal = yaffsfs_DoUtime(obj, buf); - - yaffsfs_Unlock(); - - return retVal; - -} - -int yaffs_futime(int fd, const struct yaffs_utimbuf *buf) -{ - struct yaffs_obj *obj; - - int retVal = -1; - - yaffsfs_Lock(); - obj = yaffsfs_HandleToObject(fd); - - if (obj) - retVal = yaffsfs_DoUtime(obj, buf); - else - /* bad handle */ - yaffsfs_SetError(-EBADF); - - yaffsfs_Unlock(); - - return retVal; -} - -#ifndef CONFIG_YAFFS_WINCE -/* xattrib functions */ - -static int yaffs_do_setxattr(const YCHAR *path, const char *name, - const void *data, int size, int flags, int follow) -{ - struct yaffs_obj *obj; - struct yaffs_obj *dir; - int notDir = 0; - int loop = 0; - - int retVal = -1; - - if (!path || !name || !data) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - if (yaffsfs_CheckPath(path) < 0) { - yaffsfs_SetError(-ENAMETOOLONG); - return -1; - } - - yaffsfs_Lock(); - - obj = yaffsfs_FindObject(NULL, path, 0, 1, &dir, ¬Dir, &loop); - - if (follow) - obj = yaffsfs_FollowLink(obj, 0, &loop); - - if (!dir && notDir) - yaffsfs_SetError(-ENOTDIR); - else if (loop) - yaffsfs_SetError(-ELOOP); - else if (!dir || !obj) - yaffsfs_SetError(-ENOENT); - else { - retVal = yaffs_set_xattrib(obj, name, data, size, flags); - if (retVal < 0) { - yaffsfs_SetError(retVal); - retVal = -1; - } - } - - yaffsfs_Unlock(); - - return retVal; - -} - -int yaffs_setxattr(const YCHAR *path, const char *name, - const void *data, int size, int flags) -{ - return yaffs_do_setxattr(path, name, data, size, flags, 1); -} - -int yaffs_lsetxattr(const YCHAR *path, const char *name, - const void *data, int size, int flags) -{ - return yaffs_do_setxattr(path, name, data, size, flags, 0); -} - -int yaffs_fsetxattr(int fd, const char *name, - const void *data, int size, int flags) -{ - struct yaffs_obj *obj; - - int retVal = -1; - - if (!name || !data) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - yaffsfs_Lock(); - obj = yaffsfs_HandleToObject(fd); - - if (!obj) - yaffsfs_SetError(-EBADF); - else { - retVal = yaffs_set_xattrib(obj, name, data, size, flags); - if (retVal < 0) { - yaffsfs_SetError(retVal); - retVal = -1; - } - } - - yaffsfs_Unlock(); - - return retVal; -} - -static int yaffs_do_getxattr(const YCHAR *path, const char *name, - void *data, int size, int follow) -{ - struct yaffs_obj *obj; - struct yaffs_obj *dir; - int retVal = -1; - int notDir = 0; - int loop = 0; - - if (!path || !name || !data) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - if (yaffsfs_CheckPath(path) < 0) { - yaffsfs_SetError(-ENAMETOOLONG); - return -1; - } - - yaffsfs_Lock(); - - obj = yaffsfs_FindObject(NULL, path, 0, 1, &dir, ¬Dir, &loop); - - if (follow) - obj = yaffsfs_FollowLink(obj, 0, &loop); - - if (!dir && notDir) - yaffsfs_SetError(-ENOTDIR); - else if (loop) - yaffsfs_SetError(-ELOOP); - else if (!dir || !obj) - yaffsfs_SetError(-ENOENT); - else { - retVal = yaffs_get_xattrib(obj, name, data, size); - if (retVal < 0) { - yaffsfs_SetError(retVal); - retVal = -1; - } - } - yaffsfs_Unlock(); - - return retVal; - -} - -int yaffs_getxattr(const YCHAR *path, const char *name, void *data, int size) -{ - return yaffs_do_getxattr(path, name, data, size, 1); -} - -int yaffs_lgetxattr(const YCHAR *path, const char *name, void *data, int size) -{ - return yaffs_do_getxattr(path, name, data, size, 0); -} - -int yaffs_fgetxattr(int fd, const char *name, void *data, int size) -{ - struct yaffs_obj *obj; - - int retVal = -1; - - if (!name || !data) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - yaffsfs_Lock(); - obj = yaffsfs_HandleToObject(fd); - - if (obj) { - retVal = yaffs_get_xattrib(obj, name, data, size); - if (retVal < 0) { - yaffsfs_SetError(retVal); - retVal = -1; - } - } else - /* bad handle */ - yaffsfs_SetError(-EBADF); - - yaffsfs_Unlock(); - - return retVal; -} - -static int yaffs_do_listxattr(const YCHAR *path, char *data, - int size, int follow) -{ - struct yaffs_obj *obj = NULL; - struct yaffs_obj *dir = NULL; - int retVal = -1; - int notDir = 0; - int loop = 0; - - if (!path || !data) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - if (yaffsfs_CheckPath(path) < 0) { - yaffsfs_SetError(-ENAMETOOLONG); - return -1; - } - - yaffsfs_Lock(); - - obj = yaffsfs_FindObject(NULL, path, 0, 1, &dir, ¬Dir, &loop); - - if (follow) - obj = yaffsfs_FollowLink(obj, 0, &loop); - - if (!dir && notDir) - yaffsfs_SetError(-ENOTDIR); - else if (loop) - yaffsfs_SetError(-ELOOP); - else if (!dir || !obj) - yaffsfs_SetError(-ENOENT); - else { - retVal = yaffs_list_xattrib(obj, data, size); - if (retVal < 0) { - yaffsfs_SetError(retVal); - retVal = -1; - } - } - - yaffsfs_Unlock(); - - return retVal; - -} - -int yaffs_listxattr(const YCHAR *path, char *data, int size) -{ - return yaffs_do_listxattr(path, data, size, 1); -} - -int yaffs_llistxattr(const YCHAR *path, char *data, int size) -{ - return yaffs_do_listxattr(path, data, size, 0); -} - -int yaffs_flistxattr(int fd, char *data, int size) -{ - struct yaffs_obj *obj; - - int retVal = -1; - - if (!data) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - yaffsfs_Lock(); - obj = yaffsfs_HandleToObject(fd); - - if (obj) { - retVal = yaffs_list_xattrib(obj, data, size); - if (retVal < 0) { - yaffsfs_SetError(retVal); - retVal = -1; - } - } else - /* bad handle */ - yaffsfs_SetError(-EBADF); - - yaffsfs_Unlock(); - - return retVal; -} - -static int yaffs_do_removexattr(const YCHAR *path, const char *name, - int follow) -{ - struct yaffs_obj *obj = NULL; - struct yaffs_obj *dir = NULL; - int notDir = 0; - int loop = 0; - int retVal = -1; - - if (!path || !name) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - if (yaffsfs_CheckPath(path) < 0) { - yaffsfs_SetError(-ENAMETOOLONG); - return -1; - } - - yaffsfs_Lock(); - - obj = yaffsfs_FindObject(NULL, path, 0, 1, &dir, ¬Dir, &loop); - - if (follow) - obj = yaffsfs_FollowLink(obj, 0, &loop); - - if (!dir && notDir) - yaffsfs_SetError(-ENOTDIR); - else if (loop) - yaffsfs_SetError(-ELOOP); - else if (!dir || !obj) - yaffsfs_SetError(-ENOENT); - else { - retVal = yaffs_remove_xattrib(obj, name); - if (retVal < 0) { - yaffsfs_SetError(retVal); - retVal = -1; - } - } - - yaffsfs_Unlock(); - - return retVal; - -} - -int yaffs_removexattr(const YCHAR *path, const char *name) -{ - return yaffs_do_removexattr(path, name, 1); -} - -int yaffs_lremovexattr(const YCHAR *path, const char *name) -{ - return yaffs_do_removexattr(path, name, 0); -} - -int yaffs_fremovexattr(int fd, const char *name) -{ - struct yaffs_obj *obj; - - int retVal = -1; - - if (!name) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - yaffsfs_Lock(); - obj = yaffsfs_HandleToObject(fd); - - if (obj) { - retVal = yaffs_remove_xattrib(obj, name); - if (retVal < 0) { - yaffsfs_SetError(retVal); - retVal = -1; - } - } else - /* bad handle */ - yaffsfs_SetError(-EBADF); - - yaffsfs_Unlock(); - - return retVal; -} -#endif - -#ifdef CONFIG_YAFFS_WINCE -int yaffs_get_wince_times(int fd, unsigned *wctime, - unsigned *watime, unsigned *wmtime) -{ - struct yaffs_obj *obj; - - int retVal = -1; - - yaffsfs_Lock(); - obj = yaffsfs_HandleToObject(fd); - - if (obj) { - - if (wctime) { - wctime[0] = obj->win_ctime[0]; - wctime[1] = obj->win_ctime[1]; - } - if (watime) { - watime[0] = obj->win_atime[0]; - watime[1] = obj->win_atime[1]; - } - if (wmtime) { - wmtime[0] = obj->win_mtime[0]; - wmtime[1] = obj->win_mtime[1]; - } - - retVal = 0; - } else - /* bad handle */ - yaffsfs_SetError(-EBADF); - - yaffsfs_Unlock(); - - return retVal; -} - -int yaffs_set_wince_times(int fd, - const unsigned *wctime, - const unsigned *watime, const unsigned *wmtime) -{ - struct yaffs_obj *obj; - int result; - int retVal = -1; - - yaffsfs_Lock(); - obj = yaffsfs_HandleToObject(fd); - - if (obj) { - - if (wctime) { - obj->win_ctime[0] = wctime[0]; - obj->win_ctime[1] = wctime[1]; - } - if (watime) { - obj->win_atime[0] = watime[0]; - obj->win_atime[1] = watime[1]; - } - if (wmtime) { - obj->win_mtime[0] = wmtime[0]; - obj->win_mtime[1] = wmtime[1]; - } - - obj->dirty = 1; - result = yaffs_flush_file(obj, 0, 0); - retVal = 0; - } else - /* bad handle */ - yaffsfs_SetError(-EBADF); - - yaffsfs_Unlock(); - - return retVal; -} - -#endif - -static int yaffsfs_DoChMod(struct yaffs_obj *obj, mode_t mode) -{ - int result = -1; - - if (obj) - obj = yaffs_get_equivalent_obj(obj); - - if (obj) { - obj->yst_mode = mode; - obj->dirty = 1; - result = yaffs_flush_file(obj, 0, 0); - } - - return result == YAFFS_OK ? 0 : -1; -} - -int yaffs_access(const YCHAR *path, int amode) -{ - struct yaffs_obj *obj = NULL; - struct yaffs_obj *dir = NULL; - int notDir = 0; - int loop = 0; - int retval = -1; - - if (!path) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - if (yaffsfs_CheckPath(path) < 0) { - yaffsfs_SetError(-ENAMETOOLONG); - return -1; - } - - if (amode & ~(R_OK | W_OK | X_OK)) { - yaffsfs_SetError(-EINVAL); - return -1; - } - - yaffsfs_Lock(); - - obj = yaffsfs_FindObject(NULL, path, 0, 1, &dir, ¬Dir, &loop); - obj = yaffsfs_FollowLink(obj, 0, &loop); - - if (!dir && notDir) - yaffsfs_SetError(-ENOTDIR); - else if (loop) - yaffsfs_SetError(-ELOOP); - else if (!dir || !obj) - yaffsfs_SetError(-ENOENT); - else if ((amode & W_OK) && obj->my_dev->read_only) - yaffsfs_SetError(-EROFS); - else { - int access_ok = 1; - - if ((amode & R_OK) && !(obj->yst_mode & S_IREAD)) - access_ok = 0; - if ((amode & W_OK) && !(obj->yst_mode & S_IWRITE)) - access_ok = 0; - if ((amode & X_OK) && !(obj->yst_mode & S_IEXEC)) - access_ok = 0; - - if (!access_ok) - yaffsfs_SetError(-EACCES); - else - retval = 0; - } - - yaffsfs_Unlock(); - - return retval; - -} - -int yaffs_chmod(const YCHAR *path, mode_t mode) -{ - struct yaffs_obj *obj = NULL; - struct yaffs_obj *dir = NULL; - int retVal = -1; - int notDir = 0; - int loop = 0; - - if (!path) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - if (yaffsfs_CheckPath(path) < 0) { - yaffsfs_SetError(-ENAMETOOLONG); - return -1; - } - - if (mode & ~(0777)) { - yaffsfs_SetError(-EINVAL); - return -1; - } - - yaffsfs_Lock(); - - obj = yaffsfs_FindObject(NULL, path, 0, 1, &dir, ¬Dir, &loop); - obj = yaffsfs_FollowLink(obj, 0, &loop); - - if (!dir && notDir) - yaffsfs_SetError(-ENOTDIR); - else if (loop) - yaffsfs_SetError(-ELOOP); - else if (!dir || !obj) - yaffsfs_SetError(-ENOENT); - else if (obj->my_dev->read_only) - yaffsfs_SetError(-EROFS); - else - retVal = yaffsfs_DoChMod(obj, mode); - - yaffsfs_Unlock(); - - return retVal; - -} - -int yaffs_fchmod(int fd, mode_t mode) -{ - struct yaffs_obj *obj; - int retVal = -1; - - if (mode & ~(0777)) { - yaffsfs_SetError(-EINVAL); - return -1; - } - - yaffsfs_Lock(); - obj = yaffsfs_HandleToObject(fd); - - if (!obj) - yaffsfs_SetError(-EBADF); - else if (obj->my_dev->read_only) - yaffsfs_SetError(-EROFS); - else - retVal = yaffsfs_DoChMod(obj, mode); - - yaffsfs_Unlock(); - - return retVal; -} - -int yaffs_mkdir(const YCHAR *path, mode_t mode) -{ - struct yaffs_obj *parent = NULL; - struct yaffs_obj *dir = NULL; - YCHAR *name; - YCHAR *alt_path = NULL; - int retVal = -1; - int notDir = 0; - int loop = 0; - - if (!path) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - if (yaffsfs_CheckPath(path) < 0) { - yaffsfs_SetError(-ENAMETOOLONG); - return -1; - } - - if (yaffsfs_alt_dir_path(path, &alt_path) < 0) { - yaffsfs_SetError(-ENOMEM); - return -1; - } - if (alt_path) - path = alt_path; - - yaffsfs_Lock(); - parent = yaffsfs_FindDirectory(NULL, path, &name, 0, ¬Dir, &loop); - if (!parent && notDir) - yaffsfs_SetError(-ENOTDIR); - else if (loop) - yaffsfs_SetError(-ELOOP); - else if (!parent) - yaffsfs_SetError(-ENOENT); - else if (yaffsfs_TooManyObjects(parent->my_dev)) - yaffsfs_SetError(-ENFILE); - else if (yaffs_strnlen(name, 5) == 0) { - /* Trying to make the root itself */ - yaffsfs_SetError(-EEXIST); - } else if (parent->my_dev->read_only) - yaffsfs_SetError(-EROFS); - else { - dir = yaffs_create_dir(parent, name, mode, 0, 0); - if (dir) - retVal = 0; - else if (yaffs_find_by_name(parent, name)) - yaffsfs_SetError(-EEXIST); /* name exists */ - else - yaffsfs_SetError(-ENOSPC); /* assume no space */ - } - - yaffsfs_Unlock(); - - kfree(alt_path); - - return retVal; -} - -int yaffs_rmdir(const YCHAR *path) -{ - int result; - YCHAR *alt_path; - - if (!path) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - if (yaffsfs_CheckPath(path) < 0) { - yaffsfs_SetError(-ENAMETOOLONG); - return -1; - } - - if (yaffsfs_alt_dir_path(path, &alt_path) < 0) { - yaffsfs_SetError(-ENOMEM); - return -1; - } - if (alt_path) - path = alt_path; - result = yaffsfs_DoUnlink(path, 1); - - kfree(alt_path); - - return result; -} - -void *yaffs_getdev(const YCHAR *path) -{ - struct yaffs_dev *dev = NULL; - YCHAR *dummy; - dev = yaffsfs_FindDevice(path, &dummy); - return (void *)dev; -} - -int yaffs_mount_common(const YCHAR *path, int read_only, int skip_checkpt) -{ - int retVal = -1; - int result = YAFFS_FAIL; - struct yaffs_dev *dev = NULL; - - if (!path) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - yaffs_trace(YAFFS_TRACE_MOUNT, "yaffs: Mounting %s", path); - - if (yaffsfs_CheckPath(path) < 0) { - yaffsfs_SetError(-ENAMETOOLONG); - return -1; - } - - yaffsfs_Lock(); - - yaffsfs_InitHandles(); - - dev = yaffsfs_FindMountPoint(path); - if (dev) { - if (!dev->is_mounted) { - dev->read_only = read_only ? 1 : 0; - if (skip_checkpt) { - u8 skip = dev->param.skip_checkpt_rd; - dev->param.skip_checkpt_rd = 1; - result = yaffs_guts_initialise(dev); - dev->param.skip_checkpt_rd = skip; - } else { - result = yaffs_guts_initialise(dev); - } - - if (result == YAFFS_FAIL) - yaffsfs_SetError(-ENOMEM); - retVal = result ? 0 : -1; - - } else - yaffsfs_SetError(-EBUSY); - } else - yaffsfs_SetError(-ENODEV); - - yaffsfs_Unlock(); - return retVal; - -} - -int yaffs_mount2(const YCHAR *path, int readonly) -{ - return yaffs_mount_common(path, readonly, 0); -} - -int yaffs_mount(const YCHAR *path) -{ - return yaffs_mount_common(path, 0, 0); -} - -int yaffs_sync(const YCHAR *path) -{ - int retVal = -1; - struct yaffs_dev *dev = NULL; - YCHAR *dummy; - - if (!path) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - if (yaffsfs_CheckPath(path) < 0) { - yaffsfs_SetError(-ENAMETOOLONG); - return -1; - } - - yaffsfs_Lock(); - dev = yaffsfs_FindDevice(path, &dummy); - if (dev) { - if (!dev->is_mounted) - yaffsfs_SetError(-EINVAL); - else if (dev->read_only) - yaffsfs_SetError(-EROFS); - else { - - yaffs_flush_whole_cache(dev); - yaffs_checkpoint_save(dev); - retVal = 0; - - } - } else - yaffsfs_SetError(-ENODEV); - - yaffsfs_Unlock(); - return retVal; -} - -static int yaffsfs_IsDevBusy(struct yaffs_dev *dev) -{ - int i; - struct yaffs_obj *obj; - - for (i = 0; i < YAFFSFS_N_HANDLES; i++) { - obj = yaffsfs_HandleToObject(i); - if (obj && obj->my_dev == dev) - return 1; - } - return 0; -} - -int yaffs_remount(const YCHAR *path, int force, int read_only) -{ - int retVal = -1; - struct yaffs_dev *dev = NULL; - - if (!path) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - if (yaffsfs_CheckPath(path) < 0) { - yaffsfs_SetError(-ENAMETOOLONG); - return -1; - } - - yaffsfs_Lock(); - dev = yaffsfs_FindMountPoint(path); - if (dev) { - if (dev->is_mounted) { - yaffs_flush_whole_cache(dev); - - if (force || !yaffsfs_IsDevBusy(dev)) { - if (read_only) - yaffs_checkpoint_save(dev); - dev->read_only = read_only ? 1 : 0; - retVal = 0; - } else - yaffsfs_SetError(-EBUSY); - - } else - yaffsfs_SetError(-EINVAL); - - } else - yaffsfs_SetError(-ENODEV); - - yaffsfs_Unlock(); - return retVal; - -} - -int yaffs_unmount2(const YCHAR *path, int force) -{ - int retVal = -1; - struct yaffs_dev *dev = NULL; - - if (!path) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - if (yaffsfs_CheckPath(path) < 0) { - yaffsfs_SetError(-ENAMETOOLONG); - return -1; - } - - yaffsfs_Lock(); - dev = yaffsfs_FindMountPoint(path); - if (dev) { - if (dev->is_mounted) { - int inUse; - yaffs_flush_whole_cache(dev); - yaffs_checkpoint_save(dev); - inUse = yaffsfs_IsDevBusy(dev); - if (!inUse || force) { - if (inUse) - yaffsfs_BreakDeviceHandles(dev); - yaffs_deinitialise(dev); - - retVal = 0; - } else - yaffsfs_SetError(-EBUSY); - - } else - yaffsfs_SetError(-EINVAL); - - } else - yaffsfs_SetError(-ENODEV); - - yaffsfs_Unlock(); - return retVal; - -} - -int yaffs_unmount(const YCHAR *path) -{ - return yaffs_unmount2(path, 0); -} - -loff_t yaffs_freespace(const YCHAR *path) -{ - loff_t retVal = -1; - struct yaffs_dev *dev = NULL; - YCHAR *dummy; - - if (!path) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - if (yaffsfs_CheckPath(path) < 0) { - yaffsfs_SetError(-ENAMETOOLONG); - return -1; - } - - yaffsfs_Lock(); - dev = yaffsfs_FindDevice(path, &dummy); - if (dev && dev->is_mounted) { - retVal = yaffs_get_n_free_chunks(dev); - retVal *= dev->data_bytes_per_chunk; - - } else - yaffsfs_SetError(-EINVAL); - - yaffsfs_Unlock(); - return retVal; -} - -loff_t yaffs_totalspace(const YCHAR *path) -{ - loff_t retVal = -1; - struct yaffs_dev *dev = NULL; - YCHAR *dummy; - - if (!path) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - if (yaffsfs_CheckPath(path) < 0) { - yaffsfs_SetError(-ENAMETOOLONG); - return -1; - } - - yaffsfs_Lock(); - dev = yaffsfs_FindDevice(path, &dummy); - if (dev && dev->is_mounted) { - retVal = (dev->param.end_block - dev->param.start_block + 1) - - dev->param.n_reserved_blocks; - retVal *= dev->param.chunks_per_block; - retVal *= dev->data_bytes_per_chunk; - - } else - yaffsfs_SetError(-EINVAL); - - yaffsfs_Unlock(); - return retVal; -} - -int yaffs_inodecount(const YCHAR *path) -{ - loff_t retVal = -1; - struct yaffs_dev *dev = NULL; - YCHAR *dummy; - - if (!path) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - if (yaffsfs_CheckPath(path) < 0) { - yaffsfs_SetError(-ENAMETOOLONG); - return -1; - } - - yaffsfs_Lock(); - dev = yaffsfs_FindDevice(path, &dummy); - if (dev && dev->is_mounted) { - int n_obj = dev->n_obj; - if (n_obj > dev->n_hardlinks) - retVal = n_obj - dev->n_hardlinks; - } - - if (retVal < 0) - yaffsfs_SetError(-EINVAL); - - yaffsfs_Unlock(); - return retVal; -} - -void yaffs_add_device(struct yaffs_dev *dev) -{ - struct list_head *cfg; - /* First check that the device is not in the list. */ - - list_for_each(cfg, &yaffsfs_deviceList) { - if (dev == list_entry(cfg, struct yaffs_dev, dev_list)) - return; - } - - dev->is_mounted = 0; - dev->param.remove_obj_fn = yaffsfs_RemoveObjectCallback; - - if (!dev->dev_list.next) - INIT_LIST_HEAD(&dev->dev_list); - - list_add(&dev->dev_list, &yaffsfs_deviceList); -} - -void yaffs_remove_device(struct yaffs_dev *dev) -{ - list_del_init(&dev->dev_list); -} - -/* Functions to iterate through devices. NB Use with extreme care! */ - -static struct list_head *dev_iterator; -void yaffs_dev_rewind(void) -{ - dev_iterator = yaffsfs_deviceList.next; -} - -struct yaffs_dev *yaffs_next_dev(void) -{ - struct yaffs_dev *retval; - - if (!dev_iterator) - return NULL; - if (dev_iterator == &yaffsfs_deviceList) - return NULL; - - retval = list_entry(dev_iterator, struct yaffs_dev, dev_list); - dev_iterator = dev_iterator->next; - return retval; -} - -/* Directory search stuff. */ - -static struct list_head search_contexts; - -static void yaffsfs_SetDirRewound(struct yaffsfs_DirSearchContxt *dsc) -{ - if (dsc && - dsc->dirObj && - dsc->dirObj->variant_type == YAFFS_OBJECT_TYPE_DIRECTORY) { - - dsc->offset = 0; - - if (list_empty(&dsc->dirObj->variant.dir_variant.children)) - dsc->nextReturn = NULL; - else - dsc->nextReturn = - list_entry(dsc->dirObj->variant.dir_variant. - children.next, struct yaffs_obj, - siblings); - } else { - /* Hey someone isn't playing nice! */ - } -} - -static void yaffsfs_DirAdvance(struct yaffsfs_DirSearchContxt *dsc) -{ - if (dsc && - dsc->dirObj && - dsc->dirObj->variant_type == YAFFS_OBJECT_TYPE_DIRECTORY) { - - if (dsc->nextReturn == NULL || - list_empty(&dsc->dirObj->variant.dir_variant.children)) - dsc->nextReturn = NULL; - else { - struct list_head *next = dsc->nextReturn->siblings.next; - - if (next == &dsc->dirObj->variant.dir_variant.children) - dsc->nextReturn = NULL; /* end of list */ - else - dsc->nextReturn = list_entry(next, - struct yaffs_obj, - siblings); - } - } else { - /* Hey someone isn't playing nice! */ - } -} - -static void yaffsfs_RemoveObjectCallback(struct yaffs_obj *obj) -{ - - struct list_head *i; - struct yaffsfs_DirSearchContxt *dsc; - - /* if search contexts not initilised then skip */ - if (!search_contexts.next) - return; - - /* Iterate through the directory search contexts. - * If any are the one being removed, then advance the dsc to - * the next one to prevent a hanging ptr. - */ - list_for_each(i, &search_contexts) { - dsc = list_entry(i, struct yaffsfs_DirSearchContxt, others); - if (dsc->nextReturn == obj) - yaffsfs_DirAdvance(dsc); - } - -} - -yaffs_DIR *yaffs_opendir(const YCHAR *dirname) -{ - yaffs_DIR *dir = NULL; - struct yaffs_obj *obj = NULL; - struct yaffsfs_DirSearchContxt *dsc = NULL; - int notDir = 0; - int loop = 0; - - if (!dirname) { - yaffsfs_SetError(-EFAULT); - return NULL; - } - - if (yaffsfs_CheckPath(dirname) < 0) { - yaffsfs_SetError(-ENAMETOOLONG); - return NULL; - } - - yaffsfs_Lock(); - - obj = yaffsfs_FindObject(NULL, dirname, 0, 1, NULL, ¬Dir, &loop); - - if (!obj && notDir) - yaffsfs_SetError(-ENOTDIR); - else if (loop) - yaffsfs_SetError(-ELOOP); - else if (!obj) - yaffsfs_SetError(-ENOENT); - else if (obj->variant_type != YAFFS_OBJECT_TYPE_DIRECTORY) - yaffsfs_SetError(-ENOTDIR); - else { - int i; - - for (i = 0, dsc = NULL; i < YAFFSFS_N_DSC && !dsc; i++) { - if (!yaffsfs_dsc[i].inUse) - dsc = &yaffsfs_dsc[i]; - } - - dir = (yaffs_DIR *) dsc; - - if (dsc) { - memset(dsc, 0, sizeof(struct yaffsfs_DirSearchContxt)); - dsc->inUse = 1; - dsc->dirObj = obj; - yaffs_strncpy(dsc->name, dirname, NAME_MAX); - INIT_LIST_HEAD(&dsc->others); - - if (!search_contexts.next) - INIT_LIST_HEAD(&search_contexts); - - list_add(&dsc->others, &search_contexts); - yaffsfs_SetDirRewound(dsc); - } - - } - - yaffsfs_Unlock(); - - return dir; -} - -struct yaffs_dirent *yaffs_readdir(yaffs_DIR * dirp) -{ - struct yaffsfs_DirSearchContxt *dsc; - struct yaffs_dirent *retVal = NULL; - - dsc = (struct yaffsfs_DirSearchContxt *) dirp; - yaffsfs_Lock(); - - if (dsc && dsc->inUse) { - yaffsfs_SetError(0); - if (dsc->nextReturn) { - dsc->de.d_ino = - yaffs_get_equivalent_obj(dsc->nextReturn)->obj_id; - dsc->de.d_dont_use = (unsigned)dsc->nextReturn; - dsc->de.d_off = dsc->offset++; - yaffs_get_obj_name(dsc->nextReturn, - dsc->de.d_name, NAME_MAX); - if (yaffs_strnlen(dsc->de.d_name, NAME_MAX + 1) == 0) { - /* this should not happen! */ - yaffs_strcpy(dsc->de.d_name, _Y("zz")); - } - dsc->de.d_reclen = sizeof(struct yaffs_dirent); - retVal = &dsc->de; - yaffsfs_DirAdvance(dsc); - } else - retVal = NULL; - } else - yaffsfs_SetError(-EBADF); - - yaffsfs_Unlock(); - - return retVal; - -} - -void yaffs_rewinddir(yaffs_DIR *dirp) -{ - struct yaffsfs_DirSearchContxt *dsc; - - dsc = (struct yaffsfs_DirSearchContxt *) dirp; - - yaffsfs_Lock(); - - yaffsfs_SetDirRewound(dsc); - - yaffsfs_Unlock(); -} - -int yaffs_closedir(yaffs_DIR *dirp) -{ - struct yaffsfs_DirSearchContxt *dsc; - - dsc = (struct yaffsfs_DirSearchContxt *) dirp; - - if (!dsc) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - yaffsfs_Lock(); - dsc->inUse = 0; - list_del(&dsc->others); /* unhook from list */ - yaffsfs_Unlock(); - return 0; -} - -/* End of directory stuff */ - -int yaffs_symlink(const YCHAR *oldpath, const YCHAR *newpath) -{ - struct yaffs_obj *parent = NULL; - struct yaffs_obj *obj; - YCHAR *name; - int retVal = -1; - int mode = 0; /* ignore for now */ - int notDir = 0; - int loop = 0; - - if (!oldpath || !newpath) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - if (yaffsfs_CheckPath(newpath) < 0 || yaffsfs_CheckPath(oldpath) < 0) { - yaffsfs_SetError(-ENAMETOOLONG); - return -1; - } - - yaffsfs_Lock(); - parent = yaffsfs_FindDirectory(NULL, newpath, &name, 0, ¬Dir, &loop); - if (!parent && notDir) - yaffsfs_SetError(-ENOTDIR); - else if (loop) - yaffsfs_SetError(-ELOOP); - else if (!parent || yaffs_strnlen(name, 5) < 1) - yaffsfs_SetError(-ENOENT); - else if (yaffsfs_TooManyObjects(parent->my_dev)) - yaffsfs_SetError(-ENFILE); - else if (parent->my_dev->read_only) - yaffsfs_SetError(-EROFS); - else { - obj = yaffs_create_symlink(parent, name, mode, 0, 0, oldpath); - if (obj) - retVal = 0; - else if (yaffsfs_FindObject - (NULL, newpath, 0, 0, NULL, NULL, NULL)) - yaffsfs_SetError(-EEXIST); - else - yaffsfs_SetError(-ENOSPC); - } - - yaffsfs_Unlock(); - - return retVal; - -} - -int yaffs_readlink(const YCHAR *path, YCHAR *buf, int bufsiz) -{ - struct yaffs_obj *obj = NULL; - struct yaffs_obj *dir = NULL; - int retVal = -1; - int notDir = 0; - int loop = 0; - - if (!path || !buf) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - yaffsfs_Lock(); - - obj = yaffsfs_FindObject(NULL, path, 0, 1, &dir, ¬Dir, &loop); - - if (!dir && notDir) - yaffsfs_SetError(-ENOTDIR); - else if (loop) - yaffsfs_SetError(-ELOOP); - else if (!dir || !obj) - yaffsfs_SetError(-ENOENT); - else if (obj->variant_type != YAFFS_OBJECT_TYPE_SYMLINK) - yaffsfs_SetError(-EINVAL); - else { - YCHAR *alias = obj->variant.symlink_variant.alias; - memset(buf, 0, bufsiz); - yaffs_strncpy(buf, alias, bufsiz - 1); - retVal = 0; - } - yaffsfs_Unlock(); - return retVal; -} - -int yaffs_link(const YCHAR *oldpath, const YCHAR *linkpath) -{ - /* Creates a link called newpath to existing oldpath */ - struct yaffs_obj *obj = NULL; - struct yaffs_obj *lnk = NULL; - struct yaffs_obj *obj_dir = NULL; - struct yaffs_obj *lnk_dir = NULL; - int retVal = -1; - int notDirObj = 0; - int notDirLnk = 0; - int objLoop = 0; - int lnkLoop = 0; - YCHAR *newname; - - if (!oldpath || !linkpath) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - if (yaffsfs_CheckPath(linkpath) < 0 || yaffsfs_CheckPath(oldpath) < 0) { - yaffsfs_SetError(-ENAMETOOLONG); - return -1; - } - - yaffsfs_Lock(); - - obj = yaffsfs_FindObject(NULL, oldpath, 0, 1, - &obj_dir, ¬DirObj, &objLoop); - lnk = yaffsfs_FindObject(NULL, linkpath, 0, 0, NULL, NULL, NULL); - lnk_dir = yaffsfs_FindDirectory(NULL, linkpath, &newname, - 0, ¬DirLnk, &lnkLoop); - - if ((!obj_dir && notDirObj) || (!lnk_dir && notDirLnk)) - yaffsfs_SetError(-ENOTDIR); - else if (objLoop || lnkLoop) - yaffsfs_SetError(-ELOOP); - else if (!obj_dir || !lnk_dir || !obj) - yaffsfs_SetError(-ENOENT); - else if (obj->my_dev->read_only) - yaffsfs_SetError(-EROFS); - else if (yaffsfs_TooManyObjects(obj->my_dev)) - yaffsfs_SetError(-ENFILE); - else if (lnk) - yaffsfs_SetError(-EEXIST); - else if (lnk_dir->my_dev != obj->my_dev) - yaffsfs_SetError(-EXDEV); - else { - retVal = yaffsfs_CheckNameLength(newname); - - if (retVal == 0) { - lnk = yaffs_link_obj(lnk_dir, newname, obj); - if (lnk) - retVal = 0; - else { - yaffsfs_SetError(-ENOSPC); - retVal = -1; - } - } - } - yaffsfs_Unlock(); - - return retVal; -} - -int yaffs_mknod(const YCHAR *pathname, mode_t mode, dev_t dev) -{ - yaffsfs_SetError(-EINVAL); - return -1; -} - -/* - * D E B U G F U N C T I O N S - */ - -/* - * yaffs_n_handles() - * Returns number of handles attached to the object - */ -int yaffs_n_handles(const YCHAR *path) -{ - struct yaffs_obj *obj; - - if (!path) { - yaffsfs_SetError(-EFAULT); - return -1; - } - - if (yaffsfs_CheckPath(path) < 0) { - yaffsfs_SetError(-ENAMETOOLONG); - return -1; - } - - obj = yaffsfs_FindObject(NULL, path, 0, 1, NULL, NULL, NULL); - - if (obj) - return yaffsfs_CountHandles(obj); - else - return -1; -} - -int yaffs_get_error(void) -{ - return yaffsfs_GetLastError(); -} - -int yaffs_set_error(int error) -{ - yaffsfs_SetError(error); - return 0; -} - -int yaffs_dump_dev(const YCHAR *path) -{ -#if 0 - YCHAR *rest; - - struct yaffs_obj *obj = yaffsfs_FindRoot(path, &rest); - - if (obj) { - struct yaffs_dev *dev = obj->my_dev; - - printf("\n" - "n_page_writes.......... %d\n" - "n_page_reads........... %d\n" - "n_erasures....... %d\n" - "n_gc_copies............ %d\n" - "garbageCollections... %d\n" - "passiveGarbageColl'ns %d\n" - "\n", - dev->n_page_writes, - dev->n_page_reads, - dev->n_erasures, - dev->n_gc_copies, - dev->garbageCollections, dev->passiveGarbageCollections); - - } -#endif - return 0; -} diff --git a/fs/yaffs2/yaffsfs.h b/fs/yaffs2/yaffsfs.h deleted file mode 100644 index e14f41c63ee..00000000000 --- a/fs/yaffs2/yaffsfs.h +++ /dev/null @@ -1,199 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -/* - * Header file for using yaffs in an application via - * a direct interface. - */ - -#ifndef __YAFFSFS_H__ -#define __YAFFSFS_H__ - -#include "yaffscfg.h" -#include "yportenv.h" - -#ifndef NAME_MAX -#define NAME_MAX 256 -#endif - -#define YAFFS_MAX_FILE_SIZE (0x800000000LL - 1) - -struct yaffs_dirent { - long d_ino; /* inode number */ - off_t d_off; /* offset to this dirent */ - unsigned short d_reclen; /* length of this dirent */ - YUCHAR d_type; /* type of this record */ - YCHAR d_name[NAME_MAX+1]; /* file name (null-terminated) */ - unsigned d_dont_use; /* debug: not for public consumption */ -}; - -typedef struct opaque_structure yaffs_DIR; - -struct yaffs_stat { - int st_dev; /* device */ - int st_ino; /* inode */ - unsigned st_mode; /* protection */ - int st_nlink; /* number of hard links */ - int st_uid; /* user ID of owner */ - int st_gid; /* group ID of owner */ - unsigned st_rdev; /* device type (if inode device) */ - loff_t st_size; /* total size, in bytes */ - unsigned long st_blksize; /* blocksize for filesystem I/O */ - unsigned long st_blocks; /* number of blocks allocated */ -#ifdef CONFIG_YAFFS_WINCE - /* Special 64-bit times for WinCE */ - unsigned long yst_wince_atime[2]; - unsigned long yst_wince_mtime[2]; - unsigned long yst_wince_ctime[2]; -#else - unsigned long yst_atime; /* time of last access */ - unsigned long yst_mtime; /* time of last modification */ - unsigned long yst_ctime; /* time of last change */ -#endif -}; - -struct yaffs_utimbuf { - unsigned long actime; - unsigned long modtime; -}; - -int yaffs_open(const YCHAR *path, int oflag, int mode) ; - -int yaffs_close(int fd) ; -int yaffs_fsync(int fd) ; -int yaffs_fdatasync(int fd) ; -int yaffs_flush(int fd) ; /* same as yaffs_fsync() */ - -int yaffs_access(const YCHAR *path, int amode); - -int yaffs_dup(int fd); - -int yaffs_read(int fd, void *buf, unsigned int nbyte) ; -int yaffs_write(int fd, const void *buf, unsigned int nbyte) ; - -int yaffs_pread(int fd, void *buf, unsigned int nbyte, loff_t offset); -int yaffs_pwrite(int fd, const void *buf, unsigned int nbyte, loff_t offset); - -loff_t yaffs_lseek(int fd, loff_t offset, int whence) ; - -int yaffs_truncate(const YCHAR *path, loff_t new_size); -int yaffs_ftruncate(int fd, loff_t new_size); - -int yaffs_unlink(const YCHAR *path) ; -int yaffs_rename(const YCHAR *oldPath, const YCHAR *newPath) ; - -int yaffs_stat(const YCHAR *path, struct yaffs_stat *buf) ; -int yaffs_lstat(const YCHAR *path, struct yaffs_stat *buf) ; -int yaffs_fstat(int fd, struct yaffs_stat *buf) ; - -int yaffs_utime(const YCHAR *path, const struct yaffs_utimbuf *buf); -int yaffs_futime(int fd, const struct yaffs_utimbuf *buf); - -int yaffs_setxattr(const char *path, const char *name, - const void *data, int size, int flags); -int yaffs_lsetxattr(const char *path, const char *name, - const void *data, int size, int flags); -int yaffs_fsetxattr(int fd, const char *name, - const void *data, int size, int flags); - -int yaffs_getxattr(const char *path, const char *name, - void *data, int size); -int yaffs_lgetxattr(const char *path, const char *name, - void *data, int size); -int yaffs_fgetxattr(int fd, const char *name, - void *data, int size); - -int yaffs_removexattr(const char *path, const char *name); -int yaffs_lremovexattr(const char *path, const char *name); -int yaffs_fremovexattr(int fd, const char *name); - -int yaffs_listxattr(const char *path, char *list, int size); -int yaffs_llistxattr(const char *path, char *list, int size); -int yaffs_flistxattr(int fd, char *list, int size); - -#ifdef CONFIG_YAFFS_WINCE - -int yaffs_set_wince_times(int fd, - const unsigned *wctime, - const unsigned *watime, - const unsigned *wmtime); -int yaffs_get_wince_times(int fd, - unsigned *wctime, - unsigned *watime, - unsigned *wmtime); - -#endif - -int yaffs_chmod(const YCHAR *path, mode_t mode); -int yaffs_fchmod(int fd, mode_t mode); - -int yaffs_mkdir(const YCHAR *path, mode_t mode) ; -int yaffs_rmdir(const YCHAR *path) ; - -yaffs_DIR *yaffs_opendir(const YCHAR *dirname) ; -struct yaffs_dirent *yaffs_readdir(yaffs_DIR *dirp) ; -void yaffs_rewinddir(yaffs_DIR *dirp) ; -int yaffs_closedir(yaffs_DIR *dirp) ; - -int yaffs_mount(const YCHAR *path) ; -int yaffs_mount2(const YCHAR *path, int read_only); -int yaffs_mount_common(const YCHAR *path, int read_only, int skip_checkpt); - -int yaffs_unmount(const YCHAR *path) ; -int yaffs_unmount2(const YCHAR *path, int force); -int yaffs_remount(const YCHAR *path, int force, int read_only); - -int yaffs_sync(const YCHAR *path) ; - -int yaffs_symlink(const YCHAR *oldpath, const YCHAR *newpath); -int yaffs_readlink(const YCHAR *path, YCHAR *buf, int bufsiz); - -int yaffs_link(const YCHAR *oldpath, const YCHAR *newpath); -int yaffs_mknod(const YCHAR *pathname, mode_t mode, dev_t dev); - -loff_t yaffs_freespace(const YCHAR *path); -loff_t yaffs_totalspace(const YCHAR *path); - -int yaffs_inodecount(const YCHAR *path); - -int yaffs_n_handles(const YCHAR *path); - -#define YAFFS_SHARE_READ 1 -#define YAFFS_SHARE_WRITE 2 -int yaffs_open_sharing(const YCHAR *path, int oflag, int mode, int shareMode); - -struct yaffs_dev; -void yaffs_add_device(struct yaffs_dev *dev); - -int yaffs_start_up(void); -int yaffsfs_GetLastError(void); - -/* Functions to iterate through devices. NB Use with extreme care! */ -void yaffs_dev_rewind(void); -struct yaffs_dev *yaffs_next_dev(void); - -/* Function to get the last error */ -int yaffs_get_error(void); -const char *yaffs_error_to_str(int err); - -/* Function only for debugging */ -void *yaffs_getdev(const YCHAR *path); -int yaffs_dump_dev(const YCHAR *path); -int yaffs_set_error(int error); - -/* Trace control functions */ -unsigned yaffs_set_trace(unsigned tm); -unsigned yaffs_get_trace(void); -#endif diff --git a/fs/yaffs2/ydirectenv.h b/fs/yaffs2/ydirectenv.h deleted file mode 100644 index 14b13ce2bd4..00000000000 --- a/fs/yaffs2/ydirectenv.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -/* - * ydirectenv.h: Environment wrappers for YAFFS direct. - */ - -#ifndef __YDIRECTENV_H__ -#define __YDIRECTENV_H__ - -#include <malloc.h> -#include <linux/compat.h> - -#include "yaffs_osglue.h" - -void yaffs_bug_fn(const char *file_name, int line_no); - -#define YCHAR char -#define YUCHAR unsigned char -#define _Y(x) x - -#define yaffs_strcat(a, b) strcat(a, b) -#define yaffs_strcpy(a, b) strcpy(a, b) -#define yaffs_strncpy(a, b, c) strncpy(a, b, c) -#define yaffs_strnlen(s, m) strnlen(s, m) -#ifdef CONFIG_YAFFS_CASE_INSENSITIVE -#define yaffs_strcmp(a, b) strcasecmp(a, b) -#define yaffs_strncmp(a, b, c) strncasecmp(a, b, c) -#else -#define yaffs_strcmp(a, b) strcmp(a, b) -#define yaffs_strncmp(a, b, c) strncmp(a, b, c) -#endif - -void yaffs_qsort(void *aa, size_t n, size_t es, - int (*cmp)(const void *, const void *)); - -#define sort(base, n, sz, cmp_fn, swp) yaffs_qsort(base, n, sz, cmp_fn) - -#define YAFFS_PATH_DIVIDERS "/" - -#ifdef NO_inline -#define inline -#endif - -#define yaffs_trace(msk, fmt, ...) do { \ - if (yaffs_trace_mask & (msk)) \ - printf("yaffs: " fmt "\n", ##__VA_ARGS__); \ -} while (0) - -#define YAFFS_LOSTNFOUND_NAME "lost+found" -#define YAFFS_LOSTNFOUND_PREFIX "obj" - -#include "yaffscfg.h" - -#define Y_CURRENT_TIME yaffsfs_CurrentTime() -#define Y_TIME_CONVERT(x) x - -#define YAFFS_ROOT_MODE 0666 -#define YAFFS_LOSTNFOUND_MODE 0666 - -#include <linux/list.h> - -#include "yaffsfs.h" - -#endif diff --git a/fs/yaffs2/yportenv.h b/fs/yaffs2/yportenv.h deleted file mode 100644 index b23042948db..00000000000 --- a/fs/yaffs2/yportenv.h +++ /dev/null @@ -1,301 +0,0 @@ -/* - * YAFFS: Yet another Flash File System . A NAND-flash specific file system. - * - * Copyright (C) 2002-2011 Aleph One Ltd. - * for Toby Churchill Ltd and Brightstar Engineering - * - * Created by Charles Manning <charles@aleph1.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License version 2.1 as - * published by the Free Software Foundation. - * - * Note: Only YAFFS headers are LGPL, YAFFS C code is covered by GPL. - */ - -#ifndef __YPORTENV_H__ -#define __YPORTENV_H__ - -#include <linux/bug.h> -#include <linux/types.h> - -/* Definition of types */ -#ifdef CONFIG_YAFFS_DEFINES_TYPES -typedef unsigned char u8; -typedef unsigned short u16; -typedef unsigned u32; -#endif - -#ifdef CONFIG_YAFFS_PROVIDE_DEFS -/* File types */ - -#define DT_UNKNOWN 0 -#define DT_FIFO 1 -#define DT_CHR 2 -#define DT_DIR 4 -#define DT_BLK 6 -#define DT_REG 8 -#define DT_LNK 10 -#define DT_SOCK 12 -#define DT_WHT 14 - -/* - * Attribute flags. - * These are or-ed together to select what has been changed. - */ -#define ATTR_MODE 1 -#define ATTR_UID 2 -#define ATTR_GID 4 -#define ATTR_SIZE 8 -#define ATTR_ATIME 16 -#define ATTR_MTIME 32 -#define ATTR_CTIME 64 - -struct iattr { - unsigned int ia_valid; - unsigned ia_mode; - unsigned ia_uid; - unsigned ia_gid; - unsigned ia_size; - unsigned ia_atime; - unsigned ia_mtime; - unsigned ia_ctime; - unsigned int ia_attr_flags; -}; - -#endif - -#if defined CONFIG_YAFFS_WINCE - -#include "ywinceenv.h" - -#elif defined CONFIG_YAFFS_DIRECT - -/* Direct interface */ -#include "ydirectenv.h" - -#elif defined CONFIG_YAFFS_UTIL - -#include "yutilsenv.h" - -#else -/* Should have specified a configuration type */ -#error Unknown configuration - -#endif - -#if defined(CONFIG_YAFFS_DIRECT) || defined(CONFIG_YAFFS_WINCE) - -#ifdef CONFIG_YAFFSFS_PROVIDE_VALUES - -#ifndef O_RDONLY -#define O_RDONLY 00 -#endif - -#ifndef O_WRONLY -#define O_WRONLY 01 -#endif - -#ifndef O_RDWR -#define O_RDWR 02 -#endif - -#ifndef O_CREAT -#define O_CREAT 0100 -#endif - -#ifndef O_EXCL -#define O_EXCL 0200 -#endif - -#ifndef O_TRUNC -#define O_TRUNC 01000 -#endif - -#ifndef O_APPEND -#define O_APPEND 02000 -#endif - -#ifndef SEEK_SET -#define SEEK_SET 0 -#endif - -#ifndef SEEK_CUR -#define SEEK_CUR 1 -#endif - -#ifndef SEEK_END -#define SEEK_END 2 -#endif - -#ifndef EBUSY -#define EBUSY 16 -#endif - -#ifndef ENODEV -#define ENODEV 19 -#endif - -#ifndef EINVAL -#define EINVAL 22 -#endif - -#ifndef ENFILE -#define ENFILE 23 -#endif - -#ifndef EBADF -#define EBADF 9 -#endif - -#ifndef EACCES -#define EACCES 13 -#endif - -#ifndef EXDEV -#define EXDEV 18 -#endif - -#ifndef ENOENT -#define ENOENT 2 -#endif - -#ifndef ENOSPC -#define ENOSPC 28 -#endif - -#ifndef EROFS -#define EROFS 30 -#endif - -#ifndef ERANGE -#define ERANGE 34 -#endif - -#ifndef ENODATA -#define ENODATA 61 -#endif - -#ifndef ENOTEMPTY -#define ENOTEMPTY 39 -#endif - -#ifndef ENAMETOOLONG -#define ENAMETOOLONG 36 -#endif - -#ifndef ENOMEM -#define ENOMEM 12 -#endif - -#ifndef EFAULT -#define EFAULT 14 -#endif - -#ifndef EEXIST -#define EEXIST 17 -#endif - -#ifndef ENOTDIR -#define ENOTDIR 20 -#endif - -#ifndef EISDIR -#define EISDIR 21 -#endif - -#ifndef ELOOP -#define ELOOP 40 -#endif - -/* Mode flags */ - -#ifndef S_IFMT -#define S_IFMT 0170000 -#endif - -#ifndef S_IFSOCK -#define S_IFSOCK 0140000 -#endif - -#ifndef S_IFIFO -#define S_IFIFO 0010000 -#endif - -#ifndef S_IFCHR -#define S_IFCHR 0020000 -#endif - -#ifndef S_IFBLK -#define S_IFBLK 0060000 -#endif - -#ifndef S_IFLNK -#define S_IFLNK 0120000 -#endif - -#ifndef S_IFDIR -#define S_IFDIR 0040000 -#endif - -#ifndef S_IFREG -#define S_IFREG 0100000 -#endif - -#define S_ISSOCK(m) (((m) & S_IFMT) == S_IFSOCK) -#define S_ISLNK(m) (((m) & S_IFMT) == S_IFLNK) -#define S_ISDIR(m) (((m) & S_IFMT) == S_IFDIR) -#define S_ISREG(m) (((m) & S_IFMT) == S_IFREG) -#define S_ISBLK(m) (((m) & S_IFMT) == S_IFBLK) -#define S_ISCHR(m) (((m) & S_IFMT) == S_IFCHR) -#define S_ISFIFO(m) (((m) & S_IFMT) == S_IFIFO) - -#ifndef S_IREAD -#define S_IREAD 0000400 -#endif - -#ifndef S_IWRITE -#define S_IWRITE 0000200 -#endif - -#ifndef S_IEXEC -#define S_IEXEC 0000100 -#endif - -#ifndef XATTR_CREATE -#define XATTR_CREATE 1 -#endif - -#ifndef XATTR_REPLACE -#define XATTR_REPLACE 2 -#endif - -#ifndef R_OK -#define R_OK 4 -#define W_OK 2 -#define X_OK 1 -#define F_OK 0 -#endif - -#else -#include <errno.h> -#include <sys/stat.h> -#include <fcntl.h> -#endif - -#endif - -#ifndef Y_DUMP_STACK -#define Y_DUMP_STACK() do { } while (0) -#endif - -#ifndef BUG -#define BUG() do {\ - yaffs_trace(YAFFS_TRACE_BUG,\ - "==>> yaffs bug: " __FILE__ " %d",\ - __LINE__);\ - Y_DUMP_STACK();\ -} while (0) -#endif - -#endif diff --git a/include/abuf.h b/include/abuf.h index be98ec78c86..62ff6499a0c 100644 --- a/include/abuf.h +++ b/include/abuf.h @@ -9,7 +9,11 @@ #ifndef __ABUF_H #define __ABUF_H +#ifdef USE_HOSTCC +#include <sys/types.h> +#else #include <linux/types.h> +#endif /** * struct abuf - buffer that can be allocated and freed @@ -43,6 +47,14 @@ static inline size_t abuf_size(const struct abuf *abuf) } /** + * abuf_addr() - Get the address of a buffer's data + * + * @abuf: Buffer to check + * Return: address of buffer + */ +ulong abuf_addr(const struct abuf *abuf); + +/** * abuf_set() - set the (unallocated) data in a buffer * * This simply makes the abuf point to the supplied data, which must be live @@ -146,6 +158,19 @@ void abuf_init_move(struct abuf *abuf, void *data, size_t size); void abuf_init_set(struct abuf *abuf, void *data, size_t size); /** + * abuf_init_const() - Set up a new const abuf + * + * Inits a new abuf and sets up its (unallocated) data. The only current + * difference between this and abuf_init_set() is the 'data' parameter is a + * const pointer. At some point a flag could be used to indicate const-ness. + * + * @abuf: abuf to set up + * @data: New contents of abuf + * @size: New size of abuf + */ +void abuf_init_const(struct abuf *abuf, const void *data, size_t size); + +/** * abuf_uninit() - Free any memory used by an abuf * * The buffer must be inited before this can be called. diff --git a/include/bootdev.h b/include/bootdev.h index ad4af0d1310..12c90c4ec1b 100644 --- a/include/bootdev.h +++ b/include/bootdev.h @@ -109,11 +109,9 @@ struct bootdev_hunter { * This is attached to each device in the bootdev uclass and accessible via * dev_get_uclass_plat(dev) * - * @bootflows: List of available bootflows for this bootdev * @piro: Priority of this bootdev */ struct bootdev_uc_plat { - struct list_head bootflow_head; enum bootdev_prio_t prio; }; @@ -186,31 +184,6 @@ int bootdev_find_in_blk(struct udevice *dev, struct udevice *blk, void bootdev_list(bool probe); /** - * bootdev_clear_bootflows() - Clear bootflows from a bootdev - * - * Each bootdev maintains a list of discovered bootflows. This provides a - * way to clear it. These bootflows are removed from the global list too. - * - * @dev: bootdev device to update - */ -void bootdev_clear_bootflows(struct udevice *dev); - -/** - * bootdev_add_bootflow() - Add a bootflow to the bootdev's list - * - * All fields in @bflow must be set up. Note that @bflow->dev is used to add the - * bootflow to that device. - * - * @dev: Bootdev device to add to - * @bflow: Bootflow to add. Note that fields within bflow must be allocated - * since this function takes over ownership of these. This functions makes - * a copy of @bflow itself (without allocating its fields again), so the - * caller must dispose of the memory used by the @bflow pointer itself - * Return: 0 if OK, -ENOMEM if out of memory - */ -int bootdev_add_bootflow(struct bootflow *bflow); - -/** * bootdev_first_bootflow() - Get the first bootflow from a bootdev * * Returns the first bootflow attached to a bootdev @@ -429,6 +402,15 @@ static int bootdev_setup_for_sibling_blk(struct udevice *blk, int bootdev_get_sibling_blk(struct udevice *dev, struct udevice **blkp); /** + * bootdev_get_from_blk() - Get the bootdev given a block device + * + * @blk: Block device to check + * @bootdebp: Returns the bootdev found, if any + * Return 0 if OK, -ve on error + */ +int bootdev_get_from_blk(struct udevice *blk, struct udevice **bootdevp); + +/** * bootdev_unbind_dev() - Unbind a bootdev device * * Remove and unbind a bootdev device which is a child of @parent. This should diff --git a/include/bootflow.h b/include/bootflow.h index 4d2fc7b69b5..480cf8a5af1 100644 --- a/include/bootflow.h +++ b/include/bootflow.h @@ -7,7 +7,9 @@ #ifndef __bootflow_h #define __bootflow_h +#include <alist.h> #include <bootdev.h> +#include <image.h> #include <dm/ofnode_decl.h> #include <linux/list.h> @@ -56,13 +58,8 @@ enum bootflow_flags_t { /** * struct bootflow - information about a bootflow * - * This is connected into two separate linked lists: + * All bootflows are listed in bootstd's bootflow alist in struct bootstd_priv * - * bm_sibling - links all bootflows in the same bootdev - * glob_sibling - links all bootflows in all bootdevs - * - * @bm_node: Points to siblings in the same bootdev - * @glob_node: Points to siblings in the global list (all bootdev) * @dev: Bootdev device which produced this bootflow, NULL for flows created by * BOOTMETHF_GLOBAL bootmeths * @blk: Block device which contains this bootflow, NULL if this is a network @@ -90,10 +87,9 @@ enum bootflow_flags_t { * @cmdline: OS command line, or NULL if not known (allocated) * @x86_setup: Pointer to x86 setup block inside @buf, NULL if not present * @bootmeth_priv: Private data for the bootmeth + * @images: List of loaded images (struct bootstd_img) */ struct bootflow { - struct list_head bm_node; - struct list_head glob_node; struct udevice *dev; struct udevice *blk; int part; @@ -116,6 +112,44 @@ struct bootflow { char *cmdline; void *x86_setup; void *bootmeth_priv; + struct alist images; +}; + +/** + * bootflow_img_t: Supported image types + * + * This uses image_type_t for most types, but extends it + * + * @BFI_EXTLINUX_CFG: extlinux configuration-file + * @BFI_LOGO: logo image + * @BFI_EFI: EFI PE image + * @BFI_CMDLINE: OS command-line string + */ +enum bootflow_img_t { + BFI_FIRST = IH_TYPE_COUNT, + BFI_EXTLINUX_CFG = BFI_FIRST, + BFI_LOGO, + BFI_EFI, + BFI_CMDLINE, + + BFI_COUNT, +}; + +/** + * struct bootflow_img - Information about an image which has been loaded + * + * This keeps track of a single, loaded image. + * + * @fname: Filename used to load the image (allocated) + * @type: Image type (IH_TYPE_...) + * @addr: Address to which the image was loaded, 0 if not yet loaded + * @size: Size of the image + */ +struct bootflow_img { + char *fname; + enum bootflow_img_t type; + ulong addr; + ulong size; }; /** @@ -393,7 +427,10 @@ const char *bootflow_state_get_name(enum bootflow_state_t state); /** * bootflow_remove() - Remove a bootflow and free its memory * - * This updates the linked lists containing the bootflow then frees it. + * This updates the 'global' linked list containing the bootflow, then frees it. + * It does not remove it from bootflows alist in struct bootstd_priv + * + * This does not free bflow itself, since this is assumed to be in an alist * * @bflow: Bootflow to remove */ @@ -569,4 +606,34 @@ int bootflow_cmdline_get_arg(struct bootflow *bflow, const char *arg, */ int bootflow_cmdline_auto(struct bootflow *bflow, const char *arg); +/** + * bootflow_img_type_name() - Get the name for an image type + * + * @type: Type to check (either enum bootflow_img_t or enum image_type_t + * Return: Image name, or "unknown" if not known + */ +const char *bootflow_img_type_name(enum bootflow_img_t type); + +/** + * bootflow_img_add() - Add a new image to a bootflow + * + * @bflow: Bootflow to add to + * @fname: Image filename (will be allocated) + * @type: Image type + * @addr: Address the image was loaded to, or 0 if not loaded + * @size: Image size + * Return: pointer to the added image, or NULL if out of memory + */ +struct bootflow_img *bootflow_img_add(struct bootflow *bflow, const char *fname, + enum bootflow_img_t type, ulong addr, + ulong size); +/** + * bootflow_get_seq() - Get the sequence number of a bootflow + * + * Bootflows are numbered by their position in the bootstd list. + * + * Return: Sequence number of bootflow (0 = first) + */ +int bootflow_get_seq(const struct bootflow *bflow); + #endif diff --git a/include/bootmeth.h b/include/bootmeth.h index a08ebf005ad..26de593a9a4 100644 --- a/include/bootmeth.h +++ b/include/bootmeth.h @@ -7,11 +7,10 @@ #ifndef __bootmeth_h #define __bootmeth_h +#include <bootflow.h> #include <linux/bitops.h> struct blk_desc; -struct bootflow; -struct bootflow_iter; struct udevice; /** @@ -117,13 +116,15 @@ struct bootmeth_ops { * @bflow: Bootflow providing info on where to read from * @file_path: Path to file (may be absolute or relative) * @addr: Address to load file + * @type: File type (IH_TYPE_...) * @sizep: On entry provides the maximum permitted size; on exit * returns the size of the file * Return: 0 if OK, -ENOSPC if the file is too large for @sizep, other * -ve value if something else goes wrong */ int (*read_file)(struct udevice *dev, struct bootflow *bflow, - const char *file_path, ulong addr, ulong *sizep); + const char *file_path, ulong addr, + enum bootflow_img_t type, ulong *sizep); #if CONFIG_IS_ENABLED(BOOTSTD_FULL) /** * readall() - read all files for a bootflow @@ -245,13 +246,15 @@ int bootmeth_set_bootflow(struct udevice *dev, struct bootflow *bflow, * @bflow: Bootflow providing info on where to read from * @file_path: Path to file (may be absolute or relative) * @addr: Address to load file + * @type: File type (IH_TYPE_...) * @sizep: On entry provides the maximum permitted size; on exit * returns the size of the file * Return: 0 if OK, -ENOSPC if the file is too large for @sizep, other * -ve value if something else goes wrong */ int bootmeth_read_file(struct udevice *dev, struct bootflow *bflow, - const char *file_path, ulong addr, ulong *sizep); + const char *file_path, ulong addr, + enum bootflow_img_t type, ulong *sizep); /** * bootmeth_read_all() - read all bootflow files @@ -365,10 +368,12 @@ int bootmeth_try_file(struct bootflow *bflow, struct blk_desc *desc, * @bflow: Information about file to read * @size_limit: Maximum file size to permit * @align: Allocation alignment (1 for unaligned) + * @type: File type (IH_TYPE_...) * Return: 0 if OK, -E2BIG if file is too large, -ENOMEM if out of memory, * other -ve on other error */ -int bootmeth_alloc_file(struct bootflow *bflow, uint size_limit, uint align); +int bootmeth_alloc_file(struct bootflow *bflow, uint size_limit, uint align, + enum bootflow_img_t type); /** * bootmeth_alloc_other() - Allocate and read a file for a bootflow @@ -379,12 +384,13 @@ int bootmeth_alloc_file(struct bootflow *bflow, uint size_limit, uint align); * * @bflow: Information about file to read * @fname: Filename to read from (within bootflow->subdir) + * @type: File type (IH_TYPE_...) * @bufp: Returns a pointer to the allocated buffer * @sizep: Returns the size of the buffer * Return: 0 if OK, -ENOMEM if out of memory, other -ve on other error */ int bootmeth_alloc_other(struct bootflow *bflow, const char *fname, - void **bufp, uint *sizep); + enum bootflow_img_t type, void **bufp, uint *sizep); /** * bootmeth_common_read_file() - Common handler for reading a file @@ -395,11 +401,13 @@ int bootmeth_alloc_other(struct bootflow *bflow, const char *fname, * @bflow: Bootflow information * @file_path: Path to file * @addr: Address to load file to + * @type: File type (IH_TYPE_...) * @sizep: On entry, the maximum file size to accept, on exit the actual file * size read */ int bootmeth_common_read_file(struct udevice *dev, struct bootflow *bflow, - const char *file_path, ulong addr, ulong *sizep); + const char *file_path, ulong addr, + enum bootflow_img_t type, ulong *sizep); /** * bootmeth_get_bootflow() - Get a bootflow from a global bootmeth diff --git a/include/bootstd.h b/include/bootstd.h index ac756e98d84..3398e48e88b 100644 --- a/include/bootstd.h +++ b/include/bootstd.h @@ -9,6 +9,7 @@ #ifndef __bootstd_h #define __bootstd_h +#include <alist.h> #include <dm/ofnode_decl.h> #include <linux/list.h> #include <linux/types.h> @@ -30,7 +31,8 @@ struct udevice; * terminated) * @cur_bootdev: Currently selected bootdev (for commands) * @cur_bootflow: Currently selected bootflow (for commands) - * @glob_head: Head for the global list of all bootflows across all bootdevs + * @bootflows: (struct bootflow) Global list of all bootflows across all + * bootdevs * @bootmeth_count: Number of bootmeth devices in @bootmeth_order * @bootmeth_order: List of bootmeth devices to use, in order, NULL-terminated * @vbe_bootmeth: Currently selected VBE bootmeth, NULL if none @@ -44,7 +46,7 @@ struct bootstd_priv { const char **env_order; struct udevice *cur_bootdev; struct bootflow *cur_bootflow; - struct list_head glob_head; + struct alist bootflows; int bootmeth_count; struct udevice **bootmeth_order; struct udevice *vbe_bootmeth; @@ -90,6 +92,23 @@ const char *const *const bootstd_get_prefixes(struct udevice *dev); int bootstd_get_priv(struct bootstd_priv **stdp); /** + * bootstd_try_priv() - Try to get the (single) state for the bootstd system + * + * The state holds a global list of all bootflows that have been found. This + * function returns the state if available, but takes care not to create the + * device (or uclass) if it doesn't exist. + * + * This function is safe to use in the 'unbind' path. It will always return NULL + * unless the bootstd device is probed and ready, e.g. bootstd_get_priv() has + * previously been called. + * + * TODO(sjg@chromium.org): Consider adding a bootstd pointer to global_data + * + * Return: pointer if the device exists, else NULL + */ +struct bootstd_priv *bootstd_try_priv(void); + +/** * bootstd_clear_glob() - Clear the global list of bootflows * * This removes all bootflows globally and across all bootdevs. @@ -105,4 +124,31 @@ void bootstd_clear_glob(void); */ int bootstd_prog_boot(void); +/** + * bootstd_add_bootflow() - Add a bootflow to the global list + * + * All fields in @bflow must be set up. Note that @bflow->dev is used to add the + * bootflow to that device. + * + * The bootflow is also added to the global list of all bootflows + * + * @dev: Bootdev device to add to + * @bflow: Bootflow to add. Note that fields within bflow must be allocated + * since this function takes over ownership of these. This functions makes + * a copy of @bflow itself (without allocating its fields again), so the + * caller must dispose of the memory used by the @bflow pointer itself + * Return: element number in the list, if OK, -ENOMEM if out of memory + */ +int bootstd_add_bootflow(struct bootflow *bflow); + +/** + * bootstd_clear_bootflows_for_bootdev() - Clear bootflows from a bootdev + * + * Each bootdev maintains a list of discovered bootflows. This provides a + * way to clear it. These bootflows are removed from the global list too. + * + * @dev: bootdev device to update + */ +int bootstd_clear_bootflows_for_bootdev(struct udevice *dev); + #endif diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index 3bbbd900dd4..957d9c05083 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -29,28 +29,6 @@ #endif -#define BOOT_TARGET_DEVICES(func) \ - func(MMC, mmc, 1) \ - func(MMC, mmc, 2) \ - func(DHCP, dhcp, na) - -#include <config_distro_bootcmd.h> - -/* Initial environment variables */ -#define CFG_EXTRA_ENV_SETTINGS \ - BOOTENV \ - "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ - "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ - "image=Image\0" \ - "console=ttymxc1,115200\0" \ - "fdt_addr_r=0x43000000\0" \ - "boot_fit=no\0" \ - "fdtfile=imx8mm-evk.dtb\0" \ - "initrd_addr=0x43800000\0" \ - "bootm_size=0x10000000\0" \ - "mmcpart=1\0" \ - "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \ - /* Link Definitions */ #define CFG_SYS_INIT_RAM_ADDR 0x40000000 diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index ca02e26c26e..9972dc17812 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -13,36 +13,6 @@ #define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) -#define BOOT_TARGET_DEVICES(func) \ - func(MMC, mmc, 1) \ - func(MMC, mmc, 2) \ - func(DHCP, dhcp, na) - -#include <config_distro_bootcmd.h> - -/* Initial environment variables */ -/* see include/configs/ti_armv7_common.h */ -#define ENV_MEM_LAYOUT_SETTINGS \ - "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ - "kernel_addr_r=0x42000000\0" \ - "fdt_addr_r=0x48000000\0" \ - "fdtoverlay_addr_r=0x49000000\0" \ - "ramdisk_addr_r=0x48080000\0" \ - "initrd_addr=0x48080000\0" \ - "scriptaddr=0x40000000\0" \ - "pxefile_addr_r=0x40100000\0" - -#define CFG_EXTRA_ENV_SETTINGS \ - "image=Image\0" \ - BOOTENV \ - "console=ttymxc1,115200\0" \ - "boot_fit=no\0" \ - "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ - "bootm_size=0x10000000\0" \ - "mmcpart=1\0" \ - "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \ - ENV_MEM_LAYOUT_SETTINGS - /* Link Definitions */ #define CFG_SYS_INIT_RAM_ADDR 0x40000000 diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index 741ee39db1a..dfb5cd22528 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -17,27 +17,6 @@ #endif -#define BOOT_TARGET_DEVICES(func) \ - func(MMC, mmc, 1) \ - func(MMC, mmc, 2) - -#include <config_distro_bootcmd.h> - -/* Initial environment variables */ -#define CFG_EXTRA_ENV_SETTINGS \ - BOOTENV \ - "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ - "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ - "image=Image\0" \ - "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \ - "fdt_addr_r=0x43000000\0" \ - "boot_fdt=try\0" \ - "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ - "initrd_addr=0x43800000\0" \ - "bootm_size=0x10000000\0" \ - "mmcpart=1\0" \ - "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \ - /* Link Definitions */ #define CFG_SYS_INIT_RAM_ADDR 0x40000000 diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index 666f46ac105..2a86240e2c6 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -26,28 +26,6 @@ #define CFG_FEC_MXC_PHYADDR 0 #endif -#define BOOT_TARGET_DEVICES(func) \ - func(MMC, mmc, 0) \ - func(MMC, mmc, 1) \ - func(DHCP, dhcp, na) - -#include <config_distro_bootcmd.h> - -/* Initial environment variables */ -#define CFG_EXTRA_ENV_SETTINGS \ - BOOTENV \ - "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ - "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ - "image=Image\0" \ - "console=ttymxc0,115200\0" \ - "fdt_addr_r=0x43000000\0" \ - "boot_fdt=try\0" \ - "fdtfile=imx8mq-evk.dtb\0" \ - "initrd_addr=0x43800000\0" \ - "bootm_size=0x10000000\0" \ - "mmcpart=1\0" \ - "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \ - /* Link Definitions */ #define CFG_SYS_INIT_RAM_ADDR 0x40000000 diff --git a/include/configs/imx93_evk.h b/include/configs/imx93_evk.h index 260a5043d53..eb40a69d20c 100644 --- a/include/configs/imx93_evk.h +++ b/include/configs/imx93_evk.h @@ -17,117 +17,12 @@ #define CFG_MALLOC_F_ADDR 0x204D0000 #endif -#ifdef CONFIG_DISTRO_DEFAULTS -#define BOOT_TARGET_DEVICES(func) \ - func(MMC, mmc, 0) \ - func(MMC, mmc, 1) \ - -#include <config_distro_bootcmd.h> -#else -#define BOOTENV -#endif - #ifdef CONFIG_SYS_MMC_ENV_DEV #define IMX93_EVK_MMC_ENV_DEV CONFIG_SYS_MMC_ENV_DEV #else #define IMX93_EVK_MMC_ENV_DEV 0 #endif -/* Initial environment variables */ -#define CFG_EXTRA_ENV_SETTINGS \ - BOOTENV \ - "scriptaddr=0x83500000\0" \ - "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ - "image=Image\0" \ - "splashimage=0x90000000\0" \ - "console=ttyLP0,115200 earlycon\0" \ - "fdt_addr_r=0x83000000\0" \ - "fdt_addr=0x83000000\0" \ - "cntr_addr=0x98000000\0" \ - "cntr_file=os_cntr_signed.bin\0" \ - "boot_fit=no\0" \ - "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ - "bootm_size=0x10000000\0" \ - "mmcdev=" __stringify(IMX93_EVK_MMC_ENV_DEV)"\0" \ - "mmcpart=1\0" \ - "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \ - "mmcautodetect=yes\0" \ - "mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \ - "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source\0" \ - "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \ - "loadcntr=fatload mmc ${mmcdev}:${mmcpart} ${cntr_addr} ${cntr_file}\0" \ - "auth_os=auth_cntr ${cntr_addr}\0" \ - "boot_os=booti ${loadaddr} - ${fdt_addr_r};\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "if test ${sec_boot} = yes; then " \ - "if run auth_os; then " \ - "run boot_os; " \ - "else " \ - "echo ERR: failed to authenticate; " \ - "fi; " \ - "else " \ - "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \ - "bootm ${loadaddr}; " \ - "else " \ - "if run loadfdt; then " \ - "run boot_os; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi;" \ - "fi;\0" \ - "netargs=setenv bootargs ${jh_clk} console=${console} " \ - "root=/dev/nfs " \ - "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ - "netboot=echo Booting from net ...; " \ - "run netargs; " \ - "if test ${ip_dyn} = yes; then " \ - "setenv get_cmd dhcp; " \ - "else " \ - "setenv get_cmd tftp; " \ - "fi; " \ - "if test ${sec_boot} = yes; then " \ - "${get_cmd} ${cntr_addr} ${cntr_file}; " \ - "if run auth_os; then " \ - "run boot_os; " \ - "else " \ - "echo ERR: failed to authenticate; " \ - "fi; " \ - "else " \ - "${get_cmd} ${loadaddr} ${image}; " \ - "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \ - "bootm ${loadaddr}; " \ - "else " \ - "if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \ - "run boot_os; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi;" \ - "fi;\0" \ - "bsp_bootcmd=echo Running BSP bootcmd ...; " \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if test ${sec_boot} = yes; then " \ - "if run loadcntr; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else run netboot; " \ - "fi; " \ - "fi; " \ - "fi; " \ - "fi;" - /* Link Definitions */ #define CFG_SYS_INIT_RAM_ADDR 0x80000000 diff --git a/include/configs/khadas-edge2-rk3588s.h b/include/configs/khadas-edge2-rk3588s.h new file mode 100644 index 00000000000..d279cf3826a --- /dev/null +++ b/include/configs/khadas-edge2-rk3588s.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2024 Khadas Technology Co., Ltd. + */ + +#ifndef __KHADAS_EDGE2_RK3588_H +#define __KHADAS_EDGE2_RK3588_H + +#include <configs/rk3588_common.h> + +#define ROCKCHIP_DEVICE_SETTINGS \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" + +#endif /* __KHADAS_EDGE2_RK3588_H */ diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index c5bcd7dc5e8..76f40e7cd5f 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -20,16 +20,16 @@ #endif #define ENV_MEM_LAYOUT_SETTINGS \ - "scriptaddr=0x00500000\0" \ + "scriptaddr=0x00c00000\0" \ "script_offset_f=0xffe000\0" \ "script_size_f=0x2000\0" \ - "pxefile_addr_r=0x00600000\0" \ - "fdt_addr_r=0x01e00000\0" \ - "fdtoverlay_addr_r=0x01f00000\0" \ - "kernel_addr_r=0x02080000\0" \ - "ramdisk_addr_r=0x06000000\0" \ - "kernel_comp_addr_r=0x08000000\0" \ - "kernel_comp_size=0x2000000\0" + "pxefile_addr_r=0x00e00000\0" \ + "kernel_addr_r=0x02000000\0" \ + "kernel_comp_addr_r=0x0a000000\0" \ + "fdt_addr_r=0x12000000\0" \ + "fdtoverlay_addr_r=0x12100000\0" \ + "ramdisk_addr_r=0x12180000\0" \ + "kernel_comp_size=0x8000000\0" #define CFG_EXTRA_ENV_SETTINGS \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ diff --git a/include/configs/rock-5c-rk3588s.h b/include/configs/rock-5c-rk3588s.h new file mode 100644 index 00000000000..0fd76c96f0c --- /dev/null +++ b/include/configs/rock-5c-rk3588s.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2024-2025 Radxa Computer (Shenzhen) Co., Ltd. + */ + +#ifndef __ROCK_5C_RK3588S_H +#define __ROCK_5C_RK3588S_H + +#define ROCKCHIP_DEVICE_SETTINGS \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" + +#include <configs/rk3588_common.h> + +#endif /* __ROCK_5C_RK3588S_H */ diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index 8020689e39e..b5a17f93efc 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -154,6 +154,18 @@ #define FUNC_MMC(func) #endif +#if CONFIG_IS_ENABLED(CMD_PXE) +#define BOOT_TARGET_PXE(func) func(PXE, pxe, na) +#else +#define BOOT_TARGET_PXE(func) +#endif + +#if CONFIG_IS_ENABLED(CMD_DHCP) +#define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na) +#else +#define BOOT_TARGET_DHCP(func) +#endif + /* * Boot by loading an Android image, or kernel, initrd and FDT through * semihosting into DRAM. @@ -188,8 +200,8 @@ func(SATA, sata, 0) \ func(SATA, sata, 1) \ FUNC_VIRTIO(func) \ - func(PXE, pxe, na) \ - func(DHCP, dhcp, na) \ + BOOT_TARGET_PXE(func) \ + BOOT_TARGET_DHCP(func) \ func(AFS, afs, na) #define VEXPRESS_KERNEL_ADDR 0x80080000 @@ -212,8 +224,8 @@ func(MEM, mem, na) \ FUNC_VIRTIO(func) \ FUNC_MMC(func) \ - func(PXE, pxe, na) \ - func(DHCP, dhcp, na) + BOOT_TARGET_PXE(func) \ + BOOT_TARGET_DHCP(func) #define VEXPRESS_KERNEL_ADDR 0x80080000 #define VEXPRESS_PXEFILE_ADDR 0x8fa00000 @@ -234,8 +246,8 @@ #define BOOT_TARGET_DEVICES(func) \ func(MEM, mem, na) \ FUNC_VIRTIO(func) \ - func(PXE, pxe, na) \ - func(DHCP, dhcp, na) + BOOT_TARGET_PXE(func) \ + BOOT_TARGET_DHCP(func) #define VEXPRESS_KERNEL_ADDR 0x00200000 #define VEXPRESS_PXEFILE_ADDR 0x0fb00000 diff --git a/include/cpu.h b/include/cpu.h index 0018910d61f..d0cd104c05a 100644 --- a/include/cpu.h +++ b/include/cpu.h @@ -179,4 +179,18 @@ struct udevice *cpu_get_current_dev(void); * @return 0 if OK, -ve on error */ int cpu_release_core(const struct udevice *dev, phys_addr_t addr); + +/** + * cpu_phys_address_size() - Get the physical-address size for the CPU + * + * x86 CPUs have a setting which indicates how many bits of address space are + * available on the CPU. This is 32 for older CPUs but newer ones may support 36 + * or more. + * + * For non-x86 CPUs the result may simply be 32 for 32-bit CPUS or 64 for 64-bit + * + * Return: address size (typically 32 or 36) + */ +int cpu_phys_address_size(void); + #endif diff --git a/include/cyclic.h b/include/cyclic.h index c6c463d68e9..df8b725e3d0 100644 --- a/include/cyclic.h +++ b/include/cyclic.h @@ -20,7 +20,7 @@ * * @func: Function to call periodically * @name: Name of the cyclic function, e.g. shown in the commands - * @delay_ns: Delay is ns after which this function shall get executed + * @delay_us: Delay is us after which this function shall get executed * @start_time_us: Start time in us, when this function started its execution * @cpu_time_us: Total CPU time of this function * @run_cnt: Counter of executions occurances diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h index 890f0e6cf40..120393426db 100644 --- a/include/dm/ofnode.h +++ b/include/dm/ofnode.h @@ -386,16 +386,29 @@ static inline oftree oftree_from_np(struct device_node *root) void oftree_dispose(oftree tree); /** - * ofnode_name_eq() - Check if the node name is equivalent to a given name - * ignoring the unit address + * ofnode_name_eq() - Check a node name ignoring its unit address * - * @node: valid node reference that has to be compared - * @name: name that has to be compared with the node name + * @node: valid node to compared, which may have a unit address + * @name: name (without unit address) to compare with the node name * Return: true if matches, false if it doesn't match */ bool ofnode_name_eq(ofnode node, const char *name); /** + * ofnode_name_eq_unit() - Check a node name ignoring its unit address + * + * This is separate from ofnode_name_eq() to avoid code-size increase for + * boards which don't need this function + * + * @node: valid node to compared, which may have a unit address + * @name: name to compare with the node name. If this contains a unit + * address, it is matched, otherwise the unit address is ignored + * when searching for matches + * Return: true if matches, false if it doesn't match + */ +bool ofnode_name_eq_unit(ofnode node, const char *name); + +/** * ofnode_read_u8() - Read a 8-bit integer from a property * * @node: valid node reference to read property from @@ -594,6 +607,18 @@ bool ofnode_read_bool(ofnode node, const char *propname); */ ofnode ofnode_find_subnode(ofnode node, const char *subnode_name); +/** + * ofnode_find_subnode_unit() - find a named subnode of a parent node + * + * @node: valid reference to parent node + * @subnode_name: name of subnode to find, including any unit address. If the + * unit address is omitted, any subnode which matches the name (excluding + * any unit address) is returned + * Return: reference to subnode (which can be invalid if there is no such + * subnode) + */ +ofnode ofnode_find_subnode_unit(ofnode node, const char *subnode_name); + #if CONFIG_IS_ENABLED(DM_INLINE_OFNODE) #include <asm/global_data.h> @@ -1809,7 +1834,7 @@ static inline int ofnode_read_bootscript_flash(u64 *bootscr_flash_offset, * of_add_subnode() - add a new subnode to a node * * @parent: parent node to add to - * @name: name of subnode + * @name: name of subnode (allocated by this function) * @nodep: returns pointer to new subnode (valid if the function returns 0 * or -EEXIST) * Returns 0 if OK, -EEXIST if already exists, -ENOMEM if out of memory, other diff --git a/include/dm/root.h b/include/dm/root.h index 5651b868c8b..286bd9a2ddd 100644 --- a/include/dm/root.h +++ b/include/dm/root.h @@ -137,6 +137,21 @@ int dm_scan_other(bool pre_reloc_only); int dm_init_and_scan(bool pre_reloc_only); /** + * dm_autoprobe() - Probe devices which are marked for probe-after-bind + * + * This probes all devices with a DM_FLAG_PROBE_AFTER_BIND flag. It checks the + * entire tree, so parent nodes need not have the flag set. + * + * It recursively probes parent nodes, so they do not need to have the flag + * set themselves. Since parents are always probed before children, if a child + * has the flag set, then its parent (and any devices up the chain to the root + * device) will be probed too. + * + * Return: 0 if OK, -ve on error + */ +int dm_autoprobe(void); + +/** * dm_init() - Initialise Driver Model structures * * This function will initialize roots of driver tree and class tree. diff --git a/include/dt-bindings/clock/mt7629-clk.h b/include/dt-bindings/clock/mt7629-clk.h deleted file mode 100644 index 0bbfbfa744a..00000000000 --- a/include/dt-bindings/clock/mt7629-clk.h +++ /dev/null @@ -1,206 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (C) 2018 MediaTek Inc. - */ - -#ifndef _DT_BINDINGS_CLK_MT7629_H -#define _DT_BINDINGS_CLK_MT7629_H - -/* TOPCKGEN */ -#define CLK_TOP_FCLKS_OFF 0 - -#define CLK_TOP_TO_U2_PHY 0 -#define CLK_TOP_TO_U2_PHY_1P 1 -#define CLK_TOP_PCIE0_PIPE_EN 2 -#define CLK_TOP_PCIE1_PIPE_EN 3 -#define CLK_TOP_SSUSB_TX250M 4 -#define CLK_TOP_SSUSB_EQ_RX250M 5 -#define CLK_TOP_SSUSB_CDR_REF 6 -#define CLK_TOP_SSUSB_CDR_FB 7 -#define CLK_TOP_SATA_ASIC 8 -#define CLK_TOP_SATA_RBC 9 - -#define CLK_TOP_TO_USB3_SYS 10 -#define CLK_TOP_P1_1MHZ 11 -#define CLK_TOP_4MHZ 12 -#define CLK_TOP_P0_1MHZ 13 -#define CLK_TOP_ETH_500M 14 -#define CLK_TOP_TXCLK_SRC_PRE 15 -#define CLK_TOP_RTC 16 -#define CLK_TOP_PWM_QTR_26M 17 -#define CLK_TOP_CPUM_TCK_IN 18 -#define CLK_TOP_TO_USB3_DA_TOP 19 -#define CLK_TOP_MEMPLL 20 -#define CLK_TOP_DMPLL 21 -#define CLK_TOP_DMPLL_D4 22 -#define CLK_TOP_DMPLL_D8 23 -#define CLK_TOP_SYSPLL_D2 24 -#define CLK_TOP_SYSPLL1_D2 25 -#define CLK_TOP_SYSPLL1_D4 26 -#define CLK_TOP_SYSPLL1_D8 27 -#define CLK_TOP_SYSPLL1_D16 28 -#define CLK_TOP_SYSPLL2_D2 29 -#define CLK_TOP_SYSPLL2_D4 30 -#define CLK_TOP_SYSPLL2_D8 31 -#define CLK_TOP_SYSPLL_D5 32 -#define CLK_TOP_SYSPLL3_D2 33 -#define CLK_TOP_SYSPLL3_D4 34 -#define CLK_TOP_SYSPLL_D7 35 -#define CLK_TOP_SYSPLL4_D2 36 -#define CLK_TOP_SYSPLL4_D4 37 -#define CLK_TOP_SYSPLL4_D16 38 -#define CLK_TOP_UNIVPLL 39 -#define CLK_TOP_UNIVPLL1_D2 40 -#define CLK_TOP_UNIVPLL1_D4 41 -#define CLK_TOP_UNIVPLL1_D8 42 -#define CLK_TOP_UNIVPLL_D3 43 -#define CLK_TOP_UNIVPLL2_D2 44 -#define CLK_TOP_UNIVPLL2_D4 45 -#define CLK_TOP_UNIVPLL2_D8 46 -#define CLK_TOP_UNIVPLL2_D16 47 -#define CLK_TOP_UNIVPLL_D5 48 -#define CLK_TOP_UNIVPLL3_D2 49 -#define CLK_TOP_UNIVPLL3_D4 50 -#define CLK_TOP_UNIVPLL3_D16 51 -#define CLK_TOP_UNIVPLL_D7 52 -#define CLK_TOP_UNIVPLL_D80_D4 53 -#define CLK_TOP_UNIV48M 54 -#define CLK_TOP_SGMIIPLL_D2 55 -#define CLK_TOP_CLKXTAL_D4 56 -#define CLK_TOP_HD_FAXI 57 -#define CLK_TOP_FAXI 58 -#define CLK_TOP_F_FAUD_INTBUS 59 -#define CLK_TOP_AP2WBHIF_HCLK 60 -#define CLK_TOP_10M_INFRAO 61 -#define CLK_TOP_MSDC30_1 62 -#define CLK_TOP_SPI 63 -#define CLK_TOP_SF 64 -#define CLK_TOP_FLASH 65 -#define CLK_TOP_TO_USB3_REF 66 -#define CLK_TOP_TO_USB3_MCU 67 -#define CLK_TOP_TO_USB3_DMA 68 -#define CLK_TOP_FROM_TOP_AHB 69 -#define CLK_TOP_FROM_TOP_AXI 70 -#define CLK_TOP_PCIE1_MAC_EN 71 -#define CLK_TOP_PCIE0_MAC_EN 72 - -#define CLK_TOP_AXI_SEL 73 -#define CLK_TOP_MEM_SEL 74 -#define CLK_TOP_DDRPHYCFG_SEL 75 -#define CLK_TOP_ETH_SEL 76 -#define CLK_TOP_PWM_SEL 77 -#define CLK_TOP_F10M_REF_SEL 78 -#define CLK_TOP_NFI_INFRA_SEL 79 -#define CLK_TOP_FLASH_SEL 80 -#define CLK_TOP_UART_SEL 81 -#define CLK_TOP_SPI0_SEL 82 -#define CLK_TOP_SPI1_SEL 83 -#define CLK_TOP_MSDC50_0_SEL 84 -#define CLK_TOP_MSDC30_0_SEL 85 -#define CLK_TOP_MSDC30_1_SEL 86 -#define CLK_TOP_AP2WBMCU_SEL 87 -#define CLK_TOP_AP2WBHIF_SEL 88 -#define CLK_TOP_AUDIO_SEL 89 -#define CLK_TOP_AUD_INTBUS_SEL 90 -#define CLK_TOP_PMICSPI_SEL 91 -#define CLK_TOP_SCP_SEL 92 -#define CLK_TOP_ATB_SEL 93 -#define CLK_TOP_HIF_SEL 94 -#define CLK_TOP_SATA_SEL 95 -#define CLK_TOP_U2_SEL 96 -#define CLK_TOP_AUD1_SEL 97 -#define CLK_TOP_AUD2_SEL 98 -#define CLK_TOP_IRRX_SEL 99 -#define CLK_TOP_IRTX_SEL 100 -#define CLK_TOP_SATA_MCU_SEL 101 -#define CLK_TOP_PCIE0_MCU_SEL 102 -#define CLK_TOP_PCIE1_MCU_SEL 103 -#define CLK_TOP_SSUSB_MCU_SEL 104 -#define CLK_TOP_CRYPTO_SEL 105 -#define CLK_TOP_SGMII_REF_1_SEL 106 -#define CLK_TOP_10M_SEL 107 -#define CLK_TOP_NR_CLK 108 - -/* INFRACFG */ -#define CLK_INFRA_MUX1_SEL 0 -#define CLK_INFRA_DBGCLK_PD 1 -#define CLK_INFRA_TRNG_PD 2 -#define CLK_INFRA_DEVAPC_PD 3 -#define CLK_INFRA_APXGPT_PD 4 -#define CLK_INFRA_SEJ_PD 5 -#define CLK_INFRA_NR_CLK 6 - -/* PERICFG */ -#define CLK_PERIBUS_SEL 0 -#define CLK_PERI_PWM1_PD 1 -#define CLK_PERI_PWM2_PD 2 -#define CLK_PERI_PWM3_PD 3 -#define CLK_PERI_PWM4_PD 4 -#define CLK_PERI_PWM5_PD 5 -#define CLK_PERI_PWM6_PD 6 -#define CLK_PERI_PWM7_PD 7 -#define CLK_PERI_PWM_PD 8 -#define CLK_PERI_AP_DMA_PD 9 -#define CLK_PERI_MSDC30_1_PD 10 -#define CLK_PERI_UART0_PD 11 -#define CLK_PERI_UART1_PD 12 -#define CLK_PERI_UART2_PD 13 -#define CLK_PERI_UART3_PD 14 -#define CLK_PERI_BTIF_PD 15 -#define CLK_PERI_I2C0_PD 16 -#define CLK_PERI_SPI0_PD 17 -#define CLK_PERI_SNFI_PD 18 -#define CLK_PERI_NFI_PD 19 -#define CLK_PERI_NFIECC_PD 20 -#define CLK_PERI_FLASH_PD 21 -#define CLK_PERI_NR_CLK 22 - -/* APMIXEDSYS */ -#define CLK_APMIXED_ARMPLL 0 -#define CLK_APMIXED_MAINPLL 1 -#define CLK_APMIXED_UNIV2PLL 2 -#define CLK_APMIXED_ETH1PLL 3 -#define CLK_APMIXED_ETH2PLL 4 -#define CLK_APMIXED_SGMIPLL 5 -#define CLK_APMIXED_NR_CLK 6 - -/* SSUSBSYS */ -#define CLK_SSUSB_U2_PHY_1P_EN 0 -#define CLK_SSUSB_U2_PHY_EN 1 -#define CLK_SSUSB_REF_EN 2 -#define CLK_SSUSB_SYS_EN 3 -#define CLK_SSUSB_MCU_EN 4 -#define CLK_SSUSB_DMA_EN 5 -#define CLK_SSUSB_NR_CLK 6 - -/* PCIESYS */ -#define CLK_PCIE_P1_AUX_EN 0 -#define CLK_PCIE_P1_OBFF_EN 1 -#define CLK_PCIE_P1_AHB_EN 2 -#define CLK_PCIE_P1_AXI_EN 3 -#define CLK_PCIE_P1_MAC_EN 4 -#define CLK_PCIE_P1_PIPE_EN 5 -#define CLK_PCIE_P0_AUX_EN 6 -#define CLK_PCIE_P0_OBFF_EN 7 -#define CLK_PCIE_P0_AHB_EN 8 -#define CLK_PCIE_P0_AXI_EN 9 -#define CLK_PCIE_P0_MAC_EN 10 -#define CLK_PCIE_P0_PIPE_EN 11 -#define CLK_PCIE_NR_CLK 12 - -/* ETHSYS */ -#define CLK_ETH_FE_EN 0 -#define CLK_ETH_GP2_EN 1 -#define CLK_ETH_GP1_EN 2 -#define CLK_ETH_GP0_EN 3 -#define CLK_ETH_ESW_EN 4 -#define CLK_ETH_NR_CLK 5 - -/* SGMIISYS */ -#define CLK_SGMII_TX_EN 0 -#define CLK_SGMII_RX_EN 1 -#define CLK_SGMII_CDR_REF 2 -#define CLK_SGMII_CDR_FB 3 -#define CLK_SGMII_NR_CLK 4 - -#endif /* _DT_BINDINGS_CLK_MT7629_H */ diff --git a/include/dt-bindings/clock/rk3066a-cru.h b/include/dt-bindings/clock/rk3066a-cru.h deleted file mode 100644 index 014eec58668..00000000000 --- a/include/dt-bindings/clock/rk3066a-cru.h +++ /dev/null @@ -1,31 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (c) 2014 MundoReader S.L. - * Author: Heiko Stuebner <heiko@sntech.de> - */ - -#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3066A_H -#define _DT_BINDINGS_CLK_ROCKCHIP_RK3066A_H - -#include <dt-bindings/clock/rk3188-cru-common.h> - -/* soft-reset indices */ -#define SRST_SRST1 0 -#define SRST_SRST2 1 - -#define SRST_L2MEM 18 -#define SRST_I2S0 23 -#define SRST_I2S1 24 -#define SRST_I2S2 25 -#define SRST_TIMER2 29 - -#define SRST_GPIO4 36 -#define SRST_GPIO6 38 - -#define SRST_TSADC 92 - -#define SRST_HDMI 96 -#define SRST_HDMI_APB 97 -#define SRST_CIF1 111 - -#endif diff --git a/include/dt-bindings/clock/rk3188-cru-common.h b/include/dt-bindings/clock/rk3188-cru-common.h deleted file mode 100644 index afad90680fc..00000000000 --- a/include/dt-bindings/clock/rk3188-cru-common.h +++ /dev/null @@ -1,261 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Copyright (c) 2014 MundoReader S.L. - * Author: Heiko Stuebner <heiko@sntech.de> - */ - -#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3188_COMMON_H -#define _DT_BINDINGS_CLK_ROCKCHIP_RK3188_COMMON_H - -/* core clocks from */ -#define PLL_APLL 1 -#define PLL_DPLL 2 -#define PLL_CPLL 3 -#define PLL_GPLL 4 -#define CORE_PERI 5 -#define CORE_L2C 6 -#define ARMCLK 7 - -/* sclk gates (special clocks) */ -#define SCLK_UART0 64 -#define SCLK_UART1 65 -#define SCLK_UART2 66 -#define SCLK_UART3 67 -#define SCLK_MAC 68 -#define SCLK_SPI0 69 -#define SCLK_SPI1 70 -#define SCLK_SARADC 71 -#define SCLK_SDMMC 72 -#define SCLK_SDIO 73 -#define SCLK_EMMC 74 -#define SCLK_I2S0 75 -#define SCLK_I2S1 76 -#define SCLK_I2S2 77 -#define SCLK_SPDIF 78 -#define SCLK_CIF0 79 -#define SCLK_CIF1 80 -#define SCLK_OTGPHY0 81 -#define SCLK_OTGPHY1 82 -#define SCLK_HSADC 83 -#define SCLK_TIMER0 84 -#define SCLK_TIMER1 85 -#define SCLK_TIMER2 86 -#define SCLK_TIMER3 87 -#define SCLK_TIMER4 88 -#define SCLK_TIMER5 89 -#define SCLK_TIMER6 90 -#define SCLK_JTAG 91 -#define SCLK_SMC 92 -#define SCLK_TSADC 93 - -#define DCLK_LCDC0 190 -#define DCLK_LCDC1 191 - -/* aclk gates */ -#define ACLK_DMA1 192 -#define ACLK_DMA2 193 -#define ACLK_GPS 194 -#define ACLK_LCDC0 195 -#define ACLK_LCDC1 196 -#define ACLK_GPU 197 -#define ACLK_SMC 198 -#define ACLK_CIF1 199 -#define ACLK_IPP 200 -#define ACLK_RGA 201 -#define ACLK_CIF0 202 -#define ACLK_CPU 203 -#define ACLK_PERI 204 -#define ACLK_VEPU 205 -#define ACLK_VDPU 206 - -/* pclk gates */ -#define PCLK_GRF 320 -#define PCLK_PMU 321 -#define PCLK_TIMER0 322 -#define PCLK_TIMER1 323 -#define PCLK_TIMER2 324 -#define PCLK_TIMER3 325 -#define PCLK_PWM01 326 -#define PCLK_PWM23 327 -#define PCLK_SPI0 328 -#define PCLK_SPI1 329 -#define PCLK_SARADC 330 -#define PCLK_WDT 331 -#define PCLK_UART0 332 -#define PCLK_UART1 333 -#define PCLK_UART2 334 -#define PCLK_UART3 335 -#define PCLK_I2C0 336 -#define PCLK_I2C1 337 -#define PCLK_I2C2 338 -#define PCLK_I2C3 339 -#define PCLK_I2C4 340 -#define PCLK_GPIO0 341 -#define PCLK_GPIO1 342 -#define PCLK_GPIO2 343 -#define PCLK_GPIO3 344 -#define PCLK_GPIO4 345 -#define PCLK_GPIO6 346 -#define PCLK_EFUSE 347 -#define PCLK_TZPC 348 -#define PCLK_TSADC 349 -#define PCLK_CPU 350 -#define PCLK_PERI 351 -#define PCLK_DDRUPCTL 352 -#define PCLK_PUBL 353 - -/* hclk gates */ -#define HCLK_SDMMC 448 -#define HCLK_SDIO 449 -#define HCLK_EMMC 450 -#define HCLK_OTG0 451 -#define HCLK_EMAC 452 -#define HCLK_SPDIF 453 -#define HCLK_I2S0 454 -#define HCLK_I2S1 455 -#define HCLK_I2S2 456 -#define HCLK_OTG1 457 -#define HCLK_HSIC 458 -#define HCLK_HSADC 459 -#define HCLK_PIDF 460 -#define HCLK_LCDC0 461 -#define HCLK_LCDC1 462 -#define HCLK_ROM 463 -#define HCLK_CIF0 464 -#define HCLK_IPP 465 -#define HCLK_RGA 466 -#define HCLK_NANDC0 467 -#define HCLK_CPU 468 -#define HCLK_PERI 469 -#define HCLK_CIF1 470 -#define HCLK_VEPU 471 -#define HCLK_VDPU 472 -#define HCLK_HDMI 473 - -#define CLK_NR_CLKS (HCLK_HDMI + 1) - -/* soft-reset indices */ -#define SRST_MCORE 2 -#define SRST_CORE0 3 -#define SRST_CORE1 4 -#define SRST_MCORE_DBG 7 -#define SRST_CORE0_DBG 8 -#define SRST_CORE1_DBG 9 -#define SRST_CORE0_WDT 12 -#define SRST_CORE1_WDT 13 -#define SRST_STRC_SYS 14 -#define SRST_L2C 15 - -#define SRST_CPU_AHB 17 -#define SRST_AHB2APB 19 -#define SRST_DMA1 20 -#define SRST_INTMEM 21 -#define SRST_ROM 22 -#define SRST_SPDIF 26 -#define SRST_TIMER0 27 -#define SRST_TIMER1 28 -#define SRST_EFUSE 30 - -#define SRST_GPIO0 32 -#define SRST_GPIO1 33 -#define SRST_GPIO2 34 -#define SRST_GPIO3 35 - -#define SRST_UART0 39 -#define SRST_UART1 40 -#define SRST_UART2 41 -#define SRST_UART3 42 -#define SRST_I2C0 43 -#define SRST_I2C1 44 -#define SRST_I2C2 45 -#define SRST_I2C3 46 -#define SRST_I2C4 47 - -#define SRST_PWM0 48 -#define SRST_PWM1 49 -#define SRST_DAP_PO 50 -#define SRST_DAP 51 -#define SRST_DAP_SYS 52 -#define SRST_TPIU_ATB 53 -#define SRST_PMU_APB 54 -#define SRST_GRF 55 -#define SRST_PMU 56 -#define SRST_PERI_AXI 57 -#define SRST_PERI_AHB 58 -#define SRST_PERI_APB 59 -#define SRST_PERI_NIU 60 -#define SRST_CPU_PERI 61 -#define SRST_EMEM_PERI 62 -#define SRST_USB_PERI 63 - -#define SRST_DMA2 64 -#define SRST_SMC 65 -#define SRST_MAC 66 -#define SRST_NANC0 68 -#define SRST_USBOTG0 69 -#define SRST_USBPHY0 70 -#define SRST_OTGC0 71 -#define SRST_USBOTG1 72 -#define SRST_USBPHY1 73 -#define SRST_OTGC1 74 -#define SRST_HSADC 76 -#define SRST_PIDFILTER 77 -#define SRST_DDR_MSCH 79 - -#define SRST_TZPC 80 -#define SRST_SDMMC 81 -#define SRST_SDIO 82 -#define SRST_EMMC 83 -#define SRST_SPI0 84 -#define SRST_SPI1 85 -#define SRST_WDT 86 -#define SRST_SARADC 87 -#define SRST_DDRPHY 88 -#define SRST_DDRPHY_APB 89 -#define SRST_DDRCTL 90 -#define SRST_DDRCTL_APB 91 -#define SRST_DDRPUB 93 - -#define SRST_VIO0_AXI 98 -#define SRST_VIO0_AHB 99 -#define SRST_LCDC0_AXI 100 -#define SRST_LCDC0_AHB 101 -#define SRST_LCDC0_DCLK 102 -#define SRST_LCDC1_AXI 103 -#define SRST_LCDC1_AHB 104 -#define SRST_LCDC1_DCLK 105 -#define SRST_IPP_AXI 106 -#define SRST_IPP_AHB 107 -#define SRST_RGA_AXI 108 -#define SRST_RGA_AHB 109 -#define SRST_CIF0 110 - -#define SRST_VCODEC_AXI 112 -#define SRST_VCODEC_AHB 113 -#define SRST_VIO1_AXI 114 -#define SRST_VCODEC_CPU 115 -#define SRST_VCODEC_NIU 116 -#define SRST_GPU 120 -#define SRST_GPU_NIU 122 -#define SRST_TFUN_ATB 125 -#define SRST_TFUN_APB 126 -#define SRST_CTI4_APB 127 - -#define SRST_TPIU_APB 128 -#define SRST_TRACE 129 -#define SRST_CORE_DBG 130 -#define SRST_DBG_APB 131 -#define SRST_CTI0 132 -#define SRST_CTI0_APB 133 -#define SRST_CTI1 134 -#define SRST_CTI1_APB 135 -#define SRST_PTM_CORE0 136 -#define SRST_PTM_CORE1 137 -#define SRST_PTM0 138 -#define SRST_PTM0_ATB 139 -#define SRST_PTM1 140 -#define SRST_PTM1_ATB 141 -#define SRST_CTM 142 -#define SRST_TS 143 - -#endif diff --git a/include/dt-bindings/clock/rk3188-cru.h b/include/dt-bindings/clock/rk3188-cru.h deleted file mode 100644 index 1da306e1788..00000000000 --- a/include/dt-bindings/clock/rk3188-cru.h +++ /dev/null @@ -1,47 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (c) 2014 MundoReader S.L. - * Author: Heiko Stuebner <heiko@sntech.de> - */ - -#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3188_H -#define _DT_BINDINGS_CLK_ROCKCHIP_RK3188_H - -#include <dt-bindings/clock/rk3188-cru-common.h> - -/* soft-reset indices */ -#define SRST_PTM_CORE2 0 -#define SRST_PTM_CORE3 1 -#define SRST_CORE2 5 -#define SRST_CORE3 6 -#define SRST_CORE2_DBG 10 -#define SRST_CORE3_DBG 11 - -#define SRST_TIMER2 16 -#define SRST_TIMER4 23 -#define SRST_I2S0 24 -#define SRST_TIMER5 25 -#define SRST_TIMER3 29 -#define SRST_TIMER6 31 - -#define SRST_PTM3 36 -#define SRST_PTM3_ATB 37 - -#define SRST_GPS 67 -#define SRST_HSICPHY 75 -#define SRST_TIMER 78 - -#define SRST_PTM2 92 -#define SRST_CORE2_WDT 94 -#define SRST_CORE3_WDT 95 - -#define SRST_PTM2_ATB 111 - -#define SRST_HSIC 117 -#define SRST_CTI2 118 -#define SRST_CTI2_APB 119 -#define SRST_GPU_BRIDGE 121 -#define SRST_CTI3 123 -#define SRST_CTI3_APB 124 - -#endif diff --git a/include/dt-bindings/power/rk3066-power.h b/include/dt-bindings/power/rk3066-power.h deleted file mode 100644 index acf9f310ac5..00000000000 --- a/include/dt-bindings/power/rk3066-power.h +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __DT_BINDINGS_POWER_RK3066_POWER_H__ -#define __DT_BINDINGS_POWER_RK3066_POWER_H__ - -/* VD_CORE */ -#define RK3066_PD_A9_0 0 -#define RK3066_PD_A9_1 1 -#define RK3066_PD_DBG 4 -#define RK3066_PD_SCU 5 - -/* VD_LOGIC */ -#define RK3066_PD_VIDEO 6 -#define RK3066_PD_VIO 7 -#define RK3066_PD_GPU 8 -#define RK3066_PD_PERI 9 -#define RK3066_PD_CPU 10 -#define RK3066_PD_ALIVE 11 - -/* VD_PMU */ -#define RK3066_PD_RTC 12 - -#endif diff --git a/include/dt-bindings/power/rk3188-power.h b/include/dt-bindings/power/rk3188-power.h deleted file mode 100644 index 93d23dfba33..00000000000 --- a/include/dt-bindings/power/rk3188-power.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __DT_BINDINGS_POWER_RK3188_POWER_H__ -#define __DT_BINDINGS_POWER_RK3188_POWER_H__ - -/* VD_CORE */ -#define RK3188_PD_A9_0 0 -#define RK3188_PD_A9_1 1 -#define RK3188_PD_A9_2 2 -#define RK3188_PD_A9_3 3 -#define RK3188_PD_DBG 4 -#define RK3188_PD_SCU 5 - -/* VD_LOGIC */ -#define RK3188_PD_VIDEO 6 -#define RK3188_PD_VIO 7 -#define RK3188_PD_GPU 8 -#define RK3188_PD_PERI 9 -#define RK3188_PD_CPU 10 -#define RK3188_PD_ALIVE 11 - -/* VD_PMU */ -#define RK3188_PD_RTC 12 - -#endif diff --git a/include/dt-bindings/power/rk3288-power.h b/include/dt-bindings/power/rk3288-power.h deleted file mode 100644 index f710b56ccd8..00000000000 --- a/include/dt-bindings/power/rk3288-power.h +++ /dev/null @@ -1,32 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __DT_BINDINGS_POWER_RK3288_POWER_H__ -#define __DT_BINDINGS_POWER_RK3288_POWER_H__ - -/** - * RK3288 Power Domain and Voltage Domain Summary. - */ - -/* VD_CORE */ -#define RK3288_PD_A17_0 0 -#define RK3288_PD_A17_1 1 -#define RK3288_PD_A17_2 2 -#define RK3288_PD_A17_3 3 -#define RK3288_PD_SCU 4 -#define RK3288_PD_DEBUG 5 -#define RK3288_PD_MEM 6 - -/* VD_LOGIC */ -#define RK3288_PD_BUS 7 -#define RK3288_PD_PERI 8 -#define RK3288_PD_VIO 9 -#define RK3288_PD_ALIVE 10 -#define RK3288_PD_HEVC 11 -#define RK3288_PD_VIDEO 12 - -/* VD_GPU */ -#define RK3288_PD_GPU 13 - -/* VD_PMU */ -#define RK3288_PD_PMU 14 - -#endif diff --git a/include/efi.h b/include/efi.h index d50b3d3cec9..d005cb6181e 100644 --- a/include/efi.h +++ b/include/efi.h @@ -266,6 +266,8 @@ enum efi_memory_type { #define EFI_MEMORY_RO ((u64)0x0000000000020000ULL) /* read-only */ #define EFI_MEMORY_SP ((u64)0x0000000000040000ULL) /* specific-purpose memory (SPM) */ #define EFI_MEMORY_CPU_CRYPTO ((u64)0x0000000000080000ULL) /* cryptographically protectable */ +#define EFI_MEMORY_HOT_PLUGGABLE \ + ((u64)0x0000000000100000ULL) /* hot pluggable */ #define EFI_MEMORY_RUNTIME ((u64)0x8000000000000000ULL) /* range requires runtime mapping */ #define EFI_MEM_DESC_VERSION 1 diff --git a/include/efi_api.h b/include/efi_api.h index 61c4eda8f8a..eb61eafa028 100644 --- a/include/efi_api.h +++ b/include/efi_api.h @@ -20,8 +20,10 @@ #include <charset.h> #include <pe.h> -/* UEFI spec version 2.9 */ -#define EFI_SPECIFICATION_VERSION (2 << 16 | 100) +/** + * define EFI_SPECIFICATION_VERSION - UEFI specification version + */ +#define EFI_SPECIFICATION_VERSION (2 << 16 | 110) /* Types and defines for EFI CreateEvent */ enum efi_timer_delay { @@ -227,7 +229,7 @@ enum efi_reset_type { 0x71, 0x94, 0x19, 0x9a, 0xd9, 0x2a) #define EFI_CONFORMANCE_PROFILES_TABLE_GUID \ - EFI_GUID(0x36122546, 0xf7ef, 0x4c8f, 0xbd, 0x9b, \ + EFI_GUID(0x36122546, 0xf7e7, 0x4c8f, 0xbd, 0x9b, \ 0xeb, 0x85, 0x25, 0xb5, 0x0c, 0x0b) #define EFI_CONFORMANCE_PROFILES_TABLE_VERSION 1 diff --git a/include/efi_loader.h b/include/efi_loader.h index 9afbec35ebf..0d858c1e12e 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -711,6 +711,11 @@ efi_status_t efi_search_protocol(const efi_handle_t handle, efi_status_t efi_add_protocol(const efi_handle_t handle, const efi_guid_t *protocol, void *protocol_interface); +/* Reinstall a protocol on a handle */ +efi_status_t EFIAPI efi_reinstall_protocol_interface( + efi_handle_t handle, + const efi_guid_t *protocol, + void *old_interface, void *new_interface); /* Open protocol */ efi_status_t efi_protocol_open(struct efi_handler *handler, void **protocol_interface, void *agent_handle, diff --git a/include/fdt_support.h b/include/fdt_support.h index 9447a64e060..f0ad2e6b365 100644 --- a/include/fdt_support.h +++ b/include/fdt_support.h @@ -14,11 +14,12 @@ #include <abuf.h> /** - * arch_fixup_fdt() - Write arch-specific information to fdt + * arch_fixup_fdt() - write arch-specific information to fdt + * + * @blob: FDT blob to write to * * Defined in arch/$(ARCH)/lib/bootm-fdt.c * - * @blob: FDT blob to write to * Return: 0 if ok, or -ve FDT_ERR_... on failure */ int arch_fixup_fdt(void *blob); @@ -33,27 +34,33 @@ u32 fdt_getprop_u32_default(const void *fdt, const char *path, const char *prop, const u32 dflt); /** - * Add data to the root of the FDT before booting the OS. + * fdt_root() - add data to the root of the FDT before booting the OS + * + * @fdt: FDT address in memory * * See doc/device-tree-bindings/root.txt * - * @param fdt FDT address in memory * Return: 0 if ok, or -FDT_ERR_... on error */ int fdt_root(void *fdt); /** - * Add chosen data the FDT before booting the OS. + * fdt_chosen() - add chosen data the FDT before booting the OS + * + * @fdt: FDT address in memory * * In particular, this adds the kernel command line (bootargs) to the FDT. * - * @param fdt FDT address in memory * Return: 0 if ok, or -FDT_ERR_... on error */ int fdt_chosen(void *fdt); /** - * Add initrd information to the FDT before booting the OS. + * fdt_initrd() - add initrd information to the FDT before booting the OS + * + * @fdt: Pointer to FDT in memory + * @initrd_start: Start of ramdisk + * @initrd_end: End of ramdisk * * Adds linux,initrd-start and linux,initrd-end properties to the /chosen node, * creating it if necessary. @@ -63,9 +70,6 @@ int fdt_chosen(void *fdt); * * If @initrd_start == @initrd_end this function does nothing and returns 0. * - * @fdt: Pointer to FDT in memory - * @initrd_start: Start of ramdisk - * @initrd_end: End of ramdisk * Return: 0 if ok, or -FDT_ERR_... on error */ int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end); @@ -93,29 +97,35 @@ void do_fixup_by_compat(void *fdt, const char *compat, void do_fixup_by_compat_u32(void *fdt, const char *compat, const char *prop, u32 val, int create); /** + * fdt_fixup_memory() - setup the memory node in the DT + * + * @blob: FDT blob to update + * @start: Begin of DRAM mapping in physical memory + * @size: Size of the single memory bank + * * Setup the memory node in the DT. Creates one if none was existing before. * Calls fdt_fixup_memory_banks() to populate a single reg pair covering the * whole memory. * - * @param blob FDT blob to update - * @param start Begin of DRAM mapping in physical memory - * @param size Size of the single memory bank * Return: 0 if ok, or -1 or -FDT_ERR_... on error */ int fdt_fixup_memory(void *blob, u64 start, u64 size); /** + * fdt_fixup_memory_banks() - fill the DT mem node with multiple memory banks + * + * @blob: FDT blob to update + * @start: Array of size <banks> to hold the start addresses. + * @size: Array of size <banks> to hold the size of each region. + * @banks: Number of memory banks to create. If 0, the reg property + * will be left untouched. + * * Fill the DT memory node with multiple memory banks. * Creates the node if none was existing before. * If banks is 0, it will not touch the existing reg property. This allows * boards to not mess with the existing DT setup, which may have been * filled in properly before. * - * @param blob FDT blob to update - * @param start Array of size <banks> to hold the start addresses. - * @param size Array of size <banks> to hold the size of each region. - * @param banks Number of memory banks to create. If 0, the reg - * property will be left untouched. * Return: 0 if ok, or -1 or -FDT_ERR_... on error */ #ifdef CONFIG_ARCH_FIXUP_FDT_MEMORY @@ -135,14 +145,17 @@ int fdt_find_and_setprop(void *fdt, const char *node, const char *prop, void fdt_fixup_qe_firmware(void *fdt); /** + * fdt_fixup_display() - update native-mode property of display-timings + * + * @blob: FDT blob to update + * @path: path within dt + * @display: name of display timing to match + * * Update native-mode property of display-timings node to the phandle * of the timings matching a display by name (case insensitive). * * see kernel Documentation/devicetree/bindings/video/display-timing.txt * - * @param blob FDT blob to update - * @param path path within dt - * @param display name of display timing to match * Return: 0 if ok, or -FDT_ERR_... on error */ int fdt_fixup_display(void *blob, const char *path, const char *display); @@ -160,18 +173,21 @@ static inline void fdt_fixup_crypto_node(void *blob, int sec_rev) {} #endif /** + * fdt_record_loadable() - record info about a loadable in /fit-images + * + * @blob: FDT blob to update + * @index: index of this loadable + * @name: name of the loadable + * @load_addr: address the loadable was loaded to + * @size: number of bytes loaded + * @entry_point: entry point (if specified, otherwise pass -1) + * @type: type (if specified, otherwise pass NULL) + * @os: os-type (if specified, otherwise pass NULL) + * @arch: architecture (if specified, otherwise pass NULL) + * * Record information about a processed loadable in /fit-images (creating * /fit-images if necessary). * - * @param blob FDT blob to update - * @param index index of this loadable - * @param name name of the loadable - * @param load_addr address the loadable was loaded to - * @param size number of bytes loaded - * @param entry_point entry point (if specified, otherwise pass -1) - * @param type type (if specified, otherwise pass NULL) - * @param os os-type (if specified, otherwise pass NULL) - * @param arch architecture (if specified, otherwise pass NULL) * Return: 0 if ok, or -1 or -FDT_ERR_... on error */ int fdt_record_loadable(void *blob, u32 index, const char *name, @@ -186,39 +202,43 @@ int fdt_pci_dma_ranges(void *blob, int phb_off, struct pci_controller *hose); int fdt_find_or_add_subnode(void *fdt, int parentoffset, const char *name); /** - * Add board-specific data to the FDT before booting the OS. + * ft_board_setup() - add board-specific data to the FDT before booting the OS + * + * @blob: FDT blob to update + * @bd: Pointer to board data * * Use CONFIG_SYS_FDT_PAD to ensure there is sufficient space. * This function is called if CONFIG_OF_BOARD_SETUP is defined * - * @param blob FDT blob to update - * @param bd Pointer to board data * Return: 0 if ok, or -FDT_ERR_... on error */ int ft_board_setup(void *blob, struct bd_info *bd); /** - * board_rng_seed() - Provide a seed to be passed via /chosen/rng-seed + * board_rng_seed() - provide a seed to be passed via /chosen/rng-seed + * + * @buf: a struct abuf for returning the seed and its size. * * This function is called if CONFIG_BOARD_RNG_SEED is set, and must * be provided by the board. It should return, via @buf, some suitable * seed value to pass to the kernel. Seed size could be set in a decimal * environment variable rng_seed_size and it defaults to 64 bytes. * - * @param buf A struct abuf for returning the seed and its size. - * @return 0 if ok, negative on error. + * Return: 0 if ok, negative on error. */ int board_rng_seed(struct abuf *buf); /** - * board_fdt_chosen_bootargs() - Arbitrarily amend fdt kernel command line + * board_fdt_chosen_bootargs() - arbitrarily amend fdt kernel command line + * + * @fdt_ba: FDT /chosen/bootargs property from the kernel image if available * * This is used for late modification of kernel command line arguments just * before they are added into the /chosen node in flat device tree. * - * @return: pointer to kernel command line arguments in memory + * Return: pointer to kernel command line arguments in memory */ -char *board_fdt_chosen_bootargs(void); +const char *board_fdt_chosen_bootargs(const struct fdt_property *fdt_ba); /* * The keystone2 SOC requires all 32 bit aliased addresses to be converted @@ -229,13 +249,14 @@ char *board_fdt_chosen_bootargs(void); void ft_board_setup_ex(void *blob, struct bd_info *bd); /** - * Add system-specific data to the FDT before booting the OS. + * ft_system_setup() - add system-specific data to the FDT before booting the OS + * + * @blob: FDT blob to update + * @bd: pointer to board data * * Use CONFIG_SYS_FDT_PAD to ensure there is sufficient space. * This function is called if CONFIG_OF_SYSTEM_SETUP is defined * - * @param blob FDT blob to update - * @param bd Pointer to board data * Return: 0 if ok, or -FDT_ERR_... on error */ int ft_system_setup(void *blob, struct bd_info *bd); @@ -245,6 +266,9 @@ void set_working_fdt_addr(ulong addr); /** * fdt_shrink_to_minimum() - shrink FDT while allowing for some margin * + * @blob: FDT blob to update + * @extrasize: additional bytes needed + * * Shrink down the given blob to 'minimum' size + some extrasize. * * The new size is enough to hold the existing contents plus @extrasize bytes, @@ -254,8 +278,6 @@ void set_working_fdt_addr(ulong addr); * If there is an existing memory reservation for @blob in the FDT, it is * updated for the new size. * - * @param blob FDT blob to update - * @param extrasize additional bytes needed * Return: 0 if ok, or -FDT_ERR_... on error */ int fdt_shrink_to_minimum(void *blob, uint extrasize); @@ -277,9 +299,12 @@ static inline void fdt_fixup_mtdparts(void *fdt, #endif /** - * copy the fixed-partition nodes from U-Boot device tree to external blob + * fdt_copy_fixed_partitions() - copy the fixed-partition nodes + * + * @blob: FDT blob to update + * + * Copy the fixed-partition nodes from U-Boot device tree to external blob * - * @param blob FDT blob to update * Return: 0 if ok, or non-zero on error */ int fdt_copy_fixed_partitions(void *blob); @@ -287,39 +312,45 @@ int fdt_copy_fixed_partitions(void *blob); void fdt_del_node_and_alias(void *blob, const char *alias); /** - * Translate an address from the DT into a CPU physical address + * fdt_translate_address() - translate an addr from the DT into a CPU phys addr + * + * @blob: pointer to device tree blob + * @node_offset: node DT offset + * @in_addr: pointer to the address to translate * * The translation relies on the "ranges" property. * - * @param blob Pointer to device tree blob - * @param node_offset Node DT offset - * @param in_addr Pointer to the address to translate * Return: translated address or OF_BAD_ADDR on error */ u64 fdt_translate_address(const void *blob, int node_offset, const __be32 *in_addr); /** - * Translate a DMA address from the DT into a CPU physical address + * fdt_translate_dma_address() - translate a DMA address to a CPU phys address + * + * @blob: pointer to device tree blob + * @node_offset: node DT offset + * @in_addr: pointer to the DMA address to translate * + * Translate a DMA address from the DT into a CPU physical address. * The translation relies on the "dma-ranges" property. * - * @param blob Pointer to device tree blob - * @param node_offset Node DT offset - * @param in_addr Pointer to the DMA address to translate * Return: translated DMA address or OF_BAD_ADDR on error */ u64 fdt_translate_dma_address(const void *blob, int node_offset, const __be32 *in_addr); /** + * fdt_get_dma_range() - get DMA ranges to perform bus/cpu translations + * + * @blob: pointer to device tree blob + * @node_offset: node DT offset + * @cpu: pointer to variable storing the range's cpu address + * @bus: pointer to variable storing the range's bus address + * @size: pointer to variable storing the range's size + * * Get DMA ranges for a specifc node, this is useful to perform bus->cpu and * cpu->bus address translations * - * @param blob Pointer to device tree blob - * @param node_offset Node DT offset - * @param cpu Pointer to variable storing the range's cpu address - * @param bus Pointer to variable storing the range's bus address - * @param size Pointer to variable storing the range's size * Return: translated DMA address or OF_BAD_ADDR on error */ int fdt_get_dma_range(const void *blob, int node_offset, phys_addr_t *cpu, @@ -431,12 +462,12 @@ int fdt_overlay_apply_verbose(void *fdt, void *fdto); int fdt_valid(struct fdt_header **blobp); /** - * fdt_get_cells_len() - Get the length of a type of cell in top-level nodes + * fdt_get_cells_len() - get the length of a type of cell in top-level nodes * - * Returns the length of the cell type in bytes (4 or 8). + * @blob: pointer to device tree blob + * @nr_cells_name: name to lookup, e.g. "#address-cells" * - * @blob: Pointer to device tree blob - * @nr_cells_name: Name to lookup, e.g. "#address-cells" + * Return: the length of the cell type in bytes (4 or 8). */ int fdt_get_cells_len(const void *blob, char *nr_cells_name); @@ -446,11 +477,12 @@ int fdt_get_cells_len(const void *blob, char *nr_cells_name); int fdtdec_get_int(const void *blob, int node, const char *prop_name, int default_val); -/* - * Count child nodes of one parent node. +/** + * fdtdec_get_child_count() - count child nodes of one parent node + * + * @blob: FDT blob + * @node: parent node * - * @param blob FDT blob - * @param node parent node * Return: number of child node; 0 if there is not child node */ int fdtdec_get_child_count(const void *blob, int node); @@ -468,9 +500,10 @@ void fdt_fixup_pstore(void *blob); /** * fdt_kaslrseed() - create a 'kaslr-seed' node in chosen * - * @blob: fdt blob - * @overwrite: do not overwrite existing non-zero node unless true - * Return: 0 if OK, -ve on error + * @blob: fdt blob + * @overwrite: do not overwrite existing non-zero node unless true + * + * Return: 0 if OK, -ve on error */ int fdt_kaslrseed(void *blob, bool overwrite); diff --git a/include/image.h b/include/image.h index 0a61dfd556c..8a9f779d3ff 100644 --- a/include/image.h +++ b/include/image.h @@ -1160,16 +1160,16 @@ int fit_image_get_type(const void *fit, int noffset, uint8_t *type); int fit_image_get_comp(const void *fit, int noffset, uint8_t *comp); int fit_image_get_load(const void *fit, int noffset, ulong *load); int fit_image_get_entry(const void *fit, int noffset, ulong *entry); -int fit_image_get_data(const void *fit, int noffset, - const void **data, size_t *size); +int fit_image_get_emb_data(const void *fit, int noffset, const void **data, + size_t *size); int fit_image_get_data_offset(const void *fit, int noffset, int *data_offset); int fit_image_get_data_position(const void *fit, int noffset, int *data_position); int fit_image_get_data_size(const void *fit, int noffset, int *data_size); int fit_image_get_data_size_unciphered(const void *fit, int noffset, size_t *data_size); -int fit_image_get_data_and_size(const void *fit, int noffset, - const void **data, size_t *size); +int fit_image_get_data(const void *fit, int noffset, const void **data, + size_t *size); /** * fit_image_get_phase() - Get the phase from a FIT image diff --git a/include/net-common.h b/include/net-common.h index 8fc1bac47f5..29d31f37263 100644 --- a/include/net-common.h +++ b/include/net-common.h @@ -427,7 +427,7 @@ void string_to_enetaddr(const char *addr, uint8_t *enetaddr); struct in_addr string_to_ip(const char *s); /** - * ip_to_string() - Convert a string to ip address + * ip_to_string() - Convert an IPv4 address to a string * * Implemented in lib/net_utils.c (built unconditionally) * diff --git a/include/pci.h b/include/pci.h index 5fea815b48c..4b0facd6dcf 100644 --- a/include/pci.h +++ b/include/pci.h @@ -390,6 +390,9 @@ #define PCI_EXP_LNKCAP_SLS_5_0GB 0x00000002 /* LNKCAP2 SLS Vector bit 1 */ #define PCI_EXP_LNKCAP_SLS_8_0GB 0x00000003 /* LNKCAP2 SLS Vector bit 2 */ #define PCI_EXP_LNKCAP_MLW 0x000003f0 /* Maximum Link Width */ +#define PCI_EXP_LNKCAP_ASPMS 0x00000c00 /* ASPM Support */ +#define PCI_EXP_LNKCAP_ASPM_L0S 0x00000400 /* ASPM L0s Support */ +#define PCI_EXP_LNKCAP_ASPM_L1 0x00000800 /* ASPM L1 Support */ #define PCI_EXP_LNKCAP_DLLLARC 0x00100000 /* Data Link Layer Link Active Reporting Capable */ #define PCI_EXP_LNKCTL 16 /* Link Control */ #define PCI_EXP_LNKCTL_RL 0x0020 /* Retrain Link */ @@ -404,6 +407,7 @@ #define PCI_EXP_LNKSTA_DLLLA 0x2000 /* Data Link Layer Link Active */ #define PCI_EXP_LNKSTA_LBMS 0x4000 /* Link Bandwidth Management Status */ #define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ +#define PCI_EXP_SLTCAP_HPC 0x00000040 /* Hot-Plug Capable */ #define PCI_EXP_SLTCAP_PSN 0xfff80000 /* Physical Slot Number */ #define PCI_EXP_RTCTL 28 /* Root Control */ #define PCI_EXP_RTCTL_CRSSVE 0x0010 /* CRS Software Visibility Enable */ diff --git a/include/power/tps65219.h b/include/power/tps65219.h index aa81b92266f..e8780af2d81 100644 --- a/include/power/tps65219.h +++ b/include/power/tps65219.h @@ -17,10 +17,20 @@ #define TPS65219_BUCK_DRIVER "tps65219_buck" #define TPS65219_VOLT_MASK 0x3F -#define TPS65219_BUCK_VOLT_MAX 3400000 - #define TPS65219_ENABLE_CTRL_REG 0x2 +#define TPS65219_VOLT_STEP_25MV 25000 +#define TPS65219_VOLT_STEP_50MV 50000 +#define TPS65219_VOLT_STEP_100MV 100000 + +#define TPS65219_BUCK_0V6 600000 +#define TPS65219_BUCK_1V4 1400000 +#define TPS65219_BUCK_3V4 3400000 + +#define TPS65219_BUCK_REG_0V6 0x00 +#define TPS65219_BUCK_REG_1V4 0x20 +#define TPS65219_BUCK_REG_3V4 0x34 + #define TPS65219_BUCK1_VOUT_REG 0xa #define TPS65219_BUCK2_VOUT_REG 0x9 #define TPS65219_BUCK3_VOUT_REG 0x8 diff --git a/include/pxe_utils.h b/include/pxe_utils.h index 68ac40b64ad..0378f2889f7 100644 --- a/include/pxe_utils.h +++ b/include/pxe_utils.h @@ -3,6 +3,7 @@ #ifndef __PXE_UTILS_H #define __PXE_UTILS_H +#include <bootflow.h> #include <linux/list.h> /* @@ -82,8 +83,19 @@ struct pxe_menu { }; struct pxe_context; + +/** + * Read a file + * + * @ctx: PXE context + * @file_path: Full path to filename to read + * @file_addr: String containing the to which to read the file + * @type: File type + * @fileszeip: Returns file size + */ typedef int (*pxe_getfile_func)(struct pxe_context *ctx, const char *file_path, - char *file_addr, ulong *filesizep); + char *file_addr, enum bootflow_img_t type, + ulong *filesizep); /** * struct pxe_context - context information for PXE parsing diff --git a/include/smbios.h b/include/smbios.h index 00119d7a60c..b5fed57aba2 100644 --- a/include/smbios.h +++ b/include/smbios.h @@ -9,6 +9,7 @@ #define _SMBIOS_H_ #include <linux/types.h> +#include <smbios_def.h> /* SMBIOS spec version implemented */ #define SMBIOS_MAJOR_VER 3 @@ -37,6 +38,11 @@ enum { #define SMBIOS_INTERMEDIATE_OFFSET 16 #define SMBIOS_STRUCT_EOS_BYTES 2 +struct str_lookup_table { + u16 idx; + const char *str; +}; + struct __packed smbios_entry { u8 anchor[4]; u8 checksum; @@ -80,19 +86,14 @@ struct __packed smbios3_entry { u64 struct_table_address; }; -/* BIOS characteristics */ -#define BIOS_CHARACTERISTICS_PCI_SUPPORTED (1 << 7) -#define BIOS_CHARACTERISTICS_UPGRADEABLE (1 << 11) -#define BIOS_CHARACTERISTICS_SELECTABLE_BOOT (1 << 16) - -#define BIOS_CHARACTERISTICS_EXT1_ACPI (1 << 0) -#define BIOS_CHARACTERISTICS_EXT2_UEFI (1 << 3) -#define BIOS_CHARACTERISTICS_EXT2_TARGET (1 << 2) - -struct __packed smbios_type0 { +struct __packed smbios_header { u8 type; u8 length; u16 handle; +}; + +struct __packed smbios_type0 { + struct smbios_header hdr; u8 vendor; u8 bios_ver; u16 bios_start_segment; @@ -109,37 +110,12 @@ struct __packed smbios_type0 { char eos[SMBIOS_STRUCT_EOS_BYTES]; }; -/** - * enum smbios_wakeup_type - wake-up type - * - * These constants are used for the Wake-Up Type field in the SMBIOS - * System Information (Type 1) structure. - */ -enum smbios_wakeup_type { - /** @SMBIOS_WAKEUP_TYPE_RESERVED: Reserved */ - SMBIOS_WAKEUP_TYPE_RESERVED, - /** @SMBIOS_WAKEUP_TYPE_OTHER: Other */ - SMBIOS_WAKEUP_TYPE_OTHER, - /** @SMBIOS_WAKEUP_TYPE_UNKNOWN: Unknown */ - SMBIOS_WAKEUP_TYPE_UNKNOWN, - /** @SMBIOS_WAKEUP_TYPE_APM_TIMER: APM Timer */ - SMBIOS_WAKEUP_TYPE_APM_TIMER, - /** @SMBIOS_WAKEUP_TYPE_MODEM_RING: Modem Ring */ - SMBIOS_WAKEUP_TYPE_MODEM_RING, - /** @SMBIOS_WAKEUP_TYPE_LAN_REMOTE: LAN Remote */ - SMBIOS_WAKEUP_TYPE_LAN_REMOTE, - /** @SMBIOS_WAKEUP_TYPE_POWER_SWITCH: Power Switch */ - SMBIOS_WAKEUP_TYPE_POWER_SWITCH, - /** @SMBIOS_WAKEUP_TYPE_PCI_PME: PCI PME# */ - SMBIOS_WAKEUP_TYPE_PCI_PME, - /** @SMBIOS_WAKEUP_TYPE_AC_POWER_RESTORED: AC Power Restored */ - SMBIOS_WAKEUP_TYPE_AC_POWER_RESTORED, -}; +#define SMBIOS_TYPE1_LENGTH_V20 0x08 +#define SMBIOS_TYPE1_LENGTH_V21 0x19 +#define SMBIOS_TYPE1_LENGTH_V24 0x1b struct __packed smbios_type1 { - u8 type; - u8 length; - u16 handle; + struct smbios_header hdr; u8 manufacturer; u8 product_name; u8 version; @@ -151,13 +127,10 @@ struct __packed smbios_type1 { char eos[SMBIOS_STRUCT_EOS_BYTES]; }; -#define SMBIOS_BOARD_FEATURE_HOSTING (1 << 0) -#define SMBIOS_BOARD_MOTHERBOARD 10 +#define SMBIOS_TYPE2_CON_OBJ_HANDLE_SIZE sizeof(u16) struct __packed smbios_type2 { - u8 type; - u8 length; - u16 handle; + struct smbios_header hdr; u8 manufacturer; u8 product_name; u8 version; @@ -168,17 +141,15 @@ struct __packed smbios_type2 { u16 chassis_handle; u8 board_type; u8 number_contained_objects; + /* + * Dynamic bytes will be inserted here to store the objects. + * length is equal to 'number_contained_objects'. + */ char eos[SMBIOS_STRUCT_EOS_BYTES]; }; -#define SMBIOS_ENCLOSURE_DESKTOP 3 -#define SMBIOS_STATE_SAFE 3 -#define SMBIOS_SECURITY_NONE 3 - struct __packed smbios_type3 { - u8 type; - u8 length; - u16 handle; + struct smbios_header hdr; u8 manufacturer; u8 chassis_type; u8 version; @@ -193,21 +164,17 @@ struct __packed smbios_type3 { u8 number_of_power_cords; u8 element_count; u8 element_record_length; + /* + * Dynamic bytes will be inserted here to store the elements. + * length is equal to 'element_record_length' * 'element_record_length' + */ + u8 sku_number; char eos[SMBIOS_STRUCT_EOS_BYTES]; }; -#define SMBIOS_PROCESSOR_TYPE_CENTRAL 3 -#define SMBIOS_PROCESSOR_STATUS_ENABLED 1 -#define SMBIOS_PROCESSOR_UPGRADE_NONE 6 - -#define SMBIOS_PROCESSOR_FAMILY_OTHER 1 -#define SMBIOS_PROCESSOR_FAMILY_UNKNOWN 2 - struct __packed smbios_type4 { - u8 type; - u8 length; - u16 handle; - u8 socket_designation; + struct smbios_header hdr; + u8 socket_design; u8 processor_type; u8 processor_family; u8 processor_manufacturer; @@ -233,6 +200,67 @@ struct __packed smbios_type4 { u16 core_count2; u16 core_enabled2; u16 thread_count2; + u16 thread_enabled; + char eos[SMBIOS_STRUCT_EOS_BYTES]; +}; + +union cache_config { + struct { + u16 level:3; + u16 bsocketed:1; + u16 rsvd0:1; + u16 locate:2; + u16 benabled:1; + u16 opmode:2; + u16 rsvd1:6; + } fields; + u16 data; +}; + +union cache_size_word { + struct { + u16 size:15; + u16 granu:1; + } fields; + u16 data; +}; + +union cache_size_dword { + struct { + u32 size:31; + u32 granu:1; + } fields; + u32 data; +}; + +union cache_sram_type { + struct { + u16 other:1; + u16 unknown:1; + u16 nonburst:1; + u16 burst:1; + u16 plburst:1; + u16 sync:1; + u16 async:1; + u16 rsvd:9; + } fields; + u16 data; +}; + +struct __packed smbios_type7 { + struct smbios_header hdr; + u8 socket_design; + union cache_config config; + union cache_size_word max_size; + union cache_size_word inst_size; + union cache_sram_type supp_sram_type; + union cache_sram_type curr_sram_type; + u8 speed; + u8 err_corr_type; + u8 sys_cache_type; + u8 associativity; + union cache_size_dword max_size2; + union cache_size_dword inst_size2; char eos[SMBIOS_STRUCT_EOS_BYTES]; }; @@ -252,12 +280,6 @@ struct __packed smbios_type127 { char eos[SMBIOS_STRUCT_EOS_BYTES]; }; -struct __packed smbios_header { - u8 type; - u8 length; - u16 handle; -}; - /** * fill_smbios_header() - Fill the header of an SMBIOS table * diff --git a/include/smbios_def.h b/include/smbios_def.h new file mode 100644 index 00000000000..81c5781217f --- /dev/null +++ b/include/smbios_def.h @@ -0,0 +1,194 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2024 Linaro Limited + * Author: Raymond Mao <raymond.mao@linaro.org> + */ + +#ifndef _SMBIOS_DEF_H_ +#define _SMBIOS_DEF_H_ + +/* + * BIOS characteristics + */ + +#define BIOS_CHARACTERISTICS_PCI_SUPPORTED 0x80 /* BIT(7) */ +#define BIOS_CHARACTERISTICS_UPGRADEABLE 0x800 /* BIT(11) */ +#define BIOS_CHARACTERISTICS_SELECTABLE_BOOT 0x10000 /* BIT(16) */ + +#define BIOS_CHARACTERISTICS_EXT1_ACPI 1 /* BIT(0) */ +#define BIOS_CHARACTERISTICS_EXT2_UEFI 8 /* BIT(3) */ +#define BIOS_CHARACTERISTICS_EXT2_TARGET 4 /* BIT(2) */ + +/* + * System Information + */ + +#define SMBIOS_WAKEUP_TYPE_RESERVED 0 +#define SMBIOS_WAKEUP_TYPE_OTHER 1 +#define SMBIOS_WAKEUP_TYPE_UNKNOWN 2 +#define SMBIOS_WAKEUP_TYPE_APM_TIMER 3 +#define SMBIOS_WAKEUP_TYPE_MODEM_RING 4 +#define SMBIOS_WAKEUP_TYPE_LAN_REMOTE 5 +#define SMBIOS_WAKEUP_TYPE_POWER_SWITCH 6 +#define SMBIOS_WAKEUP_TYPE_PCI_PME 7 +#define SMBIOS_WAKEUP_TYPE_AC_POWER_RESTORED 8 + +/* + * Baseboard Information + */ + +#define SMBIOS_BOARD_FEAT_HOST_BOARD 1 /* BIT(0) */ +#define SMBIOS_BOARD_FEAT_REQ_AUX 2 /* BIT(1) */ +#define SMBIOS_BOARD_FEAT_REMOVABLE 4 /* BIT(2) */ +#define SMBIOS_BOARD_FEAT_REPLACEABLE 8 /* BIT(3) */ +#define SMBIOS_BOARD_FEAT_HOT_SWAPPABLE 16 /* BIT(4) */ + +#define SMBIOS_BOARD_TYPE_UNKNOWN 1 +#define SMBIOS_BOARD_TYPE_OTHER 2 +#define SMBIOS_BOARD_TYPE_SERVER_BLADE 3 +#define SMBIOS_BOARD_TYPE_CON_SWITCH 4 +#define SMBIOS_BOARD_TYPE_SM_MODULE 5 +#define SMBIOS_BOARD_TYPE_PROCESSOR_MODULE 6 +#define SMBIOS_BOARD_TYPE_IO_MODULE 7 +#define SMBIOS_BOARD_TYPE_MEM_MODULE 8 +#define SMBIOS_BOARD_TYPE_DAUGHTER_BOARD 9 +#define SMBIOS_BOARD_TYPE_MOTHERBOARD 10 +#define SMBIOS_BOARD_TYPE_PROC_MEM_MODULE 11 +#define SMBIOS_BOARD_TYPE_PROC_IO_MODULE 12 +#define SMBIOS_BOARD_TYPE_INTERCON 13 + +/* + * System Enclosure or Chassis + */ +#define SMBIOS_ENCLOSURE_UNKNOWN 2 +#define SMBIOS_ENCLOSURE_DESKTOP 3 + +#define SMBIOS_STATE_OTHER 1 +#define SMBIOS_STATE_UNKNOWN 2 +#define SMBIOS_STATE_SAFE 3 +#define SMBIOS_STATE_WARNING 4 +#define SMBIOS_STATE_CRITICAL 5 +#define SMBIOS_STATE_NONRECOVERABLE 6 + +#define SMBIOS_SECURITY_OTHER 1 +#define SMBIOS_SECURITY_UNKNOWN 2 +#define SMBIOS_SECURITY_NONE 3 +#define SMBIOS_SECURITY_EXTINT_LOCK 4 +#define SMBIOS_SECURITY_EXTINT_EN 5 + +#define SMBIOS_ENCLOSURE_OEM_UND 0 +#define SMBIOS_ENCLOSURE_HEIGHT_UND 0 +#define SMBIOS_POWCORD_NUM_UND 0 +#define SMBIOS_ELEMENT_TYPE_SELECT 0x80 /* BIT(7) */ + +/* + * Processor Information + */ + +#define SMBIOS_PROCESSOR_TYPE_OTHER 1 +#define SMBIOS_PROCESSOR_TYPE_UNKNOWN 2 +#define SMBIOS_PROCESSOR_TYPE_CENTRAL 3 +#define SMBIOS_PROCESSOR_TYPE_MATH 4 +#define SMBIOS_PROCESSOR_TYPE_DSP 5 +#define SMBIOS_PROCESSOR_TYPE_VIDEO 6 + +#define SMBIOS_PROCESSOR_STATUS_UNKNOWN 0 +#define SMBIOS_PROCESSOR_STATUS_ENABLED 1 +#define SMBIOS_PROCESSOR_STATUS_DISABLED_USER 2 +#define SMBIOS_PROCESSOR_STATUS_DISABLED_BIOS 3 +#define SMBIOS_PROCESSOR_STATUS_IDLE 4 +#define SMBIOS_PROCESSOR_STATUS_OTHER 7 + +#define SMBIOS_PROCESSOR_UPGRADE_OTHER 1 +#define SMBIOS_PROCESSOR_UPGRADE_UNKNOWN 2 +#define SMBIOS_PROCESSOR_UPGRADE_NONE 6 + +#define SMBIOS_PROCESSOR_FAMILY_OTHER 1 +#define SMBIOS_PROCESSOR_FAMILY_UNKNOWN 2 +#define SMBIOS_PROCESSOR_FAMILY_RSVD 255 +#define SMBIOS_PROCESSOR_FAMILY_ARMV7 256 +#define SMBIOS_PROCESSOR_FAMILY_ARMV8 257 +#define SMBIOS_PROCESSOR_FAMILY_RV32 512 +#define SMBIOS_PROCESSOR_FAMILY_RV64 513 + +#define SMBIOS_PROCESSOR_FAMILY_EXT 0xfe + +/* Processor Characteristics */ +#define SMBIOS_PROCESSOR_RSVD 1 /* BIT(0) */ +#define SMBIOS_PROCESSOR_UND 2 /* BIT(1) */ +#define SMBIOS_PROCESSOR_64BIT 4 /* BIT(2) */ +#define SMBIOS_PROCESSOR_MULTICORE 8 /* BIT(3) */ +#define SMBIOS_PROCESSOR_HWTHREAD 16 /* BIT(4) */ +#define SMBIOS_PROCESSOR_EXEC_PROT 32 /* BIT(5) */ +#define SMBIOS_PROCESSOR_ENH_VIRT 64 /* BIT(6) */ +#define SMBIOS_PROCESSOR_POW_CON 0x80 /* BIT(7) */ +#define SMBIOS_PROCESSOR_128BIT 0x100 /* BIT(8) */ +#define SMBIOS_PROCESSOR_ARM64_SOCID 0x200 /* BIT(9) */ + +/* + * Cache Information + */ + +#define SMBIOS_CACHE_SIZE_EXT_KB (2047 * 1024) /* 2047 MiB */ +#define SMBIOS_CACHE_HANDLE_NONE 0xffff + +/* System Cache Type */ +#define SMBIOS_CACHE_SYSCACHE_TYPE_OTHER 1 +#define SMBIOS_CACHE_SYSCACHE_TYPE_UNKNOWN 2 +#define SMBIOS_CACHE_SYSCACHE_TYPE_INST 3 +#define SMBIOS_CACHE_SYSCACHE_TYPE_DATA 4 +#define SMBIOS_CACHE_SYSCACHE_TYPE_UNIFIED 5 + +/* Cache Speed */ +#define SMBIOS_CACHE_SPEED_UNKNOWN 0 + +/* SRAM Type */ +#define SMBIOS_CACHE_SRAM_TYPE_UNKNOWN 2 /* BIT(1) */ + +/* Error Correction Type */ +#define SMBIOS_CACHE_ERRCORR_OTHER 1 +#define SMBIOS_CACHE_ERRCORR_UNKNOWN 2 +#define SMBIOS_CACHE_ERRCORR_NONE 3 +#define SMBIOS_CACHE_ERRCORR_PARITY 4 +#define SMBIOS_CACHE_ERRCORR_SBITECC 5 +#define SMBIOS_CACHE_ERRCORR_MBITECC 6 + +/* Cache Configuration */ +#define SMBIOS_CACHE_LEVEL_1 0 +#define SMBIOS_CACHE_LEVEL_2 1 +#define SMBIOS_CACHE_LEVEL_3 2 +#define SMBIOS_CACHE_LEVEL_4 3 +#define SMBIOS_CACHE_LEVEL_5 4 +#define SMBIOS_CACHE_LEVEL_6 5 +#define SMBIOS_CACHE_LEVEL_7 6 +#define SMBIOS_CACHE_LEVEL_8 7 +#define SMBIOS_CACHE_SOCKETED 8 /* BIT(3) */ +#define SMBIOS_CACHE_LOCATE_EXTERNAL 32 /* BIT(5) */ +#define SMBIOS_CACHE_LOCATE_RESERVED 64 /* BIT(6) */ +#define SMBIOS_CACHE_LOCATE_UNKNOWN 96 /* (BIT(5) | BIT(6)) */ +#define SMBIOS_CACHE_ENABLED 0x80 /* BIT(7) */ +#define SMBIOS_CACHE_OP_WB 0x100 /* BIT(8), Write Back */ +#define SMBIOS_CACHE_OP_VAR 0x200 /* BIT(9), Varies with Memory Address */ +#define SMBIOS_CACHE_OP_UND 0x300 /* (BIT(8) | BIT(9)), Unknown*/ + +/* Cache Granularity */ +#define SMBIOS_CACHE_GRANU_1K 0 +#define SMBIOS_CACHE_GRANU_64K 1 + +/* Cache Associativity */ +#define SMBIOS_CACHE_ASSOC_OTHER 1 +#define SMBIOS_CACHE_ASSOC_UNKNOWN 2 +#define SMBIOS_CACHE_ASSOC_DMAPPED 3 +#define SMBIOS_CACHE_ASSOC_2WAY 4 +#define SMBIOS_CACHE_ASSOC_4WAY 5 +#define SMBIOS_CACHE_ASSOC_FULLY 6 +#define SMBIOS_CACHE_ASSOC_8WAY 7 +#define SMBIOS_CACHE_ASSOC_16WAY 8 +#define SMBIOS_CACHE_ASSOC_12WAY 9 +#define SMBIOS_CACHE_ASSOC_24WAY 10 +#define SMBIOS_CACHE_ASSOC_32WAY 11 +#define SMBIOS_CACHE_ASSOC_48WAY 12 +#define SMBIOS_CACHE_ASSOC_64WAY 13 +#define SMBIOS_CACHE_ASSOC_20WAY 14 + +#endif /* _SMBIOS_DEF_H_ */ diff --git a/include/smbios_plat.h b/include/smbios_plat.h new file mode 100644 index 00000000000..70089d5a2ba --- /dev/null +++ b/include/smbios_plat.h @@ -0,0 +1,79 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2024 Linaro Limited + * Author: Raymond Mao <raymond.mao@linaro.org> + */ +#ifndef __SMBIOS_PLAT_H +#define __SMBIOS_PLAT_H + +#include <smbios.h> + +struct cache_info { + union cache_config config; + union cache_sram_type supp_sram_type; + union cache_sram_type curr_sram_type; + u32 line_size; + u32 associativity; + u32 max_size; + u32 inst_size; + u8 cache_type; + u8 speed; + u8 err_corr_type; + char *socket_design; +}; + +struct processor_info { + u32 id[2]; + u16 ext_clock; + u16 max_speed; + u16 curr_speed; + u16 characteristics; + u16 family2; + u16 core_count2; + u16 core_enabled2; + u16 thread_count2; + u16 thread_enabled; + u8 type; + u8 family; + u8 voltage; + u8 status; + u8 upgrade; + u8 core_count; + u8 core_enabled; + u8 thread_count; + char *socket_design; + char *manufacturer; + char *version; + char *sn; + char *asset_tag; + char *pn; +}; + +struct sysinfo_plat { + struct processor_info *processor; + struct cache_info *cache; + /* add other sysinfo structure here */ +}; + +#if defined CONFIG_SYSINFO_SMBIOS +int sysinfo_get_cache_info(u8 level, struct cache_info *cache_info); +void sysinfo_cache_info_default(struct cache_info *ci); +int sysinfo_get_processor_info(struct processor_info *pinfo); +#else +static inline int sysinfo_get_cache_info(u8 level, + struct cache_info *cache_info) +{ + return -ENOSYS; +} + +static inline void sysinfo_cache_info_default(struct cache_info *ci) +{ +} + +static inline int sysinfo_get_processor_info(struct processor_info *pinfo) +{ + return -ENOSYS; +} +#endif + +#endif /* __SMBIOS_PLAT_H */ diff --git a/include/spi-mem.h b/include/spi-mem.h index 3c8e95b6f53..2eb05a2e5bc 100644 --- a/include/spi-mem.h +++ b/include/spi-mem.h @@ -329,9 +329,6 @@ bool spi_mem_default_supports_op(struct spi_slave *slave, int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op); -bool spi_mem_default_supports_op(struct spi_slave *mem, - const struct spi_mem_op *op); - struct spi_mem_dirmap_desc * spi_mem_dirmap_create(struct spi_slave *mem, const struct spi_mem_dirmap_info *info); diff --git a/include/spl.h b/include/spl.h index 43b344dbc55..7155e9c67aa 100644 --- a/include/spl.h +++ b/include/spl.h @@ -14,6 +14,7 @@ #include <asm/global_data.h> #include <asm/spl.h> #include <handoff.h> +#include <image.h> #include <mmc.h> struct blk_desc; @@ -265,6 +266,21 @@ enum spl_sandbox_flags { SPL_SANDBOXF_ARG_IS_BUF, }; +/** + * struct spl_image_info - Information about the SPL image being loaded + * + * @fdt_size: Size of the FDT for the image (0 if none) + * @buf: Buffer where the image should be loaded + * @fdt_buf: Buffer where the FDT will be copied by spl_reloc_jump(), only used + * if @fdt_size is non-zero + * @fdt_start: Pointer to the FDT to be copied (must be set up before calling + * spl_reloc_jump() + * @rcode_buf: Buffer to hold the relocating-jump code + * @stack_prot: Pointer to the stack-protection value, used to ensure the stack + * does not overflow + * @reloc_offset: offset between the relocating-jump code and its place in the + * currently running image + */ struct spl_image_info { const char *name; u8 os; @@ -276,6 +292,7 @@ struct spl_image_info { u32 boot_device; u32 offset; u32 size; + ulong fdt_size; u32 flags; void *arg; #ifdef CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK @@ -283,8 +300,19 @@ struct spl_image_info { ulong dcrc_length; ulong dcrc; #endif +#if CONFIG_IS_ENABLED(RELOC_LOADER) + void *buf; + void *fdt_buf; + void *fdt_start; + void *rcode_buf; + uint *stack_prot; + ulong reloc_offset; +#endif }; +/* function to jump to an image from SPL */ +typedef void __noreturn (*spl_jump_to_image_t)(struct spl_image_info *); + static inline void *spl_image_fdt_addr(struct spl_image_info *info) { #if CONFIG_IS_ENABLED(LOAD_FIT) || CONFIG_IS_ENABLED(LOAD_FIT_FULL) @@ -316,12 +344,18 @@ typedef ulong (*spl_load_reader)(struct spl_load_info *load, ulong sector, * @read: Function to call to read from the device * @priv: Private data for the device * @bl_len: Block length for reading in bytes + * @phase: Image phase to load + * @fit_loaded: true if the FIT has been loaded, except for external data */ struct spl_load_info { spl_load_reader read; void *priv; #if IS_ENABLED(CONFIG_SPL_LOAD_BLOCK) - int bl_len; + u16 bl_len; +#endif +#if CONFIG_IS_ENABLED(BOOTMETH_VBE) + u8 phase; + u8 fit_loaded; #endif }; @@ -344,6 +378,32 @@ static inline void spl_set_bl_len(struct spl_load_info *info, int bl_len) #endif } +static inline void xpl_set_phase(struct spl_load_info *info, + enum image_phase_t phase) +{ +#if CONFIG_IS_ENABLED(BOOTMETH_VBE) + info->phase = phase; +#endif +} + +static inline enum image_phase_t xpl_get_phase(struct spl_load_info *info) +{ +#if CONFIG_IS_ENABLED(BOOTMETH_VBE) + return info->phase; +#else + return IH_PHASE_NONE; +#endif +} + +static inline bool xpl_get_fit_loaded(struct spl_load_info *info) +{ +#if CONFIG_IS_ENABLED(BOOTMETH_VBE) + return info->fit_loaded; +#else + return false; +#endif +} + /** * spl_load_init() - Set up a new spl_load_info structure */ @@ -354,6 +414,7 @@ static inline void spl_load_init(struct spl_load_info *load, load->read = h_read; load->priv = priv; spl_set_bl_len(load, bl_len); + xpl_set_phase(load, IH_PHASE_NONE); } /* @@ -1113,4 +1174,31 @@ int spl_write_upl_handoff(struct spl_image_info *spl_image); */ void spl_upl_init(void); +/** + * spl_reloc_prepare() - Prepare the relocating loader ready for use + * + * Sets up the relocating loader ready for use. This must be called before + * spl_reloc_jump() can be used. + * + * The memory layout is figured out, making use of the space between the top of + * the current image and the top of memory. + * + * Once this is done, the relocating-jump code is copied into place at + * image->rcode_buf + * + * @image: SPL image containing information. This is updated with various + * necessary values. On entry, the size and fdt_size fields must be valid + * @addrp: Returns the address to which the image should be loaded into memory + * Return 0 if OK, -ENOSPC if there is not enough memory available + */ +int spl_reloc_prepare(struct spl_image_info *image, ulong *addrp); + +/** + * spl_reloc_jump() - Jump to an image, via a 'relocating-jump' region + * + * @image: SPL image to jump to + * @func: Function to call in the final image + */ +int spl_reloc_jump(struct spl_image_info *image, spl_jump_to_image_t func); + #endif diff --git a/include/sysinfo.h b/include/sysinfo.h index 027a463dc33..ba2ac273e8e 100644 --- a/include/sysinfo.h +++ b/include/sysinfo.h @@ -11,6 +11,8 @@ struct udevice; +#define SYSINFO_CACHE_LVL_MAX 3 + /* * This uclass encapsulates hardware methods to gather information about a * sysinfo or a specific device such as hard-wired GPIOs on GPIO expanders, @@ -42,18 +44,109 @@ struct udevice; enum sysinfo_id { SYSID_NONE, - /* For SMBIOS tables */ + /* BIOS Information (Type 0) */ + SYSID_SM_BIOS_VENDOR, + SYSID_SM_BIOS_VER, + SYSID_SM_BIOS_REL_DATE, + + /* System Information (Type 1) */ SYSID_SM_SYSTEM_MANUFACTURER, SYSID_SM_SYSTEM_PRODUCT, SYSID_SM_SYSTEM_VERSION, SYSID_SM_SYSTEM_SERIAL, + SYSID_SM_SYSTEM_WAKEUP, SYSID_SM_SYSTEM_SKU, SYSID_SM_SYSTEM_FAMILY, + + /* Baseboard (or Module) Information (Type 2) */ SYSID_SM_BASEBOARD_MANUFACTURER, SYSID_SM_BASEBOARD_PRODUCT, SYSID_SM_BASEBOARD_VERSION, SYSID_SM_BASEBOARD_SERIAL, SYSID_SM_BASEBOARD_ASSET_TAG, + SYSID_SM_BASEBOARD_FEATURE, + SYSID_SM_BASEBOARD_CHASSIS_LOCAT, + SYSID_SM_BASEBOARD_TYPE, + SYSID_SM_BASEBOARD_OBJS_NUM, + SYSID_SM_BASEBOARD_OBJS_HANDLE, + + /* System Enclosure or Chassis (Type 3) */ + SYSID_SM_ENCLOSURE_MANUFACTURER, + SYSID_SM_ENCLOSURE_VERSION, + SYSID_SM_ENCLOSURE_SERIAL, + SYSID_SM_ENCLOSURE_ASSET_TAG, + SYSID_SM_ENCLOSURE_TYPE, + SYSID_SM_ENCLOSURE_BOOTUP, + SYSID_SM_ENCLOSURE_POW, + SYSID_SM_ENCLOSURE_THERMAL, + SYSID_SM_ENCLOSURE_SECURITY, + SYSID_SM_ENCLOSURE_OEM, + SYSID_SM_ENCLOSURE_HEIGHT, + SYSID_SM_ENCLOSURE_POWCORE_NUM, + SYSID_SM_ENCLOSURE_ELEMENT_CNT, + SYSID_SM_ENCLOSURE_ELEMENT_LEN, + SYSID_SM_ENCLOSURE_ELEMENTS, + SYSID_SM_ENCLOSURE_SKU, + + /* Processor Information (Type 4) */ + SYSID_SM_PROCESSOR_SOCKET, + SYSID_SM_PROCESSOR_TYPE, + SYSID_SM_PROCESSOR_MANUFACT, + SYSID_SM_PROCESSOR_ID, + SYSID_SM_PROCESSOR_VERSION, + SYSID_SM_PROCESSOR_VOLTAGE, + SYSID_SM_PROCESSOR_EXT_CLOCK, + SYSID_SM_PROCESSOR_MAX_SPEED, + SYSID_SM_PROCESSOR_CUR_SPEED, + SYSID_SM_PROCESSOR_STATUS, + SYSID_SM_PROCESSOR_UPGRADE, + SYSID_SM_PROCESSOR_SN, + SYSID_SM_PROCESSOR_ASSET_TAG, + SYSID_SM_PROCESSOR_PN, + SYSID_SM_PROCESSOR_CORE_CNT, + SYSID_SM_PROCESSOR_CORE_EN, + SYSID_SM_PROCESSOR_THREAD_CNT, + SYSID_SM_PROCESSOR_CHARA, + SYSID_SM_PROCESSOR_FAMILY, + SYSID_SM_PROCESSOR_FAMILY2, + SYSID_SM_PROCESSOR_CORE_CNT2, + SYSID_SM_PROCESSOR_CORE_EN2, + SYSID_SM_PROCESSOR_THREAD_CNT2, + SYSID_SM_PROCESSOR_THREAD_EN, + + /* + * Cache Information (Type 7) + * Each of the id should reserve space for up to + * SYSINFO_CACHE_LVL_MAX levels of cache + */ + SYSID_SM_CACHE_LEVEL, + SYSID_SM_CACHE_HANDLE, + SYSID_SM_CACHE_INFO_START, + SYSID_SM_CACHE_SOCKET = SYSID_SM_CACHE_INFO_START, + SYSID_SM_CACHE_CONFIG = + SYSID_SM_CACHE_SOCKET + SYSINFO_CACHE_LVL_MAX, + SYSID_SM_CACHE_MAX_SIZE = + SYSID_SM_CACHE_CONFIG + SYSINFO_CACHE_LVL_MAX, + SYSID_SM_CACHE_INST_SIZE = + SYSID_SM_CACHE_MAX_SIZE + SYSINFO_CACHE_LVL_MAX, + SYSID_SM_CACHE_SUPSRAM_TYPE = + SYSID_SM_CACHE_INST_SIZE + SYSINFO_CACHE_LVL_MAX, + SYSID_SM_CACHE_CURSRAM_TYPE = + SYSID_SM_CACHE_SUPSRAM_TYPE + SYSINFO_CACHE_LVL_MAX, + SYSID_SM_CACHE_SPEED = + SYSID_SM_CACHE_CURSRAM_TYPE + SYSINFO_CACHE_LVL_MAX, + SYSID_SM_CACHE_ERRCOR_TYPE = + SYSID_SM_CACHE_SPEED + SYSINFO_CACHE_LVL_MAX, + SYSID_SM_CACHE_SCACHE_TYPE = + SYSID_SM_CACHE_ERRCOR_TYPE + SYSINFO_CACHE_LVL_MAX, + SYSID_SM_CACHE_ASSOC = + SYSID_SM_CACHE_SCACHE_TYPE + SYSINFO_CACHE_LVL_MAX, + SYSID_SM_CACHE_MAX_SIZE2 = + SYSID_SM_CACHE_ASSOC + SYSINFO_CACHE_LVL_MAX, + SYSID_SM_CACHE_INST_SIZE2 = + SYSID_SM_CACHE_MAX_SIZE2 + SYSINFO_CACHE_LVL_MAX, + SYSID_SM_CACHE_INFO_END = + SYSID_SM_CACHE_INST_SIZE2 + SYSINFO_CACHE_LVL_MAX - 1, /* For show_board_info() */ SYSID_BOARD_MODEL, @@ -116,6 +209,18 @@ struct sysinfo_ops { int (*get_str)(struct udevice *dev, int id, size_t size, char *val); /** + * get_data() - Read a specific string data value that describes the + * hardware setup. + * @dev: The sysinfo instance to gather the data. + * @id: A unique identifier for the data area to be get. + * @data: Pointer to the address of the data area. + * @size: Pointer to the size of the data area. + * + * Return: 0 if OK, -ve on error. + */ + int (*get_data)(struct udevice *dev, int id, void **data, size_t *size); + + /** * get_fit_loadable - Get the name of an image to load from FIT * This function can be used to provide the image names based on runtime * detection. A classic use-case would when DTBOs are used to describe @@ -187,6 +292,18 @@ int sysinfo_get_int(struct udevice *dev, int id, int *val); int sysinfo_get_str(struct udevice *dev, int id, size_t size, char *val); /** + * sysinfo_get_data() - Get a data area from the platform. + * @dev: The sysinfo instance to gather the data. + * @id: A unique identifier for the data area to be get. + * @data: Pointer to the address of the data area. + * @size: Pointer to the size of the data area. + * + * Return: 0 if OK, -EPERM if called before sysinfo_detect(), else -ve on + * error. + */ +int sysinfo_get_data(struct udevice *dev, int id, void **data, size_t *size); + +/** * sysinfo_get() - Return the sysinfo device for the sysinfo in question. * @devp: Pointer to structure to receive the sysinfo device. * @@ -241,6 +358,12 @@ static inline int sysinfo_get_str(struct udevice *dev, int id, size_t size, return -ENOSYS; } +static inline int sysinfo_get_data(struct udevice *dev, int id, void **data, + size_t *size) +{ + return -ENOSYS; +} + static inline int sysinfo_get(struct udevice **devp) { return -ENOSYS; diff --git a/include/tpm-common.h b/include/tpm-common.h index 1ba81386ce1..bfb84a931d1 100644 --- a/include/tpm-common.h +++ b/include/tpm-common.h @@ -43,11 +43,19 @@ enum tpm_version { }; /** + * define TPM2_NUM_PCR_BANKS - number of PCR banks + * The value 16 can be found in the current standard + * TCG TSS 2.0 Overview and Common Structures Specification 1.0, rev 10 + */ +#define TPM2_NUM_PCR_BANKS 16 + +/** * struct tpm_chip_priv - Information about a TPM, stored by the uclass * - * These values must be set up by the device's probe() method before + * Some of hese values must be set up by the device's probe() method before * communcation is attempted. If the device has an xfer() method, this is * not needed. There is no need to set up @buf. + * The active_banks is only valid for TPMv2 after the device is initialized. * * @version: TPM stack to be used * @duration_ms: Length of each duration type in milliseconds @@ -55,6 +63,8 @@ enum tpm_version { * @buf: Buffer used during the exchanges with the chip * @pcr_count: Number of PCR per bank * @pcr_select_min: Minimum size in bytes of the pcrSelect array + * @active_bank_count: Number of active PCR banks + * @active_banks: Array of active PCRs * @plat_hier_disabled: Platform hierarchy has been disabled (TPM is locked * down until next reboot) */ @@ -68,6 +78,10 @@ struct tpm_chip_priv { /* TPM v2 specific data */ uint pcr_count; uint pcr_select_min; +#if IS_ENABLED(CONFIG_TPM_V2) + u8 active_bank_count; + u32 active_banks[TPM2_NUM_PCR_BANKS]; +#endif bool plat_hier_disabled; }; diff --git a/include/tpm-v2.h b/include/tpm-v2.h index 4fd19c52fd7..65681464b37 100644 --- a/include/tpm-v2.h +++ b/include/tpm-v2.h @@ -6,6 +6,11 @@ * Copyright (c) 2020 Linaro * Copyright (c) 2018 Bootlin * + * The structures are described in + * Trusted Platform Module Library Part 2: Structures + * http://tcg.tjn.chef.causewaynow.com/resource/tpm-library-specification/ + * + * C header files are listed in * https://trustedcomputinggroup.org/resource/tss-overview-common-structures-specification/ * * Author: Miquel Raynal <miquel.raynal@bootlin.com> @@ -34,16 +39,6 @@ struct udevice; #define TPM2_HDR_LEN 10 -/* - * We deviate from this draft of the specification by increasing the value of - * TPM2_NUM_PCR_BANKS from 3 to 16 to ensure compatibility with TPM2 - * implementations that have enabled a larger than typical number of PCR - * banks. This larger value for TPM2_NUM_PCR_BANKS is expected to be included - * in a future revision of the specification. - */ -#define TPM2_NUM_PCR_BANKS 16 - -/* Definition of (UINT32) TPM2_CAP Constants */ #define TPM2_CAP_PCRS 0x00000005U #define TPM2_CAP_TPM_PROPERTIES 0x00000006U @@ -55,20 +50,43 @@ struct udevice; #define TPM2_PT_MAX_COMMAND_SIZE (u32)(TPM2_PT_FIXED + 30) #define TPM2_PT_MAX_RESPONSE_SIZE (u32)(TPM2_PT_FIXED + 31) -/* TPMS_TAGGED_PROPERTY Structure */ +/** + * struct tpms_tagged_property - TPMS_TAGGED_PROPERTY structure + * + * This structure is returned by TPM2_GetCapability() to report + * a u32 property value. + * + * @property: property identifier + * @value: value of the property + */ struct tpms_tagged_property { u32 property; u32 value; } __packed; -/* TPMS_PCR_SELECTION Structure */ +/** + * struct tpms_pcr_selection - TPMS_PCR_SELECTION structure + * + * This structure allows to specify a hash algorithm and a list of + * selected PCRs. A PCR is selected by setting the related bit in + * @pcr_select to 1. + * + * @hash: hash algorithm associated with the selection + * @size_of_select: size in bytes of the @pcr_select array + * @pcr_select: bit map of selected PCRs + */ struct tpms_pcr_selection { u16 hash; u8 size_of_select; u8 pcr_select[TPM2_PCR_SELECT_MAX]; } __packed; -/* TPML_PCR_SELECTION Structure */ +/** + * struct tpml_pcr_selection - TPML_PCR_SELECTION structure + * + * @count: number of selection structures, may be zero + * @selection: list of selections + */ struct tpml_pcr_selection { u32 count; struct tpms_pcr_selection selection[TPM2_NUM_PCR_BANKS]; @@ -268,6 +286,7 @@ struct digest_info { u16 hash_alg; u32 hash_mask; u16 hash_len; + bool supported; }; /* Algorithm Registry */ @@ -278,38 +297,50 @@ struct digest_info { #define TCG2_BOOT_HASH_ALG_SM3_256 0x00000010 static const struct digest_info hash_algo_list[] = { -#if IS_ENABLED(CONFIG_SHA1) { "sha1", TPM2_ALG_SHA1, TCG2_BOOT_HASH_ALG_SHA1, TPM2_SHA1_DIGEST_SIZE, - }, +#if IS_ENABLED(CONFIG_SHA1) + true, +#else + false, #endif -#if IS_ENABLED(CONFIG_SHA256) + }, { "sha256", TPM2_ALG_SHA256, TCG2_BOOT_HASH_ALG_SHA256, TPM2_SHA256_DIGEST_SIZE, - }, +#if IS_ENABLED(CONFIG_SHA256) + true, +#else + false, #endif -#if IS_ENABLED(CONFIG_SHA384) + }, { "sha384", TPM2_ALG_SHA384, TCG2_BOOT_HASH_ALG_SHA384, TPM2_SHA384_DIGEST_SIZE, - }, +#if IS_ENABLED(CONFIG_SHA384) + true, +#else + false, #endif -#if IS_ENABLED(CONFIG_SHA512) + }, { "sha512", TPM2_ALG_SHA512, TCG2_BOOT_HASH_ALG_SHA512, TPM2_SHA512_DIGEST_SIZE, - }, +#if IS_ENABLED(CONFIG_SHA512) + true, +#else + false, #endif + }, }; /* NV index attributes */ @@ -705,6 +736,14 @@ enum tpm2_algorithms tpm2_name_to_algorithm(const char *name); const char *tpm2_algorithm_name(enum tpm2_algorithms); /** + * tpm2_algorithm_supported() - Check if the algorithm supported by U-Boot + * + * @algorithm_id: algorithm defined in enum tpm2_algorithms + * Return: true if supported, otherwise false + */ +bool tpm2_algorithm_supported(enum tpm2_algorithms algo); + +/** * tpm2_algorithm_to_len() - Return an algorithm length for supported algorithm id * * @algorithm_id: algorithm defined in enum tpm2_algorithms @@ -732,20 +771,28 @@ u16 tpm2_algorithm_to_len(enum tpm2_algorithms algo); */ /** - * tpm2_allow_extend() - Check if extending PCRs is allowed and safe + * tpm2_check_active_banks() - Check if the active PCR banks are supported by + * our configuration * * @dev: TPM device * Return: true if allowed */ -bool tpm2_allow_extend(struct udevice *dev); +bool tpm2_check_active_banks(struct udevice *dev); /** - * tpm2_is_active_pcr() - check the pcr_select. If at least one of the PCRs - * supports the algorithm add it on the active ones + * tpm2_is_active_bank() - check the pcr_select. If at least one of the PCRs + * supports the algorithm add it on the active ones * * @selection: PCR selection structure * Return: True if the algorithm is active */ -bool tpm2_is_active_pcr(struct tpms_pcr_selection *selection); +bool tpm2_is_active_bank(struct tpms_pcr_selection *selection); + +/** + * tpm2_print_active_banks() - Print the active TPM PCRs + * + * @dev: TPM device + */ +void tpm2_print_active_banks(struct udevice *dev); #endif /* __TPM_V2_H */ diff --git a/include/tpm_tcg2.h b/include/tpm_tcg2.h index 6519004cc41..eb6afe49e77 100644 --- a/include/tpm_tcg2.h +++ b/include/tpm_tcg2.h @@ -94,17 +94,17 @@ struct tcg_pcr_event { } __packed; /** - * tcg2_get_pcr_info() - get the supported, active PCRs and number of banks + * tcg2_get_pcr_info() - get the supported, active banks and number of banks * * @dev: TPM device - * @supported_pcr: bitmask with the algorithms supported - * @active_pcr: bitmask with the active algorithms - * @pcr_banks: number of PCR banks + * @supported_bank: bitmask with the algorithms supported + * @active_bank: bitmask with the active algorithms + * @bank_num: number of PCR banks * * @return 0 on success, code of operation or negative errno on failure */ -int tcg2_get_pcr_info(struct udevice *dev, u32 *supported_pcr, u32 *active_pcr, - u32 *pcr_banks); +int tcg2_get_pcr_info(struct udevice *dev, u32 *supported_bank, u32 *active_bank, + u32 *bank_num); /** * Crypto Agile Log Entry Format diff --git a/include/u-boot/sha256.h b/include/u-boot/sha256.h index 44a9b528b48..d7a3403270b 100644 --- a/include/u-boot/sha256.h +++ b/include/u-boot/sha256.h @@ -1,6 +1,8 @@ #ifndef _SHA256_H #define _SHA256_H +#include <linux/compiler_attributes.h> +#include <linux/errno.h> #include <linux/kconfig.h> #include <linux/types.h> @@ -45,4 +47,26 @@ void sha256_finish(sha256_context * ctx, uint8_t digest[SHA256_SUM_LEN]); void sha256_csum_wd(const unsigned char *input, unsigned int ilen, unsigned char *output, unsigned int chunk_sz); +int sha256_hmac(const unsigned char *key, int keylen, + const unsigned char *input, unsigned int ilen, + unsigned char *output); + +#if CONFIG_IS_ENABLED(HKDF_MBEDTLS) +int sha256_hkdf(const unsigned char *salt, int saltlen, + const unsigned char *ikm, int ikmlen, + const unsigned char *info, int infolen, + unsigned char *output, int outputlen); +#else +static inline int sha256_hkdf(const unsigned char __always_unused *salt, + int __always_unused saltlen, + const unsigned char __always_unused *ikm, + int __always_unused ikmlen, + const unsigned char __always_unused *info, + int __always_unused infolen, + unsigned char __always_unused *output, + int __always_unused outputlen) { + return -EOPNOTSUPP; +} +#endif + #endif /* _SHA256_H */ diff --git a/include/video.h b/include/video.h index 4ec71ab16da..a1f7fd7e839 100644 --- a/include/video.h +++ b/include/video.h @@ -150,6 +150,7 @@ struct video_ops { * set by the driver, but if not, the uclass will set it after * probing * @bpix: Encoded bits per pixel (enum video_log2_bpp) + * @format: Video format (enum video_format) */ struct video_handoff { u64 fb; @@ -158,6 +159,7 @@ struct video_handoff { u16 ysize; u32 line_length; u8 bpix; + u8 format; }; /** enum colour_idx - the 16 colors supported by consoles */ diff --git a/lib/Kconfig b/lib/Kconfig index 8f1a96d98c4..0a295161385 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -1067,6 +1067,7 @@ menu "System tables" config BLOBLIST_TABLES bool "Put tables in a bloblist" depends on BLOBLIST + default y if X86 default y if (ARM && EFI_LOADER && GENERATE_ACPI_TABLE) default n help @@ -1091,6 +1092,12 @@ config GENERATE_SMBIOS_TABLE See also SYSINFO_SMBIOS which allows SMBIOS values to be provided in the devicetree. +config GENERATE_SMBIOS_TABLE_VERBOSE + bool "Generate a verbose SMBIOS (System Management BIOS) table" + depends on GENERATE_SMBIOS_TABLE + help + Provide verbose SMBIOS information. + endmenu config LIB_RATIONAL diff --git a/lib/Makefile b/lib/Makefile index 5cb3278d2ef..fc6e68c901a 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -41,7 +41,12 @@ obj-$(CONFIG_ERRNO_STR) += errno_str.o obj-$(CONFIG_FIT) += fdtdec_common.o obj-$(CONFIG_TEST_FDTDEC) += fdtdec_test.o obj-$(CONFIG_GZIP_COMPRESSED) += gzip.o + +# With QEMU the SMBIOS tables come from there, not from U-Boot +ifndef CONFIG_QFW_SMBIOS obj-$(CONFIG_GENERATE_SMBIOS_TABLE) += smbios.o +endif + obj-$(CONFIG_SMBIOS_PARSER) += smbios-parser.o obj-$(CONFIG_IMAGE_SPARSE) += image-sparse.o obj-y += initcall.o @@ -77,6 +82,7 @@ obj-$(CONFIG_BLAKE2) += blake2/blake2b.o obj-$(CONFIG_$(XPL_)MD5_LEGACY) += md5.o obj-$(CONFIG_$(XPL_)SHA1_LEGACY) += sha1.o +obj-$(CONFIG_$(XPL_)SHA256) += sha256_common.o obj-$(CONFIG_$(XPL_)SHA256_LEGACY) += sha256.o obj-$(CONFIG_$(XPL_)SHA512_LEGACY) += sha512.o diff --git a/lib/abuf.c b/lib/abuf.c index 937c3df351e..61adf7fc6b1 100644 --- a/lib/abuf.c +++ b/lib/abuf.c @@ -26,6 +26,12 @@ void abuf_map_sysmem(struct abuf *abuf, ulong addr, size_t size) { abuf_set(abuf, map_sysmem(addr, size), size); } + +ulong abuf_addr(const struct abuf *abuf) +{ + return map_to_sysmem(abuf->data); +} + #else /* copied from lib/string.c for convenience */ static char *memdup(const void *src, size_t len) @@ -113,6 +119,12 @@ void abuf_init_set(struct abuf *abuf, void *data, size_t size) abuf_set(abuf, data, size); } +void abuf_init_const(struct abuf *abuf, const void *data, size_t size) +{ + /* for now there is no flag indicating that the abuf data is constant */ + abuf_init_set(abuf, (void *)data, size); +} + void abuf_init_move(struct abuf *abuf, void *data, size_t size) { abuf_init_set(abuf, data, size); diff --git a/lib/acpi/acpi_table.c b/lib/acpi/acpi_table.c index 150f75027a5..c0ed24984af 100644 --- a/lib/acpi/acpi_table.c +++ b/lib/acpi/acpi_table.c @@ -273,7 +273,9 @@ int acpi_write_fadt(struct acpi_ctx *ctx, const struct acpi_writer *entry) return acpi_add_fadt(ctx, fadt); } +#ifndef CONFIG_QFW_ACPI ACPI_WRITER(5fadt, "FADT", acpi_write_fadt, 0); +#endif int acpi_write_madt(struct acpi_ctx *ctx, const struct acpi_writer *entry) { @@ -308,7 +310,9 @@ int acpi_write_madt(struct acpi_ctx *ctx, const struct acpi_writer *entry) return 0; } +#ifndef CONFIG_QFW_ACPI ACPI_WRITER(5madt, "MADT", acpi_write_madt, 0); +#endif void acpi_create_dbg2(struct acpi_dbg2_header *dbg2, int port_type, int port_subtype, diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig index c46ffe3a9d8..798dced475e 100644 --- a/lib/efi_loader/Kconfig +++ b/lib/efi_loader/Kconfig @@ -8,13 +8,14 @@ config EFI_LOADER SYS_CPU = armv7 || \ SYS_CPU = armv8) || \ X86 || RISCV || SANDBOX) + # We have not fully removed the requirement for some block device + depends on BLK # We need EFI_STUB_64BIT to be set on x86_64 with EFI_STUB depends on !EFI_STUB || !X86_64 || EFI_STUB_64BIT # We need EFI_STUB_32BIT to be set on x86_32 with EFI_STUB depends on !EFI_STUB || !X86 || X86_64 || EFI_STUB_32BIT depends on !EFI_APP default y if !ARM || SYS_CPU = armv7 || SYS_CPU = armv8 - select BLK select CHARSET # We need to send DM events, dynamically, in the EFI block driver select DM_EVENT diff --git a/lib/efi_loader/efi_acpi.c b/lib/efi_loader/efi_acpi.c index 67bd7f8ca24..ff305a6b13e 100644 --- a/lib/efi_loader/efi_acpi.c +++ b/lib/efi_loader/efi_acpi.c @@ -25,6 +25,16 @@ efi_status_t efi_acpi_register(void) ulong addr, start, end; efi_status_t ret; + /* + * The bloblist is already marked reserved. For now, we don't bother + * marking it with EFI_ACPI_RECLAIM_MEMORY since we would need to cut a + * hole in the EFI_BOOT_SERVICES_CODE region added by + * add_u_boot_and_runtime(). At some point that function could create a + * more detailed map. + */ + if (IS_ENABLED(CONFIG_BLOBLIST_TABLES)) + return EFI_SUCCESS; + /* Mark space used for tables */ start = ALIGN_DOWN(gd->arch.table_start, EFI_PAGE_MASK); end = ALIGN(gd->arch.table_end, EFI_PAGE_MASK); diff --git a/lib/efi_loader/efi_bootbin.c b/lib/efi_loader/efi_bootbin.c index b677bbc3124..428991df88f 100644 --- a/lib/efi_loader/efi_bootbin.c +++ b/lib/efi_loader/efi_bootbin.c @@ -45,11 +45,63 @@ void efi_clear_bootdev(void) } /** + * calculate_paths() - Calculate the device and image patch from strings + * + * @dev: device, e.g. "MMC" + * @devnr: number of the device, e.g. "1:2" + * @path: path to file loaded + * @device_pathp: returns EFI device path + * @image_pathp: returns EFI image path + * Return: EFI_SUCCESS on success, else error code + */ +static efi_status_t calculate_paths(const char *dev, const char *devnr, + const char *path, + struct efi_device_path **device_pathp, + struct efi_device_path **image_pathp) +{ + struct efi_device_path *image, *device; + efi_status_t ret; + +#if IS_ENABLED(CONFIG_NETDEVICES) + if (!strcmp(dev, "Net") || !strcmp(dev, "Http")) { + ret = efi_net_set_dp(dev, devnr); + if (ret != EFI_SUCCESS) + return ret; + } +#endif + + ret = efi_dp_from_name(dev, devnr, path, &device, &image); + if (ret != EFI_SUCCESS) + return ret; + + *device_pathp = device; + if (image) { + /* FIXME: image should not contain device */ + struct efi_device_path *image_tmp = image; + + efi_dp_split_file_path(image, &device, &image); + efi_free_pool(image_tmp); + } + *image_pathp = image; + log_debug("- boot device %pD\n", device); + if (image) + log_debug("- image %pD\n", image); + + return EFI_SUCCESS; +} + +/** * efi_set_bootdev() - set boot device * * This function is called when a file is loaded, e.g. via the 'load' command. * We use the path to this file to inform the UEFI binary about the boot device. * + * For a valid image, it sets: + * - image_addr to the provided buffer + * - image_size to the provided buffer_size + * - bootefi_device_path to the EFI device-path + * - bootefi_image_path to the EFI image-path + * * @dev: device, e.g. "MMC" * @devnr: number of the device, e.g. "1:2" * @path: path to file loaded @@ -59,7 +111,6 @@ void efi_clear_bootdev(void) void efi_set_bootdev(const char *dev, const char *devnr, const char *path, void *buffer, size_t buffer_size) { - struct efi_device_path *device, *image; efi_status_t ret; log_debug("dev=%s, devnr=%s, path=%s, buffer=%p, size=%zx\n", dev, @@ -93,34 +144,12 @@ void efi_set_bootdev(const char *dev, const char *devnr, const char *path, image_addr = buffer; image_size = buffer_size; -#if IS_ENABLED(CONFIG_NETDEVICES) - if (!strcmp(dev, "Net") || !strcmp(dev, "Http")) { - ret = efi_net_set_dp(dev, devnr); - if (ret != EFI_SUCCESS) - goto error; - } -#endif - - ret = efi_dp_from_name(dev, devnr, path, &device, &image); - if (ret != EFI_SUCCESS) - goto error; - - bootefi_device_path = device; - if (image) { - /* FIXME: image should not contain device */ - struct efi_device_path *image_tmp = image; - - efi_dp_split_file_path(image, &device, &image); - efi_free_pool(image_tmp); + ret = calculate_paths(dev, devnr, path, &bootefi_device_path, + &bootefi_image_path); + if (ret) { + log_debug("- efi_dp_from_name() failed, err=%lx\n", ret); + efi_clear_bootdev(); } - bootefi_image_path = image; - log_debug("- boot device %pD\n", device); - if (image) - log_debug("- image %pD\n", image); - return; -error: - log_debug("- efi_dp_from_name() failed, err=%lx\n", ret); - efi_clear_bootdev(); } /** @@ -130,7 +159,7 @@ error: * @source_size: size of the UEFI image * Return: status code */ -efi_status_t efi_run_image(void *source_buffer, efi_uintn_t source_size) +static efi_status_t efi_run_image(void *source_buffer, efi_uintn_t source_size) { efi_handle_t mem_handle = NULL, handle; struct efi_device_path *file_path = NULL; diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c index 080e7f78ae3..723a9b58691 100644 --- a/lib/efi_loader/efi_boottime.c +++ b/lib/efi_loader/efi_boottime.c @@ -3495,10 +3495,9 @@ static efi_status_t EFIAPI efi_exit(efi_handle_t image_handle, if (IS_ENABLED(CONFIG_EFI_TCG2_PROTOCOL)) { if (image_obj->image_type == IMAGE_SUBSYSTEM_EFI_APPLICATION) { ret = efi_tcg2_measure_efi_app_exit(); - if (ret != EFI_SUCCESS) { - log_warning("tcg2 measurement fails(0x%lx)\n", - ret); - } + if (ret != EFI_SUCCESS) + log_debug("tcg2 measurement fails (0x%lx)\n", + ret); } } @@ -3733,7 +3732,7 @@ out: * * Return: status code */ -static efi_status_t EFIAPI efi_reinstall_protocol_interface( +efi_status_t EFIAPI efi_reinstall_protocol_interface( efi_handle_t handle, const efi_guid_t *protocol, void *old_interface, void *new_interface) { diff --git a/lib/efi_loader/efi_image_loader.c b/lib/efi_loader/efi_image_loader.c index bb58cf1badb..d002eb0c744 100644 --- a/lib/efi_loader/efi_image_loader.c +++ b/lib/efi_loader/efi_image_loader.c @@ -122,7 +122,7 @@ static efi_status_t efi_loader_relocate(const IMAGE_BASE_RELOCATION *rel, return EFI_SUCCESS; end = (const IMAGE_BASE_RELOCATION *)((const char *)rel + rel_size); - while (rel < end && rel->SizeOfBlock) { + while (rel + 1 < end && rel->SizeOfBlock) { const uint16_t *relocs = (const uint16_t *)(rel + 1); i = (rel->SizeOfBlock - sizeof(*rel)) / sizeof(uint16_t); while (i--) { diff --git a/lib/efi_loader/efi_tcg2.c b/lib/efi_loader/efi_tcg2.c index 572c6b5bf63..a15c73162ee 100644 --- a/lib/efi_loader/efi_tcg2.c +++ b/lib/efi_loader/efi_tcg2.c @@ -791,7 +791,7 @@ static void tcg2_uninit(void) efi_status_t ret; ret = efi_install_configuration_table(&efi_guid_final_events, NULL); - if (ret != EFI_SUCCESS) + if (ret != EFI_SUCCESS && ret != EFI_NOT_FOUND) log_err("Failed to delete final events config table\n"); efi_free_pool(event_log.buffer); diff --git a/lib/efi_loader/elf_efi.ldsi b/lib/efi_loader/elf_efi.ldsi new file mode 100644 index 00000000000..190a88fb69e --- /dev/null +++ b/lib/efi_loader/elf_efi.ldsi @@ -0,0 +1,74 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ +/* + * U-Boot EFI linker script include + * + * Modified from elf_aarch64_efi.lds in gnu-efi + */ + +PHDRS +{ + data PT_LOAD FLAGS(3); /* SHF_WRITE | SHF_ALLOC */ +} + +ENTRY(_start) +SECTIONS +{ + .text 0x0 : { + _text = .; + *(.text.head) + *(.text) + *(.text.*) + *(.gnu.linkonce.t.*) + *(.srodata) + *(.rodata*) + . = ALIGN(16); + *(.dynamic); + . = ALIGN(512); + } + .rela.dyn : { *(.rela.dyn) } + .rela.plt : { *(.rela.plt) } + .rela.got : { *(.rela.got) } + .rela.data : { *(.rela.data) *(.rela.data*) } + . = ALIGN(4096); + _etext = .; + _text_size = . - _text; + .data : { + _data = .; + *(.sdata) + *(.data) + *(.data1) + *(.data.*) + *(.got.plt) + *(.got) + + /* + * The EFI loader doesn't seem to like a .bss section, so we + * stick it all into .data: + */ + . = ALIGN(16); + _bss = .; + *(.sbss) + *(.scommon) + *(.dynbss) + *(.bss) + *(.bss.*) + *(COMMON) + . = ALIGN(512); + _bss_end = .; + _edata = .; + } :data + _data_size = _edata - _data; + + . = ALIGN(4096); + .dynsym : { *(.dynsym) } + . = ALIGN(4096); + .dynstr : { *(.dynstr) } + . = ALIGN(4096); + .note.gnu.build-id : { *(.note.gnu.build-id) } + /DISCARD/ : { + *(.rel.reloc) + *(.eh_frame) + *(.note.GNU-stack) + } + .comment 0 : { *(.comment) } +} diff --git a/lib/efi_selftest/efi_selftest_startimage_exit.c b/lib/efi_selftest/efi_selftest_startimage_exit.c index b65a10b7a4b..8d119f054c5 100644 --- a/lib/efi_selftest/efi_selftest_startimage_exit.c +++ b/lib/efi_selftest/efi_selftest_startimage_exit.c @@ -84,13 +84,15 @@ static efi_status_t decompress(u8 **image) static int setup(const efi_handle_t handle, const struct efi_system_table *systable) { + efi_status_t ret; + image_handle = handle; boottime = systable->boottime; /* Load the application image into memory */ - decompress(&image); + ret = decompress(&image); - return EFI_ST_SUCCESS; + return ret; } /* diff --git a/lib/mbedtls/Kconfig b/lib/mbedtls/Kconfig index 78167ffa252..aa82336ef14 100644 --- a/lib/mbedtls/Kconfig +++ b/lib/mbedtls/Kconfig @@ -297,6 +297,13 @@ config MD5_MBEDTLS This option enables support of hashing using MD5 algorithm with MbedTLS crypto library. +config HKDF_MBEDTLS + bool "Enable HKDF support with MbedTLS crypto library" + depends on MBEDTLS_LIB_CRYPTO + help + This option enables support of key derivation using HKDF algorithm + with MbedTLS crypto library. + if SPL config SPL_SHA1_MBEDTLS @@ -335,6 +342,13 @@ config SPL_MD5_MBEDTLS This option enables support of hashing using MD5 algorithm with MbedTLS crypto library. +config SPL_HKDF_MBEDTLS + bool "Enable HKDF support in SPL with MbedTLS crypto library" + depends on MBEDTLS_LIB_CRYPTO + help + This option enables support of key derivation using HKDF algorithm + with MbedTLS crypto library. + endif # SPL endif # MBEDTLS_LIB_CRYPTO diff --git a/lib/mbedtls/Makefile b/lib/mbedtls/Makefile index ce0a61e4054..e66c2018d97 100644 --- a/lib/mbedtls/Makefile +++ b/lib/mbedtls/Makefile @@ -33,6 +33,8 @@ mbedtls_lib_crypto-$(CONFIG_$(SPL_)SHA256_MBEDTLS) += \ $(MBEDTLS_LIB_DIR)/sha256.o mbedtls_lib_crypto-$(CONFIG_$(SPL_)SHA512_MBEDTLS) += \ $(MBEDTLS_LIB_DIR)/sha512.o +mbedtls_lib_crypto-$(CONFIG_$(SPL_)HKDF_MBEDTLS) += \ + $(MBEDTLS_LIB_DIR)/hkdf.o # MbedTLS X509 library obj-$(CONFIG_MBEDTLS_LIB_X509) += mbedtls_lib_x509.o diff --git a/lib/mbedtls/mbedtls_def_config.h b/lib/mbedtls/mbedtls_def_config.h index 1d2314e90e4..fd440c392f9 100644 --- a/lib/mbedtls/mbedtls_def_config.h +++ b/lib/mbedtls/mbedtls_def_config.h @@ -56,6 +56,10 @@ #endif #endif +#if CONFIG_IS_ENABLED(HKDF_MBEDTLS) +#define MBEDTLS_HKDF_C +#endif + #if defined CONFIG_MBEDTLS_LIB_X509 #if CONFIG_IS_ENABLED(X509_CERTIFICATE_PARSER) diff --git a/lib/mbedtls/sha256.c b/lib/mbedtls/sha256.c index 24aa58fa674..59edcb517df 100644 --- a/lib/mbedtls/sha256.c +++ b/lib/mbedtls/sha256.c @@ -10,6 +10,12 @@ #endif /* USE_HOSTCC */ #include <u-boot/sha256.h> +#include <mbedtls/md.h> + +#if CONFIG_IS_ENABLED(HKDF_MBEDTLS) +#include <mbedtls/hkdf.h> +#endif + const u8 sha256_der_prefix[SHA256_DER_LEN] = { 0x30, 0x31, 0x30, 0x0d, 0x06, 0x09, 0x60, 0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x01, 0x05, @@ -34,29 +40,34 @@ void sha256_finish(sha256_context *ctx, uint8_t digest[SHA256_SUM_LEN]) mbedtls_sha256_free(ctx); } -void sha256_csum_wd(const unsigned char *input, unsigned int ilen, - unsigned char *output, unsigned int chunk_sz) +int sha256_hmac(const unsigned char *key, int keylen, + const unsigned char *input, unsigned int ilen, + unsigned char *output) { - sha256_context ctx; - - sha256_starts(&ctx); - - if (IS_ENABLED(CONFIG_HW_WATCHDOG) || IS_ENABLED(CONFIG_WATCHDOG)) { - const unsigned char *curr = input; - const unsigned char *end = input + ilen; - int chunk; - - while (curr < end) { - chunk = end - curr; - if (chunk > chunk_sz) - chunk = chunk_sz; - sha256_update(&ctx, curr, chunk); - curr += chunk; - schedule(); - } - } else { - sha256_update(&ctx, input, ilen); - } - - sha256_finish(&ctx, output); + const mbedtls_md_info_t *md; + + md = mbedtls_md_info_from_type(MBEDTLS_MD_SHA256); + if (!md) + return MBEDTLS_ERR_MD_FEATURE_UNAVAILABLE; + + return mbedtls_md_hmac(md, key, keylen, input, ilen, output); +} + +#if CONFIG_IS_ENABLED(HKDF_MBEDTLS) +int sha256_hkdf(const unsigned char *salt, int saltlen, + const unsigned char *ikm, int ikmlen, + const unsigned char *info, int infolen, + unsigned char *output, int outputlen) +{ + const mbedtls_md_info_t *md; + + md = mbedtls_md_info_from_type(MBEDTLS_MD_SHA256); + if (!md) + return MBEDTLS_ERR_MD_FEATURE_UNAVAILABLE; + + return mbedtls_hkdf(md, salt, saltlen, + ikm, ikmlen, + info, infolen, + output, outputlen); } +#endif diff --git a/lib/sha256.c b/lib/sha256.c index fb195d988f1..c2e77c854b9 100644 --- a/lib/sha256.c +++ b/lib/sha256.c @@ -265,38 +265,53 @@ void sha256_finish(sha256_context * ctx, uint8_t digest[32]) PUT_UINT32_BE(ctx->state[7], digest, 28); } -/* - * Output = SHA-256( input buffer ). Trigger the watchdog every 'chunk_sz' - * bytes of input processed. - */ -void sha256_csum_wd(const unsigned char *input, unsigned int ilen, - unsigned char *output, unsigned int chunk_sz) +int sha256_hmac(const unsigned char *key, int keylen, + const unsigned char *input, unsigned int ilen, + unsigned char *output) { + int i; sha256_context ctx; -#if !defined(USE_HOSTCC) && \ - (defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)) - const unsigned char *end; - unsigned char *curr; - int chunk; -#endif + unsigned char keybuf[64]; + unsigned char k_ipad[64]; + unsigned char k_opad[64]; + unsigned char tmpbuf[32]; + int keybuf_len; + + if (keylen > 64) { + sha256_starts(&ctx); + sha256_update(&ctx, key, keylen); + sha256_finish(&ctx, keybuf); + + keybuf_len = 32; + } else { + memset(keybuf, 0, sizeof(keybuf)); + memcpy(keybuf, key, keylen); + keybuf_len = keylen; + } - sha256_starts(&ctx); + memset(k_ipad, 0x36, 64); + memset(k_opad, 0x5C, 64); -#if !defined(USE_HOSTCC) && \ - (defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)) - curr = (unsigned char *)input; - end = input + ilen; - while (curr < end) { - chunk = end - curr; - if (chunk > chunk_sz) - chunk = chunk_sz; - sha256_update(&ctx, curr, chunk); - curr += chunk; - schedule(); + for (i = 0; i < keybuf_len; i++) { + k_ipad[i] ^= keybuf[i]; + k_opad[i] ^= keybuf[i]; } -#else + + sha256_starts(&ctx); + sha256_update(&ctx, k_ipad, sizeof(k_ipad)); sha256_update(&ctx, input, ilen); -#endif + sha256_finish(&ctx, tmpbuf); + sha256_starts(&ctx); + sha256_update(&ctx, k_opad, sizeof(k_opad)); + sha256_update(&ctx, tmpbuf, sizeof(tmpbuf)); sha256_finish(&ctx, output); + + memset(k_ipad, 0, sizeof(k_ipad)); + memset(k_opad, 0, sizeof(k_opad)); + memset(tmpbuf, 0, sizeof(tmpbuf)); + memset(keybuf, 0, sizeof(keybuf)); + memset(&ctx, 0, sizeof(sha256_context)); + + return 0; } diff --git a/lib/sha256_common.c b/lib/sha256_common.c new file mode 100644 index 00000000000..7041abd26d9 --- /dev/null +++ b/lib/sha256_common.c @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * FIPS-180-2 compliant SHA-256 implementation + * + * Copyright (C) 2001-2003 Christophe Devine + */ + +#ifndef USE_HOSTCC +#include <u-boot/schedule.h> +#endif /* USE_HOSTCC */ +#include <string.h> +#include <u-boot/sha256.h> + +#include <linux/compiler_attributes.h> + +/* + * Output = SHA-256( input buffer ). Trigger the watchdog every 'chunk_sz' + * bytes of input processed. + */ +void sha256_csum_wd(const unsigned char *input, unsigned int ilen, + unsigned char *output, unsigned int chunk_sz) +{ + sha256_context ctx; +#if !defined(USE_HOSTCC) && \ + (defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)) + const unsigned char *end; + unsigned char *curr; + int chunk; +#endif + + sha256_starts(&ctx); + +#if !defined(USE_HOSTCC) && \ + (defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)) + curr = (unsigned char *)input; + end = input + ilen; + while (curr < end) { + chunk = end - curr; + if (chunk > chunk_sz) + chunk = chunk_sz; + sha256_update(&ctx, curr, chunk); + curr += chunk; + schedule(); + } +#else + sha256_update(&ctx, input, ilen); +#endif + + sha256_finish(&ctx, output); +} diff --git a/lib/smbios.c b/lib/smbios.c index defb6b42f45..78cee8c0c26 100644 --- a/lib/smbios.c +++ b/lib/smbios.c @@ -208,6 +208,43 @@ void get_str_from_dt(const struct map_sysinfo *nprop, char *str, size_t size) } /** + * smbios_get_val_si() - Get value from the devicetree or sysinfo + * + * @ctx: context of SMBIOS + * @prop: property to read + * @sysinfo_id: unique identifier for the value to be read + * @val_def: Default value + * Return: Valid value from sysinfo or device tree, otherwise val_def. + */ +static int smbios_get_val_si(struct smbios_ctx * __maybe_unused ctx, + const char * __maybe_unused prop, + int __maybe_unused sysinfo_id, int val_def) +{ +#if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLE_VERBOSE) + int val; + + if (!ctx->dev) + return val_def; + + if (!sysinfo_get_int(ctx->dev, sysinfo_id, &val)) + return val; + + if (!IS_ENABLED(CONFIG_OF_CONTROL) || !prop) + return val_def; + + if (ofnode_valid(ctx->node) && !ofnode_read_u32(ctx->node, prop, &val)) + return val; + + /* + * If the node or property is not valid fallback and try the root + */ + if (!ofnode_read_u32(ofnode_root(), prop, &val)) + return val; +#endif + return val_def; +} + +/** * smbios_add_prop_si() - Add a property from the devicetree or sysinfo * * Sysinfo is used if available, with a fallback to devicetree @@ -226,9 +263,6 @@ static int smbios_add_prop_si(struct smbios_ctx *ctx, const char *prop, if (!dval || !*dval) dval = NULL; - if (!prop) - return smbios_add_string(ctx, dval); - if (sysinfo_id && ctx->dev) { char val[SMBIOS_STR_MAX]; @@ -236,6 +270,9 @@ static int smbios_add_prop_si(struct smbios_ctx *ctx, const char *prop, if (!ret) return smbios_add_string(ctx, val); } + if (!prop) + return smbios_add_string(ctx, dval); + if (IS_ENABLED(CONFIG_OF_CONTROL)) { const char *str = NULL; char str_dt[128] = { 0 }; @@ -331,15 +368,17 @@ static int smbios_write_type0(ulong *current, int handle, struct smbios_ctx *ctx) { struct smbios_type0 *t; - int len = sizeof(struct smbios_type0); + int len = sizeof(*t); t = map_sysmem(*current, len); - memset(t, 0, sizeof(struct smbios_type0)); + memset(t, 0, len); fill_smbios_header(t, SMBIOS_BIOS_INFORMATION, len, handle); smbios_set_eos(ctx, t->eos); - t->vendor = smbios_add_prop(ctx, NULL, "U-Boot"); + t->vendor = smbios_add_prop_si(ctx, NULL, SYSID_SM_BIOS_VENDOR, + "U-Boot"); - t->bios_ver = smbios_add_prop(ctx, "version", PLAIN_VERSION); + t->bios_ver = smbios_add_prop_si(ctx, "version", SYSID_SM_BIOS_VER, + PLAIN_VERSION); if (t->bios_ver) gd->smbios_version = ctx->last_str; log_debug("smbios_version = %p: '%s'\n", gd->smbios_version, @@ -348,7 +387,9 @@ static int smbios_write_type0(ulong *current, int handle, print_buffer((ulong)gd->smbios_version, gd->smbios_version, 1, strlen(gd->smbios_version) + 1, 0); #endif - t->bios_release_date = smbios_add_prop(ctx, NULL, U_BOOT_DMI_DATE); + t->bios_release_date = smbios_add_prop_si(ctx, NULL, + SYSID_SM_BIOS_REL_DATE, + U_BOOT_DMI_DATE); #ifdef CONFIG_ROM_SIZE if (CONFIG_ROM_SIZE < SZ_16M) { t->bios_rom_size = (CONFIG_ROM_SIZE / 65536) - 1; @@ -375,7 +416,7 @@ static int smbios_write_type0(ulong *current, int handle, t->ec_major_release = 0xff; t->ec_minor_release = 0xff; - len = t->length + smbios_string_table_len(ctx); + len = t->hdr.length + smbios_string_table_len(ctx); *current += len; unmap_sysmem(t); @@ -386,37 +427,38 @@ static int smbios_write_type1(ulong *current, int handle, struct smbios_ctx *ctx) { struct smbios_type1 *t; - int len = sizeof(struct smbios_type1); + int len = sizeof(*t); char *serial_str = env_get("serial#"); t = map_sysmem(*current, len); - memset(t, 0, sizeof(struct smbios_type1)); + memset(t, 0, len); fill_smbios_header(t, SMBIOS_SYSTEM_INFORMATION, len, handle); smbios_set_eos(ctx, t->eos); + t->manufacturer = smbios_add_prop_si(ctx, "manufacturer", SYSID_SM_SYSTEM_MANUFACTURER, NULL); t->product_name = smbios_add_prop_si(ctx, "product", - SYSID_SM_SYSTEM_PRODUCT, - NULL); - t->version = smbios_add_prop_si(ctx, "version", - SYSID_SM_SYSTEM_VERSION, + SYSID_SM_SYSTEM_PRODUCT, NULL); + t->version = smbios_add_prop_si(ctx, "version", SYSID_SM_SYSTEM_VERSION, NULL); if (serial_str) { t->serial_number = smbios_add_prop(ctx, NULL, serial_str); - strncpy((char *)t->uuid, serial_str, sizeof(t->uuid)); + strlcpy((char *)t->uuid, serial_str, sizeof(t->uuid)); } else { t->serial_number = smbios_add_prop_si(ctx, "serial", SYSID_SM_SYSTEM_SERIAL, NULL); } - t->wakeup_type = SMBIOS_WAKEUP_TYPE_UNKNOWN; - t->sku_number = smbios_add_prop_si(ctx, "sku", - SYSID_SM_SYSTEM_SKU, NULL); - t->family = smbios_add_prop_si(ctx, "family", - SYSID_SM_SYSTEM_FAMILY, NULL); - - len = t->length + smbios_string_table_len(ctx); + t->wakeup_type = smbios_get_val_si(ctx, "wakeup-type", + SYSID_SM_SYSTEM_WAKEUP, + SMBIOS_WAKEUP_TYPE_UNKNOWN); + t->sku_number = smbios_add_prop_si(ctx, "sku", SYSID_SM_SYSTEM_SKU, + NULL); + t->family = smbios_add_prop_si(ctx, "family", SYSID_SM_SYSTEM_FAMILY, + NULL); + + len = t->hdr.length + smbios_string_table_len(ctx); *current += len; unmap_sysmem(t); @@ -427,33 +469,53 @@ static int smbios_write_type2(ulong *current, int handle, struct smbios_ctx *ctx) { struct smbios_type2 *t; - int len = sizeof(struct smbios_type2); + int len = sizeof(*t); + u8 *eos_addr; + /* + * reserve the space for the dynamic bytes of contained object handles. + * TODO: len += <obj_handle_num> * SMBIOS_TYPE2_CON_OBJ_HANDLE_SIZE + * obj_handle_num can be from DT node "baseboard" or sysinfo driver. + */ t = map_sysmem(*current, len); - memset(t, 0, sizeof(struct smbios_type2)); + memset(t, 0, len); fill_smbios_header(t, SMBIOS_BOARD_INFORMATION, len, handle); - smbios_set_eos(ctx, t->eos); + + /* eos is at the end of the structure */ + eos_addr = (u8 *)t + len - sizeof(t->eos); + smbios_set_eos(ctx, eos_addr); + t->manufacturer = smbios_add_prop_si(ctx, "manufacturer", SYSID_SM_BASEBOARD_MANUFACTURER, NULL); t->product_name = smbios_add_prop_si(ctx, "product", - SYSID_SM_BASEBOARD_PRODUCT, - NULL); + SYSID_SM_BASEBOARD_PRODUCT, NULL); t->version = smbios_add_prop_si(ctx, "version", - SYSID_SM_BASEBOARD_VERSION, - NULL); - + SYSID_SM_BASEBOARD_VERSION, NULL); t->serial_number = smbios_add_prop_si(ctx, "serial", - SYSID_SM_BASEBOARD_SERIAL, - NULL); + SYSID_SM_BASEBOARD_SERIAL, NULL); t->asset_tag_number = smbios_add_prop_si(ctx, "asset-tag", SYSID_SM_BASEBOARD_ASSET_TAG, NULL); - t->feature_flags = SMBIOS_BOARD_FEATURE_HOSTING; - t->board_type = SMBIOS_BOARD_MOTHERBOARD; + t->feature_flags = smbios_get_val_si(ctx, "feature-flags", + SYSID_SM_BASEBOARD_FEATURE, 0); + + t->chassis_location = + smbios_add_prop_si(ctx, "chassis-location", + SYSID_SM_BASEBOARD_CHASSIS_LOCAT, NULL); + t->board_type = smbios_get_val_si(ctx, "board-type", + SYSID_SM_BASEBOARD_TYPE, + SMBIOS_BOARD_TYPE_UNKNOWN); + + /* + * TODO: + * Populate the Contained Object Handles if they exist + * t->number_contained_objects = <obj_handle_num>; + */ + t->chassis_handle = handle + 1; - len = t->length + smbios_string_table_len(ctx); + len = t->hdr.length + smbios_string_table_len(ctx); *current += len; unmap_sysmem(t); @@ -464,20 +526,77 @@ static int smbios_write_type3(ulong *current, int handle, struct smbios_ctx *ctx) { struct smbios_type3 *t; - int len = sizeof(struct smbios_type3); + int len = sizeof(*t); + u8 *eos_addr; + size_t elem_size = 0; + __maybe_unused u8 *elem_addr; + __maybe_unused u8 *sku_num_addr; + + /* + * reserve the space for the dynamic bytes of contained elements. + * TODO: elem_size = <element_count> * <element_record_length> + * element_count and element_record_length can be from DT node + * "chassis" or sysinfo driver. + */ + len += elem_size; t = map_sysmem(*current, len); - memset(t, 0, sizeof(struct smbios_type3)); + memset(t, 0, len); fill_smbios_header(t, SMBIOS_SYSTEM_ENCLOSURE, len, handle); - smbios_set_eos(ctx, t->eos); - t->manufacturer = smbios_add_prop(ctx, "manufacturer", NULL); - t->chassis_type = SMBIOS_ENCLOSURE_DESKTOP; - t->bootup_state = SMBIOS_STATE_SAFE; - t->power_supply_state = SMBIOS_STATE_SAFE; - t->thermal_state = SMBIOS_STATE_SAFE; - t->security_status = SMBIOS_SECURITY_NONE; - - len = t->length + smbios_string_table_len(ctx); +#if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLE_VERBOSE) + elem_addr = (u8 *)t + offsetof(struct smbios_type3, sku_number); + sku_num_addr = elem_addr + elem_size; +#endif + /* eos is at the end of the structure */ + eos_addr = (u8 *)t + len - sizeof(t->eos); + smbios_set_eos(ctx, eos_addr); + + t->manufacturer = smbios_add_prop_si(ctx, "manufacturer", + SYSID_SM_ENCLOSURE_MANUFACTURER, + NULL); + t->chassis_type = smbios_get_val_si(ctx, "chassis-type", + SYSID_SM_ENCLOSURE_TYPE, + SMBIOS_ENCLOSURE_UNKNOWN); + t->bootup_state = smbios_get_val_si(ctx, "bootup-state", + SYSID_SM_ENCLOSURE_BOOTUP, + SMBIOS_STATE_UNKNOWN); + t->power_supply_state = smbios_get_val_si(ctx, "power-supply-state", + SYSID_SM_ENCLOSURE_POW, + SMBIOS_STATE_UNKNOWN); + t->thermal_state = smbios_get_val_si(ctx, "thermal-state", + SYSID_SM_ENCLOSURE_THERMAL, + SMBIOS_STATE_UNKNOWN); + t->security_status = smbios_get_val_si(ctx, "security-status", + SYSID_SM_ENCLOSURE_SECURITY, + SMBIOS_SECURITY_UNKNOWN); + +#if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLE_VERBOSE) + t->version = smbios_add_prop_si(ctx, "version", + SYSID_SM_ENCLOSURE_VERSION, NULL); + t->serial_number = smbios_add_prop_si(ctx, "serial", + SYSID_SM_ENCLOSURE_SERIAL, NULL); + t->asset_tag_number = smbios_add_prop_si(ctx, "asset-tag", + SYSID_SM_BASEBOARD_ASSET_TAG, + NULL); + t->oem_defined = smbios_get_val_si(ctx, "oem-defined", + SYSID_SM_ENCLOSURE_OEM, 0); + t->height = smbios_get_val_si(ctx, "height", + SYSID_SM_ENCLOSURE_HEIGHT, 0); + t->number_of_power_cords = + smbios_get_val_si(ctx, "number-of-power-cords", + SYSID_SM_ENCLOSURE_POWCORE_NUM, 0); + + /* + * TODO: Populate the Contained Element Record if they exist + * t->element_count = <element_num>; + * t->element_record_length = <element_len>; + */ + + *sku_num_addr = smbios_add_prop_si(ctx, "sku", SYSID_SM_ENCLOSURE_SKU, + NULL); +#endif + + len = t->hdr.length + smbios_string_table_len(ctx); *current += len; unmap_sysmem(t); @@ -490,6 +609,8 @@ static void smbios_write_type4_dm(struct smbios_type4 *t, u16 processor_family = SMBIOS_PROCESSOR_FAMILY_UNKNOWN; const char *vendor = NULL; const char *name = NULL; + __maybe_unused void *id_data = NULL; + __maybe_unused size_t id_size = 0; #ifdef CONFIG_CPU char processor_name[49]; @@ -511,46 +632,234 @@ static void smbios_write_type4_dm(struct smbios_type4 *t, name = processor_name; } #endif + if (processor_family == SMBIOS_PROCESSOR_FAMILY_UNKNOWN) + processor_family = + smbios_get_val_si(ctx, "family", + SYSID_SM_PROCESSOR_FAMILY, + SMBIOS_PROCESSOR_FAMILY_UNKNOWN); + + if (processor_family == SMBIOS_PROCESSOR_FAMILY_EXT) + t->processor_family2 = + smbios_get_val_si(ctx, "family2", + SYSID_SM_PROCESSOR_FAMILY2, + SMBIOS_PROCESSOR_FAMILY_UNKNOWN); + + t->processor_family = processor_family; + t->processor_manufacturer = + smbios_add_prop_si(ctx, "manufacturer", + SYSID_SM_PROCESSOR_MANUFACT, vendor); + t->processor_version = smbios_add_prop_si(ctx, "version", + SYSID_SM_PROCESSOR_VERSION, + name); + +#if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLE_VERBOSE) + if (t->processor_id[0] || t->processor_id[1] || + sysinfo_get_data(ctx->dev, SYSID_SM_PROCESSOR_ID, &id_data, + &id_size)) + return; - t->processor_family = 0xfe; - t->processor_family2 = processor_family; - t->processor_manufacturer = smbios_add_prop(ctx, NULL, vendor); - t->processor_version = smbios_add_prop(ctx, NULL, name); + if (id_data && id_size == sizeof(t->processor_id)) + memcpy((u8 *)t->processor_id, id_data, id_size); +#endif } static int smbios_write_type4(ulong *current, int handle, struct smbios_ctx *ctx) { struct smbios_type4 *t; - int len = sizeof(struct smbios_type4); + int len = sizeof(*t); + __maybe_unused void *hdl; + __maybe_unused size_t hdl_size; t = map_sysmem(*current, len); - memset(t, 0, sizeof(struct smbios_type4)); + memset(t, 0, len); fill_smbios_header(t, SMBIOS_PROCESSOR_INFORMATION, len, handle); smbios_set_eos(ctx, t->eos); - t->processor_type = SMBIOS_PROCESSOR_TYPE_CENTRAL; + t->socket_design = smbios_add_prop_si(ctx, "socket-design", + SYSID_SM_PROCESSOR_SOCKET, NULL); + t->processor_type = smbios_get_val_si(ctx, "processor-type", + SYSID_SM_PROCESSOR_TYPE, + SMBIOS_PROCESSOR_TYPE_UNKNOWN); smbios_write_type4_dm(t, ctx); - t->status = SMBIOS_PROCESSOR_STATUS_ENABLED; - t->processor_upgrade = SMBIOS_PROCESSOR_UPGRADE_NONE; - t->l1_cache_handle = 0xffff; - t->l2_cache_handle = 0xffff; - t->l3_cache_handle = 0xffff; - len = t->length + smbios_string_table_len(ctx); + t->status = smbios_get_val_si(ctx, "processor-status", + SYSID_SM_PROCESSOR_STATUS, + SMBIOS_PROCESSOR_STATUS_UNKNOWN); + t->processor_upgrade = + smbios_get_val_si(ctx, "upgrade", SYSID_SM_PROCESSOR_UPGRADE, + SMBIOS_PROCESSOR_UPGRADE_UNKNOWN); + + t->l1_cache_handle = SMBIOS_CACHE_HANDLE_NONE; + t->l2_cache_handle = SMBIOS_CACHE_HANDLE_NONE; + t->l3_cache_handle = SMBIOS_CACHE_HANDLE_NONE; + +#if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLE_VERBOSE) + t->voltage = smbios_get_val_si(ctx, "voltage", + SYSID_SM_PROCESSOR_VOLTAGE, 0); + t->external_clock = smbios_get_val_si(ctx, "external-clock", + SYSID_SM_PROCESSOR_EXT_CLOCK, 0); + t->max_speed = smbios_get_val_si(ctx, "max-speed", + SYSID_SM_PROCESSOR_MAX_SPEED, 0); + t->current_speed = smbios_get_val_si(ctx, "current-speed", + SYSID_SM_PROCESSOR_CUR_SPEED, 0); + + /* Read the cache handles */ + if (!sysinfo_get_data(ctx->dev, SYSID_SM_CACHE_HANDLE, &hdl, + &hdl_size) && + (hdl_size == SYSINFO_CACHE_LVL_MAX * sizeof(u16))) { + u16 *handle = (u16 *)hdl; + + if (*handle) + t->l1_cache_handle = *handle; + + handle++; + if (*handle) + t->l2_cache_handle = *handle; + + handle++; + if (*handle) + t->l3_cache_handle = *handle; + } + + t->serial_number = smbios_add_prop_si(ctx, "serial", + SYSID_SM_PROCESSOR_SN, NULL); + t->asset_tag = smbios_add_prop_si(ctx, "asset-tag", + SYSID_SM_PROCESSOR_ASSET_TAG, NULL); + t->part_number = smbios_add_prop_si(ctx, "part-number", + SYSID_SM_PROCESSOR_PN, NULL); + t->core_count = smbios_get_val_si(ctx, "core-count", + SYSID_SM_PROCESSOR_CORE_CNT, 0); + t->core_enabled = smbios_get_val_si(ctx, "core-enabled", + SYSID_SM_PROCESSOR_CORE_EN, 0); + t->thread_count = smbios_get_val_si(ctx, "thread-count", + SYSID_SM_PROCESSOR_THREAD_CNT, 0); + t->processor_characteristics = + smbios_get_val_si(ctx, "characteristics", + SYSID_SM_PROCESSOR_CHARA, + SMBIOS_PROCESSOR_UND); + t->core_count2 = smbios_get_val_si(ctx, "core-count2", + SYSID_SM_PROCESSOR_CORE_CNT2, 0); + t->core_enabled2 = smbios_get_val_si(ctx, "core-enabled2", + SYSID_SM_PROCESSOR_CORE_EN2, 0); + t->thread_count2 = smbios_get_val_si(ctx, "thread-count2", + SYSID_SM_PROCESSOR_THREAD_CNT2, 0); + t->thread_enabled = smbios_get_val_si(ctx, "thread-enabled", + SYSID_SM_PROCESSOR_THREAD_EN, 0); +#endif + + len = t->hdr.length + smbios_string_table_len(ctx); + *current += len; + unmap_sysmem(t); + + return len; +} + +#if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLE_VERBOSE) + +static int smbios_write_type7_1level(ulong *current, int handle, + struct smbios_ctx *ctx, int level) +{ + struct smbios_type7 *t; + int len = sizeof(*t); + void *hdl; + size_t hdl_size; + + t = map_sysmem(*current, len); + memset(t, 0, len); + fill_smbios_header(t, SMBIOS_CACHE_INFORMATION, len, handle); + smbios_set_eos(ctx, t->eos); + + t->socket_design = smbios_add_prop_si(ctx, "socket-design", + SYSID_SM_CACHE_SOCKET + level, + NULL); + t->config.data = smbios_get_val_si(ctx, "config", + SYSID_SM_CACHE_CONFIG + level, + (level - 1) | SMBIOS_CACHE_OP_UND); + t->max_size.data = smbios_get_val_si(ctx, "max-size", + SYSID_SM_CACHE_MAX_SIZE + level, + 0); + t->inst_size.data = smbios_get_val_si(ctx, "installed-size", + SYSID_SM_CACHE_INST_SIZE + level, + 0); + t->supp_sram_type.data = + smbios_get_val_si(ctx, "supported-sram-type", + SYSID_SM_CACHE_SUPSRAM_TYPE + level, + SMBIOS_CACHE_SRAM_TYPE_UNKNOWN); + t->curr_sram_type.data = + smbios_get_val_si(ctx, "current-sram-type", + SYSID_SM_CACHE_CURSRAM_TYPE + level, + SMBIOS_CACHE_SRAM_TYPE_UNKNOWN); + t->speed = smbios_get_val_si(ctx, "speed", SYSID_SM_CACHE_SPEED + level, + 0); + t->err_corr_type = smbios_get_val_si(ctx, "error-correction-type", + SYSID_SM_CACHE_ERRCOR_TYPE + level, + SMBIOS_CACHE_ERRCORR_UNKNOWN); + t->sys_cache_type = + smbios_get_val_si(ctx, "system-cache-type", + SYSID_SM_CACHE_SCACHE_TYPE + level, + SMBIOS_CACHE_SYSCACHE_TYPE_UNKNOWN); + t->associativity = smbios_get_val_si(ctx, "associativity", + SYSID_SM_CACHE_ASSOC + level, + SMBIOS_CACHE_ASSOC_UNKNOWN); + t->max_size2.data = smbios_get_val_si(ctx, "max-size2", + SYSID_SM_CACHE_MAX_SIZE2 + level, + 0); + t->inst_size2.data = + smbios_get_val_si(ctx, "installed-size2", + SYSID_SM_CACHE_INST_SIZE2 + level, 0); + + /* Save the cache handles */ + if (!sysinfo_get_data(ctx->dev, SYSID_SM_CACHE_HANDLE, &hdl, + &hdl_size)) { + if (hdl_size == SYSINFO_CACHE_LVL_MAX * sizeof(u16)) + *((u16 *)hdl + level) = handle; + } + + len = t->hdr.length + smbios_string_table_len(ctx); *current += len; unmap_sysmem(t); return len; } +static int smbios_write_type7(ulong *current, int handle, + struct smbios_ctx *ctx) +{ + int len = 0; + int i, level; + ofnode parent = ctx->node; + struct smbios_ctx ctx_bak; + + memcpy(&ctx_bak, ctx, sizeof(ctx_bak)); + + /* Get the number of level */ + level = smbios_get_val_si(ctx, NULL, SYSID_SM_CACHE_LEVEL, 0); + if (level >= SYSINFO_CACHE_LVL_MAX) /* Error, return 0-length */ + return 0; + + for (i = 0; i <= level; i++) { + char buf[9] = ""; + + if (!snprintf(buf, sizeof(buf), "l%d-cache", i + 1)) + return 0; + ctx->subnode_name = buf; + ctx->node = ofnode_find_subnode(parent, ctx->subnode_name); + len += smbios_write_type7_1level(current, handle++, ctx, i); + memcpy(ctx, &ctx_bak, sizeof(*ctx)); + } + return len; +} + +#endif /* #if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLE_VERBOSE) */ + static int smbios_write_type32(ulong *current, int handle, struct smbios_ctx *ctx) { struct smbios_type32 *t; - int len = sizeof(struct smbios_type32); + int len = sizeof(*t); t = map_sysmem(*current, len); - memset(t, 0, sizeof(struct smbios_type32)); + memset(t, 0, len); fill_smbios_header(t, SMBIOS_SYSTEM_BOOT_INFORMATION, len, handle); smbios_set_eos(ctx, t->eos); @@ -564,10 +873,10 @@ static int smbios_write_type127(ulong *current, int handle, struct smbios_ctx *ctx) { struct smbios_type127 *t; - int len = sizeof(struct smbios_type127); + int len = sizeof(*t); t = map_sysmem(*current, len); - memset(t, 0, sizeof(struct smbios_type127)); + memset(t, 0, len); fill_smbios_header(t, SMBIOS_END_OF_TABLE, len, handle); *current += len; @@ -582,7 +891,11 @@ static struct smbios_write_method smbios_write_funcs[] = { { smbios_write_type2, "baseboard", }, /* Type 3 must immediately follow type 2 due to chassis handle. */ { smbios_write_type3, "chassis", }, - { smbios_write_type4, }, +#if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLE_VERBOSE) + /* Type 7 must ahead of type 4 to get cache handles. */ + { smbios_write_type7, "cache", }, +#endif + { smbios_write_type4, "processor"}, { smbios_write_type32, }, { smbios_write_type127 }, }; @@ -599,7 +912,7 @@ ulong write_smbios_table(ulong addr) int i; ctx.node = ofnode_null(); - if (IS_ENABLED(CONFIG_OF_CONTROL) && CONFIG_IS_ENABLED(SYSINFO)) { + if (CONFIG_IS_ENABLED(SYSINFO)) { uclass_first_device(UCLASS_SYSINFO, &ctx.dev); if (ctx.dev) { int ret; diff --git a/lib/tpm-v2.c b/lib/tpm-v2.c index ad2b5ab0c32..bc750b7ca19 100644 --- a/lib/tpm-v2.c +++ b/lib/tpm-v2.c @@ -23,6 +23,27 @@ #include "tpm-utils.h" +static int tpm2_update_active_banks(struct udevice *dev) +{ + struct tpm_chip_priv *priv = dev_get_uclass_priv(dev); + struct tpml_pcr_selection pcrs; + int ret, i; + + ret = tpm2_get_pcr_info(dev, &pcrs); + if (ret) + return ret; + + priv->active_bank_count = 0; + for (i = 0; i < pcrs.count; i++) { + if (!tpm2_is_active_bank(&pcrs.selection[i])) + continue; + priv->active_banks[priv->active_bank_count] = pcrs.selection[i].hash; + priv->active_bank_count++; + } + + return 0; +} + u32 tpm2_startup(struct udevice *dev, enum tpm2_startup_types mode) { const u8 command_v2[12] = { @@ -41,7 +62,7 @@ u32 tpm2_startup(struct udevice *dev, enum tpm2_startup_types mode) if (ret && ret != TPM2_RC_INITIALIZE) return ret; - return 0; + return tpm2_update_active_banks(dev); } u32 tpm2_self_test(struct udevice *dev, enum tpm2_yes_no full_test) @@ -69,8 +90,10 @@ u32 tpm2_auto_start(struct udevice *dev) rc = tpm2_self_test(dev, TPMI_YES); } + if (rc) + return rc; - return rc; + return tpm2_update_active_banks(dev); } u32 tpm2_clear(struct udevice *dev, u32 handle, const char *pw, @@ -197,7 +220,7 @@ u32 tpm2_pcr_extend(struct udevice *dev, u32 index, u32 algorithm, if (!digest) return -EINVAL; - if (!tpm2_allow_extend(dev)) { + if (!tpm2_check_active_banks(dev)) { log_err("Cannot extend PCRs if all the TPM enabled algorithms are not supported\n"); return -EINVAL; } @@ -847,7 +870,7 @@ u32 tpm2_enable_nvcommits(struct udevice *dev, uint vendor_cmd, return 0; } -bool tpm2_is_active_pcr(struct tpms_pcr_selection *selection) +bool tpm2_is_active_bank(struct tpms_pcr_selection *selection) { int i; @@ -884,6 +907,18 @@ const char *tpm2_algorithm_name(enum tpm2_algorithms algo) return ""; } +bool tpm2_algorithm_supported(enum tpm2_algorithms algo) +{ + size_t i; + + for (i = 0; i < ARRAY_SIZE(hash_algo_list); ++i) { + if (hash_algo_list[i].hash_alg == algo) + return hash_algo_list[i].supported; + } + + return false; +} + u16 tpm2_algorithm_to_len(enum tpm2_algorithms algo) { size_t i; @@ -896,7 +931,7 @@ u16 tpm2_algorithm_to_len(enum tpm2_algorithms algo) return 0; } -bool tpm2_allow_extend(struct udevice *dev) +bool tpm2_check_active_banks(struct udevice *dev) { struct tpml_pcr_selection pcrs; size_t i; @@ -907,10 +942,33 @@ bool tpm2_allow_extend(struct udevice *dev) return false; for (i = 0; i < pcrs.count; i++) { - if (tpm2_is_active_pcr(&pcrs.selection[i]) && - !tpm2_algorithm_to_len(pcrs.selection[i].hash)) + if (tpm2_is_active_bank(&pcrs.selection[i]) && + !tpm2_algorithm_supported(pcrs.selection[i].hash)) return false; } return true; } + +void tpm2_print_active_banks(struct udevice *dev) +{ + struct tpml_pcr_selection pcrs; + size_t i; + int rc; + + rc = tpm2_get_pcr_info(dev, &pcrs); + if (rc) { + log_err("Can't retrieve active PCRs\n"); + return; + } + + for (i = 0; i < pcrs.count; i++) { + if (tpm2_is_active_bank(&pcrs.selection[i])) { + const char *str; + + str = tpm2_algorithm_name(pcrs.selection[i].hash); + if (str) + log_info("%s\n", str); + } + } +} diff --git a/lib/tpm_tcg2.c b/lib/tpm_tcg2.c index 7f868cc8837..4134d93a358 100644 --- a/lib/tpm_tcg2.c +++ b/lib/tpm_tcg2.c @@ -20,38 +20,36 @@ #include <linux/unaligned/le_byteshift.h> #include "tpm-utils.h" -int tcg2_get_pcr_info(struct udevice *dev, u32 *supported_pcr, u32 *active_pcr, - u32 *pcr_banks) +int tcg2_get_pcr_info(struct udevice *dev, u32 *supported_bank, u32 *active_bank, + u32 *bank_num) { - u8 response[(sizeof(struct tpms_capability_data) - - offsetof(struct tpms_capability_data, data))]; struct tpml_pcr_selection pcrs; size_t i; u32 ret; - *supported_pcr = 0; - *active_pcr = 0; - *pcr_banks = 0; - memset(response, 0, sizeof(response)); + *supported_bank = 0; + *active_bank = 0; + *bank_num = 0; ret = tpm2_get_pcr_info(dev, &pcrs); if (ret) return ret; for (i = 0; i < pcrs.count; i++) { - u32 hash_mask = tcg2_algorithm_to_mask(pcrs.selection[i].hash); + struct tpms_pcr_selection *sel = &pcrs.selection[i]; + u32 hash_mask = tcg2_algorithm_to_mask(sel->hash); - if (hash_mask) { - *supported_pcr |= hash_mask; - if (tpm2_is_active_pcr(&pcrs.selection[i])) - *active_pcr |= hash_mask; - } else { - printf("%s: unknown algorithm %x\n", __func__, - pcrs.selection[i].hash); - } + if (tpm2_algorithm_supported(sel->hash)) + *supported_bank |= hash_mask; + else + log_warning("%s: unknown algorithm %x\n", __func__, + sel->hash); + + if (tpm2_is_active_bank(sel)) + *active_bank |= hash_mask; } - *pcr_banks = pcrs.count; + *bank_num = pcrs.count; return 0; } @@ -95,57 +93,64 @@ u32 tcg2_event_get_size(struct tpml_digest_values *digest_list) int tcg2_create_digest(struct udevice *dev, const u8 *input, u32 length, struct tpml_digest_values *digest_list) { + struct tpm_chip_priv *priv = dev_get_uclass_priv(dev); u8 final[sizeof(union tpmu_ha)]; +#if IS_ENABLED(CONFIG_SHA256) sha256_context ctx_256; +#endif +#if IS_ENABLED(CONFIG_SHA512) sha512_context ctx_512; +#endif +#if IS_ENABLED(CONFIG_SHA1) sha1_context ctx; - u32 active; +#endif size_t i; u32 len; - int rc; - - rc = tcg2_get_active_pcr_banks(dev, &active); - if (rc) - return rc; digest_list->count = 0; - for (i = 0; i < ARRAY_SIZE(hash_algo_list); ++i) { - if (!(active & hash_algo_list[i].hash_mask)) - continue; + for (i = 0; i < priv->active_bank_count; i++) { - switch (hash_algo_list[i].hash_alg) { + switch (priv->active_banks[i]) { +#if IS_ENABLED(CONFIG_SHA1) case TPM2_ALG_SHA1: sha1_starts(&ctx); sha1_update(&ctx, input, length); sha1_finish(&ctx, final); len = TPM2_SHA1_DIGEST_SIZE; break; +#endif +#if IS_ENABLED(CONFIG_SHA256) case TPM2_ALG_SHA256: sha256_starts(&ctx_256); sha256_update(&ctx_256, input, length); sha256_finish(&ctx_256, final); len = TPM2_SHA256_DIGEST_SIZE; break; +#endif +#if IS_ENABLED(CONFIG_SHA384) case TPM2_ALG_SHA384: sha384_starts(&ctx_512); sha384_update(&ctx_512, input, length); sha384_finish(&ctx_512, final); len = TPM2_SHA384_DIGEST_SIZE; break; +#endif +#if IS_ENABLED(CONFIG_SHA512) case TPM2_ALG_SHA512: sha512_starts(&ctx_512); sha512_update(&ctx_512, input, length); sha512_finish(&ctx_512, final); len = TPM2_SHA512_DIGEST_SIZE; break; +#endif default: printf("%s: unsupported algorithm %x\n", __func__, - hash_algo_list[i].hash_alg); + priv->active_banks[i]); continue; } digest_list->digests[digest_list->count].hash_alg = - hash_algo_list[i].hash_alg; + priv->active_banks[i]; memcpy(&digest_list->digests[digest_list->count].digest, final, len); digest_list->count++; @@ -216,37 +221,17 @@ static int tcg2_log_append_check(struct tcg2_event_log *elog, u32 pcr_index, static int tcg2_log_init(struct udevice *dev, struct tcg2_event_log *elog) { + struct tpm_chip_priv *priv = dev_get_uclass_priv(dev); struct tcg_efi_spec_id_event *ev; struct tcg_pcr_event *log; u32 event_size; u32 count = 0; u32 log_size; - u32 active; size_t i; u16 len; - int rc; - - rc = tcg2_get_active_pcr_banks(dev, &active); - if (rc) - return rc; + count = priv->active_bank_count; event_size = offsetof(struct tcg_efi_spec_id_event, digest_sizes); - for (i = 0; i < ARRAY_SIZE(hash_algo_list); ++i) { - if (!(active & hash_algo_list[i].hash_mask)) - continue; - - switch (hash_algo_list[i].hash_alg) { - case TPM2_ALG_SHA1: - case TPM2_ALG_SHA256: - case TPM2_ALG_SHA384: - case TPM2_ALG_SHA512: - count++; - break; - default: - continue; - } - } - event_size += 1 + (sizeof(struct tcg_efi_spec_id_event_algorithm_size) * count); log_size = offsetof(struct tcg_pcr_event, event) + event_size; @@ -273,19 +258,11 @@ static int tcg2_log_init(struct udevice *dev, struct tcg2_event_log *elog) ev->uintn_size = sizeof(size_t) / sizeof(u32); put_unaligned_le32(count, &ev->number_of_algorithms); - count = 0; - for (i = 0; i < ARRAY_SIZE(hash_algo_list); ++i) { - if (!(active & hash_algo_list[i].hash_mask)) - continue; - - len = hash_algo_list[i].hash_len; - if (!len) - continue; - - put_unaligned_le16(hash_algo_list[i].hash_alg, - &ev->digest_sizes[count].algorithm_id); - put_unaligned_le16(len, &ev->digest_sizes[count].digest_size); - count++; + for (i = 0; i < count; ++i) { + len = tpm2_algorithm_to_len(priv->active_banks[i]); + put_unaligned_le16(priv->active_banks[i], + &ev->digest_sizes[i].algorithm_id); + put_unaligned_le16(len, &ev->digest_sizes[i].digest_size); } *((u8 *)ev + (event_size - 1)) = 0; @@ -396,7 +373,6 @@ static int tcg2_log_parse(struct udevice *dev, struct tcg2_event_log *elog) u16 len; int rc; u32 i; - u16 j; if (elog->log_size <= offsetof(struct tcg_pcr_event, event)) return 0; @@ -435,40 +411,51 @@ static int tcg2_log_parse(struct udevice *dev, struct tcg2_event_log *elog) if (evsz != calc_size) return 0; - rc = tcg2_get_active_pcr_banks(dev, &active); - if (rc) - return rc; - + /* + * Go through the algorithms the EventLog contains. If the EventLog + * algorithms don't match the active TPM ones exit and report the + * erroneous banks. + * We've already checked that U-Boot supports all the enabled TPM + * algorithms, so just check the EvenLog against the TPM active ones. + */ digest_list.count = 0; log_active = 0; - for (i = 0; i < count; ++i) { algo = get_unaligned_le16(&event->digest_sizes[i].algorithm_id); mask = tcg2_algorithm_to_mask(algo); - if (!(active & mask)) - return 0; - switch (algo) { case TPM2_ALG_SHA1: case TPM2_ALG_SHA256: case TPM2_ALG_SHA384: case TPM2_ALG_SHA512: len = get_unaligned_le16(&event->digest_sizes[i].digest_size); - if (tpm2_algorithm_to_len(algo) != len) - return 0; + if (tpm2_algorithm_to_len(algo) != len) { + log_err("EventLog invalid algorithm length\n"); + return -1; + } digest_list.digests[digest_list.count++].hash_alg = algo; break; default: - return 0; + /* + * We can ignore this if the TPM PCRs is not extended + * by the previous bootloader. But for now just exit + */ + log_err("EventLog has unsupported algorithm 0x%x\n", + algo); + return -1; } - log_active |= mask; } - /* Ensure the previous firmware extended all the PCRs. */ - if (log_active != active) - return 0; + rc = tcg2_get_active_pcr_banks(dev, &active); + if (rc) + return rc; + /* If the EventLog and active algorithms don't match exit */ + if (log_active != active) { + log_err("EventLog doesn't contain all active PCR banks\n"); + return -1; + } /* Read PCR0 to check if previous firmware extended the PCRs or not. */ rc = tcg2_pcr_read(dev, 0, &digest_list); @@ -476,17 +463,13 @@ static int tcg2_log_parse(struct udevice *dev, struct tcg2_event_log *elog) return rc; for (i = 0; i < digest_list.count; ++i) { - len = tpm2_algorithm_to_len(digest_list.digests[i].hash_alg); - for (j = 0; j < len; ++j) { - if (digest_list.digests[i].digest.sha512[j]) - break; - } + u8 hash_buf[TPM2_SHA512_DIGEST_SIZE] = { 0 }; + u16 hash_alg = digest_list.digests[i].hash_alg; - /* PCR is non-zero; it has been extended, so skip extending. */ - if (j != len) { + if (memcmp((u8 *)&digest_list.digests[i].digest, hash_buf, + tpm2_algorithm_to_len(hash_alg))) digest_list.count = 0; - break; - } + } return tcg2_replay_eventlog(elog, dev, &digest_list, @@ -569,11 +552,36 @@ int tcg2_log_prepare_buffer(struct udevice *dev, struct tcg2_event_log *elog, bool ignore_existing_log) { struct tcg2_event_log log; - int rc; + int rc, i; elog->log_position = 0; elog->found = false; + /* + * Make sure U-Boot is compiled with all the active PCRs + * since we are about to create an EventLog and we won't + * measure anything if the PCR banks don't match + */ + if (!tpm2_check_active_banks(dev)) { + log_err("Cannot create EventLog\n"); + log_err("Mismatch between U-Boot and TPM hash algos\n"); + log_info("TPM:\n"); + tpm2_print_active_banks(dev); + log_info("U-Boot:\n"); + for (i = 0; i < ARRAY_SIZE(hash_algo_list); i++) { + const struct digest_info *algo = &hash_algo_list[i]; + const char *str; + + if (!algo->supported) + continue; + + str = tpm2_algorithm_name(algo->hash_alg); + if (str) + log_info("%s\n", str); + } + return -EINVAL; + } + rc = tcg2_platform_get_log(dev, (void **)&log.log, &log.log_size); if (!rc) { log.log_position = 0; diff --git a/net/eth_bootdev.c b/net/eth_bootdev.c index 6ee54e3c790..b0fca6e8313 100644 --- a/net/eth_bootdev.c +++ b/net/eth_bootdev.c @@ -64,9 +64,23 @@ static int eth_bootdev_bind(struct udevice *dev) return 0; } +/** + * eth_bootdev_hunt() - probe all network devices + * + * Network devices can also come from USB, but that is a higher + * priority (BOOTDEVP_5_SCAN_SLOW) than network, so it should have been + * enumerated already. If something like 'bootflow scan dhcp' is used, + * then the user will need to run 'usb start' first. + * + * @info: info structure describing this hunter + * @show: true to show information from the hunter + * + * Return: 0 if device found, -EINVAL otherwise + */ static int eth_bootdev_hunt(struct bootdev_hunter *info, bool show) { int ret; + struct udevice *dev = NULL; if (!test_eth_enabled()) return 0; @@ -78,19 +92,11 @@ static int eth_bootdev_hunt(struct bootdev_hunter *info, bool show) log_warning("Failed to init PCI (%dE)\n", ret); } - /* - * Ethernet devices can also come from USB, but that is a higher - * priority (BOOTDEVP_5_SCAN_SLOW) than ethernet, so it should have been - * enumerated already. If something like 'bootflow scan dhcp' is used - * then the user will need to run 'usb start' first. - */ - if (IS_ENABLED(CONFIG_CMD_DHCP)) { - ret = dhcp_run(0, NULL, false); - if (ret) - return -EINVAL; - } + ret = -EINVAL; + uclass_foreach_dev_probe(UCLASS_ETH, dev) + ret = 0; - return 0; + return ret; } struct bootdev_ops eth_bootdev_ops = { diff --git a/net/ndisc.c b/net/ndisc.c index d417c5987ac..641cf6d8385 100644 --- a/net/ndisc.c +++ b/net/ndisc.c @@ -460,8 +460,8 @@ int ndisc_receive(struct ethernet_hdr *et, struct ip6_hdr *ip6, int len) ndisc_extract_enetaddr(ndisc, neigh_eth_addr); /* save address for later use */ - if (!net_nd_packet_mac) - net_nd_packet_mac = neigh_eth_addr; + if (net_nd_packet_mac) + memcpy(net_nd_packet_mac, neigh_eth_addr, 6); /* modify header, and transmit it */ memcpy(((struct ethernet_hdr *)net_nd_tx_packet)->et_dest, diff --git a/net/tftp.c b/net/tftp.c index 8f948204a6f..fd9c9492929 100644 --- a/net/tftp.c +++ b/net/tftp.c @@ -478,6 +478,7 @@ static void tftp_handler(uchar *pkt, unsigned dest, struct in_addr sip, case TFTP_ACK: #ifdef CONFIG_CMD_TFTPPUT if (tftp_put_active) { + timeout_count = 0; if (tftp_put_final_block_sent) { tftp_complete(); } else { diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index 54403040f00..18993435eae 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -523,10 +523,10 @@ $(obj)/%.efi: $(obj)/%_efi.so KBUILD_EFILDFLAGS = -nostdlib -zexecstack -znocombreloc -znorelro KBUILD_EFILDFLAGS += $(call ld-option,--no-warn-rwx-segments) quiet_cmd_efi_ld = LD $@ -cmd_efi_ld = $(LD) $(KBUILD_EFILDFLAGS) -T $(EFI_LDS_PATH) \ +cmd_efi_ld = $(LD) $(KBUILD_EFILDFLAGS) -L $(srctree) -T $(EFI_LDS_PATH) \ -shared -Bsymbolic -s $^ -o $@ -EFI_LDS_PATH = $(srctree)/arch/$(ARCH)/lib/$(EFI_LDS) +EFI_LDS_PATH = arch/$(ARCH)/lib/$(EFI_LDS) $(obj)/efi_crt0.o: $(srctree)/arch/$(ARCH)/lib/$(EFI_CRT0:.o=.S) FORCE $(call if_changed_dep,as_o_S) diff --git a/scripts/Makefile.xpl b/scripts/Makefile.xpl index dca5f4539d0..abc49fbe6c9 100644 --- a/scripts/Makefile.xpl +++ b/scripts/Makefile.xpl @@ -510,6 +510,7 @@ quiet_cmd_u-boot-spl ?= LTO $@ cmd_u-boot-spl ?= \ ( \ cd $(obj) && \ + touch $(patsubst $(obj)/%,%,$(u-boot-spl-main)) && \ $(CC) -nostdlib -nostartfiles $(LTO_FINAL_LDFLAGS) $(c_flags) \ $(KBUILD_LDFLAGS:%=-Wl,%) $(LDFLAGS_$(@F):%=-Wl,%) \ $(patsubst $(obj)/%,%,$(u-boot-spl-init)) \ @@ -526,6 +527,7 @@ quiet_cmd_u-boot-spl ?= LD $@ cmd_u-boot-spl ?= \ ( \ cd $(obj) && \ + touch $(patsubst $(obj)/%,%,$(u-boot-spl-main)) && \ $(LD) $(KBUILD_LDFLAGS) $(LDFLAGS_$(@F)) \ $(patsubst $(obj)/%,%,$(u-boot-spl-init)) \ --whole-archive \ diff --git a/test/boot/bootflow.c b/test/boot/bootflow.c index e33b08aa8cd..a8735c1c23d 100644 --- a/test/boot/bootflow.c +++ b/test/boot/bootflow.c @@ -15,6 +15,7 @@ #include <efi.h> #include <efi_loader.h> #include <expo.h> +#include <mapmem.h> #ifdef CONFIG_SANDBOX #include <asm/test.h> #endif @@ -77,6 +78,14 @@ static int bootflow_cmd(struct unit_test_state *uts) ut_assert_nextline("(1 bootflow, 1 valid)"); ut_assert_console_end(); + ut_assertok(run_command("bootstd images", 0)); + ut_assert_nextlinen("Seq"); + ut_assert_nextlinen("---"); + ut_assert_nextlinen(" 0 mmc1.bootdev.part_1 extlinux_cfg"); + ut_assert_nextlinen("---"); + ut_assert_nextline("(1 image)"); + ut_assert_console_end(); + return 0; } BOOTSTD_TEST(bootflow_cmd, UTF_DM | UTF_SCAN_FDT | UTF_CONSOLE); @@ -1193,6 +1202,19 @@ static int bootflow_cros(struct unit_test_state *uts) ut_assert_nextlinen("---"); ut_assert_skip_to_line("(3 bootflows, 3 valid)"); + ut_assertok(run_command("bootstd images", 0)); + ut_assert_nextlinen("Seq"); + ut_assert_nextlinen("---"); + ut_assert_nextlinen(" 0 mmc1.bootdev.part_1 extlinux_cfg"); + ut_assert_nextlinen(" 1 mmc5.bootdev.part_2 x86_setup"); + ut_assert_nextlinen(" 1 mmc5.bootdev.part_2 cmdline"); + ut_assert_nextlinen(" 1 mmc5.bootdev.part_2 kernel - 4000 kernel"); + ut_assert_nextlinen(" 2 mmc5.bootdev.part_4 x86_setup"); + ut_assert_nextlinen(" 2 mmc5.bootdev.part_4 cmdline"); + ut_assert_nextlinen(" 2 mmc5.bootdev.part_4 kernel - 4000 kernel"); + ut_assert_nextlinen("---"); + ut_assert_nextline("(7 images)"); + ut_assert_console_end(); return 0; @@ -1307,3 +1329,87 @@ static int bootflow_efi(struct unit_test_state *uts) return 0; } BOOTSTD_TEST(bootflow_efi, UTF_CONSOLE); + +/* Check 'bootflow scan' provides a list of images */ +static int bootstd_images(struct unit_test_state *uts) +{ + static const char *order[] = {"mmc2", "mmc1", "mmc4", "mmc5", NULL}; + const struct legacy_img_hdr *hdr; + const struct bootflow_img *img; + const struct bootflow *bflow; + struct bootstd_priv *std; + const char **old_order; + struct udevice *dev; + ofnode root, node; + ulong data, len; + char *ptr; + + /* get access to the current bootflow */ + ut_assertok(bootstd_get_priv(&std)); + + ut_assertok(prep_mmc_bootdev(uts, "mmc4", true, &old_order)); + + /* bind mmc5 too, for cros */ + root = oftree_root(oftree_default()); + node = ofnode_find_subnode(root, "mmc5"); + ut_assert(ofnode_valid(node)); + ut_assertok(lists_bind_fdt(gd->dm_root, node, &dev, NULL, false)); + + std->bootdev_order = order; + ut_assertok(run_command("bootflow scan", 0)); + ut_assert_console_end(); + std->bootdev_order = old_order; + + ut_assertok(run_command("bootflow list", 0)); + ut_assert_skip_to_line("(4 bootflows, 4 valid)"); + + ut_assertok(run_command("bootstd images", 0)); + ut_assert_nextlinen("Seq"); + ut_assert_nextlinen("---"); + ut_assert_nextlinen(" 0 mmc1.bootdev.part_1 extlinux_cfg"); + ut_assert_nextlinen(" 1 mmc4.bootdev.part_1 script"); + ut_assert_nextlinen(" 1 mmc4.bootdev.part_1 logo"); + ut_assert_nextlinen(" 2 mmc5.bootdev.part_2 x86_setup"); + ut_assert_nextlinen(" 2 mmc5.bootdev.part_2 cmdline"); + ut_assert_nextlinen(" 2 mmc5.bootdev.part_2 kernel -"); + ut_assert_nextlinen(" 3 mmc5.bootdev.part_4 x86_setup"); + ut_assert_nextlinen(" 3 mmc5.bootdev.part_4 cmdline"); + ut_assert_nextlinen(" 3 mmc5.bootdev.part_4 kernel -"); + ut_assert_nextlinen("---"); + ut_assert_nextline("(9 images)"); + + /* check the first image */ + bflow = alist_get(&std->bootflows, 0, struct bootflow); + img = alist_get(&bflow->images, 0, struct bootflow_img); + ut_asserteq_strn("# extlinux.conf", map_sysmem(img->addr, 0)); + + /* check the second image */ + bflow = alist_get(&std->bootflows, 1, struct bootflow); + img = alist_get(&bflow->images, 0, struct bootflow_img); + + /* this is the length of the script in bytes */ + hdr = map_sysmem(img->addr, 0); + image_multi_getimg(hdr, 0, &data, &len); + ptr = (void *)data; + ut_asserteq_strn("# DO NOT EDIT THIS FILE", ptr); + + /* check the ChromiumOS images */ + bflow = alist_get(&std->bootflows, 2, struct bootflow); + img = alist_get(&bflow->images, 1, struct bootflow_img); + ptr = map_sysmem(img->addr, 0); + ut_asserteq_strn("BOOT_IMAGE=/vmlinuz-5.15.0-121-generic root=", ptr); + + /* + * the x86 setup is not a real binary, so just check that it is empty, + * so that if this changes in the future someone will notice and update + * this test + */ + img = alist_get(&bflow->images, 0, struct bootflow_img); + ptr = map_sysmem(img->addr, 0); + ut_asserteq(0, *(ulong *)ptr); + + ut_assert_console_end(); + + return 0; +} +BOOTSTD_TEST(bootstd_images, UTF_CONSOLE); diff --git a/test/common/Makefile b/test/common/Makefile index 53c4f16164d..95bd00741a3 100644 --- a/test/common/Makefile +++ b/test/common/Makefile @@ -1,9 +1,13 @@ # SPDX-License-Identifier: GPL-2.0+ obj-y += cmd_ut_common.o obj-$(CONFIG_AUTOBOOT) += test_autoboot.o + ifneq ($(CONFIG_$(XPL_)BLOBLIST),) +ifdef CONFIG_BLOBLIST_FIXED obj-$(CONFIG_$(XPL_)CMDLINE) += bloblist.o endif +endif + obj-$(CONFIG_CYCLIC) += cyclic.o obj-$(CONFIG_EVENT_DYNAMIC) += event.o obj-y += cread.o diff --git a/test/dm/core.c b/test/dm/core.c index c59ffc6f611..959b834576f 100644 --- a/test/dm/core.c +++ b/test/dm/core.c @@ -186,10 +186,30 @@ static int dm_test_compare_node_name(struct unit_test_state *uts) ut_assert(ofnode_valid(node)); ut_assert(ofnode_name_eq(node, "mmio-bus")); + ut_assert(!ofnode_name_eq(node, "mmio-bus@0")); + return 0; } DM_TEST(dm_test_compare_node_name, UTF_SCAN_PDATA); +/* compare node names ignoring the unit address */ +static int dm_test_compare_node_name_unit(struct unit_test_state *uts) +{ + ofnode node; + + node = ofnode_path("/mmio-bus@0"); + ut_assert(ofnode_valid(node)); + ut_assert(ofnode_name_eq_unit(node, "mmio-bus")); + + ut_assert(ofnode_name_eq_unit(node, "mmio-bus@0")); + ut_assert(!ofnode_name_eq_unit(node, "mmio-bus@1")); + ut_assert(!ofnode_name_eq_unit(node, "mmio-bu")); + ut_assert(!ofnode_name_eq_unit(node, "mmio-buss@0")); + + return 0; +} +DM_TEST(dm_test_compare_node_name_unit, UTF_SCAN_PDATA); + /* Test that binding with uclass plat setting occurs correctly */ static int dm_test_autobind_uclass_pdata_valid(struct unit_test_state *uts) { diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c index f16b643fa3f..4a23a3ca38c 100644 --- a/test/dm/ofnode.c +++ b/test/dm/ofnode.c @@ -1303,6 +1303,25 @@ static int dm_test_ofnode_find_subnode(struct unit_test_state *uts) } DM_TEST(dm_test_ofnode_find_subnode, UTF_SCAN_FDT); +/* check ofnode_find_subnode() with unit addresses */ +static int dm_test_ofnode_find_subnode_unit(struct unit_test_state *uts) +{ + ofnode node, subnode; + + node = ofnode_path("/some-bus"); + ut_assert(ofnode_valid(node)); + subnode = ofnode_find_subnode_unit(node, "c-test@5"); + ut_assert(ofnode_valid(subnode)); + ut_asserteq_str("c-test@5", ofnode_get_name(subnode)); + + subnode = ofnode_find_subnode_unit(node, "c-test"); + ut_assert(ofnode_valid(subnode)); + ut_asserteq_str("c-test@5", ofnode_get_name(subnode)); + + return 0; +} +DM_TEST(dm_test_ofnode_find_subnode_unit, UTF_SCAN_FDT); + /* test ofnode_find_subnode() on the 'other' tree */ static int dm_test_ofnode_find_subnode_ot(struct unit_test_state *uts) { diff --git a/test/dm/sysinfo.c b/test/dm/sysinfo.c index 6c0d2d7e4df..14ebe6b42e7 100644 --- a/test/dm/sysinfo.c +++ b/test/dm/sysinfo.c @@ -19,6 +19,9 @@ static int dm_test_sysinfo(struct unit_test_state *uts) bool called_detect = false; char str[64]; int i; + void *data = NULL; + size_t data_size = 0; + u32 gdata[] = {0xabcdabcd, 0xdeadbeef}; ut_assertok(sysinfo_get(&sysinfo)); ut_assert(sysinfo); @@ -57,6 +60,9 @@ static int dm_test_sysinfo(struct unit_test_state *uts) str)); ut_assertok(strcmp(str, "Yuggoth")); + ut_assertok(sysinfo_get_data(sysinfo, DATA_TEST, &data, &data_size)); + ut_assertok(memcmp(gdata, data, data_size)); + return 0; } DM_TEST(dm_test_sysinfo, UTF_SCAN_PDATA | UTF_SCAN_FDT); diff --git a/test/lib/Makefile b/test/lib/Makefile index f516d001747..24ce6ed8f00 100644 --- a/test/lib/Makefile +++ b/test/lib/Makefile @@ -24,6 +24,8 @@ obj-$(CONFIG_ERRNO_STR) += test_errno_str.o obj-$(CONFIG_UT_LIB_ASN1) += asn1.o obj-$(CONFIG_UT_LIB_RSA) += rsa.o obj-$(CONFIG_AES) += test_aes.o +obj-$(CONFIG_SHA256) += test_sha256_hmac.o +obj-$(CONFIG_HKDF_MBEDTLS) += test_sha256_hkdf.o obj-$(CONFIG_GETOPT) += getopt.o obj-$(CONFIG_CRC8) += test_crc8.o obj-$(CONFIG_UT_LIB_CRYPT) += test_crypt.o diff --git a/test/lib/abuf.c b/test/lib/abuf.c index 7c0481ab610..b38690fe1a9 100644 --- a/test/lib/abuf.c +++ b/test/lib/abuf.c @@ -46,7 +46,29 @@ static int lib_test_abuf_set(struct unit_test_state *uts) } LIB_TEST(lib_test_abuf_set, 0); -/* Test abuf_map_sysmem() */ +/* Test abuf_init_const() */ +static int lib_test_abuf_init_const(struct unit_test_state *uts) +{ + struct abuf buf; + ulong start; + void *ptr; + + start = ut_check_free(); + + ptr = map_sysmem(0x100, 0); + + abuf_init_const(&buf, ptr, 10); + ut_asserteq_ptr(ptr, buf.data); + ut_asserteq(10, buf.size); + + /* No memory should have been allocated */ + ut_assertok(ut_check_delta(start)); + + return 0; +} +LIB_TEST(lib_test_abuf_init_const, 0); + +/* Test abuf_map_sysmem() and abuf_addr() */ static int lib_test_abuf_map_sysmem(struct unit_test_state *uts) { struct abuf buf; @@ -60,6 +82,8 @@ static int lib_test_abuf_map_sysmem(struct unit_test_state *uts) ut_asserteq(TEST_DATA_LEN, buf.size); ut_asserteq(false, buf.alloced); + ut_asserteq(addr, abuf_addr(&buf)); + return 0; } LIB_TEST(lib_test_abuf_map_sysmem, 0); diff --git a/test/lib/test_sha256_hkdf.c b/test/lib/test_sha256_hkdf.c new file mode 100644 index 00000000000..5277b44eba5 --- /dev/null +++ b/test/lib/test_sha256_hkdf.c @@ -0,0 +1,198 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2024 Philippe Reynes <philippe.reynes@softathome.com> + * + * Unit tests for sha256_hkdf functions + */ + +#include <command.h> +#include <test/lib.h> +#include <test/test.h> +#include <test/ut.h> +#include <u-boot/sha256.h> + +struct test_sha256_hkdf_s { + const unsigned char *salt; + int saltlen; + const unsigned char *ikm; + int ikmlen; + const unsigned char *info; + int infolen; + const unsigned char *expected; + int expectedlen; +}; + +/* + * data comes from: + * https://www.rfc-editor.org/rfc/rfc5869 + */ +static unsigned char salt_test1[] = { + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, + 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c }; + +static unsigned char ikm_test1[] = { + 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, + 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b +}; + +static unsigned char info_test1[] = { + 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 0xf8, 0xf9 +}; + +static unsigned char expected_test1[] = { + 0x3c, 0xb2, 0x5f, 0x25, 0xfa, 0xac, 0xd5, 0x7a, + 0x90, 0x43, 0x4f, 0x64, 0xd0, 0x36, 0x2f, 0x2a, + 0x2d, 0x2d, 0x0a, 0x90, 0xcf, 0x1a, 0x5a, 0x4c, + 0x5d, 0xb0, 0x2d, 0x56, 0xec, 0xc4, 0xc5, 0xbf, + 0x34, 0x00, 0x72, 0x08, 0xd5, 0xb8, 0x87, 0x18, + 0x58, 0x65 +}; + +static unsigned char salt_test2[] = { + 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, + 0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f, + 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, + 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f, + 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, + 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f, + 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, + 0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f, + 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, + 0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf, +}; + +static unsigned char ikm_test2[] = { + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, + 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, + 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, + 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, + 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, + 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f, + 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, + 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, + 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, + 0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f, +}; + +static unsigned char info_test2[] = { + 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7, + 0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf, + 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, + 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf, + 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7, + 0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf, + 0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, + 0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef, + 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, + 0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff, +}; + +static unsigned char expected_test2[] = { + 0xb1, 0x1e, 0x39, 0x8d, 0xc8, 0x03, 0x27, 0xa1, + 0xc8, 0xe7, 0xf7, 0x8c, 0x59, 0x6a, 0x49, 0x34, + 0x4f, 0x01, 0x2e, 0xda, 0x2d, 0x4e, 0xfa, 0xd8, + 0xa0, 0x50, 0xcc, 0x4c, 0x19, 0xaf, 0xa9, 0x7c, + 0x59, 0x04, 0x5a, 0x99, 0xca, 0xc7, 0x82, 0x72, + 0x71, 0xcb, 0x41, 0xc6, 0x5e, 0x59, 0x0e, 0x09, + 0xda, 0x32, 0x75, 0x60, 0x0c, 0x2f, 0x09, 0xb8, + 0x36, 0x77, 0x93, 0xa9, 0xac, 0xa3, 0xdb, 0x71, + 0xcc, 0x30, 0xc5, 0x81, 0x79, 0xec, 0x3e, 0x87, + 0xc1, 0x4c, 0x01, 0xd5, 0xc1, 0xf3, 0x43, 0x4f, + 0x1d, 0x87, +}; + +static unsigned char salt_test3[] = { +}; + +static unsigned char ikm_test3[] = { + 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, + 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, + 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, +}; + +static unsigned char info_test3[] = { +}; + +static unsigned char expected_test3[] = { + 0x8d, 0xa4, 0xe7, 0x75, 0xa5, 0x63, 0xc1, 0x8f, + 0x71, 0x5f, 0x80, 0x2a, 0x06, 0x3c, 0x5a, 0x31, + 0xb8, 0xa1, 0x1f, 0x5c, 0x5e, 0xe1, 0x87, 0x9e, + 0xc3, 0x45, 0x4e, 0x5f, 0x3c, 0x73, 0x8d, 0x2d, + 0x9d, 0x20, 0x13, 0x95, 0xfa, 0xa4, 0xb6, 0x1a, + 0x96, 0xc8, +}; + +static struct test_sha256_hkdf_s test_sha256_hkdf[] = { + { + .salt = salt_test1, + .saltlen = sizeof(salt_test1), + .ikm = ikm_test1, + .ikmlen = sizeof(ikm_test1), + .info = info_test1, + .infolen = sizeof(info_test1), + .expected = expected_test1, + .expectedlen = sizeof(expected_test1), + }, + { + .salt = salt_test2, + .saltlen = sizeof(salt_test2), + .ikm = ikm_test2, + .ikmlen = sizeof(ikm_test2), + .info = info_test2, + .infolen = sizeof(info_test2), + .expected = expected_test2, + .expectedlen = sizeof(expected_test2), + }, + { + .salt = salt_test3, + .saltlen = sizeof(salt_test3), + .ikm = ikm_test3, + .ikmlen = sizeof(ikm_test3), + .info = info_test3, + .infolen = sizeof(info_test3), + .expected = expected_test3, + .expectedlen = sizeof(expected_test3), + }, +}; + +static int _lib_test_sha256_hkdf_run(struct unit_test_state *uts, + const unsigned char *salt, int saltlen, + const unsigned char *ikm, int ikmlen, + const unsigned char *info, int infolen, + const unsigned char *expected, + int expectedlen) +{ + unsigned char output[256]; + int ret; + + ut_assert(expectedlen <= sizeof(output)); + ret = sha256_hkdf(salt, saltlen, ikm, ikmlen, info, infolen, output, expectedlen); + ut_assert(!ret); + ut_asserteq_mem(expected, output, expectedlen); + + return 0; +} + +static int lib_test_sha256_hkdf_run(struct unit_test_state *uts, + struct test_sha256_hkdf_s *test) +{ + return _lib_test_sha256_hkdf_run(uts, test->salt, test->saltlen, + test->ikm, test->ikmlen, + test->info, test->infolen, + test->expected, test->expectedlen); +} + +static int lib_test_sha256_hkdf(struct unit_test_state *uts) +{ + int i, ret = 0; + + for (i = 0; i < ARRAY_SIZE(test_sha256_hkdf); i++) { + ret = lib_test_sha256_hkdf_run(uts, &test_sha256_hkdf[i]); + if (ret) + return ret; + } + + return 0; +} + +LIB_TEST(lib_test_sha256_hkdf, 0); diff --git a/test/lib/test_sha256_hmac.c b/test/lib/test_sha256_hmac.c new file mode 100644 index 00000000000..5279dd78e0f --- /dev/null +++ b/test/lib/test_sha256_hmac.c @@ -0,0 +1,294 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2024 Philippe Reynes <philippe.reynes@softathome.com> + * + * Unit tests for sha256_hmac functions + */ + +#include <command.h> +#include <test/lib.h> +#include <test/test.h> +#include <test/ut.h> +#include <u-boot/sha256.h> + +struct test_sha256_hmac_s { + const unsigned char *key; + int keylen; + const unsigned char *input; + int ilen; + const unsigned char *expected; + int elen; +}; + +/* + * data comes from: + * https://datatracker.ietf.org/doc/html/rfc4231 + */ +static unsigned char key_test1[] = { + 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, + 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b }; + +static unsigned char input_test1[] = { + 0x48, 0x69, 0x20, 0x54, 0x68, 0x65, 0x72, 0x65 }; + +static unsigned char expected_test1[] = { + 0xb0, 0x34, 0x4c, 0x61, 0xd8, 0xdb, 0x38, 0x53, + 0x5c, 0xa8, 0xaf, 0xce, 0xaf, 0x0b, 0xf1, 0x2b, + 0x88, 0x1d, 0xc2, 0x00, 0xc9, 0x83, 0x3d, 0xa7, + 0x26, 0xe9, 0x37, 0x6c, 0x2e, 0x32, 0xcf, 0xf7 }; + +static unsigned char key_test2[] = { 0x4a, 0x65, 0x66, 0x65 }; + +static unsigned char input_test2[] = { + 0x77, 0x68, 0x61, 0x74, 0x20, 0x64, 0x6f, 0x20, + 0x79, 0x61, 0x20, 0x77, 0x61, 0x6e, 0x74, 0x20, + 0x66, 0x6f, 0x72, 0x20, 0x6e, 0x6f, 0x74, 0x68, + 0x69, 0x6e, 0x67, 0x3f }; + +static unsigned char expected_test2[] = { + 0x5b, 0xdc, 0xc1, 0x46, 0xbf, 0x60, 0x75, 0x4e, + 0x6a, 0x04, 0x24, 0x26, 0x08, 0x95, 0x75, 0xc7, + 0x5a, 0x00, 0x3f, 0x08, 0x9d, 0x27, 0x39, 0x83, + 0x9d, 0xec, 0x58, 0xb9, 0x64, 0xec, 0x38, 0x43 }; + +static unsigned char key_test3[] = { + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa }; + +static unsigned char input_test3[] = { + 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, + 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, + 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, + 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, + 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, + 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, + 0xdd, 0xdd }; + +static unsigned char expected_test3[] = { + 0x77, 0x3e, 0xa9, 0x1e, 0x36, 0x80, 0x0e, 0x46, + 0x85, 0x4d, 0xb8, 0xeb, 0xd0, 0x91, 0x81, 0xa7, + 0x29, 0x59, 0x09, 0x8b, 0x3e, 0xf8, 0xc1, 0x22, + 0xd9, 0x63, 0x55, 0x14, 0xce, 0xd5, 0x65, 0xfe }; + +static unsigned char key_test4[] = { + 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, + 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10, + 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, + 0x19, +}; + +static unsigned char input_test4[] = { + 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, + 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, + 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, + 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, + 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, + 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, + 0xcd, 0xcd, +}; + +static unsigned char expected_test4[] = { + 0x82, 0x55, 0x8a, 0x38, 0x9a, 0x44, 0x3c, 0x0e, + 0xa4, 0xcc, 0x81, 0x98, 0x99, 0xf2, 0x08, 0x3a, + 0x85, 0xf0, 0xfa, 0xa3, 0xe5, 0x78, 0xf8, 0x07, + 0x7a, 0x2e, 0x3f, 0xf4, 0x67, 0x29, 0x66, 0x5b, +}; + +static unsigned char key_test5[] = { + 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, + 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, + 0x0c, 0x0c, 0x0c, 0x0c, +}; + +static unsigned char input_test5[] = { + 0x54, 0x65, 0x73, 0x74, 0x20, 0x57, 0x69, 0x74, + 0x68, 0x20, 0x54, 0x72, 0x75, 0x6e, 0x63, 0x61, + 0x74, 0x69, 0x6f, 0x6e, +}; + +static unsigned char expected_test5[] = { + 0xa3, 0xb6, 0x16, 0x74, 0x73, 0x10, 0x0e, 0xe0, + 0x6e, 0x0c, 0x79, 0x6c, 0x29, 0x55, 0x55, 0x2b, +}; + +static unsigned char key_test6[] = { + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa }; + +static unsigned char input_test6[] = { + 0x54, 0x65, 0x73, 0x74, 0x20, 0x55, 0x73, 0x69, + 0x6e, 0x67, 0x20, 0x4c, 0x61, 0x72, 0x67, 0x65, + 0x72, 0x20, 0x54, 0x68, 0x61, 0x6e, 0x20, 0x42, + 0x6c, 0x6f, 0x63, 0x6b, 0x2d, 0x53, 0x69, 0x7a, + 0x65, 0x20, 0x4b, 0x65, 0x79, 0x20, 0x2d, 0x20, + 0x48, 0x61, 0x73, 0x68, 0x20, 0x4b, 0x65, 0x79, + 0x20, 0x46, 0x69, 0x72, 0x73, 0x74 }; + +static unsigned char expected_test6[] = { + 0x60, 0xe4, 0x31, 0x59, 0x1e, 0xe0, 0xb6, 0x7f, + 0x0d, 0x8a, 0x26, 0xaa, 0xcb, 0xf5, 0xb7, 0x7f, + 0x8e, 0x0b, 0xc6, 0x21, 0x37, 0x28, 0xc5, 0x14, + 0x05, 0x46, 0x04, 0x0f, 0x0e, 0xe3, 0x7f, 0x54 }; + +static unsigned char key_test7[] = { + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, +}; + +static unsigned char input_test7[] = { + 0x54, 0x68, 0x69, 0x73, 0x20, 0x69, 0x73, 0x20, + 0x61, 0x20, 0x74, 0x65, 0x73, 0x74, 0x20, 0x75, + 0x73, 0x69, 0x6e, 0x67, 0x20, 0x61, 0x20, 0x6c, + 0x61, 0x72, 0x67, 0x65, 0x72, 0x20, 0x74, 0x68, + 0x61, 0x6e, 0x20, 0x62, 0x6c, 0x6f, 0x63, 0x6b, + 0x2d, 0x73, 0x69, 0x7a, 0x65, 0x20, 0x6b, 0x65, + 0x79, 0x20, 0x61, 0x6e, 0x64, 0x20, 0x61, 0x20, + 0x6c, 0x61, 0x72, 0x67, 0x65, 0x72, 0x20, 0x74, + 0x68, 0x61, 0x6e, 0x20, 0x62, 0x6c, 0x6f, 0x63, + 0x6b, 0x2d, 0x73, 0x69, 0x7a, 0x65, 0x20, 0x64, + 0x61, 0x74, 0x61, 0x2e, 0x20, 0x54, 0x68, 0x65, + 0x20, 0x6b, 0x65, 0x79, 0x20, 0x6e, 0x65, 0x65, + 0x64, 0x73, 0x20, 0x74, 0x6f, 0x20, 0x62, 0x65, + 0x20, 0x68, 0x61, 0x73, 0x68, 0x65, 0x64, 0x20, + 0x62, 0x65, 0x66, 0x6f, 0x72, 0x65, 0x20, 0x62, + 0x65, 0x69, 0x6e, 0x67, 0x20, 0x75, 0x73, 0x65, + 0x64, 0x20, 0x62, 0x79, 0x20, 0x74, 0x68, 0x65, + 0x20, 0x48, 0x4d, 0x41, 0x43, 0x20, 0x61, 0x6c, + 0x67, 0x6f, 0x72, 0x69, 0x74, 0x68, 0x6d, 0x2e, +}; + +static unsigned char expected_test7[] = { + 0x9b, 0x09, 0xff, 0xa7, 0x1b, 0x94, 0x2f, 0xcb, + 0x27, 0x63, 0x5f, 0xbc, 0xd5, 0xb0, 0xe9, 0x44, + 0xbf, 0xdc, 0x63, 0x64, 0x4f, 0x07, 0x13, 0x93, + 0x8a, 0x7f, 0x51, 0x53, 0x5c, 0x3a, 0x35, 0xe2, +}; + +static struct test_sha256_hmac_s test_sha256_hmac[] = { + { + .key = key_test1, + .keylen = sizeof(key_test1), + .input = input_test1, + .ilen = sizeof(input_test1), + .expected = expected_test1, + .elen = sizeof(expected_test1), + }, + { + .key = key_test2, + .keylen = sizeof(key_test2), + .input = input_test2, + .ilen = sizeof(input_test2), + .expected = expected_test2, + .elen = sizeof(expected_test2), + }, + { + .key = key_test3, + .keylen = sizeof(key_test3), + .input = input_test3, + .ilen = sizeof(input_test3), + .expected = expected_test3, + .elen = sizeof(expected_test3), + }, + { + .key = key_test4, + .keylen = sizeof(key_test4), + .input = input_test4, + .ilen = sizeof(input_test4), + .expected = expected_test4, + .elen = sizeof(expected_test4), + }, + { + .key = key_test5, + .keylen = sizeof(key_test5), + .input = input_test5, + .ilen = sizeof(input_test5), + .expected = expected_test5, + .elen = sizeof(expected_test5), + }, + { + .key = key_test6, + .keylen = sizeof(key_test6), + .input = input_test6, + .ilen = sizeof(input_test6), + .expected = expected_test6, + .elen = sizeof(expected_test6), + }, + { + .key = key_test7, + .keylen = sizeof(key_test7), + .input = input_test7, + .ilen = sizeof(input_test7), + .expected = expected_test7, + .elen = sizeof(expected_test7), + }, +}; + +static int _lib_test_sha256_hmac_run(struct unit_test_state *uts, + const unsigned char *key, int keylen, + const unsigned char *input, int ilen, + const unsigned char *expected, int elen) +{ + unsigned char output[SHA256_SUM_LEN]; + int ret; + + ut_assert(elen <= sizeof(output)); + ret = sha256_hmac(key, keylen, input, ilen, output); + ut_assert(!ret); + ut_asserteq_mem(expected, output, elen); + + return 0; +} + +static int lib_test_sha256_hmac_run(struct unit_test_state *uts, + struct test_sha256_hmac_s *test) +{ + return _lib_test_sha256_hmac_run(uts, test->key, test->keylen, + test->input, test->ilen, + test->expected, test->elen); +} + +static int lib_test_sha256_hmac(struct unit_test_state *uts) +{ + int i, ret = 0; + + for (i = 0; i < ARRAY_SIZE(test_sha256_hmac); i++) { + ret = lib_test_sha256_hmac_run(uts, &test_sha256_hmac[i]); + if (ret) + return ret; + } + + return 0; +} + +LIB_TEST(lib_test_sha256_hmac, 0); diff --git a/test/py/tests/test_extension.py b/test/py/tests/test_extension.py index 267cf2ff27c..2a3c5116171 100644 --- a/test/py/tests/test_extension.py +++ b/test/py/tests/test_extension.py @@ -26,7 +26,9 @@ def test_extension(u_boot_console): load_dtb(u_boot_console) output = u_boot_console.run_command('extension list') - assert('No extension' in output) + # extension_bootdev_hunt may have already run. + # Without reboot we cannot make any assumption here. + # assert('No extension' in output) output = u_boot_console.run_command('extension scan') assert output == 'Found 2 extension board(s).' diff --git a/test/py/tests/test_smbios.py b/test/py/tests/test_smbios.py index 82b0b689830..0405a9b9d38 100644 --- a/test/py/tests/test_smbios.py +++ b/test/py/tests/test_smbios.py @@ -32,10 +32,26 @@ def test_cmd_smbios_sandbox(u_boot_console): """Run the smbios command on the sandbox""" output = u_boot_console.run_command('smbios') assert 'DMI type 0,' in output - assert 'String 1: U-Boot' in output + assert 'Vendor: U-Boot' in output assert 'DMI type 1,' in output assert 'Manufacturer: sandbox' in output assert 'DMI type 2,' in output assert 'DMI type 3,' in output assert 'DMI type 4,' in output assert 'DMI type 127,' in output + +@pytest.mark.buildconfigspec('cmd_smbios') +@pytest.mark.buildconfigspec('sysinfo_smbios') +@pytest.mark.buildconfigspec('generate_smbios_table_verbose') +def test_cmd_smbios_sysinfo_verbose(u_boot_console): + """Run the smbios command""" + output = u_boot_console.run_command('smbios') + assert 'DMI type 0,' in output + assert 'Vendor: U-Boot' in output + assert 'DMI type 1,' in output + assert 'Manufacturer: linux' in output + assert 'DMI type 2,' in output + assert 'DMI type 3,' in output + assert 'DMI type 7,' in output + assert 'DMI type 4,' in output + assert 'DMI type 127,' in output diff --git a/test/py/tests/test_upl.py b/test/py/tests/test_upl.py index 3164bda6b71..90125c4dc1b 100644 --- a/test/py/tests/test_upl.py +++ b/test/py/tests/test_upl.py @@ -17,7 +17,7 @@ def test_upl_handoff(u_boot_console): proper and runs a test to check that the parameters are correct. The entire FIT is loaded into memory in SPL (in upl_load_from_image()) so - that it can be inpected in upl_test_info_norun + that it can be inspected in upl_test_info_norun """ cons = u_boot_console ram = os.path.join(cons.config.build_dir, 'ram.bin') diff --git a/test/py/tests/test_ut.py b/test/py/tests/test_ut.py index 10ec7e582e0..cacf11f7c0a 100644 --- a/test/py/tests/test_ut.py +++ b/test/py/tests/test_ut.py @@ -343,9 +343,10 @@ def setup_cros_image(cons): start, size, num, name = line.split(maxsplit=3) parts[int(num)] = Partition(int(start), int(size), name) + # Set up the kernel command-line dummy = os.path.join(cons.config.result_dir, 'dummy.txt') with open(dummy, 'wb') as outf: - outf.write(b'dummy\n') + outf.write(b'BOOT_IMAGE=/vmlinuz-5.15.0-121-generic root=/dev/nvme0n1p1 ro quiet splash vt.handoff=7') # For now we just use dummy kernels. This limits testing to just detecting # a signed kernel. We could add support for the x86 data structures so that diff --git a/tools/Makefile b/tools/Makefile index ee08a9675df..237fa900a24 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -135,6 +135,7 @@ dumpimage-mkimage-objs := aisimage.o \ generated/lib/hash-checksum.o \ generated/lib/sha1.o \ generated/lib/sha256.o \ + generated/lib/sha256_common.o \ generated/lib/sha512.o \ generated/common/hash.o \ ublimage.o \ diff --git a/tools/binman/binman.rst b/tools/binman/binman.rst index 381e55686f9..990fc295770 100644 --- a/tools/binman/binman.rst +++ b/tools/binman/binman.rst @@ -5,7 +5,7 @@ Introduction ============ Firmware often consists of several components which must be packaged together. -For example, we may have SPL, U-Boot, a device tree and an environment area +For example, we may have SPL, U-Boot, a devicetree and an environment area grouped together and placed in MMC flash. When the system starts, it must be able to find these pieces. @@ -19,7 +19,7 @@ together. What it does ------------ -Binman reads your board's device tree and finds a node which describes the +Binman reads your board's devicetree and finds a node which describes the required image layout. It uses this to work out what to place where. Binman provides a mechanism for building images, from simple SPL + U-Boot @@ -31,12 +31,12 @@ needed. Features -------- -Apart from basic padding, alignment and positioning features, Binman supports -hierarchical images, compression, hashing and dealing with the binary blobs +Apart from basic padding, alignment, and positioning features, Binman supports +hierarchical images, compression, hashing and dealing with the binary blobs, which are a sad trend in open-source firmware at present. Executable binaries can access the location of other binaries in an image by -using special linker symbols (zero-overhead but somewhat limited) or by reading +using special linker symbols (zero-overhead but limited) or by reading the devicetree description of the image. Binman is designed primarily for use with U-Boot and associated binaries such @@ -55,14 +55,14 @@ Motivation ---------- As mentioned above, packaging of firmware is quite a different task from -building the various parts. In many cases the various binaries which go into -the image come from separate build systems. For example, ARM Trusted Firmware +building the various parts. In many cases the various binaries which go into image +come from separate build systems. For example, ARM Trusted Firmware is used on ARMv8 devices but is not built in the U-Boot tree. If a Linux kernel is included in the firmware image, it is built elsewhere. -It is of course possible to add more and more build rules to the U-Boot +It is of course possible to add further build rules to the U-Boot build system to cover these cases. It can shell out to other Makefiles and -build scripts. But it seems better to create a clear divide between building +build scripts. But it seems preferable to create a clear divide between building software and packaging it. At present this is handled by manual instructions, different for each board, @@ -82,7 +82,7 @@ Benefits: - Avoids cluttering the U-Boot build system with image-building code - The image description is automatically available at run-time in U-Boot, SPL. It can be made available to other software also - - The image description is easily readable (it's a text file in device-tree + - The image description is easily readable (a text file in devicetree format) and permits flexible packing of binaries @@ -102,7 +102,7 @@ You can install binman using:: pip install binary-manager -The name is chosen since binman conflicts with an existing package. +The name was chosen since binman conflicts with an existing package. If you are using binman within the U-Boot tree, it may be easiest to add a symlink from your local `~/.bin` directory to `/path/to/tools/binman/binman`. @@ -116,9 +116,9 @@ load / execution addresses, compression. It also supports verification through hashing and RSA signatures. FIT was originally designed to support booting a Linux kernel (with an -optional ramdisk) and device tree chosen from various options in the FIT. -Now that U-Boot supports configuration via device tree, it is possible to -load U-Boot from a FIT, with the device tree chosen by SPL. +optional ramdisk) and devicetree chosen from assorted options in the FIT. +Now that U-Boot supports configuration via devicetree, it is possible to +load U-Boot from a FIT, with the devicetree chosen by SPL. Binman considers FIT to be one of the binaries it can place in the image. @@ -140,7 +140,7 @@ Relationship to mkimage ----------------------- The mkimage tool provides a means to create a FIT. Traditionally it has -needed an image description file: a device tree, like binman, but in a +needed an image description file: a devicetree, like binman, but in a different format. More recently it has started to support a '-f auto' mode which can generate that automatically. @@ -173,7 +173,7 @@ build system. Consider sunxi. It has the following steps: #. It uses a custom mksunxiboot tool to build an SPL image called - sunxi-spl.bin. This should probably move into mkimage. + sunxi-spl.bin. This should better go into mkimage. #. It uses mkimage to package U-Boot into a legacy image file (so that it can hold the load and execution address) called u-boot.img. @@ -193,7 +193,7 @@ can be replaced by a call to binman. Invoking binman within U-Boot ----------------------------- -Within U-Boot, binman is invoked by the build system, i.e. when you type 'make' +Within U-Boot, binman is invoked by the build system, i.e., when you type 'make' or use buildman to build U-Boot. There is no need to run binman independently during development. Everything happens automatically and is set up for your SoC or board so that binman produced the right things. @@ -208,10 +208,10 @@ invocations as well, but these should be dropped when those architectures are converted to use binman properly. As above, the term 'binary' is used for something in INPUTS-y and 'image' is -used for the things that binman creates. So the binaries are inputs to the -image(s) and it is the image that is actually loaded on the board. +used for the things that binman creates. Hence, the binaries are inputs to the +image(s), and it is the image that is actually loaded on the board. -Again, at present, there are a number of things created in Makefile which should +Again, at present, there are a few things created in Makefile which should be done by binman (when we get around to it), like `u-boot-ivt.img`, `lpc32xx-spl.img`, `u-boot-with-nand-spl.imx`, `u-boot-spl-padx4.sfp` and `u-boot-mtk.bin`, just to pick on a few. When completed this will remove about @@ -222,15 +222,15 @@ are needed, in that one invocation. It does this by working through the image descriptions one by one, collecting the input binaries, processing them as needed and producing the final images. -The same binaries may be used by multiple images. For example binman may be used +The same binaries may be used for multiple images. For example, binman may be used to produce an SD-card image and a SPI-flash image. In this case the binaries going into the process are the same, but binman produces slightly different images in each case. For some SoCs, U-Boot is not the only project that produces the necessary binaries. For example, ARM Trusted Firmware (ATF) is a project that produces -binaries which must be incorporate, such as `bl31.elf` or `bl31.bin`. For this -to work you must have built ATF before you build U-Boot and you must tell U-Boot +binaries which must be incorporated, such as `bl31.elf` or `bl31.bin`. For this +to work you must have built ATF before you build U-Boot, and you must tell U-Boot where to find the bl31 image, using the BL31 environment variable. How do you know how to incorporate ATF? It is handled by the atf-bl31 entry type @@ -267,29 +267,29 @@ nor is there any need to provide a real ATF BL31 binary (for example). These can be added later by invoking binman again, providing all the required inputs from the first time, plus any that were missing or placeholders. -So in practice binman is often used twice: +Then, in practice binman is often used twice: -- once within the U-Boot build system, for development and testing -- again outside U-Boot to assembly and final production images +- Once within the U-Boot build system, for development and testing +- Again, outside U-Boot to assembly and final production images While the same input binaries are used in each case, you will of course you will -need to create your own binman command line, similar to that in `cmd_binman` in +need to create your own binman command line, like that in `cmd_binman` in the Makefile. You may find the -I and --toolpath options useful. The -device tree file is provided to binman in binary form, so there is no need to +devicetree file is provided to binman in binary form, so there is no need to have access to the original `.dts` sources. Assembling the image description -------------------------------- -Since binman uses the device tree for its image description, you can use the +Since binman uses the devicetree for its image description, you can use the same files that describe your board's hardware to describe how the image is -assembled. Typically the images description is in a common file used by all +assembled. Typically, the images description is in a common file used by all boards with a particular SoC (e.g. `imx8mp-u-boot.dtsi`). -Where a particular boards needs to make changes, it can override properties in -the SoC file, just as it would for any other device tree property. It can also -add a image that is specific to the board. +Where a particular board needs to make changes, it can override properties in +the SoC file, just as it would for any other devicetree property. It can also +add an image that is specific to the board. Another way to control the image description to make use of CONFIG options in the description. For example, if the start offset of a particular entry varies @@ -303,7 +303,7 @@ by board, you can add a Kconfig for that and reference it in the description:: ... }; -The SoC can provide a default value but boards can override that as needed and +The SoC can provide a default value, but boards can override that as needed and binman will take care of it. It is even possible to control which entries appear in the image, by using the @@ -317,15 +317,15 @@ C preprocessor:: Only boards which enable `HAVE_MRC` will include this entry. -Obviously a similar approach can be used to control which images are produced, -with a Kconfig option to enable a SPI image, for example. However there is -generally no harm in producing an image that is not used. If a board uses MMC +Obviously, a similar approach can be used to control which images are produced, +with a Kconfig option to enable a SPI image, for example. However, there is +no general harm in producing an image that is not used. If a board uses MMC but not SPI, but the SoC supports booting from both, then both images can be -produced, with only on or other being used by particular boards. This can help -reduce the need for having multiple defconfig targets for a board where the +produced, with only one or other being used by a particular board. This can help +reduce the need for having multiple defconfig targets, for boards where the only difference is the boot media, enabling / disabling secure boot, etc. -Of course you can use the device tree itself to pass any board-specific +Of course, you can use the devicetree itself to pass any board-specific information that is needed by U-Boot at runtime (see binman_syms_ for how to make binman insert these values directly into executables like SPL). @@ -341,14 +341,14 @@ Producing images for multiple boards When invoked within U-Boot, binman only builds a single set of images, for the chosen board. This is set by the `CONFIG_DEFAULT_DEVICE_TREE` option. -However, U-Boot generally builds all the device tree files associated with an -SoC. These are written to the (e.g. for ARM) `arch/arm/dts` directory. Each of +However, U-Boot builds all the devicetree files associated with an +SoC. These are written in the (e.g. for ARM) `arch/arm/dts` directory. Each of these contains the full binman description for that board. Often the best -approach is to build a single image that includes all these device tree binaries +approach is to build a single image that includes all these devicetree binaries and allow SPL to select the correct one on boot. However, it is also possible to build separate images for each board, simply by -invoking binman multiple times, once for each device tree file, using a +invoking binman multiple times, once for each devicetree file, using a different output directory. This will produce one set of images for each board. @@ -429,7 +429,7 @@ build. (Future work will make this more configurable) -In either case, binman picks up the device tree file (u-boot.dtb) and looks +In either case, binman picks up the devicetree file (u-boot.dtb) and looks for its instructions in the 'binman' node. Binman has a few other options which you can see by running 'binman -h'. @@ -441,11 +441,11 @@ Enabling binman for a board At present binman is invoked from a rule in the main Makefile. You should be able to enable CONFIG_BINMAN to enable this rule. -The output file is typically named image.bin and is located in the output +The output file is typically named image.bin and is in the output directory. If input files are needed to you add these to INPUTS-y either in the main Makefile or in a config.mk file in your arch subdirectory. -Once binman is executed it will pick up its instructions from a device-tree +Once binman is executed it will pick up its instructions from a devicetree file, typically <soc>-u-boot.dtsi, where <soc> is your CONFIG_SYS_SOC value. You can use other, more specific CONFIG options - see 'Automatic .dtsi inclusion' below. @@ -476,19 +476,19 @@ You can access this value with something like: ulong u_boot_offset = binman_sym(ulong, u_boot_any, image_pos); Thus u_boot_offset will be set to the image-pos of U-Boot in memory, assuming -that the whole image has been loaded, or is available in flash. You can then +that the whole image has been loaded or is available in flash. You can then jump to that address to start U-Boot. At present this feature is only supported in SPL and TPL. In principle it is possible to fill in such symbols in U-Boot proper, as well, but a future C -library is planned for this instead, to read from the device tree. +library is planned for this instead, to read from the devicetree. As well as image-pos, it is possible to read the size of an entry and its offset (which is the start position of the entry within its parent). A small technical note: Binman automatically adds the base address of the image (i.e. __image_copy_start) to the value of the image-pos symbol, so that when the -image is loaded to its linked address, the value will be correct and actually +image is loaded to its linked address; the value will be correct and actually point into the image. For example, say SPL is at the start of the image and linked to start at address @@ -523,7 +523,7 @@ each entry in the images it processes. The option to enable this is -u and it causes binman to make sure that the 'offset', 'image-pos' and 'size' properties are set correctly for every entry. Since it is not necessary to specify these in the image definition, binman calculates the final values and writes these to -the device tree. These can be used by U-Boot at run-time to find the location +the devicetree. These can be used by U-Boot at run-time to find the location of each entry. Alternatively, an FDT map entry can be used to add a special FDT containing @@ -556,8 +556,8 @@ Passing command-line arguments to entries ----------------------------------------- Sometimes it is useful to pass binman the value of an entry property from the -command line. For example some entries need access to files and it is not -always convenient to put these filenames in the image definition (device tree). +command line. For example, some entries need access to files, and it is not +always convenient to put these filenames in the image definition (devicetree). The -a option supports this:: @@ -594,7 +594,7 @@ This requests binman to create an image file called u-boot-sunxi-with-spl.bin consisting of a specially formatted SPL (spl/sunxi-spl.bin, built by the normal U-Boot Makefile), some 0xff padding, and a U-Boot legacy image. The padding comes from the fact that the second binary is placed at -CONFIG_SPL_PAD_TO. If that line were omitted then the U-Boot binary would +CONFIG_SPL_PAD_TO. If that line were omitted, then the U-Boot binary would immediately follow the SPL binary. The binman node describes an image. The sub-nodes describe entries in the @@ -606,7 +606,7 @@ Entries are normally placed into the image sequentially, one after the other. The image size is the total size of all entries. As you can see, you can specify the start offset of an entry using the 'offset' property. -Note that due to a device tree requirement, all entries must have a unique +Note that due to a devicetree requirement, all entries must have a unique name. If you want to put the same binary in the image multiple times, you can use any unique name, with the 'type' property providing the type. @@ -622,7 +622,7 @@ offset: align: This sets the alignment of the entry. The entry offset is adjusted so that the entry starts on an aligned boundary within the containing - section or image. For example 'align = <16>' means that the entry will + section or image. For example, 'align = <16>' means that the entry will start on a 16-byte boundary. This may mean that padding is added before the entry. The padding is part of the containing section but is not included in the entry, meaning that an empty space may be created before @@ -639,7 +639,7 @@ min-size: ('pad-before' and 'pad-after'), but not padding added to meet alignment requirements. While this does not affect the contents of the entry within binman itself (the padding is performed only when its parent section is - assembled), the end result will be that the entry ends with the padding + assembled), the result will be that the entry ends with the padding bytes, so may grow. Defaults to 0. pad-before: @@ -647,8 +647,8 @@ pad-before: that the contents start at the beginning of the entry. This can be used to offset the entry contents a little. While this does not affect the contents of the entry within binman itself (the padding is performed - only when its parent section is assembled), the end result will be that - the entry starts with the padding bytes, so may grow. Defaults to 0. + only when its parent section is assembled), the result will be that + the entry starts with the padding bytes, so it may grow. Defaults to 0. pad-after: Padding after the contents of the entry. Normally this is 0, meaning @@ -656,7 +656,7 @@ pad-after: other properties). This allows room to be created in the image for this entry to expand later. While this does not affect the contents of the entry within binman itself (the padding is performed only when its - parent section is assembled), the end result will be that the entry ends + parent section is assembled), the result will be that the entry ends with the padding bytes, so may grow. Defaults to 0. align-size: @@ -664,7 +664,7 @@ align-size: that the size of an entry is a multiple of 64 bytes, set this to 64. While this does not affect the contents of the entry within binman itself (the padding is performed only when its parent section is - assembled), the end result is that the entry ends with the padding + assembled), the result is that the entry ends with the padding bytes, so may grow. If 'align-size' is not provided, no alignment is performed. @@ -675,7 +675,7 @@ align-end: of the entry, so the contents of the entry will still start at the beginning. But there may be padding at the end. While this does not affect the contents of the entry within binman itself (the padding is - performed only when its parent section is assembled), the end result + performed only when its parent section is assembled), the result is that the entry ends with the padding bytes, so may grow. If 'align-end' is not provided, no alignment is performed. @@ -708,7 +708,7 @@ extend-size: entry. compress: - Sets the compression algortihm to use (for blobs only). See the entry + Sets the compression algorithm to use (for blobs only). See the entry documentation for details. missing-msg: @@ -725,23 +725,23 @@ assume-size: size if requested. no-expanded: - By default binman substitutes entries with expanded versions if available, + By default, binman substitutes entries with expanded versions if available, so that a `u-boot` entry type turns into `u-boot-expanded`, for example. The `--no-expanded` command-line option disables this globally. The `no-expanded` property disables this just for a single entry. Put the - `no-expanded` boolean property in the node to select this behaviour. + `no-expanded` boolean property in the node to select this behavior. optional: External blobs are normally required to be present for the image to be built (but see `External blobs`_). This properly allows an entry to be - optional, so that when it is cannot be found, this problem is ignored and + optional, so that when it cannot be found, this problem is ignored and an empty file is used for this blob. This should be used only when the blob is entirely optional and is not needed for correct operation of the image. Note that missing, optional blobs do not produce a non-zero exit code from binman, although it does show a warning about the missing external blob. insert-template: - This is not strictly speaking an entry property, since it is processed early + This is not an entry property, since it is processed early in Binman before the entries are read. It is a list of phandles of nodes to include in the current (target) node. For each node, its subnodes and their properties are brought into the target node. See Templates_ below for @@ -751,7 +751,7 @@ symbols-base: When writing symbols into a binary, the value of that symbol is assumed to be relative to the base address of the binary. This allow the binary to be loaded in memory at its base address, so that symbols point into the binary - correctly. In some cases the binary is in fact not yet in memory, but must + correctly. In some cases, the binary is in fact not yet in memory, but must be read from storage. In this case there is no base address for the symbols. This property can be set to 0 to indicate this. Other values for symbols-base are allowed, but care must be taken that the code which uses @@ -759,14 +759,14 @@ symbols-base: address is used. The attributes supported for images and sections are described below. Several -are similar to those for entries. +of them are like the attributes for entries. size: Sets the image size in bytes, for example 'size = <0x100000>' for a 1MB image. offset: - This is similar to 'offset' in entries, setting the offset of a section + This is like 'offset' in entries, setting the offset of a section within the image or section containing it. The first byte of the section is normally at offset 0. If 'offset' is not provided, binman sets it to the end of the previous region, or the start of the image's entry area @@ -799,7 +799,7 @@ sort-by-offset: the 'offset' properties are set by CONFIG options, so their ordering is not known a priori. - This is a boolean property so needs no value. To enable it, add a + This is a boolean property, so it needs no value. To enable it, add a line 'sort-by-offset;' to your description. multiple-images: @@ -842,7 +842,7 @@ skip-at-start: Image size != 4gb. align-default: - Specifies the default alignment for entries in this section, if they do + Specifies the default alignment for entries in this section if they do not specify an alignment. Note that this only applies to top-level entries in the section (direct subentries), not any subentries of those entries. This means that each section must specify its own default alignment, if @@ -883,7 +883,7 @@ elf-base-sym: be read correctly. See binman_syms_ for more information. offset-from-elf: - Sets the offset of an entry based on a symbol value in an another entry. + Sets the offset of an entry based on a symbol value in another entry. The format is <&phandle>, "sym_name", <offset> where phandle is the entry containing the blob (with associated ELF file providing symbols), <sym_name> is the symbol to lookup (relative to elf-base-sym) and <offset> is an offset @@ -894,7 +894,7 @@ preserve: flag should be checked by the updater when it is deciding which entries to update. This flag is normally attached to sections but can be attached to a single entry in a section if the updater supports it. Not that binman - itself has no control over the updater's behaviour, so this is just a + itself has no control over the updater's behavior, so this is just a signal. It is not enforced by binman. Examples of the above options can be found in the tests. See the @@ -905,16 +905,16 @@ either by using a unit number suffix (u-boot@0, u-boot@1) or by using a different name for each and specifying the type with the 'type' attribute. -Sections and hierachical images -------------------------------- +Sections and hierarchical images +-------------------------------- Sometimes it is convenient to split an image into several pieces, each of which contains its own set of binaries. An example is a flash device where part of -the image is read-only and part is read-write. We can set up sections for each +the image is read-only, and part is read-write. We can set up sections for each of these, and place binaries in them independently. The image is still produced as a single output file. -This feature provides a way of creating hierarchical images. For example here +This feature provides a way of creating hierarchical images. For example, here is an example image with two copies of U-Boot. One is read-only (ro), intended to be written only in the factory. Another is read-write (rw), so that it can be upgraded in the field. The sizes are fixed so that the ro/rw boundary is known @@ -947,7 +947,7 @@ read-only: name-prefix: This string is prepended to all the names of the binaries in the - section. In the example above, the 'u-boot' binaries which actually be + section. In the example above, the 'u-boot' binaries will be renamed to 'ro-u-boot' and 'rw-u-boot'. This can be useful to distinguish binaries with otherwise identical names. @@ -955,7 +955,7 @@ filename: This allows the contents of the section to be written to a file in the output directory. This can sometimes be useful to use the data in one section in different image, since there is currently no way to share data - beteen images other than through files. + between images other than through files. Image Properties ---------------- @@ -970,11 +970,11 @@ filename: allow-repack: Create an image that can be repacked. With this option it is possible to change anything in the image after it is created, including updating - the position and size of image components. By default this is not - permitted since it is not possibly to know whether this might violate a - constraint in the image description. For example, if a section has to + the position and size of image components. By default, this is not + permitted since it is not possible to know whether this might violate a + constraint in the image description. For example, if a section must increase in size to hold a larger binary, that might cause the section - to fall out of its allow region (e.g. read-only portion of flash). + to exceed its allow-region (e.g. the read-only portion of flash). Adding this property causes the original offset and size values in the image description to be stored in the FDT and fdtmap. @@ -985,7 +985,7 @@ Image dependencies Binman does not currently support images that depend on each other. For example, if one image creates `fred.bin` and then the next uses this `fred.bin` to -produce a final `image.bin`, then the behaviour is undefined. It may work, or it +produce a final `image.bin`, then the behavior is undefined. It may work, or it may produce an error about `fred.bin` being missing, or it may use a version of `fred.bin` from a previous run. @@ -1033,7 +1033,7 @@ Hashing Entries --------------- It is possible to ask binman to hash the contents of an entry and write that -value back to the device-tree node. For example:: +value back to the devicetree node. For example:: binman { u-boot { @@ -1045,10 +1045,10 @@ value back to the device-tree node. For example:: Here, a new 'value' property will be written to the 'hash' node containing the hash of the 'u-boot' entry. Only SHA256 is supported at present. Whole -sections can be hased if desired, by adding the 'hash' node to the section. +sections can be hashed if desired, by adding the 'hash' node to the section. -The has value can be chcked at runtime by hashing the data actually read and -comparing this has to the value in the device tree. +The hash value can be checked at runtime by hashing the data read and +comparing this hash to the value in the devicetree. Expanded entries @@ -1078,8 +1078,8 @@ which in turn expands to:: }; }; -U-Boot's various phase binaries actually comprise two or three pieces. -For example, u-boot.bin has the executable followed by a devicetree. +U-Boot's phase binaries comprise two or three pieces. For example, u-boot.bin +has the executable followed by a devicetree. With binman we want to be able to update that devicetree with full image information so that it is accessible to the executable. This is tricky @@ -1117,9 +1117,9 @@ which in turn expands to:: }; }; -Of course we should not expand SPL if it has no devicetree. Also if the BSS +Of course, we should not expand SPL if it has no devicetree. Also, if the BSS padding is not needed (because BSS is in RAM as with CONFIG_SPL_SEPARATE_BSS), -the 'u-boot-spl-bss-pad' subnode should not be created. The use of the expaned +the 'u-boot-spl-bss-pad' subnode should not be created. The use of the expanded entry type is controlled by the UseExpanded() method. In the SPL case it checks the 'spl-dtb' entry arg, which is 'y' or '1' if SPL has a devicetree. @@ -1749,7 +1749,7 @@ Options: Options used only for testing: --fake-dtb - Use fake device tree contents + Use fake devicetree contents --fake-ext-blobs Create fake ext blobs with dummy content @@ -1789,7 +1789,7 @@ Positional arguments: paths Paths within file to list (wildcard) -Pptions: +Options: -h, --help show help message and exit @@ -1899,7 +1899,7 @@ Options: -P PROCESSES, --processes PROCESSES set number of processes to use for running tests. This defaults to the - number of CPUs on the machine + numbering the CPUs on the machine -T, --test-coverage run tests and check for 100% coverage @@ -1974,13 +1974,13 @@ Image creation proceeds in the following order, for each entry in the image. 1. AddMissingProperties() - binman can add calculated values to the device tree as part of its processing, for example the offset and size of each entry. This method adds any properties associated with this, expanding the -device tree as needed. These properties can have placeholder values which are -set later by SetCalculatedProperties(). By that stage the size of sections +devicetree as needed. These properties can have placeholder values which are +set later by SetCalculatedProperties(). By that stage, the size of sections cannot be changed (since it would cause the images to need to be repacked), but the correct values can be inserted. -2. ProcessFdt() - process the device tree information as required by the -particular entry. This may involve adding or deleting properties. If the +2. ProcessFdt() - process the devicetree information as required by the +entry. This may involve adding or deleting properties. If the processing is complete, this method should return True. If the processing cannot complete because it needs the ProcessFdt() method of another entry to run first, this method should return False, in which case it will be called @@ -1989,7 +1989,7 @@ again later. 3. GetEntryContents() - the contents of each entry are obtained, normally by reading from a file. This calls the Entry.ObtainContents() to read the contents. The default version of Entry.ObtainContents() calls -Entry.GetDefaultFilename() and then reads that file. So a common mechanism +Entry.GetDefaultFilename() and then reads that file. Thus, a common mechanism to select a file to read is to override that function in the subclass. The functions must return True when they have read the contents. Binman will retry calling the functions a few times if False is returned, allowing @@ -2039,7 +2039,7 @@ what happens in this stage. 11. BuildImage() - builds the image and writes it to a file 12. WriteMap() - writes a text file containing a map of the image. This is the -final step. +last step. .. _`External tools`: @@ -2049,14 +2049,14 @@ External tools Binman can make use of external command-line tools to handle processing of entry contents or to generate entry contents. These tools are executed using -the 'tools' module's Run() method. The tools generally must exist on the PATH, +the 'tools' module's Run() method. The tools must exist on the PATH, but the --toolpath option can be used to specify additional search paths to use. This option can be specified multiple times to add more than one path. -For some compile tools binman will use the versions specified by commonly-used +For some compile tools binman will use the versions specified by commonly used environment variables like CC and HOSTCC for the C compiler, based on whether the tool's output will be used for the target or for the host machine. If those -aren't given, it will also try to derive target-specific versions from the +are not given, it will also try to derive target-specific versions from the CROSS_COMPILE environment variable during a cross-compilation. If the tool is not available in the path you can use BINMAN_TOOLPATHS to specify @@ -2077,7 +2077,7 @@ to build the final image, no matter what steps are needed to get there. Binman also provides a `blob-ext` entry type that pulls in a binary blob from an external file. If the file is missing, binman can optionally complete the build -and just report a warning. Use the `-M/--allow-missing` option to enble this. +and just report a warning. Use the `-M/--allow-missing` option to enable this. This is useful in CI systems which want to check that everything is correct but don't have access to the blobs. @@ -2172,7 +2172,7 @@ symbol tells binman the size of the BSS region, in bytes. It needs this to be able to pad the image so that the following entries do not overlap the BSS, which would cause them to be overwritte by variable access in SPL. -This symbols is normally defined in the linker script, immediately after +These symbols are normally defined in the linker script, immediately after _bss_start and __bss_end are defined, like this:: __bss_size = __bss_end - __bss_start; @@ -2186,7 +2186,7 @@ Concurrent tests Binman tries to run tests concurrently. This means that the tests make use of all available CPUs to run. - To enable this:: + Enable this:: $ sudo apt-get install python-subunit python3-subunit @@ -2202,7 +2202,7 @@ See :doc:`../binman_tests`. Debugging tests --------------- -Sometimes when debugging tests it is useful to keep the input and output +Sometimes when debugging tests, it is useful to keep the input and output directories so they can be examined later. Use -X or --test-preserve-dirs for this. @@ -2249,7 +2249,7 @@ entry contents. Most of the time such essoteric behaviour is not needed, but it can be essential for complex images. -If you need to specify a particular device-tree compiler to use, you can define +If you need to specify a particular devicetree compiler to use, you can define the DTC environment variable. This can be useful when the system dtc is too old. @@ -2363,10 +2363,10 @@ blob can come from any suitable place, such as an `Entry_u_boot` or an The `soc-fw` node is a `blob-ext` (i.e. it reads in a named binary file) whereas `u-boot` is a normal entry type. This works because `Entry_fip` selects the -`blob-ext` entry type if the node name (here `soc-fw`) is recognised as being +`blob-ext` entry type if the node name (here `soc-fw`) is recognized as being a known blob type. -When adding new entry types you are encouraged to use subnodes to provide the +When adding new entry types, you are encouraged to use subnodes to provide the data for processing, unless the `content` approach is more suitable. Consider whether the input entries are contained within (or consumed by) the entry, vs just being 'referenced' by the entry. In the latter case, the `content` approach @@ -2378,8 +2378,8 @@ History / Credits Binman takes a lot of inspiration from a Chrome OS tool called 'cros_bundle_firmware', which I wrote some years ago. That tool was based on -a reasonably simple and sound design but has expanded greatly over the -years. In particular its handling of x86 images is convoluted. +a simple and sound design but has expanded over the +years. In particular, its handling of x86 images is convoluted. Quite a few lessons have been learned which are hopefully applied here. @@ -2387,11 +2387,11 @@ Quite a few lessons have been learned which are hopefully applied here. Design notes ------------ -On the face of it, a tool to create firmware images should be fairly simple: +On the face of it, a tool to create firmware images should be simple: just find all the input binaries and place them at the right place in the image. The difficulty comes from the wide variety of input types (simple flat binaries containing code, packaged data with various headers), packing -requirments (alignment, spacing, device boundaries) and other required +requirements (alignment, spacing, device boundaries) and other required features such as hierarchical images. The design challenge is to make it easy to create simple images, while @@ -2409,7 +2409,7 @@ To do Some ideas: - Use of-platdata to make the information available to code that is unable - to use device tree (such as a very small SPL image). For now, limited info is + to use devicetree (such as a small SPL image). For now, limited info is available via linker symbols - Allow easy building of images by specifying just the board name - Support building an image for a board (-b) more completely, with a diff --git a/tools/fit_image.c b/tools/fit_image.c index 0fccfbb4ebd..caed8d5f901 100644 --- a/tools/fit_image.c +++ b/tools/fit_image.c @@ -876,7 +876,7 @@ static int fit_image_extract( int ret; /* get the data address and size of component at offset "image_noffset" */ - ret = fit_image_get_data_and_size(fit, image_noffset, &file_data, &file_size); + ret = fit_image_get_data(fit, image_noffset, &file_data, &file_size); if (ret) { fprintf(stderr, "Could not get component information\n"); return ret; diff --git a/tools/image-host.c b/tools/image-host.c index 16389bd4880..84095d760c1 100644 --- a/tools/image-host.c +++ b/tools/image-host.c @@ -574,7 +574,7 @@ int fit_image_cipher_data(const char *keydir, void *keydest, } /* Get image data and data length */ - if (fit_image_get_data(fit, image_noffset, &data, &size)) { + if (fit_image_get_emb_data(fit, image_noffset, &data, &size)) { fprintf(stderr, "Can't get image data/size\n"); return -1; } @@ -654,7 +654,7 @@ int fit_image_add_verification_data(const char *keydir, const char *keyfile, int noffset; /* Get image data and data length */ - if (fit_image_get_data(fit, image_noffset, &data, &size)) { + if (fit_image_get_emb_data(fit, image_noffset, &data, &size)) { fprintf(stderr, "Can't get image data/size\n"); return -1; } diff --git a/tools/kwbimage.h b/tools/kwbimage.h index 505522332bd..e1fa2e4e215 100644 --- a/tools/kwbimage.h +++ b/tools/kwbimage.h @@ -11,11 +11,7 @@ #include <compiler.h> #include <stdint.h> -#ifdef __GNUC__ -#define __packed __attribute((packed)) -#else -#define __packed -#endif +#include <linux/compiler_attributes.h> #define KWBIMAGE_MAX_CONFIG ((0x1dc - 0x20)/sizeof(struct reg_config)) #define MAX_TEMPBUF_LEN 32 diff --git a/tools/mkimage.h b/tools/mkimage.h index d92a3ff8117..15741f250fd 100644 --- a/tools/mkimage.h +++ b/tools/mkimage.h @@ -37,7 +37,7 @@ static inline void *map_sysmem(ulong paddr, unsigned long len) return (void *)(uintptr_t)paddr; } -static inline ulong map_to_sysmem(void *ptr) +static inline ulong map_to_sysmem(const void *ptr) { return (ulong)(uintptr_t)ptr; } diff --git a/tools/qconfig.py b/tools/qconfig.py index 058d72cf4bc..259adbe1bc9 100755 --- a/tools/qconfig.py +++ b/tools/qconfig.py @@ -1617,7 +1617,7 @@ def add_commit(configs): '\n '.join(configs)) else: msg = 'configs: Resync with savedefconfig' - msg += '\n\nRsync all defconfig files using moveconfig.py' + msg += '\n\nResync all defconfig files using qconfig.py' subprocess.call(['git', 'commit', '-s', '-m', msg]) diff --git a/tools/renesas_spkgimage.h b/tools/renesas_spkgimage.h index 367e113de9d..83ec567b0d4 100644 --- a/tools/renesas_spkgimage.h +++ b/tools/renesas_spkgimage.h @@ -11,11 +11,7 @@ #ifndef _SPKGIMAGE_H_ #define _SPKGIMAGE_H_ -#ifdef __GNUC__ -#define __packed __attribute((packed)) -#else -#define __packed -#endif +#include <linux/compiler_attributes.h> #define SPKG_HEADER_MARKER {'R', 'Z', 'N', '1'} #define SPKG_HEADER_SIZE 24 |