diff options
198 files changed, 1432 insertions, 1173 deletions
@@ -209,6 +209,7 @@ config ENV_VARS_UBOOT_CONFIG config NR_DRAM_BANKS int "Number of DRAM banks" default 1 if ARCH_SUNXI || ARCH_OWL + default 2 if OMAP34XX default 4 help This defines the number of DRAM banks. @@ -236,6 +237,7 @@ config SYS_BOOT_GET_KBD config HAS_CUSTOM_SYS_INIT_SP_ADDR bool "Use a custom location for the initial stack pointer address" depends on ARC || (ARM && !INIT_SP_RELATIVE) || MIPS || PPC || RISCV + default y if OMAP34XX || AM33XX || AM43XX || DRA7XX default y if TFABOOT help Typically, we use an initial stack pointer address that is calculated @@ -249,6 +251,10 @@ config HAS_CUSTOM_SYS_INIT_SP_ADDR config CUSTOM_SYS_INIT_SP_ADDR hex "Static location for the initial stack pointer" depends on HAS_CUSTOM_SYS_INIT_SP_ADDR + default 0x4020ff00 if OMAP34XX + default 0x4030ff00 if AM33XX + default 0x4033ff00 if AM43XX + default 0x4037ff00 if DRA7XX default TEXT_BASE if TFABOOT config SYS_MALLOC_F @@ -615,6 +621,7 @@ config SYS_SRAM_SIZE config SYS_MONITOR_LEN int "Maximum size in bytes reserved for U-Boot in memory" default 1048576 if X86 + default 262144 if OMAP34XX default 786432 if ARCH_SUNXI default 0 help diff --git a/MAINTAINERS b/MAINTAINERS index a6e47e8a217..ddcb7128db4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -945,6 +945,7 @@ S: Maintained T: git https://source.denx.de/u-boot/custodians/u-boot-dfu.git F: boot/bootmeth_android.c F: boot/bootmeth_android.h +F: doc/develop/bootstd/android.rst BTRFS M: Marek Behún <kabel@kernel.org> @@ -996,6 +997,13 @@ F: arch/m68k/ F: doc/arch/m68k.rst F: drivers/watchdog/mcf_wdt.c +CPU +M: Simon Glass <sjg@chromium.org> +M: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> +S: Maintained +F: cmd/cpu.c +F: doc/usage/cpu.rst + CYCLIC M: Stefan Roese <sr@denx.de> S: Maintained @@ -3,7 +3,7 @@ VERSION = 2024 PATCHLEVEL = 10 SUBLEVEL = -EXTRAVERSION = -rc1 +EXTRAVERSION = -rc2 NAME = # *DOCUMENTATION* @@ -1048,7 +1048,7 @@ endif CHECKFLAGS += --arch=$(ARCH) # insure the checker run with the right endianness -CHECKFLAGS += $(if $(CONFIG_CPU_BIG_ENDIAN),-mbig-endian,-mlittle-endian) +CHECKFLAGS += $(if $(CONFIG_SYS_BIG_ENDIAN),-mbig-endian,-mlittle-endian) # the checker needs the correct machine size CHECKFLAGS += $(if $(CONFIG_64BIT),-m64,-m32) diff --git a/arch/Kconfig b/arch/Kconfig index abd406d4884..8f1f4667012 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -8,6 +8,13 @@ config CREATE_ARCH_SYMLINK config HAVE_ARCH_IOREMAP bool +config SUPPORT_BIG_ENDIAN + bool + +config SUPPORT_LITTLE_ENDIAN + bool + default y if !SUPPORT_BIG_ENDIAN + config SYS_CACHE_SHIFT_4 bool @@ -59,6 +66,8 @@ config ARC select SUPPORT_OF_CONTROL select SYS_CACHE_SHIFT_7 select TIMER + select SUPPORT_BIG_ENDIAN + select SUPPORT_LITTLE_ENDIAN select SYS_BIG_ENDIAN if CPU_BIG_ENDIAN select SYS_LITTLE_ENDIAN if !CPU_BIG_ENDIAN @@ -68,6 +77,7 @@ config ARM select CREATE_ARCH_SYMLINK select HAVE_PRIVATE_LIBGCC if !ARM64 select SUPPORT_ACPI + select SUPPORT_LITTLE_ENDIAN select SUPPORT_OF_CONTROL config M68K @@ -77,10 +87,13 @@ config M68K select SYS_BOOT_GET_CMDLINE select SYS_BOOT_GET_KBD select SYS_CACHE_SHIFT_4 + select SUPPORT_BIG_ENDIAN select SUPPORT_OF_CONTROL config MICROBLAZE bool "MicroBlaze architecture" + select SUPPORT_BIG_ENDIAN + select SUPPORT_LITTLE_ENDIAN select SUPPORT_OF_CONTROL imply CMD_TIMER imply SPL_REGMAP if SPL @@ -101,12 +114,14 @@ config NIOS2 select DM select DM_EVENT select OF_CONTROL + select SUPPORT_LITTLE_ENDIAN select SUPPORT_OF_CONTROL imply CMD_DM config PPC bool "PowerPC architecture" select HAVE_PRIVATE_LIBGCC + select SUPPORT_BIG_ENDIAN select SUPPORT_OF_CONTROL select SYS_BOOT_GET_CMDLINE select SYS_BOOT_GET_KBD @@ -115,6 +130,7 @@ config RISCV bool "RISC-V architecture" select CREATE_ARCH_SYMLINK select SUPPORT_ACPI + select SUPPORT_LITTLE_ENDIAN select SUPPORT_OF_CONTROL select OF_CONTROL select DM @@ -160,6 +176,8 @@ config SANDBOX select PCI_ENDPOINT select SPI select SUPPORT_OF_CONTROL + select SUPPORT_BIG_ENDIAN + select SUPPORT_LITTLE_ENDIAN select SYSRESET_CMD_POWEROFF if CMD_POWEROFF select SYS_CACHE_SHIFT_4 select IRQ @@ -224,6 +242,7 @@ config SANDBOX config SH bool "SuperH architecture" + select SUPPORT_LITTLE_ENDIAN select HAVE_PRIVATE_LIBGCC select SUPPORT_OF_CONTROL @@ -231,6 +250,7 @@ config X86 bool "x86 architecture" select SUPPORT_SPL select SUPPORT_TPL + select SUPPORT_LITTLE_ENDIAN select CREATE_ARCH_SYMLINK select DM select HAVE_ARCH_IOMAP @@ -312,6 +332,7 @@ config X86 config XTENSA bool "Xtensa architecture" select CREATE_ARCH_SYMLINK + select SUPPORT_LITTLE_ENDIAN select SUPPORT_OF_CONTROL endchoice @@ -515,24 +536,21 @@ endif source "board/keymile/Kconfig" -if MIPS || MICROBLAZE - choice prompt "Endianness selection" + default SYS_BIG_ENDIAN if MIPS || MICROBLAZE + default SYS_LITTLE_ENDIAN help - Some MIPS boards can be configured for either little or big endian + Some boards can be configured for either little or big endian byte order. These modes require different U-Boot images. In general there is one preferred byteorder for a particular system but some systems are just as commonly used in the one or the other endianness. config SYS_BIG_ENDIAN bool "Big endian" - depends on (SUPPORTS_BIG_ENDIAN && MIPS) || MICROBLAZE + depends on SUPPORT_BIG_ENDIAN config SYS_LITTLE_ENDIAN bool "Little endian" - depends on (SUPPORTS_LITTLE_ENDIAN && MIPS) || MICROBLAZE - + depends on SUPPORT_LITTLE_ENDIAN endchoice - -endif diff --git a/arch/arc/include/asm/arc-bcr.h b/arch/arc/include/asm/arc-bcr.h index a6c972bf1e3..d4de9b818c1 100644 --- a/arch/arc/include/asm/arc-bcr.h +++ b/arch/arc/include/asm/arc-bcr.h @@ -15,7 +15,7 @@ union bcr_di_cache { struct { -#ifdef CONFIG_CPU_BIG_ENDIAN +#ifdef CONFIG_SYS_BIG_ENDIAN unsigned int pad:12, line_len:4, sz:4, config:4, ver:8; #else unsigned int ver:8, config:4, sz:4, line_len:4, pad:12; @@ -26,7 +26,7 @@ union bcr_di_cache { union bcr_slc_cfg { struct { -#ifdef CONFIG_CPU_BIG_ENDIAN +#ifdef CONFIG_SYS_BIG_ENDIAN unsigned int pad:24, way:2, lsz:2, sz:4; #else unsigned int sz:4, lsz:2, way:2, pad:24; @@ -37,7 +37,7 @@ union bcr_slc_cfg { union bcr_generic { struct { -#ifdef CONFIG_CPU_BIG_ENDIAN +#ifdef CONFIG_SYS_BIG_ENDIAN unsigned int pad:24, ver:8; #else unsigned int ver:8, pad:24; @@ -48,7 +48,7 @@ union bcr_generic { union bcr_clust_cfg { struct { -#ifdef CONFIG_CPU_BIG_ENDIAN +#ifdef CONFIG_SYS_BIG_ENDIAN unsigned int pad:7, c:1, num_entries:8, num_cores:8, ver:8; #else unsigned int ver:8, num_cores:8, num_entries:8, c:1, pad:7; @@ -59,7 +59,7 @@ union bcr_clust_cfg { union bcr_mmu_4 { struct { -#ifdef CONFIG_CPU_BIG_ENDIAN +#ifdef CONFIG_SYS_BIG_ENDIAN unsigned int ver:8, sasid:1, sz1:4, sz0:4, res:2, pae:1, n_ways:2, n_entry:2, n_super:2, u_itlb:3, u_dtlb:3; #else diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ba0359fed5a..656f588a97c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -802,7 +802,7 @@ config ARCH_OMAP2PLUS bool "TI OMAP2+" select CPU_V7A select GPIO_EXTRA_HEADER - select SPL_BOARD_INIT if SPL + select SPL_SOC_INIT if SPL select SPL_STACK_R if SPL select SUPPORT_SPL imply TI_SYSC if DM && OF_CONTROL diff --git a/arch/arm/cpu/armv8/linux-kernel-image-header-vars.h b/arch/arm/cpu/armv8/linux-kernel-image-header-vars.h index b6394aee165..c6af825dbc7 100644 --- a/arch/arm/cpu/armv8/linux-kernel-image-header-vars.h +++ b/arch/arm/cpu/armv8/linux-kernel-image-header-vars.h @@ -31,7 +31,7 @@ * when PIE is in effect. So we need to split them up in 32-bit high and low * words. */ -#ifdef CONFIG_CPU_BIG_ENDIAN +#ifdef CONFIG_SYS_BIG_ENDIAN #define DATA_LE32(data) \ ((((data) & 0x000000ff) << 24) | \ (((data) & 0x0000ff00) << 8) | \ @@ -55,7 +55,7 @@ #endif #define __MEM_USAGE (__CODE_DATA_SIZE + __MAX_EXTRA_RAM_USAGE) -#ifdef CONFIG_CPU_BIG_ENDIAN +#ifdef CONFIG_SYS_BIG_ENDIAN #define __HEAD_FLAG_BE 1 #else #define __HEAD_FLAG_BE 0 diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 3ae4110d604..82d37adae3f 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -883,7 +883,6 @@ dtb-$(CONFIG_MX7) += imx7d-sdb.dtb \ imx7-cm.dtb \ imx7d-colibri-emmc-eval-v3.dtb \ imx7d-colibri-eval-v3.dtb \ - imx7s-warp.dtb \ imx7d-meerkat96.dtb \ imx7d-pico-pi.dtb \ imx7d-pico-hobbit.dtb \ diff --git a/arch/arm/dts/imx7s-warp.dts b/arch/arm/dts/imx7s-warp.dts deleted file mode 100644 index e8734d218b9..00000000000 --- a/arch/arm/dts/imx7s-warp.dts +++ /dev/null @@ -1,500 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (C) 2016 NXP Semiconductors. - * Author: Fabio Estevam <fabio.estevam@nxp.com> - */ - -/dts-v1/; - -#include <dt-bindings/input/input.h> -#include "imx7s.dtsi" - -/ { - model = "Element14 Warp i.MX7 Board"; - compatible = "element14,imx7s-warp", "fsl,imx7s"; - - memory@80000000 { - device_type = "memory"; - reg = <0x80000000 0x20000000>; - }; - - gpio-keys { - compatible = "gpio-keys"; - pinctrl-0 = <&pinctrl_gpio>; - autorepeat; - - back { - label = "Back"; - gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; - linux,code = <KEY_BACK>; - wakeup-source; - }; - }; - - reg_brcm: regulator-brcm { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_brcm_reg>; - regulator-name = "brcm_reg"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - startup-delay-us = <200000>; - }; - - reg_bt: regulator-bt { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_bt_reg>; - enable-active-high; - gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>; - regulator-name = "bt_reg"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - reg_peri_3p15v: regulator-peri-3p15v { - compatible = "regulator-fixed"; - regulator-name = "peri_3p15v_reg"; - regulator-min-microvolt = <3150000>; - regulator-max-microvolt = <3150000>; - regulator-always-on; - }; - - sound { - compatible = "simple-audio-card"; - simple-audio-card,name = "imx7-sgtl5000"; - simple-audio-card,format = "i2s"; - simple-audio-card,bitclock-master = <&dailink_master>; - simple-audio-card,frame-master = <&dailink_master>; - simple-audio-card,cpu { - sound-dai = <&sai1>; - }; - - dailink_master: simple-audio-card,codec { - sound-dai = <&codec>; - clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; - }; - }; -}; - -&clks { - assigned-clocks = <&clks IMX7D_PLL_AUDIO_POST_DIV>; - assigned-clock-rates = <884736000>; -}; - -&csi { - status = "okay"; -}; - -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; - status = "okay"; - - pmic: pfuze3000@8 { - compatible = "fsl,pfuze3000"; - reg = <0x08>; - - regulators { - sw1a_reg: sw1a { - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1475000>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay = <6250>; - }; - - /* use sw1c_reg to align with pfuze100/pfuze200 */ - sw1c_reg: sw1b { - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1475000>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay = <6250>; - }; - - sw2_reg: sw2 { - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1850000>; - regulator-boot-on; - regulator-always-on; - }; - - sw3a_reg: sw3 { - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1650000>; - regulator-boot-on; - regulator-always-on; - }; - - swbst_reg: swbst { - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5150000>; - regulator-boot-on; - regulator-always-on; - }; - - snvs_reg: vsnvs { - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <3000000>; - regulator-boot-on; - regulator-always-on; - }; - - vref_reg: vrefddr { - regulator-boot-on; - regulator-always-on; - }; - - vgen1_reg: vldo1 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vgen2_reg: vldo2 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1550000>; - }; - - vgen3_reg: vccsd { - regulator-min-microvolt = <2850000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vgen4_reg: v33 { - regulator-min-microvolt = <2850000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vgen5_reg: vldo3 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vgen6_reg: vldo4 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - }; - }; -}; - -&i2c2 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2>; - status = "okay"; - - ov2680: camera@36 { - compatible = "ovti,ov2680"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ov2680>; - reg = <0x36>; - clocks = <&osc>; - clock-names = "xvclk"; - reset-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; - DOVDD-supply = <&sw2_reg>; - DVDD-supply = <&sw2_reg>; - AVDD-supply = <®_peri_3p15v>; - - port { - ov2680_to_mipi: endpoint { - remote-endpoint = <&mipi_from_sensor>; - clock-lanes = <0>; - data-lanes = <1>; - }; - }; - }; -}; - -&i2c3 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c3>; - status = "okay"; -}; - -&i2c4 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c4>; - status = "okay"; - - codec: sgtl5000@a { - #sound-dai-cells = <0>; - reg = <0x0a>; - compatible = "fsl,sgtl5000"; - clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sai1_mclk>; - VDDA-supply = <&vgen4_reg>; - VDDIO-supply = <&vgen4_reg>; - VDDD-supply = <&vgen2_reg>; - }; - - mpl3115@60 { - compatible = "fsl,mpl3115"; - reg = <0x60>; - }; -}; - -&mipi_csi { - clock-frequency = <166000000>; - status = "okay"; - - ports { - port@0 { - reg = <0>; - - mipi_from_sensor: endpoint { - remote-endpoint = <&ov2680_to_mipi>; - data-lanes = <1>; - }; - }; - }; -}; - -&sai1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sai1>; - assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>, - <&clks IMX7D_SAI1_ROOT_CLK>; - assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>; - assigned-clock-rates = <0>, <36864000>; - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>; - assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; - status = "okay"; -}; - -&uart3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3>; - assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>; - assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; - uart-has-rtscts; - status = "okay"; -}; - -&uart6 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart6>; - assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>; - assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; - fsl,dte-mode; - status = "okay"; -}; - -&usbotg1 { - dr_mode = "peripheral"; - status = "okay"; -}; - -&usdhc1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc1>; - bus-width = <4>; - keep-power-in-suspend; - no-1-8-v; - non-removable; - vmmc-supply = <®_brcm>; - status = "okay"; -}; - -&usdhc3 { - pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc3>; - pinctrl-1 = <&pinctrl_usdhc3_100mhz>; - pinctrl-2 = <&pinctrl_usdhc3_200mhz>; - assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>; - assigned-clock-rates = <400000000>; - bus-width = <8>; - no-1-8-v; - fsl,tuning-step = <2>; - non-removable; - status = "okay"; -}; - -&video_mux { - status = "okay"; -}; - -&wdog1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_wdog>; - fsl,ext-reset-output; - status = "okay"; -}; - -&iomuxc { - pinctrl_brcm_reg: brcmreggrp { - fsl,pins = < - MX7D_PAD_SD2_WP__GPIO5_IO10 0x14 /* WL_REG_ON */ - >; - }; - - pinctrl_bt_reg: btreggrp { - fsl,pins = < - MX7D_PAD_SD2_DATA3__GPIO5_IO17 0x14 /* BT_REG_ON */ - >; - }; - - pinctrl_gpio: gpiogrp { - fsl,pins = < - MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1 0x14 - >; - }; - - pinctrl_i2c1: i2c1grp { - fsl,pins = < - MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f - MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f - >; - }; - - pinctrl_i2c2: i2c2grp { - fsl,pins = < - MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f - MX7D_PAD_I2C2_SCL__I2C2_SCL 0x4000007f - >; - }; - - pinctrl_i2c3: i2c3grp { - fsl,pins = < - MX7D_PAD_I2C3_SDA__I2C3_SDA 0x4000007f - MX7D_PAD_I2C3_SCL__I2C3_SCL 0x4000007f - >; - }; - - pinctrl_i2c4: i2c4grp { - fsl,pins = < - MX7D_PAD_I2C4_SCL__I2C4_SCL 0x4000007f - MX7D_PAD_I2C4_SDA__I2C4_SDA 0x4000007f - >; - }; - - pinctrl_ov2680: ov2660grp { - fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3 0x14 - >; - }; - - pinctrl_sai1: sai1grp { - fsl,pins = < - MX7D_PAD_SAI1_RX_DATA__SAI1_RX_DATA0 0x1f - MX7D_PAD_SAI1_TX_BCLK__SAI1_TX_BCLK 0x1f - MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x1f - MX7D_PAD_SAI1_TX_DATA__SAI1_TX_DATA0 0x30 - >; - }; - - pinctrl_sai1_mclk: sai1mclkgrp { - fsl,pins = < - MX7D_PAD_SAI1_MCLK__SAI1_MCLK 0x1f - >; - }; - - pinctrl_uart1: uart1grp { - fsl,pins = < - MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x79 - MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x79 - >; - }; - - pinctrl_uart3: uart3grp { - fsl,pins = < - MX7D_PAD_UART3_TX_DATA__UART3_DCE_TX 0x79 - MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX 0x79 - MX7D_PAD_UART3_CTS_B__UART3_DCE_CTS 0x79 - MX7D_PAD_UART3_RTS_B__UART3_DCE_RTS 0x79 - >; - }; - - pinctrl_uart6: uart6grp { - fsl,pins = < - MX7D_PAD_ECSPI1_MOSI__UART6_DTE_RX 0x79 - MX7D_PAD_ECSPI1_SCLK__UART6_DTE_TX 0x79 - >; - }; - - pinctrl_usdhc1: usdhc1grp { - fsl,pins = < - MX7D_PAD_SD1_CMD__SD1_CMD 0x59 - MX7D_PAD_SD1_CLK__SD1_CLK 0x19 - MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59 - MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59 - MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59 - MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59 - MX7D_PAD_SD2_RESET_B__GPIO5_IO11 0x14 /* WL_HOST_WAKE */ - >; - }; - - pinctrl_usdhc3: usdhc3grp { - fsl,pins = < - MX7D_PAD_SD3_CMD__SD3_CMD 0x59 - MX7D_PAD_SD3_CLK__SD3_CLK 0x19 - MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59 - MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59 - MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59 - MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59 - MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59 - MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59 - MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59 - MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59 - MX7D_PAD_SD3_RESET_B__SD3_RESET_B 0x19 - >; - }; - - pinctrl_usdhc3_100mhz: usdhc3grp_100mhz { - fsl,pins = < - MX7D_PAD_SD3_CMD__SD3_CMD 0x5a - MX7D_PAD_SD3_CLK__SD3_CLK 0x1a - MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a - MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a - MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a - MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a - MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a - MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a - MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a - MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a - MX7D_PAD_SD3_RESET_B__SD3_RESET_B 0x1a - >; - }; - - pinctrl_usdhc3_200mhz: usdhc3grp_200mhz { - fsl,pins = < - MX7D_PAD_SD3_CMD__SD3_CMD 0x5b - MX7D_PAD_SD3_CLK__SD3_CLK 0x1b - MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b - MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b - MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b - MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b - MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b - MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b - MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b - MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b - MX7D_PAD_SD3_RESET_B__SD3_RESET_B 0x1b - >; - }; -}; - -&iomuxc_lpsr { - pinctrl_wdog: wdoggrp { - fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x74 - >; - }; -}; diff --git a/arch/arm/dts/omap3-sniper-u-boot.dtsi b/arch/arm/dts/omap3-sniper-u-boot.dtsi new file mode 100644 index 00000000000..d467f533a12 --- /dev/null +++ b/arch/arm/dts/omap3-sniper-u-boot.dtsi @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2024 Paul Kocialkowski <contact@paulk.fr> + */ + +#include "omap3-u-boot.dtsi" + +/ { + chosen { + stdout-path = &uart3; + }; +}; + +&i2c1 { + clock-frequency = <400000>; +}; diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h b/arch/arm/include/asm/arch-am33xx/sys_proto.h index 513cdaca859..7abcd1cb615 100644 --- a/arch/arm/include/asm/arch-am33xx/sys_proto.h +++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h @@ -37,7 +37,6 @@ u32 wait_on_value(u32, u32, void *, u32); #ifdef CONFIG_NOR_BOOT void enable_norboot_pin_mux(void); #endif -void am33xx_spl_board_init(void); int am335x_get_efuse_mpu_max_freq(struct ctrl_dev *cdev); int am335x_get_mpu_vdd(int sil_rev, int frequency); int am335x_get_tps65910_mpu_vdd(int sil_rev, int frequency); diff --git a/arch/arm/mach-imx/mx7/Kconfig b/arch/arm/mach-imx/mx7/Kconfig index 3c0208e13dd..2e68557d6a9 100644 --- a/arch/arm/mach-imx/mx7/Kconfig +++ b/arch/arm/mach-imx/mx7/Kconfig @@ -87,6 +87,7 @@ config TARGET_WARP7 select DM_THERMAL select MX7D imply CMD_DM + imply OF_UPSTREAM config TARGET_COLIBRI_IMX7 bool "Support Colibri iMX7S/iMX7D modules" diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c index 84a60dedd72..abdc1e40335 100644 --- a/arch/arm/mach-omap2/am33xx/board.c +++ b/arch/arm/mach-omap2/am33xx/board.c @@ -337,14 +337,6 @@ int board_early_init_f(void) return 0; } -/* - * This function is the place to do per-board things such as ramp up the - * MPU clock frequency. - */ -__weak void am33xx_spl_board_init(void) -{ -} - #if defined(CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC) static void rtc32k_enable(void) { diff --git a/arch/arm/mach-omap2/boot-common.c b/arch/arm/mach-omap2/boot-common.c index e1ea3515ac1..649bc07047a 100644 --- a/arch/arm/mach-omap2/boot-common.c +++ b/arch/arm/mach-omap2/boot-common.c @@ -269,7 +269,7 @@ skip_ipu1: debug("%s: IPU2 failed to start (%d)\n", __func__, ret); } -void spl_board_init(void) +void spl_soc_init(void) { /* Prepare console output */ preloader_console_init(); @@ -286,9 +286,6 @@ void spl_board_init(void) #if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) hw_watchdog_init(); #endif -#ifdef CONFIG_AM33XX - am33xx_spl_board_init(); -#endif if (IS_ENABLED(CONFIG_SPL_BUILD) && IS_ENABLED(CONFIG_REMOTEPROC_TI_IPU)) spl_boot_ipu(); diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index eb7f3ad2376..38577af43d0 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -28,14 +28,14 @@ config TARGET_MALTA select OF_ISA_BUS select PCI_MAP_SYSTEM_MEMORY select ROM_EXCEPTION_VECTORS - select SUPPORTS_BIG_ENDIAN select SUPPORTS_CPU_MIPS32_R1 select SUPPORTS_CPU_MIPS32_R2 select SUPPORTS_CPU_MIPS32_R6 select SUPPORTS_CPU_MIPS64_R1 select SUPPORTS_CPU_MIPS64_R2 select SUPPORTS_CPU_MIPS64_R6 - select SUPPORTS_LITTLE_ENDIAN + select SUPPORT_BIG_ENDIAN + select SUPPORT_LITTLE_ENDIAN select SWAP_IO_SPACE imply CMD_DM @@ -86,7 +86,7 @@ config ARCH_MTMIPS select ROM_EXCEPTION_VECTORS select SUPPORTS_CPU_MIPS32_R1 select SUPPORTS_CPU_MIPS32_R2 - select SUPPORTS_LITTLE_ENDIAN + select SUPPORT_LITTLE_ENDIAN select SUPPORT_SPL config ARCH_JZ47XX @@ -112,7 +112,7 @@ config ARCH_OCTEON select MIPS_TUNE_OCTEON3 select MTD select ROM_EXCEPTION_VECTORS - select SUPPORTS_BIG_ENDIAN + select SUPPORT_BIG_ENDIAN select SUPPORTS_CPU_MIPS64_OCTEON select PHYS_64BIT select OF_CONTROL @@ -138,14 +138,14 @@ config TARGET_BOSTON select OF_BOARD_SETUP select OF_CONTROL select ROM_EXCEPTION_VECTORS - select SUPPORTS_BIG_ENDIAN select SUPPORTS_CPU_MIPS32_R1 select SUPPORTS_CPU_MIPS32_R2 select SUPPORTS_CPU_MIPS32_R6 select SUPPORTS_CPU_MIPS64_R1 select SUPPORTS_CPU_MIPS64_R2 select SUPPORTS_CPU_MIPS64_R6 - select SUPPORTS_LITTLE_ENDIAN + select SUPPORT_BIG_ENDIAN + select SUPPORT_LITTLE_ENDIAN imply CMD_DM config TARGET_XILFPGA @@ -159,7 +159,7 @@ config TARGET_XILFPGA select ROM_EXCEPTION_VECTORS select SUPPORTS_CPU_MIPS32_R1 select SUPPORTS_CPU_MIPS32_R2 - select SUPPORTS_LITTLE_ENDIAN + select SUPPORT_LITTLE_ENDIAN imply CMD_DM help This supports IMGTEC MIPSfpga platform @@ -413,12 +413,6 @@ config MIPS_BOOT_FDT endmenu -config SUPPORTS_BIG_ENDIAN - bool - -config SUPPORTS_LITTLE_ENDIAN - bool - config SUPPORTS_CPU_MIPS32_R1 bool diff --git a/arch/mips/mach-ath79/Kconfig b/arch/mips/mach-ath79/Kconfig index cd85d1b6c31..2fa628568aa 100644 --- a/arch/mips/mach-ath79/Kconfig +++ b/arch/mips/mach-ath79/Kconfig @@ -8,7 +8,7 @@ config SOC_AR933X bool select MIPS_TUNE_24KC select ROM_EXCEPTION_VECTORS - select SUPPORTS_BIG_ENDIAN + select SUPPORT_BIG_ENDIAN select SUPPORTS_CPU_MIPS32_R1 select SUPPORTS_CPU_MIPS32_R2 help @@ -17,7 +17,7 @@ config SOC_AR933X config SOC_AR934X bool select MIPS_TUNE_74KC - select SUPPORTS_BIG_ENDIAN + select SUPPORT_BIG_ENDIAN select SUPPORTS_CPU_MIPS32_R1 select SUPPORTS_CPU_MIPS32_R2 select USB_EHCI_IS_TDI if USB_EHCI_HCD @@ -28,7 +28,7 @@ config SOC_QCA953X bool select MIPS_TUNE_24KC select ROM_EXCEPTION_VECTORS - select SUPPORTS_BIG_ENDIAN + select SUPPORT_BIG_ENDIAN select SUPPORTS_CPU_MIPS32_R1 select SUPPORTS_CPU_MIPS32_R2 help @@ -37,7 +37,7 @@ config SOC_QCA953X config SOC_QCA956X bool select MIPS_TUNE_74KC - select SUPPORTS_BIG_ENDIAN + select SUPPORT_BIG_ENDIAN select SUPPORTS_CPU_MIPS32_R1 select SUPPORTS_CPU_MIPS32_R2 help diff --git a/arch/mips/mach-bmips/Kconfig b/arch/mips/mach-bmips/Kconfig index eb9ea34c52f..b140552657f 100644 --- a/arch/mips/mach-bmips/Kconfig +++ b/arch/mips/mach-bmips/Kconfig @@ -23,7 +23,7 @@ config SOC_BMIPS_BCM3380 bool "BMIPS BCM3380 family" select SYS_CACHE_SHIFT_4 select MIPS_TUNE_4KC - select SUPPORTS_BIG_ENDIAN + select SUPPORT_BIG_ENDIAN select SUPPORTS_CPU_MIPS32_R1 select SYSRESET_WATCHDOG help @@ -33,7 +33,7 @@ config SOC_BMIPS_BCM6318 bool "BMIPS BCM6318 family" select SYS_CACHE_SHIFT_4 select MIPS_TUNE_4KC - select SUPPORTS_BIG_ENDIAN + select SUPPORT_BIG_ENDIAN select SUPPORTS_CPU_MIPS32_R1 select SYSRESET_SYSCON help @@ -43,7 +43,7 @@ config SOC_BMIPS_BCM6328 bool "BMIPS BCM6328 family" select SYS_CACHE_SHIFT_4 select MIPS_TUNE_4KC - select SUPPORTS_BIG_ENDIAN + select SUPPORT_BIG_ENDIAN select SUPPORTS_CPU_MIPS32_R1 select SYSRESET_SYSCON help @@ -53,7 +53,7 @@ config SOC_BMIPS_BCM6338 bool "BMIPS BCM6338 family" select SYS_CACHE_SHIFT_4 select MIPS_TUNE_4KC - select SUPPORTS_BIG_ENDIAN + select SUPPORT_BIG_ENDIAN select SUPPORTS_CPU_MIPS32_R1 select SYSRESET_SYSCON help @@ -63,7 +63,7 @@ config SOC_BMIPS_BCM6348 bool "BMIPS BCM6348 family" select SYS_CACHE_SHIFT_4 select MIPS_TUNE_4KC - select SUPPORTS_BIG_ENDIAN + select SUPPORT_BIG_ENDIAN select SUPPORTS_CPU_MIPS32_R1 select SYSRESET_WATCHDOG help @@ -73,7 +73,7 @@ config SOC_BMIPS_BCM6358 bool "BMIPS BCM6358 family" select SYS_CACHE_SHIFT_4 select MIPS_TUNE_4KC - select SUPPORTS_BIG_ENDIAN + select SUPPORT_BIG_ENDIAN select SUPPORTS_CPU_MIPS32_R1 select SYSRESET_SYSCON help @@ -83,7 +83,7 @@ config SOC_BMIPS_BCM6368 bool "BMIPS BCM6368 family" select SYS_CACHE_SHIFT_4 select MIPS_TUNE_4KC - select SUPPORTS_BIG_ENDIAN + select SUPPORT_BIG_ENDIAN select SUPPORTS_CPU_MIPS32_R1 select SYSRESET_SYSCON help @@ -93,7 +93,7 @@ config SOC_BMIPS_BCM6362 bool "BMIPS BCM6362 family" select SYS_CACHE_SHIFT_4 select MIPS_TUNE_4KC - select SUPPORTS_BIG_ENDIAN + select SUPPORT_BIG_ENDIAN select SUPPORTS_CPU_MIPS32_R1 select SYSRESET_SYSCON help @@ -103,7 +103,7 @@ config SOC_BMIPS_BCM63268 bool "BMIPS BCM63268 family" select SYS_CACHE_SHIFT_4 select MIPS_TUNE_4KC - select SUPPORTS_BIG_ENDIAN + select SUPPORT_BIG_ENDIAN select SUPPORTS_CPU_MIPS32_R1 select SYSRESET_SYSCON help @@ -114,7 +114,7 @@ config SOC_BMIPS_BCM6838 bool "BMIPS BCM6838 family" select SYS_CACHE_SHIFT_4 select MIPS_TUNE_4KC - select SUPPORTS_BIG_ENDIAN + select SUPPORT_BIG_ENDIAN select SUPPORTS_CPU_MIPS32_R1 select SYSRESET_SYSCON help diff --git a/arch/mips/mach-jz47xx/Kconfig b/arch/mips/mach-jz47xx/Kconfig index dcaac016286..858173e75b4 100644 --- a/arch/mips/mach-jz47xx/Kconfig +++ b/arch/mips/mach-jz47xx/Kconfig @@ -6,7 +6,7 @@ config SYS_SOC config SOC_JZ4780 bool - select SUPPORTS_LITTLE_ENDIAN + select SUPPORT_LITTLE_ENDIAN select SUPPORTS_CPU_MIPS32_R1 select SUPPORTS_CPU_MIPS32_R2 help diff --git a/arch/mips/mach-mscc/Kconfig b/arch/mips/mach-mscc/Kconfig index affc4721f82..367d5248a1c 100644 --- a/arch/mips/mach-mscc/Kconfig +++ b/arch/mips/mach-mscc/Kconfig @@ -6,10 +6,10 @@ menu "MSCC VCore-III platforms" config SOC_VCOREIII select MIPS_TUNE_24KC select ROM_EXCEPTION_VECTORS - select SUPPORTS_BIG_ENDIAN + select SUPPORT_BIG_ENDIAN select SUPPORTS_CPU_MIPS32_R1 select SUPPORTS_CPU_MIPS32_R2 - select SUPPORTS_LITTLE_ENDIAN + select SUPPORT_LITTLE_ENDIAN bool config SYS_SOC diff --git a/arch/mips/mach-pic32/Kconfig b/arch/mips/mach-pic32/Kconfig index 2afa972074c..52d2eec0a76 100644 --- a/arch/mips/mach-pic32/Kconfig +++ b/arch/mips/mach-pic32/Kconfig @@ -13,7 +13,7 @@ config SOC_PIC32MZDA select ROM_EXCEPTION_VECTORS select SUPPORTS_CPU_MIPS32_R1 select SUPPORTS_CPU_MIPS32_R2 - select SUPPORTS_LITTLE_ENDIAN + select SUPPORT_LITTLE_ENDIAN select SYS_MIPS_CACHE_INIT_RAM_LOAD help This supports Microchip PIC32MZ[DA] family of microcontrollers. diff --git a/board/BuR/brppt1/board.c b/board/BuR/brppt1/board.c index 192a2fa6327..80e0ca805b5 100644 --- a/board/BuR/brppt1/board.c +++ b/board/BuR/brppt1/board.c @@ -79,7 +79,7 @@ static const struct ctrl_ioregs ddr3_ioregs = { #define OSC (V_OSCK/1000000) static const struct dpll_params dpll_ddr3 = { 400, OSC-1, 1, -1, -1, -1, -1}; -void am33xx_spl_board_init(void) +void spl_board_init(void) { int rc; diff --git a/board/BuR/brsmarc1/board.c b/board/BuR/brsmarc1/board.c index 2d3f593d0ab..bfb6adf6d5c 100644 --- a/board/BuR/brsmarc1/board.c +++ b/board/BuR/brsmarc1/board.c @@ -72,7 +72,7 @@ static const struct ctrl_ioregs ddr3_ioregs = { #define OSC (V_OSCK / 1000000) const struct dpll_params dpll_ddr3 = { 400, OSC - 1, 1, -1, -1, -1, -1}; -void am33xx_spl_board_init(void) +void spl_board_init(void) { struct cm_perpll *const cmper = (struct cm_perpll *)CM_PER; struct cm_wkuppll *const cmwkup = (struct cm_wkuppll *)CM_WKUP; diff --git a/board/BuR/brxre1/board.c b/board/BuR/brxre1/board.c index b9b595cb156..510d2af3147 100644 --- a/board/BuR/brxre1/board.c +++ b/board/BuR/brxre1/board.c @@ -79,7 +79,7 @@ static const struct ctrl_ioregs ddr3_ioregs = { #define OSC (V_OSCK / 1000000) const struct dpll_params dpll_ddr3 = { 400, OSC - 1, 1, -1, -1, -1, -1}; -void am33xx_spl_board_init(void) +void spl_board_init(void) { int rc; diff --git a/board/bosch/guardian/board.c b/board/bosch/guardian/board.c index 41d7567ad21..33ba7a7751c 100644 --- a/board/bosch/guardian/board.c +++ b/board/bosch/guardian/board.c @@ -75,7 +75,7 @@ static struct emif_regs ddr3_emif_reg_data = { const struct dpll_params dpll_ddr = { 400, OSC - 1, 1, -1, -1, -1, -1}; -void am33xx_spl_board_init(void) +void spl_board_init(void) { int mpu_vdd; int usb_cur_lim; diff --git a/board/bosch/shc/board.c b/board/bosch/shc/board.c index ab688745938..59628ce6f57 100644 --- a/board/bosch/shc/board.c +++ b/board/bosch/shc/board.c @@ -310,7 +310,7 @@ const struct dpll_params *get_dpll_ddr_params(void) const struct dpll_params dpll_mpu_shc_opp100 = { 99, MPUPLL_N, 1, -1, -1, -1, -1}; -void am33xx_spl_board_init(void) +void spl_board_init(void) { int sil_rev; int mpu_vdd; diff --git a/board/eets/pdu001/board.c b/board/eets/pdu001/board.c index 2ad256f8635..00f9a5ef341 100644 --- a/board/eets/pdu001/board.c +++ b/board/eets/pdu001/board.c @@ -56,10 +56,10 @@ DECLARE_GLOBAL_DATA_PTR; * boot device save register * ------------------------- * The boot device can be quired by 'spl_boot_device()' in - * 'am33xx_spl_board_init'. However it can't be saved in the u-boot + * 'spl_board_init'. However it can't be saved in the u-boot * environment here. In turn 'spl_boot_device' can't be called in * 'board_late_init' which allows writing to u-boot environment. - * To get the boot device from 'am33xx_spl_board_init' to + * To get the boot device from 'spl_board_init' to * 'board_late_init' we therefore use a scratch register from the RTC. */ #define CFG_SYS_RTC_SCRATCH0 0x60 @@ -192,7 +192,7 @@ const struct dpll_params dpll_ddr_evm_sk = { const struct dpll_params dpll_ddr_bone_black = { 400, OSC - 1, 1, -1, -1, -1, -1}; -void am33xx_spl_board_init(void) +void spl_board_init(void) { struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; diff --git a/board/grinn/chiliboard/board.c b/board/grinn/chiliboard/board.c index 8313b37655f..e0eb8aa9f2b 100644 --- a/board/grinn/chiliboard/board.c +++ b/board/grinn/chiliboard/board.c @@ -80,7 +80,7 @@ void set_mux_conf_regs(void) enable_board_pin_mux(); } -void am33xx_spl_board_init(void) +void spl_board_init(void) { chilisom_spl_board_init(); } diff --git a/board/lg/sniper/sniper.c b/board/lg/sniper/sniper.c index 88d5d088143..9d0959f294e 100644 --- a/board/lg/sniper/sniper.c +++ b/board/lg/sniper/sniper.c @@ -14,11 +14,9 @@ #include <linux/ctype.h> #include <linux/usb/musb.h> #include <asm/omap_musb.h> -#include <asm/arch/mmc_host_def.h> #include <asm/arch/sys_proto.h> #include <asm/arch/mem.h> #include <asm/io.h> -#include <ns16550.h> #include <twl4030.h> #include "sniper.h" @@ -30,18 +28,6 @@ const omap3_sysinfo sysinfo = { .nand_string = "MMC" }; -static const struct ns16550_plat serial_omap_plat = { - .base = OMAP34XX_UART3, - .reg_shift = 2, - .clock = V_NS16550_CLK, - .fcr = UART_FCR_DEFVAL, -}; - -U_BOOT_DRVINFO(sniper_serial) = { - .name = "ns16550_serial", - .plat = &serial_omap_plat -}; - #if defined(CONFIG_USB_MUSB_HOST) || defined(CONFIG_USB_MUSB_GADGET) static struct musb_hdrc_config musb_config = { .multipoint = 1, @@ -77,6 +63,11 @@ void get_board_mem_timings(struct board_sdrc_timings *timings) timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; timings->mr = MICRON_V_MR_165; } + +void spl_board_init(void) +{ + twl4030_power_mmc_init(1); +} #endif int board_init(void) @@ -188,13 +179,3 @@ int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason) return omap_reboot_mode_store("b"); } - -int board_mmc_init(struct bd_info *bis) -{ - return omap_mmc_init(1, 0, 0, -1, -1); -} - -void board_mmc_power_init(void) -{ - twl4030_power_mmc_init(1); -} diff --git a/board/tcl/sl50/board.c b/board/tcl/sl50/board.c index 484b4e24428..6c60c70b7b4 100644 --- a/board/tcl/sl50/board.c +++ b/board/tcl/sl50/board.c @@ -92,7 +92,7 @@ int spl_start_uboot(void) const struct dpll_params dpll_ddr_sl50 = { 400, OSC-1, 1, -1, -1, -1, -1}; -void am33xx_spl_board_init(void) +void spl_board_init(void) { int mpu_vdd; diff --git a/board/vscom/baltos/board.c b/board/vscom/baltos/board.c index cea25f8c900..f54f183038b 100644 --- a/board/vscom/baltos/board.c +++ b/board/vscom/baltos/board.c @@ -177,7 +177,7 @@ const struct dpll_params dpll_ddr_evm_sk = { const struct dpll_params dpll_ddr_baltos = { 400, OSC-1, 1, -1, -1, -1, -1}; -void am33xx_spl_board_init(void) +void spl_board_init(void) { int sil_rev, mpu_vdd; int freq; diff --git a/boot/bootm.c b/boot/bootm.c index 376d63aafc9..480f8e6a0e6 100644 --- a/boot/bootm.c +++ b/boot/bootm.c @@ -740,18 +740,6 @@ ulong bootm_disable_interrupts(void) eth_halt(); #endif -#if defined(CONFIG_CMD_USB) - /* - * turn off USB to prevent the host controller from writing to the - * SDRAM while Linux is booting. This could happen (at least for OHCI - * controller), because the HCCA (Host Controller Communication Area) - * lies within the SDRAM and the host controller writes continously to - * this area (as busmaster!). The HccaFrameNumber is for example - * updated every 1 ms within the HCCA structure in SDRAM! For more - * details see the OpenHCI specification. - */ - usb_stop(); -#endif return iflag; } diff --git a/cmd/cpu.c b/cmd/cpu.c index 9e323069b9e..27552507564 100644 --- a/cmd/cpu.c +++ b/cmd/cpu.c @@ -3,6 +3,7 @@ * Copyright (c) 2015 Google, Inc * Written by Simon Glass <sjg@chromium.org> * Copyright (c) 2017 Álvaro Fernández Rojas <noltari@gmail.com> + * Copyright 2024 NXP */ #include <command.h> @@ -18,6 +19,19 @@ static const char *cpu_feature_name[CPU_FEAT_COUNT] = { "Device ID", }; +static struct udevice *cpu_find_device(unsigned long cpu_id) +{ + struct udevice *dev; + + for (uclass_first_device(UCLASS_CPU, &dev); dev; + uclass_next_device(&dev)) { + if (cpu_id == dev_seq(dev)) + return dev; + } + + return NULL; +} + static int print_cpu_list(bool detail) { struct udevice *dev; @@ -82,10 +96,36 @@ static int do_cpu_detail(struct cmd_tbl *cmdtp, int flag, int argc, return 0; } +static int do_cpu_release(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + struct udevice *dev; + unsigned long cpu_id; + unsigned long long boot_addr; + + if (argc != 3) + return CMD_RET_USAGE; + + cpu_id = dectoul(argv[1], NULL); + dev = cpu_find_device(cpu_id); + if (!dev) + return CMD_RET_FAILURE; + + boot_addr = simple_strtoull(argv[2], NULL, 16); + + if (cpu_release_core(dev, boot_addr)) + return CMD_RET_FAILURE; + + return 0; +} + U_BOOT_LONGHELP(cpu, "list - list available CPUs\n" - "cpu detail - show CPU detail"); + "cpu detail - show CPU detail\n" + "cpu release <core ID> <addr> - Release CPU <core ID> at <addr>\n" + " <core ID>: the sequence number in list subcommand outputs"); U_BOOT_CMD_WITH_SUBCMDS(cpu, "display information about CPUs", cpu_help_text, U_BOOT_SUBCMD_MKENT(list, 1, 1, do_cpu_list), - U_BOOT_SUBCMD_MKENT(detail, 1, 0, do_cpu_detail)); + U_BOOT_SUBCMD_MKENT(detail, 1, 0, do_cpu_detail), + U_BOOT_SUBCMD_MKENT(release, 3, 0, do_cpu_release)); diff --git a/cmd/led.c b/cmd/led.c index 4256b3429c2..2f786f34c67 100644 --- a/cmd/led.c +++ b/cmd/led.c @@ -15,9 +15,7 @@ static const char *const state_label[] = { [LEDST_OFF] = "off", [LEDST_ON] = "on", [LEDST_TOGGLE] = "toggle", -#ifdef CONFIG_LED_BLINK [LEDST_BLINK] = "blink", -#endif }; enum led_state_t get_led_cmd(char *var) @@ -75,9 +73,7 @@ int do_led(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) enum led_state_t cmd; const char *led_label; struct udevice *dev; -#ifdef CONFIG_LED_BLINK int freq_ms = 0; -#endif int ret; /* Validate arguments */ @@ -88,13 +84,11 @@ int do_led(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) return list_leds(); cmd = argc > 2 ? get_led_cmd(argv[2]) : LEDST_COUNT; -#ifdef CONFIG_LED_BLINK if (cmd == LEDST_BLINK) { if (argc < 4) return CMD_RET_USAGE; freq_ms = dectoul(argv[3], NULL); } -#endif ret = led_get_by_label(led_label, &dev); if (ret) { printf("LED '%s' not found (err=%d)\n", led_label, ret); @@ -106,13 +100,11 @@ int do_led(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) case LEDST_TOGGLE: ret = led_set_state(dev, cmd); break; -#ifdef CONFIG_LED_BLINK case LEDST_BLINK: ret = led_set_period(dev, freq_ms); if (!ret) ret = led_set_state(dev, LEDST_BLINK); break; -#endif case LEDST_COUNT: printf("LED '%s': ", led_label); ret = show_led_state(dev); diff --git a/common/Kconfig b/common/Kconfig index 4bb9f08977a..83c81edac20 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -626,8 +626,17 @@ config CYCLIC if CYCLIC +config SPL_CYCLIC + bool "General-purpose cyclic execution mechanism (SPL)" + help + This enables a general-purpose cyclic execution infrastructure in SPL, + to allow "small" (run-time wise) functions to be executed at + a specified frequency. Things like LED blinking or watchdog + triggering are examples for such tasks. + config CYCLIC_MAX_CPU_TIME_US int "Sets the max allowed time for a cyclic function in us" + default 100000 if SANDBOX # sandbox video is quite slow default 5000 help The max allowed time for a cyclic function in us. If a functions diff --git a/common/Makefile b/common/Makefile index e9835473420..d871113cbb9 100644 --- a/common/Makefile +++ b/common/Makefile @@ -79,7 +79,7 @@ obj-$(CONFIG_CROS_EC) += cros_ec.o obj-y += dlmalloc.o obj-$(CONFIG_$(SPL_TPL_)SYS_MALLOC_F) += malloc_simple.o -obj-$(CONFIG_CYCLIC) += cyclic.o +obj-$(CONFIG_$(SPL_TPL_)CYCLIC) += cyclic.o obj-$(CONFIG_$(SPL_TPL_)EVENT) += event.o obj-$(CONFIG_$(SPL_TPL_)HASH) += hash.o diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 6f56ca911c1..3fd113d776b 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -78,6 +78,7 @@ config SPL_MAX_SIZE hex "Maximum size of the SPL image, excluding BSS" default 0x30000 if ARCH_MX6 && MX6_OCRAM_256KB default 0x1b000 if AM33XX && !TI_SECURE_DEVICE + default 0xec00 if OMAP34XX default 0x10000 if ARCH_MX6 && !MX6_OCRAM_256KB default 0x7fa0 if SUNXI_SRAM_ADDRESS = 0x10000 default 0x7fa0 if SUNXI_SRAM_ADDRESS = 0x20000 && !MACH_SUN50I_H616 @@ -261,6 +262,7 @@ config SPL_LDSCRIPT config SPL_TEXT_BASE hex "SPL Text Base" + default 0x40200000 if OMAP34XX default 0x402F4000 if AM43XX default 0x402F0400 if AM33XX default 0x40301350 if OMAP54XX diff --git a/configs/M5208EVBE_defconfig b/configs/M5208EVBE_defconfig index ed146628918..c6c2ad71e40 100644 --- a/configs/M5208EVBE_defconfig +++ b/configs/M5208EVBE_defconfig @@ -5,6 +5,7 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="M5208EVBE" CONFIG_SYS_MONITOR_LEN=262144 +CONFIG_WATCHDOG_TIMEOUT_MSECS=5000 CONFIG_SYS_LOAD_ADDR=0x40010000 CONFIG_ENV_ADDR=0x2000 CONFIG_TARGET_M5208EVBE=y @@ -50,6 +51,5 @@ CONFIG_SYS_MAX_FLASH_SECT=254 CONFIG_MCFFEC=y CONFIG_MII=y CONFIG_MCFUART=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=5000 CONFIG_WDT=y CONFIG_WDT_MCF=y diff --git a/configs/M5235EVB_Flash32_defconfig b/configs/M5235EVB_Flash32_defconfig index 45e046017e2..9b191858738 100644 --- a/configs/M5235EVB_Flash32_defconfig +++ b/configs/M5235EVB_Flash32_defconfig @@ -5,6 +5,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="M5235EVB_Flash32" CONFIG_SYS_MONITOR_LEN=262144 +CONFIG_WATCHDOG_TIMEOUT_MSECS=5000 CONFIG_SYS_LOAD_ADDR=0x20000 CONFIG_ENV_ADDR=0xFFE04000 CONFIG_TARGET_M5235EVB=y @@ -58,4 +59,3 @@ CONFIG_SYS_MAX_FLASH_SECT=137 CONFIG_MCFFEC=y CONFIG_MII=y CONFIG_MCFUART=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=5000 diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig index 719a4354053..fac30716dac 100644 --- a/configs/M5235EVB_defconfig +++ b/configs/M5235EVB_defconfig @@ -5,6 +5,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="M5235EVB" CONFIG_SYS_MONITOR_LEN=262144 +CONFIG_WATCHDOG_TIMEOUT_MSECS=5000 CONFIG_SYS_LOAD_ADDR=0x20000 CONFIG_ENV_ADDR=0xFFE04000 CONFIG_TARGET_M5235EVB=y @@ -57,4 +58,3 @@ CONFIG_SYS_MAX_FLASH_SECT=137 CONFIG_MCFFEC=y CONFIG_MII=y CONFIG_MCFUART=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=5000 diff --git a/configs/M5272C3_defconfig b/configs/M5272C3_defconfig index ccb756ede7c..b6f8d183b3b 100644 --- a/configs/M5272C3_defconfig +++ b/configs/M5272C3_defconfig @@ -5,6 +5,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="M5272C3" CONFIG_SYS_MONITOR_LEN=131072 +CONFIG_WATCHDOG_TIMEOUT_MSECS=10000 CONFIG_SYS_LOAD_ADDR=0x20000 CONFIG_ENV_ADDR=0xFFE04000 CONFIG_TARGET_M5272C3=y @@ -72,4 +73,3 @@ CONFIG_SYS_MAX_FLASH_SECT=137 CONFIG_MCFFEC=y CONFIG_MII=y CONFIG_MCFUART=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=10000 diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig index f0a7b1c2b6c..46df7c2a70c 100644 --- a/configs/M53017EVB_defconfig +++ b/configs/M53017EVB_defconfig @@ -5,6 +5,7 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_SECT_SIZE=0x8000 CONFIG_DEFAULT_DEVICE_TREE="M53017EVB" CONFIG_SYS_MONITOR_LEN=262144 +CONFIG_WATCHDOG_TIMEOUT_MSECS=5000 CONFIG_SYS_LOAD_ADDR=0x40010000 CONFIG_ENV_ADDR=0x40000 CONFIG_TARGET_M53017EVB=y @@ -57,4 +58,3 @@ CONFIG_DM_RTC=y CONFIG_MCFRTC=y CONFIG_SYS_MCFRTC_BASE=0xFC0A8000 CONFIG_MCFUART=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=5000 diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig index bbb5a23c8e0..3e5da1f5bc6 100644 --- a/configs/M5329AFEE_defconfig +++ b/configs/M5329AFEE_defconfig @@ -5,6 +5,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="M5329AFEE" CONFIG_SYS_MONITOR_LEN=262144 +CONFIG_WATCHDOG_TIMEOUT_MSECS=5000 CONFIG_SYS_LOAD_ADDR=0x40010000 CONFIG_ENV_ADDR=0x4000 CONFIG_TARGET_M5329EVB=y @@ -54,4 +55,3 @@ CONFIG_DM_RTC=y CONFIG_MCFRTC=y CONFIG_SYS_MCFRTC_BASE=0xFC0A8000 CONFIG_MCFUART=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=5000 diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig index ff8522baff5..ab7b8e6883c 100644 --- a/configs/M5329BFEE_defconfig +++ b/configs/M5329BFEE_defconfig @@ -5,6 +5,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="M5329BFEE" CONFIG_SYS_MONITOR_LEN=262144 +CONFIG_WATCHDOG_TIMEOUT_MSECS=5000 CONFIG_SYS_LOAD_ADDR=0x40010000 CONFIG_ENV_ADDR=0x4000 CONFIG_TARGET_M5329EVB=y @@ -56,4 +57,3 @@ CONFIG_DM_RTC=y CONFIG_MCFRTC=y CONFIG_SYS_MCFRTC_BASE=0xFC0A8000 CONFIG_MCFUART=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=5000 diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig index 981542fd369..1df1682b73a 100644 --- a/configs/M5373EVB_defconfig +++ b/configs/M5373EVB_defconfig @@ -5,6 +5,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="M5373EVB" CONFIG_SYS_MONITOR_LEN=262144 +CONFIG_WATCHDOG_TIMEOUT_MSECS=3360 CONFIG_SYS_LOAD_ADDR=0x40010000 CONFIG_ENV_ADDR=0x4000 CONFIG_TARGET_M5373EVB=y @@ -56,4 +57,3 @@ CONFIG_DM_RTC=y CONFIG_MCFRTC=y CONFIG_SYS_MCFRTC_BASE=0xFC0A8000 CONFIG_MCFUART=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=3360 diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig index f8dfd1d2060..3fcebc6aa7d 100644 --- a/configs/am335x_baltos_defconfig +++ b/configs/am335x_baltos_defconfig @@ -3,8 +3,6 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_DEFAULT_DEVICE_TREE="am335x-baltos" CONFIG_AM33XX=y CONFIG_TARGET_AM335X_BALTOS=y @@ -19,6 +17,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run usbboot;run mmcboot;setenv mmcdev 1; setenv bootpart 1:2; run mmcboot;run nandboot;" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 CONFIG_SPL_FS_EXT4=y diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig index cabc181460a..5dd0b328835 100644 --- a/configs/am335x_evm_defconfig +++ b/configs/am335x_evm_defconfig @@ -2,8 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_AM33XX=y diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig index 8239f5f84da..a55aace0246 100644 --- a/configs/am335x_evm_spiboot_defconfig +++ b/configs/am335x_evm_spiboot_defconfig @@ -2,8 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_ENV_OFFSET=0x100000 CONFIG_SPL_DM_SPI=y diff --git a/configs/am335x_guardian_defconfig b/configs/am335x_guardian_defconfig index 75138542431..7c7041c23b0 100644 --- a/configs/am335x_guardian_defconfig +++ b/configs/am335x_guardian_defconfig @@ -3,8 +3,6 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030fef0 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x500000 CONFIG_DEFAULT_DEVICE_TREE="am335x-guardian" @@ -31,6 +29,7 @@ CONFIG_AUTOBOOT_DELAY_STR="d" CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig index 3694cc32db9..d780239715f 100644 --- a/configs/am335x_hs_evm_defconfig +++ b/configs/am335x_hs_evm_defconfig @@ -3,8 +3,6 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_SPL_TEXT_BASE=0x40300350 diff --git a/configs/am335x_hs_evm_uart_defconfig b/configs/am335x_hs_evm_uart_defconfig index a99b7b46cfb..bd979941b7a 100644 --- a/configs/am335x_hs_evm_uart_defconfig +++ b/configs/am335x_hs_evm_uart_defconfig @@ -3,8 +3,6 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_SPL_TEXT_BASE=0x40301950 diff --git a/configs/am335x_igep003x_defconfig b/configs/am335x_igep003x_defconfig index ddffd4f46f0..ef4d8661a13 100644 --- a/configs/am335x_igep003x_defconfig +++ b/configs/am335x_igep003x_defconfig @@ -4,8 +4,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x18000 CONFIG_DEFAULT_DEVICE_TREE="am335x-base0033" CONFIG_AM33XX=y diff --git a/configs/am335x_pdu001_defconfig b/configs/am335x_pdu001_defconfig index febe5ebaabb..a0163f16f36 100644 --- a/configs/am335x_pdu001_defconfig +++ b/configs/am335x_pdu001_defconfig @@ -4,8 +4,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x1200 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="am335x-pdu001" @@ -24,6 +22,7 @@ CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_BOOTCOMMAND="run eval_boot_device;part uuid mmc ${mmc_boot}:${root_fs_partition} root_fs_partuuid;setenv bootargs console=${console} vt.global_cursor_default=0 root=PARTUUID=${root_fs_partuuid} rootfstype=ext4 rootwait rootdelay=1;fatload mmc ${mmc_boot} ${fdtaddr} ${fdtfile};fatload mmc ${mmc_boot} ${loadaddr} ${bootfile};bootz ${loadaddr} - ${fdtaddr}" CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig index 47c08e5054b..8fb6e1a5a9b 100644 --- a/configs/am335x_shc_defconfig +++ b/configs/am335x_shc_defconfig @@ -4,8 +4,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" @@ -33,6 +31,7 @@ CONFIG_BOOTCOMMAND="if mmc dev 1; mmc rescan; then run emmc_setup; else echo ERR CONFIG_DEFAULT_FDT_FILE="am335x-shc" CONFIG_SYS_PBSIZE=1049 CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig index c7618c5c799..b9f5db23053 100644 --- a/configs/am335x_shc_ict_defconfig +++ b/configs/am335x_shc_ict_defconfig @@ -4,8 +4,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" @@ -31,6 +29,7 @@ CONFIG_BOOTCOMMAND="if mmc dev 0; mmc rescan; then run sd_setup; else echo ERROR CONFIG_DEFAULT_FDT_FILE="am335x-shc" CONFIG_SYS_PBSIZE=1049 CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig index 934265815be..5c42bf423ff 100644 --- a/configs/am335x_shc_netboot_defconfig +++ b/configs/am335x_shc_netboot_defconfig @@ -4,8 +4,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" @@ -34,6 +32,7 @@ CONFIG_BOOTCOMMAND="run fusecmd; if run netboot; then echo Booting from network; CONFIG_DEFAULT_FDT_FILE="am335x-shc" CONFIG_SYS_PBSIZE=1049 CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig index 439f9b8188a..9375bc93a2f 100644 --- a/configs/am335x_shc_sdboot_defconfig +++ b/configs/am335x_shc_sdboot_defconfig @@ -4,8 +4,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" @@ -34,6 +32,7 @@ CONFIG_BOOTCOMMAND="if mmc dev 0; mmc rescan; then run sd_setup; else echo ERROR CONFIG_DEFAULT_FDT_FILE="am335x-shc" CONFIG_SYS_PBSIZE=1049 CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig index 88122bd052c..894a59f58ed 100644 --- a/configs/am335x_sl50_defconfig +++ b/configs/am335x_sl50_defconfig @@ -4,8 +4,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_OFFSET=0x0 CONFIG_DEFAULT_DEVICE_TREE="am335x-sl50" CONFIG_AM33XX=y @@ -24,6 +22,7 @@ CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" CONFIG_AUTOBOOT_DELAY_STR="d" CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig index 3236f1dd672..4eb406673ff 100644 --- a/configs/am3517_evm_defconfig +++ b/configs/am3517_evm_defconfig @@ -5,15 +5,10 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TEXT_BASE=0x80100000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SOURCE_FILE="am3517evm" -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_DEFAULT_DEVICE_TREE="ti/omap/am3517-evm" -CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_AM3517_EVM=y CONFIG_EMIF4=y -CONFIG_SYS_MONITOR_LEN=262144 CONFIG_SPL_SYS_MALLOC_F_LEN=0x2500 CONFIG_SPL=y CONFIG_LTO=y @@ -21,7 +16,6 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=10 CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then echo SD/MMC found on device $mmcdev; if run loadbootenv; then run importbootenv; fi; echo Checking if uenvcmd is set ...; if test -n $uenvcmd; then echo Running uenvcmd ...; run uenvcmd; fi; echo Running default loadimage ...; setenv bootfile zImage; if run loadimage; then run loadfdt; run mmcboot; fi; else run nandboot; fi" CONFIG_SYS_PBSIZE=1054 -CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig index d73b1cb804b..0fc4c0f269a 100644 --- a/configs/am43xx_evm_defconfig +++ b/configs/am43xx_evm_defconfig @@ -3,8 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_SF_DEFAULT_SPEED=48000000 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y diff --git a/configs/am43xx_evm_qspiboot_defconfig b/configs/am43xx_evm_qspiboot_defconfig index 89e212595af..c538c1ae352 100644 --- a/configs/am43xx_evm_qspiboot_defconfig +++ b/configs/am43xx_evm_qspiboot_defconfig @@ -4,8 +4,6 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TEXT_BASE=0x30000000 CONFIG_SYS_MALLOC_F_LEN=0x400 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_SF_DEFAULT_SPEED=48000000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x110000 diff --git a/configs/am43xx_evm_rtconly_defconfig b/configs/am43xx_evm_rtconly_defconfig index 2ff01193285..0fe5479757b 100644 --- a/configs/am43xx_evm_rtconly_defconfig +++ b/configs/am43xx_evm_rtconly_defconfig @@ -3,8 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_SF_DEFAULT_SPEED=48000000 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig index 845b686ac93..c4693bc9824 100644 --- a/configs/am43xx_evm_usbhost_boot_defconfig +++ b/configs/am43xx_evm_usbhost_boot_defconfig @@ -2,8 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_SF_DEFAULT_SPEED=48000000 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig index ff5073cbb2b..980ef13f104 100644 --- a/configs/am43xx_hs_evm_defconfig +++ b/configs/am43xx_hs_evm_defconfig @@ -4,8 +4,6 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_SF_DEFAULT_SPEED=48000000 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y diff --git a/configs/am43xx_hs_evm_qspi_defconfig b/configs/am43xx_hs_evm_qspi_defconfig index 5ef59d830e5..75725e179d7 100644 --- a/configs/am43xx_hs_evm_qspi_defconfig +++ b/configs/am43xx_hs_evm_qspi_defconfig @@ -3,8 +3,6 @@ CONFIG_ARCH_CPU_INIT=y # CONFIG_SYS_THUMB_BUILD is not set CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_SF_DEFAULT_SPEED=48000000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x110000 diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index 7c3ceeb07db..587af53acb6 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -1,9 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037ff00 CONFIG_SF_DEFAULT_SPEED=76800000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index 1f7eca4691e..b790897645f 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -2,9 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037ff00 CONFIG_SF_DEFAULT_SPEED=76800000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig index 807e1d66a6d..450751b354f 100644 --- a/configs/am57xx_hs_evm_usb_defconfig +++ b/configs/am57xx_hs_evm_usb_defconfig @@ -2,9 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037ff00 CONFIG_SF_DEFAULT_SPEED=76800000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y diff --git a/configs/am62ax_evm_a53_defconfig b/configs/am62ax_evm_a53_defconfig index 2a71b06310f..4a351cd015a 100644 --- a/configs/am62ax_evm_a53_defconfig +++ b/configs/am62ax_evm_a53_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_DM_MAILBOX=y CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_CMD_MMC=y +CONFIG_CMD_REMOTEPROC=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_UPSTREAM=y @@ -73,8 +74,8 @@ CONFIG_POWER_DOMAIN=y CONFIG_TI_SCI_POWER_DOMAIN=y CONFIG_K3_SYSTEM_CONTROLLER=y CONFIG_REMOTEPROC_TI_K3_ARM64=y -CONFIG_REMOTEPROC_TI_K3_R5F=y CONFIG_REMOTEPROC_TI_K3_DSP=y +CONFIG_REMOTEPROC_TI_K3_R5F=y CONFIG_RESET_TI_SCI=y CONFIG_DM_SERIAL=y CONFIG_SOC_DEVICE=y @@ -84,4 +85,3 @@ CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y CONFIG_SYSRESET_TI_SCI=y CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 -CONFIG_CMD_REMOTEPROC=y diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig index 4bade848e6f..afe8de81ab7 100644 --- a/configs/bitmain_antminer_s9_defconfig +++ b/configs/bitmain_antminer_s9_defconfig @@ -99,4 +99,3 @@ CONFIG_WDT_CDNS=y CONFIG_SYS_TIMER_COUNTS_DOWN=y CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y -CONFIG_TOOLS_MKEFICAPSULE=y diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig index 0b2ee74b003..8947b76e11f 100644 --- a/configs/brppt1_mmc_defconfig +++ b/configs/brppt1_mmc_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 CONFIG_DM_GPIO=y @@ -39,6 +37,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x500000 diff --git a/configs/brsmarc1_defconfig b/configs/brsmarc1_defconfig index f584b8d30b1..dc868b72b21 100644 --- a/configs/brsmarc1_defconfig +++ b/configs/brsmarc1_defconfig @@ -4,8 +4,6 @@ CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x20000 @@ -39,6 +37,7 @@ CONFIG_BOARD_TYPES=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig index 6c27f07fc79..fc801f26740 100644 --- a/configs/brxre1_defconfig +++ b/configs/brxre1_defconfig @@ -4,8 +4,6 @@ CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 CONFIG_DM_GPIO=y @@ -35,6 +33,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x500000 diff --git a/configs/chiliboard_defconfig b/configs/chiliboard_defconfig index c574d93806a..98778989761 100644 --- a/configs/chiliboard_defconfig +++ b/configs/chiliboard_defconfig @@ -3,8 +3,6 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030fef0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x20000 CONFIG_DM_GPIO=y @@ -24,6 +22,7 @@ CONFIG_BOOTCOMMAND="run mmcboot; run nandboot; run netboot" CONFIG_DEFAULT_FDT_FILE="am335x-chiliboard.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 CONFIG_SPL_I2C=y diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index 9fcac5a3796..b3ebc04e4af 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -9,7 +9,6 @@ CONFIG_DEFAULT_DEVICE_TREE="chromebook_coral" CONFIG_SPL_TEXT_BASE=0xfef10000 CONFIG_TPL_TEXT_BASE=0xffff8000 CONFIG_SPL_SYS_MALLOC_F_LEN=0xf000 -CONFIG_BOOTSTAGE_STASH_ADDR=0xfef00000 CONFIG_DEBUG_UART_BASE=0xde000000 CONFIG_DEBUG_UART_CLOCK=1843200 CONFIG_DEBUG_UART_BOARD_INIT=y @@ -32,6 +31,7 @@ CONFIG_TPL_BOOTSTAGE=y CONFIG_BOOTSTAGE_REPORT=y CONFIG_SPL_BOOTSTAGE_RECORD_COUNT=10 CONFIG_BOOTSTAGE_STASH=y +CONFIG_BOOTSTAGE_STASH_ADDR=0xfef00000 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS_SUBST=y CONFIG_BOOTCOMMAND="tpm init; tpm startup TPM2_SU_CLEAR; bootflow scan -lb" diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig index 32f126a5174..e8603886d6a 100644 --- a/configs/cm_t43_defconfig +++ b/configs/cm_t43_defconfig @@ -5,8 +5,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_SF_DEFAULT_SPEED=48000000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0xC0000 diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig index ab4e0fefc90..26e157dc2cb 100644 --- a/configs/corstone1000_defconfig +++ b/configs/corstone1000_defconfig @@ -66,6 +66,5 @@ CONFIG_FFA_SHARED_MM_BUF_SIZE=4096 CONFIG_FFA_SHARED_MM_BUF_OFFSET=0 CONFIG_FFA_SHARED_MM_BUF_ADDR=0x02000000 CONFIG_EFI_CAPSULE_ON_DISK=y -CONFIG_EFI_IGNORE_OSINDICATIONS=y CONFIG_FWU_MULTI_BANK_UPDATE=y CONFIG_FWU_MDATA_V1=y diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig index 7653fbbe7e5..33201cec772 100644 --- a/configs/devkit8000_defconfig +++ b/configs/devkit8000_defconfig @@ -3,13 +3,8 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TEXT_BASE=0x80100000 CONFIG_SYS_MALLOC_LEN=0x40000 CONFIG_SYS_MALLOC_F_LEN=0x4000 -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_DEFAULT_DEVICE_TREE="omap3-devkit8000" -CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_DEVKIT8000=y -CONFIG_SYS_MONITOR_LEN=262144 CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL_BSS_START_ADDR=0x80000500 CONFIG_SPL=y @@ -17,7 +12,6 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="run autoboot" CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index 41804a0fb63..27dab9e2e95 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -23,6 +23,7 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x020CC068 +CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_SPL=y CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_ENV_OFFSET_REDUND=0x110000 @@ -127,6 +128,5 @@ CONFIG_CI_UDC=y CONFIG_SDP_LOADADDR=0x17ffffc0 CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_SPL_USB_SDP_SUPPORT=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_IMX_WATCHDOG=y CONFIG_BZIP2=y diff --git a/configs/display5_defconfig b/configs/display5_defconfig index 7707b327a93..1d3336b8c6a 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -25,6 +25,7 @@ CONFIG_SPL_SERIAL=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x020CC068 CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 +CONFIG_WATCHDOG_TIMEOUT_MSECS=15000 CONFIG_SPL=y CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_ENV_OFFSET_REDUND=0x130000 @@ -127,5 +128,4 @@ CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_SYSRESET=y CONFIG_SYSRESET_WATCHDOG=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=15000 CONFIG_IMX_WATCHDOG=y diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig index 58f47512136..7c681f095c5 100644 --- a/configs/display5_factory_defconfig +++ b/configs/display5_factory_defconfig @@ -23,6 +23,7 @@ CONFIG_SYS_MONITOR_LEN=409600 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 +CONFIG_WATCHDOG_TIMEOUT_MSECS=15000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x130000 CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -134,6 +135,5 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_SPL_USB_SDP_SUPPORT=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=15000 CONFIG_IMX_WATCHDOG=y CONFIG_PANIC_HANG=y diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index 0cea5504364..6264d9fa7ad 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -2,9 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x18000 CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037fef0 CONFIG_SF_DEFAULT_SPEED=76800000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index 5f56b187503..4e7929718fd 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -3,9 +3,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y CONFIG_SYS_MALLOC_F_LEN=0x18000 CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037fef0 CONFIG_SF_DEFAULT_SPEED=76800000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y diff --git a/configs/dra7xx_hs_evm_usb_defconfig b/configs/dra7xx_hs_evm_usb_defconfig index 5b67a0e8392..68d342b277c 100644 --- a/configs/dra7xx_hs_evm_usb_defconfig +++ b/configs/dra7xx_hs_evm_usb_defconfig @@ -3,9 +3,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y CONFIG_SYS_MALLOC_F_LEN=0x18000 CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037fef0 CONFIG_SF_DEFAULT_SPEED=76800000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y diff --git a/configs/draco-etamin_defconfig b/configs/draco-etamin_defconfig index ba3f381f69f..78ee5c1eb66 100644 --- a/configs/draco-etamin_defconfig +++ b/configs/draco-etamin_defconfig @@ -5,8 +5,6 @@ CONFIG_SYS_MALLOC_LEN=0x1000000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x980000 CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" diff --git a/configs/draco-rastaban_defconfig b/configs/draco-rastaban_defconfig index 43d29f5b11a..81a349b730c 100644 --- a/configs/draco-rastaban_defconfig +++ b/configs/draco-rastaban_defconfig @@ -5,8 +5,6 @@ CONFIG_SYS_MALLOC_LEN=0x1000000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_AM33XX=y diff --git a/configs/draco-thuban_defconfig b/configs/draco-thuban_defconfig index b457b22fc64..265c1138dfe 100644 --- a/configs/draco-thuban_defconfig +++ b/configs/draco-thuban_defconfig @@ -5,8 +5,6 @@ CONFIG_SYS_MALLOC_LEN=0x1000000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_AM33XX=y diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig index 488a259e268..972f4188373 100644 --- a/configs/evb-px30_defconfig +++ b/configs/evb-px30_defconfig @@ -29,8 +29,8 @@ CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set -# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set # CONFIG_TPL_BANNER_PRINT is not set +# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set diff --git a/configs/firefly-px30_defconfig b/configs/firefly-px30_defconfig index 3fe1dc3ab10..a1ce9222c32 100644 --- a/configs/firefly-px30_defconfig +++ b/configs/firefly-px30_defconfig @@ -30,8 +30,8 @@ CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set -# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set # CONFIG_TPL_BANNER_PRINT is not set +# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set diff --git a/configs/ge_b1x5v2_defconfig b/configs/ge_b1x5v2_defconfig index 20384bcca64..403a5a526f0 100644 --- a/configs/ge_b1x5v2_defconfig +++ b/configs/ge_b1x5v2_defconfig @@ -19,6 +19,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6dl-b1x5v2" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL=y CONFIG_BOOTCOUNT_BOOTLIMIT=10 +CONFIG_WATCHDOG_TIMEOUT_MSECS=30000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0x21ec000 CONFIG_DEBUG_UART_CLOCK=24000000 @@ -134,6 +135,5 @@ CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_VIDEO=y CONFIG_VIDEO_IPUV3=y CONFIG_IMX_VIDEO_SKIP=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=30000 CONFIG_IMX_WATCHDOG=y CONFIG_BCH=y diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index 2a429388829..ce5dfb49279 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -11,6 +11,7 @@ CONFIG_TARGET_GE_BX50V3=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-bx50v3" CONFIG_BOOTCOUNT_BOOTLIMIT=10 +CONFIG_WATCHDOG_TIMEOUT_MSECS=8000 CONFIG_PCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y @@ -97,7 +98,6 @@ CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_IPUV3=y CONFIG_IMX_VIDEO_SKIP=y CONFIG_IMX_HDMI=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=8000 CONFIG_IMX_WATCHDOG=y CONFIG_BCH=y # CONFIG_EFI_LOADER is not set diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index ad994744c82..213a5e5eca8 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -22,6 +22,7 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x18000000 CONFIG_SPL_STACK_R=y +CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0xD1400 CONFIG_CMD_HDMIDETECT=y @@ -174,5 +175,4 @@ CONFIG_IMX_HDMI=y CONFIG_SPLASH_SCREEN=y CONFIG_SPLASH_SCREEN_ALIGN=y CONFIG_HIDE_LOGO_VERSION=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_IMX_WATCHDOG=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index 96c64c8b767..2306cd61068 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -22,6 +22,7 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x18000000 CONFIG_SPL_STACK_R=y +CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x1080000 CONFIG_CMD_HDMIDETECT=y @@ -181,5 +182,4 @@ CONFIG_IMX_HDMI=y CONFIG_SPLASH_SCREEN=y CONFIG_SPLASH_SCREEN_ALIGN=y CONFIG_HIDE_LOGO_VERSION=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_IMX_WATCHDOG=y diff --git a/configs/igep00x0_defconfig b/configs/igep00x0_defconfig index 473891607b0..f1d9bb34aba 100644 --- a/configs/igep00x0_defconfig +++ b/configs/igep00x0_defconfig @@ -4,14 +4,9 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_ENV_SIZE=0x8000 CONFIG_DEFAULT_DEVICE_TREE="ti/omap/omap3-igep0020" -CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_IGEP00X0=y -CONFIG_SYS_MONITOR_LEN=262144 CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y @@ -22,7 +17,6 @@ CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 diff --git a/configs/imx6q_bosch_acc_defconfig b/configs/imx6q_bosch_acc_defconfig index 73ae4acfb43..dce1b64bf69 100644 --- a/configs/imx6q_bosch_acc_defconfig +++ b/configs/imx6q_bosch_acc_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_MONITOR_LEN=409600 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_BOOTCOUNT_BOOTLIMIT=8 +CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_SPL_SIZE_LIMIT=69632 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x1ff000 @@ -94,7 +95,6 @@ CONFIG_DM_PMIC=y CONFIG_DM_PMIC_PFUZE100=y CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_IMX_WATCHDOG=y CONFIG_WDT=y CONFIG_EXT4_WRITE=y diff --git a/configs/imx8mm-phygate-tauri-l_defconfig b/configs/imx8mm-phygate-tauri-l_defconfig index 41765f1ddc5..16ba7d4b4f1 100644 --- a/configs/imx8mm-phygate-tauri-l_defconfig +++ b/configs/imx8mm-phygate-tauri-l_defconfig @@ -46,6 +46,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set +CONFIG_CMD_ERASEENV=y # CONFIG_CMD_CRC32 is not set CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index ff33d1532a0..788770bb364 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -41,6 +41,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_CMD_CPU=y # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set @@ -68,6 +69,8 @@ CONFIG_SPL_CLK_COMPOSITE_CCF=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_SPL_CLK_IMX8MM=y CONFIG_CLK_IMX8MM=y +CONFIG_CPU=y +CONFIG_CPU_IMX=y CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y CONFIG_SUPPORT_EMMC_BOOT=y diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig index 2402e9e8bfb..679ca71ade0 100644 --- a/configs/imx8mn_evk_defconfig +++ b/configs/imx8mn_evk_defconfig @@ -50,6 +50,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_CMD_CPU=y # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CMD_ERASEENV=y @@ -71,6 +72,8 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_SPL_DM=y CONFIG_SPL_CLK_IMX8MN=y CONFIG_CLK_IMX8MN=y +CONFIG_CPU=y +CONFIG_CPU_IMX=y CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y CONFIG_SUPPORT_EMMC_BOOT=y diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index f5ba022b075..a2c07967f59 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -47,6 +47,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_CMD_CPU=y # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set @@ -74,6 +75,8 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_CLK_IMX8MP=y +CONFIG_CPU=y +CONFIG_CPU_IMX=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x42800000 CONFIG_FASTBOOT_BUF_SIZE=0x20000000 diff --git a/configs/imx93_11x11_evk_defconfig b/configs/imx93_11x11_evk_defconfig index 2246715d822..6f083e0cd8c 100644 --- a/configs/imx93_11x11_evk_defconfig +++ b/configs/imx93_11x11_evk_defconfig @@ -48,6 +48,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_CMD_CPU=y CONFIG_CMD_ERASEENV=y # CONFIG_CMD_CRC32 is not set CONFIG_CMD_MEMTEST=y diff --git a/configs/iot2050_defconfig b/configs/iot2050_defconfig index e0c2b140441..8654bf20865 100644 --- a/configs/iot2050_defconfig +++ b/configs/iot2050_defconfig @@ -27,6 +27,7 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x80a00000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_STACK_R=y +CONFIG_WATCHDOG_TIMEOUT_MSECS=0 CONFIG_ENV_OFFSET_REDUND=0x6a0000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y @@ -147,7 +148,6 @@ CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_KEYBOARD=y # CONFIG_WATCHDOG is not set # CONFIG_WATCHDOG_AUTOSTART is not set -CONFIG_WATCHDOG_TIMEOUT_MSECS=0 CONFIG_WDT=y CONFIG_WDT_K3_RTI=y CONFIG_WDT_K3_RTI_LOAD_FW=y diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig index 4db5654ca1c..fcfa9265996 100644 --- a/configs/j7200_evm_a72_defconfig +++ b/configs/j7200_evm_a72_defconfig @@ -85,6 +85,7 @@ CONFIG_CMD_UBI=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_UPSTREAM=y CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y @@ -96,7 +97,6 @@ CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y CONFIG_SPL_OF_TRANSLATE=y -CONFIG_OF_UPSTREAM=y CONFIG_CLK=y CONFIG_SPL_CLK=y CONFIG_CLK_CCF=y diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index ffaf21d4999..f1c9bbd3fa8 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -82,7 +82,6 @@ CONFIG_CMD_MTDPARTS=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_SPL_MULTI_DTB_FIT=y -CONFIG_SPL_OF_LIST="k3-j721e-r5-common-proc-board" CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig index 5c3b52baaee..5800e4be963 100644 --- a/configs/j721s2_evm_a72_defconfig +++ b/configs/j721s2_evm_a72_defconfig @@ -34,9 +34,8 @@ CONFIG_SPL_SPI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 -CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTSTD_FULL=y -CONFIG_BOOTSTD_DEFAULTS=y +CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb" CONFIG_LOGLEVEL=7 CONFIG_SPL_MAX_SIZE=0xc0000 @@ -85,9 +84,8 @@ CONFIG_CMD_UBI=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y -CONFIG_OF_LIST="ti/k3-j721s2-common-proc-board" -CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_OF_UPSTREAM=y +CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig index 6404b1cc303..d0af664a6b7 100644 --- a/configs/j721s2_evm_r5_defconfig +++ b/configs/j721s2_evm_r5_defconfig @@ -83,7 +83,6 @@ CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_SPL_MULTI_DTB_FIT=y -CONFIG_SPL_OF_LIST="k3-j721s2-r5-common-proc-board" CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/j722s_evm_r5_defconfig b/configs/j722s_evm_r5_defconfig index d7b99cb2b27..8ba3916807d 100644 --- a/configs/j722s_evm_r5_defconfig +++ b/configs/j722s_evm_r5_defconfig @@ -23,7 +23,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x43c7b000 CONFIG_SPL_BSS_MAX_SIZE=0x3000 CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000 CONFIG_SPL_SIZE_LIMIT=0x3C000 CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x5000 CONFIG_SPL_FS_FAT=y diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig index f2570289298..1b7d22b43e1 100644 --- a/configs/kontron-sl-mx8mm_defconfig +++ b/configs/kontron-sl-mx8mm_defconfig @@ -148,5 +148,4 @@ CONFIG_IMX_WATCHDOG=y CONFIG_EFI_SET_TIME=y CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y CONFIG_EFI_CAPSULE_ON_DISK=y -CONFIG_EFI_IGNORE_OSINDICATIONS=y CONFIG_EFI_CAPSULE_FIRMWARE_FIT=y diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig index cc57ab09af2..fceda3f14d4 100644 --- a/configs/kp_imx6q_tpc_defconfig +++ b/configs/kp_imx6q_tpc_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SYS_MONITOR_LEN=409600 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y +CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x102000 CONFIG_SPL_PAYLOAD="u-boot.img" @@ -83,5 +84,4 @@ CONFIG_USB=y # CONFIG_SPL_DM_USB is not set CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_IMX_WATCHDOG=y diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig index db3a5b9f206..65a98758aac 100644 --- a/configs/m53menlo_defconfig +++ b/configs/m53menlo_defconfig @@ -18,11 +18,11 @@ CONFIG_SPL_SERIAL=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x53FA401C CONFIG_SPL_STACK=0x70004000 +CONFIG_WATCHDOG_TIMEOUT_MSECS=8000 CONFIG_SPL=y CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_SYS_LOAD_ADDR=0x70800000 -CONFIG_CMD_BMODE=y CONFIG_FIT=y CONFIG_BOOTDELAY=1 CONFIG_OF_BOARD_SETUP=y @@ -132,5 +132,4 @@ CONFIG_SPLASH_SOURCE=y CONFIG_VIDEO_BMP_GZIP=y CONFIG_VIDEO_LOGO_MAX_SIZE=0x200000 CONFIG_BMP_16BPP=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=8000 CONFIG_IMX_WATCHDOG=y diff --git a/configs/mt7629_rfb_defconfig b/configs/mt7629_rfb_defconfig index bccbbccc601..8e9306acd57 100644 --- a/configs/mt7629_rfb_defconfig +++ b/configs/mt7629_rfb_defconfig @@ -60,9 +60,7 @@ CONFIG_IPADDR="192.168.1.1" CONFIG_USE_SERVERIP=y CONFIG_SERVERIP="192.168.1.2" CONFIG_SPL_DM_SEQ_ALIAS=y -CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y -CONFIG_SYSCON=y CONFIG_SPL_SYSCON=y CONFIG_CLK=y CONFIG_SPL_CLK=y diff --git a/configs/mt8512_bm1_emmc_defconfig b/configs/mt8512_bm1_emmc_defconfig index 2a285a56ba1..c7ac0df39f5 100644 --- a/configs/mt8512_bm1_emmc_defconfig +++ b/configs/mt8512_bm1_emmc_defconfig @@ -25,8 +25,6 @@ CONFIG_CMD_FS_GENERIC=y # CONFIG_DOS_PARTITION is not set CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y -CONFIG_REGMAP=y -CONFIG_SYSCON=y CONFIG_CLK=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x56000000 diff --git a/configs/mvebu_espressobin_ultra-88f3720_defconfig b/configs/mvebu_espressobin_ultra-88f3720_defconfig index c6ffaaabcad..974b6df165a 100644 --- a/configs/mvebu_espressobin_ultra-88f3720_defconfig +++ b/configs/mvebu_espressobin_ultra-88f3720_defconfig @@ -11,7 +11,6 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3F0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y -CONFIG_OF_UPSTREAM=y CONFIG_DEFAULT_DEVICE_TREE="marvell/armada-3720-espressobin-ultra" CONFIG_SYS_LOAD_ADDR=0x6000000 CONFIG_PCI=y @@ -46,6 +45,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_SQUASHFS=y CONFIG_CMD_FS_UUID=y CONFIG_MAC_PARTITION=y +CONFIG_OF_UPSTREAM=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y @@ -64,7 +64,6 @@ CONFIG_MISC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_XENON=y -CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_ISSI=y @@ -75,8 +74,8 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_MTD=y CONFIG_PHY_MARVELL=y CONFIG_PHY_FIXED=y -CONFIG_PHY_GIGE=y CONFIG_DM_DSA=y +CONFIG_PHY_GIGE=y CONFIG_MV88E6XXX=y CONFIG_MVNETA=y CONFIG_MVMDIO=y @@ -87,6 +86,8 @@ CONFIG_MVEBU_COMPHY_SUPPORT=y CONFIG_PINCTRL=y CONFIG_PINCTRL_ARMADA_37XX=y CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_RTC=y +CONFIG_RTC_PCF8563=y CONFIG_DEFAULT_ENV_IS_RW=y CONFIG_MVEBU_A3700_UART=y CONFIG_MVEBU_A3700_SPI=y @@ -97,10 +98,3 @@ CONFIG_USB_EHCI_HCD=y CONFIG_WDT=y CONFIG_WDT_ARMADA_37XX=y CONFIG_SHA1=y -CONFIG_DM_RTC=y -CONFIG_RTC_PCF8563=y -# CONFIG_DEBUG_UART=y -# CONFIG_DEBUG_UART_BASE=0xd0012000 -# CONFIG_DEBUG_UART_CLOCK=25804800 -# CONFIG_DEBUG_UART_SHIFT=2 -# CONFIG_DEBUG_UART_ANNOUNCE=y diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig index 659de719082..463cfc64ada 100644 --- a/configs/mx53ppd_defconfig +++ b/configs/mx53ppd_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_MX53PPD=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx53-ppd" CONFIG_BOOTCOUNT_BOOTLIMIT=10 +CONFIG_WATCHDOG_TIMEOUT_MSECS=8000 CONFIG_SYS_LOAD_ADDR=0x72000000 CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y @@ -81,6 +82,5 @@ CONFIG_VIDEO=y CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_IPUV3=y CONFIG_IMX_VIDEO_SKIP=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=8000 CONFIG_IMX_WATCHDOG=y CONFIG_BCH=y diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig index 78fb7580da7..efcc8f70370 100644 --- a/configs/nyan-big_defconfig +++ b/configs/nyan-big_defconfig @@ -10,7 +10,6 @@ CONFIG_ENV_OFFSET=0xFFFFE000 CONFIG_DEFAULT_DEVICE_TREE="tegra124-nyan-big" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_SPL_STACK=0x800ffffc -CONFIG_BOOTSTAGE_STASH_ADDR=0x83000000 CONFIG_TEGRA124=y CONFIG_TARGET_NYAN_BIG=y CONFIG_TEGRA_GPU=y @@ -20,6 +19,7 @@ CONFIG_FIT_BEST_MATCH=y CONFIG_BOOTSTAGE=y CONFIG_SPL_BOOTSTAGE=y CONFIG_BOOTSTAGE_STASH=y +CONFIG_BOOTSTAGE_STASH_ADDR=0x83000000 CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_PBSIZE=2087 CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/odroid-go2_defconfig b/configs/odroid-go2_defconfig index a9af4151014..b38676a0a8a 100644 --- a/configs/odroid-go2_defconfig +++ b/configs/odroid-go2_defconfig @@ -36,8 +36,8 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set -# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set # CONFIG_TPL_BANNER_PRINT is not set +# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set diff --git a/configs/omap35_logic_defconfig b/configs/omap35_logic_defconfig index 23b2e503385..843b61dec4a 100644 --- a/configs/omap35_logic_defconfig +++ b/configs/omap35_logic_defconfig @@ -6,14 +6,9 @@ CONFIG_TEXT_BASE=0x80100000 CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_TI_COMMON_CMD_OPTIONS=y # CONFIG_SPL_GPIO is not set -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_DEFAULT_DEVICE_TREE="ti/omap/logicpd-torpedo-35xx-devkit" -CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_LOGIC=y # CONFIG_SPL_OMAP3_ID_NAND is not set -CONFIG_SYS_MONITOR_LEN=262144 CONFIG_SPL=y CONFIG_LTO=y CONFIG_ANDROID_BOOT_IMAGE=y @@ -24,7 +19,6 @@ CONFIG_PREBOOT="setenv preboot;saveenv;" CONFIG_DEFAULT_FDT_FILE="logicpd-torpedo-35xx-devkit.dtb" CONFIG_SYS_PBSIZE=1054 CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 diff --git a/configs/omap35_logic_somlv_defconfig b/configs/omap35_logic_somlv_defconfig index a5f242ff40c..bbd1b746cf9 100644 --- a/configs/omap35_logic_somlv_defconfig +++ b/configs/omap35_logic_somlv_defconfig @@ -6,14 +6,9 @@ CONFIG_TEXT_BASE=0x80100000 CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_TI_COMMON_CMD_OPTIONS=y # CONFIG_SPL_GPIO is not set -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_DEFAULT_DEVICE_TREE="ti/omap/logicpd-som-lv-35xx-devkit" -CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_LOGIC=y # CONFIG_SPL_OMAP3_ID_NAND is not set -CONFIG_SYS_MONITOR_LEN=262144 CONFIG_SPL=y CONFIG_LTO=y CONFIG_SYS_MONITOR_BASE=0x10000000 @@ -25,7 +20,6 @@ CONFIG_PREBOOT="setenv preboot;saveenv;" CONFIG_DEFAULT_FDT_FILE="logicpd-som-lv-35xx-devkit.dtb" CONFIG_SYS_PBSIZE=1054 CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig index 3c8d974fbd0..cc0b61af509 100644 --- a/configs/omap3_evm_defconfig +++ b/configs/omap3_evm_defconfig @@ -3,13 +3,8 @@ CONFIG_ARM=y # CONFIG_SPL_USE_ARCH_MEMSET is not set CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x4000 -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_DEFAULT_DEVICE_TREE="omap3-evm" -CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_EVM=y -CONFIG_SYS_MONITOR_LEN=262144 CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y @@ -18,7 +13,6 @@ CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="omap3-evm.dtb" CONFIG_SYS_PBSIZE=1053 CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig index d081d4e0fb4..ed04386cf95 100644 --- a/configs/omap3_logic_defconfig +++ b/configs/omap3_logic_defconfig @@ -6,14 +6,9 @@ CONFIG_TEXT_BASE=0x80100000 CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_TI_COMMON_CMD_OPTIONS=y # CONFIG_SPL_GPIO is not set -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_DEFAULT_DEVICE_TREE="ti/omap/logicpd-torpedo-37xx-devkit" -CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_LOGIC=y # CONFIG_SPL_OMAP3_ID_NAND is not set -CONFIG_SYS_MONITOR_LEN=262144 CONFIG_SPL=y CONFIG_LTO=y CONFIG_ANDROID_BOOT_IMAGE=y @@ -23,7 +18,6 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="setenv preboot;saveenv;" CONFIG_SYS_PBSIZE=1054 CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 diff --git a/configs/omap3_logic_somlv_defconfig b/configs/omap3_logic_somlv_defconfig index 68e89d245ee..c5d76d0d086 100644 --- a/configs/omap3_logic_somlv_defconfig +++ b/configs/omap3_logic_somlv_defconfig @@ -6,14 +6,9 @@ CONFIG_TEXT_BASE=0x80100000 CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_TI_COMMON_CMD_OPTIONS=y # CONFIG_SPL_GPIO is not set -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_DEFAULT_DEVICE_TREE="ti/omap/logicpd-som-lv-37xx-devkit" -CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_LOGIC=y # CONFIG_SPL_OMAP3_ID_NAND is not set -CONFIG_SYS_MONITOR_LEN=262144 CONFIG_SPL=y CONFIG_LTO=y CONFIG_SYS_MONITOR_BASE=0x10000000 @@ -25,7 +20,6 @@ CONFIG_PREBOOT="setenv preboot;saveenv;" CONFIG_DEFAULT_FDT_FILE="logicpd-som-lv-37xx-devkit.dtb" CONFIG_SYS_PBSIZE=1054 CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 diff --git a/configs/pcm051_rev3_defconfig b/configs/pcm051_rev3_defconfig index 78469814af3..a4e467fa05e 100644 --- a/configs/pcm051_rev3_defconfig +++ b/configs/pcm051_rev3_defconfig @@ -3,8 +3,6 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_DEFAULT_DEVICE_TREE="am335x-wega-rdk" CONFIG_AM33XX=y diff --git a/configs/phycore-am335x-r2-regor_defconfig b/configs/phycore-am335x-r2-regor_defconfig index ac638c4e321..d5056ccd98e 100644 --- a/configs/phycore-am335x-r2-regor_defconfig +++ b/configs/phycore-am335x-r2-regor_defconfig @@ -4,8 +4,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_OFFSET=0xA0000 CONFIG_DEFAULT_DEVICE_TREE="am335x-regor-rdk" CONFIG_AM33XX=y diff --git a/configs/phycore-am335x-r2-wega_defconfig b/configs/phycore-am335x-r2-wega_defconfig index 98c62171865..5813d102475 100644 --- a/configs/phycore-am335x-r2-wega_defconfig +++ b/configs/phycore-am335x-r2-wega_defconfig @@ -4,8 +4,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_OFFSET=0xA0000 CONFIG_DEFAULT_DEVICE_TREE="am335x-wega-rdk" CONFIG_AM33XX=y diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig index f9fd7255df7..6748e6fafbc 100644 --- a/configs/phycore-imx8mm_defconfig +++ b/configs/phycore-imx8mm_defconfig @@ -12,6 +12,7 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mm-phyboard-polis-rdk" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_PHYCORE_IMX8MM=y +CONFIG_DM_RESET=y CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y @@ -23,6 +24,7 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x3E0000 CONFIG_SYS_LOAD_ADDR=0x40480000 +CONFIG_PCI=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y @@ -48,6 +50,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set +CONFIG_CMD_ERASEENV=y # CONFIG_CMD_CRC32 is not set CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 @@ -59,6 +62,7 @@ CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y CONFIG_CMD_SF_TEST=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y @@ -110,10 +114,15 @@ CONFIG_PHY_TI_DP83867=y CONFIG_PHY_GIGE=y CONFIG_FEC_MXC=y CONFIG_MII=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_IMX=y +CONFIG_PHY=y +CONFIG_PHY_IMX8M_PCIE=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX8M=y -CONFIG_DM_REGULATOR=y +CONFIG_POWER_DOMAIN=y +CONFIG_IMX8M_POWER_DOMAIN=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_SERIAL=y diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig index da7fe612ca0..63f8a80ba99 100644 --- a/configs/phycore-imx8mp_defconfig +++ b/configs/phycore-imx8mp_defconfig @@ -52,6 +52,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_CMD_ERASEENV=y # CONFIG_CMD_CRC32 is not set CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 diff --git a/configs/phycore_am62x_r5_defconfig b/configs/phycore_am62x_r5_defconfig index c1664c4295f..b7d0273dd74 100644 --- a/configs/phycore_am62x_r5_defconfig +++ b/configs/phycore_am62x_r5_defconfig @@ -90,6 +90,7 @@ CONFIG_SPL_CLK_K3=y CONFIG_TI_SCI_PROTOCOL=y CONFIG_DA8XX_GPIO=y CONFIG_DM_I2C=y +CONFIG_SYS_I2C_OMAP24XX=y CONFIG_DM_MAILBOX=y CONFIG_K3_SEC_PROXY=y CONFIG_SPL_MISC=y @@ -130,4 +131,3 @@ CONFIG_SPL_TIMER=y CONFIG_OMAP_TIMER=y CONFIG_LIB_RATIONAL=y CONFIG_SPL_LIB_RATIONAL=y -CONFIG_SYS_I2C_OMAP24XX=y diff --git a/configs/px30-core-ctouch2-of10-px30_defconfig b/configs/px30-core-ctouch2-of10-px30_defconfig index fdcbd8a0fc0..3d44c018c99 100644 --- a/configs/px30-core-ctouch2-of10-px30_defconfig +++ b/configs/px30-core-ctouch2-of10-px30_defconfig @@ -30,8 +30,8 @@ CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set -# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set # CONFIG_TPL_BANNER_PRINT is not set +# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set diff --git a/configs/px30-core-ctouch2-px30_defconfig b/configs/px30-core-ctouch2-px30_defconfig index 343fd0bf516..7a655988a89 100644 --- a/configs/px30-core-ctouch2-px30_defconfig +++ b/configs/px30-core-ctouch2-px30_defconfig @@ -30,8 +30,8 @@ CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set -# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set # CONFIG_TPL_BANNER_PRINT is not set +# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set diff --git a/configs/px30-core-edimm2.2-px30_defconfig b/configs/px30-core-edimm2.2-px30_defconfig index aa0bff4667d..0c80f40dcfc 100644 --- a/configs/px30-core-edimm2.2-px30_defconfig +++ b/configs/px30-core-edimm2.2-px30_defconfig @@ -30,8 +30,8 @@ CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set -# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set # CONFIG_TPL_BANNER_PRINT is not set +# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig index c2f869391d7..30946b8f6b4 100644 --- a/configs/pxm2_defconfig +++ b/configs/pxm2_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x2000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="am335x-pxm50" diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig index 419e969e5d1..8852e83a52b 100644 --- a/configs/qcom_defconfig +++ b/configs/qcom_defconfig @@ -36,9 +36,9 @@ CONFIG_CMD_BMP=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_LOG=y CONFIG_OF_LIVE=y -CONFIG_BUTTON_QCOM_PMIC=y CONFIG_USE_DEFAULT_ENV_FILE=y CONFIG_DEFAULT_ENV_FILE="board/qualcomm/default.env" +CONFIG_BUTTON_QCOM_PMIC=y CONFIG_CLK=y CONFIG_CLK_QCOM_APQ8016=y CONFIG_CLK_QCOM_APQ8096=y diff --git a/configs/rut_defconfig b/configs/rut_defconfig index 7e78f1d6491..93d182a710c 100644 --- a/configs/rut_defconfig +++ b/configs/rut_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x2000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="am335x-rut" diff --git a/configs/sheep-rk3368_defconfig b/configs/sheep-rk3368_defconfig index a591b2741dd..00a7f79401d 100644 --- a/configs/sheep-rk3368_defconfig +++ b/configs/sheep-rk3368_defconfig @@ -8,7 +8,6 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_DEVICE_TREE="rk3368-sheep" CONFIG_ROCKCHIP_RK3368=y -CONFIG_TARGET_SHEEP=y CONFIG_DEBUG_UART_BASE=0xFF1b0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 diff --git a/configs/sniper_defconfig b/configs/sniper_defconfig index 0243b15f31c..06e9b2ae2fa 100644 --- a/configs/sniper_defconfig +++ b/configs/sniper_defconfig @@ -1,43 +1,33 @@ CONFIG_ARM=y -# CONFIG_SYS_THUMB_BUILD is not set CONFIG_ARCH_OMAP2PLUS=y -CONFIG_TEXT_BASE=0x80100000 -CONFIG_SYS_MALLOC_LEN=0x120000 -CONFIG_SYS_MALLOC_F_LEN=0x400 -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 -CONFIG_SPL_TEXT_BASE=0x40200000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_DEFAULT_DEVICE_TREE="ti/omap/omap3-sniper" CONFIG_TARGET_SNIPER=y -CONFIG_SPL_STACK=0x4020fffc -CONFIG_SPL_BSS_START_ADDR=0x80000000 +CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="setenv boot_mmc_part ${kernel_mmc_part}; if test reboot-${reboot-mode} = reboot-r; then echo recovery; setenv boot_mmc_part ${recovery_mmc_part}; fi; if test reboot-${reboot-mode} = reboot-b; then echo fastboot; fastboot 0; fi; part start mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_start; part size mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_size; mmc dev ${boot_mmc_dev}; mmc read ${kernel_addr_r} ${boot_mmc_start} ${boot_mmc_size} && bootm ${kernel_addr_r};" -CONFIG_SYS_CBSIZE=512 -CONFIG_SYS_PBSIZE=538 CONFIG_SYS_CONSOLE_IS_IN_ENV=y -CONFIG_SPL_MAX_SIZE=0xec00 -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y -CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y -CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80208000 +CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=2 # CONFIG_SPL_FS_EXT4 is not set # CONFIG_SPL_NAND_SUPPORT is not set -CONFIG_SYS_PROMPT="sniper # " CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y # CONFIG_CMD_SETEXPR is not set +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_UPSTREAM=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_SYS_I2C_LEGACY=y -CONFIG_SPL_SYS_I2C_LEGACY=y -CONFIG_SYS_I2C_SPEED=400000 +CONFIG_SPL_DM=y +CONFIG_DM_I2C=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_TWL4030_INPUT=y CONFIG_MMC_OMAP_HS=y -CONFIG_CONS_INDEX=3 -CONFIG_OF_LIBFDT=y diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig index 5f68a71bfbb..b8d9c849bcd 100644 --- a/configs/socfpga_secu1_defconfig +++ b/configs/socfpga_secu1_defconfig @@ -15,6 +15,7 @@ CONFIG_DM_RESET=y # CONFIG_SPL_MMC is not set CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x0 +CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_TARGET_SOCFPGA_ARRIA5_SECU1=y CONFIG_ENV_OFFSET_REDUND=0x120000 # CONFIG_SPL_LIBDISK_SUPPORT is not set @@ -106,7 +107,6 @@ CONFIG_RTC_M41T62=y CONFIG_SPI=y CONFIG_SPI_MEM=y CONFIG_DESIGNWARE_SPI=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_DESIGNWARE_WATCHDOG=y CONFIG_WDT=y CONFIG_SYS_TIMER_COUNTS_DOWN=y diff --git a/configs/synquacer_developerbox_defconfig b/configs/synquacer_developerbox_defconfig index 7e1aeac217c..a7b3d1912d3 100644 --- a/configs/synquacer_developerbox_defconfig +++ b/configs/synquacer_developerbox_defconfig @@ -14,7 +14,6 @@ CONFIG_TARGET_DEVELOPERBOX=y CONFIG_AHCI=y CONFIG_FIT=y CONFIG_SYS_BOOTM_LEN=0x800000 -CONFIG_BOOTSTAGE_STASH_SIZE=4096 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=128 CONFIG_CMD_FWU_METADATA=y @@ -93,7 +92,6 @@ CONFIG_FS_EXT4=y CONFIG_EFI_SET_TIME=y CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y CONFIG_EFI_CAPSULE_ON_DISK=y -CONFIG_EFI_IGNORE_OSINDICATIONS=y CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y CONFIG_FWU_MULTI_BANK_UPDATE=y CONFIG_FWU_MDATA_V2=y diff --git a/configs/verdin-am62_a53_defconfig b/configs/verdin-am62_a53_defconfig index 464d0bbb159..25f5f5e7ee5 100644 --- a/configs/verdin-am62_a53_defconfig +++ b/configs/verdin-am62_a53_defconfig @@ -74,7 +74,6 @@ CONFIG_CMD_MEMTEST=y CONFIG_CMD_BCB=y CONFIG_CMD_CLK=y CONFIG_CMD_DFU=y -CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/warp7_bl33_defconfig b/configs/warp7_bl33_defconfig index 51e52007efc..6b68681553c 100644 --- a/configs/warp7_bl33_defconfig +++ b/configs/warp7_bl33_defconfig @@ -4,7 +4,7 @@ CONFIG_SYS_MALLOC_LEN=0x2300000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x80000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="imx7s-warp" +CONFIG_DEFAULT_DEVICE_TREE="nxp/imx/imx7s-warp" CONFIG_TARGET_WARP7=y CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig index 48042b702c2..679b6e8997e 100644 --- a/configs/warp7_defconfig +++ b/configs/warp7_defconfig @@ -5,7 +5,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="imx7s-warp" +CONFIG_DEFAULT_DEVICE_TREE="nxp/imx/imx7s-warp" CONFIG_TARGET_WARP7=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y # CONFIG_ARMV7_VIRT is not set diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig index 1de61886b38..4b73e1551ce 100644 --- a/configs/work_92105_defconfig +++ b/configs/work_92105_defconfig @@ -12,7 +12,6 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007ff20 -CONFIG_TARGET_WORK_92105=y CONFIG_CMD_HD44760=y CONFIG_CMD_MAX6957=y CONFIG_ENV_SIZE=0x20000 diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index 9be904fd301..b2a1f14eb34 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -155,4 +155,3 @@ CONFIG_SYS_TIMER_COUNTS_DOWN=y CONFIG_SPL_GZIP=y CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y -CONFIG_TOOLS_MKEFICAPSULE=y diff --git a/doc/develop/bootstd/android.rst b/doc/develop/bootstd/android.rst new file mode 100644 index 00000000000..41701d5bdff --- /dev/null +++ b/doc/develop/bootstd/android.rst @@ -0,0 +1,39 @@ +.. SPDX-License-Identifier: GPL-2.0+: + +Android Bootmeth +================ + +Android provides a mechanism for booting its Operating System from eMMC storage, +described on `source.android.com <https://source.android.com/docs/core/architecture/bootloader>`_. + +Android has strong requirements about partitioning layout which are described +`here <https://source.android.com/docs/core/architecture/partitions>`_. +Because multiple partitions are required, this bootmeth only operates on whole mmc +devices which have a valid partition table. + +When invoked on a bootdev, this bootmeth searches for the ``misc`` partition in order +to read the *boot mode*, which can be one of following: + +Normal + Boot the regular Android Operating System. + +Recovery + Boot a slimmed down Recovery Operating System. Can be used + to factory reset the device or to apply system updates. + +Bootloader + Stay in U-Boot and wait for fastboot commands from the host. + +After the *boot mode* has been determined, this bootmeth will read the *slot suffix* +from the ``misc`` partition. For details about slots, see +`the AOSP documentation <https://source.android.com/docs/core/ota/ab#slots>`_. + +When both the *boot mode* and the *slot suffix* are known, the bootflow is created. + +When the bootflow is booted, the bootmeth reads the kernel, the boot arguments and +the vendor ramdisk. +It then boots the kernel using bootm. The relevant devicetree blob is extracted +from the ``boot`` partition based on the ``adtb_idx`` environment variable. + +The compatible string "u-boot,android" is used for the driver. It is present +if `CONFIG_BOOTMETH_ANDROID` is enabled. diff --git a/doc/develop/bootstd/index.rst b/doc/develop/bootstd/index.rst index 9d35b567d55..4c4e26ccdb7 100644 --- a/doc/develop/bootstd/index.rst +++ b/doc/develop/bootstd/index.rst @@ -10,6 +10,7 @@ Standard Boot extlinux pxelinux qfw + android cros script sandbox diff --git a/doc/develop/bootstd/overview.rst b/doc/develop/bootstd/overview.rst index ff3cc48eb64..c6f003851b2 100644 --- a/doc/develop/bootstd/overview.rst +++ b/doc/develop/bootstd/overview.rst @@ -429,7 +429,7 @@ Available bootmeth drivers Bootmeth drivers are provided for booting from various media: - - Android bootflow (boot image v4) + - :doc:`Android <android>` bootflow (boot image v4) - :doc:`ChromiumOS <cros>` ChromiumOS boot from a disk - EFI boot using bootefi from disk - EFI boot using boot manager diff --git a/doc/develop/devicetree/control.rst b/doc/develop/devicetree/control.rst index ca4fb0b5b10..211f7e4909c 100644 --- a/doc/develop/devicetree/control.rst +++ b/doc/develop/devicetree/control.rst @@ -96,12 +96,12 @@ sync the `dts/upstream/` subtree from the devicetree-rebasing repo whenever the next branch opens (refer: :doc:`../release_cycle`) with the latest mainline Linux kernel release. To sync the `dts/upstream/` subtree, run:: - ./dts/update-dts-subtree.sh pull <devicetree-rebasing-release-tag> + ./tools/update-subtree.sh pull dts <devicetree-rebasing-release-tag> If required it is also possible to cherry-pick fixes from the devicetree-rebasing repository prior to next sync, usage:: - ./dts/update-dts-subtree.sh pick <devicetree-rebasing-commit-id> + ./tools/update-subtree.sh pick dts <devicetree-rebasing-commit-id> Configuration @@ -116,8 +116,8 @@ However, if `dts/upstream/` hasn't yet received devicetree source file for your newly added board support then one option is that you can add the corresponding devicetree source file as `arch/<arch>/dts/<name>.dts`. To select that add `# CONFIG_OF_UPSTREAM is not set` and set `DEFAULT_DEVICE_TREE=<name>` when -prompted by Kconfig. Another option is that you can use use the "pick" option of -`dts/update-dts-subtree.sh` mentioned above to bring in the commits that you +prompted by Kconfig. Another option is that you can use the "pick" option of +`tools/update-subtree.sh` mentioned above to bring in the commits that you need. This should include your CPU or SoC's devicetree file. On top of that any U-Boot diff --git a/doc/develop/release_cycle.rst b/doc/develop/release_cycle.rst index e3c13b93afd..776af601e20 100644 --- a/doc/develop/release_cycle.rst +++ b/doc/develop/release_cycle.rst @@ -55,7 +55,7 @@ Current Status * The Merge Window for the next release (v2024.10) is **closed**. -* The next branch is now **closed**. +* The next branch is now **open**. * Release "v2024.10" is scheduled for 07 October 2024. @@ -69,7 +69,7 @@ For the next scheduled release, release candidates were made on:: * U-Boot v2024.10-rc1 was released on Mon 22 July 2024. -.. * U-Boot v2024.10-rc2 was released on Mon 05 August 2024. +* U-Boot v2024.10-rc2 was released on Mon 05 August 2024. .. * U-Boot v2024.10-rc3 was released on Mon 19 August 2024. diff --git a/doc/mkeficapsule.1 b/doc/mkeficapsule.1 index c4c2057d5c7..c3d0f21488a 100644 --- a/doc/mkeficapsule.1 +++ b/doc/mkeficapsule.1 @@ -88,6 +88,10 @@ Generate a firmware revert empty capsule Capsule OEM flag, value between 0x0000 to 0xffff .TP +.BR -V ", " --version +Print version information and exit. + +.TP .BR -h ", " --help Print a help message diff --git a/doc/usage/cmd/cpu.rst b/doc/usage/cmd/cpu.rst new file mode 100644 index 00000000000..8b0b7d5a699 --- /dev/null +++ b/doc/usage/cmd/cpu.rst @@ -0,0 +1,101 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. Copyright 2024 NXP + +.. index:: + single: cpu (command) + +cpu command +=========== + +Synopsis +-------- + +:: + + cpu list + cpu detail + cpu release <core ID> <addr> + +Description +----------- + +The *cpu* command prints information about the CPUs, and release a CPU core +to a given address to run applications. + + +cpu list +~~~~~~~~ + +The 'list' subcommand lists and prints brief information of all the CPU cores, +the CPU information is provided by vendors' CPU driver. + +cpu detail +~~~~~~~~~~ + +The 'detail' subcommand prints more details about the CPU cores, including +CPU ID, core frequency and feature list. + +cpu release +~~~~~~~~~~~ + +The 'release' subcommand is used to release a CPU core to run a baremetal or +RTOS applications. +The parameter <core ID> is the sequence number of the CPU core to release. +The parameter <addr> is the address to run of the specified core after release. + + +Examples +-------- + +cpu list +~~~~~~~~ + +This example lists all the CPU cores On i.MX8M Plus EVK: +:: + + u-boot=> cpu list + 0: cpu@0 NXP i.MX8MP Rev1.1 A53 at 1200 MHz at 31C + 1: cpu@1 NXP i.MX8MP Rev1.1 A53 at 1200 MHz at 30C + 2: cpu@2 NXP i.MX8MP Rev1.1 A53 at 1200 MHz at 31C + 3: cpu@3 NXP i.MX8MP Rev1.1 A53 at 1200 MHz at 31C + +cpu detail +~~~~~~~~~~ + +This example prints the details of the CPU cores On i.MX8M Plus EVK: +:: + + u-boot=> cpu detail + 0: cpu@0 NXP i.MX8MP Rev1.1 A53 at 1200 MHz at 31C + ID = 0, freq = 1.2 GHz: L1 cache, MMU + 1: cpu@1 NXP i.MX8MP Rev1.1 A53 at 1200 MHz at 30C + ID = 0, freq = 1.2 GHz: L1 cache, MMU + 2: cpu@2 NXP i.MX8MP Rev1.1 A53 at 1200 MHz at 31C + ID = 0, freq = 1.2 GHz: L1 cache, MMU + 3: cpu@3 NXP i.MX8MP Rev1.1 A53 at 1200 MHz at 31C + ID = 0, freq = 1.2 GHz: L1 cache, MMU + +cpu release +~~~~~~~~~~~ + +This example shows release the LAST CPU core to run a RTOS application, on +i.MX8M Plus EVK: +:: + + u-boot=> load mmc 1:2 c0000000 /hello_world.bin + 66008 bytes read in 5 ms (12.6 MiB/s) + u-boot=> dcache flush; icache flush + u-boot=> cpu release 3 c0000000 + Released CPU core (mpidr: 0x3) to address 0xc0000000 + + +Configuration +------------- + +The cpu command is available if CONFIG_CMD_CPU=y. + +Return code +----------- + +The return value $? is set to 0 (true) if the command is successful, +1 (false) otherwise. diff --git a/doc/usage/index.rst b/doc/usage/index.rst index 49b354e6ffd..1f6518b77c4 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -50,6 +50,7 @@ Shell commands cmd/coninfo cmd/conitrace cmd/cp + cmd/cpu cmd/cyclic cmd/dm cmd/ebtupdate diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c index c48a62ba099..16169dac234 100644 --- a/drivers/clk/clk-uclass.c +++ b/drivers/clk/clk-uclass.c @@ -178,7 +178,7 @@ int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk) bulk_get_err: err = clk_release_all(bulk->clks, bulk->count); if (err) - debug("%s: could release all clocks for %p\n", + debug("%s: could not release all clocks for %p\n", __func__, dev); return ret; @@ -609,7 +609,7 @@ int clk_enable(struct clk *clk) struct clk *clkp = NULL; int ret; - debug("%s(clk=%p)\n", __func__, clk); + debug("%s(clk=%p name=%s)\n", __func__, clk, clk->dev->name); if (!clk_valid(clk)) return 0; ops = clk_dev_ops(clk->dev); @@ -670,7 +670,7 @@ int clk_disable(struct clk *clk) struct clk *clkp = NULL; int ret; - debug("%s(clk=%p)\n", __func__, clk); + debug("%s(clk=%p name=%s)\n", __func__, clk, clk->dev->name); if (!clk_valid(clk)) return 0; ops = clk_dev_ops(clk->dev); diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c index e538f047b31..a91c6767fac 100644 --- a/drivers/clk/imx/clk-imx8mm.c +++ b/drivers/clk/imx/clk-imx8mm.c @@ -21,6 +21,8 @@ static const char * const sys_pll1_bypass_sels[] = {"sys_pll1", "sys_pll1_ref_se static const char * const sys_pll2_bypass_sels[] = {"sys_pll2", "sys_pll2_ref_sel", }; static const char * const sys_pll3_bypass_sels[] = {"sys_pll3", "sys_pll3_ref_sel", }; +static const char * const imx8mm_arm_core_sels[] = {"arm_a53_src", "arm_pll_out", }; + static const char * const imx8mm_a53_sels[] = {"clock-osc-24m", "arm_pll_out", "sys_pll2_500m", "sys_pll2_1000m", "sys_pll1_800m", "sys_pll1_400m", "audio_pll1_out", "sys_pll3_out", }; @@ -417,6 +419,12 @@ static int imx8mm_clk_probe(struct udevice *dev) imx_clk_gate4("qspi_root_clk", "qspi", base + 0x42f0, 0)); #endif + clk_dm(IMX8MM_CLK_ARM, + imx_clk_mux2_flags("arm_core", base + 0x9880, 24, 1, + imx8mm_arm_core_sels, + ARRAY_SIZE(imx8mm_arm_core_sels), + CLK_IS_CRITICAL)); + return 0; } diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c index 8911e342f18..125215e84f4 100644 --- a/drivers/clk/imx/clk-imx8mn.c +++ b/drivers/clk/imx/clk-imx8mn.c @@ -23,6 +23,8 @@ static const char * const sys_pll1_bypass_sels[] = {"sys_pll1", "sys_pll1_ref_se static const char * const sys_pll2_bypass_sels[] = {"sys_pll2", "sys_pll2_ref_sel", }; static const char * const sys_pll3_bypass_sels[] = {"sys_pll3", "sys_pll3_ref_sel", }; +static const char * const imx8mn_arm_core_sels[] = {"arm_a53_src", "arm_pll_out", }; + static const char * const imx8mn_a53_sels[] = {"clock-osc-24m", "arm_pll_out", "sys_pll2_500m", "sys_pll2_1000m", "sys_pll1_800m", "sys_pll1_400m", "audio_pll1_out", "sys_pll3_out", }; @@ -403,6 +405,12 @@ static int imx8mn_clk_probe(struct udevice *dev) imx_clk_gate4("ecspi3_root_clk", "ecspi3", base + 0x4090, 0)); #endif + clk_dm(IMX8MN_CLK_ARM, + imx_clk_mux2_flags("arm_core", base + 0x9880, 24, 1, + imx8mn_arm_core_sels, + ARRAY_SIZE(imx8mn_arm_core_sels), + CLK_IS_CRITICAL)); + return 0; } diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c index 6b18483c814..34d91cd6880 100644 --- a/drivers/clk/imx/clk-imx8mp.c +++ b/drivers/clk/imx/clk-imx8mp.c @@ -21,6 +21,8 @@ static const char * const sys_pll1_bypass_sels[] = {"sys_pll1", "sys_pll1_ref_se static const char * const sys_pll2_bypass_sels[] = {"sys_pll2", "sys_pll2_ref_sel", }; static const char * const sys_pll3_bypass_sels[] = {"sys_pll3", "sys_pll3_ref_sel", }; +static const char * const imx8mp_arm_core_sels[] = {"arm_a53_src", "arm_pll_out", }; + static const char * const imx8mp_a53_sels[] = {"clock-osc-24m", "arm_pll_out", "sys_pll2_500m", "sys_pll2_1000m", "sys_pll1_800m", "sys_pll1_400m", "audio_pll1_out", "sys_pll3_out", }; @@ -354,6 +356,12 @@ static int imx8mp_clk_probe(struct udevice *dev) clk_dm(IMX8MP_CLK_USDHC3_ROOT, imx_clk_gate4("usdhc3_root_clk", "usdhc3", base + 0x45e0, 0)); + clk_dm(IMX8MP_CLK_ARM, + imx_clk_mux2_flags("arm_core", base + 0x9880, 24, 1, + imx8mp_arm_core_sels, + ARRAY_SIZE(imx8mp_arm_core_sels), + CLK_IS_CRITICAL)); + return 0; } diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c index d2c45be30de..66683aeb2d7 100644 --- a/drivers/clk/mediatek/clk-mtk.c +++ b/drivers/clk/mediatek/clk-mtk.c @@ -35,6 +35,68 @@ /* shared functions */ +static int mtk_clk_get_id(struct clk *clk) +{ + struct mtk_clk_priv *priv = dev_get_priv(clk->dev); + int id = clk->id; + + /* Remap the clk ID to the one expected by driver */ + if (priv->tree->id_offs_map) + id = priv->tree->id_offs_map[id]; + + return id; +} + +static int mtk_gate_enable(void __iomem *base, const struct mtk_gate *gate) +{ + u32 bit = BIT(gate->shift); + + switch (gate->flags & CLK_GATE_MASK) { + case CLK_GATE_SETCLR: + writel(bit, base + gate->regs->clr_ofs); + break; + case CLK_GATE_SETCLR_INV: + writel(bit, base + gate->regs->set_ofs); + break; + case CLK_GATE_NO_SETCLR: + clrsetbits_le32(base + gate->regs->sta_ofs, bit, 0); + break; + case CLK_GATE_NO_SETCLR_INV: + clrsetbits_le32(base + gate->regs->sta_ofs, bit, bit); + break; + + default: + return -EINVAL; + } + + return 0; +} + +static int mtk_gate_disable(void __iomem *base, const struct mtk_gate *gate) +{ + u32 bit = BIT(gate->shift); + + switch (gate->flags & CLK_GATE_MASK) { + case CLK_GATE_SETCLR: + writel(bit, base + gate->regs->set_ofs); + break; + case CLK_GATE_SETCLR_INV: + writel(bit, base + gate->regs->clr_ofs); + break; + case CLK_GATE_NO_SETCLR: + clrsetbits_le32(base + gate->regs->sta_ofs, bit, bit); + break; + case CLK_GATE_NO_SETCLR_INV: + clrsetbits_le32(base + gate->regs->sta_ofs, bit, 0); + break; + + default: + return -EINVAL; + } + + return 0; +} + /* * In case the rate change propagation to parent clocks is undesirable, * this function is recursively called to find the parent to calculate @@ -54,13 +116,27 @@ static ulong mtk_clk_find_parent_rate(struct clk *clk, int id, } static int mtk_clk_mux_set_parent(void __iomem *base, u32 parent, + u32 parent_type, const struct mtk_composite *mux) { u32 val, index = 0; - while (mux->parent[index] != parent) - if (++index == mux->num_parents) - return -EINVAL; + if (mux->flags & CLK_PARENT_MIXED) { + /* + * Assume parent_type in clk_tree to be always set with + * CLK_PARENT_MIXED implementation. If it's not, assume + * not parent clk ID clash is possible. + */ + while (mux->parent_flags[index].id != parent || + (parent_type && (mux->parent_flags[index].flags & CLK_PARENT_MASK) != + parent_type)) + if (++index == mux->num_parents) + return -EINVAL; + } else { + while (mux->parent[index] != parent) + if (++index == mux->num_parents) + return -EINVAL; + } if (mux->flags & CLK_MUX_SETCLR_UPD) { val = (mux->mux_mask << mux->mux_shift); @@ -117,12 +193,14 @@ static unsigned long __mtk_pll_recalc_rate(const struct mtk_pll_data *pll, * for the integer part and the remaining bits (if present) for the * fractional part. Also they have a 3 bit power-of-two post divider. */ -static void mtk_pll_set_rate_regs(struct clk *clk, u32 pcw, int postdiv) +static void mtk_pll_set_rate_regs(struct mtk_clk_priv *priv, u32 id, + u32 pcw, int postdiv) { - struct mtk_clk_priv *priv = dev_get_priv(clk->dev); - const struct mtk_pll_data *pll = &priv->tree->plls[clk->id]; + const struct mtk_pll_data *pll; u32 val, chg; + pll = &priv->tree->plls[id]; + /* set postdiv */ val = readl(priv->base + pll->pd_reg); val &= ~(POSTDIV_MASK << pll->pd_shift); @@ -153,21 +231,24 @@ static void mtk_pll_set_rate_regs(struct clk *clk, u32 pcw, int postdiv) /** * mtk_pll_calc_values - calculate good values for a given input frequency. - * @clk: The clk + * @priv: The mtk priv struct + * @id: The clk id * @pcw: The pcw value (output) * @postdiv: The post divider (output) * @freq: The desired target frequency */ -static void mtk_pll_calc_values(struct clk *clk, u32 *pcw, u32 *postdiv, - u32 freq) +static void mtk_pll_calc_values(struct mtk_clk_priv *priv, u32 id, + u32 *pcw, u32 *postdiv, u32 freq) { - struct mtk_clk_priv *priv = dev_get_priv(clk->dev); - const struct mtk_pll_data *pll = &priv->tree->plls[clk->id]; - unsigned long fmin = pll->fmin ? pll->fmin : 1000 * MHZ; + const struct mtk_pll_data *pll; + unsigned long fmin; u64 _pcw; int ibits; u32 val; + pll = &priv->tree->plls[id]; + fmin = pll->fmin ? pll->fmin : 1000 * MHZ; + if (freq > pll->fmax) freq = pll->fmax; @@ -187,11 +268,16 @@ static void mtk_pll_calc_values(struct clk *clk, u32 *pcw, u32 *postdiv, static ulong mtk_apmixedsys_set_rate(struct clk *clk, ulong rate) { + struct mtk_clk_priv *priv = dev_get_priv(clk->dev); + int id = mtk_clk_get_id(clk); u32 pcw = 0; u32 postdiv; - mtk_pll_calc_values(clk, &pcw, &postdiv, rate); - mtk_pll_set_rate_regs(clk, pcw, postdiv); + if (priv->tree->gates && id >= priv->tree->gates_offs) + return -EINVAL; + + mtk_pll_calc_values(priv, id, &pcw, &postdiv, rate); + mtk_pll_set_rate_regs(priv, id, pcw, postdiv); return 0; } @@ -199,10 +285,20 @@ static ulong mtk_apmixedsys_set_rate(struct clk *clk, ulong rate) static ulong mtk_apmixedsys_get_rate(struct clk *clk) { struct mtk_clk_priv *priv = dev_get_priv(clk->dev); - const struct mtk_pll_data *pll = &priv->tree->plls[clk->id]; + const struct mtk_pll_data *pll; + int id = mtk_clk_get_id(clk); + const struct mtk_gate *gate; u32 postdiv; u32 pcw; + /* GATE handling */ + if (priv->tree->gates && id >= priv->tree->gates_offs) { + gate = &priv->tree->gates[id - priv->tree->gates_offs]; + return mtk_clk_find_parent_rate(clk, gate->parent, NULL); + } + + pll = &priv->tree->plls[id]; + postdiv = (readl(priv->base + pll->pd_reg) >> pll->pd_shift) & POSTDIV_MASK; postdiv = 1 << postdiv; @@ -217,9 +313,19 @@ static ulong mtk_apmixedsys_get_rate(struct clk *clk) static int mtk_apmixedsys_enable(struct clk *clk) { struct mtk_clk_priv *priv = dev_get_priv(clk->dev); - const struct mtk_pll_data *pll = &priv->tree->plls[clk->id]; + const struct mtk_pll_data *pll; + int id = mtk_clk_get_id(clk); + const struct mtk_gate *gate; u32 r; + /* GATE handling */ + if (priv->tree->gates && id >= priv->tree->gates_offs) { + gate = &priv->tree->gates[id - priv->tree->gates_offs]; + return mtk_gate_enable(priv->base, gate); + } + + pll = &priv->tree->plls[id]; + r = readl(priv->base + pll->pwr_reg) | CON0_PWR_ON; writel(r, priv->base + pll->pwr_reg); udelay(1); @@ -246,9 +352,19 @@ static int mtk_apmixedsys_enable(struct clk *clk) static int mtk_apmixedsys_disable(struct clk *clk) { struct mtk_clk_priv *priv = dev_get_priv(clk->dev); - const struct mtk_pll_data *pll = &priv->tree->plls[clk->id]; + const struct mtk_pll_data *pll; + int id = mtk_clk_get_id(clk); + const struct mtk_gate *gate; u32 r; + /* GATE handling */ + if (priv->tree->gates && id >= priv->tree->gates_offs) { + gate = &priv->tree->gates[id - priv->tree->gates_offs]; + return mtk_gate_disable(priv->base, gate); + } + + pll = &priv->tree->plls[id]; + if (pll->flags & HAVE_RST_BAR) { r = readl(priv->base + pll->reg + REG_CON0); r &= ~pll->rst_bar_mask; @@ -324,6 +440,19 @@ static ulong mtk_infrasys_get_factor_rate(struct clk *clk, u32 off) return mtk_factor_recalc_rate(fdiv, rate); } +static ulong mtk_topckgen_find_parent_rate(struct mtk_clk_priv *priv, struct clk *clk, + const int parent, u16 flags) +{ + switch (flags & CLK_PARENT_MASK) { + case CLK_PARENT_XTAL: + return priv->tree->xtal_rate; + case CLK_PARENT_APMIXED: + return mtk_clk_find_parent_rate(clk, parent, priv->parent); + default: + return mtk_clk_find_parent_rate(clk, parent, NULL); + } +} + static ulong mtk_topckgen_get_mux_rate(struct clk *clk, u32 off) { struct mtk_clk_priv *priv = dev_get_priv(clk->dev); @@ -334,22 +463,40 @@ static ulong mtk_topckgen_get_mux_rate(struct clk *clk, u32 off) index &= mux->mux_mask << mux->mux_shift; index = index >> mux->mux_shift; - if (mux->parent[index] > 0 || - (mux->parent[index] == CLK_XTAL && - priv->tree->flags & CLK_BYPASS_XTAL)) { - switch (mux->flags & CLK_PARENT_MASK) { - case CLK_PARENT_APMIXED: - return mtk_clk_find_parent_rate(clk, mux->parent[index], - priv->parent); - break; - default: - return mtk_clk_find_parent_rate(clk, mux->parent[index], - NULL); - break; - } + /* + * Parents can be either from APMIXED or TOPCKGEN, + * inspect the mtk_parent struct to check the source + */ + if (mux->flags & CLK_PARENT_MIXED) { + const struct mtk_parent *parent = &mux->parent_flags[index]; + + return mtk_topckgen_find_parent_rate(priv, clk, parent->id, + parent->flags); } - return priv->tree->xtal_rate; + if (mux->parent[index] == CLK_XTAL && + !(priv->tree->flags & CLK_BYPASS_XTAL)) + return priv->tree->xtal_rate; + + return mtk_topckgen_find_parent_rate(priv, clk, mux->parent[index], + mux->flags); +} + +static ulong mtk_find_parent_rate(struct mtk_clk_priv *priv, struct clk *clk, + const int parent, u16 flags) +{ + switch (flags & CLK_PARENT_MASK) { + case CLK_PARENT_XTAL: + return priv->tree->xtal_rate; + /* Assume the second level parent is always APMIXED */ + case CLK_PARENT_APMIXED: + priv = dev_get_priv(priv->parent); + fallthrough; + case CLK_PARENT_TOPCKGEN: + return mtk_clk_find_parent_rate(clk, parent, priv->parent); + default: + return mtk_clk_find_parent_rate(clk, parent, NULL); + } } static ulong mtk_infrasys_get_mux_rate(struct clk *clk, u32 off) @@ -362,51 +509,69 @@ static ulong mtk_infrasys_get_mux_rate(struct clk *clk, u32 off) index &= mux->mux_mask << mux->mux_shift; index = index >> mux->mux_shift; - if (mux->parent[index] > 0 || - (mux->parent[index] == CLK_XTAL && - priv->tree->flags & CLK_BYPASS_XTAL)) { - switch (mux->flags & CLK_PARENT_MASK) { - case CLK_PARENT_TOPCKGEN: - return mtk_clk_find_parent_rate(clk, mux->parent[index], - priv->parent); - break; - default: - return mtk_clk_find_parent_rate(clk, mux->parent[index], - NULL); - break; - } + /* + * Parents can be either from TOPCKGEN or INFRACFG, + * inspect the mtk_parent struct to check the source + */ + if (mux->flags & CLK_PARENT_MIXED) { + const struct mtk_parent *parent = &mux->parent_flags[index]; + + return mtk_find_parent_rate(priv, clk, parent->id, parent->flags); } - return 0; + + if (mux->parent[index] == CLK_XTAL && + !(priv->tree->flags & CLK_BYPASS_XTAL)) + return priv->tree->xtal_rate; + + return mtk_find_parent_rate(priv, clk, mux->parent[index], mux->flags); } static ulong mtk_topckgen_get_rate(struct clk *clk) { struct mtk_clk_priv *priv = dev_get_priv(clk->dev); + int id = mtk_clk_get_id(clk); - if (clk->id < priv->tree->fdivs_offs) - return priv->tree->fclks[clk->id].rate; - else if (clk->id < priv->tree->muxes_offs) - return mtk_topckgen_get_factor_rate(clk, clk->id - + if (id < priv->tree->fdivs_offs) + return priv->tree->fclks[id].rate; + else if (id < priv->tree->muxes_offs) + return mtk_topckgen_get_factor_rate(clk, id - priv->tree->fdivs_offs); else - return mtk_topckgen_get_mux_rate(clk, clk->id - + return mtk_topckgen_get_mux_rate(clk, id - priv->tree->muxes_offs); } static ulong mtk_infrasys_get_rate(struct clk *clk) { struct mtk_clk_priv *priv = dev_get_priv(clk->dev); - + int id = mtk_clk_get_id(clk); ulong rate; - if (clk->id < priv->tree->fdivs_offs) { - rate = priv->tree->fclks[clk->id].rate; - } else if (clk->id < priv->tree->muxes_offs) { - rate = mtk_infrasys_get_factor_rate(clk, clk->id - + if (id < priv->tree->fdivs_offs) { + rate = priv->tree->fclks[id].rate; + } else if (id < priv->tree->muxes_offs) { + rate = mtk_infrasys_get_factor_rate(clk, id - priv->tree->fdivs_offs); - } else { - rate = mtk_infrasys_get_mux_rate(clk, clk->id - + /* No gates defined or ID is a MUX */ + } else if (!priv->tree->gates || id < priv->tree->gates_offs) { + rate = mtk_infrasys_get_mux_rate(clk, id - priv->tree->muxes_offs); + /* Only valid with muxes + gates implementation */ + } else { + struct udevice *parent = NULL; + const struct mtk_gate *gate; + + gate = &priv->tree->gates[id - priv->tree->gates_offs]; + if (gate->flags & CLK_PARENT_TOPCKGEN) + parent = priv->parent; + /* + * Assume xtal_rate to be declared if some gates have + * XTAL as parent + */ + else if (gate->flags & CLK_PARENT_XTAL) + return priv->tree->xtal_rate; + + rate = mtk_clk_find_parent_rate(clk, gate->parent, parent); } return rate; @@ -416,12 +581,13 @@ static int mtk_clk_mux_enable(struct clk *clk) { struct mtk_clk_priv *priv = dev_get_priv(clk->dev); const struct mtk_composite *mux; + int id = mtk_clk_get_id(clk); u32 val; - if (clk->id < priv->tree->muxes_offs) + if (id < priv->tree->muxes_offs) return 0; - mux = &priv->tree->muxes[clk->id - priv->tree->muxes_offs]; + mux = &priv->tree->muxes[id - priv->tree->muxes_offs]; if (mux->gate_shift < 0) return 0; @@ -449,12 +615,13 @@ static int mtk_clk_mux_disable(struct clk *clk) { struct mtk_clk_priv *priv = dev_get_priv(clk->dev); const struct mtk_composite *mux; + int id = mtk_clk_get_id(clk); u32 val; - if (clk->id < priv->tree->muxes_offs) + if (id < priv->tree->muxes_offs) return 0; - mux = &priv->tree->muxes[clk->id - priv->tree->muxes_offs]; + mux = &priv->tree->muxes[id - priv->tree->muxes_offs]; if (mux->gate_shift < 0) return 0; @@ -473,13 +640,20 @@ static int mtk_clk_mux_disable(struct clk *clk) static int mtk_common_clk_set_parent(struct clk *clk, struct clk *parent) { + struct mtk_clk_priv *parent_priv = dev_get_priv(parent->dev); struct mtk_clk_priv *priv = dev_get_priv(clk->dev); + int id = mtk_clk_get_id(clk); + u32 parent_type; + + if (id < priv->tree->muxes_offs) + return 0; - if (clk->id < priv->tree->muxes_offs) + if (!parent_priv) return 0; - return mtk_clk_mux_set_parent(priv->base, parent->id, - &priv->tree->muxes[clk->id - priv->tree->muxes_offs]); + parent_type = parent_priv->tree->flags & CLK_PARENT_MASK; + return mtk_clk_mux_set_parent(priv->base, parent->id, parent_type, + &priv->tree->muxes[id - priv->tree->muxes_offs]); } /* CG functions */ @@ -487,63 +661,88 @@ static int mtk_common_clk_set_parent(struct clk *clk, struct clk *parent) static int mtk_clk_gate_enable(struct clk *clk) { struct mtk_cg_priv *priv = dev_get_priv(clk->dev); - const struct mtk_gate *gate = &priv->gates[clk->id]; - u32 bit = BIT(gate->shift); + int id = mtk_clk_get_id(clk); + const struct mtk_gate *gate; - switch (gate->flags & CLK_GATE_MASK) { - case CLK_GATE_SETCLR: - writel(bit, priv->base + gate->regs->clr_ofs); - break; - case CLK_GATE_SETCLR_INV: - writel(bit, priv->base + gate->regs->set_ofs); - break; - case CLK_GATE_NO_SETCLR: - clrsetbits_le32(priv->base + gate->regs->sta_ofs, bit, 0); - break; - case CLK_GATE_NO_SETCLR_INV: - clrsetbits_le32(priv->base + gate->regs->sta_ofs, bit, bit); - break; - - default: + if (id < priv->tree->gates_offs) return -EINVAL; - } - return 0; + gate = &priv->gates[id - priv->tree->gates_offs]; + return mtk_gate_enable(priv->base, gate); } -static int mtk_clk_gate_disable(struct clk *clk) +static int mtk_clk_infrasys_enable(struct clk *clk) { struct mtk_cg_priv *priv = dev_get_priv(clk->dev); - const struct mtk_gate *gate = &priv->gates[clk->id]; - u32 bit = BIT(gate->shift); + int id = mtk_clk_get_id(clk); + const struct mtk_gate *gate; - switch (gate->flags & CLK_GATE_MASK) { - case CLK_GATE_SETCLR: - writel(bit, priv->base + gate->regs->set_ofs); - break; - case CLK_GATE_SETCLR_INV: - writel(bit, priv->base + gate->regs->clr_ofs); - break; - case CLK_GATE_NO_SETCLR: - clrsetbits_le32(priv->base + gate->regs->sta_ofs, bit, bit); - break; - case CLK_GATE_NO_SETCLR_INV: - clrsetbits_le32(priv->base + gate->regs->sta_ofs, bit, 0); - break; + /* MUX handling */ + if (!priv->tree->gates || id < priv->tree->gates_offs) + return mtk_clk_mux_enable(clk); - default: + gate = &priv->tree->gates[id - priv->tree->gates_offs]; + return mtk_gate_enable(priv->base, gate); +} + +static int mtk_clk_gate_disable(struct clk *clk) +{ + struct mtk_cg_priv *priv = dev_get_priv(clk->dev); + int id = mtk_clk_get_id(clk); + const struct mtk_gate *gate; + + if (id < priv->tree->gates_offs) return -EINVAL; - } - return 0; + gate = &priv->gates[id - priv->tree->gates_offs]; + return mtk_gate_disable(priv->base, gate); +} + +static int mtk_clk_infrasys_disable(struct clk *clk) +{ + struct mtk_cg_priv *priv = dev_get_priv(clk->dev); + int id = mtk_clk_get_id(clk); + const struct mtk_gate *gate; + + /* MUX handling */ + if (!priv->tree->gates || id < priv->tree->gates_offs) + return mtk_clk_mux_disable(clk); + + gate = &priv->tree->gates[id - priv->tree->gates_offs]; + return mtk_gate_disable(priv->base, gate); } static ulong mtk_clk_gate_get_rate(struct clk *clk) { struct mtk_cg_priv *priv = dev_get_priv(clk->dev); - const struct mtk_gate *gate = &priv->gates[clk->id]; + struct udevice *parent = priv->parent; + int id = mtk_clk_get_id(clk); + const struct mtk_gate *gate; + + if (id < priv->tree->gates_offs) + return -EINVAL; + + gate = &priv->gates[id - priv->tree->gates_offs]; + /* + * With requesting a TOPCKGEN parent, make sure the dev parent + * is actually topckgen. This might not be the case for an + * infracfg-ao implementation where: + * parent = infracfg + * parent->parent = topckgen + */ + if (gate->flags & CLK_PARENT_TOPCKGEN && + parent->driver != DM_DRIVER_GET(mtk_clk_topckgen)) { + priv = dev_get_priv(parent); + parent = priv->parent; + /* + * Assume xtal_rate to be declared if some gates have + * XTAL as parent + */ + } else if (gate->flags & CLK_PARENT_XTAL) { + return priv->tree->xtal_rate; + } - return mtk_clk_find_parent_rate(clk, gate->parent, priv->parent); + return mtk_clk_find_parent_rate(clk, gate->parent, parent); } const struct clk_ops mtk_clk_apmixedsys_ops = { @@ -561,8 +760,8 @@ const struct clk_ops mtk_clk_topckgen_ops = { }; const struct clk_ops mtk_clk_infrasys_ops = { - .enable = mtk_clk_mux_enable, - .disable = mtk_clk_mux_disable, + .enable = mtk_clk_infrasys_enable, + .disable = mtk_clk_infrasys_disable, .get_rate = mtk_infrasys_get_rate, .set_parent = mtk_common_clk_set_parent, }; @@ -573,8 +772,9 @@ const struct clk_ops mtk_clk_gate_ops = { .get_rate = mtk_clk_gate_get_rate, }; -int mtk_common_clk_init(struct udevice *dev, - const struct mtk_clk_tree *tree) +static int mtk_common_clk_init_drv(struct udevice *dev, + const struct mtk_clk_tree *tree, + const struct driver *drv) { struct mtk_clk_priv *priv = dev_get_priv(dev); struct udevice *parent; @@ -586,8 +786,7 @@ int mtk_common_clk_init(struct udevice *dev, ret = uclass_get_device_by_phandle(UCLASS_CLK, dev, "clock-parent", &parent); if (ret || !parent) { - ret = uclass_get_device_by_driver(UCLASS_CLK, - DM_DRIVER_GET(mtk_clk_apmixedsys), &parent); + ret = uclass_get_device_by_driver(UCLASS_CLK, drv, &parent); if (ret || !parent) return -ENOENT; } @@ -598,6 +797,20 @@ int mtk_common_clk_init(struct udevice *dev, return 0; } +int mtk_common_clk_init(struct udevice *dev, + const struct mtk_clk_tree *tree) +{ + return mtk_common_clk_init_drv(dev, tree, + DM_DRIVER_GET(mtk_clk_apmixedsys)); +} + +int mtk_common_clk_infrasys_init(struct udevice *dev, + const struct mtk_clk_tree *tree) +{ + return mtk_common_clk_init_drv(dev, tree, + DM_DRIVER_GET(mtk_clk_topckgen)); +} + int mtk_common_clk_gate_init(struct udevice *dev, const struct mtk_clk_tree *tree, const struct mtk_gate *gates) diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h index 48ce16484ec..c1d9901c10b 100644 --- a/drivers/clk/mediatek/clk-mtk.h +++ b/drivers/clk/mediatek/clk-mtk.h @@ -13,7 +13,11 @@ /* flags in struct mtk_clk_tree */ -/* clk id == 0 doesn't mean it's xtal clk */ +/* clk id == 0 doesn't mean it's xtal clk + * This doesn't apply when CLK_PARENT_MIXED is defined. + * With CLK_PARENT_MIXED declare CLK_PARENT_XTAL for the + * relevant parent. + */ #define CLK_BYPASS_XTAL BIT(0) #define HAVE_RST_BAR BIT(0) @@ -30,7 +34,17 @@ #define CLK_PARENT_TOPCKGEN BIT(5) #define CLK_PARENT_INFRASYS BIT(6) #define CLK_PARENT_XTAL BIT(7) -#define CLK_PARENT_MASK GENMASK(7, 4) +/* + * For CLK_PARENT_MIXED to correctly work, is required to + * define in clk_tree flags the clk type using the alias. + */ +#define CLK_PARENT_MIXED BIT(8) +#define CLK_PARENT_MASK GENMASK(8, 4) + +/* alias to reference clk type */ +#define CLK_APMIXED CLK_PARENT_APMIXED +#define CLK_TOPCKGEN CLK_PARENT_TOPCKGEN +#define CLK_INFRASYS CLK_PARENT_INFRASYS #define ETHSYS_HIFSYS_RST_CTRL_OFS 0x34 @@ -98,10 +112,30 @@ struct mtk_fixed_factor { } /** + * struct mtk_parent - clock parent with flags. Needed for MUX that + * parent with mixed infracfg and topckgen. + * + * @id: index of parent clocks + * @flags: hardware-specific flags (parent location, + * infracfg, topckgen, APMIXED, xtal ...) + */ +struct mtk_parent { + const int id; + u16 flags; +}; + +#define PARENT(_id, _flags) { \ + .id = _id, \ + .flags = _flags, \ + } + +/** * struct mtk_composite - aggregate clock of mux, divider and gate clocks * * @id: index of clocks * @parent: index of parnet clocks + * @parent: index of parnet clocks + * @parent_flags: table of parent clocks with flags * @mux_reg: hardware-specific mux register * @gate_reg: hardware-specific gate register * @mux_mask: mask to the mux bit field @@ -112,7 +146,10 @@ struct mtk_fixed_factor { */ struct mtk_composite { const int id; - const int *parent; + union { + const int *parent; + const struct mtk_parent *parent_flags; + }; u32 mux_reg; u32 mux_set_reg; u32 mux_clr_reg; @@ -142,7 +179,20 @@ struct mtk_composite { #define MUX_GATE(_id, _parents, _reg, _shift, _width, _gate) \ MUX_GATE_FLAGS(_id, _parents, _reg, _shift, _width, _gate, 0) -#define MUX(_id, _parents, _reg, _shift, _width) { \ +#define MUX_MIXED_FLAGS(_id, _parents, _reg, _shift, _width, _flags) { \ + .id = _id, \ + .mux_reg = _reg, \ + .mux_shift = _shift, \ + .mux_mask = BIT(_width) - 1, \ + .gate_shift = -1, \ + .parent_flags = _parents, \ + .num_parents = ARRAY_SIZE(_parents), \ + .flags = CLK_PARENT_MIXED | (_flags), \ + } +#define MUX_MIXED(_id, _parents, _reg, _shift, _width) \ + MUX_MIXED_FLAGS(_id, _parents, _reg, _shift, _width, 0) + +#define MUX_FLAGS(_id, _parents, _reg, _shift, _width, _flags) { \ .id = _id, \ .mux_reg = _reg, \ .mux_shift = _shift, \ @@ -150,8 +200,10 @@ struct mtk_composite { .gate_shift = -1, \ .parent = _parents, \ .num_parents = ARRAY_SIZE(_parents), \ - .flags = 0, \ + .flags = _flags, \ } +#define MUX(_id, _parents, _reg, _shift, _width) \ + MUX_FLAGS(_id, _parents, _reg, _shift, _width, 0) #define MUX_CLR_SET_UPD_FLAGS(_id, _parents, _mux_ofs, _mux_set_ofs,\ _mux_clr_ofs, _shift, _width, _gate, \ @@ -198,12 +250,22 @@ struct mtk_gate { struct mtk_clk_tree { unsigned long xtal_rate; unsigned long xtal2_rate; + /* + * Clock ID offset are remapped with an auxiliary table. + * Enable this by defining .id_offs_map. + * This is needed for upstream linux kernel <soc>-clk.h that + * have mixed clk ID and doesn't have clear distinction between + * ID for factor, mux and gates. + */ + const int *id_offs_map; /* optional, table clk.h to driver ID */ const int fdivs_offs; const int muxes_offs; + const int gates_offs; const struct mtk_pll_data *plls; const struct mtk_fixed_clk *fclks; const struct mtk_fixed_factor *fdivs; const struct mtk_composite *muxes; + const struct mtk_gate *gates; u32 flags; }; @@ -227,6 +289,8 @@ extern const struct clk_ops mtk_clk_gate_ops; int mtk_common_clk_init(struct udevice *dev, const struct mtk_clk_tree *tree); +int mtk_common_clk_infrasys_init(struct udevice *dev, + const struct mtk_clk_tree *tree); int mtk_common_clk_gate_init(struct udevice *dev, const struct mtk_clk_tree *tree, const struct mtk_gate *gates); diff --git a/drivers/core/util.c b/drivers/core/util.c index 108a3bc4dac..fa893485a09 100644 --- a/drivers/core/util.c +++ b/drivers/core/util.c @@ -3,23 +3,13 @@ * Copyright (c) 2013 Google, Inc */ +#include <vsprintf.h> #include <dm/device.h> #include <dm/ofnode.h> #include <dm/read.h> #include <dm/util.h> #include <linux/libfdt.h> -#include <vsprintf.h> - -int list_count_items(struct list_head *head) -{ - struct list_head *node; - int count = 0; - - list_for_each(node, head) - count++; - - return count; -} +#include <linux/list.h> #if CONFIG_IS_ENABLED(OF_REAL) int pci_get_devfn(struct udevice *dev) diff --git a/drivers/cpu/cpu-uclass.c b/drivers/cpu/cpu-uclass.c index 16f8f2e5219..2c8e46c05e3 100644 --- a/drivers/cpu/cpu-uclass.c +++ b/drivers/cpu/cpu-uclass.c @@ -104,6 +104,16 @@ int cpu_get_vendor(const struct udevice *dev, char *buf, int size) return ops->get_vendor(dev, buf, size); } +int cpu_release_core(const struct udevice *dev, phys_addr_t addr) +{ + struct cpu_ops *ops = cpu_get_ops(dev); + + if (!ops->release_core) + return -ENOSYS; + + return ops->release_core(dev, addr); +} + U_BOOT_DRIVER(cpu_bus) = { .name = "cpu_bus", .id = UCLASS_SIMPLE_BUS, diff --git a/drivers/cpu/cpu_sandbox.c b/drivers/cpu/cpu_sandbox.c index e65e1bdc51b..b1527957831 100644 --- a/drivers/cpu/cpu_sandbox.c +++ b/drivers/cpu/cpu_sandbox.c @@ -44,6 +44,11 @@ void cpu_sandbox_set_current(const char *name) cpu_current = name; } +static int cpu_sandbox_release_core(const struct udevice *dev, phys_addr_t addr) +{ + return 0; +} + static int cpu_sandbox_is_current(struct udevice *dev) { if (!strcmp(dev->name, cpu_current)) @@ -58,6 +63,7 @@ static const struct cpu_ops cpu_sandbox_ops = { .get_count = cpu_sandbox_get_count, .get_vendor = cpu_sandbox_get_vendor, .is_current = cpu_sandbox_is_current, + .release_core = cpu_sandbox_release_core, }; static int cpu_sandbox_bind(struct udevice *dev) diff --git a/drivers/cpu/imx8_cpu.c b/drivers/cpu/imx8_cpu.c index 4781a565547..60deca963a6 100644 --- a/drivers/cpu/imx8_cpu.c +++ b/drivers/cpu/imx8_cpu.c @@ -1,12 +1,13 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2019 NXP + * Copyright 2019, 2024 NXP */ #include <cpu.h> #include <dm.h> #include <thermal.h> #include <asm/global_data.h> +#include <asm/ptrace.h> #include <asm/system.h> #include <firmware/imx/sci/sci.h> #include <asm/arch/sys_proto.h> @@ -15,6 +16,7 @@ #include <imx_thermal.h> #include <linux/bitops.h> #include <linux/clk-provider.h> +#include <linux/psci.h> DECLARE_GLOBAL_DATA_PTR; @@ -31,6 +33,12 @@ struct cpu_imx_plat { static const char *get_imx_type_str(u32 imxtype) { switch (imxtype) { + case MXC_CPU_IMX8MM: + return "8MM"; + case MXC_CPU_IMX8MN: + return "8MN"; + case MXC_CPU_IMX8MP: + return "8MP"; case MXC_CPU_IMX8QXP: case MXC_CPU_IMX8QXP_A0: return "8QXP"; @@ -184,8 +192,6 @@ static int cpu_imx_get_desc(const struct udevice *dev, char *buf, int size) ret = snprintf(buf, size, " - invalid sensor data"); } - snprintf(buf + ret, size - ret, "\n"); - return 0; } @@ -193,7 +199,7 @@ static int cpu_imx_get_info(const struct udevice *dev, struct cpu_info *info) { struct cpu_imx_plat *plat = dev_get_plat(dev); - info->cpu_freq = plat->freq_mhz * 1000; + info->cpu_freq = plat->freq_mhz * 1000000; info->features = BIT(CPU_FEAT_L1_CACHE) | BIT(CPU_FEAT_MMU); return 0; } @@ -236,12 +242,34 @@ static int cpu_imx_is_current(struct udevice *dev) return 0; } +static int cpu_imx_release_core(const struct udevice *dev, phys_addr_t addr) +{ + struct cpu_imx_plat *plat = dev_get_plat(dev); + struct pt_regs regs; + + regs.regs[0] = PSCI_0_2_FN64_CPU_ON; + regs.regs[1] = plat->mpidr; + regs.regs[2] = addr; + regs.regs[3] = 0; + + smc_call(®s); + if (regs.regs[0]) { + printf("Failed to release CPU core (mpidr: 0x%x)\n", plat->mpidr); + return -1; + } + + printf("Released CPU core (mpidr: 0x%x) to address 0x%llx\n", plat->mpidr, addr); + + return 0; +} + static const struct cpu_ops cpu_imx_ops = { .get_desc = cpu_imx_get_desc, .get_info = cpu_imx_get_info, .get_count = cpu_imx_get_count, .get_vendor = cpu_imx_get_vendor, .is_current = cpu_imx_is_current, + .release_core = cpu_imx_release_core, }; static const struct udevice_id cpu_imx_ids[] = { @@ -287,7 +315,7 @@ static int imx_cpu_probe(struct udevice *dev) cpurev = get_cpu_rev(); plat->cpurev = cpurev; plat->rev = get_imx_rev_str(cpurev & 0xFFF); - plat->type = get_imx_type_str((cpurev & 0xFF000) >> 12); + plat->type = get_imx_type_str((cpurev & 0x1FF000) >> 12); plat->freq_mhz = imx_get_cpu_rate(dev) / 1000000; plat->mpidr = dev_read_addr(dev); if (plat->mpidr == FDT_ADDR_T_NONE) { diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig index 9837960198d..bee74b25751 100644 --- a/drivers/led/Kconfig +++ b/drivers/led/Kconfig @@ -65,7 +65,7 @@ config LED_PWM Linux compatible ofdata. config LED_BLINK - bool "Support LED blinking" + bool "Support hardware LED blinking" depends on LED help Some drivers can support automatic blinking of LEDs with a given @@ -73,6 +73,20 @@ config LED_BLINK This option enables support for this which adds slightly to the code size. +config LED_SW_BLINK + bool "Support software LED blinking" + depends on LED + select CYCLIC + help + Turns on led blinking implemented in the software, useful when + the hardware doesn't support led blinking. Half of the period + led will be ON and the rest time it will be OFF. Standard + led commands can be used to configure blinking. Does nothing + if driver supports hardware blinking. + WARNING: Blinking may be inaccurate during execution of time + consuming commands (ex. flash reading). Also it completely + stops during OS booting. + config SPL_LED bool "Enable LED support in SPL" depends on SPL_DM diff --git a/drivers/led/Makefile b/drivers/led/Makefile index 2bcb8589087..e27aa488482 100644 --- a/drivers/led/Makefile +++ b/drivers/led/Makefile @@ -4,6 +4,7 @@ # Written by Simon Glass <sjg@chromium.org> obj-y += led-uclass.o +obj-$(CONFIG_LED_SW_BLINK) += led_sw_blink.o obj-$(CONFIG_LED_BCM6328) += led_bcm6328.o obj-$(CONFIG_LED_BCM6358) += led_bcm6358.o obj-$(CONFIG_LED_BCM6753) += led_bcm6753.o diff --git a/drivers/led/led-uclass.c b/drivers/led/led-uclass.c index f37bf6a1550..199d68bc25a 100644 --- a/drivers/led/led-uclass.c +++ b/drivers/led/led-uclass.c @@ -58,6 +58,10 @@ int led_set_state(struct udevice *dev, enum led_state_t state) if (!ops->set_state) return -ENOSYS; + if (IS_ENABLED(CONFIG_LED_SW_BLINK) && + led_sw_on_state_change(dev, state)) + return 0; + return ops->set_state(dev, state); } @@ -68,20 +72,27 @@ enum led_state_t led_get_state(struct udevice *dev) if (!ops->get_state) return -ENOSYS; + if (IS_ENABLED(CONFIG_LED_SW_BLINK) && + led_sw_is_blinking(dev)) + return LEDST_BLINK; + return ops->get_state(dev); } -#ifdef CONFIG_LED_BLINK int led_set_period(struct udevice *dev, int period_ms) { +#ifdef CONFIG_LED_BLINK struct led_ops *ops = led_get_ops(dev); - if (!ops->set_period) - return -ENOSYS; + if (ops->set_period) + return ops->set_period(dev, period_ms); +#endif + + if (IS_ENABLED(CONFIG_LED_SW_BLINK)) + return led_sw_set_period(dev, period_ms); - return ops->set_period(dev, period_ms); + return -ENOSYS; } -#endif static int led_post_bind(struct udevice *dev) { @@ -107,6 +118,14 @@ static int led_post_bind(struct udevice *dev) else return 0; + if (IS_ENABLED(CONFIG_LED_BLINK)) { + const char *trigger; + + trigger = dev_read_string(dev, "linux,default-trigger"); + if (trigger && !strncmp(trigger, "pattern", 7)) + uc_plat->default_state = LEDST_BLINK; + } + /* * In case the LED has default-state DT property, trigger * probe() to configure its default state during startup. @@ -119,12 +138,24 @@ static int led_post_bind(struct udevice *dev) static int led_post_probe(struct udevice *dev) { struct led_uc_plat *uc_plat = dev_get_uclass_plat(dev); + int default_period_ms = 1000; + int ret = 0; + + switch (uc_plat->default_state) { + case LEDST_ON: + case LEDST_OFF: + ret = led_set_state(dev, uc_plat->default_state); + break; + case LEDST_BLINK: + ret = led_set_period(dev, default_period_ms); + if (!ret) + ret = led_set_state(dev, uc_plat->default_state); + break; + default: + break; + } - if (uc_plat->default_state == LEDST_ON || - uc_plat->default_state == LEDST_OFF) - led_set_state(dev, uc_plat->default_state); - - return 0; + return ret; } UCLASS_DRIVER(led) = { diff --git a/drivers/led/led_sw_blink.c b/drivers/led/led_sw_blink.c new file mode 100644 index 00000000000..9e36edbee47 --- /dev/null +++ b/drivers/led/led_sw_blink.c @@ -0,0 +1,117 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Software blinking helpers + * Copyright (C) 2024 IOPSYS Software Solutions AB + * Author: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> + */ + +#include <dm.h> +#include <led.h> +#include <time.h> +#include <stdlib.h> + +#define CYCLIC_NAME_PREFIX "led_sw_blink_" + +static void led_sw_blink(struct cyclic_info *c) +{ + struct led_sw_blink *sw_blink; + struct udevice *dev; + struct led_ops *ops; + + sw_blink = container_of(c, struct led_sw_blink, cyclic); + dev = sw_blink->dev; + ops = led_get_ops(dev); + + switch (sw_blink->state) { + case LED_SW_BLINK_ST_OFF: + sw_blink->state = LED_SW_BLINK_ST_ON; + ops->set_state(dev, LEDST_ON); + break; + case LED_SW_BLINK_ST_ON: + sw_blink->state = LED_SW_BLINK_ST_OFF; + ops->set_state(dev, LEDST_OFF); + break; + case LED_SW_BLINK_ST_NOT_READY: + /* + * led_set_period has been called, but + * led_set_state(LDST_BLINK) has not yet, + * so doing nothing + */ + break; + default: + break; + } +} + +int led_sw_set_period(struct udevice *dev, int period_ms) +{ + struct led_uc_plat *uc_plat = dev_get_uclass_plat(dev); + struct led_sw_blink *sw_blink = uc_plat->sw_blink; + struct led_ops *ops = led_get_ops(dev); + int half_period_us; + + half_period_us = period_ms * 1000 / 2; + + if (!sw_blink) { + int len = sizeof(struct led_sw_blink) + + strlen(CYCLIC_NAME_PREFIX) + + strlen(uc_plat->label) + 1; + + sw_blink = calloc(1, len); + if (!sw_blink) + return -ENOMEM; + + sw_blink->dev = dev; + sw_blink->state = LED_SW_BLINK_ST_DISABLED; + strcpy((char *)sw_blink->cyclic_name, CYCLIC_NAME_PREFIX); + strcat((char *)sw_blink->cyclic_name, uc_plat->label); + + uc_plat->sw_blink = sw_blink; + } + + if (sw_blink->state == LED_SW_BLINK_ST_DISABLED) { + cyclic_register(&sw_blink->cyclic, led_sw_blink, + half_period_us, sw_blink->cyclic_name); + } else { + sw_blink->cyclic.delay_us = half_period_us; + sw_blink->cyclic.start_time_us = timer_get_us(); + } + + sw_blink->state = LED_SW_BLINK_ST_NOT_READY; + ops->set_state(dev, LEDST_OFF); + + return 0; +} + +bool led_sw_is_blinking(struct udevice *dev) +{ + struct led_uc_plat *uc_plat = dev_get_uclass_plat(dev); + struct led_sw_blink *sw_blink = uc_plat->sw_blink; + + if (!sw_blink) + return false; + + return sw_blink->state > LED_SW_BLINK_ST_NOT_READY; +} + +bool led_sw_on_state_change(struct udevice *dev, enum led_state_t state) +{ + struct led_uc_plat *uc_plat = dev_get_uclass_plat(dev); + struct led_sw_blink *sw_blink = uc_plat->sw_blink; + + if (!sw_blink || sw_blink->state == LED_SW_BLINK_ST_DISABLED) + return false; + + if (state == LEDST_BLINK) { + /* start blinking on next led_sw_blink() call */ + sw_blink->state = LED_SW_BLINK_ST_OFF; + return true; + } + + /* stop blinking */ + uc_plat->sw_blink = NULL; + cyclic_unregister(&sw_blink->cyclic); + free(sw_blink); + + return false; +} diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index b7bf7cc0893..b1af3f717d4 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -1698,7 +1698,7 @@ static int brcmnand_fill_dma_desc(struct brcmnand_host *host, desc->cmd_irq = (dma_cmd << 24) | (end ? (0x03 << 8) : 0) | /* IRQ | STOP */ (!!begin) | ((!!end) << 1); /* head, tail */ -#ifdef CONFIG_CPU_BIG_ENDIAN +#ifdef CONFIG_SYS_BIG_ENDIAN desc->cmd_irq |= 0x01 << 12; #endif desc->dram_addr = lower_32_bits(buf); diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c index 67ac86f82bc..43f0ec7637d 100644 --- a/drivers/net/dwc_eth_qos.c +++ b/drivers/net/dwc_eth_qos.c @@ -50,6 +50,7 @@ #include <asm/arch/clock.h> #include <asm/mach-imx/sys_proto.h> #endif +#include <linux/bitfield.h> #include <linux/delay.h> #include <linux/printk.h> @@ -146,6 +147,25 @@ static int eqos_mdio_wait_idle(struct eqos_priv *eqos) 1000000, true); } +/* Bitmask common for mdio_read and mdio_write */ +#define EQOS_MDIO_BITFIELD(pa, rda, cr) \ + FIELD_PREP(EQOS_MAC_MDIO_ADDRESS_PA_MASK, pa) | \ + FIELD_PREP(EQOS_MAC_MDIO_ADDRESS_RDA_MASK, rda) | \ + FIELD_PREP(EQOS_MAC_MDIO_ADDRESS_CR_MASK, cr) | \ + EQOS_MAC_MDIO_ADDRESS_GB + +static u32 eqos_mdio_bitfield(struct eqos_priv *eqos, int addr, int devad, int reg) +{ + int cr = eqos->config->config_mac_mdio; + bool c22 = devad == MDIO_DEVAD_NONE ? true : false; + + if (c22) + return EQOS_MDIO_BITFIELD(addr, reg, cr); + else + return EQOS_MDIO_BITFIELD(addr, devad, cr) | + EQOS_MAC_MDIO_ADDRESS_C45E; +} + static int eqos_mdio_read(struct mii_dev *bus, int mdio_addr, int mdio_devad, int mdio_reg) { @@ -163,15 +183,17 @@ static int eqos_mdio_read(struct mii_dev *bus, int mdio_addr, int mdio_devad, } val = readl(&eqos->mac_regs->mdio_address); - val &= EQOS_MAC_MDIO_ADDRESS_SKAP | - EQOS_MAC_MDIO_ADDRESS_C45E; - val |= (mdio_addr << EQOS_MAC_MDIO_ADDRESS_PA_SHIFT) | - (mdio_reg << EQOS_MAC_MDIO_ADDRESS_RDA_SHIFT) | - (eqos->config->config_mac_mdio << - EQOS_MAC_MDIO_ADDRESS_CR_SHIFT) | - (EQOS_MAC_MDIO_ADDRESS_GOC_READ << - EQOS_MAC_MDIO_ADDRESS_GOC_SHIFT) | - EQOS_MAC_MDIO_ADDRESS_GB; + val &= EQOS_MAC_MDIO_ADDRESS_SKAP; + + val |= eqos_mdio_bitfield(eqos, mdio_addr, mdio_devad, mdio_reg) | + FIELD_PREP(EQOS_MAC_MDIO_ADDRESS_GOC_MASK, + EQOS_MAC_MDIO_ADDRESS_GOC_READ); + + if (val & EQOS_MAC_MDIO_ADDRESS_C45E) { + writel(FIELD_PREP(EQOS_MAC_MDIO_DATA_RA_MASK, mdio_reg), + &eqos->mac_regs->mdio_data); + } + writel(val, &eqos->mac_regs->mdio_address); udelay(eqos->config->mdio_wait); @@ -194,7 +216,8 @@ static int eqos_mdio_write(struct mii_dev *bus, int mdio_addr, int mdio_devad, int mdio_reg, u16 mdio_val) { struct eqos_priv *eqos = bus->priv; - u32 val; + u32 v_addr; + u32 v_data; int ret; debug("%s(dev=%p, addr=%x, reg=%d, val=%x):\n", __func__, eqos->dev, @@ -206,20 +229,19 @@ static int eqos_mdio_write(struct mii_dev *bus, int mdio_addr, int mdio_devad, return ret; } - writel(mdio_val, &eqos->mac_regs->mdio_data); + v_addr = readl(&eqos->mac_regs->mdio_address); + v_addr &= EQOS_MAC_MDIO_ADDRESS_SKAP; - val = readl(&eqos->mac_regs->mdio_address); - val &= EQOS_MAC_MDIO_ADDRESS_SKAP | - EQOS_MAC_MDIO_ADDRESS_C45E; - val |= (mdio_addr << EQOS_MAC_MDIO_ADDRESS_PA_SHIFT) | - (mdio_reg << EQOS_MAC_MDIO_ADDRESS_RDA_SHIFT) | - (eqos->config->config_mac_mdio << - EQOS_MAC_MDIO_ADDRESS_CR_SHIFT) | - (EQOS_MAC_MDIO_ADDRESS_GOC_WRITE << - EQOS_MAC_MDIO_ADDRESS_GOC_SHIFT) | - EQOS_MAC_MDIO_ADDRESS_GB; - writel(val, &eqos->mac_regs->mdio_address); + v_addr |= eqos_mdio_bitfield(eqos, mdio_addr, mdio_devad, mdio_reg) | + FIELD_PREP(EQOS_MAC_MDIO_ADDRESS_GOC_MASK, + EQOS_MAC_MDIO_ADDRESS_GOC_WRITE); + + v_data = mdio_val; + if (v_addr & EQOS_MAC_MDIO_ADDRESS_C45E) + v_data |= FIELD_PREP(EQOS_MAC_MDIO_DATA_RA_MASK, mdio_reg); + writel(v_data, &eqos->mac_regs->mdio_data); + writel(v_addr, &eqos->mac_regs->mdio_address); udelay(eqos->config->mdio_wait); ret = eqos_mdio_wait_idle(eqos); diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h index 8b3d0d464d3..a06390a6982 100644 --- a/drivers/net/dwc_eth_qos.h +++ b/drivers/net/dwc_eth_qos.h @@ -79,19 +79,20 @@ struct eqos_mac_regs { #define EQOS_MAC_HW_FEATURE3_ASP_SHIFT 28 #define EQOS_MAC_HW_FEATURE3_ASP_MASK 0x3 -#define EQOS_MAC_MDIO_ADDRESS_PA_SHIFT 21 -#define EQOS_MAC_MDIO_ADDRESS_RDA_SHIFT 16 -#define EQOS_MAC_MDIO_ADDRESS_CR_SHIFT 8 +#define EQOS_MAC_MDIO_ADDRESS_PA_MASK GENMASK(25, 21) +#define EQOS_MAC_MDIO_ADDRESS_RDA_MASK GENMASK(20, 16) +#define EQOS_MAC_MDIO_ADDRESS_CR_MASK GENMASK(11, 8) #define EQOS_MAC_MDIO_ADDRESS_CR_100_150 1 #define EQOS_MAC_MDIO_ADDRESS_CR_20_35 2 #define EQOS_MAC_MDIO_ADDRESS_CR_250_300 5 #define EQOS_MAC_MDIO_ADDRESS_SKAP BIT(4) -#define EQOS_MAC_MDIO_ADDRESS_GOC_SHIFT 2 +#define EQOS_MAC_MDIO_ADDRESS_GOC_MASK GENMASK(3, 2) #define EQOS_MAC_MDIO_ADDRESS_GOC_READ 3 #define EQOS_MAC_MDIO_ADDRESS_GOC_WRITE 1 #define EQOS_MAC_MDIO_ADDRESS_C45E BIT(1) #define EQOS_MAC_MDIO_ADDRESS_GB BIT(0) +#define EQOS_MAC_MDIO_DATA_RA_MASK GENMASK(31, 16) #define EQOS_MAC_MDIO_DATA_GD_MASK 0xffff #define EQOS_MTL_REGS_BASE 0xd00 diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index ef9a1824b2b..45270e27184 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -13,6 +13,7 @@ #include <log.h> #include <ram.h> #include <regmap.h> +#include <spl.h> #include <syscon.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cru.h> @@ -63,8 +64,6 @@ struct chan_info { }; struct dram_info { -#if defined(CONFIG_TPL_BUILD) || \ - (!defined(CONFIG_TPL) && defined(CONFIG_SPL_BUILD)) u32 pwrup_srefresh_exit[2]; struct chan_info chan[2]; struct clk ddr_clk; @@ -75,7 +74,6 @@ struct dram_info { struct rk3399_pmusgrf_regs *pmusgrf; struct rk3399_ddr_cic_regs *cic; const struct sdram_rk3399_ops *ops; -#endif struct ram_info info; struct rk3399_pmugrf_regs *pmugrf; }; @@ -92,9 +90,6 @@ struct sdram_rk3399_ops { struct rk3399_sdram_params *params); }; -#if defined(CONFIG_TPL_BUILD) || \ - (!defined(CONFIG_TPL) && defined(CONFIG_SPL_BUILD)) - struct rockchip_dmc_plat { #if CONFIG_IS_ENABLED(OF_PLATDATA) struct dtd_rockchip_rk3399_dmc dtplat; @@ -191,6 +186,19 @@ struct io_setting { }, }; +/** + * phase_sdram_init() - Check if this is the phase where SDRAM init happens + * + * Returns: true to do SDRAM init in this phase, false to not + */ +static bool phase_sdram_init(void) +{ + return spl_phase() == PHASE_TPL || + (!IS_ENABLED(CONFIG_TPL) && + !IS_ENABLED(CONFIG_ROCKCHIP_EXTERNAL_TPL) && + !spl_in_proper()); +} + static struct io_setting * lpddr4_get_io_settings(const struct rk3399_sdram_params *params, u32 mr5) { @@ -3021,12 +3029,13 @@ static int sdram_init(struct dram_info *dram, static int rk3399_dmc_of_to_plat(struct udevice *dev) { - struct rockchip_dmc_plat *plat = dev_get_plat(dev); + struct rockchip_dmc_plat *plat; int ret; - if (!CONFIG_IS_ENABLED(OF_REAL)) + if (!CONFIG_IS_ENABLED(OF_REAL) || !phase_sdram_init()) return 0; + plat = dev_get_plat(dev); ret = dev_read_u32_array(dev, "rockchip,sdram-params", (u32 *)&plat->sdram_params, sizeof(plat->sdram_params) / sizeof(u32)); @@ -3093,7 +3102,6 @@ static int rk3399_dmc_init(struct udevice *dev) priv->cic = syscon_get_first_range(ROCKCHIP_SYSCON_CIC); priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); priv->pmu = syscon_get_first_range(ROCKCHIP_SYSCON_PMU); - priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); priv->pmusgrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUSGRF); priv->pmucru = rockchip_get_pmucru(); priv->cru = rockchip_get_cru(); @@ -3138,23 +3146,26 @@ static int rk3399_dmc_init(struct udevice *dev) return 0; } -#endif static int rk3399_dmc_probe(struct udevice *dev) { -#if defined(CONFIG_TPL_BUILD) || \ - (!defined(CONFIG_TPL) && defined(CONFIG_SPL_BUILD)) - if (rk3399_dmc_init(dev)) - return 0; -#else struct dram_info *priv = dev_get_priv(dev); priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); debug("%s: pmugrf = %p\n", __func__, priv->pmugrf); - priv->info.base = CFG_SYS_SDRAM_BASE; - priv->info.size = - rockchip_sdram_size((phys_addr_t)&priv->pmugrf->os_reg2); -#endif + if (phase_sdram_init() && rk3399_dmc_init(dev)) + return 0; + + /* + * There is no point in checking the SDRAM size in TPL as it is not + * used, so avoid the code size increment. + */ + if (!IS_ENABLED(CONFIG_TPL_BUILD)) { + priv->info.base = CFG_SYS_SDRAM_BASE; + priv->info.size = rockchip_sdram_size( + (phys_addr_t)&priv->pmugrf->os_reg2); + } + return 0; } @@ -3181,10 +3192,7 @@ U_BOOT_DRIVER(dmc_rk3399) = { .id = UCLASS_RAM, .of_match = rk3399_dmc_ids, .ops = &rk3399_dmc_ops, -#if defined(CONFIG_TPL_BUILD) || \ - (!defined(CONFIG_TPL) && defined(CONFIG_SPL_BUILD)) .of_to_plat = rk3399_dmc_of_to_plat, -#endif .probe = rk3399_dmc_probe, .priv_auto = sizeof(struct dram_info), #if defined(CONFIG_TPL_BUILD) || \ diff --git a/drivers/serial/sandbox.c b/drivers/serial/sandbox.c index ec0068e33d3..77a1558db68 100644 --- a/drivers/serial/sandbox.c +++ b/drivers/serial/sandbox.c @@ -138,8 +138,6 @@ static int sandbox_serial_pending(struct udevice *dev, bool input) return 0; os_usleep(100); - if (IS_ENABLED(CONFIG_VIDEO) && !IS_ENABLED(CONFIG_SPL_BUILD)) - video_sync_all(); avail = membuff_putraw(&priv->buf, 100, false, &data); if (!avail) return 1; /* buffer full */ diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 7808ae7919e..6e79694fd19 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -7,6 +7,7 @@ menu "Graphics support" config VIDEO bool "Enable driver model support for LCD/video" depends on DM + imply CYCLIC help This enables driver model for LCD and video devices. These support a bitmap display of various sizes and depths which can be drawn on @@ -14,6 +15,11 @@ config VIDEO option compiles in the video uclass and routes all LCD/video access through this. + If CYCLIC is enabled (which it is by default), the cyclic subsystem + is used to flush pending output to the display periodically, rather + than this happening with every chunk of output. This allows for more + efficient operation and faster display output. + if VIDEO config VIDEO_FONT_4X6 @@ -232,6 +238,35 @@ config NO_FB_CLEAR loads takes over the screen. This, for example, can be used to keep splash image on screen until grub graphical boot menu starts. +config VIDEO_SYNC_MS + int "Video-sync period in milliseconds for foreground processing" + default 300 if SANDBOX + default 100 + help + This sets the requested, maximum time before a video sync will take + place, in milliseconds. Note that the time between video syncs + may be longer than this, since syncs only happen when the video system + is used, e.g. by outputting a character to the console. + + It may also be shorter, since the video uclass will automatically + force a sync in certain situations. + + Many video-output systems require a sync operation before any output + is visible. This may flush the CPU cache or perhaps copy the + display contents to a hardware framebuffer. Without this, change to + the video may never be displayed. + +config VIDEO_SYNC_CYCLIC_MS + int "Video-sync period in milliseconds for cyclic processing" + depends on CYCLIC + default 100 if SANDBOX + default 10 + help + This sets the frequency of cyclic video syncs. The cyclic system is + used to ensure that when U-Boot is idle, it syncs the video. This + improves the responsiveness of the command line to new characters + being entered. + config PANEL bool "Enable panel uclass support" default y diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c index ff1382f4a43..a5aa8dd5295 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c @@ -8,6 +8,7 @@ #include <bloblist.h> #include <console.h> #include <cpu_func.h> +#include <cyclic.h> #include <dm.h> #include <log.h> #include <malloc.h> @@ -52,6 +53,8 @@ */ DECLARE_GLOBAL_DATA_PTR; +struct cyclic_info; + /** * struct video_uc_priv - Information for the video uclass * @@ -60,9 +63,12 @@ DECLARE_GLOBAL_DATA_PTR; * available address to use for a device's framebuffer. It starts at * gd->video_top and works downwards, running out of space when it hits * gd->video_bottom. + * @cyc: handle for cyclic-execution function, or NULL if none */ struct video_uc_priv { ulong video_ptr; + bool cyc_active; + struct cyclic_info cyc; }; /** struct vid_rgb - Describes a video colour */ @@ -349,6 +355,7 @@ void video_set_default_colors(struct udevice *dev, bool invert) /* Flush video activity to the caches */ int video_sync(struct udevice *vid, bool force) { + struct video_priv *priv = dev_get_uclass_priv(vid); struct video_ops *ops = video_get_ops(vid); int ret; @@ -358,28 +365,26 @@ int video_sync(struct udevice *vid, bool force) return ret; } + if (CONFIG_IS_ENABLED(CYCLIC) && !force && + get_timer(priv->last_sync) < CONFIG_VIDEO_SYNC_MS) + return 0; + /* * flush_dcache_range() is declared in common.h but it seems that some * architectures do not actually implement it. Is there a way to find * out whether it exists? For now, ARM is safe. */ #if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) - struct video_priv *priv = dev_get_uclass_priv(vid); - if (priv->flush_dcache) { flush_dcache_range((ulong)priv->fb, ALIGN((ulong)priv->fb + priv->fb_size, CONFIG_SYS_CACHELINE_SIZE)); } #elif defined(CONFIG_VIDEO_SANDBOX_SDL) - struct video_priv *priv = dev_get_uclass_priv(vid); - static ulong last_sync; - - if (force || get_timer(last_sync) > 100) { - sandbox_sdl_sync(priv->fb); - last_sync = get_timer(0); - } + sandbox_sdl_sync(priv->fb); #endif + priv->last_sync = get_timer(0); + return 0; } @@ -528,10 +533,16 @@ int video_default_font_height(struct udevice *dev) return vc_priv->y_charsize; } +static void video_idle(struct cyclic_info *cyc) +{ + video_sync_all(); +} + /* Set up the display ready for use */ static int video_post_probe(struct udevice *dev) { struct video_uc_plat *plat = dev_get_uclass_plat(dev); + struct video_uc_priv *uc_priv = uclass_get_priv(dev->uclass); struct video_priv *priv = dev_get_uclass_priv(dev); char name[30], drv[15], *str; const char *drv_name = drv; @@ -622,6 +633,16 @@ static int video_post_probe(struct udevice *dev) } } + /* register cyclic as soon as the first video device is probed */ + if (CONFIG_IS_ENABLED(CYCLIC) && (gd->flags && GD_FLG_RELOC) && + !uc_priv->cyc_active) { + uint ms = CONFIG_IF_ENABLED_INT(CYCLIC, VIDEO_SYNC_CYCLIC_MS); + + cyclic_register(&uc_priv->cyc, video_idle, ms * 1000, + "video_init"); + uc_priv->cyc_active = true; + } + return 0; }; @@ -661,6 +682,18 @@ static int video_post_bind(struct udevice *dev) return 0; } +__maybe_unused static int video_destroy(struct uclass *uc) +{ + struct video_uc_priv *uc_priv = uclass_get_priv(uc); + + if (uc_priv->cyc_active) { + cyclic_unregister(&uc_priv->cyc); + uc_priv->cyc_active = false; + } + + return 0; +} + UCLASS_DRIVER(video) = { .id = UCLASS_VIDEO, .name = "video", @@ -670,4 +703,5 @@ UCLASS_DRIVER(video) = { .priv_auto = sizeof(struct video_uc_priv), .per_device_auto = sizeof(struct video_priv), .per_device_plat_auto = sizeof(struct video_uc_plat), + CONFIG_IS_ENABLED(CYCLIC, (.destroy = video_destroy, )) }; diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 8318fd77a32..0c3e9913318 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -4,6 +4,7 @@ config WATCHDOG bool "Enable U-Boot watchdog reset" depends on !HW_WATCHDOG select CYCLIC + imply SPL_CYCLIC if SPL help This option enables U-Boot watchdog support where U-Boot is using watchdog_reset function to service watchdog device in U-Boot. Enable @@ -408,6 +409,7 @@ config WDT_ARM_SMC config SPL_WDT bool "Enable driver model for watchdog timer drivers in SPL" depends on SPL_DM + select SPL_CYCLIC if CYCLIC help Enable driver model for watchdog timer in SPL. This is similar to CONFIG_WDT in U-Boot. diff --git a/dts/update-dts-subtree.sh b/dts/update-dts-subtree.sh deleted file mode 100755 index a57b78a41d3..00000000000 --- a/dts/update-dts-subtree.sh +++ /dev/null @@ -1,48 +0,0 @@ -#!/bin/sh -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright 2024 Linaro Ltd. -# -# Usage: from the top level U-Boot source tree, run: -# $ ./dts/update-dts-subtree.sh pull <release-tag> -# $ ./dts/update-dts-subtree.sh pick <commit-id> -# -# The script will pull changes from devicetree-rebasing repo into U-Boot -# as a subtree located as <U-Boot>/dts/upstream sub-directory. It will -# automatically create a squash/merge commit listing the commits imported. - -set -e - -merge_commit_msg=$(cat << EOF -Subtree merge tag '$2' of devicetree-rebasing repo [1] into dts/upstream - -[1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git/ -EOF -) - -remote_add_and_fetch() { - if ! git remote get-url devicetree-rebasing 2>/dev/null - then - echo "Warning: Script automatically adds new git remote via:" - echo " git remote add devicetree-rebasing \\" - echo " https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git" - git remote add devicetree-rebasing \ - https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git - fi - git fetch devicetree-rebasing master -} - -if [ "$1" = "pull" ] -then - remote_add_and_fetch - git subtree pull --prefix dts/upstream devicetree-rebasing \ - "$2" --squash -m "${merge_commit_msg}" -elif [ "$1" = "pick" ] -then - remote_add_and_fetch - git cherry-pick -x --strategy=subtree -Xsubtree=dts/upstream/ "$2" -else - echo "usage: $0 <op> <ref>" - echo " <op> pull or pick" - echo " <ref> release tag [pull] or commit id [pick]" -fi diff --git a/env/mmc.c b/env/mmc.c index 776df0786be..0338aa6c56a 100644 --- a/env/mmc.c +++ b/env/mmc.c @@ -110,8 +110,9 @@ static inline s64 mmc_offset(struct mmc *mmc, int copy) int hwpart = 0; int err; - if (IS_ENABLED(CONFIG_SYS_MMC_ENV_PART)) - hwpart = mmc_get_env_part(mmc); +#if defined(CONFIG_SYS_MMC_ENV_PART) + hwpart = mmc_get_env_part(mmc); +#endif #if defined(CONFIG_ENV_MMC_PARTITION) str = CONFIG_ENV_MMC_PARTITION; diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h index aa336d63e3a..27aa75e7036 100644 --- a/include/asm-generic/global_data.h +++ b/include/asm-generic/global_data.h @@ -481,7 +481,7 @@ struct global_data { */ struct event_state event_state; #endif -#ifdef CONFIG_CYCLIC +#if CONFIG_IS_ENABLED(CYCLIC) /** * @cyclic_list: list of registered cyclic functions */ diff --git a/include/clk.h b/include/clk.h index af23e4f3475..045e923a529 100644 --- a/include/clk.h +++ b/include/clk.h @@ -444,7 +444,7 @@ ulong clk_get_rate(struct clk *clk); struct clk *clk_get_parent(struct clk *clk); /** - * clk_get_parent_rate() - Get parent of current clock rate. + * clk_get_parent_rate() - Get rate of current clock's parent. * @clk: A clock struct that was previously successfully requested by * clk_request/get_by_*(). * diff --git a/include/cpu.h b/include/cpu.h index 2077ff30634..0018910d61f 100644 --- a/include/cpu.h +++ b/include/cpu.h @@ -102,6 +102,15 @@ struct cpu_ops { * if not. */ int (*is_current)(struct udevice *dev); + + /** + * release_core() - Relase a CPU core to the given address to run application + * + * @dev: Device to check (UCLASS_CPU) + * @addr: Address to relese the CPU core + * @return 0 if OK, -ve on error + */ + int (*release_core)(const struct udevice *dev, phys_addr_t addr); }; #define cpu_get_ops(dev) ((struct cpu_ops *)(dev)->driver->ops) @@ -164,4 +173,10 @@ int cpu_is_current(struct udevice *cpu); */ struct udevice *cpu_get_current_dev(void); +/** + * cpu_release_core() - Relase a CPU core to the given address to run application + * + * @return 0 if OK, -ve on error + */ +int cpu_release_core(const struct udevice *dev, phys_addr_t addr); #endif diff --git a/include/cyclic.h b/include/cyclic.h index 2c3d383c5ef..cd95b691d48 100644 --- a/include/cyclic.h +++ b/include/cyclic.h @@ -46,7 +46,8 @@ struct cyclic_info { /** Function type for cyclic functions */ typedef void (*cyclic_func_t)(struct cyclic_info *c); -#if defined(CONFIG_CYCLIC) +#if CONFIG_IS_ENABLED(CYCLIC) + /** * cyclic_register - Register a new cyclic function * @@ -123,6 +124,6 @@ static inline int cyclic_unregister_all(void) { return 0; } -#endif +#endif /* CYCLIC */ #endif diff --git a/include/dm/util.h b/include/dm/util.h index 95c3527a37c..ec518c51d93 100644 --- a/include/dm/util.h +++ b/include/dm/util.h @@ -17,14 +17,6 @@ struct dm_stats; struct list_head; /** - * list_count_items() - Count number of items in a list - * - * @param head: Head of list - * Return: number of items, or 0 if empty - */ -int list_count_items(struct list_head *head); - -/** * Dump out a tree of all devices starting @uclass * * @dev_name: udevice name diff --git a/include/led.h b/include/led.h index a6353166289..99f93c5ef86 100644 --- a/include/led.h +++ b/include/led.h @@ -7,19 +7,34 @@ #ifndef __LED_H #define __LED_H +#include <stdbool.h> +#include <cyclic.h> + struct udevice; enum led_state_t { LEDST_OFF = 0, LEDST_ON = 1, LEDST_TOGGLE, -#ifdef CONFIG_LED_BLINK LEDST_BLINK, -#endif LEDST_COUNT, }; +enum led_sw_blink_state_t { + LED_SW_BLINK_ST_DISABLED, + LED_SW_BLINK_ST_NOT_READY, + LED_SW_BLINK_ST_OFF, + LED_SW_BLINK_ST_ON, +}; + +struct led_sw_blink { + enum led_sw_blink_state_t state; + struct udevice *dev; + struct cyclic_info cyclic; + const char cyclic_name[0]; +}; + /** * struct led_uc_plat - Platform data the uclass stores about each device * @@ -29,6 +44,9 @@ enum led_state_t { struct led_uc_plat { const char *label; enum led_state_t default_state; +#ifdef CONFIG_LED_SW_BLINK + struct led_sw_blink *sw_blink; +#endif }; /** @@ -118,4 +136,9 @@ int led_set_period(struct udevice *dev, int period_ms); */ int led_bind_generic(struct udevice *parent, const char *driver_name); +/* Internal functions for software blinking. Do not use them in your code */ +int led_sw_set_period(struct udevice *dev, int period_ms); +bool led_sw_is_blinking(struct udevice *dev); +bool led_sw_on_state_change(struct udevice *dev, enum led_state_t state); + #endif diff --git a/include/linux/list.h b/include/linux/list.h index 6910721c005..0f9d939b05f 100644 --- a/include/linux/list.h +++ b/include/linux/list.h @@ -547,6 +547,21 @@ static inline void list_splice_tail_init(struct list_head *list, &pos->member != (head); \ pos = n, n = list_entry(n->member.prev, typeof(*n), member)) +/** + * list_count_nodes - count nodes in the list + * @head: the head for your list. + */ +static inline size_t list_count_nodes(struct list_head *head) +{ + struct list_head *pos; + size_t count = 0; + + list_for_each(pos, head) + count++; + + return count; +} + /* * Double linked lists with a single pointer list head. * Mostly useful for hash tables where the two pointer list head is diff --git a/include/smbios.h b/include/smbios.h index a4fda9df7bd..00119d7a60c 100644 --- a/include/smbios.h +++ b/include/smbios.h @@ -105,6 +105,7 @@ struct __packed smbios_type0 { u8 bios_minor_release; u8 ec_major_release; u8 ec_minor_release; + u16 extended_bios_rom_size; char eos[SMBIOS_STRUCT_EOS_BYTES]; }; diff --git a/include/video.h b/include/video.h index 4d8df9baaad..4013a949983 100644 --- a/include/video.h +++ b/include/video.h @@ -97,6 +97,7 @@ enum video_format { * the LCD is updated * @fg_col_idx: Foreground color code (bit 3 = bold, bit 0-2 = color) * @bg_col_idx: Background color code (bit 3 = bold, bit 0-2 = color) + * @last_sync: Monotonic time of last video sync */ struct video_priv { /* Things set up by the driver: */ @@ -121,6 +122,7 @@ struct video_priv { bool flush_dcache; u8 fg_col_idx; u8 bg_col_idx; + ulong last_sync; }; /** diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig index 38e64af2531..1179c31bb13 100644 --- a/lib/efi_loader/Kconfig +++ b/lib/efi_loader/Kconfig @@ -220,6 +220,7 @@ config EFI_CAPSULE_ON_DISK config EFI_IGNORE_OSINDICATIONS bool "Ignore OsIndications for CapsuleUpdate on-disk" depends on EFI_CAPSULE_ON_DISK + default y if !EFI_RT_VOLATILE_STORE help There are boards where U-Boot does not support SetVariable at runtime. Select this option if you want to use the capsule-on-disk feature @@ -486,6 +487,7 @@ config EFI_ECPT config EFI_EBBR_2_1_CONFORMANCE bool "Add the EBBRv2.1 conformance entry to the ECPT table" + depends on BOOTMETH_EFI_BOOTMGR depends on EFI_ECPT depends on EFI_LOADER_HII depends on EFI_RISCV_BOOT_PROTOCOL || !RISCV diff --git a/lib/efi_loader/efi_fdt.c b/lib/efi_loader/efi_fdt.c index 4ccf2055be3..c5ecade3aeb 100644 --- a/lib/efi_loader/efi_fdt.c +++ b/lib/efi_loader/efi_fdt.c @@ -43,6 +43,9 @@ int efi_get_distro_fdt_name(char *fname, int size, int seq) case 2: prefix = "/dtb/current"; break; + case 3: + prefix = "/dtbs"; + break; default: return log_msg_ret("pref", -EINVAL); } diff --git a/lib/efi_loader/efi_helper.c b/lib/efi_loader/efi_helper.c index 348612c3dad..65d2116381a 100644 --- a/lib/efi_loader/efi_helper.c +++ b/lib/efi_loader/efi_helper.c @@ -133,7 +133,7 @@ efi_status_t efi_load_option_dp_join(struct efi_device_path **dp, *dp = efi_dp_concat(tmp_dp, fdt_dp, *dp_size); efi_free_pool(tmp_dp); - if (!dp) + if (!*dp) return EFI_OUT_OF_RESOURCES; *dp_size += efi_dp_size(fdt_dp) + sizeof(END); } diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c index 12cf23fa3fa..c6f1dd09456 100644 --- a/lib/efi_loader/efi_memory.c +++ b/lib/efi_loader/efi_memory.c @@ -127,7 +127,7 @@ static uint64_t desc_get_end(struct efi_mem_desc *desc) */ static void efi_mem_sort(void) { - struct list_head *lhandle; + struct efi_mem_list *lmem; struct efi_mem_list *prevmem = NULL; bool merge_again = true; @@ -136,19 +136,18 @@ static void efi_mem_sort(void) /* Now merge entries that can be merged */ while (merge_again) { merge_again = false; - list_for_each(lhandle, &efi_mem) { - struct efi_mem_list *lmem; - struct efi_mem_desc *prev = &prevmem->desc; + list_for_each_entry(lmem, &efi_mem, link) { + struct efi_mem_desc *prev; struct efi_mem_desc *cur; uint64_t pages; - lmem = list_entry(lhandle, struct efi_mem_list, link); if (!prevmem) { prevmem = lmem; continue; } cur = &lmem->desc; + prev = &prevmem->desc; if ((desc_get_end(cur) == prev->physical_start) && (prev->type == cur->type) && @@ -268,7 +267,7 @@ static efi_status_t efi_add_memory_map_pg(u64 start, u64 pages, int memory_type, bool overlap_only_ram) { - struct list_head *lhandle; + struct efi_mem_list *lmem; struct efi_mem_list *newlist; bool carve_again; uint64_t carved_pages = 0; @@ -308,11 +307,9 @@ static efi_status_t efi_add_memory_map_pg(u64 start, u64 pages, /* Add our new map */ do { carve_again = false; - list_for_each(lhandle, &efi_mem) { - struct efi_mem_list *lmem; + list_for_each_entry(lmem, &efi_mem, link) { s64 r; - lmem = list_entry(lhandle, struct efi_mem_list, link); r = efi_mem_carve_out(lmem, &newlist->desc, overlap_only_ram); switch (r) { @@ -444,7 +441,7 @@ static efi_status_t efi_check_allocated(u64 addr, bool must_be_allocated) */ static uint64_t efi_find_free_memory(uint64_t len, uint64_t max_addr) { - struct list_head *lhandle; + struct efi_mem_list *lmem; /* * Prealign input max address, so we simplify our matching @@ -452,9 +449,7 @@ static uint64_t efi_find_free_memory(uint64_t len, uint64_t max_addr) */ max_addr &= ~EFI_PAGE_MASK; - list_for_each(lhandle, &efi_mem) { - struct efi_mem_list *lmem = list_entry(lhandle, - struct efi_mem_list, link); + list_for_each_entry(lmem, &efi_mem, link) { struct efi_mem_desc *desc = &lmem->desc; uint64_t desc_len = desc->num_pages << EFI_PAGE_SHIFT; uint64_t desc_end = desc->physical_start + desc_len; @@ -742,9 +737,9 @@ efi_status_t efi_get_memory_map(efi_uintn_t *memory_map_size, efi_uintn_t *descriptor_size, uint32_t *descriptor_version) { + size_t map_entries; efi_uintn_t map_size = 0; - int map_entries = 0; - struct list_head *lhandle; + struct efi_mem_list *lmem; efi_uintn_t provided_map_size; if (!memory_map_size) @@ -752,8 +747,7 @@ efi_status_t efi_get_memory_map(efi_uintn_t *memory_map_size, provided_map_size = *memory_map_size; - list_for_each(lhandle, &efi_mem) - map_entries++; + map_entries = list_count_nodes(&efi_mem); map_size = map_entries * sizeof(struct efi_mem_desc); @@ -774,10 +768,7 @@ efi_status_t efi_get_memory_map(efi_uintn_t *memory_map_size, /* Copy list into array */ /* Return the list in ascending order */ memory_map = &memory_map[map_entries - 1]; - list_for_each(lhandle, &efi_mem) { - struct efi_mem_list *lmem; - - lmem = list_entry(lhandle, struct efi_mem_list, link); + list_for_each_entry(lmem, &efi_mem, link) { *memory_map = lmem->desc; memory_map--; } diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 5b3b26df968..6865f78c70d 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -1668,8 +1668,16 @@ int fdtdec_setup(void) { int ret = -ENOENT; - /* If allowing a bloblist, check that first */ - if (CONFIG_IS_ENABLED(BLOBLIST)) { + /* + * If allowing a bloblist, check that first. There was discussion about + * adding an OF_BLOBLIST Kconfig, but this was rejected. + * + * The necessary test is whether the previous phase passed a bloblist, + * not whether this phase creates one. + */ + if (CONFIG_IS_ENABLED(BLOBLIST) && + (spl_prev_phase() != PHASE_TPL || + !IS_ENABLED(CONFIG_TPL_BLOBLIST))) { ret = bloblist_maybe_init(); if (!ret) { gd->fdt_blob = bloblist_find(BLOBLISTT_CONTROL_FDT, 0); diff --git a/lib/smbios.c b/lib/smbios.c index 4126466e34a..7c24ea129eb 100644 --- a/lib/smbios.c +++ b/lib/smbios.c @@ -22,6 +22,7 @@ #include <cpu.h> #include <dm/uclass-internal.h> #endif +#include <linux/sizes.h> /* Safeguard for checking that U_BOOT_VERSION_NUM macros are compatible with U_BOOT_DMI */ #if U_BOOT_VERSION_NUM < 2000 || U_BOOT_VERSION_NUM > 2099 || \ @@ -348,7 +349,13 @@ static int smbios_write_type0(ulong *current, int handle, #endif t->bios_release_date = smbios_add_prop(ctx, NULL, U_BOOT_DMI_DATE); #ifdef CONFIG_ROM_SIZE - t->bios_rom_size = (CONFIG_ROM_SIZE / 65536) - 1; + if (CONFIG_ROM_SIZE < SZ_16M) { + t->bios_rom_size = (CONFIG_ROM_SIZE / 65536) - 1; + } else { + /* CONFIG_ROM_SIZE < 8 GiB */ + t->bios_rom_size = 0xff; + t->extended_bios_rom_size = CONFIG_ROM_SIZE >> 20; + } #endif t->bios_characteristics = BIOS_CHARACTERISTICS_PCI_SUPPORTED | BIOS_CHARACTERISTICS_SELECTABLE_BOOT | diff --git a/net/eth_internal.h b/net/eth_internal.h index 0b829a8d388..cb302c157b5 100644 --- a/net/eth_internal.h +++ b/net/eth_internal.h @@ -11,22 +11,6 @@ /* Do init that is common to driver model and legacy networking */ void eth_common_init(void); -/** - * eth_env_set_enetaddr_by_index() - set the MAC address environment variable - * - * This sets up an environment variable with the given MAC address (@enetaddr). - * The environment variable to be set is defined by <@base_name><@index>addr. - * If @index is 0 it is omitted. For common Ethernet this means ethaddr, - * eth1addr, etc. - * - * @base_name: Base name for variable, typically "eth" - * @index: Index of interface being updated (>=0) - * @enetaddr: Pointer to MAC address to put into the variable - * Return: 0 if OK, other value on error - */ -int eth_env_set_enetaddr_by_index(const char *base_name, int index, - uchar *enetaddr); - int eth_mac_skip(int index); void eth_current_changed(void); void eth_set_dev(struct udevice *dev); diff --git a/net/tftp.c b/net/tftp.c index 65c39d7fb70..2e073183d5a 100644 --- a/net/tftp.c +++ b/net/tftp.c @@ -493,8 +493,15 @@ static void tftp_handler(uchar *pkt, unsigned dest, struct in_addr sip, tftp_prev_block = tftp_cur_block; tftp_cur_block = (unsigned short)(block + 1); update_block_number(); - if (ack_ok) + if (ack_ok) { + if (block == 0 && + tftp_state == STATE_SEND_WRQ){ + /* connection's first ACK */ + tftp_state = STATE_DATA; + tftp_remote_port = src; + } tftp_send(); /* Send next data block */ + } } } #endif diff --git a/scripts/Makefile.build b/scripts/Makefile.build index 97dd4a64f6e..99cc29595b4 100644 --- a/scripts/Makefile.build +++ b/scripts/Makefile.build @@ -224,7 +224,7 @@ recordmcount_source := $(srctree)/scripts/recordmcount.c \ $(srctree)/scripts/recordmcount.h else sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \ - "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \ + "$(if $(CONFIG_SYS_BIG_ENDIAN),big,little)" \ "$(if $(CONFIG_64BIT),64,32)" \ "$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS)" \ "$(LD) $(KBUILD_LDFLAGS)" "$(NM)" "$(RM)" "$(MV)" \ diff --git a/test/dm/bus.c b/test/dm/bus.c index a338c7f567c..95326f23dad 100644 --- a/test/dm/bus.c +++ b/test/dm/bus.c @@ -14,6 +14,7 @@ #include <dm/test.h> #include <dm/uclass-internal.h> #include <dm/util.h> +#include <linux/list.h> #include <test/test.h> #include <test/ut.h> @@ -27,14 +28,14 @@ static int dm_test_bus_children(struct unit_test_state *uts) struct uclass *uc; ut_assertok(uclass_get(UCLASS_TEST_FDT, &uc)); - ut_asserteq(num_devices, list_count_items(&uc->dev_head)); + ut_asserteq(num_devices, list_count_nodes(&uc->dev_head)); /* Probe the bus, which should yield 3 more devices */ ut_assertok(uclass_get_device(UCLASS_TEST_BUS, 0, &bus)); num_devices += 3; ut_assertok(uclass_get(UCLASS_TEST_FDT, &uc)); - ut_asserteq(num_devices, list_count_items(&uc->dev_head)); + ut_asserteq(num_devices, list_count_nodes(&uc->dev_head)); ut_assert(!dm_check_devices(uts, num_devices)); diff --git a/test/dm/core.c b/test/dm/core.c index dbad1b317db..5bc5e8e82ec 100644 --- a/test/dm/core.c +++ b/test/dm/core.c @@ -16,6 +16,7 @@ #include <dm/util.h> #include <dm/test.h> #include <dm/uclass-internal.h> +#include <linux/list.h> #include <test/test.h> #include <test/ut.h> @@ -123,15 +124,15 @@ static int dm_test_autobind(struct unit_test_state *uts) * device with no children. */ ut_assert(uts->root); - ut_asserteq(1, list_count_items(gd->uclass_root)); - ut_asserteq(0, list_count_items(&gd->dm_root->child_head)); + ut_asserteq(1, list_count_nodes(gd->uclass_root)); + ut_asserteq(0, list_count_nodes(&gd->dm_root->child_head)); ut_asserteq(0, dm_testdrv_op_count[DM_TEST_OP_POST_BIND]); ut_assertok(dm_scan_plat(false)); /* We should have our test class now at least, plus more children */ - ut_assert(1 < list_count_items(gd->uclass_root)); - ut_assert(0 < list_count_items(&gd->dm_root->child_head)); + ut_assert(1 < list_count_nodes(gd->uclass_root)); + ut_assert(0 < list_count_nodes(&gd->dm_root->child_head)); /* Our 3 dm_test_infox children should be bound to the test uclass */ ut_asserteq(3, dm_testdrv_op_count[DM_TEST_OP_POST_BIND]); diff --git a/test/dm/cpu.c b/test/dm/cpu.c index acba8105996..8af25316cea 100644 --- a/test/dm/cpu.c +++ b/test/dm/cpu.c @@ -43,6 +43,8 @@ static int dm_test_cpu(struct unit_test_state *uts) ut_assertok(cpu_get_vendor(dev, text, sizeof(text))); ut_assertok(strcmp(text, "Languid Example Garbage Inc.")); + ut_assertok(cpu_release_core(dev, 0)); + return 0; } diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c index 18c89eef43f..31effff59c2 100644 --- a/test/dm/test-fdt.c +++ b/test/dm/test-fdt.c @@ -19,6 +19,7 @@ #include <dm/util.h> #include <dm/of_access.h> #include <linux/ioport.h> +#include <linux/list.h> #include <test/test.h> #include <test/ut.h> @@ -162,7 +163,7 @@ static int dm_test_fdt(struct unit_test_state *uts) ut_assert(!ret); /* These are num_devices compatible root-level device tree nodes */ - ut_asserteq(num_devices, list_count_items(&uc->dev_head)); + ut_asserteq(num_devices, list_count_nodes(&uc->dev_head)); /* Each should have platform data but no private data */ for (i = 0; i < num_devices; i++) { @@ -217,7 +218,7 @@ static int dm_test_fdt_pre_reloc(struct unit_test_state *uts) * one with "bootph-all" property (a-test node), and the other * one whose driver marked with DM_FLAG_PRE_RELOC flag (h-test node). */ - ut_asserteq(2, list_count_items(&uc->dev_head)); + ut_asserteq(2, list_count_nodes(&uc->dev_head)); return 0; } diff --git a/tools/binman/btool/mkeficapsule.py b/tools/binman/btool/mkeficapsule.py index ef1da638df1..f7e5a886849 100644 --- a/tools/binman/btool/mkeficapsule.py +++ b/tools/binman/btool/mkeficapsule.py @@ -33,7 +33,8 @@ class Bintoolmkeficapsule(bintool.Bintool): commandline, or through a config file. """ def __init__(self, name): - super().__init__(name, 'mkeficapsule tool for generating capsules') + super().__init__(name, 'mkeficapsule tool for generating capsules', + r'mkeficapsule version (.*)') def generate_capsule(self, image_index, image_guid, hardware_instance, payload, output_fname, priv_key, pub_key, diff --git a/tools/binman/etype/efi_capsule.py b/tools/binman/etype/efi_capsule.py index 751f654bf31..5941545d0b2 100644 --- a/tools/binman/etype/efi_capsule.py +++ b/tools/binman/etype/efi_capsule.py @@ -148,8 +148,11 @@ class Entry_efi_capsule(Entry_section): self.fw_version, self.oem_flags) if ret is not None: - os.remove(payload) return tools.read_file(capsule_fname) + else: + # Bintool is missing; just use the input data as the output + self.record_missing_bintool(self.mkeficapsule) + return data def AddBintools(self, btools): self.mkeficapsule = self.AddBintool(btools, 'mkeficapsule') diff --git a/tools/mkeficapsule.c b/tools/mkeficapsule.c index 6a261ff549d..f28008a0829 100644 --- a/tools/mkeficapsule.c +++ b/tools/mkeficapsule.c @@ -21,6 +21,8 @@ #include <gnutls/pkcs7.h> #include <gnutls/abstract.h> +#include <version.h> + #include "eficapsule.h" static const char *tool_name = "mkeficapsule"; @@ -28,7 +30,7 @@ static const char *tool_name = "mkeficapsule"; efi_guid_t efi_guid_fm_capsule = EFI_FIRMWARE_MANAGEMENT_CAPSULE_ID_GUID; efi_guid_t efi_guid_cert_type_pkcs7 = EFI_CERT_TYPE_PKCS7_GUID; -static const char *opts_short = "g:i:I:v:p:c:m:o:dhARD"; +static const char *opts_short = "g:i:I:v:p:c:m:o:dhARDV"; enum { CAPSULE_NORMAL_BLOB = 0, @@ -70,6 +72,7 @@ static void print_usage(void) "\t-R, --fw-revert firmware revert capsule, takes no GUID, no image blob\n" "\t-o, --capoemflag Capsule OEM Flag, an integer between 0x0000 and 0xffff\n" "\t-D, --dump-capsule dump the contents of the capsule headers\n" + "\t-V, --version show version number\n" "\t-h, --help print a help message\n", tool_name); } @@ -969,9 +972,12 @@ int main(int argc, char **argv) case 'D': capsule_dump = true; break; + case 'V': + printf("mkeficapsule version %s\n", PLAIN_VERSION); + exit(EXIT_SUCCESS); default: print_usage(); - exit(EXIT_SUCCESS); + exit(EXIT_FAILURE); } } diff --git a/tools/update-subtree.sh b/tools/update-subtree.sh new file mode 100755 index 00000000000..536b3318573 --- /dev/null +++ b/tools/update-subtree.sh @@ -0,0 +1,85 @@ +#!/bin/sh +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (c) 2024 Linaro Limited +# +# Usage: from the top level U-Boot source tree, run: +# $ ./tools/update-subtree.sh pull <subtree-name> <release-tag> +# Or: +# $ ./tools/update-subtree.sh pick <subtree-name> <commit-id> +# +# The script will pull changes from subtree repo into U-Boot. +# It will automatically create a squash/merge commit listing the commits +# imported. + +set -e + +print_usage() { + echo "usage: $0 <op> <subtree-name> <ref>" + echo " <op> pull or pick" + echo " <subtree-name> mbedtls or dts or lwip" + echo " <ref> release tag [pull] or commit id [pick]" +} + +if [ $# -ne 3 ]; then + print_usage + exit 1 +fi + +op=$1 +subtree_name=$2 +ref=$3 + +set_params() { + case "$subtree_name" in + mbedtls) + path=lib/mbedtls/external/mbedtls + repo_url=https://github.com/Mbed-TLS/mbedtls.git + remote_name="mbedtls_upstream" + ;; + dts) + path=dts/upstream + repo_url=https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git + remote_name="devicetree-rebasing" + ;; + lwip) + path=lib/lwip/lwip + repo_url=https://git.savannah.gnu.org/git/lwip.git + remote_name="lwip_upstream" + ;; + *) + echo "Invalid subtree name: $subtree_name" + print_usage + exit 1 + esac +} + +set_params + +merge_commit_msg=$(cat << EOF +Subtree merge tag '$ref' of $subtree_name repo [1] into $path + +[1] $repo_url +EOF +) + +remote_add_and_fetch() { + if [ -z "$(git remote get-url $remote_name 2>/dev/null)" ]; then + echo "Warning: Script automatically adds new git remote via:" + echo " git remote add $remote_name \\" + echo " $repo_url" + git remote add $remote_name $repo_url + fi + git fetch $remote_name master +} + +if [ "$op" = "pull" ]; then + remote_add_and_fetch + git subtree pull --prefix $path $remote_name "$ref" --squash -m "$merge_commit_msg" +elif [ "$op" = "pick" ]; then + remote_add_and_fetch + git cherry-pick -x --strategy=subtree -Xsubtree=$path/ "$ref" +else + print_usage + exit 1 +fi |