diff options
| -rw-r--r-- | arch/arm/mach-s5pc1xx/clock.c | 12 | ||||
| -rw-r--r-- | include/configs/s5p_goni.h | 3 |
2 files changed, 4 insertions, 11 deletions
diff --git a/arch/arm/mach-s5pc1xx/clock.c b/arch/arm/mach-s5pc1xx/clock.c index 555228a5208..c90c341b508 100644 --- a/arch/arm/mach-s5pc1xx/clock.c +++ b/arch/arm/mach-s5pc1xx/clock.c @@ -14,12 +14,8 @@ #define CLK_D 1 #define CLK_P 2 -#ifndef CONFIG_SYS_CLK_FREQ_C100 -#define CONFIG_SYS_CLK_FREQ_C100 12000000 -#endif -#ifndef CONFIG_SYS_CLK_FREQ_C110 -#define CONFIG_SYS_CLK_FREQ_C110 24000000 -#endif +#define CFG_SYS_CLK_FREQ_C100 12000000 +#define CFG_SYS_CLK_FREQ_C110 24000000 /* s5pc110: return pll clock frequency */ static unsigned long s5pc100_get_pll_clk(int pllreg) @@ -66,7 +62,7 @@ static unsigned long s5pc100_get_pll_clk(int pllreg) s = r & 0x7; /* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */ - freq = CONFIG_SYS_CLK_FREQ_C100; + freq = CFG_SYS_CLK_FREQ_C100; fout = m * (freq / (p * (1 << s))); return fout; @@ -116,7 +112,7 @@ static unsigned long s5pc110_get_pll_clk(int pllreg) /* SDIV [2:0] */ s = r & 0x7; - freq = CONFIG_SYS_CLK_FREQ_C110; + freq = CFG_SYS_CLK_FREQ_C110; if (pllreg == APLL) { if (s < 1) s = 1; diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 14840a453a6..e3b091a9370 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -18,9 +18,6 @@ #include <linux/sizes.h> #include <asm/arch/cpu.h> /* get chip and board defs */ -/* input clock of PLL: has 24MHz input clock at S5PC110 */ -#define CONFIG_SYS_CLK_FREQ_C110 24000000 - /* DRAM Base */ #define CONFIG_SYS_SDRAM_BASE 0x30000000 |