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-rw-r--r--arch/arm/dts/tegra114.dtsi2
-rw-r--r--arch/arm/dts/tegra124.dtsi2
-rw-r--r--arch/arm/mach-tegra/tegra114/clock.c2
-rw-r--r--arch/arm/mach-tegra/tegra124/clock.c2
-rw-r--r--arch/arm/mach-tegra/tegra20/clock.c2
-rw-r--r--arch/arm/mach-tegra/tegra210/clock.c2
-rw-r--r--arch/arm/mach-tegra/tegra30/clock.c2
-rw-r--r--drivers/pwm/tegra_pwm.c10
8 files changed, 13 insertions, 11 deletions
diff --git a/arch/arm/dts/tegra114.dtsi b/arch/arm/dts/tegra114.dtsi
index 8932ea3afd5..68ee7f31656 100644
--- a/arch/arm/dts/tegra114.dtsi
+++ b/arch/arm/dts/tegra114.dtsi
@@ -312,7 +312,7 @@
};
pwm: pwm@7000a000 {
- compatible = "nvidia,tegra114-pwm", "nvidia,tegra20-pwm";
+ compatible = "nvidia,tegra114-pwm";
reg = <0x7000a000 0x100>;
#pwm-cells = <2>;
clocks = <&tegra_car TEGRA114_CLK_PWM>;
diff --git a/arch/arm/dts/tegra124.dtsi b/arch/arm/dts/tegra124.dtsi
index f473ba28e4a..ffec9cae09d 100644
--- a/arch/arm/dts/tegra124.dtsi
+++ b/arch/arm/dts/tegra124.dtsi
@@ -377,7 +377,7 @@
};
pwm: pwm@7000a000 {
- compatible = "nvidia,tegra124-pwm", "nvidia,tegra20-pwm";
+ compatible = "nvidia,tegra124-pwm", "nvidia,tegra114-pwm";
reg = <0x7000a000 0x100>;
#pwm-cells = <2>;
clocks = <&tegra_car TEGRA124_CLK_PWM>;
diff --git a/arch/arm/mach-tegra/tegra114/clock.c b/arch/arm/mach-tegra/tegra114/clock.c
index 15c2adc4170..8ad71f590fa 100644
--- a/arch/arm/mach-tegra/tegra114/clock.c
+++ b/arch/arm/mach-tegra/tegra114/clock.c
@@ -782,7 +782,7 @@ struct periph_clk_init periph_clk_init_table[] = {
{ PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC4, CLOCK_ID_PERIPH },
- { PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ },
+ { PERIPH_ID_PWM, CLOCK_ID_PERIPH },
{ PERIPH_ID_I2C1, CLOCK_ID_PERIPH },
{ PERIPH_ID_I2C2, CLOCK_ID_PERIPH },
{ PERIPH_ID_I2C3, CLOCK_ID_PERIPH },
diff --git a/arch/arm/mach-tegra/tegra124/clock.c b/arch/arm/mach-tegra/tegra124/clock.c
index 415ba15e5dd..ca9549a3186 100644
--- a/arch/arm/mach-tegra/tegra124/clock.c
+++ b/arch/arm/mach-tegra/tegra124/clock.c
@@ -1208,7 +1208,7 @@ struct periph_clk_init periph_clk_init_table[] = {
{ PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC4, CLOCK_ID_PERIPH },
- { PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ },
+ { PERIPH_ID_PWM, CLOCK_ID_PERIPH },
{ PERIPH_ID_I2C1, CLOCK_ID_PERIPH },
{ PERIPH_ID_I2C2, CLOCK_ID_PERIPH },
{ PERIPH_ID_I2C3, CLOCK_ID_PERIPH },
diff --git a/arch/arm/mach-tegra/tegra20/clock.c b/arch/arm/mach-tegra/tegra20/clock.c
index 593622bfdcb..067a9f1a2f1 100644
--- a/arch/arm/mach-tegra/tegra20/clock.c
+++ b/arch/arm/mach-tegra/tegra20/clock.c
@@ -804,7 +804,7 @@ struct periph_clk_init periph_clk_init_table[] = {
{ PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC4, CLOCK_ID_PERIPH },
- { PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ },
+ { PERIPH_ID_PWM, CLOCK_ID_PERIPH },
{ PERIPH_ID_DVC_I2C, CLOCK_ID_PERIPH },
{ PERIPH_ID_I2C1, CLOCK_ID_PERIPH },
{ PERIPH_ID_I2C2, CLOCK_ID_PERIPH },
diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c
index 76fbfef580c..900537afbe5 100644
--- a/arch/arm/mach-tegra/tegra210/clock.c
+++ b/arch/arm/mach-tegra/tegra210/clock.c
@@ -1278,7 +1278,7 @@ struct periph_clk_init periph_clk_init_table[] = {
{ PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC4, CLOCK_ID_PERIPH },
- { PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ },
+ { PERIPH_ID_PWM, CLOCK_ID_PERIPH },
{ PERIPH_ID_I2C1, CLOCK_ID_PERIPH },
{ PERIPH_ID_I2C2, CLOCK_ID_PERIPH },
{ PERIPH_ID_I2C3, CLOCK_ID_PERIPH },
diff --git a/arch/arm/mach-tegra/tegra30/clock.c b/arch/arm/mach-tegra/tegra30/clock.c
index b66211ce940..1dc9d09dba8 100644
--- a/arch/arm/mach-tegra/tegra30/clock.c
+++ b/arch/arm/mach-tegra/tegra30/clock.c
@@ -884,7 +884,7 @@ struct periph_clk_init periph_clk_init_table[] = {
{ PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC4, CLOCK_ID_PERIPH },
- { PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ },
+ { PERIPH_ID_PWM, CLOCK_ID_PERIPH },
{ PERIPH_ID_DVC_I2C, CLOCK_ID_PERIPH },
{ PERIPH_ID_I2C1, CLOCK_ID_PERIPH },
{ PERIPH_ID_I2C2, CLOCK_ID_PERIPH },
diff --git a/drivers/pwm/tegra_pwm.c b/drivers/pwm/tegra_pwm.c
index 36c35c608b2..95fc26458b8 100644
--- a/drivers/pwm/tegra_pwm.c
+++ b/drivers/pwm/tegra_pwm.c
@@ -20,19 +20,21 @@ static int tegra_pwm_set_config(struct udevice *dev, uint channel,
{
struct tegra_pwm_priv *priv = dev_get_priv(dev);
struct pwm_ctlr *regs = priv->regs;
+ const u32 pwm_max_freq = dev_get_driver_data(dev);
uint pulse_width;
u32 reg;
if (channel >= 4)
return -EINVAL;
debug("%s: Configure '%s' channel %u\n", __func__, dev->name, channel);
- /* We ignore the period here and just use 32KHz */
- clock_start_periph_pll(PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ, 32768);
+
+ clock_start_periph_pll(PERIPH_ID_PWM, CLOCK_ID_PERIPH, pwm_max_freq);
pulse_width = duty_ns * 255 / period_ns;
reg = pulse_width << PWM_WIDTH_SHIFT;
reg |= 1 << PWM_DIVIDER_SHIFT;
+ reg |= PWM_ENABLE_MASK;
writel(reg, &regs[channel].control);
debug("%s: pulse_width=%u\n", __func__, pulse_width);
@@ -68,8 +70,8 @@ static const struct pwm_ops tegra_pwm_ops = {
};
static const struct udevice_id tegra_pwm_ids[] = {
- { .compatible = "nvidia,tegra124-pwm" },
- { .compatible = "nvidia,tegra20-pwm" },
+ { .compatible = "nvidia,tegra20-pwm", .data = 48 * 1000000 },
+ { .compatible = "nvidia,tegra114-pwm", .data = 408 * 1000000 },
{ }
};
generated by cgit v1.2.3 (git 2.0.4) at 2025-08-02 12:37:33 +0000