diff options
24 files changed, 437 insertions, 740 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 0c6f0221b77..4c6e26cbe30 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1042,7 +1042,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \ imx8mq-librem5-r4.dtb dtb-$(CONFIG_ARCH_IMX9) += \ - imx93-11x11-evk.dtb \ imx93-var-som-symphony.dtb \ imx93-phyboard-segin.dtb diff --git a/arch/arm/dts/imx8mm-u-boot.dtsi b/arch/arm/dts/imx8mm-u-boot.dtsi index 06f2f73a03f..6ab8f66256e 100644 --- a/arch/arm/dts/imx8mm-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-u-boot.dtsi @@ -5,7 +5,6 @@ / { binman: binman { - multiple-images; }; #ifdef CONFIG_OPTEE @@ -43,56 +42,61 @@ }; &binman { - u-boot-spl-ddr { - align = <4>; - align-size = <4>; - filename = "u-boot-spl-ddr.bin"; - pad-byte = <0xff>; - - u-boot-spl { - align-end = <4>; - filename = "u-boot-spl.bin"; - }; + filename = "flash.bin"; + section { + pad-byte = <0x00>; - ddr-1d-imem-fw { - filename = "lpddr4_pmu_train_1d_imem.bin"; - align-end = <4>; +#ifdef CONFIG_FSPI_CONF_HEADER + fspi_conf_block { + filename = CONFIG_FSPI_CONF_FILE; type = "blob-ext"; + size = <0x1000>; }; +#endif - ddr-1d-dmem-fw { - filename = "lpddr4_pmu_train_1d_dmem.bin"; - align-end = <4>; - type = "blob-ext"; - }; + nxp-imx8mimage { + filename = "u-boot-spl-mkimage.bin"; + nxp,boot-from = "sd"; + nxp,rom-version = <1>; + nxp,loader-address = <CONFIG_SPL_TEXT_BASE>; + args; /* Needed by mkimage etype superclass */ - ddr-2d-imem-fw { - filename = "lpddr4_pmu_train_2d_imem.bin"; - align-end = <4>; - type = "blob-ext"; - }; + section { + align = <4>; + align-size = <4>; + filename = "u-boot-spl-ddr.bin"; + pad-byte = <0xff>; - ddr-2d-dmem-fw { - filename = "lpddr4_pmu_train_2d_dmem.bin"; - align-end = <4>; - type = "blob-ext"; - }; - }; + u-boot-spl { + align-end = <4>; + filename = "u-boot-spl.bin"; + }; - spl { - filename = "spl.bin"; + ddr-1d-imem-fw { + filename = "lpddr4_pmu_train_1d_imem.bin"; + align-end = <4>; + type = "blob-ext"; + }; - mkimage { - args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x7e1000"; + ddr-1d-dmem-fw { + filename = "lpddr4_pmu_train_1d_dmem.bin"; + align-end = <4>; + type = "blob-ext"; + }; - blob { - filename = "u-boot-spl-ddr.bin"; + ddr-2d-imem-fw { + filename = "lpddr4_pmu_train_2d_imem.bin"; + align-end = <4>; + type = "blob-ext"; + }; + + ddr-2d-dmem-fw { + filename = "lpddr4_pmu_train_2d_dmem.bin"; + align-end = <4>; + type = "blob-ext"; + }; }; }; - }; - - itb { - filename = "u-boot.itb"; fit { description = "Configuration to load ATF before U-Boot"; @@ -101,6 +105,11 @@ #endif fit,fdt-list = "of-list"; #address-cells = <1>; +#ifdef CONFIG_FSPI_CONF_HEADER + offset = <0x58C00>; +#else + offset = <0x57c00>; +#endif images { uboot { @@ -166,43 +175,6 @@ }; }; }; - - imx-boot { - filename = "flash.bin"; - pad-byte = <0x00>; - -#ifdef CONFIG_FSPI_CONF_HEADER - fspi_conf_block { - filename = CONFIG_FSPI_CONF_FILE; - type = "blob-ext"; - size = <0x1000>; - }; - - spl { - filename = "spl.bin"; - offset = <0x1000>; - type = "blob-ext"; - }; - - binman_uboot: uboot { - filename = "u-boot.itb"; - offset = <0x58C00>; - type = "blob-ext"; - }; -#else - spl { - filename = "spl.bin"; - offset = <0x0>; - type = "blob-ext"; - }; - - binman_uboot: uboot { - filename = "u-boot.itb"; - offset = <0x57c00>; - type = "blob-ext"; - }; -#endif - }; }; &clk { diff --git a/arch/arm/dts/imx8mm-verdin-wifi-dev-u-boot.dtsi b/arch/arm/dts/imx8mm-verdin-wifi-dev-u-boot.dtsi index 8b397f535c1..90183aff8bc 100644 --- a/arch/arm/dts/imx8mm-verdin-wifi-dev-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-verdin-wifi-dev-u-boot.dtsi @@ -35,8 +35,12 @@ bootph-pre-ram; }; -&binman_uboot { - offset = <0x5fc00>; +&binman { + section { + fit { + offset = <0x5fc00>; + }; + }; }; &gpio1 { diff --git a/arch/arm/dts/imx8mn-u-boot.dtsi b/arch/arm/dts/imx8mn-u-boot.dtsi index 96b1a1bc802..ba9967dbe4a 100644 --- a/arch/arm/dts/imx8mn-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-u-boot.dtsi @@ -5,7 +5,6 @@ / { binman: binman { - multiple-images; }; #ifdef CONFIG_OPTEE @@ -92,78 +91,83 @@ }; &binman { - u-boot-spl-ddr { - filename = "u-boot-spl-ddr.bin"; - pad-byte = <0xff>; - align-size = <4>; - align = <4>; - - u-boot-spl { - align-end = <4>; - filename = "u-boot-spl.bin"; + filename = "flash.bin"; + section { + pad-byte = <0x00>; + +#ifdef CONFIG_FSPI_CONF_HEADER + fspi_conf_block { + filename = CONFIG_FSPI_CONF_FILE; + type = "blob-ext"; + offset = <0x400>; }; +#endif - ddr-1d-imem-fw { + nxp-imx8mimage { + filename = "u-boot-spl-mkimage.bin"; + nxp,boot-from = "sd"; + nxp,rom-version = <2>; + nxp,loader-address = <CONFIG_SPL_TEXT_BASE>; + args; /* Needed by mkimage etype superclass */ + + section { + filename = "u-boot-spl-ddr.bin"; + pad-byte = <0xff>; + align-size = <4>; + align = <4>; + + u-boot-spl { + align-end = <4>; + filename = "u-boot-spl.bin"; + }; + + ddr-1d-imem-fw { #ifdef CONFIG_IMX8M_LPDDR4 - filename = "lpddr4_pmu_train_1d_imem.bin"; + filename = "lpddr4_pmu_train_1d_imem.bin"; #elif CONFIG_IMX8M_DDR4 - filename = "ddr4_imem_1d_201810.bin"; + filename = "ddr4_imem_1d_201810.bin"; #else - filename = "ddr3_imem_1d.bin"; + filename = "ddr3_imem_1d.bin"; #endif - type = "blob-ext"; - align-end = <4>; - }; + type = "blob-ext"; + align-end = <4>; + }; - ddr-1d-dmem-fw { + ddr-1d-dmem-fw { #ifdef CONFIG_IMX8M_LPDDR4 - filename = "lpddr4_pmu_train_1d_dmem.bin"; + filename = "lpddr4_pmu_train_1d_dmem.bin"; #elif CONFIG_IMX8M_DDR4 - filename = "ddr4_dmem_1d_201810.bin"; + filename = "ddr4_dmem_1d_201810.bin"; #else - filename = "ddr3_dmem_1d.bin"; + filename = "ddr3_dmem_1d.bin"; #endif - type = "blob-ext"; - align-end = <4>; - }; + type = "blob-ext"; + align-end = <4>; + }; #if defined(CONFIG_IMX8M_LPDDR4) || defined(CONFIG_IMX8M_DDR4) - ddr-2d-imem-fw { + ddr-2d-imem-fw { #ifdef CONFIG_IMX8M_LPDDR4 - filename = "lpddr4_pmu_train_2d_imem.bin"; + filename = "lpddr4_pmu_train_2d_imem.bin"; #else - filename = "ddr4_imem_2d_201810.bin"; + filename = "ddr4_imem_2d_201810.bin"; #endif - type = "blob-ext"; - align-end = <4>; - }; + type = "blob-ext"; + align-end = <4>; + }; - ddr-2d-dmem-fw { + ddr-2d-dmem-fw { #ifdef CONFIG_IMX8M_LPDDR4 - filename = "lpddr4_pmu_train_2d_dmem.bin"; + filename = "lpddr4_pmu_train_2d_dmem.bin"; #else - filename = "ddr4_dmem_2d_201810.bin"; + filename = "ddr4_dmem_2d_201810.bin"; #endif - type = "blob-ext"; - align-end = <4>; - }; + type = "blob-ext"; + align-end = <4>; + }; #endif - }; - - spl { - filename = "spl.bin"; - - mkimage { - args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x912000"; - - blob { - filename = "u-boot-spl-ddr.bin"; }; }; - }; - - itb { - filename = "u-boot.itb"; fit { description = "Configuration to load ATF before U-Boot"; @@ -172,6 +176,11 @@ #endif fit,fdt-list = "of-list"; #address-cells = <1>; +#ifdef CONFIG_FSPI_CONF_HEADER + offset = <0x59000>; +#else + offset = <0x58000>; +#endif images { uboot { @@ -237,42 +246,4 @@ }; }; }; - - imx-boot { - filename = "flash.bin"; - pad-byte = <0x00>; - -#ifdef CONFIG_FSPI_CONF_HEADER - fspi_conf_block { - filename = CONFIG_FSPI_CONF_FILE; - type = "blob-ext"; - offset = <0x400>; - }; - - spl { - filename = "spl.bin"; - offset = <0x1000>; - type = "blob-ext"; - }; - - binman_uboot: uboot { - filename = "u-boot.itb"; - offset = <0x59000>; - type = "blob-ext"; - }; -#else - - spl { - offset = <0x0>; - filename = "spl.bin"; - type = "blob-ext"; - }; - - binman_uboot: uboot { - offset = <0x58000>; - filename = "u-boot.itb"; - type = "blob-ext"; - }; -#endif - }; }; diff --git a/arch/arm/dts/imx8mp-dhcom-pdk3-u-boot.dtsi b/arch/arm/dts/imx8mp-dhcom-pdk3-u-boot.dtsi index 040f333c52d..b0b99d51856 100644 --- a/arch/arm/dts/imx8mp-dhcom-pdk3-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-dhcom-pdk3-u-boot.dtsi @@ -4,3 +4,15 @@ */ #include "imx8mp-dhcom-u-boot.dtsi" + +/ { + clk_pcie100: clk-pcie100 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + }; +}; + +&pcie_phy { + clocks = <&clk_pcie100>; +}; diff --git a/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi b/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi index b05be57e71b..cb37e28f28f 100644 --- a/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi @@ -136,7 +136,7 @@ }; &binman { - itb { + section { fit { images { fdt-dto-imx8mp-dhcom-som-overlay-eth1xfast { diff --git a/arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi b/arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi index 22171bd344e..aff5dcf615d 100644 --- a/arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-rsb3720-a1-u-boot.dtsi @@ -136,7 +136,7 @@ }; &binman { - itb { + section { fit { images { fip { diff --git a/arch/arm/dts/imx8mp-u-boot.dtsi b/arch/arm/dts/imx8mp-u-boot.dtsi index 4fadcaea509..c4c1a177102 100644 --- a/arch/arm/dts/imx8mp-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-u-boot.dtsi @@ -6,7 +6,6 @@ / { binman: binman { - multiple-images; }; #ifdef CONFIG_OPTEE @@ -83,55 +82,52 @@ #endif &binman { - u-boot-spl-ddr { - filename = "u-boot-spl-ddr.bin"; - pad-byte = <0xff>; - align-size = <4>; - align = <4>; - - u-boot-spl { - align-end = <4>; - }; + filename = "flash.bin"; + section { + pad-byte = <0x00>; - ddr-1d-imem-fw { - filename = "lpddr4_pmu_train_1d_imem_202006.bin"; - type = "blob-ext"; - align-end = <4>; - }; + nxp-imx8mimage { + filename = "u-boot-spl-mkimage.bin"; + nxp,boot-from = "sd"; + nxp,rom-version = <2>; + nxp,loader-address = <CONFIG_SPL_TEXT_BASE>; + args; /* Needed by mkimage etype superclass */ - ddr-1d-dmem-fw { - filename = "lpddr4_pmu_train_1d_dmem_202006.bin"; - type = "blob-ext"; - align-end = <4>; - }; + section { + filename = "u-boot-spl-ddr.bin"; + pad-byte = <0xff>; + align-size = <4>; + align = <4>; - ddr-2d-imem-fw { - filename = "lpddr4_pmu_train_2d_imem_202006.bin"; - type = "blob-ext"; - align-end = <4>; - }; + u-boot-spl { + align-end = <4>; + }; - ddr-2d-dmem-fw { - filename = "lpddr4_pmu_train_2d_dmem_202006.bin"; - type = "blob-ext"; - align-end = <4>; - }; - }; + ddr-1d-imem-fw { + filename = "lpddr4_pmu_train_1d_imem_202006.bin"; + type = "blob-ext"; + align-end = <4>; + }; - spl { - filename = "spl.bin"; + ddr-1d-dmem-fw { + filename = "lpddr4_pmu_train_1d_dmem_202006.bin"; + type = "blob-ext"; + align-end = <4>; + }; - mkimage { - args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x920000"; + ddr-2d-imem-fw { + filename = "lpddr4_pmu_train_2d_imem_202006.bin"; + type = "blob-ext"; + align-end = <4>; + }; - blob { - filename = "u-boot-spl-ddr.bin"; + ddr-2d-dmem-fw { + filename = "lpddr4_pmu_train_2d_dmem_202006.bin"; + type = "blob-ext"; + align-end = <4>; + }; }; }; - }; - - itb { - filename = "u-boot.itb"; fit { description = "Configuration to load ATF before U-Boot"; @@ -140,6 +136,7 @@ #endif fit,fdt-list = "of-list"; #address-cells = <1>; + offset = <0x58000>; images { uboot { @@ -195,21 +192,4 @@ }; }; }; - - imx-boot { - filename = "flash.bin"; - pad-byte = <0x00>; - - spl { - filename = "spl.bin"; - offset = <0x0>; - type = "blob-ext"; - }; - - binman_uboot: uboot { - filename = "u-boot.itb"; - offset = <0x58000>; - type = "blob-ext"; - }; - }; }; diff --git a/arch/arm/dts/imx8mq-cm-u-boot.dtsi b/arch/arm/dts/imx8mq-cm-u-boot.dtsi index e23998f5aba..819501337e9 100644 --- a/arch/arm/dts/imx8mq-cm-u-boot.dtsi +++ b/arch/arm/dts/imx8mq-cm-u-boot.dtsi @@ -3,11 +3,7 @@ * Copyright 2019 NXP */ -/ { - binman: binman { - multiple-images; - }; -}; +#include "imx8mq-u-boot.dtsi" &pinctrl_uart1 { bootph-pre-ram; @@ -16,108 +12,3 @@ &uart1 { bootph-pre-ram; }; - -&binman { - u-boot-spl-ddr { - filename = "u-boot-spl-ddr.bin"; - pad-byte = <0xff>; - align-size = <4>; - align = <4>; - - u-boot-spl { - align-end = <4>; - }; - - ddr-1d-imem-fw { - filename = "lpddr4_pmu_train_1d_imem.bin"; - type = "blob-ext"; - align-end = <4>; - }; - - ddr-1d-dmem-fw { - filename = "lpddr4_pmu_train_1d_dmem.bin"; - type = "blob-ext"; - align-end = <4>; - }; - - ddr-2d-imem-fw { - filename = "lpddr4_pmu_train_2d_imem.bin"; - type = "blob-ext"; - align-end = <4>; - }; - - ddr-2d-dmem-fw { - filename = "lpddr4_pmu_train_2d_dmem.bin"; - type = "blob-ext"; - align-end = <4>; - }; - }; - - flash { - mkimage { - args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x7e1000"; - - blob { - filename = "u-boot-spl-ddr.bin"; - }; - }; - }; - - itb { - filename = "u-boot.itb"; - - fit { - description = "Configuration to load ATF before U-Boot"; - #address-cells = <1>; - fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>; - - images { - uboot { - description = "U-Boot (64-bit)"; - type = "standalone"; - arch = "arm64"; - compression = "none"; - load = <CONFIG_TEXT_BASE>; - - uboot_blob: blob-ext { - filename = "u-boot-nodtb.bin"; - }; - }; - - atf { - description = "ARM Trusted Firmware"; - type = "firmware"; - arch = "arm64"; - compression = "none"; - load = <0x910000>; - entry = <0x910000>; - - atf_blob: blob-ext { - filename = "bl31.bin"; - }; - }; - - fdt { - description = "NAME"; - type = "flat_dt"; - compression = "none"; - - uboot_fdt_blob: blob-ext { - filename = "u-boot.dtb"; - }; - }; - }; - - configurations { - default = "conf"; - - conf { - description = "NAME"; - firmware = "uboot"; - loadables = "atf"; - fdt = "fdt"; - }; - }; - }; - }; -}; diff --git a/arch/arm/dts/imx8mq-librem5-r4-u-boot.dtsi b/arch/arm/dts/imx8mq-librem5-r4-u-boot.dtsi index e3341a46d63..1a4568dac65 100644 --- a/arch/arm/dts/imx8mq-librem5-r4-u-boot.dtsi +++ b/arch/arm/dts/imx8mq-librem5-r4-u-boot.dtsi @@ -11,14 +11,13 @@ }; &binman { - /delete-node/ signed-hdmi; - - signed-hdmi { - filename = "signed_hdmi.bin"; - - signed-dp-imx8m { - filename = "signed_dp_imx8m.bin"; - type = "blob-ext"; + section { + nxp-imx8mimage { + section { + signed-hdmi-imx8m { + filename = "signed_dp_imx8m.bin"; + }; + }; }; }; }; diff --git a/arch/arm/dts/imx8mq-u-boot.dtsi b/arch/arm/dts/imx8mq-u-boot.dtsi index 90b2274754b..48dbe94f0c4 100644 --- a/arch/arm/dts/imx8mq-u-boot.dtsi +++ b/arch/arm/dts/imx8mq-u-boot.dtsi @@ -5,7 +5,6 @@ / { binman: binman { - multiple-images; }; }; @@ -35,65 +34,58 @@ }; &binman { - u-boot-spl-ddr { - align = <4>; - align-size = <4>; - filename = "u-boot-spl-ddr.bin"; - pad-byte = <0xff>; - - u-boot-spl { - align-end = <4>; - filename = "u-boot-spl.bin"; - }; + filename = "flash.bin"; + section { + pad-byte = <0x00>; - ddr-1d-imem-fw { - filename = "lpddr4_pmu_train_1d_imem.bin"; - align-end = <4>; - type = "blob-ext"; - }; + nxp-imx8mimage { + filename = "u-boot-spl-mkimage.bin"; + nxp,boot-from = "sd"; + nxp,rom-version = <1>; + nxp,loader-address = <CONFIG_SPL_TEXT_BASE>; + args; /* Needed by mkimage etype superclass */ - ddr-1d-dmem-fw { - filename = "lpddr4_pmu_train_1d_dmem.bin"; - align-end = <4>; - type = "blob-ext"; - }; - - ddr-2d-imem-fw { - filename = "lpddr4_pmu_train_2d_imem.bin"; - align-end = <4>; - type = "blob-ext"; - }; + section { + align = <4>; + align-size = <4>; + filename = "u-boot-spl-ddr.bin"; + pad-byte = <0xff>; - ddr-2d-dmem-fw { - filename = "lpddr4_pmu_train_2d_dmem.bin"; - align-end = <4>; - type = "blob-ext"; - }; - }; + u-boot-spl { + align-end = <4>; + filename = "u-boot-spl.bin"; + }; - signed-hdmi { - filename = "signed_hdmi.bin"; + ddr-1d-imem-fw { + filename = "lpddr4_pmu_train_1d_imem.bin"; + align-end = <4>; + type = "blob-ext"; + }; - signed-hdmi-imx8m { - filename = "signed_hdmi_imx8m.bin"; - type = "blob-ext"; - }; - }; + ddr-1d-dmem-fw { + filename = "lpddr4_pmu_train_1d_dmem.bin"; + align-end = <4>; + type = "blob-ext"; + }; - spl { - filename = "spl.bin"; + ddr-2d-imem-fw { + filename = "lpddr4_pmu_train_2d_imem.bin"; + align-end = <4>; + type = "blob-ext"; + }; - mkimage { - args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x7e1000"; + ddr-2d-dmem-fw { + filename = "lpddr4_pmu_train_2d_dmem.bin"; + align-end = <4>; + type = "blob-ext"; + }; - blob { - filename = "u-boot-spl-ddr.bin"; + signed-hdmi-imx8m { + filename = "signed_hdmi_imx8m.bin"; + type = "blob-ext"; + }; }; }; - }; - - itb { - filename = "u-boot.itb"; fit { description = "Configuration to load ATF before U-Boot"; @@ -158,21 +150,4 @@ }; }; }; - - imx-boot { - filename = "flash.bin"; - pad-byte = <0x00>; - - spl { - filename = "spl.bin"; - offset = <0x0>; - type = "blob-ext"; - }; - - binman_uboot: uboot { - filename = "u-boot.itb"; - offset = <0x57c00>; - type = "blob-ext"; - }; - }; }; diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi index a99ba99bfb4..408e601bc90 100644 --- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi +++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi @@ -26,6 +26,111 @@ bootph-pre-ram; }; +&lpi2c2 { + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <400000>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pinctrl_lpi2c2>; + pinctrl-1 = <&pinctrl_lpi2c2>; + status = "okay"; + + pmic@25 { + compatible = "nxp,pca9451a"; + reg = <0x25>; + interrupt-parent = <&pcal6524>; + interrupts = <11 IRQ_TYPE_LEVEL_LOW>; + + regulators { + buck1: BUCK1 { + regulator-name = "BUCK1"; + regulator-min-microvolt = <650000>; + regulator-max-microvolt = <2237500>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <3125>; + }; + + buck2: BUCK2 { + regulator-name = "BUCK2"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <2187500>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <3125>; + }; + + buck4: BUCK4{ + regulator-name = "BUCK4"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <3400000>; + regulator-boot-on; + regulator-always-on; + }; + + buck5: BUCK5{ + regulator-name = "BUCK5"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <3400000>; + regulator-boot-on; + regulator-always-on; + }; + + buck6: BUCK6 { + regulator-name = "BUCK6"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <3400000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo1: LDO1 { + regulator-name = "LDO1"; + regulator-min-microvolt = <1600000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo4: LDO4 { + regulator-name = "LDO4"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo5: LDO5 { + regulator-name = "LDO5"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; + + pcal6524: gpio@22 { + compatible = "nxp,pcal6524"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcal6524>; + reg = <0x22>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gpio3>; + interrupts = <27 IRQ_TYPE_LEVEL_LOW>; + }; + + adp5585gpio: gpio@34 { + compatible = "adp5585"; + reg = <0x34>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + &aips1 { bootph-pre-ram; bootph-all; @@ -44,6 +149,19 @@ &iomuxc { bootph-pre-ram; bootph-some-ram; + + pinctrl_lpi2c2: lpi2c2grp { + fsl,pins = < + MX93_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e + MX93_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e + >; + }; + + pinctrl_pcal6524: pcal6524grp { + fsl,pins = < + MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x31e + >; + }; }; ®_usdhc2_vmmc { diff --git a/arch/arm/dts/imx93-11x11-evk.dts b/arch/arm/dts/imx93-11x11-evk.dts deleted file mode 100644 index 4322cc3e11b..00000000000 --- a/arch/arm/dts/imx93-11x11-evk.dts +++ /dev/null @@ -1,322 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright 2022 NXP - */ - -/dts-v1/; - -#include "imx93.dtsi" - -/ { - model = "NXP i.MX93 11X11 EVK board"; - compatible = "fsl,imx93-11x11-evk", "fsl,imx93"; - - chosen { - stdout-path = &lpuart1; - }; - - reg_vref_1v8: regulator-adc-vref { - compatible = "regulator-fixed"; - regulator-name = "vref_1v8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - reg_usdhc2_vmmc: regulator-usdhc2 { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; - regulator-name = "VSD_3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; -}; - -&adc1 { - vref-supply = <®_vref_1v8>; - status = "okay"; -}; - -&mu1 { - status = "okay"; -}; - -&mu2 { - status = "okay"; -}; - -&eqos { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_eqos>; - phy-mode = "rgmii-id"; - phy-handle = <ðphy1>; - status = "okay"; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - clock-frequency = <5000000>; - - ethphy1: ethernet-phy@1 { - reg = <1>; - eee-broken-1000t; - }; - }; -}; - -&fec { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_fec>; - phy-mode = "rgmii-id"; - phy-handle = <ðphy2>; - fsl,magic-packet; - status = "okay"; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - clock-frequency = <5000000>; - - ethphy2: ethernet-phy@2 { - reg = <2>; - eee-broken-1000t; - }; - }; -}; - -&lpi2c2 { - #address-cells = <1>; - #size-cells = <0>; - clock-frequency = <400000>; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&pinctrl_lpi2c2>; - pinctrl-1 = <&pinctrl_lpi2c2>; - status = "okay"; - - pmic@25 { - compatible = "nxp,pca9451a"; - reg = <0x25>; - interrupt-parent = <&pcal6524>; - interrupts = <11 IRQ_TYPE_LEVEL_LOW>; - - regulators { - buck1: BUCK1 { - regulator-name = "BUCK1"; - regulator-min-microvolt = <650000>; - regulator-max-microvolt = <2237500>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay = <3125>; - }; - - buck2: BUCK2 { - regulator-name = "BUCK2"; - regulator-min-microvolt = <600000>; - regulator-max-microvolt = <2187500>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay = <3125>; - }; - - buck4: BUCK4{ - regulator-name = "BUCK4"; - regulator-min-microvolt = <600000>; - regulator-max-microvolt = <3400000>; - regulator-boot-on; - regulator-always-on; - }; - - buck5: BUCK5{ - regulator-name = "BUCK5"; - regulator-min-microvolt = <600000>; - regulator-max-microvolt = <3400000>; - regulator-boot-on; - regulator-always-on; - }; - - buck6: BUCK6 { - regulator-name = "BUCK6"; - regulator-min-microvolt = <600000>; - regulator-max-microvolt = <3400000>; - regulator-boot-on; - regulator-always-on; - }; - - ldo1: LDO1 { - regulator-name = "LDO1"; - regulator-min-microvolt = <1600000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - ldo4: LDO4 { - regulator-name = "LDO4"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - ldo5: LDO5 { - regulator-name = "LDO5"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - }; - }; - - pcal6524: gpio@22 { - compatible = "nxp,pcal6524"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pcal6524>; - reg = <0x22>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupt-parent = <&gpio3>; - interrupts = <27 IRQ_TYPE_LEVEL_LOW>; - }; - - adp5585gpio: gpio@34 { - compatible = "adp5585"; - reg = <0x34>; - gpio-controller; - #gpio-cells = <2>; - }; -}; - -&lpuart1 { /* console */ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - status = "okay"; -}; - -&usdhc1 { - pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc1>; - pinctrl-1 = <&pinctrl_usdhc1>; - pinctrl-2 = <&pinctrl_usdhc1>; - bus-width = <8>; - non-removable; - status = "okay"; -}; - -&usdhc2 { - pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; - pinctrl-1 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; - pinctrl-2 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; - cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>; - vmmc-supply = <®_usdhc2_vmmc>; - bus-width = <4>; - status = "okay"; - no-sdio; - no-mmc; -}; - -&iomuxc { - pinctrl_lpi2c2: lpi2c2grp { - fsl,pins = < - MX93_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e - MX93_PAD_I2C2_SDA__LPI2C2_SDA 0x40000b9e - >; - }; - - pinctrl_pcal6524: pcal6524grp { - fsl,pins = < - MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x31e - >; - }; - - pinctrl_eqos: eqosgrp { - fsl,pins = < - MX93_PAD_ENET1_MDC__ENET_QOS_MDC 0x57e - MX93_PAD_ENET1_MDIO__ENET_QOS_MDIO 0x57e - MX93_PAD_ENET1_RD0__ENET_QOS_RGMII_RD0 0x57e - MX93_PAD_ENET1_RD1__ENET_QOS_RGMII_RD1 0x57e - MX93_PAD_ENET1_RD2__ENET_QOS_RGMII_RD2 0x57e - MX93_PAD_ENET1_RD3__ENET_QOS_RGMII_RD3 0x57e - MX93_PAD_ENET1_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x5fe - MX93_PAD_ENET1_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x57e - MX93_PAD_ENET1_TD0__ENET_QOS_RGMII_TD0 0x57e - MX93_PAD_ENET1_TD1__ENET_QOS_RGMII_TD1 0x57e - MX93_PAD_ENET1_TD2__ENET_QOS_RGMII_TD2 0x57e - MX93_PAD_ENET1_TD3__ENET_QOS_RGMII_TD3 0x57e - MX93_PAD_ENET1_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x5fe - MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x57e - >; - }; - - pinctrl_fec: fecgrp { - fsl,pins = < - MX93_PAD_ENET2_MDC__ENET1_MDC 0x57e - MX93_PAD_ENET2_MDIO__ENET1_MDIO 0x57e - MX93_PAD_ENET2_RD0__ENET1_RGMII_RD0 0x57e - MX93_PAD_ENET2_RD1__ENET1_RGMII_RD1 0x57e - MX93_PAD_ENET2_RD2__ENET1_RGMII_RD2 0x57e - MX93_PAD_ENET2_RD3__ENET1_RGMII_RD3 0x57e - MX93_PAD_ENET2_RXC__ENET1_RGMII_RXC 0x5fe - MX93_PAD_ENET2_RX_CTL__ENET1_RGMII_RX_CTL 0x57e - MX93_PAD_ENET2_TD0__ENET1_RGMII_TD0 0x57e - MX93_PAD_ENET2_TD1__ENET1_RGMII_TD1 0x57e - MX93_PAD_ENET2_TD2__ENET1_RGMII_TD2 0x57e - MX93_PAD_ENET2_TD3__ENET1_RGMII_TD3 0x57e - MX93_PAD_ENET2_TXC__ENET1_RGMII_TXC 0x5fe - MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x57e - >; - }; - - pinctrl_uart1: uart1grp { - fsl,pins = < - MX93_PAD_UART1_RXD__LPUART1_RX 0x31e - MX93_PAD_UART1_TXD__LPUART1_TX 0x31e - >; - }; - - pinctrl_usdhc1: usdhc1grp { - fsl,pins = < - MX93_PAD_SD1_CLK__USDHC1_CLK 0x15fe - MX93_PAD_SD1_CMD__USDHC1_CMD 0x13fe - MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x13fe - MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x13fe - MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x13fe - MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x13fe - MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x13fe - MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x13fe - MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x13fe - MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x13fe - MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x15fe - >; - }; - - pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { - fsl,pins = < - MX93_PAD_SD2_RESET_B__GPIO3_IO07 0x31e - >; - }; - - pinctrl_usdhc2_gpio: usdhc2gpiogrp { - fsl,pins = < - MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e - >; - }; - - pinctrl_usdhc2: usdhc2grp { - fsl,pins = < - MX93_PAD_SD2_CLK__USDHC2_CLK 0x15fe - MX93_PAD_SD2_CMD__USDHC2_CMD 0x13fe - MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x13fe - MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x13fe - MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x13fe - MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x13fe - MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e - >; - }; -}; diff --git a/arch/arm/dts/imx93-u-boot.dtsi b/arch/arm/dts/imx93-u-boot.dtsi index 40e17bbc5ae..289aba17584 100644 --- a/arch/arm/dts/imx93-u-boot.dtsi +++ b/arch/arm/dts/imx93-u-boot.dtsi @@ -86,3 +86,18 @@ }; }; }; + +&tmu { + compatible = "fsl,imx93-tmu"; + reg = <0x44482000 0x1000>; + clocks = <&clk IMX93_CLK_TMC_GATE>; + little-endian; + fsl,tmu-calibration = <0x0000000e 0x800000da + 0x00000029 0x800000e9 + 0x00000056 0x80000102 + 0x000000a2 0x8000012a + 0x00000116 0x80000166 + 0x00000195 0x800001a7 + 0x000001b2 0x800001b6>; + #thermal-sensor-cells = <1>; +}; diff --git a/arch/arm/mach-imx/imx9/Kconfig b/arch/arm/mach-imx/imx9/Kconfig index b79485f1f75..e892da80fe8 100644 --- a/arch/arm/mach-imx/imx9/Kconfig +++ b/arch/arm/mach-imx/imx9/Kconfig @@ -31,6 +31,7 @@ choice config TARGET_IMX93_11X11_EVK bool "imx93_11x11_evk" select IMX93 + imply OF_UPSTREAM config TARGET_IMX93_VAR_SOM bool "imx93_var_som" diff --git a/configs/colibri-imx6ull_defconfig b/configs/colibri-imx6ull_defconfig index fc10d7f66a6..4a0ff029ac7 100644 --- a/configs/colibri-imx6ull_defconfig +++ b/configs/colibri-imx6ull_defconfig @@ -18,6 +18,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=1 +CONFIG_OF_ENV_SETUP=y CONFIG_BOOTCOMMAND="run ubiboot || run distro_bootcmd;" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile imx6ull-colibri${variant}-${fdt_board}.dtb" diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig index 454fb9bb561..47c2ffcc84e 100644 --- a/configs/colibri_imx7_defconfig +++ b/configs/colibri_imx7_defconfig @@ -19,6 +19,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=1 +CONFIG_OF_ENV_SETUP=y CONFIG_BOOTCOMMAND="run ubiboot ; echo ; echo ubiboot failed ; run distro_bootcmd;" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="test -n ${fdtfile} || setenv fdtfile ${soc}-colibri-${fdt_board}.dtb " diff --git a/configs/imx8mp_dhcom_pdk3_defconfig b/configs/imx8mp_dhcom_pdk3_defconfig index 73079df6b25..5b338f22195 100644 --- a/configs/imx8mp_dhcom_pdk3_defconfig +++ b/configs/imx8mp_dhcom_pdk3_defconfig @@ -34,6 +34,7 @@ CONFIG_ENV_OFFSET_REDUND=0xFF0000 CONFIG_IMX_BOOTAUX=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_SYS_LOAD_ADDR=0x50000000 +CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y @@ -104,6 +105,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_BKOPS_ENABLE=y CONFIG_CMD_MTD=y CONFIG_CMD_PART=y +CONFIG_CMD_PCI=y CONFIG_CMD_READ=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y @@ -216,7 +218,10 @@ CONFIG_DWC_ETH_QOS_IMX=y CONFIG_FEC_MXC=y CONFIG_RGMII=y CONFIG_MII=y +CONFIG_NVME_PCI=y +CONFIG_PCIE_DW_IMX=y CONFIG_PHY_IMX8MQ_USB=y +CONFIG_PHY_IMX8M_PCIE=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX8M=y diff --git a/configs/imx93_11x11_evk_defconfig b/configs/imx93_11x11_evk_defconfig index db2f2623d89..5ad770f91e1 100644 --- a/configs/imx93_11x11_evk_defconfig +++ b/configs/imx93_11x11_evk_defconfig @@ -10,7 +10,7 @@ CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x700000 CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx9/imximage.cfg" CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="imx93-11x11-evk" +CONFIG_DEFAULT_DEVICE_TREE="freescale/imx93-11x11-evk" CONFIG_SPL_TEXT_BASE=0x2049A000 CONFIG_TARGET_IMX93_11X11_EVK=y CONFIG_SYS_MONITOR_LEN=524288 diff --git a/configs/imx93_11x11_evk_ld_defconfig b/configs/imx93_11x11_evk_ld_defconfig index 822cad7e3fa..abda6d12662 100644 --- a/configs/imx93_11x11_evk_ld_defconfig +++ b/configs/imx93_11x11_evk_ld_defconfig @@ -10,7 +10,7 @@ CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x400000 CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx9/imximage.cfg" CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="imx93-11x11-evk" +CONFIG_DEFAULT_DEVICE_TREE="freescale/imx93-11x11-evk" CONFIG_SPL_TEXT_BASE=0x2049A000 CONFIG_IMX9_LOW_DRIVE_MODE=y CONFIG_TARGET_IMX93_11X11_EVK=y diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index 7c9d633b68d..8860ceec1a0 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -53,7 +53,7 @@ "ubi part ubi &&" \ "ubi read ${kernel_addr_r} kernel && " \ "ubi read ${fdt_addr_r} dtb && " \ - "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ + "bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ #if defined(CONFIG_TARGET_COLIBRI_IMX6ULL_NAND) /* Run Distro Boot script if ubiboot fails */ diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index c34f1f903df..33133a0b96e 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -94,7 +94,7 @@ "ubi part ubi && run m4boot && " \ "ubi read ${kernel_addr_r} kernel && " \ "ubi read ${fdt_addr_r} dtb && " \ - "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ + "bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ #if defined(CONFIG_TARGET_COLIBRI_IMX7_NAND) #define MODULE_EXTRA_ENV_SETTINGS \ diff --git a/include/dt-bindings/clock/imx93-clock.h b/include/dt-bindings/clock/imx93-clock.h index 35a1f62053a..787c9e74dc9 100644 --- a/include/dt-bindings/clock/imx93-clock.h +++ b/include/dt-bindings/clock/imx93-clock.h @@ -203,6 +203,7 @@ #define IMX93_CLK_ARM_PLL 198 #define IMX93_CLK_A55_SEL 199 #define IMX93_CLK_A55_CORE 200 -#define IMX93_CLK_END 201 +#define IMX93_CLK_PDM_IPG 201 +#define IMX93_CLK_END 202 #endif diff --git a/tools/binman/etype/nxp_imx8mimage.py b/tools/binman/etype/nxp_imx8mimage.py new file mode 100644 index 00000000000..3585120b79b --- /dev/null +++ b/tools/binman/etype/nxp_imx8mimage.py @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright 2023-2024 Marek Vasut <marex@denx.de> +# Written with much help from Simon Glass <sjg@chromium.org> +# +# Entry-type module for generating the i.MX8M mkimage -T imx8mimage +# configuration file and invocation of mkimage -T imx8mimage on the +# configuration file and input data. +# + +from collections import OrderedDict + +from binman.entry import Entry +from binman.etype.mkimage import Entry_mkimage +from binman.etype.section import Entry_section +from binman import elf +from dtoc import fdt_util +from u_boot_pylib import tools + +class Entry_nxp_imx8mimage(Entry_mkimage): + """NXP i.MX8M imx8mimage .cfg file generator and mkimage invoker + + Properties / Entry arguments: + - nxp,boot-from - device to boot from (e.g. 'sd') + - nxp,loader-address - loader address (SPL text base) + - nxp,rom-version - BootROM version ('2' for i.MX8M Nano and Plus) + """ + + def __init__(self, section, etype, node): + super().__init__(section, etype, node) + self.required_props = ['nxp,boot-from', 'nxp,rom-version', 'nxp,loader-address'] + + def ReadNode(self): + super().ReadNode() + self.boot_from = fdt_util.GetString(self._node, 'nxp,boot-from') + self.loader_address = fdt_util.GetInt(self._node, 'nxp,loader-address') + self.rom_version = fdt_util.GetInt(self._node, 'nxp,rom-version') + self.ReadEntries() + + def BuildSectionData(self, required): + data, input_fname, uniq = self.collect_contents_to_file( + self._entries.values(), 'input') + # Generate mkimage configuration file similar to imx8mimage.cfg + # and pass it to mkimage to generate SPL image for us here. + cfg_fname = tools.get_output_filename('nxp.imx8mimage.cfg.%s' % uniq) + with open(cfg_fname, 'w') as outf: + print('ROM_VERSION v%d' % self.rom_version, file=outf) + print('BOOT_FROM %s' % self.boot_from, file=outf) + print('LOADER %s %#x' % (input_fname, self.loader_address), file=outf) + + output_fname = tools.get_output_filename(f'cfg-out.{uniq}') + args = ['-d', input_fname, '-n', cfg_fname, '-T', 'imx8mimage', + output_fname] + if self.mkimage.run_cmd(*args) is not None: + return tools.read_file(output_fname) + else: + # Bintool is missing; just use the input data as the output + self.record_missing_bintool(self.mkimage) + return data + + def SetImagePos(self, image_pos): + # Customized SoC specific SetImagePos which skips the mkimage etype + # implementation and removes the 0x48 offset introduced there. That + # offset is only used for uImage/fitImage, which is not the case in + # here. + upto = 0x00 + for entry in super().GetEntries().values(): + entry.SetOffsetSize(upto, None) + + # Give up if any entries lack a size + if entry.size is None: + return + upto += entry.size + + Entry_section.SetImagePos(self, image_pos) |