diff options
39 files changed, 363 insertions, 253 deletions
diff --git a/arch/arm/dts/r8a7790-lager-u-boot.dts b/arch/arm/dts/r8a7790-lager-u-boot.dts index 8a37cb9d9a8..fecf7e77aee 100644 --- a/arch/arm/dts/r8a7790-lager-u-boot.dts +++ b/arch/arm/dts/r8a7790-lager-u-boot.dts @@ -11,3 +11,10 @@ &scif0 { u-boot,dm-pre-reloc; }; + +&qspi { + flash@0 { + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; +}; diff --git a/arch/arm/dts/r8a7790-stout-u-boot.dts b/arch/arm/dts/r8a7790-stout-u-boot.dts index 47982652e8b..1396764d32d 100644 --- a/arch/arm/dts/r8a7790-stout-u-boot.dts +++ b/arch/arm/dts/r8a7790-stout-u-boot.dts @@ -11,3 +11,10 @@ &scifa0 { u-boot,dm-pre-reloc; }; + +&qspi { + flash@0 { + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; +}; diff --git a/arch/arm/dts/r8a7791-koelsch-u-boot.dts b/arch/arm/dts/r8a7791-koelsch-u-boot.dts index 85a5290079f..4a98528099d 100644 --- a/arch/arm/dts/r8a7791-koelsch-u-boot.dts +++ b/arch/arm/dts/r8a7791-koelsch-u-boot.dts @@ -11,3 +11,10 @@ &scif0 { u-boot,dm-pre-reloc; }; + +&qspi { + flash@0 { + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; +}; diff --git a/arch/arm/dts/r8a7791-porter-u-boot.dts b/arch/arm/dts/r8a7791-porter-u-boot.dts index 275f6b43755..82051be824a 100644 --- a/arch/arm/dts/r8a7791-porter-u-boot.dts +++ b/arch/arm/dts/r8a7791-porter-u-boot.dts @@ -16,3 +16,10 @@ status = "okay"; clock-frequency = <400000>; }; + +&qspi { + flash@0 { + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; +}; diff --git a/arch/arm/dts/r8a7793-gose-u-boot.dts b/arch/arm/dts/r8a7793-gose-u-boot.dts index d8e072c36be..a35d35c3357 100644 --- a/arch/arm/dts/r8a7793-gose-u-boot.dts +++ b/arch/arm/dts/r8a7793-gose-u-boot.dts @@ -11,3 +11,10 @@ &scif0 { u-boot,dm-pre-reloc; }; + +&qspi { + flash@0 { + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; +}; diff --git a/arch/arm/dts/r8a7794-alt-u-boot.dts b/arch/arm/dts/r8a7794-alt-u-boot.dts index e6ef23dda31..593a418c3b1 100644 --- a/arch/arm/dts/r8a7794-alt-u-boot.dts +++ b/arch/arm/dts/r8a7794-alt-u-boot.dts @@ -11,3 +11,10 @@ &scif2 { u-boot,dm-pre-reloc; }; + +&qspi { + flash@0 { + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; +}; diff --git a/arch/arm/dts/r8a7794-silk-u-boot.dts b/arch/arm/dts/r8a7794-silk-u-boot.dts index 0e104aa1393..179753d7cf5 100644 --- a/arch/arm/dts/r8a7794-silk-u-boot.dts +++ b/arch/arm/dts/r8a7794-silk-u-boot.dts @@ -11,3 +11,10 @@ &scif2 { u-boot,dm-pre-reloc; }; + +&qspi { + flash@0 { + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; +}; diff --git a/arch/arm/dts/r8a77965-u-boot.dtsi b/arch/arm/dts/r8a77965-u-boot.dtsi index cbd29b3aed6..ca80ef8f29e 100644 --- a/arch/arm/dts/r8a77965-u-boot.dtsi +++ b/arch/arm/dts/r8a77965-u-boot.dtsi @@ -19,103 +19,4 @@ bank-width = <2>; status = "disabled"; }; - - sdhi0: sd@ee100000 { - compatible = "renesas,sdhi-r8a77965"; - reg = <0 0xee100000 0 0x2000>; - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 314>; - max-frequency = <200000000>; - power-domains = <&sysc 32>; - resets = <&cpg 314>; - status = "disabled"; - }; - - sdhi1: sd@ee120000 { - compatible = "renesas,sdhi-r8a77965"; - reg = <0 0xee120000 0 0x2000>; - interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 313>; - max-frequency = <200000000>; - power-domains = <&sysc 32>; - resets = <&cpg 313>; - status = "disabled"; - }; - - sdhi2: sd@ee140000 { - compatible = "renesas,sdhi-r8a77965"; - reg = <0 0xee140000 0 0x2000>; - interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 312>; - max-frequency = <200000000>; - power-domains = <&sysc 32>; - resets = <&cpg 312>; - status = "disabled"; - }; - - sdhi3: sd@ee160000 { - compatible = "renesas,sdhi-r8a77965"; - reg = <0 0xee160000 0 0x2000>; - interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 311>; - max-frequency = <200000000>; - power-domains = <&sysc 32>; - resets = <&cpg 311>; - status = "disabled"; - }; - - ehci0: usb@ee080100 { - compatible = "generic-ehci"; - reg = <0 0xee080100 0 0x100>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>; - phys = <&usb2_phy0>; - phy-names = "usb"; - companion= <&ohci0>; - power-domains = <&sysc 32>; - resets = <&cpg 703>; - }; - - usb2_phy0: usb-phy@ee080200 { - compatible = "renesas,usb2-phy-r8a77965", - "renesas,rcar-gen3-usb2-phy"; - reg = <0 0xee080200 0 0x700>; - interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 703>; - power-domains = <&sysc 32>; - resets = <&cpg 703>; - #phy-cells = <0>; - }; - - ehci1: usb@ee0a0100 { - compatible = "generic-ehci"; - reg = <0 0xee0a0100 0 0x100>; - interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 702>; - phys = <&usb2_phy1>; - phy-names = "usb"; - companion= <&ohci1>; - power-domains = <&sysc 32>; - resets = <&cpg 702>; - }; - - usb2_phy1: usb-phy@ee0a0200 { - compatible = "renesas,usb2-phy-r8a77965", - "renesas,rcar-gen3-usb2-phy"; - reg = <0 0xee0a0200 0 0x700>; - clocks = <&cpg CPG_MOD 702>; - power-domains = <&sysc 32>; - resets = <&cpg 702>; - #phy-cells = <0>; - }; - - xhci0: usb@ee000000 { - compatible = "renesas,xhci-r8a77965", - "renesas,rcar-gen3-xhci"; - reg = <0 0xee000000 0 0xc00>; - interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 328>; - power-domains = <&sysc 32>; - resets = <&cpg 328>; - }; }; diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c index fcf211d62bd..ec8339e0457 100644 --- a/arch/arm/mach-socfpga/misc.c +++ b/arch/arm/mach-socfpga/misc.c @@ -62,8 +62,8 @@ void v7_outer_cache_enable(void) /* Disable the L2 cache */ clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); - writel(0x111, &pl310->pl310_tag_latency_ctrl); - writel(0x121, &pl310->pl310_data_latency_ctrl); + writel(0x0, &pl310->pl310_tag_latency_ctrl); + writel(0x10, &pl310->pl310_data_latency_ctrl); /* enable BRESP, instruction and data prefetch, full line of zeroes */ setbits_le32(&pl310->pl310_aux_ctrl, diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c index c97eacb424f..c8e73d47c0b 100644 --- a/arch/arm/mach-socfpga/spl_a10.c +++ b/arch/arm/mach-socfpga/spl_a10.c @@ -77,6 +77,8 @@ void spl_board_init(void) void board_init_f(ulong dummy) { + dcache_disable(); + socfpga_init_security_policies(); socfpga_sdram_remap_zero(); diff --git a/arch/x86/dts/coreboot.dts b/arch/x86/dts/coreboot.dts index e212f3dc7db..a88da6eafd6 100644 --- a/arch/x86/dts/coreboot.dts +++ b/arch/x86/dts/coreboot.dts @@ -10,6 +10,7 @@ /include/ "skeleton.dtsi" /include/ "serial.dtsi" /include/ "keyboard.dtsi" +/include/ "pcspkr.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts index 2ffcc5f27ec..8938a94e770 100644 --- a/arch/x86/dts/crownbay.dts +++ b/arch/x86/dts/crownbay.dts @@ -10,6 +10,7 @@ /include/ "skeleton.dtsi" /include/ "serial.dtsi" /include/ "keyboard.dtsi" +/include/ "pcspkr.dtsi" /include/ "reset.dtsi" /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" diff --git a/arch/x86/dts/edison.dts b/arch/x86/dts/edison.dts index ca8dfb42872..e8564bbb8a9 100644 --- a/arch/x86/dts/edison.dts +++ b/arch/x86/dts/edison.dts @@ -18,10 +18,12 @@ aliases { serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; }; chosen { - stdout-path = &serial0; + stdout-path = &serial2; }; cpus { @@ -53,7 +55,23 @@ 0x01000000 0x0 0x2000 0x2000 0 0xe000>; }; - serial0: serial@ff010180 { + serial0: serial@ff010080 { + compatible = "intel,mid-uart"; + reg = <0xff010080 0x100>; + reg-shift = <0>; + clock-frequency = <29491200>; + current-speed = <115200>; + }; + + serial1: serial@ff010100 { + compatible = "intel,mid-uart"; + reg = <0xff010100 0x100>; + reg-shift = <0>; + clock-frequency = <29491200>; + current-speed = <115200>; + }; + + serial2: serial@ff010180 { compatible = "intel,mid-uart"; reg = <0xff010180 0x100>; reg-shift = <0>; diff --git a/arch/x86/dts/pcspkr.dtsi b/arch/x86/dts/pcspkr.dtsi new file mode 100644 index 00000000000..934ab1028d1 --- /dev/null +++ b/arch/x86/dts/pcspkr.dtsi @@ -0,0 +1,5 @@ +/ { + pcspkr { + compatible = "i8254,beeper"; + }; +}; diff --git a/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl b/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl index baad98b1c7e..8b5b709045b 100644 --- a/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl +++ b/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl @@ -179,6 +179,9 @@ Device (PCI0) "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 112 } GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly, "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 113 } + + FixedDMA(0x000d, 0x0002, Width32bit, ) + FixedDMA(0x000c, 0x0003, Width32bit, ) }) Method (_CRS, 0, NotSerialized) @@ -219,6 +222,17 @@ Device (PCI0) { Return (STA_VISIBLE) } + + Name (RBUF, ResourceTemplate() + { + FixedDMA(0x0009, 0x0000, Width32bit, ) + FixedDMA(0x0008, 0x0001, Width32bit, ) + }) + + Method (_CRS, 0, NotSerialized) + { + Return (RBUF) + } } Device (I2C6) diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c index 04058a60d75..270274f6b3b 100644 --- a/arch/x86/lib/acpi_table.c +++ b/arch/x86/lib/acpi_table.c @@ -347,7 +347,7 @@ static void acpi_create_spcr(struct acpi_spcr *spcr) uint serial_width; int access_size; int space_id; - int ret; + int ret = -ENODEV; /* Fill out header fields */ acpi_fill_header(header, "SPCR"); @@ -355,8 +355,8 @@ static void acpi_create_spcr(struct acpi_spcr *spcr) header->revision = 2; /* Read the device once, here. It is reused below */ - ret = uclass_first_device_err(UCLASS_SERIAL, &dev); - if (!ret) + dev = gd->cur_serial_dev; + if (dev) ret = serial_getinfo(dev, &serial_info); if (ret) serial_info.type = SERIAL_CHIP_UNKNOWN; diff --git a/arch/x86/lib/i8254.c b/arch/x86/lib/i8254.c index d0227954b16..0f975389103 100644 --- a/arch/x86/lib/i8254.c +++ b/arch/x86/lib/i8254.c @@ -51,6 +51,10 @@ int i8254_enable_beep(uint frequency_hz) if (!frequency_hz) return -EINVAL; + /* make sure i8254 is setup correctly before generating beeps */ + outb(PIT_CMD_CTR2 | PIT_CMD_BOTH | PIT_CMD_MODE3, + PIT_BASE + PIT_COMMAND); + i8254_set_beep_freq(frequency_hz); setio_8(SYSCTL_PORTB, PORTB_BEEP_ENABLE); diff --git a/board/altera/arria10-socdk/Kconfig b/board/altera/arria10-socdk/Kconfig index b80cc6d6f93..621dc97024a 100644 --- a/board/altera/arria10-socdk/Kconfig +++ b/board/altera/arria10-socdk/Kconfig @@ -1,4 +1,4 @@ -if TARGET_SOCFPGA_ARRIA10 +if TARGET_SOCFPGA_ARRIA10_SOCDK config SYS_CPU default "armv7" diff --git a/cmd/thordown.c b/cmd/thordown.c index ce3660d1747..19ae6721d19 100644 --- a/cmd/thordown.c +++ b/cmd/thordown.c @@ -65,7 +65,7 @@ done: U_BOOT_CMD(thordown, CONFIG_SYS_MAXARGS, 1, do_thor_down, "TIZEN \"THOR\" downloader", "<USB_controller> <interface> <dev>\n" - " - device software upgrade via LTHOR TIZEN dowload\n" + " - device software upgrade via LTHOR TIZEN download\n" " program via <USB_controller> on device <dev>,\n" " attached to interface <interface>\n" ); diff --git a/common/image-fdt.c b/common/image-fdt.c index 94089b2215c..01186aeac7a 100644 --- a/common/image-fdt.c +++ b/common/image-fdt.c @@ -71,10 +71,10 @@ static const image_header_t *image_get_fdt(ulong fdt_addr) static void boot_fdt_reserve_region(struct lmb *lmb, uint64_t addr, uint64_t size) { - int ret; + long ret; ret = lmb_reserve(lmb, addr, size); - if (!ret) { + if (ret >= 0) { debug(" reserving fdt memory region: addr=%llx size=%llx\n", (unsigned long long)addr, (unsigned long long)size); } else { diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig index 34c2eb323ef..e0c98247a70 100644 --- a/configs/crownbay_defconfig +++ b/configs/crownbay_defconfig @@ -28,6 +28,7 @@ CONFIG_CMD_DHCP=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y +CONFIG_CMD_SOUND=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y @@ -41,6 +42,8 @@ CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_CPU=y CONFIG_E1000=y +CONFIG_SOUND=y +CONFIG_SOUND_I8254=y CONFIG_SPI=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y diff --git a/configs/porter_defconfig b/configs/porter_defconfig index ce309b6d86e..826f78bb42c 100644 --- a/configs/porter_defconfig +++ b/configs/porter_defconfig @@ -62,6 +62,7 @@ CONFIG_DM_MMC=y CONFIG_RENESAS_SDHI=y CONFIG_MTD=y CONFIG_MTD_DEVICE=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_MTD=y @@ -79,6 +80,7 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_SCIF_CONSOLE=y CONFIG_SPI=y +CONFIG_DM_SPI=y CONFIG_SH_QSPI=y CONFIG_USB=y CONFIG_DM_USB=y diff --git a/configs/silk_defconfig b/configs/silk_defconfig index 0291a7c9815..09196d7bb8e 100644 --- a/configs/silk_defconfig +++ b/configs/silk_defconfig @@ -64,6 +64,7 @@ CONFIG_SH_MMCIF=y CONFIG_RENESAS_SDHI=y CONFIG_MTD=y CONFIG_MTD_DEVICE=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_MTD=y @@ -81,6 +82,7 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_SCIF_CONSOLE=y CONFIG_SPI=y +CONFIG_DM_SPI=y CONFIG_SH_QSPI=y CONFIG_USB=y CONFIG_DM_USB=y diff --git a/configs/stout_defconfig b/configs/stout_defconfig index 1c92cb6117a..552cf55df5d 100644 --- a/configs/stout_defconfig +++ b/configs/stout_defconfig @@ -62,6 +62,7 @@ CONFIG_DM_MMC=y CONFIG_RENESAS_SDHI=y CONFIG_MTD=y CONFIG_MTD_DEVICE=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_MTD=y @@ -79,6 +80,7 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_SCIF_CONSOLE=y CONFIG_SPI=y +CONFIG_DM_SPI=y CONFIG_SH_QSPI=y CONFIG_USB=y CONFIG_DM_USB=y diff --git a/drivers/ddr/altera/sdram_arria10.c b/drivers/ddr/altera/sdram_arria10.c index 29ea7492f30..1777e7e1a50 100644 --- a/drivers/ddr/altera/sdram_arria10.c +++ b/drivers/ddr/altera/sdram_arria10.c @@ -31,7 +31,6 @@ static u64 sdram_size_calc(void); #define DDR_REG_CORE2SEQ 0xFFD05078 #define DDR_READ_LATENCY_DELAY 40 #define DDR_SIZE_2GB_HEX 0x80000000 -#define DDR_MAX_TRIES 0x00100000 #define IO48_MMR_DRAMSTS 0xFFCFA0EC #define IO48_MMR_NIOS2_RESERVE0 0xFFCFA110 @@ -103,52 +102,18 @@ static int match_ddr_conf(u32 ddr_conf) return 0; } -/* Check whether SDRAM is successfully Calibrated */ -static int is_sdram_cal_success(void) -{ - return readl(&socfpga_ecc_hmc_base->ddrcalstat); -} - -static unsigned char ddr_get_bit(u32 ereg, unsigned char bit) -{ - u32 reg = readl(ereg); - - return (reg & BIT(bit)) ? 1 : 0; -} - -static unsigned char ddr_wait_bit(u32 ereg, u32 bit, - u32 expected, u32 timeout_usec) -{ - u32 tmr; - - for (tmr = 0; tmr < timeout_usec; tmr += 100) { - udelay(100); - WATCHDOG_RESET(); - if (ddr_get_bit(ereg, bit) == expected) - return 0; - } - - return 1; -} - static int emif_clear(void) { - u32 i = DDR_MAX_TRIES; - u8 ret = 0; - writel(0, DDR_REG_CORE2SEQ); - do { - ret = !wait_for_bit_le32((u32 *)DDR_REG_SEQ2CORE, - SEQ2CORE_MASK, 1, 50, 0); - } while (ret && (--i > 0)); - - return !i; + return wait_for_bit_le32((u32 *)DDR_REG_SEQ2CORE, + SEQ2CORE_MASK, 0, 1000, 0); } static int emif_reset(void) { u32 c2s, s2c; + int ret; c2s = readl(DDR_REG_CORE2SEQ); s2c = readl(DDR_REG_SEQ2CORE); @@ -159,21 +124,28 @@ static int emif_reset(void) readl(IO48_MMR_NIOS2_RESERVE2), readl(IO48_MMR_DRAMSTS)); - if ((s2c & SEQ2CORE_MASK) && emif_clear()) { - debug("failed emif_clear()\n"); - return -EPERM; + if (s2c & SEQ2CORE_MASK) { + ret = emif_clear(); + if (ret) { + debug("failed emif_clear()\n"); + return -EPERM; + } } writel(CORE2SEQ_INT_REQ, DDR_REG_CORE2SEQ); - if (ddr_wait_bit(DDR_REG_SEQ2CORE, SEQ2CORE_INT_RESP_BIT, 0, 1000000)) { + ret = wait_for_bit_le32((u32 *)DDR_REG_SEQ2CORE, + SEQ2CORE_INT_RESP_BIT, false, 1000, false); + if (ret) { debug("emif_reset failed to see interrupt acknowledge\n"); - return -EPERM; - } else { - debug("emif_reset interrupt acknowledged\n"); + emif_clear(); + return ret; } - if (emif_clear()) { + mdelay(1); + + ret = emif_clear(); + if (ret) { debug("emif_clear() failed\n"); return -EPERM; } @@ -189,30 +161,23 @@ static int emif_reset(void) static int ddr_setup(void) { - int i, j, ddr_setup_complete = 0; - - /* Try 3 times to do a calibration */ - for (i = 0; (i < 3) && !ddr_setup_complete; i++) { - WATCHDOG_RESET(); - - /* A delay to wait for calibration bit to set */ - for (j = 0; (j < 10) && !ddr_setup_complete; j++) { - mdelay(500); - ddr_setup_complete = is_sdram_cal_success(); - } - - if (!ddr_setup_complete) - if (emif_reset()) - puts("Error: Failed to reset EMIF\n"); - } + int i, ret; + + /* Try 32 times to do a calibration */ + for (i = 0; i < 32; i++) { + mdelay(500); + ret = wait_for_bit_le32(&socfpga_ecc_hmc_base->ddrcalstat, + BIT(0), true, 500, false); + if (!ret) + return 0; - /* After 3 times trying calibration */ - if (!ddr_setup_complete) { - puts("Error: Could Not Calibrate SDRAM\n"); - return -EPERM; + ret = emif_reset(); + if (ret) + puts("Error: Failed to reset EMIF\n"); } - return 0; + puts("Error: Could Not Calibrate SDRAM\n"); + return -EPERM; } static int sdram_is_ecc_enabled(void) @@ -270,7 +235,7 @@ static u64 sdram_size_calc(void) size *= (2 << (readl(&socfpga_ecc_hmc_base->ddrioctrl) & ALT_ECC_HMC_OCP_DDRIOCTRL_IO_SIZE_MSK)); - debug("SDRAM size=%llu", size); + debug("SDRAM size=%llu\n", size); return size; } @@ -304,7 +269,7 @@ static void sdram_mmr_init(void) * bit[9:6] = Minor Release # * bit[14:10] = Major Release # */ - if ((socfpga_io48_mmr_base->niosreserve1 >> 6) & 0x1FF) { + if ((readl(&socfpga_io48_mmr_base->niosreserve1) >> 6) & 0x1FF) { update_value = readl(&socfpga_io48_mmr_base->niosreserve0); writel(((update_value & 0xFF) >> 5), &socfpga_ecc_hmc_base->ddrioctrl); @@ -394,7 +359,7 @@ static void sdram_mmr_init(void) caltim0_cfg_act_to_rdwr - (ctrlcfg0_cfg_ctrl_burst_len >> 2)); - io48_value = ((((socfpga_io48_mmr_base->dramtiming0 & + io48_value = ((((readl(&socfpga_io48_mmr_base->dramtiming0) & ALT_IO48_DRAMTIME_MEM_READ_LATENCY_MASK) + 2 + 15 + (ctrlcfg0_cfg_ctrl_burst_len >> 1)) >> 1) - /* Up to here was in memory cycles so divide by 2 */ @@ -424,7 +389,7 @@ static void sdram_mmr_init(void) &socfpga_noc_ddr_scheduler_base->ddr_t_main_scheduler_ddrmode); /* Configure the read latency [0xFFD12414] */ - writel(((socfpga_io48_mmr_base->dramtiming0 & + writel(((readl(&socfpga_io48_mmr_base->dramtiming0) & ALT_IO48_DRAMTIME_MEM_READ_LATENCY_MASK) >> 1) + DDR_READ_LATENCY_DELAY, &socfpga_noc_ddr_scheduler_base-> diff --git a/drivers/i2c/i2c-cdns.c b/drivers/i2c/i2c-cdns.c index 4330d28c2b0..1af94d17614 100644 --- a/drivers/i2c/i2c-cdns.c +++ b/drivers/i2c/i2c-cdns.c @@ -64,12 +64,24 @@ struct cdns_i2c_regs { #define CDNS_I2C_INTERRUPT_RXUNF 0x00000080 #define CDNS_I2C_INTERRUPT_ARBLOST 0x00000200 +#define CDNS_I2C_INTERRUPTS_MASK (CDNS_I2C_INTERRUPT_COMP | \ + CDNS_I2C_INTERRUPT_DATA | \ + CDNS_I2C_INTERRUPT_NACK | \ + CDNS_I2C_INTERRUPT_TO | \ + CDNS_I2C_INTERRUPT_SLVRDY | \ + CDNS_I2C_INTERRUPT_RXOVF | \ + CDNS_I2C_INTERRUPT_TXOVF | \ + CDNS_I2C_INTERRUPT_RXUNF | \ + CDNS_I2C_INTERRUPT_ARBLOST) + #define CDNS_I2C_FIFO_DEPTH 16 #define CDNS_I2C_TRANSFER_SIZE_MAX 255 /* Controller transfer limit */ #define CDNS_I2C_TRANSFER_SIZE (CDNS_I2C_TRANSFER_SIZE_MAX - 3) #define CDNS_I2C_BROKEN_HOLD_BIT BIT(0) +#define CDNS_I2C_ARB_LOST_MAX_RETRIES 10 + #ifdef DEBUG static void cdns_i2c_debug_status(struct cdns_i2c_regs *cdns_i2c) { @@ -224,11 +236,17 @@ static int cdns_i2c_set_bus_speed(struct udevice *dev, unsigned int speed) return 0; } +static inline u32 is_arbitration_lost(struct cdns_i2c_regs *regs) +{ + return (readl(®s->interrupt_status) & CDNS_I2C_INTERRUPT_ARBLOST); +} + static int cdns_i2c_write_data(struct i2c_cdns_bus *i2c_bus, u32 addr, u8 *data, u32 len) { u8 *cur_data = data; struct cdns_i2c_regs *regs = i2c_bus->regs; + u32 ret; /* Set the controller in Master transmit mode and clear FIFO */ setbits_le32(®s->control, CDNS_I2C_CONTROL_CLR_FIFO); @@ -241,29 +259,42 @@ static int cdns_i2c_write_data(struct i2c_cdns_bus *i2c_bus, u32 addr, u8 *data, setbits_le32(®s->control, CDNS_I2C_CONTROL_HOLD); /* Clear the interrupts in status register */ - writel(0xFF, ®s->interrupt_status); + writel(CDNS_I2C_INTERRUPTS_MASK, ®s->interrupt_status); writel(addr, ®s->address); - while (len--) { + while (len-- && !is_arbitration_lost(regs)) { writel(*(cur_data++), ®s->data); if (readl(®s->transfer_size) == CDNS_I2C_FIFO_DEPTH) { - if (!cdns_i2c_wait(regs, CDNS_I2C_INTERRUPT_COMP)) { - /* Release the bus */ - clrbits_le32(®s->control, - CDNS_I2C_CONTROL_HOLD); - return -ETIMEDOUT; - } + ret = cdns_i2c_wait(regs, CDNS_I2C_INTERRUPT_COMP | + CDNS_I2C_INTERRUPT_ARBLOST); + if (ret & CDNS_I2C_INTERRUPT_ARBLOST) + return -EAGAIN; + if (ret & CDNS_I2C_INTERRUPT_COMP) + continue; + /* Release the bus */ + clrbits_le32(®s->control, + CDNS_I2C_CONTROL_HOLD); + return -ETIMEDOUT; } } + if (len && is_arbitration_lost(regs)) + return -EAGAIN; + /* All done... release the bus */ if (!i2c_bus->hold_flag) clrbits_le32(®s->control, CDNS_I2C_CONTROL_HOLD); /* Wait for the address and data to be sent */ - if (!cdns_i2c_wait(regs, CDNS_I2C_INTERRUPT_COMP)) + ret = cdns_i2c_wait(regs, CDNS_I2C_INTERRUPT_COMP | + CDNS_I2C_INTERRUPT_ARBLOST); + if (!(ret & (CDNS_I2C_INTERRUPT_ARBLOST | + CDNS_I2C_INTERRUPT_COMP))) return -ETIMEDOUT; + if (ret & CDNS_I2C_INTERRUPT_ARBLOST) + return -EAGAIN; + return 0; } @@ -279,6 +310,7 @@ static int cdns_i2c_read_data(struct i2c_cdns_bus *i2c_bus, u32 addr, u8 *data, struct cdns_i2c_regs *regs = i2c_bus->regs; int curr_recv_count; int updatetx, hold_quirk; + u32 ret; /* Check the hardware can handle the requested bytes */ if ((recv_count < 0)) @@ -307,7 +339,7 @@ static int cdns_i2c_read_data(struct i2c_cdns_bus *i2c_bus, u32 addr, u8 *data, hold_quirk = (i2c_bus->quirks & CDNS_I2C_BROKEN_HOLD_BIT) && updatetx; - while (recv_count) { + while (recv_count && !is_arbitration_lost(regs)) { while (readl(®s->status) & CDNS_I2C_STATUS_RXDV) { if (recv_count < CDNS_I2C_FIFO_DEPTH && !i2c_bus->hold_flag) { @@ -356,8 +388,13 @@ static int cdns_i2c_read_data(struct i2c_cdns_bus *i2c_bus, u32 addr, u8 *data, } /* Wait for the address and data to be sent */ - if (!cdns_i2c_wait(regs, CDNS_I2C_INTERRUPT_COMP)) + ret = cdns_i2c_wait(regs, CDNS_I2C_INTERRUPT_COMP | + CDNS_I2C_INTERRUPT_ARBLOST); + if (!(ret & (CDNS_I2C_INTERRUPT_ARBLOST | + CDNS_I2C_INTERRUPT_COMP))) return -ETIMEDOUT; + if (ret & CDNS_I2C_INTERRUPT_ARBLOST) + return -EAGAIN; return 0; } @@ -366,8 +403,11 @@ static int cdns_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs) { struct i2c_cdns_bus *i2c_bus = dev_get_priv(dev); - int ret, count; + int ret = 0; + int count; bool hold_quirk; + struct i2c_msg *message = msg; + int num_msgs = nmsgs; hold_quirk = !!(i2c_bus->quirks & CDNS_I2C_BROKEN_HOLD_BIT); @@ -393,7 +433,8 @@ static int cdns_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, } debug("i2c_xfer: %d messages\n", nmsgs); - for (; nmsgs > 0; nmsgs--, msg++) { + for (u8 retry = 0; retry < CDNS_I2C_ARB_LOST_MAX_RETRIES && + nmsgs > 0; nmsgs--, msg++) { debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len); if (msg->flags & I2C_M_RD) { ret = cdns_i2c_read_data(i2c_bus, msg->addr, msg->buf, @@ -402,13 +443,22 @@ static int cdns_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, ret = cdns_i2c_write_data(i2c_bus, msg->addr, msg->buf, msg->len); } + if (ret == -EAGAIN) { + msg = message; + nmsgs = num_msgs; + retry++; + printf("%s,arbitration lost, retrying:%d\n", __func__, + retry); + continue; + } + if (ret) { debug("i2c_write: error sending\n"); return -EREMOTEIO; } } - return 0; + return ret; } static int cdns_i2c_ofdata_to_platdata(struct udevice *dev) diff --git a/drivers/i2c/rcar_i2c.c b/drivers/i2c/rcar_i2c.c index 8d87c737136..2ebae349ed3 100644 --- a/drivers/i2c/rcar_i2c.c +++ b/drivers/i2c/rcar_i2c.c @@ -18,39 +18,52 @@ #include <asm/io.h> #include <wait_bit.h> -#define RCAR_I2C_ICSCR 0x00 -#define RCAR_I2C_ICMCR 0x04 -#define RCAR_I2C_ICMCR_MDBS BIT(7) -#define RCAR_I2C_ICMCR_FSCL BIT(6) -#define RCAR_I2C_ICMCR_FSDA BIT(5) -#define RCAR_I2C_ICMCR_OBPC BIT(4) -#define RCAR_I2C_ICMCR_MIE BIT(3) +#define RCAR_I2C_ICSCR 0x00 /* slave ctrl */ +#define RCAR_I2C_ICMCR 0x04 /* master ctrl */ +#define RCAR_I2C_ICMCR_MDBS BIT(7) /* non-fifo mode switch */ +#define RCAR_I2C_ICMCR_FSCL BIT(6) /* override SCL pin */ +#define RCAR_I2C_ICMCR_FSDA BIT(5) /* override SDA pin */ +#define RCAR_I2C_ICMCR_OBPC BIT(4) /* override pins */ +#define RCAR_I2C_ICMCR_MIE BIT(3) /* master if enable */ #define RCAR_I2C_ICMCR_TSBE BIT(2) -#define RCAR_I2C_ICMCR_FSB BIT(1) -#define RCAR_I2C_ICMCR_ESG BIT(0) -#define RCAR_I2C_ICSSR 0x08 -#define RCAR_I2C_ICMSR 0x0c +#define RCAR_I2C_ICMCR_FSB BIT(1) /* force stop bit */ +#define RCAR_I2C_ICMCR_ESG BIT(0) /* enable start bit gen */ +#define RCAR_I2C_ICSSR 0x08 /* slave status */ +#define RCAR_I2C_ICMSR 0x0c /* master status */ #define RCAR_I2C_ICMSR_MASK 0x7f -#define RCAR_I2C_ICMSR_MNR BIT(6) -#define RCAR_I2C_ICMSR_MAL BIT(5) -#define RCAR_I2C_ICMSR_MST BIT(4) +#define RCAR_I2C_ICMSR_MNR BIT(6) /* Nack */ +#define RCAR_I2C_ICMSR_MAL BIT(5) /* Arbitration lost */ +#define RCAR_I2C_ICMSR_MST BIT(4) /* Stop */ #define RCAR_I2C_ICMSR_MDE BIT(3) #define RCAR_I2C_ICMSR_MDT BIT(2) #define RCAR_I2C_ICMSR_MDR BIT(1) #define RCAR_I2C_ICMSR_MAT BIT(0) -#define RCAR_I2C_ICSIER 0x10 -#define RCAR_I2C_ICMIER 0x14 -#define RCAR_I2C_ICCCR 0x18 +#define RCAR_I2C_ICSIER 0x10 /* slave irq enable */ +#define RCAR_I2C_ICMIER 0x14 /* master irq enable */ +#define RCAR_I2C_ICCCR 0x18 /* clock dividers */ #define RCAR_I2C_ICCCR_SCGD_OFF 3 -#define RCAR_I2C_ICSAR 0x1c -#define RCAR_I2C_ICMAR 0x20 -#define RCAR_I2C_ICRXD_ICTXD 0x24 +#define RCAR_I2C_ICSAR 0x1c /* slave address */ +#define RCAR_I2C_ICMAR 0x20 /* master address */ +#define RCAR_I2C_ICRXD_ICTXD 0x24 /* data port */ +/* + * First Bit Setup Cycle (Gen3). + * Defines 1st bit delay between SDA and SCL. + */ +#define RCAR_I2C_ICFBSCR 0x38 +#define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc */ + + +enum rcar_i2c_type { + RCAR_I2C_TYPE_GEN2, + RCAR_I2C_TYPE_GEN3, +}; struct rcar_i2c_priv { void __iomem *base; struct clk clk; u32 intdelay; u32 icccr; + enum rcar_i2c_type type; }; static int rcar_i2c_finish(struct udevice *dev) @@ -68,12 +81,13 @@ static int rcar_i2c_finish(struct udevice *dev) return ret; } -static void rcar_i2c_recover(struct udevice *dev) +static int rcar_i2c_recover(struct udevice *dev) { struct rcar_i2c_priv *priv = dev_get_priv(dev); u32 mcr = RCAR_I2C_ICMCR_MDBS | RCAR_I2C_ICMCR_OBPC; u32 mcra = mcr | RCAR_I2C_ICMCR_FSDA; int i; + u32 mstat; /* Send 9 SCL pulses */ for (i = 0; i < 9; i++) { @@ -93,6 +107,9 @@ static void rcar_i2c_recover(struct udevice *dev) udelay(5); writel(mcra | RCAR_I2C_ICMCR_FSCL, priv->base + RCAR_I2C_ICMCR); udelay(5); + + mstat = readl(priv->base + RCAR_I2C_ICMSR); + return mstat & RCAR_I2C_ICMCR_FSDA ? -EBUSY : 0; } static int rcar_i2c_set_addr(struct udevice *dev, u8 chip, u8 read) @@ -100,7 +117,6 @@ static int rcar_i2c_set_addr(struct udevice *dev, u8 chip, u8 read) struct rcar_i2c_priv *priv = dev_get_priv(dev); u32 mask = RCAR_I2C_ICMSR_MAT | (read ? RCAR_I2C_ICMSR_MDR : RCAR_I2C_ICMSR_MDE); - u32 val; int ret; writel(0, priv->base + RCAR_I2C_ICMIER); @@ -108,21 +124,22 @@ static int rcar_i2c_set_addr(struct udevice *dev, u8 chip, u8 read) writel(0, priv->base + RCAR_I2C_ICMSR); writel(priv->icccr, priv->base + RCAR_I2C_ICCCR); + /* Wait for the bus */ ret = wait_for_bit_le32(priv->base + RCAR_I2C_ICMCR, RCAR_I2C_ICMCR_FSDA, false, 2, true); if (ret) { - rcar_i2c_recover(dev); - val = readl(priv->base + RCAR_I2C_ICMSR); - if (val & RCAR_I2C_ICMCR_FSDA) { + if (rcar_i2c_recover(dev)) { dev_err(dev, "Bus busy, aborting\n"); return ret; } } writel((chip << 1) | read, priv->base + RCAR_I2C_ICMAR); - writel(0, priv->base + RCAR_I2C_ICMSR); + /* Reset */ writel(RCAR_I2C_ICMCR_MDBS | RCAR_I2C_ICMCR_MIE | RCAR_I2C_ICMCR_ESG, priv->base + RCAR_I2C_ICMCR); + /* Clear Status */ + writel(0, priv->base + RCAR_I2C_ICMSR); ret = wait_for_bit_le32(priv->base + RCAR_I2C_ICMSR, mask, true, 100, true); @@ -142,16 +159,12 @@ static int rcar_i2c_read_common(struct udevice *dev, struct i2c_msg *msg) u32 icmcr = RCAR_I2C_ICMCR_MDBS | RCAR_I2C_ICMCR_MIE; int i, ret = -EREMOTEIO; - ret = rcar_i2c_set_addr(dev, msg->addr, 1); - if (ret) - return ret; - for (i = 0; i < msg->len; i++) { if (msg->len - 1 == i) icmcr |= RCAR_I2C_ICMCR_FSB; writel(icmcr, priv->base + RCAR_I2C_ICMCR); - writel(~RCAR_I2C_ICMSR_MDR, priv->base + RCAR_I2C_ICMSR); + writel((u32)~RCAR_I2C_ICMSR_MDR, priv->base + RCAR_I2C_ICMSR); ret = wait_for_bit_le32(priv->base + RCAR_I2C_ICMSR, RCAR_I2C_ICMSR_MDR, true, 100, true); @@ -161,7 +174,7 @@ static int rcar_i2c_read_common(struct udevice *dev, struct i2c_msg *msg) msg->buf[i] = readl(priv->base + RCAR_I2C_ICRXD_ICTXD) & 0xff; } - writel(~RCAR_I2C_ICMSR_MDR, priv->base + RCAR_I2C_ICMSR); + writel((u32)~RCAR_I2C_ICMSR_MDR, priv->base + RCAR_I2C_ICMSR); return rcar_i2c_finish(dev); } @@ -172,14 +185,10 @@ static int rcar_i2c_write_common(struct udevice *dev, struct i2c_msg *msg) u32 icmcr = RCAR_I2C_ICMCR_MDBS | RCAR_I2C_ICMCR_MIE; int i, ret = -EREMOTEIO; - ret = rcar_i2c_set_addr(dev, msg->addr, 0); - if (ret) - return ret; - for (i = 0; i < msg->len; i++) { writel(msg->buf[i], priv->base + RCAR_I2C_ICRXD_ICTXD); writel(icmcr, priv->base + RCAR_I2C_ICMCR); - writel(~RCAR_I2C_ICMSR_MDE, priv->base + RCAR_I2C_ICMSR); + writel((u32)~RCAR_I2C_ICMSR_MDE, priv->base + RCAR_I2C_ICMSR); ret = wait_for_bit_le32(priv->base + RCAR_I2C_ICMSR, RCAR_I2C_ICMSR_MDE, true, 100, true); @@ -187,7 +196,7 @@ static int rcar_i2c_write_common(struct udevice *dev, struct i2c_msg *msg) return ret; } - writel(~RCAR_I2C_ICMSR_MDE, priv->base + RCAR_I2C_ICMSR); + writel((u32)~RCAR_I2C_ICMSR_MDE, priv->base + RCAR_I2C_ICMSR); icmcr |= RCAR_I2C_ICMCR_FSB; writel(icmcr, priv->base + RCAR_I2C_ICMCR); @@ -199,16 +208,20 @@ static int rcar_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs) int ret; for (; nmsgs > 0; nmsgs--, msg++) { + ret = rcar_i2c_set_addr(dev, msg->addr, 1); + if (ret) + return ret; + if (msg->flags & I2C_M_RD) ret = rcar_i2c_read_common(dev, msg); else ret = rcar_i2c_write_common(dev, msg); if (ret) - return -EREMOTEIO; + return ret; } - return ret; + return 0; } static int rcar_i2c_probe_chip(struct udevice *dev, uint addr, uint flags) @@ -293,6 +306,11 @@ scgd_find: priv->icccr = (scgd << RCAR_I2C_ICCCR_SCGD_OFF) | cdf; writel(priv->icccr, priv->base + RCAR_I2C_ICCCR); + if (priv->type == RCAR_I2C_TYPE_GEN3) { + /* Set SCL/SDA delay */ + writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR); + } + return 0; } @@ -304,6 +322,7 @@ static int rcar_i2c_probe(struct udevice *dev) priv->base = dev_read_addr_ptr(dev); priv->intdelay = dev_read_u32_default(dev, "i2c-scl-internal-delay-ns", 5); + priv->type = dev_get_driver_data(dev); ret = clk_get_by_index(dev, 0, &priv->clk); if (ret) @@ -339,7 +358,8 @@ static const struct dm_i2c_ops rcar_i2c_ops = { }; static const struct udevice_id rcar_i2c_ids[] = { - { .compatible = "renesas,rcar-gen2-i2c" }, + { .compatible = "renesas,rcar-gen2-i2c", .data = RCAR_I2C_TYPE_GEN2 }, + { .compatible = "renesas,rcar-gen3-i2c", .data = RCAR_I2C_TYPE_GEN3 }, { } }; diff --git a/drivers/i2c/rcar_iic.c b/drivers/i2c/rcar_iic.c index e91fc86c1ac..9d45f547d15 100644 --- a/drivers/i2c/rcar_iic.c +++ b/drivers/i2c/rcar_iic.c @@ -58,12 +58,14 @@ static void sh_irq_dte(struct udevice *dev) static int sh_irq_dte_with_tack(struct udevice *dev) { struct rcar_iic_priv *priv = dev_get_priv(dev); + u8 icsr; int i; for (i = 0; i < IRQ_WAIT; i++) { - if (RCAR_IC_DTE & readb(priv->base + RCAR_IIC_ICSR)) + icsr = readb(priv->base + RCAR_IIC_ICSR); + if (RCAR_IC_DTE & icsr) break; - if (RCAR_IC_TACK & readb(priv->base + RCAR_IIC_ICSR)) + if (RCAR_IC_TACK & icsr) return -ETIMEDOUT; udelay(10); } diff --git a/include/configs/qemu-arm.h b/include/configs/qemu-arm.h index 0431a7982d1..65fdb1e9298 100644 --- a/include/configs/qemu-arm.h +++ b/include/configs/qemu-arm.h @@ -25,6 +25,7 @@ #define CONFIG_ENV_SIZE SZ_256K #define BOOT_TARGET_DEVICES(func) \ + func(USB, usb, 0) \ func(SCSI, scsi, 0) \ func(VIRTIO, virtio, 0) \ func(DHCP, dhcp, na) diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h index d606da8b0ec..9213d33e217 100644 --- a/include/configs/rcar-gen2-common.h +++ b/include/configs/rcar-gen2-common.h @@ -53,6 +53,8 @@ /* SF MTD */ #if defined(CONFIG_SPI_FLASH_MTD) && !defined(CONFIG_SPL_BUILD) #else +#undef CONFIG_DM_SPI +#undef CONFIG_DM_SPI_FLASH #undef CONFIG_SPI_FLASH_MTD #endif diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index 06d5d3219ca..20f982165dd 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -48,7 +48,6 @@ #define CONFIG_SYS_MONITOR_BASE 0x00000000 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) -#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* ENV setting */ diff --git a/include/configs/socfpga_arria10_socdk.h b/include/configs/socfpga_arria10_socdk.h index 58e446b60a9..0f116fbf2d9 100644 --- a/include/configs/socfpga_arria10_socdk.h +++ b/include/configs/socfpga_arria10_socdk.h @@ -15,8 +15,6 @@ /* * U-Boot general configurations */ -/* Cache options */ -#define CONFIG_SYS_DCACHE_OFF /* Memory configurations */ #define PHYS_SDRAM_1_SIZE 0x40000000 diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index c9cbf8f5e37..181af9b646a 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -275,13 +275,20 @@ unsigned int cm_get_qspi_controller_clk_hz(void); /* SPL QSPI boot support */ #ifdef CONFIG_SPL_SPI_SUPPORT +#if defined(CONFIG_TARGET_SOCFPGA_GEN5) #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000 +#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000 +#endif #endif /* SPL NAND boot support */ #ifdef CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 +#if defined(CONFIG_TARGET_SOCFPGA_GEN5) #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 +#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x100000 +#endif #endif /* diff --git a/test/image/test-imagetools.sh b/test/image/test-imagetools.sh index 256af71d42a..907f46a7b51 100755 --- a/test/image/test-imagetools.sh +++ b/test/image/test-imagetools.sh @@ -102,10 +102,10 @@ create_multi_image() extract_multi_image() { echo -e "\nExtracting multi-file image contents..." - do_cmd ${DUMPIMAGE} -T multi -i ${IMAGE_MULTI} -p 0 ${DATAFILE0} - do_cmd ${DUMPIMAGE} -T multi -i ${IMAGE_MULTI} -p 1 ${DATAFILE1} - do_cmd ${DUMPIMAGE} -T multi -i ${IMAGE_MULTI} -p 2 ${DATAFILE2} - do_cmd ${DUMPIMAGE} -T multi -i ${IMAGE_MULTI} -p 2 ${DATAFILE2} -o ${TEST_OUT} + do_cmd ${DUMPIMAGE} -T multi -p 0 -o ${DATAFILE0} ${IMAGE_MULTI} + do_cmd ${DUMPIMAGE} -T multi -p 1 -o ${DATAFILE1} ${IMAGE_MULTI} + do_cmd ${DUMPIMAGE} -T multi -p 2 -o ${DATAFILE2} ${IMAGE_MULTI} + do_cmd ${DUMPIMAGE} -T multi -p 2 -o ${TEST_OUT} ${IMAGE_MULTI} echo "done." } @@ -166,10 +166,10 @@ create_fit_image() extract_fit_image() { echo -e "\nExtracting FIT image contents..." - do_cmd ${DUMPIMAGE} -T flat_dt -i ${IMAGE_FIT_ITB} -p 0 ${DATAFILE0} - do_cmd ${DUMPIMAGE} -T flat_dt -i ${IMAGE_FIT_ITB} -p 1 ${DATAFILE1} - do_cmd ${DUMPIMAGE} -T flat_dt -i ${IMAGE_FIT_ITB} -p 2 ${DATAFILE2} - do_cmd ${DUMPIMAGE} -T flat_dt -i ${IMAGE_FIT_ITB} -p 2 ${DATAFILE2} -o ${TEST_OUT} + do_cmd ${DUMPIMAGE} -T flat_dt -p 0 -o ${DATAFILE0} ${IMAGE_FIT_ITB} + do_cmd ${DUMPIMAGE} -T flat_dt -p 1 -o ${DATAFILE1} ${IMAGE_FIT_ITB} + do_cmd ${DUMPIMAGE} -T flat_dt -p 2 -o ${DATAFILE2} ${IMAGE_FIT_ITB} + do_cmd ${DUMPIMAGE} -T flat_dt -p 2 -o ${TEST_OUT} ${IMAGE_FIT_ITB} echo "done." } diff --git a/tools/fit_common.c b/tools/fit_common.c index d96085eaad3..9506390214c 100644 --- a/tools/fit_common.c +++ b/tools/fit_common.c @@ -26,7 +26,10 @@ int fit_verify_header(unsigned char *ptr, int image_size, struct image_tool_params *params) { - return fdt_check_header(ptr); + if (fdt_check_header(ptr) != EXIT_SUCCESS || !fit_check_format(ptr)) + return EXIT_FAILURE; + + return EXIT_SUCCESS; } int fit_check_image_types(uint8_t type) diff --git a/tools/fit_common.h b/tools/fit_common.h index 71e792e3c48..9e09624f64e 100644 --- a/tools/fit_common.h +++ b/tools/fit_common.h @@ -10,6 +10,14 @@ #include "mkimage.h" #include <image.h> +/** + * Verify the format of FIT header pointed to by ptr + * + * @ptr: image header to be verified + * @image_size: size of while image + * @params: mkimage parameters + * @return 0 if OK, -1 on error + */ int fit_verify_header(unsigned char *ptr, int image_size, struct image_tool_params *params); diff --git a/tools/imagetool.c b/tools/imagetool.c index b3e628f612f..ba1f64aa377 100644 --- a/tools/imagetool.c +++ b/tools/imagetool.c @@ -46,7 +46,7 @@ int imagetool_verify_print_header( if (retval == 0) { /* - * Print the image information if verify is + * Print the image information if verify is * successful */ if ((*curr)->print_header) { @@ -65,6 +65,38 @@ int imagetool_verify_print_header( return retval; } +int imagetool_verify_print_header_by_type( + void *ptr, + struct stat *sbuf, + struct image_type_params *tparams, + struct image_tool_params *params) +{ + int retval; + + retval = tparams->verify_header((unsigned char *)ptr, sbuf->st_size, + params); + + if (retval == 0) { + /* + * Print the image information if verify is successful + */ + if (tparams->print_header) { + if (!params->quiet) + tparams->print_header(ptr); + } else { + fprintf(stderr, + "%s: print_header undefined for %s\n", + params->cmdname, tparams->name); + } + } else { + fprintf(stderr, + "%s: verify_header failed for %s with exit code %d\n", + params->cmdname, tparams->name, retval); + } + + return retval; +} + int imagetool_save_subimage( const char *file_name, ulong file_data, diff --git a/tools/imagetool.h b/tools/imagetool.h index 71471420f9c..2689a4004a7 100644 --- a/tools/imagetool.h +++ b/tools/imagetool.h @@ -179,6 +179,25 @@ int imagetool_verify_print_header( struct image_type_params *tparams, struct image_tool_params *params); +/* + * imagetool_verify_print_header_by_type() - verifies the image header + * + * Verify the image_header for the image type given by tparams. + * If verification is successful, this prints the respective header. + * @ptr: pointer the the image header + * @sbuf: stat information about the file pointed to by ptr + * @tparams: image type parameters + * @params: mkimage parameters + * + * @return 0 on success, negative if input image format does not match with + * the given image type + */ +int imagetool_verify_print_header_by_type( + void *ptr, + struct stat *sbuf, + struct image_type_params *tparams, + struct image_tool_params *params); + /** * imagetool_save_subimage - store data into a file * @file_name: name of the destination file diff --git a/tools/mkimage.c b/tools/mkimage.c index ea5ed542ab9..2899adff810 100644 --- a/tools/mkimage.c +++ b/tools/mkimage.c @@ -409,7 +409,7 @@ int main(int argc, char **argv) * Print the image information for matched image type * Returns the error code if not matched */ - retval = imagetool_verify_print_header(ptr, &sbuf, + retval = imagetool_verify_print_header_by_type(ptr, &sbuf, tparams, ¶ms); (void) munmap((void *)ptr, sbuf.st_size); |