diff options
| -rw-r--r-- | arch/arm/include/asm/arch-sunxi/boot0.h | 7 | ||||
| -rw-r--r-- | arch/arm/mach-sunxi/Kconfig | 12 |
2 files changed, 14 insertions, 5 deletions
diff --git a/arch/arm/include/asm/arch-sunxi/boot0.h b/arch/arm/include/asm/arch-sunxi/boot0.h index 46b7e073b59..59ea75a96b5 100644 --- a/arch/arm/include/asm/arch-sunxi/boot0.h +++ b/arch/arm/include/asm/arch-sunxi/boot0.h @@ -39,11 +39,8 @@ .word 0xf57ff06f // isb sy .word 0xe320f003 // wfi .word 0xeafffffd // b @wfi -#ifndef CONFIG_SUN50I_GEN_H6 - .word 0x017000a0 // writeable RVBAR mapping address -#else - .word 0x09010040 // writeable RVBAR mapping address -#endif + + .word CONFIG_SUNXI_RVBAR_ADDRESS // writable RVBAR mapping addr #ifdef CONFIG_SPL_BUILD .word CONFIG_SPL_TEXT_BASE #else diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index 6be8a4de53f..71a413108f7 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -129,6 +129,18 @@ config SUNXI_SRAM_ADDRESS Some newer SoCs map the boot ROM at address 0 instead and move the SRAM to a different address. +config SUNXI_RVBAR_ADDRESS + hex + depends on ARM64 + default 0x09010040 if SUN50I_GEN_H6 + default 0x017000a0 + ---help--- + The read-only RVBAR system register holds the address of the first + instruction to execute after a reset. Allwinner cores provide a + writable MMIO backing store for this register, to allow to set the + entry point when switching to AArch64. This store is on different + addresses, depending on the SoC. + config SUNXI_A64_TIMER_ERRATUM bool |