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-rw-r--r--arch/arm/dts/Makefile15
-rw-r--r--arch/arm/dts/dragonboard410c-uboot.dtsi12
-rw-r--r--arch/arm/dts/dragonboard410c.dts1
-rw-r--r--arch/arm/dts/stih410-b2260-u-boot.dtsi16
-rw-r--r--arch/arm/dts/sun50i-h5-libretech-all-h3-cc.dts13
-rw-r--r--arch/arm/dts/sun8i-h2-plus-libretech-all-h3-cc.dts13
-rw-r--r--arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts163
-rw-r--r--arch/arm/dts/sun8i-r40.dtsi43
-rw-r--r--arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts132
-rw-r--r--arch/arm/dts/sunxi-libretech-all-h3-cc.dtsi168
-rw-r--r--arch/arm/include/asm/bitops.h2
-rw-r--r--arch/arm/lib/bootm.c2
-rw-r--r--arch/arm/mach-rmobile/include/mach/ehci-rmobile.h3
-rwxr-xr-xarch/arm/mach-socfpga/qts-filter.sh2
-rw-r--r--arch/arm/thumb1/include/asm/proc-armv/system.h3
-rw-r--r--board/freescale/ls2080aqds/MAINTAINERS4
-rw-r--r--board/freescale/ls2080ardb/MAINTAINERS4
-rw-r--r--board/freescale/mpc8315erdb/MAINTAINERS4
-rw-r--r--board/freescale/mpc8323erdb/MAINTAINERS4
-rw-r--r--board/freescale/mpc832xemds/MAINTAINERS4
-rw-r--r--board/freescale/mpc8349emds/MAINTAINERS4
-rw-r--r--board/freescale/mpc837xemds/MAINTAINERS4
-rw-r--r--board/freescale/p1022ds/MAINTAINERS2
-rw-r--r--board/freescale/t102xqds/MAINTAINERS4
-rw-r--r--board/freescale/t102xrdb/MAINTAINERS4
-rw-r--r--board/freescale/t4qds/MAINTAINERS4
-rw-r--r--board/freescale/t4rdb/MAINTAINERS4
-rw-r--r--board/gdsys/common/ihs_mdio.c91
-rw-r--r--board/gdsys/common/ihs_mdio.h5
-rw-r--r--board/liebherr/display5/spl.c3
-rw-r--r--board/opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.c3
-rw-r--r--board/sunxi/MAINTAINERS9
-rw-r--r--board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c5
-rw-r--r--board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c5
-rw-r--r--board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c5
-rw-r--r--board/xilinx/zynq/zynq-zed/ps7_init_gpl.c5
-rw-r--r--cmd/Kconfig8
-rw-r--r--cmd/Makefile1
-rw-r--r--cmd/adc.c120
-rw-r--r--cmd/bootefi.c3
-rw-r--r--common/autoboot.c23
-rw-r--r--common/bootm.c26
-rw-r--r--common/image-fit.c13
-rw-r--r--common/spl/Kconfig9
-rw-r--r--common/spl/spl.c3
-rw-r--r--common/xyzModem.c19
-rw-r--r--configs/bananapi_m2_berry_defconfig14
-rw-r--r--configs/display5_defconfig4
-rw-r--r--configs/libretech_all_h3_cc_h2_plus_defconfig15
-rw-r--r--configs/libretech_all_h3_cc_h3_defconfig2
-rw-r--r--configs/libretech_all_h3_cc_h5_defconfig15
-rw-r--r--configs/trats2_defconfig2
-rw-r--r--configs/uniphier_v8_defconfig1
-rw-r--r--doc/README.uefi4
-rw-r--r--drivers/Makefile1
-rw-r--r--drivers/clk/Kconfig8
-rw-r--r--drivers/clk/Makefile1
-rw-r--r--drivers/clk/ics8n3qv01.c230
-rw-r--r--drivers/misc/Kconfig6
-rw-r--r--drivers/misc/Makefile1
-rw-r--r--drivers/misc/gdsys_rxaui_ctrl.c76
-rw-r--r--drivers/mmc/Kconfig8
-rw-r--r--drivers/mmc/fsl_esdhc.c2
-rw-r--r--drivers/mmc/meson_gx_mmc.c2
-rw-r--r--drivers/mmc/mmc.c20
-rw-r--r--drivers/mmc/socfpga_dw_mmc.c2
-rw-r--r--drivers/net/vsc9953.c3
-rw-r--r--drivers/pci/pci_indirect.c2
-rw-r--r--drivers/pinctrl/uniphier/pinctrl-uniphier-core.c140
-rw-r--r--drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c11
-rw-r--r--drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c13
-rw-r--r--drivers/pinctrl/uniphier/pinctrl-uniphier.h49
-rw-r--r--drivers/power/pmic/Makefile1
-rw-r--r--drivers/power/pmic/pmic_max77686.c303
-rw-r--r--drivers/power/regulator/pwm_regulator.c15
-rw-r--r--drivers/usb/host/ehci-rmobile.c3
-rw-r--r--drivers/video/bridge/Makefile3
-rw-r--r--fs/ubifs/ubifs.c4
-rw-r--r--include/asm-generic/pe.h3
-rw-r--r--include/bootcount.h50
-rw-r--r--include/charset.h3
-rw-r--r--include/configs/am57xx_evm.h25
-rw-r--r--include/configs/cl-som-am57x.h2
-rw-r--r--include/configs/cm_t54.h2
-rw-r--r--include/configs/dra7xx_evm.h25
-rw-r--r--include/dt-bindings/clock/sun8i-r40-ccu.h187
-rw-r--r--include/dt-bindings/reset/sun8i-r40-ccu.h130
-rw-r--r--include/efi_driver.h3
-rw-r--r--include/efi_loader.h3
-rw-r--r--include/efi_selftest.h3
-rw-r--r--include/environment/ti/boot.h27
-rw-r--r--include/fdtdec.h1
-rw-r--r--include/linux/log2.h63
-rw-r--r--include/mmc.h3
-rw-r--r--include/net.h2
-rw-r--r--include/pe.h3
-rw-r--r--lib/charset.c3
-rw-r--r--lib/efi_driver/Makefile4
-rw-r--r--lib/efi_driver/efi_block_device.c3
-rw-r--r--lib/efi_driver/efi_uclass.c3
-rw-r--r--lib/efi_loader/Makefile3
-rw-r--r--lib/efi_loader/efi_bootmgr.c3
-rw-r--r--lib/efi_loader/efi_boottime.c3
-rw-r--r--lib/efi_loader/efi_console.c3
-rw-r--r--lib/efi_loader/efi_device_path_to_text.c3
-rw-r--r--lib/efi_loader/efi_device_path_utilities.c3
-rw-r--r--lib/efi_loader/efi_disk.c3
-rw-r--r--lib/efi_loader/efi_file.c3
-rw-r--r--lib/efi_loader/efi_gop.c3
-rw-r--r--lib/efi_loader/efi_image_loader.c3
-rw-r--r--lib/efi_loader/efi_memory.c3
-rw-r--r--lib/efi_loader/efi_net.c3
-rw-r--r--lib/efi_loader/efi_runtime.c3
-rw-r--r--lib/efi_loader/efi_smbios.c3
-rw-r--r--lib/efi_loader/efi_variable.c3
-rw-r--r--lib/efi_loader/efi_watchdog.c3
-rw-r--r--lib/efi_selftest/Makefile6
-rw-r--r--lib/efi_selftest/efi_selftest_disk_image.h3
-rw-r--r--lib/fdtdec.c1
-rw-r--r--lib/lz4.c3
-rw-r--r--net/arp.c2
-rw-r--r--net/arp.h2
-rw-r--r--net/cdp.c2
-rw-r--r--net/cdp.h2
-rw-r--r--net/net.c2
-rw-r--r--net/ping.c2
-rw-r--r--net/ping.h2
-rwxr-xr-xtest/fs/fs-test.sh4
-rw-r--r--tools/file2include.c5
-rw-r--r--tools/ifdtool.c2
130 files changed, 1797 insertions, 788 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 6fe93a83745..3426a983cb2 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -349,25 +349,28 @@ dtb-$(CONFIG_MACH_SUN8I_A83T) += \
sun8i-a83t-cubietruck-plus.dtb \
sun8i-a83t-tbs-a711.dts
dtb-$(CONFIG_MACH_SUN8I_H3) += \
+ sun8i-h2-plus-libretech-all-h3-cc.dtb \
sun8i-h2-plus-orangepi-zero.dtb \
sun8i-h3-bananapi-m2-plus.dtb \
sun8i-h3-libretech-all-h3-cc.dtb \
+ sun8i-h3-nanopi-m1.dtb \
+ sun8i-h3-nanopi-m1-plus.dtb \
+ sun8i-h3-nanopi-neo.dtb \
+ sun8i-h3-nanopi-neo-air.dtb \
sun8i-h3-orangepi-2.dtb \
sun8i-h3-orangepi-lite.dtb \
sun8i-h3-orangepi-one.dtb \
sun8i-h3-orangepi-pc.dtb \
sun8i-h3-orangepi-pc-plus.dtb \
sun8i-h3-orangepi-plus.dtb \
- sun8i-h3-orangepi-plus2e.dtb \
- sun8i-h3-nanopi-m1.dtb \
- sun8i-h3-nanopi-m1-plus.dtb \
- sun8i-h3-nanopi-neo.dtb \
- sun8i-h3-nanopi-neo-air.dtb
+ sun8i-h3-orangepi-plus2e.dtb
dtb-$(CONFIG_MACH_SUN8I_R40) += \
- sun8i-r40-bananapi-m2-ultra.dtb
+ sun8i-r40-bananapi-m2-ultra.dtb \
+ sun8i-v40-bananapi-m2-berry.dtb
dtb-$(CONFIG_MACH_SUN8I_V3S) += \
sun8i-v3s-licheepi-zero.dtb
dtb-$(CONFIG_MACH_SUN50I_H5) += \
+ sun50i-h5-libretech-all-h3-cc.dtb \
sun50i-h5-nanopi-neo2.dtb \
sun50i-h5-nanopi-neo-plus2.dtb \
sun50i-h5-orangepi-pc2.dtb \
diff --git a/arch/arm/dts/dragonboard410c-uboot.dtsi b/arch/arm/dts/dragonboard410c-uboot.dtsi
index c94455ce4de..17ee55a20cc 100644
--- a/arch/arm/dts/dragonboard410c-uboot.dtsi
+++ b/arch/arm/dts/dragonboard410c-uboot.dtsi
@@ -9,6 +9,18 @@
config {
u-boot,mmc-env-partition = "boot";
};
+
+ soc {
+ u-boot,dm-pre-reloc;
+
+ qcom,gcc@1800000 {
+ u-boot,dm-pre-reloc;
+ };
+
+ serial@78b0000 {
+ u-boot,dm-pre-reloc;
+ };
+ };
};
diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts
index 4d76edab55a..d9d5831f4f8 100644
--- a/arch/arm/dts/dragonboard410c.dts
+++ b/arch/arm/dts/dragonboard410c.dts
@@ -48,7 +48,6 @@
serial@78b0000 {
compatible = "qcom,msm-uartdm-v1.4";
reg = <0x78b0000 0x200>;
- u-boot,dm-pre-reloc;
clock = <&clkc 4>;
};
diff --git a/arch/arm/dts/stih410-b2260-u-boot.dtsi b/arch/arm/dts/stih410-b2260-u-boot.dtsi
new file mode 100644
index 00000000000..83916319fc1
--- /dev/null
+++ b/arch/arm/dts/stih410-b2260-u-boot.dtsi
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
+ * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
+ *
+ */
+
+/{
+ soc {
+ st_dwc3: dwc3@8f94000 {
+ dwc3: dwc3@9900000 {
+ phys = <&usb2_picophy0>;
+ };
+ };
+ };
+};
diff --git a/arch/arm/dts/sun50i-h5-libretech-all-h3-cc.dts b/arch/arm/dts/sun50i-h5-libretech-all-h3-cc.dts
new file mode 100644
index 00000000000..a7e53c5c26b
--- /dev/null
+++ b/arch/arm/dts/sun50i-h5-libretech-all-h3-cc.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org>
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+#include "sunxi-libretech-all-h3-cc.dtsi"
+
+/ {
+ model = "Libre Computer Board ALL-H3-CC H5";
+ compatible = "libretech,all-h3-cc-h5", "allwinner,sun50i-h5";
+};
diff --git a/arch/arm/dts/sun8i-h2-plus-libretech-all-h3-cc.dts b/arch/arm/dts/sun8i-h2-plus-libretech-all-h3-cc.dts
new file mode 100644
index 00000000000..4db0d4bb65e
--- /dev/null
+++ b/arch/arm/dts/sun8i-h2-plus-libretech-all-h3-cc.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org>
+ */
+
+/dts-v1/;
+#include "sun8i-h3.dtsi"
+#include "sunxi-libretech-all-h3-cc.dtsi"
+
+/ {
+ model = "Libre Computer Board ALL-H3-CC H2+";
+ compatible = "libretech,all-h3-cc-h2-plus", "allwinner,sun8i-h2-plus";
+};
diff --git a/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts b/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts
index 1fcb16c7eb9..50f2fb30d2d 100644
--- a/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts
+++ b/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts
@@ -5,170 +5,9 @@
/dts-v1/;
#include "sun8i-h3.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
+#include "sunxi-libretech-all-h3-cc.dtsi"
/ {
model = "Libre Computer Board ALL-H3-CC H3";
compatible = "libretech,all-h3-cc-h3", "allwinner,sun8i-h3";
-
- aliases {
- ethernet0 = &emac;
- serial0 = &uart0;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- leds {
- compatible = "gpio-leds";
-
- pwr_led {
- label = "librecomputer:green:pwr";
- gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
- default-state = "on";
- };
-
- status_led {
- label = "librecomputer:blue:status";
- gpios = <&pio 0 7 GPIO_ACTIVE_HIGH>; /* PA7 */
- };
- };
-
- gpio_keys {
- compatible = "gpio-keys";
-
- power {
- label = "power";
- linux,code = <KEY_POWER>;
- gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
- };
- };
-
- reg_vcc1v2: vcc1v2 {
- compatible = "regulator-fixed";
- regulator-name = "vcc1v2";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&reg_vcc5v0>;
- gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
- enable-active-high;
- };
-
- reg_vcc3v3: vcc3v3 {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&reg_vcc5v0>;
- };
-
- /* This represents the board's 5V input */
- reg_vcc5v0: vcc5v0 {
- compatible = "regulator-fixed";
- regulator-name = "vcc5v0";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
-
- reg_vcc_dram: vcc-dram {
- compatible = "regulator-fixed";
- regulator-name = "vcc-dram";
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <1500000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&reg_vcc5v0>;
- gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */
- enable-active-high;
- };
-
- reg_vcc_io: vcc-io {
- compatible = "regulator-fixed";
- regulator-name = "vcc-io";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&reg_vcc3v3>;
- gpio = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL5 */
- };
-
- reg_vdd_cpux: vdd-cpux {
- compatible = "regulator-fixed";
- regulator-name = "vdd-cpux";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&reg_vcc5v0>;
- gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
- enable-active-high;
- };
-};
-
-&ehci1 {
- status = "okay";
-};
-
-&ehci2 {
- status = "okay";
-};
-
-&ehci3 {
- status = "okay";
-};
-
-&emac {
- phy-handle = <&int_mii_phy>;
- phy-mode = "mii";
- allwinner,leds-active-low;
- status = "okay";
-};
-
-&ir {
- pinctrl-names = "default";
- pinctrl-0 = <&ir_pins_a>;
- status = "okay";
-};
-
-&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>;
- vmmc-supply = <&reg_vcc_io>;
- bus-width = <4>;
- cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
- cd-inverted;
- status = "okay";
-};
-
-&ohci1 {
- status = "okay";
-};
-
-&ohci2 {
- status = "okay";
-};
-
-&ohci3 {
- status = "okay";
-};
-
-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
- status = "okay";
-};
-
-&usbphy {
- /* VBUS on USB ports are always on */
- usb0_vbus-supply = <&reg_vcc5v0>;
- usb1_vbus-supply = <&reg_vcc5v0>;
- usb2_vbus-supply = <&reg_vcc5v0>;
- usb3_vbus-supply = <&reg_vcc5v0>;
- status = "okay";
};
diff --git a/arch/arm/dts/sun8i-r40.dtsi b/arch/arm/dts/sun8i-r40.dtsi
index 48ec2e855a2..0aa76a2f10a 100644
--- a/arch/arm/dts/sun8i-r40.dtsi
+++ b/arch/arm/dts/sun8i-r40.dtsi
@@ -43,6 +43,8 @@
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/sun8i-r40-ccu.h>
+#include <dt-bindings/reset/sun8i-r40-ccu.h>
/ {
#address-cells = <1>;
@@ -114,6 +116,39 @@
#size-cells = <1>;
ranges;
+ nmi_intc: interrupt-controller@1c00030 {
+ compatible = "allwinner,sun7i-a20-sc-nmi";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x01c00030 0x0c>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ mmc0: mmc@1c0f000 {
+ compatible = "allwinner,sun8i-r40-mmc",
+ "allwinner,sun50i-a64-mmc";
+ reg = <0x01c0f000 0x1000>;
+ clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
+ clock-names = "ahb", "mmc";
+ resets = <&ccu RST_BUS_MMC0>;
+ reset-names = "ahb";
+ pinctrl-0 = <&mmc0_pins>;
+ pinctrl-names = "default";
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ ccu: clock@1c20000 {
+ compatible = "allwinner,sun8i-r40-ccu";
+ reg = <0x01c20000 0x400>;
+ clocks = <&osc24M>, <&osc32k>;
+ clock-names = "hosc", "losc";
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
pio: pinctrl@1c20800 {
compatible = "allwinner,sun8i-r40-pinctrl";
reg = <0x01c20800 0x400>;
@@ -132,6 +167,14 @@
bias-pull-up;
};
+ mmc0_pins: mmc0-pins {
+ pins = "PF0", "PF1", "PF2",
+ "PF3", "PF4", "PF5";
+ function = "mmc0";
+ drive-strength = <30>;
+ bias-pull-up;
+ };
+
uart0_pb_pins: uart0_pb_pins {
pins = "PB22", "PB23";
function = "uart0";
diff --git a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
new file mode 100644
index 00000000000..193d9b29ecd
--- /dev/null
+++ b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts
@@ -0,0 +1,132 @@
+/*
+ * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun8i-r40.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "Banana Pi M2 Berry";
+ compatible = "sinovoip,bpi-m2-berry", "allwinner,sun8i-r40";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&i2c0 {
+ status = "okay";
+
+ axp22x: pmic@68 {
+ compatible = "x-powers,axp221";
+ reg = <0x34>;
+ interrupt-parent = <&nmi_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+#include "axp22x.dtsi"
+
+&reg_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <2700000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "avcc";
+};
+
+&reg_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "vcc-3v0";
+};
+
+&reg_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-name = "vdd-cpu";
+};
+
+&reg_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-name = "vdd-sys";
+};
+
+&reg_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vcc-dram";
+};
+
+&reg_dldo1 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-io";
+};
+
+&reg_dldo2 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi";
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_dcdc1>;
+ bus-width = <4>;
+ cd-gpios = <&pio 7 13 GPIO_ACTIVE_LOW>; /* PH13 */
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pb_pins>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/sunxi-libretech-all-h3-cc.dtsi b/arch/arm/dts/sunxi-libretech-all-h3-cc.dtsi
new file mode 100644
index 00000000000..5d01bba180e
--- /dev/null
+++ b/arch/arm/dts/sunxi-libretech-all-h3-cc.dtsi
@@ -0,0 +1,168 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org>
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ pwr_led {
+ label = "librecomputer:green:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
+ default-state = "on";
+ };
+
+ status_led {
+ label = "librecomputer:blue:status";
+ gpios = <&pio 0 7 GPIO_ACTIVE_HIGH>; /* PA7 */
+ };
+ };
+
+ gpio_keys {
+ compatible = "gpio-keys";
+
+ power {
+ label = "power";
+ linux,code = <KEY_POWER>;
+ gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
+ };
+ };
+
+ reg_vcc1v2: vcc1v2 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc1v2";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&reg_vcc5v0>;
+ gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
+ enable-active-high;
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&reg_vcc5v0>;
+ };
+
+ /* This represents the board's 5V input */
+ reg_vcc5v0: vcc5v0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ reg_vcc_dram: vcc-dram {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-dram";
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&reg_vcc5v0>;
+ gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */
+ enable-active-high;
+ };
+
+ reg_vcc_io: vcc-io {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-io";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&reg_vcc3v3>;
+ gpio = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL5 */
+ };
+
+ reg_vdd_cpux: vdd-cpux {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd-cpux";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&reg_vcc5v0>;
+ gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
+ enable-active-high;
+ };
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ir_pins_a>;
+ status = "okay";
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_a>;
+ vmmc-supply = <&reg_vcc_io>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
+ cd-inverted;
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};
+
+&usbphy {
+ /* VBUS on USB ports are always on */
+ usb0_vbus-supply = <&reg_vcc5v0>;
+ usb1_vbus-supply = <&reg_vcc5v0>;
+ usb2_vbus-supply = <&reg_vcc5v0>;
+ usb3_vbus-supply = <&reg_vcc5v0>;
+ status = "okay";
+};
diff --git a/arch/arm/include/asm/bitops.h b/arch/arm/include/asm/bitops.h
index f33efeb33ee..2750d9b4866 100644
--- a/arch/arm/include/asm/bitops.h
+++ b/arch/arm/include/asm/bitops.h
@@ -158,7 +158,7 @@ static inline int find_next_zero_bit(void *addr, int size, int offset)
tmp = *p;
found_first:
- tmp |= ~0UL >> size;
+ tmp |= ~0UL << size;
found_middle:
return result + ffz(tmp);
}
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index b27266c7a19..c3c1d2fdfa2 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -437,7 +437,7 @@ void boot_prep_vxworks(bootm_headers_t *images)
if (images->ft_addr) {
off = fdt_path_offset(images->ft_addr, "/memory");
- if (off < 0) {
+ if (off > 0) {
if (arch_fixup_fdt(images->ft_addr))
puts("## WARNING: fixup memory failed!\n");
}
diff --git a/arch/arm/mach-rmobile/include/mach/ehci-rmobile.h b/arch/arm/mach-rmobile/include/mach/ehci-rmobile.h
index 463654efd33..ca8c5f37063 100644
--- a/arch/arm/mach-rmobile/include/mach/ehci-rmobile.h
+++ b/arch/arm/mach-rmobile/include/mach/ehci-rmobile.h
@@ -1,8 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2013,2014 Renesas Electronics Corporation
* Copyright (C) 2014 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#ifndef __EHCI_RMOBILE_H__
diff --git a/arch/arm/mach-socfpga/qts-filter.sh b/arch/arm/mach-socfpga/qts-filter.sh
index 02c28be2b77..3a442bc5d82 100755
--- a/arch/arm/mach-socfpga/qts-filter.sh
+++ b/arch/arm/mach-socfpga/qts-filter.sh
@@ -145,10 +145,10 @@ process_sdram_config() {
(
cat << EOF
+/* SPDX-License-Identifier: BSD-3-Clause */
/*
* Altera SoCFPGA SDRAM configuration
*
- * SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef __SOCFPGA_SDRAM_CONFIG_H__
diff --git a/arch/arm/thumb1/include/asm/proc-armv/system.h b/arch/arm/thumb1/include/asm/proc-armv/system.h
index 7dfbf3d33db..1324f7efb13 100644
--- a/arch/arm/thumb1/include/asm/proc-armv/system.h
+++ b/arch/arm/thumb1/include/asm/proc-armv/system.h
@@ -1,3 +1,4 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Thumb-1 drop-in for the linux/include/asm-arm/proc-armv/system.h
*
@@ -7,8 +8,6 @@
* The original file does not build in Thumb mode. However, in U-Boot
* we don't use interrupt context, so we can redefine these as empty
* memory barriers, which makes Thumb-1 compiler happy.
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
/*
diff --git a/board/freescale/ls2080aqds/MAINTAINERS b/board/freescale/ls2080aqds/MAINTAINERS
index 62c8fac09c6..f7f1f095136 100644
--- a/board/freescale/ls2080aqds/MAINTAINERS
+++ b/board/freescale/ls2080aqds/MAINTAINERS
@@ -10,6 +10,6 @@ F: configs/ls2080aqds_qspi_defconfig
F: configs/ls2080aqds_sdcard_defconfig
LS2080A_SECURE_BOOT BOARD
-M: Saksham Jain <saksham.jain@nxp.freescale.com>
-S: Maintained
+#M: Saksham Jain <saksham.jain@nxp.freescale.com>
+S: Orphan (since 2018-05)
F: configs/ls2080aqds_SECURE_BOOT_defconfig
diff --git a/board/freescale/ls2080ardb/MAINTAINERS b/board/freescale/ls2080ardb/MAINTAINERS
index 8da1c6d0ae7..bbe56e2052c 100644
--- a/board/freescale/ls2080ardb/MAINTAINERS
+++ b/board/freescale/ls2080ardb/MAINTAINERS
@@ -18,8 +18,8 @@ S: Maintained
F: configs/ls2081ardb_defconfig
LS2080A_SECURE_BOOT BOARD
-M: Saksham Jain <saksham.jain@nxp.freescale.com>
-S: Maintained
+#M: Saksham Jain <saksham.jain@nxp.freescale.com>
+S: Orphan (since 2018-05)
F: configs/ls2080ardb_SECURE_BOOT_defconfig
LS2088A_QSPI_SECURE_BOOT BOARD
diff --git a/board/freescale/mpc8315erdb/MAINTAINERS b/board/freescale/mpc8315erdb/MAINTAINERS
index 938c1527e05..5a67b409934 100644
--- a/board/freescale/mpc8315erdb/MAINTAINERS
+++ b/board/freescale/mpc8315erdb/MAINTAINERS
@@ -1,6 +1,6 @@
MPC8315ERDB BOARD
-M: Dave Liu <daveliu@freescale.com>
-S: Maintained
+#M: Dave Liu <daveliu@freescale.com>
+S: Orphan (since 2018-05)
F: board/freescale/mpc8315erdb/
F: include/configs/MPC8315ERDB.h
F: configs/MPC8315ERDB_defconfig
diff --git a/board/freescale/mpc8323erdb/MAINTAINERS b/board/freescale/mpc8323erdb/MAINTAINERS
index 05057c0c2dc..496ab2af271 100644
--- a/board/freescale/mpc8323erdb/MAINTAINERS
+++ b/board/freescale/mpc8323erdb/MAINTAINERS
@@ -1,6 +1,6 @@
MPC8323ERDB BOARD
-M: Michael Barkowski <michael.barkowski@freescale.com>
-S: Maintained
+#M: Michael Barkowski <michael.barkowski@freescale.com>
+S: Orphan (since 2018-05)
F: board/freescale/mpc8323erdb/
F: include/configs/MPC8323ERDB.h
F: configs/MPC8323ERDB_defconfig
diff --git a/board/freescale/mpc832xemds/MAINTAINERS b/board/freescale/mpc832xemds/MAINTAINERS
index 56d70733b4f..232658a203c 100644
--- a/board/freescale/mpc832xemds/MAINTAINERS
+++ b/board/freescale/mpc832xemds/MAINTAINERS
@@ -1,6 +1,6 @@
MPC832XEMDS BOARD
-M: Dave Liu <daveliu@freescale.com>
-S: Maintained
+#M: Dave Liu <daveliu@freescale.com>
+S: Orphan (since 2018-05)
F: board/freescale/mpc832xemds/
F: include/configs/MPC832XEMDS.h
F: configs/MPC832XEMDS_defconfig
diff --git a/board/freescale/mpc8349emds/MAINTAINERS b/board/freescale/mpc8349emds/MAINTAINERS
index 141e77a94e7..e6648d66a05 100644
--- a/board/freescale/mpc8349emds/MAINTAINERS
+++ b/board/freescale/mpc8349emds/MAINTAINERS
@@ -1,6 +1,6 @@
MPC8349EMDS BOARD
-M: Kim Phillips <kim.phillips@freescale.com>
-S: Maintained
+#M: Kim Phillips <kim.phillips@freescale.com>
+S: Orphan (since 2018-05)
F: board/freescale/mpc8349emds/
F: include/configs/MPC8349EMDS.h
F: configs/MPC8349EMDS_defconfig
diff --git a/board/freescale/mpc837xemds/MAINTAINERS b/board/freescale/mpc837xemds/MAINTAINERS
index 6ff13462062..8386aa72977 100644
--- a/board/freescale/mpc837xemds/MAINTAINERS
+++ b/board/freescale/mpc837xemds/MAINTAINERS
@@ -1,6 +1,6 @@
MPC837XEMDS BOARD
-M: Dave Liu <daveliu@freescale.com>
-S: Maintained
+#M: Dave Liu <daveliu@freescale.com>
+S: Orphan (since 2018-05)
F: board/freescale/mpc837xemds/
F: include/configs/MPC837XEMDS.h
F: configs/MPC837XEMDS_defconfig
diff --git a/board/freescale/p1022ds/MAINTAINERS b/board/freescale/p1022ds/MAINTAINERS
index 86aac365d31..62256c37038 100644
--- a/board/freescale/p1022ds/MAINTAINERS
+++ b/board/freescale/p1022ds/MAINTAINERS
@@ -1,5 +1,5 @@
P1022DS BOARD
-M: Timur Tabi <timur@freescale.com>
+M: Timur Tabi <timur@tabi.org>
S: Maintained
F: board/freescale/p1022ds/
F: include/configs/P1022DS.h
diff --git a/board/freescale/t102xqds/MAINTAINERS b/board/freescale/t102xqds/MAINTAINERS
index 23480e2d71a..7e30e5f84b7 100644
--- a/board/freescale/t102xqds/MAINTAINERS
+++ b/board/freescale/t102xqds/MAINTAINERS
@@ -1,6 +1,6 @@
T102XQDS BOARD
-M: Shengzhou Liu <Shengzhou.Liu@freescale.com>
-S: Maintained
+#M: Shengzhou Liu <Shengzhou.Liu@freescale.com>
+S: Orphan (since 2018-05)
F: board/freescale/t102xqds/
F: include/configs/T102xQDS.h
F: configs/T1024QDS_defconfig
diff --git a/board/freescale/t102xrdb/MAINTAINERS b/board/freescale/t102xrdb/MAINTAINERS
index 297e63a6eea..6c24f7785ce 100644
--- a/board/freescale/t102xrdb/MAINTAINERS
+++ b/board/freescale/t102xrdb/MAINTAINERS
@@ -1,6 +1,6 @@
T102XRDB BOARD
-M: Shengzhou Liu <Shengzhou.Liu@freescale.com>
-S: Maintained
+#M: Shengzhou Liu <Shengzhou.Liu@freescale.com>
+S: Orphan (since 2018-05)
F: board/freescale/t102xrdb/
F: include/configs/T102xRDB.h
F: configs/T1024RDB_defconfig
diff --git a/board/freescale/t4qds/MAINTAINERS b/board/freescale/t4qds/MAINTAINERS
index b288571c7a7..44bb2f5c6d8 100644
--- a/board/freescale/t4qds/MAINTAINERS
+++ b/board/freescale/t4qds/MAINTAINERS
@@ -1,6 +1,6 @@
T4QDS BOARD
-M: Shaohui Xie <Shaohui.Xie@freescale.com>
-S: Maintained
+#M: Shaohui Xie <Shaohui.Xie@freescale.com>
+S: Orphan (since 2018-05)
F: board/freescale/t4qds/
F: include/configs/T4240QDS.h
F: configs/T4160QDS_defconfig
diff --git a/board/freescale/t4rdb/MAINTAINERS b/board/freescale/t4rdb/MAINTAINERS
index 53ccabc0fb4..4ba5c3a546a 100644
--- a/board/freescale/t4rdb/MAINTAINERS
+++ b/board/freescale/t4rdb/MAINTAINERS
@@ -1,6 +1,6 @@
T4RDB BOARD
-M: Chunhe Lan <Chunhe.Lan@freescale.com>
-S: Maintained
+#M: Chunhe Lan <Chunhe.Lan@freescale.com>
+S: Orphan (since 2018-05)
F: board/freescale/t4rdb/
F: include/configs/T4240RDB.h
F: configs/T4160RDB_defconfig
diff --git a/board/gdsys/common/ihs_mdio.c b/board/gdsys/common/ihs_mdio.c
index 8a1bc46c5ce..b17e8db91bf 100644
--- a/board/gdsys/common/ihs_mdio.c
+++ b/board/gdsys/common/ihs_mdio.c
@@ -6,11 +6,87 @@
#include <common.h>
-#include <gdsys_fpga.h>
#include <miiphy.h>
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
+#include <gdsys_fpga.h>
+#else
+#include <fdtdec.h>
+#include <regmap.h>
+#endif
#include "ihs_mdio.h"
+#ifndef CONFIG_GDSYS_LEGACY_DRIVERS
+enum {
+ REG_MDIO_CONTROL = 0x0,
+ REG_MDIO_ADDR_DATA = 0x2,
+ REG_MDIO_RX_DATA = 0x4,
+};
+
+static inline u16 read_reg(struct udevice *fpga, uint base, uint addr)
+{
+ struct regmap *map;
+ u8 *ptr;
+
+ regmap_init_mem(fpga, &map);
+ ptr = regmap_get_range(map, 0);
+
+ return in_le16((u16 *)(ptr + base + addr));
+}
+
+static inline void write_reg(struct udevice *fpga, uint base, uint addr,
+ u16 val)
+{
+ struct regmap *map;
+ u8 *ptr;
+
+ regmap_init_mem(fpga, &map);
+ ptr = regmap_get_range(map, 0);
+
+ out_le16((u16 *)(ptr + base + addr), val);
+}
+#endif
+
+static inline u16 read_control(struct ihs_mdio_info *info)
+{
+ u16 val;
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
+ FPGA_GET_REG(info->fpga, mdio.control, &val);
+#else
+ val = read_reg(info->fpga, info->base, REG_MDIO_CONTROL);
+#endif
+ return val;
+}
+
+static inline void write_control(struct ihs_mdio_info *info, u16 val)
+{
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
+ FPGA_SET_REG(info->fpga, mdio.control, val);
+#else
+ write_reg(info->fpga, info->base, REG_MDIO_CONTROL, val);
+#endif
+}
+
+static inline void write_addr_data(struct ihs_mdio_info *info, u16 val)
+{
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
+ FPGA_SET_REG(info->fpga, mdio.address_data, val);
+#else
+ write_reg(info->fpga, info->base, REG_MDIO_ADDR_DATA, val);
+#endif
+}
+
+static inline u16 read_rx_data(struct ihs_mdio_info *info)
+{
+ u16 val;
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
+ FPGA_GET_REG(info->fpga, mdio.rx_data, &val);
+#else
+ val = read_reg(info->fpga, info->base, REG_MDIO_RX_DATA);
+#endif
+ return val;
+}
+
static int ihs_mdio_idle(struct mii_dev *bus)
{
struct ihs_mdio_info *info = bus->priv;
@@ -18,7 +94,7 @@ static int ihs_mdio_idle(struct mii_dev *bus)
unsigned int ctr = 0;
do {
- FPGA_GET_REG(info->fpga, mdio.control, &val);
+ val = read_control(info);
udelay(100);
if (ctr++ > 10)
return -1;
@@ -42,13 +118,13 @@ static int ihs_mdio_read(struct mii_dev *bus, int addr, int dev_addr,
ihs_mdio_idle(bus);
- FPGA_SET_REG(info->fpga, mdio.control,
- ((addr & 0x1f) << 5) | (regnum & 0x1f) | (2 << 10));
+ write_control(info,
+ ((addr & 0x1f) << 5) | (regnum & 0x1f) | (2 << 10));
/* wait for rx data available */
udelay(100);
- FPGA_GET_REG(info->fpga, mdio.rx_data, &val);
+ val = read_rx_data(info);
return val;
}
@@ -60,9 +136,8 @@ static int ihs_mdio_write(struct mii_dev *bus, int addr, int dev_addr,
ihs_mdio_idle(bus);
- FPGA_SET_REG(info->fpga, mdio.address_data, value);
- FPGA_SET_REG(info->fpga, mdio.control,
- ((addr & 0x1f) << 5) | (regnum & 0x1f) | (1 << 10));
+ write_addr_data(info, value);
+ write_control(info, ((addr & 0x1f) << 5) | (regnum & 0x1f) | (1 << 10));
return 0;
}
diff --git a/board/gdsys/common/ihs_mdio.h b/board/gdsys/common/ihs_mdio.h
index cddc335c107..d0a4b0d7a88 100644
--- a/board/gdsys/common/ihs_mdio.h
+++ b/board/gdsys/common/ihs_mdio.h
@@ -8,7 +8,12 @@
#define _IHS_MDIO_H_
struct ihs_mdio_info {
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
u32 fpga;
+#else
+ struct udevice *fpga;
+ int base;
+#endif
char *name;
};
diff --git a/board/liebherr/display5/spl.c b/board/liebherr/display5/spl.c
index 49bcafef747..6508e0ffa7d 100644
--- a/board/liebherr/display5/spl.c
+++ b/board/liebherr/display5/spl.c
@@ -19,6 +19,7 @@
#include <environment.h>
#include <fsl_esdhc.h>
#include <netdev.h>
+#include <bootcount.h>
#include "common.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -213,7 +214,7 @@ void board_boot_order(u32 *spl_boot_list)
env_load();
s = env_get("BOOT_FROM");
- if (s && strcmp(s, "ACTIVE") == 0) {
+ if (s && !bootcount_error() && strcmp(s, "ACTIVE") == 0) {
spl_boot_list[0] = BOOT_DEVICE_MMC1;
spl_boot_list[1] = spl_boot_device();
}
diff --git a/board/opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.c b/board/opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.c
index 3bd02f3c83e..500dcce4da5 100644
--- a/board/opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.c
+++ b/board/opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.c
@@ -1,8 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0+
/******************************************************************************
* (c) Copyright 2010-2014 Xilinx, Inc. All rights reserved.
* (c) Copyright 2017 Opal Kelly Inc.
-*
-* SPDX-License-Identifier: GPL-2.0+
*****************************************************************************/
#include <asm/arch/ps7_init_gpl.h>
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index 6dd48c02651..1bb2fa8f518 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -126,6 +126,11 @@ M: Jagan Teki <jagan@amarulasolutions.com>
S: Maintained
F: configs/bananapi_m1_plus_defconfig
+BANANAPI M2 BERRY
+M: Jagan Teki <jagan@amarulasolutions.com>
+S: Maintained
+F: configs/bananapi_m2_berry_defconfig
+
BANANAPI M2 ULTRA BOARD
M: Chen-Yu Tsai <wens@csie.org>
S: Maintained
@@ -266,10 +271,12 @@ M: Siarhei Siamashka <siarhei.siamashka@gmail.com>
S: Maintained
F: configs/MSI_Primo81_defconfig
-LIBRETECH ALL-H3-CC H3 BOARD
+LIBRETECH ALL-H3-CC BOARDS
M: Chen-Yu Tsai <wens@csie.org>
S: Maintained
+F: configs/libretech_all_h3_cc_h2_plus_defconfig
F: configs/libretech_all_h3_cc_h3_defconfig
+F: configs/libretech_all_h3_cc_h5_defconfig
NANOPI-M1 BOARD
M: Mylène Josserand <mylene.josserand@free-electrons.com>
diff --git a/board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c b/board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c
index 5cf627d2233..39afd82195c 100644
--- a/board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c
+++ b/board/xilinx/zynq/zynq-microzed/ps7_init_gpl.c
@@ -1,9 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/******************************************************************************
* (c) Copyright 2010-2014 Xilinx, Inc. All rights reserved.
-*
-* SPDX-License-Identifier: GPL-2.0+
-*
-*
******************************************************************************/
/****************************************************************************/
/**
diff --git a/board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c b/board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c
index fc325a6b028..88ff7947f20 100644
--- a/board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c
+++ b/board/xilinx/zynq/zynq-zc702/ps7_init_gpl.c
@@ -1,9 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/******************************************************************************
* (c) Copyright 2010-2014 Xilinx, Inc. All rights reserved.
-*
-* SPDX-License-Identifier: GPL-2.0+
-*
-*
******************************************************************************/
/****************************************************************************/
/**
diff --git a/board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c b/board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c
index ca5490f0b0e..e9e4e4d077b 100644
--- a/board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c
+++ b/board/xilinx/zynq/zynq-zc706/ps7_init_gpl.c
@@ -1,9 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/******************************************************************************
* (c) Copyright 2010-2014 Xilinx, Inc. All rights reserved.
-*
-* SPDX-License-Identifier: GPL-2.0+
-*
-*
******************************************************************************/
/****************************************************************************/
/**
diff --git a/board/xilinx/zynq/zynq-zed/ps7_init_gpl.c b/board/xilinx/zynq/zynq-zed/ps7_init_gpl.c
index 54c803cfa65..df7d3535ddb 100644
--- a/board/xilinx/zynq/zynq-zed/ps7_init_gpl.c
+++ b/board/xilinx/zynq/zynq-zed/ps7_init_gpl.c
@@ -1,9 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/******************************************************************************
* (c) Copyright 2010-2014 Xilinx, Inc. All rights reserved.
-*
-* SPDX-License-Identifier: GPL-2.0+
-*
-*
******************************************************************************/
/****************************************************************************/
/**
diff --git a/cmd/Kconfig b/cmd/Kconfig
index ae49b824715..eb14e08f773 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -601,6 +601,14 @@ config CMD_ARMFLASH
help
ARM Ltd reference designs flash partition access
+config CMD_ADC
+ bool "adc - Access Analog to Digital Converters info and data"
+ select ADC
+ select DM_REGULATOR
+ help
+ Shows ADC device info and permit printing one-shot analog converted
+ data from a named Analog to Digital Converter.
+
config CMD_CLK
bool "clk - Show clock frequencies"
help
diff --git a/cmd/Makefile b/cmd/Makefile
index d7349023a44..0d7322ee0a4 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -12,6 +12,7 @@ obj-y += version.o
# command
obj-$(CONFIG_CMD_AES) += aes.o
+obj-$(CONFIG_CMD_ADC) += adc.o
obj-$(CONFIG_CMD_ARMFLASH) += armflash.o
obj-y += blk_common.o
obj-$(CONFIG_SOURCE) += source.o
diff --git a/cmd/adc.c b/cmd/adc.c
new file mode 100644
index 00000000000..c8857ed147e
--- /dev/null
+++ b/cmd/adc.c
@@ -0,0 +1,120 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ */
+#include <common.h>
+#include <command.h>
+#include <dm.h>
+#include <adc.h>
+
+static int do_adc_list(cmd_tbl_t *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ struct udevice *dev;
+ int ret;
+
+ ret = uclass_first_device_err(UCLASS_ADC, &dev);
+ if (ret) {
+ printf("No available ADC device\n");
+ return CMD_RET_FAILURE;
+ }
+
+ do {
+ printf("- %s\n", dev->name);
+
+ ret = uclass_next_device(&dev);
+ if (ret)
+ return CMD_RET_FAILURE;
+ } while (dev);
+
+ return CMD_RET_SUCCESS;
+}
+
+static int do_adc_info(cmd_tbl_t *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ struct udevice *dev;
+ unsigned int data_mask;
+ int ret, vss, vdd;
+
+ if (argc < 2)
+ return CMD_RET_USAGE;
+
+ ret = uclass_get_device_by_name(UCLASS_ADC, argv[1], &dev);
+ if (ret) {
+ printf("Unknown ADC device %s\n", argv[1]);
+ return CMD_RET_FAILURE;
+ }
+
+ printf("ADC Device '%s' :\n", argv[1]);
+
+ ret = adc_data_mask(dev, &data_mask);
+ if (!ret)
+ printf("data mask: %x\n", data_mask);
+
+ ret = adc_vdd_value(dev, &vdd);
+ if (!ret)
+ printf("vdd: %duV\n", vdd);
+
+ ret = adc_vss_value(dev, &vss);
+ if (!ret)
+ printf("vss: %duV\n", vss);
+
+ return CMD_RET_SUCCESS;
+}
+
+static int do_adc_single(cmd_tbl_t *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ unsigned int data;
+ int ret;
+
+ if (argc < 3)
+ return CMD_RET_USAGE;
+
+ ret = adc_channel_single_shot(argv[1], simple_strtol(argv[2], NULL, 0),
+ &data);
+ if (ret) {
+ printf("Error getting single shot for device %s channel %s\n",
+ argv[1], argv[2]);
+ return CMD_RET_FAILURE;
+ }
+
+ printf("%u\n", data);
+
+ return CMD_RET_SUCCESS;
+}
+
+static cmd_tbl_t cmd_adc_sub[] = {
+ U_BOOT_CMD_MKENT(list, 1, 1, do_adc_list, "", ""),
+ U_BOOT_CMD_MKENT(info, 2, 1, do_adc_info, "", ""),
+ U_BOOT_CMD_MKENT(single, 3, 1, do_adc_single, "", ""),
+};
+
+static int do_adc(cmd_tbl_t *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ cmd_tbl_t *c;
+
+ if (argc < 2)
+ return CMD_RET_USAGE;
+
+ /* Strip off leading 'adc' command argument */
+ argc--;
+ argv++;
+
+ c = find_cmd_tbl(argv[0], &cmd_adc_sub[0], ARRAY_SIZE(cmd_adc_sub));
+
+ if (c)
+ return c->cmd(cmdtp, flag, argc, argv);
+ else
+ return CMD_RET_USAGE;
+}
+
+static char adc_help_text[] =
+ "list - list ADC devices\n"
+ "adc info <name> - Get ADC device info\n"
+ "adc single <name> <channel> - Get Single data of ADC device channel";
+
+U_BOOT_CMD(adc, 4, 1, do_adc, "ADC sub-system", adc_help_text);
diff --git a/cmd/bootefi.c b/cmd/bootefi.c
index 5498a5fccf7..11b84c55289 100644
--- a/cmd/bootefi.c
+++ b/cmd/bootefi.c
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* EFI application loader
*
* Copyright (c) 2016 Alexander Graf
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <charset.h>
diff --git a/common/autoboot.c b/common/autoboot.c
index 9b9fb534f08..94133eaeda7 100644
--- a/common/autoboot.c
+++ b/common/autoboot.c
@@ -13,6 +13,7 @@
#include <menu.h>
#include <post.h>
#include <u-boot/sha256.h>
+#include <bootcount.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -290,18 +291,8 @@ const char *bootdelay_process(void)
{
char *s;
int bootdelay;
-#ifdef CONFIG_BOOTCOUNT_LIMIT
- unsigned long bootcount = 0;
- unsigned long bootlimit = 0;
-#endif /* CONFIG_BOOTCOUNT_LIMIT */
-
-#ifdef CONFIG_BOOTCOUNT_LIMIT
- bootcount = bootcount_load();
- bootcount++;
- bootcount_store(bootcount);
- env_set_ulong("bootcount", bootcount);
- bootlimit = env_get_ulong("bootlimit", 10, 0);
-#endif /* CONFIG_BOOTCOUNT_LIMIT */
+
+ bootcount_inc();
s = env_get("bootdelay");
bootdelay = s ? (int)simple_strtol(s, NULL, 10) : CONFIG_BOOTDELAY;
@@ -323,13 +314,9 @@ const char *bootdelay_process(void)
s = env_get("failbootcmd");
} else
#endif /* CONFIG_POST */
-#ifdef CONFIG_BOOTCOUNT_LIMIT
- if (bootlimit && (bootcount > bootlimit)) {
- printf("Warning: Bootlimit (%u) exceeded. Using altbootcmd.\n",
- (unsigned)bootlimit);
+ if (bootcount_error())
s = env_get("altbootcmd");
- } else
-#endif /* CONFIG_BOOTCOUNT_LIMIT */
+ else
s = env_get("bootcmd");
process_fdt_options(gd->fdt_blob);
diff --git a/common/bootm.c b/common/bootm.c
index 61e8075377e..a0ffc1cd679 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -424,17 +424,17 @@ int bootm_decomp_image(int comp, ulong load, ulong image_start, int type,
}
#ifndef USE_HOSTCC
-static int bootm_load_os(bootm_headers_t *images, unsigned long *load_end,
- int boot_progress)
+static int bootm_load_os(bootm_headers_t *images, int boot_progress)
{
image_info_t os = images->os;
ulong load = os.load;
+ ulong load_end;
ulong blob_start = os.start;
ulong blob_end = os.end;
ulong image_start = os.image_start;
ulong image_len = os.image_len;
ulong flush_start = ALIGN_DOWN(load, ARCH_DMA_MINALIGN);
- ulong flush_len = *load_end - load;
+ ulong flush_len;
bool no_overlap;
void *load_buf, *image_buf;
int err;
@@ -443,27 +443,28 @@ static int bootm_load_os(bootm_headers_t *images, unsigned long *load_end,
image_buf = map_sysmem(os.image_start, image_len);
err = bootm_decomp_image(os.comp, load, os.image_start, os.type,
load_buf, image_buf, image_len,
- CONFIG_SYS_BOOTM_LEN, load_end);
+ CONFIG_SYS_BOOTM_LEN, &load_end);
if (err) {
bootstage_error(BOOTSTAGE_ID_DECOMP_IMAGE);
return err;
}
+ flush_len = load_end - load;
if (flush_start < load)
flush_len += load - flush_start;
flush_cache(flush_start, ALIGN(flush_len, ARCH_DMA_MINALIGN));
- debug(" kernel loaded at 0x%08lx, end = 0x%08lx\n", load, *load_end);
+ debug(" kernel loaded at 0x%08lx, end = 0x%08lx\n", load, load_end);
bootstage_mark(BOOTSTAGE_ID_KERNEL_LOADED);
no_overlap = (os.comp == IH_COMP_NONE && load == image_start);
- if (!no_overlap && (load < blob_end) && (*load_end > blob_start)) {
+ if (!no_overlap && load < blob_end && load_end > blob_start) {
debug("images.os.start = 0x%lX, images.os.end = 0x%lx\n",
blob_start, blob_end);
debug("images.os.load = 0x%lx, load_end = 0x%lx\n", load,
- *load_end);
+ load_end);
/* Check what type of image this is. */
if (images->legacy_hdr_valid) {
@@ -478,6 +479,8 @@ static int bootm_load_os(bootm_headers_t *images, unsigned long *load_end,
}
}
+ lmb_reserve(&images->lmb, images->os.load, (load_end -
+ images->os.load));
return 0;
}
@@ -629,14 +632,9 @@ int do_bootm_states(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
/* Load the OS */
if (!ret && (states & BOOTM_STATE_LOADOS)) {
- ulong load_end;
-
iflag = bootm_disable_interrupts();
- ret = bootm_load_os(images, &load_end, 0);
- if (ret == 0)
- lmb_reserve(&images->lmb, images->os.load,
- (load_end - images->os.load));
- else if (ret && ret != BOOTM_ERR_OVERLAP)
+ ret = bootm_load_os(images, 0);
+ if (ret && ret != BOOTM_ERR_OVERLAP)
goto err;
else if (ret == BOOTM_ERR_OVERLAP)
ret = 0;
diff --git a/common/image-fit.c b/common/image-fit.c
index 9798fcd1306..5b93dceae15 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1571,6 +1571,7 @@ int fit_conf_get_prop_node(const void *fit, int noffset,
return fit_conf_get_prop_node_index(fit, noffset, prop_name, 0);
}
+#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_FIT_SPL_PRINT)
/**
* fit_conf_print - prints out the FIT configuration details
* @fit: pointer to the FIT format image header
@@ -1589,6 +1590,7 @@ void fit_conf_print(const void *fit, int noffset, const char *p)
const char *uname;
int ret;
int fdt_index, loadables_index;
+ int ndepth;
/* Mandatory properties */
ret = fit_get_desc(fit, noffset, &desc);
@@ -1642,7 +1644,18 @@ void fit_conf_print(const void *fit, int noffset, const char *p)
}
printf("%s\n", uname);
}
+
+ /* Process all hash subnodes of the component configuration node */
+ for (ndepth = 0, noffset = fdt_next_node(fit, noffset, &ndepth);
+ (noffset >= 0) && (ndepth > 0);
+ noffset = fdt_next_node(fit, noffset, &ndepth)) {
+ if (ndepth == 1) {
+ /* Direct child node of the component configuration node */
+ fit_image_print_verification_data(fit, noffset, p);
+ }
+ }
}
+#endif /* !defined(CONFIG_SPL_BUILD) || defined(CONFIG_FIT_SPL_PRINT) */
static int fit_image_select(const void *fit, int rd_noffset, int verify)
{
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 259f96607ea..431710a93bd 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -54,6 +54,15 @@ config SPL_BOOTROM_SUPPORT
BOOT_DEVICE_BOOTROM (or fall-through to the next boot device in the
boot device list, if not implemented for a given board)
+config SPL_BOOTCOUNT_LIMIT
+ bool "Support bootcount in SPL"
+ depends on SPL_ENV_SUPPORT
+ help
+ On some boards, which use 'falcon' mode, it is necessary to check
+ and increment the number of boot attempts. Such boards do not
+ use proper U-Boot for normal boot flow and hence needs those
+ adjustments to be done in the SPL.
+
config SPL_RAW_IMAGE_SUPPORT
bool "Support SPL loading and booting of RAW images"
default n if (ARCH_MX6 && (SPL_MMC_SUPPORT || SPL_SATA_SUPPORT))
diff --git a/common/spl/spl.c b/common/spl/spl.c
index 3dafeaed3a1..6606417ff74 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -19,6 +19,7 @@
#include <dm/root.h>
#include <linux/compiler.h>
#include <fdt_support.h>
+#include <bootcount.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -416,6 +417,8 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
spl_board_init();
#endif
+ bootcount_inc();
+
memset(&spl_image, '\0', sizeof(spl_image));
#ifdef CONFIG_SYS_SPL_ARGS_ADDR
spl_image.arg = (void *)CONFIG_SYS_SPL_ARGS_ADDR;
diff --git a/common/xyzModem.c b/common/xyzModem.c
index a126e32ed35..830fca83875 100644
--- a/common/xyzModem.c
+++ b/common/xyzModem.c
@@ -171,7 +171,7 @@ parse_num (char *s, unsigned long *val, char **es, char *delim)
}
-#ifdef DEBUG
+#if defined(DEBUG) && !defined(CONFIG_USE_TINY_PRINTF)
/*
* Note: this debug setup works by storing the strings in a fixed buffer
*/
@@ -180,15 +180,16 @@ static char *zm_out = zm_debug_buf;
static char *zm_out_start = zm_debug_buf;
static int
-zm_dprintf (char *fmt, ...)
+zm_dprintf(char *fmt, ...)
{
- int len;
- va_list args;
-
- va_start (args, fmt);
- len = diag_vsprintf (zm_out, fmt, args);
- zm_out += len;
- return len;
+ int len;
+ va_list args;
+
+ va_start(args, fmt);
+ len = diag_vsprintf(zm_out, fmt, args);
+ va_end(args);
+ zm_out += len;
+ return len;
}
static void
diff --git a/configs/bananapi_m2_berry_defconfig b/configs/bananapi_m2_berry_defconfig
new file mode 100644
index 00000000000..9d75108d048
--- /dev/null
+++ b/configs/bananapi_m2_berry_defconfig
@@ -0,0 +1,14 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_SPL=y
+CONFIG_MACH_SUN8I_R40=y
+CONFIG_DRAM_CLK=576
+CONFIG_DRAM_ZQ=3881979
+CONFIG_DRAM_ODT_EN=y
+CONFIG_MMC0_CD_PIN="PH13"
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-v40-bananapi-m2-berry"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL_I2C_SUPPORT=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_AXP_DLDO4_VOLT=2500
+CONFIG_AXP_ELDO3_VOLT=1200
diff --git a/configs/display5_defconfig b/configs/display5_defconfig
index e52f4e00af8..db8212ca7cf 100644
--- a/configs/display5_defconfig
+++ b/configs/display5_defconfig
@@ -16,6 +16,7 @@ CONFIG_SPL_LOAD_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q"
CONFIG_SUPPORT_RAW_INITRD=y
+CONFIG_SPL_BOOTCOUNT_LIMIT=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
CONFIG_SPL_DMA_SUPPORT=y
CONFIG_SPL_ENV_SUPPORT=y
@@ -53,6 +54,9 @@ CONFIG_EFI_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_FSL_ESDHC=y
+CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0x020CC068
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/libretech_all_h3_cc_h2_plus_defconfig b/configs/libretech_all_h3_cc_h2_plus_defconfig
new file mode 100644
index 00000000000..0cbcd48aadb
--- /dev/null
+++ b/configs/libretech_all_h3_cc_h2_plus_defconfig
@@ -0,0 +1,15 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_SPL=y
+CONFIG_MACH_SUN8I_H3=y
+CONFIG_DRAM_CLK=672
+CONFIG_DRAM_ZQ=3881979
+CONFIG_DRAM_ODT_EN=y
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-libretech-all-h3-cc"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
diff --git a/configs/libretech_all_h3_cc_h3_defconfig b/configs/libretech_all_h3_cc_h3_defconfig
index 6072680e471..185facdf3ea 100644
--- a/configs/libretech_all_h3_cc_h3_defconfig
+++ b/configs/libretech_all_h3_cc_h3_defconfig
@@ -5,10 +5,8 @@ CONFIG_MACH_SUN8I_H3=y
CONFIG_DRAM_CLK=672
CONFIG_DRAM_ZQ=3881979
CONFIG_DRAM_ODT_EN=y
-CONFIG_R_I2C_ENABLE=y
CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-libretech-all-h3-cc"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_FLASH is not set
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
diff --git a/configs/libretech_all_h3_cc_h5_defconfig b/configs/libretech_all_h3_cc_h5_defconfig
new file mode 100644
index 00000000000..061bddc8fd5
--- /dev/null
+++ b/configs/libretech_all_h3_cc_h5_defconfig
@@ -0,0 +1,15 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_SPL=y
+CONFIG_MACH_SUN50I_H5=y
+CONFIG_DRAM_CLK=672
+CONFIG_DRAM_ZQ=3881979
+CONFIG_DRAM_ODT_EN=y
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-libretech-all-h3-cc"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
diff --git a/configs/trats2_defconfig b/configs/trats2_defconfig
index f270fc9c314..93aa211707c 100644
--- a/configs/trats2_defconfig
+++ b/configs/trats2_defconfig
@@ -37,6 +37,8 @@ CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_S5P=y
CONFIG_DM_PMIC=y
CONFIG_DM_PMIC_MAX77686=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_MAX77686=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_GADGET=y
diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig
index b7294a368bc..cb7680a0c62 100644
--- a/configs/uniphier_v8_defconfig
+++ b/configs/uniphier_v8_defconfig
@@ -43,6 +43,7 @@ CONFIG_NETDEVICES=y
CONFIG_SMC911X=y
CONFIG_SMC911X_BASE=0x0
CONFIG_SMC911X_32_BIT=y
+CONFIG_PINCONF=y
CONFIG_SYSRESET=y
CONFIG_SYSRESET_PSCI=y
CONFIG_USB=y
diff --git a/doc/README.uefi b/doc/README.uefi
index bb89b7ac2f7..196e99994a3 100644
--- a/doc/README.uefi
+++ b/doc/README.uefi
@@ -1,7 +1,7 @@
<!--
- Copyright (c) 2018 Heinrich Schuchardt
+SPDX-License-Identifier: GPL-2.0+
- SPDX-License-Identifier: GPL-2.0+
+Copyright (c) 2018 Heinrich Schuchardt
-->
# UEFI on U-Boot
diff --git a/drivers/Makefile b/drivers/Makefile
index edbcadf99ba..b3f1b600a55 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_$(SPL_TPL_)TIMER) += timer/
ifndef CONFIG_TPL_BUILD
ifdef CONFIG_SPL_BUILD
+obj-$(CONFIG_SPL_BOOTCOUNT_LIMIT) += bootcount/
obj-$(CONFIG_SPL_CPU_SUPPORT) += cpu/
obj-$(CONFIG_SPL_CRYPTO_SUPPORT) += crypto/
obj-$(CONFIG_SPL_GPIO_SUPPORT) += gpio/
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index c382e8865f7..60a6859c247 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -89,4 +89,12 @@ source "drivers/clk/exynos/Kconfig"
source "drivers/clk/at91/Kconfig"
source "drivers/clk/renesas/Kconfig"
+config ICS8N3QV01
+ bool "Enable ICS8N3QV01 VCXO driver"
+ depends on CLK
+ help
+ Support for the ICS8N3QV01 Quad-Frequency VCXO (Voltage-Controlled
+ Crystal Oscillator). The output frequency can be programmed via an
+ I2C interface.
+
endmenu
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index e05c6072233..0b4f38527ac 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_CLK_STM32MP1) += clk_stm32mp1.o
obj-$(CONFIG_CLK_UNIPHIER) += uniphier/
obj-$(CONFIG_CLK_ZYNQ) += clk_zynq.o
obj-$(CONFIG_CLK_ZYNQMP) += clk_zynqmp.o
+obj-$(CONFIG_ICS8N3QV01) += ics8n3qv01.o
obj-$(CONFIG_MACH_PIC32) += clk_pic32.o
obj-$(CONFIG_SANDBOX) += clk_sandbox.o
obj-$(CONFIG_SANDBOX) += clk_sandbox_test.o
diff --git a/drivers/clk/ics8n3qv01.c b/drivers/clk/ics8n3qv01.c
new file mode 100644
index 00000000000..e85ab1f9a06
--- /dev/null
+++ b/drivers/clk/ics8n3qv01.c
@@ -0,0 +1,230 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2017
+ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
+ *
+ * based on the gdsys osd driver, which is
+ *
+ * (C) Copyright 2010
+ * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <clk-uclass.h>
+#include <i2c.h>
+
+const long long ICS8N3QV01_FREF = 114285000;
+const long long ICS8N3QV01_FREF_LL = 114285000LL;
+const long long ICS8N3QV01_F_DEFAULT_0 = 156250000LL;
+const long long ICS8N3QV01_F_DEFAULT_1 = 125000000LL;
+const long long ICS8N3QV01_F_DEFAULT_2 = 100000000LL;
+const long long ICS8N3QV01_F_DEFAULT_3 = 25175000LL;
+
+const uint MAX_FREQ_INDEX = 3;
+
+struct ics8n3qv01_priv {
+ ulong rate;
+};
+
+static int ics8n3qv01_get_fout_calc(struct udevice *dev, uint index,
+ uint *fout_calc)
+{
+ u64 n, mint, mfrac;
+ u8 reg_a, reg_b, reg_c, reg_d, reg_f;
+ int val[6];
+ int i;
+
+ if (index > MAX_FREQ_INDEX)
+ return -EINVAL;
+
+ for (i = 0; i <= 5; ++i) {
+ u8 tmp = dm_i2c_reg_read(dev, 4 * i + index);
+
+ if (tmp < 0) {
+ debug("%s: Error while reading i2c register %d.\n",
+ dev->name, 4 * i + index);
+ return tmp;
+ }
+
+ val[i] = tmp;
+ }
+
+ reg_a = val[0]; /* Register 0 + index */
+ reg_b = val[1]; /* Register 4 + index */
+ reg_c = val[2]; /* Register 8 + index */
+ reg_d = val[3]; /* Register 12 + index */
+ reg_f = val[5]; /* Register 20 + index */
+
+ mint = ((reg_a >> 1) & 0x1f) | /* MINTi[4-0]*/
+ (reg_f & 0x20); /* MINTi[5] */
+ mfrac = ((reg_a & 0x01) << 17) | /* MFRACi[17] */
+ (reg_b << 9) | /* MFRACi[16-9] */
+ (reg_c << 1) | /* MFRACi[8-1] */
+ (reg_d >> 7); /* MFRACi[0] */
+ n = reg_d & 0x7f; /* Ni[6-0] */
+
+ *fout_calc = (mint * ICS8N3QV01_FREF_LL
+ + mfrac * ICS8N3QV01_FREF_LL / 262144LL
+ + ICS8N3QV01_FREF_LL / 524288LL
+ + n / 2)
+ / n
+ * 1000000
+ / (1000000 - 100);
+
+ return 0;
+}
+
+static int ics8n3qv01_calc_parameters(uint fout, uint *_mint, uint *_mfrac,
+ uint *_n)
+{
+ uint n, foutiic, fvcoiic, mint;
+ u64 mfrac;
+
+ n = (2215000000U + fout / 2) / fout;
+ if (fout < 417000000U)
+ n = 2 * ((2215000000U / 2 + fout / 2) / fout);
+ else
+ n = (2215000000U + fout / 2) / fout;
+
+ if ((n & 1) && n > 5)
+ n -= 1;
+
+ foutiic = fout - (fout / 10000);
+ fvcoiic = foutiic * n;
+
+ mint = fvcoiic / 114285000;
+ if (mint < 17 || mint > 63)
+ return -EINVAL;
+
+ mfrac = ((u64)fvcoiic % 114285000LL) * 262144LL
+ / 114285000LL;
+
+ *_mint = mint;
+ *_mfrac = mfrac;
+ *_n = n;
+
+ return 0;
+}
+
+static ulong ics8n3qv01_set_rate(struct clk *clk, ulong fout)
+{
+ struct ics8n3qv01_priv *priv = dev_get_priv(clk->dev);
+ uint n, mint, mfrac;
+ uint fout_calc = 0;
+ u64 fout_prog;
+ long long off_ppm;
+ int res, i;
+ u8 reg[6];
+ int tmp;
+ int addr[] = {0, 4, 8, 12, 18, 20};
+
+ priv->rate = fout;
+
+ res = ics8n3qv01_get_fout_calc(clk->dev, 1, &fout_calc);
+
+ if (res) {
+ debug("%s: Error during output frequency calculation.\n",
+ clk->dev->name);
+ return res;
+ }
+
+ off_ppm = (fout_calc - ICS8N3QV01_F_DEFAULT_1) * 1000000
+ / ICS8N3QV01_F_DEFAULT_1;
+ printf("%s: PLL is off by %lld ppm\n", clk->dev->name, off_ppm);
+ fout_prog = (u64)fout * (u64)fout_calc
+ / ICS8N3QV01_F_DEFAULT_1;
+ res = ics8n3qv01_calc_parameters(fout_prog, &mint, &mfrac, &n);
+
+ if (res) {
+ debug("%s: Cannot determine mint parameter.\n",
+ clk->dev->name);
+ return res;
+ }
+
+ /* Register 0 */
+ tmp = dm_i2c_reg_read(clk->dev, 0) & 0xc0;
+ if (tmp < 0)
+ return tmp;
+ reg[0] = tmp | (mint & 0x1f) << 1;
+ reg[0] |= (mfrac >> 17) & 0x01;
+
+ /* Register 4 */
+ reg[1] = mfrac >> 9;
+
+ /* Register 8 */
+ reg[2] = mfrac >> 1;
+
+ /* Register 12 */
+ reg[3] = mfrac << 7;
+ reg[3] |= n & 0x7f;
+
+ /* Register 18 */
+ tmp = dm_i2c_reg_read(clk->dev, 18) & 0x03;
+ if (tmp < 0)
+ return tmp;
+ reg[4] = tmp | 0x20;
+
+ /* Register 20 */
+ tmp = dm_i2c_reg_read(clk->dev, 20) & 0x1f;
+ if (tmp < 0)
+ return tmp;
+ reg[5] = tmp | (mint & (1 << 5));
+
+ for (i = 0; i <= 5; ++i) {
+ res = dm_i2c_reg_write(clk->dev, addr[i], reg[i]);
+ if (res < 0)
+ return res;
+ }
+
+ return 0;
+}
+
+static int ics8n3qv01_request(struct clk *clock)
+{
+ return 0;
+}
+
+static ulong ics8n3qv01_get_rate(struct clk *clk)
+{
+ struct ics8n3qv01_priv *priv = dev_get_priv(clk->dev);
+
+ return priv->rate;
+}
+
+static int ics8n3qv01_enable(struct clk *clk)
+{
+ return 0;
+}
+
+static int ics8n3qv01_disable(struct clk *clk)
+{
+ return 0;
+}
+
+static const struct clk_ops ics8n3qv01_ops = {
+ .request = ics8n3qv01_request,
+ .get_rate = ics8n3qv01_get_rate,
+ .set_rate = ics8n3qv01_set_rate,
+ .enable = ics8n3qv01_enable,
+ .disable = ics8n3qv01_disable,
+};
+
+static const struct udevice_id ics8n3qv01_ids[] = {
+ { .compatible = "idt,ics8n3qv01" },
+ { /* sentinel */ }
+};
+
+int ics8n3qv01_probe(struct udevice *dev)
+{
+ return 0;
+}
+
+U_BOOT_DRIVER(ics8n3qv01) = {
+ .name = "ics8n3qv01",
+ .id = UCLASS_CLK,
+ .ops = &ics8n3qv01_ops,
+ .of_match = ics8n3qv01_ids,
+ .probe = ics8n3qv01_probe,
+ .priv_auto_alloc_size = sizeof(struct ics8n3qv01_priv),
+};
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index d774569cbc2..be900cf4d6e 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -263,5 +263,9 @@ config SYS_I2C_EEPROM_ADDR_OVERFLOW
endif
-
+config GDSYS_RXAUI_CTRL
+ bool "Enable gdsys RXAUI control driver"
+ depends on MISC
+ help
+ Support gdsys FPGA's RXAUI control.
endmenu
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 3dc59eecbe1..e362609d62a 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -52,3 +52,4 @@ obj-$(CONFIG_QFW) += qfw.o
obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
obj-$(CONFIG_STM32_RCC) += stm32_rcc.o
obj-$(CONFIG_SYS_DPAA_QBMAN) += fsl_portals.o
+obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o
diff --git a/drivers/misc/gdsys_rxaui_ctrl.c b/drivers/misc/gdsys_rxaui_ctrl.c
new file mode 100644
index 00000000000..9a63c329bcd
--- /dev/null
+++ b/drivers/misc/gdsys_rxaui_ctrl.c
@@ -0,0 +1,76 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2015
+ * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
+ *
+ * (C) Copyright 2017
+ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <regmap.h>
+#include <misc.h>
+
+struct gdsys_rxaui_ctrl_regs {
+ u16 gen_cnt;
+ u16 err_cnt;
+ u16 succ_cnt;
+ u16 status;
+ u16 ctrl_0;
+ u16 ctrl_1;
+};
+
+#define rxaui_ctrl_set(map, member, val) \
+ regmap_set(map, struct gdsys_rxaui_ctrl_regs, member, val)
+
+#define rxaui_ctrl_get(map, member, valp) \
+ regmap_get(map, struct gdsys_rxaui_ctrl_regs, member, valp)
+
+struct gdsys_rxaui_ctrl_priv {
+ struct regmap *map;
+};
+
+int gdsys_rxaui_set_polarity_inversion(struct udevice *dev, bool val)
+{
+ struct gdsys_rxaui_ctrl_priv *priv = dev_get_priv(dev);
+ u16 state;
+
+ rxaui_ctrl_get(priv->map, ctrl_1, &state);
+
+ if (val)
+ state |= ~0x7800;
+ else
+ state &= ~0x7800;
+
+ rxaui_ctrl_set(priv->map, ctrl_1, state);
+
+ return 0;
+}
+
+static const struct misc_ops gdsys_rxaui_ctrl_ops = {
+ .set_enabled = gdsys_rxaui_set_polarity_inversion,
+};
+
+int gdsys_rxaui_ctrl_probe(struct udevice *dev)
+{
+ struct gdsys_rxaui_ctrl_priv *priv = dev_get_priv(dev);
+
+ regmap_init_mem(dev, &priv->map);
+
+ return 0;
+}
+
+static const struct udevice_id gdsys_rxaui_ctrl_ids[] = {
+ { .compatible = "gdsys,rxaui_ctrl" },
+ { }
+};
+
+U_BOOT_DRIVER(gdsys_rxaui_ctrl) = {
+ .name = "gdsys_rxaui_ctrl",
+ .id = UCLASS_MISC,
+ .ops = &gdsys_rxaui_ctrl_ops,
+ .of_match = gdsys_rxaui_ctrl_ids,
+ .probe = gdsys_rxaui_ctrl_probe,
+ .priv_auto_alloc_size = sizeof(struct gdsys_rxaui_ctrl_priv),
+};
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 4fa8dd83bb7..3f15f85efda 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -124,6 +124,14 @@ config MMC_VERBOSE
Enable the output of more information about the card such as the
operating mode.
+config MMC_TRACE
+ bool "MMC debugging"
+ default n
+ help
+ This is an option for use by developer. Enable MMC core debugging.
+
+ If you need to see the MMC core message, say Y.
+
config SPL_MMC_TINY
bool "Tiny MMC framework in SPL"
help
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 1a006fa95f2..4528345c676 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -982,7 +982,7 @@ static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc)
#endif
/* Set the initial clock speed */
- mmc_set_clock(mmc, 400000, false);
+ mmc_set_clock(mmc, 400000, MMC_CLK_ENABLE);
/* Disable the BRR and BWR bits in IRQSTAT */
esdhc_clrbits32(&regs->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR);
diff --git a/drivers/mmc/meson_gx_mmc.c b/drivers/mmc/meson_gx_mmc.c
index 0aea4770c5b..332f1e12a58 100644
--- a/drivers/mmc/meson_gx_mmc.c
+++ b/drivers/mmc/meson_gx_mmc.c
@@ -252,7 +252,7 @@ static int meson_mmc_probe(struct udevice *dev)
mmc->priv = pdata;
upriv->mmc = mmc;
- mmc_set_clock(mmc, cfg->f_min, false);
+ mmc_set_clock(mmc, cfg->f_min, MMC_CLK_ENABLE);
/* reset all status bits */
meson_write(mmc, STATUS_MASK, MESON_SD_EMMC_STATUS);
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 01a02fba63f..a08c69476ca 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -529,7 +529,7 @@ static int mmc_switch_voltage(struct mmc *mmc, int signal_voltage)
* During a signal voltage level switch, the clock must be gated
* for 5 ms according to the SD spec
*/
- mmc_set_clock(mmc, mmc->clock, true);
+ mmc_set_clock(mmc, mmc->clock, MMC_CLK_DISABLE);
err = mmc_set_signal_voltage(mmc, signal_voltage);
if (err)
@@ -537,7 +537,7 @@ static int mmc_switch_voltage(struct mmc *mmc, int signal_voltage)
/* Keep clock gated for at least 10 ms, though spec only says 5 ms */
mdelay(10);
- mmc_set_clock(mmc, mmc->clock, false);
+ mmc_set_clock(mmc, mmc->clock, MMC_CLK_ENABLE);
/*
* Failure to switch is indicated by the card holding
@@ -1506,6 +1506,8 @@ int mmc_set_clock(struct mmc *mmc, uint clock, bool disable)
mmc->clock = clock;
mmc->clk_disable = disable;
+ debug("clock is %s (%dHz)\n", disable ? "disabled" : "enabled", clock);
+
return mmc_set_ios(mmc);
}
@@ -1672,7 +1674,8 @@ static int sd_select_mode_and_width(struct mmc *mmc, uint card_caps)
/* configure the bus mode (host) */
mmc_select_mode(mmc, mwt->mode);
- mmc_set_clock(mmc, mmc->tran_speed, false);
+ mmc_set_clock(mmc, mmc->tran_speed,
+ MMC_CLK_ENABLE);
#ifdef MMC_SUPPORTS_TUNING
/* execute tuning if needed */
@@ -1697,7 +1700,8 @@ static int sd_select_mode_and_width(struct mmc *mmc, uint card_caps)
error:
/* revert to a safer bus speed */
mmc_select_mode(mmc, SD_LEGACY);
- mmc_set_clock(mmc, mmc->tran_speed, false);
+ mmc_set_clock(mmc, mmc->tran_speed,
+ MMC_CLK_ENABLE);
}
}
}
@@ -1858,7 +1862,7 @@ static int mmc_select_mode_and_width(struct mmc *mmc, uint card_caps)
return -ENOTSUPP;
}
- mmc_set_clock(mmc, mmc->legacy_speed, false);
+ mmc_set_clock(mmc, mmc->legacy_speed, MMC_CLK_ENABLE);
for_each_mmc_mode_by_pref(card_caps, mwt) {
for_each_supported_width(card_caps & mwt->widths,
@@ -1901,7 +1905,7 @@ static int mmc_select_mode_and_width(struct mmc *mmc, uint card_caps)
/* configure the bus mode (host) */
mmc_select_mode(mmc, mwt->mode);
- mmc_set_clock(mmc, mmc->tran_speed, false);
+ mmc_set_clock(mmc, mmc->tran_speed, MMC_CLK_ENABLE);
#ifdef MMC_SUPPORTS_TUNING
/* execute tuning if needed */
@@ -2426,7 +2430,7 @@ static void mmc_set_initial_state(struct mmc *mmc)
mmc_select_mode(mmc, MMC_LEGACY);
mmc_set_bus_width(mmc, 1);
- mmc_set_clock(mmc, 0, false);
+ mmc_set_clock(mmc, 0, MMC_CLK_ENABLE);
}
static int mmc_power_on(struct mmc *mmc)
@@ -2446,7 +2450,7 @@ static int mmc_power_on(struct mmc *mmc)
static int mmc_power_off(struct mmc *mmc)
{
- mmc_set_clock(mmc, 0, true);
+ mmc_set_clock(mmc, 0, MMC_CLK_DISABLE);
#if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR)
if (mmc->vmmc_supply) {
int ret = regulator_set_enable(mmc->vmmc_supply, false);
diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c
index fa0e449b21b..d0a0362d7ea 100644
--- a/drivers/mmc/socfpga_dw_mmc.c
+++ b/drivers/mmc/socfpga_dw_mmc.c
@@ -123,7 +123,7 @@ static int socfpga_dwmmc_probe(struct udevice *dev)
upriv->mmc = host->mmc;
host->mmc->dev = dev;
- return 0;
+ return dwmci_probe(dev);
}
static int socfpga_dwmmc_bind(struct udevice *dev)
diff --git a/drivers/net/vsc9953.c b/drivers/net/vsc9953.c
index 2388438d101..5d196cfb3f3 100644
--- a/drivers/net/vsc9953.c
+++ b/drivers/net/vsc9953.c
@@ -1,8 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2014 - 2015 Freescale Semiconductor, Inc.
*
- * SPDX-License-Identifier: GPL-2.0+
- *
* Driver for the Vitesse VSC9953 L2 Switch
*/
diff --git a/drivers/pci/pci_indirect.c b/drivers/pci/pci_indirect.c
index a24100e3a88..6134c22d1bc 100644
--- a/drivers/pci/pci_indirect.c
+++ b/drivers/pci/pci_indirect.c
@@ -7,7 +7,7 @@
#include <common.h>
-#if !defined(__I386__)
+#if !defined(__I386__) && !defined(CONFIG_DM_PCI)
#include <asm/processor.h>
#include <asm/io.h>
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
index 7b427d06ece..a5935e84de3 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
@@ -16,11 +16,42 @@
#define UNIPHIER_PINCTRL_PINMUX_BASE 0x1000
#define UNIPHIER_PINCTRL_LOAD_PINMUX 0x1700
+#define UNIPHIER_PINCTRL_DRVCTRL_BASE 0x1800
+#define UNIPHIER_PINCTRL_DRV2CTRL_BASE 0x1900
+#define UNIPHIER_PINCTRL_DRV3CTRL_BASE 0x1980
#define UNIPHIER_PINCTRL_PUPDCTRL_BASE 0x1a00
#define UNIPHIER_PINCTRL_IECTRL 0x1d00
static const char *uniphier_pinctrl_dummy_name = "_dummy";
+static int uniphier_pinctrl_get_pins_count(struct udevice *dev)
+{
+ struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
+ const struct uniphier_pinctrl_pin *pins = priv->socdata->pins;
+ int pins_count = priv->socdata->pins_count;
+
+ /*
+ * We do not list all pins in the pin table to save memory footprint.
+ * Report the max pin number + 1 to fake the framework.
+ */
+ return pins[pins_count - 1].number + 1;
+}
+
+static const char *uniphier_pinctrl_get_pin_name(struct udevice *dev,
+ unsigned int selector)
+{
+ struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
+ const struct uniphier_pinctrl_pin *pins = priv->socdata->pins;
+ int pins_count = priv->socdata->pins_count;
+ int i;
+
+ for (i = 0; i < pins_count; i++)
+ if (pins[i].number == selector)
+ return pins[i].name;
+
+ return uniphier_pinctrl_dummy_name;
+}
+
static int uniphier_pinctrl_get_groups_count(struct udevice *dev)
{
struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
@@ -113,10 +144,25 @@ static const struct pinconf_param uniphier_pinconf_params[] = {
{ "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 },
{ "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 },
{ "bias-pull-pin-default", PIN_CONFIG_BIAS_PULL_PIN_DEFAULT, 1 },
+ { "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 0 },
{ "input-enable", PIN_CONFIG_INPUT_ENABLE, 1 },
{ "input-disable", PIN_CONFIG_INPUT_ENABLE, 0 },
};
+static const struct uniphier_pinctrl_pin *
+uniphier_pinctrl_pin_get(struct uniphier_pinctrl_priv *priv, unsigned int pin)
+{
+ const struct uniphier_pinctrl_pin *pins = priv->socdata->pins;
+ int pins_count = priv->socdata->pins_count;
+ int i;
+
+ for (i = 0; i < pins_count; i++)
+ if (pins[i].number == pin)
+ return &pins[i];
+
+ return NULL;
+}
+
static int uniphier_pinconf_bias_set(struct udevice *dev, unsigned int pin,
unsigned int param, unsigned int arg)
{
@@ -157,8 +203,88 @@ static int uniphier_pinconf_bias_set(struct udevice *dev, unsigned int pin,
return 0;
}
-static int uniphier_pinconf_set_one(struct udevice *dev, unsigned int pin,
- unsigned int param, unsigned int arg)
+static const unsigned int uniphier_pinconf_drv_strengths_1bit[] = {
+ 4, 8,
+};
+
+static const unsigned int uniphier_pinconf_drv_strengths_2bit[] = {
+ 8, 12, 16, 20,
+};
+
+static const unsigned int uniphier_pinconf_drv_strengths_3bit[] = {
+ 4, 5, 7, 9, 11, 12, 14, 16,
+};
+
+static int uniphier_pinconf_drive_set(struct udevice *dev, unsigned int pin,
+ unsigned int strength)
+{
+ struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
+ const struct uniphier_pinctrl_pin *desc;
+ const unsigned int *strengths;
+ unsigned int base, stride, width, drvctrl, reg, shift;
+ u32 val, mask, tmp;
+
+ desc = uniphier_pinctrl_pin_get(priv, pin);
+ if (WARN_ON(!desc))
+ return -EINVAL;
+
+ switch (uniphier_pin_get_drv_type(desc->data)) {
+ case UNIPHIER_PIN_DRV_1BIT:
+ strengths = uniphier_pinconf_drv_strengths_1bit;
+ base = UNIPHIER_PINCTRL_DRVCTRL_BASE;
+ stride = 1;
+ width = 1;
+ break;
+ case UNIPHIER_PIN_DRV_2BIT:
+ strengths = uniphier_pinconf_drv_strengths_2bit;
+ base = UNIPHIER_PINCTRL_DRV2CTRL_BASE;
+ stride = 2;
+ width = 2;
+ break;
+ case UNIPHIER_PIN_DRV_3BIT:
+ strengths = uniphier_pinconf_drv_strengths_3bit;
+ base = UNIPHIER_PINCTRL_DRV3CTRL_BASE;
+ stride = 4;
+ width = 3;
+ break;
+ default:
+ /* drive strength control is not supported for this pin */
+ return -EINVAL;
+ }
+
+ drvctrl = uniphier_pin_get_drvctrl(desc->data);
+ drvctrl *= stride;
+
+ reg = base + drvctrl / 32 * 4;
+ shift = drvctrl % 32;
+ mask = (1U << width) - 1;
+
+ for (val = 0; val <= mask; val++) {
+ if (strengths[val] > strength)
+ break;
+ }
+
+ if (val == 0) {
+ dev_err(dev, "unsupported drive strength %u mA for pin %s\n",
+ strength, desc->name);
+ return -EINVAL;
+ }
+
+ if (!mask)
+ return 0;
+
+ val--;
+
+ tmp = readl(priv->base + reg);
+ tmp &= ~(mask << shift);
+ tmp |= (mask & val) << shift;
+ writel(tmp, priv->base + reg);
+
+ return 0;
+}
+
+static int uniphier_pinconf_set(struct udevice *dev, unsigned int pin,
+ unsigned int param, unsigned int arg)
{
int ret;
@@ -169,11 +295,14 @@ static int uniphier_pinconf_set_one(struct udevice *dev, unsigned int pin,
case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
ret = uniphier_pinconf_bias_set(dev, pin, param, arg);
break;
+ case PIN_CONFIG_DRIVE_STRENGTH:
+ ret = uniphier_pinconf_drive_set(dev, pin, arg);
+ break;
case PIN_CONFIG_INPUT_ENABLE:
ret = uniphier_pinconf_input_enable(dev, pin, arg);
break;
default:
- printf("unsupported configuration parameter %u\n", param);
+ dev_err(dev, "unsupported configuration parameter %u\n", param);
return -EINVAL;
}
@@ -190,7 +319,7 @@ static int uniphier_pinconf_group_set(struct udevice *dev,
int i, ret;
for (i = 0; i < grp->num_pins; i++) {
- ret = uniphier_pinconf_set_one(dev, grp->pins[i], param, arg);
+ ret = uniphier_pinconf_set(dev, grp->pins[i], param, arg);
if (ret)
return ret;
}
@@ -268,6 +397,8 @@ static int uniphier_pinmux_group_set(struct udevice *dev,
}
const struct pinctrl_ops uniphier_pinctrl_ops = {
+ .get_pins_count = uniphier_pinctrl_get_pins_count,
+ .get_pin_name = uniphier_pinctrl_get_pin_name,
.get_groups_count = uniphier_pinctrl_get_groups_count,
.get_group_name = uniphier_pinctrl_get_group_name,
.get_functions_count = uniphier_pinmux_get_functions_count,
@@ -276,6 +407,7 @@ const struct pinctrl_ops uniphier_pinctrl_ops = {
#if CONFIG_IS_ENABLED(PINCONF)
.pinconf_num_params = ARRAY_SIZE(uniphier_pinconf_params),
.pinconf_params = uniphier_pinconf_params,
+ .pinconf_set = uniphier_pinconf_set,
.pinconf_group_set = uniphier_pinconf_group_set,
#endif
.set_state = pinctrl_generic_set_state,
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c
index ecf4355000a..8ec87f285ed 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c
@@ -10,6 +10,15 @@
#include "pinctrl-uniphier.h"
+static const struct uniphier_pinctrl_pin uniphier_ld20_pins[] = {
+ UNIPHIER_PINCTRL_PIN(40, "RGMII_TXCLK", 28, UNIPHIER_PIN_DRV_3BIT),
+ UNIPHIER_PINCTRL_PIN(41, "RGMII_TXD0", 29, UNIPHIER_PIN_DRV_3BIT),
+ UNIPHIER_PINCTRL_PIN(42, "RGMII_TXD1", 30, UNIPHIER_PIN_DRV_3BIT),
+ UNIPHIER_PINCTRL_PIN(43, "RGMII_TXD2", 31, UNIPHIER_PIN_DRV_3BIT),
+ UNIPHIER_PINCTRL_PIN(44, "RGMII_TXD3", 32, UNIPHIER_PIN_DRV_3BIT),
+ UNIPHIER_PINCTRL_PIN(45, "RGMII_TXCTL", 33, UNIPHIER_PIN_DRV_3BIT),
+};
+
static const unsigned emmc_pins[] = {18, 19, 20, 21, 22, 23, 24, 25};
static const int emmc_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0};
static const unsigned emmc_dat8_pins[] = {26, 27, 28, 29};
@@ -102,6 +111,8 @@ static const char * const uniphier_ld20_functions[] = {
};
static struct uniphier_pinctrl_socdata uniphier_ld20_pinctrl_socdata = {
+ .pins = uniphier_ld20_pins,
+ .pins_count = ARRAY_SIZE(uniphier_ld20_pins),
.groups = uniphier_ld20_groups,
.groups_count = ARRAY_SIZE(uniphier_ld20_groups),
.functions = uniphier_ld20_functions,
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c
index b9076678b2e..30d411694c5 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c
@@ -10,17 +10,6 @@
#include "pinctrl-uniphier.h"
-static const struct uniphier_pinctrl_pin uniphier_ld6b_pins[] = {
- UNIPHIER_PINCTRL_PIN(113, 0),
- UNIPHIER_PINCTRL_PIN(114, 0),
- UNIPHIER_PINCTRL_PIN(115, 0),
- UNIPHIER_PINCTRL_PIN(116, 0),
- UNIPHIER_PINCTRL_PIN(217, 0),
- UNIPHIER_PINCTRL_PIN(218, 0),
- UNIPHIER_PINCTRL_PIN(219, 0),
- UNIPHIER_PINCTRL_PIN(220, 0),
-};
-
static const unsigned emmc_pins[] = {36, 37, 38, 39, 40, 41, 42};
static const int emmc_muxvals[] = {1, 1, 1, 1, 1, 1, 1};
static const unsigned emmc_dat8_pins[] = {43, 44, 45, 46};
@@ -134,8 +123,6 @@ static const char * const uniphier_ld6b_functions[] = {
};
static struct uniphier_pinctrl_socdata uniphier_ld6b_pinctrl_socdata = {
- .pins = uniphier_ld6b_pins,
- .pins_count = ARRAY_SIZE(uniphier_ld6b_pins),
.groups = uniphier_ld6b_groups,
.groups_count = ARRAY_SIZE(uniphier_ld6b_groups),
.functions = uniphier_ld6b_functions,
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier.h b/drivers/pinctrl/uniphier/pinctrl-uniphier.h
index 6557f6a6c7e..8f83ecae7db 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier.h
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier.h
@@ -8,15 +8,48 @@
#define __PINCTRL_UNIPHIER_H__
#include <linux/bitops.h>
-#include <linux/bug.h>
+#include <linux/build_bug.h>
#include <linux/kernel.h>
#include <linux/types.h>
-#define UNIPHIER_PIN_ATTR_PACKED(iectrl) (iectrl)
+/* drive strength control register number */
+#define UNIPHIER_PIN_DRVCTRL_SHIFT 0
+#define UNIPHIER_PIN_DRVCTRL_BITS 9
+#define UNIPHIER_PIN_DRVCTRL_MASK ((1U << (UNIPHIER_PIN_DRVCTRL_BITS)) \
+ - 1)
+
+/* drive control type */
+#define UNIPHIER_PIN_DRV_TYPE_SHIFT ((UNIPHIER_PIN_DRVCTRL_SHIFT) + \
+ (UNIPHIER_PIN_DRVCTRL_BITS))
+#define UNIPHIER_PIN_DRV_TYPE_BITS 2
+#define UNIPHIER_PIN_DRV_TYPE_MASK ((1U << (UNIPHIER_PIN_DRV_TYPE_BITS)) \
+ - 1)
+
+/* drive control type */
+enum uniphier_pin_drv_type {
+ UNIPHIER_PIN_DRV_1BIT, /* 2 level control: 4/8 mA */
+ UNIPHIER_PIN_DRV_2BIT, /* 4 level control: 8/12/16/20 mA */
+ UNIPHIER_PIN_DRV_3BIT, /* 8 level control: 4/5/7/9/11/12/14/16 mA */
+};
+
+#define UNIPHIER_PIN_DRVCTRL(x) \
+ (((x) & (UNIPHIER_PIN_DRVCTRL_MASK)) << (UNIPHIER_PIN_DRVCTRL_SHIFT))
+#define UNIPHIER_PIN_DRV_TYPE(x) \
+ (((x) & (UNIPHIER_PIN_DRV_TYPE_MASK)) << (UNIPHIER_PIN_DRV_TYPE_SHIFT))
-static inline unsigned int uniphier_pin_get_iectrl(unsigned long data)
+#define UNIPHIER_PIN_ATTR_PACKED(drvctrl, drv_type) \
+ UNIPHIER_PIN_DRVCTRL(drvctrl) | \
+ UNIPHIER_PIN_DRV_TYPE(drv_type)
+
+static inline unsigned int uniphier_pin_get_drvctrl(unsigned int data)
{
- return data;
+ return (data >> UNIPHIER_PIN_DRVCTRL_SHIFT) & UNIPHIER_PIN_DRVCTRL_MASK;
+}
+
+static inline unsigned int uniphier_pin_get_drv_type(unsigned int data)
+{
+ return (data >> UNIPHIER_PIN_DRV_TYPE_SHIFT) &
+ UNIPHIER_PIN_DRV_TYPE_MASK;
}
/**
@@ -27,7 +60,8 @@ static inline unsigned int uniphier_pin_get_iectrl(unsigned long data)
*/
struct uniphier_pinctrl_pin {
unsigned number;
- unsigned long data;
+ const char *name;
+ unsigned int data;
};
/**
@@ -72,10 +106,11 @@ struct uniphier_pinctrl_socdata {
#define UNIPHIER_PINCTRL_CAPS_MUX_4BIT BIT(0)
};
-#define UNIPHIER_PINCTRL_PIN(a, b) \
+#define UNIPHIER_PINCTRL_PIN(a, b, c, d) \
{ \
.number = a, \
- .data = UNIPHIER_PIN_ATTR_PACKED(b), \
+ .name = b, \
+ .data = UNIPHIER_PIN_ATTR_PACKED(c, d), \
}
#define __UNIPHIER_PINCTRL_GROUP(grp) \
diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile
index 64382b9deb6..85ab176c0a6 100644
--- a/drivers/power/pmic/Makefile
+++ b/drivers/power/pmic/Makefile
@@ -28,7 +28,6 @@ obj-$(CONFIG_POWER_MAX77696) += pmic_max77696.o
obj-$(CONFIG_POWER_MAX8998) += pmic_max8998.o
obj-$(CONFIG_POWER_MAX8997) += pmic_max8997.o
obj-$(CONFIG_POWER_MUIC_MAX8997) += muic_max8997.o
-obj-$(CONFIG_POWER_MAX77686) += pmic_max77686.o
obj-$(CONFIG_POWER_PFUZE100) += pmic_pfuze100.o
obj-$(CONFIG_POWER_PFUZE3000) += pmic_pfuze3000.o
obj-$(CONFIG_POWER_TPS65217) += pmic_tps65217.o
diff --git a/drivers/power/pmic/pmic_max77686.c b/drivers/power/pmic/pmic_max77686.c
deleted file mode 100644
index 8b3d3f44e52..00000000000
--- a/drivers/power/pmic/pmic_max77686.c
+++ /dev/null
@@ -1,303 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2012 Samsung Electronics
- * Rajeshwari Shinde <rajeshwari.s@samsung.com>
- */
-
-#include <common.h>
-#include <fdtdec.h>
-#include <i2c.h>
-#include <power/pmic.h>
-#include <power/max77686_pmic.h>
-#include <errno.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-static const char max77686_buck_addr[] = {
- 0xff, 0x10, 0x12, 0x1c, 0x26, 0x30, 0x32, 0x34, 0x36, 0x38
-};
-
-static unsigned int max77686_ldo_volt2hex(int ldo, ulong uV)
-{
- unsigned int hex = 0;
-
- switch (ldo) {
- case 1:
- case 2:
- case 6:
- case 7:
- case 8:
- case 15:
- hex = (uV - 800000) / 25000;
- break;
- default:
- hex = (uV - 800000) / 50000;
- }
-
- if (hex >= 0 && hex <= MAX77686_LDO_VOLT_MAX_HEX)
- return hex;
-
- debug("%s: %ld is wrong voltage value for LDO%d\n", __func__, uV, ldo);
- return 0;
-}
-
-static int max77686_buck_volt2hex(int buck, ulong uV)
-{
- int hex = 0;
-
- if (buck < 5 || buck > 9) {
- debug("%s: buck %d is not supported\n", __func__, buck);
- return -EINVAL;
- }
-
- hex = (uV - 750000) / 50000;
-
- if (hex >= 0 && hex <= MAX77686_BUCK_VOLT_MAX_HEX)
- return hex;
-
- debug("%s: %ld is wrong voltage value for BUCK%d\n",
- __func__, uV, buck);
- return -EINVAL;
-}
-
-int max77686_set_ldo_voltage(struct pmic *p, int ldo, ulong uV)
-{
- unsigned int val, ret, hex, adr;
-
- if (ldo < 1 || ldo > 26) {
- printf("%s: %d is wrong ldo number\n", __func__, ldo);
- return -EINVAL;
- }
-
- adr = MAX77686_REG_PMIC_LDO1CTRL1 + ldo - 1;
- hex = max77686_ldo_volt2hex(ldo, uV);
-
- if (!hex)
- return -EINVAL;
-
- ret = pmic_reg_read(p, adr, &val);
- if (ret)
- return ret;
-
- val &= ~MAX77686_LDO_VOLT_MASK;
- val |= hex;
- ret |= pmic_reg_write(p, adr, val);
-
- return ret;
-}
-
-int max77686_set_buck_voltage(struct pmic *p, int buck, ulong uV)
-{
- unsigned int val, adr;
- int hex, ret;
-
- if (buck < 5 || buck > 9) {
- printf("%s: %d is an unsupported bucket number\n",
- __func__, buck);
- return -EINVAL;
- }
-
- adr = max77686_buck_addr[buck] + 1;
- hex = max77686_buck_volt2hex(buck, uV);
-
- if (hex < 0)
- return hex;
-
- ret = pmic_reg_read(p, adr, &val);
- if (ret)
- return ret;
-
- val &= ~MAX77686_BUCK_VOLT_MASK;
- ret |= pmic_reg_write(p, adr, val | hex);
-
- return ret;
-}
-
-int max77686_set_ldo_mode(struct pmic *p, int ldo, char opmode)
-{
- unsigned int val, ret, adr, mode;
-
- if (ldo < 1 || 26 < ldo) {
- printf("%s: %d is wrong ldo number\n", __func__, ldo);
- return -EINVAL;
- }
-
- adr = MAX77686_REG_PMIC_LDO1CTRL1 + ldo - 1;
-
- /* mode */
- switch (opmode) {
- case OPMODE_OFF:
- mode = MAX77686_LDO_MODE_OFF;
- break;
- case OPMODE_STANDBY:
- switch (ldo) {
- case 2:
- case 6:
- case 7:
- case 8:
- case 10:
- case 11:
- case 12:
- case 14:
- case 15:
- case 16:
- mode = MAX77686_LDO_MODE_STANDBY;
- break;
- default:
- mode = 0xff;
- }
- break;
- case OPMODE_LPM:
- mode = MAX77686_LDO_MODE_LPM;
- break;
- case OPMODE_ON:
- mode = MAX77686_LDO_MODE_ON;
- break;
- default:
- mode = 0xff;
- }
-
- if (mode == 0xff) {
- printf("%s: %d is not supported on LDO%d\n",
- __func__, opmode, ldo);
- return -ENOTSUPP;
- }
-
- ret = pmic_reg_read(p, adr, &val);
- if (ret)
- return ret;
-
- val &= ~MAX77686_LDO_MODE_MASK;
- val |= mode;
- ret |= pmic_reg_write(p, adr, val);
-
- return ret;
-}
-
-int max77686_set_buck_mode(struct pmic *p, int buck, char opmode)
-{
- unsigned int val, ret, mask, adr, size, mode, mode_shift;
-
- size = ARRAY_SIZE(max77686_buck_addr);
- if (buck >= size) {
- printf("%s: %d is wrong buck number\n", __func__, buck);
- return -EINVAL;
- }
-
- adr = max77686_buck_addr[buck];
-
- /* mask */
- switch (buck) {
- case 2:
- case 3:
- case 4:
- mode_shift = MAX77686_BUCK_MODE_SHIFT_2;
- break;
- default:
- mode_shift = MAX77686_BUCK_MODE_SHIFT_1;
- }
-
- mask = MAX77686_BUCK_MODE_MASK << mode_shift;
-
- /* mode */
- switch (opmode) {
- case OPMODE_OFF:
- mode = MAX77686_BUCK_MODE_OFF << mode_shift;
- break;
- case OPMODE_STANDBY:
- switch (buck) {
- case 1:
- case 2:
- case 3:
- case 4:
- mode = MAX77686_BUCK_MODE_STANDBY << mode_shift;
- break;
- default:
- mode = 0xff;
- }
- break;
- case OPMODE_LPM:
- switch (buck) {
- case 2:
- case 3:
- case 4:
- mode = MAX77686_BUCK_MODE_LPM << mode_shift;
- break;
- default:
- mode = 0xff;
- }
- break;
- case OPMODE_ON:
- mode = MAX77686_BUCK_MODE_ON << mode_shift;
- break;
- default:
- mode = 0xff;
- }
-
- if (mode == 0xff) {
- printf("%s: %d is not supported on BUCK%d\n",
- __func__, opmode, buck);
- return -ENOTSUPP;
- }
-
- ret = pmic_reg_read(p, adr, &val);
- if (ret)
- return ret;
-
- val &= ~mask;
- val |= mode;
- ret |= pmic_reg_write(p, adr, val);
-
- return ret;
-}
-
-int pmic_init(unsigned char bus)
-{
- static const char name[] = "MAX77686_PMIC";
- struct pmic *p = pmic_alloc();
-#if CONFIG_IS_ENABLED(OF_CONTROL)
- const void *blob = gd->fdt_blob;
- int node, parent, tmp;
-#endif
-
- if (!p) {
- printf("%s: POWER allocation error!\n", __func__);
- return -ENOMEM;
- }
-
-#if CONFIG_IS_ENABLED(OF_CONTROL)
- node = fdtdec_next_compatible(blob, 0, COMPAT_MAXIM_MAX77686_PMIC);
- if (node < 0) {
- debug("PMIC: No node for PMIC Chip in device tree\n");
- debug("node = %d\n", node);
- return -ENODEV;
- }
-
- parent = fdt_parent_offset(blob, node);
- if (parent < 0) {
- debug("%s: Cannot find node parent\n", __func__);
- return -ENODEV;
- }
-
- /* tmp since p->bus is unsigned */
- tmp = i2c_get_bus_num_fdt(parent);
- if (tmp < 0) {
- debug("%s: Cannot find I2C bus\n", __func__);
- return -ENODEV;
- }
- p->bus = tmp;
- p->hw.i2c.addr = fdtdec_get_int(blob, node, "reg", 9);
-#else
- p->bus = bus;
- p->hw.i2c.addr = MAX77686_I2C_ADDR;
-#endif
-
- p->name = name;
- p->interface = PMIC_I2C;
- p->number_of_regs = MAX77686_NUM_OF_REGS;
- p->hw.i2c.tx_num = 1;
-
- puts("Board PMIC init\n");
-
- return 0;
-}
diff --git a/drivers/power/regulator/pwm_regulator.c b/drivers/power/regulator/pwm_regulator.c
index f353c38a04d..cd05c9b6035 100644
--- a/drivers/power/regulator/pwm_regulator.c
+++ b/drivers/power/regulator/pwm_regulator.c
@@ -12,9 +12,6 @@
#include <errno.h>
#include <pwm.h>
#include <power/regulator.h>
-#include <linux/libfdt.h>
-#include <fdt_support.h>
-#include <fdtdec.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -93,13 +90,10 @@ static int pwm_regulator_set_voltage(struct udevice *dev, int uvolt)
static int pwm_regulator_ofdata_to_platdata(struct udevice *dev)
{
struct pwm_regulator_info *priv = dev_get_priv(dev);
- struct fdtdec_phandle_args args;
- const void *blob = gd->fdt_blob;
- int node = dev_of_offset(dev);
+ struct ofnode_phandle_args args;
int ret;
- ret = fdtdec_parse_phandle_with_args(blob, node, "pwms", "#pwm-cells",
- 0, 0, &args);
+ ret = dev_read_phandle_with_args(dev, "pwms", "#pwm-cells", 0, 0, &args);
if (ret) {
debug("%s: Cannot get PWM phandle: ret=%d\n", __func__, ret);
return ret;
@@ -108,14 +102,13 @@ static int pwm_regulator_ofdata_to_platdata(struct udevice *dev)
priv->period_ns = args.args[1];
priv->polarity = args.args[2];
- priv->init_voltage = fdtdec_get_int(blob, node,
- "regulator-init-microvolt", -1);
+ priv->init_voltage = dev_read_u32_default(dev, "regulator-init-microvolt", -1);
if (priv->init_voltage < 0) {
printf("Cannot find regulator pwm init_voltage\n");
return -EINVAL;
}
- ret = uclass_get_device_by_of_offset(UCLASS_PWM, args.node, &priv->pwm);
+ ret = uclass_get_device_by_ofnode(UCLASS_PWM, args.node, &priv->pwm);
if (ret) {
debug("%s: Cannot get PWM: ret=%d\n", __func__, ret);
return ret;
diff --git a/drivers/usb/host/ehci-rmobile.c b/drivers/usb/host/ehci-rmobile.c
index 7fe79efc177..4868581066f 100644
--- a/drivers/usb/host/ehci-rmobile.c
+++ b/drivers/usb/host/ehci-rmobile.c
@@ -1,10 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* EHCI HCD (Host Controller Driver) for USB.
*
* Copyright (C) 2013,2014 Renesas Electronics Corporation
* Copyright (C) 2014 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#include <common.h>
diff --git a/drivers/video/bridge/Makefile b/drivers/video/bridge/Makefile
index 2a746c6f8b0..45e54ac1768 100644
--- a/drivers/video/bridge/Makefile
+++ b/drivers/video/bridge/Makefile
@@ -1,8 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2015 Google, Inc
# Written by Simon Glass <sjg@chromium.org>
-#
-# SPDX-License-Identifier: GPL-2.0+
obj-$(CONFIG_VIDEO_BRIDGE) += video-bridge-uclass.o
obj-$(CONFIG_VIDEO_BRIDGE_PARADE_PS862X) += ps862x.o
diff --git a/fs/ubifs/ubifs.c b/fs/ubifs/ubifs.c
index 8249879d8a5..47fa41ad1dd 100644
--- a/fs/ubifs/ubifs.c
+++ b/fs/ubifs/ubifs.c
@@ -349,7 +349,9 @@ static int ubifs_printdir(struct file *file, void *dirent)
dbg_gen("feed '%s', ino %llu, new f_pos %#x",
dent->name, (unsigned long long)le64_to_cpu(dent->inum),
key_hash_flash(c, &dent->key));
+#ifndef __UBOOT__
ubifs_assert(le64_to_cpu(dent->ch.sqnum) > ubifs_inode(dir)->creat_sqnum);
+#endif
nm.len = le16_to_cpu(dent->nlen);
over = filldir(c, (char *)dent->name, nm.len,
@@ -431,7 +433,9 @@ static int ubifs_finddir(struct super_block *sb, char *dirname,
dbg_gen("feed '%s', ino %llu, new f_pos %#x",
dent->name, (unsigned long long)le64_to_cpu(dent->inum),
key_hash_flash(c, &dent->key));
+#ifndef __UBOOT__
ubifs_assert(le64_to_cpu(dent->ch.sqnum) > ubifs_inode(dir)->creat_sqnum);
+#endif
nm.len = le16_to_cpu(dent->nlen);
if ((strncmp(dirname, (char *)dent->name, nm.len) == 0) &&
diff --git a/include/asm-generic/pe.h b/include/asm-generic/pe.h
index d1683f238af..9a8b5e82e38 100644
--- a/include/asm-generic/pe.h
+++ b/include/asm-generic/pe.h
@@ -1,3 +1,4 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Portable Executable and Common Object Constants
*
@@ -5,8 +6,6 @@
*
* based on the "Microsoft Portable Executable and Common Object File Format
* Specification", revision 11, 2017-01-23
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _ASM_PE_H
diff --git a/include/bootcount.h b/include/bootcount.h
index 3eb802470a2..671adcc4101 100644
--- a/include/bootcount.h
+++ b/include/bootcount.h
@@ -3,11 +3,15 @@
* (C) Copyright 2012
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*/
+#ifndef _BOOTCOUNT_H__
+#define _BOOTCOUNT_H__
#include <common.h>
#include <asm/io.h>
#include <asm/byteorder.h>
+#if defined(CONFIG_SPL_BOOTCOUNT_LIMIT) || defined(CONFIG_BOOTCOUNT_LIMIT)
+
#if !defined(CONFIG_SYS_BOOTCOUNT_LE) && !defined(CONFIG_SYS_BOOTCOUNT_BE)
# if __BYTE_ORDER == __LITTLE_ENDIAN
# define CONFIG_SYS_BOOTCOUNT_LE
@@ -37,3 +41,49 @@ static inline u32 raw_bootcount_load(volatile u32 *addr)
return in_be32(addr);
}
#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+static inline int bootcount_error(void)
+{
+ unsigned long bootcount = bootcount_load();
+ unsigned long bootlimit = env_get_ulong("bootlimit", 10, 0);
+
+ if (bootlimit && bootcount > bootlimit) {
+ printf("Warning: Bootlimit (%lu) exceeded.", bootlimit);
+ if (!(gd->flags & GD_FLG_SPL_INIT))
+ printf(" Using altbootcmd.");
+ printf("\n");
+
+ return 1;
+ }
+
+ return 0;
+}
+
+static inline void bootcount_inc(void)
+{
+ unsigned long bootcount = bootcount_load();
+
+ if (gd->flags & GD_FLG_SPL_INIT) {
+ bootcount_store(++bootcount);
+ return;
+ }
+
+#ifndef CONFIG_SPL_BUILD
+ /* Only increment bootcount when no bootcount support in SPL */
+#ifndef CONFIG_SPL_BOOTCOUNT_LIMIT
+ bootcount_store(++bootcount);
+#endif
+ env_set_ulong("bootcount", bootcount);
+#endif /* !CONFIG_SPL_BUILD */
+}
+
+#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_BOOTCOUNT_LIMIT)
+void bootcount_store(ulong a) {};
+ulong bootcount_load(void) { return 0; }
+#endif /* CONFIG_SPL_BUILD && !CONFIG_SPL_BOOTCOUNT_LIMIT */
+#else
+static inline int bootcount_error(void) { return 0; }
+static inline void bootcount_inc(void) {}
+#endif /* CONFIG_SPL_BOOTCOUNT_LIMIT || CONFIG_BOOTCOUNT_LIMIT */
+#endif /* _BOOTCOUNT_H__ */
diff --git a/include/charset.h b/include/charset.h
index 2662c2f7c9a..11832cbd122 100644
--- a/include/charset.h
+++ b/include/charset.h
@@ -1,9 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* charset conversion utils
*
* Copyright (c) 2017 Rob Clark
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CHARSET_H_
diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h
index d91d08e8eb2..42f271dd5ff 100644
--- a/include/configs/am57xx_evm.h
+++ b/include/configs/am57xx_evm.h
@@ -37,31 +37,6 @@
#define CONFIG_SYS_OMAP_ABE_SYSCK
-/* Define the default GPT table for eMMC */
-#define PARTS_DEFAULT \
- /* Linux partitions */ \
- "uuid_disk=${uuid_gpt_disk};" \
- "name=bootloader,start=384K,size=1792K,uuid=${uuid_gpt_bootloader};" \
- "name=rootfs,start=2688K,size=-,uuid=${uuid_gpt_rootfs}\0" \
- /* Android partitions */ \
- "partitions_android=" \
- "uuid_disk=${uuid_gpt_disk};" \
- "name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};" \
- "name=bootloader,size=1792K,uuid=${uuid_gpt_bootloader};" \
- "name=environment,size=128K,uuid=${uuid_gpt_environment};" \
- "name=misc,size=128K,uuid=${uuid_gpt_misc};" \
- "name=reserved,size=256K,uuid=${uuid_gpt_reserved};" \
- "name=efs,size=16M,uuid=${uuid_gpt_efs};" \
- "name=crypto,size=16K,uuid=${uuid_gpt_crypto};" \
- "name=recovery,size=40M,uuid=${uuid_gpt_recovery};" \
- "name=boot,size=10M,uuid=${uuid_gpt_boot};" \
- "name=system,size=768M,uuid=${uuid_gpt_system};" \
- "name=vendor,size=256M,uuid=${uuid_gpt_vendor};" \
- "name=cache,size=256M,uuid=${uuid_gpt_cache};" \
- "name=ipu1,size=1M,uuid=${uuid_gpt_ipu1};" \
- "name=ipu2,size=1M,uuid=${uuid_gpt_ipu2};" \
- "name=userdata,size=-,uuid=${uuid_gpt_userdata}"
-
#define DFUARGS \
"dfu_bufsiz=0x10000\0" \
DFU_ALT_INFO_MMC \
diff --git a/include/configs/cl-som-am57x.h b/include/configs/cl-som-am57x.h
index 58bf0a6aa47..f0e1e8280c1 100644
--- a/include/configs/cl-som-am57x.h
+++ b/include/configs/cl-som-am57x.h
@@ -17,6 +17,8 @@
#define CONFIG_SYS_OMAP_ABE_SYSCK
+#define PARTS_DEFAULT
+
#include <configs/ti_omap5_common.h>
/* misc */
diff --git a/include/configs/cm_t54.h b/include/configs/cm_t54.h
index 3787cdc9d4d..cda1b5528ff 100644
--- a/include/configs/cm_t54.h
+++ b/include/configs/cm_t54.h
@@ -13,6 +13,8 @@
#define CONFIG_CM_T54
#define CONFIG_DRAM_2G
+#define PARTS_DEFAULT
+
#include <configs/ti_omap5_common.h>
/* EEPROM related defines */
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index 339f4f5939a..fa3f2b92fef 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -44,31 +44,6 @@
#define CONFIG_SYS_OMAP_ABE_SYSCK
#ifndef CONFIG_SPL_BUILD
-/* Define the default GPT table for eMMC */
-#define PARTS_DEFAULT \
- /* Linux partitions */ \
- "uuid_disk=${uuid_gpt_disk};" \
- "name=bootloader,start=384K,size=1792K,uuid=${uuid_gpt_bootloader};" \
- "name=rootfs,start=2688K,size=-,uuid=${uuid_gpt_rootfs}\0" \
- /* Android partitions */ \
- "partitions_android=" \
- "uuid_disk=${uuid_gpt_disk};" \
- "name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};" \
- "name=bootloader,size=1792K,uuid=${uuid_gpt_bootloader};" \
- "name=environment,size=128K,uuid=${uuid_gpt_environment};" \
- "name=misc,size=128K,uuid=${uuid_gpt_misc};" \
- "name=reserved,size=256K,uuid=${uuid_gpt_reserved};" \
- "name=efs,size=16M,uuid=${uuid_gpt_efs};" \
- "name=crypto,size=16K,uuid=${uuid_gpt_crypto};" \
- "name=recovery,size=40M,uuid=${uuid_gpt_recovery};" \
- "name=boot,size=10M,uuid=${uuid_gpt_boot};" \
- "name=system,size=768M,uuid=${uuid_gpt_system};" \
- "name=vendor,size=256M,uuid=${uuid_gpt_vendor};" \
- "name=cache,size=256M,uuid=${uuid_gpt_cache};" \
- "name=ipu1,size=1M,uuid=${uuid_gpt_ipu1};" \
- "name=ipu2,size=1M,uuid=${uuid_gpt_ipu2};" \
- "name=userdata,size=-,uuid=${uuid_gpt_userdata}"
-
#define DFUARGS \
"dfu_bufsiz=0x10000\0" \
DFU_ALT_INFO_MMC \
diff --git a/include/dt-bindings/clock/sun8i-r40-ccu.h b/include/dt-bindings/clock/sun8i-r40-ccu.h
new file mode 100644
index 00000000000..4fa5f69fc29
--- /dev/null
+++ b/include/dt-bindings/clock/sun8i-r40-ccu.h
@@ -0,0 +1,187 @@
+/*
+ * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _DT_BINDINGS_CLK_SUN8I_R40_H_
+#define _DT_BINDINGS_CLK_SUN8I_R40_H_
+
+#define CLK_CPU 24
+
+#define CLK_BUS_MIPI_DSI 29
+#define CLK_BUS_CE 30
+#define CLK_BUS_DMA 31
+#define CLK_BUS_MMC0 32
+#define CLK_BUS_MMC1 33
+#define CLK_BUS_MMC2 34
+#define CLK_BUS_MMC3 35
+#define CLK_BUS_NAND 36
+#define CLK_BUS_DRAM 37
+#define CLK_BUS_EMAC 38
+#define CLK_BUS_TS 39
+#define CLK_BUS_HSTIMER 40
+#define CLK_BUS_SPI0 41
+#define CLK_BUS_SPI1 42
+#define CLK_BUS_SPI2 43
+#define CLK_BUS_SPI3 44
+#define CLK_BUS_SATA 45
+#define CLK_BUS_OTG 46
+#define CLK_BUS_EHCI0 47
+#define CLK_BUS_EHCI1 48
+#define CLK_BUS_EHCI2 49
+#define CLK_BUS_OHCI0 50
+#define CLK_BUS_OHCI1 51
+#define CLK_BUS_OHCI2 52
+#define CLK_BUS_VE 53
+#define CLK_BUS_MP 54
+#define CLK_BUS_DEINTERLACE 55
+#define CLK_BUS_CSI0 56
+#define CLK_BUS_CSI1 57
+#define CLK_BUS_HDMI1 58
+#define CLK_BUS_HDMI0 59
+#define CLK_BUS_DE 60
+#define CLK_BUS_TVE0 61
+#define CLK_BUS_TVE1 62
+#define CLK_BUS_TVE_TOP 63
+#define CLK_BUS_GMAC 64
+#define CLK_BUS_GPU 65
+#define CLK_BUS_TVD0 66
+#define CLK_BUS_TVD1 67
+#define CLK_BUS_TVD2 68
+#define CLK_BUS_TVD3 69
+#define CLK_BUS_TVD_TOP 70
+#define CLK_BUS_TCON_LCD0 71
+#define CLK_BUS_TCON_LCD1 72
+#define CLK_BUS_TCON_TV0 73
+#define CLK_BUS_TCON_TV1 74
+#define CLK_BUS_TCON_TOP 75
+#define CLK_BUS_CODEC 76
+#define CLK_BUS_SPDIF 77
+#define CLK_BUS_AC97 78
+#define CLK_BUS_PIO 79
+#define CLK_BUS_IR0 80
+#define CLK_BUS_IR1 81
+#define CLK_BUS_THS 82
+#define CLK_BUS_KEYPAD 83
+#define CLK_BUS_I2S0 84
+#define CLK_BUS_I2S1 85
+#define CLK_BUS_I2S2 86
+#define CLK_BUS_I2C0 87
+#define CLK_BUS_I2C1 88
+#define CLK_BUS_I2C2 89
+#define CLK_BUS_I2C3 90
+#define CLK_BUS_CAN 91
+#define CLK_BUS_SCR 92
+#define CLK_BUS_PS20 93
+#define CLK_BUS_PS21 94
+#define CLK_BUS_I2C4 95
+#define CLK_BUS_UART0 96
+#define CLK_BUS_UART1 97
+#define CLK_BUS_UART2 98
+#define CLK_BUS_UART3 99
+#define CLK_BUS_UART4 100
+#define CLK_BUS_UART5 101
+#define CLK_BUS_UART6 102
+#define CLK_BUS_UART7 103
+#define CLK_BUS_DBG 104
+
+#define CLK_THS 105
+#define CLK_NAND 106
+#define CLK_MMC0 107
+#define CLK_MMC1 108
+#define CLK_MMC2 109
+#define CLK_MMC3 110
+#define CLK_TS 111
+#define CLK_CE 112
+#define CLK_SPI0 113
+#define CLK_SPI1 114
+#define CLK_SPI2 115
+#define CLK_SPI3 116
+#define CLK_I2S0 117
+#define CLK_I2S1 118
+#define CLK_I2S2 119
+#define CLK_AC97 120
+#define CLK_SPDIF 121
+#define CLK_KEYPAD 122
+#define CLK_SATA 123
+#define CLK_USB_PHY0 124
+#define CLK_USB_PHY1 125
+#define CLK_USB_PHY2 126
+#define CLK_USB_OHCI0 127
+#define CLK_USB_OHCI1 128
+#define CLK_USB_OHCI2 129
+#define CLK_IR0 130
+#define CLK_IR1 131
+
+#define CLK_DRAM_VE 133
+#define CLK_DRAM_CSI0 134
+#define CLK_DRAM_CSI1 135
+#define CLK_DRAM_TS 136
+#define CLK_DRAM_TVD 137
+#define CLK_DRAM_MP 138
+#define CLK_DRAM_DEINTERLACE 139
+#define CLK_DE 140
+#define CLK_MP 141
+#define CLK_TCON_LCD0 142
+#define CLK_TCON_LCD1 143
+#define CLK_TCON_TV0 144
+#define CLK_TCON_TV1 145
+#define CLK_DEINTERLACE 146
+#define CLK_CSI1_MCLK 147
+#define CLK_CSI_SCLK 148
+#define CLK_CSI0_MCLK 149
+#define CLK_VE 150
+#define CLK_CODEC 151
+#define CLK_AVS 152
+#define CLK_HDMI 153
+#define CLK_HDMI_SLOW 154
+
+#define CLK_DSI_DPHY 156
+#define CLK_TVE0 157
+#define CLK_TVE1 158
+#define CLK_TVD0 159
+#define CLK_TVD1 160
+#define CLK_TVD2 161
+#define CLK_TVD3 162
+#define CLK_GPU 163
+#define CLK_OUTA 164
+#define CLK_OUTB 165
+
+#endif /* _DT_BINDINGS_CLK_SUN8I_R40_H_ */
diff --git a/include/dt-bindings/reset/sun8i-r40-ccu.h b/include/dt-bindings/reset/sun8i-r40-ccu.h
new file mode 100644
index 00000000000..c5ebcf6672e
--- /dev/null
+++ b/include/dt-bindings/reset/sun8i-r40-ccu.h
@@ -0,0 +1,130 @@
+/*
+ * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _DT_BINDINGS_RST_SUN8I_R40_H_
+#define _DT_BINDINGS_RST_SUN8I_R40_H_
+
+#define RST_USB_PHY0 0
+#define RST_USB_PHY1 1
+#define RST_USB_PHY2 2
+
+#define RST_DRAM 3
+#define RST_MBUS 4
+
+#define RST_BUS_MIPI_DSI 5
+#define RST_BUS_CE 6
+#define RST_BUS_DMA 7
+#define RST_BUS_MMC0 8
+#define RST_BUS_MMC1 9
+#define RST_BUS_MMC2 10
+#define RST_BUS_MMC3 11
+#define RST_BUS_NAND 12
+#define RST_BUS_DRAM 13
+#define RST_BUS_EMAC 14
+#define RST_BUS_TS 15
+#define RST_BUS_HSTIMER 16
+#define RST_BUS_SPI0 17
+#define RST_BUS_SPI1 18
+#define RST_BUS_SPI2 19
+#define RST_BUS_SPI3 20
+#define RST_BUS_SATA 21
+#define RST_BUS_OTG 22
+#define RST_BUS_EHCI0 23
+#define RST_BUS_EHCI1 24
+#define RST_BUS_EHCI2 25
+#define RST_BUS_OHCI0 26
+#define RST_BUS_OHCI1 27
+#define RST_BUS_OHCI2 28
+#define RST_BUS_VE 29
+#define RST_BUS_MP 30
+#define RST_BUS_DEINTERLACE 31
+#define RST_BUS_CSI0 32
+#define RST_BUS_CSI1 33
+#define RST_BUS_HDMI0 34
+#define RST_BUS_HDMI1 35
+#define RST_BUS_DE 36
+#define RST_BUS_TVE0 37
+#define RST_BUS_TVE1 38
+#define RST_BUS_TVE_TOP 39
+#define RST_BUS_GMAC 40
+#define RST_BUS_GPU 41
+#define RST_BUS_TVD0 42
+#define RST_BUS_TVD1 43
+#define RST_BUS_TVD2 44
+#define RST_BUS_TVD3 45
+#define RST_BUS_TVD_TOP 46
+#define RST_BUS_TCON_LCD0 47
+#define RST_BUS_TCON_LCD1 48
+#define RST_BUS_TCON_TV0 49
+#define RST_BUS_TCON_TV1 50
+#define RST_BUS_TCON_TOP 51
+#define RST_BUS_DBG 52
+#define RST_BUS_LVDS 53
+#define RST_BUS_CODEC 54
+#define RST_BUS_SPDIF 55
+#define RST_BUS_AC97 56
+#define RST_BUS_IR0 57
+#define RST_BUS_IR1 58
+#define RST_BUS_THS 59
+#define RST_BUS_KEYPAD 60
+#define RST_BUS_I2S0 61
+#define RST_BUS_I2S1 62
+#define RST_BUS_I2S2 63
+#define RST_BUS_I2C0 64
+#define RST_BUS_I2C1 65
+#define RST_BUS_I2C2 66
+#define RST_BUS_I2C3 67
+#define RST_BUS_CAN 68
+#define RST_BUS_SCR 69
+#define RST_BUS_PS20 70
+#define RST_BUS_PS21 71
+#define RST_BUS_I2C4 72
+#define RST_BUS_UART0 73
+#define RST_BUS_UART1 74
+#define RST_BUS_UART2 75
+#define RST_BUS_UART3 76
+#define RST_BUS_UART4 77
+#define RST_BUS_UART5 78
+#define RST_BUS_UART6 79
+#define RST_BUS_UART7 80
+
+#endif /* _DT_BINDINGS_RST_SUN8I_R40_H_ */
diff --git a/include/efi_driver.h b/include/efi_driver.h
index 010e55a4739..840483a416a 100644
--- a/include/efi_driver.h
+++ b/include/efi_driver.h
@@ -1,9 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* EFI application loader
*
* Copyright (c) 2017 Heinrich Schuchardt
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _EFI_DRIVER_H
diff --git a/include/efi_loader.h b/include/efi_loader.h
index 8d21ba74b1d..2868ca25abb 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -1,9 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* EFI application loader
*
* Copyright (c) 2016 Alexander Graf
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _EFI_LOADER_H
diff --git a/include/efi_selftest.h b/include/efi_selftest.h
index c23bc24bed0..d0a76d70cae 100644
--- a/include/efi_selftest.h
+++ b/include/efi_selftest.h
@@ -1,9 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* EFI application loader
*
* Copyright (c) 2017 Heinrich Schuchardt <xypron.glpk@gmx.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _EFI_SELFTEST_H
diff --git a/include/environment/ti/boot.h b/include/environment/ti/boot.h
index a0e1cd1656a..a43b211df5e 100644
--- a/include/environment/ti/boot.h
+++ b/include/environment/ti/boot.h
@@ -14,8 +14,31 @@
#endif
#ifndef PARTS_DEFAULT
-#define PARTS_DEFAULT
-#endif
+/* Define the default GPT table for eMMC */
+#define PARTS_DEFAULT \
+ /* Linux partitions */ \
+ "uuid_disk=${uuid_gpt_disk};" \
+ "name=bootloader,start=384K,size=1792K,uuid=${uuid_gpt_bootloader};" \
+ "name=rootfs,start=2688K,size=-,uuid=${uuid_gpt_rootfs}\0" \
+ /* Android partitions */ \
+ "partitions_android=" \
+ "uuid_disk=${uuid_gpt_disk};" \
+ "name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};" \
+ "name=bootloader,size=1792K,uuid=${uuid_gpt_bootloader};" \
+ "name=environment,size=128K,uuid=${uuid_gpt_environment};" \
+ "name=misc,size=128K,uuid=${uuid_gpt_misc};" \
+ "name=reserved,size=256K,uuid=${uuid_gpt_reserved};" \
+ "name=efs,size=16M,uuid=${uuid_gpt_efs};" \
+ "name=crypto,size=16K,uuid=${uuid_gpt_crypto};" \
+ "name=recovery,size=40M,uuid=${uuid_gpt_recovery};" \
+ "name=boot,size=10M,uuid=${uuid_gpt_boot};" \
+ "name=system,size=768M,uuid=${uuid_gpt_system};" \
+ "name=vendor,size=256M,uuid=${uuid_gpt_vendor};" \
+ "name=cache,size=256M,uuid=${uuid_gpt_cache};" \
+ "name=ipu1,size=1M,uuid=${uuid_gpt_ipu1};" \
+ "name=ipu2,size=1M,uuid=${uuid_gpt_ipu2};" \
+ "name=userdata,size=-,uuid=${uuid_gpt_userdata}"
+#endif /* PARTS_DEFAULT */
#define DEFAULT_COMMON_BOOT_TI_ARGS \
"console=" CONSOLEDEV ",115200n8\0" \
diff --git a/include/fdtdec.h b/include/fdtdec.h
index eca6e98b33c..5456a17d1a7 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -136,7 +136,6 @@ enum fdt_compat_id {
COMPAT_SAMSUNG_EXYNOS_MIPI_DSI, /* Exynos mipi dsi */
COMPAT_SAMSUNG_EXYNOS_DWMMC, /* Exynos DWMMC controller */
COMPAT_SAMSUNG_EXYNOS_MMC, /* Exynos MMC controller */
- COMPAT_MAXIM_MAX77686_PMIC, /* MAX77686 PMIC */
COMPAT_GENERIC_SPI_FLASH, /* Generic SPI Flash chip */
COMPAT_MAXIM_98095_CODEC, /* MAX98095 Codec */
COMPAT_SAMSUNG_EXYNOS5_I2C, /* Exynos5 High Speed I2C Controller */
diff --git a/include/linux/log2.h b/include/linux/log2.h
index 4ded5ee68a9..d4e32ecfc64 100644
--- a/include/linux/log2.h
+++ b/include/linux/log2.h
@@ -3,6 +3,11 @@
*
* Copyright (C) 2006 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
*/
#ifndef _LINUX_LOG2_H
@@ -12,12 +17,6 @@
#include <linux/bitops.h>
/*
- * deal with unrepresentable constant logarithms
- */
-extern __attribute__((const, noreturn))
-int ____ilog2_NaN(void);
-
-/*
* non-constant log of base 2 calculators
* - the arch may override these in asm/bitops.h if they can be implemented
* more efficiently than using fls() and fls64()
@@ -39,19 +38,23 @@ int __ilog2_u64(u64 n)
}
#endif
-/*
- * Determine whether some value is a power of two, where zero is
+/**
+ * is_power_of_2() - check if a value is a power of two
+ * @n: the value to check
+ *
+ * Determine whether some value is a power of two, where zero is
* *not* considered a power of two.
+ * Return: true if @n is a power of 2, otherwise false.
*/
-
static inline __attribute__((const))
bool is_power_of_2(unsigned long n)
{
return (n != 0 && ((n & (n - 1)) == 0));
}
-/*
- * round up to nearest power of two
+/**
+ * __roundup_pow_of_two() - round up to nearest power of two
+ * @n: value to round up
*/
static inline __attribute__((const))
unsigned long __roundup_pow_of_two(unsigned long n)
@@ -59,8 +62,9 @@ unsigned long __roundup_pow_of_two(unsigned long n)
return 1UL << fls_long(n - 1);
}
-/*
- * round down to nearest power of two
+/**
+ * __rounddown_pow_of_two() - round down to nearest power of two
+ * @n: value to round down
*/
static inline __attribute__((const))
unsigned long __rounddown_pow_of_two(unsigned long n)
@@ -69,19 +73,19 @@ unsigned long __rounddown_pow_of_two(unsigned long n)
}
/**
- * ilog2 - log of base 2 of 32-bit or a 64-bit unsigned value
- * @n - parameter
+ * ilog2 - log base 2 of 32-bit or a 64-bit unsigned value
+ * @n: parameter
*
* constant-capable log of base 2 calculation
* - this can be used to initialise global variables from constant data, hence
- * the massive ternary operator construction
+ * the massive ternary operator construction
*
* selects the appropriately-sized optimised version depending on sizeof(n)
*/
#define ilog2(n) \
( \
__builtin_constant_p(n) ? ( \
- (n) < 1 ? ____ilog2_NaN() : \
+ (n) < 2 ? 0 : \
(n) & (1ULL << 63) ? 63 : \
(n) & (1ULL << 62) ? 62 : \
(n) & (1ULL << 61) ? 61 : \
@@ -144,10 +148,7 @@ unsigned long __rounddown_pow_of_two(unsigned long n)
(n) & (1ULL << 4) ? 4 : \
(n) & (1ULL << 3) ? 3 : \
(n) & (1ULL << 2) ? 2 : \
- (n) & (1ULL << 1) ? 1 : \
- (n) & (1ULL << 0) ? 0 : \
- ____ilog2_NaN() \
- ) : \
+ 1) : \
(sizeof(n) <= 4) ? \
__ilog2_u32(n) : \
__ilog2_u64(n) \
@@ -155,7 +156,7 @@ unsigned long __rounddown_pow_of_two(unsigned long n)
/**
* roundup_pow_of_two - round the given value up to nearest power of two
- * @n - parameter
+ * @n: parameter
*
* round the given value up to the nearest power of two
* - the result is undefined when n == 0
@@ -172,7 +173,7 @@ unsigned long __rounddown_pow_of_two(unsigned long n)
/**
* rounddown_pow_of_two - round the given value down to nearest power of two
- * @n - parameter
+ * @n: parameter
*
* round the given value down to the nearest power of two
* - the result is undefined when n == 0
@@ -185,6 +186,12 @@ unsigned long __rounddown_pow_of_two(unsigned long n)
__rounddown_pow_of_two(n) \
)
+static inline __attribute_const__
+int __order_base_2(unsigned long n)
+{
+ return n > 1 ? ilog2(n - 1) + 1 : 0;
+}
+
/**
* order_base_2 - calculate the (rounded up) base 2 order of the argument
* @n: parameter
@@ -198,7 +205,11 @@ unsigned long __rounddown_pow_of_two(unsigned long n)
* ob2(5) = 3
* ... and so on.
*/
-
-#define order_base_2(n) ilog2(roundup_pow_of_two(n))
-
+#define order_base_2(n) \
+( \
+ __builtin_constant_p(n) ? ( \
+ ((n) == 0 || (n) == 1) ? 0 : \
+ ilog2((n) - 1) + 1) : \
+ __order_base_2(n) \
+)
#endif /* _LINUX_LOG2_H */
diff --git a/include/mmc.h b/include/mmc.h
index d9611a0e9b5..534c317b43c 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -707,6 +707,9 @@ int mmc_voltage_to_mv(enum mmc_voltage voltage);
*/
int mmc_set_clock(struct mmc *mmc, uint clock, bool disable);
+#define MMC_CLK_ENABLE false
+#define MMC_CLK_DISABLE true
+
struct mmc *find_mmc_device(int dev_num);
int mmc_set_dev(int dev_num);
void print_mmc_devices(char separator);
diff --git a/include/net.h b/include/net.h
index 3469811aa0e..65f51d77a55 100644
--- a/include/net.h
+++ b/include/net.h
@@ -1,9 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* LiMon Monitor (LiMon) - Network.
*
* Copyright 1994 - 2000 Neil Russell.
* (See License)
- * SPDX-License-Identifier: GPL-2.0
*
* History
* 9/16/00 bor adapted to TQM823L/STK8xxL board, RARP/TFTP boot added
diff --git a/include/pe.h b/include/pe.h
index e7845bb7d2c..d73eb142cb3 100644
--- a/include/pe.h
+++ b/include/pe.h
@@ -1,11 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Portable Executable binary format structures
*
* Copyright (c) 2016 Alexander Graf
*
* Based on wine code
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _PE_H
diff --git a/lib/charset.c b/lib/charset.c
index 8cd17ea1cb7..cd186a5a5ae 100644
--- a/lib/charset.c
+++ b/lib/charset.c
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* charset conversion utils
*
* Copyright (c) 2017 Rob Clark
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <charset.h>
diff --git a/lib/efi_driver/Makefile b/lib/efi_driver/Makefile
index e35529a9522..83baa1c9a49 100644
--- a/lib/efi_driver/Makefile
+++ b/lib/efi_driver/Makefile
@@ -1,8 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2017 Heinrich Schuchardt
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
# This file only gets included with CONFIG_EFI_LOADER set, so all
# object inclusion implicitly depends on it
diff --git a/lib/efi_driver/efi_block_device.c b/lib/efi_driver/efi_block_device.c
index d9d2b14f612..9c807ff71df 100644
--- a/lib/efi_driver/efi_block_device.c
+++ b/lib/efi_driver/efi_block_device.c
@@ -1,10 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* EFI block driver
*
* Copyright (c) 2017 Heinrich Schuchardt
*
- * SPDX-License-Identifier: GPL-2.0+
- *
* The EFI uclass creates a handle for this driver and installs the
* driver binding protocol on it.
*
diff --git a/lib/efi_driver/efi_uclass.c b/lib/efi_driver/efi_uclass.c
index 46b69b479cb..b484aba072f 100644
--- a/lib/efi_driver/efi_uclass.c
+++ b/lib/efi_driver/efi_uclass.c
@@ -1,10 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Uclass for EFI drivers
*
* Copyright (c) 2017 Heinrich Schuchardt
*
- * SPDX-License-Identifier: GPL-2.0+
- *
* For each EFI driver the uclass
* - creates a handle
* - installs the driver binding protocol
diff --git a/lib/efi_loader/Makefile b/lib/efi_loader/Makefile
index 55c97c04766..c6046e36d26 100644
--- a/lib/efi_loader/Makefile
+++ b/lib/efi_loader/Makefile
@@ -1,8 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2016 Alexander Graf
#
-# SPDX-License-Identifier: GPL-2.0+
-#
# This file only gets included with CONFIG_EFI_LOADER set, so all
# object inclusion implicitly depends on it
diff --git a/lib/efi_loader/efi_bootmgr.c b/lib/efi_loader/efi_bootmgr.c
index c96b9d48c59..153e1737573 100644
--- a/lib/efi_loader/efi_bootmgr.c
+++ b/lib/efi_loader/efi_bootmgr.c
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* EFI utils
*
* Copyright (c) 2017 Rob Clark
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
index 1cfdabf6ebb..5715a8b810e 100644
--- a/lib/efi_loader/efi_boottime.c
+++ b/lib/efi_loader/efi_boottime.c
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* EFI application boot time services
*
* Copyright (c) 2016 Alexander Graf
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/lib/efi_loader/efi_console.c b/lib/efi_loader/efi_console.c
index 5d1a9a8081e..d777db8a3ed 100644
--- a/lib/efi_loader/efi_console.c
+++ b/lib/efi_loader/efi_console.c
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* EFI application console interface
*
* Copyright (c) 2016 Alexander Graf
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/lib/efi_loader/efi_device_path_to_text.c b/lib/efi_loader/efi_device_path_to_text.c
index a79e60a4eea..ca8037def23 100644
--- a/lib/efi_loader/efi_device_path_to_text.c
+++ b/lib/efi_loader/efi_device_path_to_text.c
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* EFI device path interface
*
* Copyright (c) 2017 Heinrich Schuchardt
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/lib/efi_loader/efi_device_path_utilities.c b/lib/efi_loader/efi_device_path_utilities.c
index 0ada2111db9..94015329c8c 100644
--- a/lib/efi_loader/efi_device_path_utilities.c
+++ b/lib/efi_loader/efi_device_path_utilities.c
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* EFI device path interface
*
* Copyright (c) 2017 Leif Lindholm
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
index 825a6d86de8..5c6ec5258cd 100644
--- a/lib/efi_loader/efi_disk.c
+++ b/lib/efi_loader/efi_disk.c
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* EFI application disk support
*
* Copyright (c) 2016 Alexander Graf
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/lib/efi_loader/efi_file.c b/lib/efi_loader/efi_file.c
index cec8347f558..e6a15bcb523 100644
--- a/lib/efi_loader/efi_file.c
+++ b/lib/efi_loader/efi_file.c
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* EFI utils
*
* Copyright (c) 2017 Rob Clark
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/lib/efi_loader/efi_gop.c b/lib/efi_loader/efi_gop.c
index 363ccbb7890..1afe8418e12 100644
--- a/lib/efi_loader/efi_gop.c
+++ b/lib/efi_loader/efi_gop.c
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* EFI application disk support
*
* Copyright (c) 2016 Alexander Graf
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/lib/efi_loader/efi_image_loader.c b/lib/efi_loader/efi_image_loader.c
index 2ccd476e57a..e832cde9016 100644
--- a/lib/efi_loader/efi_image_loader.c
+++ b/lib/efi_loader/efi_image_loader.c
@@ -1,11 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* EFI image loader
*
* based partly on wine code
*
* Copyright (c) 2016 Alexander Graf
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c
index 95f9ff0a140..664c651db56 100644
--- a/lib/efi_loader/efi_memory.c
+++ b/lib/efi_loader/efi_memory.c
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* EFI application memory management
*
* Copyright (c) 2016 Alexander Graf
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/lib/efi_loader/efi_net.c b/lib/efi_loader/efi_net.c
index e3132e6c172..e1139501d1f 100644
--- a/lib/efi_loader/efi_net.c
+++ b/lib/efi_loader/efi_net.c
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* EFI application network access support
*
* Copyright (c) 2016 Alexander Graf
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c
index 8558124c0a1..52f1301d75b 100644
--- a/lib/efi_loader/efi_runtime.c
+++ b/lib/efi_loader/efi_runtime.c
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* EFI application runtime services
*
* Copyright (c) 2016 Alexander Graf
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/lib/efi_loader/efi_smbios.c b/lib/efi_loader/efi_smbios.c
index 62e96979021..482436e2adb 100644
--- a/lib/efi_loader/efi_smbios.c
+++ b/lib/efi_loader/efi_smbios.c
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* EFI application tables support
*
* Copyright (c) 2016 Alexander Graf
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c
index 6c177da3a60..7e0e7f020ee 100644
--- a/lib/efi_loader/efi_variable.c
+++ b/lib/efi_loader/efi_variable.c
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* EFI utils
*
* Copyright (c) 2017 Rob Clark
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <malloc.h>
diff --git a/lib/efi_loader/efi_watchdog.c b/lib/efi_loader/efi_watchdog.c
index d12e51da0a2..6f69b76e4d9 100644
--- a/lib/efi_loader/efi_watchdog.c
+++ b/lib/efi_loader/efi_watchdog.c
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* EFI watchdog
*
* Copyright (c) 2017 Heinrich Schuchardt
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/lib/efi_selftest/Makefile b/lib/efi_selftest/Makefile
index 0e4980c8a0b..80c43026458 100644
--- a/lib/efi_selftest/Makefile
+++ b/lib/efi_selftest/Makefile
@@ -1,8 +1,6 @@
-:
-# (C) Copyright 2017, Heinrich Schuchardt <xypron.glpk@gmx.de>
-#
-# SPDX-License-Identifier: GPL-2.0+
+# SPDX-License-Identifier: GPL-2.0+
#
+# (C) Copyright 2017, Heinrich Schuchardt <xypron.glpk@gmx.de>
# This file only gets included with CONFIG_EFI_LOADER set, so all
# object inclusion implicitly depends on it
diff --git a/lib/efi_selftest/efi_selftest_disk_image.h b/lib/efi_selftest/efi_selftest_disk_image.h
index 9c741ce136c..a0e05866089 100644
--- a/lib/efi_selftest/efi_selftest_disk_image.h
+++ b/lib/efi_selftest/efi_selftest_disk_image.h
@@ -1,9 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Non-zero 8 byte strings of a disk image
*
* Generated with tools/file2include
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#define EFI_ST_DISK_IMG { 0x00010000, { \
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 7ef6530870a..69bf12623e0 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -48,7 +48,6 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
- COMPAT(MAXIM_MAX77686_PMIC, "maxim,max77686"),
COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
diff --git a/lib/lz4.c b/lib/lz4.c
index f518341af5c..046c34e3906 100644
--- a/lib/lz4.c
+++ b/lib/lz4.c
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: BSD-2-Clause
/*
LZ4 - Fast LZ compression algorithm
Copyright (C) 2011-2015, Yann Collet.
- SPDX-License-Identifier: BSD-2-Clause
-
You can contact the author at :
- LZ4 source repository : https://github.com/Cyan4973/lz4
- LZ4 public forum : https://groups.google.com/forum/#!forum/lz4c
diff --git a/net/arp.c b/net/arp.c
index 4c79e09ccbf..990b771c921 100644
--- a/net/arp.c
+++ b/net/arp.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Copied from Linux Monitor (LiMon) - Networking.
*
@@ -6,7 +7,6 @@
* Copyright 2000 Roland Borde
* Copyright 2000 Paolo Scaffardi
* Copyright 2000-2002 Wolfgang Denk, wd@denx.de
- * SPDX-License-Identifier: GPL-2.0
*/
#include <common.h>
diff --git a/net/arp.h b/net/arp.h
index a288d618b68..afb86958f3a 100644
--- a/net/arp.h
+++ b/net/arp.h
@@ -1,3 +1,4 @@
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copied from Linux Monitor (LiMon) - Networking.
*
@@ -6,7 +7,6 @@
* Copyright 2000 Roland Borde
* Copyright 2000 Paolo Scaffardi
* Copyright 2000-2002 Wolfgang Denk, wd@denx.de
- * SPDX-License-Identifier: GPL-2.0
*/
#ifndef __ARP_H__
diff --git a/net/cdp.c b/net/cdp.c
index f9ccf532318..fac02046819 100644
--- a/net/cdp.c
+++ b/net/cdp.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Copied from Linux Monitor (LiMon) - Networking.
*
@@ -6,7 +7,6 @@
* Copyright 2000 Roland Borde
* Copyright 2000 Paolo Scaffardi
* Copyright 2000-2002 Wolfgang Denk, wd@denx.de
- * SPDX-License-Identifier: GPL-2.0
*/
#include <common.h>
diff --git a/net/cdp.h b/net/cdp.h
index 83475c992d2..16ccbf4b59e 100644
--- a/net/cdp.h
+++ b/net/cdp.h
@@ -1,3 +1,4 @@
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copied from Linux Monitor (LiMon) - Networking.
*
@@ -6,7 +7,6 @@
* Copyright 2000 Roland Borde
* Copyright 2000 Paolo Scaffardi
* Copyright 2000-2002 Wolfgang Denk, wd@denx.de
- * SPDX-License-Identifier: GPL-2.0
*/
#if defined(CONFIG_CMD_CDP)
diff --git a/net/net.c b/net/net.c
index d222c1f2bd4..7f852114427 100644
--- a/net/net.c
+++ b/net/net.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Copied from Linux Monitor (LiMon) - Networking.
*
@@ -6,7 +7,6 @@
* Copyright 2000 Roland Borde
* Copyright 2000 Paolo Scaffardi
* Copyright 2000-2002 Wolfgang Denk, wd@denx.de
- * SPDX-License-Identifier: GPL-2.0
*/
/*
diff --git a/net/ping.c b/net/ping.c
index 9508cf1160e..5464f2f785f 100644
--- a/net/ping.c
+++ b/net/ping.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Copied from Linux Monitor (LiMon) - Networking.
*
@@ -6,7 +7,6 @@
* Copyright 2000 Roland Borde
* Copyright 2000 Paolo Scaffardi
* Copyright 2000-2002 Wolfgang Denk, wd@denx.de
- * SPDX-License-Identifier: GPL-2.0
*/
#include "ping.h"
diff --git a/net/ping.h b/net/ping.h
index b672b957393..7b6f4e566db 100644
--- a/net/ping.h
+++ b/net/ping.h
@@ -1,3 +1,4 @@
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copied from Linux Monitor (LiMon) - Networking.
*
@@ -6,7 +7,6 @@
* Copyright 2000 Roland Borde
* Copyright 2000 Paolo Scaffardi
* Copyright 2000-2002 Wolfgang Denk, wd@denx.de
- * SPDX-License-Identifier: GPL-2.0
*/
#ifndef __PING_H__
diff --git a/test/fs/fs-test.sh b/test/fs/fs-test.sh
index 20d5dd8a47d..b6b9461a107 100755
--- a/test/fs/fs-test.sh
+++ b/test/fs/fs-test.sh
@@ -1,9 +1,7 @@
#!/bin/bash
+# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2014 Suriyan Ramasami
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
# Invoke this test script from U-Boot base directory as ./test/fs/fs-test.sh
# It currently tests the fs/sb and native commands for ext4 and fat partitions
diff --git a/tools/file2include.c b/tools/file2include.c
index 7ca45c8339a..b98af30a728 100644
--- a/tools/file2include.c
+++ b/tools/file2include.c
@@ -62,12 +62,11 @@ int main(int argc, char *argv[])
count = fread(buf, 1, count, file);
/* Generate output */
+ printf("/* SPDX-License-Identifier: GPL-2.0+ */\n");
printf("/*\n");
printf(" * Non-zero %u byte strings of a disk image\n", BLOCK_SIZE);
printf(" *\n");
printf(" * Generated with tools/file2include\n");
- printf(" *\n");
- printf(" * SPDX-License-Identifier: GPL-2.0+\n");
printf(" */\n\n");
printf("#define EFI_ST_DISK_IMG { 0x%08zx, { \\\n", count);
@@ -85,7 +84,7 @@ int main(int argc, char *argv[])
printf("\\x%02x", buf[j]);
printf("\"}, /* ");
for (j = i; j < i + BLOCK_SIZE && j < count; ++j) {
- if (buf[j] >= 0x20 && buf[j] <= 0x7e)
+ if (buf[j] != '*' && buf[j] >= 0x20 && buf[j] <= 0x7e)
printf("%c", buf[j]);
else
printf(".");
diff --git a/tools/ifdtool.c b/tools/ifdtool.c
index a576e2fce19..3a39b7bc701 100644
--- a/tools/ifdtool.c
+++ b/tools/ifdtool.c
@@ -757,7 +757,7 @@ static void print_version(void)
{
printf("ifdtool v%s -- ", IFDTOOL_VERSION);
printf("Copyright (C) 2014 Google Inc.\n\n");
- printf("SPDX-License-Identifier: GPL-2.0+\n");
+ printf("SPDX-License-Identifier: GPL-2.0+\n");
}
static void print_usage(const char *name)