diff options
289 files changed, 1412 insertions, 591 deletions
diff --git a/arch/arm/cpu/arm926ejs/mx27/generic.c b/arch/arm/cpu/arm926ejs/mx27/generic.c index b713c845194..3b4326afefa 100644 --- a/arch/arm/cpu/arm926ejs/mx27/generic.c +++ b/arch/arm/cpu/arm926ejs/mx27/generic.c @@ -13,7 +13,7 @@ #include <asm/arch/clock.h> #include <asm/arch/gpio.h> #include <asm/imx-common/sys_proto.h> -#ifdef CONFIG_MXC_MMC +#ifdef CONFIG_MMC_MXC #include <asm/arch/mxcmmc.h> #endif @@ -196,7 +196,7 @@ int cpu_eth_init(bd_t *bis) */ int cpu_mmc_init(bd_t *bis) { -#ifdef CONFIG_MXC_MMC +#ifdef CONFIG_MMC_MXC return mxc_mmc_init(bis); #else return 0; @@ -340,7 +340,7 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) } #endif /* CONFIG_FEC_MXC */ -#ifdef CONFIG_MXC_MMC +#ifdef CONFIG_MMC_MXC void mx27_sd1_init_pins(void) { int i; @@ -374,7 +374,7 @@ void mx27_sd2_init_pins(void) imx_gpio_mode(mode[i]); } -#endif /* CONFIG_MXC_MMC */ +#endif /* CONFIG_MMC_MXC */ #ifndef CONFIG_SYS_DCACHE_OFF void enable_caches(void) diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile index 28ba7862072..e780afcde25 100644 --- a/arch/arm/cpu/armv8/Makefile +++ b/arch/arm/cpu/armv8/Makefile @@ -26,3 +26,4 @@ obj-$(CONFIG_S32V234) += s32v234/ obj-$(CONFIG_ARCH_ZYNQMP) += zynqmp/ obj-$(CONFIG_TARGET_HIKEY) += hisilicon/ obj-$(CONFIG_ARMV8_PSCI) += psci.o +obj-$(CONFIG_ARCH_SUNXI) += lowlevel_init.o diff --git a/arch/arm/cpu/armv8/cpu.c b/arch/arm/cpu/armv8/cpu.c index 5dcb5e290b1..28a27f724e6 100644 --- a/arch/arm/cpu/armv8/cpu.c +++ b/arch/arm/cpu/armv8/cpu.c @@ -17,6 +17,20 @@ #include <asm/secure.h> #include <linux/compiler.h> +/* + * sdelay() - simple spin loop. + * + * Will delay execution by roughly (@loops * 2) cycles. + * This is necessary to be used before timers are accessible. + * + * A value of "0" will results in 2^64 loops. + */ +void sdelay(unsigned long loops) +{ + __asm__ volatile ("1:\n" "subs %0, %0, #1\n" + "b.ne 1b" : "=r" (loops) : "0"(loops) : "cc"); +} + int cleanup_before_linux(void) { /* diff --git a/arch/arm/cpu/armv8/lowlevel_init.S b/arch/arm/cpu/armv8/lowlevel_init.S new file mode 100644 index 00000000000..189e35f0ea3 --- /dev/null +++ b/arch/arm/cpu/armv8/lowlevel_init.S @@ -0,0 +1,44 @@ +/* + * A lowlevel_init function that sets up the stack to call a C function to + * perform further init. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm-offsets.h> +#include <config.h> +#include <linux/linkage.h> + +ENTRY(lowlevel_init) + /* + * Setup a temporary stack. Global data is not available yet. + */ +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK) + ldr w0, =CONFIG_SPL_STACK +#else + ldr w0, =CONFIG_SYS_INIT_SP_ADDR +#endif + bic sp, x0, #0xf /* 16-byte alignment for ABI compliance */ + + /* + * Save the old LR(passed in x29) and the current LR to stack + */ + stp x29, x30, [sp, #-16]! + + /* + * Call the very early init function. This should do only the + * absolute bare minimum to get started. It should not: + * + * - set up DRAM + * - use global_data + * - clear BSS + * - try to start a console + * + * For boards with SPL this should be empty since SPL can do all of + * this init in the SPL board_init_f() function which is called + * immediately after this. + */ + bl s_init + ldp x29, x30, [sp] + ret +ENDPROC(lowlevel_init) diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index 4f5f6d8020f..140609de089 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -19,8 +19,6 @@ .globl _start _start: - b reset - #ifdef CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK /* * Various SoCs need something special and SoC-specific up front in @@ -28,7 +26,8 @@ _start: * use it here. */ #include <asm/arch/boot0.h> -ARM_SOC_BOOT0_HOOK +#else + b reset #endif .align 3 diff --git a/arch/arm/include/asm/arch-bcm235xx/boot0.h b/arch/arm/include/asm/arch-bcm235xx/boot0.h index 7e728827251..a747bd38233 100644 --- a/arch/arm/include/asm/arch-bcm235xx/boot0.h +++ b/arch/arm/include/asm/arch-bcm235xx/boot0.h @@ -4,12 +4,6 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#ifndef __BOOT0_H -#define __BOOT0_H - /* BOOT0 header information */ -#define ARM_SOC_BOOT0_HOOK \ - .word 0xbabeface; \ + .word 0xbabeface .word _end - _start - -#endif /* __BOOT0_H */ diff --git a/arch/arm/include/asm/arch-bcm281xx/boot0.h b/arch/arm/include/asm/arch-bcm281xx/boot0.h index 7e728827251..a747bd38233 100644 --- a/arch/arm/include/asm/arch-bcm281xx/boot0.h +++ b/arch/arm/include/asm/arch-bcm281xx/boot0.h @@ -4,12 +4,6 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#ifndef __BOOT0_H -#define __BOOT0_H - /* BOOT0 header information */ -#define ARM_SOC_BOOT0_HOOK \ - .word 0xbabeface; \ + .word 0xbabeface .word _end - _start - -#endif /* __BOOT0_H */ diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h b/arch/arm/include/asm/arch-mx27/imx-regs.h index 40b76d26f6d..ce3bbd7d158 100644 --- a/arch/arm/include/asm/arch-mx27/imx-regs.h +++ b/arch/arm/include/asm/arch-mx27/imx-regs.h @@ -22,10 +22,10 @@ extern void mx27_uart1_init_pins(void); extern void mx27_fec_init_pins(void); #endif /* CONFIG_FEC_MXC */ -#ifdef CONFIG_MXC_MMC +#ifdef CONFIG_MMC_MXC extern void mx27_sd1_init_pins(void); extern void mx27_sd2_init_pins(void); -#endif /* CONFIG_MXC_MMC */ +#endif /* CONFIG_MMC_MXC */ /* AIPI */ struct aipi_regs { diff --git a/arch/arm/include/asm/arch-sunxi/boot0.h b/arch/arm/include/asm/arch-sunxi/boot0.h index ea5675eb9e4..9c6d82dda18 100644 --- a/arch/arm/include/asm/arch-sunxi/boot0.h +++ b/arch/arm/include/asm/arch-sunxi/boot0.h @@ -4,11 +4,36 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#ifndef __BOOT0_H -#define __BOOT0_H - +#if defined(CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER) && !defined(CONFIG_SPL_BUILD) /* reserve space for BOOT0 header information */ -#define ARM_SOC_BOOT0_HOOK \ + b reset .space 1532 - -#endif /* __BOOT0_H */ +#elif defined(CONFIG_ARM_BOOT_HOOK_RMR) +/* + * Switch into AArch64 if needed. + * Refer to arch/arm/mach-sunxi/rmr_switch.S for the original source. + */ + tst x0, x0 // this is "b #0x84" in ARM + b reset + .space 0x7c + .word 0xe59f1024 // ldr r1, [pc, #36] ; 0x170000a0 + .word 0xe59f0024 // ldr r0, [pc, #36] ; CONFIG_*_TEXT_BASE + .word 0xe5810000 // str r0, [r1] + .word 0xf57ff04f // dsb sy + .word 0xf57ff06f // isb sy + .word 0xee1c0f50 // mrc 15, 0, r0, cr12, cr0, {2} ; RMR + .word 0xe3800003 // orr r0, r0, #3 + .word 0xee0c0f50 // mcr 15, 0, r0, cr12, cr0, {2} ; RMR + .word 0xf57ff06f // isb sy + .word 0xe320f003 // wfi + .word 0xeafffffd // b @wfi + .word 0x017000a0 // writeable RVBAR mapping address +#ifdef CONFIG_SPL_BUILD + .word CONFIG_SPL_TEXT_BASE +#else + .word CONFIG_SYS_TEXT_BASE +#endif +#else +/* normal execution */ + b reset +#endif diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h index be9fcfda0e3..3f87672c625 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h @@ -322,6 +322,7 @@ struct sunxi_ccm_reg { #define CCM_DRAMCLK_CFG_DIV0_MASK (0xf << 8) #define CCM_DRAMCLK_CFG_SRC_PLL5 (0x0 << 20) #define CCM_DRAMCLK_CFG_SRC_PLL6x2 (0x1 << 20) +#define CCM_DRAMCLK_CFG_SRC_PLL11 (0x1 << 20) /* A64 only */ #define CCM_DRAMCLK_CFG_SRC_MASK (0x3 << 20) #define CCM_DRAMCLK_CFG_UPD (0x1 << 16) #define CCM_DRAMCLK_CFG_RST (0x1 << 31) diff --git a/arch/arm/include/asm/arch-sunxi/cpu.h b/arch/arm/include/asm/arch-sunxi/cpu.h index 73583ed445a..6f96a9715a9 100644 --- a/arch/arm/include/asm/arch-sunxi/cpu.h +++ b/arch/arm/include/asm/arch-sunxi/cpu.h @@ -13,4 +13,7 @@ #include <asm/arch/cpu_sun4i.h> #endif +#define SOCID_A64 0x1689 +#define SOCID_H3 0x1680 + #endif /* _SUNXI_CPU_H */ diff --git a/arch/arm/include/asm/arch-sunxi/dram.h b/arch/arm/include/asm/arch-sunxi/dram.h index e0be744dba4..53e6d471d2e 100644 --- a/arch/arm/include/asm/arch-sunxi/dram.h +++ b/arch/arm/include/asm/arch-sunxi/dram.h @@ -24,7 +24,7 @@ #include <asm/arch/dram_sun8i_a33.h> #elif defined(CONFIG_MACH_SUN8I_A83T) #include <asm/arch/dram_sun8i_a83t.h> -#elif defined(CONFIG_MACH_SUN8I_H3) +#elif defined(CONFIG_MACH_SUN8I_H3) || defined(CONFIG_MACH_SUN50I) #include <asm/arch/dram_sun8i_h3.h> #elif defined(CONFIG_MACH_SUN9I) #include <asm/arch/dram_sun9i.h> diff --git a/arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h b/arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h index d0f2b8afdb6..25d07d9863c 100644 --- a/arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h +++ b/arch/arm/include/asm/arch-sunxi/dram_sun8i_h3.h @@ -15,7 +15,8 @@ struct sunxi_mctl_com_reg { u32 cr; /* 0x00 control register */ - u8 res0[0xc]; /* 0x04 */ + u8 res0[0x8]; /* 0x04 */ + u32 tmr; /* 0x0c (unused on H3) */ u32 mcr[16][2]; /* 0x10 */ u32 bwcr; /* 0x90 bandwidth control register */ u32 maer; /* 0x94 master enable register */ @@ -32,7 +33,9 @@ struct sunxi_mctl_com_reg { u32 swoffr; /* 0xc4 */ u8 res2[0x8]; /* 0xc8 */ u32 cccr; /* 0xd0 */ - u8 res3[0x72c]; /* 0xd4 */ + u8 res3[0x54]; /* 0xd4 */ + u32 mdfs_bwlr[3]; /* 0x128 (unused on H3) */ + u8 res4[0x6cc]; /* 0x134 */ u32 protect; /* 0x800 */ }; @@ -81,7 +84,8 @@ struct sunxi_mctl_ctl_reg { u32 rfshtmg; /* 0x90 refresh timing */ u32 rfshctl1; /* 0x94 */ u32 pwrtmg; /* 0x98 */ - u8 res3[0x20]; /* 0x9c */ + u8 res3[0x1c]; /* 0x9c */ + u32 vtfcr; /* 0xb8 (unused on H3) */ u32 dqsgmr; /* 0xbc */ u32 dtcr; /* 0xc0 */ u32 dtar[4]; /* 0xc4 */ @@ -106,20 +110,23 @@ struct sunxi_mctl_ctl_reg { u32 perfhpr[2]; /* 0x1c4 */ u32 perflpr[2]; /* 0x1cc */ u32 perfwr[2]; /* 0x1d4 */ - u8 res8[0x2c]; /* 0x1dc */ - u32 aciocr; /* 0x208 */ - u8 res9[0xf4]; /* 0x20c */ + u8 res8[0x24]; /* 0x1dc */ + u32 acmdlr; /* 0x200 AC master delay line register */ + u32 aclcdlr; /* 0x204 AC local calibrated delay line register */ + u32 aciocr; /* 0x208 AC I/O configuration register */ + u8 res9[0x4]; /* 0x20c */ + u32 acbdlr[31]; /* 0x210 AC bit delay line registers */ + u8 res10[0x74]; /* 0x28c */ struct { /* 0x300 DATX8 modules*/ - u32 mdlr; /* 0x00 */ - u32 lcdlr[3]; /* 0x04 */ - u32 iocr[11]; /* 0x10 IO configuration register */ - u32 bdlr6; /* 0x3c */ - u32 gtr; /* 0x40 */ - u32 gcr; /* 0x44 */ - u32 gsr[3]; /* 0x48 */ + u32 mdlr; /* 0x00 master delay line register */ + u32 lcdlr[3]; /* 0x04 local calibrated delay line registers */ + u32 bdlr[12]; /* 0x10 bit delay line registers */ + u32 gtr; /* 0x40 general timing register */ + u32 gcr; /* 0x44 general configuration register */ + u32 gsr[3]; /* 0x48 general status registers */ u8 res0[0x2c]; /* 0x54 */ - } datx[4]; - u8 res10[0x388]; /* 0x500 */ + } dx[4]; + u8 res11[0x388]; /* 0x500 */ u32 upd2; /* 0x888 */ }; @@ -172,14 +179,16 @@ struct sunxi_mctl_ctl_reg { #define PGSR_INIT_DONE (0x1 << 0) /* PHY init done */ -#define ZQCR_PWRDOWN (0x1 << 31) /* ZQ power down */ +#define ZQCR_PWRDOWN (1U << 31) /* ZQ power down */ -#define DATX_IOCR_DQ(x) (x) /* DQ0-7 IOCR index */ -#define DATX_IOCR_DM (8) /* DM IOCR index */ -#define DATX_IOCR_DQS (9) /* DQS IOCR index */ -#define DATX_IOCR_DQSN (10) /* DQSN IOCR index */ +#define ACBDLR_WRITE_DELAY(x) ((x) << 8) -#define DATX_IOCR_WRITE_DELAY(x) ((x) << 8) -#define DATX_IOCR_READ_DELAY(x) ((x) << 0) +#define DXBDLR_DQ(x) (x) /* DQ0-7 BDLR index */ +#define DXBDLR_DM 8 /* DM BDLR index */ +#define DXBDLR_DQS 9 /* DQS BDLR index */ +#define DXBDLR_DQSN 10 /* DQSN BDLR index */ + +#define DXBDLR_WRITE_DELAY(x) ((x) << 8) +#define DXBDLR_READ_DELAY(x) ((x) << 0) #endif /* _SUNXI_DRAM_SUN8I_H3_H */ diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h index aa0f3c42f63..e9b4cdbbcd5 100644 --- a/arch/arm/include/asm/armv8/mmu.h +++ b/arch/arm/include/asm/armv8/mmu.h @@ -8,14 +8,6 @@ #ifndef _ASM_ARMV8_MMU_H_ #define _ASM_ARMV8_MMU_H_ -#ifdef __ASSEMBLY__ -#define _AC(X, Y) X -#else -#define _AC(X, Y) (X##Y) -#endif - -#define UL(x) _AC(x, UL) - /***************************************************************/ /* * The following definitions are related each other, shoud be diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 0051f76db02..024139da25f 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -77,8 +77,10 @@ ifndef CONFIG_HAS_THUMB2 # for C files, just apend -marm, which will override previous -mthumb* +ifndef CONFIG_ARM64 CFLAGS_cache.o := -marm CFLAGS_cache-cp15.o := -marm +endif # For .S, drop -mthumb* and other thumb-related options. # CFLAGS_REMOVE_* would not have an effet, so AFLAGS_REMOVE_* diff --git a/arch/arm/lib/vectors.S b/arch/arm/lib/vectors.S index 5cc132b7b84..9fe7415b66c 100644 --- a/arch/arm/lib/vectors.S +++ b/arch/arm/lib/vectors.S @@ -67,7 +67,6 @@ _start: * use it here. */ #include <asm/arch/boot0.h> -ARM_SOC_BOOT0_HOOK #endif /* diff --git a/arch/arm/mach-davinci/da830_pinmux.c b/arch/arm/mach-davinci/da830_pinmux.c index edaab45327b..4182bb79601 100644 --- a/arch/arm/mach-davinci/da830_pinmux.c +++ b/arch/arm/mach-davinci/da830_pinmux.c @@ -121,7 +121,7 @@ const struct pinmux_config usb_pins[] = { { pinmux(9), 1, 1 } /* USB0_DRVVBUS */ }; -#ifdef CONFIG_DAVINCI_MMC +#ifdef CONFIG_MMC_DAVINCI /* MMC0 pin muxer settings */ const struct pinmux_config mmc0_pins_8bit[] = { { pinmux(15), 2, 7 }, /* MMCSD0_CLK */ diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c index 581c0ab518b..73824df18fa 100644 --- a/arch/arm/mach-omap2/am33xx/board.c +++ b/arch/arm/mach-omap2/am33xx/board.c @@ -105,7 +105,7 @@ static const struct gpio_bank gpio_bank_am33xx[] = { const struct gpio_bank *const omap_gpio_bank = gpio_bank_am33xx; #endif -#if defined(CONFIG_OMAP_HSMMC) && !defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_MMC_OMAP_HS) && !defined(CONFIG_SPL_BUILD) int cpu_mmc_init(bd_t *bis) { int ret; @@ -204,6 +204,14 @@ int arch_misc_init(void) ret = uclass_first_device(UCLASS_MISC, &dev); if (ret || !dev) return ret; + +#if defined(CONFIG_DM_ETH) && defined(CONFIG_USB_ETHER) + ret = usb_ether_init(); + if (ret) { + error("USB ether init failed\n"); + return ret; + } +#endif #endif return 0; } diff --git a/arch/arm/mach-omap2/boot-common.c b/arch/arm/mach-omap2/boot-common.c index 385310ba1ec..7ae3d8041c4 100644 --- a/arch/arm/mach-omap2/boot-common.c +++ b/arch/arm/mach-omap2/boot-common.c @@ -228,7 +228,7 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) u32 boot_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS); - debug("image entry point: 0x%X\n", spl_image->entry_point); + debug("image entry point: 0x%lX\n", spl_image->entry_point); /* Pass the saved boot_params from rom code */ image_entry((u32 *)boot_params); } diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile index e73114ee642..7daba1169c8 100644 --- a/arch/arm/mach-sunxi/Makefile +++ b/arch/arm/mach-sunxi/Makefile @@ -50,4 +50,5 @@ obj-$(CONFIG_MACH_SUN8I_A33) += dram_sun8i_a33.o obj-$(CONFIG_MACH_SUN8I_A83T) += dram_sun8i_a83t.o obj-$(CONFIG_MACH_SUN8I_H3) += dram_sun8i_h3.o obj-$(CONFIG_MACH_SUN9I) += dram_sun9i.o +obj-$(CONFIG_MACH_SUN50I) += dram_sun8i_h3.o endif diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index aa114937485..52be5b05519 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -133,7 +133,7 @@ static int gpio_init(void) return 0; } -#ifdef CONFIG_SPL_BUILD +#if defined(CONFIG_SPL_BOARD_LOAD_IMAGE) && defined(CONFIG_SPL_BUILD) static int spl_board_load_image(struct spl_image_info *spl_image, struct spl_boot_device *bootdev) { diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c index ed8cd9bbb37..d123b3acb2f 100644 --- a/arch/arm/mach-sunxi/clock_sun6i.c +++ b/arch/arm/mach-sunxi/clock_sun6i.c @@ -21,6 +21,8 @@ void clock_init_safe(void) { struct sunxi_ccm_reg * const ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; + +#if !defined(CONFIG_MACH_SUN8I_H3) && !defined(CONFIG_MACH_SUN50I) struct sunxi_prcm_reg * const prcm = (struct sunxi_prcm_reg *)SUNXI_PRCM_BASE; @@ -31,6 +33,7 @@ void clock_init_safe(void) PRCM_PLL_CTRL_LDO_DIGITAL_EN | PRCM_PLL_CTRL_LDO_ANALOG_EN | PRCM_PLL_CTRL_EXT_OSC_EN | PRCM_PLL_CTRL_LDO_OUT_L(1140)); clrbits_le32(&prcm->pll_ctrl1, PRCM_PLL_CTRL_LDO_KEY_MASK); +#endif clock_set_pll1(408000000); @@ -41,7 +44,8 @@ void clock_init_safe(void) writel(AHB1_ABP1_DIV_DEFAULT, &ccm->ahb1_apb1_div); writel(MBUS_CLK_DEFAULT, &ccm->mbus0_clk_cfg); - writel(MBUS_CLK_DEFAULT, &ccm->mbus1_clk_cfg); + if (IS_ENABLED(CONFIG_MACH_SUN6I)) + writel(MBUS_CLK_DEFAULT, &ccm->mbus1_clk_cfg); } #endif @@ -213,14 +217,14 @@ done: } #endif -#ifdef CONFIG_MACH_SUN8I_A33 +#if defined(CONFIG_MACH_SUN8I_A33) || defined(CONFIG_MACH_SUN50I) void clock_set_pll11(unsigned int clk, bool sigma_delta_enable) { struct sunxi_ccm_reg * const ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; if (sigma_delta_enable) - writel(CCM_PLL11_PATTERN, &ccm->pll5_pattern_cfg); + writel(CCM_PLL11_PATTERN, &ccm->pll11_pattern_cfg0); writel(CCM_PLL11_CTRL_EN | CCM_PLL11_CTRL_UPD | (sigma_delta_enable ? CCM_PLL11_CTRL_SIGMA_DELTA_EN : 0) | diff --git a/arch/arm/mach-sunxi/dram_sun8i_h3.c b/arch/arm/mach-sunxi/dram_sun8i_h3.c index b08b8e67cca..9f7cc7fd4cc 100644 --- a/arch/arm/mach-sunxi/dram_sun8i_h3.c +++ b/arch/arm/mach-sunxi/dram_sun8i_h3.c @@ -13,15 +13,27 @@ #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/dram.h> +#include <asm/arch/cpu.h> #include <linux/kconfig.h> +/* + * The delay parameters below allow to allegedly specify delay times of some + * unknown unit for each individual bit trace in each of the four data bytes + * the 32-bit wide access consists of. Also three control signals can be + * adjusted individually. + */ +#define BITS_PER_BYTE 8 +#define NR_OF_BYTE_LANES (32 / BITS_PER_BYTE) +/* The eight data lines (DQn) plus DM, DQS and DQSN */ +#define LINES_PER_BYTE_LANE (BITS_PER_BYTE + 3) struct dram_para { - u32 read_delays; - u32 write_delays; u16 page_size; u8 bus_width; u8 dual_rank; u8 row_bits; + const u8 dx_read_delays[NR_OF_BYTE_LANES][LINES_PER_BYTE_LANE]; + const u8 dx_write_delays[NR_OF_BYTE_LANES][LINES_PER_BYTE_LANE]; + const u8 ac_delays[31]; }; static inline int ns_to_t(int nanoseconds) @@ -31,30 +43,6 @@ static inline int ns_to_t(int nanoseconds) return DIV_ROUND_UP(ctrl_freq * nanoseconds, 1000); } -static u32 bin_to_mgray(int val) -{ - static const u8 lookup_table[32] = { - 0x00, 0x01, 0x02, 0x03, 0x06, 0x07, 0x04, 0x05, - 0x0c, 0x0d, 0x0e, 0x0f, 0x0a, 0x0b, 0x08, 0x09, - 0x18, 0x19, 0x1a, 0x1b, 0x1e, 0x1f, 0x1c, 0x1d, - 0x14, 0x15, 0x16, 0x17, 0x12, 0x13, 0x10, 0x11, - }; - - return lookup_table[clamp(val, 0, 31)]; -} - -static int mgray_to_bin(u32 val) -{ - static const u8 lookup_table[32] = { - 0x00, 0x01, 0x02, 0x03, 0x06, 0x07, 0x04, 0x05, - 0x0e, 0x0f, 0x0c, 0x0d, 0x08, 0x09, 0x0a, 0x0b, - 0x1e, 0x1f, 0x1c, 0x1d, 0x18, 0x19, 0x1a, 0x1b, - 0x10, 0x11, 0x12, 0x13, 0x16, 0x17, 0x14, 0x15, - }; - - return lookup_table[val & 0x1f]; -} - static void mctl_phy_init(u32 val) { struct sunxi_mctl_ctl_reg * const mctl_ctl = @@ -64,74 +52,144 @@ static void mctl_phy_init(u32 val) mctl_await_completion(&mctl_ctl->pgsr[0], PGSR_INIT_DONE, 0x1); } -static void mctl_dq_delay(u32 read, u32 write) +static void mctl_set_bit_delays(struct dram_para *para) { struct sunxi_mctl_ctl_reg * const mctl_ctl = (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; int i, j; - u32 val; - - for (i = 0; i < 4; i++) { - val = DATX_IOCR_WRITE_DELAY((write >> (i * 4)) & 0xf) | - DATX_IOCR_READ_DELAY(((read >> (i * 4)) & 0xf) * 2); - - for (j = DATX_IOCR_DQ(0); j <= DATX_IOCR_DM; j++) - writel(val, &mctl_ctl->datx[i].iocr[j]); - } clrbits_le32(&mctl_ctl->pgcr[0], 1 << 26); - for (i = 0; i < 4; i++) { - val = DATX_IOCR_WRITE_DELAY((write >> (16 + i * 4)) & 0xf) | - DATX_IOCR_READ_DELAY((read >> (16 + i * 4)) & 0xf); + for (i = 0; i < NR_OF_BYTE_LANES; i++) + for (j = 0; j < LINES_PER_BYTE_LANE; j++) + writel(DXBDLR_WRITE_DELAY(para->dx_write_delays[i][j]) | + DXBDLR_READ_DELAY(para->dx_read_delays[i][j]), + &mctl_ctl->dx[i].bdlr[j]); - writel(val, &mctl_ctl->datx[i].iocr[DATX_IOCR_DQS]); - writel(val, &mctl_ctl->datx[i].iocr[DATX_IOCR_DQSN]); - } + for (i = 0; i < 31; i++) + writel(ACBDLR_WRITE_DELAY(para->ac_delays[i]), + &mctl_ctl->acbdlr[i]); setbits_le32(&mctl_ctl->pgcr[0], 1 << 26); +} - udelay(1); +enum { + MBUS_PORT_CPU = 0, + MBUS_PORT_GPU = 1, + MBUS_PORT_UNUSED = 2, + MBUS_PORT_DMA = 3, + MBUS_PORT_VE = 4, + MBUS_PORT_CSI = 5, + MBUS_PORT_NAND = 6, + MBUS_PORT_SS = 7, + MBUS_PORT_TS = 8, + MBUS_PORT_DI = 9, + MBUS_PORT_DE = 10, + MBUS_PORT_DE_CFD = 11, +}; + +enum { + MBUS_QOS_LOWEST = 0, + MBUS_QOS_LOW, + MBUS_QOS_HIGH, + MBUS_QOS_HIGHEST +}; + +inline void mbus_configure_port(u8 port, + bool bwlimit, + bool priority, + u8 qos, /* MBUS_QOS_LOWEST .. MBUS_QOS_HIGEST */ + u8 waittime, /* 0 .. 0xf */ + u8 acs, /* 0 .. 0xff */ + u16 bwl0, /* 0 .. 0xffff, bandwidth limit in MB/s */ + u16 bwl1, + u16 bwl2) +{ + struct sunxi_mctl_com_reg * const mctl_com = + (struct sunxi_mctl_com_reg *)SUNXI_DRAM_COM_BASE; + + const u32 cfg0 = ( (bwlimit ? (1 << 0) : 0) + | (priority ? (1 << 1) : 0) + | ((qos & 0x3) << 2) + | ((waittime & 0xf) << 4) + | ((acs & 0xff) << 8) + | (bwl0 << 16) ); + const u32 cfg1 = ((u32)bwl2 << 16) | (bwl1 & 0xffff); + + debug("MBUS port %d cfg0 %08x cfg1 %08x\n", port, cfg0, cfg1); + writel(cfg0, &mctl_com->mcr[port][0]); + writel(cfg1, &mctl_com->mcr[port][1]); } -static void mctl_set_master_priority(void) +#define MBUS_CONF(port, bwlimit, qos, acs, bwl0, bwl1, bwl2) \ + mbus_configure_port(MBUS_PORT_ ## port, bwlimit, false, \ + MBUS_QOS_ ## qos, 0, acs, bwl0, bwl1, bwl2) + +static void mctl_set_master_priority_h3(void) { struct sunxi_mctl_com_reg * const mctl_com = (struct sunxi_mctl_com_reg *)SUNXI_DRAM_COM_BASE; /* enable bandwidth limit windows and set windows size 1us */ - writel(0x00010190, &mctl_com->bwcr); + writel((1 << 16) | (400 << 0), &mctl_com->bwcr); /* set cpu high priority */ writel(0x00000001, &mctl_com->mapr); - writel(0x0200000d, &mctl_com->mcr[0][0]); - writel(0x00800100, &mctl_com->mcr[0][1]); - writel(0x06000009, &mctl_com->mcr[1][0]); - writel(0x01000400, &mctl_com->mcr[1][1]); - writel(0x0200000d, &mctl_com->mcr[2][0]); - writel(0x00600100, &mctl_com->mcr[2][1]); - writel(0x0100000d, &mctl_com->mcr[3][0]); - writel(0x00200080, &mctl_com->mcr[3][1]); - writel(0x07000009, &mctl_com->mcr[4][0]); - writel(0x01000640, &mctl_com->mcr[4][1]); - writel(0x0100000d, &mctl_com->mcr[5][0]); - writel(0x00200080, &mctl_com->mcr[5][1]); - writel(0x01000009, &mctl_com->mcr[6][0]); - writel(0x00400080, &mctl_com->mcr[6][1]); - writel(0x0100000d, &mctl_com->mcr[7][0]); - writel(0x00400080, &mctl_com->mcr[7][1]); - writel(0x0100000d, &mctl_com->mcr[8][0]); - writel(0x00400080, &mctl_com->mcr[8][1]); - writel(0x04000009, &mctl_com->mcr[9][0]); - writel(0x00400100, &mctl_com->mcr[9][1]); - writel(0x2000030d, &mctl_com->mcr[10][0]); - writel(0x04001800, &mctl_com->mcr[10][1]); - writel(0x04000009, &mctl_com->mcr[11][0]); - writel(0x00400120, &mctl_com->mcr[11][1]); + MBUS_CONF( CPU, true, HIGHEST, 0, 512, 256, 128); + MBUS_CONF( GPU, true, HIGH, 0, 1536, 1024, 256); + MBUS_CONF(UNUSED, true, HIGHEST, 0, 512, 256, 96); + MBUS_CONF( DMA, true, HIGHEST, 0, 256, 128, 32); + MBUS_CONF( VE, true, HIGH, 0, 1792, 1600, 256); + MBUS_CONF( CSI, true, HIGHEST, 0, 256, 128, 32); + MBUS_CONF( NAND, true, HIGH, 0, 256, 128, 64); + MBUS_CONF( SS, true, HIGHEST, 0, 256, 128, 64); + MBUS_CONF( TS, true, HIGHEST, 0, 256, 128, 64); + MBUS_CONF( DI, true, HIGH, 0, 1024, 256, 64); + MBUS_CONF( DE, true, HIGHEST, 3, 8192, 6120, 1024); + MBUS_CONF(DE_CFD, true, HIGH, 0, 1024, 288, 64); } -static void mctl_set_timing_params(struct dram_para *para) +static void mctl_set_master_priority_a64(void) +{ + struct sunxi_mctl_com_reg * const mctl_com = + (struct sunxi_mctl_com_reg *)SUNXI_DRAM_COM_BASE; + + /* enable bandwidth limit windows and set windows size 1us */ + writel(399, &mctl_com->tmr); + writel((1 << 16), &mctl_com->bwcr); + + /* Port 2 is reserved per Allwinner's linux-3.10 source, yet they + * initialise it */ + MBUS_CONF( CPU, true, HIGHEST, 0, 160, 100, 80); + MBUS_CONF( GPU, false, HIGH, 0, 1536, 1400, 256); + MBUS_CONF(UNUSED, true, HIGHEST, 0, 512, 256, 96); + MBUS_CONF( DMA, true, HIGH, 0, 256, 80, 100); + MBUS_CONF( VE, true, HIGH, 0, 1792, 1600, 256); + MBUS_CONF( CSI, true, HIGH, 0, 256, 128, 0); + MBUS_CONF( NAND, true, HIGH, 0, 256, 128, 64); + MBUS_CONF( SS, true, HIGHEST, 0, 256, 128, 64); + MBUS_CONF( TS, true, HIGHEST, 0, 256, 128, 64); + MBUS_CONF( DI, true, HIGH, 0, 1024, 256, 64); + MBUS_CONF( DE, true, HIGH, 2, 8192, 6144, 2048); + MBUS_CONF(DE_CFD, true, HIGH, 0, 1280, 144, 64); + + writel(0x81000004, &mctl_com->mdfs_bwlr[2]); +} + +static void mctl_set_master_priority(uint16_t socid) +{ + switch (socid) { + case SOCID_H3: + mctl_set_master_priority_h3(); + return; + case SOCID_A64: + mctl_set_master_priority_a64(); + return; + } +} + +static void mctl_set_timing_params(uint16_t socid, struct dram_para *para) { struct sunxi_mctl_ctl_reg * const mctl_ctl = (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; @@ -212,7 +270,31 @@ static void mctl_set_timing_params(struct dram_para *para) writel(RFSHTMG_TREFI(trefi) | RFSHTMG_TRFC(trfc), &mctl_ctl->rfshtmg); } -static void mctl_zq_calibration(struct dram_para *para) +static u32 bin_to_mgray(int val) +{ + static const u8 lookup_table[32] = { + 0x00, 0x01, 0x02, 0x03, 0x06, 0x07, 0x04, 0x05, + 0x0c, 0x0d, 0x0e, 0x0f, 0x0a, 0x0b, 0x08, 0x09, + 0x18, 0x19, 0x1a, 0x1b, 0x1e, 0x1f, 0x1c, 0x1d, + 0x14, 0x15, 0x16, 0x17, 0x12, 0x13, 0x10, 0x11, + }; + + return lookup_table[clamp(val, 0, 31)]; +} + +static int mgray_to_bin(u32 val) +{ + static const u8 lookup_table[32] = { + 0x00, 0x01, 0x02, 0x03, 0x06, 0x07, 0x04, 0x05, + 0x0e, 0x0f, 0x0c, 0x0d, 0x08, 0x09, 0x0a, 0x0b, + 0x1e, 0x1f, 0x1c, 0x1d, 0x18, 0x19, 0x1a, 0x1b, + 0x10, 0x11, 0x12, 0x13, 0x16, 0x17, 0x14, 0x15, + }; + + return lookup_table[val & 0x1f]; +} + +static void mctl_h3_zq_calibration_quirk(struct dram_para *para) { struct sunxi_mctl_ctl_reg * const mctl_ctl = (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; @@ -282,7 +364,7 @@ static void mctl_set_cr(struct dram_para *para) MCTL_CR_ROW_BITS(para->row_bits), &mctl_com->cr); } -static void mctl_sys_init(struct dram_para *para) +static void mctl_sys_init(uint16_t socid, struct dram_para *para) { struct sunxi_ccm_reg * const ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; @@ -294,16 +376,30 @@ static void mctl_sys_init(struct dram_para *para) clrbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_MCTL); clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); clrbits_le32(&ccm->pll5_cfg, CCM_PLL5_CTRL_EN); + if (socid == SOCID_A64) + clrbits_le32(&ccm->pll11_cfg, CCM_PLL11_CTRL_EN); udelay(10); clrbits_le32(&ccm->dram_clk_cfg, CCM_DRAMCLK_CFG_RST); udelay(1000); - clock_set_pll5(CONFIG_DRAM_CLK * 2 * 1000000, false); - clrsetbits_le32(&ccm->dram_clk_cfg, - CCM_DRAMCLK_CFG_DIV_MASK | CCM_DRAMCLK_CFG_SRC_MASK, - CCM_DRAMCLK_CFG_DIV(1) | CCM_DRAMCLK_CFG_SRC_PLL5 | - CCM_DRAMCLK_CFG_UPD); + if (socid == SOCID_A64) { + clock_set_pll11(CONFIG_DRAM_CLK * 2 * 1000000, false); + clrsetbits_le32(&ccm->dram_clk_cfg, + CCM_DRAMCLK_CFG_DIV_MASK | + CCM_DRAMCLK_CFG_SRC_MASK, + CCM_DRAMCLK_CFG_DIV(1) | + CCM_DRAMCLK_CFG_SRC_PLL11 | + CCM_DRAMCLK_CFG_UPD); + } else if (socid == SOCID_H3) { + clock_set_pll5(CONFIG_DRAM_CLK * 2 * 1000000, false); + clrsetbits_le32(&ccm->dram_clk_cfg, + CCM_DRAMCLK_CFG_DIV_MASK | + CCM_DRAMCLK_CFG_SRC_MASK, + CCM_DRAMCLK_CFG_DIV(1) | + CCM_DRAMCLK_CFG_SRC_PLL5 | + CCM_DRAMCLK_CFG_UPD); + } mctl_await_completion(&ccm->dram_clk_cfg, CCM_DRAMCLK_CFG_UPD, 0); setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); @@ -318,7 +414,12 @@ static void mctl_sys_init(struct dram_para *para) udelay(500); } -static int mctl_channel_init(struct dram_para *para) +/* These are more guessed based on some Allwinner code. */ +#define DX_GCR_ODT_DYNAMIC (0x0 << 4) +#define DX_GCR_ODT_ALWAYS_ON (0x1 << 4) +#define DX_GCR_ODT_OFF (0x2 << 4) + +static int mctl_channel_init(uint16_t socid, struct dram_para *para) { struct sunxi_mctl_com_reg * const mctl_com = (struct sunxi_mctl_com_reg *)SUNXI_DRAM_COM_BASE; @@ -328,8 +429,8 @@ static int mctl_channel_init(struct dram_para *para) unsigned int i; mctl_set_cr(para); - mctl_set_timing_params(para); - mctl_set_master_priority(); + mctl_set_timing_params(socid, para); + mctl_set_master_priority(socid); /* setting VTC, default disable all VT */ clrbits_le32(&mctl_ctl->pgcr[0], (1 << 30) | 0x3f); @@ -344,10 +445,11 @@ static int mctl_channel_init(struct dram_para *para) /* set dramc odt */ for (i = 0; i < 4; i++) - clrsetbits_le32(&mctl_ctl->datx[i].gcr, (0x3 << 4) | + clrsetbits_le32(&mctl_ctl->dx[i].gcr, (0x3 << 4) | (0x1 << 1) | (0x3 << 2) | (0x3 << 12) | (0x3 << 14), - IS_ENABLED(CONFIG_DRAM_ODT_EN) ? 0x0 : 0x2); + IS_ENABLED(CONFIG_DRAM_ODT_EN) ? + DX_GCR_ODT_DYNAMIC : DX_GCR_ODT_OFF); /* AC PDR should always ON */ setbits_le32(&mctl_ctl->aciocr, 0x1 << 1); @@ -355,48 +457,58 @@ static int mctl_channel_init(struct dram_para *para) /* set DQS auto gating PD mode */ setbits_le32(&mctl_ctl->pgcr[2], 0x3 << 6); - /* dx ddr_clk & hdr_clk dynamic mode */ - clrbits_le32(&mctl_ctl->pgcr[0], (0x3 << 14) | (0x3 << 12)); - - /* dphy & aphy phase select 270 degree */ - clrsetbits_le32(&mctl_ctl->pgcr[2], (0x3 << 10) | (0x3 << 8), - (0x1 << 10) | (0x2 << 8)); + if (socid == SOCID_H3) { + /* dx ddr_clk & hdr_clk dynamic mode */ + clrbits_le32(&mctl_ctl->pgcr[0], (0x3 << 14) | (0x3 << 12)); + + /* dphy & aphy phase select 270 degree */ + clrsetbits_le32(&mctl_ctl->pgcr[2], (0x3 << 10) | (0x3 << 8), + (0x1 << 10) | (0x2 << 8)); + } else if (socid == SOCID_A64) { + /* dphy & aphy phase select ? */ + clrsetbits_le32(&mctl_ctl->pgcr[2], (0x3 << 10) | (0x3 << 8), + (0x0 << 10) | (0x3 << 8)); + } /* set half DQ */ if (para->bus_width != 32) { - writel(0x0, &mctl_ctl->datx[2].gcr); - writel(0x0, &mctl_ctl->datx[3].gcr); + writel(0x0, &mctl_ctl->dx[2].gcr); + writel(0x0, &mctl_ctl->dx[3].gcr); } /* data training configuration */ clrsetbits_le32(&mctl_ctl->dtcr, 0xf << 24, (para->dual_rank ? 0x3 : 0x1) << 24); + mctl_set_bit_delays(para); + udelay(50); - if (para->read_delays || para->write_delays) { - mctl_dq_delay(para->read_delays, para->write_delays); - udelay(50); - } + if (socid == SOCID_H3) { + mctl_h3_zq_calibration_quirk(para); - mctl_zq_calibration(para); + mctl_phy_init(PIR_PLLINIT | PIR_DCAL | PIR_PHYRST | + PIR_DRAMRST | PIR_DRAMINIT | PIR_QSGATE); + } else if (socid == SOCID_A64) { + clrsetbits_le32(&mctl_ctl->zqcr, 0xffffff, CONFIG_DRAM_ZQ); - mctl_phy_init(PIR_PLLINIT | PIR_DCAL | PIR_PHYRST | PIR_DRAMRST | - PIR_DRAMINIT | PIR_QSGATE); + mctl_phy_init(PIR_ZCAL | PIR_PLLINIT | PIR_DCAL | PIR_PHYRST | + PIR_DRAMRST | PIR_DRAMINIT | PIR_QSGATE); + } /* detect ranks and bus width */ if (readl(&mctl_ctl->pgsr[0]) & (0xfe << 20)) { /* only one rank */ - if (((readl(&mctl_ctl->datx[0].gsr[0]) >> 24) & 0x2) || - ((readl(&mctl_ctl->datx[1].gsr[0]) >> 24) & 0x2)) { + if (((readl(&mctl_ctl->dx[0].gsr[0]) >> 24) & 0x2) || + ((readl(&mctl_ctl->dx[1].gsr[0]) >> 24) & 0x2)) { clrsetbits_le32(&mctl_ctl->dtcr, 0xf << 24, 0x1 << 24); para->dual_rank = 0; } /* only half DQ width */ - if (((readl(&mctl_ctl->datx[2].gsr[0]) >> 24) & 0x1) || - ((readl(&mctl_ctl->datx[3].gsr[0]) >> 24) & 0x1)) { - writel(0x0, &mctl_ctl->datx[2].gcr); - writel(0x0, &mctl_ctl->datx[3].gcr); + if (((readl(&mctl_ctl->dx[2].gsr[0]) >> 24) & 0x1) || + ((readl(&mctl_ctl->dx[3].gsr[0]) >> 24) & 0x1)) { + writel(0x0, &mctl_ctl->dx[2].gcr); + writel(0x0, &mctl_ctl->dx[3].gcr); para->bus_width = 16; } @@ -419,7 +531,10 @@ static int mctl_channel_init(struct dram_para *para) udelay(10); /* set PGCR3, CKE polarity */ - writel(0x00aa0060, &mctl_ctl->pgcr[3]); + if (socid == SOCID_H3) + writel(0x00aa0060, &mctl_ctl->pgcr[3]); + else if (socid == SOCID_A64) + writel(0xc0aa0060, &mctl_ctl->pgcr[3]); /* power down zq calibration module for power save */ setbits_le32(&mctl_ctl->zqcr, ZQCR_PWRDOWN); @@ -450,6 +565,45 @@ static void mctl_auto_detect_dram_size(struct dram_para *para) break; } +/* + * The actual values used here are taken from Allwinner provided boot0 + * binaries, though they are probably board specific, so would likely benefit + * from invidual tuning for each board. Apparently a lot of boards copy from + * some Allwinner reference design, so we go with those generic values for now + * in the hope that they are reasonable for most (all?) boards. + */ +#define SUN8I_H3_DX_READ_DELAYS \ + {{ 18, 18, 18, 18, 18, 18, 18, 18, 18, 0, 0 }, \ + { 14, 14, 14, 14, 14, 14, 14, 14, 14, 0, 0 }, \ + { 18, 18, 18, 18, 18, 18, 18, 18, 18, 0, 0 }, \ + { 14, 14, 14, 14, 14, 14, 14, 14, 14, 0, 0 }} +#define SUN8I_H3_DX_WRITE_DELAYS \ + {{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 10, 10 }, \ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 10, 10 }, \ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 10, 10 }, \ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 6, 6 }} +#define SUN8I_H3_AC_DELAYS \ + { 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0 } + +#define SUN50I_A64_DX_READ_DELAYS \ + {{ 16, 16, 16, 16, 17, 16, 16, 17, 16, 1, 0 }, \ + { 17, 17, 17, 17, 17, 17, 17, 17, 17, 1, 0 }, \ + { 16, 17, 17, 16, 16, 16, 16, 16, 16, 0, 0 }, \ + { 17, 17, 17, 17, 17, 17, 17, 17, 17, 1, 0 }} +#define SUN50I_A64_DX_WRITE_DELAYS \ + {{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 15, 15 }, \ + { 0, 0, 0, 0, 1, 1, 1, 1, 0, 10, 10 }, \ + { 1, 0, 1, 1, 1, 1, 1, 1, 0, 11, 11 }, \ + { 1, 0, 0, 1, 1, 1, 1, 1, 0, 12, 12 }} +#define SUN50I_A64_AC_DELAYS \ + { 5, 5, 13, 10, 2, 5, 3, 3, \ + 0, 3, 3, 3, 1, 0, 0, 0, \ + 3, 4, 0, 3, 4, 1, 4, 0, \ + 1, 1, 0, 1, 13, 5, 4 } + unsigned long sunxi_dram_init(void) { struct sunxi_mctl_com_reg * const mctl_com = @@ -458,16 +612,34 @@ unsigned long sunxi_dram_init(void) (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; struct dram_para para = { - .read_delays = 0x00007979, /* dram_tpr12 */ - .write_delays = 0x6aaa0000, /* dram_tpr11 */ .dual_rank = 0, .bus_width = 32, .row_bits = 15, .page_size = 4096, - }; - mctl_sys_init(¶); - if (mctl_channel_init(¶)) +#if defined(CONFIG_MACH_SUN8I_H3) + .dx_read_delays = SUN8I_H3_DX_READ_DELAYS, + .dx_write_delays = SUN8I_H3_DX_WRITE_DELAYS, + .ac_delays = SUN8I_H3_AC_DELAYS, +#elif defined(CONFIG_MACH_SUN50I) + .dx_read_delays = SUN50I_A64_DX_READ_DELAYS, + .dx_write_delays = SUN50I_A64_DX_WRITE_DELAYS, + .ac_delays = SUN50I_A64_AC_DELAYS, +#endif + }; +/* + * Let the compiler optimize alternatives away by passing this value into + * the static functions. This saves us #ifdefs, but still keeps the binary + * small. + */ +#if defined(CONFIG_MACH_SUN8I_H3) + uint16_t socid = SOCID_H3; +#elif defined(CONFIG_MACH_SUN50I) + uint16_t socid = SOCID_A64; +#endif + + mctl_sys_init(socid, ¶); + if (mctl_channel_init(socid, ¶)) return 0; if (para.dual_rank) @@ -477,7 +649,13 @@ unsigned long sunxi_dram_init(void) udelay(1); /* odt delay */ - writel(0x0c000400, &mctl_ctl->odtcfg); + if (socid == SOCID_H3) + writel(0x0c000400, &mctl_ctl->odtcfg); + + if (socid == SOCID_A64) { + setbits_le32(&mctl_ctl->vtfcr, 2 << 8); + clrbits_le32(&mctl_ctl->pgcr[2], (1 << 13)); + } /* clear credit value */ setbits_le32(&mctl_com->cccr, 1 << 31); @@ -486,6 +664,6 @@ unsigned long sunxi_dram_init(void) mctl_auto_detect_dram_size(¶); mctl_set_cr(¶); - return (1 << (para.row_bits + 3)) * para.page_size * + return (1UL << (para.row_bits + 3)) * para.page_size * (para.dual_rank ? 2 : 1); } diff --git a/arch/arm/mach-sunxi/rmr_switch.S b/arch/arm/mach-sunxi/rmr_switch.S new file mode 100644 index 00000000000..cefa93001ba --- /dev/null +++ b/arch/arm/mach-sunxi/rmr_switch.S @@ -0,0 +1,41 @@ +@ +@ ARMv8 RMR reset sequence on Allwinner SoCs. +@ +@ All 64-bit capable Allwinner SoCs reset in AArch32 (and continue to +@ exectute the Boot ROM in this state), so we need to switch to AArch64 +@ at some point. +@ Section G6.2.133 of the ARMv8 ARM describes the Reset Management Register +@ (RMR), which triggers a warm-reset of a core and can request to switch +@ into a different execution state (AArch32 or AArch64). +@ The address at which execution starts after the reset is held in the +@ RVBAR system register, which is architecturally read-only. +@ Allwinner provides a writable alias of this register in MMIO space, so +@ we can easily set the start address of AArch64 code. +@ This code below switches to AArch64 and starts execution at the specified +@ start address. It needs to be assembled by an ARM(32) assembler and +@ the machine code must be inserted as verbatim .word statements into the +@ beginning of the AArch64 U-Boot code. +@ To get the encoded bytes, use: +@ ${CROSS_COMPILE}gcc -c -o rmr_switch.o rmr_switch.S +@ ${CROSS_COMPILE}objdump -d rmr_switch.o +@ +@ The resulting words should be inserted into the U-Boot file at +@ arch/arm/include/asm/arch-sunxi/boot0.h. +@ +@ This file is not build by the U-Boot build system, but provided only as a +@ reference and to be able to regenerate a (probably fixed) version of this +@ code found in encoded form in boot0.h. + +.text + + ldr r1, =0x017000a0 @ MMIO mapped RVBAR[0] register + ldr r0, =0x57aA7add @ start address, to be replaced + str r0, [r1] + dsb sy + isb sy + mrc 15, 0, r0, cr12, cr0, 2 @ read RMR register + orr r0, r0, #3 @ request reset in AArch64 + mcr 15, 0, r0, cr12, cr0, 2 @ write RMR register + isb sy +1: wfi + b 1b diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c index cb9503f8e61..5a457b913e2 100644 --- a/arch/arm/mach-tegra/board2.c +++ b/arch/arm/mach-tegra/board2.c @@ -125,7 +125,7 @@ int board_init(void) pin_mux_spi(); #endif -#ifdef CONFIG_TEGRA_MMC +#ifdef CONFIG_MMC_SDHCI_TEGRA pin_mux_mmc(); #endif diff --git a/arch/arm/mach-tegra/spl.c b/arch/arm/mach-tegra/spl.c index e0f9d5b6b4e..41c88cb2b45 100644 --- a/arch/arm/mach-tegra/spl.c +++ b/arch/arm/mach-tegra/spl.c @@ -42,7 +42,7 @@ u32 spl_boot_device(void) void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) { - debug("image entry point: 0x%X\n", spl_image->entry_point); + debug("image entry point: 0x%lX\n", spl_image->entry_point); start_cpu((u32)spl_image->entry_point); halt_avp(); diff --git a/arch/mips/include/asm/const.h b/arch/mips/include/asm/const.h index f600e7a5b75..0a7eb832232 100644 --- a/arch/mips/include/asm/const.h +++ b/arch/mips/include/asm/const.h @@ -17,11 +17,8 @@ */ #ifdef __ASSEMBLY__ -#define _AC(X,Y) X #define _AT(T,X) X #else -#define __AC(X,Y) (X##Y) -#define _AC(X,Y) __AC(X,Y) #define _AT(T,X) ((T)(X)) #endif diff --git a/board/armadeus/apf27/apf27.c b/board/armadeus/apf27/apf27.c index 29995ea7604..16adf6e5ded 100644 --- a/board/armadeus/apf27/apf27.c +++ b/board/armadeus/apf27/apf27.c @@ -119,7 +119,7 @@ static int apf27_devices_init(void) mx27_fec_init_pins(); #endif -#ifdef CONFIG_MXC_MMC +#ifdef CONFIG_MMC_MXC mx27_sd2_init_pins(); imx_gpio_mode((GPIO_PORTF | GPIO_OUT | GPIO_PUEN | GPIO_GPIO | 16)); gpio_request(PC_PWRON, "pc_pwron"); diff --git a/board/avionic-design/common/tamonten.c b/board/avionic-design/common/tamonten.c index 4fb36a2cf8f..f78c00718f4 100644 --- a/board/avionic-design/common/tamonten.c +++ b/board/avionic-design/common/tamonten.c @@ -28,7 +28,7 @@ void gpio_early_init(void) } #endif -#ifdef CONFIG_TEGRA_MMC +#ifdef CONFIG_MMC_SDHCI_TEGRA /* * Routine: pin_mux_mmc * Description: setup the pin muxes/tristate values for the SDMMC(s) diff --git a/board/compal/paz00/paz00.c b/board/compal/paz00/paz00.c index 43931b0653a..54eef6c4d49 100644 --- a/board/compal/paz00/paz00.c +++ b/board/compal/paz00/paz00.c @@ -13,7 +13,7 @@ #include <asm/arch/pinmux.h> #include <asm/gpio.h> -#ifdef CONFIG_TEGRA_MMC +#ifdef CONFIG_MMC_SDHCI_TEGRA /* * Routine: pin_mux_mmc * Description: setup the pin muxes/tristate values for the SDMMC(s) diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index 52f914d7a47..37d2f54d3bd 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -24,7 +24,7 @@ #include <linux/errno.h> #include <hwconfig.h> -#ifdef CONFIG_DAVINCI_MMC +#ifdef CONFIG_MMC_DAVINCI #include <mmc.h> #include <asm/arch/sdmmc_defs.h> #endif @@ -197,7 +197,7 @@ int misc_init_r(void) return 0; } -#ifdef CONFIG_DAVINCI_MMC +#ifdef CONFIG_MMC_DAVINCI static struct davinci_mmc mmc_sd0 = { .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE, .host_caps = MMC_MODE_4BIT, /* DA850 supports only 4-bit SD/MMC */ @@ -219,7 +219,7 @@ static const struct pinmux_config gpio_pins[] = { /* GP0[11] is required for NOR to work on Rev 3 EVMs */ { pinmux(0), 8, 4 }, /* GP0[11] */ #endif -#ifdef CONFIG_DAVINCI_MMC +#ifdef CONFIG_MMC_DAVINCI /* GP0[11] is required for SD to work on Rev 3 EVMs */ { pinmux(0), 8, 4 }, /* GP0[11] */ #endif @@ -250,7 +250,7 @@ const struct pinmux_resource pinmuxes[] = { PINMUX_ITEM(emifa_pins_nor), #endif PINMUX_ITEM(gpio_pins), -#ifdef CONFIG_DAVINCI_MMC +#ifdef CONFIG_MMC_DAVINCI PINMUX_ITEM(mmc0_pins), #endif }; @@ -263,7 +263,7 @@ const struct lpsc_resource lpsc[] = { { DAVINCI_LPSC_EMAC }, /* image download */ { DAVINCI_LPSC_UART2 }, /* console */ { DAVINCI_LPSC_GPIO }, -#ifdef CONFIG_DAVINCI_MMC +#ifdef CONFIG_MMC_DAVINCI { DAVINCI_LPSC_MMC_SD }, #endif }; @@ -368,7 +368,7 @@ int board_init(void) writel(0x01 << 11, GPIO_BANK0_REG_CLR_ADDR); #endif -#ifdef CONFIG_DAVINCI_MMC +#ifdef CONFIG_MMC_DAVINCI /* Set the GPIO direction as output */ clrbits_le32((u32 *)GPIO_BANK0_REG_DIR_ADDR, (0x01 << 11)); diff --git a/board/davinci/da8xxevm/omapl138_lcdk.c b/board/davinci/da8xxevm/omapl138_lcdk.c index 9c1a4833123..3ce1992c1dc 100644 --- a/board/davinci/da8xxevm/omapl138_lcdk.c +++ b/board/davinci/da8xxevm/omapl138_lcdk.c @@ -20,7 +20,7 @@ #include <asm/io.h> #include <linux/errno.h> #include <asm/arch/davinci_misc.h> -#ifdef CONFIG_DAVINCI_MMC +#ifdef CONFIG_MMC_DAVINCI #include <mmc.h> #include <asm/arch/sdmmc_defs.h> #endif @@ -29,7 +29,7 @@ DECLARE_GLOBAL_DATA_PTR; #define pinmux(x) (&davinci_syscfg_regs->pinmux[x]) -#ifdef CONFIG_DAVINCI_MMC +#ifdef CONFIG_MMC_DAVINCI /* MMC0 pin muxer settings */ const struct pinmux_config mmc0_pins[] = { /* GP0[11] is required for SD to work on Rev 3 EVMs */ @@ -130,7 +130,7 @@ const struct lpsc_resource lpsc[] = { { DAVINCI_LPSC_EMAC }, /* image download */ { DAVINCI_LPSC_UART2 }, /* console */ { DAVINCI_LPSC_GPIO }, -#ifdef CONFIG_DAVINCI_MMC +#ifdef CONFIG_MMC_DAVINCI { DAVINCI_LPSC_MMC_SD }, #endif }; @@ -210,7 +210,7 @@ int board_init(void) #endif -#ifdef CONFIG_DAVINCI_MMC +#ifdef CONFIG_MMC_DAVINCI if (davinci_configure_pin_mux(mmc0_pins, ARRAY_SIZE(mmc0_pins)) != 0) return 1; #endif @@ -355,7 +355,7 @@ int misc_init_r(void) return 0; } -#ifdef CONFIG_DAVINCI_MMC +#ifdef CONFIG_MMC_DAVINCI static struct davinci_mmc mmc_sd0 = { .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE, .host_caps = MMC_MODE_4BIT, /* DA850 supports only 4-bit SD/MMC */ diff --git a/board/hisilicon/hikey/hikey.c b/board/hisilicon/hikey/hikey.c index 72d6334b5f6..df3b5e717ac 100644 --- a/board/hisilicon/hikey/hikey.c +++ b/board/hisilicon/hikey/hikey.c @@ -347,7 +347,7 @@ static int init_dwmmc(void) { int ret; -#ifdef CONFIG_DWMMC +#ifdef CONFIG_MMC_DW /* mmc0 clocks are already configured by ATF */ ret = hi6220_pinmux_config(PERIPH_ID_SDMMC0); diff --git a/board/htkw/mcx/mcx.c b/board/htkw/mcx/mcx.c index 5ef383d9712..1ac9d663c8b 100644 --- a/board/htkw/mcx/mcx.c +++ b/board/htkw/mcx/mcx.c @@ -100,7 +100,7 @@ void set_muxconf_regs(void) MUX_MCX(); } -#if defined(CONFIG_OMAP_HSMMC) && !defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_MMC_OMAP_HS) && !defined(CONFIG_SPL_BUILD) int board_mmc_init(bd_t *bis) { return omap_mmc_init(0, 0, 0, -1, -1); diff --git a/board/lego/ev3/legoev3.c b/board/lego/ev3/legoev3.c index d757d978cfb..7e1766c8717 100644 --- a/board/lego/ev3/legoev3.c +++ b/board/lego/ev3/legoev3.c @@ -26,7 +26,7 @@ #include <linux/errno.h> #include <hwconfig.h> -#ifdef CONFIG_DAVINCI_MMC +#ifdef CONFIG_MMC_DAVINCI #include <mmc.h> #include <asm/arch/sdmmc_defs.h> #endif @@ -39,7 +39,7 @@ u8 board_rev; #define EEPROM_REV_OFFSET 0x3F00 #define EEPROM_MAC_OFFSET 0x3F06 -#ifdef CONFIG_DAVINCI_MMC +#ifdef CONFIG_MMC_DAVINCI static struct davinci_mmc mmc_sd0 = { .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE, .host_caps = MMC_MODE_4BIT, /* DA850 supports only 4-bit SD/MMC */ diff --git a/board/nvidia/cardhu/cardhu.c b/board/nvidia/cardhu/cardhu.c index f04f843c314..2ad996226ff 100644 --- a/board/nvidia/cardhu/cardhu.c +++ b/board/nvidia/cardhu/cardhu.c @@ -33,7 +33,7 @@ void pinmux_init(void) pinmux_config_drvgrp_table(cardhu_padctrl, ARRAY_SIZE(cardhu_padctrl)); } -#if defined(CONFIG_TEGRA_MMC) +#if defined(CONFIG_MMC_SDHCI_TEGRA) /* * Do I2C/PMU writes to bring up SD card bus power * diff --git a/board/nvidia/dalmore/dalmore.c b/board/nvidia/dalmore/dalmore.c index e4c4bfbc680..cb9282e2923 100644 --- a/board/nvidia/dalmore/dalmore.c +++ b/board/nvidia/dalmore/dalmore.c @@ -34,7 +34,7 @@ void pinmux_init(void) ARRAY_SIZE(dalmore_padctrl)); } -#if defined(CONFIG_TEGRA_MMC) +#if defined(CONFIG_MMC_SDHCI_TEGRA) /* * Do I2C/PMU writes to bring up SD card bus power * diff --git a/board/nvidia/harmony/harmony.c b/board/nvidia/harmony/harmony.c index c892a25751f..2945785ed17 100644 --- a/board/nvidia/harmony/harmony.c +++ b/board/nvidia/harmony/harmony.c @@ -14,7 +14,7 @@ #include <asm/arch/tegra.h> #include <asm/gpio.h> -#ifdef CONFIG_TEGRA_MMC +#ifdef CONFIG_MMC_SDHCI_TEGRA /* * Routine: pin_mux_mmc * Description: setup the pin muxes/tristate values for the SDMMC(s) diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c index 4e01deb02fb..b56bc529d1a 100644 --- a/board/nvidia/seaboard/seaboard.c +++ b/board/nvidia/seaboard/seaboard.c @@ -25,7 +25,7 @@ void gpio_early_init_uart(void) } #endif -#ifdef CONFIG_TEGRA_MMC +#ifdef CONFIG_MMC_SDHCI_TEGRA /* * Routine: pin_mux_mmc * Description: setup the pin muxes/tristate values for the SDMMC(s) diff --git a/board/nvidia/whistler/whistler.c b/board/nvidia/whistler/whistler.c index 3476f1159fe..db489780612 100644 --- a/board/nvidia/whistler/whistler.c +++ b/board/nvidia/whistler/whistler.c @@ -15,7 +15,7 @@ #include <asm/gpio.h> #include <i2c.h> -#ifdef CONFIG_TEGRA_MMC +#ifdef CONFIG_MMC_SDHCI_TEGRA /* * Routine: pin_mux_mmc * Description: setup the pin muxes/tristate values for the SDMMC(s) diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c index 522e0cd67a3..ba928e0fa79 100644 --- a/board/samsung/common/board.c +++ b/board/samsung/common/board.c @@ -260,7 +260,7 @@ static int init_mmc(void) static int init_dwmmc(void) { -#ifdef CONFIG_DWMMC +#ifdef CONFIG_MMC_DW return exynos_dwmmc_init(gd->fdt_blob); #else return 0; diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index e1d4ab148f0..37b42521a4e 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -125,6 +125,7 @@ config MACH_SUN50I bool "sun50i (Allwinner A64)" select ARM64 select SUNXI_GEN_SUN6I + select SUPPORT_SPL endchoice @@ -133,6 +134,29 @@ config MACH_SUN8I bool default y if MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_H3 || MACH_SUN8I_A83T +config RESERVE_ALLWINNER_BOOT0_HEADER + bool "reserve space for Allwinner boot0 header" + select ENABLE_ARM_SOC_BOOT0_HOOK + ---help--- + Prepend a 1536 byte (empty) header to the U-Boot image file, to be + filled with magic values post build. The Allwinner provided boot0 + blob relies on this information to load and execute U-Boot. + Only needed on 64-bit Allwinner boards so far when using boot0. + +config ARM_BOOT_HOOK_RMR + bool + depends on ARM64 + default y + select ENABLE_ARM_SOC_BOOT0_HOOK + ---help--- + Insert some ARM32 code at the very beginning of the U-Boot binary + which uses an RMR register write to bring the core into AArch64 mode. + The very first instruction acts as a switch, since it's carefully + chosen to be a NOP in one mode and a branch in the other, so the + code would only be executed if not already in AArch64. + This allows both the SPL and the U-Boot proper to be entered in + either mode and switch to AArch64 if needed. + config DRAM_TYPE int "sunxi dram type" depends on MACH_SUN8I_A83T @@ -145,6 +169,7 @@ config DRAM_CLK default 792 if MACH_SUN9I default 312 if MACH_SUN6I || MACH_SUN8I default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I + default 672 if MACH_SUN50I ---help--- Set the dram clock speed, valid range 240 - 480 (prior to sun9i), must be a multiple of 24. For the sun9i (A80), the tested values @@ -164,6 +189,7 @@ config DRAM_ZQ default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I default 127 if MACH_SUN7I default 4145117 if MACH_SUN9I + default 3881915 if MACH_SUN50I ---help--- Set the dram zq value. @@ -171,6 +197,7 @@ config DRAM_ODT_EN bool "sunxi dram odt enable" default n if !MACH_SUN8I_A23 default y if MACH_SUN8I_A23 + default y if MACH_SUN50I ---help--- Select this to enable dram odt (on die termination). @@ -291,10 +318,6 @@ config OLD_SUNXI_KERNEL_COMPAT Set this to enable various workarounds for old kernels, this results in sub-optimal settings for newer kernels, only enable if needed. -config MMC - depends on !UART0_PORT_F - default y if ARCH_SUNXI - config MMC0_CD_PIN string "Card detect pin for mmc0" default "PF6" if MACH_SUN8I_A83T || MACH_SUN8I_H3 || MACH_SUN50I diff --git a/board/technexion/twister/twister.c b/board/technexion/twister/twister.c index 4a3d0946a0c..ad4b02a753c 100644 --- a/board/technexion/twister/twister.c +++ b/board/technexion/twister/twister.c @@ -130,7 +130,7 @@ int board_eth_init(bd_t *bis) return 0; } -#if defined(CONFIG_OMAP_HSMMC) && \ +#if defined(CONFIG_MMC_OMAP_HS) && \ !defined(CONFIG_SPL_BUILD) int board_mmc_init(bd_t *bis) { diff --git a/board/teejet/mt_ventoux/mt_ventoux.c b/board/teejet/mt_ventoux/mt_ventoux.c index c2de1fec622..6b05541964c 100644 --- a/board/teejet/mt_ventoux/mt_ventoux.c +++ b/board/teejet/mt_ventoux/mt_ventoux.c @@ -291,7 +291,7 @@ int board_eth_init(bd_t *bis) return 0; } -#if defined(CONFIG_OMAP_HSMMC) && \ +#if defined(CONFIG_MMC_OMAP_HS) && \ !defined(CONFIG_SPL_BUILD) int board_mmc_init(bd_t *bis) { diff --git a/board/toradex/colibri_t20/colibri_t20.c b/board/toradex/colibri_t20/colibri_t20.c index 4d298e69e64..7d574fbdab5 100644 --- a/board/toradex/colibri_t20/colibri_t20.c +++ b/board/toradex/colibri_t20/colibri_t20.c @@ -82,7 +82,7 @@ int ft_board_setup(void *blob, bd_t *bd) } #endif -#ifdef CONFIG_TEGRA_MMC +#ifdef CONFIG_MMC_SDHCI_TEGRA /* * Routine: pin_mux_mmc * Description: setup the pin muxes/tristate values for the SDMMC(s) diff --git a/common/scsi.c b/common/scsi.c index e7efa5ae797..fb5b407f6b1 100644 --- a/common/scsi.c +++ b/common/scsi.c @@ -559,6 +559,8 @@ int scsi_scan(int mode) if (mode == 1) printf("scanning bus for devices...\n"); + blk_unbind_all(IF_TYPE_SCSI); + ret = uclass_get(UCLASS_SCSI, &uc); if (ret) return ret; diff --git a/common/spl/spl.c b/common/spl/spl.c index f7df834e328..a76ea3a6034 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -115,7 +115,7 @@ int spl_parse_image_header(struct spl_image_info *spl_image, } spl_image->os = image_get_os(header); spl_image->name = image_get_name(header); - debug("spl: payload image: %.*s load addr: 0x%x size: %d\n", + debug("spl: payload image: %.*s load addr: 0x%lx size: %d\n", (int)sizeof(spl_image->name), spl_image->name, spl_image->load_addr, spl_image->size); } else { @@ -140,7 +140,7 @@ int spl_parse_image_header(struct spl_image_info *spl_image, spl_image->load_addr = CONFIG_SYS_LOAD_ADDR; spl_image->entry_point = CONFIG_SYS_LOAD_ADDR; spl_image->size = end - start; - debug("spl: payload zImage, load addr: 0x%x size: %d\n", + debug("spl: payload zImage, load addr: 0x%lx size: %d\n", spl_image->load_addr, spl_image->size); return 0; } @@ -164,9 +164,9 @@ __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) typedef void __noreturn (*image_entry_noargs_t)(void); image_entry_noargs_t image_entry = - (image_entry_noargs_t)(unsigned long)spl_image->entry_point; + (image_entry_noargs_t)spl_image->entry_point; - debug("image entry point: 0x%X\n", spl_image->entry_point); + debug("image entry point: 0x%lX\n", spl_image->entry_point); image_entry(); } diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c index 85e3de8f230..0cd355cd46f 100644 --- a/common/spl/spl_mmc.c +++ b/common/spl/spl_mmc.c @@ -36,7 +36,7 @@ static int mmc_load_legacy(struct spl_image_info *spl_image, struct mmc *mmc, /* Read the header too to avoid extra memcpy */ count = blk_dread(mmc_get_blk_desc(mmc), sector, image_size_sectors, (void *)(ulong)spl_image->load_addr); - debug("read %x sectors to %x\n", image_size_sectors, + debug("read %x sectors to %lx\n", image_size_sectors, spl_image->load_addr); if (count != image_size_sectors) return -EIO; diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig index afef344556f..cffcccb0758 100644 --- a/configs/am335x_baltos_defconfig +++ b/configs/am335x_baltos_defconfig @@ -44,6 +44,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_UBI=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_MUSB_HOST=y diff --git a/configs/am335x_boneblack_defconfig b/configs/am335x_boneblack_defconfig index 79125ea8fe2..f253fae8580 100644 --- a/configs/am335x_boneblack_defconfig +++ b/configs/am335x_boneblack_defconfig @@ -31,6 +31,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_DFU_TFTP=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y +CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig index e68bc98eb97..1ea235ec1bc 100644 --- a/configs/am335x_boneblack_vboot_defconfig +++ b/configs/am335x_boneblack_vboot_defconfig @@ -38,6 +38,7 @@ CONFIG_DFU_RAM=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y # CONFIG_DM_MMC_OPS is not set +CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_DM_ETH=y diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig index 08c1e79f744..a9ee21b6c10 100644 --- a/configs/am335x_evm_defconfig +++ b/configs/am335x_evm_defconfig @@ -35,6 +35,7 @@ CONFIG_DFU_RAM=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y # CONFIG_DM_MMC_OPS is not set +CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_DM_ETH=y @@ -52,3 +53,6 @@ CONFIG_G_DNL_VENDOR_NUM=0x0451 CONFIG_G_DNL_PRODUCT_NUM=0xd022 CONFIG_RSA=y CONFIG_SPL_OF_LIBFDT=y +CONFIG_MISC=y +CONFIG_DM_USB=y +CONFIG_USB_MUSB_TI=y diff --git a/configs/am335x_evm_nor_defconfig b/configs/am335x_evm_nor_defconfig index 91b50d2b1fa..4081cce3024 100644 --- a/configs/am335x_evm_nor_defconfig +++ b/configs/am335x_evm_nor_defconfig @@ -27,6 +27,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_DFU_MMC=y CONFIG_DFU_NAND=y CONFIG_DFU_RAM=y +CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/am335x_evm_norboot_defconfig b/configs/am335x_evm_norboot_defconfig index 0a4f8ff74dc..b72f07e4a64 100644 --- a/configs/am335x_evm_norboot_defconfig +++ b/configs/am335x_evm_norboot_defconfig @@ -20,6 +20,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_EXT4_WRITE=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y +CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig index 7f9cd2ee47a..5e4a3e9a391 100644 --- a/configs/am335x_evm_spiboot_defconfig +++ b/configs/am335x_evm_spiboot_defconfig @@ -28,6 +28,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_EXT4_WRITE=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y +CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/am335x_evm_usbspl_defconfig b/configs/am335x_evm_usbspl_defconfig index 5438c9e7f60..368005ddb98 100644 --- a/configs/am335x_evm_usbspl_defconfig +++ b/configs/am335x_evm_usbspl_defconfig @@ -28,6 +28,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_DFU_MMC=y CONFIG_DFU_NAND=y CONFIG_DFU_RAM=y +CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/am335x_igep0033_defconfig b/configs/am335x_igep0033_defconfig index 6149beb758a..9d00e87e932 100644 --- a/configs/am335x_igep0033_defconfig +++ b/configs/am335x_igep0033_defconfig @@ -38,5 +38,6 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig index 9b73f460120..acac878026e 100644 --- a/configs/am335x_shc_defconfig +++ b/configs/am335x_shc_defconfig @@ -32,5 +32,6 @@ CONFIG_AUTOBOOT_STOP_STR="noautoboot" CONFIG_CMD_MMC=y CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig index ff705803fcf..493f37fbd03 100644 --- a/configs/am335x_shc_ict_defconfig +++ b/configs/am335x_shc_ict_defconfig @@ -32,5 +32,6 @@ CONFIG_AUTOBOOT_STOP_STR="noautoboot" CONFIG_CMD_MMC=y CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig index 520d17c9da2..ac12baa93c0 100644 --- a/configs/am335x_shc_netboot_defconfig +++ b/configs/am335x_shc_netboot_defconfig @@ -33,5 +33,6 @@ CONFIG_AUTOBOOT_STOP_STR="noautoboot" CONFIG_CMD_MMC=y CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/am335x_shc_prompt_defconfig b/configs/am335x_shc_prompt_defconfig index d6cc3153c98..6e879baf114 100644 --- a/configs/am335x_shc_prompt_defconfig +++ b/configs/am335x_shc_prompt_defconfig @@ -30,5 +30,6 @@ CONFIG_AUTOBOOT_STOP_STR="noautoboot" CONFIG_CMD_MMC=y CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig index b4e36b52418..52dddf88ceb 100644 --- a/configs/am335x_shc_sdboot_defconfig +++ b/configs/am335x_shc_sdboot_defconfig @@ -32,5 +32,6 @@ CONFIG_AUTOBOOT_STOP_STR="noautoboot" CONFIG_CMD_MMC=y CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/am335x_shc_sdboot_prompt_defconfig b/configs/am335x_shc_sdboot_prompt_defconfig index b4e36b52418..52dddf88ceb 100644 --- a/configs/am335x_shc_sdboot_prompt_defconfig +++ b/configs/am335x_shc_sdboot_prompt_defconfig @@ -32,5 +32,6 @@ CONFIG_AUTOBOOT_STOP_STR="noautoboot" CONFIG_CMD_MMC=y CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig index 99c09b9eaae..8779aa4d406 100644 --- a/configs/am335x_sl50_defconfig +++ b/configs/am335x_sl50_defconfig @@ -33,5 +33,6 @@ CONFIG_CMD_I2C=y CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_EXT4_WRITE=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/am3517_crane_defconfig b/configs/am3517_crane_defconfig index 08902b8cf47..125abff69d3 100644 --- a/configs/am3517_crane_defconfig +++ b/configs/am3517_crane_defconfig @@ -20,6 +20,7 @@ CONFIG_CMD_DHCP=y # CONFIG_CMD_NFS is not set CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig index 291f570ada0..818b43b82a5 100644 --- a/configs/am3517_evm_defconfig +++ b/configs/am3517_evm_defconfig @@ -31,6 +31,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_UBI=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_MUSB_HOST=y diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig index 00f186a4d84..4885d185506 100644 --- a/configs/am43xx_evm_defconfig +++ b/configs/am43xx_evm_defconfig @@ -45,6 +45,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y # CONFIG_DM_MMC_OPS is not set +CONFIG_MMC_OMAP_HS=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y diff --git a/configs/am43xx_evm_ethboot_defconfig b/configs/am43xx_evm_ethboot_defconfig index 7090fd193fc..e74e967b0b6 100644 --- a/configs/am43xx_evm_ethboot_defconfig +++ b/configs/am43xx_evm_ethboot_defconfig @@ -35,6 +35,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y CONFIG_DFU_SF=y +CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SYS_NS16550=y diff --git a/configs/am43xx_evm_qspiboot_defconfig b/configs/am43xx_evm_qspiboot_defconfig index a3f3abdc06b..f2e1f020234 100644 --- a/configs/am43xx_evm_qspiboot_defconfig +++ b/configs/am43xx_evm_qspiboot_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y CONFIG_DFU_SF=y +CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SYS_NS16550=y diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig index 6a881dd6cbb..32cb7430d54 100644 --- a/configs/am43xx_evm_usbhost_boot_defconfig +++ b/configs/am43xx_evm_usbhost_boot_defconfig @@ -47,6 +47,7 @@ CONFIG_DFU_SF=y CONFIG_DM_GPIO=y CONFIG_DM_MMC=y # CONFIG_DM_MMC_OPS is not set +CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_DM_SERIAL=y diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig index 60b2122484d..7e702e582bc 100644 --- a/configs/am43xx_hs_evm_defconfig +++ b/configs/am43xx_hs_evm_defconfig @@ -47,6 +47,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y # CONFIG_DM_MMC_OPS is not set +CONFIG_MMC_OMAP_HS=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index a582055b37b..11eeae9e457 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -57,6 +57,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y # CONFIG_DM_MMC_OPS is not set +CONFIG_MMC_OMAP_HS=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y diff --git a/configs/am57xx_evm_nodt_defconfig b/configs/am57xx_evm_nodt_defconfig index 7e08b0ab42f..3235a7622f8 100644 --- a/configs/am57xx_evm_nodt_defconfig +++ b/configs/am57xx_evm_nodt_defconfig @@ -38,6 +38,7 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index 4dcfce4697c..c7268909b05 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -59,6 +59,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y # CONFIG_DM_MMC_OPS is not set +CONFIG_MMC_OMAP_HS=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y diff --git a/configs/apf27_defconfig b/configs/apf27_defconfig index a02e180d2f2..2da500aec64 100644 --- a/configs/apf27_defconfig +++ b/configs/apf27_defconfig @@ -21,4 +21,5 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_CMD_UBI=y +CONFIG_MMC_MXC=y CONFIG_OF_LIBFDT=y diff --git a/configs/apx4devkit_defconfig b/configs/apx4devkit_defconfig index 9245ebba865..53d03e16dd5 100644 --- a/configs/apx4devkit_defconfig +++ b/configs/apx4devkit_defconfig @@ -22,6 +22,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_CMD_UBI=y +CONFIG_MMC_MXS=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT=y diff --git a/configs/arndale_defconfig b/configs/arndale_defconfig index cdfb73996fb..2298def33dd 100644 --- a/configs/arndale_defconfig +++ b/configs/arndale_defconfig @@ -22,6 +22,7 @@ CONFIG_CMD_TIME=y CONFIG_CMD_SOUND=y CONFIG_CMD_EXT4_WRITE=y CONFIG_DM_I2C_COMPAT=y +CONFIG_MMC_DW=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_S5P=y CONFIG_SOUND=y diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig index 04f5ffe9591..3793c4255d9 100644 --- a/configs/axs101_defconfig +++ b/configs/axs101_defconfig @@ -20,6 +20,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_CLK=y CONFIG_SYS_I2C_DW=y +CONFIG_MMC_DW=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_DM_SERIAL=y diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig index 54fad6d958a..30a4021d791 100644 --- a/configs/axs103_defconfig +++ b/configs/axs103_defconfig @@ -20,6 +20,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_CLK=y CONFIG_SYS_I2C_DW=y +CONFIG_MMC_DW=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_DM_SERIAL=y diff --git a/configs/birdland_bav335a_defconfig b/configs/birdland_bav335a_defconfig index 5e1af1c18c1..6940a6edfc6 100644 --- a/configs/birdland_bav335a_defconfig +++ b/configs/birdland_bav335a_defconfig @@ -45,6 +45,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y +CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/birdland_bav335b_defconfig b/configs/birdland_bav335b_defconfig index f3771bbb3d5..b8a76c47844 100644 --- a/configs/birdland_bav335b_defconfig +++ b/configs/birdland_bav335b_defconfig @@ -45,6 +45,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y +CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig index 41eac1828cf..e78b20a2764 100644 --- a/configs/brppt1_mmc_defconfig +++ b/configs/brppt1_mmc_defconfig @@ -48,6 +48,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_NETCONSOLE=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_MUSB_HOST=y diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig index 17b9cb1e800..7271fc0221c 100644 --- a/configs/brppt1_spi_defconfig +++ b/configs/brppt1_spi_defconfig @@ -53,6 +53,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_NETCONSOLE=y +CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig index 7c0cf965cd2..4cea7e1472b 100644 --- a/configs/brxre1_defconfig +++ b/configs/brxre1_defconfig @@ -47,6 +47,7 @@ CONFIG_CMD_TIME=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_NETCONSOLE=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_MUSB_HOST=y diff --git a/configs/cairo_defconfig b/configs/cairo_defconfig index 67d6b61e1bb..d18cf941e85 100644 --- a/configs/cairo_defconfig +++ b/configs/cairo_defconfig @@ -28,5 +28,6 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index 9203f7346cd..8b66d6ca476 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -50,7 +50,8 @@ CONFIG_CROS_EC_KEYB=y CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y CONFIG_PWRSEQ=y -CONFIG_ROCKCHIP_DWMMC=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y # CONFIG_SPL_PINCTRL_FULL is not set diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index 95e5f571cd5..f655301636e 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -51,7 +51,8 @@ CONFIG_CROS_EC_KEYB=y CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y CONFIG_PWRSEQ=y -CONFIG_ROCKCHIP_DWMMC=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y # CONFIG_SPL_PINCTRL_FULL is not set diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index 49cd6405f0a..04321f4b5e7 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -51,7 +51,8 @@ CONFIG_CROS_EC_KEYB=y CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y CONFIG_PWRSEQ=y -CONFIG_ROCKCHIP_DWMMC=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y # CONFIG_SPL_PINCTRL_FULL is not set diff --git a/configs/cl-som-am57x_defconfig b/configs/cl-som-am57x_defconfig index 9eadf42152c..5d3bc110796 100644 --- a/configs/cl-som-am57x_defconfig +++ b/configs/cl-som-am57x_defconfig @@ -23,6 +23,7 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/cm_t335_defconfig b/configs/cm_t335_defconfig index 36905fdafce..e2c8162f347 100644 --- a/configs/cm_t335_defconfig +++ b/configs/cm_t335_defconfig @@ -35,5 +35,6 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/cm_t3517_defconfig b/configs/cm_t3517_defconfig index aba8b852194..115e4511cd6 100644 --- a/configs/cm_t3517_defconfig +++ b/configs/cm_t3517_defconfig @@ -20,6 +20,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_MUSB_HOST=y diff --git a/configs/cm_t35_defconfig b/configs/cm_t35_defconfig index 56b78c15065..4d9b203e319 100644 --- a/configs/cm_t35_defconfig +++ b/configs/cm_t35_defconfig @@ -22,6 +22,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig index 2d7884119d6..aafac81efed 100644 --- a/configs/cm_t43_defconfig +++ b/configs/cm_t43_defconfig @@ -43,6 +43,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_DM=y CONFIG_DM_GPIO=y +CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/cm_t54_defconfig b/configs/cm_t54_defconfig index e002e1c8511..d8ff4c36ea1 100644 --- a/configs/cm_t54_defconfig +++ b/configs/cm_t54_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig index e6033109db6..bcdc272cb65 100644 --- a/configs/devkit8000_defconfig +++ b/configs/devkit8000_defconfig @@ -18,5 +18,6 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index 64fe038f3d7..0b646f3f705 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -59,6 +59,7 @@ CONFIG_PCF8575_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y # CONFIG_DM_MMC_OPS is not set +CONFIG_MMC_OMAP_HS=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index b890a06ef35..2df3abfdcaf 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -64,6 +64,7 @@ CONFIG_PCF8575_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y # CONFIG_DM_MMC_OPS is not set +CONFIG_MMC_OMAP_HS=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y diff --git a/configs/draco_defconfig b/configs/draco_defconfig index 0cb44129931..5fe194b6690 100644 --- a/configs/draco_defconfig +++ b/configs/draco_defconfig @@ -46,6 +46,7 @@ CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_DFU_NAND=y +CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_MTD_UBI_FASTMAP=y diff --git a/configs/duovero_defconfig b/configs/duovero_defconfig index 33e70eeb43c..85573b4b702 100644 --- a/configs/duovero_defconfig +++ b/configs/duovero_defconfig @@ -20,6 +20,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set CONFIG_CMD_EXT4_WRITE=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/eco5pk_defconfig b/configs/eco5pk_defconfig index 77f3cd57002..cc8788d820b 100644 --- a/configs/eco5pk_defconfig +++ b/configs/eco5pk_defconfig @@ -20,6 +20,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_CMD_UBI=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/etamin_defconfig b/configs/etamin_defconfig index 8fb6ebd7bf0..dbd6dfe49be 100644 --- a/configs/etamin_defconfig +++ b/configs/etamin_defconfig @@ -46,6 +46,7 @@ CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_DFU_NAND=y +CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_MTD_UBI_FASTMAP=y diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig index 6546db9267e..623150b46d1 100644 --- a/configs/evb-rk3036_defconfig +++ b/configs/evb-rk3036_defconfig @@ -29,7 +29,8 @@ CONFIG_CLK=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_LED=y -CONFIG_ROCKCHIP_DWMMC=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PINCTRL=y CONFIG_ROCKCHIP_RK3036_PINCTRL=y CONFIG_RAM=y diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig index e5e550cc47d..df589968845 100644 --- a/configs/evb-rk3288_defconfig +++ b/configs/evb-rk3288_defconfig @@ -43,7 +43,8 @@ CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_LED=y CONFIG_LED_GPIO=y -CONFIG_ROCKCHIP_DWMMC=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PINCTRL=y # CONFIG_PINCTRL_FULL is not set CONFIG_SPL_PINCTRL=y diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index 6c271047e89..6988bcb8663 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -20,7 +20,8 @@ CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_CLK=y CONFIG_ROCKCHIP_GPIO=y -CONFIG_ROCKCHIP_DWMMC=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y CONFIG_ROCKCHIP_SDHCI=y CONFIG_MMC_SDHCI=y CONFIG_PINCTRL=y diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig index eff5e15aa0e..21a5df701c6 100644 --- a/configs/fennec-rk3288_defconfig +++ b/configs/fennec-rk3288_defconfig @@ -42,7 +42,8 @@ CONFIG_CLK=y CONFIG_SPL_CLK=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y -CONFIG_ROCKCHIP_DWMMC=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PINCTRL=y # CONFIG_PINCTRL_FULL is not set CONFIG_SPL_PINCTRL=y diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 4910c80cd88..eb78d547bbc 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -43,7 +43,8 @@ CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_LED=y CONFIG_LED_GPIO=y -CONFIG_ROCKCHIP_DWMMC=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y # CONFIG_SPL_PINCTRL_FULL is not set diff --git a/configs/hikey_defconfig b/configs/hikey_defconfig index 27a86382bf8..539c7d31e98 100644 --- a/configs/hikey_defconfig +++ b/configs/hikey_defconfig @@ -10,5 +10,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_GPIO=y CONFIG_CMD_CACHE=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_K3=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/igep0020_defconfig b/configs/igep0020_defconfig index c25b6b85a30..0dd244efc91 100644 --- a/configs/igep0020_defconfig +++ b/configs/igep0020_defconfig @@ -33,5 +33,6 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_UBI=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/igep0030_defconfig b/configs/igep0030_defconfig index 925c42fd44f..72fb874b870 100644 --- a/configs/igep0030_defconfig +++ b/configs/igep0030_defconfig @@ -25,5 +25,6 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_UBI=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/igep0032_defconfig b/configs/igep0032_defconfig index dad8dfaf0c2..b18ce4cf129 100644 --- a/configs/igep0032_defconfig +++ b/configs/igep0032_defconfig @@ -25,5 +25,6 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_UBI=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index 97f7187b841..b5cc9ef0612 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -39,6 +39,7 @@ CONFIG_DM=y # CONFIG_BLK is not set CONFIG_DM_MMC=y # CONFIG_DM_MMC_OPS is not set +CONFIG_MMC_OMAP_HS=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y diff --git a/configs/kc1_defconfig b/configs/kc1_defconfig index 76226e9d34c..f7f9301bd1d 100644 --- a/configs/kc1_defconfig +++ b/configs/kc1_defconfig @@ -23,6 +23,7 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_MUSB_GADGET=y diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig index a4281c9b2c4..653d8d25c88 100644 --- a/configs/kylin-rk3036_defconfig +++ b/configs/kylin-rk3036_defconfig @@ -30,7 +30,8 @@ CONFIG_CLK=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_LED=y -CONFIG_ROCKCHIP_DWMMC=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PINCTRL=y CONFIG_ROCKCHIP_RK3036_PINCTRL=y CONFIG_DM_REGULATOR_FIXED=y diff --git a/configs/m28evk_defconfig b/configs/m28evk_defconfig index f145c40a7e3..e69a262ba78 100644 --- a/configs/m28evk_defconfig +++ b/configs/m28evk_defconfig @@ -32,6 +32,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_UBI=y +CONFIG_MMC_MXS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_USB=y diff --git a/configs/mcx_defconfig b/configs/mcx_defconfig index 9dc3c5abfd8..c73b53cce96 100644 --- a/configs/mcx_defconfig +++ b/configs/mcx_defconfig @@ -27,6 +27,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_CMD_UBI=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_ULPI_VIEWPORT_OMAP=y diff --git a/configs/miniarm-rk3288_defconfig b/configs/miniarm-rk3288_defconfig index 1e273a6fa14..2b6bd0b8abc 100644 --- a/configs/miniarm-rk3288_defconfig +++ b/configs/miniarm-rk3288_defconfig @@ -42,7 +42,8 @@ CONFIG_CLK=y CONFIG_SPL_CLK=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y -CONFIG_ROCKCHIP_DWMMC=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y # CONFIG_SPL_PINCTRL_FULL is not set diff --git a/configs/mt_ventoux_defconfig b/configs/mt_ventoux_defconfig index 9e330a7f44c..c035f40e91b 100644 --- a/configs/mt_ventoux_defconfig +++ b/configs/mt_ventoux_defconfig @@ -24,6 +24,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_CMD_UBI=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_ULPI_VIEWPORT_OMAP=y diff --git a/configs/mx23_olinuxino_defconfig b/configs/mx23_olinuxino_defconfig index ad27842ab47..f67bb78d897 100644 --- a/configs/mx23_olinuxino_defconfig +++ b/configs/mx23_olinuxino_defconfig @@ -19,6 +19,7 @@ CONFIG_CMD_DHCP=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_MMC_MXS=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT=y diff --git a/configs/mx23evk_defconfig b/configs/mx23evk_defconfig index b60acb527c8..21d41e3fd71 100644 --- a/configs/mx23evk_defconfig +++ b/configs/mx23evk_defconfig @@ -24,6 +24,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_MMC_MXS=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT=y diff --git a/configs/mx28evk_auart_console_defconfig b/configs/mx28evk_auart_console_defconfig index 83f4a5299f9..ddd442dc2a4 100644 --- a/configs/mx28evk_auart_console_defconfig +++ b/configs/mx28evk_auart_console_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_UBI=y +CONFIG_MMC_MXS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_USB=y diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig index 3bd8de0c435..947676d1585 100644 --- a/configs/mx28evk_defconfig +++ b/configs/mx28evk_defconfig @@ -31,6 +31,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_UBI=y +CONFIG_MMC_MXS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_USB=y diff --git a/configs/mx28evk_nand_defconfig b/configs/mx28evk_nand_defconfig index d511247f3b2..ebe1dde0085 100644 --- a/configs/mx28evk_nand_defconfig +++ b/configs/mx28evk_nand_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_UBI=y +CONFIG_MMC_MXS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_USB=y diff --git a/configs/mx28evk_spi_defconfig b/configs/mx28evk_spi_defconfig index a3afe14c8c6..5ba17efd419 100644 --- a/configs/mx28evk_spi_defconfig +++ b/configs/mx28evk_spi_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_UBI=y +CONFIG_MMC_MXS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_USB=y diff --git a/configs/nokia_rx51_defconfig b/configs/nokia_rx51_defconfig index 210a9b18f47..0b8fccf74a3 100644 --- a/configs/nokia_rx51_defconfig +++ b/configs/nokia_rx51_defconfig @@ -23,6 +23,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_CFB_CONSOLE_ANSI=y # CONFIG_VGA_AS_SINGLE_DEVICE is not set diff --git a/configs/odroid-xu3_defconfig b/configs/odroid-xu3_defconfig index a6ec2ee20c8..dab4cc14433 100644 --- a/configs/odroid-xu3_defconfig +++ b/configs/odroid-xu3_defconfig @@ -26,6 +26,7 @@ CONFIG_ADC=y CONFIG_ADC_EXYNOS=y CONFIG_DFU_MMC=y CONFIG_DM_I2C_COMPAT=y +CONFIG_MMC_DW=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_S5P=y CONFIG_DM_PMIC=y diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig index e12208cf3e1..567ac2b7553 100644 --- a/configs/odroid_defconfig +++ b/configs/odroid_defconfig @@ -36,6 +36,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y CONFIG_DFU_MMC=y CONFIG_DM_I2C_COMPAT=y +CONFIG_MMC_DW=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_S5P=y diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig index 4816a034fd7..32626a24699 100644 --- a/configs/omap3_beagle_defconfig +++ b/configs/omap3_beagle_defconfig @@ -18,6 +18,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_GPIO=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_MUSB_GADGET=y diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig index 6ca7e2cfaa7..a3a7bf19f14 100644 --- a/configs/omap3_evm_defconfig +++ b/configs/omap3_evm_defconfig @@ -19,6 +19,7 @@ CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/omap3_ha_defconfig b/configs/omap3_ha_defconfig index 3fcbb76f518..bf806ce2bb0 100644 --- a/configs/omap3_ha_defconfig +++ b/configs/omap3_ha_defconfig @@ -19,6 +19,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig index ac1a6a30b8f..a71ce5f3312 100644 --- a/configs/omap3_logic_defconfig +++ b/configs/omap3_logic_defconfig @@ -29,6 +29,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_UBI=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_MUSB_GADGET=y diff --git a/configs/omap3_overo_defconfig b/configs/omap3_overo_defconfig index b902283dd23..615b3eef174 100644 --- a/configs/omap3_overo_defconfig +++ b/configs/omap3_overo_defconfig @@ -31,6 +31,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_UBI=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/omap3_pandora_defconfig b/configs/omap3_pandora_defconfig index 6635c6943fb..311a82d9b7d 100644 --- a/configs/omap3_pandora_defconfig +++ b/configs/omap3_pandora_defconfig @@ -21,5 +21,6 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_UBI=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/omap3_zoom1_defconfig b/configs/omap3_zoom1_defconfig index e7f8fd01b03..e0087e4c59c 100644 --- a/configs/omap3_zoom1_defconfig +++ b/configs/omap3_zoom1_defconfig @@ -24,5 +24,6 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/omap4_panda_defconfig b/configs/omap4_panda_defconfig index 8d9024854ef..fae9ac3c2cc 100644 --- a/configs/omap4_panda_defconfig +++ b/configs/omap4_panda_defconfig @@ -21,6 +21,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set CONFIG_CMD_EXT4_WRITE=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/omap4_sdp4430_defconfig b/configs/omap4_sdp4430_defconfig index de339ca2c9c..f3a8b0c8d22 100644 --- a/configs/omap4_sdp4430_defconfig +++ b/configs/omap4_sdp4430_defconfig @@ -19,5 +19,6 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_NET is not set # CONFIG_CMD_NFS is not set CONFIG_CMD_EXT4_WRITE=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig index 18843d26e7f..0088c8fa17f 100644 --- a/configs/omap5_uevm_defconfig +++ b/configs/omap5_uevm_defconfig @@ -29,6 +29,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_DWC3=y diff --git a/configs/origen_defconfig b/configs/origen_defconfig index 0dcc9e88399..1feb71c698d 100644 --- a/configs/origen_defconfig +++ b/configs/origen_defconfig @@ -29,6 +29,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y CONFIG_DFU_MMC=y +CONFIG_MMC_DW=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_S5P=y diff --git a/configs/pcm051_rev1_defconfig b/configs/pcm051_rev1_defconfig index bc6e92d8fcc..732a61c650a 100644 --- a/configs/pcm051_rev1_defconfig +++ b/configs/pcm051_rev1_defconfig @@ -42,6 +42,7 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/pcm051_rev3_defconfig b/configs/pcm051_rev3_defconfig index acdf192416a..07b2e45db42 100644 --- a/configs/pcm051_rev3_defconfig +++ b/configs/pcm051_rev3_defconfig @@ -42,6 +42,7 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/peach-pi_defconfig b/configs/peach-pi_defconfig index ef021184213..42b9f258b0b 100644 --- a/configs/peach-pi_defconfig +++ b/configs/peach-pi_defconfig @@ -32,6 +32,7 @@ CONFIG_I2C_ARB_GPIO_CHALLENGE=y CONFIG_CROS_EC_KEYB=y CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y +CONFIG_MMC_DW=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_S5P=y CONFIG_SPI_FLASH=y diff --git a/configs/peach-pit_defconfig b/configs/peach-pit_defconfig index 14fe00eb2a4..7b4ebfe77fb 100644 --- a/configs/peach-pit_defconfig +++ b/configs/peach-pit_defconfig @@ -32,6 +32,7 @@ CONFIG_I2C_ARB_GPIO_CHALLENGE=y CONFIG_CROS_EC_KEYB=y CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y +CONFIG_MMC_DW=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_S5P=y CONFIG_SPI_FLASH=y diff --git a/configs/pengwyn_defconfig b/configs/pengwyn_defconfig index 2da21265f93..7696e9d90fa 100644 --- a/configs/pengwyn_defconfig +++ b/configs/pengwyn_defconfig @@ -42,6 +42,7 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_MUSB_HOST=y diff --git a/configs/pepper_defconfig b/configs/pepper_defconfig index 0592ed9c3ee..77a47d3d0a7 100644 --- a/configs/pepper_defconfig +++ b/configs/pepper_defconfig @@ -34,5 +34,6 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/pine64_plus_defconfig b/configs/pine64_plus_defconfig index 6d0198f02cc..2374170ed15 100644 --- a/configs/pine64_plus_defconfig +++ b/configs/pine64_plus_defconfig @@ -1,12 +1,11 @@ CONFIG_ARM=y -CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y +CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_ARCH_SUNXI=y CONFIG_MACH_SUN50I=y -CONFIG_DRAM_CLK=672 -CONFIG_DRAM_ZQ=3881915 CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pine64-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y +CONFIG_SPL=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig index 663724e8e4d..a123b841f97 100644 --- a/configs/popmetal-rk3288_defconfig +++ b/configs/popmetal-rk3288_defconfig @@ -42,7 +42,8 @@ CONFIG_CLK=y CONFIG_SPL_CLK=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y -CONFIG_ROCKCHIP_DWMMC=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y # CONFIG_SPL_PINCTRL_FULL is not set diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig index 650d23d7a0b..4fcd5ccc7a8 100644 --- a/configs/pxm2_defconfig +++ b/configs/pxm2_defconfig @@ -51,6 +51,7 @@ CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_DFU_NAND=y +CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_MTD_UBI_FASTMAP=y diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig index d3ac645ad6a..608acf95df3 100644 --- a/configs/rastaban_defconfig +++ b/configs/rastaban_defconfig @@ -46,6 +46,7 @@ CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_DFU_NAND=y +CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_MTD_UBI_FASTMAP=y diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig index 9e332bcd1dc..a3b0c87688b 100644 --- a/configs/rock2_defconfig +++ b/configs/rock2_defconfig @@ -41,7 +41,8 @@ CONFIG_CLK=y CONFIG_SPL_CLK=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y -CONFIG_ROCKCHIP_DWMMC=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y # CONFIG_SPL_PINCTRL_FULL is not set diff --git a/configs/rut_defconfig b/configs/rut_defconfig index 4c99c13c825..3354f08debd 100644 --- a/configs/rut_defconfig +++ b/configs/rut_defconfig @@ -51,6 +51,7 @@ CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_DFU_NAND=y +CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_MTD_UBI_FASTMAP=y diff --git a/configs/s5pc210_universal_defconfig b/configs/s5pc210_universal_defconfig index b6cefb132af..fad2b43ba2c 100644 --- a/configs/s5pc210_universal_defconfig +++ b/configs/s5pc210_universal_defconfig @@ -29,6 +29,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y CONFIG_DFU_MMC=y +CONFIG_MMC_DW=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_S5P=y diff --git a/configs/sansa_fuze_plus_defconfig b/configs/sansa_fuze_plus_defconfig index b25bf1d0059..a147bdb6b9c 100644 --- a/configs/sansa_fuze_plus_defconfig +++ b/configs/sansa_fuze_plus_defconfig @@ -23,6 +23,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_MMC_MXS=y CONFIG_USB=y CONFIG_USB_GADGET=y CONFIG_CI_UDC=y diff --git a/configs/sc_sps_1_defconfig b/configs/sc_sps_1_defconfig index 81fb43444bd..b5638c52a06 100644 --- a/configs/sc_sps_1_defconfig +++ b/configs/sc_sps_1_defconfig @@ -20,6 +20,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_MMC_MXS=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT=y diff --git a/configs/smdk5250_defconfig b/configs/smdk5250_defconfig index b785efe3061..4ef41437a29 100644 --- a/configs/smdk5250_defconfig +++ b/configs/smdk5250_defconfig @@ -26,6 +26,7 @@ CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y CONFIG_DM_I2C_COMPAT=y +CONFIG_MMC_DW=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_S5P=y CONFIG_SPI_FLASH=y diff --git a/configs/smdk5420_defconfig b/configs/smdk5420_defconfig index daa46d482cc..bff944491e0 100644 --- a/configs/smdk5420_defconfig +++ b/configs/smdk5420_defconfig @@ -23,6 +23,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_EXT4_WRITE=y CONFIG_DM_I2C_COMPAT=y +CONFIG_MMC_DW=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_S5P=y CONFIG_SPI_FLASH=y diff --git a/configs/smdkv310_defconfig b/configs/smdkv310_defconfig index a75a1f0733c..c15f4f5c252 100644 --- a/configs/smdkv310_defconfig +++ b/configs/smdkv310_defconfig @@ -22,6 +22,7 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_MMC_DW=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_S5P=y diff --git a/configs/sniper_defconfig b/configs/sniper_defconfig index 6f55503ee6c..e2890691f55 100644 --- a/configs/sniper_defconfig +++ b/configs/sniper_defconfig @@ -24,6 +24,7 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_MUSB_GADGET=y diff --git a/configs/snow_defconfig b/configs/snow_defconfig index 47b498b6b2d..ef3cfa15191 100644 --- a/configs/snow_defconfig +++ b/configs/snow_defconfig @@ -33,6 +33,7 @@ CONFIG_I2C_ARB_GPIO_CHALLENGE=y CONFIG_CROS_EC_KEYB=y CONFIG_CROS_EC=y CONFIG_CROS_EC_I2C=y +CONFIG_MMC_DW=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_S5P=y CONFIG_SPI_FLASH=y diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index d91990c5e35..43c51fe94dd 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -43,6 +43,7 @@ CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y CONFIG_SYS_I2C_DW=y CONFIG_DM_MMC=y +CONFIG_MMC_DW=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index 905f766278c..8b050b95c48 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -43,6 +43,7 @@ CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y CONFIG_SYS_I2C_DW=y CONFIG_DM_MMC=y +CONFIG_MMC_DW=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig index 7daf81a5a3c..af41e1e0d26 100644 --- a/configs/socfpga_de0_nano_soc_defconfig +++ b/configs/socfpga_de0_nano_soc_defconfig @@ -42,6 +42,7 @@ CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y CONFIG_SYS_I2C_DW=y CONFIG_DM_MMC=y +CONFIG_MMC_DW=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_SYS_NS16550=y diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig index d8a3b828bdd..032deef497d 100644 --- a/configs/socfpga_de1_soc_defconfig +++ b/configs/socfpga_de1_soc_defconfig @@ -40,6 +40,7 @@ CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y CONFIG_SYS_I2C_DW=y CONFIG_DM_MMC=y +CONFIG_MMC_DW=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_SYS_NS16550=y diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig index 5a5324681f3..b16ee1c06ab 100644 --- a/configs/socfpga_mcvevk_defconfig +++ b/configs/socfpga_mcvevk_defconfig @@ -42,6 +42,7 @@ CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y CONFIG_SYS_I2C_DW=y CONFIG_DM_MMC=y +CONFIG_MMC_DW=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_SYS_NS16550=y diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig index 9450d214f83..d0c2bda18f0 100644 --- a/configs/socfpga_sockit_defconfig +++ b/configs/socfpga_sockit_defconfig @@ -43,6 +43,7 @@ CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y CONFIG_SYS_I2C_DW=y CONFIG_DM_MMC=y +CONFIG_MMC_DW=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index 84a889035a5..e9276f90af0 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -44,6 +44,7 @@ CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y CONFIG_SYS_I2C_DW=y CONFIG_DM_MMC=y +CONFIG_MMC_DW=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index 641dd4dc57f..6fd7bc08462 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -42,6 +42,7 @@ CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y CONFIG_SYS_I2C_DW=y CONFIG_DM_MMC=y +CONFIG_MMC_DW=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index 608cdf8ebbe..f01b56921b7 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -47,6 +47,7 @@ CONFIG_DFU_SF=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y CONFIG_DM_MMC=y +CONFIG_MMC_DW=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/spring_defconfig b/configs/spring_defconfig index 4a782c80da8..3bd86442767 100644 --- a/configs/spring_defconfig +++ b/configs/spring_defconfig @@ -33,6 +33,7 @@ CONFIG_I2C_ARB_GPIO_CHALLENGE=y CONFIG_CROS_EC_KEYB=y CONFIG_CROS_EC=y CONFIG_CROS_EC_I2C=y +CONFIG_MMC_DW=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_S5P=y CONFIG_SPI_FLASH=y diff --git a/configs/tao3530_defconfig b/configs/tao3530_defconfig index 88a3725c3fb..f4171da8ad7 100644 --- a/configs/tao3530_defconfig +++ b/configs/tao3530_defconfig @@ -19,6 +19,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig index 7e1b63bc807..0f6989e3e27 100644 --- a/configs/thuban_defconfig +++ b/configs/thuban_defconfig @@ -46,6 +46,7 @@ CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_DFU_NAND=y +CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_MTD_UBI_FASTMAP=y diff --git a/configs/ti814x_evm_defconfig b/configs/ti814x_evm_defconfig index 029791718e9..1e3b410b06a 100644 --- a/configs/ti814x_evm_defconfig +++ b/configs/ti814x_evm_defconfig @@ -28,5 +28,6 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig index 7d3a7d6634c..a145b51d5a7 100644 --- a/configs/ti816x_evm_defconfig +++ b/configs/ti816x_evm_defconfig @@ -23,5 +23,6 @@ CONFIG_CMD_MMC=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/trats2_defconfig b/configs/trats2_defconfig index 9e8820167d9..984ef06f84d 100644 --- a/configs/trats2_defconfig +++ b/configs/trats2_defconfig @@ -32,6 +32,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y CONFIG_DFU_MMC=y +CONFIG_MMC_DW=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_S5P=y diff --git a/configs/trats_defconfig b/configs/trats_defconfig index 92cf3f7ae00..15737d1f75c 100644 --- a/configs/trats_defconfig +++ b/configs/trats_defconfig @@ -31,6 +31,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y CONFIG_DFU_MMC=y +CONFIG_MMC_DW=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_S5P=y diff --git a/configs/tricorder_defconfig b/configs/tricorder_defconfig index 5bf0c9a6365..12a6843e0b4 100644 --- a/configs/tricorder_defconfig +++ b/configs/tricorder_defconfig @@ -18,5 +18,6 @@ CONFIG_CMD_I2C=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_CMD_UBI=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/tricorder_flash_defconfig b/configs/tricorder_flash_defconfig index 68d8fb67109..32c2059f5d0 100644 --- a/configs/tricorder_flash_defconfig +++ b/configs/tricorder_flash_defconfig @@ -18,5 +18,6 @@ CONFIG_CMD_I2C=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_CMD_UBI=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/ts4600_defconfig b/configs/ts4600_defconfig index 1d3acd3c712..40e20c48afb 100644 --- a/configs/ts4600_defconfig +++ b/configs/ts4600_defconfig @@ -16,4 +16,5 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_MMC_MXS=y CONFIG_OF_LIBFDT=y diff --git a/configs/twister_defconfig b/configs/twister_defconfig index c92bfc89238..826f0f10041 100644 --- a/configs/twister_defconfig +++ b/configs/twister_defconfig @@ -22,6 +22,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_CMD_UBI=y +CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_ULPI_VIEWPORT_OMAP=y diff --git a/configs/xfi3_defconfig b/configs/xfi3_defconfig index 6f1aa697295..f98ad3486fe 100644 --- a/configs/xfi3_defconfig +++ b/configs/xfi3_defconfig @@ -22,6 +22,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y +CONFIG_MMC_MXS=y CONFIG_USB=y CONFIG_USB_GADGET=y CONFIG_CI_UDC=y diff --git a/doc/README.socfpga b/doc/README.socfpga index cfcbbfe3798..e717637ac93 100644 --- a/doc/README.socfpga +++ b/doc/README.socfpga @@ -14,40 +14,8 @@ socfpga_dw_mmc Here are macro and detailed configuration required to enable DesignWare SDMMC controller support within SOCFPGA -#define CONFIG_MMC --> To enable the SD MMC framework support - -#define CONFIG_SDMMC_BASE (SOCFPGA_SDMMC_ADDRESS) --> The base address of CSR register for DesignWare SDMMC controller - #define CONFIG_GENERIC_MMC -> Enable the generic MMC driver #define CONFIG_SYS_MMC_MAX_BLK_COUNT 256 -> Using smaller max blk cnt to avoid flooding the limited stack in OCRAM - -#define CONFIG_DWMMC --> Enable the common DesignWare SDMMC controller framework - -#define CONFIG_SOCFPGA_DWMMC --> Enable the SOCFPGA specific driver for DesignWare SDMMC controller - -#define CONFIG_SOCFPGA_DWMMC_FIFO_DEPTH 1024 --> The FIFO depth for SOCFPGA DesignWare SDMMC controller - -#define CONFIG_SOCFPGA_DWMMC_DRVSEL 3 --> Phase-shifted clock of sdmmc_clk for controller to drive command and data to -the card to meet hold time requirements. SD clock is running at 50MHz and -drvsel is set to shift 135 degrees (3 * 45 degrees). With that, the hold time -is 135 / 360 * 20ns = 7.5ns. - -#define CONFIG_SOCFPGA_DWMMC_SMPSEL 0 --> Phase-shifted clock of sdmmc_clk used to sample the command and data from -the card - -#define CONFIG_SOCFPGA_DWMMC_BUS_WIDTH 4 --> Bus width of data line which either 1, 4 or 8 and based on board routing. - -#define CONFIG_SOCFPGA_DWMMC_BUS_HZ 50000000 --> The clock rate to controller. Do note the controller have a wrapper which -divide the clock from PLL by 4. diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index c3462ab7241..0aef13215e7 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -68,15 +68,86 @@ config ATMEL_SDHCI It is compliant with the SD Host Controller Standard V3.0 specification. -config ROCKCHIP_DWMMC +config MMC_DAVINCI + bool "TI DAVINCI Multimedia Card Interface support" + depends on ARCH_DAVINCI + default y + help + This selects the TI DAVINCI Multimedia card Interface. + If you have an DAVINCI board with a Multimedia Card slot, + say Y here. If unsure, say N. + +config MMC_DW + bool "Synopsys DesignWare Memory Card Interface" + help + This selects support for the Synopsys DesignWare Mobile Storage IP + block, this provides host support for SD and MMC interfaces, in both + PIO, internal DMA mode and external DMA mode. + +config MMC_DW_EXYNOS + bool "Exynos specific extensions for Synopsys DW Memory Card Interface" + depends on ARCH_EXYNOS + depends on MMC_DW + default y + help + This selects support for Samsung Exynos SoC specific extensions to the + Synopsys DesignWare Memory Card Interface driver. Select this option + for platforms based on Exynos4 and Exynos5 SoC's. + +config MMC_DW_K3 + bool "K3 specific extensions for Synopsys DW Memory Card Interface" + depends on MMC_DW + help + This selects support for Hisilicon K3 SoC specific extensions to the + Synopsys DesignWare Memory Card Interface driver. Select this option + for platforms based on Hisilicon K3 SoC's. + +config MMC_DW_ROCKCHIP bool "Rockchip SD/MMC controller support" depends on DM_MMC && OF_CONTROL + depends on MMC_DW help This enables support for the Rockchip SD/MMM controller, which is based on Designware IP. The device is compatible with at least SD 3.0, SDIO 3.0 and MMC 4.5 and supports common eMMC chips as well as removeable SD and micro-SD cards. +config MMC_DW_SOCFPGA + bool "SOCFPGA specific extensions for Synopsys DW Memory Card Interface" + depends on ARCH_SOCFPGA + depends on MMC_DW + default y + help + This selects support for Altera SOCFPGA specific extensions to the + Synopsys DesignWare Memory Card Interface driver. Select this option + for platforms based on Altera SOCFPGA. + +config MMC_MXC + bool "Freescale i.MX21/27/31 or MPC512x Multimedia Card support" + help + This selects the Freescale i.MX21, i.MX27, i.MX31 or MPC512x + Multimedia Card Interface. If you have an i.MX or MPC512x platform + with a Multimedia Card slot, say Y here. + + If unsure, say N. + +config MMC_MXS + bool "Freescale MXS Multimedia Card Interface support" + help + This selects the Freescale SSP MMC controller found on MXS based + platforms like mx23/28. + + If unsure, say N. + +config MMC_OMAP_HS + bool "TI OMAP High Speed Multimedia Card Interface support" + help + This selects the TI OMAP High Speed Multimedia card Interface. + If you have an omap2plus board with a Multimedia Card slot, + say Y here. + + If unsure, say N. + config SH_SDHI bool "SuperH/Renesas ARM SoCs on-chip SDHI host controller support" depends on RMOBILE @@ -107,8 +178,8 @@ config ROCKCHIP_SDHCI config MMC_UNIPHIER bool "UniPhier SD/MMC Host Controller support" depends on ARCH_UNIPHIER - depends on BLK - select DM_MMC_OPS + depends on BLK && DM_MMC_OPS + depends on OF_CONTROL help This selects support for the SD/MMC Host Controller on UniPhier SoCs. @@ -159,6 +230,18 @@ config MMC_SDHCI_BCM2835 If unsure, say N. +config MMC_SDHCI_CADENCE + bool "SDHCI support for the Cadence SD/SDIO/eMMC controller" + depends on BLK && DM_MMC_OPS + depends on MMC_SDHCI + depends on OF_CONTROL + help + This selects the Cadence SD/SDIO/eMMC driver. + + If you have a controller with this interface, say Y here. + + If unsure, say N. + config MMC_SDHCI_KONA bool "SDHCI support on Broadcom KONA platform" depends on MMC_SDHCI @@ -204,6 +287,24 @@ config MMC_SDHCI_SPEAR If unsure, say N. +config MMC_SDHCI_TEGRA + bool "SDHCI platform support for the Tegra SD/MMC Controller" + depends on TEGRA + default y + help + This selects the Tegra SD/MMC controller. If you have a Tegra + platform with SD or MMC devices, say Y here. + + If unsure, say N. + +config MMC_SUNXI + bool "Allwinner sunxi SD/MMC Host Controller support" + depends on ARCH_SUNXI + default y + help + This selects support for the SD/MMC Host Controller on + Allwinner sunxi SoCs. + endif endmenu diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 2b136ea21e1..4dca09c9550 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -16,10 +16,13 @@ endif obj-$(CONFIG_ARM_PL180_MMCI) += arm_pl180_mmci.o obj-$(CONFIG_ATMEL_SDHCI) += atmel_sdhci.o obj-$(CONFIG_BFIN_SDH) += bfin_sdh.o -obj-$(CONFIG_DAVINCI_MMC) += davinci_mmc.o -obj-$(CONFIG_DWMMC) += dw_mmc.o -obj-$(CONFIG_EXYNOS_DWMMC) += exynos_dw_mmc.o -obj-$(CONFIG_HIKEY_DWMMC) += hi6220_dw_mmc.o +obj-$(CONFIG_MMC_DAVINCI) += davinci_mmc.o + +obj-$(CONFIG_MMC_DW) += dw_mmc.o +obj-$(CONFIG_MMC_DW_EXYNOS) += exynos_dw_mmc.o +obj-$(CONFIG_MMC_DW_K3) += hi6220_dw_mmc.o +obj-$(CONFIG_MMC_DW_ROCKCHIP) += rockchip_dw_mmc.o +obj-$(CONFIG_MMC_DW_SOCFPGA) += socfpga_dw_mmc.o obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o obj-$(CONFIG_FTSDC010) += ftsdc010_mci.o obj-$(CONFIG_FTSDC021) += ftsdc021_sdhci.o @@ -29,14 +32,12 @@ obj-$(CONFIG_GENERIC_MMC) += mmc_boot.o endif obj-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o obj-$(CONFIG_MMC_SPI) += mmc_spi.o -obj-$(CONFIG_MMC_SUNXI) += sunxi_mmc.o obj-$(CONFIG_MVEBU_MMC) += mvebu_mmc.o -obj-$(CONFIG_MXC_MMC) += mxcmmc.o -obj-$(CONFIG_MXS_MMC) += mxsmmc.o -obj-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o +obj-$(CONFIG_MMC_OMAP_HS) += omap_hsmmc.o +obj-$(CONFIG_MMC_MXC) += mxcmmc.o +obj-$(CONFIG_MMC_MXS) += mxsmmc.o obj-$(CONFIG_X86) += pci_mmc.o obj-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o -obj-$(CONFIG_ROCKCHIP_DWMMC) += rockchip_dw_mmc.o obj-$(CONFIG_SUPPORT_EMMC_RPMB) += rpmb.o obj-$(CONFIG_S3C_SDI) += s3c_sdi.o ifdef CONFIG_BLK @@ -46,9 +47,6 @@ endif endif obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o obj-$(CONFIG_SH_SDHI) += sh_sdhi.o -obj-$(CONFIG_SOCFPGA_DWMMC) += socfpga_dw_mmc.o -obj-$(CONFIG_TEGRA_MMC) += tegra_mmc.o -obj-$(CONFIG_MMC_UNIPHIER) += uniphier-sd.o obj-$(CONFIG_ZYNQ_SDHCI) += zynq_sdhci.o obj-$(CONFIG_ROCKCHIP_SDHCI) += rockchip_sdhci.o @@ -64,7 +62,12 @@ obj-$(CONFIG_MSM_SDHCI) += msm_sdhci.o # SDHCI obj-$(CONFIG_MMC_SDHCI) += sdhci.o obj-$(CONFIG_MMC_SDHCI_BCM2835) += bcm2835_sdhci.o +obj-$(CONFIG_MMC_SDHCI_CADENCE) += sdhci-cadence.o obj-$(CONFIG_MMC_SDHCI_KONA) += kona_sdhci.o obj-$(CONFIG_MMC_SDHCI_MV) += mv_sdhci.o obj-$(CONFIG_MMC_SDHCI_S5P) += s5p_sdhci.o obj-$(CONFIG_MMC_SDHCI_SPEAR) += spear_sdhci.o +obj-$(CONFIG_MMC_SDHCI_TEGRA) += tegra_mmc.o + +obj-$(CONFIG_MMC_SUNXI) += sunxi_mmc.o +obj-$(CONFIG_MMC_UNIPHIER) += uniphier-sd.o diff --git a/drivers/mmc/arm_pl180_mmci.c b/drivers/mmc/arm_pl180_mmci.c index e64ac3c9939..ddf8383f1c6 100644 --- a/drivers/mmc/arm_pl180_mmci.c +++ b/drivers/mmc/arm_pl180_mmci.c @@ -275,7 +275,7 @@ static int mmc_host_reset(struct mmc *dev) return 0; } -static void host_set_ios(struct mmc *dev) +static int host_set_ios(struct mmc *dev) { struct pl180_mmc_host *host = dev->priv; u32 sdi_clkcr; @@ -333,6 +333,8 @@ static void host_set_ios(struct mmc *dev) writel(sdi_clkcr, &host->base->clock); udelay(CLK_CHANGE_DELAY); + + return 0; } static const struct mmc_ops arm_pl180_mmci_ops = { diff --git a/drivers/mmc/bfin_sdh.c b/drivers/mmc/bfin_sdh.c index 993a00cdb1a..1627dca3a1d 100644 --- a/drivers/mmc/bfin_sdh.c +++ b/drivers/mmc/bfin_sdh.c @@ -234,7 +234,7 @@ static void sdh_set_clk(unsigned long clk) bfin_write_SDH_CLK_CTL(clk_ctl & ~CLK_E); } -static void bfin_sdh_set_ios(struct mmc *mmc) +static int bfin_sdh_set_ios(struct mmc *mmc) { u16 cfg = 0; u16 clk_ctl = 0; @@ -250,6 +250,8 @@ static void bfin_sdh_set_ios(struct mmc *mmc) } bfin_write_SDH_CLK_CTL(clk_ctl); sdh_set_clk(mmc->clock); + + return 0; } static int bfin_sdh_init(struct mmc *mmc) diff --git a/drivers/mmc/davinci_mmc.c b/drivers/mmc/davinci_mmc.c index b495c7564cb..9edb668e149 100644 --- a/drivers/mmc/davinci_mmc.c +++ b/drivers/mmc/davinci_mmc.c @@ -348,7 +348,7 @@ static int dmmc_init(struct mmc *mmc) } /* Set buswidth or clock as indicated by the GENERIC_MMC framework */ -static void dmmc_set_ios(struct mmc *mmc) +static int dmmc_set_ios(struct mmc *mmc) { struct davinci_mmc *host = mmc->priv; struct davinci_mmc_regs *regs = host->reg_base; @@ -362,6 +362,8 @@ static void dmmc_set_ios(struct mmc *mmc) /* Set clock speed */ if (mmc->clock) dmmc_set_clock(mmc, mmc->clock); + + return 0; } static const struct mmc_ops dmmc_ops = { diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index d6ac46c1e04..700f7644329 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -388,7 +388,7 @@ static int dwmci_set_ios(struct udevice *dev) { struct mmc *mmc = mmc_get_mmc_dev(dev); #else -static void dwmci_set_ios(struct mmc *mmc) +static int dwmci_set_ios(struct mmc *mmc) { #endif struct dwmci_host *host = (struct dwmci_host *)mmc->priv; @@ -421,9 +421,8 @@ static void dwmci_set_ios(struct mmc *mmc) if (host->clksel) host->clksel(host); -#ifdef CONFIG_DM_MMC_OPS + return 0; -#endif } static int dwmci_init(struct mmc *mmc) diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 9796d39c65b..7defeb4f2a7 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -592,7 +592,7 @@ static void esdhc_clock_control(struct mmc *mmc, bool enable) } #endif -static void esdhc_set_ios(struct mmc *mmc) +static int esdhc_set_ios(struct mmc *mmc) { struct fsl_esdhc_priv *priv = mmc->priv; struct fsl_esdhc *regs = priv->esdhc_regs; @@ -614,6 +614,7 @@ static void esdhc_set_ios(struct mmc *mmc) else if (mmc->bus_width == 8) esdhc_setbits32(®s->proctl, PROCTL_DTW_8); + return 0; } static int esdhc_init(struct mmc *mmc) diff --git a/drivers/mmc/ftsdc010_mci.c b/drivers/mmc/ftsdc010_mci.c index e88c6322e9e..652a718467a 100644 --- a/drivers/mmc/ftsdc010_mci.c +++ b/drivers/mmc/ftsdc010_mci.c @@ -251,7 +251,7 @@ static int ftsdc010_request(struct mmc *mmc, struct mmc_cmd *cmd, return ret; } -static void ftsdc010_set_ios(struct mmc *mmc) +static int ftsdc010_set_ios(struct mmc *mmc) { struct ftsdc010_chip *chip = mmc->priv; struct ftsdc010_mmc __iomem *regs = chip->regs; @@ -270,6 +270,8 @@ static void ftsdc010_set_ios(struct mmc *mmc) setbits_le32(®s->bwr, FTSDC010_BWR_MODE_1BIT); break; } + + return 0; } static int ftsdc010_init(struct mmc *mmc) diff --git a/drivers/mmc/gen_atmel_mci.c b/drivers/mmc/gen_atmel_mci.c index cca0b04a602..7dc4a5de74e 100644 --- a/drivers/mmc/gen_atmel_mci.c +++ b/drivers/mmc/gen_atmel_mci.c @@ -336,7 +336,7 @@ mci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) } /* Entered into mmc structure during driver init */ -static void mci_set_ios(struct mmc *mmc) +static int mci_set_ios(struct mmc *mmc) { struct atmel_mci_priv *priv = mmc->priv; atmel_mci_t *mci = priv->mci; @@ -370,6 +370,8 @@ static void mci_set_ios(struct mmc *mmc) writel(busw << 7 | MMCI_BF(SCDSEL, MCI_BUS), &mci->sdcr); } + + return 0; } /* Entered into mmc structure during driver init */ diff --git a/drivers/mmc/mmc_spi.c b/drivers/mmc/mmc_spi.c index 25101179f65..a9d95fbd747 100644 --- a/drivers/mmc/mmc_spi.c +++ b/drivers/mmc/mmc_spi.c @@ -236,13 +236,14 @@ done: return ret; } -static void mmc_spi_set_ios(struct mmc *mmc) +static int mmc_spi_set_ios(struct mmc *mmc) { struct spi_slave *spi = mmc->priv; debug("%s: clock %u\n", __func__, mmc->clock); if (mmc->clock) spi_set_speed(spi, mmc->clock); + return 0; } static int mmc_spi_init_p(struct mmc *mmc) diff --git a/drivers/mmc/mvebu_mmc.c b/drivers/mmc/mvebu_mmc.c index a2792ac4ecb..3c7fb2130e0 100644 --- a/drivers/mmc/mvebu_mmc.c +++ b/drivers/mmc/mvebu_mmc.c @@ -316,12 +316,14 @@ static void mvebu_mmc_set_bus(unsigned int bus) mvebu_mmc_write(SDIO_HOST_CTRL, ctrl_reg); } -static void mvebu_mmc_set_ios(struct mmc *mmc) +static int mvebu_mmc_set_ios(struct mmc *mmc) { debug("%s: bus[%d] clock[%d]\n", DRIVER_NAME, mmc->bus_width, mmc->clock); mvebu_mmc_set_bus(mmc->bus_width); mvebu_mmc_set_clk(mmc->clock); + + return 0; } /* diff --git a/drivers/mmc/mxcmmc.c b/drivers/mmc/mxcmmc.c index 5a385a37f8b..dcf17c5d60e 100644 --- a/drivers/mmc/mxcmmc.c +++ b/drivers/mmc/mxcmmc.c @@ -448,7 +448,7 @@ static void mxcmci_set_clk_rate(struct mxcmci_host *host, unsigned int clk_ios) writel((prescaler << 4) | divider, &host->base->clk_rate); } -static void mxcmci_set_ios(struct mmc *mmc) +static int mxcmci_set_ios(struct mmc *mmc) { struct mxcmci_host *host = mmc->priv; if (mmc->bus_width == 4) @@ -464,6 +464,8 @@ static void mxcmci_set_ios(struct mmc *mmc) } host->clock = mmc->clock; + + return 0; } static int mxcmci_init(struct mmc *mmc) diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c index 08960284033..fe1fe707a58 100644 --- a/drivers/mmc/mxsmmc.c +++ b/drivers/mmc/mxsmmc.c @@ -304,7 +304,7 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) return 0; } -static void mxsmmc_set_ios(struct mmc *mmc) +static int mxsmmc_set_ios(struct mmc *mmc) { struct mxsmmc_priv *priv = mmc->priv; struct mxs_ssp_regs *ssp_regs = priv->regs; @@ -331,6 +331,8 @@ static void mxsmmc_set_ios(struct mmc *mmc) debug("MMC%d: Set %d bits bus width\n", mmc->block_dev.devnum, mmc->bus_width); + + return 0; } static int mxsmmc_init(struct mmc *mmc) diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c index 0a1ee407a18..b3268467dcc 100644 --- a/drivers/mmc/omap_hsmmc.c +++ b/drivers/mmc/omap_hsmmc.c @@ -511,7 +511,7 @@ static int mmc_write_data(struct hsmmc *mmc_base, const char *buf, return 0; } -static void omap_hsmmc_set_ios(struct mmc *mmc) +static int omap_hsmmc_set_ios(struct mmc *mmc) { struct hsmmc *mmc_base; unsigned int dsor = 0; @@ -559,10 +559,12 @@ static void omap_hsmmc_set_ios(struct mmc *mmc) while ((readl(&mmc_base->sysctl) & ICS_MASK) == ICS_NOTREADY) { if (get_timer(0) - start > MAX_RETRY_MS) { printf("%s: timedout waiting for ics!\n", __func__); - return; + return -ETIMEDOUT; } } writel(readl(&mmc_base->sysctl) | CEN_ENABLE, &mmc_base->sysctl); + + return 0; } #ifdef OMAP_HSMMC_USE_GPIO diff --git a/drivers/mmc/pic32_sdhci.c b/drivers/mmc/pic32_sdhci.c index 2abf943bdb9..fd2f5e3d5a8 100644 --- a/drivers/mmc/pic32_sdhci.c +++ b/drivers/mmc/pic32_sdhci.c @@ -15,6 +15,20 @@ DECLARE_GLOBAL_DATA_PTR; +static int pci32_sdhci_get_cd(struct sdhci_host *host) +{ + /* PIC32 SDHCI CD errata: + * - set CD_TEST and clear CD_TEST_INS bit + */ + sdhci_writeb(host, SDHCI_CTRL_CD_TEST, SDHCI_HOST_CONTROL); + + return 0; +} + +static const struct sdhci_ops pic32_sdhci_ops = { + .get_cd = pci32_sdhci_get_cd, +}; + static int pic32_sdhci_probe(struct udevice *dev) { struct sdhci_host *host = dev_get_priv(dev); @@ -30,9 +44,10 @@ static int pic32_sdhci_probe(struct udevice *dev) host->ioaddr = ioremap(addr, size); host->name = dev->name; - host->quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_NO_CD; + host->quirks = SDHCI_QUIRK_NO_HISPD_BIT; host->bus_width = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "bus-width", 4); + host->ops = &pic32_sdhci_ops; ret = fdtdec_get_int_array(gd->fdt_blob, dev->of_offset, "clock-freq-min-max", f_min_max, 2); diff --git a/drivers/mmc/pxa_mmc_gen.c b/drivers/mmc/pxa_mmc_gen.c index a5462e21481..f627553cac5 100644 --- a/drivers/mmc/pxa_mmc_gen.c +++ b/drivers/mmc/pxa_mmc_gen.c @@ -313,7 +313,7 @@ static int pxa_mmc_request(struct mmc *mmc, struct mmc_cmd *cmd, return 0; } -static void pxa_mmc_set_ios(struct mmc *mmc) +static int pxa_mmc_set_ios(struct mmc *mmc) { struct pxa_mmc_priv *priv = mmc->priv; struct pxa_mmc_regs *regs = priv->regs; @@ -322,13 +322,13 @@ static void pxa_mmc_set_ios(struct mmc *mmc) if (!mmc->clock) { pxa_mmc_stop_clock(mmc); - return; + return 0; } /* PXA3xx can do 26MHz with special settings. */ if (mmc->clock == 26000000) { writel(0x7, ®s->clkrt); - return; + return 0; } /* Set clock to the card the usual way. */ @@ -342,6 +342,8 @@ static void pxa_mmc_set_ios(struct mmc *mmc) } writel(pxa_mmc_clock, ®s->clkrt); + + return 0; } static int pxa_mmc_init(struct mmc *mmc) diff --git a/drivers/mmc/s3c_sdi.c b/drivers/mmc/s3c_sdi.c index 1b8358a7bc1..faf7b83a14c 100644 --- a/drivers/mmc/s3c_sdi.c +++ b/drivers/mmc/s3c_sdi.c @@ -207,7 +207,7 @@ error: return ret; } -static void s3cmmc_set_ios(struct mmc *mmc) +static int s3cmmc_set_ios(struct mmc *mmc) { struct s3c24x0_sdi *sdi_regs = s3c24x0_get_base_sdi(); uint32_t divider = 0; @@ -215,7 +215,7 @@ static void s3cmmc_set_ios(struct mmc *mmc) wide_bus = (mmc->bus_width == 4); if (!mmc->clock) - return; + return 0; divider = DIV_ROUND_UP(get_PCLK(), mmc->clock); if (divider) @@ -223,6 +223,8 @@ static void s3cmmc_set_ios(struct mmc *mmc) writel(divider, &sdi_regs->sdipre); mdelay(125); + + return 0; } static int s3cmmc_init(struct mmc *mmc) diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c index ac737e0f0f2..1f1d2ed8652 100644 --- a/drivers/mmc/s5p_sdhci.c +++ b/drivers/mmc/s5p_sdhci.c @@ -73,6 +73,17 @@ static void s5p_sdhci_set_control_reg(struct sdhci_host *host) sdhci_writel(host, ctrl, SDHCI_CONTROL2); } +static void s5p_set_clock(struct sdhci_host *host, u32 div) +{ + /* ToDo : Use the Clock Framework */ + set_mmc_clk(host->index, div); +} + +static const struct sdhci_ops s5p_sdhci_ops = { + .set_clock = &s5p_set_clock, + .set_control_reg = &s5p_sdhci_set_control_reg, +}; + static int s5p_sdhci_core_init(struct sdhci_host *host) { host->name = S5P_NAME; @@ -81,9 +92,7 @@ static int s5p_sdhci_core_init(struct sdhci_host *host) SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_USE_WIDE8; host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; - - host->set_control_reg = &s5p_sdhci_set_control_reg; - host->set_clock = set_mmc_clk; + host->ops = &s5p_sdhci_ops; if (host->bus_width == 8) host->host_caps |= MMC_MODE_8BIT; diff --git a/drivers/mmc/sdhci-cadence.c b/drivers/mmc/sdhci-cadence.c new file mode 100644 index 00000000000..2253bbc5183 --- /dev/null +++ b/drivers/mmc/sdhci-cadence.c @@ -0,0 +1,125 @@ +/* + * Copyright (C) 2016 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <linux/io.h> +#include <linux/sizes.h> +#include <dm/device.h> +#include <mmc.h> +#include <sdhci.h> + +/* HRS - Host Register Set (specific to Cadence) */ +#define SDHCI_CDNS_HRS04 0x10 /* PHY access port */ +#define SDHCI_CDNS_HRS04_ACK BIT(26) +#define SDHCI_CDNS_HRS04_RD BIT(25) +#define SDHCI_CDNS_HRS04_WR BIT(24) +#define SDHCI_CDNS_HRS04_RDATA_SHIFT 12 +#define SDHCI_CDNS_HRS04_WDATA_SHIFT 8 +#define SDHCI_CDNS_HRS04_ADDR_SHIFT 0 + +/* SRS - Slot Register Set (SDHCI-compatible) */ +#define SDHCI_CDNS_SRS_BASE 0x200 + +/* PHY */ +#define SDHCI_CDNS_PHY_DLY_SD_HS 0x00 +#define SDHCI_CDNS_PHY_DLY_SD_DEFAULT 0x01 +#define SDHCI_CDNS_PHY_DLY_UHS_SDR12 0x02 +#define SDHCI_CDNS_PHY_DLY_UHS_SDR25 0x03 +#define SDHCI_CDNS_PHY_DLY_UHS_SDR50 0x04 +#define SDHCI_CDNS_PHY_DLY_UHS_DDR50 0x05 +#define SDHCI_CDNS_PHY_DLY_EMMC_LEGACY 0x06 +#define SDHCI_CDNS_PHY_DLY_EMMC_SDR 0x07 +#define SDHCI_CDNS_PHY_DLY_EMMC_DDR 0x08 + +struct sdhci_cdns_plat { + struct mmc_config cfg; + struct mmc mmc; + void __iomem *hrs_addr; +}; + +static void sdhci_cdns_write_phy_reg(struct sdhci_cdns_plat *plat, + u8 addr, u8 data) +{ + void __iomem *reg = plat->hrs_addr + SDHCI_CDNS_HRS04; + u32 tmp; + + tmp = (data << SDHCI_CDNS_HRS04_WDATA_SHIFT) | + (addr << SDHCI_CDNS_HRS04_ADDR_SHIFT); + writel(tmp, reg); + + tmp |= SDHCI_CDNS_HRS04_WR; + writel(tmp, reg); + + tmp &= ~SDHCI_CDNS_HRS04_WR; + writel(tmp, reg); +} + +static void sdhci_cdns_phy_init(struct sdhci_cdns_plat *plat) +{ + sdhci_cdns_write_phy_reg(plat, SDHCI_CDNS_PHY_DLY_SD_HS, 4); + sdhci_cdns_write_phy_reg(plat, SDHCI_CDNS_PHY_DLY_SD_DEFAULT, 4); + sdhci_cdns_write_phy_reg(plat, SDHCI_CDNS_PHY_DLY_EMMC_LEGACY, 9); + sdhci_cdns_write_phy_reg(plat, SDHCI_CDNS_PHY_DLY_EMMC_SDR, 2); + sdhci_cdns_write_phy_reg(plat, SDHCI_CDNS_PHY_DLY_EMMC_DDR, 3); +} + +static int sdhci_cdns_bind(struct udevice *dev) +{ + struct sdhci_cdns_plat *plat = dev_get_platdata(dev); + + return sdhci_bind(dev, &plat->mmc, &plat->cfg); +} + +static int sdhci_cdns_probe(struct udevice *dev) +{ + struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); + struct sdhci_cdns_plat *plat = dev_get_platdata(dev); + struct sdhci_host *host = dev_get_priv(dev); + fdt_addr_t base; + int ret; + + base = dev_get_addr(dev); + if (base == FDT_ADDR_T_NONE) + return -EINVAL; + + plat->hrs_addr = devm_ioremap(dev, base, SZ_1K); + if (!plat->hrs_addr) + return -ENOMEM; + + host->name = dev->name; + host->ioaddr = plat->hrs_addr + SDHCI_CDNS_SRS_BASE; + host->quirks |= SDHCI_QUIRK_WAIT_SEND_CMD; + + sdhci_cdns_phy_init(plat); + + ret = sdhci_setup_cfg(&plat->cfg, host, 0, 0); + if (ret) + return ret; + + upriv->mmc = &plat->mmc; + host->mmc = &plat->mmc; + host->mmc->priv = host; + + return sdhci_probe(dev); +} + +static const struct udevice_id sdhci_cdns_match[] = { + { .compatible = "socionext,uniphier-sd4hc" }, + { .compatible = "cdns,sd4hc" }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(sdhci_cdns) = { + .name = "sdhci-cdns", + .id = UCLASS_MMC, + .of_match = sdhci_cdns_match, + .bind = sdhci_cdns_bind, + .probe = sdhci_cdns_probe, + .priv_auto_alloc_size = sizeof(struct sdhci_host), + .platdata_auto_alloc_size = sizeof(struct sdhci_cdns_plat), + .ops = &sdhci_ops, +}; diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index cbf5f56221c..3a1f4f758c3 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -359,8 +359,8 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock) div >>= 1; } - if (host->set_clock) - host->set_clock(host->index, div); + if (host->ops->set_clock) + host->ops->set_clock(host, div); clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT; clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) @@ -411,9 +411,6 @@ static void sdhci_set_power(struct sdhci_host *host, unsigned short power) return; } - if (host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER) - sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); - pwr |= SDHCI_POWER_ON; sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); @@ -424,14 +421,14 @@ static int sdhci_set_ios(struct udevice *dev) { struct mmc *mmc = mmc_get_mmc_dev(dev); #else -static void sdhci_set_ios(struct mmc *mmc) +static int sdhci_set_ios(struct mmc *mmc) { #endif u32 ctrl; struct sdhci_host *host = mmc->priv; - if (host->set_control_reg) - host->set_control_reg(host); + if (host->ops->set_control_reg) + host->ops->set_control_reg(host); if (mmc->clock != host->clock) sdhci_set_clock(mmc, mmc->clock); @@ -462,9 +459,8 @@ static void sdhci_set_ios(struct mmc *mmc) ctrl &= ~SDHCI_CTRL_HISPD; sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); -#ifdef CONFIG_DM_MMC_OPS + return 0; -#endif } static int sdhci_init(struct mmc *mmc) @@ -484,25 +480,8 @@ static int sdhci_init(struct mmc *mmc) sdhci_set_power(host, fls(mmc->cfg->voltages) - 1); - if (host->quirks & SDHCI_QUIRK_NO_CD) { -#if defined(CONFIG_PIC32_SDHCI) - /* PIC32 SDHCI CD errata: - * - set CD_TEST and clear CD_TEST_INS bit - */ - sdhci_writeb(host, SDHCI_CTRL_CD_TEST, SDHCI_HOST_CONTROL); -#else - unsigned int status; - - sdhci_writeb(host, SDHCI_CTRL_CD_TEST_INS | SDHCI_CTRL_CD_TEST, - SDHCI_HOST_CONTROL); - - status = sdhci_readl(host, SDHCI_PRESENT_STATE); - while ((!(status & SDHCI_CARD_PRESENT)) || - (!(status & SDHCI_CARD_STATE_STABLE)) || - (!(status & SDHCI_CARD_DETECT_PIN_LEVEL))) - status = sdhci_readl(host, SDHCI_PRESENT_STATE); -#endif - } + if (host->ops->get_cd) + host->ops->get_cd(host); /* Enable only interrupts served by the SD controller */ sdhci_writel(host, SDHCI_INT_DATA_MASK | SDHCI_INT_CMD_MASK, @@ -593,27 +572,23 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, cfg->voltages |= host->voltages; cfg->host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT; + + /* Since Host Controller Version3.0 */ if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) { - if (caps & SDHCI_CAN_DO_8BIT) - cfg->host_caps |= MMC_MODE_8BIT; + if (!(caps & SDHCI_CAN_DO_8BIT)) + cfg->host_caps &= ~MMC_MODE_8BIT; + + /* Find out whether clock multiplier is supported */ + caps_1 = sdhci_readl(host, SDHCI_CAPABILITIES_1); + host->clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >> + SDHCI_CLOCK_MUL_SHIFT; } if (host->host_caps) cfg->host_caps |= host->host_caps; - cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; - /* - * In case of Host Controller v3.00, find out whether clock - * multiplier is supported. - */ - if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) { - caps_1 = sdhci_readl(host, SDHCI_CAPABILITIES_1); - host->clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >> - SDHCI_CLOCK_MUL_SHIFT; - } - return 0; } diff --git a/drivers/mmc/sh_mmcif.c b/drivers/mmc/sh_mmcif.c index 69ded9ee2c8..1ff59f06d57 100644 --- a/drivers/mmc/sh_mmcif.c +++ b/drivers/mmc/sh_mmcif.c @@ -539,7 +539,7 @@ static int sh_mmcif_request(struct mmc *mmc, struct mmc_cmd *cmd, return ret; } -static void sh_mmcif_set_ios(struct mmc *mmc) +static int sh_mmcif_set_ios(struct mmc *mmc) { struct sh_mmcif_host *host = mmc->priv; @@ -554,6 +554,8 @@ static void sh_mmcif_set_ios(struct mmc *mmc) host->bus_width = MMC_BUS_WIDTH_1; debug("clock = %d, buswidth = %d\n", mmc->clock, mmc->bus_width); + + return 0; } static int sh_mmcif_init(struct mmc *mmc) diff --git a/drivers/mmc/sh_sdhi.c b/drivers/mmc/sh_sdhi.c index 78e2ef643c9..25224e2e1db 100644 --- a/drivers/mmc/sh_sdhi.c +++ b/drivers/mmc/sh_sdhi.c @@ -608,14 +608,14 @@ static int sh_sdhi_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, return ret; } -static void sh_sdhi_set_ios(struct mmc *mmc) +static int sh_sdhi_set_ios(struct mmc *mmc) { int ret; struct sh_sdhi_host *host = mmc_priv(mmc); ret = sh_sdhi_clock_control(host, mmc->clock); if (ret) - return; + return -EINVAL; if (mmc->bus_width == 4) sh_sdhi_writew(host, SDHI_OPTION, ~OPT_BUS_WIDTH_1 & @@ -625,6 +625,8 @@ static void sh_sdhi_set_ios(struct mmc *mmc) sh_sdhi_readw(host, SDHI_OPTION)); debug("clock = %d, buswidth = %d\n", mmc->clock, mmc->bus_width); + + return 0; } static int sh_sdhi_initialize(struct mmc *mmc) diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c index b8716c93cb0..fd3fc2af40a 100644 --- a/drivers/mmc/sunxi_mmc.c +++ b/drivers/mmc/sunxi_mmc.c @@ -227,7 +227,7 @@ static int mmc_config_clock(struct mmc *mmc) return 0; } -static void sunxi_mmc_set_ios(struct mmc *mmc) +static int sunxi_mmc_set_ios(struct mmc *mmc) { struct sunxi_mmc_host *mmchost = mmc->priv; @@ -237,7 +237,7 @@ static void sunxi_mmc_set_ios(struct mmc *mmc) /* Change clock first */ if (mmc->clock && mmc_config_clock(mmc) != 0) { mmchost->fatal_err = 1; - return; + return -EINVAL; } /* Change bus width */ @@ -247,6 +247,8 @@ static void sunxi_mmc_set_ios(struct mmc *mmc) writel(0x1, &mmchost->reg->width); else writel(0x0, &mmchost->reg->width); + + return 0; } static int sunxi_mmc_core_init(struct mmc *mmc) diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c index 97b11545954..0211dc7b80d 100644 --- a/drivers/mmc/tegra_mmc.c +++ b/drivers/mmc/tegra_mmc.c @@ -408,7 +408,7 @@ out: priv->clock = clock; } -static void tegra_mmc_set_ios(struct mmc *mmc) +static int tegra_mmc_set_ios(struct mmc *mmc) { struct tegra_mmc_priv *priv = mmc->priv; unsigned char ctrl; @@ -438,6 +438,8 @@ static void tegra_mmc_set_ios(struct mmc *mmc) writeb(ctrl, &priv->reg->hostctl); debug("mmc_set_ios: hostctl = %08X\n", ctrl); + + return 0; } static void tegra_mmc_pad_init(struct tegra_mmc_priv *priv) diff --git a/drivers/mtd/spi/sunxi_spi_spl.c b/drivers/mtd/spi/sunxi_spi_spl.c index e70064c6771..a24c1151741 100644 --- a/drivers/mtd/spi/sunxi_spi_spl.c +++ b/drivers/mtd/spi/sunxi_spi_spl.c @@ -284,4 +284,4 @@ static int spl_spi_load_image(struct spl_image_info *spl_image, return 0; } /* Use priorty 0 to override the default if it happens to be linked in */ -SPL_LOAD_IMAGE_METHOD("sunxi SPI" 0, BOOT_DEVICE_SPI, spl_spi_load_image); +SPL_LOAD_IMAGE_METHOD("sunxi SPI", 0, BOOT_DEVICE_SPI, spl_spi_load_image); diff --git a/drivers/power/axp152.c b/drivers/power/axp152.c index cd07275d9ff..c4b3fe58a66 100644 --- a/drivers/power/axp152.c +++ b/drivers/power/axp152.c @@ -75,7 +75,7 @@ int axp_init(void) return rc; if (ver != 0x05) - return -1; + return -EINVAL; return 0; } diff --git a/drivers/power/axp209.c b/drivers/power/axp209.c index 731b75e50a0..4b25ef25780 100644 --- a/drivers/power/axp209.c +++ b/drivers/power/axp209.c @@ -158,7 +158,7 @@ int axp_init(void) ver &= 0x0f; if (ver != 0x1) - return -1; + return -EINVAL; /* Mask all interrupts */ for (i = AXP209_IRQ_ENABLE1; i <= AXP209_IRQ_ENABLE5; i++) { diff --git a/drivers/power/battery/bat_trats2.c b/drivers/power/battery/bat_trats2.c index 57221adf818..6329e028b67 100644 --- a/drivers/power/battery/bat_trats2.c +++ b/drivers/power/battery/bat_trats2.c @@ -18,7 +18,7 @@ static int power_battery_charge(struct pmic *bat) struct power_battery *p_bat = bat->pbat; if (bat->chrg->chrg_state(p_bat->chrg, PMIC_CHARGER_ENABLE, 450)) - return -1; + return -EINVAL; return 0; } diff --git a/drivers/power/exynos-tmu.c b/drivers/power/exynos-tmu.c index b9968c25eb2..6a662677a7c 100644 --- a/drivers/power/exynos-tmu.c +++ b/drivers/power/exynos-tmu.c @@ -190,7 +190,7 @@ static int get_tmu_fdt_values(struct tmu_info *info, const void *blob) COMPAT_SAMSUNG_EXYNOS_TMU); if (node < 0) { debug("EXYNOS_TMU: No node for tmu in device tree\n"); - return -1; + return -ENODEV; } /* @@ -202,7 +202,7 @@ static int get_tmu_fdt_values(struct tmu_info *info, const void *blob) addr = fdtdec_get_addr(blob, node, "reg"); if (addr == FDT_ADDR_T_NONE) { debug("%s: Missing tmu-base\n", __func__); - return -1; + return -ENODEV; } info->tmu_base = (struct exynos5_tmu_reg *)addr; @@ -246,11 +246,11 @@ static int get_tmu_fdt_values(struct tmu_info *info, const void *blob) if (error) { debug("fail to get tmu node properties\n"); - return -1; + return -EINVAL; } #else /* Non DT support may never be added. Just in case */ - return -1; + return -ENODEV; #endif return 0; diff --git a/drivers/power/fuel_gauge/fg_max17042.c b/drivers/power/fuel_gauge/fg_max17042.c index 154ca6a6957..e43349454da 100644 --- a/drivers/power/fuel_gauge/fg_max17042.c +++ b/drivers/power/fuel_gauge/fg_max17042.c @@ -199,7 +199,7 @@ static int power_update_battery(struct pmic *p, struct pmic *bat) if (pmic_probe(p)) { puts("Can't find max17042 fuel gauge\n"); - return -1; + return -ENODEV; } ret |= pmic_reg_read(p, MAX17042_VFSOC, &val); @@ -224,7 +224,7 @@ static int power_check_battery(struct pmic *p, struct pmic *bat) if (pmic_probe(p)) { puts("Can't find max17042 fuel gauge\n"); - return -1; + return -ENODEV; } ret |= pmic_reg_read(p, MAX17042_STATUS, &val); diff --git a/drivers/power/mfd/fg_max77693.c b/drivers/power/mfd/fg_max77693.c index 4519fed4974..df1550816ec 100644 --- a/drivers/power/mfd/fg_max77693.c +++ b/drivers/power/mfd/fg_max77693.c @@ -52,7 +52,7 @@ static int power_update_battery(struct pmic *p, struct pmic *bat) if (pmic_probe(p)) { puts("Can't find max77693 fuel gauge\n"); - return -1; + return -ENODEV; } ret = max77693_get_soc(&pb->bat->state_of_chrg); @@ -74,7 +74,7 @@ static int power_check_battery(struct pmic *p, struct pmic *bat) if (pmic_probe(p)) { puts("Can't find max77693 fuel gauge\n"); - return -1; + return -ENODEV; } ret = pmic_reg_read(p, MAX77693_STATUS, &val); diff --git a/drivers/power/mfd/pmic_max77693.c b/drivers/power/mfd/pmic_max77693.c index 6b28e28b3f8..c63390ed48e 100644 --- a/drivers/power/mfd/pmic_max77693.c +++ b/drivers/power/mfd/pmic_max77693.c @@ -16,7 +16,7 @@ static int max77693_charger_state(struct pmic *p, int state, int current) unsigned int val; if (pmic_probe(p)) - return -1; + return -ENODEV; /* unlock write capability */ val = MAX77693_CHG_UNLOCK; @@ -27,13 +27,13 @@ static int max77693_charger_state(struct pmic *p, int state, int current) pmic_reg_read(p, MAX77693_CHG_CNFG_00, &val); val &= ~0x01; pmic_reg_write(p, MAX77693_CHG_CNFG_00, val); - return -1; + return -ENOTSUPP; } if (current < CHARGER_MIN_CURRENT || current > CHARGER_MAX_CURRENT) { printf("%s: Wrong charge current: %d [mA]\n", __func__, current); - return -1; + return -EINVAL; } /* set charging current */ @@ -59,7 +59,7 @@ static int max77693_charger_bat_present(struct pmic *p) unsigned int val; if (pmic_probe(p)) - return -1; + return -ENODEV; pmic_reg_read(p, MAX77693_CHG_INT_OK, &val); diff --git a/drivers/power/palmas.c b/drivers/power/palmas.c index 4f9a62cb34b..c813b21e6f1 100644 --- a/drivers/power/palmas.c +++ b/drivers/power/palmas.c @@ -47,20 +47,23 @@ int palmas_mmc1_poweron_ldo(uint voltage) u8 val = 0; #if defined(CONFIG_DRA7XX) + int ret; /* * Currently valid for the dra7xx_evm board: * Set TPS659038 LDO1 to 3.0 V */ val = LDO_VOLT_3V0; - if (palmas_i2c_write_u8(TPS65903X_CHIP_P1, LDO1_VOLTAGE, val)) { + ret = palmas_i2c_write_u8(TPS65903X_CHIP_P1, LDO1_VOLTAGE, val); + if (ret) { printf("tps65903x: could not set LDO1 voltage.\n"); - return 1; + return ret; } /* TURN ON LDO1 */ val = RSC_MODE_SLEEP | RSC_MODE_ACTIVE; - if (palmas_i2c_write_u8(TPS65903X_CHIP_P1, LDO1_CTRL, val)) { + ret = palmas_i2c_write_u8(TPS65903X_CHIP_P1, LDO1_CTRL, val); + if (ret) { printf("tps65903x: could not turn on LDO1.\n"); - return 1; + return ret; } return 0; #else diff --git a/drivers/power/pmic/pmic_hi6553.c b/drivers/power/pmic/pmic_hi6553.c index 0af798753e0..b2346b6b4d3 100644 --- a/drivers/power/pmic/pmic_hi6553.c +++ b/drivers/power/pmic/pmic_hi6553.c @@ -26,7 +26,7 @@ void hi6553_writeb(u32 offset, uint8_t value) int pmic_reg_write(struct pmic *p, u32 reg, u32 val) { if (check_reg(p, reg)) - return -1; + return -EINVAL; hi6553_writeb(reg, (uint8_t)val); @@ -36,7 +36,7 @@ int pmic_reg_write(struct pmic *p, u32 reg, u32 val) int pmic_reg_read(struct pmic *p, u32 reg, u32 *val) { if (check_reg(p, reg)) - return -1; + return -EINVAL; *val = (u32)hi6553_readb(reg); diff --git a/drivers/power/pmic/pmic_max77686.c b/drivers/power/pmic/pmic_max77686.c index 93c8d2b155d..8e653316d1b 100644 --- a/drivers/power/pmic/pmic_max77686.c +++ b/drivers/power/pmic/pmic_max77686.c @@ -67,14 +67,14 @@ int max77686_set_ldo_voltage(struct pmic *p, int ldo, ulong uV) if (ldo < 1 || ldo > 26) { printf("%s: %d is wrong ldo number\n", __func__, ldo); - return -1; + return -EINVAL; } adr = MAX77686_REG_PMIC_LDO1CTRL1 + ldo - 1; hex = max77686_ldo_volt2hex(ldo, uV); if (!hex) - return -1; + return -EINVAL; ret = pmic_reg_read(p, adr, &val); if (ret) @@ -120,7 +120,7 @@ int max77686_set_ldo_mode(struct pmic *p, int ldo, char opmode) if (ldo < 1 || 26 < ldo) { printf("%s: %d is wrong ldo number\n", __func__, ldo); - return -1; + return -EINVAL; } adr = MAX77686_REG_PMIC_LDO1CTRL1 + ldo - 1; @@ -161,7 +161,7 @@ int max77686_set_ldo_mode(struct pmic *p, int ldo, char opmode) if (mode == 0xff) { printf("%s: %d is not supported on LDO%d\n", __func__, opmode, ldo); - return -1; + return -ENOTSUPP; } ret = pmic_reg_read(p, adr, &val); @@ -182,7 +182,7 @@ int max77686_set_buck_mode(struct pmic *p, int buck, char opmode) size = ARRAY_SIZE(max77686_buck_addr); if (buck >= size) { printf("%s: %d is wrong buck number\n", __func__, buck); - return -1; + return -EINVAL; } adr = max77686_buck_addr[buck]; @@ -238,7 +238,7 @@ int max77686_set_buck_mode(struct pmic *p, int buck, char opmode) if (mode == 0xff) { printf("%s: %d is not supported on BUCK%d\n", __func__, opmode, buck); - return -1; + return -ENOTSUPP; } ret = pmic_reg_read(p, adr, &val); @@ -271,20 +271,20 @@ int pmic_init(unsigned char bus) if (node < 0) { debug("PMIC: No node for PMIC Chip in device tree\n"); debug("node = %d\n", node); - return -1; + return -ENODEV; } parent = fdt_parent_offset(blob, node); if (parent < 0) { debug("%s: Cannot find node parent\n", __func__); - return -1; + return -ENODEV; } /* tmp since p->bus is unsigned */ tmp = i2c_get_bus_num_fdt(parent); if (tmp < 0) { debug("%s: Cannot find I2C bus\n", __func__); - return -1; + return -ENODEV; } p->bus = tmp; p->hw.i2c.addr = fdtdec_get_int(blob, node, "reg", 9); diff --git a/drivers/power/pmic/pmic_max8997.c b/drivers/power/pmic/pmic_max8997.c index a36a9a08bf4..32afb3f7d0a 100644 --- a/drivers/power/pmic/pmic_max8997.c +++ b/drivers/power/pmic/pmic_max8997.c @@ -33,7 +33,7 @@ static int pmic_charger_state(struct pmic *p, int state, int current) u32 val = 0; if (pmic_probe(p)) - return -1; + return -ENODEV; if (state == PMIC_CHARGER_DISABLE) { puts("Disable the charger.\n"); @@ -41,13 +41,13 @@ static int pmic_charger_state(struct pmic *p, int state, int current) val &= ~(MBCHOSTEN | VCHGR_FC); pmic_reg_write(p, MAX8997_REG_MBCCTRL2, val); - return -1; + return -ENOTSUPP; } if (current < CHARGER_MIN_CURRENT || current > CHARGER_MAX_CURRENT) { printf("%s: Wrong charge current: %d [mA]\n", __func__, current); - return -1; + return -EINVAL; } fc = (current - CHARGER_MIN_CURRENT) / CHARGER_CURRENT_RESOLUTION; @@ -71,7 +71,7 @@ static int pmic_charger_bat_present(struct pmic *p) u32 val; if (pmic_probe(p)) - return -1; + return -ENODEV; pmic_reg_read(p, MAX8997_REG_STATUS4, &val); diff --git a/drivers/power/power_core.c b/drivers/power/power_core.c index fe1f3160218..b72286d4296 100644 --- a/drivers/power/power_core.c +++ b/drivers/power/power_core.c @@ -23,7 +23,7 @@ int check_reg(struct pmic *p, u32 reg) if (reg >= p->number_of_regs) { printf("<reg num> = %d is invalid. Should be less than %d\n", reg, p->number_of_regs); - return -1; + return -EINVAL; } return 0; @@ -34,7 +34,7 @@ int pmic_set_output(struct pmic *p, u32 reg, int out, int on) u32 val; if (pmic_reg_read(p, reg, &val)) - return -1; + return -ENOTSUPP; if (on) val |= out; @@ -42,7 +42,7 @@ int pmic_set_output(struct pmic *p, u32 reg, int out, int on) val &= ~out; if (pmic_reg_write(p, reg, val)) - return -1; + return -ENOTSUPP; return 0; } @@ -59,7 +59,7 @@ static int pmic_dump(struct pmic *p) if (!p) { puts("Wrong PMIC name!\n"); - return -1; + return -ENODEV; } pmic_show_info(p); diff --git a/drivers/power/power_i2c.c b/drivers/power/power_i2c.c index 0dcf9fe9187..dd22ece53cd 100644 --- a/drivers/power/power_i2c.c +++ b/drivers/power/power_i2c.c @@ -19,9 +19,10 @@ int pmic_reg_write(struct pmic *p, u32 reg, u32 val) { unsigned char buf[4] = { 0 }; + int ret; if (check_reg(p, reg)) - return -1; + return -EINVAL; I2C_SET_BUS(p->bus); @@ -51,27 +52,26 @@ int pmic_reg_write(struct pmic *p, u32 reg, u32 val) break; default: printf("%s: invalid tx_num: %d", __func__, pmic_i2c_tx_num); - return -1; + return -EINVAL; } - if (i2c_write(pmic_i2c_addr, reg, 1, buf, pmic_i2c_tx_num)) - return -1; - - return 0; + return i2c_write(pmic_i2c_addr, reg, 1, buf, pmic_i2c_tx_num); } int pmic_reg_read(struct pmic *p, u32 reg, u32 *val) { unsigned char buf[4] = { 0 }; u32 ret_val = 0; + int ret; if (check_reg(p, reg)) - return -1; + return -EINVAL; I2C_SET_BUS(p->bus); - if (i2c_read(pmic_i2c_addr, reg, 1, buf, pmic_i2c_tx_num)) - return -1; + ret = i2c_read(pmic_i2c_addr, reg, 1, buf, pmic_i2c_tx_num); + if (ret) + return ret; switch (pmic_i2c_tx_num) { case 3: @@ -93,7 +93,7 @@ int pmic_reg_read(struct pmic *p, u32 reg, u32 *val) break; default: printf("%s: invalid tx_num: %d", __func__, pmic_i2c_tx_num); - return -1; + return -EINVAL; } memcpy(val, &ret_val, sizeof(ret_val)); @@ -106,7 +106,7 @@ int pmic_probe(struct pmic *p) debug("Bus: %d PMIC:%s probed!\n", p->bus, p->name); if (i2c_probe(pmic_i2c_addr)) { printf("Can't find PMIC:%s\n", p->name); - return -1; + return -ENODEV; } return 0; diff --git a/drivers/power/power_spi.c b/drivers/power/power_spi.c index 1e554461f30..ef8531df0ff 100644 --- a/drivers/power/power_spi.c +++ b/drivers/power/power_spi.c @@ -27,14 +27,14 @@ static u32 pmic_reg(struct pmic *p, u32 reg, u32 *val, u32 write) p->hw.spi.mode); if (!slave) - return -1; + return -ENODEV; } if (check_reg(p, reg)) - return -1; + return -EINVAL; if (spi_claim_bus(slave)) - return -1; + return -EBUSY; pmic_tx = p->hw.spi.prepare_tx(reg, val, write); @@ -59,21 +59,15 @@ static u32 pmic_reg(struct pmic *p, u32 reg, u32 *val, u32 write) err: spi_release_bus(slave); - return -1; + return -ENOTSUPP; } int pmic_reg_write(struct pmic *p, u32 reg, u32 val) { - if (pmic_reg(p, reg, &val, 1)) - return -1; - - return 0; + return pmic_reg(p, reg, &val, 1); } int pmic_reg_read(struct pmic *p, u32 reg, u32 *val) { - if (pmic_reg(p, reg, val, 0)) - return -1; - - return 0; + return pmic_reg(p, reg, val, 0); } diff --git a/drivers/power/tps6586x.c b/drivers/power/tps6586x.c index 865098386d9..f50c4d17eec 100644 --- a/drivers/power/tps6586x.c +++ b/drivers/power/tps6586x.c @@ -97,14 +97,14 @@ static int read_voltages(int *sm0, int *sm1) ctrl1 = tps6586x_read(SUPPLY_CONTROL1); ctrl2 = tps6586x_read(SUPPLY_CONTROL2); if (ctrl1 == -1 || ctrl2 == -1) - return -1; + return -ENOTSUPP; /* Figure out whether V1 or V2 is selected */ is_v2 = (ctrl1 | ctrl2) & CTRL_SM0_SUPPLY2; *sm0 = tps6586x_read(is_v2 ? SM0_VOLTAGE_V2 : SM0_VOLTAGE_V1); *sm1 = tps6586x_read(is_v2 ? SM1_VOLTAGE_V2 : SM1_VOLTAGE_V1); if (*sm0 == -1 || *sm1 == -1) - return -1; + return -ENOTSUPP; return 0; } @@ -129,7 +129,7 @@ static int set_voltage(int reg, int data, int rate) /* write v1, v2 and rate, then trigger */ if (tps6586x_write(reg, buff, 3) || tps6586x_write(SUPPLY_CONTROL1, &control_bit, 1)) - return -1; + return -ENOTSUPP; return 0; } @@ -177,7 +177,7 @@ int tps6586x_adjust_sm0_sm1(int sm0_target, int sm1_target, int step, int rate, /* get current voltage settings */ if (read_voltages(&sm0, &sm1)) { debug("%s: Cannot read voltage settings\n", __func__); - return -1; + return -EINVAL; } /* @@ -189,7 +189,7 @@ int tps6586x_adjust_sm0_sm1(int sm0_target, int sm1_target, int step, int rate, if (min_sm0_over_sm1 != -1 && sm0 < sm1 + min_sm0_over_sm1) { debug("%s: SM0 is %d, SM1 is %d, but min_sm0_over_sm1 is %d\n", __func__, sm0, sm1, min_sm0_over_sm1); - return -1; + return -EINVAL; } /* @@ -240,7 +240,7 @@ int tps6586x_adjust_sm0_sm1(int sm0_target, int sm1_target, int step, int rate, } debug("%d-%d %d-%d done\n", sm0, sm0_target, sm1, sm1_target); - return bad ? -1 : 0; + return bad ? -EINVAL : 0; } int tps6586x_init(struct udevice *dev) diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index 40839d89e97..261ed128acd 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig @@ -112,6 +112,10 @@ config G_DNL_VENDOR_NUM config G_DNL_PRODUCT_NUM hex "Product ID of USB device" +config USBNET_DEVADDR + string "USB Gadget Ethernet device mac address" + default "de:ad:be:ef:00:01" + endif # USB_GADGET_DOWNLOAD endif # USB_GADGET diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c index 289e5f15837..f1b07098219 100644 --- a/drivers/usb/gadget/ether.c +++ b/drivers/usb/gadget/ether.c @@ -25,6 +25,7 @@ #include "rndis.h" #include <dm.h> +#include <dm/lists.h> #include <dm/uclass-internal.h> #include <dm/device-internal.h> @@ -115,7 +116,11 @@ struct eth_dev { struct usb_request *tx_req, *rx_req; +#ifndef CONFIG_DM_ETH struct eth_device *net; +#else + struct udevice *net; +#endif struct net_device_stats stats; unsigned int tx_qlen; @@ -142,7 +147,11 @@ struct eth_dev { /*-------------------------------------------------------------------------*/ struct ether_priv { struct eth_dev ethdev; +#ifndef CONFIG_DM_ETH struct eth_device netdev; +#else + struct udevice *netdev; +#endif struct usb_gadget_driver eth_driver; }; @@ -1850,7 +1859,11 @@ static void rndis_control_ack_complete(struct usb_ep *ep, static char rndis_resp_buf[8] __attribute__((aligned(sizeof(__le32)))); +#ifndef CONFIG_DM_ETH static int rndis_control_ack(struct eth_device *net) +#else +static int rndis_control_ack(struct udevice *net) +#endif { struct ether_priv *priv = (struct ether_priv *)net->priv; struct eth_dev *dev = &priv->ethdev; @@ -2000,6 +2013,9 @@ static int eth_bind(struct usb_gadget *gadget) int status = -ENOMEM; int gcnum; u8 tmp[7]; +#ifdef CONFIG_DM_ETH + struct eth_pdata *pdata = dev_get_platdata(l_priv->netdev); +#endif /* these flags are only ever cleared; compiler take note */ #ifndef CONFIG_USB_ETH_CDC @@ -2187,7 +2203,11 @@ autoconf_fail: /* network device setup */ +#ifndef CONFIG_DM_ETH dev->net = &l_priv->netdev; +#else + dev->net = l_priv->netdev; +#endif dev->cdc = cdc; dev->zlp = zlp; @@ -2196,6 +2216,7 @@ autoconf_fail: dev->out_ep = out_ep; dev->status_ep = status_ep; + memset(tmp, 0, sizeof(tmp)); /* * Module params for these addresses should come from ID proms. * The host side address is used with CDC and RNDIS, and commonly @@ -2203,10 +2224,13 @@ autoconf_fail: * host side code for the SAFE thing cares -- its original BLAN * thing didn't, Sharp never assigned those addresses on Zaurii. */ +#ifndef CONFIG_DM_ETH get_ether_addr(dev_addr, dev->net->enetaddr); - - memset(tmp, 0, sizeof(tmp)); memcpy(tmp, dev->net->enetaddr, sizeof(dev->net->enetaddr)); +#else + get_ether_addr(dev_addr, pdata->enetaddr); + memcpy(tmp, pdata->enetaddr, sizeof(pdata->enetaddr)); +#endif get_ether_addr(host_addr, dev->host_mac); @@ -2267,10 +2291,11 @@ autoconf_fail: status_ep ? " STATUS " : "", status_ep ? status_ep->name : "" ); - printf("MAC %02x:%02x:%02x:%02x:%02x:%02x\n", - dev->net->enetaddr[0], dev->net->enetaddr[1], - dev->net->enetaddr[2], dev->net->enetaddr[3], - dev->net->enetaddr[4], dev->net->enetaddr[5]); +#ifndef CONFIG_DM_ETH + printf("MAC %pM\n", dev->net->enetaddr); +#else + printf("MAC %pM\n", pdata->enetaddr); +#endif if (cdc || rndis) printf("HOST MAC %02x:%02x:%02x:%02x:%02x:%02x\n", @@ -2519,13 +2544,12 @@ void _usb_eth_halt(struct ether_priv *priv) } usb_gadget_unregister_driver(&priv->eth_driver); -#ifdef CONFIG_DM_USB - device_remove(dev->usb_udev); -#else +#ifndef CONFIG_DM_USB board_usb_cleanup(0, USB_INIT_DEVICE); #endif } +#ifndef CONFIG_DM_ETH static int usb_eth_init(struct eth_device *netdev, bd_t *bd) { struct ether_priv *priv = (struct ether_priv *)netdev->priv; @@ -2592,3 +2616,114 @@ int usb_eth_initialize(bd_t *bi) eth_register(netdev); return 0; } +#else +static int usb_eth_start(struct udevice *dev) +{ + struct ether_priv *priv = dev_get_priv(dev); + + return _usb_eth_init(priv); +} + +static int usb_eth_send(struct udevice *dev, void *packet, int length) +{ + struct ether_priv *priv = dev_get_priv(dev); + + return _usb_eth_send(priv, packet, length); +} + +static int usb_eth_recv(struct udevice *dev, int flags, uchar **packetp) +{ + struct ether_priv *priv = dev_get_priv(dev); + struct eth_dev *ethdev = &priv->ethdev; + int ret; + + ret = _usb_eth_recv(priv); + if (ret) { + error("error packet receive\n"); + return ret; + } + + if (packet_received) { + if (ethdev->rx_req) { + *packetp = (uchar *)net_rx_packets[0]; + return ethdev->rx_req->length; + } else { + error("dev->rx_req invalid"); + return -EFAULT; + } + } + + return -EAGAIN; +} + +static int usb_eth_free_pkt(struct udevice *dev, uchar *packet, + int length) +{ + struct ether_priv *priv = dev_get_priv(dev); + struct eth_dev *ethdev = &priv->ethdev; + + packet_received = 0; + + return rx_submit(ethdev, ethdev->rx_req, 0); +} + +static void usb_eth_stop(struct udevice *dev) +{ + struct ether_priv *priv = dev_get_priv(dev); + + _usb_eth_halt(priv); +} + +static int usb_eth_probe(struct udevice *dev) +{ + struct ether_priv *priv = dev_get_priv(dev); + struct eth_pdata *pdata = dev_get_platdata(dev); + + priv->netdev = dev; + l_priv = priv; + + get_ether_addr(CONFIG_USBNET_DEVADDR, pdata->enetaddr); + eth_setenv_enetaddr("usbnet_devaddr", pdata->enetaddr); + + return 0; +} + +static const struct eth_ops usb_eth_ops = { + .start = usb_eth_start, + .send = usb_eth_send, + .recv = usb_eth_recv, + .free_pkt = usb_eth_free_pkt, + .stop = usb_eth_stop, +}; + +int usb_ether_init(void) +{ + struct udevice *dev; + struct udevice *usb_dev; + int ret; + + ret = uclass_first_device(UCLASS_USB_DEV_GENERIC, &usb_dev); + if (!usb_dev || ret) { + error("No USB device found\n"); + return ret; + } + + ret = device_bind_driver(usb_dev, "usb_ether", "usb_ether", &dev); + if (!dev || ret) { + error("usb - not able to bind usb_ether device\n"); + return ret; + } + + return 0; +} + +U_BOOT_DRIVER(eth_usb) = { + .name = "usb_ether", + .id = UCLASS_ETH, + .probe = usb_eth_probe, + .ops = &usb_eth_ops, + .priv_auto_alloc_size = sizeof(struct ether_priv), + .platdata_auto_alloc_size = sizeof(struct eth_pdata), + .flags = DM_FLAG_ALLOC_PRIV_DMA, +}; +#endif /* CONFIG_DM_ETH */ diff --git a/drivers/usb/gadget/rndis.c b/drivers/usb/gadget/rndis.c index 844a0c72365..5ad481302b4 100644 --- a/drivers/usb/gadget/rndis.c +++ b/drivers/usb/gadget/rndis.c @@ -1121,7 +1121,11 @@ int rndis_msg_parser(u8 configNr, u8 *buf) return -ENOTSUPP; } +#ifndef CONFIG_DM_ETH int rndis_register(int (*rndis_control_ack)(struct eth_device *)) +#else +int rndis_register(int (*rndis_control_ack)(struct udevice *)) +#endif { u8 i; @@ -1149,8 +1153,13 @@ void rndis_deregister(int configNr) return; } -int rndis_set_param_dev(u8 configNr, struct eth_device *dev, int mtu, - struct net_device_stats *stats, u16 *cdc_filter) +#ifndef CONFIG_DM_ETH +int rndis_set_param_dev(u8 configNr, struct eth_device *dev, int mtu, + struct net_device_stats *stats, u16 *cdc_filter) +#else +int rndis_set_param_dev(u8 configNr, struct udevice *dev, int mtu, + struct net_device_stats *stats, u16 *cdc_filter) +#endif { debug("%s: configNr = %d\n", __func__, configNr); if (!dev || !stats) diff --git a/drivers/usb/gadget/rndis.h b/drivers/usb/gadget/rndis.h index 7a389a580ab..084af8541ce 100644 --- a/drivers/usb/gadget/rndis.h +++ b/drivers/usb/gadget/rndis.h @@ -222,23 +222,34 @@ typedef struct rndis_params { const u8 *host_mac; u16 *filter; - struct eth_device *dev; struct net_device_stats *stats; int mtu; u32 vendorID; const char *vendorDescr; - int (*ack)(struct eth_device *); +#ifndef CONFIG_DM_ETH + struct eth_device *dev; + int (*ack)(struct eth_device *); +#else + struct udevice *dev; + int (*ack)(struct udevice *); +#endif struct list_head resp_queue; } rndis_params; /* RNDIS Message parser and other useless functions */ int rndis_msg_parser(u8 configNr, u8 *buf); enum rndis_state rndis_get_state(int configNr); -int rndis_register(int (*rndis_control_ack)(struct eth_device *)); void rndis_deregister(int configNr); +#ifndef CONFIG_DM_ETH +int rndis_register(int (*rndis_control_ack)(struct eth_device *)); int rndis_set_param_dev(u8 configNr, struct eth_device *dev, int mtu, - struct net_device_stats *stats, u16 *cdc_filter); + struct net_device_stats *stats, u16 *cdc_filter); +#else +int rndis_register(int (*rndis_control_ack)(struct udevice *)); +int rndis_set_param_dev(u8 configNr, struct udevice *dev, int mtu, + struct net_device_stats *stats, u16 *cdc_filter); +#endif int rndis_set_param_vendor(u8 configNr, u32 vendorID, const char *vendorDescr); int rndis_set_param_medium(u8 configNr, u32 medium, u32 speed); diff --git a/include/common.h b/include/common.h index a8d833b9891..ee0436bff55 100644 --- a/include/common.h +++ b/include/common.h @@ -15,6 +15,9 @@ typedef volatile unsigned long vu_long; typedef volatile unsigned short vu_short; typedef volatile unsigned char vu_char; +/* Allow sharing constants with type modifiers between C and assembly. */ +#define _AC(X, Y) (X##Y) + #include <config.h> #include <errno.h> #include <asm-offsets.h> @@ -936,7 +939,12 @@ int cpu_disable(int nr); int cpu_release(int nr, int argc, char * const argv[]); #endif -#endif /* __ASSEMBLY__ */ +#else /* __ASSEMBLY__ */ + +/* Drop a C type modifier (like in 3UL) for constants used in assembly. */ +#define _AC(X, Y) X + +#endif /* __ASSEMBLY__ */ #ifdef CONFIG_PPC /* @@ -948,6 +956,9 @@ int cpu_release(int nr, int argc, char * const argv[]); /* Put only stuff here that the assembler can digest */ +/* Declare an unsigned long constant digestable both by C and an assembler. */ +#define UL(x) _AC(x, UL) + #ifdef CONFIG_POST #define CONFIG_HAS_POST #ifndef CONFIG_POST_ALT_LIST diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 49c14df8add..e78afde972a 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -281,12 +281,9 @@ #endif #ifdef CONFIG_USB_MUSB_GADGET -/* Removing USB gadget and can be enabled adter adding support usb DM */ -#ifndef CONFIG_DM_ETH #define CONFIG_USB_ETHER #define CONFIG_USB_ETH_RNDIS #define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00" -#endif /* CONFIG_DM_ETH */ #endif /* CONFIG_USB_MUSB_GADGET */ /* diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h index ad0de2c817d..31b3925b25d 100644 --- a/include/configs/am3517_crane.h +++ b/include/configs/am3517_crane.h @@ -76,7 +76,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 115200} #define CONFIG_GENERIC_MMC 1 -#define CONFIG_OMAP_HSMMC 1 #define CONFIG_DOS_PARTITION 1 /* diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 3247a4af9d5..c0d3617acac 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -78,7 +78,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC #define CONFIG_DOS_PARTITION /* diff --git a/include/configs/apalis_t30.h b/include/configs/apalis_t30.h index 12a287742cd..1c76de06f9c 100644 --- a/include/configs/apalis_t30.h +++ b/include/configs/apalis_t30.h @@ -29,7 +29,6 @@ /* SD/MMC support */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, before config block at the end of 1st "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/apf27.h b/include/configs/apf27.h index e9d8232814f..314ac898ea1 100644 --- a/include/configs/apf27.h +++ b/include/configs/apf27.h @@ -309,7 +309,6 @@ */ #ifdef CONFIG_CMD_MMC #define CONFIG_GENERIC_MMC -#define CONFIG_MXC_MMC #define CONFIG_MXC_MCI_REGS_BASE 0x10014000 #endif diff --git a/include/configs/axs10x.h b/include/configs/axs10x.h index 296fbd12646..2dd9d312950 100644 --- a/include/configs/axs10x.h +++ b/include/configs/axs10x.h @@ -86,7 +86,6 @@ * SD/MMC configuration */ #define CONFIG_GENERIC_MMC -#define CONFIG_DWMMC #define CONFIG_DOS_PARTITION /* diff --git a/include/configs/beaver.h b/include/configs/beaver.h index 2e43a097b5c..528ed6f6bbd 100644 --- a/include/configs/beaver.h +++ b/include/configs/beaver.h @@ -29,7 +29,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h index eb2419c3157..13d5ca188fe 100644 --- a/include/configs/brppt1.h +++ b/include/configs/brppt1.h @@ -49,7 +49,6 @@ /* MMC/SD IP block */ #if defined(CONFIG_EMMC_BOOT) #define CONFIG_GENERIC_MMC - #define CONFIG_OMAP_HSMMC #define CONFIG_SUPPORT_EMMC_BOOT #endif /* CONFIG_EMMC_BOOT */ diff --git a/include/configs/brxre1.h b/include/configs/brxre1.h index ac338c465ed..80564261d9c 100644 --- a/include/configs/brxre1.h +++ b/include/configs/brxre1.h @@ -44,7 +44,6 @@ /* MMC/SD IP block */ #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC #define CONFIG_SUPPORT_EMMC_BOOT /* Always 64 KiB env size */ diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h index b7df2bce4c8..7e3966f4780 100644 --- a/include/configs/cardhu.h +++ b/include/configs/cardhu.h @@ -32,7 +32,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/cei-tk1-som.h b/include/configs/cei-tk1-som.h index 6eed4bc5625..9439863bfed 100644 --- a/include/configs/cei-tk1-som.h +++ b/include/configs/cei-tk1-som.h @@ -31,7 +31,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index 1ce27e32ba3..0c72443faff 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -81,7 +81,6 @@ 115200} #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC #define CONFIG_DOS_PARTITION /* USB */ diff --git a/include/configs/cm_t3517.h b/include/configs/cm_t3517.h index bae9697ca7d..874a88997d7 100644 --- a/include/configs/cm_t3517.h +++ b/include/configs/cm_t3517.h @@ -88,7 +88,6 @@ #define CONFIG_OMAP_GPIO #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC #define CONFIG_DOS_PARTITION /* USB */ diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index e9db97f1adc..e7263964a8a 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -28,7 +28,6 @@ /* SD/MMC support */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* USB host support */ #define CONFIG_USB_EHCI diff --git a/include/configs/colibri_t30.h b/include/configs/colibri_t30.h index 4d138564391..d78eb67d0f3 100644 --- a/include/configs/colibri_t30.h +++ b/include/configs/colibri_t30.h @@ -29,7 +29,6 @@ /* SD/MMC support */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, before config block at the end of 1st "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index ceb9ceab5aa..0ad6e4c1633 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -313,9 +313,7 @@ /* SD/MMC configuration */ #ifndef CONFIG_USE_NOR -#define CONFIG_DAVINCI_MMC_SD1 #define CONFIG_GENERIC_MMC -#define CONFIG_DAVINCI_MMC #endif /* diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h index 04ab48da685..a0f04f9ce33 100644 --- a/include/configs/dalmore.h +++ b/include/configs/dalmore.h @@ -25,7 +25,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/e2220-1170.h b/include/configs/e2220-1170.h index d4aca55b3cd..064906d6d35 100644 --- a/include/configs/e2220-1170.h +++ b/include/configs/e2220-1170.h @@ -23,7 +23,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h index 9328a222fe8..cdbe154839d 100644 --- a/include/configs/exynos-common.h +++ b/include/configs/exynos-common.h @@ -39,8 +39,6 @@ /* SD/MMC configuration */ #define CONFIG_GENERIC_MMC -#define CONFIG_DWMMC -#define CONFIG_EXYNOS_DWMMC #define CONFIG_BOUNCE_BUFFER /* PWM */ diff --git a/include/configs/harmony.h b/include/configs/harmony.h index cf3c4938d68..e9781ccf5f3 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -28,7 +28,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* NAND support */ #define CONFIG_CMD_NAND diff --git a/include/configs/hikey.h b/include/configs/hikey.h index c7258336758..4048bce77cc 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -72,8 +72,6 @@ /* SD/MMC configuration */ #define CONFIG_GENERIC_MMC -#define CONFIG_DWMMC -#define CONFIG_HIKEY_DWMMC #define CONFIG_BOUNCE_BUFFER #define CONFIG_FS_EXT4 diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h index 30168bccfd2..0936344c601 100644 --- a/include/configs/imx27lite-common.h +++ b/include/configs/imx27lite-common.h @@ -138,7 +138,6 @@ * SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_MXC_MMC #define CONFIG_DOS_PARTITION /* diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index c1fa2c65079..febedca5f22 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -27,7 +27,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h index fb8fbe4be44..81da8ff9e63 100644 --- a/include/configs/k2g_evm.h +++ b/include/configs/k2g_evm.h @@ -62,7 +62,6 @@ /* MMC/SD */ #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC #undef CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_IS_IN_FAT diff --git a/include/configs/kc1.h b/include/configs/kc1.h index 7a4ba09fc6c..c0562fd480d 100644 --- a/include/configs/kc1.h +++ b/include/configs/kc1.h @@ -89,7 +89,6 @@ */ #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC /* * Power diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index 3b118bb7236..402dab2915d 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -215,9 +215,7 @@ #define CONFIG_ENV_SIZE (16 << 10) /* SD/MMC configuration */ -#define CONFIG_DAVINCI_MMC_SD1 #define CONFIG_GENERIC_MMC -#define CONFIG_DAVINCI_MMC /* * Enable MMC commands only when diff --git a/include/configs/mcx.h b/include/configs/mcx.h index f15abd3ac9a..fd8cf1d5060 100644 --- a/include/configs/mcx.h +++ b/include/configs/mcx.h @@ -81,7 +81,6 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 115200} -#define CONFIG_OMAP_HSMMC #define CONFIG_GENERIC_MMC #define CONFIG_DOS_PARTITION diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h index d42976b7094..1e94dac3798 100644 --- a/include/configs/medcom-wide.h +++ b/include/configs/medcom-wide.h @@ -21,7 +21,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* NAND support */ #define CONFIG_CMD_NAND diff --git a/include/configs/mxs.h b/include/configs/mxs.h index 04c3ce9d6e7..b26bc01977f 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -150,7 +150,6 @@ #ifdef CONFIG_CMD_MMC #define CONFIG_GENERIC_MMC #define CONFIG_BOUNCE_BUFFER -#define CONFIG_MXS_MMC #endif /* NAND */ diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index 99ce60f7310..d2b8e39d559 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -94,7 +94,6 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 } #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC #define CONFIG_DOS_PARTITION /* USB */ diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h index ae490543895..be0889d443a 100644 --- a/include/configs/nyan-big.h +++ b/include/configs/nyan-big.h @@ -26,7 +26,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index 1a67584b9fe..05594627ae1 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -48,7 +48,6 @@ /* MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC /* SPL */ #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index cdc93c38c8b..4418b9bcdfd 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -329,7 +329,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_DAVINCI_MMC #ifdef CONFIG_MMC #define CONFIG_DOS_PARTITION diff --git a/include/configs/p2371-0000.h b/include/configs/p2371-0000.h index cd981b9926d..a1a518e18c8 100644 --- a/include/configs/p2371-0000.h +++ b/include/configs/p2371-0000.h @@ -23,7 +23,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/p2371-2180.h b/include/configs/p2371-2180.h index 7ff545c5a2e..b80d8dbe0ad 100644 --- a/include/configs/p2371-2180.h +++ b/include/configs/p2371-2180.h @@ -23,7 +23,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/p2571.h b/include/configs/p2571.h index 7daaf8e3159..ef1ae3f8065 100644 --- a/include/configs/p2571.h +++ b/include/configs/p2571.h @@ -24,7 +24,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/p2771-0000.h b/include/configs/p2771-0000.h index 0864e4dabcf..e1e3d72da0f 100644 --- a/include/configs/p2771-0000.h +++ b/include/configs/p2771-0000.h @@ -19,7 +19,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/paz00.h b/include/configs/paz00.h index 0cefee398e0..13d5aa916f1 100644 --- a/include/configs/paz00.h +++ b/include/configs/paz00.h @@ -24,7 +24,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/plutux.h b/include/configs/plutux.h index 8ad5af18993..889ef406701 100644 --- a/include/configs/plutux.h +++ b/include/configs/plutux.h @@ -21,7 +21,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* NAND support */ #define CONFIG_CMD_NAND diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index 27dfbcef668..1fd33a067a3 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -38,7 +38,6 @@ /* MMC/SD IP block */ #define CONFIG_GENERIC_MMC -#define CONFIG_DWMMC #define CONFIG_BOUNCE_BUFFER #define CONFIG_FAT_WRITE diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 535797a72dd..a9995ee1900 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -41,7 +41,6 @@ /* MMC/SD IP block */ #define CONFIG_GENERIC_MMC -#define CONFIG_DWMMC #define CONFIG_BOUNCE_BUFFER #define CONFIG_FAT_WRITE diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index eab3f045ac2..db0657b19dd 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -28,7 +28,6 @@ /* MMC/SD IP block */ #define CONFIG_GENERIC_MMC -#define CONFIG_DWMMC #define CONFIG_BOUNCE_BUFFER #define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ 200000000 diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index 3ee655562c9..388010cb5c2 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -33,7 +33,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index e4d0ad9309c..e93ce93c591 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -78,7 +78,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */ #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC #define CONFIG_DOS_PARTITION #define CONFIG_SPI diff --git a/include/configs/sniper.h b/include/configs/sniper.h index 0a3d24236f0..4d057861691 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -96,7 +96,6 @@ */ #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC /* * Power diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 31f13381873..7de9d861f03 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -144,9 +144,6 @@ #ifdef CONFIG_CMD_MMC #define CONFIG_BOUNCE_BUFFER #define CONFIG_GENERIC_MMC -#define CONFIG_DWMMC -#define CONFIG_SOCFPGA_DWMMC -#define CONFIG_SOCFPGA_DWMMC_FIFO_DEPTH 1024 /* FIXME */ /* using smaller max blk cnt to avoid flooding the limited stack we have */ #define CONFIG_SYS_MMC_MAX_BLK_COUNT 256 /* FIXME -- SPL only? */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index b0bfc0dfd7d..d58e5bacae5 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -35,7 +35,7 @@ /* * High Level Configuration Options */ -#ifdef CONFIG_SPL_BUILD +#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_ARM64) #define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */ #endif @@ -141,7 +141,6 @@ /* mmc config */ #ifdef CONFIG_MMC #define CONFIG_GENERIC_MMC -#define CONFIG_MMC_SUNXI #define CONFIG_MMC_SUNXI_SLOT 0 #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ @@ -183,7 +182,9 @@ #define CONFIG_SPL_FRAMEWORK +#ifndef CONFIG_ARM64 /* AArch64 FEL support is not ready yet */ #define CONFIG_SPL_BOARD_LOAD_IMAGE +#endif #if defined(CONFIG_MACH_SUN9I) #define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */ diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h index 44201a2546d..5ddc848e493 100644 --- a/include/configs/tam3517-common.h +++ b/include/configs/tam3517-common.h @@ -73,7 +73,6 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 115200} -#define CONFIG_OMAP_HSMMC #define CONFIG_GENERIC_MMC #define CONFIG_DOS_PARTITION diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h index 03fc42c877f..42d3060ec31 100644 --- a/include/configs/tao3530.h +++ b/include/configs/tao3530.h @@ -71,7 +71,6 @@ #define CONFIG_ENV_OVERWRITE #define CONFIG_BAUDRATE 115200 #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC #define CONFIG_DOS_PARTITION /* GPIO banks */ diff --git a/include/configs/tec-ng.h b/include/configs/tec-ng.h index 067e1718db7..dbc9fc023eb 100644 --- a/include/configs/tec-ng.h +++ b/include/configs/tec-ng.h @@ -22,7 +22,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/tec.h b/include/configs/tec.h index c03dabf9db7..278668c2c73 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -21,7 +21,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* NAND support */ #define CONFIG_CMD_NAND diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 5144d5aacee..45600190a46 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -118,9 +118,6 @@ #ifdef CONFIG_GENERIC_MMC #undef CONFIG_GENERIC_MMC #endif -#ifdef CONFIG_TEGRA_MMC -#undef CONFIG_TEGRA_MMC -#endif #ifdef CONFIG_CMD_MMC #endif diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index 86ab1e0f4aa..a43b9776c46 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -114,7 +114,6 @@ #define CONFIG_OMAP_GPIO #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC #define CONFIG_DOS_PARTITION /** diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index d909f25fa83..9c8eabff4dd 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -53,7 +53,6 @@ #define CONFIG_CMD_ASKEN #define CONFIG_OMAP_GPIO #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC #define CONFIG_DOS_PARTITION #define CONFIG_FS_FAT diff --git a/include/configs/ti_armv7_omap.h b/include/configs/ti_armv7_omap.h index 6d9d4b2d97a..de14b8575ad 100644 --- a/include/configs/ti_armv7_omap.h +++ b/include/configs/ti_armv7_omap.h @@ -20,9 +20,6 @@ #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 #define CONFIG_SYS_I2C_OMAP24XX -/* MMC/SD IP block */ -#define CONFIG_OMAP_HSMMC - /* SPI IP Block */ #define CONFIG_OMAP3_SPI diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h index 1c36d0751c4..5e9da85acfd 100644 --- a/include/configs/tricorder.h +++ b/include/configs/tricorder.h @@ -89,7 +89,6 @@ /* MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC #define CONFIG_DOS_PARTITION /* I2C */ diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h index ff006143d66..874351d9f9f 100644 --- a/include/configs/trimslice.h +++ b/include/configs/trimslice.h @@ -29,7 +29,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in SPI */ #define CONFIG_ENV_IS_IN_SPI_FLASH diff --git a/include/configs/venice2.h b/include/configs/venice2.h index 7c7b20031cd..ec12133a30a 100644 --- a/include/configs/venice2.h +++ b/include/configs/venice2.h @@ -24,7 +24,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/ventana.h b/include/configs/ventana.h index f5459a89490..1150adfe7d9 100644 --- a/include/configs/ventana.h +++ b/include/configs/ventana.h @@ -22,7 +22,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_ENV_IS_IN_MMC diff --git a/include/configs/whistler.h b/include/configs/whistler.h index ffd9a2c2421..19b57fd2235 100644 --- a/include/configs/whistler.h +++ b/include/configs/whistler.h @@ -26,7 +26,6 @@ /* SD/MMC */ #define CONFIG_GENERIC_MMC -#define CONFIG_TEGRA_MMC /* * Environment in eMMC, at the end of 2nd "boot sector". Note: This assumes diff --git a/include/mmc.h b/include/mmc.h index 1720955a4c9..fad12d608ce 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -376,7 +376,7 @@ int mmc_getwp(struct mmc *mmc); struct mmc_ops { int (*send_cmd)(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data); - void (*set_ios)(struct mmc *mmc); + int (*set_ios)(struct mmc *mmc); int (*init)(struct mmc *mmc); int (*getcd)(struct mmc *mmc); int (*getwp)(struct mmc *mmc); diff --git a/include/net.h b/include/net.h index 06320c6514c..1f4d9473500 100644 --- a/include/net.h +++ b/include/net.h @@ -255,6 +255,13 @@ int eth_setenv_enetaddr_by_index(const char *base_name, int index, /* + * Initialize USB ethernet device with CONFIG_DM_ETH + * Returns: + * 0 is success, non-zero is error status. + */ +int usb_ether_init(void); + +/* * Get the hardware address for an ethernet interface . * Args: * base_name - base name for device (normally "eth") diff --git a/include/sdhci.h b/include/sdhci.h index 144570f2be9..7544b494b16 100644 --- a/include/sdhci.h +++ b/include/sdhci.h @@ -28,11 +28,11 @@ #define SDHCI_ARGUMENT 0x08 #define SDHCI_TRANSFER_MODE 0x0C -#define SDHCI_TRNS_DMA 0x01 -#define SDHCI_TRNS_BLK_CNT_EN 0x02 -#define SDHCI_TRNS_ACMD12 0x04 -#define SDHCI_TRNS_READ 0x10 -#define SDHCI_TRNS_MULTI 0x20 +#define SDHCI_TRNS_DMA BIT(0) +#define SDHCI_TRNS_BLK_CNT_EN BIT(1) +#define SDHCI_TRNS_ACMD12 BIT(2) +#define SDHCI_TRNS_READ BIT(4) +#define SDHCI_TRNS_MULTI BIT(5) #define SDHCI_COMMAND 0x0E #define SDHCI_CMD_RESP_MASK 0x03 @@ -54,29 +54,29 @@ #define SDHCI_BUFFER 0x20 #define SDHCI_PRESENT_STATE 0x24 -#define SDHCI_CMD_INHIBIT 0x00000001 -#define SDHCI_DATA_INHIBIT 0x00000002 -#define SDHCI_DOING_WRITE 0x00000100 -#define SDHCI_DOING_READ 0x00000200 -#define SDHCI_SPACE_AVAILABLE 0x00000400 -#define SDHCI_DATA_AVAILABLE 0x00000800 -#define SDHCI_CARD_PRESENT 0x00010000 -#define SDHCI_CARD_STATE_STABLE 0x00020000 -#define SDHCI_CARD_DETECT_PIN_LEVEL 0x00040000 -#define SDHCI_WRITE_PROTECT 0x00080000 +#define SDHCI_CMD_INHIBIT BIT(0) +#define SDHCI_DATA_INHIBIT BIT(1) +#define SDHCI_DOING_WRITE BIT(8) +#define SDHCI_DOING_READ BIT(9) +#define SDHCI_SPACE_AVAILABLE BIT(10) +#define SDHCI_DATA_AVAILABLE BIT(11) +#define SDHCI_CARD_PRESENT BIT(16) +#define SDHCI_CARD_STATE_STABLE BIT(17) +#define SDHCI_CARD_DETECT_PIN_LEVEL BIT(18) +#define SDHCI_WRITE_PROTECT BIT(19) #define SDHCI_HOST_CONTROL 0x28 -#define SDHCI_CTRL_LED 0x01 -#define SDHCI_CTRL_4BITBUS 0x02 -#define SDHCI_CTRL_HISPD 0x04 +#define SDHCI_CTRL_LED BIT(0) +#define SDHCI_CTRL_4BITBUS BIT(1) +#define SDHCI_CTRL_HISPD BIT(2) #define SDHCI_CTRL_DMA_MASK 0x18 #define SDHCI_CTRL_SDMA 0x00 #define SDHCI_CTRL_ADMA1 0x08 #define SDHCI_CTRL_ADMA32 0x10 #define SDHCI_CTRL_ADMA64 0x18 -#define SDHCI_CTRL_8BITBUS 0x20 -#define SDHCI_CTRL_CD_TEST_INS 0x40 -#define SDHCI_CTRL_CD_TEST 0x80 +#define SDHCI_CTRL_8BITBUS BIT(5) +#define SDHCI_CTRL_CD_TEST_INS BIT(6) +#define SDHCI_CTRL_CD_TEST BIT(7) #define SDHCI_POWER_CONTROL 0x29 #define SDHCI_POWER_ON 0x01 @@ -87,9 +87,9 @@ #define SDHCI_BLOCK_GAP_CONTROL 0x2A #define SDHCI_WAKE_UP_CONTROL 0x2B -#define SDHCI_WAKE_ON_INT 0x01 -#define SDHCI_WAKE_ON_INSERT 0x02 -#define SDHCI_WAKE_ON_REMOVE 0x04 +#define SDHCI_WAKE_ON_INT BIT(0) +#define SDHCI_WAKE_ON_INSERT BIT(1) +#define SDHCI_WAKE_ON_REMOVE BIT(2) #define SDHCI_CLOCK_CONTROL 0x2C #define SDHCI_DIVIDER_SHIFT 8 @@ -97,10 +97,10 @@ #define SDHCI_DIV_MASK 0xFF #define SDHCI_DIV_MASK_LEN 8 #define SDHCI_DIV_HI_MASK 0x300 -#define SDHCI_PROG_CLOCK_MODE 0x0020 -#define SDHCI_CLOCK_CARD_EN 0x0004 -#define SDHCI_CLOCK_INT_STABLE 0x0002 -#define SDHCI_CLOCK_INT_EN 0x0001 +#define SDHCI_PROG_CLOCK_MODE BIT(5) +#define SDHCI_CLOCK_CARD_EN BIT(2) +#define SDHCI_CLOCK_INT_STABLE BIT(1) +#define SDHCI_CLOCK_INT_EN BIT(0) #define SDHCI_TIMEOUT_CONTROL 0x2E @@ -112,25 +112,25 @@ #define SDHCI_INT_STATUS 0x30 #define SDHCI_INT_ENABLE 0x34 #define SDHCI_SIGNAL_ENABLE 0x38 -#define SDHCI_INT_RESPONSE 0x00000001 -#define SDHCI_INT_DATA_END 0x00000002 -#define SDHCI_INT_DMA_END 0x00000008 -#define SDHCI_INT_SPACE_AVAIL 0x00000010 -#define SDHCI_INT_DATA_AVAIL 0x00000020 -#define SDHCI_INT_CARD_INSERT 0x00000040 -#define SDHCI_INT_CARD_REMOVE 0x00000080 -#define SDHCI_INT_CARD_INT 0x00000100 -#define SDHCI_INT_ERROR 0x00008000 -#define SDHCI_INT_TIMEOUT 0x00010000 -#define SDHCI_INT_CRC 0x00020000 -#define SDHCI_INT_END_BIT 0x00040000 -#define SDHCI_INT_INDEX 0x00080000 -#define SDHCI_INT_DATA_TIMEOUT 0x00100000 -#define SDHCI_INT_DATA_CRC 0x00200000 -#define SDHCI_INT_DATA_END_BIT 0x00400000 -#define SDHCI_INT_BUS_POWER 0x00800000 -#define SDHCI_INT_ACMD12ERR 0x01000000 -#define SDHCI_INT_ADMA_ERROR 0x02000000 +#define SDHCI_INT_RESPONSE BIT(0) +#define SDHCI_INT_DATA_END BIT(1) +#define SDHCI_INT_DMA_END BIT(3) +#define SDHCI_INT_SPACE_AVAIL BIT(4) +#define SDHCI_INT_DATA_AVAIL BIT(5) +#define SDHCI_INT_CARD_INSERT BIT(6) +#define SDHCI_INT_CARD_REMOVE BIT(7) +#define SDHCI_INT_CARD_INT BIT(8) +#define SDHCI_INT_ERROR BIT(15) +#define SDHCI_INT_TIMEOUT BIT(16) +#define SDHCI_INT_CRC BIT(17) +#define SDHCI_INT_END_BIT BIT(18) +#define SDHCI_INT_INDEX BIT(19) +#define SDHCI_INT_DATA_TIMEOUT BIT(20) +#define SDHCI_INT_DATA_CRC BIT(21) +#define SDHCI_INT_DATA_END_BIT BIT(22) +#define SDHCI_INT_BUS_POWER BIT(23) +#define SDHCI_INT_ACMD12ERR BIT(24) +#define SDHCI_INT_ADMA_ERROR BIT(25) #define SDHCI_INT_NORMAL_MASK 0x00007FFF #define SDHCI_INT_ERROR_MASK 0xFFFF8000 @@ -156,15 +156,15 @@ #define SDHCI_CLOCK_BASE_SHIFT 8 #define SDHCI_MAX_BLOCK_MASK 0x00030000 #define SDHCI_MAX_BLOCK_SHIFT 16 -#define SDHCI_CAN_DO_8BIT 0x00040000 -#define SDHCI_CAN_DO_ADMA2 0x00080000 -#define SDHCI_CAN_DO_ADMA1 0x00100000 -#define SDHCI_CAN_DO_HISPD 0x00200000 -#define SDHCI_CAN_DO_SDMA 0x00400000 -#define SDHCI_CAN_VDD_330 0x01000000 -#define SDHCI_CAN_VDD_300 0x02000000 -#define SDHCI_CAN_VDD_180 0x04000000 -#define SDHCI_CAN_64BIT 0x10000000 +#define SDHCI_CAN_DO_8BIT BIT(18) +#define SDHCI_CAN_DO_ADMA2 BIT(19) +#define SDHCI_CAN_DO_ADMA1 BIT(20) +#define SDHCI_CAN_DO_HISPD BIT(21) +#define SDHCI_CAN_DO_SDMA BIT(22) +#define SDHCI_CAN_VDD_330 BIT(24) +#define SDHCI_CAN_VDD_300 BIT(25) +#define SDHCI_CAN_VDD_180 BIT(26) +#define SDHCI_CAN_64BIT BIT(28) #define SDHCI_CAPABILITIES_1 0x44 #define SDHCI_CLOCK_MUL_MASK 0x00FF0000 @@ -213,9 +213,7 @@ #define SDHCI_QUIRK_BROKEN_R1B (1 << 2) #define SDHCI_QUIRK_NO_HISPD_BIT (1 << 3) #define SDHCI_QUIRK_BROKEN_VOLTAGE (1 << 4) -#define SDHCI_QUIRK_NO_CD (1 << 5) #define SDHCI_QUIRK_WAIT_SEND_CMD (1 << 6) -#define SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER (1 << 7) #define SDHCI_QUIRK_USE_WIDE8 (1 << 8) /* to make gcc happy */ @@ -228,13 +226,16 @@ struct sdhci_host; #define SDHCI_DEFAULT_BOUNDARY_ARG (7) struct sdhci_ops { #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS - u32 (*read_l)(struct sdhci_host *host, int reg); - u16 (*read_w)(struct sdhci_host *host, int reg); - u8 (*read_b)(struct sdhci_host *host, int reg); - void (*write_l)(struct sdhci_host *host, u32 val, int reg); - void (*write_w)(struct sdhci_host *host, u16 val, int reg); - void (*write_b)(struct sdhci_host *host, u8 val, int reg); + u32 (*read_l)(struct sdhci_host *host, int reg); + u16 (*read_w)(struct sdhci_host *host, int reg); + u8 (*read_b)(struct sdhci_host *host, int reg); + void (*write_l)(struct sdhci_host *host, u32 val, int reg); + void (*write_w)(struct sdhci_host *host, u16 val, int reg); + void (*write_b)(struct sdhci_host *host, u8 val, int reg); #endif + int (*get_cd)(struct sdhci_host *host); + void (*set_control_reg)(struct sdhci_host *host); + void (*set_clock)(struct sdhci_host *host, u32 div); }; struct sdhci_host { @@ -253,8 +254,6 @@ struct sdhci_host { struct gpio_desc pwr_gpio; /* Power GPIO */ struct gpio_desc cd_gpio; /* Card Detect GPIO */ - void (*set_control_reg)(struct sdhci_host *host); - void (*set_clock)(int dev_index, unsigned int div); uint voltages; struct mmc_config cfg; diff --git a/include/spl.h b/include/spl.h index 6e746b20461..bde44374eac 100644 --- a/include/spl.h +++ b/include/spl.h @@ -23,8 +23,8 @@ struct spl_image_info { const char *name; u8 os; - u32 load_addr; - u32 entry_point; + ulong load_addr; + ulong entry_point; u32 size; u32 flags; }; diff --git a/lib/tiny-printf.c b/lib/tiny-printf.c index 30ac7596d34..dfa843240fc 100644 --- a/lib/tiny-printf.c +++ b/lib/tiny-printf.c @@ -38,8 +38,8 @@ static void out_dgt(struct printf_info *info, char dgt) info->zs = 1; } -static void div_out(struct printf_info *info, unsigned int *num, - unsigned int div) +static void div_out(struct printf_info *info, unsigned long *num, + unsigned long div) { unsigned char dgt = 0; @@ -56,9 +56,9 @@ int _vprintf(struct printf_info *info, const char *fmt, va_list va) { char ch; char *p; - unsigned int num; + unsigned long num; char buf[12]; - unsigned int div; + unsigned long div; while ((ch = *(fmt++))) { if (ch != '%') { @@ -66,8 +66,12 @@ int _vprintf(struct printf_info *info, const char *fmt, va_list va) } else { bool lz = false; int width = 0; + bool islong = false; ch = *(fmt++); + if (ch == '-') + ch = *(fmt++); + if (ch == '0') { ch = *(fmt++); lz = 1; @@ -80,6 +84,11 @@ int _vprintf(struct printf_info *info, const char *fmt, va_list va) ch = *fmt++; } } + if (ch == 'l') { + ch = *(fmt++); + islong = true; + } + info->bf = buf; p = info->bf; info->zs = 0; @@ -89,24 +98,43 @@ int _vprintf(struct printf_info *info, const char *fmt, va_list va) goto abort; case 'u': case 'd': - num = va_arg(va, unsigned int); - if (ch == 'd' && (int)num < 0) { - num = -(int)num; - out(info, '-'); + div = 1000000000; + if (islong) { + num = va_arg(va, unsigned long); + if (sizeof(long) > 4) + div *= div * 10; + } else { + num = va_arg(va, unsigned int); + } + + if (ch == 'd') { + if (islong && (long)num < 0) { + num = -(long)num; + out(info, '-'); + } else if (!islong && (int)num < 0) { + num = -(int)num; + out(info, '-'); + } } if (!num) { out_dgt(info, 0); } else { - for (div = 1000000000; div; div /= 10) + for (; div; div /= 10) div_out(info, &num, div); } break; case 'x': - num = va_arg(va, unsigned int); + if (islong) { + num = va_arg(va, unsigned long); + div = 1UL << (sizeof(long) * 8 - 4); + } else { + num = va_arg(va, unsigned int); + div = 0x10000000; + } if (!num) { out_dgt(info, 0); } else { - for (div = 0x10000000; div; div /= 0x10) + for (; div; div /= 0x10) div_out(info, &num, div); } break; |