summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
Diffstat
-rw-r--r--Makefile2
-rw-r--r--arch/sandbox/include/asm/io.h19
-rw-r--r--cmd/Kconfig2
-rw-r--r--common/log_syslog.c1
-rw-r--r--disk/part_dos.c2
-rw-r--r--drivers/adc/Kconfig4
-rw-r--r--drivers/ata/Kconfig3
-rw-r--r--drivers/crypto/aspeed/Kconfig4
-rw-r--r--drivers/crypto/fsl/Kconfig4
-rw-r--r--drivers/crypto/hash/Kconfig2
-rw-r--r--drivers/crypto/nuvoton/Kconfig1
-rw-r--r--drivers/dma/Kconfig1
-rw-r--r--drivers/gpio/Kconfig40
-rw-r--r--drivers/net/phy/micrel_ksz90x1.c12
-rw-r--r--drivers/net/ti/icssg_prueth.c54
-rw-r--r--drivers/net/ti/icssg_prueth.h7
-rw-r--r--drivers/nvme/nvme.c6
-rw-r--r--test/Kconfig1
18 files changed, 116 insertions, 49 deletions
diff --git a/Makefile b/Makefile
index 93e9f401842..e8f12716640 100644
--- a/Makefile
+++ b/Makefile
@@ -2529,7 +2529,7 @@ distclean: mrproper
-o -name '.*.rej' -o -name '*%' -o -name 'core' \
-o -name '*.pyc' \) \
-type f -print | xargs rm -f
- @rm -f boards.cfg CHANGELOG
+ @rm -f boards.cfg CHANGELOG .binman_stamp
# See doc/develop/python_cq.rst
PHONY += pylint pylint_err
diff --git a/arch/sandbox/include/asm/io.h b/arch/sandbox/include/asm/io.h
index f656f361cd5..6e3f9547fee 100644
--- a/arch/sandbox/include/asm/io.h
+++ b/arch/sandbox/include/asm/io.h
@@ -74,7 +74,14 @@ void sandbox_write(void *addr, unsigned int val, enum sandboxio_size_t size);
#define in_be32(a) in_arch(l,be32,a)
#define in_be16(a) in_arch(w,be16,a)
+#define out_64(a,v) writeq(v,a)
+#define out_32(a,v) writel(v,a)
+#define out_16(a,v) writew(v,a)
#define out_8(a,v) writeb(v,a)
+
+#define in_64(a) readq(a)
+#define in_32(a) readl(a)
+#define in_16(a) readw(a)
#define in_8(a) readb(a)
#define clrbits(type, addr, clear) \
@@ -106,6 +113,18 @@ void sandbox_write(void *addr, unsigned int val, enum sandboxio_size_t size);
#define setbits_8(addr, set) setbits(8, addr, set)
#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
+#define clrbits_16(addr, clear) clrbits(16, addr, clear)
+#define setbits_16(addr, set) setbits(16, addr, set)
+#define clrsetbits_16(addr, clear, set) clrsetbits(16, addr, clear, set)
+
+#define clrbits_32(addr, clear) clrbits(32, addr, clear)
+#define setbits_32(addr, set) setbits(32, addr, set)
+#define clrsetbits_32(addr, clear, set) clrsetbits(32, addr, clear, set)
+
+#define clrbits_64(addr, clear) clrbits(64, addr, clear)
+#define setbits_64(addr, set) setbits(64, addr, set)
+#define clrsetbits_64(addr, clear, set) clrsetbits(64, addr, clear, set)
+
/* I/O access functions */
int _inl(unsigned int addr);
int _inw(unsigned int addr);
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 313db793f1b..2d3a8062625 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -414,7 +414,7 @@ config BOOTM_RTEMS
config CMD_SEAMA
bool "Support read SEAMA NAND images"
- depends on MTD_RAW_NAND
+ depends on (TARGET_BCMNS || TARGET_BCMNS3) && MTD_RAW_NAND
help
Support reading NAND Seattle Image (SEAMA) images.
diff --git a/common/log_syslog.c b/common/log_syslog.c
index 0dcb5f7cdea..73bd3aca07e 100644
--- a/common/log_syslog.c
+++ b/common/log_syslog.c
@@ -5,6 +5,7 @@
* Copyright (c) 2020, Heinrich Schuchardt <xypron.glpk@gmx.de>
*/
+#include <env.h>
#include <log.h>
#include <net.h>
#include <asm/global_data.h>
diff --git a/disk/part_dos.c b/disk/part_dos.c
index 5c77225cef9..18dd35c9b98 100644
--- a/disk/part_dos.c
+++ b/disk/part_dos.c
@@ -421,7 +421,7 @@ int write_mbr_partitions(struct blk_desc *dev,
/* write EBR */
if (blk_dwrite(dev, ext_part_sect, 1, buffer) != 1) {
- printf("%s: failed writing 'EBR' (1 blks at 0x%lx)\n",
+ printf("%s: failed writing 'EBR' (1 blks at 0x" LBAF ")\n",
__func__, ext_part_sect);
return -1;
}
diff --git a/drivers/adc/Kconfig b/drivers/adc/Kconfig
index 37235f557a3..2b45f9e5eba 100644
--- a/drivers/adc/Kconfig
+++ b/drivers/adc/Kconfig
@@ -18,7 +18,7 @@ config SPL_ADC
config ADC_EXYNOS
bool "Enable Exynos 54xx ADC driver"
- depends on ADC
+ depends on ADC && ARCH_EXYNOS5
help
This enables basic driver for Exynos ADC compatible with Exynos54xx.
It provides:
@@ -49,7 +49,7 @@ config SARADC_MESON
config SARADC_ROCKCHIP
bool "Enable Rockchip SARADC driver"
- depends on ADC
+ depends on ADC && ARCH_ROCKCHIP
help
This enables driver for Rockchip SARADC.
It provides:
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 29ceab849c0..da9c72a99d0 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -131,6 +131,7 @@ config FSL_SATA_V2
config SATA_MV
bool "Enable Marvell SATA controller driver support"
+ depends on ARCH_KIRKWOOD || ARCH_MVEBU
select AHCI
select LIBATA
help
@@ -148,7 +149,7 @@ config SATA_SIL
config SYS_SATA_MAX_DEVICE
int "Maximum number of SATA devices"
- depends on !AHCI || FSL_SATA || SATA_MV
+ depends on !AHCI || FSL_SATA || SATA_MV || API
help
Sets the maximum number of SATA devices which can be supported
by U-Boot.
diff --git a/drivers/crypto/aspeed/Kconfig b/drivers/crypto/aspeed/Kconfig
index 6efcd7da738..401225b8528 100644
--- a/drivers/crypto/aspeed/Kconfig
+++ b/drivers/crypto/aspeed/Kconfig
@@ -1,3 +1,5 @@
+if ARCH_ASPEED
+
config ASPEED_HACE
bool "ASPEED Hash and Crypto Engine"
depends on DM_HASH
@@ -38,3 +40,5 @@ config ASPEED_CPTRA_ECDSA
Enabling this allows the use of ECDSA384 signature verification in hardware.
Note that only ECDSA384 is supported by Caliptra.
+
+endif
diff --git a/drivers/crypto/fsl/Kconfig b/drivers/crypto/fsl/Kconfig
index 9ed56632fcd..fe694f6022c 100644
--- a/drivers/crypto/fsl/Kconfig
+++ b/drivers/crypto/fsl/Kconfig
@@ -1,3 +1,5 @@
+if ARM || PPC
+
config FSL_CAAM
bool "Freescale Crypto Driver Support"
select SHA_HW_ACCEL
@@ -95,3 +97,5 @@ config FSL_DCP_RNG
module of the DCP. It uses the True Random Number Generator (TRNG)
and a Pseudo-Random Number Generator (PRNG) to achieve a true
randomness and cryptographic strength.
+
+endif
diff --git a/drivers/crypto/hash/Kconfig b/drivers/crypto/hash/Kconfig
index aa355c44be8..72b955ac791 100644
--- a/drivers/crypto/hash/Kconfig
+++ b/drivers/crypto/hash/Kconfig
@@ -18,7 +18,7 @@ config HASH_SOFTWARE
config HASH_ASPEED
bool "Enable Hash with ASPEED hash accelerator"
- depends on DM_HASH
+ depends on DM_HASH && ARCH_ASPEED
select ASPEED_HACE
help
Enable this to support HW-assisted hashing operations using ASPEED Hash
diff --git a/drivers/crypto/nuvoton/Kconfig b/drivers/crypto/nuvoton/Kconfig
index 034fcadfcc8..0eb4396816e 100644
--- a/drivers/crypto/nuvoton/Kconfig
+++ b/drivers/crypto/nuvoton/Kconfig
@@ -1,5 +1,6 @@
config NPCM_AES
bool "Support the NPCM AES algorithm"
+ depends on (ARM && ARCH_NPCM)
select NPCM_OTP
help
This provides a means to encrypt and decrypt data using the NPCM
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index e8ef90e2bd6..1fccbc96f07 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -37,6 +37,7 @@ config BCM6348_IUDMA
config TI_EDMA3
bool "TI EDMA3 driver"
+ depends on ARCH_OMAP2PLUS || ARCH_KEYSTONE
select DMA_LEGACY
help
Enable the TI EDMA3 driver for DRA7xx and AM43xx evms.
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 5dee00f832e..fd227d46f5a 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -115,7 +115,7 @@ config ALTERA_PIO
config BCM2835_GPIO
bool "BCM2835 GPIO driver"
- depends on DM_GPIO
+ depends on DM_GPIO && ARCH_BCM283X
config BCM6345_GPIO
bool "BCM6345 GPIO driver"
@@ -140,6 +140,7 @@ config DWAPB_GPIO
config AT91_GPIO
bool "AT91 PIO GPIO driver"
+ depends on ARCH_AT91
help
Say yes here to select AT91 PIO GPIO driver. AT91 PIO
controller manages up to 32 fully programmable input/output
@@ -151,7 +152,7 @@ config AT91_GPIO
config ATMEL_PIO4
bool "ATMEL PIO4 driver"
- depends on DM_GPIO
+ depends on DM_GPIO && ARCH_AT91
help
Say yes here to support the Atmel PIO4 driver.
The PIO4 is new version of Atmel PIO controller, which manages
@@ -194,11 +195,11 @@ config FXL6408_GPIO
config HIKEY_GPIO
bool "HI6220 GPIO driver"
- depends on DM_GPIO
+ depends on DM_GPIO && TARGET_HIKEY
config INTEL_BROADWELL_GPIO
bool "Intel Broadwell GPIO driver"
- depends on DM
+ depends on DM_GPIO && X86
help
This driver supports Broadwell U devices which have an expanded
GPIO feature set. The difference is large enough to merit a separate
@@ -207,7 +208,7 @@ config INTEL_BROADWELL_GPIO
config INTEL_GPIO
bool "Intel generic GPIO driver"
- depends on DM_GPIO
+ depends on DM_GPIO && X86
help
Say yes here to select Intel generic GPIO driver. This controller
supports recent chips (e.g. Apollo Lake). It permits basic GPIO
@@ -216,13 +217,13 @@ config INTEL_GPIO
config INTEL_ICH6_GPIO
bool "Intel ICH6 compatible legacy GPIO driver"
- depends on DM_GPIO
+ depends on DM_GPIO && X86
help
Say yes here to select Intel ICH6 compatible legacy GPIO driver.
config IMX_RGPIO2P
bool "i.MX7ULP RGPIO2P driver"
- depends on DM
+ depends on DM && (ARCH_MX7ULP || ARCH_IMX8ULP || ARCH_IMX9)
help
This driver supports i.MX7ULP Rapid GPIO2P controller.
@@ -244,12 +245,13 @@ config HSDK_CREG_GPIO
config KIRKWOOD_GPIO
bool "Kirkwood GPIO driver"
+ depends on ARCH_KIRKWOOD
help
This drdiver supports GPIOs on Kirkwood platforms
config LPC32XX_GPIO
bool "LPC32XX GPIO driver"
- depends on DM
+ depends on DM && ARCH_LPC32XX
help
Support for the LPC32XX GPIO driver.
@@ -296,7 +298,7 @@ config MSCC_SGPIO
config MSM_GPIO
bool "Qualcomm GPIO driver"
- depends on DM_GPIO
+ depends on DM_GPIO && ARCH_SNAPDRAGON
help
Support GPIO controllers on Qualcomm Snapdragon family of SoCs.
This controller have single bank (default name "soc"), every
@@ -309,24 +311,26 @@ config MSM_GPIO
config MXC_GPIO
bool "Freescale/NXP MXC GPIO driver"
+ depends on MACH_IMX
help
Support GPIO controllers on various i.MX platforms
config MXS_GPIO
bool "Freescale/NXP MXS GPIO driver"
+ depends on ARCH_MX23 || ARCH_MX28
help
Support GPIO controllers on i.MX23 and i.MX28 platforms
config NPCM_GPIO
bool "Nuvoton NPCM GPIO driver"
- depends on DM_GPIO
+ depends on DM_GPIO && ARCH_NPCM
help
Support GPIO controllers on Nuvovon NPCM SoCs.
NPCM7xx/NPCM8xx contain 8 GPIO banks, each bank contains 32 pins.
config NPCM_SGPIO
bool "Nuvoton NPCM SGPIO driver"
- depends on DM_GPIO
+ depends on DM_GPIO && ARCH_NPCM
help
Support Nuvoton BMC NPCM7xx/NPCM8xx sgpio driver support.
Nuvoton NPCM SGPIO module is combine serial to parallel IC (HC595)
@@ -380,7 +384,7 @@ config RZA1_GPIO
config ROCKCHIP_GPIO
bool "Rockchip GPIO driver"
- depends on DM_GPIO
+ depends on DM_GPIO && ARCH_ROCKCHIP
help
Support GPIO access on Rockchip SoCs. The GPIOs are arranged into
a number of banks (different for each SoC type) each with 32 GPIOs.
@@ -430,7 +434,7 @@ config XILINX_GPIO
config TEGRA_GPIO
bool "Tegra20..210 GPIO driver"
- depends on DM_GPIO
+ depends on DM_GPIO && ARCH_TEGRA
help
Support for the GPIO controller contained in NVIDIA Tegra20 through
Tegra210.
@@ -451,7 +455,7 @@ config GPIO_UNIPHIER
config VYBRID_GPIO
bool "Vybrid GPIO driver"
- depends on DM
+ depends on DM && MACH_IMX
help
Say yes here to support Vybrid vf610 GPIOs.
@@ -490,7 +494,7 @@ config STM32_GPIO
config SIFIVE_GPIO
bool "SiFive GPIO driver"
- depends on DM_GPIO
+ depends on DM_GPIO && RISCV
help
Device model driver for GPIO controller present in SiFive FU540 SoC. This
driver enables GPIO interface on HiFive Unleashed A00 board.
@@ -577,7 +581,7 @@ config PCA953X
config MPC8XXX_GPIO
bool "Freescale MPC8XXX GPIO driver"
- depends on DM_GPIO
+ depends on DM_GPIO && (PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3)
help
This driver supports the built-in GPIO controller of MPC8XXX CPUs.
Each GPIO bank is identified by its own entry in the device tree,
@@ -618,7 +622,7 @@ config QE_GPIO
config MPC8XX_GPIO
bool "Freescale MPC8XX GPIO driver"
- depends on DM_GPIO
+ depends on DM_GPIO && PPC
help
This driver supports parallel IO ports from MPC8XX CPUs.
Each GPIO bank is identified by its own entry in the device tree.
@@ -685,7 +689,7 @@ config SL28CPLD_GPIO
config SLG7XL45106_I2C_GPO
bool "slg7xl45106 i2c gpo expander"
- depends on DM_GPIO
+ depends on DM_GPIO && ARCH_ZYNQMP
help
Support for slg7xl45106 i2c gpo expander. It is an i2c based
8-bit gpo expander, all gpo lines are controlled by writing
diff --git a/drivers/net/phy/micrel_ksz90x1.c b/drivers/net/phy/micrel_ksz90x1.c
index ee8eae1efd9..a02dbe900b8 100644
--- a/drivers/net/phy/micrel_ksz90x1.c
+++ b/drivers/net/phy/micrel_ksz90x1.c
@@ -7,6 +7,7 @@
* (C) 2012 NetModule AG, David Andrey, added KSZ9031
* (C) Copyright 2017 Adaptrum, Inc.
* Written by Alexandru Gagniuc <alex.g@adaptrum.com> for Adaptrum, Inc.
+ * Copyright (C) 2025 Altera Corporation <www.altera.com>
*/
#include <dm.h>
#include <env.h>
@@ -110,6 +111,7 @@ static int ksz90x1_of_config_group(struct phy_device *phydev,
{
struct udevice *dev = phydev->dev;
struct phy_driver *drv = phydev->drv;
+ struct ofnode_phandle_args phandle;
int val[4];
int i, changed = 0, offset, max;
u16 regval = 0;
@@ -126,8 +128,14 @@ static int ksz90x1_of_config_group(struct phy_device *phydev,
}
if (!ofnode_valid(node)) {
- /* No node found, look in the Ethernet node */
- node = dev_ofnode(dev);
+ if (dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0,
+ &phandle)) {
+ /* No phy-handle found, look in the Ethernet node */
+ node = dev_ofnode(dev);
+ } else {
+ /* phy-handle found */
+ node = phandle.node;
+ }
}
for (i = 0; i < ofcfg->grpsz; i++) {
diff --git a/drivers/net/ti/icssg_prueth.c b/drivers/net/ti/icssg_prueth.c
index 2639f960631..d8df3c9afb0 100644
--- a/drivers/net/ti/icssg_prueth.c
+++ b/drivers/net/ti/icssg_prueth.c
@@ -63,6 +63,7 @@
/* Number of PRU Cores per Slice */
#define ICSSG_NUM_PRU_CORES 3
+#define ICSSG_NUM_FIRMWARES 6
static int icssg_gmii_select(struct prueth_priv *priv)
{
@@ -192,25 +193,6 @@ static int icssg_update_link(struct prueth_priv *priv)
return phy->link;
}
-struct icssg_firmwares {
- char *pru;
- char *rtu;
- char *txpru;
-};
-
-static struct icssg_firmwares icssg_emac_firmwares[] = {
- {
- .pru = "/lib/firmware/ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
- .rtu = "/lib/firmware/ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
- .txpru = "/lib/firmware/ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
- },
- {
- .pru = "/lib/firmware/ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
- .rtu = "/lib/firmware/ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
- .txpru = "/lib/firmware/ti-pruss/am65x-sr2-txpru1-prueth-fw.elf",
- }
-};
-
static int icssg_start_pru_cores(struct udevice *dev)
{
struct prueth_priv *priv = dev_get_priv(dev);
@@ -223,7 +205,7 @@ static int icssg_start_pru_cores(struct udevice *dev)
slice = priv->port_id;
index = slice * ICSSG_NUM_PRU_CORES;
- firmwares = icssg_emac_firmwares;
+ firmwares = prueth->firmwares;
ofnode_read_u32_index(dev_ofnode(prueth->dev), "ti,prus", index, &phandle);
ret = uclass_get_device_by_phandle_id(UCLASS_REMOTEPROC, phandle, &rproc_dev);
@@ -476,6 +458,24 @@ static const struct eth_ops prueth_ops = {
.stop = prueth_stop,
};
+static char *prepend_fw_path(const char *fw_name)
+{
+ static const char fw_dir[] = "/lib/firmware/";
+ char *result;
+ int len;
+
+ if (!fw_name)
+ return NULL;
+
+ len = strlen(fw_dir) + strlen(fw_name) + 1;
+ result = malloc(len);
+ if (!result)
+ return NULL;
+
+ sprintf(result, "%s%s", fw_dir, fw_name);
+ return result;
+}
+
static int icssg_ofdata_parse_phy(struct udevice *dev)
{
struct prueth_priv *priv = dev_get_priv(dev);
@@ -534,6 +534,8 @@ static int prueth_probe(struct udevice *dev)
struct udevice **prussdev = NULL;
ofnode eth_ports_node, eth_node;
struct udevice *port_dev;
+ const char **fw_names;
+ int fw_count, i;
int ret = 0;
prueth->dev = dev;
@@ -659,6 +661,18 @@ static int prueth_probe(struct udevice *dev)
}
}
+ /* Parse firmware-name property from DT */
+ fw_count = dev_read_string_list(dev, "firmware-name", &fw_names);
+ if (fw_count != ICSSG_NUM_FIRMWARES) {
+ dev_err(dev, "Expected %d firmware names, got %d\n", ICSSG_NUM_FIRMWARES, fw_count);
+ return -EINVAL;
+ }
+ for (i = 0; i < 2; i++) {
+ prueth->firmwares[i].pru = prepend_fw_path(fw_names[i * 3 + 0]);
+ prueth->firmwares[i].rtu = prepend_fw_path(fw_names[i * 3 + 1]);
+ prueth->firmwares[i].txpru = prepend_fw_path(fw_names[i * 3 + 2]);
+ }
+
return 0;
out:
clk_disable(&prueth->mdiofck);
diff --git a/drivers/net/ti/icssg_prueth.h b/drivers/net/ti/icssg_prueth.h
index c69cfd4f162..d88b6fa88e7 100644
--- a/drivers/net/ti/icssg_prueth.h
+++ b/drivers/net/ti/icssg_prueth.h
@@ -38,6 +38,12 @@ enum prueth_port {
PRUETH_PORT_MII1, /* physical port MII 1 */
};
+struct icssg_firmwares {
+ char *pru;
+ char *rtu;
+ char *txpru;
+};
+
struct prueth {
struct udevice *dev;
struct udevice *pruss;
@@ -66,6 +72,7 @@ struct prueth {
u8 rtu_core_id;
u8 txpru_core_id;
u8 icssg_hwcmdseq;
+ struct icssg_firmwares firmwares[PRUETH_NUM_MACS];
};
struct prueth_priv {
diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index 7c58ceb78f5..2b14437f69c 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -912,8 +912,10 @@ int nvme_init(struct udevice *udev)
goto free_id;
ret = bootdev_setup_for_sibling_blk(ns_udev, "nvme_bootdev");
- if (ret)
- return log_msg_ret("bootdev", ret);
+ if (ret) {
+ log_err("bootdev: returning err=%d\n", ret);
+ goto free_id;
+ }
ret = blk_probe_or_unbind(ns_udev);
if (ret)
diff --git a/test/Kconfig b/test/Kconfig
index 31016eedbf8..77e7cad3984 100644
--- a/test/Kconfig
+++ b/test/Kconfig
@@ -122,6 +122,7 @@ endif # UNIT_TEST
config POST
bool "Power On Self Test support"
+ depends on ARM || PPC
help
See doc/README.POST for more details
generated by cgit v1.2.3 (git 2.0.4) at 2025-07-16 17:23:05 +0000