diff options
1337 files changed, 12895 insertions, 6417 deletions
diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index d3e7b4dd020..5d9645451d4 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -1,7 +1,7 @@ variables: windows_vm: vs2017-win2016 ubuntu_vm: ubuntu-18.04 - ci_runner_image: trini/u-boot-gitlab-ci-runner:bionic-20200311-10Apr2020 + ci_runner_image: trini/u-boot-gitlab-ci-runner:bionic-20200403-27Apr2020 # Add '-u 0' options for Azure pipelines, otherwise we get "permission # denied" error when it tries to "useradd -m -u 1001 vsts_azpcontainer", # since our $(ci_runner_image) user is not root. @@ -161,7 +161,7 @@ jobs: TEST_PY_BD: "sandbox" sandbox_clang: TEST_PY_BD: "sandbox" - OVERRIDE: "-O clang-7" + OVERRIDE: "-O clang-10" sandbox_spl: TEST_PY_BD: "sandbox_spl" TEST_PY_TEST_SPEC: "test_ofplatdata or test_handoff" diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 08bdf81e74d..beaf9b9042a 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -2,7 +2,7 @@ # Grab our configured image. The source for this is found at: # https://gitlab.denx.de/u-boot/gitlab-ci-runner -image: trini/u-boot-gitlab-ci-runner:bionic-20200311-10Apr2020 +image: trini/u-boot-gitlab-ci-runner:bionic-20200403-27Apr2020 # We run some tests in different order, to catch some failures quicker. stages: @@ -181,7 +181,7 @@ sandbox with clang test.py: tags: [ 'all' ] variables: TEST_PY_BD: "sandbox" - OVERRIDE: "-O clang-7" + OVERRIDE: "-O clang-10" <<: *buildman_and_testpy_dfn sandbox_spl test.py: diff --git a/.readthedocs.yml b/.readthedocs.yml new file mode 100644 index 00000000000..f3fb5ed51ba --- /dev/null +++ b/.readthedocs.yml @@ -0,0 +1,19 @@ +# .readthedocs.yml +# Read the Docs configuration file +# See https://docs.readthedocs.io/en/stable/config-file/v2.html for details + +# Required +version: 2 + +# Build documentation in the docs/ directory with Sphinx +sphinx: + configuration: docs/conf.py + +# Optionally build your docs in additional formats such as PDF and ePub +formats: [] + +# Optionally set the version of Python and requirements required to build your docs +# python: +# version: 3.7 +# install: +# - requirements: docs/requirements.txt diff --git a/.travis.yml b/.travis.yml index 82e3b915237..fbfaaaff25d 100644 --- a/.travis.yml +++ b/.travis.yml @@ -10,9 +10,10 @@ language: c addons: apt: + update: true sources: - - ubuntu-toolchain-r-test - - llvm-toolchain-bionic-7 + - sourceline: 'deb http://apt.llvm.org/bionic/ llvm-toolchain-bionic-10 main' + key_url: 'https://apt.llvm.org/llvm-snapshot.gpg.key' packages: - autopoint - cppcheck @@ -38,7 +39,7 @@ addons: - liblz4-tool - lzma-alone - libisl15 - - clang-7 + - clang-10 - srecord - graphviz - coreutils @@ -57,7 +58,7 @@ install: - ln -s travis-ci /tmp/uboot-test-hooks/py/`hostname` # prepare buildman environment - echo -e "[toolchain]\nroot = /usr" > ~/.buildman - - echo -e "arc = /tmp/arc_gnu_2018.09_prebuilt_uclibc_le_archs_linux_install" >> ~/.buildman + - echo -e "arc = /tmp/arc_gnu_2019.09_prebuilt_uclibc_le_archs_linux_install" >> ~/.buildman - echo -e "\n[toolchain-alias]\nsh = sh2" >> ~/.buildman - echo -e "x86 = i386" >> ~/.buildman; - echo -e "riscv = riscv64" >> ~/.buildman; @@ -86,8 +87,8 @@ before_script: ./tools/buildman/buildman --fetch-arch i386; fi - if [[ "${TOOLCHAIN}" == arc ]]; then - wget https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases/download/arc-2018.09-release/arc_gnu_2018.09_prebuilt_uclibc_le_archs_linux_install.tar.gz && - tar -C /tmp -xf arc_gnu_2018.09_prebuilt_uclibc_le_archs_linux_install.tar.gz; + wget https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases/download/arc-2019.09-release/arc_gnu_2019.09_prebuilt_uclibc_le_archs_linux_install.tar.gz && + tar -C /tmp -xf arc_gnu_2019.09_prebuilt_uclibc_le_archs_linux_install.tar.gz; fi - if [[ "${TOOLCHAIN}" == "nds32" ]]; then wget https://github.com/vincentzwc/prebuilt-nds32-toolchain/releases/download/20180521/nds32le-linux-glibc-v3-upstream.tar.gz && @@ -499,7 +500,7 @@ matrix: - name: "test/py sandbox with clang" env: - TEST_PY_BD="sandbox" - OVERRIDE="-O clang-7" + OVERRIDE="-O clang-10" - name: "test/py sandbox_spl" env: - TEST_PY_BD="sandbox_spl" @@ -10,7 +10,7 @@ generic-offsets-file := include/generated/generic-asm-offsets.h always := $(generic-offsets-file) targets := lib/asm-offsets.s -$(obj)/$(generic-offsets-file): lib/asm-offsets.s FORCE +$(obj)/$(generic-offsets-file): $(obj)/lib/asm-offsets.s FORCE $(call filechk,offsets,__GENERIC_ASM_OFFSETS_H__) ##### @@ -25,5 +25,5 @@ targets += arch/$(ARCH)/lib/asm-offsets.s CFLAGS_asm-offsets.o := -DDO_DEPS_ONLY -$(obj)/$(offsets-file): arch/$(ARCH)/lib/asm-offsets.s FORCE +$(obj)/$(offsets-file): $(obj)/arch/$(ARCH)/lib/asm-offsets.s FORCE $(call filechk,offsets,__ASM_OFFSETS_H__) @@ -1,9 +1,9 @@ # SPDX-License-Identifier: GPL-2.0+ VERSION = 2020 -PATCHLEVEL = 04 +PATCHLEVEL = 07 SUBLEVEL = -EXTRAVERSION = +EXTRAVERSION = -rc1 NAME = # *DOCUMENTATION* @@ -512,7 +512,7 @@ dt_h := include/generated/dt.h no-dot-config-targets := clean clobber mrproper distclean \ help %docs check% coccicheck \ - ubootversion backup tests check qcheck + ubootversion backup tests check qcheck tcheck config-targets := 0 mixed-targets := 0 @@ -1002,6 +1002,9 @@ append = cat $(filter-out $< $(PHONY), $^) >> $@ quiet_cmd_pad_cat = CAT $@ cmd_pad_cat = $(cmd_objcopy) && $(append) || rm -f $@ +quiet_cmd_lzma = LZMA $@ +cmd_lzma = lzma -c -z -k -9 $< > $@ + cfg: u-boot.cfg quiet_cmd_cfgcheck = CFGCHK $2 @@ -1322,7 +1325,9 @@ endif # Boards with more complex image requirements can provide an .its source file # or a generator script ifneq ($(CONFIG_SPL_FIT_SOURCE),"") -U_BOOT_ITS = $(subst ",,$(CONFIG_SPL_FIT_SOURCE)) +U_BOOT_ITS := u-boot.its +$(U_BOOT_ITS): $(subst ",,$(CONFIG_SPL_FIT_SOURCE)) + $(call if_changed,copy) else ifneq ($(CONFIG_SPL_FIT_GENERATOR),"") U_BOOT_ITS := u-boot.its @@ -1384,6 +1389,16 @@ else UBOOT_BIN := u-boot.bin endif +MKIMAGEFLAGS_u-boot-lzma.img = -A $(ARCH) -T standalone -C lzma -O u-boot \ + -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \ + -n "U-Boot $(UBOOTRELEASE) for $(BOARD) board" + +u-boot.bin.lzma: u-boot.bin FORCE + $(call if_changed,lzma) + +u-boot-lzma.img: u-boot.bin.lzma FORCE + $(call if_changed,mkimage) + u-boot-dtb.img u-boot.img u-boot.kwb u-boot.pbl u-boot-ivt.img: \ $(if $(CONFIG_SPL_LOAD_FIT),u-boot-nodtb.bin \ $(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_OF_HOSTFILE),dts/dt.dtb) \ @@ -2098,6 +2113,7 @@ help: @echo '' @echo ' check - Run all automated tests that use sandbox' @echo ' qcheck - Run quick automated tests that use sandbox' + @echo ' tcheck - Run quick automated tests on tools' @echo '' @echo 'Other generic targets:' @echo ' all - Build all necessary images depending on configuration' @@ -2143,6 +2159,9 @@ tests check: qcheck: $(srctree)/test/run quick +tcheck: + $(srctree)/test/run tools + # Documentation targets # --------------------------------------------------------------------------- DOC_TARGETS := xmldocs latexdocs pdfdocs htmldocs epubdocs cleandocs \ diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig index 545fc3e243c..6ff201fa816 100644 --- a/arch/arc/Kconfig +++ b/arch/arc/Kconfig @@ -164,18 +164,16 @@ config TARGET_NSIM config TARGET_AXS101 bool "Support Synopsys Designware SDP board AXS101" - select BOUNCE_BUFFER if CMD_NAND config TARGET_AXS103 bool "Support Synopsys Designware SDP board AXS103" - select BOUNCE_BUFFER if CMD_NAND config TARGET_EMSDP bool "Synopsys EM Software Development Platform" select CPU_ARCEM6 config TARGET_HSDK - bool "Support Synpsys HS DevelopmentKit board" + bool "Support Synopsys HSDK or HSDK-4xD board" config TARGET_IOT_DEVKIT bool "Synopsys Brite IoT Development kit" diff --git a/arch/arc/dts/Makefile b/arch/arc/dts/Makefile index 4f1e4637ce9..515fe1fe535 100644 --- a/arch/arc/dts/Makefile +++ b/arch/arc/dts/Makefile @@ -5,7 +5,7 @@ dtb-$(CONFIG_TARGET_AXS103) += axs103.dtb dtb-$(CONFIG_TARGET_NSIM) += nsim.dtb dtb-$(CONFIG_TARGET_TB100) += abilis_tb100.dtb dtb-$(CONFIG_TARGET_EMSDP) += emsdp.dtb -dtb-$(CONFIG_TARGET_HSDK) += hsdk.dtb +dtb-$(CONFIG_TARGET_HSDK) += hsdk.dtb hsdk-4xd.dtb dtb-$(CONFIG_TARGET_IOT_DEVKIT) += iot_devkit.dtb targets += $(dtb-y) diff --git a/arch/arc/dts/hsdk-4xd.dts b/arch/arc/dts/hsdk-4xd.dts new file mode 100644 index 00000000000..b245eea7692 --- /dev/null +++ b/arch/arc/dts/hsdk-4xd.dts @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020 Synopsys, Inc. All rights reserved. + * Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> + */ +/dts-v1/; + +#include "hsdk-common.dtsi" + +/ { + model = "snps,hsdk-4xd"; +}; diff --git a/arch/arc/dts/hsdk-common.dtsi b/arch/arc/dts/hsdk-common.dtsi new file mode 100644 index 00000000000..fd4245e1646 --- /dev/null +++ b/arch/arc/dts/hsdk-common.dtsi @@ -0,0 +1,152 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2017-2020 Synopsys, Inc. All rights reserved. + * Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> + */ +/dts-v1/; + +#include "skeleton.dtsi" +#include "dt-bindings/clock/snps,hsdk-cgu.h" +#include "dt-bindings/reset/snps,hsdk-reset.h" + +/ { + #address-cells = <1>; + #size-cells = <1>; + + aliases { + console = &uart0; + spi0 = &spi0; + }; + + cpu_card { + core_clk: core_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <500000000>; + u-boot,dm-pre-reloc; + }; + }; + + clk-fmeas { + clocks = <&cgu_clk CLK_ARC_PLL>, <&cgu_clk CLK_SYS_PLL>, + <&cgu_clk CLK_TUN_PLL>, <&cgu_clk CLK_DDR_PLL>, + <&cgu_clk CLK_ARC>, <&cgu_clk CLK_HDMI_PLL>, + <&cgu_clk CLK_TUN_TUN>, <&cgu_clk CLK_HDMI>, + <&cgu_clk CLK_SYS_APB>, <&cgu_clk CLK_SYS_AXI>, + <&cgu_clk CLK_SYS_ETH>, <&cgu_clk CLK_SYS_USB>, + <&cgu_clk CLK_SYS_SDIO>, <&cgu_clk CLK_SYS_HDMI>, + <&cgu_clk CLK_SYS_GFX_CORE>, <&cgu_clk CLK_SYS_GFX_DMA>, + <&cgu_clk CLK_SYS_GFX_CFG>, <&cgu_clk CLK_SYS_DMAC_CORE>, + <&cgu_clk CLK_SYS_DMAC_CFG>, <&cgu_clk CLK_SYS_SDIO_REF>, + <&cgu_clk CLK_SYS_SPI_REF>, <&cgu_clk CLK_SYS_I2C_REF>, + <&cgu_clk CLK_SYS_UART_REF>, <&cgu_clk CLK_SYS_EBI_REF>, + <&cgu_clk CLK_TUN_ROM>, <&cgu_clk CLK_TUN_PWM>, + <&cgu_clk CLK_TUN_TIMER>; + clock-names = "cpu-pll", "sys-pll", + "tun-pll", "ddr-clk", + "cpu-clk", "hdmi-pll", + "tun-clk", "hdmi-clk", + "apb-clk", "axi-clk", + "eth-clk", "usb-clk", + "sdio-clk", "hdmi-sys-clk", + "gfx-core-clk", "gfx-dma-clk", + "gfx-cfg-clk", "dmac-core-clk", + "dmac-cfg-clk", "sdio-ref-clk", + "spi-clk", "i2c-clk", + "uart-clk", "ebi-clk", + "rom-clk", "pwm-clk", + "timer-clk"; + }; + + cgu_clk: cgu-clk@f0000000 { + compatible = "snps,hsdk-cgu-clock"; + reg = <0xf0000000 0x10>, <0xf00014B8 0x4>; + #clock-cells = <1>; + }; + + cgu_rst: reset-controller@f00008a0 { + compatible = "snps,hsdk-reset"; + #reset-cells = <1>; + reg = <0xf00008a0 0x4>, <0xf0000ff0 0x4>; + }; + + uart0: serial0@f0005000 { + compatible = "snps,dw-apb-uart"; + reg = <0xf0005000 0x1000>; + reg-shift = <2>; + reg-io-width = <4>; + }; + + ethernet@f0008000 { + #interrupt-cells = <1>; + compatible = "snps,arc-dwmac-3.70a"; + reg = <0xf0008000 0x2000>; + phy-mode = "gmii"; + }; + + ehci@0xf0040000 { + compatible = "generic-ehci"; + reg = <0xf0040000 0x100>; + }; + + ohci@0xf0060000 { + compatible = "generic-ohci"; + reg = <0xf0060000 0x100>; + }; + + mmcclk_ciu: mmcclk-ciu { + compatible = "fixed-clock"; + /* + * DW sdio controller has external ciu clock divider + * controlled via register in SDIO IP. Due to its + * unexpected default value (it should divide by 1 + * but it divides by 8) SDIO IP uses wrong clock and + * works unstable (see STAR 9001204800) + * We switched to the minimum possible value of the + * divisor (div-by-2) in HSDK platform code. + * So default mmcclk ciu clock is 50000000 Hz. + */ + clock-frequency = <50000000>; + #clock-cells = <0>; + }; + + mmc: mmc0@f000a000 { + compatible = "snps,dw-mshc"; + reg = <0xf000a000 0x400>; + bus-width = <4>; + fifo-depth = <256>; + clocks = <&cgu_clk CLK_SYS_SDIO>, <&mmcclk_ciu>; + clock-names = "biu", "ciu"; + max-frequency = <25000000>; + }; + + spi0: spi@f0020000 { + compatible = "snps,dw-apb-ssi"; + reg = <0xf0020000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <4000000>; + clocks = <&cgu_clk CLK_SYS_SPI_REF>; + clock-names = "spi_clk"; + cs-gpio = <&cs_gpio 0>; + spi_flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <4000000>; + }; + }; + + cs_gpio: gpio@f00014b0 { + compatible = "snps,creg-gpio"; + reg = <0xf00014b0 0x4>; + gpio-controller; + #gpio-cells = <1>; + gpio-bank-name = "hsdk-spi-cs"; + gpio-count = <1>; + gpio-first-shift = <0>; + gpio-bit-per-line = <2>; + gpio-activate-val = <2>; + gpio-deactivate-val = <3>; + gpio-default-val = <1>; + }; +}; diff --git a/arch/arc/dts/hsdk.dts b/arch/arc/dts/hsdk.dts index cf2ce8a1f6c..1a2e3d43228 100644 --- a/arch/arc/dts/hsdk.dts +++ b/arch/arc/dts/hsdk.dts @@ -1,151 +1,12 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017 Synopsys, Inc. All rights reserved. + * Copyright (C) 2017-2020 Synopsys, Inc. All rights reserved. + * Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> */ /dts-v1/; -#include "skeleton.dtsi" -#include "dt-bindings/clock/snps,hsdk-cgu.h" -#include "dt-bindings/reset/snps,hsdk-reset.h" +#include "hsdk-common.dtsi" / { model = "snps,hsdk"; - - #address-cells = <1>; - #size-cells = <1>; - - aliases { - console = &uart0; - spi0 = &spi0; - }; - - cpu_card { - core_clk: core_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <500000000>; - u-boot,dm-pre-reloc; - }; - }; - - clk-fmeas { - clocks = <&cgu_clk CLK_ARC_PLL>, <&cgu_clk CLK_SYS_PLL>, - <&cgu_clk CLK_TUN_PLL>, <&cgu_clk CLK_DDR_PLL>, - <&cgu_clk CLK_ARC>, <&cgu_clk CLK_HDMI_PLL>, - <&cgu_clk CLK_TUN_TUN>, <&cgu_clk CLK_HDMI>, - <&cgu_clk CLK_SYS_APB>, <&cgu_clk CLK_SYS_AXI>, - <&cgu_clk CLK_SYS_ETH>, <&cgu_clk CLK_SYS_USB>, - <&cgu_clk CLK_SYS_SDIO>, <&cgu_clk CLK_SYS_HDMI>, - <&cgu_clk CLK_SYS_GFX_CORE>, <&cgu_clk CLK_SYS_GFX_DMA>, - <&cgu_clk CLK_SYS_GFX_CFG>, <&cgu_clk CLK_SYS_DMAC_CORE>, - <&cgu_clk CLK_SYS_DMAC_CFG>, <&cgu_clk CLK_SYS_SDIO_REF>, - <&cgu_clk CLK_SYS_SPI_REF>, <&cgu_clk CLK_SYS_I2C_REF>, - <&cgu_clk CLK_SYS_UART_REF>, <&cgu_clk CLK_SYS_EBI_REF>, - <&cgu_clk CLK_TUN_ROM>, <&cgu_clk CLK_TUN_PWM>; - clock-names = "cpu-pll", "sys-pll", - "tun-pll", "ddr-clk", - "cpu-clk", "hdmi-pll", - "tun-clk", "hdmi-clk", - "apb-clk", "axi-clk", - "eth-clk", "usb-clk", - "sdio-clk", "hdmi-sys-clk", - "gfx-core-clk", "gfx-dma-clk", - "gfx-cfg-clk", "dmac-core-clk", - "dmac-cfg-clk", "sdio-ref-clk", - "spi-clk", "i2c-clk", - "uart-clk", "ebi-clk", - "rom-clk", "pwm-clk"; - }; - - cgu_clk: cgu-clk@f0000000 { - compatible = "snps,hsdk-cgu-clock"; - reg = <0xf0000000 0x10>, <0xf00014B8 0x4>; - #clock-cells = <1>; - }; - - cgu_rst: reset-controller@f00008a0 { - compatible = "snps,hsdk-reset"; - #reset-cells = <1>; - reg = <0xf00008a0 0x4>, <0xf0000ff0 0x4>; - }; - - uart0: serial0@f0005000 { - compatible = "snps,dw-apb-uart"; - reg = <0xf0005000 0x1000>; - reg-shift = <2>; - reg-io-width = <4>; - }; - - ethernet@f0008000 { - #interrupt-cells = <1>; - compatible = "snps,arc-dwmac-3.70a"; - reg = <0xf0008000 0x2000>; - phy-mode = "gmii"; - }; - - ehci@0xf0040000 { - compatible = "generic-ehci"; - reg = <0xf0040000 0x100>; - }; - - ohci@0xf0060000 { - compatible = "generic-ohci"; - reg = <0xf0060000 0x100>; - }; - - mmcclk_ciu: mmcclk-ciu { - compatible = "fixed-clock"; - /* - * DW sdio controller has external ciu clock divider - * controlled via register in SDIO IP. Due to its - * unexpected default value (it should divide by 1 - * but it divides by 8) SDIO IP uses wrong clock and - * works unstable (see STAR 9001204800) - * We switched to the minimum possible value of the - * divisor (div-by-2) in HSDK platform code. - * So default mmcclk ciu clock is 50000000 Hz. - */ - clock-frequency = <50000000>; - #clock-cells = <0>; - }; - - mmc: mmc0@f000a000 { - compatible = "snps,dw-mshc"; - reg = <0xf000a000 0x400>; - bus-width = <4>; - fifo-depth = <256>; - clocks = <&cgu_clk CLK_SYS_SDIO>, <&mmcclk_ciu>; - clock-names = "biu", "ciu"; - max-frequency = <25000000>; - }; - - spi0: spi@f0020000 { - compatible = "snps,dw-apb-ssi"; - reg = <0xf0020000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - spi-max-frequency = <4000000>; - clocks = <&cgu_clk CLK_SYS_SPI_REF>; - clock-names = "spi_clk"; - cs-gpio = <&cs_gpio 0>; - spi_flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <4000000>; - }; - }; - - cs_gpio: gpio@f00014b0 { - compatible = "snps,creg-gpio"; - reg = <0xf00014b0 0x4>; - gpio-controller; - #gpio-cells = <1>; - gpio-bank-name = "hsdk-spi-cs"; - gpio-count = <1>; - gpio-first-shift = <0>; - gpio-bit-per-line = <2>; - gpio-activate-val = <2>; - gpio-deactivate-val = <3>; - gpio-default-val = <1>; - }; }; diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h index fff6591c681..516c14e105b 100644 --- a/arch/arc/include/asm/arcregs.h +++ b/arch/arc/include/asm/arcregs.h @@ -51,6 +51,9 @@ #define ARC_AUX_DCCM_BASE 0x18 /* DCCM Base Addr ARCv2 */ #define ARC_AUX_ICCM_BASE 0x208 /* ICCM Base Addr ARCv2 */ +/* CSM auxiliary registers */ +#define ARC_AUX_CSM_ENABLE 0x9A0 + /* Timer related auxiliary registers */ #define ARC_AUX_TIMER0_CNT 0x21 /* Timer 0 count */ #define ARC_AUX_TIMER0_CTRL 0x22 /* Timer 0 control */ @@ -100,6 +103,7 @@ /* DSP-extensions related auxiliary registers */ #define ARC_AUX_DSP_BUILD 0x7A +#define ARC_AUX_DSP_CTRL 0x59F /* ARC Subsystems related auxiliary registers */ #define ARC_AUX_SUBSYS_BUILD 0xF0 diff --git a/arch/arc/lib/start.S b/arch/arc/lib/start.S index 8c744f5be7f..016ae85be23 100644 --- a/arch/arc/lib/start.S +++ b/arch/arc/lib/start.S @@ -61,6 +61,21 @@ ENTRY(_start) 1: #endif +#ifdef CONFIG_ISA_ARCV2 + ; In case of DSP extension presence in HW some instructions + ; (related to integer multiply, multiply-accumulate, and divide + ; operation) executes on this DSP execution unit. So their + ; execution will depend on dsp configuration register (DSP_CTRL) + ; As we want these instructions to execute the same way regardless + ; of DSP presence we need to set DSP_CTRL properly. + lr r5, [ARC_AUX_DSP_BUILD] + bmsk r5, r5, 7 + breq r5, 0, 1f + mov r5, 0 + sr r5, [ARC_AUX_DSP_CTRL] +1: +#endif + #ifdef __ARC_UNALIGNED__ /* * Enable handling of unaligned access in the CPU as by default diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index b25639183f8..2f75b2cdd32 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -46,6 +46,7 @@ config ARCH_LS1028A select SYS_FSL_ERRATUM_A009663 if !TFABOOT select SYS_FSL_ERRATUM_A009942 if !TFABOOT select SYS_FSL_ERRATUM_A050382 + select RESV_RAM if GIC_V3_ITS imply PANIC_HANG config ARCH_LS1043A @@ -152,6 +153,7 @@ config ARCH_LS1088A select SYS_I2C_MXC_I2C2 if !TFABOOT select SYS_I2C_MXC_I2C3 if !TFABOOT select SYS_I2C_MXC_I2C4 if !TFABOOT + select RESV_RAM if GIC_V3_ITS imply SCSI imply PANIC_HANG @@ -202,6 +204,7 @@ config ARCH_LS2080A select SYS_I2C_MXC_I2C2 if !TFABOOT select SYS_I2C_MXC_I2C3 if !TFABOOT select SYS_I2C_MXC_I2C4 if !TFABOOT + select RESV_RAM if GIC_V3_ITS imply DISTRO_DEFAULTS imply PANIC_HANG @@ -229,6 +232,7 @@ config ARCH_LX2160A select ARCH_EARLY_INIT_R select BOARD_EARLY_INIT_F select SYS_I2C_MXC + select RESV_RAM if GIC_V3_ITS imply DISTRO_DEFAULTS imply PANIC_HANG imply SCSI diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index b4438944536..b3f5c2f641f 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -1156,8 +1156,10 @@ int arch_early_init_r(void) fsl_rgmii_init(); #endif #ifdef CONFIG_FMAN_ENET +#ifndef CONFIG_DM_ETH fman_enet_init(); #endif +#endif #ifdef CONFIG_SYS_DPAA_QBMAN setup_qbman_portals(); #endif @@ -1379,7 +1381,7 @@ static int tfa_dram_init_banksize(void) if (i > 0) ret = 0; -#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_RESV_RAM) && !defined(CONFIG_SPL_BUILD) /* Assign memory for MC */ #ifdef CONFIG_SYS_DDR_BLOCK3_BASE if (gd->bd->bi_dram[2].size >= @@ -1402,7 +1404,7 @@ static int tfa_dram_init_banksize(void) board_reserve_ram_top(gd->bd->bi_dram[0].size); } } -#endif /* CONFIG_FSL_MC_ENET */ +#endif /* CONFIG_RESV_RAM */ return ret; } @@ -1465,7 +1467,7 @@ int dram_init_banksize(void) } #endif /* CONFIG_SYS_MEM_RESERVE_SECURE */ -#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_RESV_RAM) && !defined(CONFIG_SPL_BUILD) /* Assign memory for MC */ #ifdef CONFIG_SYS_DDR_BLOCK3_BASE if (gd->bd->bi_dram[2].size >= @@ -1488,7 +1490,7 @@ int dram_init_banksize(void) board_reserve_ram_top(gd->bd->bi_dram[0].size); } } -#endif /* CONFIG_FSL_MC_ENET */ +#endif /* CONFIG_RESV_RAM */ #ifdef CONFIG_SYS_DP_DDR_BASE_PHY #ifdef CONFIG_SYS_DDR_BLOCK3_BASE diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c index 077438765c8..3bbad827cb6 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c @@ -471,6 +471,10 @@ void ft_cpu_setup(void *blob, bd_t *bd) do_fixup_by_path_u32(blob, "/sysclk", "clock-frequency", CONFIG_SYS_CLK_FREQ, 1); +#ifdef CONFIG_GIC_V3_ITS + ls_gic_rd_tables_init(blob); +#endif + #if defined(CONFIG_PCIE_LAYERSCAPE) || defined(CONFIG_PCIE_LAYERSCAPE_GEN4) ft_pci_setup(blob, bd); #endif diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index d0e10cb007b..28bb1d74014 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -6,10 +6,12 @@ #include <common.h> #include <clock_legacy.h> +#include <cpu_func.h> #include <env.h> #include <fsl_immap.h> #include <fsl_ifc.h> #include <init.h> +#include <linux/sizes.h> #include <asm/arch/fsl_serdes.h> #include <asm/arch/soc.h> #include <asm/io.h> @@ -17,6 +19,7 @@ #include <asm/arch-fsl-layerscape/config.h> #include <asm/arch-fsl-layerscape/ns_access.h> #include <asm/arch-fsl-layerscape/fsl_icid.h> +#include <asm/gic-v3.h> #ifdef CONFIG_LAYERSCAPE_NS_ACCESS #include <fsl_csu.h> #endif @@ -30,9 +33,50 @@ #include <fsl_immap.h> #ifdef CONFIG_TFABOOT #include <env_internal.h> +#endif +#if defined(CONFIG_TFABOOT) || defined(CONFIG_GIC_V3_ITS) DECLARE_GLOBAL_DATA_PTR; #endif +#ifdef CONFIG_GIC_V3_ITS +#define PENDTABLE_MAX_SZ ALIGN(BIT(ITS_MAX_LPI_NRBITS), SZ_64K) +#define PROPTABLE_MAX_SZ ALIGN(BIT(ITS_MAX_LPI_NRBITS) / 8, SZ_64K) +#define GIC_LPI_SIZE ALIGN(cpu_numcores() * PENDTABLE_MAX_SZ + \ + PROPTABLE_MAX_SZ, SZ_1M) +static int fdt_add_resv_mem_gic_rd_tables(void *blob, u64 base, size_t size) +{ + u32 phandle; + int err; + struct fdt_memory gic_rd_tables; + + gic_rd_tables.start = base; + gic_rd_tables.end = base + size - 1; + err = fdtdec_add_reserved_memory(blob, "gic-rd-tables", &gic_rd_tables, + &phandle); + if (err < 0) + debug("%s: failed to add reserved memory: %d\n", __func__, err); + + return err; +} + +int ls_gic_rd_tables_init(void *blob) +{ + u64 gic_lpi_base; + int ret; + + gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K); + ret = fdt_add_resv_mem_gic_rd_tables(blob, gic_lpi_base, GIC_LPI_SIZE); + if (ret) + return ret; + + ret = gic_lpi_tables_init(gic_lpi_base, cpu_numcores()); + if (ret) + debug("%s: failed to init gic-lpi-tables\n", __func__); + + return ret; +} +#endif + bool soc_has_dp_ddr(void) { struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index af7d804b666..2c123bd6da6 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -377,7 +377,8 @@ dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \ fsl-ls1088a-rdb.dtb \ fsl-ls1088a-qds.dtb \ fsl-ls1028a-rdb.dtb \ - fsl-ls1028a-qds.dtb \ + fsl-ls1028a-qds-duart.dtb \ + fsl-ls1028a-qds-lpuart.dtb \ fsl-lx2160a-rdb.dtb \ fsl-lx2160a-qds.dtb dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \ @@ -748,11 +749,11 @@ dtb-$(CONFIG_RCAR_GEN2) += \ r8a7794-silk-u-boot.dtb dtb-$(CONFIG_RCAR_GEN3) += \ - r8a7795-h3ulcb-u-boot.dtb \ - r8a7795-salvator-x-u-boot.dtb \ - r8a7796-m3ulcb-u-boot.dtb \ - r8a7796-salvator-x-u-boot.dtb \ - r8a77965-m3nulcb-u-boot.dtb \ + r8a77950-ulcb-u-boot.dtb \ + r8a77950-salvator-x-u-boot.dtb \ + r8a77960-ulcb-u-boot.dtb \ + r8a77960-salvator-x-u-boot.dtb \ + r8a77965-ulcb-u-boot.dtb \ r8a77965-salvator-x-u-boot.dtb \ r8a77970-eagle-u-boot.dtb \ r8a77980-condor-u-boot.dtb \ diff --git a/arch/arm/dts/fsl-ls1028a-qds-duart.dts b/arch/arm/dts/fsl-ls1028a-qds-duart.dts new file mode 100644 index 00000000000..83264e0f544 --- /dev/null +++ b/arch/arm/dts/fsl-ls1028a-qds-duart.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Device Tree file for Freescale Layerscape-1028AQDS family SoC. + * + * Copyright 2020 NXP + */ + +/dts-v1/; +#include "fsl-ls1028a-qds.dtsi" + +/ { + chosen { + stdout-path = &serial0; + }; +}; diff --git a/arch/arm/dts/fsl-ls1028a-qds-lpuart.dts b/arch/arm/dts/fsl-ls1028a-qds-lpuart.dts new file mode 100644 index 00000000000..063857b2f2b --- /dev/null +++ b/arch/arm/dts/fsl-ls1028a-qds-lpuart.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Device Tree file for Freescale Layerscape-1028AQDS family SoC. + * + * Copyright 2020 NXP + */ + +/dts-v1/; +#include "fsl-ls1028a-qds.dtsi" + +/ { + chosen { + stdout-path = &lpuart0; + }; +}; diff --git a/arch/arm/dts/fsl-ls1028a-qds.dts b/arch/arm/dts/fsl-ls1028a-qds.dtsi index 029a8e386b1..4f56f40bd32 100644 --- a/arch/arm/dts/fsl-ls1028a-qds.dts +++ b/arch/arm/dts/fsl-ls1028a-qds.dtsi @@ -151,6 +151,10 @@ status = "okay"; }; +&lpuart0 { + status = "okay"; +}; + &sata { status = "okay"; }; diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi index 5365bfb1a8e..9911690e5cf 100644 --- a/arch/arm/dts/fsl-ls1028a.dtsi +++ b/arch/arm/dts/fsl-ls1028a.dtsi @@ -240,6 +240,66 @@ status = "disabled"; }; + lpuart0: serial@2260000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x2260000 0x0 0x1000>; + interrupts = <0 232 0x4>; + clocks = <&sysclk>; + clock-names = "ipg"; + little-endian; + status = "disabled"; + }; + + lpuart1: serial@2270000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x2270000 0x0 0x1000>; + interrupts = <0 233 0x4>; + clocks = <&sysclk>; + clock-names = "ipg"; + little-endian; + status = "disabled"; + }; + + lpuart2: serial@2280000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x2280000 0x0 0x1000>; + interrupts = <0 234 0x4>; + clocks = <&sysclk>; + clock-names = "ipg"; + little-endian; + status = "disabled"; + }; + + lpuart3: serial@2290000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x2290000 0x0 0x1000>; + interrupts = <0 235 0x4>; + clocks = <&sysclk>; + clock-names = "ipg"; + little-endian; + status = "disabled"; + }; + + lpuart4: serial@22a0000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x22a0000 0x0 0x1000>; + interrupts = <0 236 0x4>; + clocks = <&sysclk>; + clock-names = "ipg"; + little-endian; + status = "disabled"; + }; + + lpuart5: serial@22b0000 { + compatible = "fsl,ls1021a-lpuart"; + reg = <0x0 0x22b0000 0x0 0x1000>; + interrupts = <0 237 0x4>; + clocks = <&sysclk>; + clock-names = "ipg"; + little-endian; + status = "disabled"; + }; + usb1: usb3@3100000 { compatible = "fsl,layerscape-dwc3"; reg = <0x0 0x3100000 0x0 0x10000>; diff --git a/arch/arm/dts/fsl-ls1043-post.dtsi b/arch/arm/dts/fsl-ls1043-post.dtsi new file mode 100644 index 00000000000..e4eab9e5c68 --- /dev/null +++ b/arch/arm/dts/fsl-ls1043-post.dtsi @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * QorIQ FMan v3 device tree nodes for ls1043 + * + * Copyright 2015-2016 Freescale Semiconductor Inc. + * Copyright 2020 NXP + * + */ + +&soc { + +/* include used FMan blocks */ +#include "qoriq-fman3-0.dtsi" +#include "qoriq-fman3-0-1g-0.dtsi" +#include "qoriq-fman3-0-1g-1.dtsi" +#include "qoriq-fman3-0-1g-2.dtsi" +#include "qoriq-fman3-0-1g-3.dtsi" +#include "qoriq-fman3-0-1g-4.dtsi" +#include "qoriq-fman3-0-1g-5.dtsi" +#include "qoriq-fman3-0-10g-0.dtsi" + +}; + +&fman0 { + fsl,erratum-a050385; + + /* these aliases provide the FMan ports mapping */ + enet0: ethernet@e0000 { + }; + + enet1: ethernet@e2000 { + }; + + enet2: ethernet@e4000 { + }; + + enet3: ethernet@e6000 { + }; + + enet4: ethernet@e8000 { + }; + + enet5: ethernet@ea000 { + }; + + enet6: ethernet@f0000 { + }; +}; diff --git a/arch/arm/dts/fsl-ls1043a-rdb.dts b/arch/arm/dts/fsl-ls1043a-rdb.dts index 721b158169d..6e4ea5b40c7 100644 --- a/arch/arm/dts/fsl-ls1043a-rdb.dts +++ b/arch/arm/dts/fsl-ls1043a-rdb.dts @@ -3,6 +3,7 @@ * Device Tree Include file for Freescale Layerscape-1043A family SoC. * * Copyright (C) 2015, Freescale Semiconductor + * Copyright 2020 NXP * * Mingkai Hu <Mingkai.hu@freescale.com> */ @@ -98,3 +99,83 @@ &duart1 { status = "okay"; }; + +#include "fsl-ls1043-post.dtsi" + +&fman0 { + ethernet@e0000 { + phy-handle = <&qsgmii_phy1>; + phy-connection-type = "qsgmii"; + status = "okay"; + }; + + ethernet@e2000 { + phy-handle = <&qsgmii_phy2>; + phy-connection-type = "qsgmii"; + status = "okay"; + }; + + ethernet@e4000 { + phy-handle = <&rgmii_phy1>; + phy-connection-type = "rgmii-txid"; + status = "okay"; + }; + + ethernet@e6000 { + phy-handle = <&rgmii_phy2>; + phy-connection-type = "rgmii-txid"; + status = "okay"; + }; + + ethernet@e8000 { + phy-handle = <&qsgmii_phy3>; + phy-connection-type = "qsgmii"; + status = "okay"; + }; + + ethernet@ea000 { + phy-handle = <&qsgmii_phy4>; + phy-connection-type = "qsgmii"; + status = "okay"; + }; + + ethernet@f0000 { /* 10GEC1 */ + phy-handle = <&aqr105_phy>; + phy-connection-type = "xgmii"; + status = "okay"; + }; + + mdio@fc000 { + rgmii_phy1: ethernet-phy@1 { + reg = <0x1>; + }; + + rgmii_phy2: ethernet-phy@2 { + reg = <0x2>; + }; + + qsgmii_phy1: ethernet-phy@4 { + reg = <0x4>; + }; + + qsgmii_phy2: ethernet-phy@5 { + reg = <0x5>; + }; + + qsgmii_phy3: ethernet-phy@6 { + reg = <0x6>; + }; + + qsgmii_phy4: ethernet-phy@7 { + reg = <0x7>; + }; + }; + + mdio@fd000 { + aqr105_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c45"; + interrupts = <0 132 4>; + reg = <0x1>; + }; + }; +}; diff --git a/arch/arm/dts/fsl-ls1043a.dtsi b/arch/arm/dts/fsl-ls1043a.dtsi index b159c3ca732..0a959f0f2d2 100644 --- a/arch/arm/dts/fsl-ls1043a.dtsi +++ b/arch/arm/dts/fsl-ls1043a.dtsi @@ -31,7 +31,7 @@ interrupts = <1 9 0xf08>; }; - soc { + soc: soc { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; diff --git a/arch/arm/dts/fsl-ls1046-post.dtsi b/arch/arm/dts/fsl-ls1046-post.dtsi new file mode 100644 index 00000000000..2dac6a05f7e --- /dev/null +++ b/arch/arm/dts/fsl-ls1046-post.dtsi @@ -0,0 +1,49 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * QorIQ FMan v3 device tree nodes for ls1046 + * + * Copyright 2015-2016 Freescale Semiconductor Inc. + * Copyright 2020 NXP + * + */ + +&soc { + +/* include used FMan blocks */ +#include "qoriq-fman3-0.dtsi" +#include "qoriq-fman3-0-1g-0.dtsi" +#include "qoriq-fman3-0-1g-1.dtsi" +#include "qoriq-fman3-0-1g-2.dtsi" +#include "qoriq-fman3-0-1g-3.dtsi" +#include "qoriq-fman3-0-1g-4.dtsi" +#include "qoriq-fman3-0-1g-5.dtsi" +#include "qoriq-fman3-0-10g-0.dtsi" +#include "qoriq-fman3-0-10g-1.dtsi" +}; + +&fman0 { + /* these aliases provide the FMan ports mapping */ + enet0: ethernet@e0000 { + }; + + enet1: ethernet@e2000 { + }; + + enet2: ethernet@e4000 { + }; + + enet3: ethernet@e6000 { + }; + + enet4: ethernet@e8000 { + }; + + enet5: ethernet@ea000 { + }; + + enet6: ethernet@f0000 { + }; + + enet7: ethernet@f2000 { + }; +}; diff --git a/arch/arm/dts/fsl-ls1046a-rdb.dts b/arch/arm/dts/fsl-ls1046a-rdb.dts index 83e34ab02ad..cac65a7afad 100644 --- a/arch/arm/dts/fsl-ls1046a-rdb.dts +++ b/arch/arm/dts/fsl-ls1046a-rdb.dts @@ -3,6 +3,7 @@ * Device Tree Include file for Freescale Layerscape-1046A family SoC. * * Copyright 2016, Freescale Semiconductor + * Copyright 2020 NXP * * Mingkai Hu <Mingkai.hu@freescale.com> */ @@ -51,3 +52,69 @@ &i2c3 { status = "okay"; }; + +#include "fsl-ls1046-post.dtsi" + +&fman0 { + ethernet@e4000 { + phy-handle = <&rgmii_phy1>; + phy-connection-type = "rgmii-id"; + status = "okay"; + }; + + ethernet@e6000 { + phy-handle = <&rgmii_phy2>; + phy-connection-type = "rgmii-id"; + status = "okay"; + }; + + ethernet@e8000 { + phy-handle = <&sgmii_phy1>; + phy-connection-type = "sgmii"; + status = "okay"; + }; + + ethernet@ea000 { + phy-handle = <&sgmii_phy2>; + phy-connection-type = "sgmii"; + status = "okay"; + }; + + ethernet@f0000 { /* 10GEC1 */ + phy-handle = <&aqr106_phy>; + phy-connection-type = "xgmii"; + status = "okay"; + }; + + ethernet@f2000 { /* 10GEC2 */ + fixed-link = <0 1 1000 0 0>; + phy-connection-type = "xgmii"; + status = "okay"; + }; + + mdio@fc000 { + rgmii_phy1: ethernet-phy@1 { + reg = <0x1>; + }; + + rgmii_phy2: ethernet-phy@2 { + reg = <0x2>; + }; + + sgmii_phy1: ethernet-phy@3 { + reg = <0x3>; + }; + + sgmii_phy2: ethernet-phy@4 { + reg = <0x4>; + }; + }; + + mdio@fd000 { + aqr106_phy: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c45"; + interrupts = <0 131 4>; + reg = <0x0>; + }; + }; +}; diff --git a/arch/arm/dts/fsl-ls1046a.dtsi b/arch/arm/dts/fsl-ls1046a.dtsi index fdf93fd2681..4e91d5c9956 100644 --- a/arch/arm/dts/fsl-ls1046a.dtsi +++ b/arch/arm/dts/fsl-ls1046a.dtsi @@ -31,7 +31,7 @@ interrupts = <1 9 0xf08>; }; - soc { + soc: soc { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; diff --git a/arch/arm/dts/fsl-ls1088a-rdb.dts b/arch/arm/dts/fsl-ls1088a-rdb.dts index 0fe351973dc..46a5780547f 100644 --- a/arch/arm/dts/fsl-ls1088a-rdb.dts +++ b/arch/arm/dts/fsl-ls1088a-rdb.dts @@ -17,6 +17,108 @@ }; }; +&dpmac1 { + status = "okay"; + phy-connection-type = "xgmii"; +}; + +&dpmac2 { + status = "okay"; + phy-handle = <&mdio2_phy1>; + phy-connection-type = "xgmii"; +}; + +&dpmac3 { + status = "okay"; + phy-handle = <&mdio1_phy5>; + phy-connection-type = "qsgmii"; +}; + +&dpmac4 { + status = "okay"; + phy-handle = <&mdio1_phy6>; + phy-connection-type = "qsgmii"; +}; + +&dpmac5 { + status = "okay"; + phy-handle = <&mdio1_phy7>; + phy-connection-type = "qsgmii"; +}; + +&dpmac6 { + status = "okay"; + phy-handle = <&mdio1_phy8>; + phy-connection-type = "qsgmii"; +}; + +&dpmac7 { + status = "okay"; + phy-handle = <&mdio1_phy1>; + phy-connection-type = "qsgmii"; +}; + +&dpmac8 { + status = "okay"; + phy-handle = <&mdio1_phy2>; + phy-connection-type = "qsgmii"; +}; + +&dpmac9 { + status = "okay"; + phy-handle = <&mdio1_phy3>; + phy-connection-type = "qsgmii"; +}; + +&dpmac10 { + status = "okay"; + phy-handle = <&mdio1_phy4>; + phy-connection-type = "qsgmii"; +}; + +&emdio1 { + status = "okay"; + + /* Freescale F104 PHY1 */ + mdio1_phy1: emdio1_phy@1 { + reg = <0x1c>; + }; + mdio1_phy2: emdio1_phy@2 { + reg = <0x1d>; + }; + mdio1_phy3: emdio1_phy@3 { + reg = <0x1e>; + }; + mdio1_phy4: emdio1_phy@4 { + reg = <0x1f>; + }; + + /* F104 PHY2 */ + mdio1_phy5: emdio1_phy@5 { + reg = <0x0c>; + }; + mdio1_phy6: emdio1_phy@6 { + reg = <0x0d>; + }; + mdio1_phy7: emdio1_phy@7 { + reg = <0x0e>; + }; + mdio1_phy8: emdio1_phy@8 { + reg = <0x0f>; + }; +}; + +&emdio2 { + status = "okay"; + + /* Aquantia AQR105 10G PHY */ + mdio2_phy1: emdio2_phy@1 { + compatible = "ethernet-phy-ieee802.3-c45"; + interrupts = <0 2 0x4>; + reg = <0x0>; + }; +}; + &i2c0 { status = "okay"; u-boot,dm-pre-reloc; diff --git a/arch/arm/dts/fsl-ls1088a.dtsi b/arch/arm/dts/fsl-ls1088a.dtsi index abc8b21a112..133cacb93e3 100644 --- a/arch/arm/dts/fsl-ls1088a.dtsi +++ b/arch/arm/dts/fsl-ls1088a.dtsi @@ -82,12 +82,6 @@ interrupts = <0 32 0x1>; /* edge triggered */ }; - fsl_mc: fsl-mc@80c000000 { - compatible = "fsl,qoriq-mc"; - reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */ - <0x00000000 0x08340000 0 0x40000>; /* MC control reg */ - }; - dspi: dspi@2100000 { compatible = "fsl,vf610-dspi"; #address-cells = <1>; @@ -197,4 +191,100 @@ method = "smc"; }; + fsl_mc: fsl-mc@80c000000 { + compatible = "fsl,qoriq-mc", "simple-mfd"; + reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */ + <0x00000000 0x08340000 0 0x40000>; /* MC control reg */ + #address-cells = <3>; + #size-cells = <1>; + + /* + * Region type 0x0 - MC portals + * Region type 0x1 - QBMAN portals + */ + ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000 + 0x1 0x0 0x0 0x8 0x18000000 0x8000000>; + + dpmacs { + compatible = "simple-mfd"; + #address-cells = <1>; + #size-cells = <0>; + + dpmac1: dpmac@1 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x1>; + status = "disabled"; + }; + + dpmac2: dpmac@2 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x2>; + status = "disabled"; + }; + + dpmac3: dpmac@3 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x3>; + status = "disabled"; + }; + + dpmac4: dpmac@4 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x4>; + status = "disabled"; + }; + + dpmac5: dpmac@5 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x5>; + status = "disabled"; + }; + + dpmac6: dpmac@6 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x6>; + status = "disabled"; + }; + + dpmac7: dpmac@7 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x7>; + status = "disabled"; + }; + + dpmac8: dpmac@8 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x8>; + status = "disabled"; + }; + + dpmac9: dpmac@9 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x9>; + status = "disabled"; + }; + + dpmac10: dpmac@a { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0xa>; + status = "disabled"; + }; + }; + }; + + emdio1: mdio@8B96000 { + compatible = "fsl,ls-mdio"; + reg = <0x0 0x8B96000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + emdio2: mdio@8B97000 { + compatible = "fsl,ls-mdio"; + reg = <0x0 0x8B97000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; diff --git a/arch/arm/dts/fsl-ls2080a.dtsi b/arch/arm/dts/fsl-ls2080a.dtsi index 99ed33af95b..fb5777e268e 100644 --- a/arch/arm/dts/fsl-ls2080a.dtsi +++ b/arch/arm/dts/fsl-ls2080a.dtsi @@ -50,12 +50,6 @@ interrupts = <0 32 0x1>; /* edge triggered */ }; - fsl_mc: fsl-mc@80c000000 { - compatible = "fsl,qoriq-mc"; - reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */ - <0x00000000 0x08340000 0 0x40000>; /* MC control reg */ - }; - i2c0: i2c@2000000 { status = "disabled"; compatible = "fsl,vf610-i2c"; @@ -200,4 +194,88 @@ status = "disabled"; }; + fsl_mc: fsl-mc@80c000000 { + compatible = "fsl,qoriq-mc", "simple-mfd"; + reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */ + <0x00000000 0x08340000 0 0x40000>; /* MC control reg */ + #address-cells = <3>; + #size-cells = <1>; + + /* + * Region type 0x0 - MC portals + * Region type 0x1 - QBMAN portals + */ + ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000 + 0x1 0x0 0x0 0x8 0x18000000 0x8000000>; + + dpmacs { + compatible = "simple-mfd"; + #address-cells = <1>; + #size-cells = <0>; + + dpmac1: dpmac@1 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x1>; + status = "disabled"; + }; + + dpmac2: dpmac@2 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x2>; + status = "disabled"; + }; + + dpmac3: dpmac@3 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x3>; + status = "disabled"; + }; + + dpmac4: dpmac@4 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x4>; + status = "disabled"; + }; + + dpmac5: dpmac@5 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x5>; + status = "disabled"; + }; + + dpmac6: dpmac@6 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x6>; + status = "disabled"; + }; + + dpmac7: dpmac@7 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x7>; + status = "disabled"; + }; + + dpmac8: dpmac@8 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x8>; + status = "disabled"; + }; + }; + }; + + emdio1: mdio@8B96000 { + compatible = "fsl,ls-mdio"; + reg = <0x0 0x8B96000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + emdio2: mdio@8B97000 { + compatible = "fsl,ls-mdio"; + reg = <0x0 0x8B97000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; diff --git a/arch/arm/dts/fsl-ls2088a-rdb-qspi.dts b/arch/arm/dts/fsl-ls2088a-rdb-qspi.dts index 72b2177b70d..16b9aeec966 100644 --- a/arch/arm/dts/fsl-ls2088a-rdb-qspi.dts +++ b/arch/arm/dts/fsl-ls2088a-rdb-qspi.dts @@ -21,6 +21,94 @@ }; }; +&dpmac1 { + status = "okay"; + phy-handle = <&mdio1_phy1>; + phy-connection-type = "xfi"; +}; + +&dpmac2 { + status = "okay"; + phy-handle = <&mdio1_phy2>; + phy-connection-type = "xfi"; +}; + +&dpmac3 { + status = "okay"; + phy-handle = <&mdio1_phy3>; + phy-connection-type = "xfi"; +}; + +&dpmac4 { + status = "okay"; + phy-handle = <&mdio1_phy4>; + phy-connection-type = "xfi"; +}; + +&dpmac5 { + status = "okay"; + phy-handle = <&mdio2_phy1>; + phy-connection-type = "xfi"; +}; + +&dpmac6 { + status = "okay"; + phy-handle = <&mdio2_phy2>; + phy-connection-type = "xfi"; +}; + +&dpmac7 { + status = "okay"; + phy-handle = <&mdio2_phy3>; + phy-connection-type = "xfi"; +}; + +&dpmac8 { + status = "okay"; + phy-handle = <&mdio2_phy4>; + phy-connection-type = "xfi"; +}; + +&emdio1 { + status = "okay"; + + /* CS4340 PHYs */ + mdio1_phy1: emdio1_phy@1 { + reg = <0x10>; + }; + mdio1_phy2: emdio1_phy@2 { + reg = <0x11>; + }; + mdio1_phy3: emdio1_phy@3 { + reg = <0x12>; + }; + mdio1_phy4: emdio1_phy@4 { + reg = <0x13>; + }; +}; + +&emdio2 { + status = "okay"; + + /* AQR405 PHYs */ + mdio2_phy1: emdio2_phy@1 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0x0>; + }; + mdio2_phy2: emdio2_phy@2 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0x1>; + }; + mdio2_phy3: emdio2_phy@3 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0x2>; + }; + mdio2_phy4: emdio2_phy@4 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0x3>; + }; +}; + &dspi { bus-num = <0>; status = "okay"; diff --git a/arch/arm/dts/fsl-lx2160a-rdb.dts b/arch/arm/dts/fsl-lx2160a-rdb.dts index 87617ca51f6..d787778de84 100644 --- a/arch/arm/dts/fsl-lx2160a-rdb.dts +++ b/arch/arm/dts/fsl-lx2160a-rdb.dts @@ -21,6 +21,58 @@ }; }; +&dpmac3 { + status = "okay"; + phy-handle = <&aquantia_phy1>; + phy-connection-type = "usxgmii"; +}; + +&dpmac4 { + status = "okay"; + phy-handle = <&aquantia_phy2>; + phy-connection-type = "usxgmii"; +}; + +&dpmac17 { + status = "okay"; + phy-handle = <&rgmii_phy1>; + phy-connection-type = "rgmii-id"; +}; + +&dpmac18 { + status = "okay"; + phy-handle = <&rgmii_phy2>; + phy-connection-type = "rgmii-id"; +}; + +&emdio1 { + status = "okay"; + rgmii_phy1: ethernet-phy@1 { + /* AR8035 PHY - "compatible" property not strictly needed */ + compatible = "ethernet-phy-id004d.d072"; + reg = <0x1>; + /* Poll mode - no "interrupts" property defined */ + }; + rgmii_phy2: ethernet-phy@2 { + /* AR8035 PHY - "compatible" property not strictly needed */ + compatible = "ethernet-phy-id004d.d072"; + reg = <0x2>; + /* Poll mode - no "interrupts" property defined */ + }; + aquantia_phy1: ethernet-phy@4 { + /* AQR107 PHY - "compatible" property not strictly needed */ + compatible = "ethernet-phy-ieee802.3-c45"; + interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; + reg = <0x4>; + }; + aquantia_phy2: ethernet-phy@5 { + /* AQR107 PHY - "compatible" property not strictly needed */ + compatible = "ethernet-phy-ieee802.3-c45"; + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; + reg = <0x5>; + }; +}; + &esdhc0 { status = "okay"; }; diff --git a/arch/arm/dts/fsl-lx2160a.dtsi b/arch/arm/dts/fsl-lx2160a.dtsi index 42ce4379ece..17ecdc569b3 100644 --- a/arch/arm/dts/fsl-lx2160a.dtsi +++ b/arch/arm/dts/fsl-lx2160a.dtsi @@ -363,4 +363,69 @@ bus-range = <0x0 0xff>; ranges = <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; }; + + fsl_mc: fsl-mc@80c000000 { + compatible = "fsl,qoriq-mc", "simple-mfd"; + reg = <0x00000008 0x0c000000 0 0x40>, + <0x00000000 0x08340000 0 0x40000>; + #address-cells = <3>; + #size-cells = <1>; + + /* + * Region type 0x0 - MC portals + * Region type 0x1 - QBMAN portals + */ + ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000 + 0x1 0x0 0x0 0x8 0x18000000 0x8000000>; + + dpmacs { + compatible = "simple-mfd"; + #address-cells = <1>; + #size-cells = <0>; + + dpmac3: dpmac@3 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x3>; + status = "disabled"; + }; + + dpmac4: dpmac@4 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x4>; + status = "disabled"; + }; + + dpmac17: dpmac@11 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x11>; + status = "disabled"; + }; + + dpmac18: dpmac@12 { + compatible = "fsl,qoriq-mc-dpmac"; + reg = <0x12>; + status = "disabled"; + }; + }; + }; + + /* WRIOP0: 0x8b8_0000, E-MDIO1: 0x1_6000 */ + emdio1: mdio@8b96000 { + compatible = "fsl,ls-mdio"; + reg = <0x0 0x8b96000 0x0 0x1000>; + interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + /* WRIOP0: 0x8b8_0000, E-MDIO2: 0x1_7000 */ + emdio2: mdio@8b97000 { + compatible = "fsl,ls-mdio"; + reg = <0x0 0x8b97000 0x0 0x1000>; + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; diff --git a/arch/arm/dts/meson-axg-s400.dts b/arch/arm/dts/meson-axg-s400.dts index 4cd2d595182..cb1360ae121 100644 --- a/arch/arm/dts/meson-axg-s400.dts +++ b/arch/arm/dts/meson-axg-s400.dts @@ -313,15 +313,15 @@ dai-tdm-slot-rx-mask-1 = <1 1>; mclk-fs = <256>; - codec@0 { + codec-0 { sound-dai = <&lineout>; }; - codec@1 { + codec-1 { sound-dai = <&speaker_amp1>; }; - codec@2 { + codec-2 { sound-dai = <&linein>; }; diff --git a/arch/arm/dts/meson-g12-common.dtsi b/arch/arm/dts/meson-g12-common.dtsi index abe04f4ad7d..0882ea215b8 100644 --- a/arch/arm/dts/meson-g12-common.dtsi +++ b/arch/arm/dts/meson-g12-common.dtsi @@ -295,17 +295,9 @@ }; }; - emmc_pins: emmc { + emmc_ctrl_pins: emmc-ctrl { mux-0 { - groups = "emmc_nand_d0", - "emmc_nand_d1", - "emmc_nand_d2", - "emmc_nand_d3", - "emmc_nand_d4", - "emmc_nand_d5", - "emmc_nand_d6", - "emmc_nand_d7", - "emmc_cmd"; + groups = "emmc_cmd"; function = "emmc"; bias-pull-up; drive-strength-microamp = <4000>; @@ -319,6 +311,34 @@ }; }; + emmc_data_4b_pins: emmc-data-4b { + mux-0 { + groups = "emmc_nand_d0", + "emmc_nand_d1", + "emmc_nand_d2", + "emmc_nand_d3"; + function = "emmc"; + bias-pull-up; + drive-strength-microamp = <4000>; + }; + }; + + emmc_data_8b_pins: emmc-data-8b { + mux-0 { + groups = "emmc_nand_d0", + "emmc_nand_d1", + "emmc_nand_d2", + "emmc_nand_d3", + "emmc_nand_d4", + "emmc_nand_d5", + "emmc_nand_d6", + "emmc_nand_d7"; + function = "emmc"; + bias-pull-up; + drive-strength-microamp = <4000>; + }; + }; + emmc_ds_pins: emmc-ds { mux { groups = "emmc_nand_ds"; @@ -573,6 +593,17 @@ }; }; + nor_pins: nor { + mux { + groups = "nor_d", + "nor_q", + "nor_c", + "nor_cs"; + function = "nor"; + bias-disable; + }; + }; + pdm_din0_a_pins: pdm-din0-a { mux { groups = "pdm_din0_a"; @@ -957,6 +988,57 @@ }; }; + spicc0_x_pins: spicc0-x { + mux { + groups = "spi0_mosi_x", + "spi0_miso_x", + "spi0_clk_x"; + function = "spi0"; + drive-strength-microamp = <4000>; + bias-disable; + }; + }; + + spicc0_ss0_x_pins: spicc0-ss0-x { + mux { + groups = "spi0_ss0_x"; + function = "spi0"; + drive-strength-microamp = <4000>; + bias-disable; + }; + }; + + spicc0_c_pins: spicc0-c { + mux { + groups = "spi0_mosi_c", + "spi0_miso_c", + "spi0_ss0_c", + "spi0_clk_c"; + function = "spi0"; + drive-strength-microamp = <4000>; + bias-disable; + }; + }; + + spicc1_pins: spicc1 { + mux { + groups = "spi1_mosi", + "spi1_miso", + "spi1_clk"; + function = "spi1"; + drive-strength-microamp = <4000>; + }; + }; + + spicc1_ss0_pins: spicc1-ss0 { + mux { + groups = "spi1_ss0"; + function = "spi1"; + drive-strength-microamp = <4000>; + bias-disable; + }; + }; + tdm_a_din0_pins: tdm-a-din0 { mux { groups = "tdm_a_din0"; @@ -2051,6 +2133,39 @@ amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>; }; + spicc0: spi@13000 { + compatible = "amlogic,meson-g12a-spicc"; + reg = <0x0 0x13000 0x0 0x44>; + interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clkc CLKID_SPICC0>, + <&clkc CLKID_SPICC0_SCLK>; + clock-names = "core", "pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spicc1: spi@15000 { + compatible = "amlogic,meson-g12a-spicc"; + reg = <0x0 0x15000 0x0 0x44>; + interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clkc CLKID_SPICC1>, + <&clkc CLKID_SPICC1_SCLK>; + clock-names = "core", "pclk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spifc: spi@14000 { + compatible = "amlogic,meson-gxbb-spifc"; + status = "disabled"; + reg = <0x0 0x14000 0x0 0x80>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkc CLKID_CLK81>; + }; + pwm_ef: pwm@19000 { compatible = "amlogic,meson-g12a-ee-pwm"; reg = <0x0 0x19000 0x0 0x20>; @@ -2220,6 +2335,7 @@ dr_mode = "host"; snps,dis_u2_susphy_quirk; snps,quirk-frame-length-adjustment; + snps,parkmode-disable-ss-quirk; }; }; diff --git a/arch/arm/dts/meson-g12.dtsi b/arch/arm/dts/meson-g12.dtsi index 03054c47889..55d39020ec7 100644 --- a/arch/arm/dts/meson-g12.dtsi +++ b/arch/arm/dts/meson-g12.dtsi @@ -56,6 +56,7 @@ <&clkc_audio AUD_CLKID_PDM_DCLK>, <&clkc_audio AUD_CLKID_PDM_SYSCLK>; clock-names = "pclk", "dclk", "sysclk"; + resets = <&clkc_audio AUD_RESET_PDM>; status = "disabled"; }; diff --git a/arch/arm/dts/meson-g12a-sei510.dts b/arch/arm/dts/meson-g12a-sei510.dts index 2ac9e3a43b9..b00d0468c75 100644 --- a/arch/arm/dts/meson-g12a-sei510.dts +++ b/arch/arm/dts/meson-g12a-sei510.dts @@ -269,7 +269,7 @@ dai-tdm-slot-tx-mask-3 = <1 1>; mclk-fs = <256>; - codec@0 { + codec { sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>; }; }; @@ -472,7 +472,7 @@ /* eMMC */ &sd_emmc_c { status = "okay"; - pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; + pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; pinctrl-1 = <&emmc_clk_gate_pins>; pinctrl-names = "default", "clk-gate"; diff --git a/arch/arm/dts/meson-g12a-u200.dts b/arch/arm/dts/meson-g12a-u200.dts index 2a324f0136e..a26bfe72550 100644 --- a/arch/arm/dts/meson-g12a-u200.dts +++ b/arch/arm/dts/meson-g12a-u200.dts @@ -271,7 +271,7 @@ /* eMMC */ &sd_emmc_c { status = "okay"; - pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; + pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; pinctrl-1 = <&emmc_clk_gate_pins>; pinctrl-names = "default", "clk-gate"; diff --git a/arch/arm/dts/meson-g12b-a311d-khadas-vim3-u-boot.dtsi b/arch/arm/dts/meson-g12b-a311d-khadas-vim3-u-boot.dtsi new file mode 100644 index 00000000000..f66eca14b12 --- /dev/null +++ b/arch/arm/dts/meson-g12b-a311d-khadas-vim3-u-boot.dtsi @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 BayLibre, SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + */ + +#include "meson-khadas-vim3-u-boot.dtsi" diff --git a/arch/arm/dts/meson-g12b-khadas-vim3.dtsi b/arch/arm/dts/meson-g12b-khadas-vim3.dtsi index 554863429aa..c33e85fbdab 100644 --- a/arch/arm/dts/meson-g12b-khadas-vim3.dtsi +++ b/arch/arm/dts/meson-g12b-khadas-vim3.dtsi @@ -8,6 +8,8 @@ #include <dt-bindings/sound/meson-g12a-tohdmitx.h> / { + model = "Khadas VIM3"; + vddcpu_a: regulator-vddcpu-a { /* * MP8756GD Regulator. @@ -48,7 +50,7 @@ sound { compatible = "amlogic,axg-sound-card"; - model = "G12A-KHADAS-VIM3"; + model = "G12B-KHADAS-VIM3"; audio-aux-devs = <&tdmout_b>; audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", "TDMOUT_B IN 1", "FRDDR_B OUT 1", diff --git a/arch/arm/dts/meson-g12b-odroid-n2.dts b/arch/arm/dts/meson-g12b-odroid-n2.dts index 0e54c1dc284..169ea283d4e 100644 --- a/arch/arm/dts/meson-g12b-odroid-n2.dts +++ b/arch/arm/dts/meson-g12b-odroid-n2.dts @@ -208,7 +208,7 @@ sound { compatible = "amlogic,axg-sound-card"; - model = "G12A-ODROIDN2"; + model = "G12B-ODROID-N2"; audio-aux-devs = <&tdmout_b>; audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", "TDMOUT_B IN 1", "FRDDR_B OUT 1", @@ -435,7 +435,7 @@ /* eMMC */ &sd_emmc_c { status = "okay"; - pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; + pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; pinctrl-1 = <&emmc_clk_gate_pins>; pinctrl-names = "default", "clk-gate"; @@ -451,6 +451,27 @@ vqmmc-supply = <&flash_1v8>; }; +/* + * EMMC_D4, EMMC_D5, EMMC_D6 and EMMC_D7 pins are shared between SPI NOR pins + * and eMMC Data 4 to 7 pins. + * Replace emmc_data_8b_pins to emmc_data_4b_pins from sd_emmc_c pinctrl-0, + * and change bus-width to 4 then spifc can be enabled. + * The SW1 slide should also be set to the correct position. + */ +&spifc { + status = "disabled"; + pinctrl-0 = <&nor_pins>; + pinctrl-names = "default"; + + mx25u64: spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "mxicy,mx25u6435f", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <104000000>; + }; +}; + &tdmif_b { status = "okay"; }; diff --git a/arch/arm/dts/meson-gx.dtsi b/arch/arm/dts/meson-gx.dtsi index 40db06e28b6..03f79fe045b 100644 --- a/arch/arm/dts/meson-gx.dtsi +++ b/arch/arm/dts/meson-gx.dtsi @@ -12,6 +12,7 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/thermal/thermal.h> / { interrupt-parent = <&gic>; @@ -83,6 +84,7 @@ enable-method = "psci"; next-level-cache = <&l2>; clocks = <&scpi_dvfs 0>; + #cooling-cells = <2>; }; cpu1: cpu@1 { @@ -92,6 +94,7 @@ enable-method = "psci"; next-level-cache = <&l2>; clocks = <&scpi_dvfs 0>; + #cooling-cells = <2>; }; cpu2: cpu@2 { @@ -101,6 +104,7 @@ enable-method = "psci"; next-level-cache = <&l2>; clocks = <&scpi_dvfs 0>; + #cooling-cells = <2>; }; cpu3: cpu@3 { @@ -110,6 +114,7 @@ enable-method = "psci"; next-level-cache = <&l2>; clocks = <&scpi_dvfs 0>; + #cooling-cells = <2>; }; l2: l2-cache0 { @@ -117,6 +122,53 @@ }; }; + thermal-zones { + cpu-thermal { + polling-delay-passive = <250>; /* milliseconds */ + polling-delay = <1000>; /* milliseconds */ + + thermal-sensors = <&scpi_sensors 0>; + + trips { + cpu_passive: cpu-passive { + temperature = <80000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "passive"; + }; + + cpu_hot: cpu-hot { + temperature = <90000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "hot"; + }; + + cpu_critical: cpu-critical { + temperature = <110000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "critical"; + }; + }; + + cpu_cooling_maps: cooling-maps { + map0 { + trip = <&cpu_passive>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + + map1 { + trip = <&cpu_hot>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + }; + arm-pmu { compatible = "arm,cortex-a53-pmu"; interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts b/arch/arm/dts/meson-gxbb-odroidc2.dts index 6ded279c40c..b46ef985bb4 100644 --- a/arch/arm/dts/meson-gxbb-odroidc2.dts +++ b/arch/arm/dts/meson-gxbb-odroidc2.dts @@ -248,6 +248,7 @@ status = "okay"; pinctrl-0 = <&remote_input_ao_pins>; pinctrl-names = "default"; + linux,rc-map-name = "rc-odroid"; }; &gpio_ao { diff --git a/arch/arm/dts/meson-gxl-s905x-p212.dtsi b/arch/arm/dts/meson-gxl-s905x-p212.dtsi index 43eb7d149e3..6ac678f88bd 100644 --- a/arch/arm/dts/meson-gxl-s905x-p212.dtsi +++ b/arch/arm/dts/meson-gxl-s905x-p212.dtsi @@ -15,7 +15,6 @@ / { aliases { serial0 = &uart_AO; - serial1 = &uart_A; ethernet0 = ðmac; }; @@ -180,6 +179,14 @@ pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; pinctrl-names = "default"; uart-has-rtscts; + + bluetooth { + compatible = "brcm,bcm43438-bt"; + shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; + max-speed = <2000000>; + clocks = <&wifi32k>; + clock-names = "lpo"; + }; }; &uart_AO { diff --git a/arch/arm/dts/meson-gxm-khadas-vim2-u-boot.dtsi b/arch/arm/dts/meson-gxm-khadas-vim2-u-boot.dtsi index c35158d7e9e..bec9e05b096 100644 --- a/arch/arm/dts/meson-gxm-khadas-vim2-u-boot.dtsi +++ b/arch/arm/dts/meson-gxm-khadas-vim2-u-boot.dtsi @@ -5,3 +5,18 @@ */ #include "meson-gx-u-boot.dtsi" + +/ { + aliases { + spi0 = &spifc; + }; +}; + +&sd_emmc_c { + status = "okay"; + pinctrl-0 = <&emmc_pins>; +}; + +&spifc { + status = "okay"; +}; diff --git a/arch/arm/dts/meson-gxm-khadas-vim2.dts b/arch/arm/dts/meson-gxm-khadas-vim2.dts index f82f25c1a5f..27eeab71ec7 100644 --- a/arch/arm/dts/meson-gxm-khadas-vim2.dts +++ b/arch/arm/dts/meson-gxm-khadas-vim2.dts @@ -8,7 +8,6 @@ /dts-v1/; #include <dt-bindings/input/input.h> -#include <dt-bindings/thermal/thermal.h> #include "meson-gxm.dtsi" @@ -100,49 +99,6 @@ clock-names = "ext_clock"; }; - thermal-zones { - cpu-thermal { - polling-delay-passive = <250>; /* milliseconds */ - polling-delay = <1000>; /* milliseconds */ - - thermal-sensors = <&scpi_sensors 0>; - - trips { - cpu_alert0: cpu-alert0 { - temperature = <70000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "active"; - }; - - cpu_alert1: cpu-alert1 { - temperature = <80000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "passive"; - }; - }; - - cooling-maps { - map0 { - trip = <&cpu_alert0>; - cooling-device = <&gpio_fan THERMAL_NO_LIMIT 1>; - }; - - map1 { - trip = <&cpu_alert1>; - cooling-device = <&gpio_fan 2 THERMAL_NO_LIMIT>, - <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; - }; - }; - hdmi_5v: regulator-hdmi-5v { compatible = "regulator-fixed"; @@ -198,36 +154,23 @@ hdmi-phandle = <&hdmi_tx>; }; -&cpu0 { - #cooling-cells = <2>; -}; - -&cpu1 { - #cooling-cells = <2>; -}; - -&cpu2 { - #cooling-cells = <2>; -}; -&cpu3 { - #cooling-cells = <2>; -}; - -&cpu4 { - #cooling-cells = <2>; -}; - -&cpu5 { - #cooling-cells = <2>; -}; - -&cpu6 { - #cooling-cells = <2>; -}; +&cpu_cooling_maps { + map0 { + cooling-device = <&gpio_fan THERMAL_NO_LIMIT 1>; + }; -&cpu7 { - #cooling-cells = <2>; + map1 { + cooling-device = <&gpio_fan 2 THERMAL_NO_LIMIT>, + <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; }; ðmac { @@ -327,7 +270,7 @@ #size-cells = <0>; bus-width = <4>; - max-frequency = <50000000>; + max-frequency = <60000000>; non-removable; disable-wp; diff --git a/arch/arm/dts/meson-gxm.dtsi b/arch/arm/dts/meson-gxm.dtsi index 5ff64a0d2dc..b6f89f108e2 100644 --- a/arch/arm/dts/meson-gxm.dtsi +++ b/arch/arm/dts/meson-gxm.dtsi @@ -49,6 +49,7 @@ enable-method = "psci"; next-level-cache = <&l2>; clocks = <&scpi_dvfs 1>; + #cooling-cells = <2>; }; cpu5: cpu@101 { @@ -58,6 +59,7 @@ enable-method = "psci"; next-level-cache = <&l2>; clocks = <&scpi_dvfs 1>; + #cooling-cells = <2>; }; cpu6: cpu@102 { @@ -67,6 +69,7 @@ enable-method = "psci"; next-level-cache = <&l2>; clocks = <&scpi_dvfs 1>; + #cooling-cells = <2>; }; cpu7: cpu@103 { @@ -76,6 +79,7 @@ enable-method = "psci"; next-level-cache = <&l2>; clocks = <&scpi_dvfs 1>; + #cooling-cells = <2>; }; }; }; @@ -124,6 +128,30 @@ compatible = "amlogic,meson-gxm-aoclkc", "amlogic,meson-gx-aoclkc"; }; +&cpu_cooling_maps { + map0 { + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + + map1 { + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; +}; + &saradc { compatible = "amlogic,meson-gxm-saradc", "amlogic,meson-saradc"; }; diff --git a/arch/arm/dts/meson-khadas-vim3-u-boot.dtsi b/arch/arm/dts/meson-khadas-vim3-u-boot.dtsi new file mode 100644 index 00000000000..81fd5be3783 --- /dev/null +++ b/arch/arm/dts/meson-khadas-vim3-u-boot.dtsi @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 BayLibre, SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + */ + +/ { + aliases { + spi0 = &spifc; + }; +}; + +&sd_emmc_c { + status = "okay"; + pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_4b_pins>, <&emmc_ds_pins>; + bus-width = <4>; +}; + +&spifc { + status = "okay"; +}; diff --git a/arch/arm/dts/meson-khadas-vim3.dtsi b/arch/arm/dts/meson-khadas-vim3.dtsi index 90815fa25ec..094ecf2222b 100644 --- a/arch/arm/dts/meson-khadas-vim3.dtsi +++ b/arch/arm/dts/meson-khadas-vim3.dtsi @@ -9,8 +9,6 @@ #include <dt-bindings/gpio/meson-g12a-gpio.h> / { - model = "Khadas VIM3"; - aliases { serial0 = &uart_AO; ethernet0 = ðmac; @@ -312,7 +310,7 @@ /* eMMC */ &sd_emmc_c { status = "okay"; - pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; + pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; pinctrl-1 = <&emmc_clk_gate_pins>; pinctrl-names = "default", "clk-gate"; @@ -328,6 +326,26 @@ vqmmc-supply = <&emmc_1v8>; }; +/* + * EMMC_D4, EMMC_D5, EMMC_D6 and EMMC_D7 pins are shared between SPI NOR CS + * and eMMC Data 4 to 7 pins. + * Replace emmc_data_8b_pins to emmc_data_4b_pins from sd_emmc_c pinctrl-0, + * and change bus-width to 4 then spifc can be enabled. + */ +&spifc { + status = "disabled"; + pinctrl-0 = <&nor_pins>; + pinctrl-names = "default"; + + w25q32: spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "winbond,w25q128fw", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <104000000>; + }; +}; + &uart_A { status = "okay"; pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; diff --git a/arch/arm/dts/meson-sm1-khadas-vim3l-u-boot.dtsi b/arch/arm/dts/meson-sm1-khadas-vim3l-u-boot.dtsi new file mode 100644 index 00000000000..f66eca14b12 --- /dev/null +++ b/arch/arm/dts/meson-sm1-khadas-vim3l-u-boot.dtsi @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 BayLibre, SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + */ + +#include "meson-khadas-vim3-u-boot.dtsi" diff --git a/arch/arm/dts/meson-sm1-khadas-vim3l.dts b/arch/arm/dts/meson-sm1-khadas-vim3l.dts index 1001b376ca4..dbbf29a0dbf 100644 --- a/arch/arm/dts/meson-sm1-khadas-vim3l.dts +++ b/arch/arm/dts/meson-sm1-khadas-vim3l.dts @@ -72,9 +72,10 @@ /* * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between - * an USB3.0 Type A connector and a M.2 Key M slot. The PHY driving - * these differential lines is shared between the USB3.0 controller - * and the PCIe Controller, thus only a single controller can use it. + * an USB3.0 Type A connector and a M.2 Key M slot. + * The PHY driving these differential lines is shared between + * the USB3.0 controller and the PCIe Controller, thus only + * a single controller can use it. * If the MCU is configured to mux the PCIe/USB3.0 differential lines * to the M.2 Key M slot, uncomment the following block to disable * USB3.0 from the USB Complex and enable the PCIe controller. @@ -82,7 +83,6 @@ * testing purposes, but instead rely on the firmware/bootloader to * update these nodes accordingly if PCIe mode is selected by the MCU. */ - /* &pcie { status = "okay"; diff --git a/arch/arm/dts/meson-sm1-sei610.dts b/arch/arm/dts/meson-sm1-sei610.dts index a8bb3fa9fec..dfb2438851c 100644 --- a/arch/arm/dts/meson-sm1-sei610.dts +++ b/arch/arm/dts/meson-sm1-sei610.dts @@ -518,7 +518,7 @@ /* eMMC */ &sd_emmc_c { status = "okay"; - pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; + pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; pinctrl-1 = <&emmc_clk_gate_pins>; pinctrl-names = "default", "clk-gate"; @@ -593,6 +593,7 @@ compatible = "brcm,bcm43438-bt"; interrupt-parent = <&gpio_intc>; interrupts = <95 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "host-wakeup"; shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; max-speed = <2000000>; clocks = <&wifi32k>; diff --git a/arch/arm/dts/meson-sm1.dtsi b/arch/arm/dts/meson-sm1.dtsi index d847a3fcbc8..d4ec735fb1a 100644 --- a/arch/arm/dts/meson-sm1.dtsi +++ b/arch/arm/dts/meson-sm1.dtsi @@ -448,6 +448,7 @@ <&clkc_audio AUD_CLKID_PDM_DCLK>, <&clkc_audio AUD_CLKID_PDM_SYSCLK>; clock-names = "pclk", "dclk", "sysclk"; + resets = <&clkc_audio AUD_RESET_PDM>; status = "disabled"; }; }; diff --git a/arch/arm/dts/qoriq-fman3-0-10g-0.dtsi b/arch/arm/dts/qoriq-fman3-0-10g-0.dtsi new file mode 100644 index 00000000000..8f4776e883c --- /dev/null +++ b/arch/arm/dts/qoriq-fman3-0-10g-0.dtsi @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * QorIQ FMan v3 10g port #0 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * Copyright 2020 NXP + * + */ + +fman@1a00000 { + fman0_rx_0x10: port@90000 { + cell-index = <0x10>; + compatible = "fsl,fman-v3-port-rx"; + reg = <0x90000 0x1000>; + fsl,fman-10g-port; + }; + + fman0_tx_0x30: port@b0000 { + cell-index = <0x30>; + compatible = "fsl,fman-v3-port-tx"; + reg = <0xb0000 0x1000>; + fsl,fman-10g-port; + }; + + ethernet@f0000 { + cell-index = <0x8>; + compatible = "fsl,fman-memac"; + reg = <0xf0000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x10 &fman0_tx_0x30>; + pcsphy-handle = <&pcsphy6>; + status = "disabled"; + }; + + mdio@f1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xf1000 0x1000>; + + pcsphy6: ethernet-phy@0 { + reg = <0x0>; + }; + }; +}; diff --git a/arch/arm/dts/qoriq-fman3-0-10g-1.dtsi b/arch/arm/dts/qoriq-fman3-0-10g-1.dtsi new file mode 100644 index 00000000000..b5eb22f6a9a --- /dev/null +++ b/arch/arm/dts/qoriq-fman3-0-10g-1.dtsi @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * QorIQ FMan v3 10g port #1 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * Copyright 2020 NXP + * + */ + +fman@1a00000 { + fman0_rx_0x11: port@91000 { + cell-index = <0x11>; + compatible = "fsl,fman-v3-port-rx"; + reg = <0x91000 0x1000>; + fsl,fman-10g-port; + }; + + fman0_tx_0x31: port@b1000 { + cell-index = <0x31>; + compatible = "fsl,fman-v3-port-tx"; + reg = <0xb1000 0x1000>; + fsl,fman-10g-port; + }; + + ethernet@f2000 { + cell-index = <0x9>; + compatible = "fsl,fman-memac"; + reg = <0xf2000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x11 &fman0_tx_0x31>; + pcsphy-handle = <&pcsphy7>; + status = "disabled"; + }; + + mdio@f3000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xf3000 0x1000>; + + pcsphy7: ethernet-phy@0 { + reg = <0x0>; + }; + }; +}; diff --git a/arch/arm/dts/qoriq-fman3-0-1g-0.dtsi b/arch/arm/dts/qoriq-fman3-0-1g-0.dtsi new file mode 100644 index 00000000000..4264d47709a --- /dev/null +++ b/arch/arm/dts/qoriq-fman3-0-1g-0.dtsi @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * QorIQ FMan v3 1g port #0 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * Copyright 2020 NXP + * + */ + +fman@1a00000 { + fman0_rx_0x08: port@88000 { + cell-index = <0x8>; + compatible = "fsl,fman-v3-port-rx"; + reg = <0x88000 0x1000>; + }; + + fman0_tx_0x28: port@a8000 { + cell-index = <0x28>; + compatible = "fsl,fman-v3-port-tx"; + reg = <0xa8000 0x1000>; + }; + + ethernet@e0000 { + cell-index = <0>; + compatible = "fsl,fman-memac"; + reg = <0xe0000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x08 &fman0_tx_0x28>; + ptp-timer = <&ptp_timer0>; + pcsphy-handle = <&pcsphy0>; + status = "disabled"; + }; + + mdio@e1000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xe1000 0x1000>; + + pcsphy0: ethernet-phy@0 { + reg = <0x0>; + }; + }; +}; diff --git a/arch/arm/dts/qoriq-fman3-0-1g-1.dtsi b/arch/arm/dts/qoriq-fman3-0-1g-1.dtsi new file mode 100644 index 00000000000..d60f8c77ac0 --- /dev/null +++ b/arch/arm/dts/qoriq-fman3-0-1g-1.dtsi @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * QorIQ FMan v3 1g port #1 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * Copyright 2020 NXP + * + */ + +fman@1a00000 { + fman0_rx_0x09: port@89000 { + cell-index = <0x9>; + compatible = "fsl,fman-v3-port-rx"; + reg = <0x89000 0x1000>; + }; + + fman0_tx_0x29: port@a9000 { + cell-index = <0x29>; + compatible = "fsl,fman-v3-port-tx"; + reg = <0xa9000 0x1000>; + }; + + ethernet@e2000 { + cell-index = <1>; + compatible = "fsl,fman-memac"; + reg = <0xe2000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>; + ptp-timer = <&ptp_timer0>; + pcsphy-handle = <&pcsphy1>; + status = "disabled"; + }; + + mdio@e3000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xe3000 0x1000>; + + pcsphy1: ethernet-phy@0 { + reg = <0x0>; + }; + }; +}; diff --git a/arch/arm/dts/qoriq-fman3-0-1g-2.dtsi b/arch/arm/dts/qoriq-fman3-0-1g-2.dtsi new file mode 100644 index 00000000000..7c5edc01dc1 --- /dev/null +++ b/arch/arm/dts/qoriq-fman3-0-1g-2.dtsi @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * QorIQ FMan v3 1g port #2 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * Copyright 2020 NXP + * + */ + +fman@1a00000 { + fman0_rx_0x0a: port@8a000 { + cell-index = <0xa>; + compatible = "fsl,fman-v3-port-rx"; + reg = <0x8a000 0x1000>; + }; + + fman0_tx_0x2a: port@aa000 { + cell-index = <0x2a>; + compatible = "fsl,fman-v3-port-tx"; + reg = <0xaa000 0x1000>; + }; + + ethernet@e4000 { + cell-index = <2>; + compatible = "fsl,fman-memac"; + reg = <0xe4000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x0a &fman0_tx_0x2a>; + ptp-timer = <&ptp_timer0>; + pcsphy-handle = <&pcsphy2>; + status = "disabled"; + }; + + mdio@e5000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xe5000 0x1000>; + + pcsphy2: ethernet-phy@0 { + reg = <0x0>; + }; + }; +}; diff --git a/arch/arm/dts/qoriq-fman3-0-1g-3.dtsi b/arch/arm/dts/qoriq-fman3-0-1g-3.dtsi new file mode 100644 index 00000000000..2d2de58c526 --- /dev/null +++ b/arch/arm/dts/qoriq-fman3-0-1g-3.dtsi @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * QorIQ FMan v3 1g port #3 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * Copyright 2020 NXP + * + */ + +fman@1a00000 { + fman0_rx_0x0b: port@8b000 { + cell-index = <0xb>; + compatible = "fsl,fman-v3-port-rx"; + reg = <0x8b000 0x1000>; + }; + + fman0_tx_0x2b: port@ab000 { + cell-index = <0x2b>; + compatible = "fsl,fman-v3-port-tx"; + reg = <0xab000 0x1000>; + }; + + ethernet@e6000 { + cell-index = <3>; + compatible = "fsl,fman-memac"; + reg = <0xe6000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x0b &fman0_tx_0x2b>; + ptp-timer = <&ptp_timer0>; + pcsphy-handle = <&pcsphy3>; + status = "disabled"; + }; + + mdio@e7000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xe7000 0x1000>; + + pcsphy3: ethernet-phy@0 { + reg = <0x0>; + }; + }; +}; diff --git a/arch/arm/dts/qoriq-fman3-0-1g-4.dtsi b/arch/arm/dts/qoriq-fman3-0-1g-4.dtsi new file mode 100644 index 00000000000..f5a73dc7338 --- /dev/null +++ b/arch/arm/dts/qoriq-fman3-0-1g-4.dtsi @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * QorIQ FMan v3 1g port #4 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * Copyright 2020 NXP + * + */ + +fman@1a00000 { + fman0_rx_0x0c: port@8c000 { + cell-index = <0xc>; + compatible = "fsl,fman-v3-port-rx"; + reg = <0x8c000 0x1000>; + }; + + fman0_tx_0x2c: port@ac000 { + cell-index = <0x2c>; + compatible = "fsl,fman-v3-port-tx"; + reg = <0xac000 0x1000>; + }; + + ethernet@e8000 { + cell-index = <4>; + compatible = "fsl,fman-memac"; + reg = <0xe8000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x0c &fman0_tx_0x2c>; + ptp-timer = <&ptp_timer0>; + pcsphy-handle = <&pcsphy4>; + status = "disabled"; + }; + + mdio@e9000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xe9000 0x1000>; + + pcsphy4: ethernet-phy@0 { + reg = <0x0>; + }; + }; +}; diff --git a/arch/arm/dts/qoriq-fman3-0-1g-5.dtsi b/arch/arm/dts/qoriq-fman3-0-1g-5.dtsi new file mode 100644 index 00000000000..baa5751191d --- /dev/null +++ b/arch/arm/dts/qoriq-fman3-0-1g-5.dtsi @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * QorIQ FMan v3 1g port #5 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * Copyright 2020 NXP + * + */ + +fman@1a00000 { + fman0_rx_0x0d: port@8d000 { + cell-index = <0xd>; + compatible = "fsl,fman-v3-port-rx"; + reg = <0x8d000 0x1000>; + }; + + fman0_tx_0x2d: port@ad000 { + cell-index = <0x2d>; + compatible = "fsl,fman-v3-port-tx"; + reg = <0xad000 0x1000>; + }; + + ethernet@ea000 { + cell-index = <5>; + compatible = "fsl,fman-memac"; + reg = <0xea000 0x1000>; + fsl,fman-ports = <&fman0_rx_0x0d &fman0_tx_0x2d>; + ptp-timer = <&ptp_timer0>; + pcsphy-handle = <&pcsphy5>; + status = "disabled"; + }; + + mdio@eb000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xeb000 0x1000>; + + pcsphy5: ethernet-phy@0 { + reg = <0x0>; + }; + }; +}; diff --git a/arch/arm/dts/qoriq-fman3-0.dtsi b/arch/arm/dts/qoriq-fman3-0.dtsi new file mode 100644 index 00000000000..82fe796f4b8 --- /dev/null +++ b/arch/arm/dts/qoriq-fman3-0.dtsi @@ -0,0 +1,82 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * QorIQ FMan v3 device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * Copyright 2020 NXP + * + */ + +fman0: fman@1a00000 { + #address-cells = <1>; + #size-cells = <1>; + cell-index = <0>; + compatible = "fsl,fman"; + ranges = <0x0 0x0 0x1a00000 0xfe000>; + reg = <0x0 0x1a00000 0x0 0xfe000>; + clocks = <&clockgen 3 0>; + clock-names = "fmanclk"; + fsl,qman-channel-range = <0x800 0x10>; + ptimer-handle = <&ptp_timer0>; + + muram@0 { + compatible = "fsl,fman-muram"; + reg = <0x0 0x60000>; + }; + + fman0_oh_0x2: port@82000 { + cell-index = <0x2>; + compatible = "fsl,fman-v3-port-oh"; + reg = <0x82000 0x1000>; + }; + + fman0_oh_0x3: port@83000 { + cell-index = <0x3>; + compatible = "fsl,fman-v3-port-oh"; + reg = <0x83000 0x1000>; + }; + + fman0_oh_0x4: port@84000 { + cell-index = <0x4>; + compatible = "fsl,fman-v3-port-oh"; + reg = <0x84000 0x1000>; + }; + + fman0_oh_0x5: port@85000 { + cell-index = <0x5>; + compatible = "fsl,fman-v3-port-oh"; + reg = <0x85000 0x1000>; + }; + + fman0_oh_0x6: port@86000 { + cell-index = <0x6>; + compatible = "fsl,fman-v3-port-oh"; + reg = <0x86000 0x1000>; + }; + + fman0_oh_0x7: port@87000 { + cell-index = <0x7>; + compatible = "fsl,fman-v3-port-oh"; + reg = <0x87000 0x1000>; + }; + + mdio0: mdio@fc000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xfc000 0x1000>; + }; + + xmdio0: mdio@fd000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; + reg = <0xfd000 0x1000>; + }; +}; + +ptp_timer0: ptp-timer@1afe000 { + compatible = "fsl,fman-ptp-timer"; + reg = <0x0 0x1afe000 0x0 0x1000>; + clocks = <&clockgen 3 0>; +}; diff --git a/arch/arm/dts/r8a7790-lager.dts b/arch/arm/dts/r8a7790-lager.dts index 7b9508e83d4..097fd9317c6 100644 --- a/arch/arm/dts/r8a7790-lager.dts +++ b/arch/arm/dts/r8a7790-lager.dts @@ -56,7 +56,7 @@ }; chosen { - bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; + bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; stdout-path = "serial0:115200n8"; }; @@ -150,8 +150,7 @@ gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>; gpios-states = <1>; - states = <3300000 1 - 1800000 0>; + states = <3300000 1>, <1800000 0>; }; vcc_sdhi2: regulator-vcc-sdhi2 { @@ -174,8 +173,7 @@ gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>; gpios-states = <1>; - states = <3300000 1 - 1800000 0>; + states = <3300000 1>, <1800000 0>; }; audio_clock: audio_clock { @@ -325,10 +323,10 @@ #size-cells = <0>; }; - /* - * IIC2 and I2C2 may be switched using pinmux. - * A fallback to GPIO is also provided. - */ + /* + * IIC2 and I2C2 may be switched using pinmux. + * A fallback to GPIO is also provided. + */ i2chdmi: i2c-12 { compatible = "i2c-demux-pinctrl"; i2c-parent = <&iic2>, <&i2c2>, <&gpioi2c2>; @@ -423,6 +421,8 @@ */ i2cpwr: i2c-13 { compatible = "i2c-demux-pinctrl"; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_irq_pins>; i2c-parent = <&iic3>, <&i2c3>; i2c-bus-name = "i2c-pwr"; #address-cells = <1>; @@ -615,6 +615,11 @@ function = "iic3"; }; + pmic_irq_pins: pmicirq { + groups = "intc_irq2"; + function = "intc"; + }; + hsusb_pins: hsusb { groups = "usb0_ovc_vbus"; function = "usb0"; diff --git a/arch/arm/dts/r8a7790-stout.dts b/arch/arm/dts/r8a7790-stout.dts index 7a7d3b84d1a..a315ba749aa 100644 --- a/arch/arm/dts/r8a7790-stout.dts +++ b/arch/arm/dts/r8a7790-stout.dts @@ -19,7 +19,7 @@ }; chosen { - bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; + bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; stdout-path = "serial0:115200n8"; }; @@ -179,6 +179,11 @@ function = "iic3"; }; + pmic_irq_pins: pmicirq { + groups = "intc_irq2"; + function = "intc"; + }; + usb0_pins: usb0 { groups = "usb0"; function = "usb0"; @@ -317,7 +322,7 @@ &iic3 { pinctrl-names = "default"; - pinctrl-0 = <&iic3_pins>; + pinctrl-0 = <&iic3_pins &pmic_irq_pins>; status = "okay"; pmic@58 { diff --git a/arch/arm/dts/r8a7790.dtsi b/arch/arm/dts/r8a7790.dtsi index 5a2747758f6..334ba19769b 100644 --- a/arch/arm/dts/r8a7790.dtsi +++ b/arch/arm/dts/r8a7790.dtsi @@ -487,6 +487,9 @@ icram0: sram@e63a0000 { compatible = "mmio-sram"; reg = <0 0xe63a0000 0 0x12000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0xe63a0000 0x12000>; }; icram1: sram@e63c0000 { @@ -669,8 +672,8 @@ compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac"; reg = <0 0xe65a0000 0 0x100>; - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1"; clocks = <&cpg CPG_MOD 330>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; @@ -683,8 +686,8 @@ compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac"; reg = <0 0xe65b0000 0 0x100>; - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1"; clocks = <&cpg CPG_MOD 331>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; @@ -697,22 +700,22 @@ compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; reg = <0 0xe6700000 0 0x20000>; - interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -730,22 +733,22 @@ compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; reg = <0 0xe6720000 0 0x20000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -1300,20 +1303,20 @@ compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; reg = <0 0xec700000 0 0x10000>; - interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -1331,20 +1334,20 @@ compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; reg = <0 0xec720000 0 0x10000>; - interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -1388,10 +1391,10 @@ #size-cells = <2>; #interrupt-cells = <1>; ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; - interrupt-map-mask = <0xff00 0 0 0x7>; - interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH - 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH - 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask = <0xf800 0 0 0x7>; + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, + <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, + <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; usb@1,0 { reg = <0x800 0 0 0 0>; @@ -1423,10 +1426,10 @@ #size-cells = <2>; #interrupt-cells = <1>; ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>; - interrupt-map-mask = <0xff00 0 0 0x7>; - interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH - 0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH - 0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask = <0xf800 0 0 0x7>; + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, + <0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, + <0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; }; pci2: pci@ee0d0000 { @@ -1446,10 +1449,10 @@ #size-cells = <2>; #interrupt-cells = <1>; ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; - interrupt-map-mask = <0xff00 0 0 0x7>; - interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH - 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH - 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask = <0xf800 0 0 0x7>; + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, + <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, + <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; usb@1,0 { reg = <0x20800 0 0 0 0>; @@ -1614,13 +1617,13 @@ #size-cells = <2>; bus-range = <0x00 0xff>; device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 - 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 - 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 - 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; + ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, + <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, + <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, + <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; /* Map all possible DDR as inbound ranges */ - dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000 - 0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>; + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>, + <0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>; interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm/dts/r8a7791-koelsch.dts b/arch/arm/dts/r8a7791-koelsch.dts index e6580aa0cea..2b096d5e06f 100644 --- a/arch/arm/dts/r8a7791-koelsch.dts +++ b/arch/arm/dts/r8a7791-koelsch.dts @@ -56,7 +56,7 @@ }; chosen { - bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; + bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; stdout-path = "serial0:115200n8"; }; @@ -193,8 +193,7 @@ gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>; gpios-states = <1>; - states = <3300000 1 - 1800000 0>; + states = <3300000 1>, <1800000 0>; }; vcc_sdhi1: regulator-vcc-sdhi1 { @@ -217,8 +216,7 @@ gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>; gpios-states = <1>; - states = <3300000 1 - 1800000 0>; + states = <3300000 1>, <1800000 0>; }; vcc_sdhi2: regulator-vcc-sdhi2 { @@ -241,8 +239,7 @@ gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>; gpios-states = <1>; - states = <3300000 1 - 1800000 0>; + states = <3300000 1>, <1800000 0>; }; audio_clock: audio_clock { @@ -540,6 +537,11 @@ function = "intc"; }; + pmic_irq_pins: pmicirq { + groups = "intc_irq2"; + function = "intc"; + }; + sdhi0_pins: sd0 { groups = "sdhi0_data4", "sdhi0_ctrl"; function = "sdhi0"; @@ -776,6 +778,8 @@ }; &i2c6 { + pinctrl-names = "default"; + pinctrl-0 = <&pmic_irq_pins>; status = "okay"; clock-frequency = <100000>; diff --git a/arch/arm/dts/r8a7791-porter.dts b/arch/arm/dts/r8a7791-porter.dts index fefdf8238bb..f9ece7ab201 100644 --- a/arch/arm/dts/r8a7791-porter.dts +++ b/arch/arm/dts/r8a7791-porter.dts @@ -31,7 +31,7 @@ }; chosen { - bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; + bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; stdout-path = "serial0:115200n8"; }; @@ -63,8 +63,7 @@ gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>; gpios-states = <1>; - states = <3300000 1 - 1800000 0>; + states = <3300000 1>, <1800000 0>; }; vcc_sdhi2: regulator-vcc-sdhi2 { @@ -85,8 +84,7 @@ gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>; gpios-states = <1>; - states = <3300000 1 - 1800000 0>; + states = <3300000 1>, <1800000 0>; }; hdmi-out { @@ -228,6 +226,11 @@ function = "intc"; }; + pmic_irq_pins: pmicirq { + groups = "intc_irq2"; + function = "intc"; + }; + sdhi0_pins: sd0 { groups = "sdhi0_data4", "sdhi0_ctrl"; function = "sdhi0"; @@ -373,6 +376,8 @@ }; &i2c6 { + pinctrl-names = "default"; + pinctrl-0 = <&pmic_irq_pins>; status = "okay"; clock-frequency = <100000>; diff --git a/arch/arm/dts/r8a7791.dtsi b/arch/arm/dts/r8a7791.dtsi index 6f875502453..59a55e87fcc 100644 --- a/arch/arm/dts/r8a7791.dtsi +++ b/arch/arm/dts/r8a7791.dtsi @@ -420,6 +420,9 @@ icram0: sram@e63a0000 { compatible = "mmio-sram"; reg = <0 0xe63a0000 0 0x12000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0xe63a0000 0x12000>; }; icram1: sram@e63c0000 { @@ -618,8 +621,8 @@ compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac"; reg = <0 0xe65a0000 0 0x100>; - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1"; clocks = <&cpg CPG_MOD 330>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; @@ -632,8 +635,8 @@ compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac"; reg = <0 0xe65b0000 0 0x100>; - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1"; clocks = <&cpg CPG_MOD 331>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; @@ -646,22 +649,22 @@ compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac"; reg = <0 0xe6700000 0 0x20000>; - interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -679,22 +682,22 @@ compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac"; reg = <0 0xe6720000 0 0x20000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -1338,20 +1341,20 @@ compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac"; reg = <0 0xec700000 0 0x10000>; - interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -1369,20 +1372,20 @@ compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac"; reg = <0 0xec720000 0 0x10000>; - interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -1426,10 +1429,10 @@ #size-cells = <2>; #interrupt-cells = <1>; ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; - interrupt-map-mask = <0xff00 0 0 0x7>; - interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH - 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH - 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask = <0xf800 0 0 0x7>; + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, + <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, + <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; usb@1,0 { reg = <0x800 0 0 0 0>; @@ -1461,10 +1464,10 @@ #size-cells = <2>; #interrupt-cells = <1>; ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; - interrupt-map-mask = <0xff00 0 0 0x7>; - interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH - 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH - 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask = <0xf800 0 0 0x7>; + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, + <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, + <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; usb@1,0 { reg = <0x10800 0 0 0 0>; @@ -1598,13 +1601,13 @@ #size-cells = <2>; bus-range = <0x00 0xff>; device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 - 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 - 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 - 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; + ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, + <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, + <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, + <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; /* Map all possible DDR as inbound ranges */ - dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000 - 0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>; + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>, + <0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>; interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm/dts/r8a7792-blanche.dts b/arch/arm/dts/r8a7792-blanche.dts index f92301290b0..248eb717eb3 100644 --- a/arch/arm/dts/r8a7792-blanche.dts +++ b/arch/arm/dts/r8a7792-blanche.dts @@ -21,7 +21,7 @@ }; chosen { - bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; + bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; stdout-path = "serial0:115200n8"; }; @@ -234,6 +234,11 @@ groups = "du1_rgb666", "du1_sync", "du1_disp"; function = "du1"; }; + + pmic_irq_pins: pmicirq { + groups = "intc_irq2"; + function = "intc"; + }; }; &rwdt { @@ -308,6 +313,28 @@ }; }; +&iic3 { + status = "okay"; + + pmic@58 { + compatible = "dlg,da9063"; + reg = <0x58>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_irq_pins>; + interrupt-parent = <&irqc>; + interrupts = <2 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + + rtc { + compatible = "dlg,da9063-rtc"; + }; + + wdt { + compatible = "dlg,da9063-watchdog"; + }; + }; +}; + &du { pinctrl-0 = <&du0_pins &du1_pins>; pinctrl-names = "default"; diff --git a/arch/arm/dts/r8a7792.dtsi b/arch/arm/dts/r8a7792.dtsi index 6fd80e35415..39af16caa2a 100644 --- a/arch/arm/dts/r8a7792.dtsi +++ b/arch/arm/dts/r8a7792.dtsi @@ -22,6 +22,7 @@ i2c3 = &i2c3; i2c4 = &i2c4; i2c5 = &i2c5; + i2c6 = &iic3; spi0 = &qspi; spi1 = &msiof0; spi2 = &msiof1; @@ -344,6 +345,9 @@ icram0: sram@e63a0000 { compatible = "mmio-sram"; reg = <0 0xe63a0000 0 0x12000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0xe63a0000 0x12000>; }; icram1: sram@e63c0000 { @@ -465,22 +469,22 @@ compatible = "renesas,dmac-r8a7792", "renesas,rcar-dmac"; reg = <0 0xe6700000 0 0x20000>; - interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -498,22 +502,22 @@ compatible = "renesas,dmac-r8a7792", "renesas,rcar-dmac"; reg = <0 0xe6720000 0 0x20000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -874,6 +878,40 @@ compatible = "renesas,prr"; reg = <0 0xff000044 0 4>; }; + + cmt0: timer@ffca0000 { + compatible = "renesas,r8a7792-cmt0", + "renesas,rcar-gen2-cmt0"; + reg = <0 0xffca0000 0 0x1004>; + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 124>; + clock-names = "fck"; + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; + resets = <&cpg 124>; + + status = "disabled"; + }; + + cmt1: timer@e6130000 { + compatible = "renesas,r8a7792-cmt1", + "renesas,rcar-gen2-cmt1"; + reg = <0 0xe6130000 0 0x1004>; + interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 329>; + clock-names = "fck"; + power-domains = <&sysc R8A7792_PD_ALWAYS_ON>; + resets = <&cpg 329>; + + status = "disabled"; + }; }; timer { diff --git a/arch/arm/dts/r8a7793-gose.dts b/arch/arm/dts/r8a7793-gose.dts index f51601af89a..22ca7cd1e7d 100644 --- a/arch/arm/dts/r8a7793-gose.dts +++ b/arch/arm/dts/r8a7793-gose.dts @@ -52,7 +52,7 @@ }; chosen { - bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; + bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; stdout-path = "serial0:115200n8"; }; @@ -65,81 +65,81 @@ compatible = "gpio-keys"; key-1 { - gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; - linux,code = <KEY_1>; - label = "SW2-1"; - wakeup-source; - debounce-interval = <20>; + gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; + linux,code = <KEY_1>; + label = "SW2-1"; + wakeup-source; + debounce-interval = <20>; }; key-2 { - gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; - linux,code = <KEY_2>; - label = "SW2-2"; - wakeup-source; - debounce-interval = <20>; + gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; + linux,code = <KEY_2>; + label = "SW2-2"; + wakeup-source; + debounce-interval = <20>; }; key-3 { - gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; - linux,code = <KEY_3>; - label = "SW2-3"; - wakeup-source; - debounce-interval = <20>; + gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; + linux,code = <KEY_3>; + label = "SW2-3"; + wakeup-source; + debounce-interval = <20>; }; key-4 { - gpios = <&gpio5 3 GPIO_ACTIVE_LOW>; - linux,code = <KEY_4>; - label = "SW2-4"; - wakeup-source; - debounce-interval = <20>; + gpios = <&gpio5 3 GPIO_ACTIVE_LOW>; + linux,code = <KEY_4>; + label = "SW2-4"; + wakeup-source; + debounce-interval = <20>; }; key-a { - gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; - linux,code = <KEY_A>; - label = "SW30"; - wakeup-source; - debounce-interval = <20>; + gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; + linux,code = <KEY_A>; + label = "SW30"; + wakeup-source; + debounce-interval = <20>; }; key-b { - gpios = <&gpio7 1 GPIO_ACTIVE_LOW>; - linux,code = <KEY_B>; - label = "SW31"; - wakeup-source; - debounce-interval = <20>; + gpios = <&gpio7 1 GPIO_ACTIVE_LOW>; + linux,code = <KEY_B>; + label = "SW31"; + wakeup-source; + debounce-interval = <20>; }; key-c { - gpios = <&gpio7 2 GPIO_ACTIVE_LOW>; - linux,code = <KEY_C>; - label = "SW32"; - wakeup-source; - debounce-interval = <20>; + gpios = <&gpio7 2 GPIO_ACTIVE_LOW>; + linux,code = <KEY_C>; + label = "SW32"; + wakeup-source; + debounce-interval = <20>; }; key-d { - gpios = <&gpio7 3 GPIO_ACTIVE_LOW>; - linux,code = <KEY_D>; - label = "SW33"; - wakeup-source; - debounce-interval = <20>; + gpios = <&gpio7 3 GPIO_ACTIVE_LOW>; + linux,code = <KEY_D>; + label = "SW33"; + wakeup-source; + debounce-interval = <20>; }; key-e { - gpios = <&gpio7 4 GPIO_ACTIVE_LOW>; - linux,code = <KEY_E>; - label = "SW34"; - wakeup-source; - debounce-interval = <20>; + gpios = <&gpio7 4 GPIO_ACTIVE_LOW>; + linux,code = <KEY_E>; + label = "SW34"; + wakeup-source; + debounce-interval = <20>; }; key-f { - gpios = <&gpio7 5 GPIO_ACTIVE_LOW>; - linux,code = <KEY_F>; - label = "SW35"; - wakeup-source; - debounce-interval = <20>; + gpios = <&gpio7 5 GPIO_ACTIVE_LOW>; + linux,code = <KEY_F>; + label = "SW35"; + wakeup-source; + debounce-interval = <20>; }; key-g { - gpios = <&gpio7 6 GPIO_ACTIVE_LOW>; - linux,code = <KEY_G>; - label = "SW36"; - wakeup-source; - debounce-interval = <20>; + gpios = <&gpio7 6 GPIO_ACTIVE_LOW>; + linux,code = <KEY_G>; + label = "SW36"; + wakeup-source; + debounce-interval = <20>; }; }; @@ -179,8 +179,7 @@ gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>; gpios-states = <1>; - states = <3300000 1 - 1800000 0>; + states = <3300000 1>, <1800000 0>; }; vcc_sdhi1: regulator-vcc-sdhi1 { @@ -203,8 +202,7 @@ gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>; gpios-states = <1>; - states = <3300000 1 - 1800000 0>; + states = <3300000 1>, <1800000 0>; }; vcc_sdhi2: regulator-vcc-sdhi2 { @@ -227,8 +225,7 @@ gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>; gpios-states = <1>; - states = <3300000 1 - 1800000 0>; + states = <3300000 1>, <1800000 0>; }; audio_clock: audio_clock { @@ -514,6 +511,11 @@ function = "intc"; }; + pmic_irq_pins: pmicirq { + groups = "intc_irq2"; + function = "intc"; + }; + sdhi0_pins: sd0 { groups = "sdhi0_data4", "sdhi0_ctrl"; function = "sdhi0"; @@ -711,6 +713,8 @@ }; &i2c6 { + pinctrl-names = "default"; + pinctrl-0 = <&pmic_irq_pins>; status = "okay"; clock-frequency = <100000>; diff --git a/arch/arm/dts/r8a7793.dtsi b/arch/arm/dts/r8a7793.dtsi index bf05110fac4..eef035c4d98 100644 --- a/arch/arm/dts/r8a7793.dtsi +++ b/arch/arm/dts/r8a7793.dtsi @@ -406,6 +406,9 @@ icram0: sram@e63a0000 { compatible = "mmio-sram"; reg = <0 0xe63a0000 0 0x12000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0xe63a0000 0x12000>; }; icram1: sram@e63c0000 { @@ -565,22 +568,22 @@ compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac"; reg = <0 0xe6700000 0 0x20000>; - interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -598,22 +601,22 @@ compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac"; reg = <0 0xe6720000 0 0x20000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -1166,20 +1169,20 @@ compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac"; reg = <0 0xec700000 0 0x10000>; - interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -1197,20 +1200,20 @@ compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac"; reg = <0 0xec720000 0 0x10000>; - interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", diff --git a/arch/arm/dts/r8a7794-alt.dts b/arch/arm/dts/r8a7794-alt.dts index ef7e2a837df..f79fce74cd9 100644 --- a/arch/arm/dts/r8a7794-alt.dts +++ b/arch/arm/dts/r8a7794-alt.dts @@ -22,7 +22,7 @@ }; chosen { - bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; + bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; stdout-path = "serial0:115200n8"; }; @@ -60,8 +60,7 @@ gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>; gpios-states = <1>; - states = <3300000 1 - 1800000 0>; + states = <3300000 1>, <1800000 0>; }; vcc_sdhi1: regulator-vcc-sdhi1 { @@ -84,8 +83,7 @@ gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>; gpios-states = <1>; - states = <3300000 1 - 1800000 0>; + states = <3300000 1>, <1800000 0>; }; lbsc { @@ -199,6 +197,22 @@ }; }; +&pci0 { + status = "okay"; + pinctrl-0 = <&usb0_pins>; + pinctrl-names = "default"; +}; + +&pci1 { + status = "okay"; + pinctrl-0 = <&usb1_pins>; + pinctrl-names = "default"; +}; + +&usbphy { + status = "okay"; +}; + &du { pinctrl-0 = <&du_pins>; pinctrl-names = "default"; @@ -293,6 +307,16 @@ function = "sdhi1"; power-source = <1800>; }; + + usb0_pins: usb0 { + groups = "usb0"; + function = "usb0"; + }; + + usb1_pins: usb1 { + groups = "usb1"; + function = "usb1"; + }; }; &cmt0 { @@ -377,6 +401,27 @@ pinctrl-names = "i2c-exio4"; }; +&i2c7 { + status = "okay"; + clock-frequency = <100000>; + + pmic@58 { + compatible = "dlg,da9063"; + reg = <0x58>; + interrupt-parent = <&gpio3>; + interrupts = <31 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + + rtc { + compatible = "dlg,da9063-rtc"; + }; + + wdt { + compatible = "dlg,da9063-watchdog"; + }; + }; +}; + &vin0 { status = "okay"; pinctrl-0 = <&vin0_pins>; diff --git a/arch/arm/dts/r8a7794-silk.dts b/arch/arm/dts/r8a7794-silk.dts index 60e91ebfa65..2c16ad85430 100644 --- a/arch/arm/dts/r8a7794-silk.dts +++ b/arch/arm/dts/r8a7794-silk.dts @@ -34,7 +34,7 @@ }; chosen { - bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; + bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; stdout-path = "serial0:115200n8"; }; @@ -126,8 +126,7 @@ gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>; gpios-states = <1>; - states = <3300000 1 - 1800000 0>; + states = <3300000 1>, <1800000 0>; }; vga-encoder { diff --git a/arch/arm/dts/r8a7794.dtsi b/arch/arm/dts/r8a7794.dtsi index 8d797d34816..05ef79c6ed7 100644 --- a/arch/arm/dts/r8a7794.dtsi +++ b/arch/arm/dts/r8a7794.dtsi @@ -351,6 +351,9 @@ icram0: sram@e63a0000 { compatible = "mmio-sram"; reg = <0 0xe63a0000 0 0x12000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0xe63a0000 0x12000>; }; icram1: sram@e63c0000 { @@ -527,22 +530,22 @@ compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac"; reg = <0 0xe6700000 0 0x20000>; - interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -560,22 +563,22 @@ compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac"; reg = <0 0xe6720000 0 0x20000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -1132,20 +1135,20 @@ compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac"; reg = <0 0xec700000 0 0x10000>; - interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", "ch8", "ch9", @@ -1176,10 +1179,10 @@ #size-cells = <2>; #interrupt-cells = <1>; ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; - interrupt-map-mask = <0xff00 0 0 0x7>; - interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH - 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH - 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask = <0xf800 0 0 0x7>; + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, + <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, + <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; usb@1,0 { reg = <0x800 0 0 0 0>; @@ -1211,10 +1214,10 @@ #size-cells = <2>; #interrupt-cells = <1>; ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; - interrupt-map-mask = <0xff00 0 0 0x7>; - interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH - 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH - 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask = <0xf800 0 0 0x7>; + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, + <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, + <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; usb@1,0 { reg = <0x10800 0 0 0 0>; diff --git a/arch/arm/dts/r8a7795-u-boot.dtsi b/arch/arm/dts/r8a7795-u-boot.dtsi deleted file mode 100644 index 3f4b1f5acc9..00000000000 --- a/arch/arm/dts/r8a7795-u-boot.dtsi +++ /dev/null @@ -1,24 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source extras for U-Boot on RCar R8A7795 SoC - * - * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> - */ - -#include "r8a779x-u-boot.dtsi" - -&extalr_clk { - u-boot,dm-pre-reloc; -}; - -/ { - soc { - rpc: rpc@0xee200000 { - compatible = "renesas,rpc-r8a7795", "renesas,rpc"; - reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>; - clocks = <&cpg CPG_MOD 917>; - bank-width = <2>; - status = "disabled"; - }; - }; -}; diff --git a/arch/arm/dts/r8a7796-salvator-x-u-boot.dts b/arch/arm/dts/r8a77950-salvator-x-u-boot.dts index 2a7b1498943..6e5c271d3cd 100644 --- a/arch/arm/dts/r8a7796-salvator-x-u-boot.dts +++ b/arch/arm/dts/r8a77950-salvator-x-u-boot.dts @@ -5,8 +5,8 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ -#include "r8a7796-salvator-x.dts" -#include "r8a7796-u-boot.dtsi" +#include "r8a77950-salvator-x.dts" +#include "r8a77950-u-boot.dtsi" &sdhi0 { sd-uhs-sdr12; diff --git a/arch/arm/dts/r8a7795-salvator-x.dts b/arch/arm/dts/r8a77950-salvator-x.dts index d2d48b33b37..2438825c9b2 100644 --- a/arch/arm/dts/r8a7795-salvator-x.dts +++ b/arch/arm/dts/r8a77950-salvator-x.dts @@ -1,16 +1,16 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Device Tree Source for the Salvator-X board with R-Car H3 ES2.0 + * Device Tree Source for the Salvator-X board with R-Car H3 ES1.x * * Copyright (C) 2015 Renesas Electronics Corp. */ /dts-v1/; -#include "r8a7795.dtsi" +#include "r8a77950.dtsi" #include "salvator-x.dtsi" / { - model = "Renesas Salvator-X board based on r8a7795 ES2.0+"; + model = "Renesas Salvator-X board based on r8a77950"; compatible = "renesas,salvator-x", "renesas,r8a7795"; memory@48000000 { @@ -52,12 +52,6 @@ status = "okay"; }; -&sound_card { - dais = <&rsnd_port0 /* ak4613 */ - &rsnd_port1 /* HDMI0 */ - &rsnd_port2>; /* HDMI1 */ -}; - &hdmi0 { status = "okay"; @@ -108,6 +102,13 @@ status = "okay"; }; +&pfc { + usb2_pins: usb2 { + groups = "usb2"; + function = "usb2"; + }; +}; + &rcar_sound { ports { /* rsnd_port0 is on salvator-common */ @@ -138,17 +139,16 @@ }; }; -&pfc { - usb2_pins: usb2 { - groups = "usb2"; - function = "usb2"; - }; -}; - &sata { status = "okay"; }; +&sound_card { + dais = <&rsnd_port0 /* ak4613 */ + &rsnd_port1 /* HDMI0 */ + &rsnd_port2>; /* HDMI1 */ +}; + &usb2_phy2 { pinctrl-0 = <&usb2_pins>; pinctrl-names = "default"; diff --git a/arch/arm/dts/r8a77950-u-boot.dtsi b/arch/arm/dts/r8a77950-u-boot.dtsi new file mode 100644 index 00000000000..0317f47f0f3 --- /dev/null +++ b/arch/arm/dts/r8a77950-u-boot.dtsi @@ -0,0 +1,101 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source extras for U-Boot on RCar R8A7795 SoC + * + * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> + */ + +#include "r8a779x-u-boot.dtsi" + +&extalr_clk { + u-boot,dm-pre-reloc; +}; + +/ { + soc { + rpc: rpc@0xee200000 { + compatible = "renesas,rpc-r8a7795", "renesas,rpc"; + reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>; + clocks = <&cpg CPG_MOD 917>; + bank-width = <2>; + status = "disabled"; + }; + }; +}; + +/delete-node/ &ak4613; +/delete-node/ &audma0; +/delete-node/ &audma1; +/delete-node/ &can0; +/delete-node/ &can1; +/delete-node/ &canfd; +/delete-node/ &csi20; +/delete-node/ &csi21; +/delete-node/ &csi40; +/delete-node/ &csi41; +/delete-node/ &drif00; +/delete-node/ &drif01; +/delete-node/ &drif10; +/delete-node/ &drif11; +/delete-node/ &drif20; +/delete-node/ &drif21; +/delete-node/ &drif30; +/delete-node/ &drif31; +/delete-node/ &du; +/delete-node/ &fcpf0; +/delete-node/ &fcpf1; +/delete-node/ &fcpf2; +/delete-node/ &fcpvb0; +/delete-node/ &fcpvb1; +/delete-node/ &fcpvd0; +/delete-node/ &fcpvd1; +/delete-node/ &fcpvd2; +/delete-node/ &fcpvd3; +/delete-node/ &fcpvi0; +/delete-node/ &fcpvi1; +/delete-node/ &fcpvi2; +/delete-node/ &hdmi0; +/delete-node/ &hdmi1; +/delete-node/ &lvds0; +/delete-node/ &rcar_sound; +/delete-node/ &sound_card; +/delete-node/ &vin0; +/delete-node/ &vin1; +/delete-node/ &vin2; +/delete-node/ &vin3; +/delete-node/ &vin4; +/delete-node/ &vin5; +/delete-node/ &vin6; +/delete-node/ &vin7; +/delete-node/ &vspbc; +/delete-node/ &vspbd; +/delete-node/ &vspd0; +/delete-node/ &vspd1; +/delete-node/ &vspd2; +/delete-node/ &vspd3; +/delete-node/ &vspi0; +/delete-node/ &vspi1; +/delete-node/ &vspi2; + +/ { + /delete-node/ cvbs-in; + /delete-node/ hdmi-in; + /delete-node/ hdmi0-out; + /delete-node/ hdmi1-out; + /delete-node/ vga-encoder; + /delete-node/ vga; +}; + +&i2c4 { + /delete-node/ video-receiver@70; +}; + +&soc { + /delete-node/ fdp1@fe940000; + /delete-node/ fdp1@fe944000; + /delete-node/ fdp1@fe948000; + /delete-node/ imr-lx4@fe860000; + /delete-node/ imr-lx4@fe870000; + /delete-node/ imr-lx4@fe880000; + /delete-node/ imr-lx4@fe890000; +}; diff --git a/arch/arm/dts/r8a7795-h3ulcb-u-boot.dts b/arch/arm/dts/r8a77950-ulcb-u-boot.dts index ef1c57f6728..fb9bbe14395 100644 --- a/arch/arm/dts/r8a7795-h3ulcb-u-boot.dts +++ b/arch/arm/dts/r8a77950-ulcb-u-boot.dts @@ -5,8 +5,8 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ -#include "r8a7795-h3ulcb.dts" -#include "r8a7795-u-boot.dtsi" +#include "r8a77950-ulcb.dts" +#include "r8a77950-u-boot.dtsi" / { cpld { diff --git a/arch/arm/dts/r8a7795-h3ulcb.dts b/arch/arm/dts/r8a77950-ulcb.dts index 54515eaf031..38a6d6a108d 100644 --- a/arch/arm/dts/r8a7795-h3ulcb.dts +++ b/arch/arm/dts/r8a77950-ulcb.dts @@ -7,11 +7,11 @@ */ /dts-v1/; -#include "r8a7795.dtsi" +#include "r8a77950.dtsi" #include "ulcb.dtsi" / { - model = "Renesas H3ULCB board based on r8a7795 ES2.0+"; + model = "Renesas H3ULCB board based on r8a77950"; compatible = "renesas,h3ulcb", "renesas,r8a7795"; memory@48000000 { @@ -35,16 +35,3 @@ reg = <0x7 0x00000000 0x0 0x40000000>; }; }; - -&du { - clocks = <&cpg CPG_MOD 724>, - <&cpg CPG_MOD 723>, - <&cpg CPG_MOD 722>, - <&cpg CPG_MOD 721>, - <&versaclock5 1>, - <&versaclock5 3>, - <&versaclock5 4>, - <&versaclock5 2>; - clock-names = "du.0", "du.1", "du.2", "du.3", - "dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3"; -}; diff --git a/arch/arm/dts/r8a77950.dtsi b/arch/arm/dts/r8a77950.dtsi new file mode 100644 index 00000000000..15216495e1c --- /dev/null +++ b/arch/arm/dts/r8a77950.dtsi @@ -0,0 +1,319 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the R-Car H3 (R8A77950) SoC + * + * Copyright (C) 2015 Renesas Electronics Corp. + */ + +#include "r8a77951.dtsi" + +&audma0 { + iommus = <&ipmmu_mp1 0>, <&ipmmu_mp1 1>, + <&ipmmu_mp1 2>, <&ipmmu_mp1 3>, + <&ipmmu_mp1 4>, <&ipmmu_mp1 5>, + <&ipmmu_mp1 6>, <&ipmmu_mp1 7>, + <&ipmmu_mp1 8>, <&ipmmu_mp1 9>, + <&ipmmu_mp1 10>, <&ipmmu_mp1 11>, + <&ipmmu_mp1 12>, <&ipmmu_mp1 13>, + <&ipmmu_mp1 14>, <&ipmmu_mp1 15>; +}; + +&audma1 { + iommus = <&ipmmu_mp1 16>, <&ipmmu_mp1 17>, + <&ipmmu_mp1 18>, <&ipmmu_mp1 19>, + <&ipmmu_mp1 20>, <&ipmmu_mp1 21>, + <&ipmmu_mp1 22>, <&ipmmu_mp1 23>, + <&ipmmu_mp1 24>, <&ipmmu_mp1 25>, + <&ipmmu_mp1 26>, <&ipmmu_mp1 27>, + <&ipmmu_mp1 28>, <&ipmmu_mp1 29>, + <&ipmmu_mp1 30>, <&ipmmu_mp1 31>; +}; + +&du { + vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd3 0>; +}; + +&fcpvb1 { + iommus = <&ipmmu_vp0 7>; +}; + +&fcpf1 { + iommus = <&ipmmu_vp0 1>; +}; + +&fcpvi1 { + iommus = <&ipmmu_vp0 9>; +}; + +&fcpvd2 { + iommus = <&ipmmu_vi0 10>; +}; + +&gpio1 { + gpio-ranges = <&pfc 0 32 28>; +}; + +&ipmmu_vi0 { + renesas,ipmmu-main = <&ipmmu_mm 11>; +}; + +&ipmmu_vp0 { + renesas,ipmmu-main = <&ipmmu_mm 12>; +}; + +&ipmmu_vc0 { + renesas,ipmmu-main = <&ipmmu_mm 9>; +}; + +&ipmmu_vc1 { + renesas,ipmmu-main = <&ipmmu_mm 10>; +}; + +&ipmmu_rt { + renesas,ipmmu-main = <&ipmmu_mm 7>; +}; + +&soc { + /delete-node/ dma-controller@e6460000; + /delete-node/ dma-controller@e6470000; + + ipmmu_mp1: mmu@ec680000 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xec680000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 5>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + #iommu-cells = <1>; + }; + + ipmmu_sy: mmu@e7730000 { + compatible = "renesas,ipmmu-r8a7795"; + reg = <0 0xe7730000 0 0x1000>; + renesas,ipmmu-main = <&ipmmu_mm 8>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + #iommu-cells = <1>; + }; + + /delete-node/ mmu@fd950000; + /delete-node/ mmu@fd960000; + /delete-node/ mmu@fd970000; + /delete-node/ mmu@febe0000; + /delete-node/ mmu@fe980000; + + xhci1: usb@ee040000 { + compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci"; + reg = <0 0xee040000 0 0xc00>; + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 327>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 327>; + status = "disabled"; + }; + + /delete-node/ usb@e659c000; + /delete-node/ usb@ee0e0000; + /delete-node/ usb@ee0e0100; + + /delete-node/ usb-phy@ee0e0200; + + fdp1@fe948000 { + compatible = "renesas,fdp1"; + reg = <0 0xfe948000 0 0x2400>; + interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 117>; + power-domains = <&sysc R8A7795_PD_A3VP>; + resets = <&cpg 117>; + renesas,fcp = <&fcpf2>; + }; + + fcpf2: fcp@fe952000 { + compatible = "renesas,fcpf"; + reg = <0 0xfe952000 0 0x200>; + clocks = <&cpg CPG_MOD 613>; + power-domains = <&sysc R8A7795_PD_A3VP>; + resets = <&cpg 613>; + iommus = <&ipmmu_vp0 2>; + }; + + fcpvd3: fcp@fea3f000 { + compatible = "renesas,fcpv"; + reg = <0 0xfea3f000 0 0x200>; + clocks = <&cpg CPG_MOD 600>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 600>; + iommus = <&ipmmu_vi0 11>; + }; + + fcpvi2: fcp@fe9cf000 { + compatible = "renesas,fcpv"; + reg = <0 0xfe9cf000 0 0x200>; + clocks = <&cpg CPG_MOD 609>; + power-domains = <&sysc R8A7795_PD_A3VP>; + resets = <&cpg 609>; + iommus = <&ipmmu_vp0 10>; + }; + + vspd3: vsp@fea38000 { + compatible = "renesas,vsp2"; + reg = <0 0xfea38000 0 0x5000>; + interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 620>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 620>; + + renesas,fcp = <&fcpvd3>; + }; + + vspi2: vsp@fe9c0000 { + compatible = "renesas,vsp2"; + reg = <0 0xfe9c0000 0 0x8000>; + interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 629>; + power-domains = <&sysc R8A7795_PD_A3VP>; + resets = <&cpg 629>; + + renesas,fcp = <&fcpvi2>; + }; + + csi21: csi2@fea90000 { + compatible = "renesas,r8a7795-csi2"; + reg = <0 0xfea90000 0 0x10000>; + interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 713>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 713>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + #address-cells = <1>; + #size-cells = <0>; + + reg = <1>; + + csi21vin0: endpoint@0 { + reg = <0>; + remote-endpoint = <&vin0csi21>; + }; + csi21vin1: endpoint@1 { + reg = <1>; + remote-endpoint = <&vin1csi21>; + }; + csi21vin2: endpoint@2 { + reg = <2>; + remote-endpoint = <&vin2csi21>; + }; + csi21vin3: endpoint@3 { + reg = <3>; + remote-endpoint = <&vin3csi21>; + }; + csi21vin4: endpoint@4 { + reg = <4>; + remote-endpoint = <&vin4csi21>; + }; + csi21vin5: endpoint@5 { + reg = <5>; + remote-endpoint = <&vin5csi21>; + }; + csi21vin6: endpoint@6 { + reg = <6>; + remote-endpoint = <&vin6csi21>; + }; + csi21vin7: endpoint@7 { + reg = <7>; + remote-endpoint = <&vin7csi21>; + }; + }; + }; + }; +}; + +&vin0 { + ports { + port@1 { + vin0csi21: endpoint@1 { + reg = <1>; + remote-endpoint = <&csi21vin0>; + }; + }; + }; +}; + +&vin1 { + ports { + port@1 { + vin1csi21: endpoint@1 { + reg = <1>; + remote-endpoint = <&csi21vin1>; + }; + }; + }; +}; + +&vin2 { + ports { + port@1 { + vin2csi21: endpoint@1 { + reg = <1>; + remote-endpoint = <&csi21vin2>; + }; + }; + }; +}; + +&vin3 { + ports { + port@1 { + vin3csi21: endpoint@1 { + reg = <1>; + remote-endpoint = <&csi21vin3>; + }; + }; + }; +}; + +&vin4 { + ports { + port@1 { + vin4csi21: endpoint@1 { + reg = <1>; + remote-endpoint = <&csi21vin4>; + }; + }; + }; +}; + +&vin5 { + ports { + port@1 { + vin5csi21: endpoint@1 { + reg = <1>; + remote-endpoint = <&csi21vin5>; + }; + }; + }; +}; + +&vin6 { + ports { + port@1 { + vin6csi21: endpoint@1 { + reg = <1>; + remote-endpoint = <&csi21vin6>; + }; + }; + }; +}; + +&vin7 { + ports { + port@1 { + vin7csi21: endpoint@1 { + reg = <1>; + remote-endpoint = <&csi21vin7>; + }; + }; + }; +}; diff --git a/arch/arm/dts/r8a7795.dtsi b/arch/arm/dts/r8a77951.dtsi index 097538cc4b1..a8729eb744d 100644 --- a/arch/arm/dts/r8a7795.dtsi +++ b/arch/arm/dts/r8a77951.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Device Tree Source for the R-Car H3 (R8A77950) SoC + * Device Tree Source for the R-Car H3 (R8A77951) SoC * * Copyright (C) 2015 Renesas Electronics Corp. */ @@ -155,6 +155,8 @@ power-domains = <&sysc R8A7795_PD_CA57_CPU0>; next-level-cache = <&L2_CA57>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0>; + dynamic-power-coefficient = <854>; clocks = <&cpg CPG_CORE R8A7795_CLK_Z>; operating-points-v2 = <&cluster0_opp>; capacity-dmips-mhz = <1024>; @@ -168,6 +170,7 @@ power-domains = <&sysc R8A7795_PD_CA57_CPU1>; next-level-cache = <&L2_CA57>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&cpg CPG_CORE R8A7795_CLK_Z>; operating-points-v2 = <&cluster0_opp>; capacity-dmips-mhz = <1024>; @@ -181,6 +184,7 @@ power-domains = <&sysc R8A7795_PD_CA57_CPU2>; next-level-cache = <&L2_CA57>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&cpg CPG_CORE R8A7795_CLK_Z>; operating-points-v2 = <&cluster0_opp>; capacity-dmips-mhz = <1024>; @@ -194,6 +198,7 @@ power-domains = <&sysc R8A7795_PD_CA57_CPU3>; next-level-cache = <&L2_CA57>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&cpg CPG_CORE R8A7795_CLK_Z>; operating-points-v2 = <&cluster0_opp>; capacity-dmips-mhz = <1024>; @@ -207,6 +212,9 @@ power-domains = <&sysc R8A7795_PD_CA53_CPU0>; next-level-cache = <&L2_CA53>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_1>; + #cooling-cells = <2>; + dynamic-power-coefficient = <277>; clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>; operating-points-v2 = <&cluster1_opp>; capacity-dmips-mhz = <535>; @@ -219,6 +227,7 @@ power-domains = <&sysc R8A7795_PD_CA53_CPU1>; next-level-cache = <&L2_CA53>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_1>; clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>; operating-points-v2 = <&cluster1_opp>; capacity-dmips-mhz = <535>; @@ -231,6 +240,7 @@ power-domains = <&sysc R8A7795_PD_CA53_CPU2>; next-level-cache = <&L2_CA53>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_1>; clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>; operating-points-v2 = <&cluster1_opp>; capacity-dmips-mhz = <535>; @@ -243,6 +253,7 @@ power-domains = <&sysc R8A7795_PD_CA53_CPU3>; next-level-cache = <&L2_CA53>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_1>; clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>; operating-points-v2 = <&cluster1_opp>; capacity-dmips-mhz = <535>; @@ -261,6 +272,28 @@ cache-unified; cache-level = <2>; }; + + idle-states { + entry-method = "psci"; + + CPU_SLEEP_0: cpu-sleep-0 { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x0010000>; + local-timer-stop; + entry-latency-us = <400>; + exit-latency-us = <500>; + min-residency-us = <4000>; + }; + + CPU_SLEEP_1: cpu-sleep-1 { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x0010000>; + local-timer-stop; + entry-latency-us = <700>; + exit-latency-us = <700>; + min-residency-us = <5000>; + }; + }; }; extal_clk: extal { @@ -572,12 +605,12 @@ #interrupt-cells = <2>; interrupt-controller; reg = <0 0xe61c0000 0 0x200>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 407>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 407>; @@ -812,7 +845,7 @@ <&usb_dmac1 0>, <&usb_dmac1 1>; dma-names = "ch0", "ch1", "ch2", "ch3"; renesas,buswait = <11>; - phys = <&usb2_phy0>; + phys = <&usb2_phy0 3>; phy-names = "usb"; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 704>, <&cpg 703>; @@ -829,7 +862,7 @@ <&usb_dmac3 0>, <&usb_dmac3 1>; dma-names = "ch0", "ch1", "ch2", "ch3"; renesas,buswait = <11>; - phys = <&usb2_phy3>; + phys = <&usb2_phy3 3>; phy-names = "usb"; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 705>, <&cpg 700>; @@ -840,8 +873,8 @@ compatible = "renesas,r8a7795-usb-dmac", "renesas,usb-dmac"; reg = <0 0xe65a0000 0 0x100>; - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1"; clocks = <&cpg CPG_MOD 330>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; @@ -854,8 +887,8 @@ compatible = "renesas,r8a7795-usb-dmac", "renesas,usb-dmac"; reg = <0 0xe65b0000 0 0x100>; - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1"; clocks = <&cpg CPG_MOD 331>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; @@ -868,8 +901,8 @@ compatible = "renesas,r8a7795-usb-dmac", "renesas,usb-dmac"; reg = <0 0xe6460000 0 0x100>; - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1"; clocks = <&cpg CPG_MOD 326>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; @@ -882,8 +915,8 @@ compatible = "renesas,r8a7795-usb-dmac", "renesas,usb-dmac"; reg = <0 0xe6470000 0 0x100>; - interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1"; clocks = <&cpg CPG_MOD 329>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; @@ -918,23 +951,23 @@ compatible = "renesas,dmac-r8a7795", "renesas,rcar-dmac"; reg = <0 0xe6700000 0 0x10000>; - interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -960,23 +993,23 @@ compatible = "renesas,dmac-r8a7795", "renesas,rcar-dmac"; reg = <0 0xe7300000 0 0x10000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -1002,23 +1035,23 @@ compatible = "renesas,dmac-r8a7795", "renesas,rcar-dmac"; reg = <0 0xe7310000 0 0x10000>; - interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -1450,6 +1483,17 @@ status = "disabled"; }; + tpu: pwm@e6e80000 { + compatible = "renesas,tpu-r8a7795", "renesas,tpu"; + reg = <0 0xe6e80000 0 0x148>; + interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 304>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 304>; + #pwm-cells = <3>; + status = "disabled"; + }; + msiof0: spi@e6e90000 { compatible = "renesas,msiof-r8a7795", "renesas,rcar-gen3-msiof"; @@ -2299,23 +2343,23 @@ compatible = "renesas,dmac-r8a7795", "renesas,rcar-dmac"; reg = <0 0xec700000 0 0x10000>; - interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -2341,23 +2385,23 @@ compatible = "renesas,dmac-r8a7795", "renesas,rcar-dmac"; reg = <0 0xec720000 0 0x10000>; - interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -2405,7 +2449,7 @@ reg = <0 0xee080000 0 0x100>; interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0>; + phys = <&usb2_phy0 1>; phy-names = "usb"; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 703>, <&cpg 704>; @@ -2417,7 +2461,7 @@ reg = <0 0xee0a0000 0 0x100>; interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 702>; - phys = <&usb2_phy1>; + phys = <&usb2_phy1 1>; phy-names = "usb"; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 702>; @@ -2429,7 +2473,7 @@ reg = <0 0xee0c0000 0 0x100>; interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 701>; - phys = <&usb2_phy2>; + phys = <&usb2_phy2 1>; phy-names = "usb"; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 701>; @@ -2441,7 +2485,7 @@ reg = <0 0xee0e0000 0 0x100>; interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>; - phys = <&usb2_phy3>; + phys = <&usb2_phy3 1>; phy-names = "usb"; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 700>, <&cpg 705>; @@ -2453,7 +2497,7 @@ reg = <0 0xee080100 0 0x100>; interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0>; + phys = <&usb2_phy0 2>; phy-names = "usb"; companion = <&ohci0>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; @@ -2466,7 +2510,7 @@ reg = <0 0xee0a0100 0 0x100>; interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 702>; - phys = <&usb2_phy1>; + phys = <&usb2_phy1 2>; phy-names = "usb"; companion = <&ohci1>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; @@ -2479,7 +2523,7 @@ reg = <0 0xee0c0100 0 0x100>; interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 701>; - phys = <&usb2_phy2>; + phys = <&usb2_phy2 2>; phy-names = "usb"; companion = <&ohci2>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; @@ -2492,7 +2536,7 @@ reg = <0 0xee0e0100 0 0x100>; interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>; - phys = <&usb2_phy3>; + phys = <&usb2_phy3 2>; phy-names = "usb"; companion = <&ohci3>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; @@ -2508,7 +2552,7 @@ clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 703>, <&cpg 704>; - #phy-cells = <0>; + #phy-cells = <1>; status = "disabled"; }; @@ -2519,7 +2563,7 @@ clocks = <&cpg CPG_MOD 702>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 702>; - #phy-cells = <0>; + #phy-cells = <1>; status = "disabled"; }; @@ -2530,7 +2574,7 @@ clocks = <&cpg CPG_MOD 701>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 701>; - #phy-cells = <0>; + #phy-cells = <1>; status = "disabled"; }; @@ -2542,7 +2586,7 @@ clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 700>, <&cpg 705>; - #phy-cells = <0>; + #phy-cells = <1>; status = "disabled"; }; @@ -2555,6 +2599,7 @@ max-frequency = <200000000>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 314>; + iommus = <&ipmmu_ds1 32>; status = "disabled"; }; @@ -2567,6 +2612,7 @@ max-frequency = <200000000>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 313>; + iommus = <&ipmmu_ds1 33>; status = "disabled"; }; @@ -2579,6 +2625,7 @@ max-frequency = <200000000>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 312>; + iommus = <&ipmmu_ds1 34>; status = "disabled"; }; @@ -2591,6 +2638,7 @@ max-frequency = <200000000>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; resets = <&cpg 311>; + iommus = <&ipmmu_ds1 35>; status = "disabled"; }; @@ -2631,10 +2679,10 @@ #size-cells = <2>; bus-range = <0x00 0xff>; device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 - 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 - 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 - 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; + ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, + <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, + <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, + <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; /* Map all possible DDR as inbound ranges */ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, @@ -2658,10 +2706,10 @@ #size-cells = <2>; bus-range = <0x00 0xff>; device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000 - 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000 - 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000 - 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; + ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, + <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, + <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, + <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; /* Map all possible DDR as inbound ranges */ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, @@ -2717,6 +2765,83 @@ resets = <&cpg 820>; }; + vspbc: vsp@fe920000 { + compatible = "renesas,vsp2"; + reg = <0 0xfe920000 0 0x8000>; + interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 624>; + power-domains = <&sysc R8A7795_PD_A3VP>; + resets = <&cpg 624>; + + renesas,fcp = <&fcpvb1>; + }; + + vspbd: vsp@fe960000 { + compatible = "renesas,vsp2"; + reg = <0 0xfe960000 0 0x8000>; + interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 626>; + power-domains = <&sysc R8A7795_PD_A3VP>; + resets = <&cpg 626>; + + renesas,fcp = <&fcpvb0>; + }; + + vspd0: vsp@fea20000 { + compatible = "renesas,vsp2"; + reg = <0 0xfea20000 0 0x5000>; + interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 623>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 623>; + + renesas,fcp = <&fcpvd0>; + }; + + vspd1: vsp@fea28000 { + compatible = "renesas,vsp2"; + reg = <0 0xfea28000 0 0x5000>; + interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 622>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 622>; + + renesas,fcp = <&fcpvd1>; + }; + + vspd2: vsp@fea30000 { + compatible = "renesas,vsp2"; + reg = <0 0xfea30000 0 0x5000>; + interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 621>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 621>; + + renesas,fcp = <&fcpvd2>; + }; + + vspi0: vsp@fe9a0000 { + compatible = "renesas,vsp2"; + reg = <0 0xfe9a0000 0 0x8000>; + interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 631>; + power-domains = <&sysc R8A7795_PD_A3VP>; + resets = <&cpg 631>; + + renesas,fcp = <&fcpvi0>; + }; + + vspi1: vsp@fe9b0000 { + compatible = "renesas,vsp2"; + reg = <0 0xfe9b0000 0 0x8000>; + interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 630>; + power-domains = <&sysc R8A7795_PD_A3VP>; + resets = <&cpg 630>; + + renesas,fcp = <&fcpvi1>; + }; + fdp1@fe940000 { compatible = "renesas,fdp1"; reg = <0 0xfe940000 0 0x2400>; @@ -2818,81 +2943,40 @@ iommus = <&ipmmu_vi1 10>; }; - vspbd: vsp@fe960000 { - compatible = "renesas,vsp2"; - reg = <0 0xfe960000 0 0x8000>; - interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 626>; - power-domains = <&sysc R8A7795_PD_A3VP>; - resets = <&cpg 626>; - - renesas,fcp = <&fcpvb0>; - }; - - vspbc: vsp@fe920000 { - compatible = "renesas,vsp2"; - reg = <0 0xfe920000 0 0x8000>; - interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 624>; - power-domains = <&sysc R8A7795_PD_A3VP>; - resets = <&cpg 624>; - - renesas,fcp = <&fcpvb1>; - }; - - vspd0: vsp@fea20000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea20000 0 0x5000>; - interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 623>; + cmm0: cmm@fea40000 { + compatible = "renesas,r8a7795-cmm", + "renesas,rcar-gen3-cmm"; + reg = <0 0xfea40000 0 0x1000>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 623>; - - renesas,fcp = <&fcpvd0>; + clocks = <&cpg CPG_MOD 711>; + resets = <&cpg 711>; }; - vspd1: vsp@fea28000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea28000 0 0x5000>; - interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 622>; + cmm1: cmm@fea50000 { + compatible = "renesas,r8a7795-cmm", + "renesas,rcar-gen3-cmm"; + reg = <0 0xfea50000 0 0x1000>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 622>; - - renesas,fcp = <&fcpvd1>; + clocks = <&cpg CPG_MOD 710>; + resets = <&cpg 710>; }; - vspd2: vsp@fea30000 { - compatible = "renesas,vsp2"; - reg = <0 0xfea30000 0 0x5000>; - interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 621>; + cmm2: cmm@fea60000 { + compatible = "renesas,r8a7795-cmm", + "renesas,rcar-gen3-cmm"; + reg = <0 0xfea60000 0 0x1000>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; - resets = <&cpg 621>; - - renesas,fcp = <&fcpvd2>; + clocks = <&cpg CPG_MOD 709>; + resets = <&cpg 709>; }; - vspi0: vsp@fe9a0000 { - compatible = "renesas,vsp2"; - reg = <0 0xfe9a0000 0 0x8000>; - interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 631>; - power-domains = <&sysc R8A7795_PD_A3VP>; - resets = <&cpg 631>; - - renesas,fcp = <&fcpvi0>; - }; - - vspi1: vsp@fe9b0000 { - compatible = "renesas,vsp2"; - reg = <0 0xfe9b0000 0 0x8000>; - interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 630>; - power-domains = <&sysc R8A7795_PD_A3VP>; - resets = <&cpg 630>; - - renesas,fcp = <&fcpvi1>; + cmm3: cmm@fea70000 { + compatible = "renesas,r8a7795-cmm", + "renesas,rcar-gen3-cmm"; + reg = <0 0xfea70000 0 0x1000>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + clocks = <&cpg CPG_MOD 708>; + resets = <&cpg 708>; }; csi20: csi2@fea80000 { @@ -3098,7 +3182,10 @@ <&cpg CPG_MOD 722>, <&cpg CPG_MOD 721>; clock-names = "du.0", "du.1", "du.2", "du.3"; - vsps = <&vspd0 0 &vspd1 0 &vspd2 0 &vspd0 1>; + + renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>; + vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd0 1>; + status = "disabled"; ports { @@ -3168,58 +3255,30 @@ polling-delay-passive = <250>; polling-delay = <1000>; thermal-sensors = <&tsc 0>; + sustainable-power = <6313>; trips { - sensor1_passive: sensor1-passive { - temperature = <95000>; - hysteresis = <1000>; - type = "passive"; - }; sensor1_crit: sensor1-crit { temperature = <120000>; hysteresis = <1000>; type = "critical"; }; }; - - cooling-maps { - map0 { - trip = <&sensor1_passive>; - cooling-device = <&a57_0 4 4>, - <&a57_1 4 4>, - <&a57_2 4 4>, - <&a57_3 4 4>; - }; - }; }; sensor_thermal2: sensor-thermal2 { polling-delay-passive = <250>; polling-delay = <1000>; thermal-sensors = <&tsc 1>; + sustainable-power = <6313>; trips { - sensor2_passive: sensor2-passive { - temperature = <95000>; - hysteresis = <1000>; - type = "passive"; - }; sensor2_crit: sensor2-crit { temperature = <120000>; hysteresis = <1000>; type = "critical"; }; }; - - cooling-maps { - map0 { - trip = <&sensor2_passive>; - cooling-device = <&a57_0 4 4>, - <&a57_1 4 4>, - <&a57_2 4 4>, - <&a57_3 4 4>; - }; - }; }; sensor_thermal3: sensor-thermal3 { @@ -3228,11 +3287,12 @@ thermal-sensors = <&tsc 2>; trips { - sensor3_passive: sensor3-passive { - temperature = <95000>; + target: trip-point1 { + temperature = <100000>; hysteresis = <1000>; type = "passive"; }; + sensor3_crit: sensor3-crit { temperature = <120000>; hysteresis = <1000>; @@ -3242,11 +3302,15 @@ cooling-maps { map0 { - trip = <&sensor3_passive>; - cooling-device = <&a57_0 4 4>, - <&a57_1 4 4>, - <&a57_2 4 4>, - <&a57_3 4 4>; + trip = <&target>; + cooling-device = <&a57_0 2 4>; + contribution = <1024>; + }; + + map1 { + trip = <&target>; + cooling-device = <&a53_0 0 2>; + contribution = <1024>; }; }; }; diff --git a/arch/arm/dts/r8a7796-u-boot.dtsi b/arch/arm/dts/r8a7796-u-boot.dtsi deleted file mode 100644 index 622105486b5..00000000000 --- a/arch/arm/dts/r8a7796-u-boot.dtsi +++ /dev/null @@ -1,24 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source extras for U-Boot on RCar R8A7796 SoC - * - * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> - */ - -#include "r8a779x-u-boot.dtsi" - -&extalr_clk { - u-boot,dm-pre-reloc; -}; - -/ { - soc { - rpc: rpc@0xee200000 { - compatible = "renesas,rpc-r8a7796", "renesas,rpc"; - reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>; - clocks = <&cpg CPG_MOD 917>; - bank-width = <2>; - status = "disabled"; - }; - }; -}; diff --git a/arch/arm/dts/r8a7795-salvator-x-u-boot.dts b/arch/arm/dts/r8a77960-salvator-x-u-boot.dts index e93afe37d0c..a3f2d74150e 100644 --- a/arch/arm/dts/r8a7795-salvator-x-u-boot.dts +++ b/arch/arm/dts/r8a77960-salvator-x-u-boot.dts @@ -5,8 +5,8 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ -#include "r8a7795-salvator-x.dts" -#include "r8a7795-u-boot.dtsi" +#include "r8a77960-salvator-x.dts" +#include "r8a77960-u-boot.dtsi" &sdhi0 { sd-uhs-sdr12; diff --git a/arch/arm/dts/r8a7796-salvator-x.dts b/arch/arm/dts/r8a77960-salvator-x.dts index 2aefa53cb16..ecfbeafeaf3 100644 --- a/arch/arm/dts/r8a7796-salvator-x.dts +++ b/arch/arm/dts/r8a77960-salvator-x.dts @@ -6,11 +6,11 @@ */ /dts-v1/; -#include "r8a7796.dtsi" +#include "r8a77960.dtsi" #include "salvator-x.dtsi" / { - model = "Renesas Salvator-X board based on r8a7796"; + model = "Renesas Salvator-X board based on r8a77960"; compatible = "renesas,salvator-x", "renesas,r8a7796"; memory@48000000 { @@ -36,11 +36,6 @@ "dclkin.0", "dclkin.1", "dclkin.2"; }; -&sound_card { - dais = <&rsnd_port0 /* ak4613 */ - &rsnd_port1>; /* HDMI0 */ -}; - &hdmi0 { status = "okay"; @@ -81,3 +76,8 @@ }; }; }; + +&sound_card { + dais = <&rsnd_port0 /* ak4613 */ + &rsnd_port1>; /* HDMI0 */ +}; diff --git a/arch/arm/dts/r8a77960-u-boot.dtsi b/arch/arm/dts/r8a77960-u-boot.dtsi new file mode 100644 index 00000000000..826c2384bc5 --- /dev/null +++ b/arch/arm/dts/r8a77960-u-boot.dtsi @@ -0,0 +1,90 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source extras for U-Boot on RCar R8A7796 SoC + * + * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> + */ + +#include "r8a779x-u-boot.dtsi" + +&extalr_clk { + u-boot,dm-pre-reloc; +}; + +/ { + soc { + rpc: rpc@0xee200000 { + compatible = "renesas,rpc-r8a7796", "renesas,rpc"; + reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>; + clocks = <&cpg CPG_MOD 917>; + bank-width = <2>; + status = "disabled"; + }; + }; +}; + +/delete-node/ &ak4613; +/delete-node/ &audma0; +/delete-node/ &audma1; +/delete-node/ &can0; +/delete-node/ &can1; +/delete-node/ &canfd; +/delete-node/ &csi20; +/delete-node/ &csi40; +/delete-node/ &drif00; +/delete-node/ &drif01; +/delete-node/ &drif10; +/delete-node/ &drif11; +/delete-node/ &drif20; +/delete-node/ &drif21; +/delete-node/ &drif30; +/delete-node/ &drif31; +/delete-node/ &du; +/delete-node/ &fcpf0; +/delete-node/ &fcpvb0; +/delete-node/ &fcpvd0; +/delete-node/ &fcpvd1; +/delete-node/ &fcpvd2; +/delete-node/ &fcpvi0; +/delete-node/ &hdmi0; +/delete-node/ &lvds0; +/delete-node/ &rcar_sound; +/delete-node/ &sound_card; +/delete-node/ &vin0; +/delete-node/ &vin1; +/delete-node/ &vin2; +/delete-node/ &vin3; +/delete-node/ &vin4; +/delete-node/ &vin5; +/delete-node/ &vin6; +/delete-node/ &vin7; +/delete-node/ &vspb; +/delete-node/ &vspd0; +/delete-node/ &vspd1; +/delete-node/ &vspd2; +/delete-node/ &vspi0; + +/ { + /delete-node/ cvbs-in; + /delete-node/ hdmi-in; + /delete-node/ hdmi0-out; + /delete-node/ hdmi1-out; + /delete-node/ vga-encoder; + /delete-node/ vga; +}; + +&i2c4 { + /delete-node/ video-receiver@70; +}; + +/ { + soc { + /delete-node/ fdp1@fe940000; + /delete-node/ fdp1@fe944000; + /delete-node/ fdp1@fe948000; + /delete-node/ imr-lx4@fe860000; + /delete-node/ imr-lx4@fe870000; + /delete-node/ imr-lx4@fe880000; + /delete-node/ imr-lx4@fe890000; + }; +}; diff --git a/arch/arm/dts/r8a7796-m3ulcb-u-boot.dts b/arch/arm/dts/r8a77960-ulcb-u-boot.dts index 314eacc2bc0..04023d95971 100644 --- a/arch/arm/dts/r8a7796-m3ulcb-u-boot.dts +++ b/arch/arm/dts/r8a77960-ulcb-u-boot.dts @@ -5,8 +5,8 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ -#include "r8a7796-m3ulcb.dts" -#include "r8a7796-u-boot.dtsi" +#include "r8a77960-ulcb.dts" +#include "r8a77960-u-boot.dtsi" / { cpld { diff --git a/arch/arm/dts/r8a7796-m3ulcb.dts b/arch/arm/dts/r8a77960-ulcb.dts index 9e4594c27fa..d041042a561 100644 --- a/arch/arm/dts/r8a7796-m3ulcb.dts +++ b/arch/arm/dts/r8a77960-ulcb.dts @@ -7,11 +7,11 @@ */ /dts-v1/; -#include "r8a7796.dtsi" +#include "r8a77960.dtsi" #include "ulcb.dtsi" / { - model = "Renesas M3ULCB board based on r8a7796"; + model = "Renesas M3ULCB board based on r8a77960"; compatible = "renesas,m3ulcb", "renesas,r8a7796"; memory@48000000 { diff --git a/arch/arm/dts/r8a7796.dtsi b/arch/arm/dts/r8a77960.dtsi index d5e2f4af83a..60f156cfd2d 100644 --- a/arch/arm/dts/r8a7796.dtsi +++ b/arch/arm/dts/r8a77960.dtsi @@ -160,6 +160,8 @@ power-domains = <&sysc R8A7796_PD_CA57_CPU0>; next-level-cache = <&L2_CA57>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0>; + dynamic-power-coefficient = <854>; clocks = <&cpg CPG_CORE R8A7796_CLK_Z>; operating-points-v2 = <&cluster0_opp>; capacity-dmips-mhz = <1024>; @@ -173,6 +175,7 @@ power-domains = <&sysc R8A7796_PD_CA57_CPU1>; next-level-cache = <&L2_CA57>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&cpg CPG_CORE R8A7796_CLK_Z>; operating-points-v2 = <&cluster0_opp>; capacity-dmips-mhz = <1024>; @@ -186,6 +189,9 @@ power-domains = <&sysc R8A7796_PD_CA53_CPU0>; next-level-cache = <&L2_CA53>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_1>; + #cooling-cells = <2>; + dynamic-power-coefficient = <277>; clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; operating-points-v2 = <&cluster1_opp>; capacity-dmips-mhz = <535>; @@ -198,6 +204,7 @@ power-domains = <&sysc R8A7796_PD_CA53_CPU1>; next-level-cache = <&L2_CA53>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_1>; clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; operating-points-v2 = <&cluster1_opp>; capacity-dmips-mhz = <535>; @@ -210,6 +217,7 @@ power-domains = <&sysc R8A7796_PD_CA53_CPU2>; next-level-cache = <&L2_CA53>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_1>; clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; operating-points-v2 = <&cluster1_opp>; capacity-dmips-mhz = <535>; @@ -222,6 +230,7 @@ power-domains = <&sysc R8A7796_PD_CA53_CPU3>; next-level-cache = <&L2_CA53>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_1>; clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; operating-points-v2 = <&cluster1_opp>; capacity-dmips-mhz = <535>; @@ -240,6 +249,28 @@ cache-unified; cache-level = <2>; }; + + idle-states { + entry-method = "psci"; + + CPU_SLEEP_0: cpu-sleep-0 { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x0010000>; + local-timer-stop; + entry-latency-us = <400>; + exit-latency-us = <500>; + min-residency-us = <4000>; + }; + + CPU_SLEEP_1: cpu-sleep-1 { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x0010000>; + local-timer-stop; + entry-latency-us = <700>; + exit-latency-us = <700>; + min-residency-us = <5000>; + }; + }; }; extal_clk: extal { @@ -543,12 +574,12 @@ #interrupt-cells = <2>; interrupt-controller; reg = <0 0xe61c0000 0 0x200>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 407>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 407>; @@ -783,7 +814,7 @@ <&usb_dmac1 0>, <&usb_dmac1 1>; dma-names = "ch0", "ch1", "ch2", "ch3"; renesas,buswait = <11>; - phys = <&usb2_phy0>; + phys = <&usb2_phy0 3>; phy-names = "usb"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 704>, <&cpg 703>; @@ -794,8 +825,8 @@ compatible = "renesas,r8a7796-usb-dmac", "renesas,usb-dmac"; reg = <0 0xe65a0000 0 0x100>; - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1"; clocks = <&cpg CPG_MOD 330>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; @@ -808,8 +839,8 @@ compatible = "renesas,r8a7796-usb-dmac", "renesas,usb-dmac"; reg = <0 0xe65b0000 0 0x100>; - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1"; clocks = <&cpg CPG_MOD 331>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; @@ -835,23 +866,23 @@ compatible = "renesas,dmac-r8a7796", "renesas,rcar-dmac"; reg = <0 0xe6700000 0 0x10000>; - interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -877,23 +908,23 @@ compatible = "renesas,dmac-r8a7796", "renesas,rcar-dmac"; reg = <0 0xe7300000 0 0x10000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -919,23 +950,23 @@ compatible = "renesas,dmac-r8a7796", "renesas,rcar-dmac"; reg = <0 0xe7310000 0 0x10000>; - interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -1319,6 +1350,17 @@ status = "disabled"; }; + tpu: pwm@e6e80000 { + compatible = "renesas,tpu-r8a7796", "renesas,tpu"; + reg = <0 0xe6e80000 0 0x148>; + interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 304>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 304>; + #pwm-cells = <3>; + status = "disabled"; + }; + msiof0: spi@e6e90000 { compatible = "renesas,msiof-r8a7796", "renesas,rcar-gen3-msiof"; @@ -1819,6 +1861,17 @@ "ssi.1", "ssi.0"; status = "disabled"; + rcar_sound,ctu { + ctu00: ctu-0 { }; + ctu01: ctu-1 { }; + ctu02: ctu-2 { }; + ctu03: ctu-3 { }; + ctu10: ctu-4 { }; + ctu11: ctu-5 { }; + ctu12: ctu-6 { }; + ctu13: ctu-7 { }; + }; + rcar_sound,dvc { dvc0: dvc-0 { dmas = <&audma1 0xbc>; @@ -1835,17 +1888,6 @@ mix1: mix-1 { }; }; - rcar_sound,ctu { - ctu00: ctu-0 { }; - ctu01: ctu-1 { }; - ctu02: ctu-2 { }; - ctu03: ctu-3 { }; - ctu10: ctu-4 { }; - ctu11: ctu-5 { }; - ctu12: ctu-6 { }; - ctu13: ctu-7 { }; - }; - rcar_sound,src { src0: src-0 { interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; @@ -1899,6 +1941,59 @@ }; }; + rcar_sound,ssi { + ssi0: ssi-0 { + interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x01>, <&audma1 0x02>; + dma-names = "rx", "tx"; + }; + ssi1: ssi-1 { + interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x03>, <&audma1 0x04>; + dma-names = "rx", "tx"; + }; + ssi2: ssi-2 { + interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x05>, <&audma1 0x06>; + dma-names = "rx", "tx"; + }; + ssi3: ssi-3 { + interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x07>, <&audma1 0x08>; + dma-names = "rx", "tx"; + }; + ssi4: ssi-4 { + interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x09>, <&audma1 0x0a>; + dma-names = "rx", "tx"; + }; + ssi5: ssi-5 { + interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x0b>, <&audma1 0x0c>; + dma-names = "rx", "tx"; + }; + ssi6: ssi-6 { + interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x0d>, <&audma1 0x0e>; + dma-names = "rx", "tx"; + }; + ssi7: ssi-7 { + interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x0f>, <&audma1 0x10>; + dma-names = "rx", "tx"; + }; + ssi8: ssi-8 { + interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x11>, <&audma1 0x12>; + dma-names = "rx", "tx"; + }; + ssi9: ssi-9 { + interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&audma0 0x13>, <&audma1 0x14>; + dma-names = "rx", "tx"; + }; + }; + rcar_sound,ssiu { ssiu00: ssiu-0 { dmas = <&audma0 0x15>, <&audma1 0x16>; @@ -2109,82 +2204,29 @@ dma-names = "rx", "tx"; }; }; - - rcar_sound,ssi { - ssi0: ssi-0 { - interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x01>, <&audma1 0x02>; - dma-names = "rx", "tx"; - }; - ssi1: ssi-1 { - interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x03>, <&audma1 0x04>; - dma-names = "rx", "tx"; - }; - ssi2: ssi-2 { - interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x05>, <&audma1 0x06>; - dma-names = "rx", "tx"; - }; - ssi3: ssi-3 { - interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x07>, <&audma1 0x08>; - dma-names = "rx", "tx"; - }; - ssi4: ssi-4 { - interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x09>, <&audma1 0x0a>; - dma-names = "rx", "tx"; - }; - ssi5: ssi-5 { - interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0b>, <&audma1 0x0c>; - dma-names = "rx", "tx"; - }; - ssi6: ssi-6 { - interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0d>, <&audma1 0x0e>; - dma-names = "rx", "tx"; - }; - ssi7: ssi-7 { - interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x0f>, <&audma1 0x10>; - dma-names = "rx", "tx"; - }; - ssi8: ssi-8 { - interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x11>, <&audma1 0x12>; - dma-names = "rx", "tx"; - }; - ssi9: ssi-9 { - interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&audma0 0x13>, <&audma1 0x14>; - dma-names = "rx", "tx"; - }; - }; }; audma0: dma-controller@ec700000 { compatible = "renesas,dmac-r8a7796", "renesas,rcar-dmac"; reg = <0 0xec700000 0 0x10000>; - interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -2210,23 +2252,23 @@ compatible = "renesas,dmac-r8a7796", "renesas,rcar-dmac"; reg = <0 0xec720000 0 0x10000>; - interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -2275,7 +2317,7 @@ reg = <0 0xee080000 0 0x100>; interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0>; + phys = <&usb2_phy0 1>; phy-names = "usb"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 703>, <&cpg 704>; @@ -2287,7 +2329,7 @@ reg = <0 0xee0a0000 0 0x100>; interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 702>; - phys = <&usb2_phy1>; + phys = <&usb2_phy1 1>; phy-names = "usb"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 702>; @@ -2299,7 +2341,7 @@ reg = <0 0xee080100 0 0x100>; interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0>; + phys = <&usb2_phy0 2>; phy-names = "usb"; companion = <&ohci0>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; @@ -2312,7 +2354,7 @@ reg = <0 0xee0a0100 0 0x100>; interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 702>; - phys = <&usb2_phy1>; + phys = <&usb2_phy1 2>; phy-names = "usb"; companion = <&ohci1>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; @@ -2328,7 +2370,7 @@ clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 703>, <&cpg 704>; - #phy-cells = <0>; + #phy-cells = <1>; status = "disabled"; }; @@ -2339,7 +2381,7 @@ clocks = <&cpg CPG_MOD 702>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 702>; - #phy-cells = <0>; + #phy-cells = <1>; status = "disabled"; }; @@ -2352,6 +2394,7 @@ max-frequency = <200000000>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 314>; + iommus = <&ipmmu_ds1 32>; status = "disabled"; }; @@ -2364,6 +2407,7 @@ max-frequency = <200000000>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 313>; + iommus = <&ipmmu_ds1 33>; status = "disabled"; }; @@ -2376,6 +2420,7 @@ max-frequency = <200000000>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 312>; + iommus = <&ipmmu_ds1 34>; status = "disabled"; }; @@ -2388,6 +2433,7 @@ max-frequency = <200000000>; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; resets = <&cpg 311>; + iommus = <&ipmmu_ds1 35>; status = "disabled"; }; @@ -2416,10 +2462,10 @@ #size-cells = <2>; bus-range = <0x00 0xff>; device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 - 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 - 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 - 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; + ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, + <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, + <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, + <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; /* Map all possible DDR as inbound ranges */ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, @@ -2443,10 +2489,10 @@ #size-cells = <2>; bus-range = <0x00 0xff>; device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000 - 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000 - 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000 - 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; + ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, + <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, + <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, + <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; /* Map all possible DDR as inbound ranges */ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, @@ -2599,6 +2645,33 @@ renesas,fcp = <&fcpvi0>; }; + cmm0: cmm@fea40000 { + compatible = "renesas,r8a7796-cmm", + "renesas,rcar-gen3-cmm"; + reg = <0 0xfea40000 0 0x1000>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + clocks = <&cpg CPG_MOD 711>; + resets = <&cpg 711>; + }; + + cmm1: cmm@fea50000 { + compatible = "renesas,r8a7796-cmm", + "renesas,rcar-gen3-cmm"; + reg = <0 0xfea50000 0 0x1000>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + clocks = <&cpg CPG_MOD 710>; + resets = <&cpg 710>; + }; + + cmm2: cmm@fea60000 { + compatible = "renesas,r8a7796-cmm", + "renesas,rcar-gen3-cmm"; + reg = <0 0xfea60000 0 0x1000>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + clocks = <&cpg CPG_MOD 709>; + resets = <&cpg 709>; + }; + csi20: csi2@fea80000 { compatible = "renesas,r8a7796-csi2"; reg = <0 0xfea80000 0 0x10000>; @@ -2749,9 +2822,11 @@ <&cpg CPG_MOD 723>, <&cpg CPG_MOD 722>; clock-names = "du.0", "du.1", "du.2"; - status = "disabled"; - vsps = <&vspd0 &vspd1 &vspd2>; + renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>; + vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>; + + status = "disabled"; ports { #address-cells = <1>; @@ -2814,78 +2889,63 @@ polling-delay-passive = <250>; polling-delay = <1000>; thermal-sensors = <&tsc 0>; + sustainable-power = <3874>; trips { - sensor1_passive: sensor1-passive { - temperature = <95000>; - hysteresis = <1000>; - type = "passive"; - }; sensor1_crit: sensor1-crit { temperature = <120000>; hysteresis = <1000>; type = "critical"; }; }; - - cooling-maps { - map0 { - trip = <&sensor1_passive>; - cooling-device = <&a57_0 5 5>, <&a57_1 5 5>; - }; - }; }; sensor_thermal2: sensor-thermal2 { polling-delay-passive = <250>; polling-delay = <1000>; thermal-sensors = <&tsc 1>; + sustainable-power = <3874>; trips { - sensor2_passive: sensor2-passive { - temperature = <95000>; - hysteresis = <1000>; - type = "passive"; - }; sensor2_crit: sensor2-crit { temperature = <120000>; hysteresis = <1000>; type = "critical"; }; }; - - cooling-maps { - map0 { - trip = <&sensor2_passive>; - cooling-device = <&a57_0 5 5>, <&a57_1 5 5>; - }; - }; }; sensor_thermal3: sensor-thermal3 { polling-delay-passive = <250>; polling-delay = <1000>; thermal-sensors = <&tsc 2>; + sustainable-power = <3874>; + cooling-maps { + map0 { + trip = <&target>; + cooling-device = <&a57_0 2 4>; + contribution = <1024>; + }; + map1 { + trip = <&target>; + cooling-device = <&a53_0 0 2>; + contribution = <1024>; + }; + }; trips { - sensor3_passive: sensor3-passive { - temperature = <95000>; + target: trip-point1 { + temperature = <100000>; hysteresis = <1000>; type = "passive"; }; + sensor3_crit: sensor3-crit { temperature = <120000>; hysteresis = <1000>; type = "critical"; }; }; - - cooling-maps { - map0 { - trip = <&sensor3_passive>; - cooling-device = <&a57_0 5 5>, <&a57_1 5 5>; - }; - }; }; }; diff --git a/arch/arm/dts/r8a77965-salvator-x.dts b/arch/arm/dts/r8a77965-salvator-x.dts index 340a3c72b65..660a0240eec 100644 --- a/arch/arm/dts/r8a77965-salvator-x.dts +++ b/arch/arm/dts/r8a77965-salvator-x.dts @@ -41,9 +41,37 @@ remote-endpoint = <&hdmi0_con>; }; }; + port@2 { + reg = <2>; + dw_hdmi0_snd_in: endpoint { + remote-endpoint = <&rsnd_endpoint1>; + }; + }; }; }; &hdmi0_con { remote-endpoint = <&rcar_dw_hdmi0_out>; }; + +&rcar_sound { + ports { + rsnd_port1: port@1 { + reg = <1>; + rsnd_endpoint1: endpoint { + remote-endpoint = <&dw_hdmi0_snd_in>; + + dai-format = "i2s"; + bitclock-master = <&rsnd_endpoint1>; + frame-master = <&rsnd_endpoint1>; + + playback = <&ssi2>; + }; + }; + }; +}; + +&sound_card { + dais = <&rsnd_port0 /* ak4613 */ + &rsnd_port1>; /* HDMI0 */ +}; diff --git a/arch/arm/dts/r8a77965-u-boot.dtsi b/arch/arm/dts/r8a77965-u-boot.dtsi index 81ee0961e26..33ff5b148b9 100644 --- a/arch/arm/dts/r8a77965-u-boot.dtsi +++ b/arch/arm/dts/r8a77965-u-boot.dtsi @@ -22,3 +22,59 @@ }; }; }; + +/delete-node/ &ak4613; +/delete-node/ &audma0; +/delete-node/ &audma1; +/delete-node/ &can0; +/delete-node/ &can1; +/delete-node/ &canfd; +/delete-node/ &csi20; +/delete-node/ &csi40; +/delete-node/ &du; +/delete-node/ &fcpf0; +/delete-node/ &fcpvb0; +/delete-node/ &fcpvd0; +/delete-node/ &fcpvd1; +/delete-node/ &fcpvi0; +/delete-node/ &hdmi0; +/delete-node/ &lvds0; +/delete-node/ &rcar_sound; +/delete-node/ &sound_card; +/delete-node/ &vin0; +/delete-node/ &vin1; +/delete-node/ &vin2; +/delete-node/ &vin3; +/delete-node/ &vin4; +/delete-node/ &vin5; +/delete-node/ &vin6; +/delete-node/ &vin7; +/delete-node/ &vspb; +/delete-node/ &vspd0; +/delete-node/ &vspd1; +/delete-node/ &vspi0; + +/ { + /delete-node/ cvbs-in; + /delete-node/ hdmi-in; + /delete-node/ hdmi0-out; + /delete-node/ hdmi1-out; + /delete-node/ vga-encoder; + /delete-node/ vga; +}; + +&i2c4 { + /delete-node/ video-receiver@70; +}; + +/ { + soc { + /delete-node/ fdp1@fe940000; + /delete-node/ fdp1@fe944000; + /delete-node/ fdp1@fe948000; + /delete-node/ imr-lx4@fe860000; + /delete-node/ imr-lx4@fe870000; + /delete-node/ imr-lx4@fe880000; + /delete-node/ imr-lx4@fe890000; + }; +}; diff --git a/arch/arm/dts/r8a77965-m3nulcb-u-boot.dts b/arch/arm/dts/r8a77965-ulcb-u-boot.dts index cf104312693..28fb30e9a90 100644 --- a/arch/arm/dts/r8a77965-m3nulcb-u-boot.dts +++ b/arch/arm/dts/r8a77965-ulcb-u-boot.dts @@ -5,7 +5,7 @@ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> */ -#include "r8a77965-m3nulcb.dts" +#include "r8a77965-ulcb.dts" #include "r8a77965-u-boot.dtsi" / { diff --git a/arch/arm/dts/r8a77965-m3nulcb.dts b/arch/arm/dts/r8a77965-ulcb.dts index 964078b6cc4..964078b6cc4 100644 --- a/arch/arm/dts/r8a77965-m3nulcb.dts +++ b/arch/arm/dts/r8a77965-ulcb.dts diff --git a/arch/arm/dts/r8a77965.dtsi b/arch/arm/dts/r8a77965.dtsi index 2554b1742db..c17d90bd160 100644 --- a/arch/arm/dts/r8a77965.dtsi +++ b/arch/arm/dts/r8a77965.dtsi @@ -111,6 +111,8 @@ power-domains = <&sysc R8A77965_PD_CA57_CPU0>; next-level-cache = <&L2_CA57>; enable-method = "psci"; + #cooling-cells = <2>; + dynamic-power-coefficient = <854>; clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; operating-points-v2 = <&cluster0_opp>; }; @@ -427,12 +429,12 @@ #interrupt-cells = <2>; interrupt-controller; reg = <0 0xe61c0000 0 0x200>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 407>; power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; resets = <&cpg 407>; @@ -667,7 +669,7 @@ <&usb_dmac1 0>, <&usb_dmac1 1>; dma-names = "ch0", "ch1", "ch2", "ch3"; renesas,buswait = <11>; - phys = <&usb2_phy0>; + phys = <&usb2_phy0 3>; phy-names = "usb"; power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; resets = <&cpg 704>, <&cpg 703>; @@ -678,8 +680,8 @@ compatible = "renesas,r8a77965-usb-dmac", "renesas,usb-dmac"; reg = <0 0xe65a0000 0 0x100>; - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1"; clocks = <&cpg CPG_MOD 330>; power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; @@ -692,8 +694,8 @@ compatible = "renesas,r8a77965-usb-dmac", "renesas,usb-dmac"; reg = <0 0xe65b0000 0 0x100>; - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1"; clocks = <&cpg CPG_MOD 331>; power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; @@ -719,23 +721,23 @@ compatible = "renesas,dmac-r8a77965", "renesas,rcar-dmac"; reg = <0 0xe6700000 0 0x10000>; - interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -761,23 +763,23 @@ compatible = "renesas,dmac-r8a77965", "renesas,rcar-dmac"; reg = <0 0xe7300000 0 0x10000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -803,23 +805,23 @@ compatible = "renesas,dmac-r8a77965", "renesas,rcar-dmac"; reg = <0 0xe7310000 0 0x10000>; - interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -1195,6 +1197,17 @@ status = "disabled"; }; + tpu: pwm@e6e80000 { + compatible = "renesas,tpu-r8a77965", "renesas,tpu"; + reg = <0 0xe6e80000 0 0x148>; + interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 304>; + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; + resets = <&cpg 304>; + #pwm-cells = <3>; + status = "disabled"; + }; + msiof0: spi@e6e90000 { compatible = "renesas,msiof-r8a77965", "renesas,rcar-gen3-msiof"; @@ -1924,23 +1937,23 @@ compatible = "renesas,dmac-r8a77965", "renesas,rcar-dmac"; reg = <0 0xec700000 0 0x10000>; - interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -1958,23 +1971,23 @@ compatible = "renesas,dmac-r8a77965", "renesas,rcar-dmac"; reg = <0 0xec720000 0 0x10000>; - interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -2015,7 +2028,7 @@ reg = <0 0xee080000 0 0x100>; interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0>; + phys = <&usb2_phy0 1>; phy-names = "usb"; power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; resets = <&cpg 703>, <&cpg 704>; @@ -2027,7 +2040,7 @@ reg = <0 0xee0a0000 0 0x100>; interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 702>; - phys = <&usb2_phy1>; + phys = <&usb2_phy1 1>; phy-names = "usb"; power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; resets = <&cpg 702>; @@ -2039,7 +2052,7 @@ reg = <0 0xee080100 0 0x100>; interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0>; + phys = <&usb2_phy0 2>; phy-names = "usb"; companion = <&ohci0>; power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; @@ -2052,7 +2065,7 @@ reg = <0 0xee0a0100 0 0x100>; interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 702>; - phys = <&usb2_phy1>; + phys = <&usb2_phy1 2>; phy-names = "usb"; companion = <&ohci1>; power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; @@ -2068,7 +2081,7 @@ clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; resets = <&cpg 703>, <&cpg 704>; - #phy-cells = <0>; + #phy-cells = <1>; status = "disabled"; }; @@ -2079,7 +2092,7 @@ clocks = <&cpg CPG_MOD 702>; power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; resets = <&cpg 702>; - #phy-cells = <0>; + #phy-cells = <1>; status = "disabled"; }; @@ -2092,6 +2105,7 @@ max-frequency = <200000000>; power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; resets = <&cpg 314>; + iommus = <&ipmmu_ds1 32>; status = "disabled"; }; @@ -2104,6 +2118,7 @@ max-frequency = <200000000>; power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; resets = <&cpg 313>; + iommus = <&ipmmu_ds1 33>; status = "disabled"; }; @@ -2116,6 +2131,7 @@ max-frequency = <200000000>; power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; resets = <&cpg 312>; + iommus = <&ipmmu_ds1 34>; status = "disabled"; }; @@ -2128,6 +2144,7 @@ max-frequency = <200000000>; power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; resets = <&cpg 311>; + iommus = <&ipmmu_ds1 35>; status = "disabled"; }; @@ -2167,10 +2184,10 @@ #size-cells = <2>; bus-range = <0x00 0xff>; device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 - 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 - 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 - 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; + ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, + <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, + <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, + <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; /* Map all possible DDR as inbound ranges */ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, @@ -2194,10 +2211,10 @@ #size-cells = <2>; bus-range = <0x00 0xff>; device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000 - 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000 - 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000 - 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; + ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, + <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, + <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, + <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; /* Map all possible DDR as inbound ranges */ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, @@ -2242,14 +2259,6 @@ renesas,fcp = <&fcpvb0>; }; - fcpvb0: fcp@fe96f000 { - compatible = "renesas,fcpv"; - reg = <0 0xfe96f000 0 0x200>; - clocks = <&cpg CPG_MOD 607>; - power-domains = <&sysc R8A77965_PD_A3VP>; - resets = <&cpg 607>; - }; - vspi0: vsp@fe9a0000 { compatible = "renesas,vsp2"; reg = <0 0xfe9a0000 0 0x8000>; @@ -2261,14 +2270,6 @@ renesas,fcp = <&fcpvi0>; }; - fcpvi0: fcp@fe9af000 { - compatible = "renesas,fcpv"; - reg = <0 0xfe9af000 0 0x200>; - clocks = <&cpg CPG_MOD 611>; - power-domains = <&sysc R8A77965_PD_A3VP>; - resets = <&cpg 611>; - }; - vspd0: vsp@fea20000 { compatible = "renesas,vsp2"; reg = <0 0xfea20000 0 0x5000>; @@ -2280,14 +2281,6 @@ renesas,fcp = <&fcpvd0>; }; - fcpvd0: fcp@fea27000 { - compatible = "renesas,fcpv"; - reg = <0 0xfea27000 0 0x200>; - clocks = <&cpg CPG_MOD 603>; - power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 603>; - }; - vspd1: vsp@fea28000 { compatible = "renesas,vsp2"; reg = <0 0xfea28000 0 0x5000>; @@ -2299,6 +2292,22 @@ renesas,fcp = <&fcpvd1>; }; + fcpvb0: fcp@fe96f000 { + compatible = "renesas,fcpv"; + reg = <0 0xfe96f000 0 0x200>; + clocks = <&cpg CPG_MOD 607>; + power-domains = <&sysc R8A77965_PD_A3VP>; + resets = <&cpg 607>; + }; + + fcpvd0: fcp@fea27000 { + compatible = "renesas,fcpv"; + reg = <0 0xfea27000 0 0x200>; + clocks = <&cpg CPG_MOD 603>; + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; + resets = <&cpg 603>; + }; + fcpvd1: fcp@fea2f000 { compatible = "renesas,fcpv"; reg = <0 0xfea2f000 0 0x200>; @@ -2307,6 +2316,41 @@ resets = <&cpg 602>; }; + fcpvi0: fcp@fe9af000 { + compatible = "renesas,fcpv"; + reg = <0 0xfe9af000 0 0x200>; + clocks = <&cpg CPG_MOD 611>; + power-domains = <&sysc R8A77965_PD_A3VP>; + resets = <&cpg 611>; + }; + + cmm0: cmm@fea40000 { + compatible = "renesas,r8a77965-cmm", + "renesas,rcar-gen3-cmm"; + reg = <0 0xfea40000 0 0x1000>; + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; + clocks = <&cpg CPG_MOD 711>; + resets = <&cpg 711>; + }; + + cmm1: cmm@fea50000 { + compatible = "renesas,r8a77965-cmm", + "renesas,rcar-gen3-cmm"; + reg = <0 0xfea50000 0 0x1000>; + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; + clocks = <&cpg CPG_MOD 710>; + resets = <&cpg 710>; + }; + + cmm3: cmm@fea70000 { + compatible = "renesas,r8a77965-cmm", + "renesas,rcar-gen3-cmm"; + reg = <0 0xfea70000 0 0x1000>; + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; + clocks = <&cpg CPG_MOD 708>; + resets = <&cpg 708>; + }; + csi20: csi2@fea80000 { compatible = "renesas,r8a77965-csi2"; reg = <0 0xfea80000 0 0x10000>; @@ -2454,9 +2498,11 @@ <&cpg CPG_MOD 723>, <&cpg CPG_MOD 721>; clock-names = "du.0", "du.1", "du.3"; - status = "disabled"; - vsps = <&vspd0 0 &vspd1 0 &vspd0 1>; + renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>; + vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>; + + status = "disabled"; ports { #address-cells = <1>; @@ -2519,6 +2565,7 @@ polling-delay-passive = <250>; polling-delay = <1000>; thermal-sensors = <&tsc 0>; + sustainable-power = <2439>; trips { sensor1_crit: sensor1-crit { @@ -2533,6 +2580,7 @@ polling-delay-passive = <250>; polling-delay = <1000>; thermal-sensors = <&tsc 1>; + sustainable-power = <2439>; trips { sensor2_crit: sensor2-crit { @@ -2547,14 +2595,30 @@ polling-delay-passive = <250>; polling-delay = <1000>; thermal-sensors = <&tsc 2>; + sustainable-power = <2439>; trips { + target: trip-point1 { + /* miliCelsius */ + temperature = <100000>; + hysteresis = <1000>; + type = "passive"; + }; + sensor3_crit: sensor3-crit { temperature = <120000>; hysteresis = <1000>; type = "critical"; }; }; + + cooling-maps { + map0 { + trip = <&target>; + cooling-device = <&a57_0 2 4>; + contribution = <1024>; + }; + }; }; }; diff --git a/arch/arm/dts/r8a77970-eagle.dts b/arch/arm/dts/r8a77970-eagle.dts index b6d53321576..2afb91ec9c8 100644 --- a/arch/arm/dts/r8a77970-eagle.dts +++ b/arch/arm/dts/r8a77970-eagle.dts @@ -19,14 +19,17 @@ }; chosen { - bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; + bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; stdout-path = "serial0:115200n8"; }; - memory@48000000 { - device_type = "memory"; - /* first 128MB is reserved for secure area. */ - reg = <0x0 0x48000000 0x0 0x38000000>; + d3p3: regulator-fixed { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; }; hdmi-out { @@ -40,15 +43,6 @@ }; }; - d3p3: regulator-fixed { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - lvds-decoder { compatible = "thine,thc63lvd1024"; @@ -73,6 +67,12 @@ }; }; }; + + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x38000000>; + }; }; &avb { @@ -102,6 +102,10 @@ }; }; +&du { + status = "okay"; +}; + &extal_clk { clock-frequency = <16666666>; }; @@ -157,6 +161,18 @@ }; }; +&lvds0 { + status = "okay"; + + ports { + port@1 { + lvds0_out: endpoint { + remote-endpoint = <&thc63lvd1024_in>; + }; + }; + }; +}; + &pfc { avb_pins: avb0 { groups = "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk"; @@ -190,19 +206,3 @@ status = "okay"; }; - -&du { - status = "okay"; -}; - -&lvds0 { - status = "okay"; - - ports { - port@1 { - lvds0_out: endpoint { - remote-endpoint = <&thc63lvd1024_in>; - }; - }; - }; -}; diff --git a/arch/arm/dts/r8a77970.dtsi b/arch/arm/dts/r8a77970.dtsi index 5b6164d4b8e..664a73a2cc6 100644 --- a/arch/arm/dts/r8a77970.dtsi +++ b/arch/arm/dts/r8a77970.dtsi @@ -302,8 +302,8 @@ thermal: thermal@e6190000 { compatible = "renesas,thermal-r8a77970"; - reg = <0 0xe6190000 0 0x10 - 0 0xe6190100 0 0x120>; + reg = <0 0xe6190000 0 0x10>, + <0 0xe6190100 0 0x120>; interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; @@ -318,12 +318,12 @@ #interrupt-cells = <2>; interrupt-controller; reg = <0 0xe61c0000 0 0x200>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 407>; power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; resets = <&cpg 407>; @@ -652,7 +652,7 @@ }; pwm3: pwm@e6e33000 { - compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar"; + compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar"; reg = <0 0xe6e33000 0 8>; #pwm-cells = <2>; clocks = <&cpg CPG_MOD 523>; @@ -933,15 +933,15 @@ compatible = "renesas,dmac-r8a77970", "renesas,rcar-dmac"; reg = <0 0xe7300000 0 0x10000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7"; @@ -961,15 +961,15 @@ compatible = "renesas,dmac-r8a77970", "renesas,rcar-dmac"; reg = <0 0xe7310000 0 0x10000>; - interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7"; @@ -1035,6 +1035,7 @@ power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; resets = <&cpg 314>; max-frequency = <200000000>; + iommus = <&ipmmu_ds1 32>; status = "disabled"; }; @@ -1120,7 +1121,7 @@ clock-names = "du.0"; power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; resets = <&cpg 724>; - vsps = <&vspd0>; + vsps = <&vspd0 0>; status = "disabled"; ports { @@ -1181,6 +1182,9 @@ polling-delay = <1000>; thermal-sensors = <&thermal>; + cooling-maps { + }; + trips { cpu-crit { temperature = <120000>; @@ -1188,9 +1192,6 @@ type = "critical"; }; }; - - cooling-maps { - }; }; }; diff --git a/arch/arm/dts/r8a77980-condor.dts b/arch/arm/dts/r8a77980-condor.dts index 5a7012be0d6..3dde028e22a 100644 --- a/arch/arm/dts/r8a77980-condor.dts +++ b/arch/arm/dts/r8a77980-condor.dts @@ -22,35 +22,20 @@ stdout-path = "serial0:115200n8"; }; - memory@48000000 { - device_type = "memory"; - /* first 128MB is reserved for secure area. */ - reg = <0 0x48000000 0 0x78000000>; - }; - - d3_3v: regulator-0 { - compatible = "regulator-fixed"; - regulator-name = "D3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - vddq_vin01: regulator-1 { + d1_8v: regulator-2 { compatible = "regulator-fixed"; - regulator-name = "VDDQ_VIN01"; + regulator-name = "D1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; }; - d1_8v: regulator-2 { + d3_3v: regulator-0 { compatible = "regulator-fixed"; - regulator-name = "D1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; + regulator-name = "D3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; @@ -90,6 +75,21 @@ }; }; + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0 0x48000000 0 0x78000000>; + }; + + vddq_vin01: regulator-1 { + compatible = "regulator-fixed"; + regulator-name = "VDDQ_VIN01"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + x1_clk: x1-clock { compatible = "fixed-clock"; #clock-cells = <0>; diff --git a/arch/arm/dts/r8a77980.dtsi b/arch/arm/dts/r8a77980.dtsi index a901a341dcf..b340fb46999 100644 --- a/arch/arm/dts/r8a77980.dtsi +++ b/arch/arm/dts/r8a77980.dtsi @@ -348,12 +348,12 @@ #interrupt-cells = <2>; interrupt-controller; reg = <0 0xe61c0000 0 0x200>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 407>; power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; resets = <&cpg 407>; @@ -1174,23 +1174,23 @@ compatible = "renesas,dmac-r8a77980", "renesas,rcar-dmac"; reg = <0 0xe7300000 0 0x10000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -1216,23 +1216,23 @@ compatible = "renesas,dmac-r8a77980", "renesas,rcar-dmac"; reg = <0 0xe7310000 0 0x10000>; - interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -1299,9 +1299,9 @@ #iommu-cells = <1>; }; - ipmmu_vc0: mmu@fe6b0000 { + ipmmu_vc0: mmu@fe990000 { compatible = "renesas,ipmmu-r8a77980"; - reg = <0 0xfe6b0000 0 0x1000>; + reg = <0 0xfe990000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 12>; power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; #iommu-cells = <1>; @@ -1338,6 +1338,7 @@ power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; resets = <&cpg 314>; max-frequency = <200000000>; + iommus = <&ipmmu_ds1 32>; status = "disabled"; }; @@ -1366,21 +1367,17 @@ #size-cells = <2>; bus-range = <0x00 0xff>; device_type = "pci"; - ranges = < - 0x01000000 0 0x00000000 0 0xfe100000 0 0x0100000 - 0x02000000 0 0xfe200000 0 0xfe200000 0 0x0200000 - 0x02000000 0 0x30000000 0 0x30000000 0 0x8000000 - 0x42000000 0 0x38000000 0 0x38000000 0 0x8000000 - >; - dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 - 0 0x80000000>; + ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x0100000>, + <0x02000000 0 0xfe200000 0 0xfe200000 0 0x0200000>, + <0x02000000 0 0x30000000 0 0x30000000 0 0x8000000>, + <0x42000000 0 0x38000000 0 0x38000000 0 0x8000000>; + dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 148 - IRQ_TYPE_LEVEL_HIGH>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; clock-names = "pcie", "pcie_bus"; power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; @@ -1495,7 +1492,7 @@ clock-names = "du.0"; power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; resets = <&cpg 724>; - vsps = <&vspd0>; + vsps = <&vspd0 0>; status = "disabled"; ports { diff --git a/arch/arm/dts/r8a77990-ebisu.dts b/arch/arm/dts/r8a77990-ebisu.dts index c7277258995..4fd2b14fbb8 100644 --- a/arch/arm/dts/r8a77990-ebisu.dts +++ b/arch/arm/dts/r8a77990-ebisu.dts @@ -19,16 +19,10 @@ }; chosen { - bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; + bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; stdout-path = "serial0:115200n8"; }; - memory@48000000 { - device_type = "memory"; - /* first 128MB is reserved for secure area. */ - reg = <0x0 0x48000000 0x0 0x38000000>; - }; - audio_clkout: audio-clkout { /* * This is same as <&rcar_sound 0> @@ -107,36 +101,10 @@ }; }; - vga { - compatible = "vga-connector"; - - port { - vga_in: endpoint { - remote-endpoint = <&adv7123_out>; - }; - }; - }; - - vga-encoder { - compatible = "adi,adv7123"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - adv7123_in: endpoint { - remote-endpoint = <&du_out_rgb>; - }; - }; - port@1 { - reg = <1>; - adv7123_out: endpoint { - remote-endpoint = <&vga_in>; - }; - }; - }; + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x38000000>; }; reg_1p8v: regulator0 { @@ -157,15 +125,13 @@ regulator-always-on; }; - vbus0_usb2: regulator-vbus0-usb2 { + reg_12p0v: regulator2 { compatible = "regulator-fixed"; - - regulator-name = "USB20_VBUS_CN"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - - gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>; - enable-active-high; + regulator-name = "D12.0V"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-boot-on; + regulator-always-on; }; rsnd_ak4613: sound { @@ -176,34 +142,24 @@ simple-audio-card,bitclock-master = <&sndcpu>; simple-audio-card,frame-master = <&sndcpu>; - sndcpu: simple-audio-card,cpu { - sound-dai = <&rcar_sound>; - }; - sndcodec: simple-audio-card,codec { sound-dai = <&ak4613>; }; - }; - x12_clk: x12 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <24576000>; + sndcpu: simple-audio-card,cpu { + sound-dai = <&rcar_sound>; + }; }; - reg_12p0v: regulator2 { + vbus0_usb2: regulator-vbus0-usb2 { compatible = "regulator-fixed"; - regulator-name = "D12.0V"; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - regulator-boot-on; - regulator-always-on; - }; - x13_clk: x13 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <74250000>; + regulator-name = "USB20_VBUS_CN"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>; + enable-active-high; }; vcc_sdhi0: regulator-vcc-sdhi0 { @@ -226,8 +182,7 @@ gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>; gpios-states = <1>; - states = <3300000 1 - 1800000 0>; + states = <3300000 1>, <1800000 0>; }; vcc_sdhi1: regulator-vcc-sdhi1 { @@ -250,8 +205,51 @@ gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>; gpios-states = <1>; - states = <3300000 1 - 1800000 0>; + states = <3300000 1>, <1800000 0>; + }; + + vga { + compatible = "vga-connector"; + + port { + vga_in: endpoint { + remote-endpoint = <&adv7123_out>; + }; + }; + }; + + vga-encoder { + compatible = "adi,adv7123"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + adv7123_in: endpoint { + remote-endpoint = <&du_out_rgb>; + }; + }; + port@1 { + reg = <1>; + adv7123_out: endpoint { + remote-endpoint = <&vga_in>; + }; + }; + }; + }; + + x12_clk: x12 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24576000>; + }; + + x13_clk: x13 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <74250000>; }; }; @@ -262,7 +260,6 @@ &avb { pinctrl-0 = <&avb_pins>; pinctrl-names = "default"; - renesas,no-ether-link; phy-handle = <&phy0>; status = "okay"; @@ -272,6 +269,14 @@ interrupt-parent = <&gpio2>; interrupts = <21 IRQ_TYPE_LEVEL_LOW>; reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>; + /* + * TX clock internal delay mode is required for reliable + * 1Gbps communication using the KSZ9031RNX phy present on + * the Ebisu board, however, TX clock internal delay mode + * isn't supported on r8a77990. Thus, limit speed to + * 100Mbps for reliable communication. + */ + max-speed = <100>; }; }; @@ -548,6 +553,11 @@ function = "pwm5"; }; + scif2_pins: scif2 { + groups = "scif2_data_a"; + function = "scif2"; + }; + sdhi0_pins: sd0 { groups = "sdhi0_data4", "sdhi0_ctrl"; function = "sdhi0"; @@ -578,20 +588,15 @@ power-source = <1800>; }; - sound_pins: sound { - groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data"; - function = "ssi"; - }; - sound_clk_pins: sound_clk { groups = "audio_clk_a", "audio_clk_b_a", "audio_clk_c_a", "audio_clkout_a", "audio_clkout1_a"; function = "audio_clk"; }; - scif2_pins: scif2 { - groups = "scif2_data_a"; - function = "scif2"; + sound_pins: sound { + groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data"; + function = "ssi"; }; usb0_pins: usb { @@ -629,7 +634,6 @@ /* audio_clkout0/1/2/3 */ #clock-cells = <1>; clock-frequency = <12288000 11289600>; - clkout-lr-synchronous; status = "okay"; @@ -672,38 +676,6 @@ status = "okay"; }; -&ssi1 { - shared-pin; -}; - -&usb2_phy0 { - pinctrl-0 = <&usb0_pins>; - pinctrl-names = "default"; - - vbus-supply = <&vbus0_usb2>; - status = "okay"; -}; - -&usb3_peri0 { - companion = <&xhci0>; - status = "okay"; -}; - -&vin4 { - status = "okay"; -}; - -&vin5 { - status = "okay"; -}; - -&xhci0 { - pinctrl-0 = <&usb30_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - &sdhi0 { pinctrl-0 = <&sdhi0_pins>; pinctrl-1 = <&sdhi0_pins_uhs>; @@ -747,3 +719,35 @@ non-removable; status = "okay"; }; + +&ssi1 { + shared-pin; +}; + +&usb2_phy0 { + pinctrl-0 = <&usb0_pins>; + pinctrl-names = "default"; + + vbus-supply = <&vbus0_usb2>; + status = "okay"; +}; + +&usb3_peri0 { + companion = <&xhci0>; + status = "okay"; +}; + +&vin4 { + status = "okay"; +}; + +&vin5 { + status = "okay"; +}; + +&xhci0 { + pinctrl-0 = <&usb30_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; diff --git a/arch/arm/dts/r8a77990.dtsi b/arch/arm/dts/r8a77990.dtsi index 56cb566ffa0..32d91f21024 100644 --- a/arch/arm/dts/r8a77990.dtsi +++ b/arch/arm/dts/r8a77990.dtsi @@ -84,9 +84,11 @@ compatible = "arm,cortex-a53"; reg = <0>; device_type = "cpu"; + #cooling-cells = <2>; power-domains = <&sysc R8A77990_PD_CA53_CPU0>; next-level-cache = <&L2_CA53>; enable-method = "psci"; + dynamic-power-coefficient = <277>; clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>; operating-points-v2 = <&cluster1_opp>; }; @@ -392,12 +394,12 @@ #interrupt-cells = <2>; interrupt-controller; reg = <0 0xe61c0000 0 0x200>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 407>; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; resets = <&cpg 407>; @@ -630,7 +632,7 @@ <&usb_dmac1 0>, <&usb_dmac1 1>; dma-names = "ch0", "ch1", "ch2", "ch3"; renesas,buswait = <11>; - phys = <&usb2_phy0>; + phys = <&usb2_phy0 3>; phy-names = "usb"; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; resets = <&cpg 704>, <&cpg 703>; @@ -641,8 +643,8 @@ compatible = "renesas,r8a77990-usb-dmac", "renesas,usb-dmac"; reg = <0 0xe65a0000 0 0x100>; - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1"; clocks = <&cpg CPG_MOD 330>; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; @@ -655,8 +657,8 @@ compatible = "renesas,r8a77990-usb-dmac", "renesas,usb-dmac"; reg = <0 0xe65b0000 0 0x100>; - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1"; clocks = <&cpg CPG_MOD 331>; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; @@ -669,23 +671,23 @@ compatible = "renesas,dmac-r8a77990", "renesas,rcar-dmac"; reg = <0 0xe6700000 0 0x10000>; - interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -711,23 +713,23 @@ compatible = "renesas,dmac-r8a77990", "renesas,rcar-dmac"; reg = <0 0xe7300000 0 0x10000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -753,23 +755,23 @@ compatible = "renesas,dmac-r8a77990", "renesas,rcar-dmac"; reg = <0 0xe7310000 0 0x10000>; - interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -1324,6 +1326,17 @@ "ssi.1", "ssi.0"; status = "disabled"; + rcar_sound,ctu { + ctu00: ctu-0 { }; + ctu01: ctu-1 { }; + ctu02: ctu-2 { }; + ctu03: ctu-3 { }; + ctu10: ctu-4 { }; + ctu11: ctu-5 { }; + ctu12: ctu-6 { }; + ctu13: ctu-7 { }; + }; + rcar_sound,dvc { dvc0: dvc-0 { dmas = <&audma0 0xbc>; @@ -1340,17 +1353,6 @@ mix1: mix-1 { }; }; - rcar_sound,ctu { - ctu00: ctu-0 { }; - ctu01: ctu-1 { }; - ctu02: ctu-2 { }; - ctu03: ctu-3 { }; - ctu10: ctu-4 { }; - ctu11: ctu-5 { }; - ctu12: ctu-6 { }; - ctu13: ctu-7 { }; - }; - rcar_sound,src { src0: src-0 { interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; @@ -1472,23 +1474,23 @@ compatible = "renesas,dmac-r8a77990", "renesas,rcar-dmac"; reg = <0 0xec700000 0 0x10000>; - interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -1537,7 +1539,7 @@ reg = <0 0xee080000 0 0x100>; interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0>; + phys = <&usb2_phy0 1>; phy-names = "usb"; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; resets = <&cpg 703>, <&cpg 704>; @@ -1549,7 +1551,7 @@ reg = <0 0xee080100 0 0x100>; interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0>; + phys = <&usb2_phy0 2>; phy-names = "usb"; companion = <&ohci0>; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; @@ -1565,7 +1567,7 @@ clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; resets = <&cpg 703>, <&cpg 704>; - #phy-cells = <0>; + #phy-cells = <1>; status = "disabled"; }; @@ -1578,6 +1580,7 @@ max-frequency = <200000000>; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; resets = <&cpg 314>; + iommus = <&ipmmu_ds1 32>; status = "disabled"; }; @@ -1590,6 +1593,7 @@ max-frequency = <200000000>; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; resets = <&cpg 313>; + iommus = <&ipmmu_ds1 33>; status = "disabled"; }; @@ -1602,6 +1606,7 @@ max-frequency = <200000000>; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; resets = <&cpg 311>; + iommus = <&ipmmu_ds1 35>; status = "disabled"; }; @@ -1630,10 +1635,10 @@ #size-cells = <2>; bus-range = <0x00 0xff>; device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 - 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 - 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 - 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; + ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, + <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, + <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, + <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; /* Map all possible DDR as inbound ranges */ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, @@ -1725,6 +1730,24 @@ iommus = <&ipmmu_vi0 9>; }; + cmm0: cmm@fea40000 { + compatible = "renesas,r8a77990-cmm", + "renesas,rcar-gen3-cmm"; + reg = <0 0xfea40000 0 0x1000>; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + clocks = <&cpg CPG_MOD 711>; + resets = <&cpg 711>; + }; + + cmm1: cmm@fea50000 { + compatible = "renesas,r8a77990-cmm", + "renesas,rcar-gen3-cmm"; + reg = <0 0xfea50000 0 0x1000>; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + clocks = <&cpg CPG_MOD 710>; + resets = <&cpg 710>; + }; + csi40: csi2@feaa0000 { compatible = "renesas,r8a77990-csi2"; reg = <0 0xfeaa0000 0 0x10000>; @@ -1758,13 +1781,18 @@ du: display@feb00000 { compatible = "renesas,du-r8a77990"; - reg = <0 0xfeb00000 0 0x80000>; + reg = <0 0xfeb00000 0 0x40000>; interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; clock-names = "du.0", "du.1"; - vsps = <&vspd0 0 &vspd1 0>; + resets = <&cpg 724>; + reset-names = "du.0"; + + renesas,cmms = <&cmm0>, <&cmm1>; + vsps = <&vspd0 0>, <&vspd1 0>; + status = "disabled"; ports { @@ -1801,6 +1829,8 @@ resets = <&cpg 727>; status = "disabled"; + renesas,companion = <&lvds1>; + ports { #address-cells = <1>; #size-cells = <0>; @@ -1856,18 +1886,30 @@ thermal-zones { cpu-thermal { polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&thermal>; + polling-delay = <0>; + thermal-sensors = <&thermal 0>; + sustainable-power = <717>; + + cooling-maps { + map0 { + trip = <&target>; + cooling-device = <&a53_0 0 2>; + contribution = <1024>; + }; + }; trips { - cpu-crit { + sensor1_crit: sensor1-crit { temperature = <120000>; hysteresis = <2000>; type = "critical"; }; - }; - cooling-maps { + target: trip-point1 { + temperature = <100000>; + hysteresis = <2000>; + type = "passive"; + }; }; }; }; diff --git a/arch/arm/dts/r8a77995-draak.dts b/arch/arm/dts/r8a77995-draak.dts index a7dc11e36fd..67634cb01d6 100644 --- a/arch/arm/dts/r8a77995-draak.dts +++ b/arch/arm/dts/r8a77995-draak.dts @@ -19,11 +19,6 @@ ethernet0 = &avb; }; - chosen { - bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; - stdout-path = "serial0:115200n8"; - }; - backlight: backlight { compatible = "pwm-backlight"; pwms = <&pwm1 0 50000>; @@ -35,6 +30,11 @@ enable-gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>; }; + chosen { + bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; + stdout-path = "serial0:115200n8"; + }; + composite-in { compatible = "composite-video-connector"; @@ -97,7 +97,7 @@ reg = <0x0 0x48000000 0x0 0x18000000>; }; - reg_1p8v: regulator0 { + reg_1p8v: regulator-1p8v { compatible = "regulator-fixed"; regulator-name = "fixed-1.8V"; regulator-min-microvolt = <1800000>; @@ -106,7 +106,7 @@ regulator-always-on; }; - reg_3p3v: regulator1 { + reg_3p3v: regulator-3p3v { compatible = "regulator-fixed"; regulator-name = "fixed-3.3V"; regulator-min-microvolt = <3300000>; @@ -115,7 +115,7 @@ regulator-always-on; }; - reg_12p0v: regulator1 { + reg_12p0v: regulator-12p0v { compatible = "regulator-fixed"; regulator-name = "D12.0V"; regulator-min-microvolt = <12000000>; @@ -175,6 +175,14 @@ reg = <0>; interrupt-parent = <&gpio5>; interrupts = <19 IRQ_TYPE_LEVEL_LOW>; + /* + * TX clock internal delay mode is required for reliable + * 1Gbps communication using the KSZ9031RNX phy present on + * the Draak board, however, TX clock internal delay mode + * isn't supported on r8a77995. Thus, limit speed to + * 100Mbps for reliable communication. + */ + max-speed = <100>; }; }; @@ -511,12 +519,7 @@ status = "okay"; ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - + port { vin4_in: endpoint { remote-endpoint = <&adv7180_out>; }; diff --git a/arch/arm/dts/r8a77995.dtsi b/arch/arm/dts/r8a77995.dtsi index 5bf3af246e1..9503007c34c 100644 --- a/arch/arm/dts/r8a77995.dtsi +++ b/arch/arm/dts/r8a77995.dtsi @@ -231,52 +231,17 @@ #interrupt-cells = <2>; interrupt-controller; reg = <0 0xe61c0000 0 0x200>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 407>; power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; resets = <&cpg 407>; }; - hscif0: serial@e6540000 { - compatible = "renesas,hscif-r8a77995", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe6540000 0 0x60>; - interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 520>, - <&cpg CPG_CORE R8A77995_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac1 0x31>, <&dmac1 0x30>, - <&dmac2 0x31>, <&dmac2 0x30>; - dma-names = "tx", "rx", "tx", "rx"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 520>; - status = "disabled"; - }; - - hscif3: serial@e66a0000 { - compatible = "renesas,hscif-r8a77995", - "renesas,rcar-gen3-hscif", - "renesas,hscif"; - reg = <0 0xe66a0000 0 0x60>; - interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 517>, - <&cpg CPG_CORE R8A77995_CLK_S3D1C>, - <&scif_clk>; - clock-names = "fck", "brg_int", "scif_clk"; - dmas = <&dmac0 0x37>, <&dmac0 0x36>; - dma-names = "tx", "rx"; - power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; - resets = <&cpg 517>; - status = "disabled"; - }; - i2c0: i2c@e6500000 { #address-cells = <1>; #size-cells = <0>; @@ -344,6 +309,41 @@ status = "disabled"; }; + hscif0: serial@e6540000 { + compatible = "renesas,hscif-r8a77995", + "renesas,rcar-gen3-hscif", + "renesas,hscif"; + reg = <0 0xe6540000 0 0x60>; + interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 520>, + <&cpg CPG_CORE R8A77995_CLK_S3D1C>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac1 0x31>, <&dmac1 0x30>, + <&dmac2 0x31>, <&dmac2 0x30>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 520>; + status = "disabled"; + }; + + hscif3: serial@e66a0000 { + compatible = "renesas,hscif-r8a77995", + "renesas,rcar-gen3-hscif", + "renesas,hscif"; + reg = <0 0xe66a0000 0 0x60>; + interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 517>, + <&cpg CPG_CORE R8A77995_CLK_S3D1C>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac0 0x37>, <&dmac0 0x36>; + dma-names = "tx", "rx"; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 517>; + status = "disabled"; + }; + hsusb: usb@e6590000 { compatible = "renesas,usbhs-r8a77995", "renesas,rcar-gen3-usbhs"; @@ -354,7 +354,7 @@ <&usb_dmac1 0>, <&usb_dmac1 1>; dma-names = "ch0", "ch1", "ch2", "ch3"; renesas,buswait = <11>; - phys = <&usb2_phy0>; + phys = <&usb2_phy0 3>; phy-names = "usb"; power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; resets = <&cpg 704>, <&cpg 703>; @@ -365,8 +365,8 @@ compatible = "renesas,r8a77995-usb-dmac", "renesas,usb-dmac"; reg = <0 0xe65a0000 0 0x100>; - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1"; clocks = <&cpg CPG_MOD 330>; power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; @@ -379,8 +379,8 @@ compatible = "renesas,r8a77995-usb-dmac", "renesas,usb-dmac"; reg = <0 0xe65b0000 0 0x100>; - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1"; clocks = <&cpg CPG_MOD 331>; power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; @@ -418,15 +418,15 @@ compatible = "renesas,dmac-r8a77995", "renesas,rcar-dmac"; reg = <0 0xe6700000 0 0x10000>; - interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7"; @@ -446,15 +446,15 @@ compatible = "renesas,dmac-r8a77995", "renesas,rcar-dmac"; reg = <0 0xe7300000 0 0x10000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7"; @@ -474,15 +474,15 @@ compatible = "renesas,dmac-r8a77995", "renesas,rcar-dmac"; reg = <0 0xe7310000 0 0x10000>; - interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7"; @@ -875,7 +875,7 @@ reg = <0 0xee080000 0 0x100>; interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0>; + phys = <&usb2_phy0 1>; phy-names = "usb"; power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; resets = <&cpg 703>, <&cpg 704>; @@ -887,7 +887,7 @@ reg = <0 0xee080100 0 0x100>; interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; - phys = <&usb2_phy0>; + phys = <&usb2_phy0 2>; phy-names = "usb"; companion = <&ohci0>; power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; @@ -903,7 +903,7 @@ clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; resets = <&cpg 703>, <&cpg 704>; - #phy-cells = <0>; + #phy-cells = <1>; status = "disabled"; }; @@ -916,6 +916,7 @@ max-frequency = <200000000>; power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; resets = <&cpg 312>; + iommus = <&ipmmu_ds1 34>; status = "disabled"; }; @@ -993,15 +994,38 @@ iommus = <&ipmmu_vi0 9>; }; + cmm0: cmm@fea40000 { + compatible = "renesas,r8a77995-cmm", + "renesas,rcar-gen3-cmm"; + reg = <0 0xfea40000 0 0x1000>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + clocks = <&cpg CPG_MOD 711>; + resets = <&cpg 711>; + }; + + cmm1: cmm@fea50000 { + compatible = "renesas,r8a77995-cmm", + "renesas,rcar-gen3-cmm"; + reg = <0 0xfea50000 0 0x1000>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + clocks = <&cpg CPG_MOD 710>; + resets = <&cpg 710>; + }; + du: display@feb00000 { compatible = "renesas,du-r8a77995"; - reg = <0 0xfeb00000 0 0x80000>; + reg = <0 0xfeb00000 0 0x40000>; interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; clock-names = "du.0", "du.1"; - vsps = <&vspd0 0 &vspd1 0>; + resets = <&cpg 724>; + reset-names = "du.0"; + + renesas,cmms = <&cmm0>, <&cmm1>; + vsps = <&vspd0 0>, <&vspd1 0>; + status = "disabled"; ports { @@ -1038,6 +1062,8 @@ resets = <&cpg 727>; status = "disabled"; + renesas,companion = <&lvds1>; + ports { #address-cells = <1>; #size-cells = <0>; @@ -1096,6 +1122,9 @@ polling-delay = <1000>; thermal-sensors = <&thermal>; + cooling-maps { + }; + trips { cpu-crit { temperature = <120000>; @@ -1103,9 +1132,6 @@ type = "critical"; }; }; - - cooling-maps { - }; }; }; diff --git a/arch/arm/dts/salvator-common.dtsi b/arch/arm/dts/salvator-common.dtsi index 2dba1328acf..98bbcafc8c0 100644 --- a/arch/arm/dts/salvator-common.dtsi +++ b/arch/arm/dts/salvator-common.dtsi @@ -39,7 +39,7 @@ }; chosen { - bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; + bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; stdout-path = "serial0:115200n8"; }; @@ -87,6 +87,28 @@ }; }; + hdmi0-out { + compatible = "hdmi-connector"; + label = "HDMI0 OUT"; + type = "a"; + + port { + hdmi0_con: endpoint { + }; + }; + }; + + hdmi1-out { + compatible = "hdmi-connector"; + label = "HDMI1 OUT"; + type = "a"; + + port { + hdmi1_con: endpoint { + }; + }; + }; + keys { compatible = "gpio-keys"; @@ -210,8 +232,7 @@ gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; gpios-states = <1>; - states = <3300000 1 - 1800000 0>; + states = <3300000 1>, <1800000 0>; }; vcc_sdhi3: regulator-vcc-sdhi3 { @@ -234,30 +255,7 @@ gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; gpios-states = <1>; - states = <3300000 1 - 1800000 0>; - }; - - hdmi0-out { - compatible = "hdmi-connector"; - label = "HDMI0 OUT"; - type = "a"; - - port { - hdmi0_con: endpoint { - }; - }; - }; - - hdmi1-out { - compatible = "hdmi-connector"; - label = "HDMI1 OUT"; - type = "a"; - - port { - hdmi1_con: endpoint { - }; - }; + states = <3300000 1>, <1800000 0>; }; vga { @@ -462,20 +460,6 @@ #gpio-cells = <2>; }; - csa_vdd: adc@7c { - compatible = "maxim,max9611"; - reg = <0x7c>; - - shunt-resistor-micro-ohms = <5000>; - }; - - csa_dvfs: adc@7f { - compatible = "maxim,max9611"; - reg = <0x7f>; - - shunt-resistor-micro-ohms = <5000>; - }; - video-receiver@70 { compatible = "adi,adv7482"; reg = <0x70 0x71 0x72 0x73 0x74 0x75 @@ -527,6 +511,20 @@ }; }; }; + + csa_vdd: adc@7c { + compatible = "maxim,max9611"; + reg = <0x7c>; + + shunt-resistor-micro-ohms = <5000>; + }; + + csa_dvfs: adc@7f { + compatible = "maxim,max9611"; + reg = <0x7f>; + + shunt-resistor-micro-ohms = <5000>; + }; }; &i2c_dvfs { diff --git a/arch/arm/dts/salvator-xs.dtsi b/arch/arm/dts/salvator-xs.dtsi new file mode 100644 index 00000000000..717d42758cb --- /dev/null +++ b/arch/arm/dts/salvator-xs.dtsi @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the Salvator-X 2nd version board + * + * Copyright (C) 2015-2017 Renesas Electronics Corp. + */ + +#include "salvator-common.dtsi" + +/ { + model = "Renesas Salvator-X 2nd version board"; + compatible = "renesas,salvator-xs"; +}; + +&extal_clk { + clock-frequency = <16640000>; +}; + +&i2c4 { + clock-frequency = <400000>; + + versaclock6: clock-generator@6a { + compatible = "idt,5p49v6901"; + reg = <0x6a>; + #clock-cells = <1>; + clocks = <&x23_clk>; + clock-names = "xin"; + }; +}; diff --git a/arch/arm/dts/ulcb.dtsi b/arch/arm/dts/ulcb.dtsi index e70e1bac2be..ff88af8e39d 100644 --- a/arch/arm/dts/ulcb.dtsi +++ b/arch/arm/dts/ulcb.dtsi @@ -26,7 +26,7 @@ }; chosen { - bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; + bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; stdout-path = "serial0:115200n8"; }; @@ -120,8 +120,7 @@ gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; gpios-states = <1>; - states = <3300000 1 - 1800000 0>; + states = <3300000 1>, <1800000 0>; }; x12_clk: x12 { @@ -428,6 +427,11 @@ }; }; +&rwdt { + timeout-sec = <60>; + status = "okay"; +}; + &scif2 { pinctrl-0 = <&scif2_pins>; pinctrl-names = "default"; @@ -478,8 +482,3 @@ status = "okay"; }; - -&rwdt { - timeout-sec = <60>; - status = "okay"; -}; diff --git a/arch/arm/include/asm/arch-bcmcygnus/configs.h b/arch/arm/include/asm/arch-bcmcygnus/configs.h index 9eafe43fbaf..bf05cb3a72a 100644 --- a/arch/arm/include/asm/arch-bcmcygnus/configs.h +++ b/arch/arm/include/asm/arch-bcmcygnus/configs.h @@ -21,7 +21,6 @@ #define CONFIG_SYS_NS16550_COM3 0x18023000 /* Ethernet */ -#define CONFIG_PHY_BROADCOM #define CONFIG_PHY_RESET_DELAY 10000 /* PHY reset delay in us*/ #endif /* __ARCH_CONFIGS_H */ diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h index c62d414aacc..020548ac6ce 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h @@ -158,6 +158,10 @@ void erratum_a010315(void); bool soc_has_dp_ddr(void); bool soc_has_aiop(void); + +#ifdef CONFIG_GIC_V3_ITS +int ls_gic_rd_tables_init(void *blob); +#endif #endif #endif /* _ASM_ARMV8_FSL_LAYERSCAPE_SOC_H_ */ diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h b/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h index e710aa2f94f..9d2b3bababe 100644 --- a/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h +++ b/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h @@ -85,7 +85,7 @@ void cm_basic_init(const struct cm_config * const cfg); #define CLKMGR_S10_MAINPLL_VCOCALIB 0x8c /* Periphpll group */ #define CLKMGR_S10_PERPLL_EN 0xa4 -#define CLKMGR_S10_PERPLL_BYPASS 0xac +#define CLKMGR_S10_PERPLL_BYPASS 0xb0 #define CLKMGR_S10_PERPLL_CNTR2CLK 0xbc #define CLKMGR_S10_PERPLL_CNTR3CLK 0xc0 #define CLKMGR_S10_PERPLL_CNTR4CLK 0xc4 diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index a3ae6030448..48e754cc46c 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -98,6 +98,7 @@ config ARCH_MTMIPS select SUPPORTS_CPU_MIPS32_R2 select SUPPORTS_LITTLE_ENDIAN select SYSRESET + select SUPPORT_SPL config ARCH_JZ47XX bool "Support Ingenic JZ47xx" @@ -287,6 +288,60 @@ config MIPS_RELOCATION_TABLE_SIZE If unsure, leave at the default value. +config RESTORE_EXCEPTION_VECTOR_BASE + bool "Restore exception vector base before booting linux kernel" + default n + help + In U-Boot the exception vector base will be moved to top of memory, + to be used to display register dump when exception occurs. + But some old linux kernel does not honor the base set in CP0_EBASE. + A modified exception vector base will cause kernel crash. + + This option will restore the exception vector base to its previous + value. + + If unsure, say N. + +config OVERRIDE_EXCEPTION_VECTOR_BASE + bool "Override the exception vector base to be restored" + depends on RESTORE_EXCEPTION_VECTOR_BASE + default n + help + Enable this option if you want to use a different exception vector + base rather than the previously saved one. + +config NEW_EXCEPTION_VECTOR_BASE + hex "New exception vector base" + depends on OVERRIDE_EXCEPTION_VECTOR_BASE + range 0x80000000 0xbffff000 + default 0x80000000 + help + The exception vector base to be restored before booting linux kernel + +config INIT_STACK_WITHOUT_MALLOC_F + bool "Do not reserve malloc space on initial stack" + default n + help + Enable this option if you don't want to reserve malloc space on + initial stack. This is useful if the initial stack can't hold large + malloc space. Platform should set the malloc_base later when DRAM is + ready to use. + +config SPL_INIT_STACK_WITHOUT_MALLOC_F + bool "Do not reserve malloc space on initial stack in SPL" + default n + help + Enable this option if you don't want to reserve malloc space on + initial stack. This is useful if the initial stack can't hold large + malloc space. Platform should set the malloc_base later when DRAM is + ready to use. + +config SPL_LOADER_SUPPORT + bool + default n + help + Enable this option if you want to use SPL loaders without DM enabled. + endmenu menu "OS boot interface" @@ -389,6 +444,15 @@ config MIPS_INIT_STACK_IN_SRAM lowlevel_init. Thus lowlevel_init does not need to be implemented in assembler. +config MIPS_SRAM_INIT + bool + default n + depends on MIPS_INIT_STACK_IN_SRAM + help + Select this if the SRAM for initial stack needs to be initialized + before it can be used. If enabled, a function mips_sram_init() will + be called just before setup_stack_gd. + config SYS_DCACHE_SIZE int default 0 diff --git a/arch/mips/cpu/start.S b/arch/mips/cpu/start.S index 1d21b2324a7..6de9a2f3624 100644 --- a/arch/mips/cpu/start.S +++ b/arch/mips/cpu/start.S @@ -59,7 +59,8 @@ sp, sp, GD_SIZE # reserve space for gd and sp, sp, t0 # force 16 byte alignment move k0, sp # save gd pointer -#if CONFIG_VAL(SYS_MALLOC_F_LEN) +#if CONFIG_VAL(SYS_MALLOC_F_LEN) && \ + !CONFIG_IS_ENABLED(INIT_STACK_WITHOUT_MALLOC_F) li t2, CONFIG_VAL(SYS_MALLOC_F_LEN) PTR_SUBU \ sp, sp, t2 # reserve space for early malloc @@ -71,10 +72,12 @@ move t0, k0 1: PTR_S zero, 0(t0) + PTR_ADDIU t0, PTRSIZE blt t0, t1, 1b - PTR_ADDIU t0, PTRSIZE + nop -#if CONFIG_VAL(SYS_MALLOC_F_LEN) +#if CONFIG_VAL(SYS_MALLOC_F_LEN) && \ + !CONFIG_IS_ENABLED(INIT_STACK_WITHOUT_MALLOC_F) PTR_S sp, GD_MALLOC_BASE(k0) # gd->malloc_base offset #endif .endm @@ -216,6 +219,13 @@ wr_done: #endif #ifdef CONFIG_MIPS_INIT_STACK_IN_SRAM +#ifdef CONFIG_MIPS_SRAM_INIT + /* Initialize the SRAM first */ + PTR_LA t9, mips_sram_init + jalr t9 + nop +#endif + /* Set up initial stack and global data */ setup_stack_gd diff --git a/arch/mips/cpu/u-boot-spl.lds b/arch/mips/cpu/u-boot-spl.lds index d08d6222c4a..28ea4f2a481 100644 --- a/arch/mips/cpu/u-boot-spl.lds +++ b/arch/mips/cpu/u-boot-spl.lds @@ -27,7 +27,7 @@ SECTIONS *(SORT_BY_ALIGNMENT(.sdata*)) } > .spl_mem -#ifdef CONFIG_SPL_DM +#if defined(CONFIG_SPL_DM) || defined(CONFIG_SPL_LOADER_SUPPORT) . = ALIGN(4); .u_boot_list : { KEEP(*(SORT(.u_boot_list*))); @@ -37,6 +37,8 @@ SECTIONS . = ALIGN(4); __image_copy_end = .; + _image_binary_end = .; + .bss (NOLOAD) : { __bss_start = .; *(.bss*) diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile index c9d75596f25..f711e9fb59c 100644 --- a/arch/mips/dts/Makefile +++ b/arch/mips/dts/Makefile @@ -17,11 +17,13 @@ dtb-$(CONFIG_BOARD_COMTREND_CT5361) += comtrend,ct-5361.dtb dtb-$(CONFIG_BOARD_COMTREND_VR3032U) += comtrend,vr-3032u.dtb dtb-$(CONFIG_BOARD_COMTREND_WAP5813N) += comtrend,wap-5813n.dtb dtb-$(CONFIG_BOARD_HUAWEI_HG556A) += huawei,hg556a.dtb +dtb-$(CONFIG_BOARD_MT7628_RFB) += mediatek,mt7628-rfb.dtb dtb-$(CONFIG_BOARD_NETGEAR_CG3100D) += netgear,cg3100d.dtb dtb-$(CONFIG_BOARD_NETGEAR_DGND3700V2) += netgear,dgnd3700v2.dtb dtb-$(CONFIG_BOARD_SAGEM_FAST1704) += sagem,f@st1704.dtb dtb-$(CONFIG_BOARD_SFR_NB4_SER) += sfr,nb4-ser.dtb dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb +dtb-$(CONFIG_BOARD_VOCORE2) += vocore_vocore2.dtb dtb-$(CONFIG_TARGET_JZ4780_CI20) += ci20.dtb dtb-$(CONFIG_SOC_LUTON) += luton_pcb090.dtb luton_pcb091.dtb dtb-$(CONFIG_SOC_OCELOT) += ocelot_pcb120.dtb ocelot_pcb123.dtb diff --git a/arch/mips/dts/mediatek,mt7628-rfb.dts b/arch/mips/dts/mediatek,mt7628-rfb.dts new file mode 100644 index 00000000000..6ff36daa6e7 --- /dev/null +++ b/arch/mips/dts/mediatek,mt7628-rfb.dts @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2020 MediaTek Inc. + * + * Author: Weijie Gao <weijie.gao@mediatek.com> + */ + +/dts-v1/; + +#include "mt7628a.dtsi" + +/ { + compatible = "mediatek,mt7628-rfb", "ralink,mt7628a-soc"; + model = "MediaTek MT7628 RFB"; + + aliases { + serial0 = &uart0; + spi0 = &spi0; + }; + + chosen { + stdout-path = &uart0; + }; +}; + +&pinctrl { + state_default: pin_state { + pleds { + groups = "p0led", "p1led", "p2led", "p3led", "p4led"; + function = "led"; + }; + }; +}; + +&uart0 { + status = "okay"; +}; + +&spi0 { + status = "okay"; + num-cs = <2>; + + spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <25000000>; + reg = <0>; + }; +}; + +ð { + mediatek,wan-port = <0>; + + pinctrl-names = "default"; + pinctrl-0 = <&ephy_router_mode>; +}; + +&mmc { + bus-width = <4>; + cap-sd-highspeed; + + pinctrl-names = "default"; + pinctrl-0 = <&sd_router_mode>; + + status = "okay"; +}; diff --git a/arch/mips/dts/mt7628-u-boot.dtsi b/arch/mips/dts/mt7628-u-boot.dtsi new file mode 100644 index 00000000000..eea5dc64bf9 --- /dev/null +++ b/arch/mips/dts/mt7628-u-boot.dtsi @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2020 MediaTek Inc. + * + * Author: Weijie Gao <weijie.gao@mediatek.com> + */ + +&palmbus { + u-boot,dm-pre-reloc; +}; + +&reboot { + u-boot,dm-pre-reloc; +}; + +&clkctrl { + u-boot,dm-pre-reloc; +}; + +&rstctrl { + u-boot,dm-pre-reloc; +}; + +&pinctrl { + u-boot,dm-pre-reloc; +}; + +&uart0 { + u-boot,dm-pre-reloc; +}; + +&uart1 { + u-boot,dm-pre-reloc; +}; + +&uart2 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/mips/dts/mt7628a.dtsi b/arch/mips/dts/mt7628a.dtsi index 76a80c8952d..6baa63add33 100644 --- a/arch/mips/dts/mt7628a.dtsi +++ b/arch/mips/dts/mt7628a.dtsi @@ -33,7 +33,7 @@ #clock-cells = <0>; }; - palmbus@10000000 { + palmbus: palmbus@10000000 { compatible = "palmbus", "simple-bus"; reg = <0x10000000 0x200000>; ranges = <0x0 0x10000000 0x1FFFFF>; @@ -46,11 +46,11 @@ reg = <0x0 0x100>; }; - syscon-reboot { - compatible = "syscon-reboot"; - regmap = <&sysc>; - offset = <0x34>; - mask = <0x1>; + reboot: resetctl-reboot { + compatible = "resetctl-reboot"; + + resets = <&rstctrl MT7628_SYS_RST>; + reset-names = "sysreset"; }; clkctrl: clkctrl@0x2c { @@ -110,6 +110,11 @@ function = "uart2"; }; + uart2_pwm_pins: uart2_pwm_pins { + groups = "spis"; + function = "pwm_uart2"; + }; + i2c_pins: i2c_pins { groups = "i2c"; function = "i2c"; diff --git a/arch/mips/dts/vocore_vocore2.dts b/arch/mips/dts/vocore_vocore2.dts new file mode 100644 index 00000000000..3502e4b8b79 --- /dev/null +++ b/arch/mips/dts/vocore_vocore2.dts @@ -0,0 +1,85 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Mauro Condarelli <mc5686@mclink.it> + */ + +/dts-v1/; + +#include "mt7628a.dtsi" +#include <dt-bindings/gpio/gpio.h> + +/ { + compatible = "vocore,vocore2", "ralink,mt7628a-soc"; + model = "VoCore2"; + + aliases { + serial0 = &uart2; + spi0 = &spi0; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x08000000>; + }; + leds { + compatible = "gpio-leds"; + + power { + label = "vocore:power"; + gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + }; + + chosen { + bootargs = "console=ttyS2,115200"; + stdout-path = &uart2; + }; +}; + +&pinctrl { + state_default: pin_state { + p0led { + groups = "p0led_a"; + function = "led"; + }; + }; +}; + +&uart2 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pwm_pins>; +}; + +&spi0 { + status = "okay"; + nor0: spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <25000000>; + reg = <0>; + }; +}; + +ð { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&ephy_iot_mode>; + mediatek,poll-link-phy = <0>; +}; + +&mmc { + status = "okay"; + + bus-width = <4>; + max-frequency = <48000000>; + cap-sd-highspeed; + cap-mmc-highspeed; + + pinctrl-names = "default"; + pinctrl-0 = <&sd_iot_mode>; +}; diff --git a/arch/mips/include/asm/global_data.h b/arch/mips/include/asm/global_data.h index 7b4ad083ba0..4c30fab8717 100644 --- a/arch/mips/include/asm/global_data.h +++ b/arch/mips/include/asm/global_data.h @@ -27,6 +27,9 @@ struct arch_global_data { #ifdef CONFIG_MIPS_L2_CACHE unsigned short l2_line_size; #endif +#ifdef CONFIG_ARCH_MTMIPS + unsigned long timer_freq; +#endif }; #include <asm-generic/global_data.h> diff --git a/arch/mips/include/asm/u-boot-mips.h b/arch/mips/include/asm/u-boot-mips.h index 88438b9576b..8b37cc4029c 100644 --- a/arch/mips/include/asm/u-boot-mips.h +++ b/arch/mips/include/asm/u-boot-mips.h @@ -9,4 +9,6 @@ void except_vec_ejtag_debug(void); int arch_misc_init(void); +void trap_restore(void); + #endif /* _U_BOOT_MIPS_H_ */ diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile index 24a72d9c973..9ee1fcb5c70 100644 --- a/arch/mips/lib/Makefile +++ b/arch/mips/lib/Makefile @@ -12,5 +12,6 @@ obj-y += traps.o obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-$(CONFIG_CMD_GO) += boot.o +obj-$(CONFIG_SPL_BUILD) += spl.o lib-$(CONFIG_USE_PRIVATE_LIBGCC) += ashldi3.o ashrdi3.o lshrdi3.o diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c index 8c0d7672f24..f1db6d23b84 100644 --- a/arch/mips/lib/bootm.c +++ b/arch/mips/lib/bootm.c @@ -294,6 +294,9 @@ static void boot_jump_linux(bootm_headers_t *images) bootstage_report(); #endif + if (CONFIG_IS_ENABLED(RESTORE_EXCEPTION_VECTOR_BASE)) + trap_restore(); + if (images->ft_len) kernel(-2, (ulong)images->ft_addr, 0, 0); else diff --git a/arch/mips/lib/spl.c b/arch/mips/lib/spl.c new file mode 100644 index 00000000000..7ba3e53f6de --- /dev/null +++ b/arch/mips/lib/spl.c @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020 Stefan Roese <sr@denx.de> + */ + +#include <common.h> +#include <cpu_func.h> +#include <spl.h> + +void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) +{ + typedef void __noreturn (*image_entry_noargs_t)(void); + image_entry_noargs_t image_entry = + (image_entry_noargs_t)spl_image->entry_point; + + /* Flush cache before jumping to application */ + flush_cache((unsigned long)spl_image->load_addr, spl_image->size); + + debug("image entry point: 0x%lx\n", spl_image->entry_point); + image_entry(); +} diff --git a/arch/mips/lib/traps.c b/arch/mips/lib/traps.c index b8568c00fed..8fff7541e3c 100644 --- a/arch/mips/lib/traps.c +++ b/arch/mips/lib/traps.c @@ -20,6 +20,8 @@ DECLARE_GLOBAL_DATA_PTR; +static unsigned long saved_ebase; + static void show_regs(const struct pt_regs *regs) { const int field = 2 * sizeof(unsigned long); @@ -102,7 +104,24 @@ void trap_init(ulong reloc_addr) set_handler(0x180, &except_vec3_generic, 0x80); set_handler(0x280, &except_vec_ejtag_debug, 0x80); + saved_ebase = read_c0_ebase() & 0xfffff000; + write_c0_ebase(ebase); clear_c0_status(ST0_BEV); execution_hazard_barrier(); } + +void trap_restore(void) +{ + set_c0_status(ST0_BEV); + execution_hazard_barrier(); + +#ifdef CONFIG_OVERRIDE_EXCEPTION_VECTOR_BASE + write_c0_ebase(CONFIG_NEW_EXCEPTION_VECTOR_BASE & 0xfffff000); +#else + write_c0_ebase(saved_ebase); +#endif + + clear_c0_status(ST0_BEV); + execution_hazard_barrier(); +} diff --git a/arch/mips/mach-mtmips/Kconfig b/arch/mips/mach-mtmips/Kconfig index c8dcf19c0de..737de2cb8e2 100644 --- a/arch/mips/mach-mtmips/Kconfig +++ b/arch/mips/mach-mtmips/Kconfig @@ -7,14 +7,52 @@ config SYS_MALLOC_F_LEN config SYS_SOC default "mt7628" if SOC_MT7628 +config SYS_DCACHE_SIZE + default 32768 + +config SYS_DCACHE_LINE_SIZE + default 32 + +config SYS_ICACHE_SIZE + default 65536 + +config SYS_ICACHE_LINE_SIZE + default 32 + +config SYS_TEXT_BASE + default 0x9c000000 if !SPL + default 0x80200000 if SPL + +config SPL_TEXT_BASE + default 0x9c000000 + +config SPL_PAYLOAD + default "u-boot-lzma.img" if SPL_LZMA + +config BUILD_TARGET + default "u-boot-with-spl.bin" if SPL + choice prompt "MediaTek MIPS SoC select" config SOC_MT7628 bool "MT7628" select MIPS_L1_CACHE_SHIFT_5 + select MIPS_INIT_STACK_IN_SRAM + select MIPS_SRAM_INIT + select SYS_MIPS_CACHE_INIT_RAM_LOAD select PINCTRL_MT7628 select MTK_SERIAL + select SYSRESET_RESETCTL + select SPL_SEPARATE_BSS if SPL + select SPL_INIT_STACK_WITHOUT_MALLOC_F if SPL + select SPL_LOADER_SUPPORT if SPL + select SPL_OF_CONTROL if SPL_DM + select SPL_SIMPLE_BUS if SPL_DM + select SPL_DM_SERIAL if SPL_DM + select SPL_CLK if SPL_DM && SPL_SERIAL_SUPPORT + select SPL_SYSRESET if SPL_DM + select SPL_OF_LIBFDT if SPL_OF_CONTROL help This supports MediaTek MT7628/MT7688. @@ -27,7 +65,6 @@ config BOARD_GARDENA_SMART_GATEWAY_MT7688 bool "GARDENA smart Gateway" depends on SOC_MT7628 select BOARD_LATE_INIT - select SUPPORTS_BOOT_RAM help GARDENA smart Gateway boards have a MT7688 SoC with 128 MiB of RAM and 8 MiB of flash (SPI NOR) and additional SPI NAND storage. @@ -35,7 +72,6 @@ config BOARD_GARDENA_SMART_GATEWAY_MT7688 config BOARD_LINKIT_SMART_7688 bool "LinkIt Smart 7688" depends on SOC_MT7628 - select SUPPORTS_BOOT_RAM help Seeed LinkIt Smart 7688 boards have a MT7688 SoC with 128 MiB of RAM and 32 MiB of flash (SPI). @@ -43,96 +79,36 @@ config BOARD_LINKIT_SMART_7688 ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs, and a MT7688 (PCIe). -endchoice - -choice - prompt "Boot mode" - -config BOOT_RAM - bool "RAM boot" - depends on SUPPORTS_BOOT_RAM - help - This builds an image that is linked to a RAM address. It can be used - for booting from CFE via TFTP using an ELF image, but it can also be - booted from RAM by other bootloaders using a BIN image. - -config BOOT_ROM - bool "ROM boot" - depends on SUPPORTS_BOOT_RAM - help - This builds an image that is linked to a ROM address. It can be - used as main bootloader image which is programmed onto the onboard - flash storage (SPI NOR). - -endchoice - -choice - prompt "DDR2 size" - -config ONBOARD_DDR2_SIZE_256MBIT - bool "256MBit (32MByte) total size" - depends on BOOT_ROM - help - Use 256MBit (32MByte) of DDR total size - -config ONBOARD_DDR2_SIZE_512MBIT - bool "512MBit (64MByte) total size" - depends on BOOT_ROM - help - Use 512MBit (64MByte) of DDR total size - -config ONBOARD_DDR2_SIZE_1024MBIT - bool "1024MBit (128MByte) total size" - depends on BOOT_ROM - help - Use 1024MBit (128MByte) of DDR total size - -config ONBOARD_DDR2_SIZE_2048MBIT - bool "2048MBit (256MByte) total size" - depends on BOOT_ROM - help - Use 2048MBit (256MByte) of DDR total size - -endchoice - -choice - prompt "DDR2 chip width" - -config ONBOARD_DDR2_CHIP_WIDTH_8BIT - bool "8bit DDR chip width" - depends on BOOT_ROM +config BOARD_MT7628_RFB + bool "MediaTek MT7628 RFB" + depends on SOC_MT7628 help - Use DDR chips with 8bit width + The reference design of MT7628. The board has 128 MiB DDR2, 8 MiB + SPI-NOR flash, 1 built-in switch with 5 ports, 1 UART, 1 USB host, + 1 SDXC, 1 PCIe socket and JTAG pins. -config ONBOARD_DDR2_CHIP_WIDTH_16BIT - bool "16bit DDR chip width" - depends on BOOT_ROM +config BOARD_VOCORE2 + bool "VoCore2" + depends on SOC_MT7628 + select SPL_SERIAL_SUPPORT + select SPL_UART2_SPIS_PINMUX help - Use DDR chips with 16bit width + VoCore VoCore2 board has a MT7628 SoC with 128 MiB of RAM + and 16 MiB of flash (SPI). endchoice -choice - prompt "DDR2 bus width" - -config ONBOARD_DDR2_BUS_WIDTH_16BIT - bool "16bit DDR bus width" - depends on BOOT_ROM +config SPL_UART2_SPIS_PINMUX + bool "Use alternative pinmux for UART2 in SPL stage" + depends on SPL_SERIAL_SUPPORT + default n help - Use 16bit DDR bus width - -config ONBOARD_DDR2_BUS_WIDTH_32BIT - bool "32bit DDR bus width" - depends on BOOT_ROM - help - Use 32bit DDR bus width - -endchoice - -config SUPPORTS_BOOT_RAM - bool + Select this if the UART2 of your board is connected to GPIO 16/17 + (shared with SPIS) rather than the usual GPIO 20/21. source "board/gardena/smart-gateway-mt7688/Kconfig" +source "board/mediatek/mt7628/Kconfig" source "board/seeed/linkit-smart-7688/Kconfig" +source "board/vocore/vocore2/Kconfig" endmenu diff --git a/arch/mips/mach-mtmips/Makefile b/arch/mips/mach-mtmips/Makefile index 1f3e65e8a55..a7e6a663047 100644 --- a/arch/mips/mach-mtmips/Makefile +++ b/arch/mips/mach-mtmips/Makefile @@ -1,8 +1,8 @@ # SPDX-License-Identifier: GPL-2.0+ obj-y += cpu.o +obj-y += ddr_init.o +obj-y += ddr_cal.o +obj-$(CONFIG_SPL_BUILD) += spl.o -ifndef CONFIG_SKIP_LOWLEVEL_INIT -obj-y += ddr_calibrate.o -obj-y += lowlevel_init.o -endif +obj-$(CONFIG_SOC_MT7628) += mt7628/ diff --git a/arch/mips/mach-mtmips/cpu.c b/arch/mips/mach-mtmips/cpu.c index 8976ef57c70..459a9673ebe 100644 --- a/arch/mips/mach-mtmips/cpu.c +++ b/arch/mips/mach-mtmips/cpu.c @@ -4,69 +4,17 @@ */ #include <common.h> -#include <dm.h> -#include <init.h> #include <malloc.h> -#include <ram.h> -#include <wdt.h> -#include <asm/io.h> #include <linux/io.h> #include <linux/sizes.h> -#include "mt76xx.h" -#define STR_LEN 6 - -#ifdef CONFIG_BOOT_ROM -int mach_cpu_init(void) -{ - ddr_calibrate(); - - return 0; -} -#endif +DECLARE_GLOBAL_DATA_PTR; int dram_init(void) { +#ifdef CONFIG_SKIP_LOWLEVEL_INIT gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, SZ_256M); - - return 0; -} - -int print_cpuinfo(void) -{ - static const char * const boot_str[] = { "PLL (3-Byte SPI Addr)", - "PLL (4-Byte SPI Addr)", - "XTAL (3-Byte SPI Addr)", - "XTAL (4-Byte SPI Addr)" }; - const void *blob = gd->fdt_blob; - void __iomem *sysc_base; - char buf[STR_LEN + 1]; - fdt_addr_t base; - fdt_size_t size; - char *str; - int node; - u32 val; - - /* Get system controller base address */ - node = fdt_node_offset_by_compatible(blob, -1, "ralink,mt7620a-sysc"); - if (node < 0) - return -FDT_ERR_NOTFOUND; - - base = fdtdec_get_addr_size_auto_noparent(blob, node, "reg", - 0, &size, true); - if (base == FDT_ADDR_T_NONE) - return -EINVAL; - - sysc_base = ioremap_nocache(base, size); - - str = (char *)sysc_base + MT76XX_CHIPID_OFFS; - snprintf(buf, STR_LEN + 1, "%s", str); - val = readl(sysc_base + MT76XX_CHIP_REV_ID_OFFS); - printf("CPU: %-*s Rev %ld.%ld - ", STR_LEN, buf, - (val & GENMASK(11, 8)) >> 8, val & GENMASK(3, 0)); - - val = (readl(sysc_base + MT76XX_SYSCFG0_OFFS) & GENMASK(3, 1)) >> 1; - printf("Boot from %s\n", boot_str[val]); +#endif return 0; } diff --git a/arch/mips/mach-mtmips/ddr_cal.c b/arch/mips/mach-mtmips/ddr_cal.c new file mode 100644 index 00000000000..71a53c3c9cb --- /dev/null +++ b/arch/mips/mach-mtmips/ddr_cal.c @@ -0,0 +1,205 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2020 MediaTek Inc. + * + * Author: Weijie Gao <weijie.gao@mediatek.com> + */ + +#include <common.h> +#include <asm/addrspace.h> +#include <asm/cacheops.h> +#include <linux/bitops.h> +#include <linux/io.h> +#include <mach/mc.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define COARSE_MIN_START 6 +#define FINE_MIN_START 15 +#define COARSE_MAX_START 7 +#define FINE_MAX_START 0 + +#define NUM_OF_CACHELINE 128 +#define TEST_PAT_SIZE (NUM_OF_CACHELINE * CONFIG_SYS_CACHELINE_SIZE) + +#define INIT_DQS_VAL ((7 << DQS1_DELAY_COARSE_TUNING_S) | \ + (4 << DQS1_DELAY_FINE_TUNING_S) | \ + (7 << DQS0_DELAY_COARSE_TUNING_S) | \ + (4 << DQS0_DELAY_FINE_TUNING_S)) + +static inline void pref_op(int op, const volatile void *addr) +{ + __asm__ __volatile__("pref %0, 0(%1)" : : "i" (op), "r" (addr)); +} + +static inline bool dqs_test_error(void __iomem *memc, u32 memsize, u32 dqsval, + u32 bias) +{ + u32 *nca, *ca; + u32 off; + int i; + + for (off = 0; off < memsize - TEST_PAT_SIZE; off += (memsize >> 6)) { + nca = (u32 *)KSEG1ADDR(off); + ca = (u32 *)KSEG0ADDR(off); + + writel(INIT_DQS_VAL, memc + MEMCTL_DDR_DQS_DLY_REG); + wmb(); + + for (i = 0; i < TEST_PAT_SIZE / sizeof(u32); i++) + ca[i] = 0x1f1f1f1f; + + for (i = 0; i < TEST_PAT_SIZE / sizeof(u32); i++) + nca[i] = (u32)nca + i + bias; + + writel(dqsval, memc + MEMCTL_DDR_DQS_DLY_REG); + wmb(); + + for (i = 0; i < TEST_PAT_SIZE; i += CONFIG_SYS_CACHELINE_SIZE) + mips_cache(HIT_INVALIDATE_D, (u8 *)ca + i); + wmb(); + + for (i = 0; i < TEST_PAT_SIZE; i += CONFIG_SYS_CACHELINE_SIZE) + pref_op(0, (u8 *)ca + i); + + for (i = 0; i < TEST_PAT_SIZE / sizeof(u32); i++) { + if (ca[i] != (u32)nca + i + bias) + return true; + } + } + + return false; +} + +static inline int dqs_find_max(void __iomem *memc, u32 memsize, int initval, + int maxval, int shift, u32 regval) +{ + int fieldval; + u32 dqsval; + + for (fieldval = initval; fieldval <= maxval; fieldval++) { + dqsval = regval | (fieldval << shift); + if (dqs_test_error(memc, memsize, dqsval, 3)) + return max(fieldval - 1, initval); + } + + return maxval; +} + +static inline int dqs_find_min(void __iomem *memc, u32 memsize, int initval, + int minval, int shift, u32 regval) +{ + int fieldval; + u32 dqsval; + + for (fieldval = initval; fieldval >= minval; fieldval--) { + dqsval = regval | (fieldval << shift); + if (dqs_test_error(memc, memsize, dqsval, 1)) + return min(fieldval + 1, initval); + } + + return minval; +} + +void ddr_calibrate(void __iomem *memc, u32 memsize, u32 bw) +{ + u32 dqs_coarse_min, dqs_coarse_max, dqs_coarse_val; + u32 dqs_fine_min, dqs_fine_max, dqs_fine_val; + u32 dqs_coarse_min_limit, dqs_fine_min_limit; + u32 dlls, dqs_dll, ddr_cfg2_reg; + u32 dqs_dly_tmp, dqs_dly, test_dqs, shift; + u32 rem, mask; + int i; + + /* Disable Self-refresh */ + clrbits_32(memc + MEMCTL_DDR_SELF_REFRESH_REG, SR_AUTO_EN); + + /* Save DDR_CFG2 and modify its DQS gating window */ + ddr_cfg2_reg = readl(memc + MEMCTL_DDR_CFG2_REG); + mask = DQS0_GATING_WINDOW_M; + if (bw == IND_SDRAM_WIDTH_16BIT) + mask |= DQS1_GATING_WINDOW_M; + clrbits_32(memc + MEMCTL_DDR_CFG2_REG, mask); + + /* Get minimum available DQS value */ + dlls = readl(memc + MEMCTL_DLL_DBG_REG); + dlls = (dlls & MST_DLY_SEL_M) >> MST_DLY_SEL_S; + + dqs_dll = dlls >> 4; + if (dqs_dll <= 8) + dqs_coarse_min_limit = 8 - dqs_dll; + else + dqs_coarse_min_limit = 0; + + dqs_dll = dlls & 0xf; + if (dqs_dll <= 8) + dqs_fine_min_limit = 8 - dqs_dll; + else + dqs_fine_min_limit = 0; + + /* Initial DQS register value */ + dqs_dly = INIT_DQS_VAL; + + /* Calibrate DQS0 and/or DQS1 */ + for (i = 0; i < bw; i++) { + shift = i * 8; + dqs_dly &= ~(0xff << shift); + + /* Find maximum DQS coarse-grain */ + dqs_dly_tmp = dqs_dly | (0xf << shift); + dqs_coarse_max = dqs_find_max(memc, memsize, COARSE_MAX_START, + 0xf, 4 + shift, dqs_dly_tmp); + + /* Find maximum DQS fine-grain */ + dqs_dly_tmp = dqs_dly | (dqs_coarse_max << (4 + shift)); + test_dqs = dqs_find_max(memc, memsize, FINE_MAX_START, 0xf, + shift, dqs_dly_tmp); + + if (test_dqs == FINE_MAX_START) { + dqs_coarse_max--; + dqs_fine_max = 0xf; + } else { + dqs_fine_max = test_dqs - 1; + } + + /* Find minimum DQS coarse-grain */ + dqs_dly_tmp = dqs_dly; + dqs_coarse_min = dqs_find_min(memc, memsize, COARSE_MIN_START, + dqs_coarse_min_limit, 4 + shift, + dqs_dly_tmp); + + /* Find minimum DQS fine-grain */ + dqs_dly_tmp = dqs_dly | (dqs_coarse_min << (4 + shift)); + test_dqs = dqs_find_min(memc, memsize, FINE_MIN_START, + dqs_fine_min_limit, shift, dqs_dly_tmp); + + if (test_dqs == FINE_MIN_START + 1) { + dqs_coarse_min++; + dqs_fine_min = 0; + } else { + dqs_fine_min = test_dqs; + } + + /* Calculate central DQS coarse/fine value */ + dqs_coarse_val = (dqs_coarse_max + dqs_coarse_min) >> 1; + rem = (dqs_coarse_max + dqs_coarse_min) % 2; + + dqs_fine_val = (rem * 4) + ((dqs_fine_max + dqs_fine_min) >> 1); + if (dqs_fine_val >= 0x10) { + dqs_coarse_val++; + dqs_fine_val -= 8; + } + + /* Save current DQS value */ + dqs_dly |= ((dqs_coarse_val << 4) | dqs_fine_val) << shift; + } + + /* Set final DQS value */ + writel(dqs_dly, memc + MEMCTL_DDR_DQS_DLY_REG); + + /* Restore DDR_CFG2 */ + writel(ddr_cfg2_reg, memc + MEMCTL_DDR_CFG2_REG); + + /* Enable Self-refresh */ + setbits_32(memc + MEMCTL_DDR_SELF_REFRESH_REG, SR_AUTO_EN); +} diff --git a/arch/mips/mach-mtmips/ddr_calibrate.c b/arch/mips/mach-mtmips/ddr_calibrate.c deleted file mode 100644 index 3cd440804d0..00000000000 --- a/arch/mips/mach-mtmips/ddr_calibrate.c +++ /dev/null @@ -1,309 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2018 Stefan Roese <sr@denx.de> - * - * This code is mostly based on the code extracted from this MediaTek - * github repository: - * - * https://github.com/MediaTek-Labs/linkit-smart-uboot.git - * - * I was not able to find a specific license or other developers - * copyrights here, so I can't add them here. - * - * Most functions in this file are copied from the MediaTek U-Boot - * repository. Without any documentation, it was impossible to really - * implement this differently. So its mostly a cleaned-up version of - * the original code, with only support for the MT7628 / MT7688 SoC. - */ - -#include <common.h> -#include <cpu_func.h> -#include <linux/io.h> -#include <asm/cacheops.h> -#include <asm/io.h> -#include "mt76xx.h" - -#define NUM_OF_CACHELINE 128 -#define MIN_START 6 -#define MIN_FINE_START 0xf -#define MAX_START 7 -#define MAX_FINE_START 0x0 - -#define CPU_FRAC_DIV 1 - -#if defined(CONFIG_ONBOARD_DDR2_SIZE_256MBIT) -#define DRAM_BUTTOM 0x02000000 -#endif -#if defined(CONFIG_ONBOARD_DDR2_SIZE_512MBIT) -#define DRAM_BUTTOM 0x04000000 -#endif -#if defined(CONFIG_ONBOARD_DDR2_SIZE_1024MBIT) -#define DRAM_BUTTOM 0x08000000 -#endif -#if defined(CONFIG_ONBOARD_DDR2_SIZE_2048MBIT) -#define DRAM_BUTTOM 0x10000000 -#endif - -static inline void cal_memcpy(void *src, void *dst, u32 size) -{ - u8 *psrc = (u8 *)src; - u8 *pdst = (u8 *)dst; - int i; - - for (i = 0; i < size; i++, psrc++, pdst++) - *pdst = *psrc; -} - -static inline void cal_memset(void *src, u8 pat, u32 size) -{ - u8 *psrc = (u8 *)src; - int i; - - for (i = 0; i < size; i++, psrc++) - *psrc = pat; -} - -#define pref_op(hint, addr) \ - __asm__ __volatile__( \ - ".set push\n" \ - ".set noreorder\n" \ - "pref %0, %1\n" \ - ".set pop\n" \ - : \ - : "i" (hint), "R" (*(u8 *)(addr))) - -static inline void cal_patgen(u32 start_addr, u32 size, u32 bias) -{ - u32 *addr = (u32 *)start_addr; - int i; - - for (i = 0; i < size; i++) - addr[i] = start_addr + i + bias; -} - -static inline int test_loop(int k, int dqs, u32 test_dqs, u32 *coarse_dqs, - u32 offs, u32 pat, u32 val) -{ - u32 nc_addr; - u32 *c_addr; - int i; - - for (nc_addr = 0xa0000000; - nc_addr < (0xa0000000 + DRAM_BUTTOM - NUM_OF_CACHELINE * 32); - nc_addr += (DRAM_BUTTOM >> 6) + offs) { - writel(0x00007474, (void *)MT76XX_MEMCTRL_BASE + 0x64); - wmb(); /* Make sure store if finished */ - - c_addr = (u32 *)(nc_addr & 0xdfffffff); - cal_memset(((u8 *)c_addr), 0x1F, NUM_OF_CACHELINE * 32); - cal_patgen(nc_addr, NUM_OF_CACHELINE * 8, pat); - - if (dqs > 0) - writel(0x00000074 | - (((k == 1) ? coarse_dqs[dqs] : test_dqs) << 12) | - (((k == 0) ? val : test_dqs) << 8), - (void *)MT76XX_MEMCTRL_BASE + 0x64); - else - writel(0x00007400 | - (((k == 1) ? coarse_dqs[dqs] : test_dqs) << 4) | - (((k == 0) ? val : test_dqs) << 0), - (void *)MT76XX_MEMCTRL_BASE + 0x64); - wmb(); /* Make sure store if finished */ - - invalidate_dcache_range((u32)c_addr, - (u32)c_addr + - NUM_OF_CACHELINE * 32); - wmb(); /* Make sure store if finished */ - - for (i = 0; i < NUM_OF_CACHELINE * 8; i++) { - if (i % 8 == 0) - pref_op(0, &c_addr[i]); - } - - for (i = 0; i < NUM_OF_CACHELINE * 8; i++) { - if (c_addr[i] != nc_addr + i + pat) - return -1; - } - } - - return 0; -} - -void ddr_calibrate(void) -{ - u32 min_coarse_dqs[2]; - u32 max_coarse_dqs[2]; - u32 min_fine_dqs[2]; - u32 max_fine_dqs[2]; - u32 coarse_dqs[2]; - u32 fine_dqs[2]; - int reg = 0, ddr_cfg2_reg; - int flag; - int i, k; - int dqs = 0; - u32 min_coarse_dqs_bnd, min_fine_dqs_bnd, coarse_dqs_dll, fine_dqs_dll; - u32 val; - u32 fdiv = 0, frac = 0; - - /* Setup clock to run at full speed */ - val = readl((void *)MT76XX_DYN_CFG0_REG); - fdiv = (u32)((val >> 8) & 0x0F); - if (CPU_FRAC_DIV < 1 || CPU_FRAC_DIV > 10) - frac = val & 0x0f; - else - frac = CPU_FRAC_DIV; - - while (frac < fdiv) { - val = readl((void *)MT76XX_DYN_CFG0_REG); - fdiv = (val >> 8) & 0x0f; - fdiv--; - val &= ~(0x0f << 8); - val |= (fdiv << 8); - writel(val, (void *)MT76XX_DYN_CFG0_REG); - udelay(500); - val = readl((void *)MT76XX_DYN_CFG0_REG); - fdiv = (val >> 8) & 0x0f; - } - - clrbits_le32((void *)MT76XX_MEMCTRL_BASE + 0x10, BIT(4)); - ddr_cfg2_reg = readl((void *)MT76XX_MEMCTRL_BASE + 0x48); - clrbits_le32((void *)MT76XX_MEMCTRL_BASE + 0x48, - (0x3 << 28) | (0x3 << 26)); - - min_coarse_dqs[0] = MIN_START; - min_coarse_dqs[1] = MIN_START; - min_fine_dqs[0] = MIN_FINE_START; - min_fine_dqs[1] = MIN_FINE_START; - max_coarse_dqs[0] = MAX_START; - max_coarse_dqs[1] = MAX_START; - max_fine_dqs[0] = MAX_FINE_START; - max_fine_dqs[1] = MAX_FINE_START; - dqs = 0; - - /* Add by KP, DQS MIN boundary */ - reg = readl((void *)MT76XX_MEMCTRL_BASE + 0x20); - coarse_dqs_dll = (reg & 0xf00) >> 8; - fine_dqs_dll = (reg & 0xf0) >> 4; - if (coarse_dqs_dll <= 8) - min_coarse_dqs_bnd = 8 - coarse_dqs_dll; - else - min_coarse_dqs_bnd = 0; - - if (fine_dqs_dll <= 8) - min_fine_dqs_bnd = 8 - fine_dqs_dll; - else - min_fine_dqs_bnd = 0; - /* DQS MIN boundary */ - -DQS_CAL: - - for (k = 0; k < 2; k++) { - u32 test_dqs; - - if (k == 0) - test_dqs = MAX_START; - else - test_dqs = MAX_FINE_START; - - do { - flag = test_loop(k, dqs, test_dqs, max_coarse_dqs, - 0x400, 0x3, 0xf); - if (flag == -1) - break; - - test_dqs++; - } while (test_dqs <= 0xf); - - if (k == 0) { - max_coarse_dqs[dqs] = test_dqs; - } else { - test_dqs--; - - if (test_dqs == MAX_FINE_START - 1) { - max_coarse_dqs[dqs]--; - max_fine_dqs[dqs] = 0xf; - } else { - max_fine_dqs[dqs] = test_dqs; - } - } - } - - for (k = 0; k < 2; k++) { - u32 test_dqs; - - if (k == 0) - test_dqs = MIN_START; - else - test_dqs = MIN_FINE_START; - - do { - flag = test_loop(k, dqs, test_dqs, min_coarse_dqs, - 0x480, 0x1, 0x0); - if (k == 0) { - if (flag == -1 || - test_dqs == min_coarse_dqs_bnd) - break; - - test_dqs--; - - if (test_dqs < min_coarse_dqs_bnd) - break; - } else { - if (flag == -1) { - test_dqs++; - break; - } else if (test_dqs == min_fine_dqs_bnd) { - break; - } - - test_dqs--; - - if (test_dqs < min_fine_dqs_bnd) - break; - } - } while (test_dqs >= 0); - - if (k == 0) { - min_coarse_dqs[dqs] = test_dqs; - } else { - if (test_dqs == MIN_FINE_START + 1) { - min_coarse_dqs[dqs]++; - min_fine_dqs[dqs] = 0x0; - } else { - min_fine_dqs[dqs] = test_dqs; - } - } - } - - if (dqs == 0) { - dqs = 1; - goto DQS_CAL; - } - - for (i = 0; i < 2; i++) { - u32 temp; - - coarse_dqs[i] = (max_coarse_dqs[i] + min_coarse_dqs[i]) >> 1; - temp = - (((max_coarse_dqs[i] + min_coarse_dqs[i]) % 2) * 4) + - ((max_fine_dqs[i] + min_fine_dqs[i]) >> 1); - if (temp >= 0x10) { - coarse_dqs[i]++; - fine_dqs[i] = (temp - 0x10) + 0x8; - } else { - fine_dqs[i] = temp; - } - } - reg = (coarse_dqs[1] << 12) | (fine_dqs[1] << 8) | - (coarse_dqs[0] << 4) | fine_dqs[0]; - - clrbits_le32((void *)MT76XX_MEMCTRL_BASE + 0x10, BIT(4)); - writel(reg, (void *)MT76XX_MEMCTRL_BASE + 0x64); - writel(ddr_cfg2_reg, (void *)MT76XX_MEMCTRL_BASE + 0x48); - setbits_le32((void *)MT76XX_MEMCTRL_BASE + 0x10, BIT(4)); - - for (i = 0; i < 2; i++) - debug("[%02X%02X%02X%02X]", min_coarse_dqs[i], - min_fine_dqs[i], max_coarse_dqs[i], max_fine_dqs[i]); - debug("\nDDR Calibration DQS reg = %08X\n", reg); -} diff --git a/arch/mips/mach-mtmips/ddr_init.c b/arch/mips/mach-mtmips/ddr_init.c new file mode 100644 index 00000000000..cd355cc8409 --- /dev/null +++ b/arch/mips/mach-mtmips/ddr_init.c @@ -0,0 +1,194 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2020 MediaTek Inc. + * + * Author: Weijie Gao <weijie.gao@mediatek.com> + */ + +#include <common.h> +#include <linux/bitops.h> +#include <linux/io.h> +#include <linux/sizes.h> +#include <mach/ddr.h> +#include <mach/mc.h> + +#define DDR_BW_TEST_PAT 0xaa5555aa + +static const u32 dram_size[] = { + [DRAM_8MB] = SZ_8M, + [DRAM_16MB] = SZ_16M, + [DRAM_32MB] = SZ_32M, + [DRAM_64MB] = SZ_64M, + [DRAM_128MB] = SZ_128M, + [DRAM_256MB] = SZ_256M, +}; + +static void dram_test_write(u32 addr, u32 val) +{ + volatile ulong *target = (volatile ulong *)(KSEG1 + addr); + + sync(); + *target = val; + sync(); +} + +static u32 dram_test_read(u32 addr) +{ + volatile ulong *target = (volatile ulong *)(KSEG1 + addr); + u32 val; + + sync(); + val = *target; + sync(); + + return val; +} + +static int dram_addr_test_bit(u32 bit) +{ + u32 val; + + dram_test_write(0, 0); + dram_test_write(BIT(bit), DDR_BW_TEST_PAT); + val = dram_test_read(0); + + if (val == DDR_BW_TEST_PAT) + return 1; + + return 0; +} + +static void mc_ddr_init(void __iomem *memc, const struct mc_ddr_cfg *cfg, + u32 dq_dly, u32 dqs_dly, mc_reset_t mc_reset, u32 bw) +{ + u32 val; + + mc_reset(1); + __udelay(200); + mc_reset(0); + + clrbits_32(memc + MEMCTL_SDRAM_CFG1_REG, RBC_MAPPING); + + writel(cfg->cfg2, memc + MEMCTL_DDR_CFG2_REG); + writel(cfg->cfg3, memc + MEMCTL_DDR_CFG3_REG); + writel(cfg->cfg4, memc + MEMCTL_DDR_CFG4_REG); + writel(dq_dly, memc + MEMCTL_DDR_DQ_DLY_REG); + writel(dqs_dly, memc + MEMCTL_DDR_DQS_DLY_REG); + + writel(cfg->cfg0, memc + MEMCTL_DDR_CFG0_REG); + + val = cfg->cfg1; + if (bw) { + val &= ~IND_SDRAM_WIDTH_M; + val |= (bw << IND_SDRAM_WIDTH_S) & IND_SDRAM_WIDTH_M; + } + + writel(val, memc + MEMCTL_DDR_CFG1_REG); + + clrsetbits_32(memc + MEMCTL_PWR_SAVE_CNT_REG, SR_TAR_CNT_M, + 1 << SR_TAR_CNT_S); + + setbits_32(memc + MEMCTL_DDR_SELF_REFRESH_REG, SR_AUTO_EN); +} + +void ddr1_init(struct mc_ddr_init_param *param) +{ + enum mc_dram_size sz; + u32 bw = 0; + + /* First initialization, determine bus width */ + mc_ddr_init(param->memc, ¶m->cfgs[DRAM_8MB], param->dq_dly, + param->dqs_dly, param->mc_reset, IND_SDRAM_WIDTH_16BIT); + + /* Test bus width */ + dram_test_write(0, DDR_BW_TEST_PAT); + if (dram_test_read(0) == DDR_BW_TEST_PAT) + bw = IND_SDRAM_WIDTH_16BIT; + else + bw = IND_SDRAM_WIDTH_8BIT; + + /* Second initialization, determine DDR capacity */ + mc_ddr_init(param->memc, ¶m->cfgs[DRAM_128MB], param->dq_dly, + param->dqs_dly, param->mc_reset, bw); + + if (dram_addr_test_bit(9)) { + sz = DRAM_8MB; + } else { + if (dram_addr_test_bit(10)) { + if (dram_addr_test_bit(23)) + sz = DRAM_16MB; + else + sz = DRAM_32MB; + } else { + if (dram_addr_test_bit(24)) + sz = DRAM_64MB; + else + sz = DRAM_128MB; + } + } + + /* Final initialization, with DDR calibration */ + mc_ddr_init(param->memc, ¶m->cfgs[sz], param->dq_dly, + param->dqs_dly, param->mc_reset, bw); + + /* Return actual DDR configuration */ + param->memsize = dram_size[sz]; + param->bus_width = bw; +} + +void ddr2_init(struct mc_ddr_init_param *param) +{ + enum mc_dram_size sz; + u32 bw = 0; + + /* First initialization, determine bus width */ + mc_ddr_init(param->memc, ¶m->cfgs[DRAM_32MB], param->dq_dly, + param->dqs_dly, param->mc_reset, IND_SDRAM_WIDTH_16BIT); + + /* Test bus width */ + dram_test_write(0, DDR_BW_TEST_PAT); + if (dram_test_read(0) == DDR_BW_TEST_PAT) + bw = IND_SDRAM_WIDTH_16BIT; + else + bw = IND_SDRAM_WIDTH_8BIT; + + /* Second initialization, determine DDR capacity */ + mc_ddr_init(param->memc, ¶m->cfgs[DRAM_256MB], param->dq_dly, + param->dqs_dly, param->mc_reset, bw); + + if (bw == IND_SDRAM_WIDTH_16BIT) { + if (dram_addr_test_bit(10)) { + sz = DRAM_32MB; + } else { + if (dram_addr_test_bit(24)) { + if (dram_addr_test_bit(27)) + sz = DRAM_64MB; + else + sz = DRAM_128MB; + } else { + sz = DRAM_256MB; + } + } + } else { + if (dram_addr_test_bit(23)) { + sz = DRAM_32MB; + } else { + if (dram_addr_test_bit(24)) { + if (dram_addr_test_bit(27)) + sz = DRAM_64MB; + else + sz = DRAM_128MB; + } else { + sz = DRAM_256MB; + } + } + } + + /* Final initialization, with DDR calibration */ + mc_ddr_init(param->memc, ¶m->cfgs[sz], param->dq_dly, + param->dqs_dly, param->mc_reset, bw); + + /* Return actual DDR configuration */ + param->memsize = dram_size[sz]; + param->bus_width = bw; +} diff --git a/arch/mips/mach-mtmips/include/mach/ddr.h b/arch/mips/mach-mtmips/include/mach/ddr.h new file mode 100644 index 00000000000..f92198137b1 --- /dev/null +++ b/arch/mips/mach-mtmips/include/mach/ddr.h @@ -0,0 +1,52 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2020 MediaTek Inc. + * + * Author: Weijie Gao <weijie.gao@mediatek.com> + */ + +#ifndef _MTMIPS_DDR_H_ +#define _MTMIPS_DDR_H_ + +#include <linux/io.h> +#include <linux/types.h> + +enum mc_dram_size { + DRAM_8MB, + DRAM_16MB, + DRAM_32MB, + DRAM_64MB, + DRAM_128MB, + DRAM_256MB, + + __DRAM_SZ_MAX +}; + +struct mc_ddr_cfg { + u32 cfg0; + u32 cfg1; + u32 cfg2; + u32 cfg3; + u32 cfg4; +}; + +typedef void (*mc_reset_t)(int assert); + +struct mc_ddr_init_param { + void __iomem *memc; + + u32 dq_dly; + u32 dqs_dly; + + const struct mc_ddr_cfg *cfgs; + mc_reset_t mc_reset; + + u32 memsize; + u32 bus_width; +}; + +void ddr1_init(struct mc_ddr_init_param *param); +void ddr2_init(struct mc_ddr_init_param *param); +void ddr_calibrate(void __iomem *memc, u32 memsize, u32 bw); + +#endif /* _MTMIPS_DDR_H_ */ diff --git a/arch/mips/mach-mtmips/include/mach/mc.h b/arch/mips/mach-mtmips/include/mach/mc.h new file mode 100644 index 00000000000..d7d623a63bc --- /dev/null +++ b/arch/mips/mach-mtmips/include/mach/mc.h @@ -0,0 +1,180 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2020 MediaTek Inc. + * + * Author: Weijie Gao <weijie.gao@mediatek.com> + */ + +#ifndef _MTMIPS_MC_H_ +#define _MTMIPS_MC_H_ + +#define MEMCTL_SDRAM_CFG0_REG 0x00 +#define DIS_CLK_GT 0x80000000 +#define CLK_SLEW_S 29 +#define CLK_SLEW_M 0x60000000 +#define TWR 0x10000000 +#define TMRD_S 24 +#define TMRD_M 0xf000000 +#define TRFC_S 20 +#define TRFC_M 0xf00000 +#define TCAS_S 16 +#define TCAS_M 0x30000 +#define TRAS_S 12 +#define TRAS_M 0xf000 +#define TRCD_S 8 +#define TRCD_M 0x300 +#define TRC_S 4 +#define TRC_M 0xf0 +#define TRP_S 0 +#define TRP_M 0x03 + +#define MEMCTL_SDRAM_CFG1_REG 0x04 +#define SDRAM_INIT_START 0x80000000 +#define SDRAM_INIT_DONE 0x40000000 +#define RBC_MAPPING 0x20000000 +#define PWR_DOWN_EN 0x10000000 +#define PWR_DOWN_MODE 0x8000000 +#define SDRAM_WIDTH 0x1000000 +#define NUMCOLS_S 20 +#define NUMCOLS_M 0x300000 +#define NUMROWS_S 16 +#define NUMROWS_M 0x30000 +#define TREFR_S 0 +#define TREFR_M 0xffff + +#define MEMCTL_DDR_SELF_REFRESH_REG 0x10 +#define ODT_SRC_SEL_S 24 +#define ODT_SRC_SEL_M 0xf000000 +#define ODT_OFF_DLY_S 20 +#define ODT_OFF_DLY_M 0xf00000 +#define ODT_ON_DLY_S 16 +#define ODT_ON_DLY_M 0xf0000 +#define SR_AUTO_EN 0x10 +#define SRACK_B 0x02 +#define SRREQ_B 0x01 + +#define MEMCTL_PWR_SAVE_CNT_REG 0x14 +#define PD_CNT_S 24 +#define PD_CNT_M 0xff000000 +#define SR_TAR_CNT_S 0 +#define SR_TAR_CNT_M 0xffffff + +#define MEMCTL_DLL_DBG_REG 0x20 +#define TDC_STABLE_S 12 +#define TDC_STABLE_M 0x3f000 +#define MST_DLY_SEL_S 4 +#define MST_DLY_SEL_M 0xff0 +#define CURR_STATE_S 1 +#define CURR_STATE_M 0x06 +#define ADLL_LOCK_DONE 0x01 + +#define MEMCTL_DDR_CFG0_REG 0x40 +#define T_RRD_S 28 +#define T_RRD_M 0xf0000000 +#define T_RAS_S 23 +#define T_RAS_M 0xf800000 +#define T_RP_S 19 +#define T_RP_M 0x780000 +#define T_RFC_S 13 +#define T_RFC_M 0x7e000 +#define T_REFI_S 0 +#define T_REFI_M 0x1fff + +#define MEMCTL_DDR_CFG1_REG 0x44 +#define T_WTR_S 28 +#define T_WTR_M 0xf0000000 +#define T_RTP_S 24 +#define T_RTP_M 0xf000000 +#define USER_DATA_WIDTH 0x200000 +#define IND_SDRAM_SIZE_S 18 +#define IND_SDRAM_SIZE_M 0x1c0000 +#define IND_SDRAM_SIZE_8MB 1 +#define IND_SDRAM_SIZE_16MB 2 +#define IND_SDRAM_SIZE_32MB 3 +#define IND_SDRAM_SIZE_64MB 4 +#define IND_SDRAM_SIZE_128MB 5 +#define IND_SDRAM_SIZE_256MB 6 +#define IND_SDRAM_WIDTH_S 16 +#define IND_SDRAM_WIDTH_M 0x30000 +#define IND_SDRAM_WIDTH_8BIT 1 +#define IND_SDRAM_WIDTH_16BIT 2 +#define EXT_BANK_S 14 +#define EXT_BANK_M 0xc000 +#define TOTAL_SDRAM_WIDTH_S 12 +#define TOTAL_SDRAM_WIDTH_M 0x3000 +#define T_WR_S 8 +#define T_WR_M 0xf00 +#define T_MRD_S 4 +#define T_MRD_M 0xf0 +#define T_RCD_S 0 +#define T_RCD_M 0x0f + +#define MEMCTL_DDR_CFG2_REG 0x48 +#define REGE 0x80000000 +#define DDR2_MODE 0x40000000 +#define DQS0_GATING_WINDOW_S 28 +#define DQS0_GATING_WINDOW_M 0x30000000 +#define DQS1_GATING_WINDOW_S 26 +#define DQS1_GATING_WINDOW_M 0xc000000 +#define PD 0x1000 +#define WR_S 9 +#define WR_M 0xe00 +#define DLLRESET 0x100 +#define TESTMODE 0x80 +#define CAS_LATENCY_S 4 +#define CAS_LATENCY_M 0x70 +#define BURST_TYPE 0x08 +#define BURST_LENGTH_S 0 +#define BURST_LENGTH_M 0x07 + +#define MEMCTL_DDR_CFG3_REG 0x4c +#define Q_OFF 0x1000 +#define RDOS 0x800 +#define DIS_DIFF_DQS 0x400 +#define OCD_S 7 +#define OCD_M 0x380 +#define RTT1 0x40 +#define ADDITIVE_LATENCY_S 3 +#define ADDITIVE_LATENCY_M 0x38 +#define RTT0 0x04 +#define DS 0x02 +#define DLL 0x01 + +#define MEMCTL_DDR_CFG4_REG 0x50 +#define FAW_S 0 +#define FAW_M 0x0f + +#define MEMCTL_DDR_DQ_DLY_REG 0x60 +#define DQ1_DELAY_SEL_S 24 +#define DQ1_DELAY_SEL_M 0xff000000 +#define DQ0_DELAY_SEL_S 16 +#define DQ0_DELAY_SEL_M 0xff0000 +#define DQ1_DELAY_COARSE_TUNING_S 12 +#define DQ1_DELAY_COARSE_TUNING_M 0xf000 +#define DQ1_DELAY_FINE_TUNING_S 8 +#define DQ1_DELAY_FINE_TUNING_M 0xf00 +#define DQ0_DELAY_COARSE_TUNING_S 4 +#define DQ0_DELAY_COARSE_TUNING_M 0xf0 +#define DQ0_DELAY_FINE_TUNING_S 0 +#define DQ0_DELAY_FINE_TUNING_M 0x0f + +#define MEMCTL_DDR_DQS_DLY_REG 0x64 +#define DQS1_DELAY_SEL_S 24 +#define DQS1_DELAY_SEL_M 0xff000000 +#define DQS0_DELAY_SEL_S 16 +#define DQS0_DELAY_SEL_M 0xff0000 +#define DQS1_DELAY_COARSE_TUNING_S 12 +#define DQS1_DELAY_COARSE_TUNING_M 0xf000 +#define DQS1_DELAY_FINE_TUNING_S 8 +#define DQS1_DELAY_FINE_TUNING_M 0xf00 +#define DQS0_DELAY_COARSE_TUNING_S 4 +#define DQS0_DELAY_COARSE_TUNING_M 0xf0 +#define DQS0_DELAY_FINE_TUNING_S 0 +#define DQS0_DELAY_FINE_TUNING_M 0x0f + +#define MEMCTL_DDR_DLL_SLV_REG 0x68 +#define DLL_SLV_UPDATE_MODE 0x100 +#define DQS_DLY_SEL_EN 0x80 +#define DQ_DLY_SEL_EN 0x01 + +#endif /* _MTMIPS_MC_H_ */ diff --git a/arch/mips/mach-mtmips/include/mach/serial.h b/arch/mips/mach-mtmips/include/mach/serial.h new file mode 100644 index 00000000000..bfa246b428b --- /dev/null +++ b/arch/mips/mach-mtmips/include/mach/serial.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2020 MediaTek Inc. + * + * Author: Weijie Gao <weijie.gao@mediatek.com> + */ + +#ifndef _MTMIPS_SERIAL_H_ +#define _MTMIPS_SERIAL_H_ + +void mtmips_spl_serial_init(void); + +#endif /* _MTMIPS_SERIAL_H_ */ diff --git a/arch/mips/mach-mtmips/lowlevel_init.S b/arch/mips/mach-mtmips/lowlevel_init.S deleted file mode 100644 index aa707e0de6c..00000000000 --- a/arch/mips/mach-mtmips/lowlevel_init.S +++ /dev/null @@ -1,328 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (c) 2018 Stefan Roese <sr@denx.de> - * - * This code is mostly based on the code extracted from this MediaTek - * github repository: - * - * https://github.com/MediaTek-Labs/linkit-smart-uboot.git - * - * I was not able to find a specific license or other developers - * copyrights here, so I can't add them here. - */ - -#include <config.h> -#include <asm/regdef.h> -#include <asm/mipsregs.h> -#include <asm/addrspace.h> -#include <asm/asm.h> -#include "mt76xx.h" - -#ifndef BIT -#define BIT(nr) (1 << (nr)) -#endif - -#define DELAY_USEC(us) ((us) / 100) - -#define DDR_CFG1_CHIP_WIDTH_MASK (0x3 << 16) -#define DDR_CFG1_BUS_WIDTH_MASK (0x3 << 12) - -#if defined(CONFIG_ONBOARD_DDR2_SIZE_256MBIT) -#define DDR_CFG1_SIZE_VAL 0x222e2323 -#define DDR_CFG4_SIZE_VAL 7 -#endif -#if defined(CONFIG_ONBOARD_DDR2_SIZE_512MBIT) -#define DDR_CFG1_SIZE_VAL 0x22322323 -#define DDR_CFG4_SIZE_VAL 9 -#endif -#if defined(CONFIG_ONBOARD_DDR2_SIZE_1024MBIT) -#define DDR_CFG1_SIZE_VAL 0x22362323 -#define DDR_CFG4_SIZE_VAL 9 -#endif -#if defined(CONFIG_ONBOARD_DDR2_SIZE_2048MBIT) -#define DDR_CFG1_SIZE_VAL 0x223a2323 -#define DDR_CFG4_SIZE_VAL 9 -#endif - -#if defined(CONFIG_ONBOARD_DDR2_CHIP_WIDTH_8BIT) -#define DDR_CFG1_CHIP_WIDTH_VAL (0x1 << 16) -#endif -#if defined(CONFIG_ONBOARD_DDR2_CHIP_WIDTH_16BIT) -#define DDR_CFG1_CHIP_WIDTH_VAL (0x2 << 16) -#endif - -#if defined(CONFIG_ONBOARD_DDR2_BUS_WIDTH_16BIT) -#define DDR_CFG1_BUS_WIDTH_VAL (0x2 << 12) -#endif -#if defined(CONFIG_ONBOARD_DDR2_BUS_WIDTH_32BIT) -#define DDR_CFG1_BUS_WIDTH_VAL (0x3 << 12) -#endif - - .set noreorder - -LEAF(lowlevel_init) - - /* Load base addresses as physical addresses for later usage */ - li s0, CKSEG1ADDR(MT76XX_SYSCTL_BASE) - li s1, CKSEG1ADDR(MT76XX_MEMCTRL_BASE) - li s2, CKSEG1ADDR(MT76XX_RGCTRL_BASE) - - /* polling CPLL is ready */ - li t1, DELAY_USEC(1000000) - la t5, MT76XX_ROM_STATUS_REG -1: - lw t2, 0(t5) - andi t2, t2, 0x1 - bnez t2, CPLL_READY - subu t1, t1, 1 - bgtz t1, 1b - nop - la t0, MT76XX_CLKCFG0_REG - lw t3, 0(t0) - ori t3, t3, 0x1 - sw t3, 0(t0) - b CPLL_DONE - nop -CPLL_READY: - la t0, MT76XX_CLKCFG0_REG - lw t1, 0(t0) - li t2, ~0x0c - and t1, t1, t2 - ori t1, t1, 0xc - sw t1, 0(t0) - la t0, MT76XX_DYN_CFG0_REG - lw t3, 0(t0) - li t5, ~((0x0f << 8) | (0x0f << 0)) - and t3, t3, t5 - li t5, (10 << 8) | (1 << 0) - or t3, t3, t5 - sw t3, 0(t0) - la t0, MT76XX_CLKCFG0_REG - lw t3, 0(t0) - li t4, ~0x0F - and t3, t3, t4 - ori t3, t3, 0xc - sw t3, 0(t0) - lw t3, 0(t0) - ori t3, t3, 0x08 - sw t3, 0(t0) - -CPLL_DONE: - /* Reset MC */ - lw t2, 0x34(s0) - ori t2, BIT(10) - sw t2, 0x34(s0) - nop - - /* - * SDR and DDR initialization: delay 200us - */ - li t0, DELAY_USEC(200 + 40) - li t1, 0x1 -1: - sub t0, t0, t1 - bnez t0, 1b - nop - - /* set DRAM IO PAD for MT7628IC */ - /* DDR LDO Enable */ - lw t4, 0x100(s2) - li t2, BIT(31) - or t4, t4, t2 - sw t4, 0x100(s2) - lw t4, 0x10c(s2) - j LDO_1P8V - nop -LDO_1P8V: - li t2, ~BIT(6) - and t4, t4, t2 - sw t4, 0x10c(s2) - j DDRLDO_SOFT_START -LDO_2P5V: - /* suppose external DDR1 LDO 2.5V */ - li t2, BIT(6) - or t4, t4, t2 - sw t4, 0x10c(s2) - -DDRLDO_SOFT_START: - lw t2, 0x10c(s2) - li t3, BIT(16) - or t2, t2, t3 - sw t2, 0x10c(s2) - li t3, DELAY_USEC(250*50) -LDO_DELAY: - subu t3, t3, 1 - bnez t3, LDO_DELAY - nop - - lw t2, 0x10c(s2) - li t3, BIT(18) - or t2, t2, t3 - sw t2, 0x10c(s2) - -SET_RG_BUCK_FPWM: - lw t2, 0x104(s2) - ori t2, t2, BIT(10) - sw t2, 0x104(s2) - -DDR_PAD_CFG: - /* clean CLK PAD */ - lw t2, 0x704(s2) - li t8, 0xfffff0f0 - and t2, t2, t8 - /* clean CMD PAD */ - lw t3, 0x70c(s2) - li t8, 0xfffff0f0 - and t3, t3, t8 - /* clean DQ IPAD */ - lw t4, 0x710(s2) - li t8, 0xfffff8ff - and t4, t4, t8 - /* clean DQ OPAD */ - lw t5, 0x714(s2) - li t8, 0xfffff0f0 - and t5, t5, t8 - /* clean DQS IPAD */ - lw t6, 0x718(s2) - li t8, 0xfffff8ff - and t6, t6, t8 - /* clean DQS OPAD */ - lw t7, 0x71c(s2) - li t8, 0xfffff0f0 - and t7, t7, t8 - - lw t9, 0xc(s0) - srl t9, t9, 16 - andi t9, t9, 0x1 - bnez t9, MT7628_AN_DDR1_PAD -MT7628_KN_PAD: - li t8, 0x00000303 - or t2, t2, t8 - or t3, t3, t8 - or t5, t5, t8 - or t7, t7, t8 - li t8, 0x00000000 - or t4, t4, t8 - or t6, t6, t8 - j SET_PAD_CFG -MT7628_AN_DDR1_PAD: - lw t1, 0x10(s0) - andi t1, t1, 0x1 - beqz t1, MT7628_AN_DDR2_PAD - li t8, 0x00000c0c - or t2, t2, t8 - li t8, 0x00000202 - or t3, t3, t8 - li t8, 0x00000707 - or t5, t5, t8 - li t8, 0x00000c0c - or t7, t7, t8 - li t8, 0x00000000 - or t4, t4, t8 - or t6, t6, t8 - j SET_PAD_CFG -MT7628_AN_DDR2_PAD: - li t8, 0x00000c0c - or t2, t2, t8 - li t8, 0x00000202 - or t3, t3, t8 - li t8, 0x00000404 - or t5, t5, t8 - li t8, 0x00000c0c - or t7, t7, t8 - li t8, 0x00000000 /* ODT off */ - or t4, t4, t8 - or t6, t6, t8 - -SET_PAD_CFG: - sw t2, 0x704(s2) - sw t3, 0x70c(s2) - sw t4, 0x710(s2) - sw t5, 0x714(s2) - sw t6, 0x718(s2) - sw t7, 0x71c(s2) - - /* - * DDR initialization: reset pin to 0 - */ - lw t2, 0x34(s0) - and t2, ~BIT(10) - sw t2, 0x34(s0) - nop - - /* - * DDR initialization: wait til reg DDR_CFG1 bit 21 equal to 1 (ready) - */ -DDR_READY: - li t1, DDR_CFG1_REG - lw t0, 0(t1) - nop - and t2, t0, BIT(21) - beqz t2, DDR_READY - nop - - /* - * DDR initialization - * - * Only DDR2 supported right now. DDR2 support can be added, once - * boards using it will get added to mainline U-Boot. - */ - li t1, DDR_CFG2_REG - lw t0, 0(t1) - nop - and t0, ~BIT(30) - and t0, ~(7 << 4) - or t0, (4 << 4) - or t0, BIT(30) - or t0, BIT(11) - sw t0, 0(t1) - nop - - li t1, DDR_CFG3_REG - lw t2, 0(t1) - /* Disable ODT; reference board ok, ev board fail */ - and t2, ~BIT(6) - or t2, BIT(2) - li t0, DDR_CFG4_REG - lw t1, 0(t0) - li t2, ~(0x01f | 0x0f0) - and t1, t1, t2 - ori t1, t1, DDR_CFG4_SIZE_VAL - sw t1, 0(t0) - nop - - /* - * DDR initialization: config size and width on reg DDR_CFG1 - */ - li t6, DDR_CFG1_SIZE_VAL - - and t6, ~DDR_CFG1_CHIP_WIDTH_MASK - or t6, DDR_CFG1_CHIP_WIDTH_VAL - - /* CONFIG DDR_CFG1[13:12] about TOTAL WIDTH */ - and t6, ~DDR_CFG1_BUS_WIDTH_MASK - or t6, DDR_CFG1_BUS_WIDTH_VAL - - li t5, DDR_CFG1_REG - sw t6, 0(t5) - nop - - /* - * DDR: enable self auto refresh for power saving - * enable it by default for both RAM and ROM version (for CoC) - */ - lw t1, 0x14(s1) - nop - and t1, 0xff000000 - or t1, 0x01 - sw t1, 0x14(s1) - nop - lw t1, 0x10(s1) - nop - or t1, 0x10 - sw t1, 0x10(s1) - nop - - jr ra - nop - END(lowlevel_init) diff --git a/arch/mips/mach-mtmips/mt7628/Makefile b/arch/mips/mach-mtmips/mt7628/Makefile new file mode 100644 index 00000000000..7e139d5adfd --- /dev/null +++ b/arch/mips/mach-mtmips/mt7628/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0 + +obj-y += lowlevel_init.o +obj-y += init.o +obj-y += ddr.o +obj-$(CONFIG_SPL_BUILD) += serial.o diff --git a/arch/mips/mach-mtmips/mt7628/ddr.c b/arch/mips/mach-mtmips/mt7628/ddr.c new file mode 100644 index 00000000000..06c0ca68541 --- /dev/null +++ b/arch/mips/mach-mtmips/mt7628/ddr.c @@ -0,0 +1,173 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2020 MediaTek Inc. + * + * Author: Weijie Gao <weijie.gao@mediatek.com> + */ + +#include <common.h> +#include <asm/addrspace.h> +#include <linux/bitops.h> +#include <linux/sizes.h> +#include <linux/io.h> +#include <mach/ddr.h> +#include <mach/mc.h> +#include "mt7628.h" + +DECLARE_GLOBAL_DATA_PTR; + +/* DDR2 DQ_DLY */ +#define DDR2_DQ_DLY \ + ((0x8 << DQ1_DELAY_COARSE_TUNING_S) | \ + (0x2 << DQ1_DELAY_FINE_TUNING_S) | \ + (0x8 << DQ0_DELAY_COARSE_TUNING_S) | \ + (0x2 << DQ0_DELAY_FINE_TUNING_S)) + +/* DDR2 DQS_DLY */ +#define DDR2_DQS_DLY \ + ((0x8 << DQS1_DELAY_COARSE_TUNING_S) | \ + (0x3 << DQS1_DELAY_FINE_TUNING_S) | \ + (0x8 << DQS0_DELAY_COARSE_TUNING_S) | \ + (0x3 << DQS0_DELAY_FINE_TUNING_S)) + +const struct mc_ddr_cfg ddr1_cfgs_200mhz[] = { + [DRAM_8MB] = { 0x34A1EB94, 0x20262324, 0x28000033, 0x00000002, 0x00000000 }, + [DRAM_16MB] = { 0x34A1EB94, 0x202A2324, 0x28000033, 0x00000002, 0x00000000 }, + [DRAM_32MB] = { 0x34A1E5CA, 0x202E2324, 0x28000033, 0x00000002, 0x00000000 }, + [DRAM_64MB] = { 0x3421E5CA, 0x20322324, 0x28000033, 0x00000002, 0x00000000 }, + [DRAM_128MB] = { 0x241B05CA, 0x20362334, 0x28000033, 0x00000002, 0x00000000 }, +}; + +const struct mc_ddr_cfg ddr1_cfgs_160mhz[] = { + [DRAM_8MB] = { 0x239964A1, 0x20262323, 0x00000033, 0x00000002, 0x00000000 }, + [DRAM_16MB] = { 0x239964A1, 0x202A2323, 0x00000033, 0x00000002, 0x00000000 }, + [DRAM_32MB] = { 0x239964A1, 0x202E2323, 0x00000033, 0x00000002, 0x00000000 }, + [DRAM_64MB] = { 0x239984A1, 0x20322323, 0x00000033, 0x00000002, 0x00000000 }, + [DRAM_128MB] = { 0x239AB4A1, 0x20362333, 0x00000033, 0x00000002, 0x00000000 }, +}; + +const struct mc_ddr_cfg ddr2_cfgs_200mhz[] = { + [DRAM_32MB] = { 0x2519E2E5, 0x222E2323, 0x68000C43, 0x00000452, 0x0000000A }, + [DRAM_64MB] = { 0x249AA2E5, 0x22322323, 0x68000C43, 0x00000452, 0x0000000A }, + [DRAM_128MB] = { 0x249B42E5, 0x22362323, 0x68000C43, 0x00000452, 0x0000000A }, + [DRAM_256MB] = { 0x249CE2E5, 0x223A2323, 0x68000C43, 0x00000452, 0x0000000A }, +}; + +const struct mc_ddr_cfg ddr2_cfgs_160mhz[] = { + [DRAM_32MB] = { 0x23918250, 0x222E2322, 0x40000A43, 0x00000452, 0x00000006 }, + [DRAM_64MB] = { 0x239A2250, 0x22322322, 0x40000A43, 0x00000452, 0x00000008 }, + [DRAM_128MB] = { 0x2392A250, 0x22362322, 0x40000A43, 0x00000452, 0x00000008 }, + [DRAM_256MB] = { 0x24140250, 0x223A2322, 0x40000A43, 0x00000452, 0x00000008 }, +}; + +static void mt7628_memc_reset(int assert) +{ + void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); + + if (assert) + setbits_32(sysc + SYSCTL_RSTCTL_REG, MC_RST); + else + clrbits_32(sysc + SYSCTL_RSTCTL_REG, MC_RST); +} + +static void mt7628_ddr_pad_ldo_config(int ddr_type, int pkg_type) +{ + void __iomem *rgc = ioremap_nocache(RGCTL_BASE, RGCTL_SIZE); + u32 ck_pad1, cmd_pad1, dq_pad0, dq_pad1, dqs_pad0, dqs_pad1; + + setbits_32(rgc + RGCTL_PMU_G0_REG, PMU_CFG_EN); + + if (ddr_type == DRAM_DDR1) + setbits_32(rgc + RGCTL_PMU_G3_REG, RG_DDRLDO_VOSEL); + else + clrbits_32(rgc + RGCTL_PMU_G3_REG, RG_DDRLDO_VOSEL); + + setbits_32(rgc + RGCTL_PMU_G3_REG, NI_DDRLDO_EN); + + __udelay(250 * 50); + + setbits_32(rgc + RGCTL_PMU_G3_REG, NI_DDRLDO_STB); + setbits_32(rgc + RGCTL_PMU_G1_REG, RG_BUCK_FPWM); + + ck_pad1 = readl(rgc + RGCTL_DDR_PAD_CK_G1_REG); + cmd_pad1 = readl(rgc + RGCTL_DDR_PAD_CMD_G1_REG); + dq_pad0 = readl(rgc + RGCTL_DDR_PAD_DQ_G0_REG); + dq_pad1 = readl(rgc + RGCTL_DDR_PAD_DQ_G1_REG); + dqs_pad0 = readl(rgc + RGCTL_DDR_PAD_DQS_G0_REG); + dqs_pad1 = readl(rgc + RGCTL_DDR_PAD_DQS_G1_REG); + + ck_pad1 &= ~(DRVP_M | DRVN_M); + cmd_pad1 &= ~(DRVP_M | DRVN_M); + dq_pad0 &= ~RTT_M; + dq_pad1 &= ~(DRVP_M | DRVN_M); + dqs_pad0 &= ~RTT_M; + dqs_pad1 &= ~(DRVP_M | DRVN_M); + + if (pkg_type == PKG_ID_KN) { + ck_pad1 |= (3 << DRVP_S) | (3 << DRVN_S); + cmd_pad1 |= (3 << DRVP_S) | (3 << DRVN_S); + dq_pad1 |= (3 << DRVP_S) | (3 << DRVN_S); + dqs_pad1 |= (3 << DRVP_S) | (3 << DRVN_S); + } else { + ck_pad1 |= (12 << DRVP_S) | (12 << DRVN_S); + cmd_pad1 |= (2 << DRVP_S) | (2 << DRVN_S); + dqs_pad1 |= (12 << DRVP_S) | (12 << DRVN_S); + if (ddr_type == DRAM_DDR1) + dq_pad1 |= (7 << DRVP_S) | (7 << DRVN_S); + else + dq_pad1 |= (4 << DRVP_S) | (4 << DRVN_S); + } + + writel(ck_pad1, rgc + RGCTL_DDR_PAD_CK_G1_REG); + writel(cmd_pad1, rgc + RGCTL_DDR_PAD_CMD_G1_REG); + writel(dq_pad0, rgc + RGCTL_DDR_PAD_DQ_G0_REG); + writel(dq_pad1, rgc + RGCTL_DDR_PAD_DQ_G1_REG); + writel(dqs_pad0, rgc + RGCTL_DDR_PAD_DQS_G0_REG); + writel(dqs_pad1, rgc + RGCTL_DDR_PAD_DQS_G1_REG); +} + +void mt7628_ddr_init(void) +{ + void __iomem *sysc; + int ddr_type, pkg_type, lspd; + struct mc_ddr_init_param param; + + sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); + ddr_type = readl(sysc + SYSCTL_SYSCFG0_REG) & DRAM_TYPE; + pkg_type = !!(readl(sysc + SYSCTL_CHIP_REV_ID_REG) & PKG_ID); + lspd = readl(sysc + SYSCTL_CLKCFG0_REG) & + (CPU_PLL_FROM_BBP | CPU_PLL_FROM_XTAL); + + mt7628_memc_reset(1); + __udelay(200); + + mt7628_ddr_pad_ldo_config(ddr_type, pkg_type); + + param.memc = ioremap_nocache(MEMCTL_BASE, MEMCTL_SIZE); + param.dq_dly = DDR2_DQ_DLY; + param.dqs_dly = DDR2_DQS_DLY; + param.mc_reset = mt7628_memc_reset; + param.memsize = 0; + param.bus_width = 0; + + if (pkg_type == PKG_ID_KN) + ddr_type = DRAM_DDR1; + + if (ddr_type == DRAM_DDR1) { + if (lspd) + param.cfgs = ddr1_cfgs_160mhz; + else + param.cfgs = ddr1_cfgs_200mhz; + ddr1_init(¶m); + } else { + if (lspd) + param.cfgs = ddr2_cfgs_160mhz; + else + param.cfgs = ddr2_cfgs_200mhz; + ddr2_init(¶m); + } + + ddr_calibrate(param.memc, param.memsize, param.bus_width); + + gd->ram_size = param.memsize; +} diff --git a/arch/mips/mach-mtmips/mt7628/init.c b/arch/mips/mach-mtmips/mt7628/init.c new file mode 100644 index 00000000000..77d1f2ea0dc --- /dev/null +++ b/arch/mips/mach-mtmips/mt7628/init.c @@ -0,0 +1,109 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2020 MediaTek Inc. + * + * Author: Weijie Gao <weijie.gao@mediatek.com> + */ + +#include <common.h> +#include <clk.h> +#include <dm.h> +#include <dm/uclass.h> +#include <dt-bindings/clock/mt7628-clk.h> +#include <linux/io.h> +#include "mt7628.h" + +DECLARE_GLOBAL_DATA_PTR; + +static void set_init_timer_freq(void) +{ + void __iomem *sysc; + u32 bs, val, timer_freq_post; + + sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); + + /* We can't use the clk driver as the DM has not been initialized yet */ + bs = readl(sysc + SYSCTL_SYSCFG0_REG); + if ((bs & XTAL_FREQ_SEL) == XTAL_25MHZ) { + gd->arch.timer_freq = 25000000; + timer_freq_post = 575000000; + } else { + gd->arch.timer_freq = 40000000; + timer_freq_post = 580000000; + } + + val = readl(sysc + SYSCTL_CLKCFG0_REG); + if (!(val & (CPU_PLL_FROM_BBP | CPU_PLL_FROM_XTAL))) + gd->arch.timer_freq = timer_freq_post; +} + +void mt7628_init(void) +{ + set_init_timer_freq(); + + mt7628_ddr_init(); +} + +int print_cpuinfo(void) +{ + void __iomem *sysc; + struct udevice *clkdev; + u32 val, ver, eco, pkg, ddr, chipmode, ee; + ulong cpu_clk, bus_clk, xtal_clk, timer_freq; + struct clk clk; + int ret; + + sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); + + val = readl(sysc + SYSCTL_CHIP_REV_ID_REG); + ver = (val & VER_M) >> VER_S; + eco = (val & ECO_M) >> ECO_S; + pkg = !!(val & PKG_ID); + + val = readl(sysc + SYSCTL_SYSCFG0_REG); + ddr = val & DRAM_TYPE; + chipmode = (val & CHIP_MODE_M) >> CHIP_MODE_S; + + val = readl(sysc + SYSCTL_EFUSE_CFG_REG); + ee = val & EFUSE_MT7688; + + printf("CPU: MediaTek MT%u%c ver:%u eco:%u\n", + ee ? 7688 : 7628, pkg ? 'A' : 'K', ver, eco); + + printf("Boot: DDR%s, SPI-NOR %u-Byte Addr, CPU clock from %s\n", + ddr ? "" : "2", chipmode & 0x01 ? 4 : 3, + chipmode & 0x02 ? "XTAL" : "CPLL"); + + ret = uclass_get_device_by_driver(UCLASS_CLK, DM_GET_DRIVER(mt7628_clk), + &clkdev); + if (ret) + return ret; + + clk.dev = clkdev; + + clk.id = CLK_CPU; + cpu_clk = clk_get_rate(&clk); + + clk.id = CLK_SYS; + bus_clk = clk_get_rate(&clk); + + clk.id = CLK_XTAL; + xtal_clk = clk_get_rate(&clk); + + clk.id = CLK_MIPS_CNT; + timer_freq = clk_get_rate(&clk); + + /* Set final timer frequency */ + if (timer_freq) + gd->arch.timer_freq = timer_freq; + + printf("Clock: CPU: %luMHz, Bus: %luMHz, XTAL: %luMHz\n", + cpu_clk / 1000000, bus_clk / 1000000, xtal_clk / 1000000); + + return 0; +} + +ulong notrace get_tbclk(void) +{ + return gd->arch.timer_freq; +} diff --git a/arch/mips/mach-mtmips/mt7628/lowlevel_init.S b/arch/mips/mach-mtmips/mt7628/lowlevel_init.S new file mode 100644 index 00000000000..e4a6c035808 --- /dev/null +++ b/arch/mips/mach-mtmips/mt7628/lowlevel_init.S @@ -0,0 +1,161 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2020 MediaTek Inc. + * + * Author: Weijie Gao <weijie.gao@mediatek.com> + */ + +#include <config.h> +#include <asm-offsets.h> +#include <asm/cacheops.h> +#include <asm/regdef.h> +#include <asm/mipsregs.h> +#include <asm/addrspace.h> +#include <asm/asm.h> +#include "mt7628.h" + +/* Set temporary stack address range */ +#ifndef CONFIG_SYS_INIT_SP_ADDR +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ + CONFIG_SYS_INIT_SP_OFFSET) +#endif + +#define CACHE_STACK_SIZE 0x4000 +#define CACHE_STACK_BASE (CONFIG_SYS_INIT_SP_ADDR - CACHE_STACK_SIZE) + +#define DELAY_USEC(us) ((58 * (us)) / 3) + + .set noreorder + +LEAF(mips_sram_init) +#ifndef CONFIG_SKIP_LOWLEVEL_INIT + /* Setup CPU PLL */ + li t0, DELAY_USEC(1000000) + li t1, KSEG1ADDR(SYSCTL_BASE + SYSCTL_ROM_STATUS_REG) + li t2, KSEG1ADDR(SYSCTL_BASE + SYSCTL_CLKCFG0_REG) + +_check_rom_status: + lw t3, 0(t1) + andi t3, t3, 1 + bnez t3, _rom_normal + subu t0, t0, 1 + bnez t0, _check_rom_status + nop + + lw t3, 0(t2) + ori t3, (CPU_PLL_FROM_BBP | CPU_PLL_FROM_XTAL) + xori t3, CPU_PLL_FROM_BBP + b _cpu_pll_done + nop + +_rom_normal: + lw t3, 0(t2) + ori t3, (CPU_PLL_FROM_BBP | CPU_PLL_FROM_XTAL | \ + DIS_BBP_SLEEP | EN_BBP_CLK) + xori t3, (CPU_PLL_FROM_BBP | CPU_PLL_FROM_XTAL) + +_cpu_pll_done: + sw t3, 0(t2) + + li t2, KSEG1ADDR(RBUSCTL_BASE + RBUSCTL_DYN_CFG0_REG) + lw t3, 0(t2) + ori t3, t3, (CPU_FDIV_M | CPU_FFRAC_M) + xori t3, t3, (CPU_FDIV_M | CPU_FFRAC_M) + ori t3, t3, ((1 << CPU_FDIV_S) | (1 << CPU_FFRAC_S)) + sw t3, 0(t2) + + /* Clear WST & SPR bits in ErrCtl */ + mfc0 t0, CP0_ECC + ins t0, zero, 30, 2 + mtc0 t0, CP0_ECC + ehb + + /* Simply initialize I-Cache */ + li a0, 0 + li a1, CONFIG_SYS_ICACHE_SIZE + + mtc0 zero, CP0_TAGLO /* Zero to DDataLo */ + +1: cache INDEX_STORE_TAG_I, 0(a0) + addiu a0, CONFIG_SYS_ICACHE_LINE_SIZE + bne a0, a1, 1b + nop + + /* Simply initialize D-Cache */ + li a0, 0 + li a1, CONFIG_SYS_DCACHE_SIZE + + mtc0 zero, CP0_TAGLO, 2 + +2: cache INDEX_STORE_TAG_D, 0(a0) + addiu a0, CONFIG_SYS_DCACHE_LINE_SIZE + bne a0, a1, 2b + nop + + /* Set KSEG0 Cachable */ + mfc0 t0, CP0_CONFIG + and t0, t0, MIPS_CONF_IMPL + or t0, t0, CONF_CM_CACHABLE_NONCOHERENT + mtc0 t0, CP0_CONFIG + ehb + + /* Lock D-Cache */ + PTR_LI a0, CACHE_STACK_BASE /* D-Cache lock base */ + li a1, CACHE_STACK_SIZE /* D-Cache lock size */ + li a2, 0x1ffff800 /* Mask of DTagLo[PTagLo] */ + +3: + /* Lock one cacheline */ + and t0, a0, a2 + ori t0, 0xe0 /* Valid & Dirty & Lock bits */ + mtc0 t0, CP0_TAGLO, 2 /* Write to DTagLo */ + ehb + cache INDEX_STORE_TAG_D, 0(a0) + + addiu a0, CONFIG_SYS_DCACHE_LINE_SIZE + sub a1, CONFIG_SYS_DCACHE_LINE_SIZE + bnez a1, 3b + nop +#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ + + jr ra + nop + END(mips_sram_init) + +NESTED(lowlevel_init, 0, ra) + /* Save ra and do real lowlevel initialization */ + move s0, ra + + PTR_LA t9, mt7628_init + jalr t9 + nop + + move ra, s0 + +#if CONFIG_IS_ENABLED(INIT_STACK_WITHOUT_MALLOC_F) + /* Set malloc base */ + li t0, (CONFIG_SYS_INIT_SP_ADDR + 15) & (~15) + PTR_S t0, GD_MALLOC_BASE(k0) # gd->malloc_base offset +#endif + + /* Write back data in locked cache to DRAM */ + PTR_LI a0, CACHE_STACK_BASE /* D-Cache unlock base */ + li a1, CACHE_STACK_SIZE /* D-Cache unlock size */ + +1: + cache HIT_WRITEBACK_INV_D, 0(a0) + addiu a0, CONFIG_SYS_DCACHE_LINE_SIZE + sub a1, CONFIG_SYS_DCACHE_LINE_SIZE + bnez a1, 1b + nop + + /* Set KSEG0 Uncached */ + mfc0 t0, CP0_CONFIG + and t0, t0, MIPS_CONF_IMPL + or t0, t0, CONF_CM_UNCACHED + mtc0 t0, CP0_CONFIG + ehb + + jr ra + nop + END(lowlevel_init) diff --git a/arch/mips/mach-mtmips/mt7628/mt7628.h b/arch/mips/mach-mtmips/mt7628/mt7628.h new file mode 100644 index 00000000000..391880b014e --- /dev/null +++ b/arch/mips/mach-mtmips/mt7628/mt7628.h @@ -0,0 +1,104 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2020 MediaTek Inc. + * + * Author: Weijie Gao <weijie.gao@mediatek.com> + */ + +#ifndef _MT7628_H_ +#define _MT7628_H_ + +#define SYSCTL_BASE 0x10000000 +#define SYSCTL_SIZE 0x100 +#define MEMCTL_BASE 0x10000300 +#define MEMCTL_SIZE 0x100 +#define RBUSCTL_BASE 0x10000400 +#define RBUSCTL_SIZE 0x100 +#define RGCTL_BASE 0x10001000 +#define RGCTL_SIZE 0x800 + +#define SYSCTL_EFUSE_CFG_REG 0x08 +#define EFUSE_MT7688 0x100000 + +#define SYSCTL_CHIP_REV_ID_REG 0x0c +#define PKG_ID 0x10000 +#define PKG_ID_AN 1 +#define PKG_ID_KN 0 +#define VER_S 8 +#define VER_M 0xf00 +#define ECO_S 0 +#define ECO_M 0x0f + +#define SYSCTL_SYSCFG0_REG 0x10 +#define XTAL_FREQ_SEL 0x40 +#define XTAL_40MHZ 1 +#define XTAL_25MHZ 0 +#define CHIP_MODE_S 1 +#define CHIP_MODE_M 0x0e +#define DRAM_TYPE 0x01 +#define DRAM_DDR1 1 +#define DRAM_DDR2 0 + +#define SYSCTL_ROM_STATUS_REG 0x28 + +#define SYSCTL_CLKCFG0_REG 0x2c +#define DIS_BBP_SLEEP 0x08 +#define EN_BBP_CLK 0x04 +#define CPU_PLL_FROM_BBP 0x02 +#define CPU_PLL_FROM_XTAL 0x01 + +#define SYSCTL_RSTCTL_REG 0x34 +#define MC_RST 0x400 + +#define SYSCTL_AGPIO_CFG_REG 0x3c +#define EPHY_GPIO_AIO_EN_S 17 +#define EPHY_GPIO_AIO_EN_M 0x1e0000 + +#define SYSCTL_GPIO_MODE1_REG 0x60 +#define UART2_MODE_S 26 +#define UART2_MODE_M 0xc000000 +#define UART1_MODE_S 24 +#define UART1_MODE_M 0x3000000 +#define UART0_MODE_S 8 +#define UART0_MODE_M 0x300 +#define SPIS_MODE_S 2 +#define SPIS_MODE_M 0x0c + +#define RBUSCTL_DYN_CFG0_REG 0x40 +#define CPU_FDIV_S 8 +#define CPU_FDIV_M 0xf00 +#define CPU_FFRAC_S 0 +#define CPU_FFRAC_M 0x0f + +#define RGCTL_PMU_G0_REG 0x100 +#define PMU_CFG_EN 0x80000000 + +#define RGCTL_PMU_G1_REG 0x104 +#define RG_BUCK_FPWM 0x02 + +#define RGCTL_PMU_G3_REG 0x10c +#define NI_DDRLDO_STB 0x40000 +#define NI_DDRLDO_EN 0x10000 +#define RG_DDRLDO_VOSEL 0x40 + +#define RGCTL_DDR_PAD_CK_G0_REG 0x700 +#define RGCTL_DDR_PAD_CMD_G0_REG 0x708 +#define RGCTL_DDR_PAD_DQ_G0_REG 0x710 +#define RGCTL_DDR_PAD_DQS_G0_REG 0x718 +#define RTT_S 8 +#define RTT_M 0x700 + +#define RGCTL_DDR_PAD_CK_G1_REG 0x704 +#define RGCTL_DDR_PAD_CMD_G1_REG 0x70c +#define RGCTL_DDR_PAD_DQ_G1_REG 0x714 +#define RGCTL_DDR_PAD_DQS_G1_REG 0x71c +#define DRVP_S 0 +#define DRVP_M 0x0f +#define DRVN_S 8 +#define DRVN_M 0xf00 + +#ifndef __ASSEMBLY__ +void mt7628_ddr_init(void); +#endif + +#endif /* _MT7628_H_ */ diff --git a/arch/mips/mach-mtmips/mt7628/serial.c b/arch/mips/mach-mtmips/mt7628/serial.c new file mode 100644 index 00000000000..a7d324792d7 --- /dev/null +++ b/arch/mips/mach-mtmips/mt7628/serial.c @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2020 MediaTek Inc. + * + * Author: Weijie Gao <weijie.gao@mediatek.com> + */ + +#include <common.h> +#include <asm/io.h> +#include "mt7628.h" + +void mtmips_spl_serial_init(void) +{ +#ifdef CONFIG_SPL_SERIAL_SUPPORT + void __iomem *base = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); + +#if CONFIG_CONS_INDEX == 1 + clrbits_32(base + SYSCTL_GPIO_MODE1_REG, UART0_MODE_M); +#elif CONFIG_CONS_INDEX == 2 + clrbits_32(base + SYSCTL_GPIO_MODE1_REG, UART1_MODE_M); +#elif CONFIG_CONS_INDEX == 3 + setbits_32(base + SYSCTL_AGPIO_CFG_REG, EPHY_GPIO_AIO_EN_M); +#ifdef CONFIG_SPL_UART2_SPIS_PINMUX + setbits_32(base + SYSCTL_GPIO_MODE1_REG, SPIS_MODE_M); + clrsetbits_32(base + SYSCTL_GPIO_MODE1_REG, UART2_MODE_M, + 1 << UART2_MODE_S); +#else + clrbits_32(base + SYSCTL_GPIO_MODE1_REG, UART2_MODE_M); + clrsetbits_32(base + SYSCTL_GPIO_MODE1_REG, SPIS_MODE_M, + 1 << SPIS_MODE_S); +#endif /* CONFIG_SPL_UART2_SPIS_PINMUX */ +#endif /* CONFIG_CONS_INDEX */ +#endif /* CONFIG_SPL_SERIAL_SUPPORT */ +} diff --git a/arch/mips/mach-mtmips/mt76xx.h b/arch/mips/mach-mtmips/mt76xx.h deleted file mode 100644 index 17473ea8f18..00000000000 --- a/arch/mips/mach-mtmips/mt76xx.h +++ /dev/null @@ -1,32 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2018 Stefan Roese <sr@denx.de> - */ - -#ifndef __MT76XX_H -#define __MT76XX_H - -#define MT76XX_SYSCTL_BASE 0x10000000 - -#define MT76XX_CHIPID_OFFS 0x00 -#define MT76XX_CHIP_REV_ID_OFFS 0x0c -#define MT76XX_SYSCFG0_OFFS 0x10 - -#define MT76XX_MEMCTRL_BASE (MT76XX_SYSCTL_BASE + 0x0300) -#define MT76XX_RGCTRL_BASE (MT76XX_SYSCTL_BASE + 0x1000) - -#define MT76XX_ROM_STATUS_REG (MT76XX_SYSCTL_BASE + 0x0028) -#define MT76XX_CLKCFG0_REG (MT76XX_SYSCTL_BASE + 0x002c) -#define MT76XX_DYN_CFG0_REG (MT76XX_SYSCTL_BASE + 0x0440) - -#define DDR_CFG1_REG (MT76XX_MEMCTRL_BASE + 0x44) -#define DDR_CFG2_REG (MT76XX_MEMCTRL_BASE + 0x48) -#define DDR_CFG3_REG (MT76XX_MEMCTRL_BASE + 0x4c) -#define DDR_CFG4_REG (MT76XX_MEMCTRL_BASE + 0x50) - -#ifndef __ASSEMBLY__ -/* Prototypes */ -void ddr_calibrate(void); -#endif - -#endif diff --git a/arch/mips/mach-mtmips/spl.c b/arch/mips/mach-mtmips/spl.c new file mode 100644 index 00000000000..2a24af70c3a --- /dev/null +++ b/arch/mips/mach-mtmips/spl.c @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2020 MediaTek Inc. All Rights Reserved. + * + * Author: Weijie Gao <weijie.gao@mediatek.com> + */ + +#include <common.h> +#include <fdt.h> +#include <spl.h> +#include <asm/sections.h> +#include <linux/sizes.h> +#include <mach/serial.h> + +void __noreturn board_init_f(ulong dummy) +{ + spl_init(); + +#ifdef CONFIG_SPL_SERIAL_SUPPORT + /* + * mtmips_spl_serial_init() is useful if debug uart is enabled, + * or DM based serial is not enabled. + */ + mtmips_spl_serial_init(); + preloader_console_init(); +#endif + + board_init_r(NULL, 0); +} + +void board_boot_order(u32 *spl_boot_list) +{ + spl_boot_list[0] = BOOT_DEVICE_NOR; +} + +unsigned long spl_nor_get_uboot_base(void) +{ + void *uboot_base = __image_copy_end; + + if (fdt_magic(uboot_base) == FDT_MAGIC) + return (unsigned long)uboot_base + fdt_totalsize(uboot_base); + + return (unsigned long)uboot_base; +} diff --git a/board/freescale/ls1028a/MAINTAINERS b/board/freescale/ls1028a/MAINTAINERS index 2c288256985..5b7a8db2fac 100644 --- a/board/freescale/ls1028a/MAINTAINERS +++ b/board/freescale/ls1028a/MAINTAINERS @@ -8,6 +8,7 @@ F: board/freescale/ls1028a/ F: include/configs/ls1028a_common.h F: include/configs/ls1028aqds.h F: configs/ls1028aqds_tfa_defconfig +F: configs/ls1028aqds_tfa_lpuart_defconfig LS1028ARDB BOARD M: Sudhanshu Gupta <sudhanshu.gupta@nxp.com> diff --git a/board/freescale/ls1028a/ls1028a.c b/board/freescale/ls1028a/ls1028a.c index 0b7504aea12..1e2973f0c8f 100644 --- a/board/freescale/ls1028a/ls1028a.c +++ b/board/freescale/ls1028a/ls1028a.c @@ -31,6 +31,7 @@ DECLARE_GLOBAL_DATA_PTR; int config_board_mux(void) { +#ifndef CONFIG_LPUART #if defined(CONFIG_TARGET_LS1028AQDS) && defined(CONFIG_FSL_QIXIS) u8 reg; @@ -55,9 +56,18 @@ int config_board_mux(void) reg &= ~(0xc0); QIXIS_WRITE(brdcfg[15], reg); #endif +#endif + return 0; } +#ifdef CONFIG_LPUART +u32 get_lpuart_clk(void) +{ + return gd->bus_clk / CONFIG_SYS_FSL_LPUART_CLK_DIV; +} +#endif + int board_init(void) { #ifdef CONFIG_ENV_IS_NOWHERE @@ -120,11 +130,33 @@ int misc_init_r(void) int board_early_init_f(void) { +#ifdef CONFIG_LPUART + u8 uart; +#endif + #ifdef CONFIG_SYS_I2C_EARLY_INIT i2c_early_init_f(); #endif fsl_lsch3_early_init_f(); + +#ifdef CONFIG_LPUART + /* + * Field| Function + * -------------------------------------------------------------- + * 7-6 | Controls I2C3 routing (net CFG_MUX_I2C3): + * I2C3 | 11= Routes {SCL, SDA} to LPUART1 header as {SOUT, SIN}. + * -------------------------------------------------------------- + * 5-4 | Controls I2C4 routing (net CFG_MUX_I2C4): + * I2C4 |11= Routes {SCL, SDA} to LPUART1 header as {CTS_B, RTS_B}. + */ + /* use lpuart0 as system console */ + uart = QIXIS_READ(brdcfg[13]); + uart &= ~CFG_LPUART_MUX_MASK; + uart |= CFG_LPUART_EN; + QIXIS_WRITE(brdcfg[13], uart); +#endif + return 0; } diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c index 9bc78d6543d..26a192957be 100644 --- a/board/freescale/ls1043ardb/ls1043ardb.c +++ b/board/freescale/ls1043ardb/ls1043ardb.c @@ -285,8 +285,10 @@ int ft_board_setup(void *blob, bd_t *bd) ft_cpu_setup(blob, bd); #ifdef CONFIG_SYS_DPAA_FMAN +#ifndef CONFIG_DM_ETH fdt_fixup_fman_ethernet(blob); #endif +#endif fdt_fixup_icid(blob); diff --git a/board/freescale/ls1046afrwy/ls1046afrwy.c b/board/freescale/ls1046afrwy/ls1046afrwy.c index 8c0abb63a9d..71ace192e2b 100644 --- a/board/freescale/ls1046afrwy/ls1046afrwy.c +++ b/board/freescale/ls1046afrwy/ls1046afrwy.c @@ -232,8 +232,10 @@ int ft_board_setup(void *blob, bd_t *bd) ft_cpu_setup(blob, bd); #ifdef CONFIG_SYS_DPAA_FMAN +#ifndef CONFIG_DM_ETH fdt_fixup_fman_ethernet(blob); #endif +#endif fdt_fixup_icid(blob); diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c index cabd7ee648c..e6648e9d702 100644 --- a/board/freescale/ls1046aqds/ls1046aqds.c +++ b/board/freescale/ls1046aqds/ls1046aqds.c @@ -462,7 +462,9 @@ int ft_board_setup(void *blob, bd_t *bd) ft_cpu_setup(blob, bd); #ifdef CONFIG_SYS_DPAA_FMAN +#ifndef CONFIG_DM_ETH fdt_fixup_fman_ethernet(blob); +#endif fdt_fixup_board_enet(blob); #endif diff --git a/board/freescale/ls1046ardb/ddr.h b/board/freescale/ls1046ardb/ddr.h index 3b4d44d4658..05baef232ab 100644 --- a/board/freescale/ls1046ardb/ddr.h +++ b/board/freescale/ls1046ardb/ddr.h @@ -32,7 +32,7 @@ static const struct board_specific_parameters udimm0[] = { {2, 1350, 0, 8, 6, 0x0708090B, 0x0C0D0E09,}, {2, 1666, 0, 8, 7, 0x08090A0C, 0x0D0F100B,}, {2, 1900, 0, 8, 7, 0x09090B0D, 0x0E10120B,}, - {2, 2300, 0, 8, 9, 0x0A0B0C10, 0x1213140E,}, + {2, 2300, 0, 8, 7, 0x08090A0E, 0x1011120C,}, {} }; diff --git a/board/freescale/ls1046ardb/ls1046ardb.c b/board/freescale/ls1046ardb/ls1046ardb.c index cc6bd883c3d..5308cb2e1c7 100644 --- a/board/freescale/ls1046ardb/ls1046ardb.c +++ b/board/freescale/ls1046ardb/ls1046ardb.c @@ -172,8 +172,10 @@ int ft_board_setup(void *blob, bd_t *bd) ft_cpu_setup(blob, bd); #ifdef CONFIG_SYS_DPAA_FMAN +#ifndef CONFIG_DM_ETH fdt_fixup_fman_ethernet(blob); #endif +#endif fdt_fixup_icid(blob); diff --git a/board/freescale/ls1088a/eth_ls1088ardb.c b/board/freescale/ls1088a/eth_ls1088ardb.c index 01f56db0a1b..f56ce7d9ae8 100644 --- a/board/freescale/ls1088a/eth_ls1088ardb.c +++ b/board/freescale/ls1088a/eth_ls1088ardb.c @@ -18,6 +18,7 @@ #include <fsl-mc/fsl_mc.h> #include <fsl-mc/ldpaa_wriop.h> +#ifndef CONFIG_DM_ETH int board_eth_init(bd_t *bis) { #if defined(CONFIG_FSL_MC_ENET) @@ -95,6 +96,7 @@ int board_eth_init(bd_t *bis) return pci_eth_init(bis); } +#endif #if defined(CONFIG_RESET_PHY_R) void reset_phy(void) diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c index 0bd397a0beb..225e787c757 100644 --- a/board/freescale/ls1088a/ls1088a.c +++ b/board/freescale/ls1088a/ls1088a.c @@ -801,6 +801,11 @@ int board_init(void) #ifdef CONFIG_FSL_LS_PPA ppa_init(); #endif + +#if !defined(CONFIG_SYS_EARLY_PCI_INIT) && defined(CONFIG_DM_ETH) + pci_init(); +#endif + return 0; } diff --git a/board/freescale/ls2080ardb/eth_ls2080rdb.c b/board/freescale/ls2080ardb/eth_ls2080rdb.c index b0f276e8397..f0f6ca53cb0 100644 --- a/board/freescale/ls2080ardb/eth_ls2080rdb.c +++ b/board/freescale/ls2080ardb/eth_ls2080rdb.c @@ -23,6 +23,7 @@ DECLARE_GLOBAL_DATA_PTR; int board_eth_init(bd_t *bis) { +#ifndef CONFIG_DM_ETH #if defined(CONFIG_FSL_MC_ENET) int i, interface; struct memac_mdio_info mdio_info; @@ -99,6 +100,7 @@ int board_eth_init(bd_t *bis) cpu_eth_init(bis); #endif /* CONFIG_FSL_MC_ENET */ +#endif /* !CONFIG_DM_ETH */ #ifdef CONFIG_PHY_AQUANTIA /* @@ -112,7 +114,12 @@ int board_eth_init(bd_t *bis) gd->jt->mdio_phydev_for_ethname = mdio_phydev_for_ethname; gd->jt->miiphy_set_current_dev = miiphy_set_current_dev; #endif + +#ifdef CONFIG_DM_ETH + return 0; +#else return pci_eth_init(bis); +#endif } #if defined(CONFIG_RESET_PHY_R) diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c index 282aaf47fb8..5e2fc7cc983 100644 --- a/board/freescale/ls2080ardb/ls2080ardb.c +++ b/board/freescale/ls2080ardb/ls2080ardb.c @@ -244,6 +244,10 @@ int board_init(void) sec_init(); #endif +#if !defined(CONFIG_SYS_EARLY_PCI_INIT) && defined(CONFIG_DM_ETH) + pci_init(); +#endif + return 0; } diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c index 23ea1b6f16a..0d94107def4 100644 --- a/board/freescale/lx2160a/lx2160a.c +++ b/board/freescale/lx2160a/lx2160a.c @@ -29,14 +29,11 @@ #include "../common/vid.h" #include <fsl_immap.h> #include <asm/arch-fsl-layerscape/fsl_icid.h> -#include <asm/gic-v3.h> -#include <cpu_func.h> #ifdef CONFIG_EMC2305 #include "../common/emc2305.h" #endif -#define GIC_LPI_SIZE 0x200000 #ifdef CONFIG_TARGET_LX2160AQDS #define CFG_MUX_I2C_SDHC(reg, value) ((reg & 0x3f) | value) #define SET_CFG_MUX1_SDHC1_SDHC(reg) (reg & 0x3f) @@ -644,21 +641,6 @@ void board_quiesce_devices(void) } #endif -#ifdef CONFIG_GIC_V3_ITS -void fdt_fixup_gic_lpi_memory(void *blob, u64 gic_lpi_base) -{ - u32 phandle; - int err; - struct fdt_memory gic_lpi; - - gic_lpi.start = gic_lpi_base; - gic_lpi.end = gic_lpi_base + GIC_LPI_SIZE - 1; - err = fdtdec_add_reserved_memory(blob, "gic-lpi", &gic_lpi, &phandle); - if (err < 0) - debug("failed to add reserved memory: %d\n", err); -} -#endif - #ifdef CONFIG_OF_BOARD_SETUP int ft_board_setup(void *blob, bd_t *bd) { @@ -670,7 +652,6 @@ int ft_board_setup(void *blob, bd_t *bd) u64 mc_memory_base = 0; u64 mc_memory_size = 0; u16 total_memory_banks; - u64 __maybe_unused gic_lpi_base; ft_cpu_setup(blob, bd); @@ -690,12 +671,6 @@ int ft_board_setup(void *blob, bd_t *bd) size[i] = gd->bd->bi_dram[i].size; } -#ifdef CONFIG_GIC_V3_ITS - gic_lpi_base = gd->arch.resv_ram - GIC_LPI_SIZE; - gic_lpi_tables_init(gic_lpi_base, cpu_numcores()); - fdt_fixup_gic_lpi_memory(blob, gic_lpi_base); -#endif - #ifdef CONFIG_RESV_RAM /* reduce size if reserved memory is within this bank */ if (gd->arch.resv_ram >= base[0] && diff --git a/board/gardena/smart-gateway-mt7688/board.c b/board/gardena/smart-gateway-mt7688/board.c index 48cf3091e99..776afa43a66 100644 --- a/board/gardena/smart-gateway-mt7688/board.c +++ b/board/gardena/smart-gateway-mt7688/board.c @@ -295,8 +295,10 @@ err_free: return ret; } +#ifndef CONFIG_SPL_BUILD U_BOOT_CMD( fd_write, 1, 0, do_fd_write, "Write test factory-data values to SPI NOR", "\n" ); +#endif diff --git a/board/mediatek/mt7628/Kconfig b/board/mediatek/mt7628/Kconfig new file mode 100644 index 00000000000..d6b6f9d632f --- /dev/null +++ b/board/mediatek/mt7628/Kconfig @@ -0,0 +1,12 @@ +if BOARD_MT7628_RFB + +config SYS_BOARD + default "mt7628" + +config SYS_VENDOR + default "mediatek" + +config SYS_CONFIG_NAME + default "mt7628" + +endif diff --git a/board/mediatek/mt7628/MAINTAINERS b/board/mediatek/mt7628/MAINTAINERS new file mode 100644 index 00000000000..032fd0e2f72 --- /dev/null +++ b/board/mediatek/mt7628/MAINTAINERS @@ -0,0 +1,7 @@ +MT7628_RFB BOARD +M: Weijie Gao <weijie.gao@mediatek.com> +S: Maintained +F: board/mediatek/mt7628 +F: include/configs/mt7628.h +F: configs/mt7628_rfb_defconfig +F: arch/mips/dts/mediatek,mt7628-rfb.dts diff --git a/board/mediatek/mt7628/Makefile b/board/mediatek/mt7628/Makefile new file mode 100644 index 00000000000..db129c5abae --- /dev/null +++ b/board/mediatek/mt7628/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0 + +obj-y += board.o diff --git a/board/mediatek/mt7628/board.c b/board/mediatek/mt7628/board.c new file mode 100644 index 00000000000..f837a06fbbf --- /dev/null +++ b/board/mediatek/mt7628/board.c @@ -0,0 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2020 MediaTek Inc. All Rights Reserved. + * + * Author: Weijie Gao <weijie.gao@mediatek.com> + */ + +#include <common.h> diff --git a/board/renesas/salvator-x/MAINTAINERS b/board/renesas/salvator-x/MAINTAINERS index 542f7cc893a..7335bc3cd8b 100644 --- a/board/renesas/salvator-x/MAINTAINERS +++ b/board/renesas/salvator-x/MAINTAINERS @@ -3,6 +3,4 @@ M: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> S: Maintained F: board/renesas/salvator-x/ F: include/configs/salvator-x.h -F: configs/r8a7795_salvator-x_defconfig -F: configs/r8a7796_salvator-x_defconfig -F: configs/r8a77965_salvator-x_defconfig +F: configs/rcar3_salvator-x_defconfig diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c index 058fa6fbb61..91c3728571e 100644 --- a/board/renesas/salvator-x/salvator-x.c +++ b/board/renesas/salvator-x/salvator-x.c @@ -93,11 +93,11 @@ int board_fit_config_name_match(const char *name) u32 cpu_type = rmobile_get_cpu_type(); if ((cpu_type == RMOBILE_CPU_TYPE_R8A7795) && - !strcmp(name, "r8a7795-salvator-x-u-boot")) + !strcmp(name, "r8a77950-salvator-x-u-boot")) return 0; if ((cpu_type == RMOBILE_CPU_TYPE_R8A7796) && - !strcmp(name, "r8a7796-salvator-x-u-boot")) + !strcmp(name, "r8a77960-salvator-x-u-boot")) return 0; if ((cpu_type == RMOBILE_CPU_TYPE_R8A77965) && diff --git a/board/renesas/ulcb/MAINTAINERS b/board/renesas/ulcb/MAINTAINERS index 8549f543f48..564eb561b13 100644 --- a/board/renesas/ulcb/MAINTAINERS +++ b/board/renesas/ulcb/MAINTAINERS @@ -3,6 +3,4 @@ M: Marek Vasut <marek.vasut+renesas@gmail.com> S: Maintained F: board/renesas/ulcb/ F: include/configs/ulcb.h -F: configs/r8a7795_ulcb_defconfig -F: configs/r8a7796_ulcb_defconfig -F: configs/r8a77965_ulcb_defconfig +F: configs/rcar3_ulcb_defconfig diff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c index bcae6ff67ca..b91f940b487 100644 --- a/board/renesas/ulcb/ulcb.c +++ b/board/renesas/ulcb/ulcb.c @@ -75,15 +75,15 @@ int board_fit_config_name_match(const char *name) u32 cpu_type = rmobile_get_cpu_type(); if ((cpu_type == RMOBILE_CPU_TYPE_R8A7795) && - !strcmp(name, "r8a7795-h3ulcb-u-boot")) + !strcmp(name, "r8a77950-ulcb-u-boot")) return 0; if ((cpu_type == RMOBILE_CPU_TYPE_R8A7796) && - !strcmp(name, "r8a7796-m3ulcb-u-boot")) + !strcmp(name, "r8a77960-ulcb-u-boot")) return 0; if ((cpu_type == RMOBILE_CPU_TYPE_R8A77965) && - !strcmp(name, "r8a77965-m3nulcb-u-boot")) + !strcmp(name, "r8a77965-ulcb-u-boot")) return 0; return -1; diff --git a/board/synopsys/hsdk/Kconfig b/board/synopsys/hsdk/Kconfig index e8c00a6e7d0..d9c0e27a41d 100644 --- a/board/synopsys/hsdk/Kconfig +++ b/board/synopsys/hsdk/Kconfig @@ -7,6 +7,24 @@ config SYS_VENDOR default "synopsys" config SYS_CONFIG_NAME - default "hsdk" + default "hsdk" if BOARD_HSDK + default "hsdk-4xd" if BOARD_HSDK_4XD + +choice + prompt "HSDK board type" + default BOARD_HSDK + +config BOARD_HSDK + bool "ARC HS Development Kit" + help + ARC HS Development Kit based on quard core ARC HS38 processor + +config BOARD_HSDK_4XD + bool "ARC HS4x/HS4xD Development Kit" + help + ARC HS4x/HS4xD Development Kit based on quard core ARC HS48/HS47D + processor + +endchoice endif diff --git a/board/synopsys/hsdk/MAINTAINERS b/board/synopsys/hsdk/MAINTAINERS index e22bd1e40b2..73f71fd06bc 100644 --- a/board/synopsys/hsdk/MAINTAINERS +++ b/board/synopsys/hsdk/MAINTAINERS @@ -1,5 +1,8 @@ -HSDK BOARD +HSDK BOARDs M: Eugeniy Paltsev <paltsev@synopsys.com> S: Maintained F: board/synopsys/hsdk/ F: configs/hsdk_defconfig +F: configs/hsdk_4xd_defconfig +F: include/configs/hsdk-4xd.h +F: include/configs/hsdk.h diff --git a/board/synopsys/hsdk/config.mk b/board/synopsys/hsdk/config.mk index 5ae22fa2b75..def944aad2b 100644 --- a/board/synopsys/hsdk/config.mk +++ b/board/synopsys/hsdk/config.mk @@ -2,6 +2,7 @@ # # Copyright (C) 2018 Synopsys, Inc. All rights reserved. +ifdef CONFIG_BOARD_HSDK PLATFORM_CPPFLAGS += -mcpu=hs38_linux -mlittle-endian -matomic -mll64 \ -mdiv-rem -mswap -mnorm -mmpy-option=9 -mbarrel-shifter \ -mfpu=fpud_all @@ -13,3 +14,18 @@ bsp-generate: u-boot u-boot.bin $(Q)tools/mkimage -T script -C none -n 'uboot update script' \ -d $(srctree)/u-boot-update.txt \ $(srctree)/u-boot-update.scr &> /dev/null +endif + +ifdef CONFIG_BOARD_HSDK_4XD +PLATFORM_CPPFLAGS += -mcpu=hs4x_rel31 -mlittle-endian -matomic -mll64 \ + -mdiv-rem -mswap -mnorm -mmpy-option=9 -mbarrel-shifter \ + -mfpu=fpud_all + +bsp-generate: u-boot u-boot.bin + $(Q)python3 $(srctree)/board/$(BOARDDIR)/headerize-hsdk.py \ + --arc-id 0x54 --image $(srctree)/u-boot.bin \ + --elf $(srctree)/u-boot + $(Q)tools/mkimage -T script -C none -n 'uboot update script' \ + -d $(srctree)/u-boot-update.txt \ + $(srctree)/u-boot-update.scr &> /dev/null +endif diff --git a/board/synopsys/hsdk/headerize-hsdk.py b/board/synopsys/hsdk/headerize-hsdk.py index fce749723ed..7b047cf4a38 100644 --- a/board/synopsys/hsdk/headerize-hsdk.py +++ b/board/synopsys/hsdk/headerize-hsdk.py @@ -27,7 +27,7 @@ def calc_check_sum(filename): def arg_verify(uboot_bin_filename, uboot_elf_filename, arc_id): - if arc_id not in [0x52, 0x53]: + if arc_id not in [0x52, 0x53, 0x54]: print("unknown ARC ID: " + hex(arc_id)) sys.exit(2) diff --git a/board/synopsys/hsdk/hsdk.c b/board/synopsys/hsdk/hsdk.c index 67a29e334d7..a3e0563ff45 100644 --- a/board/synopsys/hsdk/hsdk.c +++ b/board/synopsys/hsdk/hsdk.c @@ -40,6 +40,9 @@ DECLARE_GLOBAL_DATA_PTR; #define CREG_BASE (ARC_PERIPHERAL_BASE + 0x1000) #define CREG_CPU_START (CREG_BASE + 0x400) #define CREG_CPU_START_MASK 0xF +#define CREG_CPU_START_POL BIT(4) + +#define CREG_CPU_0_ENTRY (CREG_BASE + 0x404) #define SDIO_BASE (ARC_PERIPHERAL_BASE + 0xA000) #define SDIO_UHS_REG_EXT (SDIO_BASE + 0x108) @@ -79,6 +82,9 @@ struct hsdk_env_common_ctl { u32_env nvlim; u32_env icache; u32_env dcache; + u32_env csm_location; + u32_env l2_cache; + u32_env haps_apb; }; /* @@ -128,6 +134,11 @@ static const struct env_map_common env_map_common[] = { { "non_volatile_limit", ENV_HEX, true, 0, 0xF, &env_common.nvlim }, { "icache_ena", ENV_HEX, true, 0, 1, &env_common.icache }, { "dcache_ena", ENV_HEX, true, 0, 1, &env_common.dcache }, +#if defined(CONFIG_BOARD_HSDK_4XD) + { "l2_cache_ena", ENV_HEX, true, 0, 1, &env_common.l2_cache }, + { "csm_location", ENV_HEX, true, 0, NO_CCM, &env_common.csm_location }, + { "haps_apb_location", ENV_HEX, true, 0, 1, &env_common.haps_apb }, +#endif /* CONFIG_BOARD_HSDK_4XD */ {} }; @@ -154,6 +165,61 @@ static const struct env_map_percpu env_map_go[] = { {} }; +enum board_type { + T_BOARD_NONE, + T_BOARD_HSDK, + T_BOARD_HSDK_4XD +}; + +static inline enum board_type get_board_type_runtime(void) +{ + u32 arc_id = read_aux_reg(ARC_AUX_IDENTITY) & 0xFF; + + if (arc_id == 0x52) + return T_BOARD_HSDK; + else if (arc_id == 0x54) + return T_BOARD_HSDK_4XD; + else + return T_BOARD_NONE; +} + +static inline enum board_type get_board_type_config(void) +{ + if (IS_ENABLED(CONFIG_BOARD_HSDK)) + return T_BOARD_HSDK; + else if (IS_ENABLED(CONFIG_BOARD_HSDK_4XD)) + return T_BOARD_HSDK_4XD; + else + return T_BOARD_NONE; +} + +static bool is_board_match_runtime(enum board_type type_req) +{ + return get_board_type_runtime() == type_req; +} + +static bool is_board_match_config(enum board_type type_req) +{ + return get_board_type_config() == type_req; +} + +static const char * board_name(enum board_type type) +{ + switch (type) { + case T_BOARD_HSDK: + return "ARC HS Development Kit"; + case T_BOARD_HSDK_4XD: + return "ARC HS4x/HS4xD Development Kit"; + default: + return "?"; + } +} + +static bool board_mismatch(void) +{ + return get_board_type_config() != get_board_type_runtime(); +} + static void sync_cross_cpu_data(void) { u32 value; @@ -221,10 +287,48 @@ static void init_cluster_nvlim(void) flush_dcache_all(); write_aux_reg(ARC_AUX_NON_VOLATILE_LIMIT, val); - write_aux_reg(AUX_AUX_CACHE_LIMIT, val); + /* AUX_AUX_CACHE_LIMIT reg is missing starting from HS48 */ + if (is_board_match_runtime(T_BOARD_HSDK)) + write_aux_reg(AUX_AUX_CACHE_LIMIT, val); flush_n_invalidate_dcache_all(); } +static void init_cluster_slc(void) +{ + /* ARC HS38 doesn't support SLC disabling */ + if (!is_board_match_config(T_BOARD_HSDK_4XD)) + return; + + if (env_common.l2_cache.val) + slc_enable(); + else + slc_disable(); +} + +#define CREG_CSM_BASE (CREG_BASE + 0x210) + +static void init_cluster_csm(void) +{ + /* ARC HS38 in HSDK SoC doesn't include CSM */ + if (!is_board_match_config(T_BOARD_HSDK_4XD)) + return; + + if (env_common.csm_location.val == NO_CCM) { + write_aux_reg(ARC_AUX_CSM_ENABLE, 0); + } else { + /* + * CSM base address is 256kByte aligned but we allow to map + * CSM only to aperture start (256MByte aligned) + * The field in CREG_CSM_BASE is in 17:2 bits itself so we need + * to shift it. + */ + u32 csm_base = (env_common.csm_location.val * SZ_1K) << 2; + + write_aux_reg(ARC_AUX_CSM_ENABLE, 1); + writel(csm_base, (void __iomem *)CREG_CSM_BASE); + } +} + static void init_master_icache(void) { if (icache_status()) { @@ -279,25 +383,36 @@ static inline void halt_this_cpu(void) __builtin_arc_flag(1); } -static void smp_kick_cpu_x(u32 cpu_id) +static u32 get_masked_cpu_ctart_reg(void) { int cmd = readl((void __iomem *)CREG_CPU_START); + /* + * Quirk for HSDK-4xD - due to HW issues HSDK can use any pulse polarity + * and HSDK-4xD require active low polarity of cpu_start pulse. + */ + cmd &= ~CREG_CPU_START_POL; + + cmd &= ~CREG_CPU_START_MASK; + + return cmd; +} + +static void smp_kick_cpu_x(u32 cpu_id) +{ + int cmd; + if (cpu_id > NR_CPUS) return; - cmd &= ~CREG_CPU_START_MASK; + cmd = get_masked_cpu_ctart_reg(); cmd |= (1 << cpu_id); writel(cmd, (void __iomem *)CREG_CPU_START); } static u32 prepare_cpu_ctart_reg(void) { - int cmd = readl((void __iomem *)CREG_CPU_START); - - cmd &= ~CREG_CPU_START_MASK; - - return cmd | env_common.core_mask.val; + return get_masked_cpu_ctart_reg() | env_common.core_mask.val; } /* slave CPU entry for configuration */ @@ -560,6 +675,61 @@ void init_memory_bridge(void) writel(UPDATE_VAL, CREG_PAE_UPDT); } +/* + * For HSDK-4xD we do additional AXI bridge tweaking in hsdk_init command: + * - we shrink IOC region. + * - we configure HS CORE SLV1 aperture depending on haps_apb_location + * environment variable. + * + * As we've already configured AXI bridge in init_memory_bridge we don't + * do full configuration here but reconfigure changed part. + * + * m master AXI_M_m_SLV0 AXI_M_m_SLV1 AXI_M_m_OFFSET0 AXI_M_m_OFFSET1 + * 0 HS (CBU) 0x11111111 0x63111111 0xFEDCBA98 0x0E543210 [haps_apb_location = 0] + * 0 HS (CBU) 0x11111111 0x61111111 0xFEDCBA98 0x06543210 [haps_apb_location = 1] + * 1 HS (RTT) 0x77777777 0x77777777 0xFEDCBA98 0x76543210 + * 2 AXI Tunnel 0x88888888 0x88888888 0xFEDCBA98 0x76543210 + * 3 HDMI-VIDEO 0x77777777 0x77777777 0xFEDCBA98 0x76543210 + * 4 HDMI-ADUIO 0x77777777 0x77777777 0xFEDCBA98 0x76543210 + * 5 USB-HOST 0x77777777 0x77779999 0xFEDCBA98 0x7654BA98 + * 6 ETHERNET 0x77777777 0x77779999 0xFEDCBA98 0x7654BA98 + * 7 SDIO 0x77777777 0x77779999 0xFEDCBA98 0x7654BA98 + * 8 GPU 0x77777777 0x77777777 0xFEDCBA98 0x76543210 + * 9 DMAC (port #1) 0x77777777 0x77777777 0xFEDCBA98 0x76543210 + * 10 DMAC (port #2) 0x77777777 0x77777777 0xFEDCBA98 0x76543210 + * 11 DVFS 0x00000000 0x60000000 0x00000000 0x00000000 + */ +void tweak_memory_bridge_cfg(void) +{ + /* + * Only HSDK-4xD requre additional AXI bridge tweaking depending on + * haps_apb_location environment variable + */ + if (!is_board_match_config(T_BOARD_HSDK_4XD)) + return; + + if (env_common.haps_apb.val) { + writel(0x61111111, CREG_AXI_M_SLV1(M_HS_CORE)); + writel(0x06543210, CREG_AXI_M_OFT1(M_HS_CORE)); + } else { + writel(0x63111111, CREG_AXI_M_SLV1(M_HS_CORE)); + writel(0x0E543210, CREG_AXI_M_OFT1(M_HS_CORE)); + } + writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_HS_CORE)); + + writel(0x77779999, CREG_AXI_M_SLV1(M_USB_HOST)); + writel(0x7654BA98, CREG_AXI_M_OFT1(M_USB_HOST)); + writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_USB_HOST)); + + writel(0x77779999, CREG_AXI_M_SLV1(M_ETHERNET));; + writel(0x7654BA98, CREG_AXI_M_OFT1(M_ETHERNET)); + writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_ETHERNET)); + + writel(0x77779999, CREG_AXI_M_SLV1(M_SDIO)); + writel(0x7654BA98, CREG_AXI_M_OFT1(M_SDIO)); + writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_SDIO)); +} + static void setup_clocks(void) { ulong rate; @@ -593,6 +763,9 @@ static void do_init_cluster(void) * cores. */ init_cluster_nvlim(); + init_cluster_csm(); + init_cluster_slc(); + tweak_memory_bridge_cfg(); } static int check_master_cpu_id(void) @@ -758,6 +931,11 @@ static int do_hsdk_go(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) { int ret; + if (board_mismatch()) { + printf("ERR: U-boot is not configured for this board!\n"); + return CMD_RET_FAILURE; + } + /* * Check for 'halt' parameter. 'halt' = enter halt-mode just before * starting the application; can be used for debug. @@ -793,20 +971,45 @@ U_BOOT_CMD( "hsdk_go halt - Boot stand-alone application on HSDK, halt CPU just before application run\n" ); +/* + * We may simply use static variable here to store init status, but we also want + * to avoid the situation when we reload U-boot via MDB after previous + * init is done but HW reset (board reset) isn't done. So let's store the + * init status in any unused register (i.e CREG_CPU_0_ENTRY) so status will + * survive after U-boot is reloaded via MDB. + */ +#define INIT_MARKER_REGISTER ((void __iomem *)CREG_CPU_0_ENTRY) +/* must be equal to INIT_MARKER_REGISTER reset value */ +#define INIT_MARKER_PENDING 0 + +static bool init_marker_get(void) +{ + return readl(INIT_MARKER_REGISTER) != INIT_MARKER_PENDING; +} + +static void init_mark_done(void) +{ + writel(~INIT_MARKER_PENDING, INIT_MARKER_REGISTER); +} + static int do_hsdk_init(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) { - static bool done = false; int ret; + if (board_mismatch()) { + printf("ERR: U-boot is not configured for this board!\n"); + return CMD_RET_FAILURE; + } + /* hsdk_init can be run only once */ - if (done) { + if (init_marker_get()) { printf("HSDK HW is already initialized! Please reset the board if you want to change the configuration.\n"); return CMD_RET_FAILURE; } ret = prepare_cpus(); if (!ret) - done = true; + init_mark_done(); return ret ? CMD_RET_FAILURE : CMD_RET_SUCCESS; } @@ -911,10 +1114,13 @@ static int do_hsdk_clock_print_all(cmd_tbl_t *cmdtp, int flag, int argc, soc_clk_ctl("eth-clk", NULL, CLK_PRINT | CLK_MHZ); soc_clk_ctl("usb-clk", NULL, CLK_PRINT | CLK_MHZ); soc_clk_ctl("sdio-clk", NULL, CLK_PRINT | CLK_MHZ); -/* soc_clk_ctl("hdmi-sys-clk", NULL, CLK_PRINT | CLK_MHZ); */ + if (is_board_match_runtime(T_BOARD_HSDK_4XD)) + soc_clk_ctl("hdmi-sys-clk", NULL, CLK_PRINT | CLK_MHZ); soc_clk_ctl("gfx-core-clk", NULL, CLK_PRINT | CLK_MHZ); - soc_clk_ctl("gfx-dma-clk", NULL, CLK_PRINT | CLK_MHZ); - soc_clk_ctl("gfx-cfg-clk", NULL, CLK_PRINT | CLK_MHZ); + if (is_board_match_runtime(T_BOARD_HSDK)) { + soc_clk_ctl("gfx-dma-clk", NULL, CLK_PRINT | CLK_MHZ); + soc_clk_ctl("gfx-cfg-clk", NULL, CLK_PRINT | CLK_MHZ); + } soc_clk_ctl("dmac-core-clk", NULL, CLK_PRINT | CLK_MHZ); soc_clk_ctl("dmac-cfg-clk", NULL, CLK_PRINT | CLK_MHZ); soc_clk_ctl("sdio-ref-clk", NULL, CLK_PRINT | CLK_MHZ); @@ -929,15 +1135,19 @@ static int do_hsdk_clock_print_all(cmd_tbl_t *cmdtp, int flag, int argc, printf("\n"); /* HDMI clock domain */ -/* soc_clk_ctl("hdmi-pll", NULL, CLK_PRINT | CLK_MHZ); */ -/* soc_clk_ctl("hdmi-clk", NULL, CLK_PRINT | CLK_MHZ); */ -/* printf("\n"); */ + if (is_board_match_runtime(T_BOARD_HSDK_4XD)) { + soc_clk_ctl("hdmi-pll", NULL, CLK_PRINT | CLK_MHZ); + soc_clk_ctl("hdmi-clk", NULL, CLK_PRINT | CLK_MHZ); + printf("\n"); + } /* TUN clock domain */ soc_clk_ctl("tun-pll", NULL, CLK_PRINT | CLK_MHZ); soc_clk_ctl("tun-clk", NULL, CLK_PRINT | CLK_MHZ); soc_clk_ctl("rom-clk", NULL, CLK_PRINT | CLK_MHZ); soc_clk_ctl("pwm-clk", NULL, CLK_PRINT | CLK_MHZ); + if (is_board_match_runtime(T_BOARD_HSDK_4XD)) + soc_clk_ctl("timer-clk", NULL, CLK_PRINT | CLK_MHZ); printf("\n"); return CMD_RET_SUCCESS; @@ -1031,6 +1241,11 @@ int board_late_init(void) int checkboard(void) { - puts("Board: Synopsys ARC HS Development Kit\n"); + printf("Board: Synopsys %s\n", board_name(get_board_type_runtime())); + + if (board_mismatch()) + printf("WARN: U-boot is configured NOT for this board but for %s!\n", + board_name(get_board_type_config())); + return 0; }; diff --git a/board/vocore/vocore2/Kconfig b/board/vocore/vocore2/Kconfig new file mode 100644 index 00000000000..baeff31b692 --- /dev/null +++ b/board/vocore/vocore2/Kconfig @@ -0,0 +1,12 @@ +if BOARD_VOCORE2 + +config SYS_BOARD + default "vocore2" + +config SYS_VENDOR + default "vocore" + +config SYS_CONFIG_NAME + default "vocore2" + +endif diff --git a/board/vocore/vocore2/MAINTAINERS b/board/vocore/vocore2/MAINTAINERS new file mode 100644 index 00000000000..8472351fe25 --- /dev/null +++ b/board/vocore/vocore2/MAINTAINERS @@ -0,0 +1,7 @@ +VOCORE_VOCORE2 BOARD +M: Mauro Condarelli <mc5686@mclink.it> +S: Maintained +F: board/vocore/vocore2 +F: include/configs/vocore2.h +F: configs/vocore2_defconfig +F: arch/mips/dts/vocore_vocore2.dts diff --git a/board/vocore/vocore2/Makefile b/board/vocore/vocore2/Makefile new file mode 100644 index 00000000000..70cd7a8e568 --- /dev/null +++ b/board/vocore/vocore2/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0+ + +obj-y += board.o diff --git a/board/vocore/vocore2/board.c b/board/vocore/vocore2/board.c new file mode 100644 index 00000000000..27e42d14141 --- /dev/null +++ b/board/vocore/vocore2/board.c @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Mauro Condarelli <mc5686@mclink.it> + * + * Nothing actually needed here + */ diff --git a/cmd/mem.c b/cmd/mem.c index 0bfb6081e7e..009b7b58f32 100644 --- a/cmd/mem.c +++ b/cmd/mem.c @@ -1144,10 +1144,8 @@ static int do_random(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) unsigned char *buf8; unsigned int i; - if (argc < 3 || argc > 4) { - printf("usage: %s <addr> <len> [<seed>]\n", argv[0]); - return 0; - } + if (argc < 3 || argc > 4) + return CMD_RET_USAGE; len = simple_strtoul(argv[2], NULL, 16); addr = simple_strtoul(argv[1], NULL, 16); @@ -1174,7 +1172,8 @@ static int do_random(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) unmap_sysmem(start); printf("%lu bytes filled with random data\n", len); - return 1; + + return CMD_RET_SUCCESS; } #endif diff --git a/common/Makefile b/common/Makefile index 3471c47be5b..2e7a090588d 100644 --- a/common/Makefile +++ b/common/Makefile @@ -110,6 +110,7 @@ obj-y += image.o obj-$(CONFIG_ANDROID_AB) += android_ab.o obj-$(CONFIG_ANDROID_BOOT_IMAGE) += image-android.o image-android-dt.o obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += image-fdt.o +obj-$(CONFIG_$(SPL_TPL_)FIT_SIGNATURE) += fdt_region.o obj-$(CONFIG_$(SPL_TPL_)FIT) += image-fit.o obj-$(CONFIG_$(SPL_)MULTI_DTB_FIT) += boot_fit.o common_fit.o obj-$(CONFIG_$(SPL_TPL_)IMAGE_SIGN_INFO) += image-sig.o diff --git a/lib/libfdt/fdt_region.c b/common/fdt_region.c index 7e9fa9272e8..bf0a9be730f 100644 --- a/lib/libfdt/fdt_region.c +++ b/common/fdt_region.c @@ -6,6 +6,7 @@ */ #include <linux/libfdt_env.h> +#include <fdt_region.h> #ifndef USE_HOSTCC #include <fdt.h> diff --git a/common/image-fit-sig.c b/common/image-fit-sig.c index 490566ca900..3e735785949 100644 --- a/common/image-fit-sig.c +++ b/common/image-fit-sig.c @@ -11,6 +11,7 @@ #include <malloc.h> DECLARE_GLOBAL_DATA_PTR; #endif /* !USE_HOSTCC*/ +#include <fdt_region.h> #include <image.h> #include <u-boot/rsa.h> #include <u-boot/rsa-checksum.h> diff --git a/common/log.c b/common/log.c index ffb3cd69332..c5b9b489ca3 100644 --- a/common/log.c +++ b/common/log.c @@ -233,7 +233,7 @@ int log_add_filter(const char *drv_name, enum log_category_t cat_list[], ldev = log_device_find_by_name(drv_name); if (!ldev) return -ENOENT; - filt = (struct log_filter *)calloc(1, sizeof(*filt)); + filt = calloc(1, sizeof(*filt)); if (!filt) return -ENOMEM; diff --git a/common/spl/Makefile b/common/spl/Makefile index eaa57f5ce5e..c576a781268 100644 --- a/common/spl/Makefile +++ b/common/spl/Makefile @@ -10,6 +10,7 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_$(SPL_TPL_)FRAMEWORK) += spl.o obj-$(CONFIG_$(SPL_TPL_)BOOTROM_SUPPORT) += spl_bootrom.o obj-$(CONFIG_$(SPL_TPL_)LOAD_FIT) += spl_fit.o +obj-$(CONFIG_$(SPL_TPL_)LEGACY_IMAGE_SUPPORT) += spl_legacy.o obj-$(CONFIG_$(SPL_TPL_)NOR_SUPPORT) += spl_nor.o obj-$(CONFIG_$(SPL_TPL_)XIP_SUPPORT) += spl_xip.o obj-$(CONFIG_$(SPL_TPL_)YMODEM_SUPPORT) += spl_ymodem.o diff --git a/common/spl/spl.c b/common/spl/spl.c index 932e6ab98ac..b0f0e1557b9 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -254,6 +254,14 @@ static int spl_load_fit_image(struct spl_image_info *spl_image, } #endif +__weak int spl_parse_legacy_header(struct spl_image_info *spl_image, + const struct image_header *header) +{ + /* LEGACY image not supported */ + debug("Legacy boot image support not enabled, proceeding to other boot methods\n"); + return -EINVAL; +} + int spl_parse_image_header(struct spl_image_info *spl_image, const struct image_header *header) { @@ -264,51 +272,11 @@ int spl_parse_image_header(struct spl_image_info *spl_image, return ret; #endif if (image_get_magic(header) == IH_MAGIC) { -#ifdef CONFIG_SPL_LEGACY_IMAGE_SUPPORT - u32 header_size = sizeof(struct image_header); - -#ifdef CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK - /* check uImage header CRC */ - if (!image_check_hcrc(header)) { - puts("SPL: Image header CRC check failed!\n"); - return -EINVAL; - } -#endif - - if (spl_image->flags & SPL_COPY_PAYLOAD_ONLY) { - /* - * On some system (e.g. powerpc), the load-address and - * entry-point is located at address 0. We can't load - * to 0-0x40. So skip header in this case. - */ - spl_image->load_addr = image_get_load(header); - spl_image->entry_point = image_get_ep(header); - spl_image->size = image_get_data_size(header); - } else { - spl_image->entry_point = image_get_ep(header); - /* Load including the header */ - spl_image->load_addr = image_get_load(header) - - header_size; - spl_image->size = image_get_data_size(header) + - header_size; - } -#ifdef CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK - /* store uImage data length and CRC to check later */ - spl_image->dcrc_data = image_get_load(header); - spl_image->dcrc_length = image_get_data_size(header); - spl_image->dcrc = image_get_dcrc(header); -#endif + int ret; - spl_image->os = image_get_os(header); - spl_image->name = image_get_name(header); - debug(SPL_TPL_PROMPT - "payload image: %32s load addr: 0x%lx size: %d\n", - spl_image->name, spl_image->load_addr, spl_image->size); -#else - /* LEGACY image not supported */ - debug("Legacy boot image support not enabled, proceeding to other boot methods\n"); - return -EINVAL; -#endif + ret = spl_parse_legacy_header(spl_image, header); + if (ret) + return ret; } else { #ifdef CONFIG_SPL_PANIC_ON_RAW_IMAGE /* diff --git a/common/spl/spl_legacy.c b/common/spl/spl_legacy.c new file mode 100644 index 00000000000..29d3ec70734 --- /dev/null +++ b/common/spl/spl_legacy.c @@ -0,0 +1,131 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020 Stefan Roese <sr@denx.de> + */ + +#include <common.h> +#include <malloc.h> +#include <spl.h> + +#include <lzma/LzmaTypes.h> +#include <lzma/LzmaDec.h> +#include <lzma/LzmaTools.h> + +#define LZMA_LEN (1 << 20) + +int spl_parse_legacy_header(struct spl_image_info *spl_image, + const struct image_header *header) +{ + u32 header_size = sizeof(struct image_header); + + /* check uImage header CRC */ + if (IS_ENABLED(CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK) && + !image_check_hcrc(header)) { + puts("SPL: Image header CRC check failed!\n"); + return -EINVAL; + } + + if (spl_image->flags & SPL_COPY_PAYLOAD_ONLY) { + /* + * On some system (e.g. powerpc), the load-address and + * entry-point is located at address 0. We can't load + * to 0-0x40. So skip header in this case. + */ + spl_image->load_addr = image_get_load(header); + spl_image->entry_point = image_get_ep(header); + spl_image->size = image_get_data_size(header); + } else { + spl_image->entry_point = image_get_ep(header); + /* Load including the header */ + spl_image->load_addr = image_get_load(header) - + header_size; + spl_image->size = image_get_data_size(header) + + header_size; + } + +#ifdef CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK + /* store uImage data length and CRC to check later */ + spl_image->dcrc_data = image_get_load(header); + spl_image->dcrc_length = image_get_data_size(header); + spl_image->dcrc = image_get_dcrc(header); +#endif + + spl_image->os = image_get_os(header); + spl_image->name = image_get_name(header); + debug(SPL_TPL_PROMPT + "payload image: %32s load addr: 0x%lx size: %d\n", + spl_image->name, spl_image->load_addr, spl_image->size); + + return 0; +} + +/* + * This function is added explicitly to avoid code size increase, when + * no compression method is enabled. The compiler will optimize the + * following switch/case statement in spl_load_legacy_img() away due to + * Dead Code Elimination. + */ +static inline int spl_image_get_comp(const struct image_header *hdr) +{ + if (IS_ENABLED(CONFIG_SPL_LZMA)) + return image_get_comp(hdr); + + return IH_COMP_NONE; +} + +int spl_load_legacy_img(struct spl_image_info *spl_image, + struct spl_load_info *load, ulong header) +{ + __maybe_unused SizeT lzma_len; + __maybe_unused void *src; + struct image_header hdr; + ulong dataptr; + int ret; + + /* Read header into local struct */ + load->read(load, header, sizeof(hdr), &hdr); + + ret = spl_parse_image_header(spl_image, &hdr); + if (ret) + return ret; + + dataptr = header + sizeof(hdr); + + /* Read image */ + switch (spl_image_get_comp(&hdr)) { + case IH_COMP_NONE: + load->read(load, dataptr, spl_image->size, + (void *)(unsigned long)spl_image->load_addr); + break; + + case IH_COMP_LZMA: + lzma_len = LZMA_LEN; + + debug("LZMA: Decompressing %08lx to %08lx\n", + dataptr, spl_image->load_addr); + src = malloc(spl_image->size); + if (!src) { + printf("Unable to allocate %d bytes for LZMA\n", + spl_image->size); + return -ENOMEM; + } + + load->read(load, dataptr, spl_image->size, src); + ret = lzmaBuffToBuffDecompress((void *)spl_image->load_addr, + &lzma_len, src, spl_image->size); + if (ret) { + printf("LZMA decompression error: %d\n", ret); + return ret; + } + + spl_image->size = lzma_len; + break; + + default: + debug("Compression method %s is not supported\n", + genimg_get_comp_short_name(image_get_comp(&hdr))); + return -EINVAL; + } + + return 0; +} diff --git a/common/spl/spl_nor.c b/common/spl/spl_nor.c index b1e79b9ded6..3f03ffe6a33 100644 --- a/common/spl/spl_nor.c +++ b/common/spl/spl_nor.c @@ -24,7 +24,6 @@ unsigned long __weak spl_nor_get_uboot_base(void) static int spl_nor_load_image(struct spl_image_info *spl_image, struct spl_boot_device *bootdev) { - int ret; __maybe_unused const struct image_header *header; __maybe_unused struct spl_load_info load; @@ -43,6 +42,8 @@ static int spl_nor_load_image(struct spl_image_info *spl_image, header = (const struct image_header *)CONFIG_SYS_OS_BASE; #ifdef CONFIG_SPL_LOAD_FIT if (image_get_magic(header) == FDT_MAGIC) { + int ret; + debug("Found FIT\n"); load.bl_len = 1; load.read = spl_nor_load_read; @@ -61,6 +62,7 @@ static int spl_nor_load_image(struct spl_image_info *spl_image, #endif if (image_get_os(header) == IH_OS_LINUX) { /* happy - was a Linux */ + int ret; ret = spl_parse_image_header(spl_image, header); if (ret) @@ -93,11 +95,9 @@ static int spl_nor_load_image(struct spl_image_info *spl_image, debug("Found FIT format U-Boot\n"); load.bl_len = 1; load.read = spl_nor_load_read; - ret = spl_load_simple_fit(spl_image, &load, - spl_nor_get_uboot_base(), - (void *)header); - - return ret; + return spl_load_simple_fit(spl_image, &load, + spl_nor_get_uboot_base(), + (void *)header); } #endif if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER)) { @@ -107,14 +107,13 @@ static int spl_nor_load_image(struct spl_image_info *spl_image, spl_nor_get_uboot_base()); } - ret = spl_parse_image_header(spl_image, - (const struct image_header *)spl_nor_get_uboot_base()); - if (ret) - return ret; - - memcpy((void *)(unsigned long)spl_image->load_addr, - (void *)(spl_nor_get_uboot_base() + sizeof(struct image_header)), - spl_image->size); + /* Legacy image handling */ + if (IS_ENABLED(CONFIG_SPL_LEGACY_IMAGE_SUPPORT)) { + load.bl_len = 1; + load.read = spl_nor_load_read; + return spl_load_legacy_img(spl_image, &load, + spl_nor_get_uboot_base()); + } return 0; } diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig index bb68698fd69..e1b66774e4f 100644 --- a/configs/A13-OLinuXino_defconfig +++ b/configs/A13-OLinuXino_defconfig @@ -17,7 +17,6 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_SPL_I2C_SUPPORT=y CONFIG_CMD_DFU=y CONFIG_CMD_USB_MASS_STORAGE=y -# CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino" CONFIG_DFU_RAM=y CONFIG_FASTBOOT_CMD_OEM_FORMAT=y diff --git a/configs/A20-OLinuXino-Lime2-eMMC_defconfig b/configs/A20-OLinuXino-Lime2-eMMC_defconfig index 40b3883971b..3e0a53fec80 100644 --- a/configs/A20-OLinuXino-Lime2-eMMC_defconfig +++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig @@ -15,11 +15,11 @@ CONFIG_AHCI=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_CMD_DFU=y CONFIG_CMD_USB_MASS_STORAGE=y -# CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2-emmc" CONFIG_SCSI_AHCI=y CONFIG_DFU_RAM=y CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y CONFIG_MII=y diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig index 2b082cab595..6935fc60128 100644 --- a/configs/A20-OLinuXino-Lime2_defconfig +++ b/configs/A20-OLinuXino-Lime2_defconfig @@ -13,11 +13,12 @@ CONFIG_AHCI=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_CMD_DFU=y CONFIG_CMD_USB_MASS_STORAGE=y -# CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2" CONFIG_SCSI_AHCI=y CONFIG_DFU_RAM=y CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_PHY_REALTEK=y +CONFIG_RTL8211X_PHY_FORCE_MASTER=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y CONFIG_MII=y diff --git a/configs/A20-OLinuXino-Lime_defconfig b/configs/A20-OLinuXino-Lime_defconfig index 975df4e7783..950c94813a2 100644 --- a/configs/A20-OLinuXino-Lime_defconfig +++ b/configs/A20-OLinuXino-Lime_defconfig @@ -11,6 +11,7 @@ CONFIG_AHCI=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime" CONFIG_SCSI_AHCI=y +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y diff --git a/configs/A20-OLinuXino_MICRO-eMMC_defconfig b/configs/A20-OLinuXino_MICRO-eMMC_defconfig index 0ccb609a22f..3317aceef53 100644 --- a/configs/A20-OLinuXino_MICRO-eMMC_defconfig +++ b/configs/A20-OLinuXino_MICRO-eMMC_defconfig @@ -13,6 +13,7 @@ CONFIG_AHCI=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-micro-emmc" CONFIG_SCSI_AHCI=y +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y diff --git a/configs/A20-OLinuXino_MICRO_defconfig b/configs/A20-OLinuXino_MICRO_defconfig index 0a68fd9e6a8..d5bb51ff26c 100644 --- a/configs/A20-OLinuXino_MICRO_defconfig +++ b/configs/A20-OLinuXino_MICRO_defconfig @@ -14,6 +14,7 @@ CONFIG_AHCI=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-micro" CONFIG_SCSI_AHCI=y +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y diff --git a/configs/A20-Olimex-SOM-EVB_defconfig b/configs/A20-Olimex-SOM-EVB_defconfig index 5b5ed3bb0a9..56f6ad82755 100644 --- a/configs/A20-Olimex-SOM-EVB_defconfig +++ b/configs/A20-Olimex-SOM-EVB_defconfig @@ -15,6 +15,8 @@ CONFIG_AHCI=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som-evb" CONFIG_SCSI_AHCI=y +CONFIG_PHY_REALTEK=y +CONFIG_RTL8211X_PHY_FORCE_MASTER=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y CONFIG_MII=y diff --git a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig index ee3b752ec33..005c152e0fb 100644 --- a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig +++ b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig @@ -13,13 +13,13 @@ CONFIG_GMAC_TX_DELAY=4 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som204-evb-emmc" CONFIG_SCSI_AHCI=y CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_PHY_ADDR=3 CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y CONFIG_MII=y diff --git a/configs/A20-Olimex-SOM204-EVB_defconfig b/configs/A20-Olimex-SOM204-EVB_defconfig index 0272911ecfe..b699af5e195 100644 --- a/configs/A20-Olimex-SOM204-EVB_defconfig +++ b/configs/A20-Olimex-SOM204-EVB_defconfig @@ -12,13 +12,13 @@ CONFIG_GMAC_TX_DELAY=4 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y -# CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som204-evb" CONFIG_SCSI_AHCI=y CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_PHY_ADDR=3 CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y CONFIG_MII=y diff --git a/configs/B4420QDS_NAND_defconfig b/configs/B4420QDS_NAND_defconfig index aeb22f1b77c..6fcb51a1cd4 100644 --- a/configs/B4420QDS_NAND_defconfig +++ b/configs/B4420QDS_NAND_defconfig @@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x140000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_B4420QDS=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -53,6 +53,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/B4420QDS_SPIFLASH_defconfig b/configs/B4420QDS_SPIFLASH_defconfig index 07450076afa..5dc72cb3f2a 100644 --- a/configs/B4420QDS_SPIFLASH_defconfig +++ b/configs/B4420QDS_SPIFLASH_defconfig @@ -1,8 +1,8 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xFFF40000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_MPC85xx=y CONFIG_TARGET_B4420QDS=y CONFIG_FIT=y @@ -39,6 +39,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/B4420QDS_defconfig b/configs/B4420QDS_defconfig index c982dd6f4ef..5f9a88adfa9 100644 --- a/configs/B4420QDS_defconfig +++ b/configs/B4420QDS_defconfig @@ -37,6 +37,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/B4860QDS_NAND_defconfig b/configs/B4860QDS_NAND_defconfig index b26d4588980..0874acd83ec 100644 --- a/configs/B4860QDS_NAND_defconfig +++ b/configs/B4860QDS_NAND_defconfig @@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x140000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_B4860QDS=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -53,6 +53,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/B4860QDS_SECURE_BOOT_defconfig b/configs/B4860QDS_SECURE_BOOT_defconfig index 9ead606eaca..4d7bf5dc398 100644 --- a/configs/B4860QDS_SECURE_BOOT_defconfig +++ b/configs/B4860QDS_SECURE_BOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_B4860QDS=y # CONFIG_SYS_MALLOC_F is not set @@ -37,6 +37,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/B4860QDS_SPIFLASH_defconfig b/configs/B4860QDS_SPIFLASH_defconfig index 1d4fac84a0b..566076543f7 100644 --- a/configs/B4860QDS_SPIFLASH_defconfig +++ b/configs/B4860QDS_SPIFLASH_defconfig @@ -1,8 +1,8 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xFFF40000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_MPC85xx=y CONFIG_TARGET_B4860QDS=y CONFIG_FIT=y @@ -39,6 +39,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig b/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig index 11c59c8a321..58195adcbc1 100644 --- a/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig @@ -33,6 +33,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/B4860QDS_defconfig b/configs/B4860QDS_defconfig index aa11996ddb8..68ff6ed953c 100644 --- a/configs/B4860QDS_defconfig +++ b/configs/B4860QDS_defconfig @@ -37,6 +37,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig index 49cee6dcaa3..64f6dadc22c 100644 --- a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig +++ b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig @@ -4,9 +4,9 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xE0000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFFE000 CONFIG_MPC85xx=y CONFIG_TARGET_BSC9131RDB=y -CONFIG_SPL_TEXT_BASE=0xFFFFE000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -43,7 +43,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y # CONFIG_PCI is not set diff --git a/configs/BSC9131RDB_NAND_defconfig b/configs/BSC9131RDB_NAND_defconfig index f212dc8d6c4..eda1ac428c1 100644 --- a/configs/BSC9131RDB_NAND_defconfig +++ b/configs/BSC9131RDB_NAND_defconfig @@ -4,9 +4,9 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xE0000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFFE000 CONFIG_MPC85xx=y CONFIG_TARGET_BSC9131RDB=y -CONFIG_SPL_TEXT_BASE=0xFFFFE000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -42,7 +42,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y # CONFIG_PCI is not set diff --git a/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig b/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig index 958b831051b..8ac33150f89 100644 --- a/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig +++ b/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig @@ -1,8 +1,8 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_MPC85xx=y CONFIG_TARGET_BSC9131RDB=y CONFIG_FIT=y @@ -35,7 +35,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y # CONFIG_PCI is not set diff --git a/configs/BSC9131RDB_SPIFLASH_defconfig b/configs/BSC9131RDB_SPIFLASH_defconfig index 81fca1d5483..10d866661bf 100644 --- a/configs/BSC9131RDB_SPIFLASH_defconfig +++ b/configs/BSC9131RDB_SPIFLASH_defconfig @@ -1,8 +1,8 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_MPC85xx=y CONFIG_TARGET_BSC9131RDB=y CONFIG_FIT=y @@ -35,7 +35,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y # CONFIG_PCI is not set diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig index 48d3b18dbd7..83300b204a7 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x20000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y # CONFIG_SYS_MALLOC_F is not set @@ -41,7 +41,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig index c3a655b7809..5f85370a0a0 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig @@ -4,9 +4,9 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xE0000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFFE000 CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y -CONFIG_SPL_TEXT_BASE=0xFFFFE000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -50,7 +50,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig index 9884c6c727e..646158bb779 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x20000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y # CONFIG_SYS_MALLOC_F is not set @@ -41,7 +41,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig index c92dd73b0f1..82f37fbf1c7 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig @@ -4,9 +4,9 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xE0000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFFE000 CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y -CONFIG_SPL_TEXT_BASE=0xFFFFE000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -50,7 +50,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig index 31ddd01c5a2..25ed8dc6a7e 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x8FF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y # CONFIG_SYS_MALLOC_F is not set @@ -40,7 +40,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_defconfig index 9dcc015f2f8..e0e441de440 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK100_defconfig @@ -41,7 +41,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig index 114250ca218..f7181d69d2a 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x8FF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y # CONFIG_SYS_MALLOC_F is not set @@ -40,7 +40,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_defconfig index 718674316db..0ea77dc3a9d 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK133_defconfig @@ -41,7 +41,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig index 0909ce4a010..30bdc5d3d29 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y # CONFIG_SYS_MALLOC_F is not set @@ -41,7 +41,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig index 8d5e9f004e5..0e93c0d1c29 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig @@ -41,7 +41,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig index 0086febde7f..ca119d0625f 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y # CONFIG_SYS_MALLOC_F is not set @@ -41,7 +41,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig index 0766e0f3df3..288d4cf8830 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig @@ -41,7 +41,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig index ebc71e43c4b..e30dd9be903 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y # CONFIG_SYS_MALLOC_F is not set @@ -41,7 +41,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig index d12d6633b29..8f4d4b8fbb3 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig @@ -1,8 +1,8 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_FIT=y @@ -42,7 +42,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig index 64c6acf1f29..80c51aa705c 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y # CONFIG_SYS_MALLOC_F is not set @@ -41,7 +41,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig index a62a3812abf..fb16caad9a9 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig @@ -1,8 +1,8 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_FIT=y @@ -42,7 +42,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig index b309171d041..3b5081789d7 100644 --- a/configs/Bananapi_defconfig +++ b/configs/Bananapi_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapi" CONFIG_NETCONSOLE=y CONFIG_SCSI_AHCI=y +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y CONFIG_MII=y diff --git a/configs/Bananapi_m2m_defconfig b/configs/Bananapi_m2m_defconfig index 2649c7e84a0..8806fe66c21 100644 --- a/configs/Bananapi_m2m_defconfig +++ b/configs/Bananapi_m2m_defconfig @@ -9,7 +9,6 @@ CONFIG_MMC0_CD_PIN="PB4" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB0_ID_DET="PH8" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -# CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-bananapi-m2m" CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/Bananapro_defconfig b/configs/Bananapro_defconfig index 0cec760ffa2..834d3e4e60c 100644 --- a/configs/Bananapro_defconfig +++ b/configs/Bananapro_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapro" CONFIG_NETCONSOLE=y CONFIG_SCSI_AHCI=y +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y CONFIG_MII=y diff --git a/configs/C29XPCIE_NAND_defconfig b/configs/C29XPCIE_NAND_defconfig index f850bdf4d80..cdcf50eee80 100644 --- a/configs/C29XPCIE_NAND_defconfig +++ b/configs/C29XPCIE_NAND_defconfig @@ -7,9 +7,9 @@ CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_MPC85xx=y CONFIG_TARGET_C29XPCIE=y -CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -51,7 +51,15 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/C29XPCIE_NOR_SECBOOT_defconfig b/configs/C29XPCIE_NOR_SECBOOT_defconfig index ca3065f3df6..e43c72860a0 100644 --- a/configs/C29XPCIE_NOR_SECBOOT_defconfig +++ b/configs/C29XPCIE_NOR_SECBOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_C29XPCIE=y # CONFIG_SYS_MALLOC_F is not set @@ -33,7 +33,15 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig index 3e5d26866d8..b7eb77e2a00 100644 --- a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig +++ b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_C29XPCIE=y # CONFIG_SYS_MALLOC_F is not set @@ -35,7 +35,15 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/C29XPCIE_SPIFLASH_defconfig b/configs/C29XPCIE_SPIFLASH_defconfig index 883c33b0e9d..9bfdcd0461b 100644 --- a/configs/C29XPCIE_SPIFLASH_defconfig +++ b/configs/C29XPCIE_SPIFLASH_defconfig @@ -1,8 +1,8 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_MPC85xx=y CONFIG_TARGET_C29XPCIE=y CONFIG_FIT=y @@ -36,7 +36,15 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/C29XPCIE_defconfig b/configs/C29XPCIE_defconfig index b2781b832cc..3e7f19692a8 100644 --- a/configs/C29XPCIE_defconfig +++ b/configs/C29XPCIE_defconfig @@ -34,7 +34,15 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/CSQ_CS908_defconfig b/configs/CSQ_CS908_defconfig index f9026a422df..d9223a03246 100644 --- a/configs/CSQ_CS908_defconfig +++ b/configs/CSQ_CS908_defconfig @@ -7,6 +7,7 @@ CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-cs908" +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y diff --git a/configs/Colombus_defconfig b/configs/Colombus_defconfig index f70f92e0a62..71f62b51180 100644 --- a/configs/Colombus_defconfig +++ b/configs/Colombus_defconfig @@ -17,6 +17,7 @@ CONFIG_VIDEO_LCD_PANEL_I2C_SCL="PA24" CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-colombus" +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y CONFIG_MII=y diff --git a/configs/Cubieboard2_defconfig b/configs/Cubieboard2_defconfig index 0c7aafd25af..aa7a9d48bfc 100644 --- a/configs/Cubieboard2_defconfig +++ b/configs/Cubieboard2_defconfig @@ -10,6 +10,7 @@ CONFIG_AHCI=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubieboard2" CONFIG_SCSI_AHCI=y +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig index 32c44ff382a..c0d75ba8bc2 100644 --- a/configs/Cubietruck_defconfig +++ b/configs/Cubietruck_defconfig @@ -15,11 +15,11 @@ CONFIG_AHCI=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_CMD_DFU=y CONFIG_CMD_USB_MASS_STORAGE=y -# CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubietruck" CONFIG_SCSI_AHCI=y CONFIG_DFU_RAM=y CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y CONFIG_MII=y diff --git a/configs/Hummingbird_A31_defconfig b/configs/Hummingbird_A31_defconfig index 15984ec5a3c..6798698fe99 100644 --- a/configs/Hummingbird_A31_defconfig +++ b/configs/Hummingbird_A31_defconfig @@ -9,6 +9,7 @@ CONFIG_VIDEO_VGA_VIA_LCD=y CONFIG_VIDEO_VGA_EXTERNAL_DAC_EN="PH25" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-hummingbird" +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y CONFIG_MII=y diff --git a/configs/Itead_Ibox_A20_defconfig b/configs/Itead_Ibox_A20_defconfig index 9ddfb6f5e2a..a232bc32a72 100644 --- a/configs/Itead_Ibox_A20_defconfig +++ b/configs/Itead_Ibox_A20_defconfig @@ -10,6 +10,7 @@ CONFIG_AHCI=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-itead-ibox" CONFIG_SCSI_AHCI=y +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y diff --git a/configs/Lamobo_R1_defconfig b/configs/Lamobo_R1_defconfig index c3cb3654bb2..34db56f79bc 100644 --- a/configs/Lamobo_R1_defconfig +++ b/configs/Lamobo_R1_defconfig @@ -14,6 +14,7 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-lamobo-r1" CONFIG_SCSI_AHCI=y CONFIG_B53_SWITCH=y CONFIG_B53_PHY_PORTS=0x1f +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y CONFIG_MII=y diff --git a/configs/Linksprite_pcDuino3_Nano_defconfig b/configs/Linksprite_pcDuino3_Nano_defconfig index 7377debc9be..72690e29502 100644 --- a/configs/Linksprite_pcDuino3_Nano_defconfig +++ b/configs/Linksprite_pcDuino3_Nano_defconfig @@ -12,6 +12,7 @@ CONFIG_AHCI=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3-nano" CONFIG_SCSI_AHCI=y +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y CONFIG_MII=y diff --git a/configs/Linksprite_pcDuino3_defconfig b/configs/Linksprite_pcDuino3_defconfig index ad78152a045..172a2e8e433 100644 --- a/configs/Linksprite_pcDuino3_defconfig +++ b/configs/Linksprite_pcDuino3_defconfig @@ -10,6 +10,7 @@ CONFIG_AHCI=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3" CONFIG_SCSI_AHCI=y +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y diff --git a/configs/M52277EVB_stmicro_defconfig b/configs/M52277EVB_stmicro_defconfig index 027e6f78362..1a89934c25f 100644 --- a/configs/M52277EVB_stmicro_defconfig +++ b/configs/M52277EVB_stmicro_defconfig @@ -1,8 +1,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x43E00000 CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x30000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_TARGET_M52277EVB=y CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_STMICRO_BOOT" CONFIG_BOOTDELAY=3 diff --git a/configs/M54418TWR_defconfig b/configs/M54418TWR_defconfig index 249718d452d..4cecb5a15b5 100644 --- a/configs/M54418TWR_defconfig +++ b/configs/M54418TWR_defconfig @@ -1,8 +1,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x47E00000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_TARGET_M54418TWR=y CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=50000000" CONFIG_USE_BOOTARGS=y diff --git a/configs/M54418TWR_serial_mii_defconfig b/configs/M54418TWR_serial_mii_defconfig index 5085bb3fbcb..014cc257922 100644 --- a/configs/M54418TWR_serial_mii_defconfig +++ b/configs/M54418TWR_serial_mii_defconfig @@ -1,8 +1,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x47E00000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_TARGET_M54418TWR=y CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=25000000" CONFIG_USE_BOOTARGS=y diff --git a/configs/M54418TWR_serial_rmii_defconfig b/configs/M54418TWR_serial_rmii_defconfig index 42201cc21ca..18e7fe93176 100644 --- a/configs/M54418TWR_serial_rmii_defconfig +++ b/configs/M54418TWR_serial_rmii_defconfig @@ -1,8 +1,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x47E00000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_TARGET_M54418TWR=y CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=50000000" CONFIG_USE_BOOTARGS=y diff --git a/configs/M54451EVB_stmicro_defconfig b/configs/M54451EVB_stmicro_defconfig index 4bf3fc12b0c..f9aa2d0d5d9 100644 --- a/configs/M54451EVB_stmicro_defconfig +++ b/configs/M54451EVB_stmicro_defconfig @@ -1,8 +1,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x47E00000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x20000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_TARGET_M54451EVB=y CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_STMICRO_BOOT,SYS_INPUT_CLKSRC=24000000" CONFIG_BOOTDELAY=1 diff --git a/configs/M54455EVB_stm33_defconfig b/configs/M54455EVB_stm33_defconfig index 55d4bc31de9..83fdaf79dea 100644 --- a/configs/M54455EVB_stm33_defconfig +++ b/configs/M54455EVB_stm33_defconfig @@ -1,8 +1,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x4FE00000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x30000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_TARGET_M54455EVB=y CONFIG_SYS_EXTRA_OPTIONS="SYS_STMICRO_BOOT,CF_SBF,SYS_INPUT_CLKSRC=33333333" CONFIG_BOOTDELAY=1 diff --git a/configs/MPC8308RDB_defconfig b/configs/MPC8308RDB_defconfig index dc9ebb8f5cc..da4154381b1 100644 --- a/configs/MPC8308RDB_defconfig +++ b/configs/MPC8308RDB_defconfig @@ -136,7 +136,15 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/MPC8313ERDB_33_defconfig b/configs/MPC8313ERDB_33_defconfig index 07ebb279e1b..d4db18f7f24 100644 --- a/configs/MPC8313ERDB_33_defconfig +++ b/configs/MPC8313ERDB_33_defconfig @@ -154,7 +154,15 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/MPC8313ERDB_66_defconfig b/configs/MPC8313ERDB_66_defconfig index 432193bfd4f..b381309b7f1 100644 --- a/configs/MPC8313ERDB_66_defconfig +++ b/configs/MPC8313ERDB_66_defconfig @@ -153,7 +153,15 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/MPC8313ERDB_NAND_33_defconfig b/configs/MPC8313ERDB_NAND_33_defconfig index af09f1641d7..30feda24855 100644 --- a/configs/MPC8313ERDB_NAND_33_defconfig +++ b/configs/MPC8313ERDB_NAND_33_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_SYS_CLK_FREQ=33333333 +CONFIG_SPL_TEXT_BASE=0xFFF00000 CONFIG_MPC83xx=y CONFIG_HIGH_BATS=y CONFIG_TARGET_MPC8313ERDB_NAND=y @@ -128,7 +129,6 @@ CONFIG_ACR_PIPE_DEP_4=y CONFIG_ACR_RPTCNT_4=y CONFIG_LCRR_EADC_1=y CONFIG_LCRR_CLKDIV_4=y -CONFIG_SPL_TEXT_BASE=0xFFF00000 CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ" @@ -163,7 +163,15 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/MPC8313ERDB_NAND_66_defconfig b/configs/MPC8313ERDB_NAND_66_defconfig index f2d8a653ac3..f7c83fbf62a 100644 --- a/configs/MPC8313ERDB_NAND_66_defconfig +++ b/configs/MPC8313ERDB_NAND_66_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_SYS_CLK_FREQ=66666667 +CONFIG_SPL_TEXT_BASE=0xFFF00000 CONFIG_MPC83xx=y CONFIG_HIGH_BATS=y CONFIG_TARGET_MPC8313ERDB_NAND=y @@ -127,7 +128,6 @@ CONFIG_ACR_PIPE_DEP_4=y CONFIG_ACR_RPTCNT_4=y CONFIG_LCRR_EADC_1=y CONFIG_LCRR_CLKDIV_4=y -CONFIG_SPL_TEXT_BASE=0xFFF00000 CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ" @@ -162,7 +162,15 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/MPC8315ERDB_defconfig b/configs/MPC8315ERDB_defconfig index da6bc1dfa3b..bbb79dff2ed 100644 --- a/configs/MPC8315ERDB_defconfig +++ b/configs/MPC8315ERDB_defconfig @@ -138,7 +138,15 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/MPC8349EMDS_PCI64_defconfig b/configs/MPC8349EMDS_PCI64_defconfig index fd4e6ece438..a3f3a40e58f 100644 --- a/configs/MPC8349EMDS_PCI64_defconfig +++ b/configs/MPC8349EMDS_PCI64_defconfig @@ -103,6 +103,14 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_TSEC_ENET=y # CONFIG_PCI is not set CONFIG_SYS_NS16550=y diff --git a/configs/MPC8349EMDS_SDRAM_defconfig b/configs/MPC8349EMDS_SDRAM_defconfig index 1a618930c8b..59611af4305 100644 --- a/configs/MPC8349EMDS_SDRAM_defconfig +++ b/configs/MPC8349EMDS_SDRAM_defconfig @@ -112,7 +112,15 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_TSEC_ENET=y # CONFIG_PCI is not set CONFIG_SYS_NS16550=y diff --git a/configs/MPC8349EMDS_SLAVE_defconfig b/configs/MPC8349EMDS_SLAVE_defconfig index 1351d962131..4b28bf848f7 100644 --- a/configs/MPC8349EMDS_SLAVE_defconfig +++ b/configs/MPC8349EMDS_SLAVE_defconfig @@ -103,6 +103,14 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_TSEC_ENET=y # CONFIG_PCI is not set CONFIG_SYS_NS16550=y diff --git a/configs/MPC8349EMDS_defconfig b/configs/MPC8349EMDS_defconfig index 5a8692fceb5..2860c538251 100644 --- a/configs/MPC8349EMDS_defconfig +++ b/configs/MPC8349EMDS_defconfig @@ -104,7 +104,15 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_TSEC_ENET=y # CONFIG_PCI is not set CONFIG_SYS_NS16550=y diff --git a/configs/MPC8349ITXGP_defconfig b/configs/MPC8349ITXGP_defconfig index c4d41c63a89..6124458e59d 100644 --- a/configs/MPC8349ITXGP_defconfig +++ b/configs/MPC8349ITXGP_defconfig @@ -172,7 +172,15 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/MPC8349ITX_LOWBOOT_defconfig b/configs/MPC8349ITX_LOWBOOT_defconfig index d5e253b0a65..a1d2a89e4aa 100644 --- a/configs/MPC8349ITX_LOWBOOT_defconfig +++ b/configs/MPC8349ITX_LOWBOOT_defconfig @@ -177,7 +177,15 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/MPC8349ITX_defconfig b/configs/MPC8349ITX_defconfig index 0517fc6ad40..1147fad91d9 100644 --- a/configs/MPC8349ITX_defconfig +++ b/configs/MPC8349ITX_defconfig @@ -176,7 +176,15 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/MPC837XEMDS_HOST_defconfig b/configs/MPC837XEMDS_HOST_defconfig index 6aa991a11d8..89e619fddf4 100644 --- a/configs/MPC837XEMDS_HOST_defconfig +++ b/configs/MPC837XEMDS_HOST_defconfig @@ -171,7 +171,15 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/MPC837XEMDS_SLAVE_defconfig b/configs/MPC837XEMDS_SLAVE_defconfig index 1cce99d9152..f9a3910b0ca 100644 --- a/configs/MPC837XEMDS_SLAVE_defconfig +++ b/configs/MPC837XEMDS_SLAVE_defconfig @@ -128,6 +128,14 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_TSEC_ENET=y # CONFIG_PCI is not set CONFIG_SYS_NS16550=y diff --git a/configs/MPC837XEMDS_defconfig b/configs/MPC837XEMDS_defconfig index ebba5a2fbba..11b185d2275 100644 --- a/configs/MPC837XEMDS_defconfig +++ b/configs/MPC837XEMDS_defconfig @@ -149,7 +149,15 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y # CONFIG_PCI is not set diff --git a/configs/MPC837XERDB_SLAVE_defconfig b/configs/MPC837XERDB_SLAVE_defconfig index 39c50960bb2..87fe4fcb392 100644 --- a/configs/MPC837XERDB_SLAVE_defconfig +++ b/configs/MPC837XERDB_SLAVE_defconfig @@ -125,6 +125,14 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_USB=y diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig index fd8335ee4ef..0b4036072fe 100644 --- a/configs/MPC837XERDB_defconfig +++ b/configs/MPC837XERDB_defconfig @@ -168,7 +168,15 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_USB=y diff --git a/configs/MPC8536DS_36BIT_defconfig b/configs/MPC8536DS_36BIT_defconfig index a08e0967afb..e60890e2d0e 100644 --- a/configs/MPC8536DS_36BIT_defconfig +++ b/configs/MPC8536DS_36BIT_defconfig @@ -39,7 +39,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/MPC8536DS_SDCARD_defconfig b/configs/MPC8536DS_SDCARD_defconfig index 1795a25f081..9f653661f43 100644 --- a/configs/MPC8536DS_SDCARD_defconfig +++ b/configs/MPC8536DS_SDCARD_defconfig @@ -38,7 +38,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/MPC8536DS_SPIFLASH_defconfig b/configs/MPC8536DS_SPIFLASH_defconfig index eafd3546a55..866d719564d 100644 --- a/configs/MPC8536DS_SPIFLASH_defconfig +++ b/configs/MPC8536DS_SPIFLASH_defconfig @@ -1,8 +1,8 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xf8f40000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0xF0000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_MPC8536DS=y @@ -39,7 +39,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/MPC8536DS_defconfig b/configs/MPC8536DS_defconfig index 8756310cb56..9366e7a7579 100644 --- a/configs/MPC8536DS_defconfig +++ b/configs/MPC8536DS_defconfig @@ -38,7 +38,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/MPC8541CDS_defconfig b/configs/MPC8541CDS_defconfig index 7017f7f5c87..5c25c4fcd5f 100644 --- a/configs/MPC8541CDS_defconfig +++ b/configs/MPC8541CDS_defconfig @@ -23,7 +23,15 @@ CONFIG_ENV_ADDR=0xFFFC0000 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 diff --git a/configs/MPC8541CDS_legacy_defconfig b/configs/MPC8541CDS_legacy_defconfig index a62d3663b51..5b5abbe6f43 100644 --- a/configs/MPC8541CDS_legacy_defconfig +++ b/configs/MPC8541CDS_legacy_defconfig @@ -24,7 +24,15 @@ CONFIG_ENV_ADDR=0xFFFC0000 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 diff --git a/configs/MPC8544DS_defconfig b/configs/MPC8544DS_defconfig index fb1ed08adb7..c2c70d3444a 100644 --- a/configs/MPC8544DS_defconfig +++ b/configs/MPC8544DS_defconfig @@ -28,7 +28,15 @@ CONFIG_SCSI_AHCI=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig index a8700100e16..22034409609 100644 --- a/configs/MPC8548CDS_36BIT_defconfig +++ b/configs/MPC8548CDS_36BIT_defconfig @@ -27,7 +27,15 @@ CONFIG_DM=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig index 42c31d42378..b4ac4f1082a 100644 --- a/configs/MPC8548CDS_defconfig +++ b/configs/MPC8548CDS_defconfig @@ -26,7 +26,15 @@ CONFIG_DM=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig index 263f24c1796..9b6f8be9cfe 100644 --- a/configs/MPC8548CDS_legacy_defconfig +++ b/configs/MPC8548CDS_legacy_defconfig @@ -26,7 +26,15 @@ CONFIG_DM=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/MPC8555CDS_defconfig b/configs/MPC8555CDS_defconfig index b6391751076..dcf7091055a 100644 --- a/configs/MPC8555CDS_defconfig +++ b/configs/MPC8555CDS_defconfig @@ -23,7 +23,15 @@ CONFIG_ENV_ADDR=0xFFFC0000 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 diff --git a/configs/MPC8555CDS_legacy_defconfig b/configs/MPC8555CDS_legacy_defconfig index 51710bbdbe7..7e369f1b4c2 100644 --- a/configs/MPC8555CDS_legacy_defconfig +++ b/configs/MPC8555CDS_legacy_defconfig @@ -24,7 +24,15 @@ CONFIG_ENV_ADDR=0xFFFC0000 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 diff --git a/configs/MPC8568MDS_defconfig b/configs/MPC8568MDS_defconfig index 24bc0d582d2..820bd72af4c 100644 --- a/configs/MPC8568MDS_defconfig +++ b/configs/MPC8568MDS_defconfig @@ -25,7 +25,15 @@ CONFIG_ENV_ADDR=0xFFF60000 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_QE=y diff --git a/configs/MPC8572DS_36BIT_defconfig b/configs/MPC8572DS_36BIT_defconfig index bbb49876b13..50912bf245a 100644 --- a/configs/MPC8572DS_36BIT_defconfig +++ b/configs/MPC8572DS_36BIT_defconfig @@ -33,7 +33,15 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/MPC8572DS_defconfig b/configs/MPC8572DS_defconfig index 1a32f25c53a..fea1e281e0e 100644 --- a/configs/MPC8572DS_defconfig +++ b/configs/MPC8572DS_defconfig @@ -32,7 +32,15 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/MPC8641HPCN_36BIT_defconfig b/configs/MPC8641HPCN_36BIT_defconfig index 249cddac36d..1e643673ec2 100644 --- a/configs/MPC8641HPCN_36BIT_defconfig +++ b/configs/MPC8641HPCN_36BIT_defconfig @@ -27,7 +27,15 @@ CONFIG_SCSI_AHCI=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/MPC8641HPCN_defconfig b/configs/MPC8641HPCN_defconfig index f87c6169664..7ce7891d142 100644 --- a/configs/MPC8641HPCN_defconfig +++ b/configs/MPC8641HPCN_defconfig @@ -27,7 +27,15 @@ CONFIG_SCSI_AHCI=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/Mele_A1000G_quad_defconfig b/configs/Mele_A1000G_quad_defconfig index babe9f11e58..cd652b33097 100644 --- a/configs/Mele_A1000G_quad_defconfig +++ b/configs/Mele_A1000G_quad_defconfig @@ -8,6 +8,7 @@ CONFIG_USB1_VBUS_PIN="PC27" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mele-a1000g-quad" +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y diff --git a/configs/Mele_I7_defconfig b/configs/Mele_I7_defconfig index 1282d8763ab..bedddf1db16 100644 --- a/configs/Mele_I7_defconfig +++ b/configs/Mele_I7_defconfig @@ -7,6 +7,7 @@ CONFIG_USB1_VBUS_PIN="PC27" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-i7" +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y diff --git a/configs/Mele_M3_defconfig b/configs/Mele_M3_defconfig index 60d15ab05b1..16864633278 100644 --- a/configs/Mele_M3_defconfig +++ b/configs/Mele_M3_defconfig @@ -10,6 +10,7 @@ CONFIG_VIDEO_COMPOSITE=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-m3" +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y diff --git a/configs/Mele_M5_defconfig b/configs/Mele_M5_defconfig index 8900c7a1f12..1c6ab3ae24e 100644 --- a/configs/Mele_M5_defconfig +++ b/configs/Mele_M5_defconfig @@ -11,6 +11,7 @@ CONFIG_AHCI=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-m5" CONFIG_SCSI_AHCI=y +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y diff --git a/configs/Mele_M9_defconfig b/configs/Mele_M9_defconfig index b1b3b7af161..f7bd7fc3004 100644 --- a/configs/Mele_M9_defconfig +++ b/configs/Mele_M9_defconfig @@ -7,6 +7,7 @@ CONFIG_USB1_VBUS_PIN="PC27" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-m9" +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y diff --git a/configs/Orangepi_defconfig b/configs/Orangepi_defconfig index af8c17defb7..32135f3d0f0 100644 --- a/configs/Orangepi_defconfig +++ b/configs/Orangepi_defconfig @@ -14,6 +14,7 @@ CONFIG_AHCI=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi" CONFIG_SCSI_AHCI=y +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y CONFIG_MII=y diff --git a/configs/Orangepi_mini_defconfig b/configs/Orangepi_mini_defconfig index 43ee76fa184..a48939bb34b 100644 --- a/configs/Orangepi_mini_defconfig +++ b/configs/Orangepi_mini_defconfig @@ -16,6 +16,7 @@ CONFIG_AHCI=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi-mini" CONFIG_SCSI_AHCI=y +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y CONFIG_MII=y diff --git a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig index 5269b6e8239..c1044520d7c 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y # CONFIG_SYS_MALLOC_F is not set @@ -39,7 +39,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index 4b2b8c4628e..74294fceee5 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -7,9 +7,9 @@ CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y -CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_PHYS_64BIT=y CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" @@ -58,7 +58,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig index 5e9f9648f0b..723f6ca2bb0 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y # CONFIG_SYS_MALLOC_F is not set @@ -38,7 +38,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index 6f328a57459..d43ad79f2e5 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -39,7 +39,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index 83ad24aea8c..ddb7e604cd9 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y -CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -52,7 +52,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig index a225ddaee67..9987cde9955 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y # CONFIG_SYS_MALLOC_F is not set @@ -40,7 +40,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index 08d88646538..12a073d42ae 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y -CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -54,7 +54,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig index 6ef808054b5..9691fd2bd48 100644 --- a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y # CONFIG_SYS_MALLOC_F is not set @@ -38,7 +38,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index 796e112732f..67cba6a436d 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -7,9 +7,9 @@ CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y -CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -57,7 +57,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig index ba4bcdf98a7..49351264cb3 100644 --- a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y # CONFIG_SYS_MALLOC_F is not set @@ -36,7 +36,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index 73dbb867e22..05ec02451c5 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -38,7 +38,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 947bd226570..95a15f7a18e 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y -CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -51,7 +51,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig index 8f1f8a9b0c9..b31bdff00dd 100644 --- a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y # CONFIG_SYS_MALLOC_F is not set @@ -39,7 +39,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index bd6d1ea702d..a7dd582c868 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y -CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -53,7 +53,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig index bbd2f265084..66bdebbf99e 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y # CONFIG_SYS_MALLOC_F is not set @@ -39,7 +39,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 1461b89f245..6e71c2a48fe 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -7,9 +7,9 @@ CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y -CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_PHYS_64BIT=y CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" @@ -58,7 +58,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig index 31550bb753c..f2e40668ea6 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y # CONFIG_SYS_MALLOC_F is not set @@ -38,7 +38,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index c857c8d7281..79e4117d776 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -39,7 +39,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index f79796a4803..083fe79f7d9 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y -CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -52,7 +52,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig index 4bcb9ced29f..50b5c5f1c5a 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y # CONFIG_SYS_MALLOC_F is not set @@ -40,7 +40,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index c4c3c4486c9..6247d4706f2 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y -CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -54,7 +54,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig index 593e86646b2..17708dee47c 100644 --- a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y # CONFIG_SYS_MALLOC_F is not set @@ -38,7 +38,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 8378eede02d..12c74915ced 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -7,9 +7,9 @@ CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y -CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -57,7 +57,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig index 3be6893ff4f..be455a0c8f4 100644 --- a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y # CONFIG_SYS_MALLOC_F is not set @@ -37,7 +37,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index 764017a907d..943ca96fadf 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -38,7 +38,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index 437858b800d..3548b951109 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y -CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -51,7 +51,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig index 586ed29817f..ce3d7c4d6b3 100644 --- a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y # CONFIG_SYS_MALLOC_F is not set @@ -39,7 +39,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 7f222db0abf..b54cf2b8b64 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y -CONFIG_SPL_TEXT_BASE=0xD0001000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -53,7 +53,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1020MBG-PC_36BIT_SDCARD_defconfig b/configs/P1020MBG-PC_36BIT_SDCARD_defconfig index 2276b48e2ac..91d46e4727f 100644 --- a/configs/P1020MBG-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020MBG-PC_36BIT_SDCARD_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0x0 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020MBG=y -CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -46,7 +46,15 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1020MBG-PC_36BIT_defconfig b/configs/P1020MBG-PC_36BIT_defconfig index 9d0e4c58ad6..7930af3b73f 100644 --- a/configs/P1020MBG-PC_36BIT_defconfig +++ b/configs/P1020MBG-PC_36BIT_defconfig @@ -34,7 +34,15 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1020MBG-PC_SDCARD_defconfig b/configs/P1020MBG-PC_SDCARD_defconfig index 811e11e7e9b..708a4bbfbf3 100644 --- a/configs/P1020MBG-PC_SDCARD_defconfig +++ b/configs/P1020MBG-PC_SDCARD_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0x0 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020MBG=y -CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -45,7 +45,15 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1020MBG-PC_defconfig b/configs/P1020MBG-PC_defconfig index 06d50d00577..4ff3712d0f0 100644 --- a/configs/P1020MBG-PC_defconfig +++ b/configs/P1020MBG-PC_defconfig @@ -33,7 +33,15 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index fadb4461efd..2396d910115 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -6,10 +6,10 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y -CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_PHYS_64BIT=y CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" @@ -61,7 +61,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index f79176e5c4d..745200da514 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0x0 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y -CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -56,7 +56,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index f9f5ab42542..3eadd3d83c9 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y -CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -58,7 +58,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index 6cab654759f..9b7901f5c37 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -45,7 +45,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 723d150ef1f..e99709a2b87 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -6,10 +6,10 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y -CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -60,7 +60,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 0829adec7ce..ef007e5fe4b 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0x0 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y -CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -55,7 +55,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 8d1e989b876..c8b0923cb50 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y -CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -57,7 +57,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index e337cebea4d..1a30c97f7fa 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -44,7 +44,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index e5ee950acf4..e1858e4cac8 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -6,10 +6,10 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y -CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -64,7 +64,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index ba9bea5eeea..e24c89f7266 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0x0 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y -CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -59,7 +59,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index d3a54f71f77..c89201f9788 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y -CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -61,7 +61,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index fffdcc852af..c79d599b609 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -48,7 +48,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1020UTM-PC_36BIT_SDCARD_defconfig b/configs/P1020UTM-PC_36BIT_SDCARD_defconfig index 2dc75933207..4b000056249 100644 --- a/configs/P1020UTM-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020UTM-PC_36BIT_SDCARD_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0x0 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020UTM=y -CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -46,7 +46,15 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1020UTM-PC_36BIT_defconfig b/configs/P1020UTM-PC_36BIT_defconfig index 793ab1535f9..968d3edbcfc 100644 --- a/configs/P1020UTM-PC_36BIT_defconfig +++ b/configs/P1020UTM-PC_36BIT_defconfig @@ -34,7 +34,15 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1020UTM-PC_SDCARD_defconfig b/configs/P1020UTM-PC_SDCARD_defconfig index 2cd958a140b..93302a12b09 100644 --- a/configs/P1020UTM-PC_SDCARD_defconfig +++ b/configs/P1020UTM-PC_SDCARD_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0x0 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020UTM=y -CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -45,7 +45,15 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1020UTM-PC_defconfig b/configs/P1020UTM-PC_defconfig index bd366e953b6..c41ac7bfd47 100644 --- a/configs/P1020UTM-PC_defconfig +++ b/configs/P1020UTM-PC_defconfig @@ -33,7 +33,15 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1021RDB-PC_36BIT_NAND_defconfig b/configs/P1021RDB-PC_36BIT_NAND_defconfig index bd341ff9a22..ba1d836552b 100644 --- a/configs/P1021RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1021RDB-PC_36BIT_NAND_defconfig @@ -6,10 +6,10 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1021RDB=y -CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_PHYS_64BIT=y CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" @@ -62,7 +62,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig index 5e81cfe62db..30b8372a5b2 100644 --- a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0x0 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1021RDB=y -CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -57,7 +57,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig index 9e40031d5e9..37bc209d984 100644 --- a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig @@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1021RDB=y -CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -59,7 +59,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1021RDB-PC_36BIT_defconfig b/configs/P1021RDB-PC_36BIT_defconfig index 28609f37b38..ca1be9c112f 100644 --- a/configs/P1021RDB-PC_36BIT_defconfig +++ b/configs/P1021RDB-PC_36BIT_defconfig @@ -45,7 +45,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1021RDB-PC_NAND_defconfig b/configs/P1021RDB-PC_NAND_defconfig index 4140e0400d6..1b38da48f70 100644 --- a/configs/P1021RDB-PC_NAND_defconfig +++ b/configs/P1021RDB-PC_NAND_defconfig @@ -6,10 +6,10 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1021RDB=y -CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -61,7 +61,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1021RDB-PC_SDCARD_defconfig b/configs/P1021RDB-PC_SDCARD_defconfig index 5231aaec503..242b9eb3c9e 100644 --- a/configs/P1021RDB-PC_SDCARD_defconfig +++ b/configs/P1021RDB-PC_SDCARD_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0x0 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1021RDB=y -CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -56,7 +56,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1021RDB-PC_SPIFLASH_defconfig b/configs/P1021RDB-PC_SPIFLASH_defconfig index e277ab4d85a..6792e3f45a0 100644 --- a/configs/P1021RDB-PC_SPIFLASH_defconfig +++ b/configs/P1021RDB-PC_SPIFLASH_defconfig @@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1021RDB=y -CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -58,7 +58,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1021RDB-PC_defconfig b/configs/P1021RDB-PC_defconfig index 4abebb5cdf8..54010afb566 100644 --- a/configs/P1021RDB-PC_defconfig +++ b/configs/P1021RDB-PC_defconfig @@ -44,7 +44,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1022DS_36BIT_NAND_defconfig b/configs/P1022DS_36BIT_NAND_defconfig index 8ad9397ebcb..2bfda3ed401 100644 --- a/configs/P1022DS_36BIT_NAND_defconfig +++ b/configs/P1022DS_36BIT_NAND_defconfig @@ -6,9 +6,9 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_MPC85xx=y CONFIG_TARGET_P1022DS=y -CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_PHYS_64BIT=y CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" @@ -59,7 +59,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1022DS_36BIT_SDCARD_defconfig b/configs/P1022DS_36BIT_SDCARD_defconfig index 5e818257f7f..9cc214088cd 100644 --- a/configs/P1022DS_36BIT_SDCARD_defconfig +++ b/configs/P1022DS_36BIT_SDCARD_defconfig @@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x0 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_MPC85xx=y CONFIG_TARGET_P1022DS=y -CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -53,7 +53,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1022DS_36BIT_SPIFLASH_defconfig b/configs/P1022DS_36BIT_SPIFLASH_defconfig index fea76c4f70f..80d3a882737 100644 --- a/configs/P1022DS_36BIT_SPIFLASH_defconfig +++ b/configs/P1022DS_36BIT_SPIFLASH_defconfig @@ -3,15 +3,15 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_MPC85xx=y CONFIG_TARGET_P1022DS=y -CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -55,7 +55,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1022DS_36BIT_defconfig b/configs/P1022DS_36BIT_defconfig index 9e0eb0aa418..1048b53abb8 100644 --- a/configs/P1022DS_36BIT_defconfig +++ b/configs/P1022DS_36BIT_defconfig @@ -41,7 +41,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1022DS_NAND_defconfig b/configs/P1022DS_NAND_defconfig index f10452788dd..79754874b68 100644 --- a/configs/P1022DS_NAND_defconfig +++ b/configs/P1022DS_NAND_defconfig @@ -6,9 +6,9 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_MPC85xx=y CONFIG_TARGET_P1022DS=y -CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -58,7 +58,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1022DS_SDCARD_defconfig b/configs/P1022DS_SDCARD_defconfig index 0db9171f346..4e80b8844e1 100644 --- a/configs/P1022DS_SDCARD_defconfig +++ b/configs/P1022DS_SDCARD_defconfig @@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x0 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_MPC85xx=y CONFIG_TARGET_P1022DS=y -CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -52,7 +52,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1022DS_SPIFLASH_defconfig b/configs/P1022DS_SPIFLASH_defconfig index d41e8a82582..e55f05cf56b 100644 --- a/configs/P1022DS_SPIFLASH_defconfig +++ b/configs/P1022DS_SPIFLASH_defconfig @@ -3,15 +3,15 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_MPC85xx=y CONFIG_TARGET_P1022DS=y -CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -54,7 +54,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1022DS_defconfig b/configs/P1022DS_defconfig index cee5e594297..c611ce418da 100644 --- a/configs/P1022DS_defconfig +++ b/configs/P1022DS_defconfig @@ -40,7 +40,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1023RDB_defconfig b/configs/P1023RDB_defconfig index a279a74cda3..0c10bc051c2 100644 --- a/configs/P1023RDB_defconfig +++ b/configs/P1023RDB_defconfig @@ -37,6 +37,7 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P1024RDB_36BIT_defconfig b/configs/P1024RDB_36BIT_defconfig index 4f32964304b..5116fac64ac 100644 --- a/configs/P1024RDB_36BIT_defconfig +++ b/configs/P1024RDB_36BIT_defconfig @@ -40,7 +40,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1024RDB_NAND_defconfig b/configs/P1024RDB_NAND_defconfig index d5955532546..2e2eda74f08 100644 --- a/configs/P1024RDB_NAND_defconfig +++ b/configs/P1024RDB_NAND_defconfig @@ -6,10 +6,10 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1024RDB=y -CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -56,7 +56,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1024RDB_SDCARD_defconfig b/configs/P1024RDB_SDCARD_defconfig index bd443c98710..69a3718ec4d 100644 --- a/configs/P1024RDB_SDCARD_defconfig +++ b/configs/P1024RDB_SDCARD_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0x0 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1024RDB=y -CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -50,7 +50,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1024RDB_SPIFLASH_defconfig b/configs/P1024RDB_SPIFLASH_defconfig index 1c8abd631d0..a09696cc631 100644 --- a/configs/P1024RDB_SPIFLASH_defconfig +++ b/configs/P1024RDB_SPIFLASH_defconfig @@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1024RDB=y -CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -52,7 +52,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1024RDB_defconfig b/configs/P1024RDB_defconfig index f38424fb4a6..72665c4edfa 100644 --- a/configs/P1024RDB_defconfig +++ b/configs/P1024RDB_defconfig @@ -39,7 +39,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1025RDB_36BIT_defconfig b/configs/P1025RDB_36BIT_defconfig index dbd9f7d81a5..8eaddb12903 100644 --- a/configs/P1025RDB_36BIT_defconfig +++ b/configs/P1025RDB_36BIT_defconfig @@ -41,7 +41,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1025RDB_NAND_defconfig b/configs/P1025RDB_NAND_defconfig index 36c73a6e30c..bbeb396f64e 100644 --- a/configs/P1025RDB_NAND_defconfig +++ b/configs/P1025RDB_NAND_defconfig @@ -6,10 +6,10 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1025RDB=y -CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -58,7 +58,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1025RDB_SDCARD_defconfig b/configs/P1025RDB_SDCARD_defconfig index d73e41de7db..bc88a274793 100644 --- a/configs/P1025RDB_SDCARD_defconfig +++ b/configs/P1025RDB_SDCARD_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0x0 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1025RDB=y -CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -51,7 +51,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1025RDB_SPIFLASH_defconfig b/configs/P1025RDB_SPIFLASH_defconfig index f8feeb1d091..6dba8c5648f 100644 --- a/configs/P1025RDB_SPIFLASH_defconfig +++ b/configs/P1025RDB_SPIFLASH_defconfig @@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1025RDB=y -CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -54,7 +54,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P1025RDB_defconfig b/configs/P1025RDB_defconfig index e2f5e4b4ea9..92dc97ab085 100644 --- a/configs/P1025RDB_defconfig +++ b/configs/P1025RDB_defconfig @@ -40,7 +40,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index e2c647dbdfa..b419367e7e3 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -6,10 +6,10 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y -CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_PHYS_64BIT=y CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" @@ -66,7 +66,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 04f2fc9c91c..0afddc2ed98 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0x0 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y -CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -61,7 +61,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 03e5c7e2113..1a700a867fe 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y -CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_PHYS_64BIT=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -63,7 +63,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index 8655b15b914..8b98cb8b9a7 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -50,7 +50,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 4e2b4e21a70..b1a26af0f4b 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -6,10 +6,10 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y -CONFIG_SPL_TEXT_BASE=0xFF800000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -65,7 +65,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index d1f31977742..c76958e1f38 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0x0 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y -CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -60,7 +60,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index b38940dd0b3..0892596fd61 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y -CONFIG_SPL_TEXT_BASE=0xf8f81000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -62,7 +62,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index d681e597324..e37ca66d1fc 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -49,7 +49,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig index 110e50bfd95..0399a27e5d3 100644 --- a/configs/P2041RDB_NAND_defconfig +++ b/configs/P2041RDB_NAND_defconfig @@ -45,6 +45,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig index c47c60158df..0b53a0595ca 100644 --- a/configs/P2041RDB_SDCARD_defconfig +++ b/configs/P2041RDB_SDCARD_defconfig @@ -44,6 +44,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P2041RDB_SECURE_BOOT_defconfig b/configs/P2041RDB_SECURE_BOOT_defconfig index 08e9ca2d4d8..af33f9de2b5 100644 --- a/configs/P2041RDB_SECURE_BOOT_defconfig +++ b/configs/P2041RDB_SECURE_BOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y # CONFIG_SYS_MALLOC_F is not set @@ -38,6 +38,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig index 40eafa71626..8c2e20eeaa6 100644 --- a/configs/P2041RDB_SPIFLASH_defconfig +++ b/configs/P2041RDB_SPIFLASH_defconfig @@ -1,8 +1,8 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xFFF40000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y @@ -45,6 +45,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig b/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig index ce354ae6097..dd5f2a4fc05 100644 --- a/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig +++ b/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig @@ -34,6 +34,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig index 3a79fc62b67..6836d42932f 100644 --- a/configs/P2041RDB_defconfig +++ b/configs/P2041RDB_defconfig @@ -43,6 +43,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P3041DS_NAND_SECURE_BOOT_defconfig b/configs/P3041DS_NAND_SECURE_BOOT_defconfig index dc0567c4642..8ab25373c90 100644 --- a/configs/P3041DS_NAND_SECURE_BOOT_defconfig +++ b/configs/P3041DS_NAND_SECURE_BOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xFFF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x20000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y # CONFIG_SYS_MALLOC_F is not set @@ -40,6 +40,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index 473ad5b0556..eb000c8b3c4 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -45,6 +45,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index 806653e7485..ade8b58feee 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -44,6 +44,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P3041DS_SECURE_BOOT_defconfig b/configs/P3041DS_SECURE_BOOT_defconfig index fb2b12000e4..d6cabebeb70 100644 --- a/configs/P3041DS_SECURE_BOOT_defconfig +++ b/configs/P3041DS_SECURE_BOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y # CONFIG_SYS_MALLOC_F is not set @@ -38,6 +38,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index cbafc9c8a01..0bb7288fa4b 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -1,8 +1,8 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xFFF40000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y @@ -45,6 +45,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P3041DS_SRIO_PCIE_BOOT_defconfig b/configs/P3041DS_SRIO_PCIE_BOOT_defconfig index a8e4512bf4b..c34311b2f93 100644 --- a/configs/P3041DS_SRIO_PCIE_BOOT_defconfig +++ b/configs/P3041DS_SRIO_PCIE_BOOT_defconfig @@ -34,6 +34,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index e00958566a8..428d9e3e6cf 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -43,6 +43,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index da929598f6b..1318e261fb4 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -43,6 +43,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P4080DS_SECURE_BOOT_defconfig b/configs/P4080DS_SECURE_BOOT_defconfig index 281bba123f9..22a6ebe89cf 100644 --- a/configs/P4080DS_SECURE_BOOT_defconfig +++ b/configs/P4080DS_SECURE_BOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y # CONFIG_SYS_MALLOC_F is not set @@ -37,6 +37,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index 9ed25c10ba9..f19ace2f2ed 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -1,8 +1,8 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xFFF40000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y @@ -44,6 +44,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P4080DS_SRIO_PCIE_BOOT_defconfig b/configs/P4080DS_SRIO_PCIE_BOOT_defconfig index a090bed0bc5..a740bc4a7bc 100644 --- a/configs/P4080DS_SRIO_PCIE_BOOT_defconfig +++ b/configs/P4080DS_SRIO_PCIE_BOOT_defconfig @@ -32,6 +32,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index fcefd8d1e7e..31e91c12814 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -42,6 +42,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P5020DS_NAND_SECURE_BOOT_defconfig b/configs/P5020DS_NAND_SECURE_BOOT_defconfig index 19ba1054598..52efa920094 100644 --- a/configs/P5020DS_NAND_SECURE_BOOT_defconfig +++ b/configs/P5020DS_NAND_SECURE_BOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xFFF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x20000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5020DS=y # CONFIG_SYS_MALLOC_F is not set @@ -41,6 +41,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P5020DS_NAND_defconfig b/configs/P5020DS_NAND_defconfig index 4cba3e8e641..baf7d835bc2 100644 --- a/configs/P5020DS_NAND_defconfig +++ b/configs/P5020DS_NAND_defconfig @@ -41,6 +41,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P5020DS_SDCARD_defconfig b/configs/P5020DS_SDCARD_defconfig index 5cfbc6efcd6..c5b424145c3 100644 --- a/configs/P5020DS_SDCARD_defconfig +++ b/configs/P5020DS_SDCARD_defconfig @@ -39,6 +39,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P5020DS_SECURE_BOOT_defconfig b/configs/P5020DS_SECURE_BOOT_defconfig index 5c6f405b7d7..c08f9fffa67 100644 --- a/configs/P5020DS_SECURE_BOOT_defconfig +++ b/configs/P5020DS_SECURE_BOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5020DS=y # CONFIG_SYS_MALLOC_F is not set @@ -38,6 +38,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P5020DS_SPIFLASH_defconfig b/configs/P5020DS_SPIFLASH_defconfig index 8074e09080c..03d7a16a6dc 100644 --- a/configs/P5020DS_SPIFLASH_defconfig +++ b/configs/P5020DS_SPIFLASH_defconfig @@ -1,8 +1,8 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xFFF40000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_MPC85xx=y CONFIG_TARGET_P5020DS=y CONFIG_FIT=y @@ -40,6 +40,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P5020DS_SRIO_PCIE_BOOT_defconfig b/configs/P5020DS_SRIO_PCIE_BOOT_defconfig index 8921201907e..75693642528 100644 --- a/configs/P5020DS_SRIO_PCIE_BOOT_defconfig +++ b/configs/P5020DS_SRIO_PCIE_BOOT_defconfig @@ -34,6 +34,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P5020DS_defconfig b/configs/P5020DS_defconfig index 8bd419b3741..a1b410c7b67 100644 --- a/configs/P5020DS_defconfig +++ b/configs/P5020DS_defconfig @@ -38,6 +38,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P5040DS_NAND_SECURE_BOOT_defconfig b/configs/P5040DS_NAND_SECURE_BOOT_defconfig index 6a69842c970..beab855eaef 100644 --- a/configs/P5040DS_NAND_SECURE_BOOT_defconfig +++ b/configs/P5040DS_NAND_SECURE_BOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xFFF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x20000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y # CONFIG_SYS_MALLOC_F is not set @@ -41,6 +41,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index 4c3f705238f..8be7d908021 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -46,6 +46,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index 3874e06f31b..134ea01ed3d 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -44,6 +44,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P5040DS_SECURE_BOOT_defconfig b/configs/P5040DS_SECURE_BOOT_defconfig index 554a8c1f3b0..5d48206dc8d 100644 --- a/configs/P5040DS_SECURE_BOOT_defconfig +++ b/configs/P5040DS_SECURE_BOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y # CONFIG_SYS_MALLOC_F is not set @@ -38,6 +38,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index 09c13fecd6c..2daceccd7d4 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -1,8 +1,8 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xFFF40000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y @@ -45,6 +45,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index d531401796a..14a97f8f79d 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -43,6 +43,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/SBx81LIFKW_defconfig b/configs/SBx81LIFKW_defconfig index 379a4c26c23..4b3c7295987 100644 --- a/configs/SBx81LIFKW_defconfig +++ b/configs/SBx81LIFKW_defconfig @@ -5,8 +5,8 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x00600000 CONFIG_TARGET_SBx81LIFKW=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_IDENT_STRING="\nSBx81LIFKW" # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/SBx81LIFXCAT_defconfig b/configs/SBx81LIFXCAT_defconfig index d5b73b9f72d..fdbde4930f9 100644 --- a/configs/SBx81LIFXCAT_defconfig +++ b/configs/SBx81LIFXCAT_defconfig @@ -5,8 +5,8 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x00600000 CONFIG_TARGET_SBx81LIFXCAT=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_IDENT_STRING="\nSBx81LIFXCAT" # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/Sinlinx_SinA31s_defconfig b/configs/Sinlinx_SinA31s_defconfig index 74fb9e3d0ad..461a28f24e9 100644 --- a/configs/Sinlinx_SinA31s_defconfig +++ b/configs/Sinlinx_SinA31s_defconfig @@ -11,6 +11,7 @@ CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-sina31s" +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y diff --git a/configs/Sinlinx_SinA33_defconfig b/configs/Sinlinx_SinA33_defconfig index 9f29870902e..277598e0c4c 100644 --- a/configs/Sinlinx_SinA33_defconfig +++ b/configs/Sinlinx_SinA33_defconfig @@ -13,7 +13,6 @@ CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CMD_DFU=y -# CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-sinlinx-sina33" CONFIG_DFU_RAM=y CONFIG_FASTBOOT_CMD_OEM_FORMAT=y diff --git a/configs/Sinovoip_BPI_M2_defconfig b/configs/Sinovoip_BPI_M2_defconfig index b2ecf4ee920..10bdf200b2a 100644 --- a/configs/Sinovoip_BPI_M2_defconfig +++ b/configs/Sinovoip_BPI_M2_defconfig @@ -7,6 +7,7 @@ CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-sinovoip-bpi-m2" +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y CONFIG_MII=y diff --git a/configs/T1023RDB_NAND_defconfig b/configs/T1023RDB_NAND_defconfig index bfc1a49f44f..ca74b8800d6 100644 --- a/configs/T1023RDB_NAND_defconfig +++ b/configs/T1023RDB_NAND_defconfig @@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x140000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T1023RDB=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -62,6 +62,7 @@ CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_MII=y diff --git a/configs/T1023RDB_SDCARD_defconfig b/configs/T1023RDB_SDCARD_defconfig index 772dcaa0f87..4edc69aac56 100644 --- a/configs/T1023RDB_SDCARD_defconfig +++ b/configs/T1023RDB_SDCARD_defconfig @@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T1023RDB=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -59,6 +59,7 @@ CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_MII=y diff --git a/configs/T1023RDB_SECURE_BOOT_defconfig b/configs/T1023RDB_SECURE_BOOT_defconfig index b0079f46d81..5ddaac6e2e2 100644 --- a/configs/T1023RDB_SECURE_BOOT_defconfig +++ b/configs/T1023RDB_SECURE_BOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_T1023RDB=y # CONFIG_SYS_MALLOC_F is not set @@ -46,6 +46,7 @@ CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_MII=y diff --git a/configs/T1023RDB_SPIFLASH_defconfig b/configs/T1023RDB_SPIFLASH_defconfig index 540d8c1e3a2..b489a802459 100644 --- a/configs/T1023RDB_SPIFLASH_defconfig +++ b/configs/T1023RDB_SPIFLASH_defconfig @@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x30001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T1023RDB=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -62,6 +62,7 @@ CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_MII=y diff --git a/configs/T1023RDB_defconfig b/configs/T1023RDB_defconfig index ede4ccac6ac..b8ffebc45c0 100644 --- a/configs/T1023RDB_defconfig +++ b/configs/T1023RDB_defconfig @@ -46,6 +46,7 @@ CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_MII=y diff --git a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig index bb22d4ed946..2199abcb959 100644 --- a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig +++ b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024QDS=y # CONFIG_SYS_MALLOC_F is not set @@ -48,6 +48,10 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1024QDS_DDR4_defconfig b/configs/T1024QDS_DDR4_defconfig index d21bfb48d4d..0a52af48bb3 100644 --- a/configs/T1024QDS_DDR4_defconfig +++ b/configs/T1024QDS_DDR4_defconfig @@ -48,6 +48,10 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_FMAN_ENET=y CONFIG_MII=y CONFIG_SYS_QE_FMAN_FW_IN_NOR=y diff --git a/configs/T1024QDS_NAND_defconfig b/configs/T1024QDS_NAND_defconfig index fa4a8991321..9db39b1b58e 100644 --- a/configs/T1024QDS_NAND_defconfig +++ b/configs/T1024QDS_NAND_defconfig @@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x140000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T1024QDS=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -65,6 +65,10 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1024QDS_SDCARD_defconfig b/configs/T1024QDS_SDCARD_defconfig index 54b36230ff8..679f2ad208e 100644 --- a/configs/T1024QDS_SDCARD_defconfig +++ b/configs/T1024QDS_SDCARD_defconfig @@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T1024QDS=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -62,6 +62,10 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1024QDS_SECURE_BOOT_defconfig b/configs/T1024QDS_SECURE_BOOT_defconfig index f0c1b37f20a..cc080c72858 100644 --- a/configs/T1024QDS_SECURE_BOOT_defconfig +++ b/configs/T1024QDS_SECURE_BOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024QDS=y # CONFIG_SYS_MALLOC_F is not set @@ -49,6 +49,10 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1024QDS_SPIFLASH_defconfig b/configs/T1024QDS_SPIFLASH_defconfig index 53fd5690d9a..01bc5111e03 100644 --- a/configs/T1024QDS_SPIFLASH_defconfig +++ b/configs/T1024QDS_SPIFLASH_defconfig @@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x00201000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T1024QDS=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -65,6 +65,10 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1024QDS_defconfig b/configs/T1024QDS_defconfig index 3517cfd5625..6ebffb8dd1a 100644 --- a/configs/T1024QDS_defconfig +++ b/configs/T1024QDS_defconfig @@ -49,6 +49,10 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index d75e5ec38a2..c2c73a744ac 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -68,6 +68,7 @@ CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_MII=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index 95d30f10179..3ded897dcf4 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -65,6 +65,7 @@ CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_MII=y diff --git a/configs/T1024RDB_SECURE_BOOT_defconfig b/configs/T1024RDB_SECURE_BOOT_defconfig index e924e7418ad..1d221dba9ec 100644 --- a/configs/T1024RDB_SECURE_BOOT_defconfig +++ b/configs/T1024RDB_SECURE_BOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y # CONFIG_SYS_MALLOC_F is not set @@ -48,6 +48,7 @@ CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_MII=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index 4068b6ca5a6..123d8ddbb0b 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x30001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -68,6 +68,7 @@ CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_MII=y diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig index ad4ba96a2ec..dc6b62c67ef 100644 --- a/configs/T1024RDB_defconfig +++ b/configs/T1024RDB_defconfig @@ -53,6 +53,7 @@ CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_MII=y diff --git a/configs/T1040D4RDB_NAND_defconfig b/configs/T1040D4RDB_NAND_defconfig index 8e11e7e412d..87b2a769738 100644 --- a/configs/T1040D4RDB_NAND_defconfig +++ b/configs/T1040D4RDB_NAND_defconfig @@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x180000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T1040D4RDB=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -60,6 +60,8 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1040D4RDB_SDCARD_defconfig b/configs/T1040D4RDB_SDCARD_defconfig index 0e5b6a5e593..4b9e4280458 100644 --- a/configs/T1040D4RDB_SDCARD_defconfig +++ b/configs/T1040D4RDB_SDCARD_defconfig @@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T1040D4RDB=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -57,6 +57,8 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1040D4RDB_SECURE_BOOT_defconfig b/configs/T1040D4RDB_SECURE_BOOT_defconfig index 9992ad74df3..7adffb73ea8 100644 --- a/configs/T1040D4RDB_SECURE_BOOT_defconfig +++ b/configs/T1040D4RDB_SECURE_BOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_T1040D4RDB=y # CONFIG_SYS_MALLOC_F is not set @@ -43,6 +43,8 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1040D4RDB_SPIFLASH_defconfig b/configs/T1040D4RDB_SPIFLASH_defconfig index 5b9c3cb2732..2320b7214ca 100644 --- a/configs/T1040D4RDB_SPIFLASH_defconfig +++ b/configs/T1040D4RDB_SPIFLASH_defconfig @@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x30001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T1040D4RDB=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -60,6 +60,8 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1040D4RDB_defconfig b/configs/T1040D4RDB_defconfig index 8177b1653c1..eb25930ff79 100644 --- a/configs/T1040D4RDB_defconfig +++ b/configs/T1040D4RDB_defconfig @@ -44,6 +44,8 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1040QDS_DDR4_defconfig b/configs/T1040QDS_DDR4_defconfig index 9cb012cf6fb..a575b6fbc66 100644 --- a/configs/T1040QDS_DDR4_defconfig +++ b/configs/T1040QDS_DDR4_defconfig @@ -49,6 +49,10 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1040QDS_SECURE_BOOT_defconfig b/configs/T1040QDS_SECURE_BOOT_defconfig index ddde260546c..e616f0d2326 100644 --- a/configs/T1040QDS_SECURE_BOOT_defconfig +++ b/configs/T1040QDS_SECURE_BOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_T1040QDS=y # CONFIG_SYS_MALLOC_F is not set @@ -49,6 +49,10 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1040QDS_defconfig b/configs/T1040QDS_defconfig index 94c02a98104..0b1c7cd12d2 100644 --- a/configs/T1040QDS_defconfig +++ b/configs/T1040QDS_defconfig @@ -50,6 +50,10 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1040RDB_NAND_defconfig b/configs/T1040RDB_NAND_defconfig index 381801e5de5..7cf98473bd8 100644 --- a/configs/T1040RDB_NAND_defconfig +++ b/configs/T1040RDB_NAND_defconfig @@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x180000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T1040RDB=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -61,6 +61,8 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1040RDB_SDCARD_defconfig b/configs/T1040RDB_SDCARD_defconfig index 1eeba5d8bac..321260fc8b2 100644 --- a/configs/T1040RDB_SDCARD_defconfig +++ b/configs/T1040RDB_SDCARD_defconfig @@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T1040RDB=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -58,6 +58,8 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1040RDB_SECURE_BOOT_defconfig b/configs/T1040RDB_SECURE_BOOT_defconfig index f0705cedf6f..910b984f47a 100644 --- a/configs/T1040RDB_SECURE_BOOT_defconfig +++ b/configs/T1040RDB_SECURE_BOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_T1040RDB=y # CONFIG_SYS_MALLOC_F is not set @@ -44,6 +44,8 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1040RDB_SPIFLASH_defconfig b/configs/T1040RDB_SPIFLASH_defconfig index cd30d8aedfc..65ab4e0c796 100644 --- a/configs/T1040RDB_SPIFLASH_defconfig +++ b/configs/T1040RDB_SPIFLASH_defconfig @@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x30001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T1040RDB=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -61,6 +61,8 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1040RDB_defconfig b/configs/T1040RDB_defconfig index f5c2c1795e1..e8c5393b185 100644 --- a/configs/T1040RDB_defconfig +++ b/configs/T1040RDB_defconfig @@ -45,6 +45,8 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index 05544f04a12..f5a3c440388 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x180000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -65,6 +65,8 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index f8f5998571f..18e51b1d604 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -62,6 +62,8 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1042D4RDB_SECURE_BOOT_defconfig b/configs/T1042D4RDB_SECURE_BOOT_defconfig index 066ac3f28c1..f460b17e4db 100644 --- a/configs/T1042D4RDB_SECURE_BOOT_defconfig +++ b/configs/T1042D4RDB_SECURE_BOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y # CONFIG_SYS_MALLOC_F is not set @@ -44,6 +44,8 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index ebb62df96b0..093d233b7c2 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x30001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -65,6 +65,8 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig index 4e66073ef4d..95160cdd16c 100644 --- a/configs/T1042D4RDB_defconfig +++ b/configs/T1042D4RDB_defconfig @@ -50,6 +50,8 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig index 5b076ea7535..167325f83c8 100644 --- a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig +++ b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig @@ -2,14 +2,14 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x30001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T1042RDB_PI=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -65,6 +65,8 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1042RDB_PI_NAND_defconfig b/configs/T1042RDB_PI_NAND_defconfig index 49baa03bb0a..90bbee25088 100644 --- a/configs/T1042RDB_PI_NAND_defconfig +++ b/configs/T1042RDB_PI_NAND_defconfig @@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x180000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T1042RDB_PI=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -63,6 +63,8 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1042RDB_PI_SDCARD_defconfig b/configs/T1042RDB_PI_SDCARD_defconfig index c9a27c3d486..ae664df4dd4 100644 --- a/configs/T1042RDB_PI_SDCARD_defconfig +++ b/configs/T1042RDB_PI_SDCARD_defconfig @@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T1042RDB_PI=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -60,6 +60,8 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1042RDB_PI_SPIFLASH_defconfig b/configs/T1042RDB_PI_SPIFLASH_defconfig index aef96d0e34a..ef654653e50 100644 --- a/configs/T1042RDB_PI_SPIFLASH_defconfig +++ b/configs/T1042RDB_PI_SPIFLASH_defconfig @@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x30001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T1042RDB_PI=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -63,6 +63,8 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1042RDB_PI_defconfig b/configs/T1042RDB_PI_defconfig index 727d1f251fd..07ad865b6e8 100644 --- a/configs/T1042RDB_PI_defconfig +++ b/configs/T1042RDB_PI_defconfig @@ -47,6 +47,8 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1042RDB_SECURE_BOOT_defconfig b/configs/T1042RDB_SECURE_BOOT_defconfig index 218421800fe..c5f39e82f6e 100644 --- a/configs/T1042RDB_SECURE_BOOT_defconfig +++ b/configs/T1042RDB_SECURE_BOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_T1042RDB=y # CONFIG_SYS_MALLOC_F is not set @@ -43,6 +43,8 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T1042RDB_defconfig b/configs/T1042RDB_defconfig index cf8ae99a712..c94730d79bf 100644 --- a/configs/T1042RDB_defconfig +++ b/configs/T1042RDB_defconfig @@ -44,6 +44,8 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 2c3a2edde8e..dc836642859 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x140000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -64,6 +64,9 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_MII=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index a7c2fa81217..24359ed1a4b 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -61,6 +61,9 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_MII=y diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index ef5aa483f81..cc2449a25f6 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y @@ -48,6 +48,9 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_MII=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index 1848a790eec..5d159607a89 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x00201000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -64,6 +64,9 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_MII=y diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig index a6c3215c78d..c3fef7afe34 100644 --- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig @@ -41,6 +41,9 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_MII=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index 18d0a50ee0f..9cf28152994 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -49,6 +49,9 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_MII=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index ca96fb8d3b8..292a3beb41a 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -66,6 +66,7 @@ CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y CONFIG_SYS_CORTINA_FW_IN_NAND=y +CONFIG_PHY_REALTEK=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_MII=y diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index 1c21dc69a90..b53a0ada3da 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -63,6 +63,7 @@ CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y CONFIG_SYS_CORTINA_FW_IN_MMC=y +CONFIG_PHY_REALTEK=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_MII=y diff --git a/configs/T2080RDB_SECURE_BOOT_defconfig b/configs/T2080RDB_SECURE_BOOT_defconfig index 44dbfb0192d..a1f8d3d1fd9 100644 --- a/configs/T2080RDB_SECURE_BOOT_defconfig +++ b/configs/T2080RDB_SECURE_BOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y # CONFIG_SYS_MALLOC_F is not set @@ -45,6 +45,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y +CONFIG_PHY_REALTEK=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_MII=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index 8c45787bce0..ddf273f5458 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x00201000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -66,6 +66,7 @@ CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y CONFIG_SYS_CORTINA_FW_IN_SPIFLASH=y +CONFIG_PHY_REALTEK=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_MII=y diff --git a/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig b/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig index e6de728c6ff..6c16bfa19f4 100644 --- a/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig @@ -38,6 +38,7 @@ CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y CONFIG_SYS_CORTINA_FW_IN_REMOTE=y +CONFIG_PHY_REALTEK=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_MII=y diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index ea43eb5d17a..c81f546f52d 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -50,6 +50,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y +CONFIG_PHY_REALTEK=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_MII=y diff --git a/configs/T2081QDS_NAND_defconfig b/configs/T2081QDS_NAND_defconfig index 2e0e05e6542..85381c60ef0 100644 --- a/configs/T2081QDS_NAND_defconfig +++ b/configs/T2081QDS_NAND_defconfig @@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x140000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T2081QDS=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -60,6 +60,9 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_MII=y diff --git a/configs/T2081QDS_SDCARD_defconfig b/configs/T2081QDS_SDCARD_defconfig index 41048858469..bbc8b7666eb 100644 --- a/configs/T2081QDS_SDCARD_defconfig +++ b/configs/T2081QDS_SDCARD_defconfig @@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T2081QDS=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -57,6 +57,9 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_MII=y diff --git a/configs/T2081QDS_SPIFLASH_defconfig b/configs/T2081QDS_SPIFLASH_defconfig index 242b11c8912..b02505be21e 100644 --- a/configs/T2081QDS_SPIFLASH_defconfig +++ b/configs/T2081QDS_SPIFLASH_defconfig @@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x00201000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T2081QDS=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -60,6 +60,9 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_MII=y diff --git a/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig index 8d00ad65eb2..a10f39b336d 100644 --- a/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig @@ -36,6 +36,9 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_MII=y diff --git a/configs/T2081QDS_defconfig b/configs/T2081QDS_defconfig index bfa40b5ef9f..22ca08363c0 100644 --- a/configs/T2081QDS_defconfig +++ b/configs/T2081QDS_defconfig @@ -44,6 +44,9 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_MII=y diff --git a/configs/T4160QDS_NAND_defconfig b/configs/T4160QDS_NAND_defconfig index 05e4a6198e9..ddff89602fa 100644 --- a/configs/T4160QDS_NAND_defconfig +++ b/configs/T4160QDS_NAND_defconfig @@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x140000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T4160QDS=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -53,6 +53,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T4160QDS_SDCARD_defconfig b/configs/T4160QDS_SDCARD_defconfig index fe126938f4f..5d253534ca4 100644 --- a/configs/T4160QDS_SDCARD_defconfig +++ b/configs/T4160QDS_SDCARD_defconfig @@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T4160QDS=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -50,6 +50,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T4160QDS_SECURE_BOOT_defconfig b/configs/T4160QDS_SECURE_BOOT_defconfig index 8e003ed9fc2..8934c3edf00 100644 --- a/configs/T4160QDS_SECURE_BOOT_defconfig +++ b/configs/T4160QDS_SECURE_BOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_T4160QDS=y # CONFIG_SYS_MALLOC_F is not set @@ -37,6 +37,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T4160QDS_defconfig b/configs/T4160QDS_defconfig index 37ef521736e..d0d12906315 100644 --- a/configs/T4160QDS_defconfig +++ b/configs/T4160QDS_defconfig @@ -37,6 +37,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T4160RDB_defconfig b/configs/T4160RDB_defconfig index 438052fdcd3..f3c7e1ec57c 100644 --- a/configs/T4160RDB_defconfig +++ b/configs/T4160RDB_defconfig @@ -37,7 +37,10 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y CONFIG_PHY_CORTINA=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T4240QDS_NAND_defconfig b/configs/T4240QDS_NAND_defconfig index cfa0356271f..f971cee3b0f 100644 --- a/configs/T4240QDS_NAND_defconfig +++ b/configs/T4240QDS_NAND_defconfig @@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x140000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T4240QDS=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_FIT=y @@ -53,6 +53,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T4240QDS_SDCARD_defconfig b/configs/T4240QDS_SDCARD_defconfig index 67efee97fd0..5e662be1d74 100644 --- a/configs/T4240QDS_SDCARD_defconfig +++ b/configs/T4240QDS_SDCARD_defconfig @@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T4240QDS=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -50,6 +50,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T4240QDS_SECURE_BOOT_defconfig b/configs/T4240QDS_SECURE_BOOT_defconfig index 4808a49dcf3..807d5b58957 100644 --- a/configs/T4240QDS_SECURE_BOOT_defconfig +++ b/configs/T4240QDS_SECURE_BOOT_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240QDS=y # CONFIG_SYS_MALLOC_F is not set @@ -37,6 +37,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig b/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig index 29cadfa3a8d..2bc30bbf9e8 100644 --- a/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig @@ -33,6 +33,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T4240QDS_defconfig b/configs/T4240QDS_defconfig index 3d7aa9f987b..84341f75798 100644 --- a/configs/T4240QDS_defconfig +++ b/configs/T4240QDS_defconfig @@ -37,6 +37,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index 17be2e78ae6..646cd88793a 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_MPC85xx=y CONFIG_TARGET_T4240RDB=y -CONFIG_SPL_TEXT_BASE=0xFFFD8000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -54,7 +54,10 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y CONFIG_PHY_CORTINA=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index 426ddef391f..d74afc71eb0 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -42,7 +42,10 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y CONFIG_PHY_CORTINA=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y diff --git a/configs/TQM834x_defconfig b/configs/TQM834x_defconfig index 8afc884423c..96ce4de0e68 100644 --- a/configs/TQM834x_defconfig +++ b/configs/TQM834x_defconfig @@ -150,7 +150,15 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/TWR-P1025_defconfig b/configs/TWR-P1025_defconfig index c52263bfcd8..e48454aa6c6 100644 --- a/configs/TWR-P1025_defconfig +++ b/configs/TWR-P1025_defconfig @@ -41,7 +41,15 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/UCP1020_defconfig b/configs/UCP1020_defconfig index e0162e02d20..8ad1c046727 100644 --- a/configs/UCP1020_defconfig +++ b/configs/UCP1020_defconfig @@ -40,7 +40,15 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/Wits_Pro_A20_DKT_defconfig b/configs/Wits_Pro_A20_DKT_defconfig index 8630f39a5f1..8dbf6cd5ce6 100644 --- a/configs/Wits_Pro_A20_DKT_defconfig +++ b/configs/Wits_Pro_A20_DKT_defconfig @@ -14,6 +14,7 @@ CONFIG_AHCI=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-wits-pro-a20-dkt" CONFIG_SCSI_AHCI=y +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y CONFIG_MII=y diff --git a/configs/a64-olinuxino-emmc_defconfig b/configs/a64-olinuxino-emmc_defconfig index 08687cb61a0..b62058297b8 100644 --- a/configs/a64-olinuxino-emmc_defconfig +++ b/configs/a64-olinuxino-emmc_defconfig @@ -6,7 +6,7 @@ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-olinuxino-emmc" -CONFIG_SUN8I_EMAC=y CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/adp-ae3xx_defconfig b/configs/adp-ae3xx_defconfig index 67e96563d06..62164474b1a 100644 --- a/configs/adp-ae3xx_defconfig +++ b/configs/adp-ae3xx_defconfig @@ -1,8 +1,8 @@ CONFIG_NDS32=y CONFIG_SYS_TEXT_BASE=0x4A000000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x140000 +CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_ADP_AE3XX=y CONFIG_FIT=y diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig index 7540d30b45e..58296fd144e 100644 --- a/configs/ae350_rv32_spl_xip_defconfig +++ b/configs/ae350_rv32_spl_xip_defconfig @@ -3,8 +3,8 @@ CONFIG_SYS_TEXT_BASE=0x01200000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y -CONFIG_TARGET_AX25_AE350=y CONFIG_SPL_TEXT_BASE=0x80000000 +CONFIG_TARGET_AX25_AE350=y CONFIG_RISCV_SMODE=y CONFIG_XIP=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig index 99a0035ebbc..8063b77b9f5 100644 --- a/configs/ae350_rv64_spl_xip_defconfig +++ b/configs/ae350_rv64_spl_xip_defconfig @@ -3,8 +3,8 @@ CONFIG_SYS_TEXT_BASE=0x01200000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y -CONFIG_TARGET_AX25_AE350=y CONFIG_SPL_TEXT_BASE=0x80000000 +CONFIG_TARGET_AX25_AE350=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y CONFIG_XIP=y diff --git a/configs/alt_defconfig b/configs/alt_defconfig index 31e00ab3f48..105c478b4bf 100644 --- a/configs/alt_defconfig +++ b/configs/alt_defconfig @@ -9,8 +9,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_ENV_SIZE=0x40000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_DM_GPIO=y CONFIG_ARCH_RMOBILE_BOARD_STRING="Alt" CONFIG_R8A7794=y @@ -30,7 +31,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -73,6 +73,7 @@ CONFIG_DM_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_MTD=y +CONFIG_BITBANGMII=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y CONFIG_DM_ETH=y diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig index d8a7b7dcf51..64c1c537f93 100644 --- a/configs/am335x_boneblack_vboot_defconfig +++ b/configs/am335x_boneblack_vboot_defconfig @@ -49,6 +49,8 @@ CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_MII=y diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig index 66899c277bf..8d8276ba561 100644 --- a/configs/am335x_evm_defconfig +++ b/configs/am335x_evm_defconfig @@ -58,6 +58,8 @@ CONFIG_MTD_RAW_NAND=y CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_DRIVER_TI_CPSW=y diff --git a/configs/am335x_guardian_defconfig b/configs/am335x_guardian_defconfig index b0033810b98..01333e7d934 100644 --- a/configs/am335x_guardian_defconfig +++ b/configs/am335x_guardian_defconfig @@ -11,9 +11,9 @@ CONFIG_TARGET_AM335X_GUARDIAN=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 -CONFIG_SYS_BOOTCOUNT_ADDR=0x44E3E000 CONFIG_SPL=y CONFIG_BOOTSTAGE_STASH_ADDR=0x0 +CONFIG_ENV_OFFSET_REDUND=0x540000 CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_CONSOLE_MUX=y @@ -23,11 +23,6 @@ CONFIG_ARCH_MISC_INIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_SEPARATE_BSS=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set -CONFIG_ENV_IS_IN_NAND=y -CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x540000 -CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_SPL_ENV_IS_NOWHERE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_ETH_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y @@ -45,7 +40,6 @@ CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x0 CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set -# CONFIG_CMD_LED is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -53,6 +47,7 @@ CONFIG_CMD_MTD=y CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_LED is not set CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDPARTS_DEFAULT="mtdparts=nand.0:256k(SPL),256k(SPL.backup1),256k(SPL.backup2),256k(SPL.backup3),1m(u-boot),1m(u-boot.backup1),1m(u-boot-2),1m(u-boot-2.backup1),256k(u-boot-env),256k(u-boot-env.backup1),256k(splash-screen),-(UBI)" @@ -61,11 +56,13 @@ CONFIG_CMD_UBI=y # CONFIG_ISO_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y -# CONFIG_SPL_OF_CONTROL is not set CONFIG_DEFAULT_DEVICE_TREE="am335x-guardian" +CONFIG_ENV_IS_IN_NAND=y +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SPL_ENV_IS_NOWHERE=y CONFIG_SPL_DM=y CONFIG_BOOTCOUNT_LIMIT=y -CONFIG_BOOTCOUNT_AM33XX=y CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_MISC=y @@ -97,5 +94,5 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 CONFIG_USB_ETHER=y CONFIG_SPL_WDT=y CONFIG_FAT_WRITE=y -CONFIG_SPL_OF_LIBFDT=y # CONFIG_SPL_USE_TINY_PRINTF is not set +CONFIG_SPL_OF_LIBFDT=y diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig index 1dceea5398b..393665fcf37 100644 --- a/configs/am335x_hs_evm_defconfig +++ b/configs/am335x_hs_evm_defconfig @@ -51,6 +51,8 @@ CONFIG_MTD_RAW_NAND=y CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_DRIVER_TI_CPSW=y diff --git a/configs/am335x_hs_evm_uart_defconfig b/configs/am335x_hs_evm_uart_defconfig index a7d76c83bd9..a8afad9e0be 100644 --- a/configs/am335x_hs_evm_uart_defconfig +++ b/configs/am335x_hs_evm_uart_defconfig @@ -53,6 +53,8 @@ CONFIG_MTD_RAW_NAND=y CONFIG_DM_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_DRIVER_TI_CPSW=y diff --git a/configs/am335x_igep003x_defconfig b/configs/am335x_igep003x_defconfig index e0efd5bc95b..633c35f77bc 100644 --- a/configs/am335x_igep003x_defconfig +++ b/configs/am335x_igep003x_defconfig @@ -67,6 +67,7 @@ CONFIG_MMC_OMAP_HS=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_MTD_UBI_FASTMAP=y +CONFIG_PHY_SMSC=y CONFIG_MII=y CONFIG_DRIVER_TI_CPSW=y CONFIG_SPI=y diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig index b7ee1a71292..c0bb093c4d4 100644 --- a/configs/am335x_shc_defconfig +++ b/configs/am335x_shc_defconfig @@ -49,6 +49,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_MMC=y CONFIG_MMC_OMAP_HS=y CONFIG_PHY_ADDR_ENABLE=y +CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_DRIVER_TI_CPSW=y diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig index 641d15be169..026a81538e9 100644 --- a/configs/am335x_shc_ict_defconfig +++ b/configs/am335x_shc_ict_defconfig @@ -50,6 +50,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_MMC=y CONFIG_MMC_OMAP_HS=y CONFIG_PHY_ADDR_ENABLE=y +CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_DRIVER_TI_CPSW=y diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig index 49c0966fa89..91c1ce7f54b 100644 --- a/configs/am335x_shc_netboot_defconfig +++ b/configs/am335x_shc_netboot_defconfig @@ -51,6 +51,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_MMC=y CONFIG_MMC_OMAP_HS=y CONFIG_PHY_ADDR_ENABLE=y +CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_DRIVER_TI_CPSW=y diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig index a2dc081c3d7..4fa7b6dbc47 100644 --- a/configs/am335x_shc_sdboot_defconfig +++ b/configs/am335x_shc_sdboot_defconfig @@ -50,6 +50,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_MMC=y CONFIG_MMC_OMAP_HS=y CONFIG_PHY_ADDR_ENABLE=y +CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_DRIVER_TI_CPSW=y diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig index ecbe094c73c..238164a55fe 100644 --- a/configs/am335x_sl50_defconfig +++ b/configs/am335x_sl50_defconfig @@ -48,6 +48,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_MMC=y CONFIG_MMC_OMAP_HS=y +CONFIG_PHY_SMSC=y CONFIG_MII=y CONFIG_DRIVER_TI_CPSW=y CONFIG_SPI=y diff --git a/configs/am43xx_evm_qspiboot_defconfig b/configs/am43xx_evm_qspiboot_defconfig index d52745fd843..39facf132e5 100644 --- a/configs/am43xx_evm_qspiboot_defconfig +++ b/configs/am43xx_evm_qspiboot_defconfig @@ -4,8 +4,8 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_TEXT_BASE=0x30000000 CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x110000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_AM43XX=y CONFIG_ENV_OFFSET_REDUND=0x120000 diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig index 21de5229c1c..db48785f911 100644 --- a/configs/am43xx_evm_usbhost_boot_defconfig +++ b/configs/am43xx_evm_usbhost_boot_defconfig @@ -42,7 +42,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" CONFIG_OF_LIST="am437x-gp-evm am437x-sk-evm am43x-epos-evm am437x-idk-evm" CONFIG_ENV_IS_IN_FAT=y -CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index f0ddb020ee3..42942e9ed4b 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_OMAP54XX=y CONFIG_TARGET_AM57XX_EVM=y @@ -11,8 +12,8 @@ CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_ARMV7_LPAE=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x40300000 +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SPL_LOAD_FIT=y CONFIG_OF_BOARD_SETUP=y @@ -31,7 +32,6 @@ CONFIG_SPL_DMA=y # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_OS_BOOT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_CMD_ADTIMG=y CONFIG_CMD_ABOOTIMG=y diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index 5db187738ef..f80ec38004b 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_OMAP54XX=y CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000 @@ -35,7 +36,6 @@ CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_DMA=y # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_CMD_ADTIMG=y CONFIG_CMD_ABOOTIMG=y CONFIG_CMD_BCB=y diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig index 5ef15187a63..3b155cc2026 100644 --- a/configs/am57xx_hs_evm_usb_defconfig +++ b/configs/am57xx_hs_evm_usb_defconfig @@ -4,6 +4,7 @@ CONFIG_TI_SECURE_DEVICE=y CONFIG_ISW_ENTRY_ADDR=0x40306d50 CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_OMAP54XX=y CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000 @@ -37,7 +38,6 @@ CONFIG_SPL_DMA=y # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig index 542bbd992c5..d74a2d09309 100644 --- a/configs/am65x_evm_a53_defconfig +++ b/configs/am65x_evm_a53_defconfig @@ -7,6 +7,7 @@ CONFIG_SOC_K3_AM6=y CONFIG_TARGET_AM654_A53_EVM=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x680000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_DM_GPIO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -37,11 +38,9 @@ CONFIG_SPL_DM_MAILBOX=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_POWER_DOMAIN=y -CONFIG_SPI_FLASH_SFDP_SUPPORT=y # CONFIG_SPL_SPI_FLASH_TINY is not set CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y @@ -50,7 +49,6 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y CONFIG_CMD_REMOTEPROC=y -CONFIG_CMD_SF=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y @@ -97,7 +95,7 @@ CONFIG_MMC_SDHCI_AM654=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_DM_SPI_FLASH=y -CONFIG_SPI_FLASH_SFDP_SUPPORT +CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_SPI_FLASH_MTD=y diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index b7955265c71..4fc199e8091 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -8,6 +8,7 @@ CONFIG_SOC_K3_AM6=y CONFIG_K3_EARLY_CONS=y CONFIG_TARGET_AM654_R5_EVM=y CONFIG_ENV_SIZE=0x20000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_DM_GPIO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -40,7 +41,6 @@ CONFIG_SPL_REMOTEPROC=y # CONFIG_SPL_SPI_FLASH_TINY is not set CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -58,7 +58,6 @@ CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board" CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_ENV_IS_IN_FAT=y -CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="1:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y @@ -79,7 +78,6 @@ CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_OMAP24XX=y CONFIG_DM_MAILBOX=y CONFIG_K3_SEC_PROXY=y -CONFIG_MISC=y CONFIG_K3_AVS0=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y diff --git a/configs/am65x_hs_evm_a53_defconfig b/configs/am65x_hs_evm_a53_defconfig index 9f43cee3961..117953817d8 100644 --- a/configs/am65x_hs_evm_a53_defconfig +++ b/configs/am65x_hs_evm_a53_defconfig @@ -8,12 +8,14 @@ CONFIG_SOC_K3_AM6=y CONFIG_TARGET_AM654_A53_EVM=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x680000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_DM_GPIO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_ENV_OFFSET_REDUND=0x6A0000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -39,11 +41,9 @@ CONFIG_SPL_DM_MAILBOX=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_DM_RESET=y CONFIG_SPL_POWER_DOMAIN=y -CONFIG_SPI_FLASH_SFDP_SUPPORT=y # CONFIG_SPL_SPI_FLASH_TINY is not set CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y @@ -52,7 +52,6 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y CONFIG_CMD_REMOTEPROC=y -CONFIG_CMD_SF=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y @@ -67,7 +66,6 @@ CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x6A0000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y @@ -99,7 +97,7 @@ CONFIG_MMC_SDHCI_AM654=y CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_DM_SPI_FLASH=y -CONFIG_SPI_FLASH_SFDP_SUPPORT +CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_SPI_FLASH_MTD=y diff --git a/configs/am65x_hs_evm_r5_defconfig b/configs/am65x_hs_evm_r5_defconfig index bbf50bf72be..b2d638672e3 100644 --- a/configs/am65x_hs_evm_r5_defconfig +++ b/configs/am65x_hs_evm_r5_defconfig @@ -9,6 +9,7 @@ CONFIG_SOC_K3_AM6=y CONFIG_K3_EARLY_CONS=y CONFIG_TARGET_AM654_R5_EVM=y CONFIG_ENV_SIZE=0x20000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_DM_GPIO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -42,7 +43,6 @@ CONFIG_SPL_REMOTEPROC=y # CONFIG_SPL_SPI_FLASH_TINY is not set CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -60,7 +60,6 @@ CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board" CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_ENV_IS_IN_FAT=y -CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="1:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y @@ -81,7 +80,6 @@ CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_OMAP24XX=y CONFIG_DM_MAILBOX=y CONFIG_K3_SEC_PROXY=y -CONFIG_MISC=y CONFIG_K3_AVS0=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y diff --git a/configs/ap121_defconfig b/configs/ap121_defconfig index 1001cae06cc..af83ef5e943 100644 --- a/configs/ap121_defconfig +++ b/configs/ap121_defconfig @@ -2,8 +2,8 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0x9F000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xb8020000 CONFIG_DEBUG_UART_CLOCK=25000000 diff --git a/configs/ap143_defconfig b/configs/ap143_defconfig index 1058fc08e5f..3d5849dd0a5 100644 --- a/configs/ap143_defconfig +++ b/configs/ap143_defconfig @@ -2,8 +2,8 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0x9F000000 CONFIG_SYS_MALLOC_F_LEN=0x800 CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xb8020000 CONFIG_DEBUG_UART_CLOCK=25000000 diff --git a/configs/ap152_defconfig b/configs/ap152_defconfig index 7124dcd6ed6..6ed89a2ea16 100644 --- a/configs/ap152_defconfig +++ b/configs/ap152_defconfig @@ -2,8 +2,8 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0x9F000000 CONFIG_SYS_MALLOC_F_LEN=0x800 CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xb8020000 CONFIG_DEBUG_UART_CLOCK=25000000 diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index 12fe9895ed3..ea18ef908cb 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -4,17 +4,17 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_APALIS_IMX6=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 +CONFIG_TARGET_APALIS_IMX6=y CONFIG_DM_GPIO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y CONFIG_CMD_HDMIDETECT=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x00908000 +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q" diff --git a/configs/aristainetos2_defconfig b/configs/aristainetos2_defconfig index 25ac75d4ee1..01990bd9704 100644 --- a/configs/aristainetos2_defconfig +++ b/configs/aristainetos2_defconfig @@ -2,8 +2,8 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SYS_MALLOC_F_LEN=0xe000 -CONFIG_TARGET_ARISTAINETOS2=y CONFIG_ENV_OFFSET=0xD0000 +CONFIG_TARGET_ARISTAINETOS2=y CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET_REDUND=0xE0000 diff --git a/configs/aristainetos2b_defconfig b/configs/aristainetos2b_defconfig index d1a20b643ec..318b81e331c 100644 --- a/configs/aristainetos2b_defconfig +++ b/configs/aristainetos2b_defconfig @@ -2,8 +2,8 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SYS_MALLOC_F_LEN=0xe000 -CONFIG_TARGET_ARISTAINETOS2B=y CONFIG_ENV_OFFSET=0xD0000 +CONFIG_TARGET_ARISTAINETOS2B=y CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET_REDUND=0xE0000 diff --git a/configs/aristainetos2bcsl_defconfig b/configs/aristainetos2bcsl_defconfig index 712e6324603..0ff67a44cbe 100644 --- a/configs/aristainetos2bcsl_defconfig +++ b/configs/aristainetos2bcsl_defconfig @@ -2,8 +2,8 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SYS_MALLOC_F_LEN=0xe000 -CONFIG_TARGET_ARISTAINETOS2BCSL=y CONFIG_ENV_OFFSET=0xD0000 +CONFIG_TARGET_ARISTAINETOS2BCSL=y CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET_REDUND=0xE0000 diff --git a/configs/aristainetos2c_defconfig b/configs/aristainetos2c_defconfig index 86119158771..ffd4360159f 100644 --- a/configs/aristainetos2c_defconfig +++ b/configs/aristainetos2c_defconfig @@ -2,8 +2,8 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SYS_MALLOC_F_LEN=0xe000 -CONFIG_TARGET_ARISTAINETOS2C=y CONFIG_ENV_OFFSET=0xD0000 +CONFIG_TARGET_ARISTAINETOS2C=y CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET_REDUND=0xE0000 diff --git a/configs/armadillo-800eva_defconfig b/configs/armadillo-800eva_defconfig index d1607086009..ec352213253 100644 --- a/configs/armadillo-800eva_defconfig +++ b/configs/armadillo-800eva_defconfig @@ -36,6 +36,8 @@ CONFIG_CMD_PING=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0x40000 # CONFIG_MMC is not set +CONFIG_BITBANGMII=y +CONFIG_PHY_SMSC=y CONFIG_SH_ETHER=y CONFIG_SCIF_CONSOLE=y CONFIG_OF_LIBFDT=y diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig b/configs/at91sam9260ek_dataflash_cs0_defconfig index 3d5176f6a59..854ea4fdf28 100644 --- a/configs/at91sam9260ek_dataflash_cs0_defconfig +++ b/configs/at91sam9260ek_dataflash_cs0_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x4200 -CONFIG_ENV_SECT_SIZE=0x210 CONFIG_ENV_OFFSET=0x4200 +CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig b/configs/at91sam9260ek_dataflash_cs1_defconfig index a78117a3c70..4fbcd31225a 100644 --- a/configs/at91sam9260ek_dataflash_cs1_defconfig +++ b/configs/at91sam9260ek_dataflash_cs1_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x4200 -CONFIG_ENV_SECT_SIZE=0x210 CONFIG_ENV_OFFSET=0x4200 +CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig index 607d181b56a..65851258b4e 100644 --- a/configs/at91sam9261ek_dataflash_cs0_defconfig +++ b/configs/at91sam9261ek_dataflash_cs0_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_AT91SAM9261EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x4200 -CONFIG_ENV_SECT_SIZE=0x210 CONFIG_ENV_OFFSET=0x4200 +CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig index 30e27a4e365..f04e454c4e5 100644 --- a/configs/at91sam9261ek_dataflash_cs3_defconfig +++ b/configs/at91sam9261ek_dataflash_cs3_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_AT91SAM9261EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x4200 -CONFIG_ENV_SECT_SIZE=0x210 CONFIG_ENV_OFFSET=0x4200 +CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig b/configs/at91sam9263ek_dataflash_cs0_defconfig index a03be17862e..bf824771f2b 100644 --- a/configs/at91sam9263ek_dataflash_cs0_defconfig +++ b/configs/at91sam9263ek_dataflash_cs0_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x21F00000 CONFIG_TARGET_AT91SAM9263EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x4200 -CONFIG_ENV_SECT_SIZE=0x210 CONFIG_ENV_OFFSET=0x4200 +CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y diff --git a/configs/at91sam9263ek_dataflash_defconfig b/configs/at91sam9263ek_dataflash_defconfig index a03be17862e..bf824771f2b 100644 --- a/configs/at91sam9263ek_dataflash_defconfig +++ b/configs/at91sam9263ek_dataflash_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x21F00000 CONFIG_TARGET_AT91SAM9263EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x4200 -CONFIG_ENV_SECT_SIZE=0x210 CONFIG_ENV_OFFSET=0x4200 +CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig index 827ad0e5b75..914dcde240d 100644 --- a/configs/at91sam9g10ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_AT91SAM9261EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x4200 -CONFIG_ENV_SECT_SIZE=0x210 CONFIG_ENV_OFFSET=0x4200 +CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig index c01f69720fe..bc11dbb4b6f 100644 --- a/configs/at91sam9g10ek_dataflash_cs3_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_AT91SAM9261EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x4200 -CONFIG_ENV_SECT_SIZE=0x210 CONFIG_ENV_OFFSET=0x4200 +CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y diff --git a/configs/at91sam9g20ek_dataflash_cs0_defconfig b/configs/at91sam9g20ek_dataflash_cs0_defconfig index 0a841fec114..cf1f5c0a1ca 100644 --- a/configs/at91sam9g20ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs0_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x4200 -CONFIG_ENV_SECT_SIZE=0x210 CONFIG_ENV_OFFSET=0x4200 +CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y diff --git a/configs/at91sam9g20ek_dataflash_cs1_defconfig b/configs/at91sam9g20ek_dataflash_cs1_defconfig index 18d951ad8ca..025cd2146e8 100644 --- a/configs/at91sam9g20ek_dataflash_cs1_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs1_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x4200 -CONFIG_ENV_SECT_SIZE=0x210 CONFIG_ENV_OFFSET=0x4200 +CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig index f816d27a555..be8ef51a2d8 100644 --- a/configs/at91sam9n12ek_spiflash_defconfig +++ b/configs/at91sam9n12ek_spiflash_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9N12EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x3000 -CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x5000 +CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y diff --git a/configs/at91sam9rlek_dataflash_defconfig b/configs/at91sam9rlek_dataflash_defconfig index 6c2547006f7..e63b061e4f7 100644 --- a/configs/at91sam9rlek_dataflash_defconfig +++ b/configs/at91sam9rlek_dataflash_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x21F00000 CONFIG_TARGET_AT91SAM9RLEK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x4200 -CONFIG_ENV_SECT_SIZE=0x210 CONFIG_ENV_OFFSET=0x4200 +CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig index 64f7fffd0da..c43a5cb63e5 100644 --- a/configs/at91sam9x5ek_dataflash_defconfig +++ b/configs/at91sam9x5ek_dataflash_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x4200 -CONFIG_ENV_SECT_SIZE=0x210 CONFIG_ENV_OFFSET=0x4200 +CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig index 792d46f5143..f418bfbf160 100644 --- a/configs/at91sam9x5ek_spiflash_defconfig +++ b/configs/at91sam9x5ek_spiflash_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x3000 -CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x5000 +CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y diff --git a/configs/at91sam9xeek_dataflash_cs0_defconfig b/configs/at91sam9xeek_dataflash_cs0_defconfig index d637d3629dc..6ef25742168 100644 --- a/configs/at91sam9xeek_dataflash_cs0_defconfig +++ b/configs/at91sam9xeek_dataflash_cs0_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x4200 -CONFIG_ENV_SECT_SIZE=0x210 CONFIG_ENV_OFFSET=0x4200 +CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y diff --git a/configs/at91sam9xeek_dataflash_cs1_defconfig b/configs/at91sam9xeek_dataflash_cs1_defconfig index 06288ce4eb5..3e7d2bed93f 100644 --- a/configs/at91sam9xeek_dataflash_cs1_defconfig +++ b/configs/at91sam9xeek_dataflash_cs1_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x4200 -CONFIG_ENV_SECT_SIZE=0x210 CONFIG_ENV_OFFSET=0x4200 +CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig index fcfdd0d8671..91f74e5898f 100644 --- a/configs/axs101_defconfig +++ b/configs/axs101_defconfig @@ -28,7 +28,6 @@ CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="axs101" CONFIG_ENV_IS_IN_FAT=y -CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig index 29f5a2aaf5d..ab5f6993274 100644 --- a/configs/axs103_defconfig +++ b/configs/axs103_defconfig @@ -28,7 +28,6 @@ CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="axs103" CONFIG_ENV_IS_IN_FAT=y -CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/bananapi_m1_plus_defconfig b/configs/bananapi_m1_plus_defconfig index 3813b6e89ad..e533555c3ba 100644 --- a/configs/bananapi_m1_plus_defconfig +++ b/configs/bananapi_m1_plus_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapi-m1-plus" CONFIG_NETCONSOLE=y CONFIG_SCSI_AHCI=y +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y CONFIG_MII=y diff --git a/configs/bayleybay_defconfig b/configs/bayleybay_defconfig index 3b4d5de8ad8..80a817a3f32 100644 --- a/configs/bayleybay_defconfig +++ b/configs/bayleybay_defconfig @@ -1,8 +1,8 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0xFFF00000 CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x6FF000 +CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_NR_DRAM_BANKS=8 CONFIG_VENDOR_INTEL=y CONFIG_TARGET_BAYLEYBAY=y diff --git a/configs/bcm7445_defconfig b/configs/bcm7445_defconfig index 20526d05dc6..0ae0595903c 100644 --- a/configs/bcm7445_defconfig +++ b/configs/bcm7445_defconfig @@ -3,8 +3,8 @@ CONFIG_ARCH_BCMSTB=y CONFIG_SYS_TEXT_BASE=0x80100000 CONFIG_TARGET_BCM7445=y CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1E0000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_OFFSET_REDUND=0x1F0000 CONFIG_FIT=y diff --git a/configs/bcm911360_entphn-ns_defconfig b/configs/bcm911360_entphn-ns_defconfig index cca6558c5b3..58069711b68 100644 --- a/configs/bcm911360_entphn-ns_defconfig +++ b/configs/bcm911360_entphn-ns_defconfig @@ -21,6 +21,7 @@ CONFIG_CMD_TIME=y CONFIG_CMD_FAT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_MMC is not set +CONFIG_PHY_BROADCOM=y CONFIG_CONS_INDEX=3 CONFIG_SYS_NS16550=y CONFIG_SHA1=y diff --git a/configs/bcm911360_entphn_defconfig b/configs/bcm911360_entphn_defconfig index 710d02599da..9fbaa4edb1e 100644 --- a/configs/bcm911360_entphn_defconfig +++ b/configs/bcm911360_entphn_defconfig @@ -21,6 +21,7 @@ CONFIG_CMD_TIME=y CONFIG_CMD_FAT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_MMC is not set +CONFIG_PHY_BROADCOM=y CONFIG_CONS_INDEX=3 CONFIG_SYS_NS16550=y CONFIG_SHA1=y diff --git a/configs/bcm911360k_defconfig b/configs/bcm911360k_defconfig index 6ff9bb73411..33015dc4175 100644 --- a/configs/bcm911360k_defconfig +++ b/configs/bcm911360k_defconfig @@ -21,6 +21,7 @@ CONFIG_CMD_TIME=y CONFIG_CMD_FAT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_MMC is not set +CONFIG_PHY_BROADCOM=y CONFIG_CONS_INDEX=3 CONFIG_SYS_NS16550=y CONFIG_SHA1=y diff --git a/configs/bcm958300k-ns_defconfig b/configs/bcm958300k-ns_defconfig index 19eca9d5df1..f30f1bf7dfc 100644 --- a/configs/bcm958300k-ns_defconfig +++ b/configs/bcm958300k-ns_defconfig @@ -21,6 +21,7 @@ CONFIG_CMD_TIME=y CONFIG_CMD_FAT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_MMC is not set +CONFIG_PHY_BROADCOM=y CONFIG_CONS_INDEX=3 CONFIG_SYS_NS16550=y CONFIG_SHA1=y diff --git a/configs/bcm958300k_defconfig b/configs/bcm958300k_defconfig index 6ff9bb73411..33015dc4175 100644 --- a/configs/bcm958300k_defconfig +++ b/configs/bcm958300k_defconfig @@ -21,6 +21,7 @@ CONFIG_CMD_TIME=y CONFIG_CMD_FAT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_MMC is not set +CONFIG_PHY_BROADCOM=y CONFIG_CONS_INDEX=3 CONFIG_SYS_NS16550=y CONFIG_SHA1=y diff --git a/configs/bcm958305k_defconfig b/configs/bcm958305k_defconfig index 6ff9bb73411..33015dc4175 100644 --- a/configs/bcm958305k_defconfig +++ b/configs/bcm958305k_defconfig @@ -21,6 +21,7 @@ CONFIG_CMD_TIME=y CONFIG_CMD_FAT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_MMC is not set +CONFIG_PHY_BROADCOM=y CONFIG_CONS_INDEX=3 CONFIG_SYS_NS16550=y CONFIG_SHA1=y diff --git a/configs/birdland_bav335a_defconfig b/configs/birdland_bav335a_defconfig index b4fcccf27d3..87dae5950b9 100644 --- a/configs/birdland_bav335a_defconfig +++ b/configs/birdland_bav335a_defconfig @@ -51,6 +51,7 @@ CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHY_SMSC=y CONFIG_MII=y CONFIG_DRIVER_TI_CPSW=y CONFIG_SPI=y diff --git a/configs/birdland_bav335b_defconfig b/configs/birdland_bav335b_defconfig index b9f8bcab4bb..5ee9878a550 100644 --- a/configs/birdland_bav335b_defconfig +++ b/configs/birdland_bav335b_defconfig @@ -51,6 +51,7 @@ CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHY_SMSC=y CONFIG_MII=y CONFIG_DRIVER_TI_CPSW=y CONFIG_SPI=y diff --git a/configs/blanche_defconfig b/configs/blanche_defconfig index 64b7bccfb45..137acceea07 100644 --- a/configs/blanche_defconfig +++ b/configs/blanche_defconfig @@ -5,8 +5,8 @@ CONFIG_ARCH_RMOBILE=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_ENV_SIZE=0x40000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x40000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_ARCH_RMOBILE_BOARD_STRING="Blanche" CONFIG_R8A7792=y diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig index 59c2e2af9a1..09370b7ed05 100644 --- a/configs/brppt1_mmc_defconfig +++ b/configs/brppt1_mmc_defconfig @@ -46,6 +46,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y +CONFIG_CMD_BKOPS_ENABLE=y CONFIG_CMD_PART=y CONFIG_CMD_USB=y # CONFIG_CMD_ITEST is not set @@ -54,7 +55,6 @@ CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_BOOTCOUNT=y -CONFIG_CMD_BKOPS_ENABLE=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_EXT4=y diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig index a8a71d195be..964b22b1009 100644 --- a/configs/brppt1_spi_defconfig +++ b/configs/brppt1_spi_defconfig @@ -5,8 +5,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x20000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_AM33XX=y CONFIG_TARGET_BRPPT1=y @@ -39,7 +40,6 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y @@ -53,6 +53,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y +CONFIG_CMD_BKOPS_ENABLE=y CONFIG_CMD_PART=y CONFIG_CMD_USB=y # CONFIG_CMD_ITEST is not set @@ -61,7 +62,6 @@ CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_BOOTCOUNT=y -CONFIG_CMD_BKOPS_ENABLE=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_EXT4=y diff --git a/configs/brppt2_defconfig b/configs/brppt2_defconfig index 4fde3b963c3..c4eb03bde07 100644 --- a/configs/brppt2_defconfig +++ b/configs/brppt2_defconfig @@ -8,10 +8,11 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x1000 -CONFIG_TARGET_BRPPT2=y CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x20000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 +CONFIG_TARGET_BRPPT2=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SYS_BOOTCOUNT_ADDR=0x020CC068 CONFIG_NR_DRAM_BANKS=1 @@ -33,7 +34,6 @@ CONFIG_SPL_BOARD_INIT=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_ELF is not set diff --git a/configs/brsmarc1_defconfig b/configs/brsmarc1_defconfig index bb710148282..a7cf98fc746 100644 --- a/configs/brsmarc1_defconfig +++ b/configs/brsmarc1_defconfig @@ -5,8 +5,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x20000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_AM33XX=y CONFIG_SYS_MPUCLK=600 @@ -38,7 +39,6 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_BOOTD is not set diff --git a/configs/cgtqmx6eval_defconfig b/configs/cgtqmx6eval_defconfig index 48d3498d30d..a934336f415 100644 --- a/configs/cgtqmx6eval_defconfig +++ b/configs/cgtqmx6eval_defconfig @@ -4,10 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_CGTQMX6EVAL=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 +CONFIG_TARGET_CGTQMX6EVAL=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 @@ -28,7 +29,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="CGT-QMX6-Quad U-Boot > " @@ -64,6 +64,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y diff --git a/configs/cherryhill_defconfig b/configs/cherryhill_defconfig index e3c26075ec0..c3ad39c7253 100644 --- a/configs/cherryhill_defconfig +++ b/configs/cherryhill_defconfig @@ -1,8 +1,8 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0xFFE00000 CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x5F0000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_NR_DRAM_BANKS=8 CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 diff --git a/configs/chiliboard_defconfig b/configs/chiliboard_defconfig index 4c118a615a7..30100a3151d 100644 --- a/configs/chiliboard_defconfig +++ b/configs/chiliboard_defconfig @@ -45,6 +45,7 @@ CONFIG_DM_MMC=y CONFIG_MMC_OMAP_HS=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_DRIVER_TI_CPSW=y diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index a0b1c8d87e7..b1ad7bdd1dc 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y # CONFIG_SPL_USE_ARCH_MEMCPY is not set CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_ROCKCHIP_RK3288=y # CONFIG_SPL_MMC_SUPPORT is not set CONFIG_TARGET_CHROMEBIT_MICKEY=y @@ -11,8 +12,9 @@ CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0xff704000 +CONFIG_SPL_PAYLOAD="u-boot.img" +CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-mickey.dtb" # CONFIG_DISPLAY_CPUINFO is not set @@ -22,9 +24,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set # CONFIG_SPL_CRC32_SUPPORT is not set -CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig index 439c8cb0cec..4f606e7ec9f 100644 --- a/configs/chromebook_bob_defconfig +++ b/configs/chromebook_bob_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_ROCKCHIP_RK3399=y CONFIG_ROCKCHIP_BOOT_MODE_REG=0 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 @@ -12,8 +13,8 @@ CONFIG_DEBUG_UART_BASE=0xff1a0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0xff8c2000 +CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -21,7 +22,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index 67713ba8833..2039ea61866 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -7,6 +7,7 @@ CONFIG_BOOTSTAGE_STASH_ADDR=0xfef00000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xde000000 CONFIG_DEBUG_UART_CLOCK=1843200 +CONFIG_SPL_TEXT_BASE=0xfef10000 CONFIG_VENDOR_GOOGLE=y CONFIG_TARGET_CHROMEBOOK_CORAL=y CONFIG_DEBUG_UART=y @@ -15,7 +16,6 @@ CONFIG_HAVE_ACPI_RESUME=y CONFIG_INTEL_CAR_CQOS=y CONFIG_X86_OFFSET_U_BOOT=0xffe00000 CONFIG_X86_OFFSET_SPL=0xffe80000 -CONFIG_SPL_TEXT_BASE=0xfef10000 CONFIG_BOOTSTAGE=y CONFIG_SPL_BOOTSTAGE=y CONFIG_TPL_BOOTSTAGE=y diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index 7ba0c9566aa..16eee2238b9 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y # CONFIG_SPL_USE_ARCH_MEMCPY is not set CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_ROCKCHIP_RK3288=y # CONFIG_SPL_MMC_SUPPORT is not set CONFIG_SPL_STACK_R_ADDR=0x80000 @@ -10,8 +11,9 @@ CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0xff704000 +CONFIG_SPL_PAYLOAD="u-boot.img" +CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_SILENT_CONSOLE=y CONFIG_LOG=y @@ -24,9 +26,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set # CONFIG_SPL_CRC32_SUPPORT is not set -CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig index 5abd690b00d..a13f6eac80a 100644 --- a/configs/chromebook_link64_defconfig +++ b/configs/chromebook_link64_defconfig @@ -1,12 +1,13 @@ CONFIG_X86=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_NR_DRAM_BANKS=8 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 +CONFIG_SPL_TEXT_BASE=0xfffd0000 CONFIG_X86_RUN_64BIT=y CONFIG_VENDOR_GOOGLE=y CONFIG_TARGET_CHROMEBOOK_LINK64=y @@ -14,7 +15,6 @@ CONFIG_DEBUG_UART=y CONFIG_HAVE_MRC=y CONFIG_SMP=y CONFIG_HAVE_VGA_BIOS=y -CONFIG_SPL_TEXT_BASE=0xfffd0000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y CONFIG_BOOTSTAGE=y diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig index 6ef9a271b0a..de4186cdf23 100644 --- a/configs/chromebook_link_defconfig +++ b/configs/chromebook_link_defconfig @@ -2,8 +2,8 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0xFFF00000 CONFIG_SYS_MALLOC_F_LEN=0x2400 CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_NR_DRAM_BANKS=8 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x3f8 diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index 46e1c183a2b..2c0415431f7 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y # CONFIG_SPL_USE_ARCH_MEMCPY is not set CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_ROCKCHIP_RK3288=y # CONFIG_SPL_MMC_SUPPORT is not set CONFIG_TARGET_CHROMEBOOK_MINNIE=y @@ -11,8 +12,9 @@ CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0xff704000 +CONFIG_SPL_PAYLOAD="u-boot.img" +CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_SILENT_CONSOLE=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-minnie.dtb" @@ -23,9 +25,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set # CONFIG_SPL_CRC32_SUPPORT is not set -CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/chromebook_samus_defconfig b/configs/chromebook_samus_defconfig index 2f101c4adb0..fb4d88028c6 100644 --- a/configs/chromebook_samus_defconfig +++ b/configs/chromebook_samus_defconfig @@ -2,8 +2,8 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0xFFE00000 CONFIG_SYS_MALLOC_F_LEN=0x1d00 CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_NR_DRAM_BANKS=8 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x3f8 diff --git a/configs/chromebook_samus_tpl_defconfig b/configs/chromebook_samus_tpl_defconfig index cd1cc5ffa1b..a12a04b0bf1 100644 --- a/configs/chromebook_samus_tpl_defconfig +++ b/configs/chromebook_samus_tpl_defconfig @@ -2,12 +2,13 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0xffed0000 CONFIG_SYS_MALLOC_F_LEN=0x1a00 CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_NR_DRAM_BANKS=8 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 +CONFIG_SPL_TEXT_BASE=0xffe70000 CONFIG_VENDOR_GOOGLE=y CONFIG_TARGET_CHROMEBOOK_SAMUS_TPL=y CONFIG_DEBUG_UART=y @@ -16,7 +17,6 @@ CONFIG_HAVE_REFCODE=y CONFIG_SMP=y CONFIG_HAVE_VGA_BIOS=y CONFIG_X86_OFFSET_U_BOOT=0xfff00000 -CONFIG_SPL_TEXT_BASE=0xffe70000 CONFIG_BOOTSTAGE=y CONFIG_BOOTSTAGE_REPORT=y CONFIG_SHOW_BOOT_PROGRESS=y diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig index 34cf727abc5..b4116a34e6c 100644 --- a/configs/chromebook_speedy_defconfig +++ b/configs/chromebook_speedy_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y # CONFIG_SPL_USE_ARCH_MEMCPY is not set CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_ROCKCHIP_RK3288=y # CONFIG_SPL_MMC_SUPPORT is not set CONFIG_TARGET_CHROMEBOOK_SPEEDY=y @@ -11,8 +12,9 @@ CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0xff704000 +CONFIG_SPL_PAYLOAD="u-boot.img" +CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_SILENT_CONSOLE=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-speedy.dtb" @@ -24,9 +26,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set # CONFIG_SPL_CRC32_SUPPORT is not set -CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/chromebox_panther_defconfig b/configs/chromebox_panther_defconfig index 0c970c85747..48bcd94a626 100644 --- a/configs/chromebox_panther_defconfig +++ b/configs/chromebox_panther_defconfig @@ -1,8 +1,8 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0xFFF00000 CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_NR_DRAM_BANKS=8 CONFIG_VENDOR_GOOGLE=y CONFIG_TARGET_CHROMEBOX_PANTHER=y diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig index 2e88880b184..d2766190dea 100644 --- a/configs/cl-som-imx7_defconfig +++ b/configs/cl-som-imx7_defconfig @@ -5,8 +5,8 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_TARGET_CL_SOM_IMX7=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -44,6 +44,7 @@ CONFIG_CMD_SF=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y +# CONFIG_CMD_MDIO is not set CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y @@ -71,6 +72,8 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y CONFIG_MII=y CONFIG_DM_REGULATOR=y CONFIG_SPI=y diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig index 1566a4ff82e..449c3a435ea 100644 --- a/configs/clearfog_defconfig +++ b/configs/clearfog_defconfig @@ -14,9 +14,9 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 +CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_DEBUG_UART=y CONFIG_AHCI=y -CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y @@ -31,7 +31,6 @@ CONFIG_SPL_CMD_TLV_EEPROM=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y -CONFIG_CMD_MVEBU_BUBT=y CONFIG_CMD_PCI=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y @@ -39,6 +38,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y +CONFIG_CMD_MVEBU_BUBT=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog" CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/clearfog_gt_8k_defconfig b/configs/clearfog_gt_8k_defconfig index 0823f346678..2b6445a3f13 100644 --- a/configs/clearfog_gt_8k_defconfig +++ b/configs/clearfog_gt_8k_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_MVEBU_ARMADA_8K=y CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x180000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=2 CONFIG_DEBUG_UART_BASE=0xf0512000 diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index d2de5cfe659..edaa8e24a54 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -4,10 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_CM_FX6=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 +CONFIG_TARGET_CM_FX6=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 @@ -15,8 +16,8 @@ CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x00908000 +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" @@ -29,7 +30,6 @@ CONFIG_BOUNCE_BUFFER=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x80 CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SYS_PROMPT="CM-FX6 # " # CONFIG_CMD_XIMG is not set @@ -78,6 +78,7 @@ CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_DM_PMIC=y diff --git a/configs/cm_t335_defconfig b/configs/cm_t335_defconfig index 6c727120603..51351669fee 100644 --- a/configs/cm_t335_defconfig +++ b/configs/cm_t335_defconfig @@ -50,6 +50,7 @@ CONFIG_LED_STATUS_BOOT=0 CONFIG_MMC_OMAP_HS=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_ATHEROS=y CONFIG_MII=y CONFIG_DRIVER_TI_CPSW=y CONFIG_FAT_WRITE=y diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig index 1e245c6aa72..94b051ad4f9 100644 --- a/configs/cm_t43_defconfig +++ b/configs/cm_t43_defconfig @@ -4,8 +4,9 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x4000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_AM43XX=y CONFIG_TARGET_CM_T43=y @@ -31,7 +32,6 @@ CONFIG_SPL_MTD_SUPPORT=y # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_PROMPT="CM-T43 # " CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y @@ -68,6 +68,7 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHY_ATHEROS=y CONFIG_MII=y CONFIG_DRIVER_TI_CPSW=y CONFIG_DM_SERIAL=y diff --git a/configs/colibri-imx6ull_defconfig b/configs/colibri-imx6ull_defconfig index c9005a7d07d..7e997552e35 100644 --- a/configs/colibri-imx6ull_defconfig +++ b/configs/colibri-imx6ull_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 -CONFIG_TARGET_COLIBRI_IMX6ULL=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x380000 +CONFIG_TARGET_COLIBRI_IMX6ULL=y CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 82f71ecf7ce..8fbd9fcf1fd 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_COLIBRI_IMX6=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 +CONFIG_TARGET_COLIBRI_IMX6=y CONFIG_DM_GPIO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y diff --git a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig index f29c56a7ef9..abf52630816 100644 --- a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig +++ b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig @@ -1,8 +1,8 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0xFFF00000 CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x6EF000 +CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_NR_DRAM_BANKS=8 CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 diff --git a/configs/conga-qeval20-qa3-e3845_defconfig b/configs/conga-qeval20-qa3-e3845_defconfig index 0780adbcd64..aac0ed2928c 100644 --- a/configs/conga-qeval20-qa3-e3845_defconfig +++ b/configs/conga-qeval20-qa3-e3845_defconfig @@ -1,8 +1,8 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0xFFF00000 CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x6EF000 +CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_NR_DRAM_BANKS=8 CONFIG_VENDOR_CONGATEC=y CONFIG_TARGET_CONGA_QEVAL20_QA3_E3845=y diff --git a/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig b/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig index edabb84c13b..90fe803ac8e 100644 --- a/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig +++ b/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig @@ -44,7 +44,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 diff --git a/configs/controlcenterd_36BIT_SDCARD_defconfig b/configs/controlcenterd_36BIT_SDCARD_defconfig index fb851883850..55a46c3c29a 100644 --- a/configs/controlcenterd_36BIT_SDCARD_defconfig +++ b/configs/controlcenterd_36BIT_SDCARD_defconfig @@ -44,7 +44,15 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig index 524dbc2b39b..4ac46ff7594 100644 --- a/configs/controlcenterdc_defconfig +++ b/configs/controlcenterdc_defconfig @@ -6,17 +6,18 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_CONTROLCENTERDC=y CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x30000 CONFIG_DM_GPIO=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 +CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_DEBUG_UART=y CONFIG_AHCI=y -CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y @@ -26,7 +27,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x30000 CONFIG_HUSH_PARSER=y # CONFIG_CMD_ELF is not set # CONFIG_CMD_GO is not set @@ -62,6 +62,7 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_MV=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_SPI_FLASH_STMICRO=y +CONFIG_BITBANGMII=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVNETA=y diff --git a/configs/cougarcanyon2_defconfig b/configs/cougarcanyon2_defconfig index 6fc90bcd00f..aac8a391fdc 100644 --- a/configs/cougarcanyon2_defconfig +++ b/configs/cougarcanyon2_defconfig @@ -1,8 +1,8 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0xFFE00000 CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x5FF000 +CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_NR_DRAM_BANKS=8 CONFIG_VENDOR_INTEL=y CONFIG_TARGET_COUGARCANYON2=y diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig index 6f56cb47861..06d5ce4cad9 100644 --- a/configs/crownbay_defconfig +++ b/configs/crownbay_defconfig @@ -1,9 +1,9 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0xFFF00000 -CONFIG_MAX_CPUS=2 CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x0 +CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_MAX_CPUS=2 CONFIG_NR_DRAM_BANKS=8 CONFIG_VENDOR_INTEL=y CONFIG_TARGET_CROWNBAY=y diff --git a/configs/crs305-1g-4s_defconfig b/configs/crs305-1g-4s_defconfig index 257dbc16e90..3b513cc1582 100644 --- a/configs/crs305-1g-4s_defconfig +++ b/configs/crs305-1g-4s_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x00800000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_CRS305_1G_4S=y CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_BUILD_TARGET="u-boot.kwb" CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig index eea3e0abe31..41ed344e73e 100644 --- a/configs/d2net_v2_defconfig +++ b/configs/d2net_v2_defconfig @@ -5,8 +5,8 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NET2BIG_V2=y CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x70000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_NR_DRAM_BANKS=2 CONFIG_IDENT_STRING=" D2 v2" CONFIG_SYS_EXTRA_OPTIONS="D2NET_V2" diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index bee44a076fd..ee49ed29e64 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -8,8 +8,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x800 CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x80000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x8000 CONFIG_DM_GPIO=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 @@ -29,7 +30,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x8000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot > " CONFIG_CRC32_VERIFY=y diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig index 226b201272e..bc2c0a2c254 100644 --- a/configs/da850evm_nand_defconfig +++ b/configs/da850evm_nand_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x800 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x0 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x8000 CONFIG_DM_GPIO=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y @@ -27,7 +28,6 @@ CONFIG_SPL_SEPARATE_BSS=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x8000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot > " CONFIG_CRC32_VERIFY=y diff --git a/configs/db-88f6281-bp-nand_defconfig b/configs/db-88f6281-bp-nand_defconfig index e7a8b406dde..e3904237800 100644 --- a/configs/db-88f6281-bp-nand_defconfig +++ b/configs/db-88f6281-bp-nand_defconfig @@ -6,8 +6,8 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_DB_88F6281_BP=y CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_NR_DRAM_BANKS=2 CONFIG_IDENT_STRING="\nMarvell DB-88F6281-BP" # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/db-88f6281-bp-spi_defconfig b/configs/db-88f6281-bp-spi_defconfig index ec63ffb4b7a..1bef1c5bb36 100644 --- a/configs/db-88f6281-bp-spi_defconfig +++ b/configs/db-88f6281-bp-spi_defconfig @@ -6,8 +6,8 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_DB_88F6281_BP=y CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_NR_DRAM_BANKS=2 CONFIG_IDENT_STRING="\nMarvell DB-88F6281-BP" # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig index 068f76bbe46..e5a18d8096d 100644 --- a/configs/db-88f6720_defconfig +++ b/configs/db-88f6720_defconfig @@ -7,15 +7,16 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_DB_88F6720=y CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x40004030 +CONFIG_DEBUG_UART=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y @@ -23,7 +24,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_I2C_SUPPORT=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_CMD_I2C=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig index e231ca4673b..146ea50b890 100644 --- a/configs/db-88f6820-amc_defconfig +++ b/configs/db-88f6820-amc_defconfig @@ -7,15 +7,16 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_DB_88F6820_AMC=y CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=200000000 -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x40000030 +CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_BOOTDELAY=3 @@ -24,7 +25,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_I2C_SUPPORT=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig index c8661310258..20848abae29 100644 --- a/configs/db-88f6820-gp_defconfig +++ b/configs/db-88f6820-gp_defconfig @@ -7,16 +7,17 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_DB_88F6820_GP=y CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 +CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_DEBUG_UART=y CONFIG_AHCI=y -CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -24,7 +25,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SPL_I2C_SUPPORT=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000 CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig index 012149a8600..ab966228738 100644 --- a/configs/db-mv784mp-gp_defconfig +++ b/configs/db-mv784mp-gp_defconfig @@ -7,15 +7,16 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_DB_MV784MP_GP=y CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x40004030 +CONFIG_DEBUG_UART=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y @@ -23,7 +24,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_I2C_SUPPORT=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y diff --git a/configs/db-xc3-24g4xg_defconfig b/configs/db-xc3-24g4xg_defconfig index 425d7856dfd..0d49d406cab 100644 --- a/configs/db-xc3-24g4xg_defconfig +++ b/configs/db-xc3-24g4xg_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x00800000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_DB_XC3_24G4XG=y CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_BUILD_TARGET="u-boot.kwb" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig index 1b061cd8d45..d8a81d755a2 100644 --- a/configs/devkit3250_defconfig +++ b/configs/devkit3250_defconfig @@ -48,6 +48,7 @@ CONFIG_SPL_NAND_SIMPLE=y CONFIG_PHYLIB=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_ADDR=31 +CONFIG_PHY_SMSC=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_USB=y diff --git a/configs/dfi-bt700-q7x-151_defconfig b/configs/dfi-bt700-q7x-151_defconfig index 71b1a2fa8b0..fdf686f9566 100644 --- a/configs/dfi-bt700-q7x-151_defconfig +++ b/configs/dfi-bt700-q7x-151_defconfig @@ -1,8 +1,8 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0xFFF00000 CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x6EF000 +CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_NR_DRAM_BANKS=8 CONFIG_VENDOR_DFI=y CONFIG_SMP=y diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index 40de1d82031..dcfbbb6d5a5 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -4,11 +4,12 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_MX6_DDRCAL=y -CONFIG_TARGET_DHCOMIMX6=y CONFIG_ENV_SIZE=0x4000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x11400 +CONFIG_MX6_DDRCAL=y +CONFIG_TARGET_DHCOMIMX6=y CONFIG_DM_GPIO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -18,8 +19,8 @@ CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x110000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x00908000 +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT=y @@ -30,7 +31,6 @@ CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOUNCE_BUFFER=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x11400 CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_UNZIP=y diff --git a/configs/display5_defconfig b/configs/display5_defconfig index 9026c17f3fb..4e10efd7587 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -5,14 +5,15 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x1000 +CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_OFFSET=0x120000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_MX6_DDRCAL=y CONFIG_TARGET_DISPLAY5=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y -CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_ENV_OFFSET=0x120000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 @@ -41,7 +42,6 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_FORCE_MMC_BOOT=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="display5 > " diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig index 710fef4a208..eb46e3b256d 100644 --- a/configs/display5_factory_defconfig +++ b/configs/display5_factory_defconfig @@ -5,14 +5,15 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x1000 +CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_OFFSET=0x120000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_MX6_DDRCAL=y CONFIG_TARGET_DISPLAY5=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y -CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_ENV_OFFSET=0x120000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 @@ -37,7 +38,6 @@ CONFIG_SPL_DMA=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SPL_USB_HOST_SUPPORT=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y diff --git a/configs/dms-ba16-1g_defconfig b/configs/dms-ba16-1g_defconfig index a23377f8425..07395270376 100644 --- a/configs/dms-ba16-1g_defconfig +++ b/configs/dms-ba16-1g_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_TARGET_ADVANTECH_DMS_BA16=y -CONFIG_SYS_DDR_1G=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_TARGET_ADVANTECH_DMS_BA16=y +CONFIG_SYS_DDR_1G=y CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=1 # CONFIG_CONSOLE_MUX is not set @@ -43,6 +43,7 @@ CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y CONFIG_MII=y CONFIG_PWM_IMX=y CONFIG_SPI=y diff --git a/configs/dms-ba16_defconfig b/configs/dms-ba16_defconfig index 8ea6a70865f..03a2c59bad0 100644 --- a/configs/dms-ba16_defconfig +++ b/configs/dms-ba16_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_TARGET_ADVANTECH_DMS_BA16=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_TARGET_ADVANTECH_DMS_BA16=y CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=1 # CONFIG_CONSOLE_MUX is not set @@ -42,6 +42,7 @@ CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y CONFIG_MII=y CONFIG_PWM_IMX=y CONFIG_SPI=y diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index 4d765da4e05..e4547d9dcc8 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_SYS_MALLOC_F_LEN=0x18000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_OMAP54XX=y CONFIG_TARGET_DRA7XX_EVM=y @@ -11,8 +12,8 @@ CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_ARMV7_LPAE=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x40300000 +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SPL_LOAD_FIT=y CONFIG_OF_BOARD_SETUP=y @@ -29,7 +30,6 @@ CONFIG_SPL_DMA=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y CONFIG_CMD_SPL=y diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index c25d4ce5c14..c08bcce9038 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_SYS_MALLOC_F_LEN=0x18000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_OMAP54XX=y CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000 @@ -34,7 +35,6 @@ CONFIG_SPL_DMA=y # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y # CONFIG_CMD_FLASH is not set diff --git a/configs/dra7xx_hs_evm_usb_defconfig b/configs/dra7xx_hs_evm_usb_defconfig index 8e74496b2cc..879c2b650be 100644 --- a/configs/dra7xx_hs_evm_usb_defconfig +++ b/configs/dra7xx_hs_evm_usb_defconfig @@ -4,6 +4,7 @@ CONFIG_TI_SECURE_DEVICE=y CONFIG_ISW_ENTRY_ADDR=0x40306d50 CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_SYS_MALLOC_F_LEN=0x18000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_OMAP54XX=y CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000 @@ -16,8 +17,8 @@ CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_ARMV7_LPAE=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x40306D50 +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_IMAGE_POST_PROCESS=y CONFIG_SPL_LOAD_FIT=y @@ -36,7 +37,6 @@ CONFIG_SPL_DMA=y # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y diff --git a/configs/draco_defconfig b/configs/draco_defconfig index 1e1ea38a302..4c326211d76 100644 --- a/configs/draco_defconfig +++ b/configs/draco_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x2000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_AM33XX=y CONFIG_SYS_MPUCLK=300 CONFIG_TARGET_DRACO=y @@ -27,7 +28,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set @@ -73,6 +73,7 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_MTD_UBI_FASTMAP=y CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1 +CONFIG_PHY_SMSC=y CONFIG_DRIVER_TI_CPSW=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig index ebc3eb48729..566aa0dbf4f 100644 --- a/configs/dreamplug_defconfig +++ b/configs/dreamplug_defconfig @@ -5,8 +5,8 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_DREAMPLUG=y CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_NR_DRAM_BANKS=2 CONFIG_IDENT_STRING="\nMarvell-DreamPlug" # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/ds109_defconfig b/configs/ds109_defconfig index 0d7b895cc79..3f7a6614324 100644 --- a/configs/ds109_defconfig +++ b/configs/ds109_defconfig @@ -5,8 +5,8 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_DS109=y CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3D0000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_NR_DRAM_BANKS=2 # CONFIG_SYS_MALLOC_F is not set CONFIG_USE_PREBOOT=y diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig index 01a3909c8c0..7d395d1e26b 100644 --- a/configs/ds414_defconfig +++ b/configs/ds414_defconfig @@ -7,15 +7,16 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_DS414=y CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x7E0000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x40004030 +CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" @@ -24,7 +25,6 @@ CONFIG_PREBOOT="usb start; sf probe" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_I2C_SUPPORT=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000 # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y diff --git a/configs/e2220-1170_defconfig b/configs/e2220-1170_defconfig index 951ed1df55c..d9f110ce1e4 100644 --- a/configs/e2220-1170_defconfig +++ b/configs/e2220-1170_defconfig @@ -18,6 +18,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_PREFER_SERVERIP=y # CONFIG_CMD_NFS is not set CONFIG_CMD_EXT4_WRITE=y CONFIG_DEFAULT_DEVICE_TREE="tegra210-e2220-1170" @@ -43,4 +44,3 @@ CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y -CONFIG_BOOTP_PREFER_SERVERIP=y diff --git a/configs/elgin-rv1108_defconfig b/configs/elgin-rv1108_defconfig index b6682994f50..33da0f5f3e1 100644 --- a/configs/elgin-rv1108_defconfig +++ b/configs/elgin-rv1108_defconfig @@ -3,8 +3,8 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x60000000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ROCKCHIP_RV1108=y -CONFIG_TARGET_ELGIN_RV1108=y CONFIG_ROCKCHIP_BOOT_MODE_REG=0 +CONFIG_TARGET_ELGIN_RV1108=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0x10210000 CONFIG_DEBUG_UART_CLOCK=24000000 diff --git a/configs/emsdp_defconfig b/configs/emsdp_defconfig index ea67e647cae..edf4453e9e8 100644 --- a/configs/emsdp_defconfig +++ b/configs/emsdp_defconfig @@ -19,7 +19,6 @@ CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="emsdp" CONFIG_ENV_IS_IN_FAT=y -CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set diff --git a/configs/etamin_defconfig b/configs/etamin_defconfig index 424dc949c45..16202c848c5 100644 --- a/configs/etamin_defconfig +++ b/configs/etamin_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x980000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_AM33XX=y CONFIG_SYS_MPUCLK=300 CONFIG_TARGET_ETAMIN=y @@ -28,7 +29,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set @@ -74,6 +74,7 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_MTD_UBI_FASTMAP=y CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1 +CONFIG_PHY_SMSC=y CONFIG_DRIVER_TI_CPSW=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig index e9ad7a864db..3f90eaef26c 100644 --- a/configs/ethernut5_defconfig +++ b/configs/ethernut5_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x27000000 CONFIG_TARGET_ETHERNUT5=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x21000 -CONFIG_ENV_SECT_SIZE=0x21000 CONFIG_ENV_OFFSET=0x3DE000 +CONFIG_ENV_SECT_SIZE=0x21000 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE" diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig index b5ba75cc6ef..f8d66745dc3 100644 --- a/configs/evb-px30_defconfig +++ b/configs/evb-px30_defconfig @@ -12,8 +12,8 @@ CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x00000000 +CONFIG_DEBUG_UART=y CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y @@ -101,7 +101,6 @@ CONFIG_DISPLAY=y CONFIG_LCD=y CONFIG_SPL_TINY_MEMSET=y CONFIG_TPL_TINY_MEMSET=y -CONFIG_LZ4=y CONFIG_LZO=y CONFIG_ERRNO_STR=y # CONFIG_EFI_LOADER is not set diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig index a106ae69cab..dddb9d22aff 100644 --- a/configs/evb-rk3036_defconfig +++ b/configs/evb-rk3036_defconfig @@ -10,8 +10,8 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x0 CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0x20068000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x10081000 +CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3036-evb.dtb" diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig index f8e648bbb4f..4d7beca0b79 100644 --- a/configs/evb-rk3229_defconfig +++ b/configs/evb-rk3229_defconfig @@ -10,8 +10,8 @@ CONFIG_SPL_STACK_R_ADDR=0x60600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_DEBUG_UART_BASE=0x11030000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x60000000 +CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig index 1b25dc13a92..64568249a00 100644 --- a/configs/evb-rk3308_defconfig +++ b/configs/evb-rk3308_defconfig @@ -71,7 +71,6 @@ CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_SPL_TINY_MEMSET=y -CONFIG_LZ4=y CONFIG_LZO=y CONFIG_ERRNO_STR=y # CONFIG_EFI_LOADER is not set diff --git a/configs/ficus-rk3399_defconfig b/configs/ficus-rk3399_defconfig index dd7bd384bcc..943e69a16c7 100644 --- a/configs/ficus-rk3399_defconfig +++ b/configs/ficus-rk3399_defconfig @@ -7,8 +7,8 @@ CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 CONFIG_TARGET_ROCK960_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0xff8c2000 +CONFIG_DEBUG_UART=y CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y diff --git a/configs/firefly-px30_defconfig b/configs/firefly-px30_defconfig index 5ed60379bfc..afd966d85e4 100644 --- a/configs/firefly-px30_defconfig +++ b/configs/firefly-px30_defconfig @@ -13,8 +13,8 @@ CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x00000000 +CONFIG_DEBUG_UART=y CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y @@ -102,7 +102,6 @@ CONFIG_DISPLAY=y CONFIG_LCD=y CONFIG_SPL_TINY_MEMSET=y CONFIG_TPL_TINY_MEMSET=y -CONFIG_LZ4=y CONFIG_LZO=y CONFIG_ERRNO_STR=y # CONFIG_EFI_LOADER is not set diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig index 09b49bde217..4e2a23f6388 100644 --- a/configs/galileo_defconfig +++ b/configs/galileo_defconfig @@ -1,8 +1,8 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0xFFF10000 CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x0 +CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_NR_DRAM_BANKS=8 CONFIG_VENDOR_INTEL=y CONFIG_TARGET_GALILEO=y diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig index 08a96be9d66..79d1cb9a961 100644 --- a/configs/gardena-smart-gateway-at91sam_defconfig +++ b/configs/gardena-smart-gateway-at91sam_defconfig @@ -16,8 +16,8 @@ CONFIG_SPL=y CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x300000 +CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/gardena-smart-gateway-mt7688-ram_defconfig b/configs/gardena-smart-gateway-mt7688-ram_defconfig deleted file mode 100644 index dbc94b41063..00000000000 --- a/configs/gardena-smart-gateway-mt7688-ram_defconfig +++ /dev/null @@ -1,74 +0,0 @@ -CONFIG_MIPS=y -CONFIG_SYS_TEXT_BASE=0x80010000 -CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_ENV_OFFSET=0xA0000 -CONFIG_SYS_BOOTCOUNT_ADDR=0xb000006c -CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y -CONFIG_ENV_OFFSET_REDUND=0xB0000 -CONFIG_ARCH_MTMIPS=y -# CONFIG_MIPS_BOOT_ENV_LEGACY is not set -CONFIG_MIPS_BOOT_FDT=y -CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_FIT=y -CONFIG_FIT_SIGNATURE=y -CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="cp.b 83000000 84000000 10000 && dhcp uEnv.txt && env import -t ${fileaddr} ${filesize} && run do_u_boot_init; reset" -CONFIG_USE_PREBOOT=y -CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_VERSION_VARIABLE=y -CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_HUSH_PARSER=y -CONFIG_CMD_LICENSE=y -# CONFIG_CMD_ELF is not set -# CONFIG_CMD_XIMG is not set -CONFIG_CMD_MEMINFO=y -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_GPIO=y -# CONFIG_CMD_LOADS is not set -CONFIG_CMD_MTD=y -CONFIG_CMD_SPI=y -CONFIG_CMD_WDT=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_BOOTCOUNT=y -CONFIG_CMD_TIME=y -CONFIG_CMD_UUID=y -CONFIG_CMD_MTDPARTS=y -CONFIG_MTDIDS_DEFAULT="spi-nand0=spi0.1,nor0=spi0.0" -CONFIG_MTDPARTS_DEFAULT="spi0.0:640k(uboot),64k(uboot_env0),64k(uboot_env1),64k(factory),-(unused);spi0.1:-(nand)" -CONFIG_CMD_UBI=y -CONFIG_DEFAULT_DEVICE_TREE="gardena-smart-gateway-mt7688" -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_NET_RANDOM_ETHADDR=y -# CONFIG_DM_DEVICE_REMOVE is not set -CONFIG_HAVE_BLOCK_DEVICE=y -CONFIG_BOOTCOUNT_LIMIT=y -CONFIG_LED=y -CONFIG_LED_BLINK=y -CONFIG_LED_GPIO=y -CONFIG_MTD=y -CONFIG_DM_MTD=y -CONFIG_MTD_SPI_NAND=y -CONFIG_SPI_FLASH_GIGADEVICE=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_WINBOND=y -CONFIG_SPI_FLASH_XMC=y -CONFIG_SPI_FLASH_MTD=y -CONFIG_MTD_UBI_BEB_LIMIT=22 -CONFIG_MT7628_ETH=y -CONFIG_PHY=y -CONFIG_SPI=y -CONFIG_MT7621_SPI=y -CONFIG_SYSRESET_SYSCON=y -CONFIG_WDT=y -CONFIG_WDT_MT7621=y -CONFIG_LZMA=y diff --git a/configs/gardena-smart-gateway-mt7688_defconfig b/configs/gardena-smart-gateway-mt7688_defconfig index 23d8ddb128b..41496f739bd 100644 --- a/configs/gardena-smart-gateway-mt7688_defconfig +++ b/configs/gardena-smart-gateway-mt7688_defconfig @@ -1,16 +1,18 @@ CONFIG_MIPS=y -CONFIG_SYS_TEXT_BASE=0x9c000000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0xA0000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SYS_BOOTCOUNT_ADDR=0xb000006c +CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_SPL=y CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_ENV_OFFSET_REDUND=0xB0000 CONFIG_ARCH_MTMIPS=y -CONFIG_BOOT_ROM=y -CONFIG_ONBOARD_DDR2_SIZE_1024MBIT=y -CONFIG_ONBOARD_DDR2_CHIP_WIDTH_16BIT=y +CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y CONFIG_ENV_VARS_UBOOT_CONFIG=y @@ -24,6 +26,8 @@ CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_ELF is not set @@ -50,6 +54,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM=y # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_HAVE_BLOCK_DEVICE=y CONFIG_BOOTCOUNT_LIMIT=y @@ -71,7 +76,7 @@ CONFIG_MT7628_ETH=y CONFIG_PHY=y CONFIG_SPI=y CONFIG_MT7621_SPI=y -CONFIG_SYSRESET_SYSCON=y CONFIG_WDT=y CONFIG_WDT_MT7621=y CONFIG_LZMA=y +CONFIG_SPL_LZMA=y diff --git a/configs/gazerbeam_defconfig b/configs/gazerbeam_defconfig index 44b412118c8..d125a6eb9db 100644 --- a/configs/gazerbeam_defconfig +++ b/configs/gazerbeam_defconfig @@ -176,7 +176,16 @@ CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_PHYLIB_10G=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_DM_ETH=y CONFIG_TSEC_ENET=y # CONFIG_PCI is not set diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index a978d4e460f..f0893ce08ec 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -2,10 +2,10 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SYS_MALLOC_F_LEN=0x4000 -CONFIG_TARGET_GE_BX50V3=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_TARGET_GE_BX50V3=y CONFIG_DM_GPIO=y CONFIG_BOOTCOUNT_BOOTLIMIT=10 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/gose_defconfig b/configs/gose_defconfig index 3a2daac468f..8fc0df4b05e 100644 --- a/configs/gose_defconfig +++ b/configs/gose_defconfig @@ -9,8 +9,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_ENV_SIZE=0x40000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_DM_GPIO=y CONFIG_ARCH_RMOBILE_BOARD_STRING="Gose" CONFIG_R8A7793=y @@ -30,7 +31,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -71,6 +71,7 @@ CONFIG_DM_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_MTD=y +CONFIG_BITBANGMII=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y CONFIG_DM_ETH=y diff --git a/configs/grpeach_defconfig b/configs/grpeach_defconfig index 99b656eb510..417938a512e 100644 --- a/configs/grpeach_defconfig +++ b/configs/grpeach_defconfig @@ -3,8 +3,8 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_RMOBILE=y CONFIG_SYS_TEXT_BASE=0x18000000 CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x80000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_RZA1=y CONFIG_NR_DRAM_BANKS=1 @@ -44,6 +44,7 @@ CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_BITBANGMII=y CONFIG_DM_ETH=y CONFIG_SH_ETHER=y CONFIG_PINCTRL=y diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index 3ec8485c9bb..639cb99862c 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_GW_VENTANA=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xB1400 +CONFIG_TARGET_GW_VENTANA=y CONFIG_CMD_EECONFIG=y CONFIG_CMD_GSC=y CONFIG_SPL_MMC_SUPPORT=y diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index a3a432de124..67ea57c7fc7 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_GW_VENTANA=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xB1400 +CONFIG_TARGET_GW_VENTANA=y CONFIG_CMD_EECONFIG=y CONFIG_CMD_GSC=y CONFIG_SPL_MMC_SUPPORT=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index 9d147b0a312..f6e85b680bd 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_GW_VENTANA=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x1000000 +CONFIG_TARGET_GW_VENTANA=y CONFIG_CMD_EECONFIG=y CONFIG_CMD_GSC=y CONFIG_SPL_MMC_SUPPORT=y diff --git a/configs/helios4_defconfig b/configs/helios4_defconfig index 0fe85595071..e15f10cdd56 100644 --- a/configs/helios4_defconfig +++ b/configs/helios4_defconfig @@ -15,9 +15,9 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 +CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_DEBUG_UART=y CONFIG_AHCI=y -CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y @@ -54,6 +54,7 @@ CONFIG_MTD=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_SF_DEFAULT_SPEED=104000000 CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVNETA=y CONFIG_MII=y diff --git a/configs/hrcon_defconfig b/configs/hrcon_defconfig index dca59972cb1..439231a8dd0 100644 --- a/configs/hrcon_defconfig +++ b/configs/hrcon_defconfig @@ -129,7 +129,16 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_BITBANGMII=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 diff --git a/configs/hrcon_dh_defconfig b/configs/hrcon_dh_defconfig index 40de2f95f35..ef0ee4de57e 100644 --- a/configs/hrcon_dh_defconfig +++ b/configs/hrcon_dh_defconfig @@ -127,7 +127,16 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_BITBANGMII=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 diff --git a/configs/hsdk_4xd_defconfig b/configs/hsdk_4xd_defconfig new file mode 100644 index 00000000000..64832ecbdf3 --- /dev/null +++ b/configs/hsdk_4xd_defconfig @@ -0,0 +1,67 @@ +CONFIG_ARC=y +CONFIG_ISA_ARCV2=y +CONFIG_TARGET_HSDK=y +CONFIG_BOARD_HSDK_4XD=y +CONFIG_SYS_TEXT_BASE=0x81000000 +CONFIG_DM_GPIO=y +CONFIG_DEBUG_UART_BASE=0xf0005000 +CONFIG_DEBUG_UART_CLOCK=33333333 +CONFIG_SYS_CLK_FREQ=500000000 +CONFIG_DEBUG_UART=y +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200n8" +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="hsdk-4xd# " +CONFIG_CMD_ENV_FLAGS=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_DHCP=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_OF_EMBED=y +CONFIG_DEFAULT_DEVICE_TREE="hsdk-4xd" +CONFIG_ENV_IS_IN_FAT=y +CONFIG_ENV_FAT_INTERFACE="mmc" +CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM=y +CONFIG_CLK_HSDK=y +CONFIG_HSDK_CREG_GPIO=y +CONFIG_MMC=y +CONFIG_DM_MMC=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_SNPS=y +CONFIG_MTD=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_SST=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y +CONFIG_DM_RESET=y +CONFIG_DM_SERIAL=y +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_SYS_NS16550=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_DESIGNWARE_SPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_STORAGE=y +CONFIG_USE_PRIVATE_LIBGCC=y +CONFIG_PANIC_HANG=y diff --git a/configs/hsdk_defconfig b/configs/hsdk_defconfig index 84b22ed7c04..4b767169fc2 100644 --- a/configs/hsdk_defconfig +++ b/configs/hsdk_defconfig @@ -30,7 +30,6 @@ CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="hsdk" CONFIG_ENV_IS_IN_FAT=y -CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/i12-tvbox_defconfig b/configs/i12-tvbox_defconfig index 8543780a7d5..555169d3f6c 100644 --- a/configs/i12-tvbox_defconfig +++ b/configs/i12-tvbox_defconfig @@ -8,6 +8,7 @@ CONFIG_VIDEO_COMPOSITE=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-i12-tvbox" +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y diff --git a/configs/icnova-a20-swac_defconfig b/configs/icnova-a20-swac_defconfig index d6da5acd5ee..063cdf7ade0 100644 --- a/configs/icnova-a20-swac_defconfig +++ b/configs/icnova-a20-swac_defconfig @@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_CMD_UNZIP=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-icnova-swac" +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y CONFIG_SUN7I_GMAC=y diff --git a/configs/ids8313_defconfig b/configs/ids8313_defconfig index 29f62e23a37..802b5a6cd66 100644 --- a/configs/ids8313_defconfig +++ b/configs/ids8313_defconfig @@ -163,7 +163,15 @@ CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y # CONFIG_PCI is not set diff --git a/configs/imx28_xea_defconfig b/configs/imx28_xea_defconfig index 2d49b664dea..e23d77d9f82 100644 --- a/configs/imx28_xea_defconfig +++ b/configs/imx28_xea_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x800 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_TARGET_XEA=y @@ -18,6 +19,7 @@ CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_TEXT_BASE=0x1000 +CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_FIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOARD_EARLY_INIT_F=y @@ -31,9 +33,7 @@ CONFIG_SPL_DMA=y CONFIG_SPL_FORCE_MMC_BOOT=y CONFIG_SPL_MMC_TINY=y CONFIG_SPL_OS_BOOT=y -CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_HUSH_PARSER=y CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y diff --git a/configs/imx6dl_icore_nand_defconfig b/configs/imx6dl_icore_nand_defconfig index 6d62022ec92..fb18458cbe5 100644 --- a/configs/imx6dl_icore_nand_defconfig +++ b/configs/imx6dl_icore_nand_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x400000 +CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig index 37168d2bea4..8f03f2fc9ed 100644 --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_TARGET_MX6DL_MAMOJ=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_TARGET_MX6DL_MAMOJ=y CONFIG_NR_DRAM_BANKS=1 CONFIG_IMX_HAB=y # CONFIG_CMD_BMODE is not set diff --git a/configs/imx6q_icore_nand_defconfig b/configs/imx6q_icore_nand_defconfig index a0baab14d1b..4f42f7a8355 100644 --- a/configs/imx6q_icore_nand_defconfig +++ b/configs/imx6q_icore_nand_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x400000 +CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index f57e89d0c2a..f4ec96c6e6c 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -4,16 +4,17 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_MX6_OCRAM_256KB=y -CONFIG_TARGET_MX6LOGICPD=y CONFIG_ENV_SIZE=0x100000 CONFIG_ENV_OFFSET=0x400000 +CONFIG_MX6_OCRAM_256KB=y +CONFIG_TARGET_MX6LOGICPD=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_TEXT_BASE=0x00908000 +CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 @@ -28,7 +29,6 @@ CONFIG_SPL_DMA=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_OS_BOOT=y -CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_SPL_USB_HOST_SUPPORT=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y @@ -60,7 +60,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-logicpd" CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_IS_IN_NAND=y -CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y diff --git a/configs/imx6qdl_icore_mipi_defconfig b/configs/imx6qdl_icore_mipi_defconfig index dbad2f3f607..fe37760d7fb 100644 --- a/configs/imx6qdl_icore_mipi_defconfig +++ b/configs/imx6qdl_icore_mipi_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y @@ -14,8 +14,8 @@ CONFIG_DEBUG_UART_BASE=0x021f0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x00908000 +CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index e82a06e429a..486268cee9f 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x020D8024 @@ -17,8 +17,8 @@ CONFIG_DEBUG_UART_BASE=0x021f0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x00908000 +CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index a0baab14d1b..4f42f7a8355 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x400000 +CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig index be9a0271a10..f9a748d66c2 100644 --- a/configs/imx6qdl_icore_rqs_defconfig +++ b/configs/imx6qdl_icore_rqs_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig index d8076f8b9d6..8ae72e7ee49 100644 --- a/configs/imx6ul_geam_mmc_defconfig +++ b/configs/imx6ul_geam_mmc_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig index 9ac27f1034e..15201d2ef05 100644 --- a/configs/imx6ul_geam_nand_defconfig +++ b/configs/imx6ul_geam_nand_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x400000 +CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig index 534774987ec..35c974ebef5 100644 --- a/configs/imx6ul_isiot_emmc_defconfig +++ b/configs/imx6ul_isiot_emmc_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig index 1dce4636d5d..bfa03a791d9 100644 --- a/configs/imx6ul_isiot_nand_defconfig +++ b/configs/imx6ul_isiot_nand_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x400000 +CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index 14030671306..d988507bc33 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -7,11 +7,11 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x10000 +CONFIG_ENV_SIZE=0x1000 +CONFIG_ENV_OFFSET=0x400000 CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y -CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_OFFSET=0x400000 CONFIG_DM_GPIO=y CONFIG_TARGET_IMX8MM_EVK=y CONFIG_SPL_MMC_SUPPORT=y diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig index e3f99896a6b..f7485ab2727 100644 --- a/configs/imx8mn_ddr4_evk_defconfig +++ b/configs/imx8mn_ddr4_evk_defconfig @@ -7,11 +7,11 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x10000 +CONFIG_ENV_SIZE=0x1000 +CONFIG_ENV_OFFSET=0x400000 CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y -CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_OFFSET=0x400000 CONFIG_DM_GPIO=y CONFIG_TARGET_IMX8MN_EVK=y CONFIG_SPL_MMC_SUPPORT=y diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index b181543df58..ce6b342c367 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -7,11 +7,11 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x10000 +CONFIG_ENV_SIZE=0x1000 +CONFIG_ENV_OFFSET=0x400000 CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y -CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_OFFSET=0x400000 CONFIG_DM_GPIO=y CONFIG_TARGET_IMX8MP_EVK=y CONFIG_SPL_MMC_SUPPORT=y diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index a936f5b79d1..23fdb3f9252 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -37,6 +37,8 @@ CONFIG_SYS_I2C_MXC=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y +CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y CONFIG_DM_ETH=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX8M=y diff --git a/configs/imxrt1020-evk_defconfig b/configs/imxrt1020-evk_defconfig index 2f35df1896a..ca5f83e9bef 100644 --- a/configs/imxrt1020-evk_defconfig +++ b/configs/imxrt1020-evk_defconfig @@ -24,7 +24,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x100 # CONFIG_SPL_CRC32_SUPPORT is not set -# CONFIG_SPL_DM_GPIO is not set # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set @@ -48,6 +47,7 @@ CONFIG_SPL_CLK_COMPOSITE_CCF=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_SPL_CLK_IMXRT1020=y CONFIG_CLK_IMXRT1020=y +# CONFIG_SPL_DM_GPIO is not set CONFIG_MXC_GPIO=y # CONFIG_INPUT is not set CONFIG_DM_MMC=y diff --git a/configs/imxrt1050-evk_defconfig b/configs/imxrt1050-evk_defconfig index 25d0ba191c7..0eafe26d47b 100644 --- a/configs/imxrt1050-evk_defconfig +++ b/configs/imxrt1050-evk_defconfig @@ -27,7 +27,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x100 # CONFIG_SPL_CRC32_SUPPORT is not set -# CONFIG_SPL_DM_GPIO is not set # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set # CONFIG_BOOTM_RTEMS is not set @@ -51,6 +50,7 @@ CONFIG_SPL_CLK_COMPOSITE_CCF=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_SPL_CLK_IMXRT1050=y CONFIG_CLK_IMXRT1050=y +# CONFIG_SPL_DM_GPIO is not set CONFIG_MXC_GPIO=y # CONFIG_INPUT is not set CONFIG_DM_MMC=y diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig index 5bae7a88197..94c708e602d 100644 --- a/configs/inetspace_v2_defconfig +++ b/configs/inetspace_v2_defconfig @@ -5,8 +5,8 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NETSPACE_V2=y CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x70000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_NR_DRAM_BANKS=2 CONFIG_IDENT_STRING=" IS v2" CONFIG_SYS_EXTRA_OPTIONS="INETSPACE_V2" diff --git a/configs/iot_devkit_defconfig b/configs/iot_devkit_defconfig index b35423198fb..35039c41439 100644 --- a/configs/iot_devkit_defconfig +++ b/configs/iot_devkit_defconfig @@ -23,7 +23,6 @@ CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="iot_devkit" CONFIG_ENV_IS_IN_FAT=y -CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index e9e82bb4309..4deb4e219fe 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -8,6 +8,7 @@ CONFIG_SOC_K3_J721E=y CONFIG_TARGET_J721E_A72_EVM=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x680000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_DM_GPIO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -43,7 +44,6 @@ CONFIG_SPL_RAM_DEVICE=y # CONFIG_SPL_SPI_FLASH_TINY is not set CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y @@ -120,7 +120,6 @@ CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_CFI=y CONFIG_HBMC_AM654=y CONFIG_DM_SPI_FLASH=y -CONFIG_SPI_FLASH_SFDP_SUPPORT CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_SPI_FLASH_MTD=y diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index 917f82d4b54..ee9217aee23 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -8,12 +8,12 @@ CONFIG_SOC_K3_J721E=y CONFIG_K3_EARLY_CONS=y CONFIG_TARGET_J721E_R5_EVM=y CONFIG_ENV_SIZE=0x20000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_DM_GPIO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x82000000 -CONFIG_ENV_OFFSET_REDUND=0x700000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -23,6 +23,7 @@ CONFIG_SPL_TEXT_BASE=0x41c00000 CONFIG_SPL_LOAD_FIT=y CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_EARLY_BSS=y @@ -42,7 +43,6 @@ CONFIG_SPL_REMOTEPROC=y # CONFIG_SPL_SPI_FLASH_TINY is not set CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_USB_GADGET=y CONFIG_SPL_DFU=y CONFIG_SPL_YMODEM_SUPPORT=y @@ -78,9 +78,10 @@ CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_OMAP24XX=y CONFIG_DM_MAILBOX=y CONFIG_K3_SEC_PROXY=y -CONFIG_MISC=y CONFIG_FS_LOADER=y +CONFIG_ESM_K3=y CONFIG_K3_AVS0=y +CONFIG_ESM_PMIC=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_SDHCI=y @@ -132,6 +133,3 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x6163 CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_FS_EXT4=y CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 -CONFIG_ESM_K3=y -CONFIG_ESM_PMIC=y -CONFIG_SPL_BOARD_INIT=y diff --git a/configs/j721e_hs_evm_a72_defconfig b/configs/j721e_hs_evm_a72_defconfig index a723e2718e5..ae540a26a40 100644 --- a/configs/j721e_hs_evm_a72_defconfig +++ b/configs/j721e_hs_evm_a72_defconfig @@ -8,6 +8,7 @@ CONFIG_SOC_K3_J721E=y CONFIG_TARGET_J721E_A72_EVM=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x680000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -39,7 +40,6 @@ CONFIG_SPL_POWER_DOMAIN=y # CONFIG_SPL_SPI_FLASH_TINY is not set CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y @@ -110,7 +110,6 @@ CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_CFI=y CONFIG_HBMC_AM654=y CONFIG_DM_SPI_FLASH=y -CONFIG_SPI_FLASH_SFDP_SUPPORT CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_SPI_FLASH_MTD=y diff --git a/configs/j721e_hs_evm_r5_defconfig b/configs/j721e_hs_evm_r5_defconfig index 196625d881a..51d5a3bb98f 100644 --- a/configs/j721e_hs_evm_r5_defconfig +++ b/configs/j721e_hs_evm_r5_defconfig @@ -9,6 +9,7 @@ CONFIG_SOC_K3_J721E=y CONFIG_TARGET_J721E_R5_EVM=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x680000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_DM_GPIO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -41,7 +42,6 @@ CONFIG_SPL_REMOTEPROC=y # CONFIG_SPL_SPI_FLASH_TINY is not set CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_FLASH is not set @@ -75,7 +75,6 @@ CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_OMAP24XX=y CONFIG_DM_MAILBOX=y CONFIG_K3_SEC_PROXY=y -CONFIG_MISC=y CONFIG_FS_LOADER=y CONFIG_K3_AVS0=y CONFIG_DM_MMC=y diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index 5df19efa9b0..644b6e54644 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_K2E_EVM=y CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y @@ -24,7 +25,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_CMD_MX_CYCLIC=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_GPIO is not set diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index 5abf5faa450..5bc7f7f8656 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_K2G_EVM=y CONFIG_ENV_SIZE=0x40000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y @@ -23,7 +24,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_CMD_MX_CYCLIC=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_GPIO is not set diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index 0635f4a976b..eb5916c2c65 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_K2HK_EVM=y CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y @@ -24,7 +25,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_CMD_MX_CYCLIC=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_GPIO is not set diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index 66f778fa0ba..71a35e34961 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_K2L_EVM=y CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y @@ -24,7 +25,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_CMD_MX_CYCLIC=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_GPIO is not set diff --git a/configs/khadas-vim2_defconfig b/configs/khadas-vim2_defconfig index a5335664108..5633f6da9cd 100644 --- a/configs/khadas-vim2_defconfig +++ b/configs/khadas-vim2_defconfig @@ -19,6 +19,8 @@ CONFIG_CMD_ADC=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y +CONFIG_CMD_SF_TEST=y +CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set @@ -30,7 +32,10 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SARADC_MESON=y CONFIG_DM_MMC=y CONFIG_MMC_MESON_GX=y +CONFIG_MTD=y CONFIG_DM_MTD=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_REALTEK=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y @@ -44,6 +49,9 @@ CONFIG_DEBUG_UART_MESON=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_MESON_SPIFC=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y diff --git a/configs/khadas-vim3_defconfig b/configs/khadas-vim3_defconfig index 72987d95232..692138eb115 100644 --- a/configs/khadas-vim3_defconfig +++ b/configs/khadas-vim3_defconfig @@ -18,6 +18,8 @@ CONFIG_MISC_INIT_R=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y +CONFIG_CMD_SF_TEST=y +CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set @@ -28,6 +30,10 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM_MMC=y CONFIG_MMC_MESON_GX=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_REALTEK=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y @@ -41,6 +47,9 @@ CONFIG_DEBUG_UART_MESON=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_MESON_SPIFC=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y diff --git a/configs/khadas-vim3l_defconfig b/configs/khadas-vim3l_defconfig index 7e2ad41bca9..28c20c0d6d5 100644 --- a/configs/khadas-vim3l_defconfig +++ b/configs/khadas-vim3l_defconfig @@ -18,6 +18,8 @@ CONFIG_MISC_INIT_R=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y +CONFIG_CMD_SF_TEST=y +CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set @@ -28,6 +30,10 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM_MMC=y CONFIG_MMC_MESON_GX=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_REALTEK=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y @@ -43,6 +49,9 @@ CONFIG_DEBUG_UART_MESON=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_MESON_SPIFC=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y diff --git a/configs/kmcoge4_defconfig b/configs/kmcoge4_defconfig index 55379658e79..a0d2c1a7262 100644 --- a/configs/kmcoge4_defconfig +++ b/configs/kmcoge4_defconfig @@ -1,8 +1,8 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xfff40000 CONFIG_ENV_SIZE=0x4000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0xFB000020 CONFIG_ENV_OFFSET_REDUND=0x110000 @@ -55,6 +55,7 @@ CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_E1000=y diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig index 1775273807a..b70bab618ea 100644 --- a/configs/kmcoge5un_defconfig +++ b/configs/kmcoge5un_defconfig @@ -8,8 +8,8 @@ CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 CONFIG_KM_ENV_IS_IN_SPI_NOR=y CONFIG_KM_PIGGY4_88E6352=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_ENV_OFFSET_REDUND=0xD0000 CONFIG_IDENT_STRING="\nKeymile COGE5UN" diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig index 3cef72cc860..a4b301db7db 100644 --- a/configs/kmnusa_defconfig +++ b/configs/kmnusa_defconfig @@ -8,8 +8,8 @@ CONFIG_KM_FPGA_CONFIG=y CONFIG_KM_ENV_IS_IN_SPI_NOR=y CONFIG_KM_PIGGY4_88E6352=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_ENV_OFFSET_REDUND=0xD0000 CONFIG_IDENT_STRING="\nKeymile NUSA" diff --git a/configs/kmsuse2_defconfig b/configs/kmsuse2_defconfig index e81a8b02fc2..119607ac91a 100644 --- a/configs/kmsuse2_defconfig +++ b/configs/kmsuse2_defconfig @@ -9,8 +9,8 @@ CONFIG_KM_FPGA_FORCE_CONFIG=y CONFIG_KM_FPGA_NO_RESET=y CONFIG_KM_ENV_IS_IN_SPI_NOR=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_ENV_OFFSET_REDUND=0xD0000 CONFIG_IDENT_STRING="\nABB SUSE2" diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig index edb79334e0d..7d8ac651112 100644 --- a/configs/koelsch_defconfig +++ b/configs/koelsch_defconfig @@ -9,8 +9,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_ENV_SIZE=0x40000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_DM_GPIO=y CONFIG_ARCH_RMOBILE_BOARD_STRING="Koelsch" CONFIG_R8A7791=y @@ -30,7 +31,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -71,6 +71,7 @@ CONFIG_DM_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_MTD=y +CONFIG_BITBANGMII=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y CONFIG_DM_ETH=y diff --git a/configs/kp_imx53_defconfig b/configs/kp_imx53_defconfig index 096ba532362..936b51a699f 100644 --- a/configs/kp_imx53_defconfig +++ b/configs/kp_imx53_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX5=y CONFIG_SYS_TEXT_BASE=0x77800000 -CONFIG_TARGET_KP_IMX53=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_TARGET_KP_IMX53=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET_REDUND=0x102000 # CONFIG_CMD_BMODE is not set diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig index 6bfe9af402b..2f46b23fcdf 100644 --- a/configs/kp_imx6q_tpc_defconfig +++ b/configs/kp_imx6q_tpc_defconfig @@ -5,18 +5,19 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2200 +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_OFFSET=0x100000 CONFIG_MX6_DDRCAL=y CONFIG_TARGET_KP_IMX6Q_TPC=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y -CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_OFFSET=0x100000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x102000 CONFIG_SPL_TEXT_BASE=0x00908000 +CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" @@ -26,7 +27,6 @@ CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_BOUNCE_BUFFER=y CONFIG_SPL_RAW_IMAGE_SUPPORT=y -CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig index 51cd9b5433a..e59dc5270df 100644 --- a/configs/kylin-rk3036_defconfig +++ b/configs/kylin-rk3036_defconfig @@ -12,8 +12,8 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x0 CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0x20068000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x10081000 +CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3036-kylin.dtb" diff --git a/configs/lager_defconfig b/configs/lager_defconfig index 6e6ad008208..918d9beb296 100644 --- a/configs/lager_defconfig +++ b/configs/lager_defconfig @@ -9,8 +9,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_ENV_SIZE=0x40000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_DM_GPIO=y CONFIG_ARCH_RMOBILE_BOARD_STRING="Lager" CONFIG_R8A7790=y @@ -30,7 +31,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -73,6 +73,7 @@ CONFIG_DM_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_MTD=y +CONFIG_BITBANGMII=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y CONFIG_DM_ETH=y diff --git a/configs/libretech-ac_defconfig b/configs/libretech-ac_defconfig index 7e486757a2f..df0dbbd19dd 100644 --- a/configs/libretech-ac_defconfig +++ b/configs/libretech-ac_defconfig @@ -3,8 +3,8 @@ CONFIG_SYS_CONFIG_NAME="libretech-ac" CONFIG_ARCH_MESON=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0xFFFF0000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_MESON_GXL=y CONFIG_NR_DRAM_BANKS=1 @@ -69,8 +69,8 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y CONFIG_USB_DWC3=y -CONFIG_USB_KEYBOARD=y # CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_KEYBOARD=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e CONFIG_USB_GADGET_PRODUCT_NUM=0xfada diff --git a/configs/libretech-s905d-pc_defconfig b/configs/libretech-s905d-pc_defconfig index 531d519a7c1..72101425cfa 100644 --- a/configs/libretech-s905d-pc_defconfig +++ b/configs/libretech-s905d-pc_defconfig @@ -2,13 +2,14 @@ CONFIG_ARM=y CONFIG_SYS_BOARD="q200" CONFIG_ARCH_MESON=y CONFIG_SYS_TEXT_BASE=0x01000000 -CONFIG_MESON_GXL=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0xFFFF0000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DM_GPIO=y +CONFIG_MESON_GXL=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_IDENT_STRING=" libretech-s905d-pc" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y @@ -22,7 +23,6 @@ CONFIG_CMD_ADC=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y -CONFIG_CMD_SF=y CONFIG_CMD_SF_TEST=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y @@ -34,13 +34,11 @@ CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905d-libretech-pc" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SARADC_MESON=y -CONFIG_DM_GPIO=y CONFIG_DM_KEYBOARD=y CONFIG_DM_MMC=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y -CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_PHY_REALTEK=y CONFIG_DM_ETH=y @@ -67,12 +65,12 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y CONFIG_USB_DWC3=y # CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_KEYBOARD=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e CONFIG_USB_GADGET_PRODUCT_NUM=0xfada CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_USB_KEYBOARD=y CONFIG_DM_VIDEO=y CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_MESON=y diff --git a/configs/libretech-s912-pc_defconfig b/configs/libretech-s912-pc_defconfig index 595ec21da77..4c255c1cd83 100644 --- a/configs/libretech-s912-pc_defconfig +++ b/configs/libretech-s912-pc_defconfig @@ -1,14 +1,14 @@ CONFIG_ARM=y -CONFIG_SYS_BOARD="q200" CONFIG_ARCH_MESON=y CONFIG_SYS_TEXT_BASE=0x01000000 -CONFIG_MESON_GXM=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0xFFFF0000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DM_GPIO=y +CONFIG_MESON_GXM=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_IDENT_STRING=" libretech-s912-pc" CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_SETUP=y @@ -22,7 +22,6 @@ CONFIG_CMD_ADC=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y -CONFIG_CMD_SF=y CONFIG_CMD_SF_TEST=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y @@ -34,13 +33,11 @@ CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-s912-libretech-pc" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SARADC_MESON=y -CONFIG_DM_GPIO=y CONFIG_DM_KEYBOARD=y CONFIG_DM_MMC=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y -CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_PHY_REALTEK=y CONFIG_DM_ETH=y @@ -67,12 +64,12 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y CONFIG_USB_DWC3=y # CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_KEYBOARD=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e CONFIG_USB_GADGET_PRODUCT_NUM=0xfada CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_USB_KEYBOARD=y CONFIG_DM_VIDEO=y CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_MESON=y diff --git a/configs/linkit-smart-7688-ram_defconfig b/configs/linkit-smart-7688-ram_defconfig deleted file mode 100644 index d1691abfdaf..00000000000 --- a/configs/linkit-smart-7688-ram_defconfig +++ /dev/null @@ -1,65 +0,0 @@ -CONFIG_MIPS=y -CONFIG_SYS_TEXT_BASE=0x80010000 -CONFIG_ENV_SIZE=0x4000 -CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_ENV_OFFSET=0x80000 -CONFIG_NR_DRAM_BANKS=1 -CONFIG_ARCH_MTMIPS=y -CONFIG_BOARD_LINKIT_SMART_7688=y -# CONFIG_MIPS_BOOT_ENV_LEGACY is not set -CONFIG_MIPS_BOOT_FDT=y -CONFIG_FIT=y -CONFIG_FIT_SIGNATURE=y -CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_HUSH_PARSER=y -CONFIG_CMD_LICENSE=y -# CONFIG_CMD_ELF is not set -# CONFIG_CMD_XIMG is not set -CONFIG_CMD_MEMINFO=y -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_GPIO=y -# CONFIG_CMD_LOADS is not set -CONFIG_CMD_MTD=y -CONFIG_CMD_PART=y -CONFIG_CMD_SPI=y -CONFIG_CMD_USB=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_TIME=y -CONFIG_CMD_FS_GENERIC=y -# CONFIG_DOS_PARTITION is not set -CONFIG_DEFAULT_DEVICE_TREE="linkit-smart-7688" -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_NET_RANDOM_ETHADDR=y -# CONFIG_DM_DEVICE_REMOVE is not set -CONFIG_BLK=y -CONFIG_LED=y -CONFIG_LED_BLINK=y -CONFIG_LED_GPIO=y -CONFIG_MTD=y -CONFIG_SPI_FLASH_GIGADEVICE=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_WINBOND=y -CONFIG_SPI_FLASH_MTD=y -CONFIG_MT7628_ETH=y -CONFIG_PHY=y -CONFIG_MT76X8_USB_PHY=y -CONFIG_SPI=y -CONFIG_MT7621_SPI=y -CONFIG_SYSRESET_SYSCON=y -CONFIG_USB=y -CONFIG_DM_USB=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_GENERIC=y -CONFIG_USB_STORAGE=y -CONFIG_FS_EXT4=y -CONFIG_FS_FAT=y -CONFIG_LZMA=y -CONFIG_LZO=y diff --git a/configs/linkit-smart-7688_defconfig b/configs/linkit-smart-7688_defconfig index a567c0c507e..8ec66938cdc 100644 --- a/configs/linkit-smart-7688_defconfig +++ b/configs/linkit-smart-7688_defconfig @@ -1,14 +1,16 @@ CONFIG_MIPS=y -CONFIG_SYS_TEXT_BASE=0x9c000000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x4000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x80000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_SPL=y CONFIG_ARCH_MTMIPS=y CONFIG_BOARD_LINKIT_SMART_7688=y -CONFIG_BOOT_ROM=y -CONFIG_ONBOARD_DDR2_SIZE_1024MBIT=y -CONFIG_ONBOARD_DDR2_CHIP_WIDTH_16BIT=y +CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y CONFIG_FIT=y @@ -17,6 +19,8 @@ CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_LICENSE=y # CONFIG_CMD_ELF is not set @@ -40,6 +44,7 @@ CONFIG_DEFAULT_DEVICE_TREE="linkit-smart-7688" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM=y # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_BLK=y CONFIG_LED=y @@ -57,7 +62,6 @@ CONFIG_PHY=y CONFIG_MT76X8_USB_PHY=y CONFIG_SPI=y CONFIG_MT7621_SPI=y -CONFIG_SYSRESET_SYSCON=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y @@ -67,3 +71,4 @@ CONFIG_FS_EXT4=y CONFIG_FS_FAT=y CONFIG_LZMA=y CONFIG_LZO=y +CONFIG_SPL_LZMA=y diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig index e022b4caf06..b6504b71238 100644 --- a/configs/lion-rk3368_defconfig +++ b/configs/lion-rk3368_defconfig @@ -14,9 +14,9 @@ CONFIG_DEBUG_UART_BASE=0xFF180000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_TEXT_BASE=0x00000000 CONFIG_SMBIOS_PRODUCT_NAME="sheep_rk3368" CONFIG_DEBUG_UART=y -CONFIG_SPL_TEXT_BASE=0x00000000 CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/liteboard_defconfig b/configs/liteboard_defconfig index 665955c5e80..7c94478e0a7 100644 --- a/configs/liteboard_defconfig +++ b/configs/liteboard_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_LITEBOARD=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x80000 +CONFIG_TARGET_LITEBOARD=y CONFIG_DM_GPIO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -45,6 +45,7 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_PINCTRL=y diff --git a/configs/ls1012a2g5rdb_qspi_defconfig b/configs/ls1012a2g5rdb_qspi_defconfig index b1cf8ef7c54..9bf5b9c16b0 100644 --- a/configs/ls1012a2g5rdb_qspi_defconfig +++ b/configs/ls1012a2g5rdb_qspi_defconfig @@ -2,8 +2,8 @@ CONFIG_ARM=y CONFIG_TARGET_LS1012A2G5RDB=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_ENV_SIZE=0x40000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x300000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y diff --git a/configs/ls1012a2g5rdb_tfa_defconfig b/configs/ls1012a2g5rdb_tfa_defconfig index a9785809521..d9d4f8206c8 100644 --- a/configs/ls1012a2g5rdb_tfa_defconfig +++ b/configs/ls1012a2g5rdb_tfa_defconfig @@ -3,8 +3,8 @@ CONFIG_TARGET_LS1012A2G5RDB=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_ENV_SIZE=0x40000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x500000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_QSPI_AHB_INIT=y CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/ls1012afrdm_qspi_defconfig b/configs/ls1012afrdm_qspi_defconfig index 1e601484eee..02a80b1a596 100644 --- a/configs/ls1012afrdm_qspi_defconfig +++ b/configs/ls1012afrdm_qspi_defconfig @@ -2,10 +2,9 @@ CONFIG_ARM=y CONFIG_TARGET_LS1012AFRDM=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_ENV_SIZE=0x40000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x300000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y -CONFIG_BLK=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_NR_DRAM_BANKS=2 @@ -34,6 +33,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_BLK=y CONFIG_DM_I2C=y # CONFIG_MMC is not set CONFIG_MTD=y diff --git a/configs/ls1012afrdm_tfa_defconfig b/configs/ls1012afrdm_tfa_defconfig index 420a2f416cb..ecc4c81eb3f 100644 --- a/configs/ls1012afrdm_tfa_defconfig +++ b/configs/ls1012afrdm_tfa_defconfig @@ -3,10 +3,9 @@ CONFIG_TARGET_LS1012AFRDM=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_ENV_SIZE=0x40000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x500000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y -CONFIG_BLK=y CONFIG_QSPI_AHB_INIT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y @@ -34,6 +33,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_BLK=y CONFIG_DM_I2C=y # CONFIG_MMC is not set CONFIG_MTD=y diff --git a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig index cc5ee716383..addb31c1959 100644 --- a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig @@ -1,8 +1,8 @@ CONFIG_ARM=y CONFIG_TARGET_LS1012AFRWY=y CONFIG_SYS_TEXT_BASE=0x40100000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x10000 +CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/ls1012afrwy_qspi_defconfig b/configs/ls1012afrwy_qspi_defconfig index bee093694c7..2156f5eb971 100644 --- a/configs/ls1012afrwy_qspi_defconfig +++ b/configs/ls1012afrwy_qspi_defconfig @@ -2,8 +2,8 @@ CONFIG_ARM=y CONFIG_TARGET_LS1012AFRWY=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1D0000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig index a983c300429..a4fdd0c02ff 100644 --- a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig @@ -2,8 +2,8 @@ CONFIG_ARM=y CONFIG_TARGET_LS1012AFRWY=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x10000 +CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=2 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y diff --git a/configs/ls1012afrwy_tfa_defconfig b/configs/ls1012afrwy_tfa_defconfig index f8ca4483f2d..280dbd3b47c 100644 --- a/configs/ls1012afrwy_tfa_defconfig +++ b/configs/ls1012afrwy_tfa_defconfig @@ -3,8 +3,8 @@ CONFIG_TARGET_LS1012AFRWY=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1D0000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=2 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y diff --git a/configs/ls1012aqds_qspi_defconfig b/configs/ls1012aqds_qspi_defconfig index fd4fba5cc42..78266612398 100644 --- a/configs/ls1012aqds_qspi_defconfig +++ b/configs/ls1012aqds_qspi_defconfig @@ -2,8 +2,8 @@ CONFIG_ARM=y CONFIG_TARGET_LS1012AQDS=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_ENV_SIZE=0x40000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x300000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y diff --git a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig index 23dea4ce230..8ab6cbc3f80 100644 --- a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig @@ -2,8 +2,8 @@ CONFIG_ARM=y CONFIG_TARGET_LS1012AQDS=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x40000 +CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_QSPI_AHB_INIT=y CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/ls1012aqds_tfa_defconfig b/configs/ls1012aqds_tfa_defconfig index 974cedc0f44..1b783c524f6 100644 --- a/configs/ls1012aqds_tfa_defconfig +++ b/configs/ls1012aqds_tfa_defconfig @@ -3,8 +3,8 @@ CONFIG_TARGET_LS1012AQDS=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_ENV_SIZE=0x40000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x500000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_QSPI_AHB_INIT=y CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig index 5ad4e0d6bd5..4031b9bbd75 100644 --- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig @@ -1,8 +1,8 @@ CONFIG_ARM=y CONFIG_TARGET_LS1012ARDB=y CONFIG_SYS_TEXT_BASE=0x40100000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x40000 +CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y diff --git a/configs/ls1012ardb_qspi_defconfig b/configs/ls1012ardb_qspi_defconfig index 98057a944c0..01770b89d4d 100644 --- a/configs/ls1012ardb_qspi_defconfig +++ b/configs/ls1012ardb_qspi_defconfig @@ -2,8 +2,8 @@ CONFIG_ARM=y CONFIG_TARGET_LS1012ARDB=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_ENV_SIZE=0x40000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x300000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y diff --git a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig index 4e937e53eef..57e9dd9957c 100644 --- a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig @@ -2,8 +2,8 @@ CONFIG_ARM=y CONFIG_TARGET_LS1012ARDB=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x40000 +CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_QSPI_AHB_INIT=y CONFIG_NR_DRAM_BANKS=2 @@ -42,6 +42,8 @@ CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_FSL_PFE=y +CONFIG_DM_ETH=y CONFIG_E1000=y CONFIG_PCI=y CONFIG_DM_PCI=y @@ -60,5 +62,3 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_RSA=y CONFIG_RSA_SOFTWARE_EXP=y -CONFIG_FSL_PFE=y -CONFIG_DM_ETH=y diff --git a/configs/ls1012ardb_tfa_defconfig b/configs/ls1012ardb_tfa_defconfig index fdf2324a631..06584ff1dca 100644 --- a/configs/ls1012ardb_tfa_defconfig +++ b/configs/ls1012ardb_tfa_defconfig @@ -3,8 +3,8 @@ CONFIG_TARGET_LS1012ARDB=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_ENV_SIZE=0x40000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x500000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_QSPI_AHB_INIT=y CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/ls1021aiot_qspi_defconfig b/configs/ls1021aiot_qspi_defconfig index 512f7753031..dba33e2a9b7 100644 --- a/configs/ls1021aiot_qspi_defconfig +++ b/configs/ls1021aiot_qspi_defconfig @@ -2,8 +2,8 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AIOT=y CONFIG_SYS_TEXT_BASE=0x40010000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_AHCI=y @@ -30,6 +30,7 @@ CONFIG_MTD=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PHY_ATHEROS=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig index 4cd4c319b5e..fc6df70db73 100644 --- a/configs/ls1021aiot_sdcard_defconfig +++ b/configs/ls1021aiot_sdcard_defconfig @@ -7,8 +7,8 @@ CONFIG_DM_GPIO=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x10000000 +CONFIG_AHCI=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT,SD_BOOT_QSPI" CONFIG_MISC_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y @@ -36,6 +36,7 @@ CONFIG_MTD=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PHY_ATHEROS=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig index d29b6ebc745..203303b6e12 100644 --- a/configs/ls1021aqds_ddr4_nor_defconfig +++ b/configs/ls1021aqds_ddr4_nor_defconfig @@ -49,6 +49,7 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_REALTEK=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig index 62c3bccbfeb..f77b6dbd9db 100644 --- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig +++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig @@ -50,6 +50,7 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_REALTEK=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index a940c74de73..dc45f8fbf46 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -10,8 +10,8 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x10000000 +CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -66,6 +66,7 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_REALTEK=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig index 73fd8c2cc85..aaf0f137853 100644 --- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig @@ -1,8 +1,8 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_AHCI=y @@ -48,6 +48,7 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_REALTEK=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig index b75b0c08d28..9211f97a634 100644 --- a/configs/ls1021aqds_nor_defconfig +++ b/configs/ls1021aqds_nor_defconfig @@ -50,6 +50,7 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_REALTEK=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig index 83daeb13745..c27147e3435 100644 --- a/configs/ls1021aqds_nor_lpuart_defconfig +++ b/configs/ls1021aqds_nor_lpuart_defconfig @@ -51,6 +51,7 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_REALTEK=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig index 497ee52d59a..c3b5627702f 100644 --- a/configs/ls1021aqds_qspi_defconfig +++ b/configs/ls1021aqds_qspi_defconfig @@ -2,8 +2,8 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x300000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_AHCI=y @@ -49,6 +49,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_REALTEK=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index 3d12ceb27ff..e08f2839619 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -11,8 +11,8 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x10000000 +CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT" @@ -65,6 +65,7 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_REALTEK=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index 22be8e6e913..605a3785845 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -11,8 +11,8 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x10000000 +CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT,SD_BOOT_QSPI" @@ -61,6 +61,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_REALTEK=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y diff --git a/configs/ls1021atsn_qspi_defconfig b/configs/ls1021atsn_qspi_defconfig index b7e754cf197..a62e04e92aa 100644 --- a/configs/ls1021atsn_qspi_defconfig +++ b/configs/ls1021atsn_qspi_defconfig @@ -2,8 +2,8 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021ATSN=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x300000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_AHCI=y diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig index 52455409785..db4f0ab7964 100644 --- a/configs/ls1021atsn_sdcard_defconfig +++ b/configs/ls1021atsn_sdcard_defconfig @@ -10,8 +10,8 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x10000000 +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig index 9af99126001..af8b8ffd7d3 100644 --- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig @@ -1,8 +1,8 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021ATWR=y CONFIG_SYS_TEXT_BASE=0x60100000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x20000 +CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_AHCI=y diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig index 0fcd675f3ab..504b2d9afcb 100644 --- a/configs/ls1021atwr_qspi_defconfig +++ b/configs/ls1021atwr_qspi_defconfig @@ -2,8 +2,8 @@ CONFIG_ARM=y CONFIG_TARGET_LS1021ATWR=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x300000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_AHCI=y diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index 2f2a9fff37a..82e62441036 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -3,8 +3,8 @@ CONFIG_TARGET_LS1021ATWR=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x20000 +CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index 7a98c26bcce..ad05bc49a3e 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -10,8 +10,8 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x10000000 +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index 110631da123..18fd5c36e26 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -10,8 +10,8 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x10000000 +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig index c5f0bd85dae..c19c66fa684 100644 --- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig @@ -2,8 +2,8 @@ CONFIG_ARM=y CONFIG_TARGET_LS1028AQDS=y CONFIG_TFABOOT=y CONFIG_SYS_MALLOC_F_LEN=0x6000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_NR_DRAM_BANKS=2 @@ -28,7 +28,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_WDT=y CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds" +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds-duart" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_DM=y @@ -79,3 +79,4 @@ CONFIG_WDT_SP805=y CONFIG_RSA=y CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_GIC_V3_ITS=y diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig index 7085be77fe1..82b08a58ecd 100644 --- a/configs/ls1028aqds_tfa_defconfig +++ b/configs/ls1028aqds_tfa_defconfig @@ -3,8 +3,8 @@ CONFIG_TARGET_LS1028AQDS=y CONFIG_TFABOOT=y CONFIG_SYS_MALLOC_F_LEN=0x6000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x500000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_NR_DRAM_BANKS=2 @@ -30,7 +30,7 @@ CONFIG_CMD_WDT=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds" +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds-duart" CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x20500000 @@ -84,3 +84,4 @@ CONFIG_WDT=y CONFIG_WDT_SP805=y CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_GIC_V3_ITS=y diff --git a/configs/ls1028aqds_tfa_lpuart_defconfig b/configs/ls1028aqds_tfa_lpuart_defconfig new file mode 100644 index 00000000000..417f29217a0 --- /dev/null +++ b/configs/ls1028aqds_tfa_lpuart_defconfig @@ -0,0 +1,88 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS1028AQDS=y +CONFIG_TFABOOT=y +CONFIG_SYS_MALLOC_F_LEN=0x6000 +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_ENV_OFFSET=0x500000 +CONFIG_DM_GPIO=y +CONFIG_FSPI_AHB_EN_4BYTE=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y +CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y +CONFIG_AHCI=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M" +CONFIG_SYS_EXTRA_OPTIONS="LPUART" +CONFIG_MISC_INIT_R=y +CONFIG_CMD_GREPENV=y +CONFIG_CMD_DM=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y +CONFIG_CMD_WDT=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_CACHE=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds-lpuart" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_ENV_ADDR=0x20500000 +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_NETCONSOLE=y +CONFIG_DM=y +CONFIG_SCSI_AHCI=y +CONFIG_SATA_CEVA=y +CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_I2C_DEFAULT_BUS_NUMBER=0 +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA954x=y +CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y +CONFIG_MTD=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PHYLIB=y +CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_DM_MDIO_MUX=y +CONFIG_E1000=y +CONFIG_FSL_ENETC=y +CONFIG_MDIO_MUX_I2CREG=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_ECAM_GENERIC=y +CONFIG_PCIE_LAYERSCAPE=y +CONFIG_DM_RTC=y +CONFIG_RTC_PCF2127=y +CONFIG_SCSI=y +CONFIG_DM_SCSI=y +CONFIG_DM_SERIAL=y +CONFIG_FSL_LPUART=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_FSL_DSPI=y +CONFIG_NXP_FSPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_WDT=y +CONFIG_WDT_SP805=y +CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig index 6fa14af6afe..947c4b46132 100644 --- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig @@ -2,8 +2,8 @@ CONFIG_ARM=y CONFIG_TARGET_LS1028ARDB=y CONFIG_TFABOOT=y CONFIG_SYS_MALLOC_F_LEN=0x6000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_NR_DRAM_BANKS=2 @@ -76,3 +76,4 @@ CONFIG_WDT_SP805=y CONFIG_RSA=y CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_GIC_V3_ITS=y diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig index 7ffd1c3bc6e..ad6de6ca011 100644 --- a/configs/ls1028ardb_tfa_defconfig +++ b/configs/ls1028ardb_tfa_defconfig @@ -3,8 +3,8 @@ CONFIG_TARGET_LS1028ARDB=y CONFIG_TFABOOT=y CONFIG_SYS_MALLOC_F_LEN=0x6000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x500000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_NR_DRAM_BANKS=2 @@ -85,3 +85,4 @@ CONFIG_WDT=y CONFIG_WDT_SP805=y CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_GIC_V3_ITS=y diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig index 93b86af6074..cd01a8dc374 100644 --- a/configs/ls1043aqds_defconfig +++ b/configs/ls1043aqds_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_LS1043AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_NR_DRAM_BANKS=2 CONFIG_AHCI=y @@ -35,6 +36,7 @@ CONFIG_ENV_ADDR=0x60300000 CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -46,6 +48,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -62,5 +67,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig index f89c2ee3a4f..1976e27d7fb 100644 --- a/configs/ls1043aqds_lpuart_defconfig +++ b/configs/ls1043aqds_lpuart_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_LS1043AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_NR_DRAM_BANKS=2 CONFIG_AHCI=y @@ -36,6 +37,7 @@ CONFIG_ENV_ADDR=0x60300000 CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -47,6 +49,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -64,5 +69,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index a169bfef8f6..1a1643eded3 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -5,13 +5,14 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 +CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x10000000 +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -52,6 +53,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -62,6 +64,9 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -78,5 +83,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig index 01d0af30b17..bd05cab3abc 100644 --- a/configs/ls1043aqds_nor_ddr3_defconfig +++ b/configs/ls1043aqds_nor_ddr3_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_LS1043AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_NR_DRAM_BANKS=2 CONFIG_AHCI=y @@ -36,6 +37,7 @@ CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -47,6 +49,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -63,5 +68,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig index 65eff7c40b8..50af1a79ef5 100644 --- a/configs/ls1043aqds_qspi_defconfig +++ b/configs/ls1043aqds_qspi_defconfig @@ -2,8 +2,9 @@ CONFIG_ARM=y CONFIG_TARGET_LS1043AQDS=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x300000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_NR_DRAM_BANKS=2 CONFIG_AHCI=y @@ -36,11 +37,15 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -58,5 +63,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index c5042a345d7..e5a91a3ab20 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -5,14 +5,15 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 +CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x10000000 +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -52,6 +53,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -63,6 +65,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -79,5 +84,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index 12706a48dc8..42d0642ff72 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -5,14 +5,15 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 +CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x10000000 +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -50,11 +51,15 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -72,5 +77,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig index b7335bcd335..9dccd1131d0 100644 --- a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig @@ -2,8 +2,9 @@ CONFIG_ARM=y CONFIG_TARGET_LS1043AQDS=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y +CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=2 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y @@ -34,6 +35,7 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_DM=y CONFIG_SATA_CEVA=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -45,6 +47,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -63,5 +68,3 @@ CONFIG_RSA=y CONFIG_SPL_RSA=y CONFIG_RSA_SOFTWARE_EXP=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1043aqds_tfa_defconfig b/configs/ls1043aqds_tfa_defconfig index 6e594ed07c6..2be983f10fd 100644 --- a/configs/ls1043aqds_tfa_defconfig +++ b/configs/ls1043aqds_tfa_defconfig @@ -3,8 +3,9 @@ CONFIG_TARGET_LS1043AQDS=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_ENV_OFFSET=0x500000 +CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=2 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y @@ -43,6 +44,7 @@ CONFIG_ENV_ADDR=0x60500000 CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -55,6 +57,9 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 # CONFIG_SPI_FLASH_BAR is not set CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -71,5 +76,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig index 153a62866ff..911bbef72c3 100644 --- a/configs/ls1043ardb_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_SECURE_BOOT_defconfig @@ -1,8 +1,9 @@ CONFIG_ARM=y CONFIG_TARGET_LS1043ARDB=y CONFIG_SYS_TEXT_BASE=0x60100000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x20000 +CONFIG_NXP_ESBC=y +CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_NR_DRAM_BANKS=2 CONFIG_DISTRO_DEFAULTS=y @@ -13,6 +14,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" CONFIG_MISC_INIT_R=y CONFIG_CMD_IMLS=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -25,6 +27,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_DM=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -36,6 +39,10 @@ CONFIG_MTD_RAW_NAND=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_PHYLIB=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y @@ -55,5 +62,3 @@ CONFIG_RSA=y CONFIG_SPL_RSA=y CONFIG_RSA_SOFTWARE_EXP=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig index d1e534388b9..4a15992f7c4 100644 --- a/configs/ls1043ardb_defconfig +++ b/configs/ls1043ardb_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_LS1043ARDB=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_NR_DRAM_BANKS=2 CONFIG_DISTRO_DEFAULTS=y @@ -13,6 +14,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" CONFIG_MISC_INIT_R=y CONFIG_CMD_IMLS=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -28,6 +30,7 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0x60300000 CONFIG_DM=y CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -40,6 +43,10 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -55,5 +62,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index 252c7c8313a..f399b1cbb37 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -3,8 +3,9 @@ CONFIG_TARGET_LS1043ARDB=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y +CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -31,6 +32,7 @@ CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_IMLS=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -46,6 +48,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SPL_DM=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -57,6 +60,10 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -75,5 +82,3 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_RSA=y CONFIG_SPL_RSA=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index de18aaa0635..5f794605d66 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 +CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -31,6 +32,7 @@ CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_IMLS=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -47,6 +49,7 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -58,6 +61,10 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -74,5 +81,3 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y # CONFIG_SPL_USE_TINY_PRINTF is not set CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index 149b25ffe52..224321810a5 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -3,8 +3,9 @@ CONFIG_TARGET_LS1043ARDB=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y +CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -30,6 +31,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_IMLS=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -45,6 +47,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SPL_DM=y +CONFIG_DM_I2C=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y @@ -55,6 +58,10 @@ CONFIG_MTD_RAW_NAND=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_PHYLIB=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y @@ -74,5 +81,3 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_RSA=y CONFIG_SPL_RSA=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index b386fc668cc..bf557d7650b 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 +CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -29,6 +30,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_IMLS=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -45,6 +47,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -57,6 +60,10 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -73,5 +80,3 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y # CONFIG_SPL_USE_TINY_PRINTF is not set CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig index 36eb0fcff72..0f3f920ffdf 100644 --- a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig @@ -2,8 +2,9 @@ CONFIG_ARM=y CONFIG_TARGET_LS1043ARDB=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y +CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=2 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y @@ -15,6 +16,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" CONFIG_MISC_INIT_R=y CONFIG_CMD_IMLS=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -27,6 +29,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_DM=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -38,6 +41,10 @@ CONFIG_MTD_RAW_NAND=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_PHYLIB=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y @@ -56,5 +63,3 @@ CONFIG_RSA=y CONFIG_SPL_RSA=y CONFIG_RSA_SOFTWARE_EXP=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1043ardb_tfa_defconfig b/configs/ls1043ardb_tfa_defconfig index eaddbca79f8..a62310ccc9a 100644 --- a/configs/ls1043ardb_tfa_defconfig +++ b/configs/ls1043ardb_tfa_defconfig @@ -3,8 +3,9 @@ CONFIG_TARGET_LS1043ARDB=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_ENV_OFFSET=0x500000 +CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=2 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y @@ -16,6 +17,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" CONFIG_MISC_INIT_R=y CONFIG_CMD_IMLS=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -33,6 +35,7 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_ENV_ADDR=0x60500000 CONFIG_DM=y CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -45,6 +48,10 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -59,5 +66,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1046afrwy_tfa_defconfig b/configs/ls1046afrwy_tfa_defconfig index 616984f7d75..48dc7acf9f6 100644 --- a/configs/ls1046afrwy_tfa_defconfig +++ b/configs/ls1046afrwy_tfa_defconfig @@ -3,8 +3,9 @@ CONFIG_TARGET_LS1046AFRWY=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x500000 +CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_DM_GPIO=y CONFIG_QSPI_AHB_INIT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y @@ -34,6 +35,7 @@ CONFIG_ENV_ADDR=0x40500000 CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -62,5 +64,3 @@ CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_ASIX88179=y CONFIG_USB_ETHER_RTL8152=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig index ed25b7a680b..d3521c37b5b 100644 --- a/configs/ls1046aqds_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_SECURE_BOOT_defconfig @@ -1,8 +1,9 @@ CONFIG_ARM=y CONFIG_TARGET_LS1046AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x20000 +CONFIG_NXP_ESBC=y +CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_NR_DRAM_BANKS=2 CONFIG_AHCI=y @@ -32,6 +33,7 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_DM=y CONFIG_SATA_CEVA=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -42,6 +44,9 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -60,5 +65,3 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_RSA=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig index 0a50bb14c02..cf92386dc27 100644 --- a/configs/ls1046aqds_defconfig +++ b/configs/ls1046aqds_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_LS1046AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_NR_DRAM_BANKS=2 CONFIG_AHCI=y @@ -35,6 +36,7 @@ CONFIG_ENV_ADDR=0x60300000 CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -45,6 +47,9 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -62,5 +67,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig index 17d1685081f..a75a523f54f 100644 --- a/configs/ls1046aqds_lpuart_defconfig +++ b/configs/ls1046aqds_lpuart_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_LS1046AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_NR_DRAM_BANKS=2 CONFIG_AHCI=y @@ -36,6 +37,7 @@ CONFIG_ENV_ADDR=0x60300000 CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -46,6 +48,9 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -64,5 +69,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig index 0bafcbe168d..8f92af55b25 100644 --- a/configs/ls1046aqds_nand_defconfig +++ b/configs/ls1046aqds_nand_defconfig @@ -3,12 +3,13 @@ CONFIG_TARGET_LS1046AQDS=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 +CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x10000000 +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -44,6 +45,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -53,6 +55,9 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -70,5 +75,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig index ff0fd45c9ec..239483f3142 100644 --- a/configs/ls1046aqds_qspi_defconfig +++ b/configs/ls1046aqds_qspi_defconfig @@ -2,8 +2,9 @@ CONFIG_ARM=y CONFIG_TARGET_LS1046AQDS=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x300000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_NR_DRAM_BANKS=2 CONFIG_AHCI=y @@ -35,11 +36,15 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y # CONFIG_SPI_FLASH_BAR is not set # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -58,5 +63,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig index 78edb456b84..c5ef64a70a3 100644 --- a/configs/ls1046aqds_sdcard_ifc_defconfig +++ b/configs/ls1046aqds_sdcard_ifc_defconfig @@ -5,14 +5,15 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 +CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x10000000 +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -53,6 +54,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -63,6 +65,9 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -80,5 +85,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index d085daf384c..a4d714f801b 100644 --- a/configs/ls1046aqds_sdcard_qspi_defconfig +++ b/configs/ls1046aqds_sdcard_qspi_defconfig @@ -5,14 +5,15 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 +CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x10000000 +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -51,11 +52,15 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y # CONFIG_SPI_FLASH_BAR is not set # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -74,5 +79,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig index 6a9391478b4..ece7c19ce09 100644 --- a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig @@ -2,8 +2,9 @@ CONFIG_ARM=y CONFIG_TARGET_LS1046AQDS=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y +CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=2 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y @@ -34,6 +35,7 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_DM=y CONFIG_SATA_CEVA=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -44,6 +46,9 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -61,5 +66,3 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_RSA=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1046aqds_tfa_defconfig b/configs/ls1046aqds_tfa_defconfig index 04e6b2392c2..f1693e1f4cb 100644 --- a/configs/ls1046aqds_tfa_defconfig +++ b/configs/ls1046aqds_tfa_defconfig @@ -3,8 +3,9 @@ CONFIG_TARGET_LS1046AQDS=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_ENV_OFFSET=0x500000 +CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=2 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y @@ -43,6 +44,7 @@ CONFIG_ENV_ADDR=0x60500000 CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -54,6 +56,9 @@ CONFIG_MTD_RAW_NAND=y CONFIG_SF_DEFAULT_BUS=1 # CONFIG_SPI_FLASH_BAR is not set CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -71,5 +76,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig index bbb352db316..def9140fd64 100644 --- a/configs/ls1046ardb_emmc_defconfig +++ b/configs/ls1046ardb_emmc_defconfig @@ -5,14 +5,15 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 +CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x10000000 +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -31,6 +32,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -48,6 +50,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -56,6 +59,9 @@ CONFIG_MTD_RAW_NAND=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -73,5 +79,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig index b9c8a8822cf..1f8922293f8 100644 --- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig @@ -1,8 +1,9 @@ CONFIG_ARM=y CONFIG_TARGET_LS1046ARDB=y CONFIG_SYS_TEXT_BASE=0x40100000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y +CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_NR_DRAM_BANKS=2 @@ -15,6 +16,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_MISC_INIT_R=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -29,6 +31,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -37,6 +40,9 @@ CONFIG_MTD_RAW_NAND=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -55,5 +61,3 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_RSA=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig index 51edada3f86..8b1b6950fbe 100644 --- a/configs/ls1046ardb_qspi_defconfig +++ b/configs/ls1046ardb_qspi_defconfig @@ -2,8 +2,9 @@ CONFIG_ARM=y CONFIG_TARGET_LS1046ARDB=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x300000 +CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_NR_DRAM_BANKS=2 @@ -16,6 +17,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_MISC_INIT_R=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -32,6 +34,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -40,6 +43,9 @@ CONFIG_MTD_RAW_NAND=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -57,5 +63,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig index 84e059671c2..cbc598dea80 100644 --- a/configs/ls1046ardb_qspi_spl_defconfig +++ b/configs/ls1046ardb_qspi_spl_defconfig @@ -4,8 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x300000 +CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y @@ -13,8 +14,8 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x10000000 +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y @@ -33,6 +34,7 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_OS_BASE=0x40980000 CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_SPL=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -51,6 +53,7 @@ CONFIG_SPL_ENV_IS_NOWHERE=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -58,6 +61,9 @@ CONFIG_MTD_RAW_NAND=y # CONFIG_SPI_FLASH_BAR is not set # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_FMAN_ENET=y @@ -77,5 +83,3 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_SPL_GZIP=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig index 9954e894dac..aeac0a248ed 100644 --- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig @@ -3,8 +3,9 @@ CONFIG_TARGET_LS1046ARDB=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y +CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -30,6 +31,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -45,6 +47,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SPL_DM=y +CONFIG_DM_I2C=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y @@ -52,6 +55,9 @@ CONFIG_MTD_RAW_NAND=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -70,5 +76,3 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_RSA=y CONFIG_SPL_RSA=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig index 35028097564..878bdf05130 100644 --- a/configs/ls1046ardb_sdcard_defconfig +++ b/configs/ls1046ardb_sdcard_defconfig @@ -5,14 +5,15 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 +CONFIG_DM_GPIO=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x10000000 +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -30,6 +31,7 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -47,6 +49,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -55,6 +58,9 @@ CONFIG_MTD_RAW_NAND=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -72,5 +78,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig index 9e3042b797e..140da79d0bc 100644 --- a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig @@ -2,8 +2,9 @@ CONFIG_ARM=y CONFIG_TARGET_LS1046ARDB=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y +CONFIG_DM_GPIO=y CONFIG_QSPI_AHB_INIT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y @@ -16,6 +17,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_MISC_INIT_R=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -29,6 +31,7 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_DM=y CONFIG_SATA_CEVA=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -37,6 +40,9 @@ CONFIG_MTD_RAW_NAND=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -54,5 +60,3 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_RSA=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1046ardb_tfa_defconfig b/configs/ls1046ardb_tfa_defconfig index 2f7686bafd1..eab34cd7175 100644 --- a/configs/ls1046ardb_tfa_defconfig +++ b/configs/ls1046ardb_tfa_defconfig @@ -3,8 +3,9 @@ CONFIG_TARGET_LS1046ARDB=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x500000 +CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_DM_GPIO=y CONFIG_QSPI_AHB_INIT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y @@ -17,6 +18,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_MISC_INIT_R=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -34,6 +36,7 @@ CONFIG_ENV_ADDR=0x40500000 CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -42,6 +45,9 @@ CONFIG_MTD_RAW_NAND=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_FMAN_ENET=y CONFIG_PCI=y @@ -58,5 +64,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_DM_I2C=y -CONFIG_DM_GPIO=y diff --git a/configs/ls1088aqds_defconfig b/configs/ls1088aqds_defconfig index 7713e58bbe1..69e3a8fbbfc 100644 --- a/configs/ls1088aqds_defconfig +++ b/configs/ls1088aqds_defconfig @@ -42,6 +42,11 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_DM_SPI_FLASH=y +CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_MII=y CONFIG_PCI=y @@ -59,3 +64,4 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_USB_DWC3=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_GIC_V3_ITS=y diff --git a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig index 242c40b8b5a..3a363790d9b 100644 --- a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig @@ -1,8 +1,8 @@ CONFIG_ARM=y CONFIG_TARGET_LS1088AQDS=y CONFIG_SYS_TEXT_BASE=0x20100000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_NR_DRAM_BANKS=2 @@ -24,6 +24,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MDIO is not set CONFIG_MP=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" @@ -39,6 +40,11 @@ CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_MII=y CONFIG_PCI=y @@ -60,3 +66,4 @@ CONFIG_USB_GADGET=y CONFIG_RSA=y CONFIG_RSA_SOFTWARE_EXP=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_GIC_V3_ITS=y diff --git a/configs/ls1088aqds_qspi_defconfig b/configs/ls1088aqds_qspi_defconfig index 3649b06a754..117fdd8588e 100644 --- a/configs/ls1088aqds_qspi_defconfig +++ b/configs/ls1088aqds_qspi_defconfig @@ -2,8 +2,8 @@ CONFIG_ARM=y CONFIG_TARGET_LS1088AQDS=y CONFIG_SYS_TEXT_BASE=0x20100000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x300000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_NR_DRAM_BANKS=2 @@ -25,6 +25,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MDIO is not set CONFIG_MP=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" @@ -42,6 +43,11 @@ CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_MII=y CONFIG_PCI=y @@ -61,3 +67,4 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_USB_DWC3=y CONFIG_USB_GADGET=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_GIC_V3_ITS=y diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig index 815ea5ce4a2..eedee1e88f8 100644 --- a/configs/ls1088aqds_sdcard_ifc_defconfig +++ b/configs/ls1088aqds_sdcard_ifc_defconfig @@ -11,8 +11,8 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x1800a000 +CONFIG_AHCI=y # CONFIG_SYS_MALLOC_F is not set CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" @@ -52,6 +52,11 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_MII=y CONFIG_PCI=y @@ -67,3 +72,4 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_USB_DWC3=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y +CONFIG_GIC_V3_ITS=y diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig index 275dbf9e0ee..621c411aca6 100644 --- a/configs/ls1088aqds_sdcard_qspi_defconfig +++ b/configs/ls1088aqds_sdcard_qspi_defconfig @@ -11,8 +11,8 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x1800a000 +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y @@ -35,6 +35,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MDIO is not set CONFIG_MP=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" @@ -52,6 +53,11 @@ CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_MII=y CONFIG_PCI=y @@ -70,3 +76,4 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_DWC3=y CONFIG_USB_GADGET=y +CONFIG_GIC_V3_ITS=y diff --git a/configs/ls1088aqds_tfa_defconfig b/configs/ls1088aqds_tfa_defconfig index 1144cba983c..2bb84e158cd 100644 --- a/configs/ls1088aqds_tfa_defconfig +++ b/configs/ls1088aqds_tfa_defconfig @@ -4,8 +4,8 @@ CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_F_LEN=0x6000 CONFIG_ENV_SIZE=0x20000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x500000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_QSPI_AHB_INIT=y CONFIG_NR_DRAM_BANKS=2 @@ -28,6 +28,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MDIO is not set CONFIG_MP=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" @@ -57,6 +58,11 @@ CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_E1000=y CONFIG_MII=y CONFIG_PCI=y @@ -78,3 +84,4 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_USB_DWC3=y CONFIG_USB_GADGET=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_GIC_V3_ITS=y diff --git a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig index 3f654e2e1d0..806d7705dea 100644 --- a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig @@ -1,8 +1,9 @@ CONFIG_ARM=y +CONFIG_GIC_V3_ITS=y CONFIG_TARGET_LS1088ARDB=y CONFIG_SYS_TEXT_BASE=0x20100000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_NR_DRAM_BANKS=2 @@ -21,10 +22,12 @@ CONFIG_MISC_INIT_R=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y +CONFIG_CMD_DM=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MDIO is not set CONFIG_MP=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" @@ -40,8 +43,13 @@ CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PHYLIB=y +CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_MII=y +CONFIG_FSL_LS_MDIO=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/ls1088ardb_qspi_defconfig b/configs/ls1088ardb_qspi_defconfig index 935d76b4bed..9b66fd91017 100644 --- a/configs/ls1088ardb_qspi_defconfig +++ b/configs/ls1088ardb_qspi_defconfig @@ -1,9 +1,10 @@ CONFIG_ARM=y +CONFIG_GIC_V3_ITS=y CONFIG_TARGET_LS1088ARDB=y CONFIG_SYS_TEXT_BASE=0x20100000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x300000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_NR_DRAM_BANKS=2 @@ -22,10 +23,12 @@ CONFIG_MISC_INIT_R=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y +CONFIG_CMD_DM=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MDIO is not set CONFIG_MP=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" @@ -43,8 +46,13 @@ CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PHYLIB=y +CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_MII=y +CONFIG_FSL_LS_MDIO=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig index 562cbdd3abd..4a15f82e9e5 100644 --- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig @@ -1,10 +1,11 @@ CONFIG_ARM=y +CONFIG_GIC_V3_ITS=y CONFIG_TARGET_LS1088ARDB=y CONFIG_SYS_TEXT_BASE=0x80400000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -33,10 +34,12 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y +CONFIG_CMD_DM=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MDIO is not set CONFIG_MP=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" @@ -52,8 +55,13 @@ CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PHYLIB=y +CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_MII=y +CONFIG_FSL_LS_MDIO=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig index 1e6fdceca1e..1ab1fa3a2f6 100644 --- a/configs/ls1088ardb_sdcard_qspi_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_GIC_V3_ITS=y CONFIG_TARGET_LS1088ARDB=y CONFIG_SYS_TEXT_BASE=0x80400000 CONFIG_SPL_LIBCOMMON_SUPPORT=y @@ -11,8 +12,8 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x1800a000 +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y @@ -32,10 +33,12 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y +CONFIG_CMD_DM=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MDIO is not set CONFIG_MP=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" @@ -53,8 +56,13 @@ CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PHYLIB=y +CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_MII=y +CONFIG_FSL_LS_MDIO=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig index 0086039e524..4ad9a66333a 100644 --- a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig @@ -1,10 +1,11 @@ CONFIG_ARM=y +CONFIG_GIC_V3_ITS=y CONFIG_TARGET_LS1088ARDB=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_F_LEN=0x6000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_QSPI_AHB_INIT=y CONFIG_NR_DRAM_BANKS=2 @@ -24,9 +25,11 @@ CONFIG_MISC_INIT_R=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y +CONFIG_CMD_DM=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y +# CONFIG_CMD_MDIO is not set CONFIG_MP=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" @@ -47,8 +50,13 @@ CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PHYLIB=y +CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_MII=y +CONFIG_FSL_LS_MDIO=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/ls1088ardb_tfa_defconfig b/configs/ls1088ardb_tfa_defconfig index a7908e95b5c..7690292db4d 100644 --- a/configs/ls1088ardb_tfa_defconfig +++ b/configs/ls1088ardb_tfa_defconfig @@ -1,11 +1,12 @@ CONFIG_ARM=y +CONFIG_GIC_V3_ITS=y CONFIG_TARGET_LS1088ARDB=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_F_LEN=0x6000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x500000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_QSPI_AHB_INIT=y CONFIG_NR_DRAM_BANKS=2 @@ -25,10 +26,12 @@ CONFIG_MISC_INIT_R=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y +CONFIG_CMD_DM=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MDIO is not set CONFIG_MP=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" @@ -52,8 +55,13 @@ CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PHYLIB=y +CONFIG_PHY_VITESSE=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_MII=y +CONFIG_FSL_LS_MDIO=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig index 8a792e449a7..4c85b1148f3 100644 --- a/configs/ls2080aqds_SECURE_BOOT_defconfig +++ b/configs/ls2080aqds_SECURE_BOOT_defconfig @@ -1,8 +1,8 @@ CONFIG_ARM=y CONFIG_TARGET_LS2080AQDS=y CONFIG_SYS_TEXT_BASE=0x30100000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_FSL_LS_PPA=y CONFIG_NR_DRAM_BANKS=3 CONFIG_AHCI=y @@ -43,6 +43,10 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_DM_SPI_FLASH=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y @@ -62,3 +66,4 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_RSA=y CONFIG_RSA_SOFTWARE_EXP=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_GIC_V3_ITS=y diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig index bc4c218c21f..0f8e22b304f 100644 --- a/configs/ls2080aqds_defconfig +++ b/configs/ls2080aqds_defconfig @@ -46,6 +46,10 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_DM_SPI_FLASH=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y @@ -63,3 +67,4 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_GIC_V3_ITS=y diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index e840cbf0ef0..044177088c9 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -9,8 +9,8 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_NR_DRAM_BANKS=3 CONFIG_SPL=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x1800a000 +CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -53,6 +53,10 @@ CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y @@ -70,3 +74,4 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_GIC_V3_ITS=y diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig index 861e652f7f6..c159c153da6 100644 --- a/configs/ls2080aqds_qspi_defconfig +++ b/configs/ls2080aqds_qspi_defconfig @@ -2,8 +2,8 @@ CONFIG_ARM=y CONFIG_TARGET_LS2080AQDS=y CONFIG_SYS_TEXT_BASE=0x20100000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x300000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_NR_DRAM_BANKS=3 CONFIG_AHCI=y CONFIG_FIT=y @@ -45,6 +45,10 @@ CONFIG_MTD_RAW_NAND=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y @@ -62,3 +66,4 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_GIC_V3_ITS=y diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig index 864e70d3342..ac0b635191c 100644 --- a/configs/ls2080aqds_sdcard_defconfig +++ b/configs/ls2080aqds_sdcard_defconfig @@ -11,8 +11,8 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_NR_DRAM_BANKS=3 CONFIG_SPL=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x1800a000 +CONFIG_AHCI=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y @@ -52,6 +52,10 @@ CONFIG_MTD_RAW_NAND=y CONFIG_DM_SPI_FLASH=y # CONFIG_SPI_FLASH_BAR is not set CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y @@ -69,3 +73,4 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_GIC_V3_ITS=y diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig index 4abfc64705c..94087cee01a 100644 --- a/configs/ls2080ardb_SECURE_BOOT_defconfig +++ b/configs/ls2080ardb_SECURE_BOOT_defconfig @@ -1,8 +1,8 @@ CONFIG_ARM=y CONFIG_TARGET_LS2080ARDB=y CONFIG_SYS_TEXT_BASE=0x30100000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_FSL_LS_PPA=y CONFIG_NR_DRAM_BANKS=3 CONFIG_AHCI=y @@ -64,3 +64,4 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_RSA=y CONFIG_RSA_SOFTWARE_EXP=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_GIC_V3_ITS=y diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig index 0102e14ecb8..e9dfc3603ea 100644 --- a/configs/ls2080ardb_defconfig +++ b/configs/ls2080ardb_defconfig @@ -65,3 +65,4 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_GIC_V3_ITS=y diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index 448e0fe58d9..d1086f976c6 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -9,8 +9,8 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_NR_DRAM_BANKS=3 CONFIG_SPL=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x1800a000 +CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -70,3 +70,4 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_GIC_V3_ITS=y diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig index e446a1120bf..032cb406338 100644 --- a/configs/ls2081ardb_defconfig +++ b/configs/ls2081ardb_defconfig @@ -2,8 +2,8 @@ CONFIG_ARM=y CONFIG_TARGET_LS2081ARDB=y CONFIG_SYS_TEXT_BASE=0x20100000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x300000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_NR_DRAM_BANKS=3 @@ -62,3 +62,4 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_GIC_V3_ITS=y diff --git a/configs/ls2088aqds_tfa_defconfig b/configs/ls2088aqds_tfa_defconfig index 9f49736b4f3..81bc489d19a 100644 --- a/configs/ls2088aqds_tfa_defconfig +++ b/configs/ls2088aqds_tfa_defconfig @@ -3,8 +3,8 @@ CONFIG_TARGET_LS2080AQDS=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_ENV_SIZE=0x20000 -CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_ENV_OFFSET=0x500000 +CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=3 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y @@ -56,6 +56,10 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_DM_SPI_FLASH=y CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TERANETICS=y +CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y CONFIG_MII=y @@ -74,3 +78,4 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_GIC_V3_ITS=y diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig index ae4a6820ff6..2d71baeced7 100644 --- a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig @@ -1,8 +1,8 @@ CONFIG_ARM=y CONFIG_TARGET_LS2080ARDB=y CONFIG_SYS_TEXT_BASE=0x20100000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_NR_DRAM_BANKS=3 @@ -16,6 +16,7 @@ CONFIG_BOOTDELAY=10 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_MISC_INIT_R=y CONFIG_CMD_GREPENV=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -39,8 +40,11 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_MII=y +CONFIG_FSL_LS_MDIO=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y @@ -59,3 +63,4 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_RSA=y CONFIG_RSA_SOFTWARE_EXP=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_GIC_V3_ITS=y diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig index 1ad5f3b367e..85b8dac9924 100644 --- a/configs/ls2088ardb_qspi_defconfig +++ b/configs/ls2088ardb_qspi_defconfig @@ -2,8 +2,8 @@ CONFIG_ARM=y CONFIG_TARGET_LS2080ARDB=y CONFIG_SYS_TEXT_BASE=0x20100000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x300000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_NR_DRAM_BANKS=3 @@ -19,6 +19,7 @@ CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_MISC_INIT_R=y CONFIG_CMD_GREPENV=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -45,8 +46,11 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_MII=y +CONFIG_FSL_LS_MDIO=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y @@ -63,3 +67,4 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_GIC_V3_ITS=y diff --git a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig index c0d0a99c8ad..39a69734fea 100644 --- a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig @@ -3,8 +3,8 @@ CONFIG_TARGET_LS2080ARDB=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_F_LEN=0x6000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_QSPI_AHB_INIT=y CONFIG_NR_DRAM_BANKS=3 @@ -22,6 +22,7 @@ CONFIG_MISC_INIT_R=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -31,7 +32,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_MP=y CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y @@ -54,8 +55,11 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_MII=y +CONFIG_FSL_LS_MDIO=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y @@ -76,3 +80,4 @@ CONFIG_RSA=y CONFIG_SPL_RSA=y CONFIG_RSA_SOFTWARE_EXP=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_GIC_V3_ITS=y diff --git a/configs/ls2088ardb_tfa_defconfig b/configs/ls2088ardb_tfa_defconfig index ccbaaf7a5c6..34b94394c7c 100644 --- a/configs/ls2088ardb_tfa_defconfig +++ b/configs/ls2088ardb_tfa_defconfig @@ -4,8 +4,8 @@ CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_F_LEN=0x6000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x500000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_QSPI_AHB_INIT=y CONFIG_NR_DRAM_BANKS=3 @@ -23,6 +23,7 @@ CONFIG_MISC_INIT_R=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -62,8 +63,11 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_CORTINA=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y CONFIG_MII=y +CONFIG_FSL_LS_MDIO=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y @@ -81,3 +85,4 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_GIC_V3_ITS=y diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig index 716aca30b10..2ce23464b92 100644 --- a/configs/lschlv2_defconfig +++ b/configs/lschlv2_defconfig @@ -5,8 +5,8 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_LSXL=y CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x70000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_NR_DRAM_BANKS=2 CONFIG_IDENT_STRING=" LS-CHLv2" CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig index 2e760e5176c..336fb34d5ba 100644 --- a/configs/lsxhl_defconfig +++ b/configs/lsxhl_defconfig @@ -5,8 +5,8 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_LSXL=y CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x70000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_NR_DRAM_BANKS=2 CONFIG_IDENT_STRING=" LS-XHL" CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig index 319f7103829..cd7b413bfcd 100644 --- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig @@ -1,10 +1,11 @@ CONFIG_ARM=y +CONFIG_GIC_V3_ITS=y CONFIG_TARGET_LX2160AQDS=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_F_LEN=0x6000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_NR_DRAM_BANKS=3 @@ -74,4 +75,3 @@ CONFIG_RSA=y CONFIG_SPL_RSA=y CONFIG_RSA_SOFTWARE_EXP=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_GIC_V3_ITS=y diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig index 0161dba9a72..9b6ce385543 100644 --- a/configs/lx2160aqds_tfa_defconfig +++ b/configs/lx2160aqds_tfa_defconfig @@ -1,11 +1,12 @@ CONFIG_ARM=y +CONFIG_GIC_V3_ITS=y CONFIG_TARGET_LX2160AQDS=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_F_LEN=0x6000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_ENV_OFFSET=0x500000 +CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_NR_DRAM_BANKS=3 @@ -74,4 +75,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_GIC_V3_ITS=y diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig index 10098ab5a9d..23f814fb6ce 100644 --- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig @@ -1,10 +1,11 @@ CONFIG_ARM=y +CONFIG_GIC_V3_ITS=y CONFIG_TARGET_LX2160ARDB=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_F_LEN=0x6000 -CONFIG_NXP_ESBC=y CONFIG_ENV_SIZE=0x2000 +CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_EMC2305=y CONFIG_FSPI_AHB_EN_4BYTE=y @@ -21,6 +22,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x2 CONFIG_MISC_INIT_R=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -48,7 +50,10 @@ CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_CORTINA=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y +CONFIG_FSL_LS_MDIO=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y @@ -69,4 +74,3 @@ CONFIG_RSA=y CONFIG_SPL_RSA=y CONFIG_RSA_SOFTWARE_EXP=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_GIC_V3_ITS=y diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig index c8582aa40d6..bc654cfee91 100644 --- a/configs/lx2160ardb_tfa_defconfig +++ b/configs/lx2160ardb_tfa_defconfig @@ -1,11 +1,12 @@ CONFIG_ARM=y +CONFIG_GIC_V3_ITS=y CONFIG_TARGET_LX2160ARDB=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_F_LEN=0x6000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_ENV_OFFSET=0x500000 +CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_EMC2305=y CONFIG_FSPI_AHB_EN_4BYTE=y @@ -23,6 +24,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x2 CONFIG_MISC_INIT_R=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y +CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -54,7 +56,10 @@ CONFIG_PHYLIB=y CONFIG_PHY_AQUANTIA=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_CORTINA=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y +CONFIG_FSL_LS_MDIO=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y @@ -72,4 +77,3 @@ CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y -CONFIG_GIC_V3_ITS=y diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig index b7c1e6fcd87..a65c21a139e 100644 --- a/configs/m53menlo_defconfig +++ b/configs/m53menlo_defconfig @@ -5,9 +5,9 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x8000 -CONFIG_TARGET_M53MENLO=y CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_TARGET_M53MENLO=y CONFIG_DM_GPIO=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 diff --git a/configs/marsboard_defconfig b/configs/marsboard_defconfig index 4e1dbf1ec2a..765a3ca2b68 100644 --- a/configs/marsboard_defconfig +++ b/configs/marsboard_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_TARGET_EMBESTMX6BOARDS=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x2000 +CONFIG_TARGET_EMBESTMX6BOARDS=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024" @@ -30,6 +30,7 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig index 9cc9d663937..1bdb151d0f8 100644 --- a/configs/maxbcm_defconfig +++ b/configs/maxbcm_defconfig @@ -7,22 +7,22 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_MAXBCM=y CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x40004030 +CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_I2C_SUPPORT=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_CMD_I2C=y CONFIG_CMD_SPI=y # CONFIG_CMD_SETEXPR is not set diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig index a49b638393c..2750747ecef 100644 --- a/configs/mccmon6_nor_defconfig +++ b/configs/mccmon6_nor_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_ENV_SIZE=0x20000 +CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_TARGET_MCCMON6=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y -CONFIG_ENV_SIZE=0x20000 -CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig index c2e42c491c1..6c72a5183f1 100644 --- a/configs/mccmon6_sd_defconfig +++ b/configs/mccmon6_sd_defconfig @@ -3,11 +3,11 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_ENV_SIZE=0x20000 +CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_TARGET_MCCMON6=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y -CONFIG_ENV_SIZE=0x20000 -CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/meesc_dataflash_defconfig b/configs/meesc_dataflash_defconfig index 30700a42e97..63496d2eb2a 100644 --- a/configs/meesc_dataflash_defconfig +++ b/configs/meesc_dataflash_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x21F00000 CONFIG_TARGET_MEESC=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x4200 -CONFIG_ENV_SECT_SIZE=0x210 CONFIG_ENV_OFFSET=0x4200 +CONFIG_ENV_SECT_SIZE=0x210 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig index 91ce67ef8a0..127fd5d53e0 100644 --- a/configs/minnowmax_defconfig +++ b/configs/minnowmax_defconfig @@ -1,8 +1,8 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0xFFF00000 CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x6EF000 +CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_NR_DRAM_BANKS=8 CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig index e3e205fd54a..5332abff4e6 100644 --- a/configs/miqi-rk3288_defconfig +++ b/configs/miqi-rk3288_defconfig @@ -9,8 +9,8 @@ CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0xff704000 +CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y CONFIG_SILENT_CONSOLE=y @@ -70,12 +70,12 @@ CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_DWC2=y CONFIG_ROCKCHIP_USB2_PHY=y +CONFIG_USB_KEYBOARD=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_SMSC95XX=y -CONFIG_USB_KEYBOARD=y CONFIG_DM_VIDEO=y # CONFIG_VIDEO_BPP8 is not set CONFIG_DISPLAY=y diff --git a/configs/mixtile_loftq_defconfig b/configs/mixtile_loftq_defconfig index 829491fa8e6..e4b354933cd 100644 --- a/configs/mixtile_loftq_defconfig +++ b/configs/mixtile_loftq_defconfig @@ -9,6 +9,7 @@ CONFIG_USB1_VBUS_PIN="PH24" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mixtile-loftq" +CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y CONFIG_MII=y diff --git a/configs/mpc8308_p1m_defconfig b/configs/mpc8308_p1m_defconfig index 7dd8808b41e..aa678d2035e 100644 --- a/configs/mpc8308_p1m_defconfig +++ b/configs/mpc8308_p1m_defconfig @@ -117,7 +117,15 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/mscc_jr2_defconfig b/configs/mscc_jr2_defconfig index a27eb4b950a..c77b1c07c8c 100644 --- a/configs/mscc_jr2_defconfig +++ b/configs/mscc_jr2_defconfig @@ -2,8 +2,8 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0x40000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x70100000 diff --git a/configs/mscc_luton_defconfig b/configs/mscc_luton_defconfig index cd3f1bba52d..b42b704e912 100644 --- a/configs/mscc_luton_defconfig +++ b/configs/mscc_luton_defconfig @@ -2,8 +2,8 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0x40000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x70100000 diff --git a/configs/mscc_ocelot_defconfig b/configs/mscc_ocelot_defconfig index 4aa0dd04fd0..ecab4d0afdb 100644 --- a/configs/mscc_ocelot_defconfig +++ b/configs/mscc_ocelot_defconfig @@ -2,8 +2,8 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0x40000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x70100000 diff --git a/configs/mscc_serval_defconfig b/configs/mscc_serval_defconfig index 606ea5be500..ee12e7cd183 100644 --- a/configs/mscc_serval_defconfig +++ b/configs/mscc_serval_defconfig @@ -2,8 +2,8 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0x40000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_ENV_OFFSET_REDUND=0x140000 CONFIG_ARCH_MSCC=y diff --git a/configs/mscc_servalt_defconfig b/configs/mscc_servalt_defconfig index c7829923eb6..5caef62a682 100644 --- a/configs/mscc_servalt_defconfig +++ b/configs/mscc_servalt_defconfig @@ -2,8 +2,8 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0x40000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_ENV_OFFSET_REDUND=0x140000 CONFIG_ARCH_MSCC=y diff --git a/configs/mt7622_rfb_defconfig b/configs/mt7622_rfb_defconfig index 1ce6ebdfebb..1f3ccfe7cb3 100644 --- a/configs/mt7622_rfb_defconfig +++ b/configs/mt7622_rfb_defconfig @@ -51,6 +51,5 @@ CONFIG_SYSRESET_WATCHDOG=y CONFIG_TIMER=y CONFIG_MTK_TIMER=y CONFIG_WDT_MTK=y -CONFIG_LZ4=y CONFIG_LZO=y CONFIG_HEXDUMP=y diff --git a/configs/mt7628_rfb_defconfig b/configs/mt7628_rfb_defconfig new file mode 100644 index 00000000000..f444cf98c6c --- /dev/null +++ b/configs/mt7628_rfb_defconfig @@ -0,0 +1,47 @@ +CONFIG_MIPS=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_ENV_SIZE=0x1000 +CONFIG_ENV_OFFSET=0x30000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_SPL=y +CONFIG_ARCH_MTMIPS=y +CONFIG_BOARD_MT7628_RFB=y +CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y +CONFIG_MIPS_BOOT_FDT=y +CONFIG_FIT=y +# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_NOR_SUPPORT=y +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_CRC32 is not set +# CONFIG_CMD_DM is not set +CONFIG_CMD_GPIO=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_SPI=y +# CONFIG_CMD_NFS is not set +# CONFIG_PARTITIONS is not set +CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7628-rfb" +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +# CONFIG_INPUT is not set +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_ISSI=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_XMC=y +CONFIG_MT7628_ETH=y +# CONFIG_SPECIFY_CONSOLE_INDEX is not set +CONFIG_SPI=y +CONFIG_MT7621_SPI=y +CONFIG_LZMA=y +CONFIG_SPL_LZMA=y diff --git a/configs/mt8512_bm1_emmc_defconfig b/configs/mt8512_bm1_emmc_defconfig index a3dc962460f..e7659d7085a 100644 --- a/configs/mt8512_bm1_emmc_defconfig +++ b/configs/mt8512_bm1_emmc_defconfig @@ -31,5 +31,4 @@ CONFIG_TIMER=y CONFIG_MTK_TIMER=y CONFIG_WDT=y CONFIG_WDT_MTK=y -CONFIG_LZ4=y CONFIG_LZO=y diff --git a/configs/mt8518_ap1_emmc_defconfig b/configs/mt8518_ap1_emmc_defconfig index 943c1b2577c..a449804e047 100644 --- a/configs/mt8518_ap1_emmc_defconfig +++ b/configs/mt8518_ap1_emmc_defconfig @@ -45,5 +45,4 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0bb4 CONFIG_USB_GADGET_PRODUCT_NUM=0x0c01 CONFIG_WDT=y CONFIG_WDT_MTK=y -CONFIG_LZ4=y CONFIG_LZO=y diff --git a/configs/mvebu_db-88f3720_defconfig b/configs/mvebu_db-88f3720_defconfig index e5284fad02a..144abb89892 100644 --- a/configs/mvebu_db-88f3720_defconfig +++ b/configs/mvebu_db-88f3720_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_MVEBU_ARMADA_37XX=y CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x180000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xd0012000 diff --git a/configs/mvebu_db_armada8k_defconfig b/configs/mvebu_db_armada8k_defconfig index 6fd2613d21b..fb02f61b56a 100644 --- a/configs/mvebu_db_armada8k_defconfig +++ b/configs/mvebu_db_armada8k_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_MVEBU_ARMADA_8K=y CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x180000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_NR_DRAM_BANKS=2 CONFIG_DEBUG_UART_BASE=0xf0512000 CONFIG_DEBUG_UART_CLOCK=200000000 diff --git a/configs/mvebu_espressobin-88f3720_defconfig b/configs/mvebu_espressobin-88f3720_defconfig index 8e6c08b23dd..01b61201499 100644 --- a/configs/mvebu_espressobin-88f3720_defconfig +++ b/configs/mvebu_espressobin-88f3720_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_MVEBU_ARMADA_37XX=y CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x180000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xd0012000 diff --git a/configs/mvebu_mcbin-88f8040_defconfig b/configs/mvebu_mcbin-88f8040_defconfig index 9b4cb14e7e9..0975ed386fe 100644 --- a/configs/mvebu_mcbin-88f8040_defconfig +++ b/configs/mvebu_mcbin-88f8040_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_MVEBU_ARMADA_8K=y CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x180000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=2 CONFIG_DEBUG_UART_BASE=0xf0512000 diff --git a/configs/mx25pdk_defconfig b/configs/mx25pdk_defconfig index f752b720d40..aa08e100a26 100644 --- a/configs/mx25pdk_defconfig +++ b/configs/mx25pdk_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX25=y CONFIG_SYS_TEXT_BASE=0x81200000 -CONFIG_TARGET_MX25PDK=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x60000 +CONFIG_TARGET_MX25PDK=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg" CONFIG_DEFAULT_FDT_FILE="imx25-pdk.dtb" diff --git a/configs/mx31pdk_defconfig b/configs/mx31pdk_defconfig index 595a1be2372..c53c23a363b 100644 --- a/configs/mx31pdk_defconfig +++ b/configs/mx31pdk_defconfig @@ -5,9 +5,9 @@ CONFIG_ARCH_MX31=y CONFIG_SPL_LDSCRIPT="arch/arm/cpu/u-boot-spl.lds" CONFIG_SYS_TEXT_BASE=0x87e00000 CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX31PDK=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x40000 +CONFIG_TARGET_MX31PDK=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig index a2af8ae7b2e..dbc4d85a22d 100644 --- a/configs/mx51evk_defconfig +++ b/configs/mx51evk_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX5=y CONFIG_SYS_TEXT_BASE=0x97800000 -CONFIG_TARGET_MX51EVK=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_TARGET_MX51EVK=y CONFIG_NR_DRAM_BANKS=1 # CONFIG_CMD_BMODE is not set CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx51evk/imximage.cfg" diff --git a/configs/mx53ard_defconfig b/configs/mx53ard_defconfig index f0ecb4dcd39..e021df284c0 100644 --- a/configs/mx53ard_defconfig +++ b/configs/mx53ard_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX5=y CONFIG_SYS_TEXT_BASE=0x77800000 -CONFIG_TARGET_MX53ARD=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x60000 +CONFIG_TARGET_MX53ARD=y CONFIG_NR_DRAM_BANKS=2 # CONFIG_CMD_BMODE is not set CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53ard/imximage_dd3.cfg" diff --git a/configs/mx53cx9020_defconfig b/configs/mx53cx9020_defconfig index 4e035329426..5dc48c49b5e 100644 --- a/configs/mx53cx9020_defconfig +++ b/configs/mx53cx9020_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX5=y CONFIG_SYS_TEXT_BASE=0x77800000 -CONFIG_TARGET_MX53CX9020=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x60000 +CONFIG_TARGET_MX53CX9020=y CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=2 # CONFIG_CMD_BMODE is not set diff --git a/configs/mx53evk_defconfig b/configs/mx53evk_defconfig index e520cbab951..9063f72fcfb 100644 --- a/configs/mx53evk_defconfig +++ b/configs/mx53evk_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX5=y CONFIG_SYS_TEXT_BASE=0x77800000 -CONFIG_TARGET_MX53EVK=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x60000 +CONFIG_TARGET_MX53EVK=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53evk/imximage.cfg" CONFIG_HUSH_PARSER=y diff --git a/configs/mx53loco_defconfig b/configs/mx53loco_defconfig index 277b528f2a5..e5d842a75df 100644 --- a/configs/mx53loco_defconfig +++ b/configs/mx53loco_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX5=y CONFIG_SYS_TEXT_BASE=0x77800000 -CONFIG_TARGET_MX53LOCO=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_TARGET_MX53LOCO=y CONFIG_NR_DRAM_BANKS=2 # CONFIG_CMD_BMODE is not set CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53loco/imximage.cfg" diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig index 29c918740f6..0b6564ce5c6 100644 --- a/configs/mx53ppd_defconfig +++ b/configs/mx53ppd_defconfig @@ -2,9 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX5=y CONFIG_SYS_TEXT_BASE=0x77800000 CONFIG_SYS_MALLOC_F_LEN=0x4000 -CONFIG_TARGET_MX53PPD=y CONFIG_ENV_SIZE=0x2800 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_TARGET_MX53PPD=y CONFIG_DM_GPIO=y CONFIG_BOOTCOUNT_BOOTLIMIT=10 CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/mx53smd_defconfig b/configs/mx53smd_defconfig index 8cf6c80e14f..fd13eea023f 100644 --- a/configs/mx53smd_defconfig +++ b/configs/mx53smd_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX5=y CONFIG_SYS_TEXT_BASE=0x77800000 -CONFIG_TARGET_MX53SMD=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x60000 +CONFIG_TARGET_MX53SMD=y CONFIG_NR_DRAM_BANKS=2 # CONFIG_CMD_BMODE is not set CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53smd/imximage.cfg" diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig index bee7d280f01..df7e4611a0e 100644 --- a/configs/mx6cuboxi_defconfig +++ b/configs/mx6cuboxi_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6CUBOXI=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFE000 +CONFIG_TARGET_MX6CUBOXI=y CONFIG_DM_GPIO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -15,8 +15,8 @@ CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_CMD_HDMIDETECT=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x00908000 +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" @@ -49,6 +49,7 @@ CONFIG_DWC_AHSATA=y CONFIG_DM_MMC=y CONFIG_FSL_USDHC=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y diff --git a/configs/mx6dlarm2_defconfig b/configs/mx6dlarm2_defconfig index 4afd6235732..e826282ad8f 100644 --- a/configs/mx6dlarm2_defconfig +++ b/configs/mx6dlarm2_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_TARGET_MX6QARM2=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x60000 +CONFIG_TARGET_MX6QARM2=y CONFIG_NR_DRAM_BANKS=1 # CONFIG_CMD_BMODE is not set CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage_mx6dl.cfg,MX6DL,DDR_MB=2048" diff --git a/configs/mx6dlarm2_lpddr2_defconfig b/configs/mx6dlarm2_lpddr2_defconfig index bbb6948b3ff..fa8740390fc 100644 --- a/configs/mx6dlarm2_lpddr2_defconfig +++ b/configs/mx6dlarm2_lpddr2_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_TARGET_MX6QARM2=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x60000 +CONFIG_TARGET_MX6QARM2=y CONFIG_NR_DRAM_BANKS=1 # CONFIG_CMD_BMODE is not set CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage_mx6dl.cfg,MX6DL,MX6DL_LPDDR2,DDR_MB=512" diff --git a/configs/mx6memcal_defconfig b/configs/mx6memcal_defconfig index 1b0158b583c..5063049fdc3 100644 --- a/configs/mx6memcal_defconfig +++ b/configs/mx6memcal_defconfig @@ -3,9 +3,9 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_ENV_SIZE=0x2000 CONFIG_MX6_DDRCAL=y CONFIG_TARGET_MX6MEMCAL=y -CONFIG_ENV_SIZE=0x2000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y diff --git a/configs/mx6qarm2_defconfig b/configs/mx6qarm2_defconfig index a26a8b09136..93cf05bfa84 100644 --- a/configs/mx6qarm2_defconfig +++ b/configs/mx6qarm2_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_TARGET_MX6QARM2=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x60000 +CONFIG_TARGET_MX6QARM2=y CONFIG_NR_DRAM_BANKS=1 # CONFIG_CMD_BMODE is not set CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg,MX6Q,DDR_MB=2048" diff --git a/configs/mx6qarm2_lpddr2_defconfig b/configs/mx6qarm2_lpddr2_defconfig index 169f19babb5..86f122454d3 100644 --- a/configs/mx6qarm2_lpddr2_defconfig +++ b/configs/mx6qarm2_lpddr2_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_TARGET_MX6QARM2=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x60000 +CONFIG_TARGET_MX6QARM2=y CONFIG_NR_DRAM_BANKS=1 # CONFIG_CMD_BMODE is not set CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg,MX6Q,MX6DQ_LPDDR2,DDR_MB=512" diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig index a85bfe0769c..510b8d721ae 100644 --- a/configs/mx6qsabrelite_defconfig +++ b/configs/mx6qsabrelite_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_TARGET_NITROGEN6X=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x60000 +CONFIG_TARGET_NITROGEN6X=y CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_CMD_HDMIDETECT=y diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig index 06835f203ab..5304050ce35 100644 --- a/configs/mx6sabreauto_defconfig +++ b/configs/mx6sabreauto_defconfig @@ -5,9 +5,9 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x4000 -CONFIG_TARGET_MX6SABREAUTO=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_TARGET_MX6SABREAUTO=y CONFIG_DM_GPIO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -74,6 +74,11 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y @@ -97,8 +102,3 @@ CONFIG_DM_VIDEO=y # CONFIG_VIDEO_BPP32 is not set CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_IPUV3=y -CONFIG_FEC_MXC=y -CONFIG_PHY_ATHEROS=y -CONFIG_DM_ETH=y -CONFIG_DM_MDIO=y -CONFIG_RGMII=y diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index f2184088326..2a517cc1f3d 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -5,9 +5,9 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x4000 -CONFIG_TARGET_MX6SABRESD=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_TARGET_MX6SABRESD=y CONFIG_DM_GPIO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig index 163cb1a7ae2..34360768944 100644 --- a/configs/mx6slevk_defconfig +++ b/configs/mx6slevk_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 -CONFIG_TARGET_MX6SLEVK=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x80000 +CONFIG_TARGET_MX6SLEVK=y CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 # CONFIG_CMD_BMODE is not set @@ -43,6 +43,9 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_PHY_SMSC=y +CONFIG_DM_ETH=y +CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y @@ -61,6 +64,3 @@ CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y -CONFIG_DM_ETH=y -CONFIG_FEC_MXC=y -CONFIG_PHY_SMSC=y diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig index 7d46eec8d74..4d348df691e 100644 --- a/configs/mx6slevk_spinor_defconfig +++ b/configs/mx6slevk_spinor_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 -CONFIG_TARGET_MX6SLEVK=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_TARGET_MX6SLEVK=y CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 # CONFIG_CMD_BMODE is not set diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig index c5be9573f4c..3a0ae92bf2b 100644 --- a/configs/mx6slevk_spl_defconfig +++ b/configs/mx6slevk_spl_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6SLEVK=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x80000 +CONFIG_TARGET_MX6SLEVK=y CONFIG_DM_GPIO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y diff --git a/configs/mx6sllevk_defconfig b/configs/mx6sllevk_defconfig index 537dd3d1b51..064684a68bd 100644 --- a/configs/mx6sllevk_defconfig +++ b/configs/mx6sllevk_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 -CONFIG_TARGET_MX6SLLEVK=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_TARGET_MX6SLLEVK=y CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 # CONFIG_CMD_BMODE is not set diff --git a/configs/mx6sllevk_plugin_defconfig b/configs/mx6sllevk_plugin_defconfig index 36f73f7131f..ae06ad4535c 100644 --- a/configs/mx6sllevk_plugin_defconfig +++ b/configs/mx6sllevk_plugin_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 -CONFIG_TARGET_MX6SLLEVK=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_TARGET_MX6SLLEVK=y CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_USE_IMXIMG_PLUGIN=y diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig index 2c5f519d0c1..be20be2ad68 100644 --- a/configs/mx6sxsabreauto_defconfig +++ b/configs/mx6sxsabreauto_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 -CONFIG_TARGET_MX6SXSABREAUTO=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x80000 +CONFIG_TARGET_MX6SXSABREAUTO=y CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 # CONFIG_CMD_BMODE is not set @@ -45,6 +45,7 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=40000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig index 7cf672948d5..745a8becea2 100644 --- a/configs/mx6sxsabresd_defconfig +++ b/configs/mx6sxsabresd_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 -CONFIG_TARGET_MX6SXSABRESD=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xE0000 +CONFIG_TARGET_MX6SXSABRESD=y CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 # CONFIG_CMD_BMODE is not set @@ -49,6 +49,7 @@ CONFIG_SF_DEFAULT_SPEED=40000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y CONFIG_MII=y CONFIG_PCI=y CONFIG_DM_PCI=y diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig index 2a7f5fddf47..6498f024b8c 100644 --- a/configs/mx6ul_14x14_evk_defconfig +++ b/configs/mx6ul_14x14_evk_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6UL_14X14_EVK=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x80000 +CONFIG_TARGET_MX6UL_14X14_EVK=y CONFIG_DM_GPIO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -56,8 +56,8 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y -CONFIG_FEC_MXC=y CONFIG_DM_ETH=y +CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig index c02f71f5660..ce87cc1b269 100644 --- a/configs/mx6ul_9x9_evk_defconfig +++ b/configs/mx6ul_9x9_evk_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6UL_9X9_EVK=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x80000 +CONFIG_TARGET_MX6UL_9X9_EVK=y CONFIG_DM_GPIO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y diff --git a/configs/mx6ull_14x14_evk_defconfig b/configs/mx6ull_14x14_evk_defconfig index c16ecfab497..357932ae62d 100644 --- a/configs/mx6ull_14x14_evk_defconfig +++ b/configs/mx6ull_14x14_evk_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 -CONFIG_TARGET_MX6ULL_14X14_EVK=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_TARGET_MX6ULL_14X14_EVK=y CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ullevk/imximage.cfg" @@ -41,8 +41,8 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y -CONFIG_FEC_MXC=y CONFIG_DM_ETH=y +CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y diff --git a/configs/mx6ull_14x14_evk_plugin_defconfig b/configs/mx6ull_14x14_evk_plugin_defconfig index ddfc4763dd0..a5451fc9418 100644 --- a/configs/mx6ull_14x14_evk_plugin_defconfig +++ b/configs/mx6ull_14x14_evk_plugin_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 -CONFIG_TARGET_MX6ULL_14X14_EVK=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_TARGET_MX6ULL_14X14_EVK=y CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_USE_IMXIMG_PLUGIN=y diff --git a/configs/mx6ulz_14x14_evk_defconfig b/configs/mx6ulz_14x14_evk_defconfig index 92d73a85c89..ae81e10b3b6 100644 --- a/configs/mx6ulz_14x14_evk_defconfig +++ b/configs/mx6ulz_14x14_evk_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 -CONFIG_TARGET_MX6ULL_14X14_EVK=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_TARGET_MX6ULL_14X14_EVK=y CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ullevk/imximage.cfg" @@ -16,8 +16,6 @@ CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y diff --git a/configs/nanopc-t4-rk3399_defconfig b/configs/nanopc-t4-rk3399_defconfig index 607a00dbf76..ae865908d81 100644 --- a/configs/nanopc-t4-rk3399_defconfig +++ b/configs/nanopc-t4-rk3399_defconfig @@ -46,18 +46,16 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_KEYBOARD=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_ASIX88179=y CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y -CONFIG_USB_KEYBOARD=y -CONFIG_SPL_TINY_MEMSET=y -CONFIG_ERRNO_STR=y CONFIG_DM_VIDEO=y -CONFIG_VIDEO_BPP16=y -CONFIG_VIDEO_BPP32=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y +CONFIG_SPL_TINY_MEMSET=y +CONFIG_ERRNO_STR=y diff --git a/configs/nanopi-m4-rk3399_defconfig b/configs/nanopi-m4-rk3399_defconfig index 3fcb7ac2d79..ab7c2d17144 100644 --- a/configs/nanopi-m4-rk3399_defconfig +++ b/configs/nanopi-m4-rk3399_defconfig @@ -46,18 +46,16 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_KEYBOARD=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_ASIX88179=y CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y -CONFIG_USB_KEYBOARD=y -CONFIG_SPL_TINY_MEMSET=y -CONFIG_ERRNO_STR=y CONFIG_DM_VIDEO=y -CONFIG_VIDEO_BPP16=y -CONFIG_VIDEO_BPP32=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y +CONFIG_SPL_TINY_MEMSET=y +CONFIG_ERRNO_STR=y diff --git a/configs/nanopi-neo4-rk3399_defconfig b/configs/nanopi-neo4-rk3399_defconfig index b9ea535e435..45cd56faaef 100644 --- a/configs/nanopi-neo4-rk3399_defconfig +++ b/configs/nanopi-neo4-rk3399_defconfig @@ -46,18 +46,16 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_KEYBOARD=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_ASIX88179=y CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y -CONFIG_USB_KEYBOARD=y -CONFIG_SPL_TINY_MEMSET=y -CONFIG_ERRNO_STR=y CONFIG_DM_VIDEO=y -CONFIG_VIDEO_BPP16=y -CONFIG_VIDEO_BPP32=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y +CONFIG_SPL_TINY_MEMSET=y +CONFIG_ERRNO_STR=y diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig index d334db0ae07..b7565e52143 100644 --- a/configs/net2big_v2_defconfig +++ b/configs/net2big_v2_defconfig @@ -5,8 +5,8 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NET2BIG_V2=y CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x70000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_NR_DRAM_BANKS=2 CONFIG_IDENT_STRING=" 2Big v2" CONFIG_SYS_EXTRA_OPTIONS="NET2BIG_V2" diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig index cb00d483cef..3f95f38dabf 100644 --- a/configs/netspace_lite_v2_defconfig +++ b/configs/netspace_lite_v2_defconfig @@ -5,8 +5,8 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NETSPACE_V2=y CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x70000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_NR_DRAM_BANKS=2 CONFIG_IDENT_STRING=" NS v2 Lite" CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_LITE_V2" diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig index 0317cb9555a..1d710395aed 100644 --- a/configs/netspace_max_v2_defconfig +++ b/configs/netspace_max_v2_defconfig @@ -5,8 +5,8 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NETSPACE_V2=y CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x70000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_NR_DRAM_BANKS=2 CONFIG_IDENT_STRING=" NS Max v2" CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MAX_V2" diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig index a87aaddb87d..abf8011e4f2 100644 --- a/configs/netspace_mini_v2_defconfig +++ b/configs/netspace_mini_v2_defconfig @@ -5,8 +5,8 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NETSPACE_V2=y CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x70000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_NR_DRAM_BANKS=2 CONFIG_IDENT_STRING=" NS v2 Mini" CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MINI_V2" diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig index e4e08a2e851..052049af1c0 100644 --- a/configs/netspace_v2_defconfig +++ b/configs/netspace_v2_defconfig @@ -5,8 +5,8 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NETSPACE_V2=y CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x70000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_NR_DRAM_BANKS=2 CONFIG_IDENT_STRING=" NS v2" CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_V2" diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig index d10162578a5..57d7ca9d174 100644 --- a/configs/nitrogen6dl2g_defconfig +++ b/configs/nitrogen6dl2g_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_TARGET_NITROGEN6X=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x2000 +CONFIG_TARGET_NITROGEN6X=y CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_CMD_HDMIDETECT=y diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig index dd07ce0d58c..b0f28c527e7 100644 --- a/configs/nitrogen6dl_defconfig +++ b/configs/nitrogen6dl_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_TARGET_NITROGEN6X=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x2000 +CONFIG_TARGET_NITROGEN6X=y CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_CMD_HDMIDETECT=y diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig index 91b85ea708f..02632dcde65 100644 --- a/configs/nitrogen6q2g_defconfig +++ b/configs/nitrogen6q2g_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_TARGET_NITROGEN6X=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x2000 +CONFIG_TARGET_NITROGEN6X=y CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_CMD_HDMIDETECT=y diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig index 009382fec02..8e041999839 100644 --- a/configs/nitrogen6q_defconfig +++ b/configs/nitrogen6q_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_TARGET_NITROGEN6X=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x2000 +CONFIG_TARGET_NITROGEN6X=y CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_CMD_HDMIDETECT=y diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig index c0f4261930c..592fb4a7393 100644 --- a/configs/nitrogen6s1g_defconfig +++ b/configs/nitrogen6s1g_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_TARGET_NITROGEN6X=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x2000 +CONFIG_TARGET_NITROGEN6X=y CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_CMD_HDMIDETECT=y diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig index 1dc9d5377ac..3a4572ad080 100644 --- a/configs/nitrogen6s_defconfig +++ b/configs/nitrogen6s_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_TARGET_NITROGEN6X=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x2000 +CONFIG_TARGET_NITROGEN6X=y CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_CMD_HDMIDETECT=y diff --git a/configs/novena_defconfig b/configs/novena_defconfig index 87adc1eb4c9..27bc0fa1a46 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_MX6_DDRCAL=y -CONFIG_TARGET_KOSAGI_NOVENA=y CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x80000 +CONFIG_MX6_DDRCAL=y +CONFIG_TARGET_KOSAGI_NOVENA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 @@ -16,8 +16,8 @@ CONFIG_ENV_OFFSET_REDUND=0x84000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_CMD_HDMIDETECT=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x00908000 +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q" diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig index 8c08ee62338..2b1bcb86956 100644 --- a/configs/nyan-big_defconfig +++ b/configs/nyan-big_defconfig @@ -9,8 +9,8 @@ CONFIG_DEBUG_UART_BASE=0x70006000 CONFIG_DEBUG_UART_CLOCK=408000000 CONFIG_TEGRA124=y CONFIG_TARGET_NYAN_BIG=y -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x80108000 +CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_OF_SYSTEM_SETUP=y diff --git a/configs/omap4_panda_defconfig b/configs/omap4_panda_defconfig index cb4e8477e1d..3ac6319d2d7 100644 --- a/configs/omap4_panda_defconfig +++ b/configs/omap4_panda_defconfig @@ -24,7 +24,6 @@ CONFIG_CMD_USB=y # CONFIG_CMD_NFS is not set CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_FAT=y -CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig index 8dee24c2cc6..632ca1c245c 100644 --- a/configs/opos6uldev_defconfig +++ b/configs/opos6uldev_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_OPOS6ULDEV=y CONFIG_ENV_SIZE=0x2800 CONFIG_ENV_OFFSET=0x100000 +CONFIG_TARGET_OPOS6ULDEV=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/ot1200_defconfig b/configs/ot1200_defconfig index 2b4ecb6405e..45b9f2d41cd 100644 --- a/configs/ot1200_defconfig +++ b/configs/ot1200_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_TARGET_OT1200=y CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_TARGET_OT1200=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/bachmann/ot1200/mx6q_4x_mt41j128.cfg,MX6Q" CONFIG_BOOTDELAY=3 @@ -45,6 +45,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHYLIB=y +CONFIG_PHY_SMSC=y CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y diff --git a/configs/ot1200_spl_defconfig b/configs/ot1200_spl_defconfig index 0c4d9d94799..9472d294085 100644 --- a/configs/ot1200_spl_defconfig +++ b/configs/ot1200_spl_defconfig @@ -4,10 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_OT1200=y CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 +CONFIG_TARGET_OT1200=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y @@ -23,7 +24,6 @@ CONFIG_BOUNCE_BUFFER=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -56,6 +56,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHYLIB=y +CONFIG_PHY_SMSC=y CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig index 70817194c35..3c183df470c 100644 --- a/configs/p2371-0000_defconfig +++ b/configs/p2371-0000_defconfig @@ -19,6 +19,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_PREFER_SERVERIP=y # CONFIG_CMD_NFS is not set CONFIG_CMD_EXT4_WRITE=y CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2371-0000" @@ -44,4 +45,3 @@ CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y -CONFIG_BOOTP_PREFER_SERVERIP=y diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig index c70217c82d5..3aa6f578d71 100644 --- a/configs/p2371-2180_defconfig +++ b/configs/p2371-2180_defconfig @@ -21,6 +21,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_PREFER_SERVERIP=y # CONFIG_CMD_NFS is not set CONFIG_CMD_EXT4_WRITE=y CONFIG_OF_LIVE=y @@ -52,4 +53,3 @@ CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y -CONFIG_BOOTP_PREFER_SERVERIP=y diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig index 43c24b83304..37685eaebcd 100644 --- a/configs/p2571_defconfig +++ b/configs/p2571_defconfig @@ -19,6 +19,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_PREFER_SERVERIP=y # CONFIG_CMD_NFS is not set CONFIG_CMD_EXT4_WRITE=y CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2571" @@ -44,4 +45,3 @@ CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y -CONFIG_BOOTP_PREFER_SERVERIP=y diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig index 8bf84193e60..e3d42a20e7d 100644 --- a/configs/p2771-0000-000_defconfig +++ b/configs/p2771-0000-000_defconfig @@ -18,6 +18,7 @@ CONFIG_CMD_PCI=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_PREFER_SERVERIP=y # CONFIG_CMD_NFS is not set CONFIG_CMD_EXT4_WRITE=y CONFIG_DEFAULT_DEVICE_TREE="tegra186-p2771-0000-000" @@ -36,5 +37,3 @@ CONFIG_TEGRA186_POWER_DOMAIN=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y -CONFIG_POSITION_INDEPENDENT=y -CONFIG_BOOTP_PREFER_SERVERIP=y diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig index 1f40333b0e3..51715d0b23d 100644 --- a/configs/p2771-0000-500_defconfig +++ b/configs/p2771-0000-500_defconfig @@ -18,6 +18,7 @@ CONFIG_CMD_PCI=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_PREFER_SERVERIP=y # CONFIG_CMD_NFS is not set CONFIG_CMD_EXT4_WRITE=y CONFIG_DEFAULT_DEVICE_TREE="tegra186-p2771-0000-500" @@ -36,5 +37,3 @@ CONFIG_TEGRA186_POWER_DOMAIN=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y -CONFIG_POSITION_INDEPENDENT=y -CONFIG_BOOTP_PREFER_SERVERIP=y diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig index f78e1d38674..c12d58a44d0 100644 --- a/configs/p3450-0000_defconfig +++ b/configs/p3450-0000_defconfig @@ -1,39 +1,41 @@ CONFIG_ARM=y CONFIG_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80080000 +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_OFFSET=0xFFFFE000 +CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_NR_DRAM_BANKS=2 CONFIG_TEGRA210=y CONFIG_TARGET_P3450_0000=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_OF_SYSTEM_SETUP=y CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_SYSTEM_SETUP=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SYS_PROMPT="Tegra210 (P3450-0000) # " # CONFIG_CMD_IMI is not set CONFIG_CMD_DFU=y -# CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y -CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_PREFER_SERVERIP=y # CONFIG_CMD_NFS is not set CONFIG_CMD_EXT4_WRITE=y CONFIG_OF_LIVE=y CONFIG_DEFAULT_DEVICE_TREE="tegra210-p3450-0000" +# CONFIG_ENV_IS_IN_MMC is not set +CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y CONFIG_DFU_SF=y CONFIG_SYS_I2C_TEGRA=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_USE_4K_SECTORS=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=24000000 +CONFIG_SPI_FLASH_MACRONIX=y CONFIG_RTL8169=y CONFIG_PCI=y CONFIG_DM_PCI=y @@ -54,11 +56,3 @@ CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y -# CONFIG_ENV_IS_IN_MMC is not set -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x1000 -CONFIG_ENV_OFFSET=0xFFFFE000 -CONFIG_BOOTP_PREFER_SERVERIP=y -CONFIG_POSITION_INDEPENDENT=y -CONFIG_DISABLE_SDMMC1_EARLY=y diff --git a/configs/parrot_r16_defconfig b/configs/parrot_r16_defconfig index 2c2edbc2b6d..4c9b248ec0e 100644 --- a/configs/parrot_r16_defconfig +++ b/configs/parrot_r16_defconfig @@ -11,7 +11,6 @@ CONFIG_USB0_ID_DET="PD10" CONFIG_USB1_VBUS_PIN="PD12" CONFIG_AXP_GPIO=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -# CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-parrot" CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_CONS_INDEX=5 diff --git a/configs/pcm051_rev1_defconfig b/configs/pcm051_rev1_defconfig index cbe65948376..ea7a0769f29 100644 --- a/configs/pcm051_rev1_defconfig +++ b/configs/pcm051_rev1_defconfig @@ -45,6 +45,7 @@ CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHY_SMSC=y CONFIG_MII=y CONFIG_DRIVER_TI_CPSW=y CONFIG_SPI=y diff --git a/configs/pcm051_rev3_defconfig b/configs/pcm051_rev3_defconfig index 744c5827d15..43e64630ab6 100644 --- a/configs/pcm051_rev3_defconfig +++ b/configs/pcm051_rev3_defconfig @@ -45,6 +45,7 @@ CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHY_SMSC=y CONFIG_MII=y CONFIG_DRIVER_TI_CPSW=y CONFIG_SPI=y diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig index 87cac5c3fd7..0dfbc172c2a 100644 --- a/configs/pcm058_defconfig +++ b/configs/pcm058_defconfig @@ -4,10 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_PCM058=y CONFIG_ENV_SIZE=0x4000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 +CONFIG_TARGET_PCM058=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 @@ -30,7 +31,6 @@ CONFIG_SPL_DMA=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/peach-pi_defconfig b/configs/peach-pi_defconfig index 6efca9b08ee..b0128a62855 100644 --- a/configs/peach-pi_defconfig +++ b/configs/peach-pi_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x23E00000 CONFIG_ARCH_EXYNOS5=y CONFIG_TARGET_PEACH_PI=y CONFIG_ENV_SIZE=0x4000 -CONFIG_ENV_SECT_SIZE=0x4000 CONFIG_ENV_OFFSET=0x3FC000 +CONFIG_ENV_SECT_SIZE=0x4000 CONFIG_NR_DRAM_BANKS=7 CONFIG_SPL=y CONFIG_IDENT_STRING=" for Peach-Pi" diff --git a/configs/peach-pit_defconfig b/configs/peach-pit_defconfig index 216ec90efa6..ea4155dcf88 100644 --- a/configs/peach-pit_defconfig +++ b/configs/peach-pit_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x23E00000 CONFIG_ARCH_EXYNOS5=y CONFIG_TARGET_PEACH_PIT=y CONFIG_ENV_SIZE=0x4000 -CONFIG_ENV_SECT_SIZE=0x4000 CONFIG_ENV_OFFSET=0x3FC000 +CONFIG_ENV_SECT_SIZE=0x4000 CONFIG_SPL=y CONFIG_IDENT_STRING=" for Peach-Pit" CONFIG_SPL_TEXT_BASE=0x02024410 diff --git a/configs/pengwyn_defconfig b/configs/pengwyn_defconfig index eadab3e860d..3d0fcf3ea09 100644 --- a/configs/pengwyn_defconfig +++ b/configs/pengwyn_defconfig @@ -52,6 +52,8 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_MMC_OMAP_HS=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y CONFIG_MII=y CONFIG_DRIVER_TI_CPSW=y CONFIG_SPI=y diff --git a/configs/pfla02_defconfig b/configs/pfla02_defconfig index 50fcbb30ecc..5e5bbb05bd5 100644 --- a/configs/pfla02_defconfig +++ b/configs/pfla02_defconfig @@ -4,10 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_PFLA02=y CONFIG_ENV_SIZE=0x4000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 +CONFIG_TARGET_PFLA02=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 @@ -30,7 +31,6 @@ CONFIG_SPL_DMA=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_CMD_FLASH is not set diff --git a/configs/phycore-am335x-r2-wega_defconfig b/configs/phycore-am335x-r2-wega_defconfig index ef19bb64aae..864e2ff59ba 100644 --- a/configs/phycore-am335x-r2-wega_defconfig +++ b/configs/phycore-am335x-r2-wega_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_PAYLOAD="u-boot.img" # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -22,7 +23,6 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MTD_SUPPORT=y -CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_SPL_POWER_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -49,7 +49,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="am335x-wega-rdk" CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_IS_IN_NAND=y -CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig index 8c1bd20deca..51b3e41c9c7 100644 --- a/configs/phycore-rk3288_defconfig +++ b/configs/phycore-rk3288_defconfig @@ -9,8 +9,8 @@ CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0xff704000 +CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y CONFIG_SILENT_CONSOLE=y diff --git a/configs/phycore_pcl063_defconfig b/configs/phycore_pcl063_defconfig index 8d7d4b9528a..760f62a4239 100644 --- a/configs/phycore_pcl063_defconfig +++ b/configs/phycore_pcl063_defconfig @@ -3,8 +3,8 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_PCL063=y CONFIG_ENV_SIZE=0x4000 +CONFIG_TARGET_PCL063=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=8 diff --git a/configs/phycore_pcl063_ull_defconfig b/configs/phycore_pcl063_ull_defconfig index 8b50d269b4e..cb9e4e38b1b 100644 --- a/configs/phycore_pcl063_ull_defconfig +++ b/configs/phycore_pcl063_ull_defconfig @@ -3,8 +3,8 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_PCL063_ULL=y CONFIG_ENV_SIZE=0x4000 +CONFIG_TARGET_PCL063_ULL=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=8 diff --git a/configs/pic32mzdask_defconfig b/configs/pic32mzdask_defconfig index f98e6a23afa..bb09a9a5a2f 100644 --- a/configs/pic32mzdask_defconfig +++ b/configs/pic32mzdask_defconfig @@ -31,6 +31,7 @@ CONFIG_MMC=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_PIC32=y +CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_PIC32_ETH=y diff --git a/configs/pico-dwarf-imx6ul_defconfig b/configs/pico-dwarf-imx6ul_defconfig index f914418c054..bb0281395e3 100644 --- a/configs/pico-dwarf-imx6ul_defconfig +++ b/configs/pico-dwarf-imx6ul_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_PICO_IMX6UL=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_TARGET_PICO_IMX6UL=y CONFIG_DM_GPIO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y diff --git a/configs/pico-hobbit-imx6ul_defconfig b/configs/pico-hobbit-imx6ul_defconfig index d18341f6a7d..ffa5cc8d07d 100644 --- a/configs/pico-hobbit-imx6ul_defconfig +++ b/configs/pico-hobbit-imx6ul_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_PICO_IMX6UL=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_TARGET_PICO_IMX6UL=y CONFIG_DM_GPIO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y diff --git a/configs/pico-imx6_defconfig b/configs/pico-imx6_defconfig index fe73ac585e8..0bc7e4fc958 100644 --- a/configs/pico-imx6_defconfig +++ b/configs/pico-imx6_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_PICO_IMX6=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_TARGET_PICO_IMX6=y CONFIG_DM_GPIO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -39,6 +39,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_USB_SDP=y CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_MDIO is not set CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y # CONFIG_SPL_DOS_PARTITION is not set @@ -61,6 +62,8 @@ CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_DM_MMC=y CONFIG_FSL_USDHC=y +CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_USB=y diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig index 3fd1012d4be..24948ddd55e 100644 --- a/configs/pico-imx6ul_defconfig +++ b/configs/pico-imx6ul_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_PICO_IMX6UL=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_TARGET_PICO_IMX6UL=y CONFIG_DM_GPIO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y diff --git a/configs/pico-pi-imx6ul_defconfig b/configs/pico-pi-imx6ul_defconfig index 951d9d3304c..5eb6fe2ec59 100644 --- a/configs/pico-pi-imx6ul_defconfig +++ b/configs/pico-pi-imx6ul_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_PICO_IMX6UL=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_TARGET_PICO_IMX6UL=y CONFIG_DM_GPIO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y diff --git a/configs/pine_h64_defconfig b/configs/pine_h64_defconfig index cb5e624a3d6..8937c51bd0e 100644 --- a/configs/pine_h64_defconfig +++ b/configs/pine_h64_defconfig @@ -6,9 +6,9 @@ CONFIG_SUNXI_DRAM_H6_LPDDR3=y CONFIG_MMC0_CD_PIN="PF6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB3_VBUS_PIN="PL5" +CONFIG_SPL_SPI_SUNXI=y # CONFIG_PSCI_RESET is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-pine-h64" CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y -CONFIG_SPL_SPI_SUNXI=y diff --git a/configs/platinum_picon_defconfig b/configs/platinum_picon_defconfig index 216dad85779..1164669113b 100644 --- a/configs/platinum_picon_defconfig +++ b/configs/platinum_picon_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_PLATINUM_PICON=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x1000000 +CONFIG_TARGET_PLATINUM_PICON=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/platinum_titanium_defconfig b/configs/platinum_titanium_defconfig index a01641f825d..cecfa899721 100644 --- a/configs/platinum_titanium_defconfig +++ b/configs/platinum_titanium_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_PLATINUM_TITANIUM=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x1000000 +CONFIG_TARGET_PLATINUM_TITANIUM=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig index 01d3603f1e1..36d767dab96 100644 --- a/configs/popmetal-rk3288_defconfig +++ b/configs/popmetal-rk3288_defconfig @@ -9,8 +9,8 @@ CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0xff704000 +CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y CONFIG_SILENT_CONSOLE=y diff --git a/configs/porter_defconfig b/configs/porter_defconfig index 1bb11c91084..0cb903619d3 100644 --- a/configs/porter_defconfig +++ b/configs/porter_defconfig @@ -9,8 +9,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_ENV_SIZE=0x40000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_DM_GPIO=y CONFIG_ARCH_RMOBILE_BOARD_STRING="Porter" CONFIG_R8A7791=y @@ -30,7 +31,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -71,6 +71,7 @@ CONFIG_DM_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_MTD=y +CONFIG_BITBANGMII=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y CONFIG_DM_ETH=y diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index d4cf8453f51..a148832b83d 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_ROCKCHIP_RK3399=y CONFIG_ROCKCHIP_BOOT_MODE_REG=0x0 CONFIG_TARGET_PUMA_RK3399=y @@ -11,8 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFF180000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0xff8c2000 +CONFIG_DEBUG_UART=y CONFIG_SPL_FIT_GENERATOR="board/theobroma-systems/puma_rk3399/fit_spl_atf.sh" CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-puma-haikou.dtb" CONFIG_MISC_INIT_R=y @@ -24,7 +25,6 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig index 7253341460a..67de086c0b2 100644 --- a/configs/pxm2_defconfig +++ b/configs/pxm2_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x2000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_AM33XX=y CONFIG_SYS_MPUCLK=720 CONFIG_TARGET_PXM2=y @@ -28,7 +29,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y @@ -73,6 +73,7 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_MTD_UBI_FASTMAP=y CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1 +CONFIG_PHY_ATHEROS=y CONFIG_MII=y CONFIG_DRIVER_TI_CPSW=y CONFIG_SPI=y diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig index a37ec4d0d6a..0cb123eb4a7 100644 --- a/configs/qemu-x86_64_defconfig +++ b/configs/qemu-x86_64_defconfig @@ -1,11 +1,12 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0x1110000 CONFIG_SYS_MALLOC_F_LEN=0x1000 -CONFIG_MAX_CPUS=2 CONFIG_ENV_SIZE=0x40000 +CONFIG_MAX_CPUS=2 CONFIG_NR_DRAM_BANKS=8 CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 +CONFIG_SPL_TEXT_BASE=0xfffd0000 CONFIG_X86_RUN_64BIT=y CONFIG_TARGET_QEMU_X86_64=y CONFIG_DEBUG_UART=y @@ -14,7 +15,6 @@ CONFIG_GENERATE_PIRQ_TABLE=y CONFIG_GENERATE_MP_TABLE=y CONFIG_GENERATE_ACPI_TABLE=y CONFIG_X86_OFFSET_U_BOOT=0xfff00000 -CONFIG_SPL_TEXT_BASE=0xfffd0000 CONFIG_DISTRO_DEFAULTS=y CONFIG_BUILD_ROM=y CONFIG_FIT=y diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig index 4a4792d72b8..a562f213e15 100644 --- a/configs/qemu-x86_defconfig +++ b/configs/qemu-x86_defconfig @@ -1,7 +1,7 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0xFFF00000 -CONFIG_MAX_CPUS=2 CONFIG_ENV_SIZE=0x40000 +CONFIG_MAX_CPUS=2 CONFIG_NR_DRAM_BANKS=8 CONFIG_SMP=y CONFIG_GENERATE_PIRQ_TABLE=y diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig index 084b4c1ca63..80e0ad55e03 100644 --- a/configs/qemu_arm64_defconfig +++ b/configs/qemu_arm64_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_QEMU=y CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_SECT_SIZE=0x40000 -CONFIG_TARGET_QEMU_ARM_64BIT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/r8a7795_ulcb_defconfig b/configs/r8a7795_ulcb_defconfig deleted file mode 100644 index c1979f41c87..00000000000 --- a/configs/r8a7795_ulcb_defconfig +++ /dev/null @@ -1,68 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_CPU_INIT=y -CONFIG_ARCH_RMOBILE=y -CONFIG_SYS_TEXT_BASE=0x50000000 -CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_ENV_SIZE=0x20000 -CONFIG_ENV_OFFSET=0xFFFE0000 -CONFIG_DM_GPIO=y -CONFIG_RCAR_GEN3=y -CONFIG_TARGET_ULCB=y -CONFIG_SMBIOS_PRODUCT_NAME="" -CONFIG_SPL_TEXT_BASE=0xe6338000 -CONFIG_FIT=y -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" -CONFIG_SUPPORT_RAW_INITRD=y -CONFIG_DEFAULT_FDT_FILE="r8a7795-h3ulcb.dtb" -CONFIG_VERSION_VARIABLE=y -CONFIG_HUSH_PARSER=y -CONFIG_CMD_BOOTZ=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_USB=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y -CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="r8a7795-h3ulcb-u-boot" -CONFIG_OF_LIST="r8a7795-h3ulcb-u-boot r8a7796-m3ulcb-u-boot r8a77965-m3nulcb-u-boot" -CONFIG_MULTI_DTB_FIT_LZO=y -CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y -CONFIG_ENV_IS_IN_MMC=y -CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_REGMAP=y -CONFIG_SYSCON=y -CONFIG_CLK=y -CONFIG_CLK_RENESAS=y -CONFIG_RCAR_GPIO=y -CONFIG_DM_I2C=y -CONFIG_SYS_I2C_RCAR_IIC=y -CONFIG_DM_MMC=y -CONFIG_MMC_IO_VOLTAGE=y -CONFIG_MMC_UHS_SUPPORT=y -CONFIG_MMC_HS400_SUPPORT=y -CONFIG_RENESAS_SDHI=y -CONFIG_PHY_MICREL=y -CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_DM_ETH=y -CONFIG_RENESAS_RAVB=y -CONFIG_DM_REGULATOR=y -CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_REGULATOR_GPIO=y -CONFIG_SCIF_CONSOLE=y -CONFIG_SYSRESET=y -CONFIG_USB=y -CONFIG_DM_USB=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_GENERIC=y -CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT_OVERLAY=y -CONFIG_SMBIOS_MANUFACTURER="" diff --git a/configs/r8a77965_salvator-x_defconfig b/configs/r8a77965_salvator-x_defconfig deleted file mode 100644 index 8da542c7280..00000000000 --- a/configs/r8a77965_salvator-x_defconfig +++ /dev/null @@ -1,71 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_CPU_INIT=y -CONFIG_ARCH_RMOBILE=y -CONFIG_SYS_TEXT_BASE=0x50000000 -CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_ENV_SIZE=0x20000 -CONFIG_ENV_OFFSET=0xFFFE0000 -CONFIG_DM_GPIO=y -CONFIG_RCAR_GEN3=y -CONFIG_TARGET_SALVATOR_X=y -CONFIG_SMBIOS_PRODUCT_NAME="" -CONFIG_SPL_TEXT_BASE=0xe6338000 -CONFIG_FIT=y -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" -CONFIG_SUPPORT_RAW_INITRD=y -CONFIG_DEFAULT_FDT_FILE="r8a77965-salvator-x.dtb" -CONFIG_VERSION_VARIABLE=y -CONFIG_HUSH_PARSER=y -CONFIG_CMD_BOOTZ=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_PCI=y -CONFIG_CMD_USB=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y -CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="r8a77965-salvator-x-u-boot" -CONFIG_OF_LIST="r8a7795-salvator-x-u-boot r8a7796-salvator-x-u-boot r8a77965-salvator-x-u-boot" -CONFIG_MULTI_DTB_FIT_LZO=y -CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y -CONFIG_ENV_IS_IN_MMC=y -CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_REGMAP=y -CONFIG_SYSCON=y -CONFIG_CLK=y -CONFIG_CLK_RENESAS=y -CONFIG_RCAR_GPIO=y -CONFIG_DM_I2C=y -CONFIG_SYS_I2C_RCAR_IIC=y -CONFIG_DM_MMC=y -CONFIG_MMC_IO_VOLTAGE=y -CONFIG_MMC_UHS_SUPPORT=y -CONFIG_MMC_HS400_SUPPORT=y -CONFIG_RENESAS_SDHI=y -CONFIG_PHY_MICREL=y -CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_DM_ETH=y -CONFIG_RENESAS_RAVB=y -CONFIG_PCI=y -CONFIG_DM_PCI=y -CONFIG_PCI_RCAR_GEN3=y -CONFIG_DM_REGULATOR=y -CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_REGULATOR_GPIO=y -CONFIG_SCIF_CONSOLE=y -CONFIG_USB=y -CONFIG_DM_USB=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_GENERIC=y -CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT_OVERLAY=y -CONFIG_SMBIOS_MANUFACTURER="" diff --git a/configs/r8a77965_ulcb_defconfig b/configs/r8a77965_ulcb_defconfig deleted file mode 100644 index 117939bac7b..00000000000 --- a/configs/r8a77965_ulcb_defconfig +++ /dev/null @@ -1,68 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_CPU_INIT=y -CONFIG_ARCH_RMOBILE=y -CONFIG_SYS_TEXT_BASE=0x50000000 -CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_ENV_SIZE=0x20000 -CONFIG_ENV_OFFSET=0xFFFE0000 -CONFIG_DM_GPIO=y -CONFIG_RCAR_GEN3=y -CONFIG_TARGET_ULCB=y -CONFIG_SMBIOS_PRODUCT_NAME="" -CONFIG_SPL_TEXT_BASE=0xe6338000 -CONFIG_FIT=y -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" -CONFIG_SUPPORT_RAW_INITRD=y -CONFIG_DEFAULT_FDT_FILE="r8a77965-m3nulcb.dtb" -CONFIG_VERSION_VARIABLE=y -CONFIG_HUSH_PARSER=y -CONFIG_CMD_BOOTZ=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_USB=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y -CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="r8a77965-m3nulcb-u-boot" -CONFIG_OF_LIST="r8a7795-h3ulcb-u-boot r8a7796-m3ulcb-u-boot r8a77965-m3nulcb-u-boot" -CONFIG_MULTI_DTB_FIT_LZO=y -CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y -CONFIG_ENV_IS_IN_MMC=y -CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_REGMAP=y -CONFIG_SYSCON=y -CONFIG_CLK=y -CONFIG_CLK_RENESAS=y -CONFIG_RCAR_GPIO=y -CONFIG_DM_I2C=y -CONFIG_SYS_I2C_RCAR_IIC=y -CONFIG_DM_MMC=y -CONFIG_MMC_IO_VOLTAGE=y -CONFIG_MMC_UHS_SUPPORT=y -CONFIG_MMC_HS400_SUPPORT=y -CONFIG_RENESAS_SDHI=y -CONFIG_PHY_MICREL=y -CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_DM_ETH=y -CONFIG_RENESAS_RAVB=y -CONFIG_DM_REGULATOR=y -CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_REGULATOR_GPIO=y -CONFIG_SCIF_CONSOLE=y -CONFIG_SYSRESET=y -CONFIG_USB=y -CONFIG_DM_USB=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_GENERIC=y -CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT_OVERLAY=y -CONFIG_SMBIOS_MANUFACTURER="" diff --git a/configs/r8a7796_salvator-x_defconfig b/configs/r8a7796_salvator-x_defconfig deleted file mode 100644 index 86d666fdf1a..00000000000 --- a/configs/r8a7796_salvator-x_defconfig +++ /dev/null @@ -1,71 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_CPU_INIT=y -CONFIG_ARCH_RMOBILE=y -CONFIG_SYS_TEXT_BASE=0x50000000 -CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_ENV_SIZE=0x20000 -CONFIG_ENV_OFFSET=0xFFFE0000 -CONFIG_DM_GPIO=y -CONFIG_RCAR_GEN3=y -CONFIG_TARGET_SALVATOR_X=y -CONFIG_SMBIOS_PRODUCT_NAME="" -CONFIG_SPL_TEXT_BASE=0xe6338000 -CONFIG_FIT=y -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" -CONFIG_SUPPORT_RAW_INITRD=y -CONFIG_DEFAULT_FDT_FILE="r8a7796-salvator-x.dtb" -CONFIG_VERSION_VARIABLE=y -CONFIG_HUSH_PARSER=y -CONFIG_CMD_BOOTZ=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_PCI=y -CONFIG_CMD_USB=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y -CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="r8a7796-salvator-x-u-boot" -CONFIG_OF_LIST="r8a7795-salvator-x-u-boot r8a7796-salvator-x-u-boot r8a77965-salvator-x-u-boot" -CONFIG_MULTI_DTB_FIT_LZO=y -CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y -CONFIG_ENV_IS_IN_MMC=y -CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_REGMAP=y -CONFIG_SYSCON=y -CONFIG_CLK=y -CONFIG_CLK_RENESAS=y -CONFIG_RCAR_GPIO=y -CONFIG_DM_I2C=y -CONFIG_SYS_I2C_RCAR_IIC=y -CONFIG_DM_MMC=y -CONFIG_MMC_IO_VOLTAGE=y -CONFIG_MMC_UHS_SUPPORT=y -CONFIG_MMC_HS400_SUPPORT=y -CONFIG_RENESAS_SDHI=y -CONFIG_PHY_MICREL=y -CONFIG_PHY_MICREL_KSZ90X1=y -CONFIG_DM_ETH=y -CONFIG_RENESAS_RAVB=y -CONFIG_PCI=y -CONFIG_DM_PCI=y -CONFIG_PCI_RCAR_GEN3=y -CONFIG_DM_REGULATOR=y -CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_REGULATOR_GPIO=y -CONFIG_SCIF_CONSOLE=y -CONFIG_USB=y -CONFIG_DM_USB=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_GENERIC=y -CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT_OVERLAY=y -CONFIG_SMBIOS_MANUFACTURER="" diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig index 2658ae8f69e..78bfb9a0329 100644 --- a/configs/r8a77970_eagle_defconfig +++ b/configs/r8a77970_eagle_defconfig @@ -4,13 +4,13 @@ CONFIG_ARCH_RMOBILE=y CONFIG_SYS_TEXT_BASE=0x50000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x40000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x700000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_RCAR_GEN3=y CONFIG_TARGET_EAGLE=y -CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_SPL_TEXT_BASE=0xe6318000 +CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" @@ -48,6 +48,7 @@ CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_BITBANGMII=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y diff --git a/configs/r8a77980_condor_defconfig b/configs/r8a77980_condor_defconfig index bf2e65aba8f..83d6a756708 100644 --- a/configs/r8a77980_condor_defconfig +++ b/configs/r8a77980_condor_defconfig @@ -4,13 +4,13 @@ CONFIG_ARCH_RMOBILE=y CONFIG_SYS_TEXT_BASE=0x50000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x40000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x700000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y CONFIG_RCAR_GEN3=y CONFIG_TARGET_CONDOR=y -CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_SPL_TEXT_BASE=0xe6318000 +CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" @@ -52,6 +52,7 @@ CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_BITBANGMII=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig index 621849f0f74..cc9257b81b0 100644 --- a/configs/r8a77990_ebisu_defconfig +++ b/configs/r8a77990_ebisu_defconfig @@ -8,8 +8,8 @@ CONFIG_ENV_OFFSET=0xFFFE0000 CONFIG_DM_GPIO=y CONFIG_RCAR_GEN3=y CONFIG_TARGET_EBISU=y -CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_SPL_TEXT_BASE=0xe6318000 +CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" @@ -46,6 +46,7 @@ CONFIG_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_HS400_SUPPORT=y CONFIG_RENESAS_SDHI=y +CONFIG_BITBANGMII=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig index fbbef306668..89b0f15c76f 100644 --- a/configs/r8a77995_draak_defconfig +++ b/configs/r8a77995_draak_defconfig @@ -8,8 +8,8 @@ CONFIG_ENV_OFFSET=0xFFFE0000 CONFIG_DM_GPIO=y CONFIG_RCAR_GEN3=y CONFIG_TARGET_DRAAK=y -CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_SPL_TEXT_BASE=0xe6318000 +CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" @@ -54,6 +54,7 @@ CONFIG_CFI_FLASH=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_CFI=y CONFIG_RENESAS_RPC_HF=y +CONFIG_BITBANGMII=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig index 905e53b6325..c4a4e137379 100644 --- a/configs/rastaban_defconfig +++ b/configs/rastaban_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x2000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_AM33XX=y CONFIG_SYS_MPUCLK=300 CONFIG_TARGET_RASTABAN=y @@ -27,7 +28,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set @@ -73,6 +73,7 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_MTD_UBI_FASTMAP=y CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1 +CONFIG_PHY_SMSC=y CONFIG_DRIVER_TI_CPSW=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/r8a7795_salvator-x_defconfig b/configs/rcar3_salvator-x_defconfig index 328d8b17044..3031fdde2d7 100644 --- a/configs/r8a7795_salvator-x_defconfig +++ b/configs/rcar3_salvator-x_defconfig @@ -7,13 +7,13 @@ CONFIG_ENV_OFFSET=0xFFFE0000 CONFIG_DM_GPIO=y CONFIG_RCAR_GEN3=y CONFIG_TARGET_SALVATOR_X=y -CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_SPL_TEXT_BASE=0xe6338000 +CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" CONFIG_SUPPORT_RAW_INITRD=y -CONFIG_DEFAULT_FDT_FILE="r8a7795-salvator-x.dtb" +CONFIG_DEFAULT_FDT_FILE="r8a77950-salvator-x.dtb" CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -31,8 +31,8 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="r8a7795-salvator-x-u-boot" -CONFIG_OF_LIST="r8a7795-salvator-x-u-boot r8a7796-salvator-x-u-boot r8a77965-salvator-x-u-boot" +CONFIG_DEFAULT_DEVICE_TREE="r8a77950-salvator-x-u-boot" +CONFIG_OF_LIST="r8a77950-salvator-x-u-boot r8a77960-salvator-x-u-boot r8a77965-salvator-x-u-boot" CONFIG_MULTI_DTB_FIT_LZO=y CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y CONFIG_ENV_IS_IN_MMC=y @@ -49,6 +49,7 @@ CONFIG_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_HS400_SUPPORT=y CONFIG_RENESAS_SDHI=y +CONFIG_BITBANGMII=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y diff --git a/configs/r8a7796_ulcb_defconfig b/configs/rcar3_ulcb_defconfig index ce4d5acfc7f..53ea93801b3 100644 --- a/configs/r8a7796_ulcb_defconfig +++ b/configs/rcar3_ulcb_defconfig @@ -8,13 +8,13 @@ CONFIG_ENV_OFFSET=0xFFFE0000 CONFIG_DM_GPIO=y CONFIG_RCAR_GEN3=y CONFIG_TARGET_ULCB=y -CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_SPL_TEXT_BASE=0xe6338000 +CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20" CONFIG_SUPPORT_RAW_INITRD=y -CONFIG_DEFAULT_FDT_FILE="r8a7796-m3ulcb.dtb" +CONFIG_DEFAULT_FDT_FILE="r8a77950-ulcb.dtb" CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -31,8 +31,8 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="r8a7796-m3ulcb-u-boot" -CONFIG_OF_LIST="r8a7795-h3ulcb-u-boot r8a7796-m3ulcb-u-boot r8a77965-m3nulcb-u-boot" +CONFIG_DEFAULT_DEVICE_TREE="r8a77950-ulcb-u-boot" +CONFIG_OF_LIST="r8a77950-ulcb-u-boot r8a77960-ulcb-u-boot r8a77965-ulcb-u-boot" CONFIG_MULTI_DTB_FIT_LZO=y CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y CONFIG_ENV_IS_IN_MMC=y @@ -49,6 +49,7 @@ CONFIG_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_HS400_SUPPORT=y CONFIG_RENESAS_SDHI=y +CONFIG_BITBANGMII=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig index 0e60c47e023..73656017d1d 100644 --- a/configs/riotboard_defconfig +++ b/configs/riotboard_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_TARGET_EMBESTMX6BOARDS=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x60000 +CONFIG_TARGET_EMBESTMX6BOARDS=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,MX6S,DDR_MB=1024" @@ -30,6 +30,7 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y diff --git a/configs/riotboard_spl_defconfig b/configs/riotboard_spl_defconfig index 61fe41d6fc5..5ff8da0355f 100644 --- a/configs/riotboard_spl_defconfig +++ b/configs/riotboard_spl_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_EMBESTMX6BOARDS=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x60000 +CONFIG_TARGET_EMBESTMX6BOARDS=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 @@ -40,6 +40,7 @@ CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y diff --git a/configs/roc-cc-rk3308_defconfig b/configs/roc-cc-rk3308_defconfig index 569166b2e3e..9e59ca4f76f 100644 --- a/configs/roc-cc-rk3308_defconfig +++ b/configs/roc-cc-rk3308_defconfig @@ -71,7 +71,6 @@ CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_SPL_TINY_MEMSET=y -CONFIG_LZ4=y CONFIG_LZO=y CONFIG_ERRNO_STR=y # CONFIG_EFI_LOADER is not set diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index be76524cef7..aff690f0396 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -50,18 +50,16 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_KEYBOARD=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_ASIX88179=y CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y -CONFIG_USB_KEYBOARD=y -CONFIG_SPL_TINY_MEMSET=y -CONFIG_ERRNO_STR=y CONFIG_DM_VIDEO=y -CONFIG_VIDEO_BPP16=y -CONFIG_VIDEO_BPP32=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y +CONFIG_SPL_TINY_MEMSET=y +CONFIG_ERRNO_STR=y diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig index cf71c859279..2118402bbea 100644 --- a/configs/rock2_defconfig +++ b/configs/rock2_defconfig @@ -9,8 +9,8 @@ CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0xff704000 +CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y CONFIG_SILENT_CONSOLE=y @@ -72,9 +72,9 @@ CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_DWC2=y CONFIG_ROCKCHIP_USB2_PHY=y +CONFIG_USB_KEYBOARD=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DWC2_OTG=y -CONFIG_USB_KEYBOARD=y CONFIG_DM_VIDEO=y # CONFIG_VIDEO_BPP8 is not set CONFIG_DISPLAY=y diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig index c4e954731a0..045d989a19a 100644 --- a/configs/rock960-rk3399_defconfig +++ b/configs/rock960-rk3399_defconfig @@ -51,6 +51,7 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_DWC3=y CONFIG_ROCKCHIP_USB2_PHY=y +CONFIG_USB_KEYBOARD=y CONFIG_USB_GADGET=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y @@ -58,12 +59,9 @@ CONFIG_USB_ETHER_ASIX88179=y CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y -CONFIG_USB_KEYBOARD=y -CONFIG_SPL_TINY_MEMSET=y -CONFIG_ERRNO_STR=y CONFIG_DM_VIDEO=y -CONFIG_VIDEO_BPP16=y -CONFIG_VIDEO_BPP32=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y +CONFIG_SPL_TINY_MEMSET=y +CONFIG_ERRNO_STR=y diff --git a/configs/rock_defconfig b/configs/rock_defconfig index 78cd548b9f7..4e804e92555 100644 --- a/configs/rock_defconfig +++ b/configs/rock_defconfig @@ -11,8 +11,8 @@ CONFIG_SPL_STACK_R_ADDR=0x60080000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0x20064000 CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x10080800 +CONFIG_DEBUG_UART=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3188-radxarock.dtb" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig index cecc16cbfc6..5053a388226 100644 --- a/configs/rpi_0_w_defconfig +++ b/configs/rpi_0_w_defconfig @@ -19,7 +19,6 @@ CONFIG_CMD_USB=y CONFIG_CMD_FS_UUID=y CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-zero-w" -CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig index 762a72a574f..0000a759f16 100644 --- a/configs/rpi_2_defconfig +++ b/configs/rpi_2_defconfig @@ -19,7 +19,6 @@ CONFIG_CMD_USB=y CONFIG_CMD_FS_UUID=y CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="bcm2836-rpi-2-b" -CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig index 5ca31648f9e..a714f9ec498 100644 --- a/configs/rpi_3_32b_defconfig +++ b/configs/rpi_3_32b_defconfig @@ -20,7 +20,6 @@ CONFIG_CMD_USB=y CONFIG_CMD_FS_UUID=y CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b" -CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y diff --git a/configs/rpi_3_b_plus_defconfig b/configs/rpi_3_b_plus_defconfig index 4f0332023dc..c9efa0671d9 100644 --- a/configs/rpi_3_b_plus_defconfig +++ b/configs/rpi_3_b_plus_defconfig @@ -20,7 +20,6 @@ CONFIG_CMD_USB=y CONFIG_CMD_FS_UUID=y CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b-plus" -CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig index 51d5a717d5b..244d9b3a788 100644 --- a/configs/rpi_3_defconfig +++ b/configs/rpi_3_defconfig @@ -20,7 +20,6 @@ CONFIG_CMD_USB=y CONFIG_CMD_FS_UUID=y CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b" -CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig index 72cda5d9495..8d262d89b4a 100644 --- a/configs/rpi_4_32b_defconfig +++ b/configs/rpi_4_32b_defconfig @@ -17,7 +17,6 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_FS_UUID=y CONFIG_OF_BOARD=y -CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig index 6d148dab07b..2a0cea4222c 100644 --- a/configs/rpi_4_defconfig +++ b/configs/rpi_4_defconfig @@ -17,7 +17,6 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_FS_UUID=y CONFIG_OF_BOARD=y -CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig index fea86be8b0e..d2406ca36d5 100644 --- a/configs/rpi_arm64_defconfig +++ b/configs/rpi_arm64_defconfig @@ -17,7 +17,6 @@ CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_FS_UUID=y CONFIG_OF_BOARD=y -CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_KEYBOARD=y diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig index dbbc818e14b..64bb184c2be 100644 --- a/configs/rpi_defconfig +++ b/configs/rpi_defconfig @@ -19,7 +19,6 @@ CONFIG_CMD_USB=y CONFIG_CMD_FS_UUID=y CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-b" -CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y diff --git a/configs/rut_defconfig b/configs/rut_defconfig index 22572ef09d7..40c9de25c69 100644 --- a/configs/rut_defconfig +++ b/configs/rut_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x2000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_AM33XX=y CONFIG_SYS_MPUCLK=600 CONFIG_TARGET_RUT=y @@ -29,7 +30,6 @@ CONFIG_ARCH_EARLY_INIT_R=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y @@ -74,6 +74,7 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_MTD_UBI_FASTMAP=y CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1 +CONFIG_PHY_NATSEMI=y CONFIG_MII=y CONFIG_DRIVER_TI_CPSW=y CONFIG_SPI=y diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig index b64064856f5..a750ec9e185 100644 --- a/configs/sama5d27_som1_ek_mmc1_defconfig +++ b/configs/sama5d27_som1_ek_mmc1_defconfig @@ -18,8 +18,8 @@ CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=82000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x200000 +CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2" diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig index dfd80470416..3f22fde0262 100644 --- a/configs/sama5d27_som1_ek_mmc_defconfig +++ b/configs/sama5d27_som1_ek_mmc_defconfig @@ -19,8 +19,8 @@ CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=82000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x200000 +CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2" diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig b/configs/sama5d27_som1_ek_qspiflash_defconfig index 6c2336369cb..2c8ae8d0041 100644 --- a/configs/sama5d27_som1_ek_qspiflash_defconfig +++ b/configs/sama5d27_som1_ek_qspiflash_defconfig @@ -19,8 +19,8 @@ CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=82000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x200000 +CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2" diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig index a22dcf1a01b..a5fb4f514ea 100644 --- a/configs/sama5d27_wlsom1_ek_mmc_defconfig +++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig @@ -17,8 +17,8 @@ CONFIG_DEBUG_UART_BASE=0xf801c000 CONFIG_DEBUG_UART_CLOCK=82000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x200000 +CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2" diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig index 31a7edfb434..92decb4b85a 100644 --- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig +++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -16,8 +17,8 @@ CONFIG_DEBUG_UART_BASE=0xf801c000 CONFIG_DEBUG_UART_CLOCK=82000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x200000 +CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2" @@ -32,7 +33,6 @@ CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_DISPLAY_PRINT=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SPL_AT91_MCK_BYPASS=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig index 64b23db4924..75d68a76e48 100644 --- a/configs/sama5d2_xplained_emmc_defconfig +++ b/configs/sama5d2_xplained_emmc_defconfig @@ -18,8 +18,8 @@ CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=83000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x200000 +CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_MMC" diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig index 12571ff517b..779e91a52a9 100644 --- a/configs/sama5d2_xplained_mmc_defconfig +++ b/configs/sama5d2_xplained_mmc_defconfig @@ -19,8 +19,8 @@ CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=83000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x200000 +CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_MMC" diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig index e64f1b6b839..9b5645667de 100644 --- a/configs/sama5d2_xplained_qspiflash_defconfig +++ b/configs/sama5d2_xplained_qspiflash_defconfig @@ -19,8 +19,8 @@ CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=83000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x200000 +CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_MMC" diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index 6da9bd3c56e..43d493bf9c0 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -8,8 +8,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x6000 +CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_DM_GPIO=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -20,8 +21,8 @@ CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=83000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x200000 +CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_SPI_BOOT=y @@ -31,7 +32,6 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p1 rw rootwai CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set diff --git a/configs/sama5d36ek_cmp_spiflash_defconfig b/configs/sama5d36ek_cmp_spiflash_defconfig index 024ac65b127..440f3cb555a 100644 --- a/configs/sama5d36ek_cmp_spiflash_defconfig +++ b/configs/sama5d36ek_cmp_spiflash_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3XEK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x6000 +CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig index fa85fabb01e..76e981dabfe 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -19,8 +19,8 @@ CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x300000 +CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_SD_BOOT=y diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index 83ff270e5cf..44c61848b82 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -16,8 +16,8 @@ CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x300000 +CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_NAND_BOOT=y diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig index a5fc1919181..d7f2ebeffd0 100644 --- a/configs/sama5d3xek_mmc_defconfig +++ b/configs/sama5d3xek_mmc_defconfig @@ -19,8 +19,8 @@ CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x300000 +CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_SD_BOOT=y diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index e39bd49b8c0..5ad854248d3 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -16,8 +16,8 @@ CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x300000 +CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_NAND_BOOT=y diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index 6c7cc2e16b9..6a76d7c9c03 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -8,8 +8,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x6000 +CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_DM_GPIO=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -20,8 +21,8 @@ CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x300000 +CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_SPI_BOOT=y @@ -30,7 +31,6 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig index bca732c911e..eaee73ec99b 100644 --- a/configs/sama5d4_xplained_mmc_defconfig +++ b/configs/sama5d4_xplained_mmc_defconfig @@ -19,8 +19,8 @@ CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x200000 +CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_SD_BOOT=y diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig index 58f314b4ecb..a277be13a47 100644 --- a/configs/sama5d4_xplained_nandflash_defconfig +++ b/configs/sama5d4_xplained_nandflash_defconfig @@ -16,8 +16,8 @@ CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x200000 +CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_NAND_BOOT=y diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig index d833962c3b6..3be18e65a4b 100644 --- a/configs/sama5d4_xplained_spiflash_defconfig +++ b/configs/sama5d4_xplained_spiflash_defconfig @@ -8,8 +8,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x6000 +CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_DM_GPIO=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -20,8 +21,8 @@ CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x200000 +CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_SPI_BOOT=y @@ -31,7 +32,6 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(boots CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig index b0486edd807..c1c64dd3228 100644 --- a/configs/sama5d4ek_mmc_defconfig +++ b/configs/sama5d4ek_mmc_defconfig @@ -19,8 +19,8 @@ CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=88000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x200000 +CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_SD_BOOT=y diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig index 9fdc36a7ee9..935945c154c 100644 --- a/configs/sama5d4ek_nandflash_defconfig +++ b/configs/sama5d4ek_nandflash_defconfig @@ -16,8 +16,8 @@ CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=88000000 CONFIG_ENV_OFFSET_REDUND=0x100000 -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x200000 +CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_NAND_BOOT=y diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig index 13243a796cc..a7541a22d64 100644 --- a/configs/sama5d4ek_spiflash_defconfig +++ b/configs/sama5d4ek_spiflash_defconfig @@ -8,8 +8,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x6000 +CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_DM_GPIO=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -20,8 +21,8 @@ CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=88000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x200000 +CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_SPI_BOOT=y @@ -30,7 +31,6 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index 9d092330efe..d69b185aa8b 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -203,7 +203,6 @@ CONFIG_WDT_SANDBOX=y CONFIG_FS_CBFS=y CONFIG_FS_CRAMFS=y CONFIG_CMD_DHRYSTONE=y -CONFIG_RSA_VERIFY_WITH_PKEY=y CONFIG_TPM=y CONFIG_LZ4=y CONFIG_ERRNO_STR=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index cc383158683..781238763a5 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -229,7 +229,6 @@ CONFIG_WDT_SANDBOX=y CONFIG_FS_CBFS=y CONFIG_FS_CRAMFS=y CONFIG_CMD_DHRYSTONE=y -CONFIG_RSA_VERIFY_WITH_PKEY=y CONFIG_TPM=y CONFIG_LZ4=y CONFIG_ERRNO_STR=y diff --git a/configs/sbc8349_PCI_33_defconfig b/configs/sbc8349_PCI_33_defconfig index a042b1e886e..52afd44c276 100644 --- a/configs/sbc8349_PCI_33_defconfig +++ b/configs/sbc8349_PCI_33_defconfig @@ -108,7 +108,15 @@ CONFIG_ENV_ADDR_REDUND=0xFF860000 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/sbc8349_PCI_66_defconfig b/configs/sbc8349_PCI_66_defconfig index 6d09d61fd38..c50a76bac50 100644 --- a/configs/sbc8349_PCI_66_defconfig +++ b/configs/sbc8349_PCI_66_defconfig @@ -108,7 +108,15 @@ CONFIG_ENV_ADDR_REDUND=0xFF860000 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/sbc8349_defconfig b/configs/sbc8349_defconfig index efcaae90c1b..2b062720245 100644 --- a/configs/sbc8349_defconfig +++ b/configs/sbc8349_defconfig @@ -85,7 +85,15 @@ CONFIG_ENV_ADDR_REDUND=0xFF860000 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_TSEC_ENET=y # CONFIG_PCI is not set CONFIG_SYS_NS16550=y diff --git a/configs/sbc8548_PCI_33_PCIE_defconfig b/configs/sbc8548_PCI_33_PCIE_defconfig index e3eca06cd02..1c480b68d39 100644 --- a/configs/sbc8548_PCI_33_PCIE_defconfig +++ b/configs/sbc8548_PCI_33_PCIE_defconfig @@ -26,7 +26,15 @@ CONFIG_ENV_ADDR=0xFFFE0000 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/sbc8548_PCI_33_defconfig b/configs/sbc8548_PCI_33_defconfig index 9583402ebfb..9b5a3696334 100644 --- a/configs/sbc8548_PCI_33_defconfig +++ b/configs/sbc8548_PCI_33_defconfig @@ -26,7 +26,15 @@ CONFIG_ENV_ADDR=0xFFFE0000 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/sbc8548_PCI_66_PCIE_defconfig b/configs/sbc8548_PCI_66_PCIE_defconfig index 3d8033f6b4d..97474a2528b 100644 --- a/configs/sbc8548_PCI_66_PCIE_defconfig +++ b/configs/sbc8548_PCI_66_PCIE_defconfig @@ -26,7 +26,15 @@ CONFIG_ENV_ADDR=0xFFFE0000 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/sbc8548_PCI_66_defconfig b/configs/sbc8548_PCI_66_defconfig index 0eb0cc542ac..843c9d1f4d8 100644 --- a/configs/sbc8548_PCI_66_defconfig +++ b/configs/sbc8548_PCI_66_defconfig @@ -26,7 +26,15 @@ CONFIG_ENV_ADDR=0xFFFE0000 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/sbc8548_defconfig b/configs/sbc8548_defconfig index 4e090770a80..0b693f51dcc 100644 --- a/configs/sbc8548_defconfig +++ b/configs/sbc8548_defconfig @@ -24,7 +24,15 @@ CONFIG_ENV_ADDR=0xFFFE0000 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y # CONFIG_PCI is not set diff --git a/configs/sbc8641d_defconfig b/configs/sbc8641d_defconfig index 767428a04d9..67fbb1c5c0c 100644 --- a/configs/sbc8641d_defconfig +++ b/configs/sbc8641d_defconfig @@ -24,7 +24,15 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/sc_sps_1_defconfig b/configs/sc_sps_1_defconfig index b525d6a6506..a56c42574bb 100644 --- a/configs/sc_sps_1_defconfig +++ b/configs/sc_sps_1_defconfig @@ -34,6 +34,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_MXS_GPIO=y CONFIG_MMC_MXS=y CONFIG_PHYLIB=y +CONFIG_PHY_SMSC=y CONFIG_MII=y CONFIG_CONS_INDEX=0 CONFIG_USB=y diff --git a/configs/secomx6quq7_defconfig b/configs/secomx6quq7_defconfig index 2f679fcec16..3383517a66e 100644 --- a/configs/secomx6quq7_defconfig +++ b/configs/secomx6quq7_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_TARGET_SECOMX6=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_TARGET_SECOMX6=y CONFIG_SECOMX6_UQ7=y CONFIG_SECOMX6Q=y CONFIG_SECOMX6_2GB=y diff --git a/configs/sei510_defconfig b/configs/sei510_defconfig index 79777e32629..c3fe419fa46 100644 --- a/configs/sei510_defconfig +++ b/configs/sei510_defconfig @@ -77,5 +77,4 @@ CONFIG_DM_VIDEO=y CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_MESON=y CONFIG_VIDEO_DT_SIMPLEFB=y -CONFIG_LZ4=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/sei610_defconfig b/configs/sei610_defconfig index bfcba343367..f147235a5ac 100644 --- a/configs/sei610_defconfig +++ b/configs/sei610_defconfig @@ -77,5 +77,4 @@ CONFIG_DM_VIDEO=y CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_MESON=y CONFIG_VIDEO_DT_SIMPLEFB=y -CONFIG_LZ4=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/sh7752evb_defconfig b/configs/sh7752evb_defconfig index b49734a934a..1d0c558effc 100644 --- a/configs/sh7752evb_defconfig +++ b/configs/sh7752evb_defconfig @@ -30,6 +30,8 @@ CONFIG_MAC_PARTITION=y CONFIG_DOS_PARTITION=y CONFIG_MMC=y CONFIG_SH_MMCIF=y +CONFIG_BITBANGMII=y +CONFIG_PHY_VITESSE=y CONFIG_SH_ETHER=y CONFIG_SCIF_CONSOLE=y CONFIG_SPI=y diff --git a/configs/sh7753evb_defconfig b/configs/sh7753evb_defconfig index 396d6e3b07b..b1563ed9c6c 100644 --- a/configs/sh7753evb_defconfig +++ b/configs/sh7753evb_defconfig @@ -29,6 +29,8 @@ CONFIG_MAC_PARTITION=y CONFIG_DOS_PARTITION=y CONFIG_MMC=y CONFIG_SH_MMCIF=y +CONFIG_BITBANGMII=y +CONFIG_PHY_VITESSE=y CONFIG_SH_ETHER=y CONFIG_SCIF_CONSOLE=y CONFIG_SPI=y diff --git a/configs/sh7757lcr_defconfig b/configs/sh7757lcr_defconfig index a7e7c2df000..4f5808afd16 100644 --- a/configs/sh7757lcr_defconfig +++ b/configs/sh7757lcr_defconfig @@ -32,6 +32,7 @@ CONFIG_MAC_PARTITION=y CONFIG_DOS_PARTITION=y CONFIG_MMC=y CONFIG_SH_MMCIF=y +CONFIG_BITBANGMII=y CONFIG_SH_ETHER=y CONFIG_SCIF_CONSOLE=y CONFIG_SPI=y diff --git a/configs/sh7763rdp_defconfig b/configs/sh7763rdp_defconfig index 2ec6939caab..9c5acf4ce97 100644 --- a/configs/sh7763rdp_defconfig +++ b/configs/sh7763rdp_defconfig @@ -35,6 +35,7 @@ CONFIG_ENV_ADDR_REDUND=0xA0040000 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y +CONFIG_BITBANGMII=y CONFIG_SH_ETHER=y CONFIG_SCIF_CONSOLE=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/silk_defconfig b/configs/silk_defconfig index 89ef1d406f8..59503bc1ef3 100644 --- a/configs/silk_defconfig +++ b/configs/silk_defconfig @@ -9,8 +9,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_ENV_SIZE=0x40000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_DM_GPIO=y CONFIG_ARCH_RMOBILE_BOARD_STRING="Silk" CONFIG_R8A7794=y @@ -30,7 +31,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -73,6 +73,7 @@ CONFIG_DM_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_MTD=y +CONFIG_BITBANGMII=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y CONFIG_DM_ETH=y diff --git a/configs/sksimx6_defconfig b/configs/sksimx6_defconfig index 601a29e66f6..5a8469b01fa 100644 --- a/configs/sksimx6_defconfig +++ b/configs/sksimx6_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_MX6_DDRCAL=y -CONFIG_TARGET_SKSIMX6=y CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x60000 +CONFIG_MX6_DDRCAL=y +CONFIG_TARGET_SKSIMX6=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/smdk5250_defconfig b/configs/smdk5250_defconfig index 722bac152f6..cf671646ada 100644 --- a/configs/smdk5250_defconfig +++ b/configs/smdk5250_defconfig @@ -7,8 +7,8 @@ CONFIG_SYS_TEXT_BASE=0x43E00000 CONFIG_ARCH_EXYNOS5=y CONFIG_TARGET_SMDK5250=y CONFIG_ENV_SIZE=0x4000 -CONFIG_ENV_SECT_SIZE=0x4000 CONFIG_ENV_OFFSET=0x3FC000 +CONFIG_ENV_SECT_SIZE=0x4000 CONFIG_NR_DRAM_BANKS=8 CONFIG_SPL=y CONFIG_IDENT_STRING=" for SMDK5250" diff --git a/configs/smdk5420_defconfig b/configs/smdk5420_defconfig index 6ec0beb3f1f..9af878dd0ee 100644 --- a/configs/smdk5420_defconfig +++ b/configs/smdk5420_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x23E00000 CONFIG_ARCH_EXYNOS5=y CONFIG_TARGET_SMDK5420=y CONFIG_ENV_SIZE=0x4000 -CONFIG_ENV_SECT_SIZE=0x4000 CONFIG_ENV_OFFSET=0x3FC000 +CONFIG_ENV_SECT_SIZE=0x4000 CONFIG_NR_DRAM_BANKS=7 CONFIG_SPL=y CONFIG_IDENT_STRING=" for SMDK5420" diff --git a/configs/snow_defconfig b/configs/snow_defconfig index 81dc72938c7..d408e005e1e 100644 --- a/configs/snow_defconfig +++ b/configs/snow_defconfig @@ -7,15 +7,15 @@ CONFIG_SYS_TEXT_BASE=0x43E00000 CONFIG_ARCH_EXYNOS5=y CONFIG_TARGET_SNOW=y CONFIG_ENV_SIZE=0x4000 -CONFIG_ENV_SECT_SIZE=0x4000 CONFIG_ENV_OFFSET=0x3FC000 +CONFIG_ENV_SECT_SIZE=0x4000 CONFIG_NR_DRAM_BANKS=8 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0x12c30000 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_IDENT_STRING=" for snow" -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x02023400 +CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig index 4fd84ad4f88..4bca53aebba 100644 --- a/configs/socfpga_agilex_defconfig +++ b/configs/socfpga_agilex_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x1000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x200 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y @@ -13,7 +14,6 @@ CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_BOOTDELAY=5 CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " CONFIG_CMD_MEMTEST=y diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig index ca34457ddd1..35ae18fac00 100644 --- a/configs/socfpga_arria10_defconfig +++ b/configs/socfpga_arria10_defconfig @@ -27,6 +27,7 @@ CONFIG_CMD_GREPENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0" @@ -49,4 +50,7 @@ CONFIG_SPI=y CONFIG_TIMER=y CONFIG_SPL_TIMER=y CONFIG_DESIGNWARE_APB_TIMER=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_DWC2=y # CONFIG_SPL_WDT is not set diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index 0478a726fb1..ce230110e45 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y CONFIG_SPL_TEXT_BASE=0xFFFF0000 @@ -16,7 +17,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DFU=y diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index b6220e4ae8c..1633ca1deb5 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y CONFIG_SPL_TEXT_BASE=0xFFFF0000 @@ -16,7 +17,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DFU=y diff --git a/configs/socfpga_dbm_soc1_defconfig b/configs/socfpga_dbm_soc1_defconfig index 878b409645d..3e1a06d9424 100644 --- a/configs/socfpga_dbm_soc1_defconfig +++ b/configs/socfpga_dbm_soc1_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1=y CONFIG_SPL_TEXT_BASE=0xFFFF0000 @@ -17,7 +18,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_ASKENV=y diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig index 349be7205d9..dafb5e83d09 100644 --- a/configs/socfpga_de0_nano_soc_defconfig +++ b/configs/socfpga_de0_nano_soc_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y CONFIG_SPL_TEXT_BASE=0xFFFF0000 @@ -17,7 +18,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DFU=y diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig index ed34223a46b..64ee602b742 100644 --- a/configs/socfpga_de10_nano_defconfig +++ b/configs/socfpga_de10_nano_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_TARGET_SOCFPGA_TERASIC_DE10_NANO=y CONFIG_SPL_TEXT_BASE=0xFFFF0000 @@ -16,7 +17,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DFU=y diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig index ec1abbcc3d9..a60df9b5d98 100644 --- a/configs/socfpga_is1_defconfig +++ b/configs/socfpga_is1_defconfig @@ -1,8 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8 CONFIG_TARGET_SOCFPGA_IS1=y @@ -19,7 +20,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y # CONFIG_CMD_FLASH is not set diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig index a5179693f6b..157efea5220 100644 --- a/configs/socfpga_mcvevk_defconfig +++ b/configs/socfpga_mcvevk_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_TARGET_SOCFPGA_ARIES_MCVEVK=y CONFIG_SPL_TEXT_BASE=0xFFFF0000 @@ -17,7 +18,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DFU=y diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig index fcb38f1a410..2ded2977da0 100644 --- a/configs/socfpga_secu1_defconfig +++ b/configs/socfpga_secu1_defconfig @@ -11,8 +11,8 @@ CONFIG_ENV_OFFSET_REDUND=0x120000 # CONFIG_SPL_LIBDISK_SUPPORT is not set # CONFIG_SPL_SPI_SUPPORT is not set CONFIG_SPL_TEXT_BASE=0xFFFF0000 -CONFIG_DISTRO_DEFAULTS=y CONFIG_BUILD_TARGET="u-boot-with-nand-spl.sfp" +CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig index 255b0d6ee94..247f3abda1c 100644 --- a/configs/socfpga_sockit_defconfig +++ b/configs/socfpga_sockit_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT=y CONFIG_SPL_TEXT_BASE=0xFFFF0000 @@ -16,7 +17,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DFU=y diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index 68d57a11386..a9ec97f2f4b 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_TARGET_SOCFPGA_EBV_SOCRATES=y CONFIG_SPL_TEXT_BASE=0xFFFF0000 @@ -16,7 +17,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_DFU=y diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index af7c7bc5de5..099ed7e9cb2 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -1,8 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y CONFIG_ENV_SIZE=0x4000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0xE0000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8 CONFIG_TARGET_SOCFPGA_SR1500=y @@ -21,7 +22,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index 26db40ffe33..155de1a6439 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x1000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x200 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x3C00000 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_SOCFPGA_STRATIX10_SOCDK=y @@ -12,7 +13,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_BOOTDELAY=5 CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x3C00000 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # " CONFIG_CMD_MEMTEST=y diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index 47fb5a89f5b..61b569eb3cf 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -1,8 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_DM_GPIO=y CONFIG_TARGET_SOCFPGA_SOFTING_VINING_FPGA=y CONFIG_ENV_OFFSET_REDUND=0x110000 @@ -23,7 +24,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig index 244822fb9d5..5b2d0258e9e 100644 --- a/configs/socrates_defconfig +++ b/configs/socrates_defconfig @@ -51,7 +51,15 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_DM_PCI=y diff --git a/configs/som-db5800-som-6867_defconfig b/configs/som-db5800-som-6867_defconfig index a206fe63dba..4d7accc7c47 100644 --- a/configs/som-db5800-som-6867_defconfig +++ b/configs/som-db5800-som-6867_defconfig @@ -1,8 +1,8 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0xFFF00000 CONFIG_ENV_SIZE=0x1000 -CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x6EF000 +CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_NR_DRAM_BANKS=8 CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 diff --git a/configs/somlabs_visionsom_6ull_defconfig b/configs/somlabs_visionsom_6ull_defconfig index e39c03573a2..03e37afb5c2 100644 --- a/configs/somlabs_visionsom_6ull_defconfig +++ b/configs/somlabs_visionsom_6ull_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 -CONFIG_TARGET_SOMLABS_VISIONSOM_6ULL=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_TARGET_SOMLABS_VISIONSOM_6ULL=y CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/somlabs/visionsom-6ull/imximage.cfg" diff --git a/configs/spear600_defconfig b/configs/spear600_defconfig index 70086c2cbf8..40d4aac9531 100644 --- a/configs/spear600_defconfig +++ b/configs/spear600_defconfig @@ -31,6 +31,7 @@ CONFIG_SYS_I2C_DW=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_NATSEMI=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y diff --git a/configs/spear600_nand_defconfig b/configs/spear600_nand_defconfig index c7bfcada86c..e22bd337c32 100644 --- a/configs/spear600_nand_defconfig +++ b/configs/spear600_nand_defconfig @@ -28,6 +28,7 @@ CONFIG_SYS_I2C_DW=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_NATSEMI=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y diff --git a/configs/spear600_usbtty_defconfig b/configs/spear600_usbtty_defconfig index 854b97a25df..3c26fbe4b0d 100644 --- a/configs/spear600_usbtty_defconfig +++ b/configs/spear600_usbtty_defconfig @@ -28,6 +28,7 @@ CONFIG_SYS_I2C_DW=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_NATSEMI=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y diff --git a/configs/spear600_usbtty_nand_defconfig b/configs/spear600_usbtty_nand_defconfig index ae876149a09..cee23052c7f 100644 --- a/configs/spear600_usbtty_nand_defconfig +++ b/configs/spear600_usbtty_nand_defconfig @@ -28,6 +28,7 @@ CONFIG_SYS_I2C_DW=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_NATSEMI=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y diff --git a/configs/spring_defconfig b/configs/spring_defconfig index ceddbf8f7e4..ee9cbb71a22 100644 --- a/configs/spring_defconfig +++ b/configs/spring_defconfig @@ -7,15 +7,15 @@ CONFIG_SYS_TEXT_BASE=0x43E00000 CONFIG_ARCH_EXYNOS5=y CONFIG_TARGET_SPRING=y CONFIG_ENV_SIZE=0x4000 -CONFIG_ENV_SECT_SIZE=0x4000 CONFIG_ENV_OFFSET=0x3FC000 +CONFIG_ENV_SECT_SIZE=0x4000 CONFIG_NR_DRAM_BANKS=8 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0x12c30000 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_IDENT_STRING=" for spring" -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x02023400 +CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig index c9e22563a31..cdfa8bbbc4b 100644 --- a/configs/stm32f746-disco_defconfig +++ b/configs/stm32f746-disco_defconfig @@ -46,6 +46,7 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y diff --git a/configs/stm32f769-disco_defconfig b/configs/stm32f769-disco_defconfig index 19a7493d007..c40730e14a9 100644 --- a/configs/stm32f769-disco_defconfig +++ b/configs/stm32f769-disco_defconfig @@ -46,6 +46,7 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index c8f1780cab2..100f174a579 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -1,8 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_STM32MP=y CONFIG_SYS_MALLOC_F_LEN=0x3000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x280000 +CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL=y CONFIG_TARGET_ST_STM32MP15x=y @@ -19,7 +20,6 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3 CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_POWER_SUPPORT=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SYS_PROMPT="STM32MP> " # CONFIG_CMD_ELF is not set # CONFIG_CMD_EXPORTENV is not set diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index f830feb3068..5f3813e515c 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_STM32MP=y CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_ENV_SIZE=0x4000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL=y CONFIG_TARGET_DH_STM32MP1_PDK2=y @@ -17,7 +18,6 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3 CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_POWER_SUPPORT=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SYS_PROMPT="STM32MP> " # CONFIG_CMD_ELF is not set # CONFIG_CMD_EXPORTENV is not set @@ -90,7 +90,6 @@ CONFIG_SPI_FLASH_MTD=y CONFIG_SPL_SPI_FLASH_MTD=y CONFIG_DM_ETH=y CONFIG_DWC_ETH_QOS=y -CONFIG_KS8851_MLL=y CONFIG_PHY=y CONFIG_PHY_STM32_USBPHYC=y CONFIG_PINCONF=y diff --git a/configs/stm32mp15_optee_defconfig b/configs/stm32mp15_optee_defconfig index 6c17bd9b200..596fe190af2 100644 --- a/configs/stm32mp15_optee_defconfig +++ b/configs/stm32mp15_optee_defconfig @@ -2,8 +2,8 @@ CONFIG_ARM=y CONFIG_ARCH_STM32MP=y CONFIG_TFABOOT=y CONFIG_SYS_MALLOC_F_LEN=0x3000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x280000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_TARGET_ST_STM32MP15x=y CONFIG_STM32MP1_OPTEE=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index d22605f398a..f9df13a6c3b 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -2,8 +2,8 @@ CONFIG_ARM=y CONFIG_ARCH_STM32MP=y CONFIG_TFABOOT=y CONFIG_SYS_MALLOC_F_LEN=0x3000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x280000 +CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_TARGET_ST_STM32MP15x=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/stmark2_defconfig b/configs/stmark2_defconfig index 82c6c131b0a..036ff707d19 100644 --- a/configs/stmark2_defconfig +++ b/configs/stmark2_defconfig @@ -1,8 +1,8 @@ CONFIG_M68K=y CONFIG_SYS_TEXT_BASE=0x47E00000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_TARGET_STMARK2=y CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=30000000" # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/stout_defconfig b/configs/stout_defconfig index 286d30fc67b..cc4a5198aa0 100644 --- a/configs/stout_defconfig +++ b/configs/stout_defconfig @@ -9,8 +9,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_ENV_SIZE=0x40000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_DM_GPIO=y CONFIG_ARCH_RMOBILE_BOARD_STRING="Stout" CONFIG_R8A7790=y @@ -30,7 +31,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y @@ -71,6 +71,7 @@ CONFIG_DM_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_MTD=y +CONFIG_BITBANGMII=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y CONFIG_DM_ETH=y diff --git a/configs/strider_con_defconfig b/configs/strider_con_defconfig index 1c3146ed180..0790c76a701 100644 --- a/configs/strider_con_defconfig +++ b/configs/strider_con_defconfig @@ -126,7 +126,16 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_BITBANGMII=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 diff --git a/configs/strider_con_dp_defconfig b/configs/strider_con_dp_defconfig index 0cea69d0c0a..f203f404645 100644 --- a/configs/strider_con_dp_defconfig +++ b/configs/strider_con_dp_defconfig @@ -126,7 +126,16 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_BITBANGMII=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 diff --git a/configs/strider_cpu_defconfig b/configs/strider_cpu_defconfig index 3a5db81a598..c2875c51a7a 100644 --- a/configs/strider_cpu_defconfig +++ b/configs/strider_cpu_defconfig @@ -126,7 +126,16 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_BITBANGMII=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 diff --git a/configs/strider_cpu_dp_defconfig b/configs/strider_cpu_dp_defconfig index 3897d864f9b..7647fd800b1 100644 --- a/configs/strider_cpu_dp_defconfig +++ b/configs/strider_cpu_dp_defconfig @@ -126,7 +126,16 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_BITBANGMII=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_CONS_INDEX=2 diff --git a/configs/stv0991_defconfig b/configs/stv0991_defconfig index 016be7a4fa4..0b52b007332 100644 --- a/configs/stv0991_defconfig +++ b/configs/stv0991_defconfig @@ -4,8 +4,8 @@ CONFIG_TARGET_STV0991=y CONFIG_SYS_TEXT_BASE=0x00010000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x30000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="STV0991" CONFIG_BOOTDELAY=3 diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 61d4c74324f..f4fdd38c3f5 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_TARGET_TBS2910=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x60000 +CONFIG_TARGET_TBS2910=y CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_PRE_CON_BUF_ADDR=0x7c000000 diff --git a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig index 5710ad520a9..7a8feee5212 100644 --- a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig +++ b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig @@ -1,8 +1,8 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0xFFF00000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x6EC000 +CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_OFFSET_REDUND=0x6EE000 CONFIG_VENDOR_CONGATEC=y diff --git a/configs/theadorable-x86-conga-qa3-e3845_defconfig b/configs/theadorable-x86-conga-qa3-e3845_defconfig index a69b9076b68..dbbac6b1035 100644 --- a/configs/theadorable-x86-conga-qa3-e3845_defconfig +++ b/configs/theadorable-x86-conga-qa3-e3845_defconfig @@ -1,8 +1,8 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0xFFF00000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x6EC000 +CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_OFFSET_REDUND=0x6EE000 CONFIG_VENDOR_CONGATEC=y diff --git a/configs/theadorable-x86-dfi-bt700_defconfig b/configs/theadorable-x86-dfi-bt700_defconfig index 3f63bdeb1c8..de9701afe6f 100644 --- a/configs/theadorable-x86-dfi-bt700_defconfig +++ b/configs/theadorable-x86-dfi-bt700_defconfig @@ -1,8 +1,8 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0xFFF00000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x6EC000 +CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_OFFSET_REDUND=0x6EE000 CONFIG_VENDOR_DFI=y diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig index 616c07ab54f..ab4a4609597 100644 --- a/configs/theadorable_debug_defconfig +++ b/configs/theadorable_debug_defconfig @@ -7,16 +7,17 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_THEADORABLE=y CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x1a000 CONFIG_DM_GPIO=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x40004030 +CONFIG_DEBUG_UART=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y CONFIG_BOOTDELAY=3 @@ -26,7 +27,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_I2C_SUPPORT=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x1a000 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig index 447491f9a6e..d81981a827e 100644 --- a/configs/thuban_defconfig +++ b/configs/thuban_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x2000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_AM33XX=y CONFIG_SYS_MPUCLK=300 CONFIG_TARGET_THUBAN=y @@ -27,7 +28,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set @@ -73,6 +73,7 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_MTD_UBI_FASTMAP=y CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1 +CONFIG_PHY_SMSC=y CONFIG_DRIVER_TI_CPSW=y CONFIG_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/ti814x_evm_defconfig b/configs/ti814x_evm_defconfig index b7050198ab4..71c9119c7d0 100644 --- a/configs/ti814x_evm_defconfig +++ b/configs/ti814x_evm_defconfig @@ -38,6 +38,7 @@ CONFIG_CMD_FAT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_MMC_OMAP_HS=y +CONFIG_PHY_ET1011C=y CONFIG_MII=y CONFIG_DRIVER_TI_CPSW=y CONFIG_SYS_NS16550=y diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig index 034d28ea2d8..9e6bcacba55 100644 --- a/configs/tinker-rk3288_defconfig +++ b/configs/tinker-rk3288_defconfig @@ -75,12 +75,12 @@ CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_DWC2=y CONFIG_ROCKCHIP_USB2_PHY=y +CONFIG_USB_KEYBOARD=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_SMSC95XX=y -CONFIG_USB_KEYBOARD=y CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y diff --git a/configs/tinker-s-rk3288_defconfig b/configs/tinker-s-rk3288_defconfig index 06c5d9b5070..daae189fe66 100644 --- a/configs/tinker-s-rk3288_defconfig +++ b/configs/tinker-s-rk3288_defconfig @@ -75,12 +75,12 @@ CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_DWC2=y CONFIG_ROCKCHIP_USB2_PHY=y +CONFIG_USB_KEYBOARD=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_SMSC95XX=y -CONFIG_USB_KEYBOARD=y CONFIG_DM_VIDEO=y # CONFIG_VIDEO_BPP8 is not set CONFIG_DISPLAY=y diff --git a/configs/titanium_defconfig b/configs/titanium_defconfig index d1235445f79..f8ba766ec7e 100644 --- a/configs/titanium_defconfig +++ b/configs/titanium_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_TARGET_TITANIUM=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x1000000 +CONFIG_TARGET_TITANIUM=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET_REDUND=0x1080000 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/barco/titanium/imximage.cfg" diff --git a/configs/tools-only_defconfig b/configs/tools-only_defconfig index 2811b2cd37d..70e62bf9d9d 100644 --- a/configs/tools-only_defconfig +++ b/configs/tools-only_defconfig @@ -12,6 +12,7 @@ CONFIG_OF_HOSTFILE=y CONFIG_DEFAULT_DEVICE_TREE="sandbox" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_IP_DEFRAG=y +# CONFIG_ACPIGEN is not set CONFIG_AXI=y CONFIG_AXI_SANDBOX=y # CONFIG_UDP_FUNCTION_FASTBOOT is not set @@ -26,4 +27,3 @@ CONFIG_SYSRESET=y # CONFIG_VIRTIO_PCI is not set # CONFIG_VIRTIO_SANDBOX is not set # CONFIG_EFI_LOADER is not set -# CONFIG_ACPIGEN is not set diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig index b989b7ff7f8..5c244b49991 100644 --- a/configs/topic_miami_defconfig +++ b/configs/topic_miami_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_ENV_SIZE=0x8000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_DM_GPIO=y CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y @@ -19,7 +20,6 @@ CONFIG_BOOTDELAY=0 CONFIG_USE_PREBOOT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SYS_PROMPT="zynq-uboot> " CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_MEMTEST=y diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig index 9000d32d29d..068b5bcdc14 100644 --- a/configs/topic_miamilite_defconfig +++ b/configs/topic_miamilite_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_ENV_SIZE=0x8000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_DM_GPIO=y CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y @@ -19,7 +20,6 @@ CONFIG_BOOTDELAY=0 CONFIG_USE_PREBOOT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SYS_PROMPT="zynq-uboot> " CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_MEMTEST=y diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig index 30ccf402abd..86980774e5f 100644 --- a/configs/topic_miamiplus_defconfig +++ b/configs/topic_miamiplus_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_ENV_SIZE=0x8000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_DM_GPIO=y CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y @@ -19,7 +20,6 @@ CONFIG_BOOTDELAY=0 CONFIG_USE_PREBOOT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 CONFIG_SYS_PROMPT="zynq-uboot> " CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_MEMTEST=y diff --git a/configs/tqma6dl_mba6_mmc_defconfig b/configs/tqma6dl_mba6_mmc_defconfig index d0021872094..4e1645dd326 100644 --- a/configs/tqma6dl_mba6_mmc_defconfig +++ b/configs/tqma6dl_mba6_mmc_defconfig @@ -1,8 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y -CONFIG_TARGET_TQMA6=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_TARGET_TQMA6=y CONFIG_TQMA6DL=y CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y diff --git a/configs/tqma6dl_mba6_spi_defconfig b/configs/tqma6dl_mba6_spi_defconfig index 7554c3d9699..b0596c225eb 100644 --- a/configs/tqma6dl_mba6_spi_defconfig +++ b/configs/tqma6dl_mba6_spi_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y -CONFIG_TARGET_TQMA6=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x80000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_TARGET_TQMA6=y CONFIG_TQMA6DL=y CONFIG_TQMA6X_SPI_BOOT=y CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/tqma6q_mba6_mmc_defconfig b/configs/tqma6q_mba6_mmc_defconfig index 5c61b75f49e..bee5e9e7e38 100644 --- a/configs/tqma6q_mba6_mmc_defconfig +++ b/configs/tqma6q_mba6_mmc_defconfig @@ -1,8 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y -CONFIG_TARGET_TQMA6=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_TARGET_TQMA6=y CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/tqma6q_mba6_spi_defconfig b/configs/tqma6q_mba6_spi_defconfig index 745bf170822..f1325a629bb 100644 --- a/configs/tqma6q_mba6_spi_defconfig +++ b/configs/tqma6q_mba6_spi_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y -CONFIG_TARGET_TQMA6=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x80000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_TARGET_TQMA6=y CONFIG_TQMA6X_SPI_BOOT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET_REDUND=0x90000 diff --git a/configs/tqma6s_mba6_mmc_defconfig b/configs/tqma6s_mba6_mmc_defconfig index fc60e9a2d1e..9d5f451a758 100644 --- a/configs/tqma6s_mba6_mmc_defconfig +++ b/configs/tqma6s_mba6_mmc_defconfig @@ -1,8 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y -CONFIG_TARGET_TQMA6=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_TARGET_TQMA6=y CONFIG_TQMA6S=y CONFIG_NR_DRAM_BANKS=1 CONFIG_FIT=y diff --git a/configs/tqma6s_mba6_spi_defconfig b/configs/tqma6s_mba6_spi_defconfig index 23e3f1abc30..f28548b9a3a 100644 --- a/configs/tqma6s_mba6_spi_defconfig +++ b/configs/tqma6s_mba6_spi_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y -CONFIG_TARGET_TQMA6=y CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x80000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_TARGET_TQMA6=y CONFIG_TQMA6S=y CONFIG_TQMA6X_SPI_BOOT=y CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/tqma6s_wru4_mmc_defconfig b/configs/tqma6s_wru4_mmc_defconfig index 49dcdec9490..73ca9ab2d9e 100644 --- a/configs/tqma6s_wru4_mmc_defconfig +++ b/configs/tqma6s_wru4_mmc_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_OFFSET=0x100000 CONFIG_TARGET_TQMA6=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y -CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_OFFSET=0x100000 CONFIG_TQMA6S=y CONFIG_WRU4=y CONFIG_SYS_BOOTCOUNT_ADDR=0x00900000 @@ -68,6 +68,7 @@ CONFIG_PCA9551_LED=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_SMSC=y CONFIG_MII=y # CONFIG_SPECIFY_CONSOLE_INDEX is not set CONFIG_MXC_UART=y diff --git a/configs/trimslice_defconfig b/configs/trimslice_defconfig index 6613701e3cf..fb9be305b6b 100644 --- a/configs/trimslice_defconfig +++ b/configs/trimslice_defconfig @@ -2,8 +2,8 @@ CONFIG_ARM=y CONFIG_TEGRA=y CONFIG_SYS_TEXT_BASE=0x00110000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFE000 +CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TEGRA20=y CONFIG_TARGET_TRIMSLICE=y diff --git a/configs/ts4800_defconfig b/configs/ts4800_defconfig index 5701bfa7441..810f0d8d886 100644 --- a/configs/ts4800_defconfig +++ b/configs/ts4800_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX5=y CONFIG_SYS_TEXT_BASE=0x90008000 -CONFIG_TARGET_TS4800=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x60000 +CONFIG_TARGET_TS4800=y CONFIG_NR_DRAM_BANKS=1 # CONFIG_CMD_BMODE is not set CONFIG_BOOTDELAY=1 @@ -21,6 +21,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_SMSC=y CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y diff --git a/configs/turris_mox_defconfig b/configs/turris_mox_defconfig index d786255d1d7..66d475d8bcb 100644 --- a/configs/turris_mox_defconfig +++ b/configs/turris_mox_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_TURRIS_MOX=y CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x180000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=2 CONFIG_DEBUG_UART_BASE=0xd0012000 @@ -14,6 +14,7 @@ CONFIG_DEBUG_UART_CLOCK=25804800 CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_MISC_INIT_R=y @@ -37,7 +38,6 @@ CONFIG_CMD_BTRFS=y CONFIG_CMD_EXT4_WRITE=y CONFIG_MAC_PARTITION=y CONFIG_OF_BOARD_FIXUP=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_DEVICE_TREE="armada-3720-turris-mox" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y @@ -57,6 +57,7 @@ CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVNETA=y CONFIG_PCI=y diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index 29c49686e2a..07d86127409 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -9,17 +9,18 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_TURRIS_OMNIA=y CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0xF0000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000 CONFIG_DM_GPIO=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 +CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_DEBUG_UART=y CONFIG_AHCI=y -CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -30,7 +31,6 @@ CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_I2C_SUPPORT=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000 CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y CONFIG_CMD_SHA1SUM=y diff --git a/configs/uDPU_defconfig b/configs/uDPU_defconfig index 18781828193..ee5bf0bb64b 100644 --- a/configs/uDPU_defconfig +++ b/configs/uDPU_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_MVEBU_ARMADA_37XX=y CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x180000 +CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=25804800 diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig index 9f87c72b57e..55811962a5e 100644 --- a/configs/udoo_defconfig +++ b/configs/udoo_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_UDOO=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x60000 +CONFIG_TARGET_UDOO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig index a2355af9b93..b2333a573bc 100644 --- a/configs/udoo_neo_defconfig +++ b/configs/udoo_neo_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_UDOO_NEO=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x80000 +CONFIG_TARGET_UDOO_NEO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/usb_a9263_dataflash_defconfig b/configs/usb_a9263_dataflash_defconfig index 0c57b7a3dd9..65a6047a2f3 100644 --- a/configs/usb_a9263_dataflash_defconfig +++ b/configs/usb_a9263_dataflash_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x23f00000 CONFIG_TARGET_USB_A9263=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_ENV_OFFSET=0x2000 +CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" diff --git a/configs/usbarmory_defconfig b/configs/usbarmory_defconfig index a0cb3e93bbc..da14fb02873 100644 --- a/configs/usbarmory_defconfig +++ b/configs/usbarmory_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX5=y CONFIG_SYS_TEXT_BASE=0x77800000 -CONFIG_TARGET_USBARMORY=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x60000 +CONFIG_TARGET_USBARMORY=y CONFIG_NR_DRAM_BANKS=1 # CONFIG_CMD_BMODE is not set CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/variscite_dart6ul_defconfig b/configs/variscite_dart6ul_defconfig index 03802950f0a..b674d5af689 100644 --- a/configs/variscite_dart6ul_defconfig +++ b/configs/variscite_dart6ul_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x86000000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x4000 -CONFIG_TARGET_DART_6UL=y CONFIG_ENV_SIZE=0x2000 +CONFIG_TARGET_DART_6UL=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=8 diff --git a/configs/ve8313_defconfig b/configs/ve8313_defconfig index 60d06cfc8f3..ed98cd1936a 100644 --- a/configs/ve8313_defconfig +++ b/configs/ve8313_defconfig @@ -146,7 +146,15 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig index a964e3ccfdc..590750e9b2d 100644 --- a/configs/verdin-imx8mm_defconfig +++ b/configs/verdin-imx8mm_defconfig @@ -7,11 +7,11 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x10000 +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y -CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_DM_GPIO=y CONFIG_TARGET_VERDIN_IMX8MM=y CONFIG_SPL_MMC_SUPPORT=y diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig index b52c761dee1..c9093260f3d 100644 --- a/configs/vexpress_aemv8a_semi_defconfig +++ b/configs/vexpress_aemv8a_semi_defconfig @@ -7,6 +7,7 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_NR_DRAM_BANKS=1 CONFIG_IDENT_STRING=" vexpress_aemv8a" CONFIG_DISTRO_DEFAULTS=y +CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x1c090000 debug user_debug=31 loglevel=9" @@ -14,9 +15,8 @@ CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x1c090000 debug user_debug=31 l # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="VExpress64# " -CONFIG_ANDROID_BOOT_IMAGE=y -CONFIG_CMD_ABOOTIMG=y # CONFIG_CMD_CONSOLE is not set +CONFIG_CMD_ABOOTIMG=y # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set CONFIG_CMD_MEMTEST=y diff --git a/configs/vexpress_ca9x4_defconfig b/configs/vexpress_ca9x4_defconfig index 6bd1f253b6a..8234b5d1bbc 100644 --- a/configs/vexpress_ca9x4_defconfig +++ b/configs/vexpress_ca9x4_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_NR_DRAM_BANKS=2 CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="run distro_bootcmd; run bootflash" +CONFIG_DEFAULT_FDT_FILE="vexpress-v2p-ca9.dtb" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMD_CONSOLE is not set @@ -34,4 +35,3 @@ CONFIG_SMC911X_32_BIT=y CONFIG_BAUDRATE=38400 CONFIG_CONS_INDEX=0 CONFIG_OF_LIBFDT=y -CONFIG_DEFAULT_FDT_FILE="vexpress-v2p-ca9.dtb" diff --git a/configs/vinco_defconfig b/configs/vinco_defconfig index d8daadcd27b..2684324cace 100644 --- a/configs/vinco_defconfig +++ b/configs/vinco_defconfig @@ -4,8 +4,8 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x20f00000 CONFIG_TARGET_VINCO=y CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x10000 +CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_SPI_BOOT=y @@ -35,6 +35,7 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=50000000 +CONFIG_PHY_SMSC=y CONFIG_ETH_DESIGNWARE=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig index bcab7fb83d6..a645667a914 100644 --- a/configs/vining_2000_defconfig +++ b/configs/vining_2000_defconfig @@ -5,10 +5,10 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x4000 -CONFIG_MX6_DDRCAL=y -CONFIG_TARGET_SOFTING_VINING_2000=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x80000 +CONFIG_MX6_DDRCAL=y +CONFIG_TARGET_SOFTING_VINING_2000=y CONFIG_DM_GPIO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -63,6 +63,7 @@ CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_FEC_MXC=y diff --git a/configs/vme8349_defconfig b/configs/vme8349_defconfig index 536c2d1466c..66c3c96f2d7 100644 --- a/configs/vme8349_defconfig +++ b/configs/vme8349_defconfig @@ -117,7 +117,15 @@ CONFIG_ENV_ADDR_REDUND=0xFFFE0000 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_TSEC_ENET=y CONFIG_RTC_RX8025=y CONFIG_BAUDRATE=9600 diff --git a/configs/vocore2_defconfig b/configs/vocore2_defconfig new file mode 100644 index 00000000000..6cacec01838 --- /dev/null +++ b/configs/vocore2_defconfig @@ -0,0 +1,101 @@ +CONFIG_MIPS=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_ENV_SIZE=0x1000 +CONFIG_ENV_OFFSET=0x04e000 +CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_SYS_BOOTCOUNT_ADDR=0xb000006c +CONFIG_SPL_SYS_MALLOC_F_LEN=0x20000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_SPL=y +CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y +CONFIG_ARCH_MTMIPS=y +CONFIG_BOARD_VOCORE2=y +CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y +CONFIG_MIPS_BOOT_FDT=y +CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_SYS_BOOT_GET_CMDLINE=y +CONFIG_SYS_BOOT_GET_KBD=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_LOGLEVEL=8 +CONFIG_VERSION_VARIABLE=y +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_NOR_SUPPORT=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_LICENSE=y +# CONFIG_BOOTM_NETBSD is not set +# CONFIG_BOOTM_PLAN9 is not set +# CONFIG_BOOTM_RTEMS is not set +# CONFIG_BOOTM_VXWORKS is not set +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_CRC32 is not set +CONFIG_CMD_MEMINFO=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_GPT_RENAME=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_PART=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +CONFIG_CMD_WDT=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_BOOTCOUNT=y +CONFIG_CMD_TIME=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nor0=spi0.0" +CONFIG_MTDPARTS_DEFAULT="spi0.0:312k(u-boot),4k(env),4k(factory),2368k(kernel),-(filesystem)" +CONFIG_DEFAULT_DEVICE_TREE="vocore_vocore2" +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM=y +# CONFIG_DM_DEVICE_REMOVE is not set +CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_LED=y +CONFIG_LED_BLINK=y +CONFIG_LED_GPIO=y +CONFIG_MMC=y +CONFIG_DM_MMC=y +# CONFIG_MMC_HW_PARTITIONING is not set +CONFIG_MMC_MTK=y +CONFIG_MTD=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_MTD=y +CONFIG_MT7628_ETH=y +CONFIG_PHY=y +CONFIG_MT76X8_USB_PHY=y +CONFIG_SPECIFY_CONSOLE_INDEX=y +CONFIG_CONS_INDEX=3 +CONFIG_SPI=y +CONFIG_MT7621_SPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_STORAGE=y +CONFIG_WDT=y +CONFIG_WDT_MT7621=y +CONFIG_FS_EXT4=y +CONFIG_FAT_WRITE=y +CONFIG_LZMA=y +CONFIG_LZO=y +CONFIG_SPL_LZMA=y diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index f9a5fe479b1..733b4e82edf 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -4,12 +4,12 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_OFFSET=0xC0000 CONFIG_TARGET_WANDBOARD=y CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y -CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y @@ -17,8 +17,8 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_CMD_HDMIDETECT=y -CONFIG_AHCI=y CONFIG_SPL_TEXT_BASE=0x00908000 +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SPL_FIT_PRINT=y diff --git a/configs/warp_defconfig b/configs/warp_defconfig index 69957c98cf1..e981f5175b2 100644 --- a/configs/warp_defconfig +++ b/configs/warp_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 -CONFIG_TARGET_WARP=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x60000 +CONFIG_TARGET_WARP=y CONFIG_NR_DRAM_BANKS=1 # CONFIG_CMD_BMODE is not set CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/warp/imximage.cfg" diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig index 3de8ebbcc77..547f531cf76 100644 --- a/configs/work_92105_defconfig +++ b/configs/work_92105_defconfig @@ -45,5 +45,6 @@ CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_PHYLIB=y CONFIG_PHY_ADDR_ENABLE=y +CONFIG_PHY_SMSC=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/x530_defconfig b/configs/x530_defconfig index c49211df952..67c8fbf6639 100644 --- a/configs/x530_defconfig +++ b/configs/x530_defconfig @@ -7,16 +7,17 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_X530=y CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x40000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000 CONFIG_DM_GPIO=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 -CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x40000030 +CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SILENT_CONSOLE=y @@ -24,7 +25,6 @@ CONFIG_SILENT_U_BOOT_ONLY=y CONFIG_SILENT_CONSOLE_UPDATE_ON_RELOC=y CONFIG_MISC_INIT_R=y CONFIG_SPL_BOARD_INIT=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000 CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_MEMINFO=y # CONFIG_CMD_FLASH is not set diff --git a/configs/xilinx_versal_mini_defconfig b/configs/xilinx_versal_mini_defconfig index 74939729634..0743592285f 100644 --- a/configs/xilinx_versal_mini_defconfig +++ b/configs/xilinx_versal_mini_defconfig @@ -3,8 +3,8 @@ CONFIG_SYS_CONFIG_NAME="xilinx_versal_mini_qspi" CONFIG_SYS_ICACHE_OFF=y CONFIG_ARCH_VERSAL=y CONFIG_SYS_TEXT_BASE=0xFFFC0000 -CONFIG_SYS_MALLOC_LEN=0x2000 CONFIG_ENV_SIZE=0x80 +CONFIG_SYS_MALLOC_LEN=0x2000 CONFIG_NR_DRAM_BANKS=3 CONFIG_SYS_MEM_RSVD_FOR_MMU=y CONFIG_COUNTER_FREQUENCY=2720000 diff --git a/configs/xilinx_versal_mini_emmc0_defconfig b/configs/xilinx_versal_mini_emmc0_defconfig index a0a737d678e..e25077b0006 100644 --- a/configs/xilinx_versal_mini_emmc0_defconfig +++ b/configs/xilinx_versal_mini_emmc0_defconfig @@ -3,8 +3,8 @@ CONFIG_SYS_CONFIG_NAME="xilinx_versal_mini" CONFIG_SYS_ICACHE_OFF=y CONFIG_ARCH_VERSAL=y CONFIG_SYS_TEXT_BASE=0x10000 -CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_ENV_SIZE=0x80 +CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_NR_DRAM_BANKS=1 CONFIG_COUNTER_FREQUENCY=2720000 # CONFIG_PSCI_RESET is not set diff --git a/configs/xilinx_versal_mini_emmc1_defconfig b/configs/xilinx_versal_mini_emmc1_defconfig index 3a9834fa042..3b477ad1036 100644 --- a/configs/xilinx_versal_mini_emmc1_defconfig +++ b/configs/xilinx_versal_mini_emmc1_defconfig @@ -3,8 +3,8 @@ CONFIG_SYS_CONFIG_NAME="xilinx_versal_mini" CONFIG_SYS_ICACHE_OFF=y CONFIG_ARCH_VERSAL=y CONFIG_SYS_TEXT_BASE=0x10000 -CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_ENV_SIZE=0x80 +CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_NR_DRAM_BANKS=1 CONFIG_COUNTER_FREQUENCY=2720000 # CONFIG_PSCI_RESET is not set diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index 6af4565451a..7441e10d325 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 CONFIG_DM_GPIO=y CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y @@ -19,7 +20,6 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_FPGA_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 # CONFIG_BOOTM_NETBSD is not set CONFIG_CMD_IMLS=y CONFIG_CMD_THOR_DOWNLOAD=y diff --git a/configs/xpedite517x_defconfig b/configs/xpedite517x_defconfig index 2d975fbbaa6..caf95458b4d 100644 --- a/configs/xpedite517x_defconfig +++ b/configs/xpedite517x_defconfig @@ -38,7 +38,15 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/xpedite520x_defconfig b/configs/xpedite520x_defconfig index c4ca18ced78..88033172253 100644 --- a/configs/xpedite520x_defconfig +++ b/configs/xpedite520x_defconfig @@ -38,7 +38,15 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/xpedite537x_defconfig b/configs/xpedite537x_defconfig index a0b87bd422d..88378d6c1f7 100644 --- a/configs/xpedite537x_defconfig +++ b/configs/xpedite537x_defconfig @@ -41,7 +41,15 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/xpedite550x_defconfig b/configs/xpedite550x_defconfig index c685632449f..ff46e252153 100644 --- a/configs/xpedite550x_defconfig +++ b/configs/xpedite550x_defconfig @@ -39,7 +39,15 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_DAVICOM=y +CONFIG_PHY_LXT=y CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_SMSC=y +CONFIG_PHY_VITESSE=y CONFIG_MII=y CONFIG_TSEC_ENET=y CONFIG_SYS_NS16550=y diff --git a/configs/xpress_defconfig b/configs/xpress_defconfig index 124abf19b0c..3c18dea65b9 100644 --- a/configs/xpress_defconfig +++ b/configs/xpress_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 -CONFIG_TARGET_XPRESS=y CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x80000 +CONFIG_TARGET_XPRESS=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/ccv/xpress/imximage.cfg" CONFIG_BOOTDELAY=3 @@ -32,6 +32,7 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_SMSC=y CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/xpress_spl_defconfig b/configs/xpress_spl_defconfig index 3df0021df28..aae7f6d29b3 100644 --- a/configs/xpress_spl_defconfig +++ b/configs/xpress_spl_defconfig @@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_XPRESS=y CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x80000 +CONFIG_TARGET_XPRESS=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 @@ -43,6 +43,7 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_SMSC=y CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/zc5202_defconfig b/configs/zc5202_defconfig index 4c6a765c913..ce40145ea4e 100644 --- a/configs/zc5202_defconfig +++ b/configs/zc5202_defconfig @@ -4,9 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_ZC5202=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 +CONFIG_TARGET_ZC5202=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 @@ -25,7 +26,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y @@ -46,6 +46,7 @@ CONFIG_SF_DEFAULT_BUS=3 CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_SPI_FLASH_STMICRO=y +CONFIG_MV88E6352_SWITCH=y CONFIG_MII=y CONFIG_PCI=y CONFIG_SPI=y diff --git a/configs/zc5601_defconfig b/configs/zc5601_defconfig index faa4c5eb2b3..c1b7fb131c7 100644 --- a/configs/zc5601_defconfig +++ b/configs/zc5601_defconfig @@ -4,9 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_ZC5601=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 +CONFIG_TARGET_ZC5601=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 @@ -25,7 +26,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000 CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y diff --git a/configs/zmx25_defconfig b/configs/zmx25_defconfig index adb80e5b251..24eb20bc224 100644 --- a/configs/zmx25_defconfig +++ b/configs/zmx25_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_ARCH_MX25=y CONFIG_SYS_TEXT_BASE=0xA0000000 -CONFIG_TARGET_ZMX25=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 +CONFIG_TARGET_ZMX25=y CONFIG_NR_DRAM_BANKS=1 CONFIG_BOOTDELAY=5 CONFIG_USE_PREBOOT=y diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig index 80a427d905d..6a01da2e4e1 100644 --- a/configs/zynq_cse_nand_defconfig +++ b/configs/zynq_cse_nand_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_ICACHE_OFF=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x100000 -CONFIG_SYS_MALLOC_LEN=0x8000 CONFIG_ENV_SIZE=0x190 +CONFIG_SYS_MALLOC_LEN=0x8000 CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y CONFIG_SYS_CUSTOM_LDSCRIPT=y diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig index 3b4e2f93fa3..7b18ba3cd53 100644 --- a/configs/zynq_cse_nor_defconfig +++ b/configs/zynq_cse_nor_defconfig @@ -4,8 +4,8 @@ CONFIG_SYS_ICACHE_OFF=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0xFFFC0000 -CONFIG_SYS_MALLOC_LEN=0x1000 CONFIG_ENV_SIZE=0x190 +CONFIG_SYS_MALLOC_LEN=0x1000 CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y CONFIG_SYS_CUSTOM_LDSCRIPT=y diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 073e2ce49c1..15d8473b27c 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -4,8 +4,9 @@ CONFIG_SYS_ICACHE_OFF=y CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0xFFFC0000 -CONFIG_SYS_MALLOC_LEN=0x1000 CONFIG_ENV_SIZE=0x190 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 +CONFIG_SYS_MALLOC_LEN=0x1000 CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0x0 @@ -22,7 +23,6 @@ CONFIG_USE_PREBOOT=y # CONFIG_ARCH_EARLY_INIT_R is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set diff --git a/doc/conf.py b/doc/conf.py index 8bb27ad9e25..93250a6aeed 100644 --- a/doc/conf.py +++ b/doc/conf.py @@ -31,6 +31,8 @@ from load_config import loadConfig # If your documentation needs a minimal Sphinx version, state it here. needs_sphinx = '1.3' +latex_engine = 'xelatex' + # Add any Sphinx extension module names here, as strings. They can be # extensions coming with Sphinx (named 'sphinx.ext.*') or your custom # ones. diff --git a/doc/sphinx/parse-headers.pl b/doc/sphinx/parse-headers.pl index d4f38262eb5..c518050ffc3 100755 --- a/doc/sphinx/parse-headers.pl +++ b/doc/sphinx/parse-headers.pl @@ -344,7 +344,7 @@ enums and defines and create cross-references to a Sphinx book. B<parse_headers.pl> [<options>] <C_FILE> <OUT_FILE> [<EXCEPTIONS_FILE>] -Where <options> can be: --debug, --help or --man. +Where <options> can be: --debug, --help or --usage. =head1 OPTIONS @@ -382,7 +382,7 @@ ioctl. The EXCEPTIONS_FILE contain two rules to allow ignoring a symbol or to replace the default references by a custom one. -Please read doc/doc-guide/parse-headers.rst at the Kernel's +Please read Documentation/doc-guide/parse-headers.rst at the Kernel's tree for more details. =head1 BUGS diff --git a/drivers/clk/clk-hsdk-cgu.c b/drivers/clk/clk-hsdk-cgu.c index 6eaafdeaf99..3035c5fb38e 100644 --- a/drivers/clk/clk-hsdk-cgu.c +++ b/drivers/clk/clk-hsdk-cgu.c @@ -67,6 +67,7 @@ #define CGU_TUN_IDIV_TUN 0x380 #define CGU_TUN_IDIV_ROM 0x390 #define CGU_TUN_IDIV_PWM 0x3A0 +#define CGU_TUN_IDIV_TIMER 0x3B0 #define CGU_HDMI_IDIV_APB 0x480 #define CGU_SYS_IDIV_APB 0x180 #define CGU_SYS_IDIV_AXI 0x190 @@ -123,12 +124,12 @@ #define MIN_PLL_RATE 100000000 /* 100 MHz */ #define PARENT_RATE_33 33333333 /* fixed clock - xtal */ #define PARENT_RATE_27 27000000 /* fixed clock - xtal */ -#define CGU_MAX_CLOCKS 26 +#define CGU_MAX_CLOCKS 27 #define CGU_SYS_CLOCKS 16 #define MAX_AXI_CLOCKS 4 -#define CGU_TUN_CLOCKS 3 +#define CGU_TUN_CLOCKS 4 #define MAX_TUN_CLOCKS 6 struct hsdk_tun_idiv_cfg { @@ -147,7 +148,8 @@ static const struct hsdk_tun_clk_cfg tun_clk_cfg = { { 600000000, 600000000, 600000000, 600000000, 750000000, 600000000 }, { { CGU_TUN_IDIV_TUN, { 24, 12, 8, 6, 6, 4 } }, { CGU_TUN_IDIV_ROM, { 4, 4, 4, 4, 5, 4 } }, - { CGU_TUN_IDIV_PWM, { 8, 8, 8, 8, 10, 8 } } + { CGU_TUN_IDIV_PWM, { 8, 8, 8, 8, 10, 8 } }, + { CGU_TUN_IDIV_TIMER, { 12, 12, 12, 12, 15, 12 } } } }; @@ -316,6 +318,7 @@ static const struct hsdk_cgu_clock_map clock_map[] = { { CGU_TUN_PLL, 0, CGU_TUN_IDIV_TUN, &sdt_pll_dat, idiv_get, tun_clk_set, idiv_off }, { CGU_TUN_PLL, 0, CGU_TUN_IDIV_ROM, &sdt_pll_dat, idiv_get, idiv_set, idiv_off }, { CGU_TUN_PLL, 0, CGU_TUN_IDIV_PWM, &sdt_pll_dat, idiv_get, idiv_set, idiv_off }, + { CGU_TUN_PLL, 0, CGU_TUN_IDIV_TIMER, &sdt_pll_dat, idiv_get, idiv_set, idiv_off }, { CGU_HDMI_PLL, 0, 0, &hdmi_pll_dat, pll_get, pll_set, NULL }, { CGU_HDMI_PLL, 0, CGU_HDMI_IDIV_APB, &hdmi_pll_dat, idiv_get, idiv_set, idiv_off } }; diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c index c1976aa1efb..6089f8474eb 100644 --- a/drivers/clk/meson/g12a.c +++ b/drivers/clk/meson/g12a.c @@ -112,6 +112,7 @@ static struct meson_gate gates[NUM_CLKS] = { MESON_GATE(CLKID_I2C, HHI_GCLK_MPEG0, 9), MESON_GATE(CLKID_UART0, HHI_GCLK_MPEG0, 13), MESON_GATE(CLKID_SPICC1, HHI_GCLK_MPEG0, 14), + MESON_GATE(CLKID_SD_EMMC_A, HHI_GCLK_MPEG0, 4), MESON_GATE(CLKID_SD_EMMC_B, HHI_GCLK_MPEG0, 25), MESON_GATE(CLKID_SD_EMMC_C, HHI_GCLK_MPEG0, 26), MESON_GATE(CLKID_ETH, HHI_GCLK_MPEG1, 3), @@ -127,6 +128,7 @@ static struct meson_gate gates[NUM_CLKS] = { MESON_GATE(CLKID_FCLK_DIV4, HHI_FIX_PLL_CNTL1, 21), MESON_GATE(CLKID_FCLK_DIV5, HHI_FIX_PLL_CNTL1, 22), MESON_GATE(CLKID_FCLK_DIV7, HHI_FIX_PLL_CNTL1, 23), + MESON_GATE(CLKID_SD_EMMC_A_CLK0, HHI_SD_EMMC_CLK_CNTL, 7), MESON_GATE(CLKID_SD_EMMC_B_CLK0, HHI_SD_EMMC_CLK_CNTL, 23), MESON_GATE(CLKID_SD_EMMC_C_CLK0, HHI_NAND_CLK_CNTL, 7), MESON_GATE(CLKID_VPU_0, HHI_VPU_CLK_CNTL, 8), diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 5232328e1e4..7bdebf58699 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -2714,6 +2714,14 @@ int brcmnand_probe(struct udevice *dev, struct brcmnand_soc *soc) } #endif /* __UBOOT__ */ + /* No chip-selects could initialize properly */ + if (list_empty(&ctrl->host_list)) { + ret = -ENODEV; + goto err; + } + + return 0; + err: #ifndef __UBOOT__ clk_disable_unprepare(ctrl->clk); @@ -2722,7 +2730,6 @@ err: clk_disable(ctrl->clk); #endif /* __UBOOT__ */ return ret; - } EXPORT_SYMBOL_GPL(brcmnand_probe); diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 4d1013c9846..bc518f218da 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -640,4 +640,11 @@ config MVMDIO This driver is used by the MVPP2 and MVNETA drivers. +config FSL_LS_MDIO + bool "NXP Layerscape MDIO interface support" + depends on DM_MDIO + help + This driver supports the MDIO bus found on the Fman 10G Ethernet MACs and + on the mEMAC (which supports both Clauses 22 and 45). + endif # NETDEVICES diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 6e0a68834d9..6d9b8772b1a 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -83,3 +83,4 @@ obj-y += mscc_eswitch/ obj-$(CONFIG_HIGMACV300_ETH) += higmacv300.o obj-$(CONFIG_MDIO_SANDBOX) += mdio_sandbox.o obj-$(CONFIG_FSL_ENETC) += fsl_enetc.o fsl_enetc_mdio.o +obj-$(CONFIG_FSL_LS_MDIO) += fsl_ls_mdio.o diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c index 88019c9a88c..5f1a0233525 100644 --- a/drivers/net/fm/eth.c +++ b/drivers/net/fm/eth.c @@ -1,10 +1,17 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2009-2012 Freescale Semiconductor, Inc. + * Copyright 2020 NXP * Dave Liu <daveliu@freescale.com> */ #include <common.h> #include <asm/io.h> +#ifdef CONFIG_DM_ETH +#include <dm.h> +#include <dm/ofnode.h> +#include <linux/compat.h> +#include <phy_interface.h> +#endif #include <malloc.h> #include <net.h> #include <hwconfig.h> @@ -18,8 +25,10 @@ #include "fm.h" +#ifndef CONFIG_DM_ETH static struct eth_device *devlist[NUM_FM_PORTS]; static int num_controllers; +#endif #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) && !defined(BITBANGMII) @@ -37,10 +46,18 @@ static void dtsec_configure_serdes(struct fm_eth *priv) #ifdef CONFIG_SYS_FMAN_V3 u32 value; struct mii_dev bus; - bus.priv = priv->mac->phyregs; bool sgmii_2500 = (priv->enet_if == PHY_INTERFACE_MODE_SGMII_2500) ? true : false; - int i = 0; + int i = 0, j; + +#ifndef CONFIG_DM_ETH + bus.priv = priv->mac->phyregs; +#else + bus.priv = priv->pcs_mdio; +#endif + bus.read = memac_mdio_read; + bus.write = memac_mdio_write; + bus.reset = memac_mdio_reset; qsgmii_loop: /* SGMII IF mode + AN enable only for 1G SGMII, not for 2.5G */ @@ -51,6 +68,10 @@ qsgmii_loop: else value = PHY_SGMII_IF_MODE_SGMII | PHY_SGMII_IF_MODE_AN; + for (j = 0; j <= 3; j++) + debug("dump PCS reg %#x: %#x\n", j, + memac_mdio_read(&bus, i, MDIO_DEVAD_NONE, j)); + memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0x14, value); /* Dev ability according to SGMII specification */ @@ -98,9 +119,8 @@ qsgmii_loop: #endif } -static void dtsec_init_phy(struct eth_device *dev) +static void dtsec_init_phy(struct fm_eth *fm_eth) { - struct fm_eth *fm_eth = dev->priv; #ifndef CONFIG_SYS_FMAN_V3 struct dtsec *regs = (struct dtsec *)CONFIG_SYS_FSL_FM1_DTSEC1_ADDR; @@ -114,10 +134,10 @@ static void dtsec_init_phy(struct eth_device *dev) dtsec_configure_serdes(fm_eth); } +#ifndef CONFIG_DM_ETH #ifdef CONFIG_PHYLIB -static int tgec_is_fibre(struct eth_device *dev) +static int tgec_is_fibre(struct fm_eth *fm) { - struct fm_eth *fm = dev->priv; char phyopt[20]; sprintf(phyopt, "fsl_fm%d_xaui_phy", fm->fm_index + 1); @@ -125,6 +145,7 @@ static int tgec_is_fibre(struct eth_device *dev) return hwconfig_arg_cmp(phyopt, "xfi"); } #endif +#endif /* CONFIG_DM_ETH */ #endif static u16 muram_readw(u16 *addr) @@ -168,6 +189,8 @@ static void bmi_rx_port_disable(struct fm_bmi_rx_port *rx_port) /* wait until the rx port is not busy */ while ((in_be32(&rx_port->fmbm_rst) & FMBM_RST_BSY) && timeout--) ; + if (!timeout) + printf("%s - timeout\n", __func__); } static void bmi_rx_port_init(struct fm_bmi_rx_port *rx_port) @@ -196,6 +219,8 @@ static void bmi_tx_port_disable(struct fm_bmi_tx_port *tx_port) /* wait until the tx port is not busy */ while ((in_be32(&tx_port->fmbm_tst) & FMBM_TST_BSY) && timeout--) ; + if (!timeout) + printf("%s - timeout\n", __func__); } static void bmi_tx_port_init(struct fm_bmi_tx_port *tx_port) @@ -435,23 +460,39 @@ static void fmc_tx_port_graceful_stop_disable(struct fm_eth *fm_eth) sync(); } +#ifndef CONFIG_DM_ETH static int fm_eth_open(struct eth_device *dev, bd_t *bd) +#else +static int fm_eth_open(struct udevice *dev) +#endif { - struct fm_eth *fm_eth; +#ifndef CONFIG_DM_ETH + struct fm_eth *fm_eth = dev->priv; +#else + struct eth_pdata *pdata = dev_get_platdata(dev); + struct fm_eth *fm_eth = dev_get_priv(dev); +#endif + unsigned char *enetaddr; struct fsl_enet_mac *mac; #ifdef CONFIG_PHYLIB int ret; #endif - fm_eth = (struct fm_eth *)dev->priv; mac = fm_eth->mac; +#ifndef CONFIG_DM_ETH + enetaddr = &dev->enetaddr[0]; +#else + enetaddr = pdata->enetaddr; +#endif + /* setup the MAC address */ - if (dev->enetaddr[0] & 0x01) { - printf("%s: MacAddress is multcast address\n", __func__); - return 1; + if (enetaddr[0] & 0x01) { + printf("%s: MacAddress is multicast address\n", __func__); + enetaddr[0] = 0; + enetaddr[5] = fm_eth->num; } - mac->set_mac_addr(mac, dev->enetaddr); + mac->set_mac_addr(mac, enetaddr); /* enable bmi Rx port */ setbits_be32(&fm_eth->rx_port->fmbm_rcfg, FMBM_RCFG_EN); @@ -466,8 +507,12 @@ static int fm_eth_open(struct eth_device *dev, bd_t *bd) if (fm_eth->phydev) { ret = phy_startup(fm_eth->phydev); if (ret) { +#ifndef CONFIG_DM_ETH printf("%s: Could not initialize\n", fm_eth->phydev->dev->name); +#else + printf("%s: Could not initialize\n", dev->name); +#endif return ret; } } else { @@ -481,6 +526,8 @@ static int fm_eth_open(struct eth_device *dev, bd_t *bd) /* set the MAC-PHY mode */ mac->set_if_mode(mac, fm_eth->enet_if, fm_eth->phydev->speed); + debug("MAC IF mode %d, speed %d, link %d\n", fm_eth->enet_if, + fm_eth->phydev->speed, fm_eth->phydev->link); if (!fm_eth->phydev->link) printf("%s: No link.\n", fm_eth->phydev->dev->name); @@ -488,7 +535,11 @@ static int fm_eth_open(struct eth_device *dev, bd_t *bd) return fm_eth->phydev->link ? 0 : -1; } +#ifndef CONFIG_DM_ETH static void fm_eth_halt(struct eth_device *dev) +#else +static void fm_eth_halt(struct udevice *dev) +#endif { struct fm_eth *fm_eth; struct fsl_enet_mac *mac; @@ -511,7 +562,11 @@ static void fm_eth_halt(struct eth_device *dev) #endif } +#ifndef CONFIG_DM_ETH static int fm_eth_send(struct eth_device *dev, void *buf, int len) +#else +static int fm_eth_send(struct udevice *dev, void *buf, int len) +#endif { struct fm_eth *fm_eth; struct fm_port_global_pram *pram; @@ -569,20 +624,50 @@ static int fm_eth_send(struct eth_device *dev, void *buf, int len) return 1; } -static int fm_eth_recv(struct eth_device *dev) +static struct fm_port_bd *fm_eth_free_one(struct fm_eth *fm_eth, + struct fm_port_bd *rxbd) { - struct fm_eth *fm_eth; struct fm_port_global_pram *pram; - struct fm_port_bd *rxbd, *rxbd_base; - u16 status, len; - u32 buf_lo, buf_hi; - u8 *data; + struct fm_port_bd *rxbd_base; u16 offset_out; - int ret = 1; - fm_eth = (struct fm_eth *)dev->priv; pram = fm_eth->rx_pram; - rxbd = fm_eth->cur_rxbd; + + /* clear the RxBDs */ + muram_writew(&rxbd->status, RxBD_EMPTY); + muram_writew(&rxbd->len, 0); + sync(); + + /* advance RxBD */ + rxbd++; + rxbd_base = (struct fm_port_bd *)fm_eth->rx_bd_ring; + if (rxbd >= (rxbd_base + RX_BD_RING_SIZE)) + rxbd = rxbd_base; + + /* update RxQD */ + offset_out = muram_readw(&pram->rxqd.offset_out); + offset_out += sizeof(struct fm_port_bd); + if (offset_out >= muram_readw(&pram->rxqd.bd_ring_size)) + offset_out = 0; + muram_writew(&pram->rxqd.offset_out, offset_out); + sync(); + + return rxbd; +} + +#ifndef CONFIG_DM_ETH +static int fm_eth_recv(struct eth_device *dev) +#else +static int fm_eth_recv(struct udevice *dev, int flags, uchar **packetp) +#endif +{ + struct fm_eth *fm_eth = (struct fm_eth *)dev->priv; + struct fm_port_bd *rxbd = fm_eth->cur_rxbd; + u32 buf_lo, buf_hi; + u16 status, len; + int ret = -1; + u8 *data; + status = muram_readw(&rxbd->status); while (!(status & RxBD_EMPTY)) { @@ -591,38 +676,40 @@ static int fm_eth_recv(struct eth_device *dev) buf_lo = in_be32(&rxbd->buf_ptr_lo); data = (u8 *)((ulong)(buf_hi << 16) << 16 | buf_lo); len = muram_readw(&rxbd->len); +#ifndef CONFIG_DM_ETH net_process_received_packet(data, len); +#else + *packetp = data; + return len; +#endif } else { printf("%s: Rx error\n", dev->name); ret = 0; } - /* clear the RxBDs */ - muram_writew(&rxbd->status, RxBD_EMPTY); - muram_writew(&rxbd->len, 0); - sync(); + /* free current bd, advance to next one */ + rxbd = fm_eth_free_one(fm_eth, rxbd); - /* advance RxBD */ - rxbd++; - rxbd_base = (struct fm_port_bd *)fm_eth->rx_bd_ring; - if (rxbd >= (rxbd_base + RX_BD_RING_SIZE)) - rxbd = rxbd_base; /* read next status */ status = muram_readw(&rxbd->status); - - /* update RxQD */ - offset_out = muram_readw(&pram->rxqd.offset_out); - offset_out += sizeof(struct fm_port_bd); - if (offset_out >= muram_readw(&pram->rxqd.bd_ring_size)) - offset_out = 0; - muram_writew(&pram->rxqd.offset_out, offset_out); - sync(); } fm_eth->cur_rxbd = (void *)rxbd; return ret; } +#ifdef CONFIG_DM_ETH +static int fm_eth_free_pkt(struct udevice *dev, uchar *packet, int length) +{ + struct fm_eth *fm_eth = (struct fm_eth *)dev->priv; + + fm_eth->cur_rxbd = fm_eth_free_one(fm_eth, fm_eth->cur_rxbd); + + return 0; +} +#endif /* CONFIG_DM_ETH */ + +#ifndef CONFIG_DM_ETH static int fm_eth_init_mac(struct fm_eth *fm_eth, struct ccsr_fman *reg) { struct fsl_enet_mac *mac; @@ -678,22 +765,75 @@ static int fm_eth_init_mac(struct fm_eth *fm_eth, struct ccsr_fman *reg) return 0; } +#else /* CONFIG_DM_ETH */ +static int fm_eth_init_mac(struct fm_eth *fm_eth, void *reg) +{ +#ifndef CONFIG_SYS_FMAN_V3 + void *mdio; +#endif + + fm_eth->mac = kzalloc(sizeof(*fm_eth->mac), GFP_KERNEL); + if (!fm_eth->mac) + return -ENOMEM; -static int init_phy(struct eth_device *dev) +#ifndef CONFIG_SYS_FMAN_V3 + mdio = fman_mdio(fm_eth->dev->parent, fm_eth->mac_type, fm_eth->num); + debug("MDIO %d @ %p\n", fm_eth->num, mdio); +#endif + + switch (fm_eth->mac_type) { +#ifdef CONFIG_SYS_FMAN_V3 + case FM_MEMAC: + init_memac(fm_eth->mac, reg, NULL, MAX_RXBUF_LEN); + break; +#else + case FM_DTSEC: + init_dtsec(fm_eth->mac, reg, mdio, MAX_RXBUF_LEN); + break; + case FM_TGEC: + init_tgec(fm_eth->mac, reg, mdio, MAX_RXBUF_LEN); + break; +#endif + } + + return 0; +} +#endif /* CONFIG_DM_ETH */ + +static int init_phy(struct fm_eth *fm_eth) { - struct fm_eth *fm_eth = dev->priv; #ifdef CONFIG_PHYLIB + u32 supported = PHY_GBIT_FEATURES; +#ifndef CONFIG_DM_ETH struct phy_device *phydev = NULL; - u32 supported; +#endif + + if (fm_eth->type == FM_ETH_10G_E) + supported = PHY_10G_FEATURES; + if (fm_eth->enet_if == PHY_INTERFACE_MODE_SGMII_2500) + supported |= SUPPORTED_2500baseX_Full; #endif if (fm_eth->type == FM_ETH_1G_E) - dtsec_init_phy(dev); + dtsec_init_phy(fm_eth); +#ifdef CONFIG_DM_ETH +#ifdef CONFIG_PHYLIB +#ifdef CONFIG_DM_MDIO + fm_eth->phydev = dm_eth_phy_connect(fm_eth->dev); + if (!fm_eth->phydev) + return -ENODEV; +#endif + fm_eth->phydev->advertising &= supported; + fm_eth->phydev->supported &= supported; + + phy_config(fm_eth->phydev); +#endif +#else /* CONFIG_DM_ETH */ #ifdef CONFIG_PHYLIB if (fm_eth->bus) { - phydev = phy_connect(fm_eth->bus, fm_eth->phyaddr, dev, - fm_eth->enet_if); + phydev = phy_connect(fm_eth->bus, fm_eth->phyaddr, fm_eth->dev, + fm_eth->enet_if); if (!phydev) { printf("Failed to connect\n"); return -1; @@ -711,7 +851,7 @@ static int init_phy(struct eth_device *dev) } else { supported = SUPPORTED_10000baseT_Full; - if (tgec_is_fibre(dev)) + if (tgec_is_fibre(fm_eth)) phydev->port = PORT_FIBRE; } @@ -722,10 +862,11 @@ static int init_phy(struct eth_device *dev) phy_config(phydev); #endif - +#endif /* CONFIG_DM_ETH */ return 0; } +#ifndef CONFIG_DM_ETH int fm_eth_initialize(struct ccsr_fman *reg, struct fm_eth_info *info) { struct eth_device *dev; @@ -784,7 +925,7 @@ int fm_eth_initialize(struct ccsr_fman *reg, struct fm_eth_info *info) if (ret) return ret; - init_phy(dev); + init_phy(fm_eth); /* clear the ethernet address */ for (i = 0; i < 6; i++) @@ -793,3 +934,201 @@ int fm_eth_initialize(struct ccsr_fman *reg, struct fm_eth_info *info) return 0; } +#else /* CONFIG_DM_ETH */ +#ifdef CONFIG_PHYLIB +phy_interface_t fman_read_sys_if(struct udevice *dev) +{ + const char *if_str; + + if_str = ofnode_read_string(dev->node, "phy-connection-type"); + debug("MAC system interface mode %s\n", if_str); + + return phy_get_interface_by_name(if_str); +} +#endif + +static int fm_eth_bind(struct udevice *dev) +{ + char mac_name[11]; + u32 fm, num; + + if (ofnode_read_u32(ofnode_get_parent(dev->node), "cell-index", &fm)) { + printf("FMan node property cell-index missing\n"); + return -EINVAL; + } + + if (dev && dev_read_u32(dev, "cell-index", &num)) { + printf("FMan MAC node property cell-index missing\n"); + return -EINVAL; + } + + sprintf(mac_name, "fm%d-mac%d", fm + 1, num + 1); + device_set_name(dev, mac_name); + + debug("%s - binding %s\n", __func__, mac_name); + + return 0; +} + +static struct udevice *fm_get_internal_mdio(struct udevice *dev) +{ + struct ofnode_phandle_args phandle = {.node = ofnode_null()}; + struct udevice *mdiodev; + + if (dev_read_phandle_with_args(dev, "pcsphy-handle", NULL, + 0, 0, &phandle) || + !ofnode_valid(phandle.node)) { + if (dev_read_phandle_with_args(dev, "tbi-handle", NULL, + 0, 0, &phandle) || + !ofnode_valid(phandle.node)) { + printf("Issue reading pcsphy-handle/tbi-handle for MAC %s\n", + dev->name); + return NULL; + } + } + + if (uclass_get_device_by_ofnode(UCLASS_MDIO, + ofnode_get_parent(phandle.node), + &mdiodev)) { + printf("can't find MDIO bus for node %s\n", + ofnode_get_name(ofnode_get_parent(phandle.node))); + return NULL; + } + debug("Found internal MDIO bus %p\n", mdiodev); + + return mdiodev; +} + +static int fm_eth_probe(struct udevice *dev) +{ + struct fm_eth *fm_eth = (struct fm_eth *)dev->priv; + struct ofnode_phandle_args args; + void *reg; + int ret, index; + + debug("%s enter for dev %p fm_eth %p - %s\n", __func__, dev, fm_eth, + (dev) ? dev->name : "-"); + + if (fm_eth->dev) { + printf("%s already probed, exit\n", (dev) ? dev->name : "-"); + return 0; + } + + fm_eth->dev = dev; + fm_eth->fm_index = fman_id(dev->parent); + reg = (void *)(uintptr_t)dev_read_addr(dev); + fm_eth->mac_type = dev_get_driver_data(dev); +#ifdef CONFIG_PHYLIB + fm_eth->enet_if = fman_read_sys_if(dev); +#else + fm_eth->enet_if = PHY_INTERFACE_MODE_SGMII; + printf("%s: warning - unable to determine interface type\n", __func__); +#endif + switch (fm_eth->mac_type) { +#ifndef CONFIG_SYS_FMAN_V3 + case FM_TGEC: + fm_eth->type = FM_ETH_10G_E; + break; + case FM_DTSEC: +#else + case FM_MEMAC: + /* default to 1G, 10G is indicated by port property in dts */ +#endif + fm_eth->type = FM_ETH_1G_E; + break; + } + + if (dev_read_u32(dev, "cell-index", &fm_eth->num)) { + printf("FMan MAC node property cell-index missing\n"); + return -EINVAL; + } + + if (dev_read_phandle_with_args(dev, "fsl,fman-ports", NULL, + 0, 0, &args)) + goto ports_ref_failure; + index = ofnode_read_u32_default(args.node, "cell-index", 0); + if (index <= 0) + goto ports_ref_failure; + fm_eth->rx_port = fman_port(dev->parent, index); + + if (ofnode_read_bool(args.node, "fsl,fman-10g-port")) + fm_eth->type = FM_ETH_10G_E; + + if (dev_read_phandle_with_args(dev, "fsl,fman-ports", NULL, + 0, 1, &args)) + goto ports_ref_failure; + index = ofnode_read_u32_default(args.node, "cell-index", 0); + if (index <= 0) + goto ports_ref_failure; + fm_eth->tx_port = fman_port(dev->parent, index); + + /* set the ethernet max receive length */ + fm_eth->max_rx_len = MAX_RXBUF_LEN; + + switch (fm_eth->enet_if) { + case PHY_INTERFACE_MODE_QSGMII: + /* all PCS blocks are accessed on one controller */ + if (fm_eth->num != 0) + break; + case PHY_INTERFACE_MODE_SGMII: + case PHY_INTERFACE_MODE_SGMII_2500: + fm_eth->pcs_mdio = fm_get_internal_mdio(dev); + break; + default: + break; + } + + /* init global mac structure */ + ret = fm_eth_init_mac(fm_eth, reg); + if (ret) + return ret; + + /* startup the FM im */ + ret = fm_eth_startup(fm_eth); + + if (!ret) + ret = init_phy(fm_eth); + + return ret; + +ports_ref_failure: + printf("Issue reading fsl,fman-ports for MAC %s\n", dev->name); + return -ENOENT; +} + +static int fm_eth_remove(struct udevice *dev) +{ + return 0; +} + +static const struct eth_ops fm_eth_ops = { + .start = fm_eth_open, + .send = fm_eth_send, + .recv = fm_eth_recv, + .free_pkt = fm_eth_free_pkt, + .stop = fm_eth_halt, +}; + +static const struct udevice_id fm_eth_ids[] = { +#ifdef CONFIG_SYS_FMAN_V3 + { .compatible = "fsl,fman-memac", .data = FM_MEMAC }, +#else + { .compatible = "fsl,fman-dtsec", .data = FM_DTSEC }, + { .compatible = "fsl,fman-xgec", .data = FM_TGEC }, +#endif + {} +}; + +U_BOOT_DRIVER(eth_fman) = { + .name = "eth_fman", + .id = UCLASS_ETH, + .of_match = fm_eth_ids, + .bind = fm_eth_bind, + .probe = fm_eth_probe, + .remove = fm_eth_remove, + .ops = &fm_eth_ops, + .priv_auto_alloc_size = sizeof(struct fm_eth), + .platdata_auto_alloc_size = sizeof(struct eth_pdata), + .flags = DM_FLAG_ALLOC_PRIV_DMA, +}; +#endif /* CONFIG_DM_ETH */ diff --git a/drivers/net/fm/fm.c b/drivers/net/fm/fm.c index 7a081b9d030..8ab18163954 100644 --- a/drivers/net/fm/fm.c +++ b/drivers/net/fm/fm.c @@ -9,6 +9,9 @@ #include <asm/io.h> #include <linux/errno.h> #include <u-boot/crc.h> +#ifdef CONFIG_DM_ETH +#include <dm.h> +#endif #include "fm.h" #include <fsl_qe.h> /* For struct qe_firmware */ @@ -529,3 +532,80 @@ int fm_init_common(int index, struct ccsr_fman *reg) return fm_init_bmi(index, ®->fm_bmi_common); } #endif + +#ifdef CONFIG_DM_ETH +struct fman_priv { + struct ccsr_fman *reg; + unsigned int fman_id; +}; + +static const struct udevice_id fman_ids[] = { + { .compatible = "fsl,fman" }, + {} +}; + +static int fman_probe(struct udevice *dev) +{ + struct fman_priv *priv = dev_get_priv(dev); + + priv->reg = (struct ccsr_fman *)(uintptr_t)dev_read_addr(dev); + + if (dev_read_u32(dev, "cell-index", &priv->fman_id)) { + printf("FMan node property cell-index missing\n"); + return -EINVAL; + } + + return fm_init_common(priv->fman_id, priv->reg); +} + +static int fman_remove(struct udevice *dev) +{ + return 0; +} + +int fman_id(struct udevice *dev) +{ + struct fman_priv *priv = dev_get_priv(dev); + + return priv->fman_id; +} + +void *fman_port(struct udevice *dev, int num) +{ + struct fman_priv *priv = dev_get_priv(dev); + + return &priv->reg->port[num - 1].fm_bmi; +} + +void *fman_mdio(struct udevice *dev, enum fm_mac_type type, int num) +{ + struct fman_priv *priv = dev_get_priv(dev); + void *res = NULL; + + switch (type) { +#ifdef CONFIG_SYS_FMAN_V3 + case FM_MEMAC: + res = &priv->reg->memac[num].fm_memac_mdio; + break; +#else + case FM_DTSEC: + res = &priv->reg->mac_1g[num].fm_mdio.miimcfg; + break; + case FM_TGEC: + res = &priv->reg->mac_10g[num].fm_10gec_mdio; + break; +#endif + } + return res; +} + +U_BOOT_DRIVER(fman) = { + .name = "fman", + .id = UCLASS_SIMPLE_BUS, + .of_match = fman_ids, + .probe = fman_probe, + .remove = fman_remove, + .priv_auto_alloc_size = sizeof(struct fman_priv), + .flags = DM_FLAG_ALLOC_PRIV_DMA, +}; +#endif /* CONFIG_DM_ETH */ diff --git a/drivers/net/fm/fm.h b/drivers/net/fm/fm.h index e5deaf52c5a..2379b3a11ca 100644 --- a/drivers/net/fm/fm.h +++ b/drivers/net/fm/fm.h @@ -57,6 +57,18 @@ struct fm_port_bd { #define TxBD_READY 0x8000 #define TxBD_LAST BD_LAST +#ifdef CONFIG_DM_ETH +enum fm_mac_type { +#ifdef CONFIG_SYS_FMAN_V3 + FM_MEMAC, +#else + FM_DTSEC, + FM_TGEC, +#endif +}; +#endif + +/* Fman ethernet private struct */ /* Rx/Tx queue descriptor */ struct fm_port_qd { u16 gen; @@ -101,6 +113,11 @@ int fm_eth_initialize(struct ccsr_fman *reg, struct fm_eth_info *info); phy_interface_t fman_port_enet_if(enum fm_port port); void fman_disable_port(enum fm_port port); void fman_enable_port(enum fm_port port); +int fman_id(struct udevice *dev); +void *fman_port(struct udevice *dev, int num); +#ifdef CONFIG_DM_ETH +void *fman_mdio(struct udevice *dev, enum fm_mac_type type, int num); +#endif struct fsl_enet_mac { void *base; /* MAC controller registers base address */ @@ -126,7 +143,13 @@ struct fm_eth { struct mii_dev *bus; struct phy_device *phydev; int phyaddr; +#ifndef CONFIG_DM_ETH struct eth_device *dev; +#else + enum fm_mac_type mac_type; + struct udevice *dev; + struct udevice *pcs_mdio; +#endif int max_rx_len; struct fm_port_global_pram *rx_pram; /* Rx parameter table */ struct fm_port_global_pram *tx_pram; /* Tx parameter table */ diff --git a/drivers/net/fm/init.c b/drivers/net/fm/init.c index f896e80b6d9..8669d21afb1 100644 --- a/drivers/net/fm/init.c +++ b/drivers/net/fm/init.c @@ -15,6 +15,7 @@ #include "fm.h" +#ifndef CONFIG_DM_ETH struct fm_eth_info fm_info[] = { #if (CONFIG_SYS_NUM_FM1_DTSEC >= 1) FM_DTSEC_INFO_INITIALIZER(1, 1), @@ -380,3 +381,4 @@ int is_qsgmii_riser_card(struct mii_dev *bus, int phy_base_addr, return 0; } +#endif /* CONFIG_DM_ETH */ diff --git a/drivers/net/fm/memac.c b/drivers/net/fm/memac.c index bed8f14aeec..77ea0837826 100644 --- a/drivers/net/fm/memac.c +++ b/drivers/net/fm/memac.c @@ -137,6 +137,7 @@ static void memac_set_interface_mode(struct fsl_enet_mac *mac, void init_memac(struct fsl_enet_mac *mac, void *base, void *phyregs, int max_rx_len) { + debug("%s: @ %p, mdio @ %p\n", __func__, base, phyregs); mac->base = base; mac->phyregs = phyregs; mac->max_rx_len = max_rx_len; diff --git a/drivers/net/fm/memac_phy.c b/drivers/net/fm/memac_phy.c index c2ef1b4e737..4cbfbc70ab5 100644 --- a/drivers/net/fm/memac_phy.c +++ b/drivers/net/fm/memac_phy.c @@ -22,6 +22,12 @@ #define memac_setbits_32(a, v) setbits_be32(a, v) #endif +#ifdef CONFIG_DM_ETH +struct fm_mdio_priv { + struct memac_mdio_controller *regs; +}; +#endif + static u32 memac_in_32(u32 *reg) { #ifdef CONFIG_SYS_MEMAC_LITTLE_ENDIAN @@ -39,10 +45,23 @@ static u32 memac_in_32(u32 *reg) int memac_mdio_write(struct mii_dev *bus, int port_addr, int dev_addr, int regnum, u16 value) { + struct memac_mdio_controller *regs; u32 mdio_ctl; - struct memac_mdio_controller *regs = bus->priv; u32 c45 = 1; /* Default to 10G interface */ +#ifndef CONFIG_DM_ETH + regs = bus->priv; +#else + struct fm_mdio_priv *priv; + + if (!bus->priv) + return -EINVAL; + priv = dev_get_priv(bus->priv); + regs = priv->regs; + debug("memac_mdio_write(regs %p, port %d, dev %d, reg %d, val %#x)\n", + regs, port_addr, dev_addr, regnum, value); +#endif + if (dev_addr == MDIO_DEVAD_NONE) { c45 = 0; /* clause 22 */ dev_addr = regnum & 0x1f; @@ -84,13 +103,26 @@ int memac_mdio_write(struct mii_dev *bus, int port_addr, int dev_addr, int memac_mdio_read(struct mii_dev *bus, int port_addr, int dev_addr, int regnum) { + struct memac_mdio_controller *regs; u32 mdio_ctl; - struct memac_mdio_controller *regs = bus->priv; u32 c45 = 1; +#ifndef CONFIG_DM_ETH + regs = bus->priv; +#else + struct fm_mdio_priv *priv; + + if (!bus->priv) + return -EINVAL; + priv = dev_get_priv(bus->priv); + regs = priv->regs; +#endif + if (dev_addr == MDIO_DEVAD_NONE) { +#ifndef CONFIG_DM_ETH if (!strcmp(bus->name, DEFAULT_FM_TGEC_MDIO_NAME)) return 0xffff; +#endif c45 = 0; /* clause 22 */ dev_addr = regnum & 0x1f; memac_clrbits_32(®s->mdio_stat, MDIO_STAT_ENC); @@ -133,6 +165,7 @@ int memac_mdio_reset(struct mii_dev *bus) return 0; } +#ifndef CONFIG_DM_ETH int fm_memac_mdio_init(bd_t *bis, struct memac_mdio_info *info) { struct mii_dev *bus = mdio_alloc(); @@ -167,3 +200,105 @@ int fm_memac_mdio_init(bd_t *bis, struct memac_mdio_info *info) return mdio_register(bus); } + +#else /* CONFIG_DM_ETH */ +#if defined(CONFIG_PHYLIB) && defined(CONFIG_DM_MDIO) +static int fm_mdio_read(struct udevice *dev, int addr, int devad, int reg) +{ + struct mdio_perdev_priv *pdata = (dev) ? dev_get_uclass_priv(dev) : + NULL; + + if (pdata && pdata->mii_bus) + return memac_mdio_read(pdata->mii_bus, addr, devad, reg); + + return -1; +} + +static int fm_mdio_write(struct udevice *dev, int addr, int devad, int reg, + u16 val) +{ + struct mdio_perdev_priv *pdata = (dev) ? dev_get_uclass_priv(dev) : + NULL; + + if (pdata && pdata->mii_bus) + return memac_mdio_write(pdata->mii_bus, addr, devad, reg, val); + + return -1; +} + +static int fm_mdio_reset(struct udevice *dev) +{ + struct mdio_perdev_priv *pdata = (dev) ? dev_get_uclass_priv(dev) : + NULL; + + if (pdata && pdata->mii_bus) + return memac_mdio_reset(pdata->mii_bus); + + return -1; +} + +static const struct mdio_ops fm_mdio_ops = { + .read = fm_mdio_read, + .write = fm_mdio_write, + .reset = fm_mdio_reset, +}; + +static const struct udevice_id fm_mdio_ids[] = { + { .compatible = "fsl,fman-memac-mdio" }, + {} +}; + +static int fm_mdio_probe(struct udevice *dev) +{ + struct fm_mdio_priv *priv = (dev) ? dev_get_priv(dev) : NULL; + struct mdio_perdev_priv *pdata = (dev) ? dev_get_uclass_priv(dev) : + NULL; + + if (!dev) { + printf("%s dev = NULL\n", __func__); + return -1; + } + if (!priv) { + printf("dev_get_priv(dev %p) = NULL\n", dev); + return -1; + } + priv->regs = (void *)(uintptr_t)dev_read_addr(dev); + debug("%s priv %p @ regs %p, pdata %p\n", __func__, + priv, priv->regs, pdata); + + /* + * On some platforms like B4860, default value of MDIO_CLK_DIV bits + * in mdio_stat(mdio_cfg) register generates MDIO clock too high + * (much higher than 2.5MHz), violating the IEEE specs. + * On other platforms like T1040, default value of MDIO_CLK_DIV bits + * is zero, so MDIO clock is disabled. + * So, for proper functioning of MDIO, MDIO_CLK_DIV bits needs to + * be properly initialized. + * The default NEG bit should be '1' as per FMANv3 RM, but on platforms + * like T2080QDS, this bit default is '0', which leads to MDIO failure + * on XAUI PHY, so set this bit definitely. + */ + if (priv && priv->regs && priv->regs->mdio_stat) + memac_setbits_32(&priv->regs->mdio_stat, + MDIO_STAT_CLKDIV(258) | MDIO_STAT_NEG); + + return 0; +} + +static int fm_mdio_remove(struct udevice *dev) +{ + return 0; +} + +U_BOOT_DRIVER(fman_mdio) = { + .name = "fman_mdio", + .id = UCLASS_MDIO, + .of_match = fm_mdio_ids, + .probe = fm_mdio_probe, + .remove = fm_mdio_remove, + .ops = &fm_mdio_ops, + .priv_auto_alloc_size = sizeof(struct fm_mdio_priv), + .platdata_auto_alloc_size = sizeof(struct mdio_perdev_priv), +}; +#endif /* CONFIG_PHYLIB && CONFIG_DM_MDIO */ +#endif /* CONFIG_DM_ETH */ diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c index 07bbcc9b231..fee372968a3 100644 --- a/drivers/net/fsl-mc/mc.c +++ b/drivers/net/fsl-mc/mc.c @@ -174,9 +174,21 @@ enum mc_fixup_type { }; static int mc_fixup_mac_addr(void *blob, int nodeoffset, +#ifdef CONFIG_DM_ETH + const char *propname, struct udevice *eth_dev, +#else const char *propname, struct eth_device *eth_dev, +#endif enum mc_fixup_type type) { +#ifdef CONFIG_DM_ETH + struct eth_pdata *plat = dev_get_platdata(eth_dev); + unsigned char *enetaddr = plat->enetaddr; + int eth_index = eth_dev->seq; +#else + unsigned char *enetaddr = eth_dev->enetaddr; + int eth_index = eth_dev->index; +#endif int err = 0, len = 0, size, i; unsigned char env_enetaddr[ARP_HLEN]; unsigned int enetaddr_32[ARP_HLEN]; @@ -184,23 +196,22 @@ static int mc_fixup_mac_addr(void *blob, int nodeoffset, switch (type) { case MC_FIXUP_DPL: - /* DPL likes its addresses on 32 * ARP_HLEN bits */ - for (i = 0; i < ARP_HLEN; i++) - enetaddr_32[i] = cpu_to_fdt32(eth_dev->enetaddr[i]); - val = enetaddr_32; - len = sizeof(enetaddr_32); - break; - + /* DPL likes its addresses on 32 * ARP_HLEN bits */ + for (i = 0; i < ARP_HLEN; i++) + enetaddr_32[i] = cpu_to_fdt32(enetaddr[i]); + val = enetaddr_32; + len = sizeof(enetaddr_32); + break; case MC_FIXUP_DPC: - val = eth_dev->enetaddr; - len = ARP_HLEN; - break; + val = enetaddr; + len = ARP_HLEN; + break; } /* MAC address property present */ if (fdt_get_property(blob, nodeoffset, propname, NULL)) { /* u-boot MAC addr randomly assigned - leave the present one */ - if (!eth_env_get_enetaddr_by_index("eth", eth_dev->index, + if (!eth_env_get_enetaddr_by_index("eth", eth_index, env_enetaddr)) return err; } else { @@ -250,7 +261,11 @@ const char *dpl_get_connection_endpoint(void *blob, char *endpoint) } static int mc_fixup_dpl_mac_addr(void *blob, int dpmac_id, +#ifdef CONFIG_DM_ETH + struct udevice *eth_dev) +#else struct eth_device *eth_dev) +#endif { int objoff = fdt_path_offset(blob, "/objects"); int dpmacoff = -1, dpnioff = -1; @@ -334,7 +349,11 @@ void fdt_fsl_mc_fixup_iommu_map_entry(void *blob) } static int mc_fixup_dpc_mac_addr(void *blob, int dpmac_id, +#ifdef CONFIG_DM_ETH + struct udevice *eth_dev) +#else struct eth_device *eth_dev) +#endif { int nodeoffset = fdt_path_offset(blob, "/board_info/ports"), noff; int err = 0; @@ -377,8 +396,13 @@ static int mc_fixup_dpc_mac_addr(void *blob, int dpmac_id, static int mc_fixup_mac_addrs(void *blob, enum mc_fixup_type type) { int i, err = 0, ret = 0; - char ethname[ETH_NAME_LEN]; +#ifdef CONFIG_DM_ETH +#define ETH_NAME_LEN 20 + struct udevice *eth_dev; +#else struct eth_device *eth_dev; +#endif + char ethname[ETH_NAME_LEN]; for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) { /* port not enabled */ diff --git a/drivers/net/fsl_ls_mdio.c b/drivers/net/fsl_ls_mdio.c new file mode 100644 index 00000000000..6d8332d19ae --- /dev/null +++ b/drivers/net/fsl_ls_mdio.c @@ -0,0 +1,146 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2020 NXP + */ + +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <miiphy.h> +#include <asm/io.h> +#include <fsl_memac.h> + +#ifdef CONFIG_SYS_MEMAC_LITTLE_ENDIAN +#define memac_out_32(a, v) out_le32(a, v) +#define memac_clrbits_32(a, v) clrbits_le32(a, v) +#define memac_setbits_32(a, v) setbits_le32(a, v) +#else +#define memac_out_32(a, v) out_be32(a, v) +#define memac_clrbits_32(a, v) clrbits_be32(a, v) +#define memac_setbits_32(a, v) setbits_be32(a, v) +#endif + +static u32 memac_in_32(u32 *reg) +{ +#ifdef CONFIG_SYS_MEMAC_LITTLE_ENDIAN + return in_le32(reg); +#else + return in_be32(reg); +#endif +} + +struct fsl_ls_mdio_priv { + void *regs_base; +}; + +static u32 fsl_ls_mdio_setup_operation(struct udevice *dev, int addr, int devad, + int reg) +{ + struct fsl_ls_mdio_priv *priv = dev_get_priv(dev); + struct memac_mdio_controller *regs; + u32 mdio_ctl; + u32 c45 = 1; + + regs = (struct memac_mdio_controller *)(priv->regs_base); + if (devad == MDIO_DEVAD_NONE) { + c45 = 0; /* clause 22 */ + devad = reg & 0x1f; + memac_clrbits_32(®s->mdio_stat, MDIO_STAT_ENC); + } else { + memac_setbits_32(®s->mdio_stat, MDIO_STAT_ENC); + } + + /* Wait till the bus is free */ + while ((memac_in_32(®s->mdio_stat)) & MDIO_STAT_BSY) + ; + + /* Set the Port and Device Addrs */ + mdio_ctl = MDIO_CTL_PORT_ADDR(addr) | MDIO_CTL_DEV_ADDR(devad); + memac_out_32(®s->mdio_ctl, mdio_ctl); + + /* Set the register address */ + if (c45) + memac_out_32(®s->mdio_addr, reg & 0xffff); + + /* Wait till the bus is free */ + while ((memac_in_32(®s->mdio_stat)) & MDIO_STAT_BSY) + ; + + return mdio_ctl; +} + +static int dm_fsl_ls_mdio_read(struct udevice *dev, int addr, + int devad, int reg) +{ + struct fsl_ls_mdio_priv *priv = dev_get_priv(dev); + struct memac_mdio_controller *regs; + u32 mdio_ctl; + + regs = (struct memac_mdio_controller *)(priv->regs_base); + mdio_ctl = fsl_ls_mdio_setup_operation(dev, addr, devad, reg); + + /* Initiate the read */ + mdio_ctl |= MDIO_CTL_READ; + memac_out_32(®s->mdio_ctl, mdio_ctl); + + /* Wait till the MDIO write is complete */ + while ((memac_in_32(®s->mdio_data)) & MDIO_DATA_BSY) + ; + + /* Return all Fs if nothing was there */ + if (memac_in_32(®s->mdio_stat) & MDIO_STAT_RD_ER) + return 0xffff; + + return memac_in_32(®s->mdio_data) & 0xffff; +} + +static int dm_fsl_ls_mdio_write(struct udevice *dev, int addr, int devad, + int reg, u16 val) +{ + struct fsl_ls_mdio_priv *priv = dev_get_priv(dev); + struct memac_mdio_controller *regs; + + regs = (struct memac_mdio_controller *)(priv->regs_base); + fsl_ls_mdio_setup_operation(dev, addr, devad, reg); + + /* Write the value to the register */ + memac_out_32(®s->mdio_data, MDIO_DATA(val)); + + /* Wait till the MDIO write is complete */ + while ((memac_in_32(®s->mdio_data)) & MDIO_DATA_BSY) + ; + + return 0; +} + +static const struct mdio_ops fsl_ls_mdio_ops = { + .read = dm_fsl_ls_mdio_read, + .write = dm_fsl_ls_mdio_write, +}; + +static int fsl_ls_mdio_probe(struct udevice *dev) +{ + struct fsl_ls_mdio_priv *priv = dev_get_priv(dev); + struct memac_mdio_controller *regs; + + priv->regs_base = dev_read_addr_ptr(dev); + regs = (struct memac_mdio_controller *)(priv->regs_base); + + memac_setbits_32(®s->mdio_stat, + MDIO_STAT_CLKDIV(258) | MDIO_STAT_NEG); + + return 0; +} + +static const struct udevice_id fsl_ls_mdio_of_ids[] = { + { .compatible = "fsl,ls-mdio" }, +}; + +U_BOOT_DRIVER(fsl_ls_mdio) = { + .name = "fsl_ls_mdio", + .id = UCLASS_MDIO, + .of_match = fsl_ls_mdio_of_ids, + .probe = fsl_ls_mdio_probe, + .ops = &fsl_ls_mdio_ops, + .priv_auto_alloc_size = sizeof(struct fsl_ls_mdio_priv), +}; diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c b/drivers/net/ldpaa_eth/ldpaa_eth.c index a3b9c152b25..48343dce1c4 100644 --- a/drivers/net/ldpaa_eth/ldpaa_eth.c +++ b/drivers/net/ldpaa_eth/ldpaa_eth.c @@ -12,6 +12,7 @@ #include <net.h> #include <hwconfig.h> #include <phy.h> +#include <miiphy.h> #include <linux/compat.h> #include <fsl-mc/fsl_dpmac.h> @@ -19,6 +20,19 @@ #include "ldpaa_eth.h" #ifdef CONFIG_PHYLIB +#ifdef CONFIG_DM_ETH +static void init_phy(struct udevice *dev) +{ + struct ldpaa_eth_priv *priv = dev_get_priv(dev); + + priv->phy = dm_eth_phy_connect(dev); + + if (!priv->phy) + return; + + phy_config(priv->phy); +} +#else static int init_phy(struct eth_device *dev) { struct ldpaa_eth_priv *priv = (struct ldpaa_eth_priv *)dev->priv; @@ -63,6 +77,7 @@ static int init_phy(struct eth_device *dev) return ret; } #endif +#endif #ifdef DEBUG @@ -128,9 +143,15 @@ static void ldpaa_eth_get_dpni_counter(void) } } +#ifdef CONFIG_DM_ETH +static void ldpaa_eth_get_dpmac_counter(struct udevice *dev) +{ + struct ldpaa_eth_priv *priv = dev_get_priv(dev); +#else static void ldpaa_eth_get_dpmac_counter(struct eth_device *net_dev) { struct ldpaa_eth_priv *priv = (struct ldpaa_eth_priv *)net_dev->priv; +#endif int err = 0; u64 value; @@ -263,9 +284,16 @@ error: return; } +#ifdef CONFIG_DM_ETH +static int ldpaa_eth_pull_dequeue_rx(struct udevice *dev, + int flags, uchar **packetp) +{ + struct ldpaa_eth_priv *priv = dev_get_priv(dev); +#else static int ldpaa_eth_pull_dequeue_rx(struct eth_device *dev) { struct ldpaa_eth_priv *priv = (struct ldpaa_eth_priv *)dev->priv; +#endif const struct ldpaa_dq *dq; const struct dpaa_fd *fd; int i = 5, err = 0, status; @@ -322,9 +350,15 @@ static int ldpaa_eth_pull_dequeue_rx(struct eth_device *dev) return err; } +#ifdef CONFIG_DM_ETH +static int ldpaa_eth_tx(struct udevice *dev, void *buf, int len) +{ + struct ldpaa_eth_priv *priv = dev_get_priv(dev); +#else static int ldpaa_eth_tx(struct eth_device *net_dev, void *buf, int len) { struct ldpaa_eth_priv *priv = (struct ldpaa_eth_priv *)net_dev->priv; +#endif struct dpaa_fd fd; u64 buffer_start; int data_offset, err; @@ -400,15 +434,33 @@ error: return err; } +static struct phy_device *ldpaa_get_phydev(struct ldpaa_eth_priv *priv) +{ +#ifdef CONFIG_DM_ETH + return priv->phy; +#else +#ifdef CONFIG_PHYLIB + struct phy_device *phydev = NULL; + int phy_num; + + /* start the phy devices one by one and update the dpmac state */ + for (phy_num = 0; phy_num < WRIOP_MAX_PHY_NUM; phy_num++) { + phydev = wriop_get_phy_dev(priv->dpmac_id, phy_num); + if (phydev) + return phydev; + } + return NULL; +#endif + return NULL; +#endif +} + static int ldpaa_get_dpmac_state(struct ldpaa_eth_priv *priv, struct dpmac_link_state *state) { phy_interface_t enet_if; - int phys_detected; -#ifdef CONFIG_PHYLIB struct phy_device *phydev = NULL; - int err, phy_num; -#endif + int err; /* let's start off with maximum capabilities */ enet_if = wriop_get_enet_if(priv->dpmac_id); @@ -420,39 +472,28 @@ static int ldpaa_get_dpmac_state(struct ldpaa_eth_priv *priv, state->rate = SPEED_1000; break; } - state->up = 1; - phys_detected = 0; -#ifdef CONFIG_PHYLIB + state->up = 1; state->options |= DPMAC_LINK_OPT_AUTONEG; + phydev = ldpaa_get_phydev(priv); - /* start the phy devices one by one and update the dpmac state */ - for (phy_num = 0; phy_num < WRIOP_MAX_PHY_NUM; phy_num++) { - phydev = wriop_get_phy_dev(priv->dpmac_id, phy_num); - if (!phydev) - continue; - - phys_detected++; + if (phydev) { err = phy_startup(phydev); if (err) { printf("%s: Could not initialize\n", phydev->dev->name); state->up = 0; - break; - } - if (phydev->link) { + } else if (phydev->link) { state->rate = min(state->rate, (uint32_t)phydev->speed); if (!phydev->duplex) state->options |= DPMAC_LINK_OPT_HALF_DUPLEX; if (!phydev->autoneg) state->options &= ~DPMAC_LINK_OPT_AUTONEG; } else { - /* break out of loop even if one phy is down */ state->up = 0; - break; } } -#endif - if (!phys_detected) + + if (!phydev) state->options &= ~DPMAC_LINK_OPT_AUTONEG; if (!state->up) { @@ -464,9 +505,16 @@ static int ldpaa_get_dpmac_state(struct ldpaa_eth_priv *priv, return 0; } +#ifdef CONFIG_DM_ETH +static int ldpaa_eth_open(struct udevice *dev) +{ + struct eth_pdata *plat = dev_get_platdata(dev); + struct ldpaa_eth_priv *priv = dev_get_priv(dev); +#else static int ldpaa_eth_open(struct eth_device *net_dev, bd_t *bd) { struct ldpaa_eth_priv *priv = (struct ldpaa_eth_priv *)net_dev->priv; +#endif struct dpmac_link_state dpmac_link_state = { 0 }; #ifdef DEBUG struct dpni_link_state link_state; @@ -474,8 +522,13 @@ static int ldpaa_eth_open(struct eth_device *net_dev, bd_t *bd) int err = 0; struct dpni_queue d_queue; +#ifdef CONFIG_DM_ETH + if (eth_is_active(dev)) + return 0; +#else if (net_dev->state == ETH_STATE_ACTIVE) return 0; +#endif if (get_mc_boot_status() != 0) { printf("ERROR (MC is not booted)\n"); @@ -515,8 +568,13 @@ static int ldpaa_eth_open(struct eth_device *net_dev, bd_t *bd) if (err) goto err_dpni_bind; +#ifdef CONFIG_DM_ETH + err = dpni_add_mac_addr(dflt_mc_io, MC_CMD_NO_FLAGS, + dflt_dpni->dpni_handle, plat->enetaddr); +#else err = dpni_add_mac_addr(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle, net_dev->enetaddr); +#endif if (err) { printf("dpni_add_mac_addr() failed\n"); return err; @@ -589,23 +647,35 @@ err_dpmac_setup: return err; } +#ifdef CONFIG_DM_ETH +static void ldpaa_eth_stop(struct udevice *dev) +{ + struct ldpaa_eth_priv *priv = dev_get_priv(dev); +#else static void ldpaa_eth_stop(struct eth_device *net_dev) { struct ldpaa_eth_priv *priv = (struct ldpaa_eth_priv *)net_dev->priv; - int err = 0; -#ifdef CONFIG_PHYLIB - struct phy_device *phydev = NULL; - int phy_num; #endif + struct phy_device *phydev = NULL; + int err = 0; +#ifdef CONFIG_DM_ETH + if (!eth_is_active(dev)) + return; +#else if ((net_dev->state == ETH_STATE_PASSIVE) || (net_dev->state == ETH_STATE_INIT)) return; +#endif #ifdef DEBUG ldpaa_eth_get_dpni_counter(); +#ifdef CONFIG_DM_ETH + ldpaa_eth_get_dpmac_counter(dev); +#else ldpaa_eth_get_dpmac_counter(net_dev); #endif +#endif err = dprc_disconnect(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dprc_handle, &dpmac_endpoint); @@ -628,13 +698,9 @@ static void ldpaa_eth_stop(struct eth_device *net_dev) if (err < 0) printf("dpni_disable() failed\n"); -#ifdef CONFIG_PHYLIB - for (phy_num = 0; phy_num < WRIOP_MAX_PHY_NUM; phy_num++) { - phydev = wriop_get_phy_dev(priv->dpmac_id, phy_num); - if (phydev) - phy_shutdown(phydev); - } -#endif + phydev = ldpaa_get_phydev(priv); + if (phydev) + phy_shutdown(phydev); /* Free DPBP handle and reset. */ ldpaa_dpbp_free(); @@ -1027,6 +1093,107 @@ static int ldpaa_dpni_bind(struct ldpaa_eth_priv *priv) return 0; } +#ifdef CONFIG_DM_ETH +static int ldpaa_eth_probe(struct udevice *dev) +{ + struct ofnode_phandle_args phandle; + + /* Nothing to do if there is no "phy-handle" in the DTS node */ + if (dev_read_phandle_with_args(dev, "phy-handle", NULL, + 0, 0, &phandle)) { + return 0; + } + + init_phy(dev); + + return 0; +} + +static uint32_t ldpaa_eth_get_dpmac_id(struct udevice *dev) +{ + int port_node = dev_of_offset(dev); + + return fdtdec_get_uint(gd->fdt_blob, port_node, "reg", -1); +} + +static const char *ldpaa_eth_get_phy_mode_str(struct udevice *dev) +{ + int port_node = dev_of_offset(dev); + const char *phy_mode_str; + + phy_mode_str = fdt_getprop(gd->fdt_blob, port_node, + "phy-connection-type", NULL); + if (phy_mode_str) + return phy_mode_str; + + phy_mode_str = fdt_getprop(gd->fdt_blob, port_node, "phy-mode", NULL); + return phy_mode_str; +} + +static int ldpaa_eth_bind(struct udevice *dev) +{ + const char *phy_mode_str = NULL; + uint32_t dpmac_id; + char eth_name[16]; + int phy_mode = -1; + + phy_mode_str = ldpaa_eth_get_phy_mode_str(dev); + if (phy_mode_str) + phy_mode = phy_get_interface_by_name(phy_mode_str); + if (phy_mode == -1) { + dev_err(dev, "incorrect phy mode\n"); + return -EINVAL; + } + + dpmac_id = ldpaa_eth_get_dpmac_id(dev); + if (dpmac_id == -1) { + dev_err(dev, "missing reg field from the dpmac node\n"); + return -EINVAL; + } + + sprintf(eth_name, "DPMAC%d@%s", dpmac_id, phy_mode_str); + device_set_name(dev, eth_name); + + return 0; +} + +static int ldpaa_eth_ofdata_to_platdata(struct udevice *dev) +{ + struct ldpaa_eth_priv *priv = dev_get_priv(dev); + const char *phy_mode_str; + + priv->dpmac_id = ldpaa_eth_get_dpmac_id(dev); + phy_mode_str = ldpaa_eth_get_phy_mode_str(dev); + priv->phy_mode = phy_get_interface_by_name(phy_mode_str); + + return 0; +} + +static const struct eth_ops ldpaa_eth_ops = { + .start = ldpaa_eth_open, + .send = ldpaa_eth_tx, + .recv = ldpaa_eth_pull_dequeue_rx, + .stop = ldpaa_eth_stop, +}; + +static const struct udevice_id ldpaa_eth_of_ids[] = { + { .compatible = "fsl,qoriq-mc-dpmac" }, +}; + +U_BOOT_DRIVER(ldpaa_eth) = { + .name = "ldpaa_eth", + .id = UCLASS_ETH, + .of_match = ldpaa_eth_of_ids, + .ofdata_to_platdata = ldpaa_eth_ofdata_to_platdata, + .bind = ldpaa_eth_bind, + .probe = ldpaa_eth_probe, + .ops = &ldpaa_eth_ops, + .priv_auto_alloc_size = sizeof(struct ldpaa_eth_priv), + .platdata_auto_alloc_size = sizeof(struct eth_pdata), +}; + +#else + static int ldpaa_eth_netdev_init(struct eth_device *net_dev, phy_interface_t enet_if) { @@ -1099,3 +1266,4 @@ err_netdev_init: return err; } +#endif diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.h b/drivers/net/ldpaa_eth/ldpaa_eth.h index 3f9154b5bbc..e90513e56f9 100644 --- a/drivers/net/ldpaa_eth/ldpaa_eth.h +++ b/drivers/net/ldpaa_eth/ldpaa_eth.h @@ -116,7 +116,13 @@ struct ldpaa_fas { LDPAA_ETH_FAS_TIDE) struct ldpaa_eth_priv { +#ifdef CONFIG_DM_ETH + struct phy_device *phy; + int phy_mode; + bool started; +#else struct eth_device *net_dev; +#endif uint32_t dpmac_id; uint16_t dpmac_handle; diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index a72f34f0d48..1e38c8741f0 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -154,6 +154,14 @@ config PHY_STM32_USBPHYC between an HS USB OTG controller and an HS USB Host controller, selected by an USB switch. +config MESON_GXBB_USB_PHY + bool "Amlogic Meson GXBB USB PHY" + depends on PHY && ARCH_MESON && MESON_GXBB + imply REGMAP + help + This is the generic phy driver for the Amlogic Meson GXBB + USB2 PHY. + config MESON_GXL_USB_PHY bool "Amlogic Meson GXL USB PHYs" depends on PHY && ARCH_MESON && (MESON_GXL || MESON_GXM) diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index 43ce62e08cd..74e8d931d38 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -16,6 +16,7 @@ obj-$(CONFIG_STI_USB_PHY) += sti_usb_phy.o obj-$(CONFIG_PHY_RCAR_GEN2) += phy-rcar-gen2.o obj-$(CONFIG_PHY_RCAR_GEN3) += phy-rcar-gen3.o obj-$(CONFIG_PHY_STM32_USBPHYC) += phy-stm32-usbphyc.o +obj-$(CONFIG_MESON_GXBB_USB_PHY) += meson-gxbb-usb2.o obj-$(CONFIG_MESON_GXL_USB_PHY) += meson-gxl-usb2.o meson-gxl-usb3.o obj-$(CONFIG_MESON_G12A_USB_PHY) += meson-g12a-usb2.o meson-g12a-usb3-pcie.o obj-$(CONFIG_MSM8916_USB_PHY) += msm8916-usbh-phy.o diff --git a/drivers/phy/meson-gxbb-usb2.c b/drivers/phy/meson-gxbb-usb2.c new file mode 100644 index 00000000000..88c2ec69b22 --- /dev/null +++ b/drivers/phy/meson-gxbb-usb2.c @@ -0,0 +1,235 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Meson8, Meson8b and GXBB USB2 PHY driver + * + * Copyright (C) 2016 Martin Blumenstingl <martin.blumenstingl@googlemail.com> + * Copyright (C) 2018 BayLibre, SAS + * + * Author: Beniamino Galvani <b.galvani@gmail.com> + */ + +#include <common.h> +#include <clk.h> +#include <dm.h> +#include <generic-phy.h> +#include <power/regulator.h> +#include <regmap.h> +#include <reset.h> + +#define REG_CONFIG 0x00 + #define REG_CONFIG_CLK_EN BIT(0) + #define REG_CONFIG_CLK_SEL_MASK GENMASK(3, 1) + #define REG_CONFIG_CLK_DIV_MASK GENMASK(10, 4) + #define REG_CONFIG_CLK_32k_ALTSEL BIT(15) + #define REG_CONFIG_TEST_TRIG BIT(31) + +#define REG_CTRL 0x04 + #define REG_CTRL_SOFT_PRST BIT(0) + #define REG_CTRL_SOFT_HRESET BIT(1) + #define REG_CTRL_SS_SCALEDOWN_MODE_MASK GENMASK(3, 2) + #define REG_CTRL_CLK_DET_RST BIT(4) + #define REG_CTRL_INTR_SEL BIT(5) + #define REG_CTRL_CLK_DETECTED BIT(8) + #define REG_CTRL_SOF_SENT_RCVD_TGL BIT(9) + #define REG_CTRL_SOF_TOGGLE_OUT BIT(10) + #define REG_CTRL_POWER_ON_RESET BIT(15) + #define REG_CTRL_SLEEPM BIT(16) + #define REG_CTRL_TX_BITSTUFF_ENN_H BIT(17) + #define REG_CTRL_TX_BITSTUFF_ENN BIT(18) + #define REG_CTRL_COMMON_ON BIT(19) + #define REG_CTRL_REF_CLK_SEL_MASK GENMASK(21, 20) + #define REG_CTRL_REF_CLK_SEL_SHIFT 20 + #define REG_CTRL_FSEL_MASK GENMASK(24, 22) + #define REG_CTRL_FSEL_SHIFT 22 + #define REG_CTRL_PORT_RESET BIT(25) + #define REG_CTRL_THREAD_ID_MASK GENMASK(31, 26) + +/* bits [31:26], [24:21] and [15:3] seem to be read-only */ +#define REG_ADP_BC 0x0c + #define REG_ADP_BC_VBUS_VLD_EXT_SEL BIT(0) + #define REG_ADP_BC_VBUS_VLD_EXT BIT(1) + #define REG_ADP_BC_OTG_DISABLE BIT(2) + #define REG_ADP_BC_ID_PULLUP BIT(3) + #define REG_ADP_BC_DRV_VBUS BIT(4) + #define REG_ADP_BC_ADP_PRB_EN BIT(5) + #define REG_ADP_BC_ADP_DISCHARGE BIT(6) + #define REG_ADP_BC_ADP_CHARGE BIT(7) + #define REG_ADP_BC_SESS_END BIT(8) + #define REG_ADP_BC_DEVICE_SESS_VLD BIT(9) + #define REG_ADP_BC_B_VALID BIT(10) + #define REG_ADP_BC_A_VALID BIT(11) + #define REG_ADP_BC_ID_DIG BIT(12) + #define REG_ADP_BC_VBUS_VALID BIT(13) + #define REG_ADP_BC_ADP_PROBE BIT(14) + #define REG_ADP_BC_ADP_SENSE BIT(15) + #define REG_ADP_BC_ACA_ENABLE BIT(16) + #define REG_ADP_BC_DCD_ENABLE BIT(17) + #define REG_ADP_BC_VDAT_DET_EN_B BIT(18) + #define REG_ADP_BC_VDAT_SRC_EN_B BIT(19) + #define REG_ADP_BC_CHARGE_SEL BIT(20) + #define REG_ADP_BC_CHARGE_DETECT BIT(21) + #define REG_ADP_BC_ACA_PIN_RANGE_C BIT(22) + #define REG_ADP_BC_ACA_PIN_RANGE_B BIT(23) + #define REG_ADP_BC_ACA_PIN_RANGE_A BIT(24) + #define REG_ADP_BC_ACA_PIN_GND BIT(25) + #define REG_ADP_BC_ACA_PIN_FLOAT BIT(26) + +#define RESET_COMPLETE_TIME 500 +#define ACA_ENABLE_COMPLETE_TIME 50 + +struct phy_meson_gxbb_usb2_priv { + struct regmap *regmap; + struct reset_ctl_bulk resets; +#if CONFIG_IS_ENABLED(DM_REGULATOR) + struct udevice *phy_supply; +#endif +}; + +static int phy_meson_gxbb_usb2_power_on(struct phy *phy) +{ + struct udevice *dev = phy->dev; + struct phy_meson_gxbb_usb2_priv *priv = dev_get_priv(dev); + uint val; + +#if CONFIG_IS_ENABLED(DM_REGULATOR) + if (priv->phy_supply) { + int ret = regulator_set_enable(priv->phy_supply, true); + + if (ret) + return ret; + } +#endif + + regmap_update_bits(priv->regmap, REG_CONFIG, + REG_CONFIG_CLK_32k_ALTSEL, + REG_CONFIG_CLK_32k_ALTSEL); + regmap_update_bits(priv->regmap, REG_CTRL, + REG_CTRL_REF_CLK_SEL_MASK, + 0x2 << REG_CTRL_REF_CLK_SEL_SHIFT); + regmap_update_bits(priv->regmap, REG_CTRL, + REG_CTRL_FSEL_MASK, + 0x5 << REG_CTRL_FSEL_SHIFT); + + /* reset the PHY */ + regmap_update_bits(priv->regmap, REG_CTRL, + REG_CTRL_POWER_ON_RESET, + REG_CTRL_POWER_ON_RESET); + udelay(RESET_COMPLETE_TIME); + regmap_update_bits(priv->regmap, REG_CTRL, + REG_CTRL_POWER_ON_RESET, + 0); + udelay(RESET_COMPLETE_TIME); + + regmap_update_bits(priv->regmap, REG_CTRL, + REG_CTRL_SOF_TOGGLE_OUT, + REG_CTRL_SOF_TOGGLE_OUT); + + /* Set host mode */ + regmap_update_bits(priv->regmap, REG_ADP_BC, + REG_ADP_BC_ACA_ENABLE, + REG_ADP_BC_ACA_ENABLE); + udelay(ACA_ENABLE_COMPLETE_TIME); + + regmap_read(priv->regmap, REG_ADP_BC, &val); + if (val & REG_ADP_BC_ACA_PIN_FLOAT) { + pr_err("Error powering on GXBB USB PHY\n"); + return -EINVAL; + } + + return 0; +} + +static int phy_meson_gxbb_usb2_power_off(struct phy *phy) +{ +#if CONFIG_IS_ENABLED(DM_REGULATOR) + struct udevice *dev = phy->dev; + struct phy_meson_gxbb_usb2_priv *priv = dev_get_priv(dev); + + if (priv->phy_supply) { + int ret = regulator_set_enable(priv->phy_supply, false); + + if (ret) + return ret; + } +#endif + + return 0; +} + +static struct phy_ops meson_gxbb_usb2_phy_ops = { + .power_on = phy_meson_gxbb_usb2_power_on, + .power_off = phy_meson_gxbb_usb2_power_off, +}; + +static int meson_gxbb_usb2_phy_probe(struct udevice *dev) +{ + struct phy_meson_gxbb_usb2_priv *priv = dev_get_priv(dev); + struct clk clk_usb_general, clk_usb; + int ret; + + ret = regmap_init_mem(dev_ofnode(dev), &priv->regmap); + if (ret) + return ret; + + ret = clk_get_by_name(dev, "usb_general", &clk_usb_general); + if (ret) + return ret; + + ret = clk_enable(&clk_usb_general); + if (ret && ret != -ENOSYS && ret != -ENOTSUPP) { + pr_err("Failed to enable PHY general clock\n"); + return ret; + } + + ret = clk_get_by_name(dev, "usb", &clk_usb); + if (ret) + return ret; + + ret = clk_enable(&clk_usb); + if (ret && ret != -ENOSYS && ret != -ENOTSUPP) { + pr_err("Failed to enable PHY clock\n"); + return ret; + } + +#if CONFIG_IS_ENABLED(DM_REGULATOR) + ret = device_get_supply_regulator(dev, "phy-supply", &priv->phy_supply); + if (ret && ret != -ENOENT) { + pr_err("Failed to get PHY regulator\n"); + return ret; + } +#endif + ret = reset_get_bulk(dev, &priv->resets); + if (!ret) { + ret = reset_deassert_bulk(&priv->resets); + if (ret) { + pr_err("Failed to deassert reset\n"); + return ret; + } + } + + return 0; +} + +static int meson_gxbb_usb2_phy_remove(struct udevice *dev) +{ + struct phy_meson_gxbb_usb2_priv *priv = dev_get_priv(dev); + + return reset_release_bulk(&priv->resets); +} + +static const struct udevice_id meson_gxbb_usb2_phy_ids[] = { + { .compatible = "amlogic,meson8-usb2-phy" }, + { .compatible = "amlogic,meson8b-usb2-phy" }, + { .compatible = "amlogic,meson-gxbb-usb2-phy" }, + { } +}; + +U_BOOT_DRIVER(meson_gxbb_usb2_phy) = { + .name = "meson_gxbb_usb2_phy", + .id = UCLASS_PHY, + .of_match = meson_gxbb_usb2_phy_ids, + .probe = meson_gxbb_usb2_phy_probe, + .remove = meson_gxbb_usb2_phy_remove, + .ops = &meson_gxbb_usb2_phy_ops, + .priv_auto_alloc_size = sizeof(struct phy_meson_gxbb_usb2_priv), +}; diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig index f09e138bb8c..4be74334047 100644 --- a/drivers/sysreset/Kconfig +++ b/drivers/sysreset/Kconfig @@ -101,6 +101,12 @@ config SYSRESET_WATCHDOG help Reboot support for generic watchdog reset. +config SYSRESET_RESETCTL + bool "Enable support for reset controller reboot driver" + select DM_RESET + help + Reboot support using generic reset controller. + config SYSRESET_X86 bool "Enable support for x86 processor reboot driver" depends on X86 diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile index 51af68fad3b..3ed4bab9e37 100644 --- a/drivers/sysreset/Makefile +++ b/drivers/sysreset/Makefile @@ -16,5 +16,6 @@ obj-$(CONFIG_SYSRESET_SOCFPGA_S10) += sysreset_socfpga_s10.o obj-$(CONFIG_SYSRESET_TI_SCI) += sysreset-ti-sci.o obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o +obj-$(CONFIG_SYSRESET_RESETCTL) += sysreset_resetctl.o obj-$(CONFIG_$(SPL_TPL_)SYSRESET_X86) += sysreset_x86.o obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o diff --git a/drivers/sysreset/sysreset_resetctl.c b/drivers/sysreset/sysreset_resetctl.c new file mode 100644 index 00000000000..b8203ba6059 --- /dev/null +++ b/drivers/sysreset/sysreset_resetctl.c @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2020 MediaTek Inc. + * + * Author: Weijie Gao <weijie.gao@mediatek.com> + */ + +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <sysreset.h> +#include <reset.h> + +struct resetctl_reboot_priv { + struct reset_ctl_bulk resets; +}; + +static int resetctl_reboot_request(struct udevice *dev, enum sysreset_t type) +{ + struct resetctl_reboot_priv *priv = dev_get_priv(dev); + + return reset_assert_bulk(&priv->resets); +} + +static struct sysreset_ops resetctl_reboot_ops = { + .request = resetctl_reboot_request, +}; + +int resetctl_reboot_probe(struct udevice *dev) +{ + struct resetctl_reboot_priv *priv = dev_get_priv(dev); + + return reset_get_bulk(dev, &priv->resets); +} + +static const struct udevice_id resetctl_reboot_ids[] = { + { .compatible = "resetctl-reboot" }, + { } +}; + +U_BOOT_DRIVER(resetctl_reboot) = { + .id = UCLASS_SYSRESET, + .name = "resetctl_reboot", + .of_match = resetctl_reboot_ids, + .ops = &resetctl_reboot_ops, + .priv_auto_alloc_size = sizeof(struct resetctl_reboot_priv), + .probe = resetctl_reboot_probe, +}; diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c b/drivers/usb/dwc3/dwc3-meson-g12a.c index d4453f8784c..de964d6c10e 100644 --- a/drivers/usb/dwc3/dwc3-meson-g12a.c +++ b/drivers/usb/dwc3/dwc3-meson-g12a.c @@ -408,6 +408,15 @@ static int dwc3_meson_g12a_probe(struct udevice *dev) goto err_phy_init; } + for (i = 0; i < PHY_COUNT; ++i) { + if (!priv->phys[i].dev) + continue; + + ret = generic_phy_power_on(&priv->phys[i]); + if (ret) + goto err_phy_init; + } + return 0; err_phy_init: @@ -430,6 +439,13 @@ static int dwc3_meson_g12a_remove(struct udevice *dev) clk_release_all(&priv->clk, 1); + for (i = 0; i < PHY_COUNT; ++i) { + if (!priv->phys[i].dev) + continue; + + generic_phy_power_off(&priv->phys[i]); + } + for (i = 0 ; i < PHY_COUNT ; ++i) { if (!priv->phys[i].dev) continue; diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c index a118283984c..8533abfd930 100644 --- a/drivers/usb/gadget/ether.c +++ b/drivers/usb/gadget/ether.c @@ -2472,8 +2472,7 @@ static int _usb_eth_send(struct ether_priv *priv, void *packet, int length) } usb_gadget_handle_interrupts(0); } - if (rndis_pkt) - free(rndis_pkt); + free(rndis_pkt); return 0; drop: diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c index e4efaf1e593..f25ed2dab06 100644 --- a/drivers/usb/host/dwc2.c +++ b/drivers/usb/host/dwc2.c @@ -5,13 +5,15 @@ */ #include <common.h> +#include <clk.h> #include <cpu_func.h> #include <dm.h> #include <errno.h> -#include <usb.h> +#include <generic-phy.h> #include <malloc.h> #include <memalign.h> #include <phys2bus.h> +#include <usb.h> #include <usbroothubdes.h> #include <wait_bit.h> #include <asm/io.h> @@ -37,6 +39,8 @@ struct dwc2_priv { #ifdef CONFIG_DM_REGULATOR struct udevice *vbus_supply; #endif + struct phy phy; + struct clk_bulk clks; #else uint8_t *aligned_buffer; uint8_t *status_buffer; @@ -1147,6 +1151,8 @@ static int dwc2_reset(struct udevice *dev) return ret; } + /* force reset to clear all IP register */ + reset_assert_bulk(&priv->resets); ret = reset_deassert_bulk(&priv->resets); if (ret) { reset_release_bulk(&priv->resets); @@ -1213,6 +1219,8 @@ static int dwc2_init_common(struct udevice *dev, struct dwc2_priv *priv) if (readl(®s->gintsts) & DWC2_GINTSTS_CURMODE_HOST) mdelay(1000); + printf("USB DWC2\n"); + return 0; } @@ -1322,13 +1330,95 @@ static int dwc2_usb_ofdata_to_platdata(struct udevice *dev) return 0; } +static int dwc2_setup_phy(struct udevice *dev) +{ + struct dwc2_priv *priv = dev_get_priv(dev); + int ret; + + ret = generic_phy_get_by_index(dev, 0, &priv->phy); + if (ret) { + if (ret == -ENOENT) + return 0; /* no PHY, nothing to do */ + dev_err(dev, "Failed to get USB PHY: %d.\n", ret); + return ret; + } + + ret = generic_phy_init(&priv->phy); + if (ret) { + dev_dbg(dev, "Failed to init USB PHY: %d.\n", ret); + return ret; + } + + ret = generic_phy_power_on(&priv->phy); + if (ret) { + dev_dbg(dev, "Failed to power on USB PHY: %d.\n", ret); + generic_phy_exit(&priv->phy); + return ret; + } + + return 0; +} + +static int dwc2_shutdown_phy(struct udevice *dev) +{ + struct dwc2_priv *priv = dev_get_priv(dev); + int ret; + + /* PHY is not valid when generic_phy_get_by_index() = -ENOENT */ + if (!generic_phy_valid(&priv->phy)) + return 0; /* no PHY, nothing to do */ + + ret = generic_phy_power_off(&priv->phy); + if (ret) { + dev_dbg(dev, "Failed to power off USB PHY: %d.\n", ret); + return ret; + } + + ret = generic_phy_exit(&priv->phy); + if (ret) { + dev_dbg(dev, "Failed to power off USB PHY: %d.\n", ret); + return ret; + } + + return 0; +} + +static int dwc2_clk_init(struct udevice *dev) +{ + struct dwc2_priv *priv = dev_get_priv(dev); + int ret; + + ret = clk_get_bulk(dev, &priv->clks); + if (ret == -ENOSYS || ret == -ENOENT) + return 0; + if (ret) + return ret; + + ret = clk_enable_bulk(&priv->clks); + if (ret) { + clk_release_bulk(&priv->clks); + return ret; + } + + return 0; +} + static int dwc2_usb_probe(struct udevice *dev) { struct dwc2_priv *priv = dev_get_priv(dev); struct usb_bus_priv *bus_priv = dev_get_uclass_priv(dev); + int ret; bus_priv->desc_before_addr = true; + ret = dwc2_clk_init(dev); + if (ret) + return ret; + + ret = dwc2_setup_phy(dev); + if (ret) + return ret; + return dwc2_init_common(dev, priv); } @@ -1341,9 +1431,17 @@ static int dwc2_usb_remove(struct udevice *dev) if (ret) return ret; + ret = dwc2_shutdown_phy(dev); + if (ret) { + dev_dbg(dev, "Failed to shutdown USB PHY: %d.\n", ret); + return ret; + } + dwc2_uninit_common(priv->regs); reset_release_bulk(&priv->resets); + clk_disable_bulk(&priv->clks); + clk_release_bulk(&priv->clks); return 0; } diff --git a/drivers/usb/host/dwc3-sti-glue.c b/drivers/usb/host/dwc3-sti-glue.c index c99a1985cca..99d4e29414a 100644 --- a/drivers/usb/host/dwc3-sti-glue.c +++ b/drivers/usb/host/dwc3-sti-glue.c @@ -239,7 +239,7 @@ static const struct udevice_id sti_dwc3_glue_ids[] = { U_BOOT_DRIVER(dwc3_sti_glue) = { .name = "dwc3_sti_glue", - .id = UCLASS_MISC, + .id = UCLASS_NOP, .of_match = sti_dwc3_glue_ids, .ofdata_to_platdata = sti_dwc3_glue_ofdata_to_platdata, .probe = sti_dwc3_glue_probe, diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index 1edb344d0fb..a2a85db1e7b 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -1413,13 +1413,10 @@ static struct int_queue *_ehci_create_int_queue(struct usb_device *dev, debug("Exit create_int_queue\n"); return result; fail3: - if (result->tds) - free(result->tds); + free(result->tds); fail2: - if (result->first) - free(result->first); - if (result) - free(result); + free(result->first); + free(result); fail1: return NULL; } diff --git a/drivers/video/rockchip/rk_edp.c b/drivers/video/rockchip/rk_edp.c index 8703df0ec08..cf84b886e72 100644 --- a/drivers/video/rockchip/rk_edp.c +++ b/drivers/video/rockchip/rk_edp.c @@ -18,6 +18,7 @@ #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/edp_rk3288.h> #include <asm/arch-rockchip/grf_rk3288.h> +#include <asm/arch-rockchip/hardware.h> #include <dt-bindings/clock/rk3288-cru.h> #define MAX_CR_LOOP 5 diff --git a/drivers/video/rockchip/rk_lvds.c b/drivers/video/rockchip/rk_lvds.c index cf5c0439b1a..79e24baf53b 100644 --- a/drivers/video/rockchip/rk_lvds.c +++ b/drivers/video/rockchip/rk_lvds.c @@ -13,8 +13,9 @@ #include <asm/gpio.h> #include <asm/io.h> #include <asm/arch-rockchip/clock.h> -#include <asm/arch-rockchip/lvds_rk3288.h> #include <asm/arch-rockchip/grf_rk3288.h> +#include <asm/arch-rockchip/hardware.h> +#include <asm/arch-rockchip/lvds_rk3288.h> #include <dt-bindings/clock/rk3288-cru.h> #include <dt-bindings/video/rk3288.h> diff --git a/drivers/video/simple_panel.c b/drivers/video/simple_panel.c index c3c0e847327..57228111175 100644 --- a/drivers/video/simple_panel.c +++ b/drivers/video/simple_panel.c @@ -105,6 +105,7 @@ static const struct udevice_id simple_panel_ids[] = { { .compatible = "auo,b133xtn01" }, { .compatible = "auo,b116xw03" }, { .compatible = "auo,b133htn01" }, + { .compatible = "boe,nv140fhmn49" }, { .compatible = "lg,lb070wv8" }, { } }; diff --git a/fs/ext4/ext4_journal.c b/fs/ext4/ext4_journal.c index 3559daf11d2..f8524e5a99a 100644 --- a/fs/ext4/ext4_journal.c +++ b/fs/ext4/ext4_journal.c @@ -409,6 +409,9 @@ int ext4fs_check_journal_state(int recovery_flag) char *temp_buff1 = NULL; struct ext_filesystem *fs = get_fs(); + if (le32_to_cpu(fs->sb->feature_ro_compat) & EXT4_FEATURE_RO_COMPAT_METADATA_CSUM) + return 0; + temp_buff = zalloc(fs->blksz); if (!temp_buff) return -ENOMEM; diff --git a/include/clk.h b/include/clk.h index 3336301815f..60c4b7d075f 100644 --- a/include/clk.h +++ b/include/clk.h @@ -9,6 +9,7 @@ #define _CLK_H_ #include <dm/ofnode.h> +#include <linux/err.h> #include <linux/errno.h> #include <linux/types.h> @@ -312,6 +313,7 @@ static inline int clk_release_bulk(struct clk_bulk *bulk) return clk_release_all(bulk->clks, bulk->count); } +#if CONFIG_IS_ENABLED(CLK) /** * clk_request - Request a clock by provider-specific ID. * @@ -433,19 +435,6 @@ int clk_disable_bulk(struct clk_bulk *bulk); */ bool clk_is_match(const struct clk *p, const struct clk *q); -int soc_clk_dump(void); - -/** - * clk_valid() - check if clk is valid - * - * @clk: the clock to check - * @return true if valid, or false - */ -static inline bool clk_valid(struct clk *clk) -{ - return clk && !!clk->dev; -} - /** * clk_get_by_id() - Get the clock by its ID * @@ -465,6 +454,93 @@ int clk_get_by_id(ulong id, struct clk **clkp); * @return true on binded, or false on no */ bool clk_dev_binded(struct clk *clk); + +#else /* CONFIG_IS_ENABLED(CLK) */ + +static inline int clk_request(struct udevice *dev, struct clk *clk) +{ + return -ENOSYS; +} + +static inline int clk_free(struct clk *clk) +{ + return 0; +} + +static inline ulong clk_get_rate(struct clk *clk) +{ + return -ENOSYS; +} + +static inline struct clk *clk_get_parent(struct clk *clk) +{ + return ERR_PTR(-ENOSYS); +} + +static inline long long clk_get_parent_rate(struct clk *clk) +{ + return -ENOSYS; +} + +static inline ulong clk_set_rate(struct clk *clk, ulong rate) +{ + return -ENOSYS; +} + +static inline int clk_set_parent(struct clk *clk, struct clk *parent) +{ + return -ENOSYS; +} + +static inline int clk_enable(struct clk *clk) +{ + return 0; +} + +static inline int clk_enable_bulk(struct clk_bulk *bulk) +{ + return 0; +} + +static inline int clk_disable(struct clk *clk) +{ + return 0; +} + +static inline int clk_disable_bulk(struct clk_bulk *bulk) +{ + return 0; +} + +static inline bool clk_is_match(const struct clk *p, const struct clk *q) +{ + return false; +} + +static inline int clk_get_by_id(ulong id, struct clk **clkp) +{ + return -ENOSYS; +} + +static inline bool clk_dev_binded(struct clk *clk) +{ + return false; +} +#endif /* CONFIG_IS_ENABLED(CLK) */ + +/** + * clk_valid() - check if clk is valid + * + * @clk: the clock to check + * @return true if valid, or false + */ +static inline bool clk_valid(struct clk *clk) +{ + return clk && !!clk->dev; +} + +int soc_clk_dump(void); + #endif #define clk_prepare_enable(clk) clk_enable(clk) diff --git a/include/config_phylib_all_drivers.h b/include/config_phylib_all_drivers.h index 36df725b829..8e587bc7e73 100644 --- a/include/config_phylib_all_drivers.h +++ b/include/config_phylib_all_drivers.h @@ -12,21 +12,4 @@ #ifndef _CONFIG_PHYLIB_ALL_H #define _CONFIG_PHYLIB_ALL_H -#ifdef CONFIG_PHYLIB - -#define CONFIG_PHY_VITESSE -#define CONFIG_PHY_BROADCOM -#define CONFIG_PHY_DAVICOM -#define CONFIG_PHY_REALTEK -#define CONFIG_PHY_NATSEMI -#define CONFIG_PHY_LXT -#define CONFIG_PHY_ATHEROS -#define CONFIG_PHY_SMSC - -#ifdef CONFIG_PHYLIB_10G -#define CONFIG_PHY_TERANETICS -#endif /* CONFIG_PHYLIB_10G */ - -#endif /* CONFIG_PHYLIB */ - #endif /*_CONFIG_PHYLIB_ALL_H */ diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 1a34b95bec7..abecf90c743 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -586,9 +586,6 @@ unsigned long get_board_ddr_clk(void); #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_SYS_DPAA_FMAN -#define CONFIG_PHYLIB_10G -#define CONFIG_PHY_VITESSE -#define CONFIG_PHY_TERANETICS #define SGMII_CARD_PORT1_PHY_ADDR 0x1C #define SGMII_CARD_PORT2_PHY_ADDR 0x10 #define SGMII_CARD_PORT3_PHY_ADDR 0x1E diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index 20684dc6f3d..e61c9786c0b 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -288,8 +288,6 @@ #define FETH3_RST 0x80 #endif /* CONFIG_ETHER_INDEX */ -#define CONFIG_BITBANGMII /* bit-bang MII PHY management */ - /* * GPIO pins used for bit-banged MII communications */ diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h index 1818b4b70d7..8ed351c5dc7 100644 --- a/include/configs/P1023RDB.h +++ b/include/configs/P1023RDB.h @@ -277,10 +277,6 @@ extern unsigned long get_clock_freq(void); /* For FM */ #define CONFIG_SYS_DPAA_FMAN -#ifdef CONFIG_SYS_DPAA_FMAN -#define CONFIG_PHY_ATHEROS -#endif - /* Default address of microcode for the Linux Fman driver */ /* QE microcode/firmware address */ #define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000 diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index f6472b9e118..0dcba7deeae 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -418,12 +418,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) -#ifdef CONFIG_SYS_DPAA_FMAN -#define CONFIG_PHYLIB_10G -#define CONFIG_PHY_VITESSE -#define CONFIG_PHY_TERANETICS -#endif - #ifdef CONFIG_PCI #if !defined(CONFIG_DM_PCI) #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index 8ac260c2bc6..20c0534f5a3 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -653,10 +653,6 @@ unsigned long get_board_ddr_clk(void); #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_SYS_DPAA_FMAN -#define CONFIG_PHYLIB_10G -#define CONFIG_PHY_VITESSE -#define CONFIG_PHY_REALTEK -#define CONFIG_PHY_TERANETICS #define RGMII_PHY1_ADDR 0x1 #define RGMII_PHY2_ADDR 0x2 #define SGMII_CARD_AQ_PHY_ADDR_S3 0x3 diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 43897a711af..094795cc6d5 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -610,7 +610,6 @@ unsigned long get_board_ddr_clk(void); #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_SYS_DPAA_FMAN -#define CONFIG_PHY_REALTEK #if defined(CONFIG_TARGET_T1024RDB) #define RGMII_PHY1_ADDR 0x2 #define RGMII_PHY2_ADDR 0x6 diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index aa2a8b00de9..cda8251036e 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -540,10 +540,6 @@ unsigned long get_board_ddr_clk(void); #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_SYS_DPAA_FMAN -#define CONFIG_PHYLIB_10G -#define CONFIG_PHY_VITESSE -#define CONFIG_PHY_REALTEK -#define CONFIG_PHY_TERANETICS #define SGMII_CARD_PORT1_PHY_ADDR 0x1C #define SGMII_CARD_PORT2_PHY_ADDR 0x10 #define SGMII_CARD_PORT3_PHY_ADDR 0x1E diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 50b37acf052..bc651186578 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -654,11 +654,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) #endif /* CONFIG_NOBQFMAN */ -#ifdef CONFIG_SYS_DPAA_FMAN -#define CONFIG_PHY_VITESSE -#define CONFIG_PHY_REALTEK -#endif - #ifdef CONFIG_FMAN_ENET #if defined(CONFIG_TARGET_T1040RDB) || defined(CONFIG_TARGET_T1042RDB) #define CONFIG_SYS_SGMII1_PHY_ADDR 0x03 diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index be5a658d7ee..96801e5f099 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -587,9 +587,6 @@ unsigned long get_board_ddr_clk(void); #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_SYS_DPAA_FMAN -#define CONFIG_PHY_VITESSE -#define CONFIG_PHY_REALTEK -#define CONFIG_PHY_TERANETICS #define RGMII_PHY1_ADDR 0x1 #define RGMII_PHY2_ADDR 0x2 #define FM1_10GEC1_PHY_ADDR 0x3 diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 68de90fbbbc..a90ea11a2f8 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -536,7 +536,6 @@ unsigned long get_board_ddr_clk(void); #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_SYS_DPAA_FMAN -#define CONFIG_PHY_REALTEK #define CONFIG_CORTINA_FW_LENGTH 0x40000 #define RGMII_PHY1_ADDR 0x01 /* RealTek RTL8211E */ #define RGMII_PHY2_ADDR 0x02 diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index 94e0ddbd885..91a7c70356e 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -404,9 +404,6 @@ unsigned long get_board_ddr_clk(void); #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_SYS_DPAA_FMAN -#define CONFIG_PHYLIB_10G -#define CONFIG_PHY_VITESSE -#define CONFIG_PHY_TERANETICS #define SGMII_CARD_PORT1_PHY_ADDR 0x1C #define SGMII_CARD_PORT2_PHY_ADDR 0x1D #define SGMII_CARD_PORT3_PHY_ADDR 0x1E diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 042757c20e3..31cb1cf34a8 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -546,11 +546,8 @@ unsigned long get_board_ddr_clk(void); #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_SYS_DPAA_FMAN -#define CONFIG_PHYLIB_10G -#define CONFIG_PHY_VITESSE #define CONFIG_CORTINA_FW_ADDR 0xefe00000 #define CONFIG_CORTINA_FW_LENGTH 0x40000 -#define CONFIG_PHY_TERANETICS #define SGMII_PHY_ADDR1 0x0 #define SGMII_PHY_ADDR2 0x1 #define SGMII_PHY_ADDR3 0x2 diff --git a/include/configs/advantech_dms-ba16.h b/include/configs/advantech_dms-ba16.h index a115676d4cf..deb4374d1c4 100644 --- a/include/configs/advantech_dms-ba16.h +++ b/include/configs/advantech_dms-ba16.h @@ -55,7 +55,6 @@ #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 4 -#define CONFIG_PHY_ATHEROS /* Serial Flash */ diff --git a/include/configs/alt.h b/include/configs/alt.h index bb5267517cb..8456a6b2c33 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -31,7 +31,6 @@ #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 -#define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI /* Board Clock */ diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index f2f10040bcc..6de463efa1e 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -285,9 +285,7 @@ /* SPI flash. */ /* Network. */ -#define CONFIG_PHY_SMSC /* Enable Atheros phy driver */ -#define CONFIG_PHY_ATHEROS /* * NOR Size = 16 MiB diff --git a/include/configs/am335x_igep003x.h b/include/configs/am335x_igep003x.h index 5b5e16026e8..95ba949b217 100644 --- a/include/configs/am335x_igep003x.h +++ b/include/configs/am335x_igep003x.h @@ -101,7 +101,6 @@ #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */ /* Ethernet support */ -#define CONFIG_PHY_SMSC /* NAND support */ #define CONFIG_SYS_NAND_ONFI_DETECTION 1 diff --git a/include/configs/am335x_shc.h b/include/configs/am335x_shc.h index eabf19ddebd..6e1a40c678f 100644 --- a/include/configs/am335x_shc.h +++ b/include/configs/am335x_shc.h @@ -246,7 +246,6 @@ #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 -#define CONFIG_PHY_SMSC /* I2C configuration */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ diff --git a/include/configs/am335x_sl50.h b/include/configs/am335x_sl50.h index 0453cb2965f..9087e04165f 100644 --- a/include/configs/am335x_sl50.h +++ b/include/configs/am335x_sl50.h @@ -81,6 +81,5 @@ #endif /* Network. */ -#define CONFIG_PHY_SMSC #endif /* ! __CONFIG_AM335X_SL50_H */ diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h index e9f1eb21426..e56929628bc 100644 --- a/include/configs/armadillo-800eva.h +++ b/include/configs/armadillo-800eva.h @@ -77,8 +77,6 @@ #define CONFIG_SH_ETHER_BASE_ADDR 0xe9a00000 #define CONFIG_SH_ETHER_SH7734_MII (0x01) #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII -#define CONFIG_PHY_SMSC -#define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI /* Board Clock */ diff --git a/include/configs/bav335x.h b/include/configs/bav335x.h index 297800eb422..c51b850f6d0 100644 --- a/include/configs/bav335x.h +++ b/include/configs/bav335x.h @@ -449,7 +449,6 @@ DEFAULT_LINUX_BOOT_ENV \ /* SPI flash. */ /* Network. */ -#define CONFIG_PHY_SMSC /* * NOR Size = 16 MiB diff --git a/include/configs/bmips_bcm6318.h b/include/configs/bmips_bcm6318.h index c7e7119aafd..45eb931c257 100644 --- a/include/configs/bmips_bcm6318.h +++ b/include/configs/bmips_bcm6318.h @@ -19,7 +19,9 @@ #define CONFIG_EHCI_MMIO_BIG_ENDIAN #define CONFIG_SYS_OHCI_SWAP_REG_ACCESS #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 +#if defined(CONFIG_USB_OHCI_HCD) #define CONFIG_USB_OHCI_NEW +#endif /* CONFIG_USB_OHCI_HCD */ /* U-Boot */ #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + SZ_1M diff --git a/include/configs/bmips_bcm63268.h b/include/configs/bmips_bcm63268.h index 45f26bb3097..eed321eb6fc 100644 --- a/include/configs/bmips_bcm63268.h +++ b/include/configs/bmips_bcm63268.h @@ -19,7 +19,9 @@ #define CONFIG_EHCI_MMIO_BIG_ENDIAN #define CONFIG_SYS_OHCI_SWAP_REG_ACCESS #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 +#if defined(CONFIG_USB_OHCI_HCD) #define CONFIG_USB_OHCI_NEW +#endif /* CONFIG_USB_OHCI_HCD */ /* U-Boot */ #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + SZ_1M diff --git a/include/configs/bmips_bcm6328.h b/include/configs/bmips_bcm6328.h index 8d594387853..c78099a49dc 100644 --- a/include/configs/bmips_bcm6328.h +++ b/include/configs/bmips_bcm6328.h @@ -19,7 +19,9 @@ #define CONFIG_EHCI_MMIO_BIG_ENDIAN #define CONFIG_SYS_OHCI_SWAP_REG_ACCESS #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 +#if defined(CONFIG_USB_OHCI_HCD) #define CONFIG_USB_OHCI_NEW +#endif /* CONFIG_USB_OHCI_HCD */ /* U-Boot */ #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + SZ_1M diff --git a/include/configs/bmips_bcm6348.h b/include/configs/bmips_bcm6348.h index 061d6b25b71..547cf857ceb 100644 --- a/include/configs/bmips_bcm6348.h +++ b/include/configs/bmips_bcm6348.h @@ -17,7 +17,9 @@ /* USB */ #define CONFIG_SYS_OHCI_SWAP_REG_ACCESS #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 +#if defined(CONFIG_USB_OHCI_HCD) #define CONFIG_USB_OHCI_NEW +#endif /* CONFIG_USB_OHCI_HCD */ /* U-Boot */ #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + SZ_1M diff --git a/include/configs/bmips_bcm6358.h b/include/configs/bmips_bcm6358.h index 583217d2621..116e9705b6b 100644 --- a/include/configs/bmips_bcm6358.h +++ b/include/configs/bmips_bcm6358.h @@ -19,7 +19,9 @@ #define CONFIG_EHCI_MMIO_BIG_ENDIAN #define CONFIG_SYS_OHCI_SWAP_REG_ACCESS #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 +#if defined(CONFIG_USB_OHCI_HCD) #define CONFIG_USB_OHCI_NEW +#endif /* CONFIG_USB_OHCI_HCD */ /* U-Boot */ #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + SZ_1M diff --git a/include/configs/bmips_bcm6362.h b/include/configs/bmips_bcm6362.h index 570bc3b33d3..e5e8b15e187 100644 --- a/include/configs/bmips_bcm6362.h +++ b/include/configs/bmips_bcm6362.h @@ -19,7 +19,9 @@ #define CONFIG_EHCI_MMIO_BIG_ENDIAN #define CONFIG_SYS_OHCI_SWAP_REG_ACCESS #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 +#if defined(CONFIG_USB_OHCI_HCD) #define CONFIG_USB_OHCI_NEW +#endif /* CONFIG_USB_OHCI_HCD */ /* U-Boot */ #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + SZ_1M diff --git a/include/configs/bmips_bcm6368.h b/include/configs/bmips_bcm6368.h index ab5bdac7268..4d4403f8d21 100644 --- a/include/configs/bmips_bcm6368.h +++ b/include/configs/bmips_bcm6368.h @@ -19,7 +19,9 @@ #define CONFIG_EHCI_MMIO_BIG_ENDIAN #define CONFIG_SYS_OHCI_SWAP_REG_ACCESS #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 +#if defined(CONFIG_USB_OHCI_HCD) #define CONFIG_USB_OHCI_NEW +#endif /* CONFIG_USB_OHCI_HCD */ /* U-Boot */ #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + SZ_1M diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h index befa06faaae..797fcb14590 100644 --- a/include/configs/cgtqmx6eval.h +++ b/include/configs/cgtqmx6eval.h @@ -79,7 +79,6 @@ #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 6 -#define CONFIG_PHY_ATHEROS /* Command definition */ diff --git a/include/configs/chiliboard.h b/include/configs/chiliboard.h index ca7ce31e1a3..f4dcc54508c 100644 --- a/include/configs/chiliboard.h +++ b/include/configs/chiliboard.h @@ -167,6 +167,5 @@ #endif /* Network. */ -#define CONFIG_PHY_SMSC #endif /* ! __CONFIG_CHILIBOARD_H */ diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h index f9ffb4de806..d47bdd228d6 100644 --- a/include/configs/cl-som-imx7.h +++ b/include/configs/cl-som-imx7.h @@ -23,8 +23,6 @@ #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 0 -#define CONFIG_PHYLIB -#define CONFIG_PHY_ATHEROS /* ENET1 */ #define IMX_FEC_BASE ENET_IPS_BASE_ADDR diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 53ae5f08ebd..e62130f8ec0 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -165,7 +165,6 @@ #define CONFIG_FEC_MXC_PHYADDR 0 #define CONFIG_FEC_XCV_TYPE RGMII #define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_PHY_ATHEROS #define CONFIG_ETHPRIME "FEC0" #define CONFIG_ARP_TIMEOUT 200UL #define CONFIG_NET_RETRY_COUNT 5 diff --git a/include/configs/cm_t335.h b/include/configs/cm_t335.h index e0fc7fc3b12..342cc7fddc7 100644 --- a/include/configs/cm_t335.h +++ b/include/configs/cm_t335.h @@ -90,7 +90,6 @@ /* SPL */ /* Network. */ -#define CONFIG_PHY_ATHEROS /* NAND support */ #define CONFIG_SYS_NAND_5_ADDR_CYCLE diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index 1314cf96a2d..55d9f5352b4 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -45,7 +45,6 @@ /* CPSW Ethernet support */ #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_SEND_HOSTNAME -#define CONFIG_PHY_ATHEROS #define CONFIG_SYS_RX_ETH_BUFFER 64 /* USB support */ diff --git a/include/configs/condor.h b/include/configs/condor.h index c286dbb4066..36466f0f500 100644 --- a/include/configs/condor.h +++ b/include/configs/condor.h @@ -12,7 +12,6 @@ #include "rcar-gen3-common.h" /* Ethernet RAVB */ -#define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI /* Environment compatibility */ @@ -24,7 +23,6 @@ #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 -#define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI /* Board Clock */ diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h index 1f6d0c533c9..a326a1c83db 100644 --- a/include/configs/controlcenterdc.h +++ b/include/configs/controlcenterdc.h @@ -54,7 +54,6 @@ /* * Software (bit-bang) MII driver configuration */ -#define CONFIG_BITBANGMII /* bit-bang MII PHY management */ #define CONFIG_BITBANGMII_MULTI /* SPL */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index bafedcb0d25..b2c86ff722b 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -431,12 +431,6 @@ #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) -#ifdef CONFIG_SYS_DPAA_FMAN -#define CONFIG_PHYLIB_10G -#define CONFIG_PHY_VITESSE -#define CONFIG_PHY_TERANETICS -#endif - #ifdef CONFIG_PCI #if !defined(CONFIG_DM_PCI) #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 911ab9aa4ed..4c0229e4cc8 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -65,7 +65,6 @@ * Ethernet */ #define CONFIG_RMII -#define CONFIG_PHY_SMSC #define CONFIG_LPC32XX_ETH #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN diff --git a/include/configs/draak.h b/include/configs/draak.h index 78ec444af54..3248320b9d6 100644 --- a/include/configs/draak.h +++ b/include/configs/draak.h @@ -12,7 +12,6 @@ #include "rcar-gen3-common.h" /* Ethernet RAVB */ -#define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI /* Generic Timer Definitions (use in assembler source) */ diff --git a/include/configs/draco.h b/include/configs/draco.h index 016532f3363..396eb7ded50 100644 --- a/include/configs/draco.h +++ b/include/configs/draco.h @@ -36,8 +36,6 @@ #define EEPROM_ADDR_DDR3 0x90 #define EEPROM_ADDR_CHIP 0x120 -#define CONFIG_PHY_SMSC - #define CONFIG_FACTORYSET /* Define own nand partitions */ diff --git a/include/configs/eagle.h b/include/configs/eagle.h index b567caa1748..ee535042509 100644 --- a/include/configs/eagle.h +++ b/include/configs/eagle.h @@ -12,7 +12,6 @@ #include "rcar-gen3-common.h" /* Ethernet RAVB */ -#define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI /* Environment compatibility */ diff --git a/include/configs/ebisu.h b/include/configs/ebisu.h index 0e246629bc0..521a348435a 100644 --- a/include/configs/ebisu.h +++ b/include/configs/ebisu.h @@ -15,7 +15,6 @@ /* Ethernet RAVB */ #define CONFIG_NET_MULTI -#define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI /* Generic Timer Definitions (use in assembler source) */ diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index 481066b71e9..62561116bbe 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -47,8 +47,6 @@ #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 4 -#define CONFIG_PHY_ATHEROS - #define CONFIG_ARP_TIMEOUT 200UL #define CONFIG_SYS_MEMTEST_START 0x10000000 diff --git a/include/configs/etamin.h b/include/configs/etamin.h index 4ce8f93103c..880149fb890 100644 --- a/include/configs/etamin.h +++ b/include/configs/etamin.h @@ -93,8 +93,6 @@ #define EEPROM_ADDR_DDR3 0x90 #define EEPROM_ADDR_CHIP 0x120 -#define CONFIG_PHY_SMSC - #define CONFIG_FACTORYSET /* use both define to compile a SPL compliance test */ diff --git a/include/configs/gardena-smart-gateway-mt7688.h b/include/configs/gardena-smart-gateway-mt7688.h index 59c60743d24..6412efcbf88 100644 --- a/include/configs/gardena-smart-gateway-mt7688.h +++ b/include/configs/gardena-smart-gateway-mt7688.h @@ -16,10 +16,29 @@ #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 -#ifdef CONFIG_BOOT_RAM +/* SPL */ +#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD) #define CONFIG_SKIP_LOWLEVEL_INIT #endif +#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SPL_BSS_START_ADDR 0x80010000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x10000 +#define CONFIG_SPL_MAX_SIZE 0x10000 +#define CONFIG_SPL_PAD_TO 0 + +/* Dummy value */ +#define CONFIG_SYS_UBOOT_BASE 0 + +/* Serial SPL */ +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL_SUPPORT) +#define CONFIG_SYS_NS16550_MEM32 +#define CONFIG_SYS_NS16550_CLK 40000000 +#define CONFIG_SYS_NS16550_REG_SIZE -4 +#define CONFIG_SYS_NS16550_COM1 0xb0000c00 +#define CONFIG_CONS_INDEX 1 +#endif + /* UART */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ 230400, 460800, 921600 } diff --git a/include/configs/gose.h b/include/configs/gose.h index fcb9f17750e..60a89e00236 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -27,7 +27,6 @@ #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 -#define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI /* Board Clock */ diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index b875f9b132e..f1ea729eb38 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -43,7 +43,6 @@ #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 -#define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI #endif /* __GRPEACH_H */ diff --git a/include/configs/helios4.h b/include/configs/helios4.h index af595bc7bcc..f0ca8e2f161 100644 --- a/include/configs/helios4.h +++ b/include/configs/helios4.h @@ -52,7 +52,6 @@ /* stay within first 1M */ #endif -#define CONFIG_PHY_MARVELL /* there is a marvell phy */ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ /* Keep device tree and initrd in lower memory so the kernel can access them */ diff --git a/include/configs/hrcon.h b/include/configs/hrcon.h index 43c31e6a2c2..5d850929db0 100644 --- a/include/configs/hrcon.h +++ b/include/configs/hrcon.h @@ -293,7 +293,6 @@ void fpga_control_clear(unsigned int bus, int pin); /* * Software (bit-bang) MII driver configuration */ -#define CONFIG_BITBANGMII /* bit-bang MII PHY management */ #define CONFIG_BITBANGMII_MULTI /* diff --git a/include/configs/hsdk-4xd.h b/include/configs/hsdk-4xd.h new file mode 100644 index 00000000000..4628108075e --- /dev/null +++ b/include/configs/hsdk-4xd.h @@ -0,0 +1,120 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2020 Synopsys, Inc. All rights reserved. + * Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> + */ + +#ifndef _CONFIG_HSDK_H_ +#define _CONFIG_HSDK_H_ + +#include <linux/sizes.h> + +/* + * CPU configuration + */ +#define NR_CPUS 4 +#define ARC_PERIPHERAL_BASE 0xF0000000 +#define ARC_DWMMC_BASE (ARC_PERIPHERAL_BASE + 0xA000) +#define ARC_DWGMAC_BASE (ARC_PERIPHERAL_BASE + 0x18000) + +/* + * Memory configuration + */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE + +#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CONFIG_SYS_SDRAM_SIZE SZ_1G + +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) + +#define CONFIG_SYS_MALLOC_LEN SZ_2M +#define CONFIG_SYS_BOOTM_LEN SZ_128M +#define CONFIG_SYS_LOAD_ADDR 0x82000000 + +/* + * UART configuration + */ +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_CLK 33330000 +#define CONFIG_SYS_NS16550_MEM32 + +/* + * Ethernet PHY configuration + */ + +/* + * USB 1.1 configuration + */ +#define CONFIG_USB_OHCI_NEW +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 + +/* + * Environment settings + */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "upgrade=if mmc rescan && " \ + "fatload mmc 0:1 ${loadaddr} u-boot-update.scr && " \ + "iminfo ${loadaddr} && source ${loadaddr}; then; else echo " \ + "\"Fail to upgrade.\n" \ + "Do you have u-boot-update.scr and u-boot.head on first (FAT) SD card partition?\"" \ + "; fi\0" \ + "core_mask=0xF\0" \ + "hsdk_hs45d=setenv core_mask 0x2; setenv haps_apb_location 0x1; \ +setenv l2_cache_ena 0x0; setenv icache_ena 0x0; setenv csm_location 0x10; \ +setenv dcache_ena 0x0; setenv core_iccm_1 0x7; \ +setenv core_dccm_1 0x8; setenv non_volatile_limit 0xF;\0" \ + "hsdk_hs47d=setenv core_mask 0x1; setenv haps_apb_location 0x1; \ +setenv l2_cache_ena 0x0; setenv icache_ena 0x1; setenv csm_location 0x10; \ +setenv dcache_ena 0x1; setenv core_iccm_0 0x10; \ +setenv core_dccm_0 0x10; setenv non_volatile_limit 0xF;\0" \ + "hsdk_hs47d_ccm=setenv core_mask 0x2; setenv haps_apb_location 0x1; \ +setenv l2_cache_ena 0x0; setenv icache_ena 0x1; setenv csm_location 0x10; \ +setenv dcache_ena 0x1; setenv core_iccm_1 0x7; \ +setenv core_dccm_1 0x8; setenv non_volatile_limit 0xF;\0" \ + "hsdk_hs48=setenv core_mask 0x1; setenv haps_apb_location 0x1; \ +setenv l2_cache_ena 0x1; setenv icache_ena 0x1; setenv csm_location 0x10; \ +setenv dcache_ena 0x1; setenv core_iccm_0 0x10; \ +setenv core_dccm_0 0x10; setenv non_volatile_limit 0xF;\0" \ + "hsdk_hs48_ccm=setenv core_mask 0x2; setenv haps_apb_location 0x1; \ +setenv l2_cache_ena 0x1; setenv icache_ena 0x1; setenv csm_location 0x10; \ +setenv dcache_ena 0x1; setenv core_iccm_1 0x7; \ +setenv core_dccm_1 0x8; setenv non_volatile_limit 0xF;\0" \ + "hsdk_hs48x2=run hsdk_hs47dx2;\0" \ + "hsdk_hs47dx2=setenv core_mask 0x3; setenv haps_apb_location 0x1; \ +setenv l2_cache_ena 0x1; setenv icache_ena 0x1; setenv csm_location 0x10; \ +setenv dcache_ena 0x1; setenv core_iccm_0 0x10; \ +setenv core_dccm_0 0x10; setenv non_volatile_limit 0xF; \ +setenv core_iccm_1 0x6; setenv core_dccm_1 0x6;\0" \ + "hsdk_hs48x3=run hsdk_hs47dx3;\0" \ + "hsdk_hs47dx3=setenv core_mask 0x7; setenv haps_apb_location 0x1; \ +setenv l2_cache_ena 0x1; setenv icache_ena 0x1; setenv csm_location 0x10; \ +setenv dcache_ena 0x1; setenv core_iccm_0 0x10; \ +setenv core_dccm_0 0x10; setenv non_volatile_limit 0xF; \ +setenv core_iccm_1 0x6; setenv core_dccm_1 0x6; \ +setenv core_iccm_2 0x10; setenv core_dccm_2 0x10;\0" \ + "hsdk_hs48x4=run hsdk_hs47dx4;\0" \ + "hsdk_hs47dx4=setenv core_mask 0xF; setenv haps_apb_location 0x1; \ +setenv l2_cache_ena 0x1; setenv icache_ena 0x1; setenv csm_location 0x10; \ +setenv dcache_ena 0x1; setenv core_iccm_0 0x10; \ +setenv core_dccm_0 0x10; setenv non_volatile_limit 0xF; \ +setenv core_iccm_1 0x6; setenv core_dccm_1 0x6; \ +setenv core_iccm_2 0x10; setenv core_dccm_2 0x10; \ +setenv core_iccm_3 0x6; setenv core_dccm_3 0x6;\0" + +/* + * Environment configuration + */ +#define CONFIG_BOOTFILE "uImage" +#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR + +/* Cli configuration */ +#define CONFIG_SYS_CBSIZE SZ_2K + +/* + * Callback configuration + */ +#define CONFIG_BOARD_LATE_INIT + +#endif /* _CONFIG_HSDK_H_ */ diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index 5d9ef70830f..ecf4c2e46b7 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -82,9 +82,6 @@ #define CONFIG_PHY_GIGE #define IMX_FEC_BASE 0x30BE0000 - -#define CONFIG_PHYLIB -#define CONFIG_PHY_ATHEROS #endif #define CONFIG_MFG_ENV_SETTINGS \ diff --git a/include/configs/kmp204x.h b/include/configs/kmp204x.h index 0224ac41484..e43b2f7513d 100644 --- a/include/configs/kmp204x.h +++ b/include/configs/kmp204x.h @@ -318,8 +318,6 @@ int get_scl(void); #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) -#define CONFIG_PHYLIB_10G - #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index 140076a54e7..65a38c5757b 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -27,7 +27,6 @@ #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 -#define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI /* Board Clock */ diff --git a/include/configs/lager.h b/include/configs/lager.h index db1dbc0ee88..c5001e3ec75 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -28,7 +28,6 @@ #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 -#define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI /* Board Clock */ diff --git a/include/configs/linkit-smart-7688.h b/include/configs/linkit-smart-7688.h index ca5b693e4cc..4276e95dee2 100644 --- a/include/configs/linkit-smart-7688.h +++ b/include/configs/linkit-smart-7688.h @@ -16,10 +16,30 @@ #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 -#ifdef CONFIG_BOOT_RAM +/* SPL */ +#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD) #define CONFIG_SKIP_LOWLEVEL_INIT #endif +#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SPL_BSS_START_ADDR 0x80010000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x10000 +#define CONFIG_SPL_MAX_SIZE 0x10000 +#define CONFIG_SPL_PAD_TO 0 + +/* Dummy value */ +#define CONFIG_SYS_UBOOT_BASE 0 + +/* Serial SPL */ +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL_SUPPORT) +#define CONFIG_SYS_NS16550_MEM32 +#define CONFIG_SYS_NS16550_CLK 40000000 +#define CONFIG_SYS_NS16550_REG_SIZE -4 +#define CONFIG_SYS_NS16550_COM3 0xb0000e00 +#define CONFIG_CONS_INDEX 3 + +#endif + /* UART */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ 230400, 460800, 921600 } diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h index 14008fec361..6aba6a616ea 100644 --- a/include/configs/liteboard.h +++ b/include/configs/liteboard.h @@ -143,8 +143,6 @@ #define CONFIG_FEC_MXC_PHYADDR 0x0 #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_ETHPRIME "FEC" - -#define CONFIG_PHY_SMSC #endif #define CONFIG_IMX_THERMAL diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h index 6143e9731e5..4d4c1a04f29 100644 --- a/include/configs/ls1012afrwy.h +++ b/include/configs/ls1012afrwy.h @@ -33,7 +33,8 @@ #undef BOOT_TARGET_DEVICES #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ - func(USB, usb, 0) + func(USB, usb, 0) \ + func(DHCP, dhcp, na) #endif #undef FSL_QSPI_FLASH_SIZE @@ -102,15 +103,6 @@ "env exists secureboot " \ "&& esbc_validate ${scripthdraddr};" \ "source ${scriptaddr}\0" \ - "installer=load mmc 0:2 $load_addr " \ - "/flex_installer_arm64.itb; " \ - "bootm $load_addr#$BOARD\0" \ - "qspi_bootcmd=pfe stop; echo Trying load from qspi..;" \ - "sf probe && sf read $load_addr " \ - "$kernel_addr $kernel_size; env exists secureboot " \ - "&& sf read $kernelheader_addr_r $kernelheader_addr " \ - "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ - "bootm $load_addr#$BOARD\0" \ "sd_bootcmd=pfe stop; echo Trying load from sd card..;" \ "mmcinfo; mmc read $load_addr " \ "$kernel_addr_sd $kernel_size_sd ;" \ diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 7821e98a270..912345b2ef3 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -174,8 +174,6 @@ #define CONFIG_ETHPRIME "eTSEC2" -#define CONFIG_PHY_ATHEROS - #define CONFIG_HAS_ETH0 #define CONFIG_HAS_ETH1 #define CONFIG_HAS_ETH2 diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 5a2bd754c4f..0e1eff71d22 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -419,8 +419,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_ETHPRIME "eTSEC1" -#define CONFIG_PHY_REALTEK - #define CONFIG_HAS_ETH0 #define CONFIG_HAS_ETH1 #define CONFIG_HAS_ETH2 diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index a6289850ca1..45ce460dca2 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -297,7 +297,8 @@ #ifdef CONFIG_LPUART #define CONFIG_EXTRA_ENV_SETTINGS \ - "bootargs=root=/dev/ram0 rw console=ttyLP0,115200 $othbootargs\0" \ + "bootargs=root=/dev/ram0 rw console=ttyLP0,115200 " \ + "cma=64M@0x0-0xb0000000\0" \ "initrd_high=0xffffffff\0" \ "fdt_addr=0x64f00000\0" \ "kernel_addr=0x65000000\0" \ @@ -353,7 +354,8 @@ "$kernel_size && bootm $load_addr#$board\0" #else #define CONFIG_EXTRA_ENV_SETTINGS \ - "bootargs=root=/dev/ram0 rw console=ttyS0,115200 $othbootargs\0" \ + "bootargs=root=/dev/ram0 rw console=ttyS0,115200 " \ + "cma=64M@0x0-0xb0000000\0" \ "initrd_high=0xffffffff\0" \ "fdt_addr=0x64f00000\0" \ "kernel_addr=0x61000000\0" \ diff --git a/include/configs/ls1028aqds.h b/include/configs/ls1028aqds.h index 818b994b907..b91016987b2 100644 --- a/include/configs/ls1028aqds.h +++ b/include/configs/ls1028aqds.h @@ -66,6 +66,13 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #endif +/* LPUART */ +#ifdef CONFIG_LPUART +#define CONFIG_LPUART_32B_REG +#define CFG_LPUART_MUX_MASK 0xf0 +#define CFG_LPUART_EN 0xf0 +#endif + /* SATA */ #define CONFIG_SCSI_AHCI_PLAT diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index 37080629a13..5769dc43a93 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -35,9 +35,6 @@ unsigned long get_board_ddr_clk(void); #endif #ifdef CONFIG_SYS_DPAA_FMAN -#define CONFIG_PHY_VITESSE -#define CONFIG_PHY_REALTEK -#define CONFIG_PHYLIB_10G #define RGMII_PHY1_ADDR 0x1 #define RGMII_PHY2_ADDR 0x2 #define SGMII_CARD_PORT1_PHY_ADDR 0x1C diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index f7b110cffcf..4ad51f15cb7 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -258,11 +258,6 @@ #ifndef SPL_NO_FMAN #define AQR105_IRQ_MASK 0x40000000 -#ifdef CONFIG_NET -#define CONFIG_PHY_VITESSE -#define CONFIG_PHY_REALTEK -#endif - #ifdef CONFIG_SYS_DPAA_FMAN #define RGMII_PHY1_ADDR 0x1 #define RGMII_PHY2_ADDR 0x2 diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index e80c2996ef9..24db23b3c37 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -217,6 +217,10 @@ #define LS1046A_BOOT_SRC_AND_HDR\ "boot_scripts=ls1046afrwy_boot.scr\0" \ "boot_script_hdr=hdr_ls1046afrwy_bs.out\0" +#elif defined(CONFIG_TARGET_LS1046AQDS) +#define LS1046A_BOOT_SRC_AND_HDR\ + "boot_scripts=ls1046aqds_boot.scr\0" \ + "boot_script_hdr=hdr_ls1046aqds_bs.out\0" #else #define LS1046A_BOOT_SRC_AND_HDR\ "boot_scripts=ls1046ardb_boot.scr\0" \ @@ -230,7 +234,7 @@ "ramdisk_size=0x2000000\0" \ "bootm_size=0x10000000\0" \ "fdt_addr=0x64f00000\0" \ - "kernel_addr=0x65000000\0" \ + "kernel_addr=0x61000000\0" \ "scriptaddr=0x80000000\0" \ "scripthdraddr=0x80080000\0" \ "fdtheader_addr_r=0x80100000\0" \ @@ -277,6 +281,18 @@ "&& sf read $kernelheader_addr_r $kernelheader_start " \ "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ "bootm $load_addr#$board\0" \ + "nand_bootcmd=echo Trying load from nand..;" \ + "nand info; nand read $load_addr " \ + "$kernel_start $kernel_size; env exists secureboot " \ + "&& nand read $kernelheader_addr_r $kernelheader_start " \ + "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ + "bootm $load_addr#$board\0" \ + "nor_bootcmd=echo Trying load from nor..;" \ + "cp.b $kernel_addr $load_addr " \ + "$kernel_size; env exists secureboot " \ + "&& cp.b $kernelheader_addr $kernelheader_addr_r " \ + "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ + "bootm $load_addr#$board\0" \ "sd_bootcmd=echo Trying load from SD ..;" \ "mmcinfo; mmc read $load_addr " \ "$kernel_addr_sd $kernel_size_sd && " \ diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 0b17b1e9943..9ff248cefad 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -52,9 +52,6 @@ unsigned long get_board_ddr_clk(void); #endif #ifdef CONFIG_SYS_DPAA_FMAN -#define CONFIG_PHY_VITESSE -#define CONFIG_PHY_REALTEK -#define CONFIG_PHYLIB_10G #define RGMII_PHY1_ADDR 0x1 #define RGMII_PHY2_ADDR 0x2 #define SGMII_CARD_PORT1_PHY_ADDR 0x1C @@ -440,19 +437,27 @@ unsigned long get_board_ddr_clk(void); #undef CONFIG_BOOTCOMMAND #ifdef CONFIG_TFABOOT -#define QSPI_NOR_BOOTCOMMAND "sf probe && sf read $kernel_load " \ - "e0000 f00000 && bootm $kernel_load" -#define IFC_NOR_BOOTCOMMAND "cp.b $kernel_start $kernel_load " \ - "$kernel_size && bootm $kernel_load" -#define SD_BOOTCOMMAND "mmc info; mmc read $kernel_load" \ - "$kernel_addr_sd $kernel_size_sd && bootm $kernel_load" +#define IFC_NAND_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; " \ + "env exists secureboot && esbc_halt;;" +#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd" \ + "env exists secureboot && esbc_halt;;" +#define IFC_NOR_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; " \ + "env exists secureboot && esbc_halt;;" +#define SD_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; " \ + "env exists secureboot && esbc_halt;;" #else -#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_BOOTCOMMAND "sf probe && sf read $kernel_load " \ - "e0000 f00000 && bootm $kernel_load" +#if defined(CONFIG_QSPI_BOOT) +#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; " \ + "env exists secureboot && esbc_halt;;" +#elif defined(CONFIG_NAND_BOOT) +#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; " \ + "env exists secureboot && esbc_halt;;" +#elif defined(CONFIG_SD_BOOT) +#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; " \ + "env exists secureboot && esbc_halt;;" #else -#define CONFIG_BOOTCOMMAND "cp.b $kernel_start $kernel_load " \ - "$kernel_size && bootm $kernel_load" +#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; " \ + "env exists secureboot && esbc_halt;;" #endif #endif diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index efedfd59236..10937619924 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -170,11 +170,6 @@ #define AQR105_IRQ_MASK 0x80000000 /* FMan */ #ifndef SPL_NO_FMAN - -#ifdef CONFIG_NET -#define CONFIG_PHY_REALTEK -#endif - #ifdef CONFIG_SYS_DPAA_FMAN #define RGMII_PHY1_ADDR 0x1 #define RGMII_PHY2_ADDR 0x2 diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index 4ac4a8d8568..301945fc8c7 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -549,11 +549,6 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_FSL_MC_ENET #define CONFIG_FSL_MEMAC -#define CONFIG_PHYLIB -#define CONFIG_PHYLIB_10G -#define CONFIG_PHY_VITESSE -#define CONFIG_PHY_REALTEK -#define CONFIG_PHY_TERANETICS #define RGMII_PHY1_ADDR 0x1 #define RGMII_PHY2_ADDR 0x2 #define SGMII_CARD_PORT1_PHY_ADDR 0x1C diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index b48efcc119f..7cb07048498 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -522,9 +522,6 @@ /* MAC/PHY configuration */ #ifdef CONFIG_FSL_MC_ENET -#define CONFIG_PHYLIB - -#define CONFIG_PHY_VITESSE #define AQ_PHY_ADDR1 0x00 #define AQR105_IRQ_MASK 0x00000004 diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index e93faab9a46..8ab892b5c3f 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -479,10 +479,6 @@ unsigned long get_board_ddr_clk(void); #if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) #define CONFIG_FSL_MEMAC -#define CONFIG_PHYLIB_10G -#define CONFIG_PHY_VITESSE -#define CONFIG_PHY_REALTEK -#define CONFIG_PHY_TERANETICS #define SGMII_CARD_PORT1_PHY_ADDR 0x1C #define SGMII_CARD_PORT2_PHY_ADDR 0x1d #define SGMII_CARD_PORT3_PHY_ADDR 0x1E diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index d47abf6e657..5ab924457ef 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -207,6 +207,16 @@ unsigned long get_board_ddr_clk(void); "esbc_validate 0x80680000 ;" \ "fsl_mc start mc 0x80a00000 0x80e00000\0" +#define SD2_MC_INIT_CMD \ + "mmc dev 1; mmc read 0x80a00000 0x5000 0x1200;" \ + "mmc read 0x80e00000 0x7000 0x800;" \ + "env exists secureboot && " \ + "mmc read 0x80640000 0x3200 0x20 && " \ + "mmc read 0x80680000 0x3400 0x20 && " \ + "esbc_validate 0x80640000 && " \ + "esbc_validate 0x80680000 ;" \ + "fsl_mc start mc 0x80a00000 0x80e00000\0" + #define EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ "ramdisk_addr=0x800000\0" \ @@ -274,11 +284,11 @@ unsigned long get_board_ddr_clk(void); "env exists secureboot && esbc_halt;" #define SD2_BOOTCOMMAND \ - "env exists mcinitcmd && mmcinfo; " \ + "mmc dev 1; env exists mcinitcmd && mmcinfo; " \ "mmc read 0x80d00000 0x6800 0x800; " \ "env exists mcinitcmd && env exists secureboot " \ - " && mmc read 0x80780000 0x3C00 0x20 " \ - "&& esbc_validate 0x80780000;env exists mcinitcmd " \ + " && mmc read 0x806C0000 0x3600 0x20 " \ + "&& esbc_validate 0x806C0000;env exists mcinitcmd " \ "&& fsl_mc lazyapply dpl 0x80d00000;" \ "run distro_bootcmd;run sd2_bootcmd;" \ "env exists secureboot && esbc_halt;" diff --git a/include/configs/mt7628.h b/include/configs/mt7628.h new file mode 100644 index 00000000000..9b9218d2967 --- /dev/null +++ b/include/configs/mt7628.h @@ -0,0 +1,56 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2020 MediaTek Inc. + * + * Author: Weijie Gao <weijie.gao@mediatek.com> + */ + +#ifndef __CONFIG_MT7628_H +#define __CONFIG_MT7628_H + +#define CONFIG_SYS_HZ 1000 +#define CONFIG_SYS_MIPS_TIMER_FREQ 290000000 + +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE + +#define CONFIG_SYS_MALLOC_LEN 0x100000 +#define CONFIG_SYS_BOOTPARAMS_LEN 0x20000 + +#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CONFIG_SYS_LOAD_ADDR 0x80010000 + +#define CONFIG_SYS_INIT_SP_OFFSET 0x80000 + +#define CONFIG_SYS_BOOTM_LEN 0x1000000 + +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_CBSIZE 1024 + +/* Serial SPL */ +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL_SUPPORT) +#define CONFIG_SYS_NS16550_MEM32 +#define CONFIG_SYS_NS16550_CLK 40000000 +#define CONFIG_SYS_NS16550_REG_SIZE -4 +#define CONFIG_SYS_NS16550_COM1 0xb0000c00 +#define CONFIG_CONS_INDEX 1 +#endif + +/* Serial common */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ + 230400, 460800, 921600 } + +/* SPL */ +#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD) +#define CONFIG_SKIP_LOWLEVEL_INIT +#endif + +#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SPL_BSS_START_ADDR 0x80010000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x10000 +#define CONFIG_SPL_MAX_SIZE 0x10000 +#define CONFIG_SPL_PAD_TO 0 + +/* Dummy value */ +#define CONFIG_SYS_UBOOT_BASE 0 + +#endif /* __CONFIG_MT7628_H */ diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h index a6690367f8c..e10e7688e9f 100644 --- a/include/configs/mx6cuboxi.h +++ b/include/configs/mx6cuboxi.h @@ -32,7 +32,6 @@ #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_MXC_PHYADDR 0 -#define CONFIG_PHY_ATHEROS /* Framebuffer */ #define CONFIG_VIDEO_BMP_RLE8 diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h index 0bcf031953f..984cf611f4c 100644 --- a/include/configs/mx6sxsabreauto.h +++ b/include/configs/mx6sxsabreauto.h @@ -134,8 +134,6 @@ #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" -#define CONFIG_PHY_ATHEROS - #ifdef CONFIG_CMD_USB #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 55aace1c6e7..86007a2d36f 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -157,8 +157,6 @@ #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" -#define CONFIG_PHY_ATHEROS - #ifdef CONFIG_CMD_USB #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/ot1200.h b/include/configs/ot1200.h index c8ebe3e390d..3a1ea0fc10d 100644 --- a/include/configs/ot1200.h +++ b/include/configs/ot1200.h @@ -66,7 +66,6 @@ #define CONFIG_FEC_XCV_TYPE MII100 #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 0x5 -#define CONFIG_PHY_SMSC #ifndef CONFIG_SPL #define CONFIG_ENV_EEPROM_IS_ON_I2C diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h index 3ff75663ea1..6dc5039560e 100644 --- a/include/configs/p1_twr.h +++ b/include/configs/p1_twr.h @@ -11,7 +11,6 @@ #if defined(CONFIG_TWR_P1025) #define CONFIG_BOARDNAME "TWR-P1025" -#define CONFIG_PHY_ATHEROS #define CONFIG_SYS_LBC_LBCR 0x00080000 /* Conversion of LBC addr */ #define CONFIG_SYS_LBC_LCRR 0x80000002 /* LB clock ratio reg */ #endif diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h index fdbc07575cf..290e652ec98 100644 --- a/include/configs/pcm051.h +++ b/include/configs/pcm051.h @@ -128,6 +128,4 @@ #define CONFIG_AM335X_USB1 #define CONFIG_AM335X_USB1_MODE MUSB_HOST -#define CONFIG_PHY_SMSC - #endif /* ! __CONFIG_PCM051_H */ diff --git a/include/configs/pengwyn.h b/include/configs/pengwyn.h index 8a0506911d2..17d1981b4ee 100644 --- a/include/configs/pengwyn.h +++ b/include/configs/pengwyn.h @@ -162,7 +162,5 @@ /* Network */ #define CONFIG_PHY_RESET 1 -#define CONFIG_PHY_NATSEMI -#define CONFIG_PHY_REALTEK #endif /* ! __CONFIG_PENGWYN_H */ diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h index 2f641d3831d..1a89c56f41a 100644 --- a/include/configs/pic32mzdask.h +++ b/include/configs/pic32mzdask.h @@ -57,7 +57,6 @@ /*----------------------------------------------------------------------- * Networking Configuration */ -#define CONFIG_PHY_SMSC #define CONFIG_SYS_RX_ETH_BUFFER 8 #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_ARP_TIMEOUT 500 /* millisec */ diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h index 376370b07de..7cc55cb8d5f 100644 --- a/include/configs/pico-imx6.h +++ b/include/configs/pico-imx6.h @@ -146,8 +146,6 @@ #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 1 -#define CONFIG_PHYLIB -#define CONFIG_PHY_ATHEROS /* Framebuffer */ #define CONFIG_VIDEO_BMP_RLE8 diff --git a/include/configs/porter.h b/include/configs/porter.h index db42176d28e..7ffcf5fc38a 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -32,7 +32,6 @@ #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 -#define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI /* Board Clock */ diff --git a/include/configs/pxm2.h b/include/configs/pxm2.h index 543eb2d6fbc..ab9c116034f 100644 --- a/include/configs/pxm2.h +++ b/include/configs/pxm2.h @@ -36,8 +36,6 @@ #define CONFIG_SYS_I2C_SPEED 400000 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 -#define CONFIG_PHY_ATHEROS - #define CONFIG_FACTORYSET #ifndef CONFIG_SPL_BUILD diff --git a/include/configs/rastaban.h b/include/configs/rastaban.h index bd5e00e10cd..7f1284448cf 100644 --- a/include/configs/rastaban.h +++ b/include/configs/rastaban.h @@ -41,8 +41,6 @@ #define EEPROM_ADDR_DDR3 0x90 #define EEPROM_ADDR_CHIP 0x120 -#define CONFIG_PHY_SMSC - #define CONFIG_FACTORYSET /* Define own nand partitions */ diff --git a/include/configs/rut.h b/include/configs/rut.h index 296bdc26ff9..0dcdb101a04 100644 --- a/include/configs/rut.h +++ b/include/configs/rut.h @@ -31,8 +31,6 @@ #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 byte pages */ #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* take up to 10 msec */ -#define CONFIG_PHY_NATSEMI - #define CONFIG_FACTORYSET /* Watchdog */ diff --git a/include/configs/salvator-x.h b/include/configs/salvator-x.h index 669602eb60e..84c6ca95eaf 100644 --- a/include/configs/salvator-x.h +++ b/include/configs/salvator-x.h @@ -12,7 +12,6 @@ #include "rcar-gen3-common.h" /* Ethernet RAVB */ -#define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI /* Generic Timer Definitions (use in assembler source) */ diff --git a/include/configs/sc_sps_1.h b/include/configs/sc_sps_1.h index 8db2772d758..3484bfebf2e 100644 --- a/include/configs/sc_sps_1.h +++ b/include/configs/sc_sps_1.h @@ -28,7 +28,6 @@ /* FEC Ethernet on SoC */ #ifdef CONFIG_CMD_NET #define CONFIG_FEC_MXC -#define CONFIG_PHY_SMSC #endif /* USB */ diff --git a/include/configs/sh7752evb.h b/include/configs/sh7752evb.h index 3a1f1ac288c..c45b33a91a9 100644 --- a/include/configs/sh7752evb.h +++ b/include/configs/sh7752evb.h @@ -43,10 +43,8 @@ #define CONFIG_SH_ETHER_PHY_ADDR 18 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 1 #define CONFIG_SH_ETHER_USE_GETHER 1 -#define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII -#define CONFIG_PHY_VITESSE #define SH7752EVB_ETHERNET_MAC_BASE_SPI 0x00090000 #define SH7752EVB_SPI_SECTOR_SIZE (64 * 1024) diff --git a/include/configs/sh7753evb.h b/include/configs/sh7753evb.h index 5253a5be322..70e7fb93248 100644 --- a/include/configs/sh7753evb.h +++ b/include/configs/sh7753evb.h @@ -43,10 +43,8 @@ #define CONFIG_SH_ETHER_PHY_ADDR 18 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 1 #define CONFIG_SH_ETHER_USE_GETHER 1 -#define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII -#define CONFIG_PHY_VITESSE #define SH7753EVB_ETHERNET_MAC_BASE_SPI 0x00090000 #define SH7753EVB_SPI_SECTOR_SIZE (64 * 1024) diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h index d46aaad4410..6a34dc7954b 100644 --- a/include/configs/sh7757lcr.h +++ b/include/configs/sh7757lcr.h @@ -45,7 +45,6 @@ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 1 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 1 -#define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII diff --git a/include/configs/sh7763rdp.h b/include/configs/sh7763rdp.h index 2e79fea053a..5122c8bf44f 100644 --- a/include/configs/sh7763rdp.h +++ b/include/configs/sh7763rdp.h @@ -64,7 +64,6 @@ /* Ether */ #define CONFIG_SH_ETHER_USE_PORT (1) #define CONFIG_SH_ETHER_PHY_ADDR (0x01) -#define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII diff --git a/include/configs/silk.h b/include/configs/silk.h index a78da46a17c..eee60fdfabd 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -32,7 +32,6 @@ #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 -#define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI /* Board Clock */ diff --git a/include/configs/spear6xx_evb.h b/include/configs/spear6xx_evb.h index cfadfc8e484..4fedc9efcec 100644 --- a/include/configs/spear6xx_evb.h +++ b/include/configs/spear6xx_evb.h @@ -29,7 +29,6 @@ #define CONFIG_SYS_NAND_BASE 0xD2000000 /* Ethernet PHY configuration */ -#define CONFIG_PHY_NATSEMI /* Environment Settings */ #define CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_USBTTY diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h index 45343d23237..529152f60c8 100644 --- a/include/configs/stm32f746-disco.h +++ b/include/configs/stm32f746-disco.h @@ -33,7 +33,6 @@ #define CONFIG_DW_GMAC_DEFAULT_DMA_PBL (8) #define CONFIG_DW_ALTDESCRIPTOR -#define CONFIG_PHY_SMSC #define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ diff --git a/include/configs/stout.h b/include/configs/stout.h index 67345958be2..a1e7e86f39a 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -36,7 +36,6 @@ #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 -#define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI /* Board Clock */ diff --git a/include/configs/strider.h b/include/configs/strider.h index ac9fce80cec..06a86bbc208 100644 --- a/include/configs/strider.h +++ b/include/configs/strider.h @@ -326,7 +326,6 @@ void fpga_control_clear(unsigned int bus, int pin); /* * Software (bit-bang) MII driver configuration */ -#define CONFIG_BITBANGMII /* bit-bang MII PHY management */ #define CONFIG_BITBANGMII_MULTI /* diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 0ef289fd642..5b0bec05616 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -272,10 +272,6 @@ extern int soft_i2c_gpio_scl; /* Ethernet support */ -#ifdef CONFIG_SUN7I_GMAC -#define CONFIG_PHY_REALTEK -#endif - #ifdef CONFIG_USB_EHCI_HCD #define CONFIG_USB_OHCI_NEW #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 diff --git a/include/configs/tb100.h b/include/configs/tb100.h index a761c373352..ae545206963 100644 --- a/include/configs/tb100.h +++ b/include/configs/tb100.h @@ -38,7 +38,6 @@ * Until Realtek PHY driver is fixed fall back to generic PHY driver * which implements all required functionality and behaves much more stable. * - * #define CONFIG_PHY_REALTEK * */ diff --git a/include/configs/thuban.h b/include/configs/thuban.h index d909be9b019..15a8469feff 100644 --- a/include/configs/thuban.h +++ b/include/configs/thuban.h @@ -34,8 +34,6 @@ #define EEPROM_ADDR_DDR3 0x90 #define EEPROM_ADDR_CHIP 0x120 -#define CONFIG_PHY_SMSC - #define CONFIG_FACTORYSET /* Define own nand partitions */ diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index 46b1b41ef9c..cc32729496f 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -152,7 +152,6 @@ #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 -#define CONFIG_PHY_ET1011C #define CONFIG_PHY_ET1011C_TX_CLK_FIX #endif /* ! __CONFIG_TI814X_EVM_H */ diff --git a/include/configs/tqma6_wru4.h b/include/configs/tqma6_wru4.h index 13b87e9b52d..4c4a1a0ee6d 100644 --- a/include/configs/tqma6_wru4.h +++ b/include/configs/tqma6_wru4.h @@ -10,7 +10,6 @@ #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 0x01 -#define CONFIG_PHY_SMSC /* UART */ #define CONFIG_MXC_UART_BASE UART4_BASE diff --git a/include/configs/ts4800.h b/include/configs/ts4800.h index bd50d3b19c3..e563f3fe8af 100644 --- a/include/configs/ts4800.h +++ b/include/configs/ts4800.h @@ -50,7 +50,6 @@ /* * Eth Configs */ -#define CONFIG_PHY_SMSC #define CONFIG_FEC_MXC #define IMX_FEC_BASE FEC_BASE_ADDR diff --git a/include/configs/turris_mox.h b/include/configs/turris_mox.h index 9409344338e..e414f90fe1e 100644 --- a/include/configs/turris_mox.h +++ b/include/configs/turris_mox.h @@ -69,7 +69,6 @@ #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ #define CONFIG_ARP_TIMEOUT 200 #define CONFIG_NET_RETRY_COUNT 50 -#define CONFIG_PHY_MARVELL #define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3) diff --git a/include/configs/ulcb.h b/include/configs/ulcb.h index 1d99dcaba66..e006ad280b4 100644 --- a/include/configs/ulcb.h +++ b/include/configs/ulcb.h @@ -12,7 +12,6 @@ #include "rcar-gen3-common.h" /* Ethernet RAVB */ -#define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI /* Generic Timer Definitions (use in assembler source) */ diff --git a/include/configs/vinco.h b/include/configs/vinco.h index a709502d437..83ec78dc431 100644 --- a/include/configs/vinco.h +++ b/include/configs/vinco.h @@ -54,7 +54,6 @@ /* USB device */ /* Ethernet Hardware */ -#define CONFIG_PHY_SMSC #define CONFIG_MACB #define CONFIG_RMII #define CONFIG_NET_RETRY_COUNT 20 diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h index 61d9c620682..7120aa64df6 100644 --- a/include/configs/vining_2000.h +++ b/include/configs/vining_2000.h @@ -64,8 +64,6 @@ #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_ETHPRIME "FEC" -#define CONFIG_PHY_ATHEROS - #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h new file mode 100644 index 00000000000..8100e4dca7b --- /dev/null +++ b/include/configs/vocore2.h @@ -0,0 +1,54 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2019 Mauro Condarelli <mc5686@mclink.it> + */ + +#ifndef __VOCORE2_CONFIG_H__ +#define __VOCORE2_CONFIG_H__ + +/* CPU */ +#define CONFIG_SYS_MIPS_TIMER_FREQ 290000000 + +/* RAM */ +#define CONFIG_SYS_SDRAM_BASE 0x80000000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + 0x100000 + +#define CONFIG_SYS_INIT_SP_OFFSET 0x400000 + +/* SPL */ +#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD) +#define CONFIG_SKIP_LOWLEVEL_INIT +#endif + +#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SPL_BSS_START_ADDR 0x80010000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x10000 +#define CONFIG_SPL_MAX_SIZE 0x10000 + +/* Dummy value */ +#define CONFIG_SYS_UBOOT_BASE 0 + +/* Serial SPL */ +#define CONFIG_SYS_NS16550_MEM32 +#define CONFIG_SYS_NS16550_CLK 40000000 +#define CONFIG_SYS_NS16550_REG_SIZE -4 +#define CONFIG_SYS_NS16550_COM3 0xb0000e00 +#define CONFIG_CONS_INDEX 3 + +/* RAM */ +#define CONFIG_SYS_MEMTEST_START 0x80100000 +#define CONFIG_SYS_MEMTEST_END 0x80400000 + +/* Memory usage */ +#define CONFIG_SYS_MAXARGS 64 +#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) +#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) +#define CONFIG_SYS_CBSIZE 512 + +/* U-Boot */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE + +/* Environment settings */ + +#endif //__VOCORE2_CONFIG_H__ diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index f73946b935a..54d211ab664 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -46,7 +46,6 @@ * Ethernet Driver */ -#define CONFIG_PHY_SMSC #define CONFIG_LPC32XX_ETH #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* FIXME: remove "Waiting for PHY auto negotiation to complete..." message */ diff --git a/include/configs/x530.h b/include/configs/x530.h index b6bff223789..290e13de007 100644 --- a/include/configs/x530.h +++ b/include/configs/x530.h @@ -60,7 +60,6 @@ /* Environment in SPI NOR flash */ -#define CONFIG_PHY_MARVELL /* there is a marvell phy */ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ /* PCIe support */ diff --git a/include/configs/xpress.h b/include/configs/xpress.h index dbdd812506b..1bc46f6fb28 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -67,7 +67,6 @@ #define CONFIG_FEC_MXC_PHYADDR 0x0 #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_ETHPRIME "FEC" -#define CONFIG_PHY_SMSC #define CONFIG_IMX_THERMAL diff --git a/include/configs/zc5202.h b/include/configs/zc5202.h index 77ff04754bc..7246b9eb652 100644 --- a/include/configs/zc5202.h +++ b/include/configs/zc5202.h @@ -20,7 +20,6 @@ #define CONFIG_FEC_XCV_TYPE MII100 #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 0 -#define CONFIG_MV88E6352_SWITCH #define CONFIG_PCI_SCAN_SHOW #define CONFIG_PCIE_IMX diff --git a/include/dt-bindings/clock/g12a-clkc.h b/include/dt-bindings/clock/g12a-clkc.h index 0837c1a7ae4..b0d65d73db9 100644 --- a/include/dt-bindings/clock/g12a-clkc.h +++ b/include/dt-bindings/clock/g12a-clkc.h @@ -143,5 +143,7 @@ #define CLKID_CPU1_CLK 253 #define CLKID_CPU2_CLK 254 #define CLKID_CPU3_CLK 255 +#define CLKID_SPICC0_SCLK 258 +#define CLKID_SPICC1_SCLK 261 #endif /* __G12A_CLKC_H */ diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h index db0763e9617..4073eb7a9da 100644 --- a/include/dt-bindings/clock/gxbb-clkc.h +++ b/include/dt-bindings/clock/gxbb-clkc.h @@ -146,5 +146,6 @@ #define CLKID_CTS_VDAC 201 #define CLKID_HDMI_TX 202 #define CLKID_HDMI 205 +#define CLKID_ACODEC 206 #endif /* __GXBB_CLKC_H */ diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h index 20641fa68e7..c92ff1e6022 100644 --- a/include/dt-bindings/clock/r8a7790-clock.h +++ b/include/dt-bindings/clock/r8a7790-clock.h @@ -1,10 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright 2013 Ideas On Board SPRL - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. */ #ifndef __DT_BINDINGS_CLOCK_R8A7790_H__ diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h index ef692134146..bb4f18b1b3d 100644 --- a/include/dt-bindings/clock/r8a7791-clock.h +++ b/include/dt-bindings/clock/r8a7791-clock.h @@ -1,10 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright 2013 Ideas On Board SPRL - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. */ #ifndef __DT_BINDINGS_CLOCK_R8A7791_H__ diff --git a/include/dt-bindings/clock/r8a7792-clock.h b/include/dt-bindings/clock/r8a7792-clock.h index 5be90bc23bd..2948d9ce3a1 100644 --- a/include/dt-bindings/clock/r8a7792-clock.h +++ b/include/dt-bindings/clock/r8a7792-clock.h @@ -1,10 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2016 Cogent Embedded, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. */ #ifndef __DT_BINDINGS_CLOCK_R8A7792_H__ diff --git a/include/dt-bindings/clock/snps,hsdk-cgu.h b/include/dt-bindings/clock/snps,hsdk-cgu.h index 2cfe34eb35f..1ce7661cd93 100644 --- a/include/dt-bindings/clock/snps,hsdk-cgu.h +++ b/include/dt-bindings/clock/snps,hsdk-cgu.h @@ -36,7 +36,8 @@ #define CLK_TUN_TUN 21 #define CLK_TUN_ROM 22 #define CLK_TUN_PWM 23 -#define CLK_HDMI_PLL 24 -#define CLK_HDMI 25 +#define CLK_TUN_TIMER 24 +#define CLK_HDMI_PLL 25 +#define CLK_HDMI 26 #endif /* __DT_BINDINGS_CLK_HSDK_CGU_H_ */ diff --git a/include/dt-bindings/power/r8a7790-sysc.h b/include/dt-bindings/power/r8a7790-sysc.h index 6af4e9929bd..bcb49057060 100644 --- a/include/dt-bindings/power/r8a7790-sysc.h +++ b/include/dt-bindings/power/r8a7790-sysc.h @@ -1,9 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2016 Glider bvba - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. */ #ifndef __DT_BINDINGS_POWER_R8A7790_SYSC_H__ #define __DT_BINDINGS_POWER_R8A7790_SYSC_H__ diff --git a/include/dt-bindings/power/r8a7791-sysc.h b/include/dt-bindings/power/r8a7791-sysc.h index 1403baa0514..1d20fae4242 100644 --- a/include/dt-bindings/power/r8a7791-sysc.h +++ b/include/dt-bindings/power/r8a7791-sysc.h @@ -1,9 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2016 Glider bvba - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. */ #ifndef __DT_BINDINGS_POWER_R8A7791_SYSC_H__ #define __DT_BINDINGS_POWER_R8A7791_SYSC_H__ diff --git a/include/dt-bindings/power/r8a7792-sysc.h b/include/dt-bindings/power/r8a7792-sysc.h index 74f4a78e29a..dd3a4667ca1 100644 --- a/include/dt-bindings/power/r8a7792-sysc.h +++ b/include/dt-bindings/power/r8a7792-sysc.h @@ -1,9 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2016 Cogent Embedded Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. */ #ifndef __DT_BINDINGS_POWER_R8A7792_SYSC_H__ #define __DT_BINDINGS_POWER_R8A7792_SYSC_H__ diff --git a/include/dt-bindings/power/r8a7793-sysc.h b/include/dt-bindings/power/r8a7793-sysc.h index b5693df3d83..056998c635a 100644 --- a/include/dt-bindings/power/r8a7793-sysc.h +++ b/include/dt-bindings/power/r8a7793-sysc.h @@ -1,9 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2016 Glider bvba - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. */ #ifndef __DT_BINDINGS_POWER_R8A7793_SYSC_H__ #define __DT_BINDINGS_POWER_R8A7793_SYSC_H__ diff --git a/include/fdt_region.h b/include/fdt_region.h new file mode 100644 index 00000000000..ff7a1ccb9af --- /dev/null +++ b/include/fdt_region.h @@ -0,0 +1,304 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef _FDT_REGION_H +#define _FDT_REGION_H + +#ifndef SWIG /* Not available in Python */ +struct fdt_region { + int offset; + int size; +}; + +/* + * Flags for fdt_find_regions() + * + * Add a region for the string table (always the last region) + */ +#define FDT_REG_ADD_STRING_TAB (1 << 0) + +/* + * Add all supernodes of a matching node/property, useful for creating a + * valid subset tree + */ +#define FDT_REG_SUPERNODES (1 << 1) + +/* Add the FDT_BEGIN_NODE tags of subnodes, including their names */ +#define FDT_REG_DIRECT_SUBNODES (1 << 2) + +/* Add all subnodes of a matching node */ +#define FDT_REG_ALL_SUBNODES (1 << 3) + +/* Add a region for the mem_rsvmap table (always the first region) */ +#define FDT_REG_ADD_MEM_RSVMAP (1 << 4) + +/* Indicates what an fdt part is (node, property, value) */ +#define FDT_IS_NODE (1 << 0) +#define FDT_IS_PROP (1 << 1) +#define FDT_IS_VALUE (1 << 2) /* not supported */ +#define FDT_IS_COMPAT (1 << 3) /* used internally */ +#define FDT_NODE_HAS_PROP (1 << 4) /* node contains prop */ + +#define FDT_ANY_GLOBAL (FDT_IS_NODE | FDT_IS_PROP | FDT_IS_VALUE | \ + FDT_IS_COMPAT) +#define FDT_IS_ANY 0x1f /* all the above */ + +/* We set a reasonable limit on the number of nested nodes */ +#define FDT_MAX_DEPTH 32 + +/* Decribes what we want to include from the current tag */ +enum want_t { + WANT_NOTHING, + WANT_NODES_ONLY, /* No properties */ + WANT_NODES_AND_PROPS, /* Everything for one level */ + WANT_ALL_NODES_AND_PROPS /* Everything for all levels */ +}; + +/* Keeps track of the state at parent nodes */ +struct fdt_subnode_stack { + int offset; /* Offset of node */ + enum want_t want; /* The 'want' value here */ + int included; /* 1 if we included this node, 0 if not */ +}; + +struct fdt_region_ptrs { + int depth; /* Current tree depth */ + int done; /* What we have completed scanning */ + enum want_t want; /* What we are currently including */ + char *end; /* Pointer to end of full node path */ + int nextoffset; /* Next node offset to check */ +}; + +/* The state of our finding algortihm */ +struct fdt_region_state { + struct fdt_subnode_stack stack[FDT_MAX_DEPTH]; /* node stack */ + struct fdt_region *region; /* Contains list of regions found */ + int count; /* Numnber of regions found */ + const void *fdt; /* FDT blob */ + int max_regions; /* Maximum regions to find */ + int can_merge; /* 1 if we can merge with previous region */ + int start; /* Start position of current region */ + struct fdt_region_ptrs ptrs; /* Pointers for what we are up to */ +}; + +/** + * fdt_find_regions() - find regions in device tree + * + * Given a list of nodes to include and properties to exclude, find + * the regions of the device tree which describe those included parts. + * + * The intent is to get a list of regions which will be invariant provided + * those parts are invariant. For example, if you request a list of regions + * for all nodes but exclude the property "data", then you will get the + * same region contents regardless of any change to "data" properties. + * + * This function can be used to produce a byte-stream to send to a hashing + * function to verify that critical parts of the FDT have not changed. + * + * Nodes which are given in 'inc' are included in the region list, as + * are the names of the immediate subnodes nodes (but not the properties + * or subnodes of those subnodes). + * + * For eaxample "/" means to include the root node, all root properties + * and the FDT_BEGIN_NODE and FDT_END_NODE of all subnodes of /. The latter + * ensures that we capture the names of the subnodes. In a hashing situation + * it prevents the root node from changing at all Any change to non-excluded + * properties, names of subnodes or number of subnodes would be detected. + * + * When used with FITs this provides the ability to hash and sign parts of + * the FIT based on different configurations in the FIT. Then it is + * impossible to change anything about that configuration (include images + * attached to the configuration), but it may be possible to add new + * configurations, new images or new signatures within the existing + * framework. + * + * Adding new properties to a device tree may result in the string table + * being extended (if the new property names are different from those + * already added). This function can optionally include a region for + * the string table so that this can be part of the hash too. + * + * The device tree header is not included in the list. + * + * @fdt: Device tree to check + * @inc: List of node paths to included + * @inc_count: Number of node paths in list + * @exc_prop: List of properties names to exclude + * @exc_prop_count: Number of properties in exclude list + * @region: Returns list of regions + * @max_region: Maximum length of region list + * @path: Pointer to a temporary string for the function to use for + * building path names + * @path_len: Length of path, must be large enough to hold the longest + * path in the tree + * @add_string_tab: 1 to add a region for the string table + * @return number of regions in list. If this is >max_regions then the + * region array was exhausted. You should increase max_regions and try + * the call again. + */ +int fdt_find_regions(const void *fdt, char * const inc[], int inc_count, + char * const exc_prop[], int exc_prop_count, + struct fdt_region region[], int max_regions, + char *path, int path_len, int add_string_tab); + +/** + * fdt_first_region() - find regions in device tree + * + * Given a nodes and properties to include and properties to exclude, find + * the regions of the device tree which describe those included parts. + * + * The use for this function is twofold. Firstly it provides a convenient + * way of performing a structure-aware grep of the tree. For example it is + * possible to grep for a node and get all the properties associated with + * that node. Trees can be subsetted easily, by specifying the nodes that + * are required, and then writing out the regions returned by this function. + * This is useful for small resource-constrained systems, such as boot + * loaders, which want to use an FDT but do not need to know about all of + * it. + * + * Secondly it makes it easy to hash parts of the tree and detect changes. + * The intent is to get a list of regions which will be invariant provided + * those parts are invariant. For example, if you request a list of regions + * for all nodes but exclude the property "data", then you will get the + * same region contents regardless of any change to "data" properties. + * + * This function can be used to produce a byte-stream to send to a hashing + * function to verify that critical parts of the FDT have not changed. + * Note that semantically null changes in order could still cause false + * hash misses. Such reordering might happen if the tree is regenerated + * from source, and nodes are reordered (the bytes-stream will be emitted + * in a different order and many hash functions will detect this). However + * if an existing tree is modified using libfdt functions, such as + * fdt_add_subnode() and fdt_setprop(), then this problem is avoided. + * + * The nodes/properties to include/exclude are defined by a function + * provided by the caller. This function is called for each node and + * property, and must return: + * + * 0 - to exclude this part + * 1 - to include this part + * -1 - for FDT_IS_PROP only: no information is available, so include + * if its containing node is included + * + * The last case is only used to deal with properties. Often a property is + * included if its containing node is included - this is the case where + * -1 is returned.. However if the property is specifically required to be + * included/excluded, then 0 or 1 can be returned. Note that including a + * property when the FDT_REG_SUPERNODES flag is given will force its + * containing node to be included since it is not valid to have a property + * that is not in a node. + * + * Using the information provided, the inclusion of a node can be controlled + * either by a node name or its compatible string, or any other property + * that the function can determine. + * + * As an example, including node "/" means to include the root node and all + * root properties. A flag provides a way of also including supernodes (of + * which there is none for the root node), and another flag includes + * immediate subnodes, so in this case we would get the FDT_BEGIN_NODE and + * FDT_END_NODE of all subnodes of /. + * + * The subnode feature helps in a hashing situation since it prevents the + * root node from changing at all. Any change to non-excluded properties, + * names of subnodes or number of subnodes would be detected. + * + * When used with FITs this provides the ability to hash and sign parts of + * the FIT based on different configurations in the FIT. Then it is + * impossible to change anything about that configuration (include images + * attached to the configuration), but it may be possible to add new + * configurations, new images or new signatures within the existing + * framework. + * + * Adding new properties to a device tree may result in the string table + * being extended (if the new property names are different from those + * already added). This function can optionally include a region for + * the string table so that this can be part of the hash too. This is always + * the last region. + * + * The FDT also has a mem_rsvmap table which can also be included, and is + * always the first region if so. + * + * The device tree header is not included in the region list. Since the + * contents of the FDT are changing (shrinking, often), the caller will need + * to regenerate the header anyway. + * + * @fdt: Device tree to check + * @h_include: Function to call to determine whether to include a part or + * not: + * + * @priv: Private pointer as passed to fdt_find_regions() + * @fdt: Pointer to FDT blob + * @offset: Offset of this node / property + * @type: Type of this part, FDT_IS_... + * @data: Pointer to data (node name, property name, compatible + * string, value (not yet supported) + * @size: Size of data, or 0 if none + * @return 0 to exclude, 1 to include, -1 if no information is + * available + * @priv: Private pointer passed to h_include + * @region: Returns list of regions, sorted by offset + * @max_regions: Maximum length of region list + * @path: Pointer to a temporary string for the function to use for + * building path names + * @path_len: Length of path, must be large enough to hold the longest + * path in the tree + * @flags: Various flags that control the region algortihm, see + * FDT_REG_... + * @return number of regions in list. If this is >max_regions then the + * region array was exhausted. You should increase max_regions and try + * the call again. Only the first max_regions elements are available in the + * array. + * + * On error a -ve value is return, which can be: + * + * -FDT_ERR_BADSTRUCTURE (too deep or more END tags than BEGIN tags + * -FDT_ERR_BADLAYOUT + * -FDT_ERR_NOSPACE (path area is too small) + */ +int fdt_first_region(const void *fdt, + int (*h_include)(void *priv, const void *fdt, int offset, + int type, const char *data, int size), + void *priv, struct fdt_region *region, + char *path, int path_len, int flags, + struct fdt_region_state *info); + +/** fdt_next_region() - find next region + * + * See fdt_first_region() for full description. This function finds the + * next region according to the provided parameters, which must be the same + * as passed to fdt_first_region(). + * + * This function can additionally return -FDT_ERR_NOTFOUND when there are no + * more regions + */ +int fdt_next_region(const void *fdt, + int (*h_include)(void *priv, const void *fdt, int offset, + int type, const char *data, int size), + void *priv, struct fdt_region *region, + char *path, int path_len, int flags, + struct fdt_region_state *info); + +/** + * fdt_add_alias_regions() - find aliases that point to existing regions + * + * Once a device tree grep is complete some of the nodes will be present + * and some will have been dropped. This function checks all the alias nodes + * to figure out which points point to nodes which are still present. These + * aliases need to be kept, along with the nodes they reference. + * + * Given a list of regions function finds the aliases that still apply and + * adds more regions to the list for these. This function is called after + * fdt_next_region() has finished returning regions and requires the same + * state. + * + * @fdt: Device tree file to reference + * @region: List of regions that will be kept + * @count: Number of regions + * @max_regions: Number of entries that can fit in @region + * @info: Region state as returned from fdt_next_region() + * @return new number of regions in @region (i.e. count + the number added) + * or -FDT_ERR_NOSPACE if there was not enough space. + */ +int fdt_add_alias_regions(const void *fdt, struct fdt_region *region, int count, + int max_regions, struct fdt_region_state *info); +#endif /* SWIG */ + +#endif /* _FDT_REGION_H */ diff --git a/include/fsl_mdio.h b/include/fsl_mdio.h index b87346ce7ca..8857d50910e 100644 --- a/include/fsl_mdio.h +++ b/include/fsl_mdio.h @@ -53,6 +53,7 @@ int memac_mdio_write(struct mii_dev *bus, int port_addr, int dev_addr, int regnum, u16 value); int memac_mdio_read(struct mii_dev *bus, int port_addr, int dev_addr, int regnum); +int memac_mdio_reset(struct mii_dev *bus); struct fsl_pq_mdio_info { struct tsec_mii_mng __iomem *regs; diff --git a/include/linux/libfdt.h b/include/linux/libfdt.h index eeb2344971f..39dbc88aa54 100644 --- a/include/linux/libfdt.h +++ b/include/linux/libfdt.h @@ -8,305 +8,6 @@ #include "../../scripts/dtc/libfdt/libfdt.h" /* U-Boot local hacks */ - -#ifndef SWIG /* Not available in Python */ -struct fdt_region { - int offset; - int size; -}; - -/* - * Flags for fdt_find_regions() - * - * Add a region for the string table (always the last region) - */ -#define FDT_REG_ADD_STRING_TAB (1 << 0) - -/* - * Add all supernodes of a matching node/property, useful for creating a - * valid subset tree - */ -#define FDT_REG_SUPERNODES (1 << 1) - -/* Add the FDT_BEGIN_NODE tags of subnodes, including their names */ -#define FDT_REG_DIRECT_SUBNODES (1 << 2) - -/* Add all subnodes of a matching node */ -#define FDT_REG_ALL_SUBNODES (1 << 3) - -/* Add a region for the mem_rsvmap table (always the first region) */ -#define FDT_REG_ADD_MEM_RSVMAP (1 << 4) - -/* Indicates what an fdt part is (node, property, value) */ -#define FDT_IS_NODE (1 << 0) -#define FDT_IS_PROP (1 << 1) -#define FDT_IS_VALUE (1 << 2) /* not supported */ -#define FDT_IS_COMPAT (1 << 3) /* used internally */ -#define FDT_NODE_HAS_PROP (1 << 4) /* node contains prop */ - -#define FDT_ANY_GLOBAL (FDT_IS_NODE | FDT_IS_PROP | FDT_IS_VALUE | \ - FDT_IS_COMPAT) -#define FDT_IS_ANY 0x1f /* all the above */ - -/* We set a reasonable limit on the number of nested nodes */ -#define FDT_MAX_DEPTH 32 - -/* Decribes what we want to include from the current tag */ -enum want_t { - WANT_NOTHING, - WANT_NODES_ONLY, /* No properties */ - WANT_NODES_AND_PROPS, /* Everything for one level */ - WANT_ALL_NODES_AND_PROPS /* Everything for all levels */ -}; - -/* Keeps track of the state at parent nodes */ -struct fdt_subnode_stack { - int offset; /* Offset of node */ - enum want_t want; /* The 'want' value here */ - int included; /* 1 if we included this node, 0 if not */ -}; - -struct fdt_region_ptrs { - int depth; /* Current tree depth */ - int done; /* What we have completed scanning */ - enum want_t want; /* What we are currently including */ - char *end; /* Pointer to end of full node path */ - int nextoffset; /* Next node offset to check */ -}; - -/* The state of our finding algortihm */ -struct fdt_region_state { - struct fdt_subnode_stack stack[FDT_MAX_DEPTH]; /* node stack */ - struct fdt_region *region; /* Contains list of regions found */ - int count; /* Numnber of regions found */ - const void *fdt; /* FDT blob */ - int max_regions; /* Maximum regions to find */ - int can_merge; /* 1 if we can merge with previous region */ - int start; /* Start position of current region */ - struct fdt_region_ptrs ptrs; /* Pointers for what we are up to */ -}; - -/** - * fdt_find_regions() - find regions in device tree - * - * Given a list of nodes to include and properties to exclude, find - * the regions of the device tree which describe those included parts. - * - * The intent is to get a list of regions which will be invariant provided - * those parts are invariant. For example, if you request a list of regions - * for all nodes but exclude the property "data", then you will get the - * same region contents regardless of any change to "data" properties. - * - * This function can be used to produce a byte-stream to send to a hashing - * function to verify that critical parts of the FDT have not changed. - * - * Nodes which are given in 'inc' are included in the region list, as - * are the names of the immediate subnodes nodes (but not the properties - * or subnodes of those subnodes). - * - * For eaxample "/" means to include the root node, all root properties - * and the FDT_BEGIN_NODE and FDT_END_NODE of all subnodes of /. The latter - * ensures that we capture the names of the subnodes. In a hashing situation - * it prevents the root node from changing at all Any change to non-excluded - * properties, names of subnodes or number of subnodes would be detected. - * - * When used with FITs this provides the ability to hash and sign parts of - * the FIT based on different configurations in the FIT. Then it is - * impossible to change anything about that configuration (include images - * attached to the configuration), but it may be possible to add new - * configurations, new images or new signatures within the existing - * framework. - * - * Adding new properties to a device tree may result in the string table - * being extended (if the new property names are different from those - * already added). This function can optionally include a region for - * the string table so that this can be part of the hash too. - * - * The device tree header is not included in the list. - * - * @fdt: Device tree to check - * @inc: List of node paths to included - * @inc_count: Number of node paths in list - * @exc_prop: List of properties names to exclude - * @exc_prop_count: Number of properties in exclude list - * @region: Returns list of regions - * @max_region: Maximum length of region list - * @path: Pointer to a temporary string for the function to use for - * building path names - * @path_len: Length of path, must be large enough to hold the longest - * path in the tree - * @add_string_tab: 1 to add a region for the string table - * @return number of regions in list. If this is >max_regions then the - * region array was exhausted. You should increase max_regions and try - * the call again. - */ -int fdt_find_regions(const void *fdt, char * const inc[], int inc_count, - char * const exc_prop[], int exc_prop_count, - struct fdt_region region[], int max_regions, - char *path, int path_len, int add_string_tab); - -/** - * fdt_first_region() - find regions in device tree - * - * Given a nodes and properties to include and properties to exclude, find - * the regions of the device tree which describe those included parts. - * - * The use for this function is twofold. Firstly it provides a convenient - * way of performing a structure-aware grep of the tree. For example it is - * possible to grep for a node and get all the properties associated with - * that node. Trees can be subsetted easily, by specifying the nodes that - * are required, and then writing out the regions returned by this function. - * This is useful for small resource-constrained systems, such as boot - * loaders, which want to use an FDT but do not need to know about all of - * it. - * - * Secondly it makes it easy to hash parts of the tree and detect changes. - * The intent is to get a list of regions which will be invariant provided - * those parts are invariant. For example, if you request a list of regions - * for all nodes but exclude the property "data", then you will get the - * same region contents regardless of any change to "data" properties. - * - * This function can be used to produce a byte-stream to send to a hashing - * function to verify that critical parts of the FDT have not changed. - * Note that semantically null changes in order could still cause false - * hash misses. Such reordering might happen if the tree is regenerated - * from source, and nodes are reordered (the bytes-stream will be emitted - * in a different order and many hash functions will detect this). However - * if an existing tree is modified using libfdt functions, such as - * fdt_add_subnode() and fdt_setprop(), then this problem is avoided. - * - * The nodes/properties to include/exclude are defined by a function - * provided by the caller. This function is called for each node and - * property, and must return: - * - * 0 - to exclude this part - * 1 - to include this part - * -1 - for FDT_IS_PROP only: no information is available, so include - * if its containing node is included - * - * The last case is only used to deal with properties. Often a property is - * included if its containing node is included - this is the case where - * -1 is returned.. However if the property is specifically required to be - * included/excluded, then 0 or 1 can be returned. Note that including a - * property when the FDT_REG_SUPERNODES flag is given will force its - * containing node to be included since it is not valid to have a property - * that is not in a node. - * - * Using the information provided, the inclusion of a node can be controlled - * either by a node name or its compatible string, or any other property - * that the function can determine. - * - * As an example, including node "/" means to include the root node and all - * root properties. A flag provides a way of also including supernodes (of - * which there is none for the root node), and another flag includes - * immediate subnodes, so in this case we would get the FDT_BEGIN_NODE and - * FDT_END_NODE of all subnodes of /. - * - * The subnode feature helps in a hashing situation since it prevents the - * root node from changing at all. Any change to non-excluded properties, - * names of subnodes or number of subnodes would be detected. - * - * When used with FITs this provides the ability to hash and sign parts of - * the FIT based on different configurations in the FIT. Then it is - * impossible to change anything about that configuration (include images - * attached to the configuration), but it may be possible to add new - * configurations, new images or new signatures within the existing - * framework. - * - * Adding new properties to a device tree may result in the string table - * being extended (if the new property names are different from those - * already added). This function can optionally include a region for - * the string table so that this can be part of the hash too. This is always - * the last region. - * - * The FDT also has a mem_rsvmap table which can also be included, and is - * always the first region if so. - * - * The device tree header is not included in the region list. Since the - * contents of the FDT are changing (shrinking, often), the caller will need - * to regenerate the header anyway. - * - * @fdt: Device tree to check - * @h_include: Function to call to determine whether to include a part or - * not: - * - * @priv: Private pointer as passed to fdt_find_regions() - * @fdt: Pointer to FDT blob - * @offset: Offset of this node / property - * @type: Type of this part, FDT_IS_... - * @data: Pointer to data (node name, property name, compatible - * string, value (not yet supported) - * @size: Size of data, or 0 if none - * @return 0 to exclude, 1 to include, -1 if no information is - * available - * @priv: Private pointer passed to h_include - * @region: Returns list of regions, sorted by offset - * @max_regions: Maximum length of region list - * @path: Pointer to a temporary string for the function to use for - * building path names - * @path_len: Length of path, must be large enough to hold the longest - * path in the tree - * @flags: Various flags that control the region algortihm, see - * FDT_REG_... - * @return number of regions in list. If this is >max_regions then the - * region array was exhausted. You should increase max_regions and try - * the call again. Only the first max_regions elements are available in the - * array. - * - * On error a -ve value is return, which can be: - * - * -FDT_ERR_BADSTRUCTURE (too deep or more END tags than BEGIN tags - * -FDT_ERR_BADLAYOUT - * -FDT_ERR_NOSPACE (path area is too small) - */ -int fdt_first_region(const void *fdt, - int (*h_include)(void *priv, const void *fdt, int offset, - int type, const char *data, int size), - void *priv, struct fdt_region *region, - char *path, int path_len, int flags, - struct fdt_region_state *info); - -/** fdt_next_region() - find next region - * - * See fdt_first_region() for full description. This function finds the - * next region according to the provided parameters, which must be the same - * as passed to fdt_first_region(). - * - * This function can additionally return -FDT_ERR_NOTFOUND when there are no - * more regions - */ -int fdt_next_region(const void *fdt, - int (*h_include)(void *priv, const void *fdt, int offset, - int type, const char *data, int size), - void *priv, struct fdt_region *region, - char *path, int path_len, int flags, - struct fdt_region_state *info); - -/** - * fdt_add_alias_regions() - find aliases that point to existing regions - * - * Once a device tree grep is complete some of the nodes will be present - * and some will have been dropped. This function checks all the alias nodes - * to figure out which points point to nodes which are still present. These - * aliases need to be kept, along with the nodes they reference. - * - * Given a list of regions function finds the aliases that still apply and - * adds more regions to the list for these. This function is called after - * fdt_next_region() has finished returning regions and requires the same - * state. - * - * @fdt: Device tree file to reference - * @region: List of regions that will be kept - * @count: Number of regions - * @max_regions: Number of entries that can fit in @region - * @info: Region state as returned from fdt_next_region() - * @return new number of regions in @region (i.e. count + the number added) - * or -FDT_ERR_NOSPACE if there was not enough space. - */ -int fdt_add_alias_regions(const void *fdt, struct fdt_region *region, int count, - int max_regions, struct fdt_region_state *info); -#endif /* SWIG */ - extern struct fdt_header *working_fdt; /* Pointer to the working fdt */ #endif /* _INCLUDE_LIBFDT_H_ */ diff --git a/include/spl.h b/include/spl.h index 8b15cd4914c..6bf9fd8bebb 100644 --- a/include/spl.h +++ b/include/spl.h @@ -224,6 +224,19 @@ int spl_load_simple_fit(struct spl_image_info *spl_image, #define SPL_FIT_FOUND 2 /** + * spl_load_legacy_img() - Loads a legacy image from a device. + * @spl_image: Image description to set up + * @load: Structure containing the information required to load data. + * @header: Pointer to image header (including appended image) + * + * Reads an legacy image from the device. Loads u-boot image to + * specified load address. + * Returns 0 on success. + */ +int spl_load_legacy_img(struct spl_image_info *spl_image, + struct spl_load_info *load, ulong header); + +/** * spl_load_imx_container() - Loads a imx container image from a device. * @spl_image: Image description to set up * @info: Structure containing the information required to load data. diff --git a/lib/Kconfig b/lib/Kconfig index 144a54da280..868de3bf3b8 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -434,6 +434,11 @@ config SPL_LZ4 fast compression and decompression speed. It belongs to the LZ77 family of byte-oriented compression schemes. +config SPL_LZMA + bool "Enable LZMA decompression support for SPL build" + help + This enables support for LZMA compression altorithm for SPL boot. + config SPL_LZO bool "Enable LZO decompression support in SPL" help diff --git a/lib/Makefile b/lib/Makefile index ded9a932aa0..c6f862b0c22 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -67,6 +67,7 @@ obj-$(CONFIG_$(SPL_)ZLIB) += zlib/ obj-$(CONFIG_$(SPL_)ZSTD) += zstd/ obj-$(CONFIG_$(SPL_)GZIP) += gunzip.o obj-$(CONFIG_$(SPL_)LZO) += lzo/ +obj-$(CONFIG_$(SPL_)LZMA) += lzma/ obj-$(CONFIG_$(SPL_)LZ4) += lz4_wrapper.o obj-$(CONFIG_LIBAVB) += libavb/ diff --git a/lib/libfdt/Makefile b/lib/libfdt/Makefile index 5d3ae4e2f13..1fe50ecbe52 100644 --- a/lib/libfdt/Makefile +++ b/lib/libfdt/Makefile @@ -3,9 +3,9 @@ # (C) Copyright 2000-2007 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# Use upstream code. obj-y += \ fdt.o \ + fdt_ro.o \ fdt_wip.o \ fdt_strerror.o \ fdt_sw.o \ @@ -15,12 +15,5 @@ obj-y += \ obj-$(CONFIG_OF_LIBFDT_OVERLAY) += fdt_overlay.o -# Locally modified for U-Boot. -# TODO: split out the local modifiction. -obj-y += fdt_ro.o - -# U-Boot own file -obj-y += fdt_region.o - ccflags-y := -I$(srctree)/scripts/dtc/libfdt \ -DFDT_ASSUME_MASK=$(CONFIG_$(SPL_TPL_)OF_LIBFDT_ASSUME_MASK) diff --git a/lib/libfdt/fdt_ro.c b/lib/libfdt/fdt_ro.c index be03aea9eb0..7ede074537e 100644 --- a/lib/libfdt/fdt_ro.c +++ b/lib/libfdt/fdt_ro.c @@ -1,925 +1,2 @@ -// SPDX-License-Identifier: GPL-2.0+ OR BSD-2-Clause -/* - * libfdt - Flat Device Tree manipulation - * Copyright (C) 2006 David Gibson, IBM Corporation. - */ #include <linux/libfdt_env.h> - -#ifndef USE_HOSTCC -#include <fdt.h> -#include <linux/libfdt.h> -#else -#include "fdt_host.h" -#endif - -#include "libfdt_internal.h" - -static int fdt_nodename_eq_(const void *fdt, int offset, - const char *s, int len) -{ - int olen; - const char *p = fdt_get_name(fdt, offset, &olen); - - if (!p || (fdt_chk_extra() && olen < len)) - /* short match */ - return 0; - - if (memcmp(p, s, len) != 0) - return 0; - - if (p[len] == '\0') - return 1; - else if (!memchr(s, '@', len) && (p[len] == '@')) - return 1; - else - return 0; -} - -const char *fdt_get_string(const void *fdt, int stroffset, int *lenp) -{ - int32_t totalsize; - uint32_t absoffset; - size_t len; - int err; - const char *s, *n; - - if (!fdt_chk_extra()) { - s = (const char *)fdt + fdt_off_dt_strings(fdt) + stroffset; - - if (lenp) - *lenp = strlen(s); - return s; - } - totalsize = fdt_ro_probe_(fdt); - err = totalsize; - if (totalsize < 0) - goto fail; - - err = -FDT_ERR_BADOFFSET; - absoffset = stroffset + fdt_off_dt_strings(fdt); - if (absoffset >= totalsize) - goto fail; - len = totalsize - absoffset; - - if (fdt_magic(fdt) == FDT_MAGIC) { - if (stroffset < 0) - goto fail; - if (!fdt_chk_version() || fdt_version(fdt) >= 17) { - if (stroffset >= fdt_size_dt_strings(fdt)) - goto fail; - if ((fdt_size_dt_strings(fdt) - stroffset) < len) - len = fdt_size_dt_strings(fdt) - stroffset; - } - } else if (fdt_magic(fdt) == FDT_SW_MAGIC) { - if ((stroffset >= 0) - || (stroffset < -fdt_size_dt_strings(fdt))) - goto fail; - if ((-stroffset) < len) - len = -stroffset; - } else { - err = -FDT_ERR_INTERNAL; - goto fail; - } - - s = (const char *)fdt + absoffset; - n = memchr(s, '\0', len); - if (!n) { - /* missing terminating NULL */ - err = -FDT_ERR_TRUNCATED; - goto fail; - } - - if (lenp) - *lenp = n - s; - return s; - -fail: - if (lenp) - *lenp = err; - return NULL; -} - -const char *fdt_string(const void *fdt, int stroffset) -{ - return fdt_get_string(fdt, stroffset, NULL); -} - -static int fdt_string_eq_(const void *fdt, int stroffset, - const char *s, int len) -{ - int slen; - const char *p = fdt_get_string(fdt, stroffset, &slen); - - return p && (slen == len) && (memcmp(p, s, len) == 0); -} - -int fdt_find_max_phandle(const void *fdt, uint32_t *phandle) -{ - uint32_t max = 0; - int offset = -1; - - while (true) { - uint32_t value; - - offset = fdt_next_node(fdt, offset, NULL); - if (offset < 0) { - if (offset == -FDT_ERR_NOTFOUND) - break; - - return offset; - } - - value = fdt_get_phandle(fdt, offset); - - if (value > max) - max = value; - } - - if (phandle) - *phandle = max; - - return 0; -} - -int fdt_generate_phandle(const void *fdt, uint32_t *phandle) -{ - uint32_t max; - int err; - - err = fdt_find_max_phandle(fdt, &max); - if (err < 0) - return err; - - if (max == FDT_MAX_PHANDLE) - return -FDT_ERR_NOPHANDLES; - - if (phandle) - *phandle = max + 1; - - return 0; -} - -static const struct fdt_reserve_entry *fdt_mem_rsv(const void *fdt, int n) -{ - int offset = n * sizeof(struct fdt_reserve_entry); - int absoffset = fdt_off_mem_rsvmap(fdt) + offset; - - if (fdt_chk_extra()) { - if (absoffset < fdt_off_mem_rsvmap(fdt)) - return NULL; - if (absoffset > fdt_totalsize(fdt) - - sizeof(struct fdt_reserve_entry)) - return NULL; - } - return fdt_mem_rsv_(fdt, n); -} - -int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size) -{ - const struct fdt_reserve_entry *re; - - FDT_RO_PROBE(fdt); - re = fdt_mem_rsv(fdt, n); - if (fdt_chk_extra() && !re) - return -FDT_ERR_BADOFFSET; - - *address = fdt64_to_cpu(re->address); - *size = fdt64_to_cpu(re->size); - return 0; -} - -int fdt_num_mem_rsv(const void *fdt) -{ - int i; - const struct fdt_reserve_entry *re; - - for (i = 0; (re = fdt_mem_rsv(fdt, i)) != NULL; i++) { - if (fdt64_to_cpu(re->size) == 0) - return i; - } - return -FDT_ERR_TRUNCATED; -} - -static int nextprop_(const void *fdt, int offset) -{ - uint32_t tag; - int nextoffset; - - do { - tag = fdt_next_tag(fdt, offset, &nextoffset); - - switch (tag) { - case FDT_END: - if (nextoffset >= 0) - return -FDT_ERR_BADSTRUCTURE; - else - return nextoffset; - - case FDT_PROP: - return offset; - } - offset = nextoffset; - } while (tag == FDT_NOP); - - return -FDT_ERR_NOTFOUND; -} - -int fdt_subnode_offset_namelen(const void *fdt, int offset, - const char *name, int namelen) -{ - int depth; - - FDT_RO_PROBE(fdt); - - for (depth = 0; - (offset >= 0) && (depth >= 0); - offset = fdt_next_node(fdt, offset, &depth)) - if ((depth == 1) - && fdt_nodename_eq_(fdt, offset, name, namelen)) - return offset; - - if (depth < 0) - return -FDT_ERR_NOTFOUND; - return offset; /* error */ -} - -int fdt_subnode_offset(const void *fdt, int parentoffset, - const char *name) -{ - return fdt_subnode_offset_namelen(fdt, parentoffset, name, strlen(name)); -} - -int fdt_path_offset_namelen(const void *fdt, const char *path, int namelen) -{ - const char *end = path + namelen; - const char *p = path; - int offset = 0; - - FDT_RO_PROBE(fdt); - - /* see if we have an alias */ - if (*path != '/') { - const char *q = memchr(path, '/', end - p); - - if (!q) - q = end; - - p = fdt_get_alias_namelen(fdt, p, q - p); - if (!p) - return -FDT_ERR_BADPATH; - offset = fdt_path_offset(fdt, p); - - p = q; - } - - while (p < end) { - const char *q; - - while (*p == '/') { - p++; - if (p == end) - return offset; - } - q = memchr(p, '/', end - p); - if (! q) - q = end; - - offset = fdt_subnode_offset_namelen(fdt, offset, p, q-p); - if (offset < 0) - return offset; - - p = q; - } - - return offset; -} - -int fdt_path_offset(const void *fdt, const char *path) -{ - return fdt_path_offset_namelen(fdt, path, strlen(path)); -} - -const char *fdt_get_name(const void *fdt, int nodeoffset, int *len) -{ - const struct fdt_node_header *nh = fdt_offset_ptr_(fdt, nodeoffset); - const char *nameptr; - int err; - - if (fdt_chk_extra() && - (((err = fdt_ro_probe_(fdt)) < 0) - || ((err = fdt_check_node_offset_(fdt, nodeoffset)) < 0))) - goto fail; - - nameptr = nh->name; - - if (fdt_chk_version() && fdt_version(fdt) < 0x10) { - /* - * For old FDT versions, match the naming conventions of V16: - * give only the leaf name (after all /). The actual tree - * contents are loosely checked. - */ - const char *leaf; - leaf = strrchr(nameptr, '/'); - if (leaf == NULL) { - err = -FDT_ERR_BADSTRUCTURE; - goto fail; - } - nameptr = leaf+1; - } - - if (len) - *len = strlen(nameptr); - - return nameptr; - - fail: - if (len) - *len = err; - return NULL; -} - -int fdt_first_property_offset(const void *fdt, int nodeoffset) -{ - int offset; - - if ((offset = fdt_check_node_offset_(fdt, nodeoffset)) < 0) - return offset; - - return nextprop_(fdt, offset); -} - -int fdt_next_property_offset(const void *fdt, int offset) -{ - if ((offset = fdt_check_prop_offset_(fdt, offset)) < 0) - return offset; - - return nextprop_(fdt, offset); -} - -static const struct fdt_property *fdt_get_property_by_offset_(const void *fdt, - int offset, - int *lenp) -{ - int err; - const struct fdt_property *prop; - - if (fdt_chk_basic() && (err = fdt_check_prop_offset_(fdt, offset)) < 0) { - if (lenp) - *lenp = err; - return NULL; - } - - prop = fdt_offset_ptr_(fdt, offset); - - if (lenp) - *lenp = fdt32_to_cpu(prop->len); - - return prop; -} - -const struct fdt_property *fdt_get_property_by_offset(const void *fdt, - int offset, - int *lenp) -{ - /* Prior to version 16, properties may need realignment - * and this API does not work. fdt_getprop_*() will, however. */ - - if (fdt_chk_version() && fdt_version(fdt) < 0x10) { - if (lenp) - *lenp = -FDT_ERR_BADVERSION; - return NULL; - } - - return fdt_get_property_by_offset_(fdt, offset, lenp); -} - -static const struct fdt_property *fdt_get_property_namelen_(const void *fdt, - int offset, - const char *name, - int namelen, - int *lenp, - int *poffset) -{ - for (offset = fdt_first_property_offset(fdt, offset); - (offset >= 0); - (offset = fdt_next_property_offset(fdt, offset))) { - const struct fdt_property *prop; - - prop = fdt_get_property_by_offset_(fdt, offset, lenp); - if (fdt_chk_extra() && !prop) { - offset = -FDT_ERR_INTERNAL; - break; - } - if (fdt_string_eq_(fdt, fdt32_to_cpu(prop->nameoff), - name, namelen)) { - if (poffset) - *poffset = offset; - return prop; - } - } - - if (lenp) - *lenp = offset; - return NULL; -} - - -const struct fdt_property *fdt_get_property_namelen(const void *fdt, - int offset, - const char *name, - int namelen, int *lenp) -{ - /* Prior to version 16, properties may need realignment - * and this API does not work. fdt_getprop_*() will, however. */ - if (fdt_chk_version() && fdt_version(fdt) < 0x10) { - if (lenp) - *lenp = -FDT_ERR_BADVERSION; - return NULL; - } - - return fdt_get_property_namelen_(fdt, offset, name, namelen, lenp, - NULL); -} - - -const struct fdt_property *fdt_get_property(const void *fdt, - int nodeoffset, - const char *name, int *lenp) -{ - return fdt_get_property_namelen(fdt, nodeoffset, name, - strlen(name), lenp); -} - -const void *fdt_getprop_namelen(const void *fdt, int nodeoffset, - const char *name, int namelen, int *lenp) -{ - int poffset; - const struct fdt_property *prop; - - prop = fdt_get_property_namelen_(fdt, nodeoffset, name, namelen, lenp, - &poffset); - if (!prop) - return NULL; - - /* Handle realignment */ - if (fdt_chk_version() && fdt_version(fdt) < 0x10 && - (poffset + sizeof(*prop)) % 8 && fdt32_to_cpu(prop->len) >= 8) - return prop->data + 4; - return prop->data; -} - -const void *fdt_getprop_by_offset(const void *fdt, int offset, - const char **namep, int *lenp) -{ - const struct fdt_property *prop; - - prop = fdt_get_property_by_offset_(fdt, offset, lenp); - if (!prop) - return NULL; - if (namep) { - const char *name; - int namelen; - - if (fdt_chk_extra()) { - name = fdt_get_string(fdt, fdt32_to_cpu(prop->nameoff), - &namelen); - if (!name) { - if (lenp) - *lenp = namelen; - return NULL; - } - *namep = name; - } else { - *namep = fdt_string(fdt, fdt32_to_cpu(prop->nameoff)); - } - } - - /* Handle realignment */ - if (fdt_chk_version() && fdt_version(fdt) < 0x10 && - (offset + sizeof(*prop)) % 8 && fdt32_to_cpu(prop->len) >= 8) - return prop->data + 4; - return prop->data; -} - -const void *fdt_getprop(const void *fdt, int nodeoffset, - const char *name, int *lenp) -{ - return fdt_getprop_namelen(fdt, nodeoffset, name, strlen(name), lenp); -} - -uint32_t fdt_get_phandle(const void *fdt, int nodeoffset) -{ - const fdt32_t *php; - int len; - - /* FIXME: This is a bit sub-optimal, since we potentially scan - * over all the properties twice. */ - php = fdt_getprop(fdt, nodeoffset, "phandle", &len); - if (!php || (len != sizeof(*php))) { - php = fdt_getprop(fdt, nodeoffset, "linux,phandle", &len); - if (!php || (len != sizeof(*php))) - return 0; - } - - return fdt32_to_cpu(*php); -} - -const char *fdt_get_alias_namelen(const void *fdt, - const char *name, int namelen) -{ - int aliasoffset; - - aliasoffset = fdt_path_offset(fdt, "/aliases"); - if (aliasoffset < 0) - return NULL; - - return fdt_getprop_namelen(fdt, aliasoffset, name, namelen, NULL); -} - -const char *fdt_get_alias(const void *fdt, const char *name) -{ - return fdt_get_alias_namelen(fdt, name, strlen(name)); -} - -int fdt_get_path(const void *fdt, int nodeoffset, char *buf, int buflen) -{ - int pdepth = 0, p = 0; - int offset, depth, namelen; - const char *name; - - FDT_RO_PROBE(fdt); - - if (buflen < 2) - return -FDT_ERR_NOSPACE; - - for (offset = 0, depth = 0; - (offset >= 0) && (offset <= nodeoffset); - offset = fdt_next_node(fdt, offset, &depth)) { - while (pdepth > depth) { - do { - p--; - } while (buf[p-1] != '/'); - pdepth--; - } - - if (pdepth >= depth) { - name = fdt_get_name(fdt, offset, &namelen); - if (!name) - return namelen; - if ((p + namelen + 1) <= buflen) { - memcpy(buf + p, name, namelen); - p += namelen; - buf[p++] = '/'; - pdepth++; - } - } - - if (offset == nodeoffset) { - if (pdepth < (depth + 1)) - return -FDT_ERR_NOSPACE; - - if (p > 1) /* special case so that root path is "/", not "" */ - p--; - buf[p] = '\0'; - return 0; - } - } - - if ((offset == -FDT_ERR_NOTFOUND) || (offset >= 0)) - return -FDT_ERR_BADOFFSET; - else if (offset == -FDT_ERR_BADOFFSET) - return -FDT_ERR_BADSTRUCTURE; - - return offset; /* error from fdt_next_node() */ -} - -int fdt_supernode_atdepth_offset(const void *fdt, int nodeoffset, - int supernodedepth, int *nodedepth) -{ - int offset, depth; - int supernodeoffset = -FDT_ERR_INTERNAL; - - FDT_RO_PROBE(fdt); - - if (supernodedepth < 0) - return -FDT_ERR_NOTFOUND; - - for (offset = 0, depth = 0; - (offset >= 0) && (offset <= nodeoffset); - offset = fdt_next_node(fdt, offset, &depth)) { - if (depth == supernodedepth) - supernodeoffset = offset; - - if (offset == nodeoffset) { - if (nodedepth) - *nodedepth = depth; - - if (supernodedepth > depth) - return -FDT_ERR_NOTFOUND; - else - return supernodeoffset; - } - } - - if (fdt_chk_extra()) { - if ((offset == -FDT_ERR_NOTFOUND) || (offset >= 0)) - return -FDT_ERR_BADOFFSET; - else if (offset == -FDT_ERR_BADOFFSET) - return -FDT_ERR_BADSTRUCTURE; - } - - return offset; /* error from fdt_next_node() */ -} - -int fdt_node_depth(const void *fdt, int nodeoffset) -{ - int nodedepth; - int err; - - err = fdt_supernode_atdepth_offset(fdt, nodeoffset, 0, &nodedepth); - if (err) - return (!fdt_chk_extra() || err < 0) ? err : -FDT_ERR_INTERNAL; - return nodedepth; -} - -int fdt_parent_offset(const void *fdt, int nodeoffset) -{ - int nodedepth = fdt_node_depth(fdt, nodeoffset); - - if (nodedepth < 0) - return nodedepth; - return fdt_supernode_atdepth_offset(fdt, nodeoffset, - nodedepth - 1, NULL); -} - -int fdt_node_offset_by_prop_value(const void *fdt, int startoffset, - const char *propname, - const void *propval, int proplen) -{ - int offset; - const void *val; - int len; - - FDT_RO_PROBE(fdt); - - /* FIXME: The algorithm here is pretty horrible: we scan each - * property of a node in fdt_getprop(), then if that didn't - * find what we want, we scan over them again making our way - * to the next node. Still it's the easiest to implement - * approach; performance can come later. */ - for (offset = fdt_next_node(fdt, startoffset, NULL); - offset >= 0; - offset = fdt_next_node(fdt, offset, NULL)) { - val = fdt_getprop(fdt, offset, propname, &len); - if (val && (len == proplen) - && (memcmp(val, propval, len) == 0)) - return offset; - } - - return offset; /* error from fdt_next_node() */ -} - -int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle) -{ - int offset; - - if ((phandle == 0) || (phandle == -1)) - return -FDT_ERR_BADPHANDLE; - - FDT_RO_PROBE(fdt); - - /* FIXME: The algorithm here is pretty horrible: we - * potentially scan each property of a node in - * fdt_get_phandle(), then if that didn't find what - * we want, we scan over them again making our way to the next - * node. Still it's the easiest to implement approach; - * performance can come later. */ - for (offset = fdt_next_node(fdt, -1, NULL); - offset >= 0; - offset = fdt_next_node(fdt, offset, NULL)) { - if (fdt_get_phandle(fdt, offset) == phandle) - return offset; - } - - return offset; /* error from fdt_next_node() */ -} - -int fdt_stringlist_contains(const char *strlist, int listlen, const char *str) -{ - int len = strlen(str); - const char *p; - - while (listlen >= len) { - if (memcmp(str, strlist, len+1) == 0) - return 1; - p = memchr(strlist, '\0', listlen); - if (!p) - return 0; /* malformed strlist.. */ - listlen -= (p-strlist) + 1; - strlist = p + 1; - } - return 0; -} - -int fdt_stringlist_count(const void *fdt, int nodeoffset, const char *property) -{ - const char *list, *end; - int length, count = 0; - - list = fdt_getprop(fdt, nodeoffset, property, &length); - if (!list) - return length; - - end = list + length; - - while (list < end) { - length = strnlen(list, end - list) + 1; - - /* Abort if the last string isn't properly NUL-terminated. */ - if (list + length > end) - return -FDT_ERR_BADVALUE; - - list += length; - count++; - } - - return count; -} - -int fdt_stringlist_search(const void *fdt, int nodeoffset, const char *property, - const char *string) -{ - int length, len, idx = 0; - const char *list, *end; - - list = fdt_getprop(fdt, nodeoffset, property, &length); - if (!list) - return length; - - len = strlen(string) + 1; - end = list + length; - - while (list < end) { - length = strnlen(list, end - list) + 1; - - /* Abort if the last string isn't properly NUL-terminated. */ - if (list + length > end) - return -FDT_ERR_BADVALUE; - - if (length == len && memcmp(list, string, length) == 0) - return idx; - - list += length; - idx++; - } - - return -FDT_ERR_NOTFOUND; -} - -const char *fdt_stringlist_get(const void *fdt, int nodeoffset, - const char *property, int idx, - int *lenp) -{ - const char *list, *end; - int length; - - list = fdt_getprop(fdt, nodeoffset, property, &length); - if (!list) { - if (lenp) - *lenp = length; - - return NULL; - } - - end = list + length; - - while (list < end) { - length = strnlen(list, end - list) + 1; - - /* Abort if the last string isn't properly NUL-terminated. */ - if (list + length > end) { - if (lenp) - *lenp = -FDT_ERR_BADVALUE; - - return NULL; - } - - if (idx == 0) { - if (lenp) - *lenp = length - 1; - - return list; - } - - list += length; - idx--; - } - - if (lenp) - *lenp = -FDT_ERR_NOTFOUND; - - return NULL; -} - -int fdt_node_check_compatible(const void *fdt, int nodeoffset, - const char *compatible) -{ - const void *prop; - int len; - - prop = fdt_getprop(fdt, nodeoffset, "compatible", &len); - if (!prop) - return len; - - return !fdt_stringlist_contains(prop, len, compatible); -} - -int fdt_node_offset_by_compatible(const void *fdt, int startoffset, - const char *compatible) -{ - int offset, err; - - FDT_RO_PROBE(fdt); - - /* FIXME: The algorithm here is pretty horrible: we scan each - * property of a node in fdt_node_check_compatible(), then if - * that didn't find what we want, we scan over them again - * making our way to the next node. Still it's the easiest to - * implement approach; performance can come later. */ - for (offset = fdt_next_node(fdt, startoffset, NULL); - offset >= 0; - offset = fdt_next_node(fdt, offset, NULL)) { - err = fdt_node_check_compatible(fdt, offset, compatible); - if ((err < 0) && (err != -FDT_ERR_NOTFOUND)) - return err; - else if (err == 0) - return offset; - } - - return offset; /* error from fdt_next_node() */ -} - -#if !defined(CHECK_LEVEL) || CHECK_LEVEL > 0 -int fdt_check_full(const void *fdt, size_t bufsize) -{ - int err; - int num_memrsv; - int offset, nextoffset = 0; - uint32_t tag; - unsigned depth = 0; - const void *prop; - const char *propname; - - if (bufsize < FDT_V1_SIZE) - return -FDT_ERR_TRUNCATED; - err = fdt_check_header(fdt); - if (err != 0) - return err; - if (bufsize < fdt_totalsize(fdt)) - return -FDT_ERR_TRUNCATED; - - num_memrsv = fdt_num_mem_rsv(fdt); - if (num_memrsv < 0) - return num_memrsv; - - while (1) { - offset = nextoffset; - tag = fdt_next_tag(fdt, offset, &nextoffset); - - if (nextoffset < 0) - return nextoffset; - - switch (tag) { - case FDT_NOP: - break; - - case FDT_END: - if (depth != 0) - return -FDT_ERR_BADSTRUCTURE; - return 0; - - case FDT_BEGIN_NODE: - depth++; - if (depth > INT_MAX) - return -FDT_ERR_BADSTRUCTURE; - break; - - case FDT_END_NODE: - if (depth == 0) - return -FDT_ERR_BADSTRUCTURE; - depth--; - break; - - case FDT_PROP: - prop = fdt_getprop_by_offset(fdt, offset, &propname, - &err); - if (!prop) - return err; - break; - - default: - return -FDT_ERR_INTERNAL; - } - } -} -#endif +#include "../../scripts/dtc/libfdt/fdt_ro.c" diff --git a/lib/zlib/trees.c b/lib/zlib/trees.c index a0078d08ee0..3e09517ed0e 100644 --- a/lib/zlib/trees.c +++ b/lib/zlib/trees.c @@ -7,27 +7,28 @@ /* * ALGORITHM * - * The "deflation" process uses several Huffman trees. The more - * common source values are represented by shorter bit sequences. + * The "deflation" process uses several Huffman trees. The more + * common source values are represented by shorter bit sequences. * - * Each code tree is stored in a compressed form which is itself - * a Huffman encoding of the lengths of all the code strings (in - * ascending order by source values). The actual code strings are - * reconstructed from the lengths in the inflate process, as described - * in the deflate specification. + * Each code tree is stored in a compressed form which is itself + * a Huffman encoding of the lengths of all the code strings (in + * ascending order by source values). The actual code strings are + * reconstructed from the lengths in the inflate process, as + * described in the deflate specification. * * REFERENCES * - * Deutsch, L.P.,"'Deflate' Compressed Data Format Specification". - * Available in ftp.uu.net:/pub/archiving/zip/doc/deflate-1.1.doc + * Deutsch, P. + * RFC 1951, DEFLATE Compressed Data Format Specification version 1.3 + * https://tools.ietf.org/html/rfc1951, 1996 * - * Storer, James A. - * Data Compression: Methods and Theory, pp. 49-50. - * Computer Science Press, 1988. ISBN 0-7167-8156-5. + * Storer, James A. + * Data Compression: Methods and Theory, pp. 49-50. + * Computer Science Press, 1988. ISBN 0-7167-8156-5. * - * Sedgewick, R. - * Algorithms, p290. - * Addison-Wesley, 1983. ISBN 0-201-06672-6. + * Sedgewick, R. + * Algorithms, p290. + * Addison-Wesley, 1983. ISBN 0-201-06672-6. */ /* @(#) $Id$ */ diff --git a/net/Kconfig b/net/Kconfig index 96bbce17785..ac6d0cf8a6f 100644 --- a/net/Kconfig +++ b/net/Kconfig @@ -44,5 +44,9 @@ config TFTP_BLOCKSIZE default 1468 help Default TFTP block size. + The MTU is typically 1500 for ethernet, so a TFTP block of + 1468 (MTU minus eth.hdrs) provides a good throughput with + almost-MTU block sizes. + You can also activate CONFIG_IP_DEFRAG to set a larger block. endif # if NET diff --git a/net/tftp.c b/net/tftp.c index 585eb6ef0cb..be24e630754 100644 --- a/net/tftp.c +++ b/net/tftp.c @@ -133,14 +133,9 @@ static char tftp_filename[MAX_LEN]; * almost-MTU block sizes. At least try... fall back to 512 if need be. * (but those using CONFIG_IP_DEFRAG may want to set a larger block in cfg file) */ -#ifdef CONFIG_TFTP_BLOCKSIZE -#define TFTP_MTU_BLOCKSIZE CONFIG_TFTP_BLOCKSIZE -#else -#define TFTP_MTU_BLOCKSIZE 1468 -#endif static unsigned short tftp_block_size = TFTP_BLOCK_SIZE; -static unsigned short tftp_block_size_option = TFTP_MTU_BLOCKSIZE; +static unsigned short tftp_block_size_option = CONFIG_TFTP_BLOCKSIZE; static inline int store_block(int block, uchar *src, unsigned int len) { diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl index 4c2c0567c57..6741ef911ec 100644 --- a/scripts/Makefile.spl +++ b/scripts/Makefile.spl @@ -22,6 +22,8 @@ include $(srctree)/scripts/Kbuild.include -include include/config/auto.conf -include $(obj)/include/autoconf.mk +UBOOTINCLUDE := -I$(obj)/include $(UBOOTINCLUDE) + KBUILD_CPPFLAGS += -DCONFIG_SPL_BUILD ifeq ($(CONFIG_TPL_BUILD),y) KBUILD_CPPFLAGS += -DCONFIG_TPL_BUILD @@ -311,7 +313,7 @@ cmd_plat = $(CC) $(c_flags) -c $< -o $(filter-out $(PHONY),$@) targets += $(obj)/dts/dt-platdata.o $(obj)/dts/dt-platdata.o: $(obj)/dts/dt-platdata.c \ - include/generated/dt-structs-gen.h FORCE + include/generated/dt-structs-gen.h prepare FORCE $(call if_changed,plat) PHONY += dts_dir @@ -422,9 +424,13 @@ $(obj)/$(SPL_BIN): $(u-boot-spl-platdata) $(u-boot-spl-init) \ $(sort $(u-boot-spl-init) $(u-boot-spl-main)): $(u-boot-spl-dirs) ; PHONY += $(u-boot-spl-dirs) -$(u-boot-spl-dirs): $(u-boot-spl-platdata) +$(u-boot-spl-dirs): $(u-boot-spl-platdata) prepare $(Q)$(MAKE) $(build)=$@ +PHONY += prepare +prepare: + $(Q)$(MAKE) $(build)=$(obj)/. + quiet_cmd_cpp_lds = LDS $@ cmd_cpp_lds = $(CPP) -Wp,-MD,$(depfile) $(cpp_flags) $(LDPPFLAGS) -ansi \ -D__ASSEMBLY__ -x assembler-with-cpp -std=c99 -P -o $@ $< diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 6908431d03c..12a6698958e 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -22,7 +22,6 @@ CONFIG_AEMIF_CNTRL_BASE CONFIG_ALTERA_SPI_IDLE_VAL CONFIG_ALTIVEC CONFIG_ALU -CONFIG_AM335X_LCD CONFIG_AM335X_USB0 CONFIG_AM335X_USB0_MODE CONFIG_AM335X_USB1 @@ -165,7 +164,6 @@ CONFIG_BTB CONFIG_BUFNO_AUTO_INCR_BIT CONFIG_BUILD_ENVCRC CONFIG_BUS_WIDTH -CONFIG_BZIP2 CONFIG_CALXEDA_XGMAC CONFIG_CDP_APPLIANCE_VLAN_TYPE CONFIG_CDP_CAPABILITIES @@ -1190,7 +1188,6 @@ CONFIG_NAND_KIRKWOOD CONFIG_NAND_KMETER1 CONFIG_NAND_LPC32XX_MLC CONFIG_NAND_MODE_REG -CONFIG_NAND_MXC_V1_1 CONFIG_NAND_OMAP_ECCSCHEME CONFIG_NAND_OMAP_GPMC_WSCFG CONFIG_NAND_SECBOOT diff --git a/test/py/tests/test_fs/conftest.py b/test/py/tests/test_fs/conftest.py index 1949f916197..ee82169c2a3 100644 --- a/test/py/tests/test_fs/conftest.py +++ b/test/py/tests/test_fs/conftest.py @@ -335,8 +335,9 @@ def fs_obj_basic(request, u_boot_config): md5val.append(out.split()[0]) umount_fs(mount_dir) - except CalledProcessError: - pytest.skip('Setup failed for filesystem: ' + fs_type) + except CalledProcessError as err: + pytest.skip('Setup failed for filesystem: ' + fs_type + \ + '. {}'.format(err)) return else: yield [fs_ubtype, fs_img, md5val] @@ -15,22 +15,29 @@ run_test() { # SKip slow tests if requested [ "$1" == "quick" ] && mark_expr="not slow" +[ "$1" == "quick" ] && skip=--skip-net-tests +[ "$1" == "tools" ] && tools_only=y failures=0 -# Run all tests that the standard sandbox build can support -run_test "sandbox" ./test/py/test.py --bd sandbox --build -m "${mark_expr}" +if [ -z "$tools_only" ]; then + # Run all tests that the standard sandbox build can support + run_test "sandbox" ./test/py/test.py --bd sandbox --build \ + -m "${mark_expr}" +fi # Run tests which require sandbox_spl run_test "sandbox_spl" ./test/py/test.py --bd sandbox_spl --build \ - -k 'test_ofplatdata or test_handoff' + -k 'test_ofplatdata or test_handoff' -# Run tests for the flat-device-tree version of sandbox. This is a special -# build which does not enable CONFIG_OF_LIVE for the live device tree, so we can -# check that functionality is the same. The standard sandbox build (above) uses -# CONFIG_OF_LIVE. -run_test "sandbox_flattree" ./test/py/test.py --bd sandbox_flattree --build \ - -k test_ut +if [ -z "$tools_only" ]; then + # Run tests for the flat-device-tree version of sandbox. This is a special + # build which does not enable CONFIG_OF_LIVE for the live device tree, so we can + # check that functionality is the same. The standard sandbox build (above) uses + # CONFIG_OF_LIVE. + run_test "sandbox_flattree" ./test/py/test.py --bd sandbox_flattree \ + --build -k test_ut +fi # Set up a path to dtc (device-tree compiler) and libfdt.py, a library it # provides and which is built by the sandbox_spl config. Also set up the path @@ -43,7 +50,6 @@ TOOLS_DIR=build-sandbox_spl/tools run_test "binman" ./tools/binman/binman --toolpath ${TOOLS_DIR} test run_test "patman" ./tools/patman/patman --test -[ "$1" == "quick" ] && skip=--skip-net-tests run_test "buildman" ./tools/buildman/buildman -t ${skip} run_test "fdt" ./tools/dtoc/test_fdt -t run_test "dtoc" ./tools/dtoc/dtoc -t diff --git a/tools/Makefile b/tools/Makefile index c2b26340047..1f9144f0288 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -63,14 +63,8 @@ FIT_CIPHER_OBJS-$(CONFIG_FIT_CIPHER) := common/image-cipher.o # The following files are synced with upstream DTC. # Use synced versions from scripts/dtc/libfdt/. -LIBFDT_SRCS_SYNCED := fdt.c fdt_wip.c fdt_sw.c fdt_rw.c \ - fdt_strerror.c fdt_empty_tree.c fdt_addresses.c fdt_overlay.c -# The following files are locally modified for U-Boot (unfotunately). -# Use U-Boot own versions from lib/libfdt/. -LIBFDT_SRCS_UNSYNCED := fdt_ro.c fdt_region.c - -LIBFDT_OBJS := $(addprefix libfdt/, $(patsubst %.c, %.o, $(LIBFDT_SRCS_SYNCED))) \ - $(addprefix lib/libfdt/, $(patsubst %.c, %.o, $(LIBFDT_SRCS_UNSYNCED))) +LIBFDT_OBJS := $(addprefix libfdt/, fdt.o fdt_ro.o fdt_wip.o fdt_sw.o fdt_rw.o \ + fdt_strerror.o fdt_empty_tree.o fdt_addresses.o fdt_overlay.o) RSA_OBJS-$(CONFIG_FIT_SIGNATURE) := $(addprefix lib/rsa/, \ rsa-sign.o rsa-verify.o rsa-checksum.o \ @@ -87,6 +81,7 @@ dumpimage-mkimage-objs := aisimage.o \ $(FIT_OBJS-y) \ $(FIT_SIG_OBJS-y) \ $(FIT_CIPHER_OBJS-y) \ + common/fdt_region.o \ common/bootm.o \ lib/crc32.o \ default_image.o \ @@ -211,7 +206,7 @@ hostprogs-$(CONFIG_STATIC_RELA) += relocate-rela hostprogs-$(CONFIG_RISCV) += prelink-riscv hostprogs-y += fdtgrep -fdtgrep-objs += $(LIBFDT_OBJS) fdtgrep.o +fdtgrep-objs += $(LIBFDT_OBJS) common/fdt_region.o fdtgrep.o ifneq ($(TOOLS_ONLY),y) hostprogs-y += spl_size_limit diff --git a/tools/binman/binman b/tools/binman/binman index 979b7e4d4b8..11a5d8e18ab 120000 --- a/tools/binman/binman +++ b/tools/binman/binman @@ -1 +1 @@ -binman.py
\ No newline at end of file +main.py
\ No newline at end of file diff --git a/tools/binman/cbfs_util.py b/tools/binman/cbfs_util.py index 99d77878c9a..39973371b93 100644 --- a/tools/binman/cbfs_util.py +++ b/tools/binman/cbfs_util.py @@ -15,16 +15,14 @@ Currently supported: raw and stage types with compression, padding empty areas with empty files, fixed-offset files """ -from __future__ import print_function - from collections import OrderedDict import io import struct import sys -import command -import elf -import tools +from binman import elf +from patman import command +from patman import tools # Set to True to enable printing output while working DEBUG = False diff --git a/tools/binman/cbfs_util_test.py b/tools/binman/cbfs_util_test.py index ddc2e09e358..2c62c8a0f81 100755 --- a/tools/binman/cbfs_util_test.py +++ b/tools/binman/cbfs_util_test.py @@ -9,8 +9,6 @@ These create and read various CBFSs and compare the results with expected values and with cbfstool """ -from __future__ import print_function - import io import os import shutil @@ -18,11 +16,11 @@ import struct import tempfile import unittest -import cbfs_util -from cbfs_util import CbfsWriter -import elf -import test_util -import tools +from binman import cbfs_util +from binman.cbfs_util import CbfsWriter +from binman import elf +from patman import test_util +from patman import tools U_BOOT_DATA = b'1234' U_BOOT_DTB_DATA = b'udtb' diff --git a/tools/binman/control.py b/tools/binman/control.py index 68ad5fc2c0c..dc1dd2a7dcf 100644 --- a/tools/binman/control.py +++ b/tools/binman/control.py @@ -5,17 +5,15 @@ # Creates binary images from input files controlled by a description # -from __future__ import print_function - from collections import OrderedDict import os import sys -import tools +from patman import tools -import cbfs_util -import command -import elf -import tout +from binman import cbfs_util +from binman import elf +from patman import command +from patman import tout # List of images we plan to create # Make this global so that it can be referenced from tests @@ -62,7 +60,7 @@ def WriteEntryDocs(modules, test_missing=None): to show as missing even if it is present. Should be set to None in normal use. """ - from entry import Entry + from binman.entry import Entry Entry.WriteDocs(modules, test_missing) @@ -336,8 +334,8 @@ def PrepareImagesAndDtbs(dtb_fname, select_images, update_fdt): """ # Import these here in case libfdt.py is not available, in which case # the above help option still works. - import fdt - import fdt_util + from dtoc import fdt + from dtoc import fdt_util global images # Get the device tree ready by compiling it and copying the compiled @@ -475,7 +473,7 @@ def Binman(args): # Put these here so that we can import this module without libfdt from image import Image - import state + from binman import state if args.cmd in ['ls', 'extract', 'replace']: try: diff --git a/tools/binman/elf.py b/tools/binman/elf.py index de1ce73f2ae..f88031c2bf9 100644 --- a/tools/binman/elf.py +++ b/tools/binman/elf.py @@ -5,10 +5,7 @@ # Handle various things related to ELF images # -from __future__ import print_function - from collections import namedtuple, OrderedDict -import command import io import os import re @@ -16,8 +13,9 @@ import shutil import struct import tempfile -import tools -import tout +from patman import command +from patman import tools +from patman import tout ELF_TOOLS = True try: diff --git a/tools/binman/elf_test.py b/tools/binman/elf_test.py index ac26fd51e41..37e1b423cf6 100644 --- a/tools/binman/elf_test.py +++ b/tools/binman/elf_test.py @@ -10,11 +10,11 @@ import sys import tempfile import unittest -import command -import elf -import test_util -import tools -import tout +from binman import elf +from patman import command +from patman import test_util +from patman import tools +from patman import tout binman_dir = os.path.dirname(os.path.realpath(sys.argv[0])) diff --git a/tools/binman/entry.py b/tools/binman/entry.py index b6f1b2c93fb..90ffd276177 100644 --- a/tools/binman/entry.py +++ b/tools/binman/entry.py @@ -4,17 +4,15 @@ # Base class for all entries # -from __future__ import print_function - from collections import namedtuple import importlib import os import sys -import fdt_util -import tools -from tools import ToHex, ToHexSize -import tout +from dtoc import fdt_util +from patman import tools +from patman.tools import ToHex, ToHexSize +from patman import tout modules = {} @@ -65,7 +63,7 @@ class Entry(object): def __init__(self, section, etype, node, name_prefix=''): # Put this here to allow entry-docs and help to work without libfdt global state - import state + from binman import state self.section = section self.etype = etype @@ -110,15 +108,11 @@ class Entry(object): # Import the module if we have not already done so. if not module: - old_path = sys.path - sys.path.insert(0, os.path.join(our_path, 'etype')) try: - module = importlib.import_module(module_name) + module = importlib.import_module('binman.etype.' + module_name) except ImportError as e: raise ValueError("Unknown entry type '%s' in node '%s' (expected etype/%s.py, error '%s'" % (etype, node_path, module_name, e)) - finally: - sys.path = old_path modules[module_name] = module # Look up the expected class name @@ -592,9 +586,7 @@ features to produce new behaviours. modules.remove('_testing') missing = [] for name in modules: - if name.startswith('__'): - continue - module = Entry.Lookup(name, name) + module = Entry.Lookup('WriteDocs', name) docs = getattr(module, '__doc__') if test_missing == name: docs = None diff --git a/tools/binman/entry_test.py b/tools/binman/entry_test.py index 277e10b5859..80802f33de6 100644 --- a/tools/binman/entry_test.py +++ b/tools/binman/entry_test.py @@ -9,10 +9,10 @@ import os import sys import unittest -import entry -import fdt -import fdt_util -import tools +from binman import entry +from dtoc import fdt +from dtoc import fdt_util +from patman import tools class TestEntry(unittest.TestCase): def setUp(self): @@ -37,11 +37,11 @@ class TestEntry(unittest.TestCase): else: reload(entry) else: - import entry + from binman import entry def testEntryContents(self): """Test the Entry bass class""" - import entry + from binman import entry base_entry = entry.Entry(None, None, None) self.assertEqual(True, base_entry.ObtainContents()) diff --git a/tools/binman/etype/__init__.py b/tools/binman/etype/__init__.py deleted file mode 100644 index e69de29bb2d..00000000000 --- a/tools/binman/etype/__init__.py +++ /dev/null diff --git a/tools/binman/etype/_testing.py b/tools/binman/etype/_testing.py index 25a6206bf33..ed718eed145 100644 --- a/tools/binman/etype/_testing.py +++ b/tools/binman/etype/_testing.py @@ -7,9 +7,9 @@ from collections import OrderedDict -from entry import Entry, EntryArg -import fdt_util -import tools +from binman.entry import Entry, EntryArg +from dtoc import fdt_util +from patman import tools class Entry__testing(Entry): diff --git a/tools/binman/etype/blob.py b/tools/binman/etype/blob.py index d34c7b51bff..ede7a7a68cf 100644 --- a/tools/binman/etype/blob.py +++ b/tools/binman/etype/blob.py @@ -5,10 +5,10 @@ # Entry-type module for blobs, which are binary objects read from files # -from entry import Entry -import fdt_util -import tools -import tout +from binman.entry import Entry +from dtoc import fdt_util +from patman import tools +from patman import tout class Entry_blob(Entry): """Entry containing an arbitrary binary blob diff --git a/tools/binman/etype/blob_dtb.py b/tools/binman/etype/blob_dtb.py index b2afa064c11..6c069437633 100644 --- a/tools/binman/etype/blob_dtb.py +++ b/tools/binman/etype/blob_dtb.py @@ -5,8 +5,8 @@ # Entry-type module for U-Boot device tree files # -from entry import Entry -from blob import Entry_blob +from binman.entry import Entry +from binman.etype.blob import Entry_blob class Entry_blob_dtb(Entry_blob): """A blob that holds a device tree @@ -18,7 +18,7 @@ class Entry_blob_dtb(Entry_blob): def __init__(self, section, etype, node): # Put this here to allow entry-docs and help to work without libfdt global state - import state + from binman import state Entry_blob.__init__(self, section, etype, node) diff --git a/tools/binman/etype/blob_named_by_arg.py b/tools/binman/etype/blob_named_by_arg.py index 344112bc420..3b4593f071a 100644 --- a/tools/binman/etype/blob_named_by_arg.py +++ b/tools/binman/etype/blob_named_by_arg.py @@ -8,8 +8,8 @@ from collections import OrderedDict -from blob import Entry_blob -from entry import EntryArg +from binman.etype.blob import Entry_blob +from binman.entry import EntryArg class Entry_blob_named_by_arg(Entry_blob): diff --git a/tools/binman/etype/cbfs.py b/tools/binman/etype/cbfs.py index 35b78370b2e..e9aed8310c7 100644 --- a/tools/binman/etype/cbfs.py +++ b/tools/binman/etype/cbfs.py @@ -7,10 +7,10 @@ from collections import OrderedDict -import cbfs_util -from cbfs_util import CbfsWriter -from entry import Entry -import fdt_util +from binman import cbfs_util +from binman.cbfs_util import CbfsWriter +from binman.entry import Entry +from dtoc import fdt_util class Entry_cbfs(Entry): """Entry containing a Coreboot Filesystem (CBFS) @@ -165,7 +165,7 @@ class Entry_cbfs(Entry): def __init__(self, section, etype, node): # Put this here to allow entry-docs and help to work without libfdt global state - import state + from binman import state Entry.__init__(self, section, etype, node) self._cbfs_arg = fdt_util.GetString(node, 'cbfs-arch', 'x86') diff --git a/tools/binman/etype/cros_ec_rw.py b/tools/binman/etype/cros_ec_rw.py index 261f8657a62..0dbe14b342a 100644 --- a/tools/binman/etype/cros_ec_rw.py +++ b/tools/binman/etype/cros_ec_rw.py @@ -5,7 +5,7 @@ # Entry-type module for a Chromium OS EC image (read-write section) # -from blob_named_by_arg import Entry_blob_named_by_arg +from binman.etype.blob_named_by_arg import Entry_blob_named_by_arg class Entry_cros_ec_rw(Entry_blob_named_by_arg): diff --git a/tools/binman/etype/fdtmap.py b/tools/binman/etype/fdtmap.py index 5dc08b8289a..aa8807990b7 100644 --- a/tools/binman/etype/fdtmap.py +++ b/tools/binman/etype/fdtmap.py @@ -8,9 +8,9 @@ This handles putting an FDT into the image with just the information about the image. """ -from entry import Entry -import tools -import tout +from binman.entry import Entry +from patman import tools +from patman import tout FDTMAP_MAGIC = b'_FDTMAP_' FDTMAP_HDR_LEN = 16 @@ -82,8 +82,8 @@ class Entry_fdtmap(Entry): global Fdt import libfdt - import state - from fdt import Fdt + from binman import state + from dtoc.fdt import Fdt Entry.__init__(self, section, etype, node) diff --git a/tools/binman/etype/files.py b/tools/binman/etype/files.py index 3473a2b1efd..10ab585f0ed 100644 --- a/tools/binman/etype/files.py +++ b/tools/binman/etype/files.py @@ -9,9 +9,9 @@ import glob import os -from section import Entry_section -import fdt_util -import tools +from binman.etype.section import Entry_section +from dtoc import fdt_util +from patman import tools class Entry_files(Entry_section): @@ -30,7 +30,7 @@ class Entry_files(Entry_section): def __init__(self, section, etype, node): # Put this here to allow entry-docs and help to work without libfdt global state - import state + from binman import state Entry_section.__init__(self, section, etype, node) self._pattern = fdt_util.GetString(self._node, 'pattern') diff --git a/tools/binman/etype/fill.py b/tools/binman/etype/fill.py index 623b7f4e95e..860410ed6e5 100644 --- a/tools/binman/etype/fill.py +++ b/tools/binman/etype/fill.py @@ -3,9 +3,9 @@ # Written by Simon Glass <sjg@chromium.org> # -from entry import Entry -import fdt_util -import tools +from binman.entry import Entry +from dtoc import fdt_util +from patman import tools class Entry_fill(Entry): """An entry which is filled to a particular byte value diff --git a/tools/binman/etype/fmap.py b/tools/binman/etype/fmap.py index 835ba5012e5..a43fac38de2 100644 --- a/tools/binman/etype/fmap.py +++ b/tools/binman/etype/fmap.py @@ -5,11 +5,11 @@ # Entry-type module for a Flash map, as used by the flashrom SPI flash tool # -from entry import Entry -import fmap_util -import tools -from tools import ToHexSize -import tout +from binman.entry import Entry +from binman import fmap_util +from patman import tools +from patman.tools import ToHexSize +from patman import tout class Entry_fmap(Entry): diff --git a/tools/binman/etype/gbb.py b/tools/binman/etype/gbb.py index a94c0fca9d5..dd105997179 100644 --- a/tools/binman/etype/gbb.py +++ b/tools/binman/etype/gbb.py @@ -8,11 +8,11 @@ from collections import OrderedDict -import command -from entry import Entry, EntryArg +from patman import command +from binman.entry import Entry, EntryArg -import fdt_util -import tools +from dtoc import fdt_util +from patman import tools # Build GBB flags. # (src/platform/vboot_reference/firmware/include/gbb_header.h) diff --git a/tools/binman/etype/image_header.py b/tools/binman/etype/image_header.py index b9327dd799b..176bdeb29b3 100644 --- a/tools/binman/etype/image_header.py +++ b/tools/binman/etype/image_header.py @@ -11,8 +11,8 @@ image. import struct -from entry import Entry -import fdt_util +from binman.entry import Entry +from dtoc import fdt_util IMAGE_HEADER_MAGIC = b'BinM' IMAGE_HEADER_LEN = 8 diff --git a/tools/binman/etype/intel_cmc.py b/tools/binman/etype/intel_cmc.py index fa6f7793c64..5e6edbe4dfd 100644 --- a/tools/binman/etype/intel_cmc.py +++ b/tools/binman/etype/intel_cmc.py @@ -5,8 +5,8 @@ # Entry-type module for Intel Chip Microcode binary blob # -from entry import Entry -from blob import Entry_blob +from binman.entry import Entry +from binman.etype.blob import Entry_blob class Entry_intel_cmc(Entry_blob): """Entry containing an Intel Chipset Micro Code (CMC) file diff --git a/tools/binman/etype/intel_descriptor.py b/tools/binman/etype/intel_descriptor.py index b6477931d6c..d4d7a26901d 100644 --- a/tools/binman/etype/intel_descriptor.py +++ b/tools/binman/etype/intel_descriptor.py @@ -7,8 +7,8 @@ import struct -from entry import Entry -from blob import Entry_blob +from binman.entry import Entry +from binman.etype.blob import Entry_blob FD_SIGNATURE = struct.pack('<L', 0x0ff0a55a) MAX_REGIONS = 5 diff --git a/tools/binman/etype/intel_fit.py b/tools/binman/etype/intel_fit.py index 2a34a05f955..ea482a61254 100644 --- a/tools/binman/etype/intel_fit.py +++ b/tools/binman/etype/intel_fit.py @@ -7,7 +7,7 @@ import struct -from blob import Entry_blob +from binman.etype.blob import Entry_blob class Entry_intel_fit(Entry_blob): """Intel Firmware Image Table (FIT) diff --git a/tools/binman/etype/intel_fit_ptr.py b/tools/binman/etype/intel_fit_ptr.py index 148b206c3c6..df118a68f2d 100644 --- a/tools/binman/etype/intel_fit_ptr.py +++ b/tools/binman/etype/intel_fit_ptr.py @@ -7,7 +7,7 @@ import struct -from blob import Entry_blob +from binman.etype.blob import Entry_blob class Entry_intel_fit_ptr(Entry_blob): """Intel Firmware Image Table (FIT) pointer diff --git a/tools/binman/etype/intel_fsp.py b/tools/binman/etype/intel_fsp.py index 00a78e70832..7db3d96b432 100644 --- a/tools/binman/etype/intel_fsp.py +++ b/tools/binman/etype/intel_fsp.py @@ -5,8 +5,8 @@ # Entry-type module for Intel Firmware Support Package binary blob # -from entry import Entry -from blob import Entry_blob +from binman.entry import Entry +from binman.etype.blob import Entry_blob class Entry_intel_fsp(Entry_blob): """Entry containing an Intel Firmware Support Package (FSP) file diff --git a/tools/binman/etype/intel_fsp_m.py b/tools/binman/etype/intel_fsp_m.py index bb1de73e414..51b4e7e1ac3 100644 --- a/tools/binman/etype/intel_fsp_m.py +++ b/tools/binman/etype/intel_fsp_m.py @@ -5,8 +5,8 @@ # Entry-type module for Intel Firmware Support Package binary blob (M section) # -from entry import Entry -from blob import Entry_blob +from binman.entry import Entry +from binman.etype.blob import Entry_blob class Entry_intel_fsp_m(Entry_blob): """Entry containing Intel Firmware Support Package (FSP) memory init diff --git a/tools/binman/etype/intel_fsp_s.py b/tools/binman/etype/intel_fsp_s.py index 3d6900d1fba..b3683e476a0 100644 --- a/tools/binman/etype/intel_fsp_s.py +++ b/tools/binman/etype/intel_fsp_s.py @@ -5,8 +5,8 @@ # Entry-type module for Intel Firmware Support Package binary blob (S section) # -from entry import Entry -from blob import Entry_blob +from binman.entry import Entry +from binman.etype.blob import Entry_blob class Entry_intel_fsp_s(Entry_blob): """Entry containing Intel Firmware Support Package (FSP) silicon init diff --git a/tools/binman/etype/intel_fsp_t.py b/tools/binman/etype/intel_fsp_t.py index 813a81f2e66..0f196f0f1c1 100644 --- a/tools/binman/etype/intel_fsp_t.py +++ b/tools/binman/etype/intel_fsp_t.py @@ -5,8 +5,8 @@ # Entry-type module for Intel Firmware Support Package binary blob (T section) # -from entry import Entry -from blob import Entry_blob +from binman.entry import Entry +from binman.etype.blob import Entry_blob class Entry_intel_fsp_t(Entry_blob): """Entry containing Intel Firmware Support Package (FSP) temp ram init diff --git a/tools/binman/etype/intel_ifwi.py b/tools/binman/etype/intel_ifwi.py index 36aadc210c4..6a96f6be552 100644 --- a/tools/binman/etype/intel_ifwi.py +++ b/tools/binman/etype/intel_ifwi.py @@ -7,10 +7,10 @@ from collections import OrderedDict -from entry import Entry -from blob import Entry_blob -import fdt_util -import tools +from binman.entry import Entry +from binman.etype.blob import Entry_blob +from dtoc import fdt_util +from patman import tools class Entry_intel_ifwi(Entry_blob): """Entry containing an Intel Integrated Firmware Image (IFWI) file diff --git a/tools/binman/etype/intel_me.py b/tools/binman/etype/intel_me.py index c932ec52225..41c9c6b9203 100644 --- a/tools/binman/etype/intel_me.py +++ b/tools/binman/etype/intel_me.py @@ -5,8 +5,8 @@ # Entry-type module for Intel Management Engine binary blob # -from entry import Entry -from blob import Entry_blob +from binman.entry import Entry +from binman.etype.blob import Entry_blob class Entry_intel_me(Entry_blob): """Entry containing an Intel Management Engine (ME) file diff --git a/tools/binman/etype/intel_mrc.py b/tools/binman/etype/intel_mrc.py index 4dbc99a04f2..854a4dda615 100644 --- a/tools/binman/etype/intel_mrc.py +++ b/tools/binman/etype/intel_mrc.py @@ -5,8 +5,8 @@ # Entry-type module for Intel Memory Reference Code binary blob # -from entry import Entry -from blob import Entry_blob +from binman.entry import Entry +from binman.etype.blob import Entry_blob class Entry_intel_mrc(Entry_blob): """Entry containing an Intel Memory Reference Code (MRC) file diff --git a/tools/binman/etype/intel_refcode.py b/tools/binman/etype/intel_refcode.py index 045db589d17..a1059f787e6 100644 --- a/tools/binman/etype/intel_refcode.py +++ b/tools/binman/etype/intel_refcode.py @@ -5,8 +5,8 @@ # Entry-type module for Intel Memory Reference Code binary blob # -from entry import Entry -from blob import Entry_blob +from binman.entry import Entry +from binman.etype.blob import Entry_blob class Entry_intel_refcode(Entry_blob): """Entry containing an Intel Reference Code file diff --git a/tools/binman/etype/intel_vbt.py b/tools/binman/etype/intel_vbt.py index d93dd196341..4d465ad0173 100644 --- a/tools/binman/etype/intel_vbt.py +++ b/tools/binman/etype/intel_vbt.py @@ -4,8 +4,8 @@ # Entry-type module for Intel Video BIOS Table binary blob # -from entry import Entry -from blob import Entry_blob +from binman.entry import Entry +from binman.etype.blob import Entry_blob class Entry_intel_vbt(Entry_blob): """Entry containing an Intel Video BIOS Table (VBT) file diff --git a/tools/binman/etype/intel_vga.py b/tools/binman/etype/intel_vga.py index 40982c86656..04cd72f3dc1 100644 --- a/tools/binman/etype/intel_vga.py +++ b/tools/binman/etype/intel_vga.py @@ -5,8 +5,8 @@ # Entry-type module for x86 VGA ROM binary blob # -from entry import Entry -from blob import Entry_blob +from binman.entry import Entry +from binman.etype.blob import Entry_blob class Entry_intel_vga(Entry_blob): """Entry containing an Intel Video Graphics Adaptor (VGA) file diff --git a/tools/binman/etype/powerpc_mpc85xx_bootpg_resetvec.py b/tools/binman/etype/powerpc_mpc85xx_bootpg_resetvec.py index 59fedd2b54b..cefd425a5dc 100644 --- a/tools/binman/etype/powerpc_mpc85xx_bootpg_resetvec.py +++ b/tools/binman/etype/powerpc_mpc85xx_bootpg_resetvec.py @@ -4,8 +4,8 @@ # Entry-type module for the PowerPC mpc85xx bootpg and resetvec code for U-Boot # -from entry import Entry -from blob import Entry_blob +from binman.entry import Entry +from binman.etype.blob import Entry_blob class Entry_powerpc_mpc85xx_bootpg_resetvec(Entry_blob): """PowerPC mpc85xx bootpg + resetvec code for U-Boot diff --git a/tools/binman/etype/section.py b/tools/binman/etype/section.py index 89b7bf67fa6..91b8e0c1100 100644 --- a/tools/binman/etype/section.py +++ b/tools/binman/etype/section.py @@ -8,16 +8,14 @@ Sections are entries which can contain other entries. This allows hierarchical images to be created. """ -from __future__ import print_function - from collections import OrderedDict import re import sys -from entry import Entry -import fdt_util -import tools -import tout +from binman.entry import Entry +from dtoc import fdt_util +from patman import tools +from patman import tout class Entry_section(Entry): diff --git a/tools/binman/etype/text.py b/tools/binman/etype/text.py index da1813a638e..3577135adbe 100644 --- a/tools/binman/etype/text.py +++ b/tools/binman/etype/text.py @@ -5,9 +5,9 @@ from collections import OrderedDict -from entry import Entry, EntryArg -import fdt_util -import tools +from binman.entry import Entry, EntryArg +from dtoc import fdt_util +from patman import tools class Entry_text(Entry): diff --git a/tools/binman/etype/u_boot.py b/tools/binman/etype/u_boot.py index 23dd12ce435..ab1019b00c7 100644 --- a/tools/binman/etype/u_boot.py +++ b/tools/binman/etype/u_boot.py @@ -5,8 +5,8 @@ # Entry-type module for U-Boot binary # -from entry import Entry -from blob import Entry_blob +from binman.entry import Entry +from binman.etype.blob import Entry_blob class Entry_u_boot(Entry_blob): """U-Boot flat binary diff --git a/tools/binman/etype/u_boot_dtb.py b/tools/binman/etype/u_boot_dtb.py index 6c805a666da..e98350088f5 100644 --- a/tools/binman/etype/u_boot_dtb.py +++ b/tools/binman/etype/u_boot_dtb.py @@ -5,8 +5,8 @@ # Entry-type module for U-Boot device tree # -from entry import Entry -from blob_dtb import Entry_blob_dtb +from binman.entry import Entry +from binman.etype.blob_dtb import Entry_blob_dtb class Entry_u_boot_dtb(Entry_blob_dtb): """U-Boot device tree diff --git a/tools/binman/etype/u_boot_dtb_with_ucode.py b/tools/binman/etype/u_boot_dtb_with_ucode.py index 6efd24a9b33..aec145533eb 100644 --- a/tools/binman/etype/u_boot_dtb_with_ucode.py +++ b/tools/binman/etype/u_boot_dtb_with_ucode.py @@ -5,9 +5,9 @@ # Entry-type module for U-Boot device tree with the microcode removed # -from entry import Entry -from blob_dtb import Entry_blob_dtb -import tools +from binman.entry import Entry +from binman.etype.blob_dtb import Entry_blob_dtb +from patman import tools class Entry_u_boot_dtb_with_ucode(Entry_blob_dtb): """A U-Boot device tree file, with the microcode removed @@ -26,7 +26,7 @@ class Entry_u_boot_dtb_with_ucode(Entry_blob_dtb): def __init__(self, section, etype, node): # Put this here to allow entry-docs and help to work without libfdt global state - import state + from binman import state Entry_blob_dtb.__init__(self, section, etype, node) self.ucode_data = b'' @@ -44,7 +44,7 @@ class Entry_u_boot_dtb_with_ucode(Entry_blob_dtb): def ProcessFdt(self, fdt): # So the module can be loaded without it - import fdt + from dtoc import fdt # If the section does not need microcode, there is nothing to do ucode_dest_entry = self.section.FindEntryType( diff --git a/tools/binman/etype/u_boot_elf.py b/tools/binman/etype/u_boot_elf.py index f83860dc0a8..5f906e520cf 100644 --- a/tools/binman/etype/u_boot_elf.py +++ b/tools/binman/etype/u_boot_elf.py @@ -5,11 +5,11 @@ # Entry-type module for U-Boot ELF image # -from entry import Entry -from blob import Entry_blob +from binman.entry import Entry +from binman.etype.blob import Entry_blob -import fdt_util -import tools +from dtoc import fdt_util +from patman import tools class Entry_u_boot_elf(Entry_blob): """U-Boot ELF image diff --git a/tools/binman/etype/u_boot_img.py b/tools/binman/etype/u_boot_img.py index 1ec0757c7f8..50cc71d3ce2 100644 --- a/tools/binman/etype/u_boot_img.py +++ b/tools/binman/etype/u_boot_img.py @@ -5,8 +5,8 @@ # Entry-type module for U-Boot binary # -from entry import Entry -from blob import Entry_blob +from binman.entry import Entry +from binman.etype.blob import Entry_blob class Entry_u_boot_img(Entry_blob): """U-Boot legacy image diff --git a/tools/binman/etype/u_boot_nodtb.py b/tools/binman/etype/u_boot_nodtb.py index a4b95a4390a..e8c0e1a1d6c 100644 --- a/tools/binman/etype/u_boot_nodtb.py +++ b/tools/binman/etype/u_boot_nodtb.py @@ -5,8 +5,8 @@ # Entry-type module for 'u-boot-nodtb.bin' # -from entry import Entry -from blob import Entry_blob +from binman.entry import Entry +from binman.etype.blob import Entry_blob class Entry_u_boot_nodtb(Entry_blob): """U-Boot flat binary without device tree appended diff --git a/tools/binman/etype/u_boot_spl.py b/tools/binman/etype/u_boot_spl.py index 7fedd000212..a6fddbe8f14 100644 --- a/tools/binman/etype/u_boot_spl.py +++ b/tools/binman/etype/u_boot_spl.py @@ -5,10 +5,9 @@ # Entry-type module for spl/u-boot-spl.bin # -import elf - -from entry import Entry -from blob import Entry_blob +from binman import elf +from binman.entry import Entry +from binman.etype.blob import Entry_blob class Entry_u_boot_spl(Entry_blob): """U-Boot SPL binary diff --git a/tools/binman/etype/u_boot_spl_bss_pad.py b/tools/binman/etype/u_boot_spl_bss_pad.py index 66a296a6f85..a6a177a1287 100644 --- a/tools/binman/etype/u_boot_spl_bss_pad.py +++ b/tools/binman/etype/u_boot_spl_bss_pad.py @@ -7,11 +7,11 @@ # to it will appear to SPL to be at the end of BSS rather than the start. # -import command -import elf -from entry import Entry -from blob import Entry_blob -import tools +from binman import elf +from binman.entry import Entry +from patman import command +from binman.etype.blob import Entry_blob +from patman import tools class Entry_u_boot_spl_bss_pad(Entry_blob): """U-Boot SPL binary padded with a BSS region diff --git a/tools/binman/etype/u_boot_spl_dtb.py b/tools/binman/etype/u_boot_spl_dtb.py index 1bcd449bf3a..a0761eeacd6 100644 --- a/tools/binman/etype/u_boot_spl_dtb.py +++ b/tools/binman/etype/u_boot_spl_dtb.py @@ -5,8 +5,8 @@ # Entry-type module for U-Boot device tree in SPL (Secondary Program Loader) # -from entry import Entry -from blob_dtb import Entry_blob_dtb +from binman.entry import Entry +from binman.etype.blob_dtb import Entry_blob_dtb class Entry_u_boot_spl_dtb(Entry_blob_dtb): """U-Boot SPL device tree diff --git a/tools/binman/etype/u_boot_spl_elf.py b/tools/binman/etype/u_boot_spl_elf.py index 24ee77237ed..f99f74abab2 100644 --- a/tools/binman/etype/u_boot_spl_elf.py +++ b/tools/binman/etype/u_boot_spl_elf.py @@ -5,8 +5,8 @@ # Entry-type module for U-Boot SPL ELF image # -from entry import Entry -from blob import Entry_blob +from binman.entry import Entry +from binman.etype.blob import Entry_blob class Entry_u_boot_spl_elf(Entry_blob): """U-Boot SPL ELF image diff --git a/tools/binman/etype/u_boot_spl_nodtb.py b/tools/binman/etype/u_boot_spl_nodtb.py index 41c17366b1d..072b915ff3a 100644 --- a/tools/binman/etype/u_boot_spl_nodtb.py +++ b/tools/binman/etype/u_boot_spl_nodtb.py @@ -5,8 +5,8 @@ # Entry-type module for 'u-boot-nodtb.bin' # -from entry import Entry -from blob import Entry_blob +from binman.entry import Entry +from binman.etype.blob import Entry_blob class Entry_u_boot_spl_nodtb(Entry_blob): """SPL binary without device tree appended diff --git a/tools/binman/etype/u_boot_spl_with_ucode_ptr.py b/tools/binman/etype/u_boot_spl_with_ucode_ptr.py index b650cf0146c..b1543a5ef32 100644 --- a/tools/binman/etype/u_boot_spl_with_ucode_ptr.py +++ b/tools/binman/etype/u_boot_spl_with_ucode_ptr.py @@ -7,11 +7,7 @@ import struct -import command -from entry import Entry -from blob import Entry_blob -from u_boot_with_ucode_ptr import Entry_u_boot_with_ucode_ptr -import tools +from binman.etype.u_boot_with_ucode_ptr import Entry_u_boot_with_ucode_ptr class Entry_u_boot_spl_with_ucode_ptr(Entry_u_boot_with_ucode_ptr): """U-Boot SPL with embedded microcode pointer diff --git a/tools/binman/etype/u_boot_tpl.py b/tools/binman/etype/u_boot_tpl.py index 1b69c4f4a74..6562457c9a6 100644 --- a/tools/binman/etype/u_boot_tpl.py +++ b/tools/binman/etype/u_boot_tpl.py @@ -5,10 +5,9 @@ # Entry-type module for tpl/u-boot-tpl.bin # -import elf - -from entry import Entry -from blob import Entry_blob +from binman import elf +from binman.entry import Entry +from binman.etype.blob import Entry_blob class Entry_u_boot_tpl(Entry_blob): """U-Boot TPL binary diff --git a/tools/binman/etype/u_boot_tpl_dtb.py b/tools/binman/etype/u_boot_tpl_dtb.py index 81a39704598..890155f271f 100644 --- a/tools/binman/etype/u_boot_tpl_dtb.py +++ b/tools/binman/etype/u_boot_tpl_dtb.py @@ -5,8 +5,8 @@ # Entry-type module for U-Boot device tree in TPL (Tertiary Program Loader) # -from entry import Entry -from blob_dtb import Entry_blob_dtb +from binman.entry import Entry +from binman.etype.blob_dtb import Entry_blob_dtb class Entry_u_boot_tpl_dtb(Entry_blob_dtb): """U-Boot TPL device tree diff --git a/tools/binman/etype/u_boot_tpl_dtb_with_ucode.py b/tools/binman/etype/u_boot_tpl_dtb_with_ucode.py index ce19a49e2e6..ca1bf85ace7 100644 --- a/tools/binman/etype/u_boot_tpl_dtb_with_ucode.py +++ b/tools/binman/etype/u_boot_tpl_dtb_with_ucode.py @@ -5,10 +5,7 @@ # Entry-type module for U-Boot device tree with the microcode removed # -import control -from entry import Entry -from u_boot_dtb_with_ucode import Entry_u_boot_dtb_with_ucode -import tools +from binman.etype.u_boot_dtb_with_ucode import Entry_u_boot_dtb_with_ucode class Entry_u_boot_tpl_dtb_with_ucode(Entry_u_boot_dtb_with_ucode): """U-Boot TPL with embedded microcode pointer diff --git a/tools/binman/etype/u_boot_tpl_elf.py b/tools/binman/etype/u_boot_tpl_elf.py index 9cc1cc2c450..7fa8e963640 100644 --- a/tools/binman/etype/u_boot_tpl_elf.py +++ b/tools/binman/etype/u_boot_tpl_elf.py @@ -5,8 +5,8 @@ # Entry-type module for U-Boot TPL ELF image # -from entry import Entry -from blob import Entry_blob +from binman.entry import Entry +from binman.etype.blob import Entry_blob class Entry_u_boot_tpl_elf(Entry_blob): """U-Boot TPL ELF image diff --git a/tools/binman/etype/u_boot_tpl_with_ucode_ptr.py b/tools/binman/etype/u_boot_tpl_with_ucode_ptr.py index 8d94dded694..7f7fab71051 100644 --- a/tools/binman/etype/u_boot_tpl_with_ucode_ptr.py +++ b/tools/binman/etype/u_boot_tpl_with_ucode_ptr.py @@ -7,11 +7,11 @@ import struct -import command -from entry import Entry -from blob import Entry_blob -from u_boot_with_ucode_ptr import Entry_u_boot_with_ucode_ptr -import tools +from patman import command +from binman.entry import Entry +from binman.etype.blob import Entry_blob +from binman.etype.u_boot_with_ucode_ptr import Entry_u_boot_with_ucode_ptr +from patman import tools class Entry_u_boot_tpl_with_ucode_ptr(Entry_u_boot_with_ucode_ptr): """U-Boot TPL with embedded microcode pointer diff --git a/tools/binman/etype/u_boot_ucode.py b/tools/binman/etype/u_boot_ucode.py index dee8848db7a..d9e1a605efa 100644 --- a/tools/binman/etype/u_boot_ucode.py +++ b/tools/binman/etype/u_boot_ucode.py @@ -5,9 +5,9 @@ # Entry-type module for a U-Boot binary with an embedded microcode pointer # -from entry import Entry -from blob import Entry_blob -import tools +from binman.entry import Entry +from binman.etype.blob import Entry_blob +from patman import tools class Entry_u_boot_ucode(Entry_blob): """U-Boot microcode block diff --git a/tools/binman/etype/u_boot_with_ucode_ptr.py b/tools/binman/etype/u_boot_with_ucode_ptr.py index 960a5efeb41..06047b654df 100644 --- a/tools/binman/etype/u_boot_with_ucode_ptr.py +++ b/tools/binman/etype/u_boot_with_ucode_ptr.py @@ -7,12 +7,12 @@ import struct -import command -import elf -from entry import Entry -from blob import Entry_blob -import fdt_util -import tools +from binman import elf +from binman.entry import Entry +from binman.etype.blob import Entry_blob +from dtoc import fdt_util +from patman import tools +from patman import command class Entry_u_boot_with_ucode_ptr(Entry_blob): """U-Boot with embedded microcode pointer diff --git a/tools/binman/etype/vblock.py b/tools/binman/etype/vblock.py index 91fa2f7808f..5753de7ec7a 100644 --- a/tools/binman/etype/vblock.py +++ b/tools/binman/etype/vblock.py @@ -9,10 +9,10 @@ from collections import OrderedDict import os -from entry import Entry, EntryArg +from binman.entry import Entry, EntryArg -import fdt_util -import tools +from dtoc import fdt_util +from patman import tools class Entry_vblock(Entry): """An entry which contains a Chromium OS verified boot block diff --git a/tools/binman/etype/x86_reset16.py b/tools/binman/etype/x86_reset16.py index 54eb814ea3d..ad864e54429 100644 --- a/tools/binman/etype/x86_reset16.py +++ b/tools/binman/etype/x86_reset16.py @@ -5,8 +5,8 @@ # Entry-type module for the 16-bit x86 reset code for U-Boot # -from entry import Entry -from blob import Entry_blob +from binman.entry import Entry +from binman.etype.blob import Entry_blob class Entry_x86_reset16(Entry_blob): """x86 16-bit reset code for U-Boot diff --git a/tools/binman/etype/x86_reset16_spl.py b/tools/binman/etype/x86_reset16_spl.py index 699a0c6bcbe..9a663f0ae23 100644 --- a/tools/binman/etype/x86_reset16_spl.py +++ b/tools/binman/etype/x86_reset16_spl.py @@ -5,8 +5,8 @@ # Entry-type module for the 16-bit x86 reset code for U-Boot # -from entry import Entry -from blob import Entry_blob +from binman.entry import Entry +from binman.etype.blob import Entry_blob class Entry_x86_reset16_spl(Entry_blob): """x86 16-bit reset code for U-Boot diff --git a/tools/binman/etype/x86_reset16_tpl.py b/tools/binman/etype/x86_reset16_tpl.py index 4eedb8d601d..864508f3672 100644 --- a/tools/binman/etype/x86_reset16_tpl.py +++ b/tools/binman/etype/x86_reset16_tpl.py @@ -5,8 +5,8 @@ # Entry-type module for the 16-bit x86 reset code for U-Boot # -from entry import Entry -from blob import Entry_blob +from binman.entry import Entry +from binman.etype.blob import Entry_blob class Entry_x86_reset16_tpl(Entry_blob): """x86 16-bit reset code for U-Boot diff --git a/tools/binman/etype/x86_start16.py b/tools/binman/etype/x86_start16.py index 6736b692d51..d8345f67221 100644 --- a/tools/binman/etype/x86_start16.py +++ b/tools/binman/etype/x86_start16.py @@ -5,8 +5,8 @@ # Entry-type module for the 16-bit x86 start-up code for U-Boot # -from entry import Entry -from blob import Entry_blob +from binman.entry import Entry +from binman.etype.blob import Entry_blob class Entry_x86_start16(Entry_blob): """x86 16-bit start-up code for U-Boot diff --git a/tools/binman/etype/x86_start16_spl.py b/tools/binman/etype/x86_start16_spl.py index c8c70639de0..ad520d3c6d9 100644 --- a/tools/binman/etype/x86_start16_spl.py +++ b/tools/binman/etype/x86_start16_spl.py @@ -5,8 +5,8 @@ # Entry-type module for the 16-bit x86 start-up code for U-Boot SPL # -from entry import Entry -from blob import Entry_blob +from binman.entry import Entry +from binman.etype.blob import Entry_blob class Entry_x86_start16_spl(Entry_blob): """x86 16-bit start-up code for SPL diff --git a/tools/binman/etype/x86_start16_tpl.py b/tools/binman/etype/x86_start16_tpl.py index 5261a8adf04..ccc8727d1d4 100644 --- a/tools/binman/etype/x86_start16_tpl.py +++ b/tools/binman/etype/x86_start16_tpl.py @@ -5,8 +5,8 @@ # Entry-type module for the 16-bit x86 start-up code for U-Boot TPL # -from entry import Entry -from blob import Entry_blob +from binman.entry import Entry +from binman.etype.blob import Entry_blob class Entry_x86_start16_tpl(Entry_blob): """x86 16-bit start-up code for TPL diff --git a/tools/binman/fdt_test.py b/tools/binman/fdt_test.py index ac6f910d3c0..c491d40e9ee 100644 --- a/tools/binman/fdt_test.py +++ b/tools/binman/fdt_test.py @@ -9,10 +9,10 @@ import sys import tempfile import unittest -import fdt -from fdt import FdtScan -import fdt_util -import tools +from dtoc import fdt +from dtoc import fdt_util +from dtoc.fdt import FdtScan +from patman import tools class TestFdt(unittest.TestCase): @classmethod diff --git a/tools/binman/fmap_util.py b/tools/binman/fmap_util.py index d0f956b6221..25fe60a9cc3 100644 --- a/tools/binman/fmap_util.py +++ b/tools/binman/fmap_util.py @@ -10,7 +10,7 @@ import collections import struct import sys -import tools +from patman import tools # constants imported from lib/fmap.h FMAP_SIGNATURE = b'__FMAP__' diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py index 872b8554440..5e24920088c 100644 --- a/tools/binman/ftest.py +++ b/tools/binman/ftest.py @@ -6,8 +6,7 @@ # # python -m unittest func_test.TestFunctional.testHelp -from __future__ import print_function - +import gzip import hashlib from optparse import OptionParser import os @@ -17,24 +16,23 @@ import sys import tempfile import unittest -import binman -import cbfs_util -import cmdline -import command -import control -import elf -import elf_test -import fdt -from etype import fdtmap -from etype import image_header -import fdt_util -import fmap_util -import test_util -import gzip +from binman import cbfs_util +from binman import cmdline +from binman import control +from binman import elf +from binman import elf_test +from binman import fmap_util +from binman import main +from binman import state +from dtoc import fdt +from dtoc import fdt_util +from binman.etype import fdtmap +from binman.etype import image_header from image import Image -import state -import tools -import tout +from patman import command +from patman import test_util +from patman import tools +from patman import tout # Contents of test files, corresponding to different entry types U_BOOT_DATA = b'1234' @@ -103,7 +101,7 @@ class TestFunctional(unittest.TestCase): @classmethod def setUpClass(cls): global entry - import entry + from binman import entry # Handle the case where argv[0] is 'python' cls._binman_dir = os.path.dirname(os.path.realpath(sys.argv[0])) @@ -1290,8 +1288,8 @@ class TestFunctional(unittest.TestCase): with self.assertRaises(ValueError) as e: self._DoReadFile('057_unknown_contents.dts', True) self.assertIn("Image '/binman': Internal error: Could not complete " - "processing of contents: remaining [<_testing.Entry__testing ", - str(e.exception)) + "processing of contents: remaining [" + "<binman.etype._testing.Entry__testing ", str(e.exception)) def testBadChangeSize(self): """Test that trying to change the size of an entry fails""" @@ -1338,7 +1336,8 @@ class TestFunctional(unittest.TestCase): with self.assertRaises(ValueError) as e: self._DoReadFileDtb('061_fdt_update_bad.dts', update_dtb=True) self.assertIn('Could not complete processing of Fdt: remaining ' - '[<_testing.Entry__testing', str(e.exception)) + '[<binman.etype._testing.Entry__testing', + str(e.exception)) def testEntryArgs(self): """Test passing arguments to entries from the command line""" @@ -1430,14 +1429,14 @@ class TestFunctional(unittest.TestCase): def testEntryDocs(self): """Test for creation of entry documentation""" with test_util.capture_sys_output() as (stdout, stderr): - control.WriteEntryDocs(binman.GetEntryModules()) + control.WriteEntryDocs(main.GetEntryModules()) self.assertTrue(len(stdout.getvalue()) > 0) def testEntryDocsMissing(self): """Test handling of missing entry documentation""" with self.assertRaises(ValueError) as e: with test_util.capture_sys_output() as (stdout, stderr): - control.WriteEntryDocs(binman.GetEntryModules(), 'u_boot') + control.WriteEntryDocs(main.GetEntryModules(), 'u_boot') self.assertIn('Documentation is missing for modules: u_boot', str(e.exception)) diff --git a/tools/binman/image.py b/tools/binman/image.py index 2beab7fd4d2..523b274c319 100644 --- a/tools/binman/image.py +++ b/tools/binman/image.py @@ -5,8 +5,6 @@ # Class for an image, the output of binman # -from __future__ import print_function - from collections import OrderedDict import fnmatch from operator import attrgetter @@ -14,14 +12,14 @@ import os import re import sys -from entry import Entry -from etype import fdtmap -from etype import image_header -from etype import section -import fdt -import fdt_util -import tools -import tout +from binman.entry import Entry +from binman.etype import fdtmap +from binman.etype import image_header +from binman.etype import section +from dtoc import fdt +from dtoc import fdt_util +from patman import tools +from patman import tout class Image(section.Entry_section): """A Image, representing an output from binman diff --git a/tools/binman/image_test.py b/tools/binman/image_test.py index 10f85d1081f..f85c3c51c0f 100644 --- a/tools/binman/image_test.py +++ b/tools/binman/image_test.py @@ -7,7 +7,7 @@ import unittest from image import Image -from test_util import capture_sys_output +from patman.test_util import capture_sys_output class TestImage(unittest.TestCase): def testInvalidFormat(self): diff --git a/tools/binman/binman.py b/tools/binman/main.py index 9e6fd721175..efa7fa8386f 100755 --- a/tools/binman/binman.py +++ b/tools/binman/main.py @@ -9,11 +9,8 @@ """See README for more information""" -from __future__ import print_function - from distutils.sysconfig import get_python_lib import glob -import multiprocessing import os import site import sys @@ -23,8 +20,9 @@ import unittest # Bring in the patman and dtoc libraries (but don't override the first path # in PYTHONPATH) our_path = os.path.dirname(os.path.realpath(__file__)) -for dirname in ['../patman', '../dtoc', '..', '../concurrencytest']: - sys.path.insert(2, os.path.join(our_path, dirname)) +sys.path.insert(2, os.path.join(our_path, '..')) + +from patman import test_util # Bring in the libfdt module sys.path.insert(2, 'scripts/dtc/pylibfdt') @@ -37,15 +35,9 @@ sys.path.insert(2, os.path.join(our_path, # that is not available in a virtualenv. sys.path.append(get_python_lib()) -import cmdline -import command -use_concurrent = True -try: - from concurrencytest import ConcurrentTestSuite, fork_for_tests -except: - use_concurrent = False -import control -import test_util +from binman import cmdline +from binman import control +from patman import test_util def RunTests(debug, verbosity, processes, test_preserve_dirs, args, toolpath): """Run the functional tests and any embedded doctests @@ -63,83 +55,27 @@ def RunTests(debug, verbosity, processes, test_preserve_dirs, args, toolpath): name to execute (as in 'binman test testSections', for example) toolpath: List of paths to use for tools """ - import cbfs_util_test - import elf_test - import entry_test - import fdt_test - import ftest - import image_test - import test + from binman import cbfs_util_test + from binman import elf_test + from binman import entry_test + from binman import fdt_test + from binman import ftest + from binman import image_test + from binman import test import doctest result = unittest.TestResult() - for module in []: - suite = doctest.DocTestSuite(module) - suite.run(result) - - sys.argv = [sys.argv[0]] - if debug: - sys.argv.append('-D') - if verbosity: - sys.argv.append('-v%d' % verbosity) - if toolpath: - for path in toolpath: - sys.argv += ['--toolpath', path] + test_name = args and args[0] or None # Run the entry tests first ,since these need to be the first to import the # 'entry' module. - test_name = args and args[0] or None - suite = unittest.TestSuite() - loader = unittest.TestLoader() - for module in (entry_test.TestEntry, ftest.TestFunctional, fdt_test.TestFdt, - elf_test.TestElf, image_test.TestImage, - cbfs_util_test.TestCbfs): - # Test the test module about our arguments, if it is interested - if hasattr(module, 'setup_test_args'): - setup_test_args = getattr(module, 'setup_test_args') - setup_test_args(preserve_indir=test_preserve_dirs, - preserve_outdirs=test_preserve_dirs and test_name is not None, - toolpath=toolpath, verbosity=verbosity) - if test_name: - try: - suite.addTests(loader.loadTestsFromName(test_name, module)) - except AttributeError: - continue - else: - suite.addTests(loader.loadTestsFromTestCase(module)) - if use_concurrent and processes != 1: - concurrent_suite = ConcurrentTestSuite(suite, - fork_for_tests(processes or multiprocessing.cpu_count())) - concurrent_suite.run(result) - else: - suite.run(result) - - # Remove errors which just indicate a missing test. Since Python v3.5 If an - # ImportError or AttributeError occurs while traversing name then a - # synthetic test that raises that error when run will be returned. These - # errors are included in the errors accumulated by result.errors. - if test_name: - errors = [] - for test, err in result.errors: - if ("has no attribute '%s'" % test_name) not in err: - errors.append((test, err)) - result.testsRun -= 1 - result.errors = errors - - print(result) - for test, err in result.errors: - print(test.id(), err) - for test, err in result.failures: - print(err, result.failures) - if result.skipped: - print('%d binman test%s SKIPPED:' % - (len(result.skipped), 's' if len(result.skipped) > 1 else '')) - for skip_info in result.skipped: - print('%s: %s' % (skip_info[0], skip_info[1])) - if result.errors or result.failures: - print('binman tests FAILED') - return 1 - return 0 + test_util.RunTestSuites( + result, debug, verbosity, test_preserve_dirs, processes, test_name, + toolpath, + [entry_test.TestEntry, ftest.TestFunctional, fdt_test.TestFdt, + elf_test.TestElf, image_test.TestImage, cbfs_util_test.TestCbfs]) + + return test_util.ReportResult('binman', test_name, result) def GetEntryModules(include_testing=True): """Get a set of entry class implementations @@ -157,8 +93,8 @@ def RunTestCoverage(): glob_list = GetEntryModules(False) all_set = set([os.path.splitext(os.path.basename(item))[0] for item in glob_list if '_testing' not in item]) - test_util.RunTestCoverage('tools/binman/binman.py', None, - ['*test*', '*binman.py', 'tools/patman/*', 'tools/dtoc/*'], + test_util.RunTestCoverage('tools/binman/binman', None, + ['*test*', '*main.py', 'tools/patman/*', 'tools/dtoc/*'], args.build_dir, all_set) def RunBinman(args): diff --git a/tools/binman/state.py b/tools/binman/state.py index d704ed2c7cd..36bc5135354 100644 --- a/tools/binman/state.py +++ b/tools/binman/state.py @@ -8,10 +8,10 @@ import hashlib import re -import fdt +from dtoc import fdt import os -import tools -import tout +from patman import tools +from patman import tout # Records the device-tree files known to binman, keyed by entry type (e.g. # 'u-boot-spl-dtb'). These are the output FDT files, which can be updated by @@ -167,8 +167,8 @@ def Prepare(images, dtb): global output_fdt_info, main_dtb, fdt_path_prefix # Import these here in case libfdt.py is not available, in which case # the above help option still works. - import fdt - import fdt_util + from dtoc import fdt + from dtoc import fdt_util # If we are updating the DTBs we need to put these updated versions # where Entry_blob_dtb can find them. We can ignore 'u-boot.dtb' diff --git a/tools/buildman/README b/tools/buildman/README index f3a0dc7288d..b2f983c715d 100644 --- a/tools/buildman/README +++ b/tools/buildman/README @@ -1091,7 +1091,8 @@ the -w option, for example: buildman -o /tmp/build --board sandbox -w -This will write the full build into /tmp/build including object files. +This will write the full build into /tmp/build including object files. You must +specify the output directory with -o when using -w. Other options diff --git a/tools/buildman/builder.py b/tools/buildman/builder.py index 30ebe1d820a..f8e71de4272 100644 --- a/tools/buildman/builder.py +++ b/tools/buildman/builder.py @@ -17,12 +17,12 @@ import sys import threading import time -import builderthread -import command -import gitutil -import terminal -from terminal import Print -import toolchain +from buildman import builderthread +from buildman import toolchain +from patman import command +from patman import gitutil +from patman import terminal +from patman.terminal import Print """ Theory of Operation @@ -479,6 +479,9 @@ class Builder: Args: commit_upto: Commit number to use (0..self.count-1) """ + if self.work_in_output: + return self._working_dir + commit_dir = None if self.commits: commit = self.commits[commit_upto] @@ -502,6 +505,8 @@ class Builder: target: Target name """ output_dir = self._GetOutputDir(commit_upto) + if self.work_in_output: + return output_dir return os.path.join(output_dir, target) def GetDoneFile(self, commit_upto, target): diff --git a/tools/buildman/builderthread.py b/tools/buildman/builderthread.py index fc6e1ab25da..48fcd6cf7e2 100644 --- a/tools/buildman/builderthread.py +++ b/tools/buildman/builderthread.py @@ -9,8 +9,8 @@ import shutil import sys import threading -import command -import gitutil +from patman import command +from patman import gitutil RETURN_CODE_RETRY = -1 @@ -280,8 +280,6 @@ class BuilderThread(threading.Thread): work_in_output: Use the output directory as the work directory and don't write to a separate output directory. """ - if work_in_output: - return # Fatal error if result.return_code < 0: return @@ -333,7 +331,7 @@ class BuilderThread(threading.Thread): # Write out the image and function size information and an objdump env = result.toolchain.MakeEnvironment(self.builder.full_path) - with open(os.path.join(build_dir, 'env'), 'w') as fd: + with open(os.path.join(build_dir, 'out-env'), 'w') as fd: for var in sorted(env.keys()): print('%s="%s"' % (var, env[var]), file=fd) lines = [] @@ -379,7 +377,8 @@ class BuilderThread(threading.Thread): capture_stderr=True, cwd=result.out_dir, raise_on_error=False, env=env) ubootenv = os.path.join(result.out_dir, 'uboot.env') - self.CopyFiles(result.out_dir, build_dir, '', ['uboot.env']) + if not work_in_output: + self.CopyFiles(result.out_dir, build_dir, '', ['uboot.env']) # Write out the image sizes file. This is similar to the output # of binutil's 'size' utility, but it omits the header line and @@ -391,17 +390,21 @@ class BuilderThread(threading.Thread): with open(sizes, 'w') as fd: print('\n'.join(lines), file=fd) - # Write out the configuration files, with a special case for SPL - for dirname in ['', 'spl', 'tpl']: - self.CopyFiles(result.out_dir, build_dir, dirname, ['u-boot.cfg', - 'spl/u-boot-spl.cfg', 'tpl/u-boot-tpl.cfg', '.config', - 'include/autoconf.mk', 'include/generated/autoconf.h']) - - # Now write the actual build output - if keep_outputs: - self.CopyFiles(result.out_dir, build_dir, '', ['u-boot*', '*.bin', - '*.map', '*.img', 'MLO', 'SPL', 'include/autoconf.mk', - 'spl/u-boot-spl*']) + if not work_in_output: + # Write out the configuration files, with a special case for SPL + for dirname in ['', 'spl', 'tpl']: + self.CopyFiles( + result.out_dir, build_dir, dirname, + ['u-boot.cfg', 'spl/u-boot-spl.cfg', 'tpl/u-boot-tpl.cfg', + '.config', 'include/autoconf.mk', + 'include/generated/autoconf.h']) + + # Now write the actual build output + if keep_outputs: + self.CopyFiles( + result.out_dir, build_dir, '', + ['u-boot*', '*.bin', '*.map', '*.img', 'MLO', 'SPL', + 'include/autoconf.mk', 'spl/u-boot-spl*']) def CopyFiles(self, out_dir, build_dir, dirname, patterns): """Copy files from the build directory to the output. diff --git a/tools/buildman/buildman b/tools/buildman/buildman index e4fba2d4b03..11a5d8e18ab 120000 --- a/tools/buildman/buildman +++ b/tools/buildman/buildman @@ -1 +1 @@ -buildman.py
\ No newline at end of file +main.py
\ No newline at end of file diff --git a/tools/buildman/cmdline.py b/tools/buildman/cmdline.py index 1377b9d2bec..680c072d662 100644 --- a/tools/buildman/cmdline.py +++ b/tools/buildman/cmdline.py @@ -76,8 +76,7 @@ def ParseArgs(): default=False, help="Do a dry run (describe actions, but do nothing)") parser.add_option('-N', '--no-subdirs', action='store_true', dest='no_subdirs', default=False, help="Don't create subdirectories when building current source for a single board") - parser.add_option('-o', '--output-dir', type='string', - dest='output_dir', default='..', + parser.add_option('-o', '--output-dir', type='string', dest='output_dir', help='Directory where all builds happen and buildman has its workspace (default is ../)') parser.add_option('-O', '--override-toolchain', type='string', help="Override host toochain to use for sandbox (e.g. 'clang-7')") diff --git a/tools/buildman/control.py b/tools/buildman/control.py index 30c030fd16e..071c2613ecf 100644 --- a/tools/buildman/control.py +++ b/tools/buildman/control.py @@ -5,18 +5,18 @@ import multiprocessing import os import shutil +import subprocess import sys -import board -import bsettings -from builder import Builder -import gitutil -import patchstream -import terminal -from terminal import Print -import toolchain -import command -import subprocess +from buildman import board +from buildman import bsettings +from buildman import toolchain +from buildman.builder import Builder +from patman import command +from patman import gitutil +from patman import patchstream +from patman import terminal +from patman.terminal import Print def GetPlural(count): """Returns a plural 's' if count is not 1""" @@ -175,6 +175,10 @@ def DoBuildman(options, args, toolchains=None, make_func=None, boards=None, if options.incremental: print(col.Color(col.RED, 'Warning: -I has been removed. See documentation')) + if not options.output_dir: + if options.work_in_output: + sys.exit(col.Color(col.RED, '-w requires that you specify -o')) + options.output_dir = '..' # Work out what subset of the boards we are building if not boards: @@ -207,7 +211,7 @@ def DoBuildman(options, args, toolchains=None, make_func=None, boards=None, sys.exit(col.Color(col.RED, 'No matching boards found')) if options.print_prefix: - err = ShowToolchainInfo(boards, toolchains) + err = ShowToolchainPrefix(boards, toolchains) if err: sys.exit(col.Color(col.RED, err)) return 0 diff --git a/tools/buildman/func_test.py b/tools/buildman/func_test.py index 1fbc6f6b003..418677f9ccb 100644 --- a/tools/buildman/func_test.py +++ b/tools/buildman/func_test.py @@ -8,15 +8,15 @@ import sys import tempfile import unittest -import board -import bsettings -import cmdline -import command -import control -import gitutil -import terminal -import toolchain -import tools +from buildman import board +from buildman import bsettings +from buildman import cmdline +from buildman import control +from buildman import toolchain +from patman import command +from patman import gitutil +from patman import terminal +from patman import tools settings_data = ''' # Buildman settings file @@ -546,6 +546,13 @@ class TestFunctional(unittest.TestCase): self.assertEqual(self._builder.count, self._total_builds) self.assertEqual(self._builder.fail, 0) + def testEnvironment(self): + """Test that the done and environment files are written to out-env""" + self._RunControl('-o', self._output_dir) + board0_dir = os.path.join(self._output_dir, 'current', 'board0') + self.assertTrue(os.path.exists(os.path.join(board0_dir, 'done'))) + self.assertTrue(os.path.exists(os.path.join(board0_dir, 'out-env'))) + def testWorkInOutput(self): """Test the -w option which should write directly to the output dir""" board_list = board.Boards() @@ -554,6 +561,10 @@ class TestFunctional(unittest.TestCase): boards=board_list) self.assertTrue( os.path.exists(os.path.join(self._output_dir, 'u-boot'))) + self.assertTrue( + os.path.exists(os.path.join(self._output_dir, 'done'))) + self.assertTrue( + os.path.exists(os.path.join(self._output_dir, 'out-env'))) def testWorkInOutputFail(self): """Test the -w option failures""" @@ -569,3 +580,9 @@ class TestFunctional(unittest.TestCase): self._RunControl('-b', self._test_branch, '-o', self._output_dir, '-w', clean_dir=False, boards=board_list) self.assertIn("single commit", str(e.exception)) + + board_list = board.Boards() + board_list.AddBoard(board.Board(*boards[0])) + with self.assertRaises(SystemExit) as e: + self._RunControl('-w', clean_dir=False) + self.assertIn("specify -o", str(e.exception)) diff --git a/tools/buildman/buildman.py b/tools/buildman/main.py index 30a8690f935..2b714739a20 100755 --- a/tools/buildman/buildman.py +++ b/tools/buildman/main.py @@ -6,8 +6,7 @@ """See README for more information""" -from __future__ import print_function - +import doctest import multiprocessing import os import re @@ -16,20 +15,18 @@ import unittest # Bring in the patman libraries our_path = os.path.dirname(os.path.realpath(__file__)) -sys.path.insert(1, os.path.join(our_path, '../patman')) +sys.path.insert(1, os.path.join(our_path, '..')) # Our modules -import board -import bsettings -import builder -import checkpatch -import cmdline -import control -import doctest -import gitutil -import patchstream -import terminal -import toolchain +from buildman import board +from buildman import bsettings +from buildman import builder +from buildman import cmdline +from buildman import control +from buildman import toolchain +from patman import patchstream +from patman import gitutil +from patman import terminal def RunTests(skip_net_tests): import func_test @@ -37,7 +34,7 @@ def RunTests(skip_net_tests): import doctest result = unittest.TestResult() - for module in ['toolchain', 'gitutil']: + for module in ['buildman.toolchain', 'patman.gitutil']: suite = doctest.DocTestSuite(module) suite.run(result) diff --git a/tools/buildman/test.py b/tools/buildman/test.py index d32b22653fb..40811ba9f9e 100644 --- a/tools/buildman/test.py +++ b/tools/buildman/test.py @@ -11,18 +11,17 @@ import unittest # Bring in the patman libraries our_path = os.path.dirname(os.path.realpath(__file__)) -sys.path.append(os.path.join(our_path, '../patman')) - -import board -import bsettings -import builder -import control -import command -import commit -import terminal -import test_util -import toolchain -import tools + +from buildman import board +from buildman import bsettings +from buildman import builder +from buildman import control +from buildman import toolchain +from patman import commit +from patman import command +from patman import terminal +from patman import test_util +from patman import tools use_network = True @@ -583,7 +582,7 @@ class TestBuild(unittest.TestCase): url = self.toolchains.LocateArchUrl('arm') self.assertRegexpMatches(url, 'https://www.kernel.org/pub/tools/' 'crosstool/files/bin/x86_64/.*/' - 'x86_64-gcc-.*-nolibc_arm-.*linux-gnueabi.tar.xz') + 'x86_64-gcc-.*-nolibc[-_]arm-.*linux-gnueabi.tar.xz') def testGetEnvArgs(self): """Test the GetEnvArgs() function""" diff --git a/tools/buildman/toolchain.py b/tools/buildman/toolchain.py index 4456a805c74..acb5a29c8fb 100644 --- a/tools/buildman/toolchain.py +++ b/tools/buildman/toolchain.py @@ -10,10 +10,10 @@ import sys import tempfile import urllib.request, urllib.error, urllib.parse -import bsettings -import command -import terminal -import tools +from buildman import bsettings +from patman import command +from patman import terminal +from patman import tools (PRIORITY_FULL_PREFIX, PRIORITY_PREFIX_GCC, PRIORITY_PREFIX_GCC_PATH, PRIORITY_CALC) = list(range(4)) diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py index 90a9e1a6269..ecfe0624d10 100644 --- a/tools/dtoc/dtb_platdata.py +++ b/tools/dtoc/dtb_platdata.py @@ -15,9 +15,9 @@ import collections import copy import sys -import fdt -import fdt_util -import tools +from dtoc import fdt +from dtoc import fdt_util +from patman import tools # When we see these properties we ignore them - i.e. do not create a structure member PROP_IGNORE_LIST = [ diff --git a/tools/dtoc/dtoc b/tools/dtoc/dtoc index 896ca44e62f..11a5d8e18ab 120000 --- a/tools/dtoc/dtoc +++ b/tools/dtoc/dtoc @@ -1 +1 @@ -dtoc.py
\ No newline at end of file +main.py
\ No newline at end of file diff --git a/tools/dtoc/fdt.py b/tools/dtoc/fdt.py index 1b7b730359a..188490b728f 100644 --- a/tools/dtoc/fdt.py +++ b/tools/dtoc/fdt.py @@ -8,10 +8,10 @@ import struct import sys -import fdt_util +from dtoc import fdt_util import libfdt from libfdt import QUIET_NOTFOUND -import tools +from patman import tools # This deals with a device tree, presenting it as an assortment of Node and # Prop objects, representing nodes and properties, respectively. This file diff --git a/tools/dtoc/fdt_util.py b/tools/dtoc/fdt_util.py index b105faec749..b0407937723 100644 --- a/tools/dtoc/fdt_util.py +++ b/tools/dtoc/fdt_util.py @@ -13,8 +13,8 @@ import struct import sys import tempfile -import command -import tools +from patman import command +from patman import tools def fdt32_to_cpu(val): """Convert a device tree cell to an integer diff --git a/tools/dtoc/dtoc.py b/tools/dtoc/main.py index f31cba900e5..b94d9c301f4 100755 --- a/tools/dtoc/dtoc.py +++ b/tools/dtoc/main.py @@ -25,8 +25,6 @@ options. For more information about the use of this options and tool please see doc/driver-model/of-plat.rst """ -from __future__ import print_function - from optparse import OptionParser import os import sys @@ -34,15 +32,15 @@ import unittest # Bring in the patman libraries our_path = os.path.dirname(os.path.realpath(__file__)) -sys.path.append(os.path.join(our_path, '../patman')) +sys.path.append(os.path.join(our_path, '..')) # Bring in the libfdt module sys.path.insert(0, 'scripts/dtc/pylibfdt') sys.path.insert(0, os.path.join(our_path, '../../build-sandbox_spl/scripts/dtc/pylibfdt')) -import dtb_platdata -import test_util +from dtoc import dtb_platdata +from patman import test_util def run_tests(args): """Run all the test we have for dtoc @@ -79,7 +77,7 @@ def run_tests(args): def RunTestCoverage(): """Run the tests and check that we get 100% coverage""" sys.argv = [sys.argv[0]] - test_util.RunTestCoverage('tools/dtoc/dtoc.py', '/dtoc.py', + test_util.RunTestCoverage('tools/dtoc/dtoc', '/main.py', ['tools/patman/*.py', '*/fdt*', '*test*'], options.build_dir) diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py index d733b706558..8498e8303c2 100755 --- a/tools/dtoc/test_dtoc.py +++ b/tools/dtoc/test_dtoc.py @@ -9,22 +9,20 @@ This includes unit tests for some functions and functional tests for the dtoc tool. """ -from __future__ import print_function - import collections import os import struct import unittest -import dtb_platdata +from dtoc import dtb_platdata from dtb_platdata import conv_name_to_c from dtb_platdata import get_compat_name from dtb_platdata import get_value from dtb_platdata import tab_to -import fdt -import fdt_util -import test_util -import tools +from dtoc import fdt +from dtoc import fdt_util +from patman import test_util +from patman import tools our_path = os.path.dirname(os.path.realpath(__file__)) diff --git a/tools/dtoc/test_fdt.py b/tools/dtoc/test_fdt.py index 3316757e61e..375e906424c 100755 --- a/tools/dtoc/test_fdt.py +++ b/tools/dtoc/test_fdt.py @@ -4,8 +4,6 @@ # Written by Simon Glass <sjg@chromium.org> # -from __future__ import print_function - from optparse import OptionParser import glob import os @@ -16,17 +14,16 @@ import unittest # Bring in the patman libraries our_path = os.path.dirname(os.path.realpath(__file__)) -for dirname in ['../patman', '..']: - sys.path.insert(0, os.path.join(our_path, dirname)) +sys.path.insert(1, os.path.join(our_path, '..')) -import command -import fdt +from dtoc import fdt +from dtoc import fdt_util +from dtoc.fdt_util import fdt32_to_cpu from fdt import TYPE_BYTE, TYPE_INT, TYPE_STRING, TYPE_BOOL, BytesToValue -import fdt_util -from fdt_util import fdt32_to_cpu import libfdt -import test_util -import tools +from patman import command +from patman import test_util +from patman import tools def _GetPropertyValue(dtb, node, prop_name): """Low-level function to get the property value based on its offset diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c index 381739d28df..8734663cd4c 100644 --- a/tools/env/fw_env.c +++ b/tools/env/fw_env.c @@ -1647,6 +1647,9 @@ static int check_device_config(int dev) goto err; } DEVTYPE(dev) = mtdinfo.type; + if (DEVESIZE(dev) == 0 && ENVSECTORS(dev) == 0 && + mtdinfo.type == MTD_NORFLASH) + DEVESIZE(dev) = mtdinfo.erasesize; if (DEVESIZE(dev) == 0) /* Assume the erase size is the same as the env-size */ DEVESIZE(dev) = ENVSIZE(dev); diff --git a/tools/fdtgrep.c b/tools/fdtgrep.c index 2a8058f57fa..7e168a1e6be 100644 --- a/tools/fdtgrep.c +++ b/tools/fdtgrep.c @@ -17,6 +17,7 @@ #include <stdlib.h> #include <string.h> #include <unistd.h> +#include <fdt_region.h> #include "fdt_host.h" #include "libfdt_internal.h" diff --git a/tools/genboardscfg.py b/tools/genboardscfg.py index 4f6382bc7ca..4ee7aa1f891 100755 --- a/tools/genboardscfg.py +++ b/tools/genboardscfg.py @@ -22,8 +22,7 @@ import sys import tempfile import time -sys.path.insert(1, os.path.join(os.path.dirname(__file__), 'buildman')) -import kconfiglib +from buildman import kconfiglib ### constant variables ### OUTPUT_FILE = 'boards.cfg' diff --git a/tools/image-host.c b/tools/image-host.c index 5bb68965e76..9a83b7f6755 100644 --- a/tools/image-host.c +++ b/tools/image-host.c @@ -10,6 +10,7 @@ #include "mkimage.h" #include <bootm.h> +#include <fdt_region.h> #include <image.h> #include <version.h> diff --git a/tools/libfdt/fdt_ro.c b/tools/libfdt/fdt_ro.c new file mode 100644 index 00000000000..8a9735a48c5 --- /dev/null +++ b/tools/libfdt/fdt_ro.c @@ -0,0 +1,2 @@ +#include "fdt_host.h" +#include "../scripts/dtc/libfdt/fdt_ro.c" diff --git a/tools/moveconfig.py b/tools/moveconfig.py index d8bf7fd0717..36361f9ed1b 100755 --- a/tools/moveconfig.py +++ b/tools/moveconfig.py @@ -314,11 +314,9 @@ import tempfile import threading import time -sys.path.append(os.path.join(os.path.dirname(__file__), 'buildman')) -sys.path.append(os.path.join(os.path.dirname(__file__), 'patman')) -import bsettings -import kconfiglib -import toolchain +from buildman import bsettings +from buildman import kconfiglib +from buildman import toolchain SHOW_GNU_MAKE = 'scripts/show-gnu-make' SLEEP_TIME=0.03 diff --git a/tools/patman/checkpatch.py b/tools/patman/checkpatch.py index d47ea438b7d..795b5193145 100644 --- a/tools/patman/checkpatch.py +++ b/tools/patman/checkpatch.py @@ -3,12 +3,14 @@ # import collections -import command -import gitutil import os import re import sys -import terminal + +from patman import command +from patman import gitutil +from patman import terminal +from patman import tools def FindCheckPatch(): top_level = gitutil.GetTopLevel() diff --git a/tools/patman/command.py b/tools/patman/command.py index 5fbd2c4a3e9..e67ac159e5a 100644 --- a/tools/patman/command.py +++ b/tools/patman/command.py @@ -3,8 +3,9 @@ # import os -import cros_subprocess -import tools + +from patman import cros_subprocess +from patman import tools """Shell command ease-ups for Python.""" diff --git a/tools/patman/func_test.py b/tools/patman/func_test.py index 76319fff37e..b7e2825de88 100644 --- a/tools/patman/func_test.py +++ b/tools/patman/func_test.py @@ -12,15 +12,12 @@ import sys import tempfile import unittest -try: - from StringIO import StringIO -except ImportError: - from io import StringIO - -import gitutil -import patchstream -import settings -import tools +from io import StringIO + +from patman import gitutil +from patman import patchstream +from patman import settings +from patman import tools @contextlib.contextmanager diff --git a/tools/patman/get_maintainer.py b/tools/patman/get_maintainer.py index 0ffb55a8219..473f0feebf4 100644 --- a/tools/patman/get_maintainer.py +++ b/tools/patman/get_maintainer.py @@ -2,10 +2,11 @@ # Copyright (c) 2012 The Chromium OS Authors. # -import command -import gitutil import os +from patman import command +from patman import gitutil + def FindGetMaintainer(): """Look for the get_maintainer.pl script. diff --git a/tools/patman/gitutil.py b/tools/patman/gitutil.py index a2a225c6b90..770a0510142 100644 --- a/tools/patman/gitutil.py +++ b/tools/patman/gitutil.py @@ -2,17 +2,17 @@ # Copyright (c) 2011 The Chromium OS Authors. # -import command import re import os -import series import subprocess import sys -import terminal -import checkpatch -import settings -import tools +from patman import checkpatch +from patman import command +from patman import series +from patman import settings +from patman import terminal +from patman import tools # True to use --no-decorate - we check this in Setup() use_no_decorate = True diff --git a/tools/patman/patman.py b/tools/patman/main.py index 7f4ac9aef48..f3d9c0c4348 100755 --- a/tools/patman/patman.py +++ b/tools/patman/main.py @@ -12,19 +12,20 @@ import re import sys import unittest +if __name__ == "__main__": + # Allow 'from patman import xxx to work' + our_path = os.path.dirname(os.path.realpath(__file__)) + sys.path.append(os.path.join(our_path, '..')) + # Our modules -try: - from patman import checkpatch, command, gitutil, patchstream, \ - project, settings, terminal, test -except ImportError: - import checkpatch - import command - import gitutil - import patchstream - import project - import settings - import terminal - import test +from patman import checkpatch +from patman import command +from patman import gitutil +from patman import patchstream +from patman import project +from patman import settings +from patman import terminal +from patman import test parser = OptionParser() @@ -85,7 +86,7 @@ if __name__ != "__main__": # Run our meagre tests elif options.test: import doctest - import func_test + from patman import func_test sys.argv = [sys.argv[0]] result = unittest.TestResult() diff --git a/tools/patman/patchstream.py b/tools/patman/patchstream.py index df3eb7483bb..405297505c9 100644 --- a/tools/patman/patchstream.py +++ b/tools/patman/patchstream.py @@ -9,10 +9,10 @@ import re import shutil import tempfile -import command -import commit -import gitutil -from series import Series +from patman import command +from patman import commit +from patman import gitutil +from patman.series import Series # Tags that we detect and remove re_remove = re.compile('^BUG=|^TEST=|^BRANCH=|^Review URL:' diff --git a/tools/patman/patman b/tools/patman/patman index 6cc3d7a56a5..11a5d8e18ab 120000 --- a/tools/patman/patman +++ b/tools/patman/patman @@ -1 +1 @@ -patman.py
\ No newline at end of file +main.py
\ No newline at end of file diff --git a/tools/patman/project.py b/tools/patman/project.py index 1d9cfc06252..2dfc303729b 100644 --- a/tools/patman/project.py +++ b/tools/patman/project.py @@ -4,7 +4,7 @@ import os.path -import gitutil +from patman import gitutil def DetectProject(): """Autodetect the name of the current project. diff --git a/tools/patman/series.py b/tools/patman/series.py index 6d9d48b1233..e5e28cebdf5 100644 --- a/tools/patman/series.py +++ b/tools/patman/series.py @@ -2,16 +2,14 @@ # Copyright (c) 2011 The Chromium OS Authors. # -from __future__ import print_function - import itertools import os -import get_maintainer -import gitutil -import settings -import terminal -import tools +from patman import get_maintainer +from patman import gitutil +from patman import settings +from patman import terminal +from patman import tools # Series-xxx tags that we understand valid_series = ['to', 'cc', 'version', 'changes', 'prefix', 'notes', 'name', diff --git a/tools/patman/settings.py b/tools/patman/settings.py index 5dc83a85002..ca74fc611ff 100644 --- a/tools/patman/settings.py +++ b/tools/patman/settings.py @@ -2,8 +2,6 @@ # Copyright (c) 2011 The Chromium OS Authors. # -from __future__ import print_function - try: import configparser as ConfigParser except: @@ -12,9 +10,9 @@ except: import os import re -import command -import gitutil -import tools +from patman import command +from patman import gitutil +from patman import tools """Default settings per-project. @@ -36,10 +34,7 @@ class _ProjectConfigParser(ConfigParser.SafeConfigParser): - Merge general default settings/aliases with project-specific ones. # Sample config used for tests below... - >>> try: - ... from StringIO import StringIO - ... except ImportError: - ... from io import StringIO + >>> from io import StringIO >>> sample_config = ''' ... [alias] ... me: Peter P. <likesspiders@example.com> diff --git a/tools/patman/terminal.py b/tools/patman/terminal.py index 5c9e3eea20c..c709438bdc4 100644 --- a/tools/patman/terminal.py +++ b/tools/patman/terminal.py @@ -7,8 +7,6 @@ This module handles terminal interaction including ANSI color codes. """ -from __future__ import print_function - import os import re import shutil diff --git a/tools/patman/test.py b/tools/patman/test.py index 889e186606e..e7f709e34c7 100644 --- a/tools/patman/test.py +++ b/tools/patman/test.py @@ -8,11 +8,11 @@ import os import tempfile import unittest -import checkpatch -import gitutil -import patchstream -import series -import commit +from patman import checkpatch +from patman import gitutil +from patman import patchstream +from patman import series +from patman import commit class TestPatch(unittest.TestCase): diff --git a/tools/patman/test_util.py b/tools/patman/test_util.py index 09f258c26b4..4d28d9fc922 100644 --- a/tools/patman/test_util.py +++ b/tools/patman/test_util.py @@ -3,21 +3,23 @@ # Copyright (c) 2016 Google, Inc # -from __future__ import print_function - from contextlib import contextmanager import glob +import multiprocessing import os import sys +import unittest -import command +from patman import command +from patman import test_util -try: - from StringIO import StringIO -except ImportError: - from io import StringIO +from io import StringIO -PYTHON = 'python%d' % sys.version_info[0] +use_concurrent = True +try: + from concurrencytest import ConcurrentTestSuite, fork_for_tests +except: + use_concurrent = False def RunTestCoverage(prog, filter_fname, exclude_list, build_dir, required=None): @@ -46,12 +48,15 @@ def RunTestCoverage(prog, filter_fname, exclude_list, build_dir, required=None): glob_list = [] glob_list += exclude_list glob_list += ['*libfdt.py', '*site-packages*', '*dist-packages*'] - test_cmd = 'test' if 'binman.py' in prog else '-t' - cmd = ('PYTHONPATH=$PYTHONPATH:%s/sandbox_spl/tools %s-coverage run ' - '--omit "%s" %s %s -P1' % (build_dir, PYTHON, ','.join(glob_list), + test_cmd = 'test' if 'binman' in prog else '-t' + prefix = '' + if build_dir: + prefix = 'PYTHONPATH=$PYTHONPATH:%s/sandbox_spl/tools ' % build_dir + cmd = ('%spython3-coverage run ' + '--omit "%s" %s %s -P1' % (prefix, ','.join(glob_list), prog, test_cmd)) os.system(cmd) - stdout = command.Output('%s-coverage' % PYTHON, 'report') + stdout = command.Output('python3-coverage', 'report') lines = stdout.splitlines() if required: # Convert '/path/to/name.py' just the module name 'name' @@ -70,8 +75,8 @@ def RunTestCoverage(prog, filter_fname, exclude_list, build_dir, required=None): print(coverage) if coverage != '100%': print(stdout) - print("Type '%s-coverage html' to get a report in " - 'htmlcov/index.html' % PYTHON) + print("Type 'python3-coverage html' to get a report in " + 'htmlcov/index.html') print('Coverage error: %s, but should be 100%%' % coverage) ok = False if not ok: @@ -90,3 +95,95 @@ def capture_sys_output(): yield capture_out, capture_err finally: sys.stdout, sys.stderr = old_out, old_err + + +def ReportResult(toolname:str, test_name: str, result: unittest.TestResult): + """Report the results from a suite of tests + + Args: + toolname: Name of the tool that ran the tests + test_name: Name of test that was run, or None for all + result: A unittest.TestResult object containing the results + """ + # Remove errors which just indicate a missing test. Since Python v3.5 If an + # ImportError or AttributeError occurs while traversing name then a + # synthetic test that raises that error when run will be returned. These + # errors are included in the errors accumulated by result.errors. + if test_name: + errors = [] + + for test, err in result.errors: + if ("has no attribute '%s'" % test_name) not in err: + errors.append((test, err)) + result.testsRun -= 1 + result.errors = errors + + print(result) + for test, err in result.errors: + print(test.id(), err) + for test, err in result.failures: + print(err, result.failures) + if result.skipped: + print('%d binman test%s SKIPPED:' % + (len(result.skipped), 's' if len(result.skipped) > 1 else '')) + for skip_info in result.skipped: + print('%s: %s' % (skip_info[0], skip_info[1])) + if result.errors or result.failures: + print('binman tests FAILED') + return 1 + return 0 + + +def RunTestSuites(result, debug, verbosity, test_preserve_dirs, processes, + test_name, toolpath, test_class_list): + """Run a series of test suites and collect the results + + Args: + result: A unittest.TestResult object to add the results to + debug: True to enable debugging, which shows a full stack trace on error + verbosity: Verbosity level to use (0-4) + test_preserve_dirs: True to preserve the input directory used by tests + so that it can be examined afterwards (only useful for debugging + tests). If a single test is selected (in args[0]) it also preserves + the output directory for this test. Both directories are displayed + on the command line. + processes: Number of processes to use to run tests (None=same as #CPUs) + test_name: Name of test to run, or None for all + toolpath: List of paths to use for tools + test_class_list: List of test classes to run + """ + for module in []: + suite = doctest.DocTestSuite(module) + suite.run(result) + + sys.argv = [sys.argv[0]] + if debug: + sys.argv.append('-D') + if verbosity: + sys.argv.append('-v%d' % verbosity) + if toolpath: + for path in toolpath: + sys.argv += ['--toolpath', path] + + suite = unittest.TestSuite() + loader = unittest.TestLoader() + for module in test_class_list: + # Test the test module about our arguments, if it is interested + if hasattr(module, 'setup_test_args'): + setup_test_args = getattr(module, 'setup_test_args') + setup_test_args(preserve_indir=test_preserve_dirs, + preserve_outdirs=test_preserve_dirs and test_name is not None, + toolpath=toolpath, verbosity=verbosity) + if test_name: + try: + suite.addTests(loader.loadTestsFromName(test_name, module)) + except AttributeError: + continue + else: + suite.addTests(loader.loadTestsFromTestCase(module)) + if use_concurrent and processes != 1: + concurrent_suite = ConcurrentTestSuite(suite, + fork_for_tests(processes or multiprocessing.cpu_count())) + concurrent_suite.run(result) + else: + suite.run(result) diff --git a/tools/patman/tools.py b/tools/patman/tools.py index 3feddb292fc..b50370dfe8d 100644 --- a/tools/patman/tools.py +++ b/tools/patman/tools.py @@ -3,9 +3,6 @@ # Copyright (c) 2016 Google, Inc # -from __future__ import print_function - -import command import glob import os import shutil @@ -13,7 +10,8 @@ import struct import sys import tempfile -import tout +from patman import command +from patman import tout # Output directly (generally this is temporary) outdir = None diff --git a/tools/patman/tout.py b/tools/patman/tout.py index 2a384851b0d..c7e32720965 100644 --- a/tools/patman/tout.py +++ b/tools/patman/tout.py @@ -4,11 +4,9 @@ # Terminal output logging. # -from __future__ import print_function - import sys -import terminal +from patman import terminal # Output verbosity levels that we support ERROR, WARNING, NOTICE, INFO, DETAIL, DEBUG = range(6) diff --git a/tools/rmboard.py b/tools/rmboard.py index df4f04b01c5..06c3562ad81 100755 --- a/tools/rmboard.py +++ b/tools/rmboard.py @@ -1,4 +1,4 @@ -#! /usr/bin/python +#! /usr/bin/python3 # SPDX-License-Identifier: GPL-2.0+ # Copyright 2019 Google LLC # @@ -23,8 +23,6 @@ This script works by: Search for ## to update the commit message manually. """ -from __future__ import print_function - import glob import os import re @@ -32,9 +30,8 @@ import sys # Bring in the patman libraries our_path = os.path.dirname(os.path.realpath(__file__)) -sys.path.append(os.path.join(our_path, '../tools/patman')) -import command +from patman import command def rm_kconfig_include(path): """Remove a path from Kconfig files |