diff options
338 files changed, 2361 insertions, 1202 deletions
@@ -283,6 +283,7 @@ config SYS_MALLOC_LEN config SPL_SYS_MALLOC_F_LEN hex "Size of malloc() pool in SPL" depends on SYS_MALLOC_F && SPL + default 0 if !SPL_FRAMEWORK default 0x2800 if RCAR_GEN3 default SYS_MALLOC_F_LEN help diff --git a/arch/Kconfig b/arch/Kconfig index 156567ed167..c3e9f9aef6a 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -85,6 +85,7 @@ config MIPS select HAVE_ARCH_IOREMAP select HAVE_PRIVATE_LIBGCC select SUPPORT_OF_CONTROL + select SPL_SEPARATE_BSS if SPL config NDS32 bool "NDS32 architecture" @@ -112,6 +113,7 @@ config RISCV select SUPPORT_OF_CONTROL select OF_CONTROL select DM + select SPL_SEPARATE_BSS if SPL imply DM_SERIAL imply DM_ETH imply DM_EVENT diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ed34fa59bd7..3243bd0ee01 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -8,6 +8,7 @@ config ARM64 bool select PHYS_64BIT select SYS_CACHE_SHIFT_6 + imply SPL_SEPARATE_BSS config ARM64_CRC32 bool "Enable support for CRC32 instruction" @@ -19,6 +20,23 @@ config ARM64_CRC32 not be present on all ARMv8.0, but is always present on ARMv8.1 and newer. +config COUNTER_FREQUENCY + int "Timer clock frequency" + depends on ARM64 || CPU_V7A + default 8000000 if IMX8 || MX7 || MX6UL || MX6ULL + default 24000000 if ARCH_SUNXI || ARCH_EXYNOS || ROCKCHIP_RK3128 || \ + ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036 + default 25000000 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A + default 100000000 if ARCH_ZYNQMP + default 0 + help + For platforms with ARMv8-A and ARMv7-A which features a system + counter, those platforms needs software to program the counter + frequency. Setup time clock frequency for certain platform. + 0 means no need to configure the system counter frequency. + For platforms needs the frequency set in U-Boot with a + pre-defined value, should have the macro defined as a non-zero value. + config POSITION_INDEPENDENT bool "Generate position-independent pre-relocation code" depends on ARM64 || CPU_V7A @@ -57,6 +75,10 @@ config SYS_INIT_SP_BSS_OFFSET that the early malloc region, global data (gd), and early stack usage do not overlap any appended DTB. +config SPL_SYS_NO_VECTOR_TABLE + depends on SPL + bool + config LINUX_KERNEL_IMAGE_HEADER depends on ARM64 bool @@ -267,6 +289,7 @@ config CPU_ARM926EJS bool select SYS_CACHE_SHIFT_5 imply SYS_ARM_MMU + imply SPL_SEPARATE_BSS config CPU_ARM946ES bool @@ -277,6 +300,7 @@ config CPU_ARM1136 bool select SYS_CACHE_SHIFT_5 imply SYS_ARM_MMU + imply SPL_SEPARATE_BSS config CPU_ARM1176 bool @@ -624,6 +648,7 @@ config ARCH_ORION5X bool "Marvell Orion" select CPU_ARM926EJS select GPIO_EXTRA_HEADER + select SPL_SEPARATE_BSS if SPL config TARGET_STV0991 bool "Support stv0991" @@ -814,6 +839,7 @@ config ARCH_OMAP2PLUS imply TI_SYSC if DM && OF_CONTROL imply FIT imply DM_EVENT + imply SPL_SEPARATE_BSS config ARCH_MESON bool "Amlogic Meson" @@ -957,6 +983,7 @@ config ARCH_MX6 select SYS_FSL_SEC_LE imply MXC_GPIO imply SYS_THUMB_BUILD + imply SPL_SEPARATE_BSS if ARCH_MX6 config SPL_LDSCRIPT diff --git a/arch/arm/cpu/armv7/ls102xa/psci.S b/arch/arm/cpu/armv7/ls102xa/psci.S index 531cfb033bc..3956178369f 100644 --- a/arch/arm/cpu/armv7/ls102xa/psci.S +++ b/arch/arm/cpu/armv7/ls102xa/psci.S @@ -36,7 +36,7 @@ .align 5 -#define ONE_MS (COUNTER_FREQUENCY / 1000) +#define ONE_MS (CONFIG_COUNTER_FREQUENCY / 1000) #define RESET_WAIT (30 * ONE_MS) .globl psci_version diff --git a/arch/arm/cpu/armv7/ls102xa/timer.c b/arch/arm/cpu/armv7/ls102xa/timer.c index d79bf105f13..c6126b10c35 100644 --- a/arch/arm/cpu/armv7/ls102xa/timer.c +++ b/arch/arm/cpu/armv7/ls102xa/timer.c @@ -65,7 +65,7 @@ int timer_init(void) /* Enable System Counter */ writel(SYS_COUNTER_CTRL_ENABLE, &sctr->cntcr); - freq = COUNTER_FREQUENCY; + freq = CONFIG_COUNTER_FREQUENCY; asm("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq)); /* Set PL1 Physical Timer Ctrl */ diff --git a/arch/arm/cpu/armv7/nonsec_virt.S b/arch/arm/cpu/armv7/nonsec_virt.S index 1773fae205c..39aeeb423f0 100644 --- a/arch/arm/cpu/armv7/nonsec_virt.S +++ b/arch/arm/cpu/armv7/nonsec_virt.S @@ -189,11 +189,11 @@ ENTRY(_nonsec_init) * we do this here instead. * But first check if we have the generic timer. */ -#ifdef COUNTER_FREQUENCY +#if CONFIG_COUNTER_FREQUENCY mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1 and r0, r0, #CPUID_ARM_GENTIMER_MASK @ mask arch timer bits cmp r0, #(1 << CPUID_ARM_GENTIMER_SHIFT) - ldreq r1, =COUNTER_FREQUENCY + ldreq r1, =CONFIG_COUNTER_FREQUENCY mcreq p15, 0, r1, c14, c0, 0 @ write CNTFRQ #endif diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index af87a5432ae..37036128a78 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -97,12 +97,10 @@ switch_to_hypervisor_ret: orr r0, r0, #0xc0 @ disable FIQ and IRQ msr cpsr,r0 +#if !CONFIG_IS_ENABLED(SYS_NO_VECTOR_TABLE) /* * Setup vector: - * (OMAP4 spl TEXT_BASE is not 32 byte aligned. - * Continue to use ROM code vector only in OMAP4 spl) */ -#if !(defined(CONFIG_OMAP44XX) && defined(CONFIG_SPL_BUILD)) /* Set V=0 in CP15 SCTLR register - for VBAR to point to vector */ mrc p15, 0, r0, c1, c0, 0 @ Read CP15 SCTLR Register bic r0, #CR_V @ V = 0 diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c index 1ac50f558a4..d1bd6b9be41 100644 --- a/arch/arm/cpu/armv7/sunxi/psci.c +++ b/arch/arm/cpu/armv7/sunxi/psci.c @@ -57,7 +57,7 @@ static u32 __secure cp15_read_cntp_ctl(void) return val; } -#define ONE_MS (COUNTER_FREQUENCY / 1000) +#define ONE_MS (CONFIG_COUNTER_FREQUENCY / 1000) static void __secure __mdelay(u32 ms) { diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index 14678a36708..cf469804c51 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -819,7 +819,7 @@ int mmc_get_env_dev(void) } #endif -enum env_location env_get_location(enum env_operation op, int prio) +enum env_location arch_env_get_location(enum env_operation op, int prio) { enum boot_src src = get_boot_src(); enum env_location env_loc = ENVL_NOWHERE; diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spintable.S b/arch/arm/cpu/armv8/fsl-layerscape/spintable.S index d6bd1884599..1eb0c2d4a7e 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/spintable.S +++ b/arch/arm/cpu/armv8/fsl-layerscape/spintable.S @@ -113,6 +113,6 @@ _dead_loop: .align 3 .global __real_cntfrq __real_cntfrq: - .quad COUNTER_FREQUENCY + .quad CONFIG_COUNTER_FREQUENCY /* Secondary Boot Code ends here */ __secondary_boot_code_end: diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index 6a6a4f86502..d328e8c08a1 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -138,9 +138,9 @@ pie_fixup_done: 0: msr daifclr, #0x4 /* Unmask SError interrupts */ -#ifdef COUNTER_FREQUENCY +#if CONFIG_COUNTER_FREQUENCY branch_if_not_highest_el x0, 4f - ldr x0, =COUNTER_FREQUENCY + ldr x0, =CONFIG_COUNTER_FREQUENCY msr cntfrq_el0, x0 /* Initialize CNTFRQ */ #endif diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 90f86e3fcaa..1032ce4c856 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -378,6 +378,8 @@ dtb-$(CONFIG_AM33XX) += \ am335x-baltos.dtb \ am335x-bone.dtb \ am335x-boneblack.dtb \ + am335x-boneblack-wireless.dtb \ + am335x-boneblue.dtb \ am335x-brppt1-mmc.dtb \ am335x-brppt1-nand.dtb \ am335x-brppt1-spi.dtb \ @@ -387,11 +389,14 @@ dtb-$(CONFIG_AM33XX) += \ am335x-evm.dtb \ am335x-evmsk.dtb \ am335x-bonegreen.dtb \ + am335x-bonegreen-wireless.dtb \ am335x-icev2.dtb \ am335x-pocketbeagle.dtb \ am335x-pxm50.dtb \ am335x-rut.dtb \ am335x-sancloud-bbe.dtb \ + am335x-sancloud-bbe-lite.dtb \ + am335x-sancloud-bbe-extended-wifi.dtb \ am335x-shc.dtb \ am335x-pdu001.dtb \ am335x-chiliboard.dtb \ diff --git a/arch/arm/dts/am335x-bone-common.dtsi b/arch/arm/dts/am335x-bone-common.dtsi index 35ec1a8df87..43fe03d096a 100644 --- a/arch/arm/dts/am335x-bone-common.dtsi +++ b/arch/arm/dts/am335x-bone-common.dtsi @@ -397,4 +397,9 @@ &rtc { clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>; clock-names = "ext-clk", "int-clk"; + system-power-controller; +}; + +&pruss_tm { + status = "okay"; }; diff --git a/arch/arm/dts/am335x-boneblack-common.dtsi b/arch/arm/dts/am335x-boneblack-common.dtsi index 64c3e9269f4..a7a8c61ef9b 100644 --- a/arch/arm/dts/am335x-boneblack-common.dtsi +++ b/arch/arm/dts/am335x-boneblack-common.dtsi @@ -3,9 +3,6 @@ * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ */ -#include <dt-bindings/display/tda998x.h> -#include <dt-bindings/interrupt-controller/irq.h> - &ldo3_reg { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; @@ -25,145 +22,9 @@ non-removable; }; -&am33xx_pinmux { - nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins { - pinctrl-single,pins = < - AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3) - AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0) - AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0) - AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0) - AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0) - AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0) - AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0) - AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0) - AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0) - AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0) - AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0) - AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0) - AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0) - AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0) - AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0) - AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0) - AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0) - AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0) - AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0) - AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0) - AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) - >; - }; - - nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins { - pinctrl-single,pins = < - AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3) - >; - }; - - mcasp0_pins: mcasp0_pins { - pinctrl-single,pins = < - AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */ - AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2*/ - AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLUP, MUX_MODE0) - AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE0) - AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.GPIO1_27 */ - >; - }; -}; - -&lcdc { - status = "okay"; - - /* If you want to get 24 bit RGB and 16 BGR mode instead of - * current 16 bit RGB and 24 BGR modes, set the propety - * below to "crossed" and uncomment the video-ports -property - * in tda19988 node. - */ - blue-and-red-wiring = "straight"; - - port { - lcdc_0: endpoint@0 { - remote-endpoint = <&hdmi_0>; - }; - }; -}; - -&i2c0 { - tda19988: tda19988@70 { - compatible = "nxp,tda998x"; - reg = <0x70>; - nxp,calib-gpios = <&gpio1 25 0>; - interrupts-extended = <&gpio1 25 IRQ_TYPE_LEVEL_LOW>; - - pinctrl-names = "default", "off"; - pinctrl-0 = <&nxp_hdmi_bonelt_pins>; - pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>; - - /* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */ - /* video-ports = <0x234501>; */ - - #sound-dai-cells = <0>; - audio-ports = < TDA998x_I2S 0x03>; - - ports { - port@0 { - hdmi_0: endpoint@0 { - remote-endpoint = <&lcdc_0>; - }; - }; - }; - }; -}; - -&rtc { - system-power-controller; -}; - -&mcasp0 { - #sound-dai-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&mcasp0_pins>; - status = "okay"; - op-mode = <0>; /* MCASP_IIS_MODE */ - tdm-slots = <2>; - serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ - 0 0 1 0 - >; - tx-num-evt = <32>; - rx-num-evt = <32>; -}; - / { memory@80000000 { device_type = "memory"; reg = <0x80000000 0x20000000>; /* 512 MB */ }; - - clk_mcasp0_fixed: clk_mcasp0_fixed { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <24576000>; - }; - - clk_mcasp0: clk_mcasp0 { - #clock-cells = <0>; - compatible = "gpio-gate-clock"; - clocks = <&clk_mcasp0_fixed>; - enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on GPIO1_27 */ - }; - - sound { - compatible = "simple-audio-card"; - simple-audio-card,name = "TI BeagleBone Black"; - simple-audio-card,format = "i2s"; - simple-audio-card,bitclock-master = <&dailink0_master>; - simple-audio-card,frame-master = <&dailink0_master>; - - dailink0_master: simple-audio-card,cpu { - sound-dai = <&mcasp0>; - clocks = <&clk_mcasp0>; - }; - - simple-audio-card,codec { - sound-dai = <&tda19988>; - }; - }; }; diff --git a/arch/arm/dts/am335x-boneblack-hdmi.dtsi b/arch/arm/dts/am335x-boneblack-hdmi.dtsi new file mode 100644 index 00000000000..7cfddada934 --- /dev/null +++ b/arch/arm/dts/am335x-boneblack-hdmi.dtsi @@ -0,0 +1,141 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ + */ + +#include <dt-bindings/display/tda998x.h> +#include <dt-bindings/interrupt-controller/irq.h> + +&am33xx_pinmux { + nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) + >; + }; + + nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3) + >; + }; + + mcasp0_pins: mcasp0_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */ + AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2*/ + AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLUP, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.GPIO1_27 */ + >; + }; +}; + +&lcdc { + status = "okay"; + + /* If you want to get 24 bit RGB and 16 BGR mode instead of + * current 16 bit RGB and 24 BGR modes, set the propety + * below to "crossed" and uncomment the video-ports -property + * in tda19988 node. + */ + blue-and-red-wiring = "straight"; + + port { + lcdc_0: endpoint@0 { + remote-endpoint = <&hdmi_0>; + }; + }; +}; + +&i2c0 { + tda19988: tda19988@70 { + compatible = "nxp,tda998x"; + reg = <0x70>; + nxp,calib-gpios = <&gpio1 25 0>; + interrupts-extended = <&gpio1 25 IRQ_TYPE_LEVEL_LOW>; + + pinctrl-names = "default", "off"; + pinctrl-0 = <&nxp_hdmi_bonelt_pins>; + pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>; + + /* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */ + /* video-ports = <0x234501>; */ + + #sound-dai-cells = <0>; + audio-ports = < TDA998x_I2S 0x03>; + + ports { + port@0 { + hdmi_0: endpoint@0 { + remote-endpoint = <&lcdc_0>; + }; + }; + }; + }; +}; + +&mcasp0 { + #sound-dai-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&mcasp0_pins>; + status = "okay"; + op-mode = <0>; /* MCASP_IIS_MODE */ + tdm-slots = <2>; + serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ + 0 0 1 0 + >; + tx-num-evt = <32>; + rx-num-evt = <32>; +}; + +/ { + clk_mcasp0_fixed: clk_mcasp0_fixed { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <24576000>; + }; + + clk_mcasp0: clk_mcasp0 { + #clock-cells = <0>; + compatible = "gpio-gate-clock"; + clocks = <&clk_mcasp0_fixed>; + enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on GPIO1_27 */ + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "TI BeagleBone Black"; + simple-audio-card,format = "i2s"; + simple-audio-card,bitclock-master = <&dailink0_master>; + simple-audio-card,frame-master = <&dailink0_master>; + + dailink0_master: simple-audio-card,cpu { + sound-dai = <&mcasp0>; + clocks = <&clk_mcasp0>; + }; + + simple-audio-card,codec { + sound-dai = <&tda19988>; + }; + }; +}; diff --git a/arch/arm/dts/am335x-boneblack-wireless.dts b/arch/arm/dts/am335x-boneblack-wireless.dts new file mode 100644 index 00000000000..8b2b24c8067 --- /dev/null +++ b/arch/arm/dts/am335x-boneblack-wireless.dts @@ -0,0 +1,111 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ + */ +/dts-v1/; + +#include "am33xx.dtsi" +#include "am335x-bone-common.dtsi" +#include "am335x-boneblack-common.dtsi" +#include "am335x-boneblack-hdmi.dtsi" +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + model = "TI AM335x BeagleBone Black Wireless"; + compatible = "ti,am335x-bone-black-wireless", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx"; + + wlan_en_reg: fixedregulator@2 { + compatible = "regulator-fixed"; + regulator-name = "wlan-en-regulator"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + startup-delay-us= <70000>; + + /* WL_EN */ + gpio = <&gpio3 9 0>; + enable-active-high; + }; +}; + +&am33xx_pinmux { + bt_pins: pinmux_bt_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gmii1_txd0.gpio0_28 - BT_EN */ + >; + }; + + mmc3_pins: pinmux_mmc3_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE6 ) /* (L15) gmii1_rxd1.mmc2_clk */ + AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLUP, MUX_MODE6 ) /* (J16) gmii1_txen.mmc2_cmd */ + AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLUP, MUX_MODE5 ) /* (J17) gmii1_rxdv.mmc2_dat0 */ + AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLUP, MUX_MODE5 ) /* (J18) gmii1_txd3.mmc2_dat1 */ + AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLUP, MUX_MODE5 ) /* (K15) gmii1_txd2.mmc2_dat2 */ + AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLUP, MUX_MODE5 ) /* (H16) gmii1_col.mmc2_dat3 */ + >; + }; + + uart3_pins: pinmux_uart3_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gmii1_rxd3.uart3_rxd */ + AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* gmii1_rxd2.uart3_txd */ + AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT, MUX_MODE3) /* mdio_data.uart3_ctsn */ + AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* mdio_clk.uart3_rtsn */ + >; + }; + + wl18xx_pins: pinmux_wl18xx_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gmii1_txclk.gpio3_9 WL_EN */ + AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) /* rmii1_refclk.gpio0_29 WL_IRQ */ + AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gmii1_rxclk.gpio3_10 LS_BUF_EN */ + >; + }; +}; + +&mac { + status = "disabled"; +}; + +&mmc3 { + dmas = <&edma_xbar 12 0 1 + &edma_xbar 13 0 2>; + dma-names = "tx", "rx"; + status = "okay"; + vmmc-supply = <&wlan_en_reg>; + bus-width = <4>; + non-removable; + cap-power-off-card; + keep-power-in-suspend; + pinctrl-names = "default"; + pinctrl-0 = <&mmc3_pins &wl18xx_pins>; + + #address-cells = <1>; + #size-cells = <0>; + wlcore: wlcore@2 { + compatible = "ti,wl1835"; + reg = <2>; + interrupt-parent = <&gpio0>; + interrupts = <29 IRQ_TYPE_EDGE_RISING>; + }; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins &bt_pins>; + status = "okay"; + + bluetooth { + compatible = "ti,wl1835-st"; + enable-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>; + }; +}; + +&gpio3 { + ls-buf-en-hog { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "LS_BUF_EN"; + }; +}; diff --git a/arch/arm/dts/am335x-boneblack.dts b/arch/arm/dts/am335x-boneblack.dts index e2ee8b8c07b..9312197316f 100644 --- a/arch/arm/dts/am335x-boneblack.dts +++ b/arch/arm/dts/am335x-boneblack.dts @@ -7,6 +7,7 @@ #include "am33xx.dtsi" #include "am335x-bone-common.dtsi" #include "am335x-boneblack-common.dtsi" +#include "am335x-boneblack-hdmi.dtsi" / { model = "TI AM335x BeagleBone Black"; diff --git a/arch/arm/dts/am335x-boneblue.dts b/arch/arm/dts/am335x-boneblue.dts new file mode 100644 index 00000000000..856fdf58b0f --- /dev/null +++ b/arch/arm/dts/am335x-boneblue.dts @@ -0,0 +1,617 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ + */ +/dts-v1/; + +#include "am33xx.dtsi" +#include "am335x-osd335x-common.dtsi" +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + model = "TI AM335x BeagleBone Blue"; + compatible = "ti,am335x-bone-blue", "ti,am33xx"; + + chosen { + stdout-path = &uart0; + tick-timer = &timer2; + }; + + leds { + pinctrl-names = "default"; + pinctrl-0 = <&user_leds_s0>; + + compatible = "gpio-leds"; + + usr_0_led { + label = "beaglebone:green:usr0"; + gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + default-state = "off"; + }; + + usr_1_led { + label = "beaglebone:green:usr1"; + gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "mmc0"; + default-state = "off"; + }; + + usr_2_led { + label = "beaglebone:green:usr2"; + gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "cpu0"; + default-state = "off"; + }; + + usr_3_led { + label = "beaglebone:green:usr3"; + gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "mmc1"; + default-state = "off"; + }; + + wifi_led { + label = "wifi"; + gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "phy0assoc"; + }; + + red_led { + label = "red"; + gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + green_led { + label = "green"; + gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + batt_1_led { + label = "bat25"; + gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + batt_2_led { + label = "bat50"; + gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + batt_3_led { + label = "bat75"; + gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + batt_4_led { + label = "bat100"; + gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + }; + + vmmcsd_fixed: fixedregulator0 { + compatible = "regulator-fixed"; + regulator-name = "vmmcsd_fixed"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + wlan_en_reg: fixedregulator@2 { + compatible = "regulator-fixed"; + regulator-name = "wlan-en-regulator"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + startup-delay-us= <70000>; + + /* WL_EN */ + gpio = <&gpio3 9 0>; + enable-active-high; + }; +}; + +&am33xx_pinmux { + user_leds_s0: user_leds_s0 { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7) /* (V15) gpmc_a5.gpio1[21] - USR_LED_0 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT, MUX_MODE7) /* (U15) gpmc_a6.gpio1[22] - USR_LED_1 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT, MUX_MODE7) /* (T15) gpmc_a7.gpio1[23] - USR_LED_2 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT, MUX_MODE7) /* (V16) gpmc_a8.gpio1[24] - USR_LED_3 */ + AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT, MUX_MODE7) /* (A15) xdma_event_intr0.gpio0[19] - WIFI_LED */ + AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE7) /* (R7) gpmc_advn_ale.gpio2[2] - P8.7, LED_RED, GP1_PIN_5 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE7) /* (T7) gpmc_oen_ren.gpio2[3] - P8.8, LED_GREEN, GP1_PIN_6 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE7) /* (U12) gpmc_ad11.gpio0[27] - P8.17, BATT_LED_1 */ + AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE7) /* (T5) lcd_data15.gpio0[11] - P8.32, BATT_LED_2 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE7) /* (V6) gpmc_csn0.gpio1[29] - P8.26, BATT_LED_3 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE7) /* (T11) gpmc_ad10.gpio0[26] - P8.14, BATT_LED_4 */ + + >; + }; + + i2c2_pins: pinmux_i2c2_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* (D18) uart1_ctsn.I2C2_SDA */ + AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* (D17) uart1_rtsn.I2C2_SCL */ + >; + }; + + /* UT0 */ + uart0_pins: pinmux_uart0_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) + >; + }; + + /* UT1 */ + uart1_pins: pinmux_uart1_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) + >; + }; + + /* GPS */ + uart2_pins: pinmux_uart2_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE1) /* (A17) spi0_sclk.uart2_rxd */ + AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* (B17) spi0_d0.uart2_txd */ + >; + }; + + /* DSM2 */ + uart4_pins: pinmux_uart4_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE6) /* (T17) gpmc_wait0.uart4_rxd */ + >; + }; + + /* UT5 */ + uart5_pins: pinmux_uart5_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_INPUT_PULLUP, MUX_MODE4) /* (U2) lcd_data9.uart5_rxd */ + AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT_PULLDOWN, MUX_MODE4) /* (U1) lcd_data8.uart5_txd */ + >; + }; + + mmc1_pins: pinmux_mmc1_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7) /* (C15) spi0_cs1.gpio0[6] */ + >; + }; + + mmc2_pins: pinmux_mmc2_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* (U9) gpmc_csn1.mmc1_clk */ + AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* (V9) gpmc_csn2.mmc1_cmd */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* (U7) gpmc_ad0.mmc1_dat0 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* (V7) gpmc_ad1.mmc1_dat1 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* (R8) gpmc_ad2.mmc1_dat2 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* (T8) gpmc_ad3.mmc1_dat3 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) /* (U8) gpmc_ad4.mmc1_dat4 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* (V8) gpmc_ad5.mmc1_dat5 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) /* (R9) gpmc_ad6.mmc1_dat6 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) /* (T9) gpmc_ad7.mmc1_dat7 */ + >; + }; + + mmc3_pins: pinmux_mmc3_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE6) /* (L15) gmii1_rxd1.mmc2_clk */ + AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLUP, MUX_MODE6) /* (J16) gmii1_txen.mmc2_cmd */ + AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLUP, MUX_MODE5) /* (J17) gmii1_rxdv.mmc2_dat0 */ + AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLUP, MUX_MODE5) /* (J18) gmii1_txd3.mmc2_dat1 */ + AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLUP, MUX_MODE5) /* (K15) gmii1_txd2.mmc2_dat2 */ + AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLUP, MUX_MODE5) /* (H16) gmii1_col.mmc2_dat3 */ + >; + }; + + bt_pins: pinmux_bt_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLUP, MUX_MODE7) /* (K17) gmii1_txd0.gpio0[28] - BT_EN */ + >; + }; + + uart3_pins: pinmux_uart3_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE1) /* (L17) gmii1_rxd3.uart3_rxd */ + AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* (L16) gmii1_rxd2.uart3_txd */ + AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT, MUX_MODE3) /* (M17) mdio_data.uart3_ctsn */ + AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* (M18) mdio_clk.uart3_rtsn */ + >; + }; + + wl18xx_pins: pinmux_wl18xx_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* (K18) gmii1_txclk.gpio3[9] - WL_EN */ + AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) /* (K16) gmii1_txd1.gpio0[21] - WL_IRQ */ + AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_OUTPUT_PULLUP, MUX_MODE7) /* (L18) gmii1_rxclk.gpio3[10] - LS_BUF_EN */ + >; + }; + + /* DCAN */ + dcan1_pins: pinmux_dcan1_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT, MUX_MODE2) /* (E17) uart0_rtsn.dcan1_rx */ + AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT, MUX_MODE2) /* (E18) uart0_ctsn.dcan1_tx */ + AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_OUTPUT, MUX_MODE7) /* (M16) gmii1_rxd0.gpio2[21] */ + >; + }; + + /* E1 */ + eqep0_pins: pinmux_eqep0_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR0, PIN_INPUT, MUX_MODE1) /* (B12) mcasp0_aclkr.eQEP0A_in */ + AM33XX_PADCONF(AM335X_PIN_MCASP0_FSR, PIN_INPUT, MUX_MODE1) /* (C13) mcasp0_fsr.eQEP0B_in */ + >; + }; + + /* E2 */ + eqep1_pins: pinmux_eqep1_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_INPUT, MUX_MODE2) /* (V2) lcd_data12.eQEP1A_in */ + AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_INPUT, MUX_MODE2) /* (V3) lcd_data13.eQEP1B_in */ + >; + }; + + /* E3 */ + eqep2_pins: pinmux_eqep2_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT, MUX_MODE4) /* (T12) gpmc_ad12.eQEP2A_in */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT, MUX_MODE4) /* (R12) gpmc_ad13.eQEP2B_in */ + >; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; + + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; + + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&uart4_pins>; + + status = "okay"; +}; + +&uart5 { + pinctrl-names = "default"; + pinctrl-0 = <&uart5_pins>; + + status = "okay"; +}; + +&usb0 { + dr_mode = "peripheral"; + interrupts-extended = <&intc 18 &tps 0>; + interrupt-names = "mc", "vbus"; +}; + +&usb1 { + dr_mode = "host"; +}; + +&i2c0 { + baseboard_eeprom: baseboard_eeprom@50 { + compatible = "atmel,24c256"; + reg = <0x50>; + + #address-cells = <1>; + #size-cells = <1>; + baseboard_data: baseboard_data@0 { + reg = <0 0x100>; + }; + }; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; + + status = "okay"; + clock-frequency = <400000>; + + mpu9250@68 { + compatible = "invensense,mpu9250"; + reg = <0x68>; + interrupt-parent = <&gpio3>; + interrupts = <21 IRQ_TYPE_EDGE_RISING>; + i2c-gate { + #address-cells = <1>; + #size-cells = <0>; + ax8975@c { + compatible = "asahi-kasei,ak8975"; + reg = <0x0c>; + }; + }; + }; + + pressure@76 { + compatible = "bosch,bmp280"; + reg = <0x76>; + }; +}; + +/include/ "tps65217.dtsi" + +&tps { + /delete-property/ ti,pmic-shutdown-controller; + + charger { + interrupts = <0>, <1>; + interrupt-names = "USB", "AC"; + status = "okay"; + }; +}; + +&mmc1 { + status = "okay"; + vmmc-supply = <&vmmcsd_fixed>; + bus-width = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; + cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; +}; + +&mmc2 { + status = "okay"; + vmmc-supply = <&vmmcsd_fixed>; + bus-width = <8>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_pins>; +}; + +&mmc3 { + dmas = <&edma_xbar 12 0 1 + &edma_xbar 13 0 2>; + dma-names = "tx", "rx"; + status = "okay"; + vmmc-supply = <&wlan_en_reg>; + bus-width = <4>; + non-removable; + cap-power-off-card; + keep-power-in-suspend; + pinctrl-names = "default"; + pinctrl-0 = <&mmc3_pins &wl18xx_pins>; + + #address-cells = <1>; + #size-cells = <0>; + wlcore: wlcore@2 { + compatible = "ti,wl1835"; + reg = <2>; + interrupt-parent = <&gpio0>; + interrupts = <21 IRQ_TYPE_EDGE_RISING>; + }; +}; + +&tscadc { + status = "okay"; + adc { + ti,adc-channels = <0 1 2 3 4 5 6 7>; + }; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins &bt_pins>; + status = "okay"; + + bluetooth { + compatible = "ti,wl1835-st"; + enable-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>; + }; +}; + +&rtc { + system-power-controller; + clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>; + clock-names = "ext-clk", "int-clk"; +}; + +&dcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&dcan1_pins>; + status = "okay"; +}; + +&gpio0 { + gpio-line-names = + "UART3_CTS", /* M17 */ + "UART3_RTS", /* M18 */ + "UART2_RX", /* A17 */ + "UART2_TX", /* B17 */ + "I2C1_SDA", /* B16 */ + "I2C1_SCL", /* A16 */ + "MMC0_CD", /* C15 */ + "SPI1_SS2", /* C18 */ + "EQEP_1A", /* V2 */ + "EQEP_1B", /* V3 */ + "MDIR_2B", /* V4 */ + "BATT_LED_2", /* T5 */ + "I2C2_SDA", /* D18 */ + "I2C2_SCL", /* D17 */ + "UART1_RX", /* D16 */ + "UART1_TX", /* D15 */ + "MMC2_DAT1", /* J18 */ + "MMC2_DAT2", /* K15 */ + "NC", /* F16 */ + "WIFI_LED", /* A15 */ + "MOT_STBY", /* D14 */ + "WLAN_IRQ", /* K16 */ + "PWM_2A", /* U10 */ + "PWM_2B", /* T10 */ + "", + "", + "BATT_LED_4", /* T11 */ + "BATT_LED_1", /* U12 */ + "BT_EN", /* K17 */ + "SPI1_SS1", /* H18 */ + "UART4_RX", /* T17 */ + "MDIR_1B"; /* U17 */ +}; + +&gpio1 { + gpio-line-names = + "MMC1_DAT0", /* U7 */ + "MMC1_DAT1", /* V7 */ + "MMC1_DAT2", /* R8 */ + "MMC1_DAT3", /* T8 */ + "MMC1_DAT4", /* U8 */ + "MMC1_DAT5", /* V8 */ + "MMC1_DAT6", /* R9 */ + "MMC1_DAT7", /* T9 */ + "DCAN1_TX", /* E18 */ + "DCAN1_RX", /* E17 */ + "UART0_RX", /* E15 */ + "UART0_TX", /* E16 */ + "EQEP_2A", /* T12 */ + "EQEP_2B", /* R12 */ + "PRU_E_A", /* V13 */ + "PRU_E_B", /* U13 */ + "MDIR_2A", /* R13 */ + "GPIO1_17", /* V14 */ + "PWM_1A", /* U14 */ + "PWM_1B", /* T14 */ + "EMMC_RST", /* R14 */ + "USR_LED_0", /* V15 */ + "USR_LED_1", /* U15 */ + "USR_LED_2", /* T15 */ + "USR_LED_3", /* V16 */ + "GPIO1_25", /* U16 */ + "MCASP0_AXR0", /* T16 */ + "MCASP0_AXR1", /* V17 */ + "MCASP0_ACLKR", /* U18 */ + "BATT_LED_3", /* V6 */ + "MMC1_CLK", /* U9 */ + "MMC1_CMD"; /* V9 */ +}; + +&gpio2 { + gpio-line-names = + "MDIR_1A", /* T13 */ + "MCASP0_FSR", /* V12 */ + "LED_RED", /* R7 */ + "LED_GREEN", /* T7 */ + "MODE_BTN", /* U6 */ + "PAUSE_BTN", /* T6 */ + "MDIR_4A", /* R1 */ + "MDIR_4B", /* R2 */ + "MDIR_3B", /* R3 */ + "MDIR_3A", /* R4 */ + "SVO7", /* T1 */ + "SVO8", /* T2 */ + "SVO5", /* T3 */ + "SVO6", /* T4 */ + "UART5_TX", /* U1 */ + "UART5_RX", /* U2 */ + "SERVO_EN", /* U3 */ + "NC", /* U4 */ + "UART3_RX", /* L17 */ + "UART3_TX", /* L16 */ + "MMC2_CLK", /* L15 */ + "DCAN1_SILENT", /* M16 */ + "SVO1", /* U5 */ + "SVO3", /* R5 */ + "SVO2", /* V5 */ + "SVO4", /* R6 */ + "MMC0_DAT3", /* F17 */ + "MMC0_DAT2", /* F18 */ + "MMC0_DAT1", /* G15 */ + "MMC0_DAT0", /* G16 */ + "MMC0_CLK", /* G17 */ + "MMC0_CMD"; /* G18 */ +}; + +&gpio3 { + gpio-line-names = + "MMC2_DAT3", /* H16 */ + "GPIO3_1", /* H17 */ + "GPIO3_2", /* J15 */ + "MMC2_CMD", /* J16 */ + "MMC2_DAT0", /* J17 */ + "I2C0_SDA", /* C17 */ + "I2C0_SCL", /* C16 */ + "EMU1", /* C14 */ + "EMU0", /* B14 */ + "WL_EN", /* K18 */ + "WL_BT_OE", /* L18 */ + "", + "", + "NC", /* F15 */ + "SPI1_SCK", /* A13 */ + "SPI1_MISO", /* B13 */ + "SPI1_MOSI", /* D12 */ + "GPIO3_17", /* C12 */ + "EQEP_0A", /* B12 */ + "EQEP_0B", /* C13 */ + "GPIO3_20", /* D13 */ + "IMU_INT", /* A14 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + ""; + + ls-buf-en-hog { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + output-high; + }; +}; + +&epwmss0 { + status = "okay"; +}; + +&eqep0 { + pinctrl-names = "default"; + pinctrl-0 = <&eqep0_pins>; + status = "okay"; +}; + +&epwmss1 { + status = "okay"; +}; + +&eqep1 { + pinctrl-names = "default"; + pinctrl-0 = <&eqep1_pins>; + status = "okay"; +}; + +&epwmss2 { + status = "okay"; +}; + +&eqep2 { + pinctrl-names = "default"; + pinctrl-0 = <&eqep2_pins>; + status = "okay"; +}; diff --git a/arch/arm/dts/am335x-bonegreen-wireless.dts b/arch/arm/dts/am335x-bonegreen-wireless.dts new file mode 100644 index 00000000000..74db0fc3939 --- /dev/null +++ b/arch/arm/dts/am335x-bonegreen-wireless.dts @@ -0,0 +1,127 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ + */ +/dts-v1/; + +#include "am33xx.dtsi" +#include "am335x-bone-common.dtsi" +#include "am335x-bonegreen-common.dtsi" +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + model = "TI AM335x BeagleBone Green Wireless"; + compatible = "ti,am335x-bone-green-wireless", "ti,am335x-bone-green", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx"; + + wlan_en_reg: fixedregulator@2 { + compatible = "regulator-fixed"; + regulator-name = "wlan-en-regulator"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + startup-delay-us= <70000>; + + /* WL_EN */ + gpio = <&gpio0 26 0>; + enable-active-high; + }; +}; + +&am33xx_pinmux { + bt_pins: pinmux_bt_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_ad12.gpio1_28 BT_EN */ + >; + }; + + mmc3_pins: pinmux_mmc3_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad12.mmc2_dat0 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad13.mmc2_dat1 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad14.mmc2_dat2 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_ad15.mmc2_dat3 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_csn3.mmc2_cmd */ + AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT_PULLUP, MUX_MODE3) /* gpmc_clk.mmc2_clk */ + >; + }; + + uart3_pins: pinmux_uart3_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gmii1_rxd3.uart3_rxd */ + AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* gmii1_rxd2.uart3_txd */ + AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT, MUX_MODE3) /* mdio_data.uart3_ctsn */ + AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* mdio_clk.uart3_rtsn */ + >; + }; + + wl18xx_pins: pinmux_wl18xx_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad10.gpio0_26 WL_EN */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad11.gpio0_27 WL_IRQ */ + AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_csn0.gpio1_29 LS_BUF_EN */ + >; + }; +}; + +&mac { + status = "disabled"; +}; + +&mmc3 { + dmas = <&edma_xbar 12 0 1 + &edma_xbar 13 0 2>; + dma-names = "tx", "rx"; + status = "okay"; + vmmc-supply = <&wlan_en_reg>; + bus-width = <4>; + non-removable; + cap-power-off-card; + keep-power-in-suspend; + pinctrl-names = "default"; + pinctrl-0 = <&mmc3_pins &wl18xx_pins>; + + #address-cells = <1>; + #size-cells = <0>; + wlcore: wlcore@2 { + compatible = "ti,wl1835"; + reg = <2>; + interrupt-parent = <&gpio0>; + interrupts = <27 IRQ_TYPE_EDGE_RISING>; + }; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins &bt_pins>; + status = "okay"; + + bluetooth { + compatible = "ti,wl1835-st"; + enable-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; + }; +}; + +&gpio1 { + ls-buf-en-hog { + gpio-hog; + gpios = <29 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "LS_BUF_EN"; + }; +}; + +/* BT_AUD_OUT from wl1835 has to be pulled low when WL_EN is activated.*/ +/* in case it isn't, wilink8 ends up in one of the test modes that */ +/* intruces various issues (elp wkaeup timeouts etc.) */ +/* On the BBGW this pin is routed through the level shifter (U21) that */ +/* introduces a pullup on the line and wilink8 ends up in a bad state. */ +/* use a gpio hog to force this pin low. An alternative may be adding */ +/* an external pulldown on U21 pin 4. */ + +&gpio3 { + bt-aud-in-hog { + gpio-hog; + gpios = <16 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "MCASP0_AHCLKR"; + }; +}; diff --git a/arch/arm/dts/am335x-sancloud-bbe-common.dtsi b/arch/arm/dts/am335x-sancloud-bbe-common.dtsi new file mode 100644 index 00000000000..21b601fa4c1 --- /dev/null +++ b/arch/arm/dts/am335x-sancloud-bbe-common.dtsi @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ + */ + +&am33xx_pinmux { + cpsw_default: cpsw_default { + pinctrl-single,pins = < + /* Slave 1 */ + AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txen.rgmii1_tctl */ + AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ + AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ + AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ + AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ + AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ + AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ + AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ + AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ + AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ + AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ + AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ + >; + }; + + cpsw_sleep: cpsw_sleep { + pinctrl-single,pins = < + /* Slave 1 reset value */ + AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) + AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) + >; + }; + + usb_hub_ctrl: usb_hub_ctrl { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT_PULLUP, MUX_MODE7) /* rmii1_refclk.gpio0_29 */ + >; + }; +}; + +&mac { + pinctrl-0 = <&cpsw_default>; + pinctrl-1 = <&cpsw_sleep>; +}; + +&cpsw_emac0 { + phy-mode = "rgmii-id"; +}; + +&i2c0 { + usb2512b: usb-hub@2c { + pinctrl-names = "default"; + pinctrl-0 = <&usb_hub_ctrl>; + compatible = "microchip,usb2512b"; + reg = <0x2c>; + reset-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; + }; +}; diff --git a/arch/arm/dts/am335x-sancloud-bbe-extended-wifi.dts b/arch/arm/dts/am335x-sancloud-bbe-extended-wifi.dts new file mode 100644 index 00000000000..246a1a9b3e4 --- /dev/null +++ b/arch/arm/dts/am335x-sancloud-bbe-extended-wifi.dts @@ -0,0 +1,113 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2021 Sancloud Ltd + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + */ +/dts-v1/; + +#include "am33xx.dtsi" +#include "am335x-bone-common.dtsi" +#include "am335x-boneblack-common.dtsi" +#include "am335x-sancloud-bbe-common.dtsi" +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + model = "SanCloud BeagleBone Enhanced Extended WiFi"; + compatible = "sancloud,am335x-boneenhanced", + "ti,am335x-bone-black", + "ti,am335x-bone", + "ti,am33xx"; + + wlan_en_reg: fixedregulator@2 { + compatible = "regulator-fixed"; + regulator-name = "wlan-en-regulator"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us= <100000>; + }; +}; + +&am33xx_pinmux { + mmc3_pins: pinmux_mmc3_pins { + pinctrl-single,pins = < + /* gpmc_a9.gpio1_25: RADIO_EN */ + AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_OUTPUT_PULLUP, MUX_MODE7) + + /* gpmc_ad12.mmc2_dat0 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLUP, MUX_MODE3) + + /* gpmc_ad13.mmc2_dat1 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLUP, MUX_MODE3) + + /* gpmc_ad14.mmc2_dat2 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLUP, MUX_MODE3) + + /* gpmc_ad15.mmc2_dat3 */ + AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLUP, MUX_MODE3) + + /* gpmc_csn3.mmc2_cmd */ + AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_INPUT_PULLUP, MUX_MODE3) + + /* gpmc_clk.mmc2_clk */ + AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT_PULLUP, MUX_MODE3) + >; + }; + + bluetooth_pins: pinmux_bluetooth_pins { + pinctrl-single,pins = < + /* event_intr0.gpio0_19 */ + AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_INPUT_PULLUP, MUX_MODE7) + >; + }; + + uart1_pins: pinmux_uart1_pins { + pinctrl-single,pins = < + /* uart1_rxd */ + AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT, MUX_MODE0) + + /* uart1_txd */ + AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE0) + + /* uart1_ctsn */ + AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE0) + + /* uart1_rtsn */ + AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) + >; + }; +}; + +&i2c2 { + status = "disabled"; +}; + +&mmc3 { + status = "okay"; + vmmc-supply = <&wlan_en_reg>; + bus-width = <4>; + non-removable; + cap-power-off-card; + ti,needs-special-hs-handling; + keep-power-in-suspend; + pinctrl-names = "default"; + pinctrl-0 = <&mmc3_pins>; + dmas = <&edma_xbar 12 0 1 + &edma_xbar 13 0 2>; + dma-names = "tx", "rx"; + clock-frequency = <50000000>; + max-frequency = <50000000>; +}; + +&uart1 { + status = "okay"; + + bluetooth { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins &bluetooth_pins>; + compatible = "qcom,qca6174-bt"; + enable-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>; + clocks = <&l4ls_clkctrl AM3_L4LS_UART2_CLKCTRL 0>; + interrupt-parent = <&gpio0>; + interrupts = <19 IRQ_TYPE_EDGE_RISING>; + }; +}; diff --git a/arch/arm/dts/am335x-sancloud-bbe-lite.dts b/arch/arm/dts/am335x-sancloud-bbe-lite.dts new file mode 100644 index 00000000000..d6ef19311a9 --- /dev/null +++ b/arch/arm/dts/am335x-sancloud-bbe-lite.dts @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2021 SanCloud Ltd + */ +/dts-v1/; + +#include "am33xx.dtsi" +#include "am335x-bone-common.dtsi" +#include "am335x-boneblack-common.dtsi" +#include "am335x-sancloud-bbe-common.dtsi" + +/ { + model = "SanCloud BeagleBone Enhanced Lite"; + compatible = "sancloud,am335x-boneenhanced", + "ti,am335x-bone-black", + "ti,am335x-bone", + "ti,am33xx"; +}; + +&am33xx_pinmux { + bb_spi0_pins: pinmux_bb_spi0_pins { + pinctrl-single,pins = < + AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT, MUX_MODE0) + AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT, MUX_MODE0) + >; + }; +}; + +&spi0 { + #address-cells = <1>; + #size-cells = <0>; + + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&bb_spi0_pins>; + + channel@0 { + #address-cells = <1>; + #size-cells = <0>; + + compatible = "micron,spi-authenta"; + + reg = <0>; + spi-max-frequency = <16000000>; + spi-cpha; + }; +}; diff --git a/arch/arm/dts/am335x-sancloud-bbe.dts b/arch/arm/dts/am335x-sancloud-bbe.dts index 275ba339adf..efbe93135db 100644 --- a/arch/arm/dts/am335x-sancloud-bbe.dts +++ b/arch/arm/dts/am335x-sancloud-bbe.dts @@ -7,6 +7,8 @@ #include "am33xx.dtsi" #include "am335x-bone-common.dtsi" #include "am335x-boneblack-common.dtsi" +#include "am335x-boneblack-hdmi.dtsi" +#include "am335x-sancloud-bbe-common.dtsi" #include <dt-bindings/interrupt-controller/irq.h> / { @@ -15,66 +17,6 @@ }; &am33xx_pinmux { - pinctrl-names = "default"; - - cpsw_default: cpsw_default { - pinctrl-single,pins = < - /* Slave 1 */ - AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txen.rgmii1_tctl */ - AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ - AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ - AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ - AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ - AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ - AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ - AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ - AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ - AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ - AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ - AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ - >; - }; - - cpsw_sleep: cpsw_sleep { - pinctrl-single,pins = < - /* Slave 1 reset value */ - AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) - AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) - AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) - AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) - AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) - AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) - AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) - AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) - AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) - AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) - AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) - AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) - >; - }; - - davinci_mdio_default: davinci_mdio_default { - pinctrl-single,pins = < - /* MDIO */ - AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0) - AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0) - >; - }; - - davinci_mdio_sleep: davinci_mdio_sleep { - pinctrl-single,pins = < - /* MDIO reset value */ - AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7) - AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7) - >; - }; - - usb_hub_ctrl: usb_hub_ctrl { - pinctrl-single,pins = < - AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT_PULLUP, MUX_MODE7) /* rmii1_refclk.gpio0_29 */ - >; - }; - mpu6050_pins: pinmux_mpu6050_pins { pinctrl-single,pins = < AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT, MUX_MODE7) /* uart0_ctsn.gpio1_8 */ @@ -88,31 +30,10 @@ }; }; -&mac { - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&cpsw_default>; - pinctrl-1 = <&cpsw_sleep>; - status = "okay"; -}; - -&davinci_mdio { - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&davinci_mdio_default>; - pinctrl-1 = <&davinci_mdio_sleep>; - status = "okay"; - - ethphy0: ethernet-phy@0 { - reg = <0>; - }; -}; - -&cpsw_emac0 { - phy-handle = <ðphy0>; - phy-mode = "rgmii-id"; -}; - &i2c0 { lps331ap: barometer@5c { + pinctrl-names = "default"; + pinctrl-0 = <&lps3331ap_pins>; compatible = "st,lps331ap-press"; st,drdy-int-pin = <1>; reg = <0x5c>; @@ -121,17 +42,12 @@ }; mpu6050: accelerometer@68 { + pinctrl-names = "default"; + pinctrl-0 = <&mpu6050_pins>; compatible = "invensense,mpu6050"; reg = <0x68>; interrupt-parent = <&gpio0>; interrupts = <2 IRQ_TYPE_EDGE_RISING>; orientation = <0xff 0 0 0 1 0 0 0 0xff>; }; - - usb2512b: usb-hub@2c { - compatible = "microchip,usb2512b"; - reg = <0x2c>; - reset-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; - /* wifi on port 4 */ - }; }; diff --git a/arch/arm/dts/am33xx-l4.dtsi b/arch/arm/dts/am33xx-l4.dtsi index e678673317a..5892612efa8 100644 --- a/arch/arm/dts/am33xx-l4.dtsi +++ b/arch/arm/dts/am33xx-l4.dtsi @@ -1810,6 +1810,15 @@ status = "disabled"; }; + eqep0: counter@180 { + compatible = "ti,am3352-eqep"; + reg = <0x180 0x80>; + clocks = <&l4ls_gclk>; + clock-names = "sysclkout"; + interrupts = <79>; + status = "disabled"; + }; + ehrpwm0: pwm@200 { compatible = "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm"; @@ -1862,6 +1871,15 @@ status = "disabled"; }; + eqep1: counter@180 { + compatible = "ti,am3352-eqep"; + reg = <0x180 0x80>; + clocks = <&l4ls_gclk>; + clock-names = "sysclkout"; + interrupts = <88>; + status = "disabled"; + }; + ehrpwm1: pwm@200 { compatible = "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm"; @@ -1914,6 +1932,15 @@ status = "disabled"; }; + eqep2: counter@180 { + compatible = "ti,am3352-eqep"; + reg = <0x180 0x80>; + clocks = <&l4ls_gclk>; + clock-names = "sysclkout"; + interrupts = <89>; + status = "disabled"; + }; + ehrpwm2: pwm@200 { compatible = "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm"; diff --git a/arch/arm/dts/armada-3720-uDPU-u-boot.dtsi b/arch/arm/dts/armada-3720-uDPU-u-boot.dtsi index cf8ae4412b9..47d87d4bd8f 100644 --- a/arch/arm/dts/armada-3720-uDPU-u-boot.dtsi +++ b/arch/arm/dts/armada-3720-uDPU-u-boot.dtsi @@ -31,3 +31,27 @@ &sdhci0 { u-boot,dm-pre-reloc; }; + +&pinctrl_sb { + sfp_pin: sfp-pin { + groups = "pcie1_clkreq"; + function = "gpio"; + }; +}; + +ð0 { + pinctrl-names = "default"; + pinctrl-0 = <&sfp_pin>; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +ð1 { + fixed-link { + speed = <1000>; + full-duplex; + }; +}; diff --git a/arch/arm/dts/armada-3720-uDPU.dts b/arch/arm/dts/armada-3720-uDPU.dts index 95d46e8d081..1f534c0c65f 100644 --- a/arch/arm/dts/armada-3720-uDPU.dts +++ b/arch/arm/dts/armada-3720-uDPU.dts @@ -99,7 +99,7 @@ pinctrl-names = "default"; pinctrl-0 = <&spi_quad_pins>; - m25p80@0 { + spi-flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <54000000>; @@ -108,10 +108,15 @@ compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; - /* only bootloader is located on the SPI */ + partition@0 { - label = "uboot"; - reg = <0 0x400000>; + label = "firmware"; + reg = <0x0 0x180000>; + }; + + partition@180000 { + label = "u-boot-env"; + reg = <0x180000 0x10000>; }; }; }; @@ -148,15 +153,15 @@ scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - lm75@48 { + nct375@48 { status = "okay"; - compatible = "lm75"; + compatible = "ti,tmp75c"; reg = <0x48>; }; - lm75@49 { + nct375@49 { status = "okay"; - compatible = "lm75"; + compatible = "ti,tmp75c"; reg = <0x49>; }; }; diff --git a/arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi b/arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi index 3ff76c94629..64ebe2c6d47 100644 --- a/arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi +++ b/arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi @@ -29,7 +29,7 @@ u-boot,dm-pre-reloc; /* ATSHA204A at address 0x64 */ - atsha204a@64 { + crypto@64 { u-boot,dm-pre-reloc; compatible = "atmel,atsha204a"; reg = <0x64>; @@ -38,6 +38,7 @@ }; }; +#ifdef CONFIG_ENV_IS_IN_SPI_FLASH &spi0 { u-boot,dm-pre-reloc; @@ -56,6 +57,7 @@ }; }; }; +#endif &uart0 { u-boot,dm-pre-reloc; diff --git a/arch/arm/dts/tps6507x.dtsi b/arch/arm/dts/tps6507x.dtsi index 4c326e591e5..db4809d308f 100644 --- a/arch/arm/dts/tps6507x.dtsi +++ b/arch/arm/dts/tps6507x.dtsi @@ -1,9 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. */ /* diff --git a/arch/arm/dts/tps65217.dtsi b/arch/arm/dts/tps65217.dtsi index a63272422d7..0d463de5650 100644 --- a/arch/arm/dts/tps65217.dtsi +++ b/arch/arm/dts/tps65217.dtsi @@ -1,9 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. */ /* @@ -13,6 +10,21 @@ &tps { compatible = "ti,tps65217"; + interrupt-controller; + #interrupt-cells = <1>; + + charger { + compatible = "ti,tps65217-charger"; + interrupts = <0>, <1>; + interrupt-names = "USB", "AC"; + status = "disabled"; + }; + + pwrbutton { + compatible = "ti,tps65217-pwrbutton"; + interrupts = <2>; + status = "disabled"; + }; regulators { #address-cells = <1>; diff --git a/arch/arm/dts/tps65910.dtsi b/arch/arm/dts/tps65910.dtsi index b0ac6657a17..a941d1e6232 100644 --- a/arch/arm/dts/tps65910.dtsi +++ b/arch/arm/dts/tps65910.dtsi @@ -1,9 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. */ /* diff --git a/arch/arm/lib/vectors.S b/arch/arm/lib/vectors.S index 56f36815582..a54c84b062b 100644 --- a/arch/arm/lib/vectors.S +++ b/arch/arm/lib/vectors.S @@ -24,6 +24,7 @@ #else b reset #endif +#if !CONFIG_IS_ENABLED(SYS_NO_VECTOR_TABLE) ldr pc, _undefined_instruction ldr pc, _software_interrupt ldr pc, _prefetch_abort @@ -31,6 +32,7 @@ ldr pc, _not_used ldr pc, _irq ldr pc, _fiq +#endif .endm @@ -87,6 +89,7 @@ _start: ARM_VECTORS #endif /* !defined(CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK) */ +#if !CONFIG_IS_ENABLED(SYS_NO_VECTOR_TABLE) /* ************************************************************************* * @@ -118,6 +121,7 @@ _irq: .word irq _fiq: .word fiq .balignl 16,0xdeadbeef +#endif /* ************************************************************************* @@ -131,6 +135,7 @@ _fiq: .word fiq #ifdef CONFIG_SPL_BUILD +#if !CONFIG_IS_ENABLED(SYS_NO_VECTOR_TABLE) .align 5 undefined_instruction: software_interrupt: @@ -141,6 +146,7 @@ irq: fiq: 1: b 1b /* hang and never return */ +#endif #else /* !CONFIG_SPL_BUILD */ diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index e7fe7c2fd88..8e23e6da326 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -1527,7 +1527,7 @@ void do_error(struct pt_regs *pt_regs) #endif #if defined(CONFIG_IMX8MN) || defined(CONFIG_IMX8MP) -enum env_location env_get_location(enum env_operation op, int prio) +enum env_location arch_env_get_location(enum env_operation op, int prio) { enum boot_device dev = get_boot_device(); diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index 21d9db2638d..a3f273f4f94 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -15,6 +15,7 @@ config ARMADA_32BIT select SPL_SIMPLE_BUS if SPL select SUPPORT_SPL select TRANSLATION_OFFSET + select SPL_SYS_NO_VECTOR_TABLE if SPL config ARMADA_64BIT bool @@ -44,6 +45,7 @@ config ARMADA_XP config ARMADA_3700 bool select ARM64 + select HAVE_MVEBU_EFUSE # Armada 7K and 8K are very similar - use only one Kconfig symbol for both config ARMADA_8K diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile index a5a20877dda..1b451889d24 100644 --- a/arch/arm/mach-mvebu/Makefile +++ b/arch/arm/mach-mvebu/Makefile @@ -27,7 +27,10 @@ obj-$(CONFIG_ARMADA_375) += ../../../drivers/ddr/marvell/axp/xor.o obj-$(CONFIG_ARMADA_38X) += ../../../drivers/ddr/marvell/a38x/xor.o obj-$(CONFIG_ARMADA_XP) += ../../../drivers/ddr/marvell/axp/xor.o obj-$(CONFIG_ARMADA_MSYS) += ../../../drivers/ddr/marvell/axp/xor.o + +ifdef CONFIG_ARMADA_38X obj-$(CONFIG_MVEBU_EFUSE) += efuse.o +endif extra-y += kwbimage.cfg diff --git a/arch/arm/mach-mvebu/armada3700/Makefile b/arch/arm/mach-mvebu/armada3700/Makefile index 031b3e854e3..98350a41e04 100644 --- a/arch/arm/mach-mvebu/armada3700/Makefile +++ b/arch/arm/mach-mvebu/armada3700/Makefile @@ -2,4 +2,5 @@ # # Copyright (C) 2016 Stefan Roese <sr@denx.de> -obj-y = cpu.o +obj-y = cpu.o mbox.o +obj-$(CONFIG_MVEBU_EFUSE) += efuse.o diff --git a/arch/arm/mach-mvebu/armada3700/efuse.c b/arch/arm/mach-mvebu/armada3700/efuse.c new file mode 100644 index 00000000000..07d5f394354 --- /dev/null +++ b/arch/arm/mach-mvebu/armada3700/efuse.c @@ -0,0 +1,217 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) 2017 Marvell International Ltd. + * (C) 2021 Pali Rohár <pali@kernel.org> + */ + +#include <config.h> +#include <common.h> +#include <asm/io.h> +#include <linux/delay.h> +#include <mach/mbox.h> +#include <mach/soc.h> + +#define OTP_NB_REG_BASE ((void __iomem *)MVEBU_REGISTER(0x12600)) +#define OTP_SB_REG_BASE ((void __iomem *)MVEBU_REGISTER(0x1A200)) + +#define OTP_CONTROL_OFF 0x00 +#define OTP_MODE_BIT BIT(15) +#define OTP_RPTR_RST_BIT BIT(14) +#define OTP_POR_B_BIT BIT(13) +#define OTP_PRDT_BIT BIT(3) +#define OTP_READ_PORT_OFF 0x04 +#define OTP_READ_POINTER_OFF 0x08 +#define OTP_PTR_INC_BIT BIT(8) + +static void otp_read_parallel(void __iomem *base, u32 *data, u32 count) +{ + u32 regval; + + /* 1. Clear OTP_MODE_NB to parallel mode */ + regval = readl(base + OTP_CONTROL_OFF); + regval &= ~OTP_MODE_BIT; + writel(regval, base + OTP_CONTROL_OFF); + + /* 2. Set OTP_POR_B_NB enter normal operation */ + regval = readl(base + OTP_CONTROL_OFF); + regval |= OTP_POR_B_BIT; + writel(regval, base + OTP_CONTROL_OFF); + + /* 3. Set OTP_PTR_INC_NB to auto-increment pointer after each read */ + regval = readl(base + OTP_READ_POINTER_OFF); + regval |= OTP_PTR_INC_BIT; + writel(regval, base + OTP_READ_POINTER_OFF); + + /* 4. Set OTP_RPTR_RST_NB, then clear the same field */ + regval = readl(base + OTP_CONTROL_OFF); + regval |= OTP_RPTR_RST_BIT; + writel(regval, base + OTP_CONTROL_OFF); + + regval = readl(base + OTP_CONTROL_OFF); + regval &= ~OTP_RPTR_RST_BIT; + writel(regval, base + OTP_CONTROL_OFF); + + /* 5. Toggle OTP_PRDT_NB + * a. Set OTP_PRDT_NB to 1. + * b. Clear OTP_PRDT_NB to 0. + * c. Wait for a minimum of 100 ns. + * d. Set OTP_PRDT_NB to 1 + */ + regval = readl(base + OTP_CONTROL_OFF); + regval |= OTP_PRDT_BIT; + writel(regval, base + OTP_CONTROL_OFF); + + regval = readl(base + OTP_CONTROL_OFF); + regval &= ~OTP_PRDT_BIT; + writel(regval, base + OTP_CONTROL_OFF); + + ndelay(100); + + regval = readl(base + OTP_CONTROL_OFF); + regval |= OTP_PRDT_BIT; + writel(regval, base + OTP_CONTROL_OFF); + + while (count-- > 0) { + /* 6. Read the content of OTP 32-bits at a time */ + ndelay(100000); + *(data++) = readl(base + OTP_READ_PORT_OFF); + } +} + +static int rwtm_otp_read(u8 row, u32 word, u32 *data) +{ + u32 out[3]; + u32 in[2]; + int res = -EINVAL; + + if (word < 2) { + /* + * MBOX_CMD_OTP_READ_32B command is supported by Marvell + * fuse.bin firmware and also by new CZ.NIC wtmi firmware. + * This command returns raw bits without ECC corrections. + * It does not provide access to the lock bit. + */ + in[0] = row; + in[1] = word * 32; + res = mbox_do_cmd(MBOX_CMD_OTP_READ_32B, in, 2, out, 1); + if (!res) + *data = out[0]; + } else if (word == 2) { + /* + * MBOX_CMD_OTP_READ command is supported only by new CZ.NIC + * wtmi firmware and provides access to all bits, including + * lock bit without doing ECC corrections. For compatibility + * with Marvell fuse.bin firmware, use this command only for + * accessing lock bit. + */ + in[0] = row; + res = mbox_do_cmd(MBOX_CMD_OTP_READ, in, 1, out, 3); + if (!res) + *data = out[2]; + } + + return res; +} + +static int rwtm_otp_write(u8 row, u32 word, u32 data) +{ + u32 in[4]; + int res = -EINVAL; + + if (word < 2) { + /* + * MBOX_CMD_OTP_WRITE_32B command is supported by Marvell + * fuse.bin firmware and also by new CZ.NIC wtmi firmware. + * This command writes only selected bits to OTP and does + * not calculate ECC bits. It does not allow to write the + * lock bit. + */ + in[0] = row; + in[1] = word * 32; + in[2] = data; + res = mbox_do_cmd(MBOX_CMD_OTP_WRITE_32B, in, 3, NULL, 0); + } else if (word == 2 && !(data & ~0x1)) { + /* + * MBOX_CMD_OTP_WRITE command is supported only by new CZ.NIC + * wtmi firmware and allows to write any bit to OTP, including + * the lock bit. It does not calculate or write ECC bits too. + * For compatibility with Marvell fuse.bin firmware, use this + * command only for writing the lock bit. + */ + in[0] = row; + in[1] = 0; + in[2] = 0; + in[3] = data; + res = mbox_do_cmd(MBOX_CMD_OTP_WRITE, in, 4, NULL, 0); + } + + return res; +} + +/* + * Banks 0-43 are used for accessing Security OTP (44 rows with 67 bits via 44 banks and words 0-2) + * Bank 44 is used for accessing North Bridge OTP (69 bits via words 0-2) + * Bank 45 is used for accessing South Bridge OTP (97 bits via words 0-3) + */ + +#define RWTM_ROWS 44 +#define RWTM_MAX_BANK (RWTM_ROWS - 1) +#define RWTM_ROW_WORDS 3 +#define OTP_NB_BANK RWTM_ROWS +#define OTP_NB_WORDS 3 +#define OTP_SB_BANK (RWTM_ROWS + 1) +#define OTP_SB_WORDS 4 + +int fuse_read(u32 bank, u32 word, u32 *val) +{ + if (bank <= RWTM_MAX_BANK) { + if (word >= RWTM_ROW_WORDS) + return -EINVAL; + return rwtm_otp_read(bank, word, val); + } else if (bank == OTP_NB_BANK) { + u32 data[OTP_NB_WORDS]; + if (word >= OTP_NB_WORDS) + return -EINVAL; + otp_read_parallel(OTP_NB_REG_BASE, data, OTP_NB_WORDS); + *val = data[word]; + return 0; + } else if (bank == OTP_SB_BANK) { + u32 data[OTP_SB_WORDS]; + if (word >= OTP_SB_WORDS) + return -EINVAL; + otp_read_parallel(OTP_SB_REG_BASE, data, OTP_SB_WORDS); + *val = data[word]; + return 0; + } else { + return -EINVAL; + } +} + +int fuse_prog(u32 bank, u32 word, u32 val) +{ + if (bank <= RWTM_MAX_BANK) { + if (word >= RWTM_ROW_WORDS) + return -EINVAL; + return rwtm_otp_write(bank, word, val); + } else if (bank == OTP_NB_BANK) { + /* TODO: not implemented yet */ + return -ENOSYS; + } else if (bank == OTP_SB_BANK) { + /* TODO: not implemented yet */ + return -ENOSYS; + } else { + return -EINVAL; + } +} + +int fuse_sense(u32 bank, u32 word, u32 *val) +{ + /* not supported */ + return -ENOSYS; +} + +int fuse_override(u32 bank, u32 word, u32 val) +{ + /* not supported */ + return -ENOSYS; +} diff --git a/arch/arm/mach-mvebu/armada3700/mbox.c b/arch/arm/mach-mvebu/armada3700/mbox.c new file mode 100644 index 00000000000..eb1f82845f0 --- /dev/null +++ b/arch/arm/mach-mvebu/armada3700/mbox.c @@ -0,0 +1,83 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Marek Behun <marek.behun@nic.cz> + * Copyright (C) 2021 Pali Rohár <pali@kernel.org> + */ + +#include <common.h> +#include <asm/arch/soc.h> +#include <asm/io.h> +#include <linux/bitops.h> +#include <linux/delay.h> +#include <mach/mbox.h> + +#define RWTM_BASE (MVEBU_REGISTER(0xb0000)) +#define RWTM_CMD_PARAM(i) (size_t)(RWTM_BASE + (i) * 4) +#define RWTM_CMD (RWTM_BASE + 0x40) +#define RWTM_CMD_RETSTATUS (RWTM_BASE + 0x80) +#define RWTM_CMD_STATUS(i) (size_t)(RWTM_BASE + 0x84 + (i) * 4) +#define MAX_ARGS 16 + +#define RWTM_HOST_INT_RESET (RWTM_BASE + 0xc8) +#define RWTM_HOST_INT_MASK (RWTM_BASE + 0xcc) +#define SP_CMD_COMPLETE BIT(0) + +#define MBOX_STS_SUCCESS (0x0 << 30) +#define MBOX_STS_FAIL (0x1 << 30) +#define MBOX_STS_BADCMD (0x2 << 30) +#define MBOX_STS_LATER (0x3 << 30) +#define MBOX_STS_ERROR(s) ((s) & (3 << 30)) +#define MBOX_STS_VALUE(s) (((s) >> 10) & 0xfffff) +#define MBOX_STS_CMD(s) ((s) & 0x3ff) +#define MBOX_STS_MARVELL_ERROR(s) ((s) == 0 ? 0 : \ + (s) == 2 ? ETIMEDOUT : \ + (s) == 3 ? EINVAL : \ + (s) == 4 ? ENOSYS : \ + EIO) + +int mbox_do_cmd(enum mbox_cmd cmd, u32 *in, int nin, u32 *out, int nout) +{ + const int tries = 50; + int i; + u32 status; + + if (nin > MAX_ARGS || nout > MAX_ARGS) + return -EINVAL; + + clrbits_le32(RWTM_HOST_INT_MASK, SP_CMD_COMPLETE); + + for (i = 0; i < nin; i++) + writel(in[i], RWTM_CMD_PARAM(i)); + for (; i < MAX_ARGS; i++) + writel(0x0, RWTM_CMD_PARAM(i)); + writel(cmd, RWTM_CMD); + + for (i = 0; i < tries; ++i) { + mdelay(10); + if (readl(RWTM_HOST_INT_RESET) & SP_CMD_COMPLETE) + break; + } + + if (i == tries) { + /* if timed out, don't read status */ + setbits_le32(RWTM_HOST_INT_RESET, SP_CMD_COMPLETE); + return -ETIMEDOUT; + } + + for (i = 0; i < nout; ++i) + out[i] = readl(RWTM_CMD_STATUS(i)); + status = readl(RWTM_CMD_RETSTATUS); + + setbits_le32(RWTM_HOST_INT_RESET, SP_CMD_COMPLETE); + + if (MBOX_STS_CMD(status) != cmd) + return -MBOX_STS_MARVELL_ERROR(status); + else if (MBOX_STS_ERROR(status) == MBOX_STS_FAIL) + return -(int)MBOX_STS_VALUE(status); + else if (MBOX_STS_ERROR(status) == MBOX_STS_BADCMD) + return -ENOSYS; + else if (MBOX_STS_ERROR(status) != MBOX_STS_SUCCESS) + return -EIO; + else + return MBOX_STS_VALUE(status); +} diff --git a/arch/arm/mach-mvebu/efuse.c b/arch/arm/mach-mvebu/efuse.c index c79eee98fe9..80318c339eb 100644 --- a/arch/arm/mach-mvebu/efuse.c +++ b/arch/arm/mach-mvebu/efuse.c @@ -27,6 +27,7 @@ enum { MVEBU_EFUSE_CTRL_PROGRAM_ENABLE = (1 << 31), + MVEBU_EFUSE_LD1_SELECT = (1 << 6), }; struct mvebu_hd_efuse { @@ -39,8 +40,10 @@ struct mvebu_hd_efuse { #ifndef DRY_RUN static struct mvebu_hd_efuse *efuses = (struct mvebu_hd_efuse *)(MBUS_EFUSE_BASE + 0xF9000); +static u32 *ld_efuses = (void *)MBUS_EFUSE_BASE + 0xF8F00; #else static struct mvebu_hd_efuse efuses[EFUSE_LINE_MAX + 1]; +static u32 ld_efuses[EFUSE_LD_WORDS]; #endif static int efuse_initialised; @@ -169,6 +172,21 @@ int mvebu_read_efuse(int nr, struct efuse_val *val) return 0; } +void mvebu_read_ld_efuse(int ld1, u32 *line) +{ + int i; + +#ifndef DRY_RUN + if (ld1) + setbits_le32(MVEBU_EFUSE_CONTROL, MVEBU_EFUSE_LD1_SELECT); + else + clrbits_le32(MVEBU_EFUSE_CONTROL, MVEBU_EFUSE_LD1_SELECT); +#endif + + for (i = 0; i < EFUSE_LD_WORDS; i++) + line[i] = readl(ld_efuses + i); +} + int mvebu_write_efuse(int nr, struct efuse_val *val) { return prog_efuse(nr, val, ~0, ~0); @@ -199,8 +217,18 @@ static int valid_prog_words; int fuse_read(u32 bank, u32 word, u32 *val) { struct efuse_val fuse_line; + u32 ld_line[EFUSE_LD_WORDS]; int res; + if ((bank == EFUSE_LD0_LINE || bank == EFUSE_LD1_LINE) && word < EFUSE_LD_WORDS) { + res = mvebu_efuse_init_hw(); + if (res) + return res; + mvebu_read_ld_efuse(bank == EFUSE_LD1_LINE, ld_line); + *val = ld_line[word]; + return 0; + } + if (bank < EFUSE_LINE_MIN || bank > EFUSE_LINE_MAX || word > 2) return -EINVAL; diff --git a/arch/arm/mach-mvebu/include/mach/efuse.h b/arch/arm/mach-mvebu/include/mach/efuse.h index bbc5844d849..122e735f2fc 100644 --- a/arch/arm/mach-mvebu/include/mach/efuse.h +++ b/arch/arm/mach-mvebu/include/mach/efuse.h @@ -53,8 +53,13 @@ enum efuse_line { EFUSE_LINE_MIN = 0, EFUSE_LINE_MAX = 63, + + EFUSE_LD0_LINE = 64, + EFUSE_LD1_LINE = 65, }; +#define EFUSE_LD_WORDS 9 + #endif int mvebu_efuse_init_hw(void); diff --git a/arch/arm/mach-mvebu/include/mach/mbox.h b/arch/arm/mach-mvebu/include/mach/mbox.h new file mode 100644 index 00000000000..f1cb55f2bfe --- /dev/null +++ b/arch/arm/mach-mvebu/include/mach/mbox.h @@ -0,0 +1,40 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2018 Marek Behun <marek.behun@nic.cz> + * Copyright (C) 2021 Pali Rohár <pali@kernel.org> + */ + +#ifndef _MVEBU_MBOX_H +#define _MVEBU_MBOX_H + +enum mbox_cmd { + MBOX_CMD_GET_RANDOM = 1, + MBOX_CMD_BOARD_INFO, + MBOX_CMD_ECDSA_PUB_KEY, + MBOX_CMD_HASH, + MBOX_CMD_SIGN, + MBOX_CMD_VERIFY, + + MBOX_CMD_OTP_READ, + MBOX_CMD_OTP_WRITE, + + MBOX_CMD_REBOOT, + + /* OTP read commands supported by Marvell fuse.bin firmware */ + MBOX_CMD_OTP_READ_1B = 257, + MBOX_CMD_OTP_READ_8B, + MBOX_CMD_OTP_READ_32B, + MBOX_CMD_OTP_READ_64B, + MBOX_CMD_OTP_READ_256B, + + /* OTP write commands supported by Marvell fuse.bin firmware */ + MBOX_CMD_OTP_WRITE_1B = 513, + MBOX_CMD_OTP_WRITE_8B, + MBOX_CMD_OTP_WRITE_32B, + MBOX_CMD_OTP_WRITE_64B, + MBOX_CMD_OTP_WRITE_256B, +}; + +int mbox_do_cmd(enum mbox_cmd cmd, u32 *in, int nin, u32 *out, int nout); + +#endif diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 263142683b0..e1b9180a3bb 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -32,6 +32,7 @@ config OMAP34XX config OMAP44XX bool "OMAP44XX SoC" select SPL_USE_TINY_PRINTF + select SPL_SYS_NO_VECTOR_TABLE if SPL imply NAND_OMAP_ELM imply NAND_OMAP_GPMC imply SPL_DISPLAY_PRINT diff --git a/arch/arm/mach-rockchip/rk3036-board-spl.c b/arch/arm/mach-rockchip/rk3036-board-spl.c index 6eb89e15b81..73f6d241a1c 100644 --- a/arch/arm/mach-rockchip/rk3036-board-spl.c +++ b/arch/arm/mach-rockchip/rk3036-board-spl.c @@ -20,7 +20,7 @@ void rockchip_stimer_init(void) { asm volatile("mcr p15, 0, %0, c14, c0, 0" - : : "r"(COUNTER_FREQUENCY)); + : : "r"(CONFIG_COUNTER_FREQUENCY)); writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE); diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c index eda2248029d..30be6404252 100644 --- a/arch/arm/mach-rockchip/spl.c +++ b/arch/arm/mach-rockchip/spl.c @@ -88,7 +88,7 @@ __weak void rockchip_stimer_init(void) return; #ifndef CONFIG_ARM64 asm volatile("mcr p15, 0, %0, c14, c0, 0" - : : "r"(COUNTER_FREQUENCY)); + : : "r"(CONFIG_COUNTER_FREQUENCY)); #endif writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE); diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c index 8126587060f..ed46a9ad286 100644 --- a/arch/arm/mach-rockchip/tpl.c +++ b/arch/arm/mach-rockchip/tpl.c @@ -39,7 +39,7 @@ __weak void rockchip_stimer_init(void) #ifndef CONFIG_ARM64 asm volatile("mcr p15, 0, %0, c14, c0, 0" - : : "r"(COUNTER_FREQUENCY)); + : : "r"(CONFIG_COUNTER_FREQUENCY)); #endif writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); diff --git a/arch/arm/mach-versal/Kconfig b/arch/arm/mach-versal/Kconfig index 0c6ad345ffd..645f06add44 100644 --- a/arch/arm/mach-versal/Kconfig +++ b/arch/arm/mach-versal/Kconfig @@ -24,12 +24,6 @@ config SYS_CONFIG_NAME config SYS_MALLOC_LEN default 0x2000000 -config COUNTER_FREQUENCY - int "Timer clock frequency" - default 0 - help - Setup time clock frequency for certain platform - config ZYNQ_SDHCI_MAX_FREQ default 200000000 diff --git a/board/CZ.NIC/turris_atsha_otp.c b/board/CZ.NIC/turris_atsha_otp.c new file mode 100644 index 00000000000..8c39f5e5241 --- /dev/null +++ b/board/CZ.NIC/turris_atsha_otp.c @@ -0,0 +1,119 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2017 Marek Behun <marek.behun@nic.cz> + * Copyright (C) 2016 Tomas Hlavacek <tomas.hlavacek@nic.cz> + */ + +#include <env.h> +#include <net.h> +#include <dm/uclass.h> +#include <atsha204a-i2c.h> + +#include "turris_atsha_otp.h" + +#define TURRIS_ATSHA_OTP_VERSION 0 +#define TURRIS_ATSHA_OTP_SERIAL 1 +#define TURRIS_ATSHA_OTP_MAC0 3 +#define TURRIS_ATSHA_OTP_MAC1 4 + +static struct udevice *get_atsha204a_dev(void) +{ + /* Cannot be static because BSS does not have to be ready at this early stage */ + struct udevice *dev; + + if (uclass_get_device_by_name(UCLASS_MISC, "crypto@64", &dev)) { + puts("Cannot find ATSHA204A on I2C bus!\n"); + dev = NULL; + } + + return dev; +} + +static void increment_mac(u8 *mac) +{ + int i; + + for (i = 5; i >= 3; i--) { + mac[i] += 1; + if (mac[i]) + break; + } +} + +static void set_mac_if_invalid(int i, u8 *mac) +{ + u8 oldmac[6]; + + if (is_valid_ethaddr(mac) && + !eth_env_get_enetaddr_by_index("eth", i, oldmac)) + eth_env_set_enetaddr_by_index("eth", i, mac); +} + +int turris_atsha_otp_init_mac_addresses(int first_idx) +{ + struct udevice *dev = get_atsha204a_dev(); + u8 mac0[4], mac1[4], mac[6]; + int ret; + + if (!dev) + return -1; + + ret = atsha204a_wakeup(dev); + if (ret) + return ret; + + ret = atsha204a_read(dev, ATSHA204A_ZONE_OTP, false, + TURRIS_ATSHA_OTP_MAC0, mac0); + if (ret) + return ret; + + ret = atsha204a_read(dev, ATSHA204A_ZONE_OTP, false, + TURRIS_ATSHA_OTP_MAC1, mac1); + if (ret) + return ret; + + atsha204a_sleep(dev); + + mac[0] = mac0[1]; + mac[1] = mac0[2]; + mac[2] = mac0[3]; + mac[3] = mac1[1]; + mac[4] = mac1[2]; + mac[5] = mac1[3]; + + set_mac_if_invalid((first_idx + 0) % 3, mac); + increment_mac(mac); + set_mac_if_invalid((first_idx + 1) % 3, mac); + increment_mac(mac); + set_mac_if_invalid((first_idx + 2) % 3, mac); + + return 0; +} + +int turris_atsha_otp_get_serial_number(u32 *version_num, u32 *serial_num) +{ + struct udevice *dev = get_atsha204a_dev(); + int ret; + + if (!dev) + return -1; + + ret = atsha204a_wakeup(dev); + if (ret) + return ret; + + ret = atsha204a_read(dev, ATSHA204A_ZONE_OTP, false, + TURRIS_ATSHA_OTP_VERSION, + (u8 *)version_num); + if (ret) + return ret; + + ret = atsha204a_read(dev, ATSHA204A_ZONE_OTP, false, + TURRIS_ATSHA_OTP_SERIAL, + (u8 *)serial_num); + if (ret) + return ret; + + atsha204a_sleep(dev); + return 0; +} diff --git a/board/CZ.NIC/turris_atsha_otp.h b/board/CZ.NIC/turris_atsha_otp.h new file mode 100644 index 00000000000..bd4308fdc3e --- /dev/null +++ b/board/CZ.NIC/turris_atsha_otp.h @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#ifndef TURRIS_ATSHA_OTP_H +#define TURRIS_ATSHA_OTP_H + +int turris_atsha_otp_init_mac_addresses(int first_idx); +int turris_atsha_otp_get_serial_number(u32 *version_num, u32 *serial_num); + +#endif diff --git a/board/CZ.NIC/turris_mox/mox_sp.c b/board/CZ.NIC/turris_mox/mox_sp.c index cc57b9f095f..93e96b014fc 100644 --- a/board/CZ.NIC/turris_mox/mox_sp.c +++ b/board/CZ.NIC/turris_mox/mox_sp.c @@ -8,74 +8,7 @@ #include <asm/io.h> #include <linux/bitops.h> #include <linux/delay.h> - -#define RWTM_BASE (MVEBU_REGISTER(0xb0000)) -#define RWTM_CMD_PARAM(i) (size_t)(RWTM_BASE + (i) * 4) -#define RWTM_CMD (RWTM_BASE + 0x40) -#define RWTM_CMD_RETSTATUS (RWTM_BASE + 0x80) -#define RWTM_CMD_STATUS(i) (size_t)(RWTM_BASE + 0x84 + (i) * 4) - -#define RWTM_HOST_INT_RESET (RWTM_BASE + 0xc8) -#define RWTM_HOST_INT_MASK (RWTM_BASE + 0xcc) -#define SP_CMD_COMPLETE BIT(0) - -#define MBOX_STS_SUCCESS (0x0 << 30) -#define MBOX_STS_FAIL (0x1 << 30) -#define MBOX_STS_BADCMD (0x2 << 30) -#define MBOX_STS_LATER (0x3 << 30) -#define MBOX_STS_ERROR(s) ((s) & (3 << 30)) -#define MBOX_STS_VALUE(s) (((s) >> 10) & 0xfffff) -#define MBOX_STS_CMD(s) ((s) & 0x3ff) - -enum mbox_cmd { - MBOX_CMD_GET_RANDOM = 1, - MBOX_CMD_BOARD_INFO, - MBOX_CMD_ECDSA_PUB_KEY, - MBOX_CMD_HASH, - MBOX_CMD_SIGN, - MBOX_CMD_VERIFY, - - MBOX_CMD_OTP_READ, - MBOX_CMD_OTP_WRITE -}; - -static int mbox_do_cmd(enum mbox_cmd cmd, u32 *out, int nout) -{ - const int tries = 50; - int i; - u32 status; - - clrbits_le32(RWTM_HOST_INT_MASK, SP_CMD_COMPLETE); - - writel(cmd, RWTM_CMD); - - for (i = 0; i < tries; ++i) { - mdelay(10); - if (readl(RWTM_HOST_INT_RESET) & SP_CMD_COMPLETE) - break; - } - - if (i == tries) { - /* if timed out, don't read status */ - setbits_le32(RWTM_HOST_INT_RESET, SP_CMD_COMPLETE); - return -ETIMEDOUT; - } - - for (i = 0; i < nout; ++i) - out[i] = readl(RWTM_CMD_STATUS(i)); - status = readl(RWTM_CMD_RETSTATUS); - - setbits_le32(RWTM_HOST_INT_RESET, SP_CMD_COMPLETE); - - if (MBOX_STS_CMD(status) != cmd) - return -EIO; - else if (MBOX_STS_ERROR(status) == MBOX_STS_FAIL) - return -(int)MBOX_STS_VALUE(status); - else if (MBOX_STS_ERROR(status) != MBOX_STS_SUCCESS) - return -EIO; - else - return MBOX_STS_VALUE(status); -} +#include <mach/mbox.h> const char *mox_sp_get_ecdsa_public_key(void) { @@ -86,7 +19,7 @@ const char *mox_sp_get_ecdsa_public_key(void) if (public_key[0]) return public_key; - res = mbox_do_cmd(MBOX_CMD_ECDSA_PUB_KEY, out, 16); + res = mbox_do_cmd(MBOX_CMD_ECDSA_PUB_KEY, NULL, 0, out, 16); if (res < 0) return NULL; @@ -114,7 +47,7 @@ int mbox_sp_get_board_info(u64 *sn, u8 *mac1, u8 *mac2, int *bv, int *ram) u32 out[8]; int res; - res = mbox_do_cmd(MBOX_CMD_BOARD_INFO, out, 8); + res = mbox_do_cmd(MBOX_CMD_BOARD_INFO, NULL, 0, out, 8); if (res < 0) return res; diff --git a/board/CZ.NIC/turris_omnia/Makefile b/board/CZ.NIC/turris_omnia/Makefile index ccdf6c352ca..b79555ab467 100644 --- a/board/CZ.NIC/turris_omnia/Makefile +++ b/board/CZ.NIC/turris_omnia/Makefile @@ -2,4 +2,4 @@ # # Copyright (C) 2017 Marek Behun <marek.behun@nic.cz> -obj-y := turris_omnia.o +obj-y := turris_omnia.o ../turris_atsha_otp.o diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index 33cec6587e1..da2fee578c4 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -14,8 +14,6 @@ #include <log.h> #include <miiphy.h> #include <mtd.h> -#include <net.h> -#include <netdev.h> #include <asm/global_data.h> #include <asm/io.h> #include <asm/arch/cpu.h> @@ -25,10 +23,10 @@ #include <time.h> #include <linux/bitops.h> #include <u-boot/crc.h> -# include <atsha204a-i2c.h> #include "../drivers/ddr/marvell/a38x/ddr3_init.h" #include <../serdes/a38x/high_speed_env_spec.h> +#include "../turris_atsha_otp.h" DECLARE_GLOBAL_DATA_PTR; @@ -71,11 +69,6 @@ enum status_word_bits { MSATA_IND_STSBIT = 0x0020, }; -#define OMNIA_ATSHA204_OTP_VERSION 0 -#define OMNIA_ATSHA204_OTP_SERIAL 1 -#define OMNIA_ATSHA204_OTP_MAC0 3 -#define OMNIA_ATSHA204_OTP_MAC1 4 - /* * Those values and defines are taken from the Marvell U-Boot version * "u-boot-2013.01-2014_T3.0" @@ -594,49 +587,12 @@ int board_late_init(void) return 0; } -static struct udevice *get_atsha204a_dev(void) -{ - static struct udevice *dev; - - if (dev) - return dev; - - if (uclass_get_device_by_name(UCLASS_MISC, "atsha204a@64", &dev)) { - puts("Cannot find ATSHA204A on I2C bus!\n"); - dev = NULL; - } - - return dev; -} - int show_board_info(void) { u32 version_num, serial_num; - int err = 1; - - struct udevice *dev = get_atsha204a_dev(); - - if (dev) { - err = atsha204a_wakeup(dev); - if (err) - goto out; - - err = atsha204a_read(dev, ATSHA204A_ZONE_OTP, false, - OMNIA_ATSHA204_OTP_VERSION, - (u8 *)&version_num); - if (err) - goto out; - - err = atsha204a_read(dev, ATSHA204A_ZONE_OTP, false, - OMNIA_ATSHA204_OTP_SERIAL, - (u8 *)&serial_num); - if (err) - goto out; - - atsha204a_sleep(dev); - } + int err; -out: + err = turris_atsha_otp_get_serial_number(&version_num, &serial_num); printf("Model: Turris Omnia\n"); printf(" RAM size: %i MiB\n", omnia_get_ram_size_gb() * 1024); if (err) @@ -648,65 +604,9 @@ out: return 0; } -static void increment_mac(u8 *mac) -{ - int i; - - for (i = 5; i >= 3; i--) { - mac[i] += 1; - if (mac[i]) - break; - } -} - -static void set_mac_if_invalid(int i, u8 *mac) -{ - u8 oldmac[6]; - - if (is_valid_ethaddr(mac) && - !eth_env_get_enetaddr_by_index("eth", i, oldmac)) - eth_env_set_enetaddr_by_index("eth", i, mac); -} - int misc_init_r(void) { - int err; - struct udevice *dev = get_atsha204a_dev(); - u8 mac0[4], mac1[4], mac[6]; - - if (!dev) - goto out; - - err = atsha204a_wakeup(dev); - if (err) - goto out; - - err = atsha204a_read(dev, ATSHA204A_ZONE_OTP, false, - OMNIA_ATSHA204_OTP_MAC0, mac0); - if (err) - goto out; - - err = atsha204a_read(dev, ATSHA204A_ZONE_OTP, false, - OMNIA_ATSHA204_OTP_MAC1, mac1); - if (err) - goto out; - - atsha204a_sleep(dev); - - mac[0] = mac0[1]; - mac[1] = mac0[2]; - mac[2] = mac0[3]; - mac[3] = mac1[1]; - mac[4] = mac1[2]; - mac[5] = mac1[3]; - - set_mac_if_invalid(1, mac); - increment_mac(mac); - set_mac_if_invalid(2, mac); - increment_mac(mac); - set_mac_if_invalid(0, mac); - -out: + turris_atsha_otp_init_mac_addresses(1); return 0; } diff --git a/board/Marvell/mvebu_armada-37xx/board.c b/board/Marvell/mvebu_armada-37xx/board.c index 6bfec0cc5bf..98e1b36d11b 100644 --- a/board/Marvell/mvebu_armada-37xx/board.c +++ b/board/Marvell/mvebu_armada-37xx/board.c @@ -328,9 +328,10 @@ int board_network_enable(struct mii_dev *bus) return 0; } -#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#ifdef CONFIG_OF_BOARD_SETUP int ft_board_setup(void *blob, struct bd_info *bd) { +#ifdef CONFIG_ENV_IS_IN_SPI_FLASH int ret; int spi_off; int parts_off; @@ -424,6 +425,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) return 0; } +#endif return 0; } #endif diff --git a/board/Marvell/sheevaplug/sheevaplug.c b/board/Marvell/sheevaplug/sheevaplug.c index 5952d158b28..26ee39ef77f 100644 --- a/board/Marvell/sheevaplug/sheevaplug.c +++ b/board/Marvell/sheevaplug/sheevaplug.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2021 Tony Dinh <mibodhi@gmail.com> + * Copyright (C) 2021-2022 Tony Dinh <mibodhi@gmail.com> * (C) Copyright 2009 * Marvell Semiconductor <www.marvell.com> * Written-by: Prafulla Wadaskar <prafulla@marvell.com> @@ -8,17 +8,21 @@ #include <common.h> #include <init.h> -#include <miiphy.h> -#include <net.h> +#include <netdev.h> #include <asm/global_data.h> #include <asm/mach-types.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> #include <asm/arch/mpp.h> -#include "sheevaplug.h" +#include <linux/bitops.h> DECLARE_GLOBAL_DATA_PTR; +#define SHEEVAPLUG_OE_LOW (~(0)) +#define SHEEVAPLUG_OE_HIGH (~(0)) +#define SHEEVAPLUG_OE_VAL_LOW BIT(29) /* USB_PWEN low */ +#define SHEEVAPLUG_OE_VAL_HIGH BIT(17) /* LED pin high */ + int board_early_init_f(void) { /* @@ -88,6 +92,11 @@ int board_early_init_f(void) return 0; } +int board_eth_init(struct bd_info *bis) +{ + return cpu_eth_init(bis); +} + int board_init(void) { /* @@ -95,72 +104,8 @@ int board_init(void) */ gd->bd->bi_arch_number = MACH_TYPE_SHEEVAPLUG; - /* adress of boot parameters */ + /* address of boot parameters */ gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; return 0; } - -static int fdt_get_phy_addr(const char *path) -{ - const void *fdt = gd->fdt_blob; - const u32 *reg; - const u32 *val; - int node, phandle, addr; - - /* Find the node by its full path */ - node = fdt_path_offset(fdt, path); - if (node >= 0) { - /* Look up phy-handle */ - val = fdt_getprop(fdt, node, "phy-handle", NULL); - if (val) { - phandle = fdt32_to_cpu(*val); - if (!phandle) - return -1; - /* Follow it to its node */ - node = fdt_node_offset_by_phandle(fdt, phandle); - if (node) { - /* Look up reg */ - reg = fdt_getprop(fdt, node, "reg", NULL); - if (reg) { - addr = fdt32_to_cpu(*reg); - return addr; - } - } - } - } - return -1; -} - -#ifdef CONFIG_RESET_PHY_R -/* Configure and enable MV88E1116 PHY */ -void reset_phy(void) -{ - u16 reg; - int phyaddr; - char *name = "ethernet-controller@72000"; - char *eth0_path = "/ocp@f1000000/ethernet-controller@72000/ethernet0-port@0"; - - if (miiphy_set_current_dev(name)) - return; - - phyaddr = fdt_get_phy_addr(eth0_path); - if (phyaddr < 0) - return; - - /* - * Enable RGMII delay on Tx and Rx for CPU port - * Ref: sec 4.7.2 of chip datasheet - */ - miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 2); - miiphy_read(name, phyaddr, MV88E1116_MAC_CTRL_REG, ®); - reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL); - miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL_REG, reg); - miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 0); - - /* reset the phy */ - miiphy_reset(name, phyaddr); - - printf("88E1116 Initialized on %s\n", name); -} -#endif /* CONFIG_RESET_PHY_R */ diff --git a/board/Marvell/sheevaplug/sheevaplug.h b/board/Marvell/sheevaplug/sheevaplug.h deleted file mode 100644 index e026c1b53bd..00000000000 --- a/board/Marvell/sheevaplug/sheevaplug.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2009 - * Marvell Semiconductor <www.marvell.com> - * Written-by: Prafulla Wadaskar <prafulla@marvell.com> - */ - -#ifndef __SHEEVAPLUG_H -#define __SHEEVAPLUG_H - -#define SHEEVAPLUG_OE_LOW (~(0)) -#define SHEEVAPLUG_OE_HIGH (~(0)) -#define SHEEVAPLUG_OE_VAL_LOW (1 << 29) /* USB_PWEN low */ -#define SHEEVAPLUG_OE_VAL_HIGH (1 << 17) /* LED pin high */ - -/* PHY related */ -#define MV88E1116_LED_FCTRL_REG 10 -#define MV88E1116_CPRSP_CR3_REG 21 -#define MV88E1116_MAC_CTRL_REG 21 -#define MV88E1116_PGADR_REG 22 -#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) -#define MV88E1116_RGMII_RXTM_CTRL (1 << 5) - -#endif /* __SHEEVAPLUG_H */ diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 89324159d55..371ed9eebaf 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -202,14 +202,14 @@ int board_init(void) * we avoid the risk of writing to it. */ asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r"(freq)); - if (freq != COUNTER_FREQUENCY) { + if (freq != CONFIG_COUNTER_FREQUENCY) { debug("arch timer frequency is %d Hz, should be %d, fixing ...\n", - freq, COUNTER_FREQUENCY); + freq, CONFIG_COUNTER_FREQUENCY); #ifdef CONFIG_NON_SECURE printf("arch timer frequency is wrong, but cannot adjust it\n"); #else asm volatile("mcr p15, 0, %0, c14, c0, 0" - : : "r"(COUNTER_FREQUENCY)); + : : "r"(CONFIG_COUNTER_FREQUENCY)); #endif } } diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index 9b7067040a6..7c0545892c9 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -825,8 +825,20 @@ int board_late_init(void) if (board_is_bbg1()) name = "BBG1"; - if (board_is_bben()) - name = "BBEN"; + if (board_is_bben()) { + char subtype_id = board_ti_get_config()[1]; + + switch (subtype_id) { + case 'L': + name = "BBELITE"; + break; + case 'I': + name = "BBE_EX_WIFI"; + break; + default: + name = "BBEN"; + } + } set_board_info_env(name); /* diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c index 9940f2aeb33..2e2807eee46 100644 --- a/board/xilinx/versal/board.c +++ b/board/xilinx/versal/board.c @@ -74,7 +74,7 @@ int board_early_init_r(void) * Program freq register in System counter and * enable system counter. */ - writel(COUNTER_FREQUENCY, + writel(CONFIG_COUNTER_FREQUENCY, &iou_scntr_secure->base_frequency_id_register); debug("counter val 0x%x\n", diff --git a/configs/a3y17lte_defconfig b/configs/a3y17lte_defconfig index 8636f151d82..536e23e1df9 100644 --- a/configs/a3y17lte_defconfig +++ b/configs/a3y17lte_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="exynos78x0-common" CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=26000000 CONFIG_ARCH_EXYNOS=y CONFIG_SYS_TEXT_BASE=0x40001000 CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/a5y17lte_defconfig b/configs/a5y17lte_defconfig index 97fa87c7277..c6f452a8558 100644 --- a/configs/a5y17lte_defconfig +++ b/configs/a5y17lte_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="exynos78x0-common" CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=26000000 CONFIG_ARCH_EXYNOS=y CONFIG_SYS_TEXT_BASE=0x40001000 CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/a7y17lte_defconfig b/configs/a7y17lte_defconfig index 9e664259888..28e9c097d19 100644 --- a/configs/a7y17lte_defconfig +++ b/configs/a7y17lte_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="exynos78x0-common" CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=26000000 CONFIG_ARCH_EXYNOS=y CONFIG_SYS_TEXT_BASE=0x40001000 CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/bubblegum_96_defconfig b/configs/bubblegum_96_defconfig index f4e6abc4110..a21b245c845 100644 --- a/configs/bubblegum_96_defconfig +++ b/configs/bubblegum_96_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_OWL=y CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_ENV_SIZE=0x2000 diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig index 638c65d79a9..1b2db5d0a8f 100644 --- a/configs/chromebook_bob_defconfig +++ b/configs/chromebook_bob_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO=y diff --git a/configs/chromebook_kevin_defconfig b/configs/chromebook_kevin_defconfig index 38c1403b994..ad6cbca198b 100644 --- a/configs/chromebook_kevin_defconfig +++ b/configs/chromebook_kevin_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO=y diff --git a/configs/cortina_presidio-asic-base_defconfig b/configs/cortina_presidio-asic-base_defconfig index 4a8377a3fdc..6514f0753e4 100644 --- a/configs/cortina_presidio-asic-base_defconfig +++ b/configs/cortina_presidio-asic-base_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 # CONFIG_SYS_ARCH_TIMER is not set CONFIG_TARGET_PRESIDIO_ASIC=y CONFIG_SYS_TEXT_BASE=0x04000000 diff --git a/configs/cortina_presidio-asic-emmc_defconfig b/configs/cortina_presidio-asic-emmc_defconfig index 236520e8a34..b0bd54f7cb1 100644 --- a/configs/cortina_presidio-asic-emmc_defconfig +++ b/configs/cortina_presidio-asic-emmc_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 # CONFIG_SYS_ARCH_TIMER is not set CONFIG_TARGET_PRESIDIO_ASIC=y CONFIG_SYS_TEXT_BASE=0x04000000 diff --git a/configs/cortina_presidio-asic-pnand_defconfig b/configs/cortina_presidio-asic-pnand_defconfig index 06eaa5f15e1..944fed6ca03 100644 --- a/configs/cortina_presidio-asic-pnand_defconfig +++ b/configs/cortina_presidio-asic-pnand_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 # CONFIG_SYS_ARCH_TIMER is not set CONFIG_TARGET_PRESIDIO_ASIC=y CONFIG_SYS_TEXT_BASE=0x04000000 diff --git a/configs/cubieboard7_defconfig b/configs/cubieboard7_defconfig index e73d8d8ed76..677bff64b90 100644 --- a/configs/cubieboard7_defconfig +++ b/configs/cubieboard7_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_OWL=y CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_DEFAULT_DEVICE_TREE="s700-cubieboard7" diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig index 33cb31c7251..dc136f98612 100644 --- a/configs/dragonboard410c_defconfig +++ b/configs/dragonboard410c_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=19000000 CONFIG_ARCH_SNAPDRAGON=y CONFIG_SYS_TEXT_BASE=0x8f600000 CONFIG_SYS_MALLOC_LEN=0x802000 diff --git a/configs/dragonboard820c_defconfig b/configs/dragonboard820c_defconfig index 4797153968e..3bd22aa34f0 100644 --- a/configs/dragonboard820c_defconfig +++ b/configs/dragonboard820c_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=19000000 CONFIG_ARCH_SNAPDRAGON=y CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_SYS_MALLOC_LEN=0x804000 diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig index 061d76e86a3..36eaf4e6b95 100644 --- a/configs/evb-px30_defconfig +++ b/configs/evb-px30_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SYS_MALLOC_F_LEN=0x2000 diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig index 581b8cdfada..1e2b0f03087 100644 --- a/configs/evb-px5_defconfig +++ b/configs/evb-px5_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig index 26d124827ed..b4ce8a1a396 100644 --- a/configs/evb-rk3308_defconfig +++ b/configs/evb-rk3308_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00600000 CONFIG_SYS_MALLOC_F_LEN=0x2000 diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig index 78fb93bf978..7e0c4c50a61 100644 --- a/configs/evb-rk3328_defconfig +++ b/configs/evb-rk3328_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index a18e6225800..a9afb63fdd9 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/evb-rk3568_defconfig b/configs/evb-rk3568_defconfig index a4720435838..d2af961eafc 100644 --- a/configs/evb-rk3568_defconfig +++ b/configs/evb-rk3568_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00a00000 CONFIG_SPL_LIBCOMMON_SUPPORT=y diff --git a/configs/ficus-rk3399_defconfig b/configs/ficus-rk3399_defconfig index 33d67818ac2..1ee3cb225bf 100644 --- a/configs/ficus-rk3399_defconfig +++ b/configs/ficus-rk3399_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_ENV_OFFSET=0x3F8000 diff --git a/configs/firefly-px30_defconfig b/configs/firefly-px30_defconfig index 873b34b792c..01858a65b4c 100644 --- a/configs/firefly-px30_defconfig +++ b/configs/firefly-px30_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SYS_MALLOC_F_LEN=0x2000 diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig index 2858c35d104..3803e42f380 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/geekbox_defconfig b/configs/geekbox_defconfig index e211176f101..8287600e0ba 100644 --- a/configs/geekbox_defconfig +++ b/configs/geekbox_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SYS_MALLOC_F_LEN=0x1000 diff --git a/configs/hihope_rzg2_defconfig b/configs/hihope_rzg2_defconfig index 05dd00a45fd..3e1077389c2 100644 --- a/configs/hihope_rzg2_defconfig +++ b/configs/hihope_rzg2_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=16666666 CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_RMOBILE=y CONFIG_SYS_TEXT_BASE=0x50000000 diff --git a/configs/hikey960_defconfig b/configs/hikey960_defconfig index ce3393689fa..627daa1fb83 100644 --- a/configs/hikey960_defconfig +++ b/configs/hikey960_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=19000000 CONFIG_TARGET_HIKEY960=y CONFIG_SYS_TEXT_BASE=0x1ac98000 CONFIG_SYS_MALLOC_LEN=0x801000 diff --git a/configs/hikey_defconfig b/configs/hikey_defconfig index 0c049453578..6f33bba1eb6 100644 --- a/configs/hikey_defconfig +++ b/configs/hikey_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=19000000 CONFIG_SYS_TEXT_BASE=0x35000000 CONFIG_SYS_MALLOC_LEN=0x801000 CONFIG_NR_DRAM_BANKS=6 diff --git a/configs/khadas-edge-captain-rk3399_defconfig b/configs/khadas-edge-captain-rk3399_defconfig index fffdc61e0fc..cddf5228b60 100644 --- a/configs/khadas-edge-captain-rk3399_defconfig +++ b/configs/khadas-edge-captain-rk3399_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/khadas-edge-rk3399_defconfig b/configs/khadas-edge-rk3399_defconfig index 2c6f32e27cf..bd52c015fa4 100644 --- a/configs/khadas-edge-rk3399_defconfig +++ b/configs/khadas-edge-rk3399_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/khadas-edge-v-rk3399_defconfig b/configs/khadas-edge-v-rk3399_defconfig index 3f3cf7d2cda..21bf9487a86 100644 --- a/configs/khadas-edge-v-rk3399_defconfig +++ b/configs/khadas-edge-v-rk3399_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/kontron_sl28_defconfig b/configs/kontron_sl28_defconfig index 90f925b6b48..0d2c0672086 100644 --- a/configs/kontron_sl28_defconfig +++ b/configs/kontron_sl28_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_SL28=y CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_SYS_MALLOC_F_LEN=0x4000 diff --git a/configs/leez-rk3399_defconfig b/configs/leez-rk3399_defconfig index e2bb140bb88..2fa8d563ebe 100644 --- a/configs/leez-rk3399_defconfig +++ b/configs/leez-rk3399_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig index 2a7cf0d8b71..426913816bf 100644 --- a/configs/lion-rk3368_defconfig +++ b/configs/lion-rk3368_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/ls1012a2g5rdb_qspi_defconfig b/configs/ls1012a2g5rdb_qspi_defconfig index ff5cfaca6d7..cb9ad24b122 100644 --- a/configs/ls1012a2g5rdb_qspi_defconfig +++ b/configs/ls1012a2g5rdb_qspi_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1012A2G5RDB=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x500000 diff --git a/configs/ls1012a2g5rdb_tfa_defconfig b/configs/ls1012a2g5rdb_tfa_defconfig index c2807c1a7c9..8763e0d7b04 100644 --- a/configs/ls1012a2g5rdb_tfa_defconfig +++ b/configs/ls1012a2g5rdb_tfa_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1012A2G5RDB=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 diff --git a/configs/ls1012afrdm_qspi_defconfig b/configs/ls1012afrdm_qspi_defconfig index 9d1d266fe41..fa3486cfbb7 100644 --- a/configs/ls1012afrdm_qspi_defconfig +++ b/configs/ls1012afrdm_qspi_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1012AFRDM=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x500000 diff --git a/configs/ls1012afrdm_tfa_defconfig b/configs/ls1012afrdm_tfa_defconfig index c0c9b73a335..a56a27bfc29 100644 --- a/configs/ls1012afrdm_tfa_defconfig +++ b/configs/ls1012afrdm_tfa_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1012AFRDM=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 diff --git a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig index fe0c894c3c9..e25d964124c 100644 --- a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1012AFRWY=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x500000 diff --git a/configs/ls1012afrwy_qspi_defconfig b/configs/ls1012afrwy_qspi_defconfig index 36583d75b1c..e0ae291872c 100644 --- a/configs/ls1012afrwy_qspi_defconfig +++ b/configs/ls1012afrwy_qspi_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1012AFRWY=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x500000 diff --git a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig index b790d520d2d..56ddeaaf4d6 100644 --- a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1012AFRWY=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 diff --git a/configs/ls1012afrwy_tfa_defconfig b/configs/ls1012afrwy_tfa_defconfig index 39f7f4fee4e..4d718cd44ea 100644 --- a/configs/ls1012afrwy_tfa_defconfig +++ b/configs/ls1012afrwy_tfa_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1012AFRWY=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 diff --git a/configs/ls1012aqds_qspi_defconfig b/configs/ls1012aqds_qspi_defconfig index 7e2f701e45f..eedb895c6b3 100644 --- a/configs/ls1012aqds_qspi_defconfig +++ b/configs/ls1012aqds_qspi_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1012AQDS=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x500000 diff --git a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig index fe2d5e352df..fa847f3844f 100644 --- a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1012AQDS=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 diff --git a/configs/ls1012aqds_tfa_defconfig b/configs/ls1012aqds_tfa_defconfig index 09dbac2303b..295d27173ea 100644 --- a/configs/ls1012aqds_tfa_defconfig +++ b/configs/ls1012aqds_tfa_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1012AQDS=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig index 25a9142920b..eccaf131604 100644 --- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1012ARDB=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x500000 diff --git a/configs/ls1012ardb_qspi_defconfig b/configs/ls1012ardb_qspi_defconfig index 3087e6ec79c..d9293d3e243 100644 --- a/configs/ls1012ardb_qspi_defconfig +++ b/configs/ls1012ardb_qspi_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1012ARDB=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x500000 diff --git a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig index 5b974e02c74..8397c499896 100644 --- a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1012ARDB=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 diff --git a/configs/ls1012ardb_tfa_defconfig b/configs/ls1012ardb_tfa_defconfig index d9741254fdc..82ccb856c3a 100644 --- a/configs/ls1012ardb_tfa_defconfig +++ b/configs/ls1012ardb_tfa_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1012ARDB=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 diff --git a/configs/ls1021aiot_qspi_defconfig b/configs/ls1021aiot_qspi_defconfig index fa3885fa8df..0e869a2295e 100644 --- a/configs/ls1021aiot_qspi_defconfig +++ b/configs/ls1021aiot_qspi_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=12500000 CONFIG_TARGET_LS1021AIOT=y CONFIG_SYS_TEXT_BASE=0x40010000 CONFIG_SYS_MALLOC_LEN=0x1002000 diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig index 79dde0ee0ab..030480bdbf8 100644 --- a/configs/ls1021aiot_sdcard_defconfig +++ b/configs/ls1021aiot_sdcard_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=12500000 CONFIG_TARGET_LS1021AIOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x1002000 diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig index 113213425a8..70501cb3f09 100644 --- a/configs/ls1021aqds_ddr4_nor_defconfig +++ b/configs/ls1021aqds_ddr4_nor_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=12500000 CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x1002000 diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig index 0a4a88fab3d..1948abc74ac 100644 --- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig +++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=12500000 CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x1002000 diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index c8dba2a763c..7bb42051378 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=12500000 CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x1002000 diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig index 32daccab5e0..6b6cf1fcdde 100644 --- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=12500000 CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x1002000 diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig index 0d11db7fa7f..d5b85db931a 100644 --- a/configs/ls1021aqds_nor_defconfig +++ b/configs/ls1021aqds_nor_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=12500000 CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x1002000 diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig index 85346c89380..6f18270c7ef 100644 --- a/configs/ls1021aqds_nor_lpuart_defconfig +++ b/configs/ls1021aqds_nor_lpuart_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=12500000 CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x1002000 diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig index b08c254dab1..d677ff72288 100644 --- a/configs/ls1021aqds_qspi_defconfig +++ b/configs/ls1021aqds_qspi_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=12500000 CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x1002000 diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index 876ffad3297..61809aae70e 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=12500000 CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x1002000 diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index 08c39a97de1..66f930aa61d 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=12500000 CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x1002000 diff --git a/configs/ls1021atsn_qspi_defconfig b/configs/ls1021atsn_qspi_defconfig index 9a59290e1c8..0b42b195f9a 100644 --- a/configs/ls1021atsn_qspi_defconfig +++ b/configs/ls1021atsn_qspi_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=12500000 CONFIG_TARGET_LS1021ATSN=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x1002000 diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig index f1f03eff65d..e6fdec2974c 100644 --- a/configs/ls1021atsn_sdcard_defconfig +++ b/configs/ls1021atsn_sdcard_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=12500000 CONFIG_TARGET_LS1021ATSN=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x1020000 diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig index 6e6f4744657..628e1d475e5 100644 --- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=12500000 CONFIG_TARGET_LS1021ATWR=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x1020000 diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig index e709759308f..c4df3338d7d 100644 --- a/configs/ls1021atwr_nor_defconfig +++ b/configs/ls1021atwr_nor_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=12500000 CONFIG_TARGET_LS1021ATWR=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x1020000 diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig index 0320f6c620d..aa6b619d34b 100644 --- a/configs/ls1021atwr_nor_lpuart_defconfig +++ b/configs/ls1021atwr_nor_lpuart_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=12500000 CONFIG_TARGET_LS1021ATWR=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x1020000 diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig index 559468f9155..1edc123181f 100644 --- a/configs/ls1021atwr_qspi_defconfig +++ b/configs/ls1021atwr_qspi_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=12500000 CONFIG_TARGET_LS1021ATWR=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x1002000 diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index 0975b3937e2..7824b24fb0d 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=12500000 CONFIG_TARGET_LS1021ATWR=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x1020000 diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index 5d0916bb9c5..8bab45bcffe 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=12500000 CONFIG_TARGET_LS1021ATWR=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x1020000 diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index a69d4e04699..a0f05d513da 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=12500000 CONFIG_TARGET_LS1021ATWR=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x1020000 diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig index 2a1aa3ad976..2e4db036a44 100644 --- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_GIC_V3_ITS=y CONFIG_TARGET_LS1028AQDS=y CONFIG_TFABOOT=y diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig index 7a8d2952709..556f77e2225 100644 --- a/configs/ls1028aqds_tfa_defconfig +++ b/configs/ls1028aqds_tfa_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_GIC_V3_ITS=y CONFIG_TARGET_LS1028AQDS=y CONFIG_TFABOOT=y diff --git a/configs/ls1028aqds_tfa_lpuart_defconfig b/configs/ls1028aqds_tfa_lpuart_defconfig index 8190d18a1b4..2adb28c89d1 100644 --- a/configs/ls1028aqds_tfa_lpuart_defconfig +++ b/configs/ls1028aqds_tfa_lpuart_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1028AQDS=y CONFIG_TFABOOT=y CONFIG_SYS_MALLOC_LEN=0x202000 diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig index 5b1bd5c3b73..20cb844b01f 100644 --- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_GIC_V3_ITS=y CONFIG_TARGET_LS1028ARDB=y CONFIG_TFABOOT=y diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig index f28efd287ba..fdfdf39c619 100644 --- a/configs/ls1028ardb_tfa_defconfig +++ b/configs/ls1028ardb_tfa_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_GIC_V3_ITS=y CONFIG_TARGET_LS1028ARDB=y CONFIG_TFABOOT=y diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig index 13f005734d4..49ed96365e9 100644 --- a/configs/ls1043aqds_defconfig +++ b/configs/ls1043aqds_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1043AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x120000 diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig index 15fb06e5a87..bd5c5f7fea6 100644 --- a/configs/ls1043aqds_lpuart_defconfig +++ b/configs/ls1043aqds_lpuart_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1043AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x120000 diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index 76c4ff1b771..aba4a1e98a0 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1043AQDS=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x102000 diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig index 34451996e51..9c1886b6ffb 100644 --- a/configs/ls1043aqds_nor_ddr3_defconfig +++ b/configs/ls1043aqds_nor_ddr3_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1043AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x120000 diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig index ddb598510e1..1c7b27e3d7e 100644 --- a/configs/ls1043aqds_qspi_defconfig +++ b/configs/ls1043aqds_qspi_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1043AQDS=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x102000 diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index 3a0ef69f6a3..699ac5b1050 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1043AQDS=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x102000 diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index 11d4fd430a8..78ff90d19e0 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1043AQDS=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x102000 diff --git a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig index 8a62239fa64..6f920ef8a88 100644 --- a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1043AQDS=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 diff --git a/configs/ls1043aqds_tfa_defconfig b/configs/ls1043aqds_tfa_defconfig index 98c03da0f82..031b5d8e753 100644 --- a/configs/ls1043aqds_tfa_defconfig +++ b/configs/ls1043aqds_tfa_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1043AQDS=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig index 6839a0213d4..65c336984e7 100644 --- a/configs/ls1043ardb_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_SECURE_BOOT_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1043ARDB=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x120000 diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig index fc646e728eb..c617716c53c 100644 --- a/configs/ls1043ardb_defconfig +++ b/configs/ls1043ardb_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1043ARDB=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x120000 diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index 8a2d0b6bf98..750cc548998 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1043ARDB=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x102000 diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index b47050f4473..78195de5ff1 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1043ARDB=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x102000 diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index 105888df361..69d8d43c93d 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1043ARDB=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x102000 diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index f0b0f9f1529..b05731df925 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1043ARDB=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x102000 diff --git a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig index 41a285e3a56..b08ba4f5c63 100644 --- a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1043ARDB=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 diff --git a/configs/ls1043ardb_tfa_defconfig b/configs/ls1043ardb_tfa_defconfig index 20947407880..90623a7df99 100644 --- a/configs/ls1043ardb_tfa_defconfig +++ b/configs/ls1043ardb_tfa_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1043ARDB=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 diff --git a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig index 93d323d3baf..3cbe1b7c10f 100644 --- a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1046AFRWY=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 diff --git a/configs/ls1046afrwy_tfa_defconfig b/configs/ls1046afrwy_tfa_defconfig index 3c12b40b893..2c198cd913a 100644 --- a/configs/ls1046afrwy_tfa_defconfig +++ b/configs/ls1046afrwy_tfa_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1046AFRWY=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig index e1f00f43793..902c14c7354 100644 --- a/configs/ls1046aqds_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_SECURE_BOOT_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1046AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x120000 diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig index 5620e1ac6f5..f9616ef82dd 100644 --- a/configs/ls1046aqds_defconfig +++ b/configs/ls1046aqds_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1046AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x120000 diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig index ecdb1b2d259..d1538829d1d 100644 --- a/configs/ls1046aqds_lpuart_defconfig +++ b/configs/ls1046aqds_lpuart_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1046AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x120000 diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig index 09e02183be7..b804ac41092 100644 --- a/configs/ls1046aqds_nand_defconfig +++ b/configs/ls1046aqds_nand_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1046AQDS=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x102000 diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig index ca43837df08..cb8a7a219ba 100644 --- a/configs/ls1046aqds_qspi_defconfig +++ b/configs/ls1046aqds_qspi_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1046AQDS=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x102000 diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig index 6d443920585..48e58f6c103 100644 --- a/configs/ls1046aqds_sdcard_ifc_defconfig +++ b/configs/ls1046aqds_sdcard_ifc_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1046AQDS=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x102000 diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index 7360daab61e..bc548848245 100644 --- a/configs/ls1046aqds_sdcard_qspi_defconfig +++ b/configs/ls1046aqds_sdcard_qspi_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1046AQDS=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x102000 diff --git a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig index 1e9a3c1c824..e96cda3cef6 100644 --- a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1046AQDS=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 diff --git a/configs/ls1046aqds_tfa_defconfig b/configs/ls1046aqds_tfa_defconfig index 2d44439d917..633399afc7b 100644 --- a/configs/ls1046aqds_tfa_defconfig +++ b/configs/ls1046aqds_tfa_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1046AQDS=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig index c14e97583b2..2c6772d28f6 100644 --- a/configs/ls1046ardb_emmc_defconfig +++ b/configs/ls1046ardb_emmc_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1046ARDB=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x102000 diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig index a4fa4ea3296..b7ace80367b 100644 --- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1046ARDB=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x102000 diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig index cb2567421f6..78acce163bf 100644 --- a/configs/ls1046ardb_qspi_defconfig +++ b/configs/ls1046ardb_qspi_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1046ARDB=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x102000 diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig index 78ce9373ed5..9d43c35439b 100644 --- a/configs/ls1046ardb_qspi_spl_defconfig +++ b/configs/ls1046ardb_qspi_spl_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1046ARDB=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x102000 diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig index 38fe9ea2da1..af30b022c80 100644 --- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1046ARDB=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x102000 diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig index 0646f0f7e30..40e343c2997 100644 --- a/configs/ls1046ardb_sdcard_defconfig +++ b/configs/ls1046ardb_sdcard_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1046ARDB=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x102000 diff --git a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig index 4d23458602a..369b80a18df 100644 --- a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1046ARDB=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 diff --git a/configs/ls1046ardb_tfa_defconfig b/configs/ls1046ardb_tfa_defconfig index e7587b302f6..f126cb7036e 100644 --- a/configs/ls1046ardb_tfa_defconfig +++ b/configs/ls1046ardb_tfa_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_TARGET_LS1046ARDB=y CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig index dfe180dfd27..ff0550db53f 100644 --- a/configs/ls2080aqds_SECURE_BOOT_defconfig +++ b/configs/ls2080aqds_SECURE_BOOT_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_GIC_V3_ITS=y CONFIG_TARGET_LS2080AQDS=y CONFIG_SYS_TEXT_BASE=0x30100000 diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig index 09ec59d87c5..97eebb72748 100644 --- a/configs/ls2080aqds_defconfig +++ b/configs/ls2080aqds_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_GIC_V3_ITS=y CONFIG_TARGET_LS2080AQDS=y CONFIG_SYS_TEXT_BASE=0x30100000 diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index a36b85b27a6..e7b2cc4c802 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_GIC_V3_ITS=y CONFIG_TARGET_LS2080AQDS=y CONFIG_SYS_TEXT_BASE=0x80400000 diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig index 09d1af95091..faa8f713b31 100644 --- a/configs/ls2080aqds_qspi_defconfig +++ b/configs/ls2080aqds_qspi_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_GIC_V3_ITS=y CONFIG_TARGET_LS2080AQDS=y CONFIG_SYS_TEXT_BASE=0x20100000 diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig index dd47a27c920..843c1e72ac7 100644 --- a/configs/ls2080aqds_sdcard_defconfig +++ b/configs/ls2080aqds_sdcard_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_GIC_V3_ITS=y CONFIG_TARGET_LS2080AQDS=y CONFIG_SYS_TEXT_BASE=0x80400000 diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig index 98ed05897b1..0a36c795c81 100644 --- a/configs/ls2080ardb_SECURE_BOOT_defconfig +++ b/configs/ls2080ardb_SECURE_BOOT_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_GIC_V3_ITS=y CONFIG_TARGET_LS2080ARDB=y CONFIG_SYS_TEXT_BASE=0x30100000 diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig index a978b8b2ac0..1001618f635 100644 --- a/configs/ls2080ardb_defconfig +++ b/configs/ls2080ardb_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_GIC_V3_ITS=y CONFIG_TARGET_LS2080ARDB=y CONFIG_SYS_TEXT_BASE=0x30100000 diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index 9c28a4329c3..505cdc19a3a 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_GIC_V3_ITS=y CONFIG_TARGET_LS2080ARDB=y CONFIG_SYS_TEXT_BASE=0x80400000 diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig index 53a81a6157f..dee04065025 100644 --- a/configs/ls2081ardb_defconfig +++ b/configs/ls2081ardb_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_GIC_V3_ITS=y CONFIG_TARGET_LS2081ARDB=y CONFIG_SYS_TEXT_BASE=0x20100000 diff --git a/configs/ls2088aqds_tfa_defconfig b/configs/ls2088aqds_tfa_defconfig index 7d57f7aa609..cd535babb54 100644 --- a/configs/ls2088aqds_tfa_defconfig +++ b/configs/ls2088aqds_tfa_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_GIC_V3_ITS=y CONFIG_TARGET_LS2080AQDS=y CONFIG_TFABOOT=y diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig index 540a9ee7ccb..540d8e0f041 100644 --- a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_GIC_V3_ITS=y CONFIG_TARGET_LS2080ARDB=y CONFIG_SYS_TEXT_BASE=0x20100000 diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig index d58a8431df5..df0244a8e5c 100644 --- a/configs/ls2088ardb_qspi_defconfig +++ b/configs/ls2088ardb_qspi_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_GIC_V3_ITS=y CONFIG_TARGET_LS2080ARDB=y CONFIG_SYS_TEXT_BASE=0x20100000 diff --git a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig index 1e5daeab134..2740f0c698e 100644 --- a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_GIC_V3_ITS=y CONFIG_TARGET_LS2080ARDB=y CONFIG_TFABOOT=y diff --git a/configs/ls2088ardb_tfa_defconfig b/configs/ls2088ardb_tfa_defconfig index e9d3c56909e..004c557923a 100644 --- a/configs/ls2088ardb_tfa_defconfig +++ b/configs/ls2088ardb_tfa_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25000000 CONFIG_GIC_V3_ITS=y CONFIG_TARGET_LS2080ARDB=y CONFIG_TFABOOT=y diff --git a/configs/mt8183_pumpkin_defconfig b/configs/mt8183_pumpkin_defconfig index 42627a2538b..ea7ab5c8096 100644 --- a/configs/mt8183_pumpkin_defconfig +++ b/configs/mt8183_pumpkin_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=13000000 CONFIG_POSITION_INDEPENDENT=y CONFIG_ARCH_MEDIATEK=y CONFIG_SYS_TEXT_BASE=0x4c000000 diff --git a/configs/mt8512_bm1_emmc_defconfig b/configs/mt8512_bm1_emmc_defconfig index 546d1dc80d3..7e711b1b469 100644 --- a/configs/mt8512_bm1_emmc_defconfig +++ b/configs/mt8512_bm1_emmc_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=13000000 CONFIG_POSITION_INDEPENDENT=y CONFIG_ARCH_MEDIATEK=y CONFIG_SYS_TEXT_BASE=0x44e00000 diff --git a/configs/mt8516_pumpkin_defconfig b/configs/mt8516_pumpkin_defconfig index 458b4fb0846..52c12609b15 100644 --- a/configs/mt8516_pumpkin_defconfig +++ b/configs/mt8516_pumpkin_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=13000000 CONFIG_POSITION_INDEPENDENT=y CONFIG_ARCH_MEDIATEK=y CONFIG_SYS_TEXT_BASE=0x4C000000 diff --git a/configs/mt8518_ap1_emmc_defconfig b/configs/mt8518_ap1_emmc_defconfig index 444da0be93e..a994cd3a2da 100644 --- a/configs/mt8518_ap1_emmc_defconfig +++ b/configs/mt8518_ap1_emmc_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=13000000 CONFIG_POSITION_INDEPENDENT=y CONFIG_ARCH_MEDIATEK=y CONFIG_SYS_TEXT_BASE=0x40008000 diff --git a/configs/mvebu_db-88f3720_defconfig b/configs/mvebu_db-88f3720_defconfig index 2756b0839e7..ff891150d24 100644 --- a/configs/mvebu_db-88f3720_defconfig +++ b/configs/mvebu_db-88f3720_defconfig @@ -4,6 +4,7 @@ CONFIG_ARCH_MVEBU=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_TARGET_MVEBU_ARMADA_37XX=y +CONFIG_MVEBU_EFUSE=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3f0000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -23,6 +24,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/mvebu_espressobin-88f3720_defconfig b/configs/mvebu_espressobin-88f3720_defconfig index 8fd9cbd7c7d..ff05630d202 100644 --- a/configs/mvebu_espressobin-88f3720_defconfig +++ b/configs/mvebu_espressobin-88f3720_defconfig @@ -4,6 +4,7 @@ CONFIG_ARCH_MVEBU=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_TARGET_MVEBU_ARMADA_37XX=y +CONFIG_MVEBU_EFUSE=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3F0000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -25,6 +26,7 @@ CONFIG_ARCH_EARLY_INIT_R=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/nanopc-t4-rk3399_defconfig b/configs/nanopc-t4-rk3399_defconfig index 164b066b916..31de4bd1a94 100644 --- a/configs/nanopc-t4-rk3399_defconfig +++ b/configs/nanopc-t4-rk3399_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/nanopi-m4-2gb-rk3399_defconfig b/configs/nanopi-m4-2gb-rk3399_defconfig index d3075e6a4a3..7c8eff869b6 100644 --- a/configs/nanopi-m4-2gb-rk3399_defconfig +++ b/configs/nanopi-m4-2gb-rk3399_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/nanopi-m4-rk3399_defconfig b/configs/nanopi-m4-rk3399_defconfig index 957879b14b8..d500ebe58dc 100644 --- a/configs/nanopi-m4-rk3399_defconfig +++ b/configs/nanopi-m4-rk3399_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/nanopi-m4b-rk3399_defconfig b/configs/nanopi-m4b-rk3399_defconfig index 805549bf3b3..16e39035e5e 100644 --- a/configs/nanopi-m4b-rk3399_defconfig +++ b/configs/nanopi-m4b-rk3399_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/nanopi-neo4-rk3399_defconfig b/configs/nanopi-neo4-rk3399_defconfig index c9d7be19db3..753ba92d0ed 100644 --- a/configs/nanopi-neo4-rk3399_defconfig +++ b/configs/nanopi-neo4-rk3399_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/nanopi-r2s-rk3328_defconfig b/configs/nanopi-r2s-rk3328_defconfig index 899b14caa0d..453e54295de 100644 --- a/configs/nanopi-r2s-rk3328_defconfig +++ b/configs/nanopi-r2s-rk3328_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO=y diff --git a/configs/nanopi-r4s-rk3399_defconfig b/configs/nanopi-r4s-rk3399_defconfig index 359673fe603..46ba07f4d55 100644 --- a/configs/nanopi-r4s-rk3399_defconfig +++ b/configs/nanopi-r4s-rk3399_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/odroid-go2_defconfig b/configs/odroid-go2_defconfig index 33fd076e144..8ff71fd28cd 100644 --- a/configs/odroid-go2_defconfig +++ b/configs/odroid-go2_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SYS_MALLOC_F_LEN=0x2000 diff --git a/configs/orangepi-rk3399_defconfig b/configs/orangepi-rk3399_defconfig index 04e1f4e1363..461300fd106 100644 --- a/configs/orangepi-rk3399_defconfig +++ b/configs/orangepi-rk3399_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig index 67657b0369c..5977325973e 100644 --- a/configs/p2371-2180_defconfig +++ b/configs/p2371-2180_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=19200000 CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80080000 diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig index 53d98b11f5d..47be8a1c286 100644 --- a/configs/p2771-0000-000_defconfig +++ b/configs/p2771-0000-000_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=19200000 CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80080000 diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig index 2e3eec0ee13..94866cd7693 100644 --- a/configs/p2771-0000-500_defconfig +++ b/configs/p2771-0000-500_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=19200000 CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80080000 diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig index 46f4cd01102..ec813dd7a5b 100644 --- a/configs/p3450-0000_defconfig +++ b/configs/p3450-0000_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=19200000 CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80080000 diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig index ab98e0a1596..844a39fd388 100644 --- a/configs/pg_wcom_expu1_defconfig +++ b/configs/pg_wcom_expu1_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=8333333 CONFIG_TARGET_PG_WCOM_EXPU1=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x1004000 diff --git a/configs/pg_wcom_expu1_update_defconfig b/configs/pg_wcom_expu1_update_defconfig index 261243f9422..bea61f70f61 100644 --- a/configs/pg_wcom_expu1_update_defconfig +++ b/configs/pg_wcom_expu1_update_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=8333333 CONFIG_TARGET_PG_WCOM_EXPU1=y CONFIG_SYS_TEXT_BASE=0x60240000 CONFIG_SYS_MALLOC_LEN=0x1004000 diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig index 80a3b74278e..81610881782 100644 --- a/configs/pg_wcom_seli8_defconfig +++ b/configs/pg_wcom_seli8_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=8333333 CONFIG_TARGET_PG_WCOM_SELI8=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x1004000 diff --git a/configs/pg_wcom_seli8_update_defconfig b/configs/pg_wcom_seli8_update_defconfig index d322d6daace..0a36ab9839b 100644 --- a/configs/pg_wcom_seli8_update_defconfig +++ b/configs/pg_wcom_seli8_update_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=8333333 CONFIG_TARGET_PG_WCOM_SELI8=y CONFIG_SYS_TEXT_BASE=0x60240000 CONFIG_SYS_MALLOC_LEN=0x1004000 diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig index d12a7d4e403..8ca1d0708f9 100644 --- a/configs/pinebook-pro-rk3399_defconfig +++ b/configs/pinebook-pro-rk3399_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index c98b5cf5f14..7ce2dc07192 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO=y diff --git a/configs/px30-core-ctouch2-of10-px30_defconfig b/configs/px30-core-ctouch2-of10-px30_defconfig index 9521990772f..213d01fe7a8 100644 --- a/configs/px30-core-ctouch2-of10-px30_defconfig +++ b/configs/px30-core-ctouch2-of10-px30_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SYS_MALLOC_F_LEN=0x2000 diff --git a/configs/px30-core-ctouch2-px30_defconfig b/configs/px30-core-ctouch2-px30_defconfig index 35d1bcbd4ee..875d7aa7de3 100644 --- a/configs/px30-core-ctouch2-px30_defconfig +++ b/configs/px30-core-ctouch2-px30_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SYS_MALLOC_F_LEN=0x2000 diff --git a/configs/px30-core-edimm2.2-px30_defconfig b/configs/px30-core-edimm2.2-px30_defconfig index c2371149051..4e2fa8cf7dc 100644 --- a/configs/px30-core-edimm2.2-px30_defconfig +++ b/configs/px30-core-edimm2.2-px30_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SYS_MALLOC_F_LEN=0x2000 diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig index b3fbe869285..7b050d82457 100644 --- a/configs/r8a77970_eagle_defconfig +++ b/configs/r8a77970_eagle_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=16666666 CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_RMOBILE=y CONFIG_SYS_TEXT_BASE=0x50000000 diff --git a/configs/r8a77980_condor_defconfig b/configs/r8a77980_condor_defconfig index 88901ec46c0..c3b6e99ae77 100644 --- a/configs/r8a77980_condor_defconfig +++ b/configs/r8a77980_condor_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=16666666 CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_RMOBILE=y CONFIG_SYS_TEXT_BASE=0x50000000 diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig index 13422a10be2..fba03a760fc 100644 --- a/configs/r8a77990_ebisu_defconfig +++ b/configs/r8a77990_ebisu_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=16666666 CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_RMOBILE=y CONFIG_SYS_TEXT_BASE=0x50000000 diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig index 640f303bffd..008254715e2 100644 --- a/configs/r8a77995_draak_defconfig +++ b/configs/r8a77995_draak_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=16666666 CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_RMOBILE=y CONFIG_SYS_TEXT_BASE=0x50000000 diff --git a/configs/r8a779a0_falcon_defconfig b/configs/r8a779a0_falcon_defconfig index c3f56e4b1a0..f76b1132a8e 100644 --- a/configs/r8a779a0_falcon_defconfig +++ b/configs/r8a779a0_falcon_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=16666666 CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_RMOBILE=y CONFIG_SYS_TEXT_BASE=0x50000000 diff --git a/configs/rcar3_salvator-x_defconfig b/configs/rcar3_salvator-x_defconfig index 5df295980b3..f333291aa4b 100644 --- a/configs/rcar3_salvator-x_defconfig +++ b/configs/rcar3_salvator-x_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=16666666 CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_RMOBILE=y CONFIG_SYS_MALLOC_LEN=0x4000000 diff --git a/configs/rcar3_ulcb_defconfig b/configs/rcar3_ulcb_defconfig index 85a2e48f96e..a7ef4f1c0ee 100644 --- a/configs/rcar3_ulcb_defconfig +++ b/configs/rcar3_ulcb_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=16666666 CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_RMOBILE=y CONFIG_SYS_TEXT_BASE=0x50000000 diff --git a/configs/roc-cc-rk3308_defconfig b/configs/roc-cc-rk3308_defconfig index 5bc691d167b..0ae45ca8a19 100644 --- a/configs/roc-cc-rk3308_defconfig +++ b/configs/roc-cc-rk3308_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00600000 CONFIG_SYS_MALLOC_F_LEN=0x2000 diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig index a60731d5466..5fc4dd77943 100644 --- a/configs/roc-cc-rk3328_defconfig +++ b/configs/roc-cc-rk3328_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO=y diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig index 569c5dc34f2..fd857ed0ffd 100644 --- a/configs/roc-pc-mezzanine-rk3399_defconfig +++ b/configs/roc-pc-mezzanine-rk3399_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO=y diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index 1ea9a9ad401..4684fa6e747 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO=y diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig index 1099aad5dd4..80d1e63b59c 100644 --- a/configs/rock-pi-4-rk3399_defconfig +++ b/configs/rock-pi-4-rk3399_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/rock-pi-4c-rk3399_defconfig b/configs/rock-pi-4c-rk3399_defconfig index ae4aec22ab6..bda4b70dbf9 100644 --- a/configs/rock-pi-4c-rk3399_defconfig +++ b/configs/rock-pi-4c-rk3399_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig index 31581630bad..36038d90530 100644 --- a/configs/rock-pi-e-rk3328_defconfig +++ b/configs/rock-pi-e-rk3328_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO=y diff --git a/configs/rock-pi-n10-rk3399pro_defconfig b/configs/rock-pi-n10-rk3399pro_defconfig index c205479b1fc..7151da4c191 100644 --- a/configs/rock-pi-n10-rk3399pro_defconfig +++ b/configs/rock-pi-n10-rk3399pro_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO=y diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig index 6704946c16c..ea61fe738f2 100644 --- a/configs/rock64-rk3328_defconfig +++ b/configs/rock64-rk3328_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO=y diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig index 1e45d82c60e..be0e1c7d186 100644 --- a/configs/rock960-rk3399_defconfig +++ b/configs/rock960-rk3399_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_ENV_OFFSET=0x3F8000 diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig index 18257d52f54..e6f7a8469a3 100644 --- a/configs/rockpro64-rk3399_defconfig +++ b/configs/rockpro64-rk3399_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/sheep-rk3368_defconfig b/configs/sheep-rk3368_defconfig index 41d9fa321ea..80f599d3a39 100644 --- a/configs/sheep-rk3368_defconfig +++ b/configs/sheep-rk3368_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig index 0525bb436ec..0477cd79e3e 100644 --- a/configs/sheevaplug_defconfig +++ b/configs/sheevaplug_defconfig @@ -21,7 +21,6 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="${x_bootcmd_kernel}; setenv bootargs ${x_bootargs} ${x_bootargs_root}; bootm 0x6400000;" CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set @@ -29,13 +28,13 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_SATA=y CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_JFFS2=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=orion_nand" @@ -54,6 +53,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_MVEBU_MMC=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y +CONFIG_PHY_MARVELL=y CONFIG_DM_ETH=y CONFIG_MVGBE=y CONFIG_MII=y diff --git a/configs/silinux_ek874_defconfig b/configs/silinux_ek874_defconfig index 61c2a739281..099a200539f 100644 --- a/configs/silinux_ek874_defconfig +++ b/configs/silinux_ek874_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=16666666 CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_RMOBILE=y CONFIG_SYS_TEXT_BASE=0x50000000 diff --git a/configs/socfpga_agilex_atf_defconfig b/configs/socfpga_agilex_atf_defconfig index af2a2280b92..f1ae3c3349d 100644 --- a/configs/socfpga_agilex_atf_defconfig +++ b/configs/socfpga_agilex_atf_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=400000000 CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds" CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_TEXT_BASE=0x200000 diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig index 31815a2d509..bfbbd9bfdde 100644 --- a/configs/socfpga_agilex_defconfig +++ b/configs/socfpga_agilex_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=400000000 CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_TEXT_BASE=0x1000 CONFIG_SYS_MALLOC_LEN=0x500000 diff --git a/configs/socfpga_agilex_vab_defconfig b/configs/socfpga_agilex_vab_defconfig index b7c4d067db8..d29b51729dd 100644 --- a/configs/socfpga_agilex_vab_defconfig +++ b/configs/socfpga_agilex_vab_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=400000000 CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds" CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_TEXT_BASE=0x200000 diff --git a/configs/socfpga_n5x_atf_defconfig b/configs/socfpga_n5x_atf_defconfig index 7c4bb718a01..50b3319561e 100644 --- a/configs/socfpga_n5x_atf_defconfig +++ b/configs/socfpga_n5x_atf_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=400000000 CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds" CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_TEXT_BASE=0x200000 diff --git a/configs/socfpga_n5x_defconfig b/configs/socfpga_n5x_defconfig index 489a5113f37..8cdf65dbee1 100644 --- a/configs/socfpga_n5x_defconfig +++ b/configs/socfpga_n5x_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=400000000 CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_TEXT_BASE=0x1000 CONFIG_SYS_MALLOC_LEN=0x500000 diff --git a/configs/socfpga_n5x_vab_defconfig b/configs/socfpga_n5x_vab_defconfig index cf9905e5f87..04942e4fd9d 100644 --- a/configs/socfpga_n5x_vab_defconfig +++ b/configs/socfpga_n5x_vab_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=400000000 CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds" CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_TEXT_BASE=0x200000 diff --git a/configs/socfpga_stratix10_atf_defconfig b/configs/socfpga_stratix10_atf_defconfig index 409a689c267..6d2f4736c60 100644 --- a/configs/socfpga_stratix10_atf_defconfig +++ b/configs/socfpga_stratix10_atf_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=400000000 CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds" CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_TEXT_BASE=0x200000 diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index 5d4aa6f7023..8e16c2bfbb3 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=400000000 CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_TEXT_BASE=0x1000 CONFIG_SYS_MALLOC_LEN=0x500000 diff --git a/configs/starqltechn_defconfig b/configs/starqltechn_defconfig index e3b2f7c2498..608d001b6df 100644 --- a/configs/starqltechn_defconfig +++ b/configs/starqltechn_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=19000000 CONFIG_POSITION_INDEPENDENT=y CONFIG_ARCH_SNAPDRAGON=y CONFIG_DEFAULT_DEVICE_TREE="starqltechn" diff --git a/configs/thunderx_88xx_defconfig b/configs/thunderx_88xx_defconfig index 471f3154463..5e818864d2c 100644 --- a/configs/thunderx_88xx_defconfig +++ b/configs/thunderx_88xx_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=25165824 CONFIG_TARGET_THUNDERX_88XX=y CONFIG_SYS_TEXT_BASE=0x00500000 CONFIG_SYS_MALLOC_LEN=0x101000 diff --git a/configs/turris_mox_defconfig b/configs/turris_mox_defconfig index e8fc2c7da8b..9a76a118c2f 100644 --- a/configs/turris_mox_defconfig +++ b/configs/turris_mox_defconfig @@ -4,6 +4,7 @@ CONFIG_ARCH_MVEBU=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_TURRIS_MOX=y +CONFIG_MVEBU_EFUSE=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x180000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -30,6 +31,7 @@ CONFIG_MISC_INIT_R=y CONFIG_CMD_SHA1SUM=y CONFIG_CMD_CLK=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index a5e5298f693..ad56d3824ba 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_TURRIS_OMNIA=y CONFIG_DDR_RESET_ON_TRAINING_FAILURE=y +CONFIG_MVEBU_EFUSE=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0xF0000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -41,6 +42,7 @@ CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y CONFIG_CMD_SHA1SUM=y CONFIG_CMD_LZMADEC=y +CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/uDPU_defconfig b/configs/uDPU_defconfig index dbc736e64f4..c07bad5076e 100644 --- a/configs/uDPU_defconfig +++ b/configs/uDPU_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_TARGET_MVEBU_ARMADA_37XX=y +CONFIG_MVEBU_EFUSE=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x180000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -15,9 +16,8 @@ CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y -CONFIG_SPI_BOOT=y +CONFIG_FIT_VERBOSE=y CONFIG_USE_PREBOOT=y -CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -28,9 +28,11 @@ CONFIG_SYS_PROMPT="uDPU>> " # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set # CONFIG_CMD_FLASH is not set +CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y CONFIG_CMD_PCI=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y @@ -40,9 +42,6 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_MVEBU_BUBT=y CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_MTDPARTS=y -CONFIG_MTDIDS_DEFAULT="nor0=spi0" -CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0:4m(uboot),-(rootfs)" CONFIG_MAC_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y @@ -57,12 +56,13 @@ CONFIG_DM_I2C=y CONFIG_DM_I2C_GPIO=y CONFIG_SYS_I2C_MV=y CONFIG_MISC=y +CONFIG_MMC_HS200_SUPPORT=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_XENON=y CONFIG_MTD=y CONFIG_DM_MTD=y -CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig index 374fa32cbf4..967bc560936 100644 --- a/configs/vexpress_aemv8a_juno_defconfig +++ b/configs/vexpress_aemv8a_juno_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_VEXPRESS64=y CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="juno-r2" diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig index eca61764ba4..1a4cbc1cdd0 100644 --- a/configs/vexpress_aemv8a_semi_defconfig +++ b/configs/vexpress_aemv8a_semi_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y # CONFIG_ARM64_CRC32 is not set +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_VEXPRESS64=y CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="fvp-base-revc" diff --git a/configs/vexpress_aemv8r_defconfig b/configs/vexpress_aemv8r_defconfig index 612797e47d5..a1c5d887170 100644 --- a/configs/vexpress_aemv8r_defconfig +++ b/configs/vexpress_aemv8r_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_VEXPRESS64=y CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="arm_fvp" diff --git a/configs/xilinx_versal_mini_defconfig b/configs/xilinx_versal_mini_defconfig index 2cffba48450..16d26352ec2 100644 --- a/configs/xilinx_versal_mini_defconfig +++ b/configs/xilinx_versal_mini_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_versal_mini_qspi" CONFIG_SYS_ICACHE_OFF=y +CONFIG_COUNTER_FREQUENCY=100000000 CONFIG_ARCH_VERSAL=y CONFIG_SYS_TEXT_BASE=0xFFFC0000 CONFIG_SYS_MALLOC_LEN=0x2000 @@ -9,7 +10,6 @@ CONFIG_NR_DRAM_BANKS=3 CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="versal-mini" CONFIG_SYS_MEM_RSVD_FOR_MMU=y -CONFIG_COUNTER_FREQUENCY=100000000 # CONFIG_PSCI_RESET is not set CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_SYS_MEMTEST_START=0x00000000 diff --git a/configs/xilinx_versal_mini_emmc0_defconfig b/configs/xilinx_versal_mini_emmc0_defconfig index a1b51e5b1c2..ab14118fdcd 100644 --- a/configs/xilinx_versal_mini_emmc0_defconfig +++ b/configs/xilinx_versal_mini_emmc0_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_versal_mini" CONFIG_SYS_ICACHE_OFF=y +CONFIG_COUNTER_FREQUENCY=100000000 CONFIG_ARCH_VERSAL=y CONFIG_SYS_TEXT_BASE=0x10000 CONFIG_SYS_MALLOC_LEN=0x80000 @@ -8,7 +9,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="versal-mini-emmc0" -CONFIG_COUNTER_FREQUENCY=100000000 # CONFIG_PSCI_RESET is not set CONFIG_SYS_LOAD_ADDR=0x8000000 # CONFIG_EXPERT is not set diff --git a/configs/xilinx_versal_mini_emmc1_defconfig b/configs/xilinx_versal_mini_emmc1_defconfig index 4727df5ad04..cab3d21cb71 100644 --- a/configs/xilinx_versal_mini_emmc1_defconfig +++ b/configs/xilinx_versal_mini_emmc1_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_versal_mini" CONFIG_SYS_ICACHE_OFF=y +CONFIG_COUNTER_FREQUENCY=100000000 CONFIG_ARCH_VERSAL=y CONFIG_SYS_TEXT_BASE=0x10000 CONFIG_SYS_MALLOC_LEN=0x80000 @@ -8,7 +9,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="versal-mini-emmc1" -CONFIG_COUNTER_FREQUENCY=100000000 # CONFIG_PSCI_RESET is not set CONFIG_SYS_LOAD_ADDR=0x8000000 # CONFIG_EXPERT is not set diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index f5873599ca6..38747ffd02c 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_COUNTER_FREQUENCY=100000000 CONFIG_POSITION_INDEPENDENT=y CONFIG_SYS_INIT_SP_BSS_OFFSET=1572864 CONFIG_ARCH_VERSAL=y @@ -8,7 +9,6 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="xilinx-versal-virt" CONFIG_CMD_FRU=y CONFIG_DEFINE_TCM_OCM_MMAP=y -CONFIG_COUNTER_FREQUENCY=100000000 CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_SYS_MEMTEST_START=0x00000000 CONFIG_SYS_MEMTEST_END=0x00001000 diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 10fd601278e..dab7a99c68c 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -40,6 +40,7 @@ config ALTERA_SYSID config ATSHA204A bool "Support for Atmel ATSHA204A module" + select BITREVERSE depends on MISC help Enable support for I2C connected Atmel's ATSHA204A diff --git a/drivers/misc/atsha204a-i2c.c b/drivers/misc/atsha204a-i2c.c index 63fe541dade..5da8134f05c 100644 --- a/drivers/misc/atsha204a-i2c.c +++ b/drivers/misc/atsha204a-i2c.c @@ -18,6 +18,7 @@ #include <log.h> #include <asm/global_data.h> #include <linux/delay.h> +#include <linux/bitrev.h> #include <u-boot/crc.h> #define ATSHA204A_TWLO 60 @@ -27,126 +28,9 @@ DECLARE_GLOBAL_DATA_PTR; -/* - * The ATSHA204A uses an (to me) unknown CRC-16 algorithm. - * The Reveng CRC-16 catalogue does not contain it. - * - * Because in Atmel's documentation only a primitive implementation - * can be found, I have implemented this one with lookup table. - */ - -/* - * This is the code that computes the table below: - * - * int i, j; - * for (i = 0; i < 256; ++i) { - * u8 c = 0; - * for (j = 0; j < 8; ++j) { - * c = (c << 1) | ((i >> j) & 1); - * } - * bitreverse_table[i] = c; - * } - */ - -static u8 const bitreverse_table[256] = { - 0x00, 0x80, 0x40, 0xc0, 0x20, 0xa0, 0x60, 0xe0, - 0x10, 0x90, 0x50, 0xd0, 0x30, 0xb0, 0x70, 0xf0, - 0x08, 0x88, 0x48, 0xc8, 0x28, 0xa8, 0x68, 0xe8, - 0x18, 0x98, 0x58, 0xd8, 0x38, 0xb8, 0x78, 0xf8, - 0x04, 0x84, 0x44, 0xc4, 0x24, 0xa4, 0x64, 0xe4, - 0x14, 0x94, 0x54, 0xd4, 0x34, 0xb4, 0x74, 0xf4, - 0x0c, 0x8c, 0x4c, 0xcc, 0x2c, 0xac, 0x6c, 0xec, - 0x1c, 0x9c, 0x5c, 0xdc, 0x3c, 0xbc, 0x7c, 0xfc, - 0x02, 0x82, 0x42, 0xc2, 0x22, 0xa2, 0x62, 0xe2, - 0x12, 0x92, 0x52, 0xd2, 0x32, 0xb2, 0x72, 0xf2, - 0x0a, 0x8a, 0x4a, 0xca, 0x2a, 0xaa, 0x6a, 0xea, - 0x1a, 0x9a, 0x5a, 0xda, 0x3a, 0xba, 0x7a, 0xfa, - 0x06, 0x86, 0x46, 0xc6, 0x26, 0xa6, 0x66, 0xe6, - 0x16, 0x96, 0x56, 0xd6, 0x36, 0xb6, 0x76, 0xf6, - 0x0e, 0x8e, 0x4e, 0xce, 0x2e, 0xae, 0x6e, 0xee, - 0x1e, 0x9e, 0x5e, 0xde, 0x3e, 0xbe, 0x7e, 0xfe, - 0x01, 0x81, 0x41, 0xc1, 0x21, 0xa1, 0x61, 0xe1, - 0x11, 0x91, 0x51, 0xd1, 0x31, 0xb1, 0x71, 0xf1, - 0x09, 0x89, 0x49, 0xc9, 0x29, 0xa9, 0x69, 0xe9, - 0x19, 0x99, 0x59, 0xd9, 0x39, 0xb9, 0x79, 0xf9, - 0x05, 0x85, 0x45, 0xc5, 0x25, 0xa5, 0x65, 0xe5, - 0x15, 0x95, 0x55, 0xd5, 0x35, 0xb5, 0x75, 0xf5, - 0x0d, 0x8d, 0x4d, 0xcd, 0x2d, 0xad, 0x6d, 0xed, - 0x1d, 0x9d, 0x5d, 0xdd, 0x3d, 0xbd, 0x7d, 0xfd, - 0x03, 0x83, 0x43, 0xc3, 0x23, 0xa3, 0x63, 0xe3, - 0x13, 0x93, 0x53, 0xd3, 0x33, 0xb3, 0x73, 0xf3, - 0x0b, 0x8b, 0x4b, 0xcb, 0x2b, 0xab, 0x6b, 0xeb, - 0x1b, 0x9b, 0x5b, 0xdb, 0x3b, 0xbb, 0x7b, 0xfb, - 0x07, 0x87, 0x47, 0xc7, 0x27, 0xa7, 0x67, 0xe7, - 0x17, 0x97, 0x57, 0xd7, 0x37, 0xb7, 0x77, 0xf7, - 0x0f, 0x8f, 0x4f, 0xcf, 0x2f, 0xaf, 0x6f, 0xef, - 0x1f, 0x9f, 0x5f, 0xdf, 0x3f, 0xbf, 0x7f, 0xff, -}; - -/* - * This is the code that computes the table below: - * - * int i, j; - * for (i = 0; i < 256; ++i) { - * u16 c = i << 8; - * for (j = 0; j < 8; ++j) { - * int b = c >> 15; - * c <<= 1; - * if (b) - * c ^= 0x8005; - * } - * crc16_table[i] = c; - * } - */ -static u16 const crc16_table[256] = { - 0x0000, 0x8005, 0x800f, 0x000a, 0x801b, 0x001e, 0x0014, 0x8011, - 0x8033, 0x0036, 0x003c, 0x8039, 0x0028, 0x802d, 0x8027, 0x0022, - 0x8063, 0x0066, 0x006c, 0x8069, 0x0078, 0x807d, 0x8077, 0x0072, - 0x0050, 0x8055, 0x805f, 0x005a, 0x804b, 0x004e, 0x0044, 0x8041, - 0x80c3, 0x00c6, 0x00cc, 0x80c9, 0x00d8, 0x80dd, 0x80d7, 0x00d2, - 0x00f0, 0x80f5, 0x80ff, 0x00fa, 0x80eb, 0x00ee, 0x00e4, 0x80e1, - 0x00a0, 0x80a5, 0x80af, 0x00aa, 0x80bb, 0x00be, 0x00b4, 0x80b1, - 0x8093, 0x0096, 0x009c, 0x8099, 0x0088, 0x808d, 0x8087, 0x0082, - 0x8183, 0x0186, 0x018c, 0x8189, 0x0198, 0x819d, 0x8197, 0x0192, - 0x01b0, 0x81b5, 0x81bf, 0x01ba, 0x81ab, 0x01ae, 0x01a4, 0x81a1, - 0x01e0, 0x81e5, 0x81ef, 0x01ea, 0x81fb, 0x01fe, 0x01f4, 0x81f1, - 0x81d3, 0x01d6, 0x01dc, 0x81d9, 0x01c8, 0x81cd, 0x81c7, 0x01c2, - 0x0140, 0x8145, 0x814f, 0x014a, 0x815b, 0x015e, 0x0154, 0x8151, - 0x8173, 0x0176, 0x017c, 0x8179, 0x0168, 0x816d, 0x8167, 0x0162, - 0x8123, 0x0126, 0x012c, 0x8129, 0x0138, 0x813d, 0x8137, 0x0132, - 0x0110, 0x8115, 0x811f, 0x011a, 0x810b, 0x010e, 0x0104, 0x8101, - 0x8303, 0x0306, 0x030c, 0x8309, 0x0318, 0x831d, 0x8317, 0x0312, - 0x0330, 0x8335, 0x833f, 0x033a, 0x832b, 0x032e, 0x0324, 0x8321, - 0x0360, 0x8365, 0x836f, 0x036a, 0x837b, 0x037e, 0x0374, 0x8371, - 0x8353, 0x0356, 0x035c, 0x8359, 0x0348, 0x834d, 0x8347, 0x0342, - 0x03c0, 0x83c5, 0x83cf, 0x03ca, 0x83db, 0x03de, 0x03d4, 0x83d1, - 0x83f3, 0x03f6, 0x03fc, 0x83f9, 0x03e8, 0x83ed, 0x83e7, 0x03e2, - 0x83a3, 0x03a6, 0x03ac, 0x83a9, 0x03b8, 0x83bd, 0x83b7, 0x03b2, - 0x0390, 0x8395, 0x839f, 0x039a, 0x838b, 0x038e, 0x0384, 0x8381, - 0x0280, 0x8285, 0x828f, 0x028a, 0x829b, 0x029e, 0x0294, 0x8291, - 0x82b3, 0x02b6, 0x02bc, 0x82b9, 0x02a8, 0x82ad, 0x82a7, 0x02a2, - 0x82e3, 0x02e6, 0x02ec, 0x82e9, 0x02f8, 0x82fd, 0x82f7, 0x02f2, - 0x02d0, 0x82d5, 0x82df, 0x02da, 0x82cb, 0x02ce, 0x02c4, 0x82c1, - 0x8243, 0x0246, 0x024c, 0x8249, 0x0258, 0x825d, 0x8257, 0x0252, - 0x0270, 0x8275, 0x827f, 0x027a, 0x826b, 0x026e, 0x0264, 0x8261, - 0x0220, 0x8225, 0x822f, 0x022a, 0x823b, 0x023e, 0x0234, 0x8231, - 0x8213, 0x0216, 0x021c, 0x8219, 0x0208, 0x820d, 0x8207, 0x0202, -}; - -static inline u16 crc16_byte(u16 crc, const u8 data) +static inline u16 atsha204a_crc16(const u8 *buffer, size_t len) { - u16 t = crc16_table[((crc >> 8) ^ bitreverse_table[data]) & 0xff]; - return ((crc << 8) ^ t); -} - -static u16 atsha204a_crc16(const u8 *buffer, size_t len) -{ - u16 crc = 0; - - while (len--) - crc = crc16_byte(crc, *buffer++); - - return crc; + return bitrev16(crc16(0, buffer, len)); } static int atsha204a_send(struct udevice *dev, const u8 *buf, u8 len) diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c index e2ac4d801dc..15dc7140587 100644 --- a/drivers/net/mvneta.c +++ b/drivers/net/mvneta.c @@ -286,6 +286,7 @@ struct mvneta_port { struct phy_device *phydev; #if CONFIG_IS_ENABLED(DM_GPIO) struct gpio_desc phy_reset_gpio; + struct gpio_desc sfp_tx_disable_gpio; #endif struct mii_dev *bus; }; @@ -1693,6 +1694,9 @@ static int mvneta_probe(struct udevice *dev) { struct eth_pdata *pdata = dev_get_plat(dev); struct mvneta_port *pp = dev_get_priv(dev); +#if CONFIG_IS_ENABLED(DM_GPIO) + struct ofnode_phandle_args sfp_args; +#endif void *blob = (void *)gd->fdt_blob; int node = dev_of_offset(dev); struct mii_dev *bus; @@ -1767,6 +1771,11 @@ static int mvneta_probe(struct udevice *dev) return ret; #if CONFIG_IS_ENABLED(DM_GPIO) + ret = dev_read_phandle_with_args(dev, "sfp", NULL, 0, 0, &sfp_args); + if (!ret && ofnode_is_enabled(sfp_args.node)) + gpio_request_by_name_nodev(sfp_args.node, "tx-disable-gpio", 0, + &pp->sfp_tx_disable_gpio, GPIOD_IS_OUT); + gpio_request_by_name(dev, "phy-reset-gpios", 0, &pp->phy_reset_gpio, GPIOD_IS_OUT); @@ -1775,6 +1784,9 @@ static int mvneta_probe(struct udevice *dev) mdelay(10); dm_gpio_set_value(&pp->phy_reset_gpio, 0); } + + if (dm_gpio_is_valid(&pp->sfp_tx_disable_gpio)) + dm_gpio_set_value(&pp->sfp_tx_disable_gpio, 0); #endif return board_network_enable(bus); diff --git a/env/env.c b/env/env.c index e4dfb92e154..69848fb0608 100644 --- a/env/env.c +++ b/env/env.c @@ -110,13 +110,14 @@ static void env_set_inited(enum env_location location) } /** - * env_get_location() - Returns the best env location for a board + * arch_env_get_location() - Returns the best env location for an arch * @op: operations performed on the environment * @prio: priority between the multiple environments, 0 being the * highest priority * * This will return the preferred environment for the given priority. - * This is overridable by boards if they need to. + * This is overridable by architectures if they need to and has lower + * priority than board side env_get_location() override. * * All implementations are free to use the operation, the priority and * any other data relevant to their choice, but must take into account @@ -127,7 +128,7 @@ static void env_set_inited(enum env_location location) * Returns: * an enum env_location value on success, a negative error code otherwise */ -__weak enum env_location env_get_location(enum env_operation op, int prio) +__weak enum env_location arch_env_get_location(enum env_operation op, int prio) { if (prio >= ARRAY_SIZE(env_locations)) return ENVL_UNKNOWN; @@ -135,6 +136,28 @@ __weak enum env_location env_get_location(enum env_operation op, int prio) return env_locations[prio]; } +/** + * env_get_location() - Returns the best env location for a board + * @op: operations performed on the environment + * @prio: priority between the multiple environments, 0 being the + * highest priority + * + * This will return the preferred environment for the given priority. + * This is overridable by boards if they need to. + * + * All implementations are free to use the operation, the priority and + * any other data relevant to their choice, but must take into account + * the fact that the lowest prority (0) is the most important location + * in the system. The following locations should be returned by order + * of descending priorities, from the highest to the lowest priority. + * + * Returns: + * an enum env_location value on success, a negative error code otherwise + */ +__weak enum env_location env_get_location(enum env_operation op, int prio) +{ + return arch_env_get_location(op, prio); +} /** * env_driver_lookup() - Finds the most suited environment location diff --git a/fs/ext4/Makefile b/fs/ext4/Makefile index c2544beee3a..6ae44a2d0a3 100644 --- a/fs/ext4/Makefile +++ b/fs/ext4/Makefile @@ -8,4 +8,4 @@ # obj-y := ext4fs.o ext4_common.o dev.o -obj-$(CONFIG_EXT4_WRITE) += ext4_write.o ext4_journal.o crc16.o +obj-$(CONFIG_EXT4_WRITE) += ext4_write.o ext4_journal.o diff --git a/fs/ext4/crc16.c b/fs/ext4/crc16.c deleted file mode 100644 index 3afb34daefa..00000000000 --- a/fs/ext4/crc16.c +++ /dev/null @@ -1,62 +0,0 @@ -/* - * crc16.c - * - * This source code is licensed under the GNU General Public License, - * Version 2. See the file COPYING for more details. - */ - -#include <common.h> -#include <asm/byteorder.h> -#include <linux/stat.h> -#include "crc16.h" - -/** CRC table for the CRC-16. The poly is 0x8005 (x16 + x15 + x2 + 1) */ -static __u16 const crc16_table[256] = { - 0x0000, 0xC0C1, 0xC181, 0x0140, 0xC301, 0x03C0, 0x0280, 0xC241, - 0xC601, 0x06C0, 0x0780, 0xC741, 0x0500, 0xC5C1, 0xC481, 0x0440, - 0xCC01, 0x0CC0, 0x0D80, 0xCD41, 0x0F00, 0xCFC1, 0xCE81, 0x0E40, - 0x0A00, 0xCAC1, 0xCB81, 0x0B40, 0xC901, 0x09C0, 0x0880, 0xC841, - 0xD801, 0x18C0, 0x1980, 0xD941, 0x1B00, 0xDBC1, 0xDA81, 0x1A40, - 0x1E00, 0xDEC1, 0xDF81, 0x1F40, 0xDD01, 0x1DC0, 0x1C80, 0xDC41, - 0x1400, 0xD4C1, 0xD581, 0x1540, 0xD701, 0x17C0, 0x1680, 0xD641, - 0xD201, 0x12C0, 0x1380, 0xD341, 0x1100, 0xD1C1, 0xD081, 0x1040, - 0xF001, 0x30C0, 0x3180, 0xF141, 0x3300, 0xF3C1, 0xF281, 0x3240, - 0x3600, 0xF6C1, 0xF781, 0x3740, 0xF501, 0x35C0, 0x3480, 0xF441, - 0x3C00, 0xFCC1, 0xFD81, 0x3D40, 0xFF01, 0x3FC0, 0x3E80, 0xFE41, - 0xFA01, 0x3AC0, 0x3B80, 0xFB41, 0x3900, 0xF9C1, 0xF881, 0x3840, - 0x2800, 0xE8C1, 0xE981, 0x2940, 0xEB01, 0x2BC0, 0x2A80, 0xEA41, - 0xEE01, 0x2EC0, 0x2F80, 0xEF41, 0x2D00, 0xEDC1, 0xEC81, 0x2C40, - 0xE401, 0x24C0, 0x2580, 0xE541, 0x2700, 0xE7C1, 0xE681, 0x2640, - 0x2200, 0xE2C1, 0xE381, 0x2340, 0xE101, 0x21C0, 0x2080, 0xE041, - 0xA001, 0x60C0, 0x6180, 0xA141, 0x6300, 0xA3C1, 0xA281, 0x6240, - 0x6600, 0xA6C1, 0xA781, 0x6740, 0xA501, 0x65C0, 0x6480, 0xA441, - 0x6C00, 0xACC1, 0xAD81, 0x6D40, 0xAF01, 0x6FC0, 0x6E80, 0xAE41, - 0xAA01, 0x6AC0, 0x6B80, 0xAB41, 0x6900, 0xA9C1, 0xA881, 0x6840, - 0x7800, 0xB8C1, 0xB981, 0x7940, 0xBB01, 0x7BC0, 0x7A80, 0xBA41, - 0xBE01, 0x7EC0, 0x7F80, 0xBF41, 0x7D00, 0xBDC1, 0xBC81, 0x7C40, - 0xB401, 0x74C0, 0x7580, 0xB541, 0x7700, 0xB7C1, 0xB681, 0x7640, - 0x7200, 0xB2C1, 0xB381, 0x7340, 0xB101, 0x71C0, 0x7080, 0xB041, - 0x5000, 0x90C1, 0x9181, 0x5140, 0x9301, 0x53C0, 0x5280, 0x9241, - 0x9601, 0x56C0, 0x5780, 0x9741, 0x5500, 0x95C1, 0x9481, 0x5440, - 0x9C01, 0x5CC0, 0x5D80, 0x9D41, 0x5F00, 0x9FC1, 0x9E81, 0x5E40, - 0x5A00, 0x9AC1, 0x9B81, 0x5B40, 0x9901, 0x59C0, 0x5880, 0x9841, - 0x8801, 0x48C0, 0x4980, 0x8941, 0x4B00, 0x8BC1, 0x8A81, 0x4A40, - 0x4E00, 0x8EC1, 0x8F81, 0x4F40, 0x8D01, 0x4DC0, 0x4C80, 0x8C41, - 0x4400, 0x84C1, 0x8581, 0x4540, 0x8701, 0x47C0, 0x4680, 0x8641, - 0x8201, 0x42C0, 0x4380, 0x8341, 0x4100, 0x81C1, 0x8081, 0x4040 -}; - -/** - * Compute the CRC-16 for the data buffer -*/ - -unsigned int ext2fs_crc16(unsigned int crc, - const void *buffer, unsigned int len) -{ - const unsigned char *cp = buffer; - - while (len--) - crc = (((crc >> 8) & 0xffU) ^ - crc16_table[(crc ^ *cp++) & 0xffU]) & 0x0000ffffU; - return crc; -} diff --git a/fs/ext4/crc16.h b/fs/ext4/crc16.h deleted file mode 100644 index 5fd113a56c0..00000000000 --- a/fs/ext4/crc16.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * crc16.h - CRC-16 routine - * Implements the standard CRC-16: - * Width 16 - * Poly 0x8005 (x16 + x15 + x2 + 1) - * Init 0 - * - * Copyright (c) 2005 Ben Gardner <bgardner@wabtec.com> - * This source code is licensed under the GNU General Public License, - * Version 2. See the file COPYING for more details. - */ -#ifndef __CRC16_H -#define __CRC16_H -extern unsigned int ext2fs_crc16(unsigned int crc, - const void *buffer, unsigned int len); -#endif diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c index c52cc400e1f..d49ba4a9954 100644 --- a/fs/ext4/ext4_common.c +++ b/fs/ext4/ext4_common.c @@ -427,14 +427,14 @@ uint16_t ext4fs_checksum_update(uint32_t i) if (le32_to_cpu(fs->sb->feature_ro_compat) & EXT4_FEATURE_RO_COMPAT_GDT_CSUM) { int offset = offsetof(struct ext2_block_group, bg_checksum); - crc = ext2fs_crc16(~0, fs->sb->unique_id, + crc = crc16(~0, (__u8 *)fs->sb->unique_id, sizeof(fs->sb->unique_id)); - crc = ext2fs_crc16(crc, &le32_i, sizeof(le32_i)); - crc = ext2fs_crc16(crc, desc, offset); + crc = crc16(crc, (__u8 *)&le32_i, sizeof(le32_i)); + crc = crc16(crc, (__u8 *)desc, offset); offset += sizeof(desc->bg_checksum); /* skip checksum */ assert(offset == sizeof(*desc)); if (offset < fs->gdsize) { - crc = ext2fs_crc16(crc, (__u8 *)desc + offset, + crc = crc16(crc, (__u8 *)desc + offset, fs->gdsize - offset); } } diff --git a/fs/ext4/ext4_common.h b/fs/ext4/ext4_common.h index beaee9c80bd..504c708b064 100644 --- a/fs/ext4/ext4_common.h +++ b/fs/ext4/ext4_common.h @@ -27,7 +27,7 @@ #include <linux/errno.h> #if defined(CONFIG_EXT4_WRITE) #include "ext4_journal.h" -#include "crc16.h" +#include <linux/crc16.h> #endif #define YES 1 @@ -309,7 +309,7 @@ static struct fstype_info fstypes[] = { }, #endif #endif -#if IS_ENABLED(CONFIG_FS_SQUASHFS) +#if CONFIG_IS_ENABLED(FS_SQUASHFS) { .fstype = FS_TYPE_SQUASHFS, .name = "squashfs", diff --git a/fs/ubifs/Makefile b/fs/ubifs/Makefile index 64d64472945..631ba5f438c 100644 --- a/fs/ubifs/Makefile +++ b/fs/ubifs/Makefile @@ -9,5 +9,5 @@ obj-y := ubifs.o io.o super.o sb.o master.o lpt.o obj-y += lpt_commit.o scan.o lprops.o -obj-y += tnc.o tnc_misc.o debug.o crc16.o budget.o +obj-y += tnc.o tnc_misc.o debug.o budget.o obj-y += log.o orphan.o recovery.o replay.o gc.o diff --git a/fs/ubifs/crc16.c b/fs/ubifs/crc16.c deleted file mode 100644 index 443ccf855d5..00000000000 --- a/fs/ubifs/crc16.c +++ /dev/null @@ -1,60 +0,0 @@ -/* - * crc16.c - * - * This source code is licensed under the GNU General Public License, - * Version 2. See the file COPYING for more details. - */ - -#include <linux/types.h> -#include "crc16.h" - -/** CRC table for the CRC-16. The poly is 0x8005 (x^16 + x^15 + x^2 + 1) */ -u16 const crc16_table[256] = { - 0x0000, 0xC0C1, 0xC181, 0x0140, 0xC301, 0x03C0, 0x0280, 0xC241, - 0xC601, 0x06C0, 0x0780, 0xC741, 0x0500, 0xC5C1, 0xC481, 0x0440, - 0xCC01, 0x0CC0, 0x0D80, 0xCD41, 0x0F00, 0xCFC1, 0xCE81, 0x0E40, - 0x0A00, 0xCAC1, 0xCB81, 0x0B40, 0xC901, 0x09C0, 0x0880, 0xC841, - 0xD801, 0x18C0, 0x1980, 0xD941, 0x1B00, 0xDBC1, 0xDA81, 0x1A40, - 0x1E00, 0xDEC1, 0xDF81, 0x1F40, 0xDD01, 0x1DC0, 0x1C80, 0xDC41, - 0x1400, 0xD4C1, 0xD581, 0x1540, 0xD701, 0x17C0, 0x1680, 0xD641, - 0xD201, 0x12C0, 0x1380, 0xD341, 0x1100, 0xD1C1, 0xD081, 0x1040, - 0xF001, 0x30C0, 0x3180, 0xF141, 0x3300, 0xF3C1, 0xF281, 0x3240, - 0x3600, 0xF6C1, 0xF781, 0x3740, 0xF501, 0x35C0, 0x3480, 0xF441, - 0x3C00, 0xFCC1, 0xFD81, 0x3D40, 0xFF01, 0x3FC0, 0x3E80, 0xFE41, - 0xFA01, 0x3AC0, 0x3B80, 0xFB41, 0x3900, 0xF9C1, 0xF881, 0x3840, - 0x2800, 0xE8C1, 0xE981, 0x2940, 0xEB01, 0x2BC0, 0x2A80, 0xEA41, - 0xEE01, 0x2EC0, 0x2F80, 0xEF41, 0x2D00, 0xEDC1, 0xEC81, 0x2C40, - 0xE401, 0x24C0, 0x2580, 0xE541, 0x2700, 0xE7C1, 0xE681, 0x2640, - 0x2200, 0xE2C1, 0xE381, 0x2340, 0xE101, 0x21C0, 0x2080, 0xE041, - 0xA001, 0x60C0, 0x6180, 0xA141, 0x6300, 0xA3C1, 0xA281, 0x6240, - 0x6600, 0xA6C1, 0xA781, 0x6740, 0xA501, 0x65C0, 0x6480, 0xA441, - 0x6C00, 0xACC1, 0xAD81, 0x6D40, 0xAF01, 0x6FC0, 0x6E80, 0xAE41, - 0xAA01, 0x6AC0, 0x6B80, 0xAB41, 0x6900, 0xA9C1, 0xA881, 0x6840, - 0x7800, 0xB8C1, 0xB981, 0x7940, 0xBB01, 0x7BC0, 0x7A80, 0xBA41, - 0xBE01, 0x7EC0, 0x7F80, 0xBF41, 0x7D00, 0xBDC1, 0xBC81, 0x7C40, - 0xB401, 0x74C0, 0x7580, 0xB541, 0x7700, 0xB7C1, 0xB681, 0x7640, - 0x7200, 0xB2C1, 0xB381, 0x7340, 0xB101, 0x71C0, 0x7080, 0xB041, - 0x5000, 0x90C1, 0x9181, 0x5140, 0x9301, 0x53C0, 0x5280, 0x9241, - 0x9601, 0x56C0, 0x5780, 0x9741, 0x5500, 0x95C1, 0x9481, 0x5440, - 0x9C01, 0x5CC0, 0x5D80, 0x9D41, 0x5F00, 0x9FC1, 0x9E81, 0x5E40, - 0x5A00, 0x9AC1, 0x9B81, 0x5B40, 0x9901, 0x59C0, 0x5880, 0x9841, - 0x8801, 0x48C0, 0x4980, 0x8941, 0x4B00, 0x8BC1, 0x8A81, 0x4A40, - 0x4E00, 0x8EC1, 0x8F81, 0x4F40, 0x8D01, 0x4DC0, 0x4C80, 0x8C41, - 0x4400, 0x84C1, 0x8581, 0x4540, 0x8701, 0x47C0, 0x4680, 0x8641, - 0x8201, 0x42C0, 0x4380, 0x8341, 0x4100, 0x81C1, 0x8081, 0x4040 -}; - -/** - * crc16 - compute the CRC-16 for the data buffer - * @crc: previous CRC value - * @buffer: data pointer - * @len: number of bytes in the buffer - * - * Returns the updated CRC value. - */ -u16 crc16(u16 crc, u8 const *buffer, size_t len) -{ - while (len--) - crc = crc16_byte(crc, *buffer++); - return crc; -} diff --git a/fs/ubifs/lpt.c b/fs/ubifs/lpt.c index 62748b0210b..27835e60d2c 100644 --- a/fs/ubifs/lpt.c +++ b/fs/ubifs/lpt.c @@ -42,7 +42,7 @@ #include <linux/compat.h> #include <linux/err.h> #include <ubi_uboot.h> -#include "crc16.h" +#include <linux/crc16.h> #endif /** diff --git a/fs/ubifs/lpt_commit.c b/fs/ubifs/lpt_commit.c index 897d0014306..ba0b19a1f2b 100644 --- a/fs/ubifs/lpt_commit.c +++ b/fs/ubifs/lpt_commit.c @@ -23,7 +23,7 @@ #include <linux/bitops.h> #include <linux/compat.h> #include <linux/err.h> -#include "crc16.h" +#include <linux/crc16.h> #endif #include "ubifs.h" diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index cbb7b91139d..fd5b209a52d 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -134,6 +134,10 @@ "setenv fdtfile am335x-boneblue.dtb; fi; " \ "if test $board_name = BBEN; then " \ "setenv fdtfile am335x-sancloud-bbe.dtb; fi; " \ + "if test $board_name = BBELITE; then " \ + "setenv fdtfile am335x-sancloud-bbe-lite.dtb; fi; " \ + "if test $board_name = BBE_EX_WIFI; then " \ + "setenv fdtfile am335x-sancloud-bbe-extended-wifi.dtb; fi; " \ "if test $board_name = A33515BB; then " \ "setenv fdtfile am335x-evm.dtb; fi; " \ "if test $board_name = A335X_SK; then " \ diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index a9e0dee3f56..c8422264b75 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -80,7 +80,4 @@ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) -/* Generic Timer Definitions */ -#define COUNTER_FREQUENCY 8000000 /* 8MHz */ - #endif /* __APALIS_IMX8_H */ diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index 08534cd1a30..364bd50b591 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -122,9 +122,6 @@ #define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -/* Generic Timer Definitions */ -#define COUNTER_FREQUENCY 8000000 /* 8MHz */ - #define BOOTAUX_RESERVED_MEM_BASE 0x88000000 #define BOOTAUX_RESERVED_MEM_SIZE SZ_128M /* Reserve from second 128MB */ diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h index 4b4694ec071..6da0483ef09 100644 --- a/include/configs/cgtqmx8.h +++ b/include/configs/cgtqmx8.h @@ -130,9 +130,6 @@ #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */ #define PHYS_SDRAM_2_SIZE 0x100000000 /* 4 GB */ -/* Generic Timer Definitions */ -#define COUNTER_FREQUENCY 8000000 /* 8MHz */ - /* Networking */ #define CONFIG_FEC_MXC_PHYADDR -1 #define FEC_QUIRK_ENET_MAC diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h index ae5a8ff6a93..3ed89c2776c 100644 --- a/include/configs/colibri-imx8x.h +++ b/include/configs/colibri-imx8x.h @@ -114,7 +114,6 @@ sizeof(CONFIG_SYS_PROMPT) + 16) /* Generic Timer Definitions */ -#define COUNTER_FREQUENCY 8000000 /* 8MHz */ #define BOOTAUX_RESERVED_MEM_BASE 0x88000000 #define BOOTAUX_RESERVED_MEM_SIZE SZ_128M /* Reserve from second 128MB */ diff --git a/include/configs/condor.h b/include/configs/condor.h index 213e68f1587..819184996e6 100644 --- a/include/configs/condor.h +++ b/include/configs/condor.h @@ -24,7 +24,4 @@ /* Board Clock */ /* XTAL_CLK : 33.33MHz */ -/* Generic Timer Definitions (use in assembler source) */ -#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ - #endif /* __CONDOR_H */ diff --git a/include/configs/draak.h b/include/configs/draak.h index 5bd8740c6f8..476b4c3710a 100644 --- a/include/configs/draak.h +++ b/include/configs/draak.h @@ -11,9 +11,6 @@ #include "rcar-gen3-common.h" -/* Generic Timer Definitions (use in assembler source) */ -#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_FLASH_SHOW_PROGRESS 45 diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h index 43a179f013b..14ba52a2eb3 100644 --- a/include/configs/dragonboard410c.h +++ b/include/configs/dragonboard410c.h @@ -23,9 +23,6 @@ /* UART */ -/* Generic Timer Definitions */ -#define COUNTER_FREQUENCY 19000000 - /* Fixup - in init code we switch from device to host mode, * it has to be done after each HCD reset */ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET diff --git a/include/configs/dragonboard820c.h b/include/configs/dragonboard820c.h index 229e1a323b6..1e2b15b33f9 100644 --- a/include/configs/dragonboard820c.h +++ b/include/configs/dragonboard820c.h @@ -23,9 +23,6 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) #define CONFIG_SYS_BOOTM_LEN SZ_64M -/* Generic Timer Definitions */ -#define COUNTER_FREQUENCY 19000000 - #ifndef CONFIG_SPL_BUILD #include <config_distro_bootcmd.h> #endif diff --git a/include/configs/eagle.h b/include/configs/eagle.h index 42fe0577167..c751f75a7d0 100644 --- a/include/configs/eagle.h +++ b/include/configs/eagle.h @@ -16,7 +16,4 @@ /* Board Clock */ /* XTAL_CLK : 33.33MHz */ -/* Generic Timer Definitions (use in assembler source) */ -#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ - #endif /* __EAGLE_H */ diff --git a/include/configs/ebisu.h b/include/configs/ebisu.h index ce31a462fcf..3adc4180efd 100644 --- a/include/configs/ebisu.h +++ b/include/configs/ebisu.h @@ -13,9 +13,6 @@ #include "rcar-gen3-common.h" -/* Generic Timer Definitions (use in assembler source) */ -#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_FLASH_SHOW_PROGRESS 45 diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h index eb2606905f8..dd1cbd7ab84 100644 --- a/include/configs/exynos-common.h +++ b/include/configs/exynos-common.h @@ -19,7 +19,6 @@ /* Keep L2 Cache Disabled */ /* input clock of PLL: 24MHz input clock */ -#define COUNTER_FREQUENCY 24000000 /* select serial console configuration */ diff --git a/include/configs/exynos7420-common.h b/include/configs/exynos7420-common.h index fcb238fb3e3..5658da474cb 100644 --- a/include/configs/exynos7420-common.h +++ b/include/configs/exynos7420-common.h @@ -24,9 +24,6 @@ /* select serial console configuration */ -/* Timer input clock frequency */ -#define COUNTER_FREQUENCY 24000000 - /* IRAM Layout */ #define CONFIG_IRAM_BASE 0x02100000 #define CONFIG_IRAM_SIZE 0x58000 diff --git a/include/configs/exynos78x0-common.h b/include/configs/exynos78x0-common.h index 457057ce71f..ec43e133dde 100644 --- a/include/configs/exynos78x0-common.h +++ b/include/configs/exynos78x0-common.h @@ -25,9 +25,6 @@ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -/* Timer input clock frequency */ -#define COUNTER_FREQUENCY 26000000 - #define CPU_RELEASE_ADDR secondary_boot_addr #define CONFIG_SYS_BAUDRATE_TABLE \ diff --git a/include/configs/falcon.h b/include/configs/falcon.h index 52dcf19ccad..446261cedc7 100644 --- a/include/configs/falcon.h +++ b/include/configs/falcon.h @@ -24,7 +24,4 @@ /* Board Clock */ /* XTAL_CLK : 16.66MHz */ -/* Generic Timer Definitions (use in assembler source) */ -#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ - #endif /* __FALCON_H */ diff --git a/include/configs/hihope-rzg2.h b/include/configs/hihope-rzg2.h index e46eb07a5e9..54702985b95 100644 --- a/include/configs/hihope-rzg2.h +++ b/include/configs/hihope-rzg2.h @@ -11,7 +11,4 @@ #include "rcar-gen3-common.h" -/* Generic Timer Definitions (use in assembler source) */ -#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ - #endif /* __HIHOPE_RZG2_H */ diff --git a/include/configs/hikey.h b/include/configs/hikey.h index 29a0d943864..19d5b6261f1 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -32,9 +32,6 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) -/* Generic Timer Definitions */ -#define COUNTER_FREQUENCY 19000000 - /* Generic Interrupt Controller Definitions */ #define GICD_BASE 0xf6801000 #define GICC_BASE 0xf6802000 diff --git a/include/configs/hikey960.h b/include/configs/hikey960.h index f446ecb8647..c088f2f2b69 100644 --- a/include/configs/hikey960.h +++ b/include/configs/hikey960.h @@ -24,9 +24,6 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) -/* Generic Timer Definitions */ -#define COUNTER_FREQUENCY 19000000 - /* Generic Interrupt Controller Definitions */ #define GICD_BASE 0xe82b1000 #define GICC_BASE 0xe82b2000 diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index 9452ba56152..61d56e269ac 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -124,7 +124,4 @@ #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */ #define PHYS_SDRAM_2_SIZE 0x100000000 /* 4 GB */ -/* Generic Timer Definitions */ -#define COUNTER_FREQUENCY 8000000 /* 8MHz */ - #endif /* __IMX8QM_MEK_H */ diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h index 04a2216fcd8..81ab5d8caa5 100644 --- a/include/configs/imx8qm_rom7720.h +++ b/include/configs/imx8qm_rom7720.h @@ -123,8 +123,5 @@ /* LPDDR4 board total DDR is 6GB, DDR4 board total DDR is 4 GB */ #define PHYS_SDRAM_2_SIZE 0x80000000 /* 2 GB */ -/* Generic Timer Definitions */ -#define COUNTER_FREQUENCY 8000000 /* 8MHz */ - #include <linux/stringify.h> #endif /* __IMX8QM_ROM7720_H */ diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index c290c19c347..26dc4ded030 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -123,9 +123,6 @@ /* LPDDR4 board total DDR is 3GB */ #define PHYS_SDRAM_2_SIZE 0x40000000 /* 1 GB */ -/* Generic Timer Definitions */ -#define COUNTER_FREQUENCY 8000000 /* 8MHz */ - #ifndef CONFIG_DM_PCA953X #define CONFIG_PCA953X #endif diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h index 46cba330b23..05df43b39b4 100644 --- a/include/configs/imx8ulp_evk.h +++ b/include/configs/imx8ulp_evk.h @@ -27,8 +27,6 @@ #endif -#define COUNTER_FREQUENCY 1000000 /* 1MHz */ - /* ENET Config */ #if defined(CONFIG_FEC_MXC) #define PHY_ANEG_TIMEOUT 20000 diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 0494790c84f..dca5589a3ef 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -176,7 +176,6 @@ #define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_SMP_PEN_ADDR 0x01ee0200 -#define COUNTER_FREQUENCY 8333333 #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 256 diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index c3ab049535a..c47b5940fb2 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -32,7 +32,6 @@ #define CPU_RELEASE_ADDR secondary_boot_addr /* generic timer */ -#define COUNTER_FREQUENCY 25000000 /* early heap for SPL DM */ #define CONFIG_MALLOC_F_ADDR CONFIG_SYS_FSL_OCRAM_BASE diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index f92ff17eeb8..67da01f5e3a 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -21,9 +21,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL -/* Generic Timer Definitions */ -#define COUNTER_FREQUENCY 25000000 /* 25MHz */ - /* CSU */ #define CONFIG_LAYERSCAPE_NS_ACCESS diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 97460818315..82ae3492a2f 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -119,7 +119,6 @@ #define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_SMP_PEN_ADDR 0x01ee0200 -#define COUNTER_FREQUENCY 12500000 #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 256 diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 010f3a16367..7b79e0841a5 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -334,7 +334,6 @@ #define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_SMP_PEN_ADDR 0x01ee0200 -#define COUNTER_FREQUENCY 12500000 #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 256 diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index bc2a265c409..546c4fcdb95 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -99,7 +99,6 @@ #endif #define CONFIG_LAYERSCAPE_NS_ACCESS -#define COUNTER_FREQUENCY 12500000 #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 256 diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 6b1ab875399..b4383d4bbdb 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -192,7 +192,6 @@ #define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_SMP_PEN_ADDR 0x01ee0200 -#define COUNTER_FREQUENCY 12500000 #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 256 diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index 7bb6d416ea3..a98d8dd7200 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -25,9 +25,6 @@ */ #define CPU_RELEASE_ADDR secondary_boot_addr -/* Generic Timer Definitions */ -#define COUNTER_FREQUENCY 25000000 /* 25MHz */ - /* GPIO */ /* I2C */ diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 83b95c242f0..61c6d456764 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -44,9 +44,6 @@ #define CPU_RELEASE_ADDR secondary_boot_addr -/* Generic Timer Definitions */ -#define COUNTER_FREQUENCY 25000000 /* 25MHz */ - /* Serial Port */ #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 7552610e035..f9279e4ab46 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -44,9 +44,6 @@ #define CPU_RELEASE_ADDR secondary_boot_addr -/* Generic Timer Definitions */ -#define COUNTER_FREQUENCY 25000000 /* 25MHz */ - /* Serial Port */ #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index 1ea6befa9b9..e532c343f48 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -13,7 +13,6 @@ #endif #define COUNTER_FREQUENCY_REAL (get_board_sys_clk()/4) -#define COUNTER_FREQUENCY 25000000 /* 25MHz */ #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS 0x51 diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index 1a9cda1e7da..693a2f64b6c 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -14,7 +14,6 @@ #endif #define COUNTER_FREQUENCY_REAL 25000000 /* 25MHz */ -#define COUNTER_FREQUENCY 25000000 /* 25MHz */ #ifdef CONFIG_EMU #define CONFIG_SYS_FSL_DDR_EMU diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 82585f5dbfa..e77e9b7f376 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -41,12 +41,10 @@ #define CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS -/* Generic Timer Definitions */ /* * This is not an accurate number. It is used in start.S. The frequency * will be udpated later when get_bus_freq(0) is available. */ -#define COUNTER_FREQUENCY 25000000 /* 25MHz */ /* GPIO */ diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index 96dfe49a7e5..d5690148195 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -46,7 +46,6 @@ * will be udpated later when get_bus_freq(0) is available. */ -#define COUNTER_FREQUENCY 25000000 /* 25MHz */ /* Serial Port */ #define CONFIG_PL011_CLOCK (get_bus_freq(0) / 4) diff --git a/include/configs/mt8183.h b/include/configs/mt8183.h index 2b4e976aa1f..ee31c02e6ef 100644 --- a/include/configs/mt8183.h +++ b/include/configs/mt8183.h @@ -11,7 +11,6 @@ #include <linux/sizes.h> -#define COUNTER_FREQUENCY 13000000 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE -4 diff --git a/include/configs/mt8512.h b/include/configs/mt8512.h index 9c443db9f52..1af8d2e480c 100644 --- a/include/configs/mt8512.h +++ b/include/configs/mt8512.h @@ -13,7 +13,6 @@ #define CONFIG_SYS_NONCACHED_MEMORY SZ_1M -#define COUNTER_FREQUENCY 13000000 #define CONFIG_SYS_BOOTM_LEN SZ_64M diff --git a/include/configs/mt8516.h b/include/configs/mt8516.h index 47132c1db1d..cb2af5843fc 100644 --- a/include/configs/mt8516.h +++ b/include/configs/mt8516.h @@ -11,7 +11,6 @@ #include <linux/sizes.h> -#define COUNTER_FREQUENCY 13000000 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE -4 diff --git a/include/configs/mt8518.h b/include/configs/mt8518.h index 49ee926b0c9..8ca8d25148a 100644 --- a/include/configs/mt8518.h +++ b/include/configs/mt8518.h @@ -13,7 +13,6 @@ #define CONFIG_SYS_NONCACHED_MEMORY SZ_1M -#define COUNTER_FREQUENCY 13000000 /* DRAM definition */ #define CONFIG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index a0e481703bc..10e46c628d5 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -10,7 +10,6 @@ #if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)) #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */ -#define COUNTER_FREQUENCY CONFIG_SC_TIMER_CLK #else #ifndef CONFIG_SYS_L2CACHE_OFF #define CONFIG_SYS_L2_PL310 diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index 76c374af253..9f7d60f8fbd 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -16,7 +16,6 @@ /* Timer settings */ #define CONFIG_MXC_GPT_HCLK #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */ -#define COUNTER_FREQUENCY CONFIG_SC_TIMER_CLK #define CONFIG_SYS_BOOTM_LEN 0x1000000 diff --git a/include/configs/owl-common.h b/include/configs/owl-common.h index 96453214eeb..fabbb01e0c8 100644 --- a/include/configs/owl-common.h +++ b/include/configs/owl-common.h @@ -13,9 +13,6 @@ /* SDRAM Definitions */ #define CONFIG_SYS_SDRAM_BASE 0x0 -/* Generic Timer Definitions */ -#define COUNTER_FREQUENCY (24000000) /* 24MHz */ - /* Some commands use this as the default load address */ /* diff --git a/include/configs/p2371-2180.h b/include/configs/p2371-2180.h index ef1fa2a5926..7f942888e74 100644 --- a/include/configs/p2371-2180.h +++ b/include/configs/p2371-2180.h @@ -24,7 +24,4 @@ #include "tegra-common-post.h" -/* Crystal is 38.4MHz. clk_m runs at half that rate */ -#define COUNTER_FREQUENCY 19200000 - #endif /* _P2371_2180_H */ diff --git a/include/configs/p2771-0000.h b/include/configs/p2771-0000.h index 4c3da224c66..84cdd571962 100644 --- a/include/configs/p2771-0000.h +++ b/include/configs/p2771-0000.h @@ -37,7 +37,4 @@ #include "tegra-common-post.h" -/* Crystal is 38.4MHz. clk_m runs at half that rate */ -#define COUNTER_FREQUENCY 19200000 - #endif diff --git a/include/configs/p3450-0000.h b/include/configs/p3450-0000.h index 1c962be8b8e..ec1a8634e71 100644 --- a/include/configs/p3450-0000.h +++ b/include/configs/p3450-0000.h @@ -35,7 +35,4 @@ /* General networking support */ #include "tegra-common-post.h" -/* Crystal is 38.4MHz. clk_m runs at half that rate */ -#define COUNTER_FREQUENCY 19200000 - #endif /* _P3450_0000_H */ diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h index 3295d43ed67..1d526a73802 100644 --- a/include/configs/presidio_asic.h +++ b/include/configs/presidio_asic.h @@ -12,8 +12,7 @@ #define CONFIG_SYS_BOOTM_LEN 0x00c00000 /* Generic Timer Definitions */ -#define COUNTER_FREQUENCY 25000000 -#define CONFIG_SYS_TIMER_RATE COUNTER_FREQUENCY +#define CONFIG_SYS_TIMER_RATE 25000000 #define CONFIG_SYS_TIMER_COUNTER 0xf4321008 /* note: arch/arm/cpu/armv8/start.S which references GICD_BASE/GICC_BASE diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h index dc609013f32..a7f5e911655 100644 --- a/include/configs/px30_common.h +++ b/include/configs/px30_common.h @@ -12,8 +12,6 @@ #define CONFIG_SYS_NS16550_MEM32 -#define COUNTER_FREQUENCY 24000000 - /* FIXME: ff020000 is pmu_mem (10k), while ff0e0000 is regular int_mem */ #define CONFIG_IRAM_BASE 0xff020000 diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index 5905518edf1..ab2b492d03f 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -10,7 +10,6 @@ #define CONFIG_SYS_CBSIZE 1024 -#define COUNTER_FREQUENCY 24000000 #define CONFIG_SYS_HZ_CLOCK 24000000 #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h index d77a7d7b098..8f04e9de5a3 100644 --- a/include/configs/rk3128_common.h +++ b/include/configs/rk3128_common.h @@ -11,7 +11,6 @@ #define CONFIG_SYS_MAXARGS 16 #define CONFIG_SYS_CBSIZE 1024 -#define COUNTER_FREQUENCY 24000000 #define CONFIG_SYS_HZ_CLOCK 24000000 #define CONFIG_IRAM_BASE 0x10080000 diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index 3258820fcdc..36191ee9c12 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -11,7 +11,6 @@ #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ -#define COUNTER_FREQUENCY 24000000 #define CONFIG_SYS_HZ_CLOCK 24000000 #define CONFIG_SYS_INIT_SP_ADDR 0x61100000 diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index e2e0f70a70c..075623f342a 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -13,7 +13,6 @@ #define CONFIG_SYS_CBSIZE 1024 -#define COUNTER_FREQUENCY 24000000 #define CONFIG_SYS_HZ_CLOCK 24000000 #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h index 9cda8d9c48b..44a3e7adf20 100644 --- a/include/configs/rk3308_common.h +++ b/include/configs/rk3308_common.h @@ -20,7 +20,6 @@ #define CONFIG_SPL_STACK 0x00400000 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ -#define COUNTER_FREQUENCY 24000000 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index 8a5f0c8999f..2b8d77c47ed 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -10,8 +10,6 @@ #define CONFIG_IRAM_BASE 0xff090000 -#define COUNTER_FREQUENCY 24000000 - #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_INIT_SP_ADDR 0x00300000 diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index 239296c1d22..2f71ce72df8 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -15,8 +15,6 @@ #define SDRAM_MAX_SIZE 0xff000000 #define CONFIG_SYS_CBSIZE 1024 -#define COUNTER_FREQUENCY 24000000 - #define CONFIG_IRAM_BASE 0xff8c0000 #define CONFIG_SYS_INIT_SP_ADDR 0x00300000 diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 4037dba58cc..8e137376661 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -10,8 +10,6 @@ #define CONFIG_SYS_CBSIZE 1024 -#define COUNTER_FREQUENCY 24000000 - #define CONFIG_IRAM_BASE 0xff8c0000 #define CONFIG_SYS_INIT_SP_ADDR 0x00300000 diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h index 5649cd64e0e..e9947ea4923 100644 --- a/include/configs/rk3568_common.h +++ b/include/configs/rk3568_common.h @@ -10,8 +10,6 @@ #define CONFIG_SYS_CBSIZE 1024 -#define COUNTER_FREQUENCY 24000000 - #define CONFIG_IRAM_BASE 0xfdcc0000 #define CONFIG_SYS_INIT_SP_ADDR 0x00c00000 diff --git a/include/configs/salvator-x.h b/include/configs/salvator-x.h index 764bc1bbf29..eb00e2b004b 100644 --- a/include/configs/salvator-x.h +++ b/include/configs/salvator-x.h @@ -11,9 +11,6 @@ #include "rcar-gen3-common.h" -/* Generic Timer Definitions (use in assembler source) */ -#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_FLASH_SHOW_PROGRESS 45 diff --git a/include/configs/sdm845.h b/include/configs/sdm845.h index ba57323c74b..835f05d63e2 100644 --- a/include/configs/sdm845.h +++ b/include/configs/sdm845.h @@ -13,9 +13,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 230400, 460800, 921600 } -/* Generic Timer Definitions */ -#define COUNTER_FREQUENCY 19000000 - #define CONFIG_EXTRA_ENV_SETTINGS \ "bootm_size=0x4000000\0" \ "bootm_low=0x80000000\0" \ diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h index 0cc58c3a7d9..58345e4e1be 100644 --- a/include/configs/sheevaplug.h +++ b/include/configs/sheevaplug.h @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* + * (C) Copyright 2022 Tony Dinh <mibodhi@gmail.com> * (C) Copyright 2009-2014 * Gerald Kerma <dreagle@doukki.net> * Marvell Semiconductor <www.marvell.com> @@ -14,17 +15,8 @@ /* * Environment variables configurations */ -/* - * max 4k env size is enough, but in case of nand - * it has to be rounded to sector size - */ - -/* - * Default environment variables - */ - #define CONFIG_EXTRA_ENV_SETTINGS "x_bootargs=console" \ - "=ttyS0,115200 mtdparts="CONFIG_MTDPARTS_DEFAULT \ + "=ttyS0,115200 mtdparts=" CONFIG_MTDPARTS_DEFAULT \ "x_bootcmd_kernel=nand read 0x6400000 0x100000 0x400000\0" \ "x_bootcmd_usb=usb start\0" \ "x_bootargs_root=root=/dev/mtdblock3 rw rootfstype=jffs2\0" @@ -32,16 +24,13 @@ /* * Ethernet Driver configuration */ -#ifdef CONFIG_CMD_NET #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 0 -#endif /* CONFIG_CMD_NET */ /* - * SATA driver configuration + * Support large disk for SATA and USB */ -#ifdef CONFIG_SATA +#define CONFIG_SYS_64BIT_LBA #define CONFIG_LBA48 -#endif /* CONFIG_SATA */ #endif /* _CONFIG_SHEEVAPLUG_H */ diff --git a/include/configs/silinux-ek874.h b/include/configs/silinux-ek874.h index a99babb48b0..346858c456c 100644 --- a/include/configs/silinux-ek874.h +++ b/include/configs/silinux-ek874.h @@ -11,7 +11,4 @@ #include "rcar-gen3-common.h" -/* Generic Timer Definitions (use in assembler source) */ -#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ - #endif /* __SILINUX_EK874_H */ diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index c288d548f5b..3447b8f17c2 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -109,11 +109,6 @@ #define CONFIG_SYS_NS16550_MEM32 /* - * Timer & watchdog configurations - */ -#define COUNTER_FREQUENCY 400000000 - -/* * SDMMC configurations */ #ifdef CONFIG_CMD_MMC diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index a9031035d74..068340aa964 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -38,7 +38,6 @@ #endif /* CPU */ -#define COUNTER_FREQUENCY 24000000 /* * The DRAM Base differs between some models. We cannot use macros for the diff --git a/include/configs/ten64.h b/include/configs/ten64.h index f82b1e0d212..04772c9e4ef 100644 --- a/include/configs/ten64.h +++ b/include/configs/ten64.h @@ -9,7 +9,6 @@ #include "ls1088a_common.h" -#define COUNTER_FREQUENCY 25000000 /* 25MHz */ #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h index d07a8fe86bc..3537ba30e1f 100644 --- a/include/configs/thunderx_88xx.h +++ b/include/configs/thunderx_88xx.h @@ -20,9 +20,6 @@ /* SMP Spin Table Definitions */ #define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) -/* Generic Timer Definitions */ -#define COUNTER_FREQUENCY (0x1800000) /* 24MHz */ - /* PL011 Serial Configuration */ #define CONFIG_PL011_CLOCK 24000000 diff --git a/include/configs/ulcb.h b/include/configs/ulcb.h index c991bff0e88..14ea40bee3e 100644 --- a/include/configs/ulcb.h +++ b/include/configs/ulcb.h @@ -11,9 +11,6 @@ #include "rcar-gen3-common.h" -/* Generic Timer Definitions (use in assembler source) */ -#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ - /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_FLASH_SHOW_PROGRESS 45 diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index 4f0ff239e68..0632b367cad 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -73,9 +73,6 @@ #define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4) #define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8) -/* Generic Timer Definitions */ -#define COUNTER_FREQUENCY 24000000 /* 24MHz */ - /* Generic Interrupt Controller Definitions */ #ifdef CONFIG_GICV3 #define GICD_BASE (V2M_PA_BASE + 0x2f000000) diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h index b025d2638d8..b78c2429489 100644 --- a/include/configs/xilinx_versal.h +++ b/include/configs/xilinx_versal.h @@ -16,11 +16,6 @@ #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE -/* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */ -#if CONFIG_COUNTER_FREQUENCY -# define COUNTER_FREQUENCY CONFIG_COUNTER_FREQUENCY -#endif - /* Serial setup */ #define CONFIG_SYS_BAUDRATE_TABLE \ { 4800, 9600, 19200, 38400, 57600, 115200 } diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index e5e700d8045..8eb44b18d20 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -16,11 +16,6 @@ #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE -/* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */ -#if !defined(COUNTER_FREQUENCY) -# define COUNTER_FREQUENCY 100000000 -#endif - /* Serial setup */ #define CONFIG_SYS_BAUDRATE_TABLE \ { 4800, 9600, 19200, 38400, 57600, 115200 } diff --git a/include/env_internal.h b/include/env_internal.h index b704c033631..f30fd6159d8 100644 --- a/include/env_internal.h +++ b/include/env_internal.h @@ -235,9 +235,25 @@ const char *env_ext4_get_intf(void); const char *env_ext4_get_dev_part(void); /** + * arch_env_get_location()- Provide the best location for the U-Boot environment + * + * It is a weak function allowing board to overidde the environment location + * on architecture level. This has lower priority than env_get_location(), + * which can be defined on board level. + * + * @op: operations performed on the environment + * @prio: priority between the multiple environments, 0 being the + * highest priority + * Return: an enum env_location value on success, or -ve error code. + */ +enum env_location arch_env_get_location(enum env_operation op, int prio); + +/** * env_get_location()- Provide the best location for the U-Boot environment * * It is a weak function allowing board to overidde the environment location + * on board level. This has higher priority than arch_env_get_location(), + * which can be defined on architecture level. * * @op: operations performed on the environment * @prio: priority between the multiple environments, 0 being the diff --git a/fs/ubifs/crc16.h b/include/linux/crc16.h index 052fd3311a9..052fd3311a9 100644 --- a/fs/ubifs/crc16.h +++ b/include/linux/crc16.h diff --git a/include/u-boot/crc.h b/include/u-boot/crc.h index 52ec6a9e2d4..5174bd7ac41 100644 --- a/include/u-boot/crc.h +++ b/include/u-boot/crc.h @@ -25,7 +25,10 @@ */ unsigned int crc8(unsigned int crc_start, const unsigned char *vptr, int len); -/* lib/crc16.c - 16 bit CRC with polynomial x^16+x^12+x^5+1 (CRC-CCITT) */ +/* lib/crc16.c - 16 bit CRC with polynomial x^16 + x^15 + x^2 + 1 */ +uint16_t crc16(uint16_t crc, const unsigned char *buffer, size_t len); + +/* lib/crc16-ccitt.c - 16 bit CRC with polynomial x^16+x^12+x^5+1 (CRC-CCITT) */ uint16_t crc16_ccitt(uint16_t crc_start, const unsigned char *s, int len); /** * crc16_ccitt_wd_buf - Perform CRC16-CCIT on an input buffer and return the diff --git a/lib/Makefile b/lib/Makefile index 13fe5fb7a43..d9b1811f750 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -36,6 +36,7 @@ endif obj-y += crc8.o obj-y += crc16.o +obj-y += crc16-ccitt.o obj-$(CONFIG_ERRNO_STR) += errno_str.o obj-$(CONFIG_FIT) += fdtdec_common.o obj-$(CONFIG_TEST_FDTDEC) += fdtdec_test.o @@ -91,9 +92,9 @@ obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += libfdt/ obj-$(CONFIG_$(SPL_TPL_)OF_REAL) += fdtdec_common.o fdtdec.o ifdef CONFIG_SPL_BUILD -obj-$(CONFIG_SPL_YMODEM_SUPPORT) += crc16.o -obj-$(CONFIG_$(SPL_TPL_)HASH) += crc16.o -obj-$(CONFIG_MMC_SPI_CRC_ON) += crc16.o +obj-$(CONFIG_SPL_YMODEM_SUPPORT) += crc16-ccitt.o +obj-$(CONFIG_$(SPL_TPL_)HASH) += crc16-ccitt.o +obj-$(CONFIG_MMC_SPI_CRC_ON) += crc16-ccitt.o obj-y += net_utils.o endif obj-$(CONFIG_ADDR_MAP) += addr_map.o diff --git a/lib/crc16-ccitt.c b/lib/crc16-ccitt.c new file mode 100644 index 00000000000..6cadbc103d3 --- /dev/null +++ b/lib/crc16-ccitt.c @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: eCos-2.0 +/* + *========================================================================== + * + * crc16-ccitt.c + * + * 16 bit CRC with polynomial x^16+x^12+x^5+1 + * + *========================================================================== + *#####DESCRIPTIONBEGIN#### + * + * Author(s): gthomas + * Contributors: gthomas,asl + * Date: 2001-01-31 + * Purpose: + * Description: + * + * This code is part of eCos (tm). + * + *####DESCRIPTIONEND#### + * + *========================================================================== + */ + +#ifdef USE_HOSTCC +#include <arpa/inet.h> +#else +#include <common.h> +#endif +#include <u-boot/crc.h> + +/* Table of CRC constants - implements x^16+x^12+x^5+1 */ +static const uint16_t crc16_tab[] = { + 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7, + 0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef, + 0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6, + 0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de, + 0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485, + 0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d, + 0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4, + 0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc, + 0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823, + 0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b, + 0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12, + 0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a, + 0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41, + 0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49, + 0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70, + 0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78, + 0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f, + 0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067, + 0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e, + 0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256, + 0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d, + 0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405, + 0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c, + 0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634, + 0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab, + 0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3, + 0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a, + 0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92, + 0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9, + 0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1, + 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8, + 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0, +}; + +uint16_t crc16_ccitt(uint16_t cksum, const unsigned char *buf, int len) +{ + for (int i = 0; i < len; i++) + cksum = crc16_tab[((cksum>>8) ^ *buf++) & 0xff] ^ (cksum << 8); + + return cksum; +} + +void crc16_ccitt_wd_buf(const uint8_t *in, uint len, + uint8_t *out, uint chunk_sz) +{ + uint16_t crc; + + crc = crc16_ccitt(0, in, len); + crc = htons(crc); + memcpy(out, &crc, sizeof(crc)); +} diff --git a/lib/crc16.c b/lib/crc16.c index f46ba727c9a..7cf33fc7eb6 100644 --- a/lib/crc16.c +++ b/lib/crc16.c @@ -1,84 +1,60 @@ -// SPDX-License-Identifier: eCos-2.0 /* - *========================================================================== - * * crc16.c * - * 16 bit CRC with polynomial x^16+x^12+x^5+1 - * - *========================================================================== - *#####DESCRIPTIONBEGIN#### - * - * Author(s): gthomas - * Contributors: gthomas,asl - * Date: 2001-01-31 - * Purpose: - * Description: - * - * This code is part of eCos (tm). - * - *####DESCRIPTIONEND#### - * - *========================================================================== + * This source code is licensed under the GNU General Public License, + * Version 2. See the file COPYING for more details. */ -#ifdef USE_HOSTCC -#include <arpa/inet.h> -#else -#include <common.h> -#endif -#include <u-boot/crc.h> +#include <linux/types.h> +#include <linux/crc16.h> -/* Table of CRC constants - implements x^16+x^12+x^5+1 */ -static const uint16_t crc16_tab[] = { - 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7, - 0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef, - 0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6, - 0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de, - 0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485, - 0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d, - 0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4, - 0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc, - 0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823, - 0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b, - 0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12, - 0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a, - 0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41, - 0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49, - 0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70, - 0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78, - 0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f, - 0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067, - 0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e, - 0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256, - 0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d, - 0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405, - 0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c, - 0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634, - 0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab, - 0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3, - 0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a, - 0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92, - 0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9, - 0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1, - 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8, - 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0, +/** CRC table for the CRC-16. The poly is 0x8005 (x^16 + x^15 + x^2 + 1) */ +u16 const crc16_table[256] = { + 0x0000, 0xC0C1, 0xC181, 0x0140, 0xC301, 0x03C0, 0x0280, 0xC241, + 0xC601, 0x06C0, 0x0780, 0xC741, 0x0500, 0xC5C1, 0xC481, 0x0440, + 0xCC01, 0x0CC0, 0x0D80, 0xCD41, 0x0F00, 0xCFC1, 0xCE81, 0x0E40, + 0x0A00, 0xCAC1, 0xCB81, 0x0B40, 0xC901, 0x09C0, 0x0880, 0xC841, + 0xD801, 0x18C0, 0x1980, 0xD941, 0x1B00, 0xDBC1, 0xDA81, 0x1A40, + 0x1E00, 0xDEC1, 0xDF81, 0x1F40, 0xDD01, 0x1DC0, 0x1C80, 0xDC41, + 0x1400, 0xD4C1, 0xD581, 0x1540, 0xD701, 0x17C0, 0x1680, 0xD641, + 0xD201, 0x12C0, 0x1380, 0xD341, 0x1100, 0xD1C1, 0xD081, 0x1040, + 0xF001, 0x30C0, 0x3180, 0xF141, 0x3300, 0xF3C1, 0xF281, 0x3240, + 0x3600, 0xF6C1, 0xF781, 0x3740, 0xF501, 0x35C0, 0x3480, 0xF441, + 0x3C00, 0xFCC1, 0xFD81, 0x3D40, 0xFF01, 0x3FC0, 0x3E80, 0xFE41, + 0xFA01, 0x3AC0, 0x3B80, 0xFB41, 0x3900, 0xF9C1, 0xF881, 0x3840, + 0x2800, 0xE8C1, 0xE981, 0x2940, 0xEB01, 0x2BC0, 0x2A80, 0xEA41, + 0xEE01, 0x2EC0, 0x2F80, 0xEF41, 0x2D00, 0xEDC1, 0xEC81, 0x2C40, + 0xE401, 0x24C0, 0x2580, 0xE541, 0x2700, 0xE7C1, 0xE681, 0x2640, + 0x2200, 0xE2C1, 0xE381, 0x2340, 0xE101, 0x21C0, 0x2080, 0xE041, + 0xA001, 0x60C0, 0x6180, 0xA141, 0x6300, 0xA3C1, 0xA281, 0x6240, + 0x6600, 0xA6C1, 0xA781, 0x6740, 0xA501, 0x65C0, 0x6480, 0xA441, + 0x6C00, 0xACC1, 0xAD81, 0x6D40, 0xAF01, 0x6FC0, 0x6E80, 0xAE41, + 0xAA01, 0x6AC0, 0x6B80, 0xAB41, 0x6900, 0xA9C1, 0xA881, 0x6840, + 0x7800, 0xB8C1, 0xB981, 0x7940, 0xBB01, 0x7BC0, 0x7A80, 0xBA41, + 0xBE01, 0x7EC0, 0x7F80, 0xBF41, 0x7D00, 0xBDC1, 0xBC81, 0x7C40, + 0xB401, 0x74C0, 0x7580, 0xB541, 0x7700, 0xB7C1, 0xB681, 0x7640, + 0x7200, 0xB2C1, 0xB381, 0x7340, 0xB101, 0x71C0, 0x7080, 0xB041, + 0x5000, 0x90C1, 0x9181, 0x5140, 0x9301, 0x53C0, 0x5280, 0x9241, + 0x9601, 0x56C0, 0x5780, 0x9741, 0x5500, 0x95C1, 0x9481, 0x5440, + 0x9C01, 0x5CC0, 0x5D80, 0x9D41, 0x5F00, 0x9FC1, 0x9E81, 0x5E40, + 0x5A00, 0x9AC1, 0x9B81, 0x5B40, 0x9901, 0x59C0, 0x5880, 0x9841, + 0x8801, 0x48C0, 0x4980, 0x8941, 0x4B00, 0x8BC1, 0x8A81, 0x4A40, + 0x4E00, 0x8EC1, 0x8F81, 0x4F40, 0x8D01, 0x4DC0, 0x4C80, 0x8C41, + 0x4400, 0x84C1, 0x8581, 0x4540, 0x8701, 0x47C0, 0x4680, 0x8641, + 0x8201, 0x42C0, 0x4380, 0x8341, 0x4100, 0x81C1, 0x8081, 0x4040 }; -uint16_t crc16_ccitt(uint16_t cksum, const unsigned char *buf, int len) -{ - for (int i = 0; i < len; i++) - cksum = crc16_tab[((cksum>>8) ^ *buf++) & 0xff] ^ (cksum << 8); - - return cksum; -} - -void crc16_ccitt_wd_buf(const uint8_t *in, uint len, - uint8_t *out, uint chunk_sz) +/** + * crc16 - compute the CRC-16 for the data buffer + * @crc: previous CRC value + * @buffer: data pointer + * @len: number of bytes in the buffer + * + * Returns the updated CRC value. + */ +u16 crc16(u16 crc, u8 const *buffer, size_t len) { - uint16_t crc; - - crc = crc16_ccitt(0, in, len); - crc = htons(crc); - memcpy(out, &crc, sizeof(crc)); + while (len--) + crc = crc16_byte(crc, *buffer++); + return crc; } diff --git a/tools/Makefile b/tools/Makefile index e17271be8bc..9f2339666a7 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -132,7 +132,7 @@ dumpimage-mkimage-objs := aisimage.o \ $(ROCKCHIP_OBS) \ socfpgaimage.o \ sunxi_egon.o \ - lib/crc16.o \ + lib/crc16-ccitt.o \ lib/hash-checksum.o \ lib/sha1.o \ lib/sha256.o \ diff --git a/tools/kwboot.c b/tools/kwboot.c index 9f2dd2de4ef..b697d3b60e6 100644 --- a/tools/kwboot.c +++ b/tools/kwboot.c @@ -1591,8 +1591,8 @@ static void * kwboot_read_image(const char *path, size_t *size, size_t reserve) { int rc, fd; - struct stat st; void *img; + off_t len; off_t tot; rc = -1; @@ -1602,31 +1602,34 @@ kwboot_read_image(const char *path, size_t *size, size_t reserve) if (fd < 0) goto out; - rc = fstat(fd, &st); - if (rc) + len = lseek(fd, 0, SEEK_END); + if (len == (off_t)-1) + goto out; + + if (lseek(fd, 0, SEEK_SET) == (off_t)-1) goto out; - img = malloc(st.st_size + reserve); + img = malloc(len + reserve); if (!img) goto out; tot = 0; - while (tot < st.st_size) { - ssize_t rd = read(fd, img + tot, st.st_size - tot); + while (tot < len) { + ssize_t rd = read(fd, img + tot, len - tot); if (rd < 0) goto out; tot += rd; - if (!rd && tot < st.st_size) { + if (!rd && tot < len) { errno = EIO; goto out; } } rc = 0; - *size = st.st_size; + *size = len; out: if (rc && img) { free(img); diff --git a/tools/mrvl_uart.sh b/tools/mrvl_uart.sh deleted file mode 100755 index a46411fc99f..00000000000 --- a/tools/mrvl_uart.sh +++ /dev/null @@ -1,119 +0,0 @@ -#!/bin/bash -# SPDX-License-Identifier: GPL-2.0 -# -###################################################### -# Copyright (C) 2016 Marvell International Ltd. -# -# https://spdx.org/licenses -# -# Author: Konstantin Porotchkin kostap@marvell.com -# -# Version 0.3 -# -# UART recovery downloader for Armada SoCs -# -###################################################### - -port=$1 -file=$2 -speed=$3 - -pattern_repeat=1500 -default_baudrate=115200 -tmpfile=/tmp/xmodem.pattern -tools=( dd stty sx minicom ) - -case "$3" in - 2) - fast_baudrate=230400 - prefix="\xF2" - ;; - 4) - fast_baudrate=460800 - prefix="\xF4" - ;; - 8) - fast_baudrate=921600 - prefix="\xF8" - ;; - *) - fast_baudrate=$default_baudrate - prefix="\xBB" -esac - -if [[ -z "$port" || -z "$file" ]] -then - echo -e "\nMarvell recovery image downloader for Armada SoC family." - echo -e "Command syntax:" - echo -e "\t$(basename $0) <port> <file> [2|4|8]" - echo -e "\tport - serial port the target board is connected to" - echo -e "\tfile - recovery boot image for target download" - echo -e "\t2|4|8 - times to increase the default serial port speed by" - echo -e "For example - load the image over ttyUSB0 @ 460800 baud:" - echo -e "$(basename $0) /dev/ttyUSB0 /tmp/flash-image.bin 4\n" - echo -e "=====WARNING=====" - echo -e "- The speed-up option is not available in SoC families prior to A8K+" - echo -e "- This utility is not compatible with Armada 37xx SoC family\n" -fi - -# Sanity checks -if [ -c "$port" ] -then - echo -e "Using device connected on serial port \"$port\"" -else - echo "Wrong serial port name!" - exit 1 -fi - -if [ -f "$file" ] -then - echo -e "Loading flash image file \"$file\"" -else - echo "File $file does not exist!" - exit 1 -fi - -# Verify required tools installation -for tool in ${tools[@]} -do - toolname=`which $tool` - if [ -z "$toolname" ] - then - echo -e "Missing installation of \"$tool\" --> Exiting" - exit 1 - fi -done - - -echo -e "Recovery will run at $fast_baudrate baud" -echo -e "========================================" - -if [ -f "$tmpfile" ] -then - rm -f $tmpfile -fi - -# Send the escape sequence to target board using default debug port speed -stty -F $port raw ignbrk time 5 $default_baudrate -counter=0 -while [ $counter -lt $pattern_repeat ]; do - echo -n -e "$prefix\x11\x22\x33\x44\x55\x66\x77" >> $tmpfile - let counter=counter+1 -done - -echo -en "Press the \"Reset\" button on the target board and " -echo -en "the \"Enter\" key on the host keyboard simultaneously" -read -dd if=$tmpfile of=$port &>/dev/null - -# Speed up the binary image transfer -stty -F $port raw ignbrk time 5 $fast_baudrate -sx -vv $file > $port < $port -#sx-at91 $port $file - -# Return the port to the default speed -stty -F $port raw ignbrk time 5 $default_baudrate - -# Optional - fire up Minicom -minicom -D $port -b $default_baudrate - |