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-rw-r--r--arch/arm/dts/rk3588-rock-5b-u-boot.dtsi54
-rw-r--r--arch/arm/dts/rk3588s-u-boot.dtsi56
2 files changed, 56 insertions, 54 deletions
diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
index 549b242be0a..1b2fcbb0bb1 100644
--- a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
@@ -76,26 +76,6 @@
status = "okay";
};
-&emmc_bus8 {
- bootph-all;
-};
-
-&emmc_clk {
- bootph-all;
-};
-
-&emmc_cmd {
- bootph-all;
-};
-
-&emmc_data_strobe {
- bootph-all;
-};
-
-&emmc_rstnout {
- bootph-all;
-};
-
&fspim2_pins {
bootph-all;
};
@@ -108,8 +88,6 @@
};
&pinctrl {
- bootph-all;
-
pcie {
pcie_reset_h: pcie-reset-h {
rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
@@ -138,39 +116,11 @@
};
};
-&pcfg_pull_none {
- bootph-all;
-};
-
-&pcfg_pull_up_drv_level_2 {
- bootph-all;
-};
-
-&pcfg_pull_up {
- bootph-all;
-};
-
&sdmmc {
bus-width = <4>;
status = "okay";
};
-&sdmmc_bus4 {
- bootph-all;
-};
-
-&sdmmc_clk {
- bootph-all;
-};
-
-&sdmmc_cmd {
- bootph-all;
-};
-
-&sdmmc_det {
- bootph-all;
-};
-
&sdhci {
cap-mmc-highspeed;
mmc-ddr-1_8v;
@@ -198,10 +148,6 @@
};
};
-&uart2m0_xfer {
- bootph-all;
-};
-
&usb_host0_ehci {
companion = <&usb_host0_ohci>;
phys = <&u2phy2_host>;
diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi
index 489c5edd624..245bc8b27c3 100644
--- a/arch/arm/dts/rk3588s-u-boot.dtsi
+++ b/arch/arm/dts/rk3588s-u-boot.dtsi
@@ -311,6 +311,42 @@
};
};
+&emmc_bus8 {
+ bootph-all;
+};
+
+&emmc_clk {
+ bootph-all;
+};
+
+&emmc_cmd {
+ bootph-all;
+};
+
+&emmc_data_strobe {
+ bootph-all;
+};
+
+&emmc_rstnout {
+ bootph-all;
+};
+
+&pinctrl {
+ bootph-all;
+};
+
+&pcfg_pull_none {
+ bootph-all;
+};
+
+&pcfg_pull_up_drv_level_2 {
+ bootph-all;
+};
+
+&pcfg_pull_up {
+ bootph-all;
+};
+
&xin24m {
bootph-all;
status = "okay";
@@ -344,12 +380,32 @@
u-boot,spl-fifo-mode;
};
+&sdmmc_bus4 {
+ bootph-all;
+};
+
+&sdmmc_clk {
+ bootph-all;
+};
+
+&sdmmc_cmd {
+ bootph-all;
+};
+
+&sdmmc_det {
+ bootph-all;
+};
+
&uart2 {
clock-frequency = <24000000>;
bootph-pre-ram;
status = "okay";
};
+&uart2m0_xfer {
+ bootph-all;
+};
+
&ioc {
bootph-pre-ram;
};