diff options
718 files changed, 4775 insertions, 2735 deletions
@@ -312,9 +312,9 @@ config SYS_MALLOC_LEN default 0x4000000 if SANDBOX default 0x2000000 if ARCH_ROCKCHIP || ARCH_OMAP2PLUS || ARCH_MESON default 0x200000 if ARCH_BMIPS || X86 - default 0x120000 if MACH_SUNIV - default 0x220000 if MACH_SUN8I_V3S - default 0x4020000 if ARCH_SUNXI + default 0x4020000 if SUNXI_MINIMUM_DRAM_MB >= 256 + default 0x220000 if SUNXI_MINIMUM_DRAM_MB >= 64 + default 0x120000 if SUNXI_MINIMUM_DRAM_MB >= 32 default 0x400000 help This defines memory to be allocated for Dynamic allocation @@ -1138,18 +1138,9 @@ ifneq ($(CONFIG_SPL_FIT_GENERATOR),) @echo >&2 "arch-specific scripts with no tests." @echo >&2 "====================================================" endif -ifneq ($(CONFIG_DM),y) - @echo >&2 "===================== WARNING ======================" - @echo >&2 "This board does not use CONFIG_DM. CONFIG_DM will be" - @echo >&2 "compulsory starting with the v2020.01 release." - @echo >&2 "Failure to update may result in board removal." - @echo >&2 "See doc/develop/driver-model/migration.rst for more info." - @echo >&2 "====================================================" -endif $(call deprecated,CONFIG_WDT,DM watchdog,v2019.10,\ $(CONFIG_WATCHDOG)$(CONFIG_HW_WATCHDOG)) $(call deprecated,CONFIG_DM_I2C,I2C drivers,v2022.04,$(CONFIG_SYS_I2C_LEGACY)) - $(call deprecated,CONFIG_DM_KEYBOARD,Keyboard drivers,v2022.10,$(CONFIG_KEYBOARD)) @# CONFIG_SYS_TIMER_RATE has brackets in it for some boards which @# confuses this rule. Use if() to send just a single character which @# is enable to tell 'deprecated' that one of these symbols exists diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 30e69b9f67f..5c7cdc9847b 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -136,6 +136,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3368) += \ dtb-$(CONFIG_ROCKCHIP_RK3399) += \ rk3399-evb.dtb \ + rk3399-eaidk-610.dtb \ rk3399-ficus.dtb \ rk3399-firefly.dtb \ rk3399-gru-bob.dtb \ @@ -713,7 +714,8 @@ dtb-$(CONFIG_MACH_SUN50I_H6) += \ sun50i-h6-tanix-tx6.dtb \ sun50i-h6-tanix-tx6-mini.dtb dtb-$(CONFIG_MACH_SUN50I_H616) += \ - sun50i-h616-orangepi-zero2.dtb + sun50i-h616-orangepi-zero2.dtb \ + sun50i-h616-x96-mate.dtb dtb-$(CONFIG_MACH_SUN50I) += \ sun50i-a64-amarula-relic.dtb \ sun50i-a64-bananapi-m64.dtb \ diff --git a/arch/arm/dts/rk3288-thermal.dtsi b/arch/arm/dts/rk3288-thermal.dtsi deleted file mode 100644 index 87dd8142d91..00000000000 --- a/arch/arm/dts/rk3288-thermal.dtsi +++ /dev/null @@ -1,87 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for RK3288 SoC thermal - * - * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd - */ - -#include <dt-bindings/thermal/thermal.h> - -reserve_thermal: reserve_thermal { - polling-delay-passive = <1000>; /* milliseconds */ - polling-delay = <5000>; /* milliseconds */ - - /* sensor ID */ - thermal-sensors = <&tsadc 0>; - -}; - -cpu_thermal: cpu_thermal { - polling-delay-passive = <100>; /* milliseconds */ - polling-delay = <5000>; /* milliseconds */ - - /* sensor ID */ - thermal-sensors = <&tsadc 1>; - linux,hwmon; - - trips { - cpu_alert0: cpu_alert0 { - temperature = <70000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "passive"; - }; - cpu_alert1: cpu_alert1 { - temperature = <75000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "passive"; - }; - cpu_crit: cpu_crit { - temperature = <100000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&cpu_alert0>; - cooling-device = - <&cpu0 THERMAL_NO_LIMIT 6>; - }; - map1 { - trip = <&cpu_alert1>; - cooling-device = - <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; -}; - -gpu_thermal: gpu_thermal { - polling-delay-passive = <100>; /* milliseconds */ - polling-delay = <5000>; /* milliseconds */ - - /* sensor ID */ - thermal-sensors = <&tsadc 2>; - linux,hwmon; - - trips { - gpu_alert0: gpu_alert0 { - temperature = <80000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "passive"; - }; - gpu_crit: gpu_crit { - temperature = <100000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&gpu_alert0>; - cooling-device = - <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; -}; diff --git a/arch/arm/dts/rk3288-veyron-jerry.dts b/arch/arm/dts/rk3288-veyron-jerry.dts index ff7669eba4d..40fee55c750 100644 --- a/arch/arm/dts/rk3288-veyron-jerry.dts +++ b/arch/arm/dts/rk3288-veyron-jerry.dts @@ -137,12 +137,6 @@ }; }; - edp { - edp_hpd: edp_hpd { - rockchip,pins = <7 11 RK_FUNC_2 &pcfg_pull_down>; - }; - }; - emmc { /* Make sure eMMC is not in reset */ emmc_deassert_reset: emmc-deassert-reset { diff --git a/arch/arm/dts/rk3288-veyron.dtsi b/arch/arm/dts/rk3288-veyron.dtsi index 4a9c27a49e2..35db8827431 100644 --- a/arch/arm/dts/rk3288-veyron.dtsi +++ b/arch/arm/dts/rk3288-veyron.dtsi @@ -560,10 +560,6 @@ status = "okay"; }; -&hdmi_audio { - status = "okay"; -}; - &gpu { status = "okay"; }; diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi index 53ee760b989..8c394c1e539 100644 --- a/arch/arm/dts/rk3288.dtsi +++ b/arch/arm/dts/rk3288.dtsi @@ -15,6 +15,7 @@ interrupt-parent = <&gic>; aliases { + ethernet0 = &gmac; i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; @@ -35,6 +36,15 @@ spi2 = &spi2; }; + arm-pmu { + compatible = "arm,cortex-a12-pmu"; + interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -45,44 +55,119 @@ device_type = "cpu"; compatible = "arm,cortex-a12"; reg = <0x500>; - operating-points = < - /* KHz uV */ - 1800000 1400000 - 1704000 1350000 - 1608000 1300000 - 1512000 1250000 - 1416000 1200000 - 1200000 1100000 - 1008000 1050000 - 816000 1000000 - 696000 950000 - 600000 900000 - 408000 900000 - 216000 900000 - 126000 900000 - >; + resets = <&cru SRST_CORE0>; + operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; /* min followed by max */ clock-latency = <40000>; clocks = <&cru ARMCLK>; - resets = <&cru SRST_CORE0>; + dynamic-power-coefficient = <370>; }; - cpu@501 { + cpu1: cpu@501 { device_type = "cpu"; compatible = "arm,cortex-a12"; reg = <0x501>; resets = <&cru SRST_CORE1>; + operating-points-v2 = <&cpu_opp_table>; + #cooling-cells = <2>; /* min followed by max */ + clock-latency = <40000>; + clocks = <&cru ARMCLK>; + dynamic-power-coefficient = <370>; }; - cpu@502 { + cpu2: cpu@502 { device_type = "cpu"; compatible = "arm,cortex-a12"; reg = <0x502>; resets = <&cru SRST_CORE2>; + operating-points-v2 = <&cpu_opp_table>; + #cooling-cells = <2>; /* min followed by max */ + clock-latency = <40000>; + clocks = <&cru ARMCLK>; + dynamic-power-coefficient = <370>; }; - cpu@503 { + cpu3: cpu@503 { device_type = "cpu"; compatible = "arm,cortex-a12"; reg = <0x503>; resets = <&cru SRST_CORE3>; + operating-points-v2 = <&cpu_opp_table>; + #cooling-cells = <2>; /* min followed by max */ + clock-latency = <40000>; + clocks = <&cru ARMCLK>; + dynamic-power-coefficient = <370>; + }; + }; + + cpu_opp_table: opp-table-0 { + compatible = "operating-points-v2"; + opp-shared; + + opp-126000000 { + opp-hz = /bits/ 64 <126000000>; + opp-microvolt = <900000>; + }; + opp-216000000 { + opp-hz = /bits/ 64 <216000000>; + opp-microvolt = <900000>; + }; + opp-312000000 { + opp-hz = /bits/ 64 <312000000>; + opp-microvolt = <900000>; + }; + opp-408000000 { + opp-hz = /bits/ 64 <408000000>; + opp-microvolt = <900000>; + }; + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <900000>; + }; + opp-696000000 { + opp-hz = /bits/ 64 <696000000>; + opp-microvolt = <950000>; + }; + opp-816000000 { + opp-hz = /bits/ 64 <816000000>; + opp-microvolt = <1000000>; + }; + opp-1008000000 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <1050000>; + }; + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1100000>; + }; + opp-1416000000 { + opp-hz = /bits/ 64 <1416000000>; + opp-microvolt = <1200000>; + }; + opp-1512000000 { + opp-hz = /bits/ 64 <1512000000>; + opp-microvolt = <1300000>; + }; + opp-1608000000 { + opp-hz = /bits/ 64 <1608000000>; + opp-microvolt = <1350000>; + }; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + /* + * The rk3288 cannot use the memory area above 0xfe000000 + * for dma operations for some reason. While there is + * probably a better solution available somewhere, we + * haven't found it yet and while devices with 2GB of ram + * are not affected, this issue prevents 4GB from booting. + * So to make these devices at least bootable, block + * this area for the time being until the real solution + * is found. + */ + dma-unusable@fe000000 { + reg = <0xfe000000 0x1000000>; }; }; @@ -94,14 +179,22 @@ }; timer { - arm,use-physical-timer; compatible = "arm,armv7-timer"; + arm,cpu-registers-not-fw-configured; interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; clock-frequency = <24000000>; - always-on; + arm,no-tick-in-suspend; + }; + + timer: timer@ff810000 { + compatible = "rockchip,rk3288-timer"; + reg = <0x0 0xff810000 0x0 0x20>; + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru PCLK_TIMER>, <&xin24m>; + clock-names = "pclk", "timer"; }; display-subsystem { @@ -118,6 +211,8 @@ fifo-depth = <0x100>; interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; reg = <0xff0c0000 0x4000>; + resets = <&cru SRST_MMC0>; + reset-names = "reset"; status = "disabled"; }; @@ -130,6 +225,8 @@ fifo-depth = <0x100>; interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; reg = <0xff0d0000 0x4000>; + resets = <&cru SRST_SDIO0>; + reset-names = "reset"; status = "disabled"; }; @@ -142,6 +239,8 @@ fifo-depth = <0x100>; interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; reg = <0xff0e0000 0x4000>; + resets = <&cru SRST_SDIO1>; + reset-names = "reset"; status = "disabled"; }; @@ -154,6 +253,8 @@ fifo-depth = <0x100>; interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; reg = <0xff0f0000 0x4000>; + resets = <&cru SRST_EMMC>; + reset-names = "reset"; status = "disabled"; }; @@ -164,6 +265,8 @@ #io-channel-cells = <1>; clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>; clock-names = "saradc", "apb_pclk"; + resets = <&cru SRST_SARADC>; + reset-names = "saradc-apb"; status = "disabled"; }; @@ -263,6 +366,7 @@ pinctrl-0 = <&i2c5_xfer>; status = "disabled"; }; + uart0: serial@ff180000 { compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart"; reg = <0xff180000 0x100>; @@ -271,6 +375,8 @@ reg-io-width = <4>; clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>; clock-names = "baudclk", "apb_pclk"; + dmas = <&dmac_peri 1>, <&dmac_peri 2>; + dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&uart0_xfer>; status = "disabled"; @@ -284,6 +390,8 @@ reg-io-width = <4>; clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>; clock-names = "baudclk", "apb_pclk"; + dmas = <&dmac_peri 3>, <&dmac_peri 4>; + dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&uart1_xfer>; status = "disabled"; @@ -301,6 +409,7 @@ pinctrl-0 = <&uart2_xfer>; status = "disabled"; }; + uart3: serial@ff1b0000 { compatible = "rockchip,rk3288-uart", "snps,dw-apb-uart"; reg = <0xff1b0000 0x100>; @@ -309,6 +418,8 @@ reg-io-width = <4>; clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>; clock-names = "baudclk", "apb_pclk"; + dmas = <&dmac_peri 7>, <&dmac_peri 8>; + dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&uart3_xfer>; status = "disabled"; @@ -322,6 +433,8 @@ reg-io-width = <4>; clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>; clock-names = "baudclk", "apb_pclk"; + dmas = <&dmac_peri 9>, <&dmac_peri 10>; + dma-names = "tx", "rx"; pinctrl-names = "default"; pinctrl-0 = <&uart4_xfer>; status = "disabled"; @@ -333,13 +446,91 @@ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; #dma-cells = <1>; - broken-no-flushp; + arm,pl330-broken-no-flushp; + arm,pl330-periph-burst; clocks = <&cru ACLK_DMAC2>; clock-names = "apb_pclk"; }; thermal: thermal-zones { - #include "rk3288-thermal.dtsi" + reserve_thermal: reserve-thermal { + polling-delay-passive = <1000>; /* milliseconds */ + polling-delay = <5000>; /* milliseconds */ + + thermal-sensors = <&tsadc 0>; + }; + + cpu_thermal: cpu-thermal { + polling-delay-passive = <100>; /* milliseconds */ + polling-delay = <5000>; /* milliseconds */ + + thermal-sensors = <&tsadc 1>; + + trips { + cpu_alert0: cpu_alert0 { + temperature = <70000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "passive"; + }; + cpu_alert1: cpu_alert1 { + temperature = <75000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "passive"; + }; + cpu_crit: cpu_crit { + temperature = <90000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&cpu_alert0>; + cooling-device = + <&cpu0 THERMAL_NO_LIMIT 6>, + <&cpu1 THERMAL_NO_LIMIT 6>, + <&cpu2 THERMAL_NO_LIMIT 6>, + <&cpu3 THERMAL_NO_LIMIT 6>; + }; + map1 { + trip = <&cpu_alert1>; + cooling-device = + <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + gpu_thermal: gpu-thermal { + polling-delay-passive = <100>; /* milliseconds */ + polling-delay = <5000>; /* milliseconds */ + + thermal-sensors = <&tsadc 2>; + + trips { + gpu_alert0: gpu_alert0 { + temperature = <70000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "passive"; + }; + gpu_crit: gpu_crit { + temperature = <90000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&gpu_alert0>; + cooling-device = + <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; }; tsadc: tsadc@ff280000 { @@ -371,6 +562,8 @@ "mac_clk_rx", "mac_clk_tx", "clk_mac_ref", "clk_mac_refout", "aclk_mac", "pclk_mac"; + resets = <&cru SRST_MAC>; + reset-names = "stmmaceth"; }; usb_host0_ehci: usb@ff500000 { @@ -384,7 +577,7 @@ status = "disabled"; }; - /* NOTE: doesn't work on RK3288, but fixed on RK3288W */ + /* NOTE: doesn't work on RK3288, but was fixed on RK3288W */ usb_host0_ohci: usb@ff520000 { compatible = "generic-ohci"; reg = <0x0 0xff520000 0x0 0x100>; @@ -402,8 +595,10 @@ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru HCLK_USBHOST1>; clock-names = "otg"; + dr_mode = "host"; phys = <&usbphy2>; phy-names = "usb2-phy"; + snps,reset-phy-on-wake; status = "disabled"; }; @@ -415,6 +610,9 @@ clocks = <&cru HCLK_OTG0>; clock-names = "otg"; dr_mode = "otg"; + g-np-tx-fifo-size = <16>; + g-rx-fifo-size = <275>; + g-tx-fifo-size = <256 128 128 64 64 32>; phys = <&usbphy0>; phy-names = "usb2-phy"; status = "disabled"; @@ -435,7 +633,8 @@ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; #dma-cells = <1>; - broken-no-flushp; + arm,pl330-broken-no-flushp; + arm,pl330-periph-burst; clocks = <&cru ACLK_DMAC1>; clock-names = "apb_pclk"; status = "disabled"; @@ -515,7 +714,7 @@ status = "disabled"; }; - bus_intmem: bus_intmem@ff700000 { + bus_intmem: sram@ff700000 { compatible = "mmio-sram"; reg = <0xff700000 0x18000>; #address-cells = <1>; @@ -527,7 +726,7 @@ }; }; - sram@ff720000 { + pmu_sram: sram@ff720000 { compatible = "rockchip,rk3288-pmu-sram", "mmio-sram"; reg = <0xff720000 0x1000>; }; @@ -569,7 +768,7 @@ compatible = "rockchip,rk3288-wdt", "snps,dw-wdt"; reg = <0xff800000 0x100>; clocks = <&cru PCLK_WDT>; - interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -577,11 +776,11 @@ compatible = "rockchip,rk3288-spdif", "rockchip,rk3066-spdif"; reg = <0xff8b0000 0x10000>; #sound-dai-cells = <0>; - clock-names = "hclk", "mclk"; - clocks = <&cru HCLK_SPDIF8CH>, <&cru SCLK_SPDIF8CH>; + clocks = <&cru SCLK_SPDIF8CH>, <&cru HCLK_SPDIF8CH>; + clock-names = "mclk", "hclk"; dmas = <&dmac_bus_s 3>; dma-names = "tx"; - interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&spdif_tx>; rockchip,grf = <&grf>; @@ -591,50 +790,97 @@ i2s: i2s@ff890000 { compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s"; reg = <0xff890000 0x10000>; - interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - #sound-dai-cells = <1>; + #sound-dai-cells = <0>; + interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>; + clock-names = "i2s_clk", "i2s_hclk"; dmas = <&dmac_bus_s 0>, <&dmac_bus_s 1>; dma-names = "tx", "rx"; - clock-names = "i2s_hclk", "i2s_clk"; - clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>; pinctrl-names = "default"; pinctrl-0 = <&i2s0_bus>; + rockchip,playback-channels = <8>; + rockchip,capture-channels = <2>; + status = "disabled"; + }; + + crypto: crypto@ff8a0000 { + compatible = "rockchip,rk3288-crypto"; + reg = <0xff8a0000 0x4000>; + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>, + <&cru SCLK_CRYPTO>, <&cru ACLK_DMAC1>; + clock-names = "aclk", "hclk", "sclk", "apb_pclk"; + resets = <&cru SRST_CRYPTO>; + reset-names = "crypto-rst"; + }; + + iep_mmu: iommu@ff900800 { + compatible = "rockchip,iommu"; + reg = <0xff900800 0x40>; + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; + clock-names = "aclk", "iface"; + #iommu-cells = <0>; status = "disabled"; }; + isp_mmu: iommu@ff914000 { + compatible = "rockchip,iommu"; + reg = <0xff914000 0x100>, <0xff915000 0x100>; + interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>; + clock-names = "aclk", "iface"; + #iommu-cells = <0>; + rockchip,disable-mmu-reset; + status = "disabled"; + }; + + rga: rga@ff920000 { + compatible = "rockchip,rk3288-rga"; + reg = <0xff920000 0x180>; + interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>; + clock-names = "aclk", "hclk", "sclk"; + power-domains = <&power RK3288_PD_VIO>; + resets = <&cru SRST_RGA_CORE>, <&cru SRST_RGA_AXI>, <&cru SRST_RGA_AHB>; + reset-names = "core", "axi", "ahb"; + }; + vopb: vop@ff930000 { compatible = "rockchip,rk3288-vop"; reg = <0xff930000 0x19c>; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>; clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; + power-domains = <&power RK3288_PD_VIO>; resets = <&cru SRST_LCDC0_AXI>, <&cru SRST_LCDC0_AHB>, <&cru SRST_LCDC0_DCLK>; reset-names = "axi", "ahb", "dclk"; iommus = <&vopb_mmu>; - power-domains = <&power RK3288_PD_VIO>; status = "disabled"; + vopb_out: port { #address-cells = <1>; #size-cells = <0>; + vopb_out_edp: endpoint@0 { reg = <0>; remote-endpoint = <&edp_in_vopb>; }; + vopb_out_hdmi: endpoint@1 { reg = <1>; remote-endpoint = <&hdmi_in_vopb>; }; + vopb_out_lvds: endpoint@2 { reg = <2>; remote-endpoint = <&lvds_in_vopb>; }; + vopb_out_mipi: endpoint@3 { reg = <3>; remote-endpoint = <&mipi_in_vopb>; }; - }; }; @@ -642,7 +888,8 @@ compatible = "rockchip,iommu"; reg = <0xff930300 0x100>; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "vopb_mmu"; + clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>; + clock-names = "aclk", "iface"; power-domains = <&power RK3288_PD_VIO>; #iommu-cells = <0>; status = "disabled"; @@ -654,31 +901,35 @@ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>; clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; + power-domains = <&power RK3288_PD_VIO>; resets = <&cru SRST_LCDC1_AXI>, <&cru SRST_LCDC1_AHB>, <&cru SRST_LCDC1_DCLK>; reset-names = "axi", "ahb", "dclk"; iommus = <&vopl_mmu>; - power-domains = <&power RK3288_PD_VIO>; status = "disabled"; + vopl_out: port { #address-cells = <1>; #size-cells = <0>; + vopl_out_edp: endpoint@0 { reg = <0>; remote-endpoint = <&edp_in_vopl>; }; + vopl_out_hdmi: endpoint@1 { reg = <1>; remote-endpoint = <&hdmi_in_vopl>; }; + vopl_out_lvds: endpoint@2 { reg = <2>; remote-endpoint = <&lvds_in_vopl>; }; + vopl_out_mipi: endpoint@3 { reg = <3>; remote-endpoint = <&mipi_in_vopl>; }; - }; }; @@ -686,7 +937,8 @@ compatible = "rockchip,iommu"; reg = <0xff940300 0x100>; interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "vopl_mmu"; + clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; + clock-names = "aclk", "iface"; power-domains = <&power RK3288_PD_VIO>; #iommu-cells = <0>; status = "disabled"; @@ -695,16 +947,14 @@ mipi_dsi: mipi@ff960000 { compatible = "rockchip,rk3288_mipi_dsi"; reg = <0xff960000 0x4000>; + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru PCLK_MIPI_DSI0>; clock-names = "pclk_mipi"; - /*pinctrl-names = "default"; - pinctrl-0 = <&lcdc0_ctl>;*/ + power-domains = <&power RK3288_PD_VIO>; rockchip,grf = <&grf>; - #address-cells = <1>; - #size-cells = <0>; status = "disabled"; + ports { - reg = <1>; mipi_in: port { #address-cells = <1>; #size-cells = <0>; @@ -726,16 +976,21 @@ clocks = <&cru PCLK_LVDS_PHY>; clock-names = "pclk_lvds"; pinctrl-names = "default"; - pinctrl-0 = <&lcdc0_ctl>; + pinctrl-0 = <&lcdc_ctl>; + power-domains = <&power RK3288_PD_VIO>; rockchip,grf = <&grf>; status = "disabled"; + ports { #address-cells = <1>; #size-cells = <0>; + lvds_in: port@0 { reg = <0>; + #address-cells = <1>; #size-cells = <0>; + lvds_in_vopb: endpoint@0 { reg = <0>; remote-endpoint = <&vopb_out_lvds>; @@ -753,12 +1008,13 @@ reg = <0xff970000 0x4000>; interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru SCLK_EDP>, <&cru SCLK_EDP_24M>, <&cru PCLK_EDP_CTRL>; - rockchip,grf = <&grf>; clock-names = "clk_edp", "clk_edp_24m", "pclk_edp"; - resets = <&cru 111>; + resets = <&cru SRST_EDP>; reset-names = "edp"; + rockchip,grf = <&grf>; power-domains = <&power RK3288_PD_VIO>; status = "disabled"; + ports { edp_in: port { #address-cells = <1>; @@ -779,12 +1035,14 @@ compatible = "rockchip,rk3288-dw-hdmi"; reg = <0xff980000 0x20000>; reg-io-width = <4>; - ddc-i2c-bus = <&i2c5>; + #sound-dai-cells = <0>; rockchip,grf = <&grf>; interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>; clock-names = "iahb", "isfr"; + power-domains = <&power RK3288_PD_VIO>; status = "disabled"; + ports { hdmi_in: port { #address-cells = <1>; @@ -801,65 +1059,155 @@ }; }; - hdmi_audio: hdmi_audio { - compatible = "rockchip,rk3288-hdmi-audio"; - i2s-controller = <&i2s>; - status = "disable"; - }; - vpu: video-codec@ff9a0000 { compatible = "rockchip,rk3288-vpu"; reg = <0xff9a0000 0x800>; interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "vepu", "vdpu"; clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>; - clock-names = "aclk_vcodec", "hclk_vcodec"; - power-domains = <&power RK3288_PD_VIDEO>; + clock-names = "aclk", "hclk"; iommus = <&vpu_mmu>; + power-domains = <&power RK3288_PD_VIDEO>; }; vpu_mmu: iommu@ff9a0800 { compatible = "rockchip,iommu"; reg = <0xff9a0800 0x100>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "vpu_mmu"; + clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>; + clock-names = "aclk", "iface"; + #iommu-cells = <0>; power-domains = <&power RK3288_PD_VIDEO>; + }; + + hevc_mmu: iommu@ff9c0440 { + compatible = "rockchip,iommu"; + reg = <0xff9c0440 0x40>, <0xff9c0480 0x40>; + interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>; + clock-names = "aclk", "iface"; #iommu-cells = <0>; + status = "disabled"; }; gpu: gpu@ffa30000 { - compatible = "arm,malit764", - "arm,malit76x", - "arm,malit7xx", - "arm,mali-midgard"; + compatible = "rockchip,rk3288-mali", "arm,mali-t760"; reg = <0xffa30000 0x10000>; interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "JOB", "MMU", "GPU"; + interrupt-names = "job", "mmu", "gpu"; clocks = <&cru ACLK_GPU>; - clock-names = "aclk_gpu"; - operating-points = < - /* KHz uV */ - 100000 950000 - 200000 950000 - 300000 1000000 - 400000 1100000 - /* 500000 1200000 - See crosbug.com/p/33857 */ - 600000 1250000 - >; + operating-points-v2 = <&gpu_opp_table>; + #cooling-cells = <2>; /* min followed by max */ power-domains = <&power RK3288_PD_GPU>; status = "disabled"; }; + gpu_opp_table: opp-table-1 { + compatible = "operating-points-v2"; + + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <950000>; + }; + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <950000>; + }; + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <1000000>; + }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <1100000>; + }; + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <1250000>; + }; + }; + + qos_gpu_r: qos@ffaa0000 { + compatible = "rockchip,rk3288-qos", "syscon"; + reg = <0xffaa0000 0x20>; + }; + + qos_gpu_w: qos@ffaa0080 { + compatible = "rockchip,rk3288-qos", "syscon"; + reg = <0xffaa0080 0x20>; + }; + + qos_vio1_vop: qos@ffad0000 { + compatible = "rockchip,rk3288-qos", "syscon"; + reg = <0xffad0000 0x20>; + }; + + qos_vio1_isp_w0: qos@ffad0100 { + compatible = "rockchip,rk3288-qos", "syscon"; + reg = <0xffad0100 0x20>; + }; + + qos_vio1_isp_w1: qos@ffad0180 { + compatible = "rockchip,rk3288-qos", "syscon"; + reg = <0x0 0xffad0180 0x0 0x20>; + }; + + qos_vio0_vop: qos@ffad0400 { + compatible = "rockchip,rk3288-qos", "syscon"; + reg = <0x0 0xffad0400 0x0 0x20>; + }; + + qos_vio0_vip: qos@ffad0480 { + compatible = "rockchip,rk3288-qos", "syscon"; + reg = <0xffad0480 0x20>; + }; + + qos_vio0_iep: qos@ffad0500 { + compatible = "rockchip,rk3288-qos", "syscon"; + reg = <0xffad0500 0x20>; + }; + + qos_vio2_rga_r: qos@ffad0800 { + compatible = "rockchip,rk3288-qos", "syscon"; + reg = <0xffad0800 0x20>; + }; + + qos_vio2_rga_w: qos@ffad0880 { + compatible = "rockchip,rk3288-qos", "syscon"; + reg = <0xffad0880 0x20>; + }; + + qos_vio1_isp_r: qos@ffad0900 { + compatible = "rockchip,rk3288-qos", "syscon"; + reg = <0xffad0900 0x20>; + }; + + qos_video: qos@ffae0000 { + compatible = "rockchip,rk3288-qos", "syscon"; + reg = <0xffae0000 0x20>; + }; + + qos_hevc_r: qos@ffaf0000 { + compatible = "rockchip,rk3288-qos", "syscon"; + reg = <0xffaf0000 0x20>; + }; + + qos_hevc_w: qos@ffaf0080 { + compatible = "rockchip,rk3288-qos", "syscon"; + reg = <0xffaf0080 0x20>; + }; + dmac_bus_s: dma-controller@ffb20000 { compatible = "arm,pl330", "arm,primecell"; reg = <0xffb20000 0x4000>; interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; #dma-cells = <1>; - broken-no-flushp; + arm,pl330-broken-no-flushp; + arm,pl330-periph-burst; clocks = <&cru ACLK_DMAC1>; clock-names = "apb_pclk"; }; @@ -867,7 +1215,17 @@ efuse: efuse@ffb40000 { compatible = "rockchip,rk3288-efuse"; reg = <0xffb40000 0x10000>; - status = "disabled"; + #address-cells = <1>; + #size-cells = <1>; + clocks = <&cru PCLK_EFUSE256>; + clock-names = "pclk_efuse"; + + cpu_id: cpu-id@7 { + reg = <0x07 0x10>; + }; + cpu_leakage: cpu_leakage@17 { + reg = <0x17 0x1>; + }; }; gic: interrupt-controller@ffc01000 { @@ -926,7 +1284,7 @@ gpio0: gpio0@ff750000 { compatible = "rockchip,gpio-bank"; - reg = <0xff750000 0x100>; + reg = <0xff750000 0x100>; interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru PCLK_GPIO0>; @@ -1045,6 +1403,24 @@ hdmi_cec_c0: hdmi-cec-c0 { rockchip,pins = <7 RK_PC0 2 &pcfg_pull_none>; }; + + hdmi_cec_c7: hdmi-cec-c7 { + rockchip,pins = <7 RK_PC7 4 &pcfg_pull_none>; + }; + + hdmi_ddc: hdmi-ddc { + rockchip,pins = <7 RK_PC3 2 &pcfg_pull_none>, + <7 RK_PC4 2 &pcfg_pull_none>; + }; + + hdmi_ddc_unwedge: hdmi-ddc-unwedge { + rockchip,pins = <7 RK_PC3 RK_FUNC_GPIO &pcfg_output_low>, + <7 RK_PC4 2 &pcfg_pull_none>; + }; + }; + + pcfg_output_low: pcfg-output-low { + output-low; }; pcfg_pull_up: pcfg-pull-up { @@ -1064,7 +1440,7 @@ drive-strength = <12>; }; - sleep { + suspend { global_pwroff: global-pwroff { rockchip,pins = <0 RK_PA0 1 &pcfg_pull_none>; }; @@ -1082,6 +1458,12 @@ }; }; + edp { + edp_hpd: edp-hpd { + rockchip,pins = <7 RK_PB3 2 &pcfg_pull_down>; + }; + }; + i2c0 { i2c0_xfer: i2c0-xfer { rockchip,pins = <0 RK_PB7 1 &pcfg_pull_none>, @@ -1135,8 +1517,8 @@ }; }; - lcdc0 { - lcdc0_ctl: lcdc0-ctl { + lcdc { + lcdc_ctl: lcdc-ctl { rockchip,pins = <1 RK_PD0 1 &pcfg_pull_none>, <1 RK_PD1 1 &pcfg_pull_none>, <1 RK_PD2 1 &pcfg_pull_none>, @@ -1153,7 +1535,7 @@ rockchip,pins = <6 RK_PC5 1 &pcfg_pull_up>; }; - sdmmc_cd: sdmcc-cd { + sdmmc_cd: sdmmc-cd { rockchip,pins = <6 RK_PC6 1 &pcfg_pull_up>; }; @@ -1344,7 +1726,7 @@ }; uart0_cts: uart0-cts { - rockchip,pins = <4 RK_PC2 1 &pcfg_pull_none>; + rockchip,pins = <4 RK_PC2 1 &pcfg_pull_up>; }; uart0_rts: uart0-rts { @@ -1359,7 +1741,7 @@ }; uart1_cts: uart1-cts { - rockchip,pins = <5 RK_PB2 1 &pcfg_pull_none>; + rockchip,pins = <5 RK_PB2 1 &pcfg_pull_up>; }; uart1_rts: uart1-rts { @@ -1382,7 +1764,7 @@ }; uart3_cts: uart3-cts { - rockchip,pins = <7 RK_PB1 1 &pcfg_pull_none>; + rockchip,pins = <7 RK_PB1 1 &pcfg_pull_up>; }; uart3_rts: uart3-rts { @@ -1392,20 +1774,24 @@ uart4 { uart4_xfer: uart4-xfer { - rockchip,pins = <5 RK_PB4 3 &pcfg_pull_up>, - <5 RK_PB5 3 &pcfg_pull_none>; + rockchip,pins = <5 RK_PB7 3 &pcfg_pull_up>, + <5 RK_PB6 3 &pcfg_pull_none>; }; uart4_cts: uart4-cts { - rockchip,pins = <5 RK_PB6 3 &pcfg_pull_none>; + rockchip,pins = <5 RK_PB4 3 &pcfg_pull_up>; }; uart4_rts: uart4-rts { - rockchip,pins = <5 RK_PB7 3 &pcfg_pull_none>; + rockchip,pins = <5 RK_PB5 3 &pcfg_pull_none>; }; }; tsadc { + otp_pin: otp-pin { + rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + otp_out: otp-out { rockchip,pins = <0 RK_PB2 1 &pcfg_pull_none>; }; diff --git a/arch/arm/dts/rk3399-eaidk-610-u-boot.dtsi b/arch/arm/dts/rk3399-eaidk-610-u-boot.dtsi new file mode 100644 index 00000000000..a3f27566e43 --- /dev/null +++ b/arch/arm/dts/rk3399-eaidk-610-u-boot.dtsi @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2022 Andy Yan <andy.yan@gmail.com> + */ + +#include "rk3399-u-boot.dtsi" +#include "rk3399-sdram-lpddr3-4GB-1600.dtsi" + +/ { + chosen { + stdout-path = "serial2:1500000n8"; + u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc; + }; +}; + +&vdd_log { + regulator-init-microvolt = <950000>; +}; diff --git a/arch/arm/dts/rk3399-eaidk-610.dts b/arch/arm/dts/rk3399-eaidk-610.dts new file mode 100644 index 00000000000..d1f343345f6 --- /dev/null +++ b/arch/arm/dts/rk3399-eaidk-610.dts @@ -0,0 +1,939 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2022 Fuzhou Rockchip Electronics Co., Ltd. + */ + +/dts-v1/; +#include <dt-bindings/input/linux-event-codes.h> +#include <dt-bindings/pwm/pwm.h> +#include <dt-bindings/usb/pd.h> +#include "rk3399.dtsi" +#include "rk3399-opp.dtsi" + +/ { + model = "OPEN AI LAB EAIDK-610"; + compatible = "openailab,eaidk-610", "rockchip,rk3399"; + + aliases { + mmc0 = &sdio0; + mmc1 = &sdmmc; + mmc2 = &sdhci; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm0 0 25000 0>; + brightness-levels = < + 0 1 2 3 4 5 6 7 + 8 9 10 11 12 13 14 15 + 16 17 18 19 20 21 22 23 + 24 25 26 27 28 29 30 31 + 32 33 34 35 36 37 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255>; + default-brightness-level = <200>; + }; + + clkin_gmac: external-gmac-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "clkin_gmac"; + #clock-cells = <0>; + }; + + dc_12v: dc-12v { + compatible = "regulator-fixed"; + regulator-name = "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + autorepeat; + pinctrl-names = "default"; + pinctrl-0 = <&pwrbtn>; + + key-power { + debounce-interval = <100>; + gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; + label = "GPIO Key Power"; + linux,code = <KEY_POWER>; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&work_led_pin>, <&user_led_pin>, + <&heartbeat_led_pin>, <&wlan_active_led_pin>, + <&bt_active_led_pin>; + + work_led: led-0 { + label = "blue:work"; + default-state = "on"; + gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; + }; + + user_led: led-1 { + label = "read:user"; + default-state = "off"; + gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; + }; + + heartbeat_led: led-2 { + label = "green:heartbeat"; + linux,default-trigger = "heartbeat"; + gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; + }; + + wlan_active_led: led-3 { + label = "yellow:wlan"; + gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy0tx"; + default-state = "off"; + }; + + bt_active_led: led-4 { + label = "blue:bt"; + gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "hci0-power"; + default-state = "off"; + }; + }; + + rt5651-sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "realtek,rt5651-codec"; + simple-audio-card,format = "i2s"; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,widgets = + "Microphone", "Mic Jack", + "Headphone", "Headphone Jack"; + simple-audio-card,routing = + "Mic Jack", "MICBIAS1", + "IN1P", "Mic Jack", + "Headphone Jack", "HPOL", + "Headphone Jack", "HPOR"; + simple-audio-card,cpu { + sound-dai = <&i2s1>; + }; + simple-audio-card,codec { + sound-dai = <&rt5651>; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rk808 1>; + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + + /* + * On the module itself this is one of these (depending + * on the actual card populated): + * - SDIO_RESET_L_WL_REG_ON + * - PDN (power down when low) + */ + reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; + }; + + /* switched by pmic_sleep */ + vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 { + compatible = "regulator-fixed"; + regulator-name = "vcc1v8_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_1v8>; + }; + + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&dc_12v>; + }; + + vcc5v0_sys: vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_12v>; + }; + + /* For USB3.0 Port1/2 */ + vcc5v0_host1: vcc5v0-host1-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_host1_en>; + regulator-name = "vcc5v0_host1"; + regulator-always-on; + vin-supply = <&vcc5v0_sys>; + }; + + /* For USB2.0 Port1/2 */ + vcc5v0_host3: vcc5v0-host3-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_host3_en>; + regulator-name = "vcc5v0_host3"; + regulator-always-on; + vin-supply = <&vcc5v0_sys>; + }; + + vcc5v0_typec: vcc5v0-typec-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_typec_en>; + regulator-name = "vcc5v0_typec"; + regulator-always-on; + vin-supply = <&vcc3v3_sys>; + }; + + vdd_log: vdd-log { + compatible = "regulator-fixed"; + regulator-name = "vdd_log"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + }; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_b>; +}; + +&cpu_b1 { + cpu-supply = <&vdd_cpu_b>; +}; + +&emmc_phy { + status = "okay"; +}; + +&gmac { + assigned-clocks = <&cru SCLK_RMII_SRC>; + assigned-clock-parents = <&clkin_gmac>; + clock_in_out = "input"; + phy-supply = <&vcc_lan>; + phy-mode = "rgmii"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 50000>; + tx_delay = <0x28>; + rx_delay = <0x11>; + status = "okay"; +}; + +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + +&hdmi { + ddc-i2c-bus = <&i2c3>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_cec>; + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + rk808: pmic@1b { + compatible = "rockchip,rk808"; + reg = <0x1b>; + interrupt-parent = <&gpio1>; + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; + wakeup-source; + #clock-cells = <1>; + clock-output-names = "xin32k", "rk808-clkout2"; + + vcc1-supply = <&vcc3v3_sys>; + vcc2-supply = <&vcc3v3_sys>; + vcc3-supply = <&vcc3v3_sys>; + vcc4-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc3v3_sys>; + vcc7-supply = <&vcc3v3_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc3v3_sys>; + vcc10-supply = <&vcc3v3_sys>; + vcc11-supply = <&vcc3v3_sys>; + vcc12-supply = <&vcc3v3_sys>; + vddio-supply = <&vcc_3v0>; + + regulators { + vdd_center: DCDC_REG1 { + regulator-name = "vdd_center"; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_l: DCDC_REG2 { + regulator-name = "vdd_cpu_l"; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG4 { + regulator-name = "vcc_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc1v8_dvp: LDO_REG1 { + regulator-name = "vcc1v8_dvp"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc2v8_dvp: LDO_REG2 { + regulator-name = "vcc2v8_dvp"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc1v8_pmu: LDO_REG3 { + regulator-name = "vcc1v8_pmu"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc_sdio: LDO_REG4 { + regulator-name = "vcc_sdio"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3000000>; + }; + }; + + vcca3v0_codec: LDO_REG5 { + regulator-name = "vcca3v0_codec"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v5: LDO_REG6 { + regulator-name = "vcc_1v5"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1500000>; + }; + }; + + vcca1v8_codec: LDO_REG7 { + regulator-name = "vcca1v8_codec"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v0: LDO_REG8 { + regulator-name = "vcc_3v0"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3000000>; + }; + }; + + vcc3v3_s3: vcc_lan: SWITCH_REG1 { + regulator-name = "vcc3v3_s3"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_s0: SWITCH_REG2 { + regulator-name = "vcc3v3_s0"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; + + vdd_cpu_b: regulator@40 { + compatible = "silergy,syr827"; + reg = <0x40>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu_b"; + pinctrl-names = "default"; + pinctrl-0 = <&vsel1_pin>; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc3v3_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: regulator@41 { + compatible = "silergy,syr828"; + reg = <0x41>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_gpu"; + pinctrl-names = "default"; + pinctrl-0 = <&vsel2_pin>; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc3v3_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c1 { + i2c-scl-rising-time-ns = <300>; + i2c-scl-falling-time-ns = <15>; + status = "okay"; + + rt5651: audio-codec@1a { + compatible = "rockchip,rt5651"; + reg = <0x1a>; + clocks = <&cru SCLK_I2S_8CH_OUT>; + clock-names = "mclk"; + hp-det-gpio = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>; + spk-con-gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; + #sound-dai-cells = <0>; + }; + +}; + +&i2c3 { + i2c-scl-rising-time-ns = <450>; + i2c-scl-falling-time-ns = <15>; + status = "okay"; +}; + +&i2c4 { + i2c-scl-rising-time-ns = <600>; + i2c-scl-falling-time-ns = <20>; + status = "okay"; + + fusb0: typec-portc@22 { + compatible = "fcs,fusb302"; + reg = <0x22>; + interrupt-parent = <&gpio1>; + interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&fusb0_int>; + vbus-supply = <&vcc5v0_typec>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + usbc0_role_sw: endpoint@0 { + remote-endpoint = <&dwc3_0_role_switch>; + }; + }; + }; + + connector { + compatible = "usb-c-connector"; + data-role = "dual"; + label = "USB-C"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usbc_hs: endpoint { + remote-endpoint = <&u2phy0_typec_hs>; + }; + }; + + port@1 { + reg = <1>; + + usbc_ss: endpoint { + remote-endpoint = <&tcphy0_typec_ss>; + }; + }; + }; + }; + }; +}; + +&i2s1 { + rockchip,playback-channels = <2>; + rockchip,capture-channels = <2>; + status = "okay"; +}; + +&i2s2 { + status = "okay"; +}; + +&io_domains { + status = "okay"; + + audio-supply = <&vcca1v8_codec>; + bt656-supply = <&vcc_3v0>; + gpio1830-supply = <&vcc_3v0>; + sdmmc-supply = <&vcc_sdio>; +}; + +&pmu_io_domains { + status = "okay"; + + pmu1830-supply = <&vcc_3v0>; +}; + +&pinctrl { + buttons { + pwrbtn: pwrbtn { + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + bt { + bt_enable_h: bt-enable-h { + rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bt_host_wake_l: bt-host-wake-l { + rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bt_wake_l: bt-wake-l { + rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + fusb302x { + fusb0_int: fusb0-int { + rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + lcd-panel { + lcd_panel_reset: lcd-panel-reset { + rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + leds { + work_led_pin: work-led-pin { + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + user_led_pin: user-led-pin { + rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + heartbeat_led_pin: heartbeat-led-pin { + rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + wlan_active_led_pin: wlan-led-pin { + rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bt_active_led_pin: bt-led-pin { + rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + vsel1_pin: vsel1-pin { + rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + vsel2_pin: vsel2-pin { + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + rt5651 { + rt5651_hpcon: rt5640-hpcon { + rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb-typec { + vcc5v0_typec_en: vcc5v0_typec_en { + rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + usb2 { + vcc5v0_host3_en: vcc5v0-host3-en { + rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + vcc5v0_host1_en: vcc5v0-host1-en { + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + wifi { + wifi_host_wake_l: wifi-host-wake-l { + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pwm0 { + status = "okay"; +}; + +&saradc { + vref-supply = <&vcca1v8_s3>; + status = "okay"; +}; + +&sdio0 { + /* WiFi & BT combo module AMPAK AP6255 */ + #address-cells = <1>; + #size-cells = <0>; + bus-width = <4>; + clock-frequency = <50000000>; + cap-sdio-irq; + cap-sd-highspeed; + keep-power-in-suspend; + mmc-pwrseq = <&sdio_pwrseq>; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; + sd-uhs-sdr104; + status = "okay"; + + brcmf: wifi@1 { + compatible = "brcm,bcm4329-fmac"; + reg = <1>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>; + interrupt-names = "host-wake"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_host_wake_l>; + }; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; + disable-wp; + max-frequency = <150000000>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + non-removable; + status = "okay"; +}; + +&tcphy0 { + status = "okay"; +}; + +&tcphy0_usb3 { + orientation-switch; + port { + tcphy0_typec_ss: endpoint { + remote-endpoint = <&usbc_ss>; + }; + }; +}; + +&tcphy1 { + status = "okay"; +}; + +&tsadc { + /* tshut mode 0:CRU 1:GPIO */ + rockchip,hw-tshut-mode = <1>; + /* tshut polarity 0:LOW 1:HIGH */ + rockchip,hw-tshut-polarity = <1>; + status = "okay"; +}; + +&u2phy0 { + status = "okay"; + + u2phy0_otg: otg-port { + status = "okay"; + }; + + u2phy0_host: host-port { + phy-supply = <&vcc5v0_host3>; + status = "okay"; + }; + + port { + u2phy0_typec_hs: endpoint { + remote-endpoint = <&usbc_hs>; + }; + }; +}; + +&u2phy1 { + status = "okay"; + + u2phy1_otg: otg-port { + status = "okay"; + }; + + u2phy1_host: host-port { + phy-supply = <&vcc5v0_host3>; + status = "okay"; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; + status = "okay"; + + bluetooth { + compatible = "brcm,bcm4345c5"; + clocks = <&rk808 1>; + clock-names = "lpo"; + device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; + host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; + shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; + max-speed = <1500000>; + pinctrl-names = "default"; + pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; + vbat-supply = <&vcc3v3_sys>; + vddio-supply = <&vcc_1v8>; + }; +}; + +&uart2 { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usbdrd3_0 { + status = "okay"; +}; + +&usbdrd_dwc3_0 { + status = "okay"; + usb-role-switch; + + port { + #address-cells = <1>; + #size-cells = <0>; + dwc3_0_role_switch: endpoint@0 { + reg = <0>; + remote-endpoint = <&usbc0_role_sw>; + }; + }; +}; + +&usbdrd3_1 { + status = "okay"; +}; + +&usbdrd_dwc3_1 { + status = "okay"; + dr_mode = "host"; +}; + +&vopb { + status = "okay"; +}; + +&vopb_mmu { + status = "okay"; +}; + +&vopl { + status = "okay"; +}; + +&vopl_mmu { + status = "okay"; +}; diff --git a/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi b/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi index e0476ab25c9..f8335c74a74 100644 --- a/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi +++ b/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi @@ -14,7 +14,7 @@ / { config { - u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */ + u-boot,spl-payload-offset = <0x80000>; /* @ 512KB */ u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */ u-boot,efi-partition-entries-offset = <0x200000>; /* 2MB */ u-boot,boot-led = "module_led"; @@ -31,24 +31,6 @@ spi5 = &spi5; }; - /* - * The Qseven BIOS_DISABLE signal on the RK3399-Q7 keeps the on-module - * eMMC and SPI flash powered-down initially (in fact it keeps the - * reset signal asserted). Even though it is an enable signal, we - * model this as a regulator. - */ - bios_enable: bios_enable { - compatible = "regulator-fixed"; - u-boot,dm-pre-reloc; - regulator-name = "bios_enable"; - enable-active-high; - gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - vdd_log: vdd-log { compatible = "pwm-regulator"; pwms = <&pwm2 0 25000 1>; @@ -62,14 +44,69 @@ }; }; +&binman { + simple-bin { + blob { + offset = <((CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR - 64) * 512)>; + }; + }; + +#ifdef CONFIG_ROCKCHIP_SPI_IMAGE + simple-bin-spi { + blob { + /* same as u-boot,spl-payload-offset */ + offset = <0x80000>; + }; + }; +#endif +}; + &gpio1 { u-boot,dm-pre-reloc; }; &gpio3 { u-boot,dm-pre-reloc; + + /* + * The Qseven BIOS_DISABLE signal on the RK3399-Q7 keeps the on-module + * eMMC and SPI flash powered-down initially (in fact it keeps the + * reset signal asserted). BIOS_DISABLE_OVERRIDE pin allows to re-enable + * eMMC and SPI after the SPL has been booted from SD Card. + */ + bios_disable_override { + u-boot,dm-pre-reloc; + gpios = <RK_PD5 GPIO_ACTIVE_LOW>; + output-high; + line-name = "bios_disable_override"; + gpio-hog; + }; +}; + +&gpio4 { + u-boot,dm-pre-reloc; }; &norflash { u-boot,dm-pre-reloc; }; + +&pcfg_pull_none { + u-boot,dm-pre-reloc; +}; + +&pcfg_pull_up { + u-boot,dm-pre-reloc; +}; + +&sdmmc_bus4 { + u-boot,dm-pre-reloc; +}; + +&sdmmc_clk { + u-boot,dm-pre-reloc; +}; + +&sdmmc_cmd { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/rk3566.dtsi b/arch/arm/dts/rk3566.dtsi new file mode 100644 index 00000000000..6c4b17d27bd --- /dev/null +++ b/arch/arm/dts/rk3566.dtsi @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +#include "rk356x.dtsi" + +/ { + compatible = "rockchip,rk3566"; +}; + +&pipegrf { + compatible = "rockchip,rk3566-pipe-grf", "syscon"; +}; + +&power { + power-domain@RK3568_PD_PIPE { + reg = <RK3568_PD_PIPE>; + clocks = <&cru PCLK_PIPE>; + pm_qos = <&qos_pcie2x1>, + <&qos_sata1>, + <&qos_sata2>, + <&qos_usb3_0>, + <&qos_usb3_1>; + #power-domain-cells = <0>; + }; +}; + +&usb_host0_xhci { + phys = <&usb2phy0_otg>; + phy-names = "usb2-phy"; + extcon = <&usb2phy0>; + maximum-speed = "high-speed"; +}; + +&vop { + compatible = "rockchip,rk3566-vop"; +}; diff --git a/arch/arm/dts/rk3568-evb-u-boot.dtsi b/arch/arm/dts/rk3568-evb-u-boot.dtsi index b03cbeaedf9..17503d3d275 100644 --- a/arch/arm/dts/rk3568-evb-u-boot.dtsi +++ b/arch/arm/dts/rk3568-evb-u-boot.dtsi @@ -3,7 +3,7 @@ * (C) Copyright 2021 Rockchip Electronics Co., Ltd */ -#include "rk3568-u-boot.dtsi" +#include "rk356x-u-boot.dtsi" / { chosen { diff --git a/arch/arm/dts/rk3568-pinctrl.dtsi b/arch/arm/dts/rk3568-pinctrl.dtsi index a588ca95ace..8f90c66dd9e 100644 --- a/arch/arm/dts/rk3568-pinctrl.dtsi +++ b/arch/arm/dts/rk3568-pinctrl.dtsi @@ -3108,4 +3108,13 @@ <4 RK_PA0 3 &pcfg_pull_none_drv_level_2>; }; }; + + tsadc { + /omit-if-no-ref/ + tsadc_pin: tsadc-pin { + rockchip,pins = + /* tsadc_pin */ + <0 RK_PA1 0 &pcfg_pull_none>; + }; + }; }; diff --git a/arch/arm/dts/rk3568.dtsi b/arch/arm/dts/rk3568.dtsi index 12a071e6790..2bdf8c7e976 100644 --- a/arch/arm/dts/rk3568.dtsi +++ b/arch/arm/dts/rk3568.dtsi @@ -3,777 +3,141 @@ * Copyright (c) 2021 Rockchip Electronics Co., Ltd. */ -#include <dt-bindings/clock/rk3568-cru.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/phy/phy.h> -#include <dt-bindings/pinctrl/rockchip.h> -#include <dt-bindings/soc/rockchip,boot-mode.h> -#include <dt-bindings/thermal/thermal.h> +#include "rk356x.dtsi" / { compatible = "rockchip,rk3568"; - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - gpio0 = &gpio0; - gpio1 = &gpio1; - gpio2 = &gpio2; - gpio3 = &gpio3; - gpio4 = &gpio4; - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &i2c4; - i2c5 = &i2c5; - serial0 = &uart0; - serial1 = &uart1; - serial2 = &uart2; - serial3 = &uart3; - serial4 = &uart4; - serial5 = &uart5; - serial6 = &uart6; - serial7 = &uart7; - serial8 = &uart8; - serial9 = &uart9; - }; - - cpus { - #address-cells = <2>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x0>; - clocks = <&scmi_clk 0>; - enable-method = "psci"; - operating-points-v2 = <&cpu0_opp_table>; - }; - - cpu1: cpu@100 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x100>; - enable-method = "psci"; - operating-points-v2 = <&cpu0_opp_table>; - }; - - cpu2: cpu@200 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x200>; - enable-method = "psci"; - operating-points-v2 = <&cpu0_opp_table>; - }; - - cpu3: cpu@300 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x300>; - enable-method = "psci"; - operating-points-v2 = <&cpu0_opp_table>; - }; - }; - - cpu0_opp_table: cpu0-opp-table { - compatible = "operating-points-v2"; - opp-shared; - - opp-408000000 { - opp-hz = /bits/ 64 <408000000>; - opp-microvolt = <900000 900000 1150000>; - clock-latency-ns = <40000>; - }; - - opp-600000000 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <900000 900000 1150000>; - }; - - opp-816000000 { - opp-hz = /bits/ 64 <816000000>; - opp-microvolt = <900000 900000 1150000>; - opp-suspend; - }; - - opp-1104000000 { - opp-hz = /bits/ 64 <1104000000>; - opp-microvolt = <900000 900000 1150000>; - }; - - opp-1416000000 { - opp-hz = /bits/ 64 <1416000000>; - opp-microvolt = <900000 900000 1150000>; - }; - - opp-1608000000 { - opp-hz = /bits/ 64 <1608000000>; - opp-microvolt = <975000 975000 1150000>; - }; - - opp-1800000000 { - opp-hz = /bits/ 64 <1800000000>; - opp-microvolt = <1050000 1050000 1150000>; - }; - - opp-1992000000 { - opp-hz = /bits/ 64 <1992000000>; - opp-microvolt = <1150000 1150000 1150000>; - }; - }; - - firmware { - scmi: scmi { - compatible = "arm,scmi-smc"; - arm,smc-id = <0x82000010>; - shmem = <&scmi_shmem>; - #address-cells = <1>; - #size-cells = <0>; - - scmi_clk: protocol@14 { - reg = <0x14>; - #clock-cells = <1>; - }; - }; - - }; - - pmu { - compatible = "arm,cortex-a55-pmu"; - interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>, - <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>, - <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>, - <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>; - arm,no-tick-in-suspend; - }; - - xin24m: xin24m { - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "xin24m"; - #clock-cells = <0>; - }; - - xin32k: xin32k { - compatible = "fixed-clock"; - clock-frequency = <32768>; - clock-output-names = "xin32k"; - pinctrl-0 = <&clk32k_out0>; - pinctrl-names = "default"; - #clock-cells = <0>; - }; - - sram@10f000 { - compatible = "mmio-sram"; - reg = <0x0 0x0010f000 0x0 0x100>; - - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x0 0x0010f000 0x100>; - - scmi_shmem: sram@0 { - compatible = "arm,scmi-shmem"; - reg = <0x0 0x100>; - }; - }; - - gic: interrupt-controller@fd400000 { - compatible = "arm,gic-v3"; - reg = <0x0 0xfd400000 0 0x10000>, /* GICD */ - <0x0 0xfd460000 0 0x80000>; /* GICR */ - interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; - interrupt-controller; - #interrupt-cells = <3>; - mbi-alias = <0x0 0xfd100000>; - mbi-ranges = <296 24>; - msi-controller; - }; - - pmugrf: syscon@fdc20000 { - compatible = "rockchip,rk3568-pmugrf", "syscon", "simple-mfd"; - reg = <0x0 0xfdc20000 0x0 0x10000>; - }; - - grf: syscon@fdc60000 { - compatible = "rockchip,rk3568-grf", "syscon", "simple-mfd"; - reg = <0x0 0xfdc60000 0x0 0x10000>; - }; - - pmucru: clock-controller@fdd00000 { - compatible = "rockchip,rk3568-pmucru"; - reg = <0x0 0xfdd00000 0x0 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - cru: clock-controller@fdd20000 { - compatible = "rockchip,rk3568-cru"; - reg = <0x0 0xfdd20000 0x0 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - i2c0: i2c@fdd40000 { - compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xfdd40000 0x0 0x1000>; - interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&pmucru CLK_I2C0>, <&pmucru PCLK_I2C0>; - clock-names = "i2c", "pclk"; - pinctrl-0 = <&i2c0_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; + sata0: sata@fc000000 { + compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci"; + reg = <0 0xfc000000 0 0x1000>; + clocks = <&cru ACLK_SATA0>, <&cru CLK_SATA0_PMALIVE>, + <&cru CLK_SATA0_RXOOB>; + clock-names = "sata", "pmalive", "rxoob"; + interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; + phys = <&combphy0 PHY_TYPE_SATA>; + phy-names = "sata-phy"; + ports-implemented = <0x1>; + power-domains = <&power RK3568_PD_PIPE>; status = "disabled"; }; - uart0: serial@fdd50000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfdd50000 0x0 0x100>; - interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&pmucru SCLK_UART0>, <&pmucru PCLK_UART0>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 0>, <&dmac0 1>; - pinctrl-0 = <&uart0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; + pipe_phy_grf0: syscon@fdc70000 { + compatible = "rockchip,rk3568-pipe-phy-grf", "syscon"; + reg = <0x0 0xfdc70000 0x0 0x1000>; }; - pwm0: pwm@fdd70000 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfdd70000 0x0 0x10>; - clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm0m0_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; + qos_pcie3x1: qos@fe190080 { + compatible = "rockchip,rk3568-qos", "syscon"; + reg = <0x0 0xfe190080 0x0 0x20>; }; - pwm1: pwm@fdd70010 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfdd70010 0x0 0x10>; - clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm1m0_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; + qos_pcie3x2: qos@fe190100 { + compatible = "rockchip,rk3568-qos", "syscon"; + reg = <0x0 0xfe190100 0x0 0x20>; }; - pwm2: pwm@fdd70020 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfdd70020 0x0 0x10>; - clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm2m0_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; + qos_sata0: qos@fe190200 { + compatible = "rockchip,rk3568-qos", "syscon"; + reg = <0x0 0xfe190200 0x0 0x20>; }; - pwm3: pwm@fdd70030 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfdd70030 0x0 0x10>; - clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm3_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; - }; - - sdmmc2: mmc@fe000000 { - compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; - reg = <0x0 0xfe000000 0x0 0x4000>; - interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_SDMMC2>, <&cru CLK_SDMMC2>, - <&cru SCLK_SDMMC2_DRV>, <&cru SCLK_SDMMC2_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - max-frequency = <150000000>; - resets = <&cru SRST_SDMMC2>; - reset-names = "reset"; - status = "disabled"; - }; - - sdmmc0: mmc@fe2b0000 { - compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; - reg = <0x0 0xfe2b0000 0x0 0x4000>; - interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_SDMMC0>, <&cru CLK_SDMMC0>, - <&cru SCLK_SDMMC0_DRV>, <&cru SCLK_SDMMC0_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - max-frequency = <150000000>; - resets = <&cru SRST_SDMMC0>; - reset-names = "reset"; - status = "disabled"; - }; - - sdmmc1: mmc@fe2c0000 { - compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; - reg = <0x0 0xfe2c0000 0x0 0x4000>; - interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_SDMMC1>, <&cru CLK_SDMMC1>, - <&cru SCLK_SDMMC1_DRV>, <&cru SCLK_SDMMC1_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - max-frequency = <150000000>; - resets = <&cru SRST_SDMMC1>; - reset-names = "reset"; - status = "disabled"; - }; - - sdhci: mmc@fe310000 { - compatible = "rockchip,rk3568-dwcmshc"; - reg = <0x0 0xfe310000 0x0 0x10000>; - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; - assigned-clocks = <&cru BCLK_EMMC>, <&cru TCLK_EMMC>; - assigned-clock-rates = <200000000>, <24000000>; - clocks = <&cru CCLK_EMMC>, <&cru HCLK_EMMC>, - <&cru ACLK_EMMC>, <&cru BCLK_EMMC>, - <&cru TCLK_EMMC>; - clock-names = "core", "bus", "axi", "block", "timer"; - status = "disabled"; - }; - - dmac0: dmac@fe530000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xfe530000 0x0 0x4000>; - interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; - arm,pl330-periph-burst; - clocks = <&cru ACLK_BUS>; - clock-names = "apb_pclk"; - #dma-cells = <1>; - }; - - dmac1: dmac@fe550000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xfe550000 0x0 0x4000>; - interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; - arm,pl330-periph-burst; - clocks = <&cru ACLK_BUS>; - clock-names = "apb_pclk"; - #dma-cells = <1>; - }; - - i2c1: i2c@fe5a0000 { - compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xfe5a0000 0x0 0x1000>; - interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru CLK_I2C1>, <&cru PCLK_I2C1>; - clock-names = "i2c", "pclk"; - pinctrl-0 = <&i2c1_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c2: i2c@fe5b0000 { - compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xfe5b0000 0x0 0x1000>; - interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru CLK_I2C2>, <&cru PCLK_I2C2>; - clock-names = "i2c", "pclk"; - pinctrl-0 = <&i2c2m0_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c3: i2c@fe5c0000 { - compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xfe5c0000 0x0 0x1000>; - interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru CLK_I2C3>, <&cru PCLK_I2C3>; - clock-names = "i2c", "pclk"; - pinctrl-0 = <&i2c3m0_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c4: i2c@fe5d0000 { - compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xfe5d0000 0x0 0x1000>; - interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru CLK_I2C4>, <&cru PCLK_I2C4>; - clock-names = "i2c", "pclk"; - pinctrl-0 = <&i2c4m0_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c5: i2c@fe5e0000 { - compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xfe5e0000 0x0 0x1000>; - interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru CLK_I2C5>, <&cru PCLK_I2C5>; - clock-names = "i2c", "pclk"; - pinctrl-0 = <&i2c5m0_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - wdt: watchdog@fe600000 { - compatible = "rockchip,rk3568-wdt", "snps,dw-wdt"; - reg = <0x0 0xfe600000 0x0 0x100>; - interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru TCLK_WDT_NS>, <&cru PCLK_WDT_NS>; - clock-names = "tclk", "pclk"; - }; - - uart1: serial@fe650000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfe650000 0x0 0x100>; - interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 2>, <&dmac0 3>; - pinctrl-0 = <&uart1m0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart2: serial@fe660000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfe660000 0x0 0x100>; - interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 4>, <&dmac0 5>; - pinctrl-0 = <&uart2m0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart3: serial@fe670000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfe670000 0x0 0x100>; - interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 6>, <&dmac0 7>; - pinctrl-0 = <&uart3m0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart4: serial@fe680000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfe680000 0x0 0x100>; - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 8>, <&dmac0 9>; - pinctrl-0 = <&uart4m0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart5: serial@fe690000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfe690000 0x0 0x100>; - interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 10>, <&dmac0 11>; - pinctrl-0 = <&uart5m0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart6: serial@fe6a0000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfe6a0000 0x0 0x100>; - interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_UART6>, <&cru PCLK_UART6>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 12>, <&dmac0 13>; - pinctrl-0 = <&uart6m0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart7: serial@fe6b0000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfe6b0000 0x0 0x100>; - interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_UART7>, <&cru PCLK_UART7>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 14>, <&dmac0 15>; - pinctrl-0 = <&uart7m0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart8: serial@fe6c0000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfe6c0000 0x0 0x100>; - interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_UART8>, <&cru PCLK_UART8>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 16>, <&dmac0 17>; - pinctrl-0 = <&uart8m0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart9: serial@fe6d0000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfe6d0000 0x0 0x100>; - interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_UART9>, <&cru PCLK_UART9>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 18>, <&dmac0 19>; - pinctrl-0 = <&uart9m0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - pwm4: pwm@fe6e0000 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe6e0000 0x0 0x10>; - clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm4_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm5: pwm@fe6e0010 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe6e0010 0x0 0x10>; - clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm5_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm6: pwm@fe6e0020 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe6e0020 0x0 0x10>; - clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm6_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm7: pwm@fe6e0030 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe6e0030 0x0 0x10>; - clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm7_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; + gmac0: ethernet@fe2a0000 { + compatible = "rockchip,rk3568-gmac", "snps,dwmac-4.20a"; + reg = <0x0 0xfe2a0000 0x0 0x10000>; + interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq", "eth_wake_irq"; + clocks = <&cru SCLK_GMAC0>, <&cru SCLK_GMAC0_RX_TX>, + <&cru SCLK_GMAC0_RX_TX>, <&cru CLK_MAC0_REFOUT>, + <&cru ACLK_GMAC0>, <&cru PCLK_GMAC0>, + <&cru SCLK_GMAC0_RX_TX>, <&cru CLK_GMAC0_PTP_REF>; + clock-names = "stmmaceth", "mac_clk_rx", + "mac_clk_tx", "clk_mac_refout", + "aclk_mac", "pclk_mac", + "clk_mac_speed", "ptp_ref"; + resets = <&cru SRST_A_GMAC0>; + reset-names = "stmmaceth"; + rockchip,grf = <&grf>; + snps,axi-config = <&gmac0_stmmac_axi_setup>; + snps,mixed-burst; + snps,mtl-rx-config = <&gmac0_mtl_rx_setup>; + snps,mtl-tx-config = <&gmac0_mtl_tx_setup>; + snps,tso; status = "disabled"; - }; - pwm8: pwm@fe6f0000 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe6f0000 0x0 0x10>; - clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm8m0_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; - }; + mdio0: mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <0x1>; + #size-cells = <0x0>; + }; - pwm9: pwm@fe6f0010 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe6f0010 0x0 0x10>; - clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm9m0_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; - }; + gmac0_stmmac_axi_setup: stmmac-axi-config { + snps,blen = <0 0 0 0 16 8 4>; + snps,rd_osr_lmt = <8>; + snps,wr_osr_lmt = <4>; + }; - pwm10: pwm@fe6f0020 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe6f0020 0x0 0x10>; - clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm10m0_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; - }; + gmac0_mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use = <1>; + queue0 {}; + }; - pwm11: pwm@fe6f0030 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe6f0030 0x0 0x10>; - clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm11m0_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; + gmac0_mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use = <1>; + queue0 {}; + }; }; - pwm12: pwm@fe700000 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe700000 0x0 0x10>; - clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm12m0_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; + combphy0: phy@fe820000 { + compatible = "rockchip,rk3568-naneng-combphy"; + reg = <0x0 0xfe820000 0x0 0x100>; + clocks = <&pmucru CLK_PCIEPHY0_REF>, + <&cru PCLK_PIPEPHY0>, + <&cru PCLK_PIPE>; + clock-names = "ref", "apb", "pipe"; + assigned-clocks = <&pmucru CLK_PCIEPHY0_REF>; + assigned-clock-rates = <100000000>; + resets = <&cru SRST_PIPEPHY0>; + rockchip,pipe-grf = <&pipegrf>; + rockchip,pipe-phy-grf = <&pipe_phy_grf0>; + #phy-cells = <1>; status = "disabled"; }; +}; - pwm13: pwm@fe700010 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe700010 0x0 0x10>; - clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm13m0_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; +&cpu0_opp_table { + opp-1992000000 { + opp-hz = /bits/ 64 <1992000000>; + opp-microvolt = <1150000 1150000 1150000>; }; +}; - pwm14: pwm@fe700020 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe700020 0x0 0x10>; - clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm14m0_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; - }; +&pipegrf { + compatible = "rockchip,rk3568-pipe-grf", "syscon"; +}; - pwm15: pwm@fe700030 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe700030 0x0 0x10>; - clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm15m0_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; +&power { + power-domain@RK3568_PD_PIPE { + reg = <RK3568_PD_PIPE>; + clocks = <&cru PCLK_PIPE>; + pm_qos = <&qos_pcie2x1>, + <&qos_pcie3x1>, + <&qos_pcie3x2>, + <&qos_sata0>, + <&qos_sata1>, + <&qos_sata2>, + <&qos_usb3_0>, + <&qos_usb3_1>; + #power-domain-cells = <0>; }; +}; - pinctrl: pinctrl { - compatible = "rockchip,rk3568-pinctrl"; - rockchip,grf = <&grf>; - rockchip,pmu = <&pmugrf>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - gpio0: gpio@fdd60000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xfdd60000 0x0 0x100>; - interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio1: gpio@fe740000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xfe740000 0x0 0x100>; - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio2: gpio@fe750000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xfe750000 0x0 0x100>; - interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio3: gpio@fe760000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xfe760000 0x0 0x100>; - interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio4: gpio@fe770000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xfe770000 0x0 0x100>; - interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - }; +&usb_host0_xhci { + phys = <&usb2phy0_otg>, <&combphy0 PHY_TYPE_USB3>; + phy-names = "usb2-phy", "usb3-phy"; }; -#include "rk3568-pinctrl.dtsi" +&vop { + compatible = "rockchip,rk3568-vop"; +}; diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi index fa9b6ae23b9..ccb8db0001a 100644 --- a/arch/arm/dts/rk3568-u-boot.dtsi +++ b/arch/arm/dts/rk356x-u-boot.dtsi @@ -42,15 +42,12 @@ status = "okay"; }; -&sdmmc0 { +&sdhci { u-boot,dm-spl; status = "okay"; }; -&sdhci { - bus-width = <8>; +&sdmmc0 { u-boot,dm-spl; - mmc-hs200-1_8v; status = "okay"; }; - diff --git a/arch/arm/dts/rk356x.dtsi b/arch/arm/dts/rk356x.dtsi new file mode 100644 index 00000000000..319981c3e9f --- /dev/null +++ b/arch/arm/dts/rk356x.dtsi @@ -0,0 +1,1706 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2021 Rockchip Electronics Co., Ltd. + */ + +#include <dt-bindings/clock/rk3568-cru.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/phy/phy.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include <dt-bindings/power/rk3568-power.h> +#include <dt-bindings/soc/rockchip,boot-mode.h> +#include <dt-bindings/thermal/thermal.h> + +/ { + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; + gpio4 = &gpio4; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + serial5 = &uart5; + serial6 = &uart6; + serial7 = &uart7; + serial8 = &uart8; + serial9 = &uart9; + spi0 = &spi0; + spi1 = &spi1; + spi2 = &spi2; + spi3 = &spi3; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0 0x0>; + clocks = <&scmi_clk 0>; + #cooling-cells = <2>; + enable-method = "psci"; + operating-points-v2 = <&cpu0_opp_table>; + }; + + cpu1: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0 0x100>; + #cooling-cells = <2>; + enable-method = "psci"; + operating-points-v2 = <&cpu0_opp_table>; + }; + + cpu2: cpu@200 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0 0x200>; + #cooling-cells = <2>; + enable-method = "psci"; + operating-points-v2 = <&cpu0_opp_table>; + }; + + cpu3: cpu@300 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0 0x300>; + #cooling-cells = <2>; + enable-method = "psci"; + operating-points-v2 = <&cpu0_opp_table>; + }; + }; + + cpu0_opp_table: opp-table-0 { + compatible = "operating-points-v2"; + opp-shared; + + opp-408000000 { + opp-hz = /bits/ 64 <408000000>; + opp-microvolt = <900000 900000 1150000>; + clock-latency-ns = <40000>; + }; + + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <900000 900000 1150000>; + }; + + opp-816000000 { + opp-hz = /bits/ 64 <816000000>; + opp-microvolt = <900000 900000 1150000>; + opp-suspend; + }; + + opp-1104000000 { + opp-hz = /bits/ 64 <1104000000>; + opp-microvolt = <900000 900000 1150000>; + }; + + opp-1416000000 { + opp-hz = /bits/ 64 <1416000000>; + opp-microvolt = <900000 900000 1150000>; + }; + + opp-1608000000 { + opp-hz = /bits/ 64 <1608000000>; + opp-microvolt = <975000 975000 1150000>; + }; + + opp-1800000000 { + opp-hz = /bits/ 64 <1800000000>; + opp-microvolt = <1050000 1050000 1150000>; + }; + }; + + display_subsystem: display-subsystem { + compatible = "rockchip,display-subsystem"; + ports = <&vop_out>; + }; + + firmware { + scmi: scmi { + compatible = "arm,scmi-smc"; + arm,smc-id = <0x82000010>; + shmem = <&scmi_shmem>; + #address-cells = <1>; + #size-cells = <0>; + + scmi_clk: protocol@14 { + reg = <0x14>; + #clock-cells = <1>; + }; + }; + }; + + gpu_opp_table: opp-table-1 { + compatible = "operating-points-v2"; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <825000>; + }; + + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <825000>; + }; + + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <825000>; + }; + + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <825000>; + }; + + opp-700000000 { + opp-hz = /bits/ 64 <700000000>; + opp-microvolt = <900000>; + }; + + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <1000000>; + }; + }; + + hdmi_sound: hdmi-sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "HDMI"; + simple-audio-card,format = "i2s"; + simple-audio-card,mclk-fs = <256>; + status = "disabled"; + + simple-audio-card,codec { + sound-dai = <&hdmi>; + }; + + simple-audio-card,cpu { + sound-dai = <&i2s0_8ch>; + }; + }; + + pmu { + compatible = "arm,cortex-a55-pmu"; + interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>, + <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>, + <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>, + <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>; + arm,no-tick-in-suspend; + }; + + xin24m: xin24m { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "xin24m"; + #clock-cells = <0>; + }; + + xin32k: xin32k { + compatible = "fixed-clock"; + clock-frequency = <32768>; + clock-output-names = "xin32k"; + pinctrl-0 = <&clk32k_out0>; + pinctrl-names = "default"; + #clock-cells = <0>; + }; + + sram@10f000 { + compatible = "mmio-sram"; + reg = <0x0 0x0010f000 0x0 0x100>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x0 0x0010f000 0x100>; + + scmi_shmem: sram@0 { + compatible = "arm,scmi-shmem"; + reg = <0x0 0x100>; + }; + }; + + sata1: sata@fc400000 { + compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci"; + reg = <0 0xfc400000 0 0x1000>; + clocks = <&cru ACLK_SATA1>, <&cru CLK_SATA1_PMALIVE>, + <&cru CLK_SATA1_RXOOB>; + clock-names = "sata", "pmalive", "rxoob"; + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; + phys = <&combphy1 PHY_TYPE_SATA>; + phy-names = "sata-phy"; + ports-implemented = <0x1>; + power-domains = <&power RK3568_PD_PIPE>; + status = "disabled"; + }; + + sata2: sata@fc800000 { + compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci"; + reg = <0 0xfc800000 0 0x1000>; + clocks = <&cru ACLK_SATA2>, <&cru CLK_SATA2_PMALIVE>, + <&cru CLK_SATA2_RXOOB>; + clock-names = "sata", "pmalive", "rxoob"; + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; + phys = <&combphy2 PHY_TYPE_SATA>; + phy-names = "sata-phy"; + ports-implemented = <0x1>; + power-domains = <&power RK3568_PD_PIPE>; + status = "disabled"; + }; + + usb_host0_xhci: usb@fcc00000 { + compatible = "rockchip,rk3568-dwc3", "snps,dwc3"; + reg = <0x0 0xfcc00000 0x0 0x400000>; + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru CLK_USB3OTG0_REF>, <&cru CLK_USB3OTG0_SUSPEND>, + <&cru ACLK_USB3OTG0>; + clock-names = "ref_clk", "suspend_clk", + "bus_clk"; + dr_mode = "otg"; + phy_type = "utmi_wide"; + power-domains = <&power RK3568_PD_PIPE>; + resets = <&cru SRST_USB3OTG0>; + snps,dis_u2_susphy_quirk; + status = "disabled"; + }; + + usb_host1_xhci: usb@fd000000 { + compatible = "rockchip,rk3568-dwc3", "snps,dwc3"; + reg = <0x0 0xfd000000 0x0 0x400000>; + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru CLK_USB3OTG1_REF>, <&cru CLK_USB3OTG1_SUSPEND>, + <&cru ACLK_USB3OTG1>; + clock-names = "ref_clk", "suspend_clk", + "bus_clk"; + dr_mode = "host"; + phys = <&usb2phy0_host>, <&combphy1 PHY_TYPE_USB3>; + phy-names = "usb2-phy", "usb3-phy"; + phy_type = "utmi_wide"; + power-domains = <&power RK3568_PD_PIPE>; + resets = <&cru SRST_USB3OTG1>; + snps,dis_u2_susphy_quirk; + status = "disabled"; + }; + + gic: interrupt-controller@fd400000 { + compatible = "arm,gic-v3"; + reg = <0x0 0xfd400000 0 0x10000>, /* GICD */ + <0x0 0xfd460000 0 0x80000>; /* GICR */ + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <3>; + mbi-alias = <0x0 0xfd410000>; + mbi-ranges = <296 24>; + msi-controller; + }; + + usb_host0_ehci: usb@fd800000 { + compatible = "generic-ehci"; + reg = <0x0 0xfd800000 0x0 0x40000>; + interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>, + <&cru PCLK_USB>; + phys = <&usb2phy1_otg>; + phy-names = "usb"; + status = "disabled"; + }; + + usb_host0_ohci: usb@fd840000 { + compatible = "generic-ohci"; + reg = <0x0 0xfd840000 0x0 0x40000>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>, + <&cru PCLK_USB>; + phys = <&usb2phy1_otg>; + phy-names = "usb"; + status = "disabled"; + }; + + usb_host1_ehci: usb@fd880000 { + compatible = "generic-ehci"; + reg = <0x0 0xfd880000 0x0 0x40000>; + interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>, + <&cru PCLK_USB>; + phys = <&usb2phy1_host>; + phy-names = "usb"; + status = "disabled"; + }; + + usb_host1_ohci: usb@fd8c0000 { + compatible = "generic-ohci"; + reg = <0x0 0xfd8c0000 0x0 0x40000>; + interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>, + <&cru PCLK_USB>; + phys = <&usb2phy1_host>; + phy-names = "usb"; + status = "disabled"; + }; + + pmugrf: syscon@fdc20000 { + compatible = "rockchip,rk3568-pmugrf", "syscon", "simple-mfd"; + reg = <0x0 0xfdc20000 0x0 0x10000>; + + pmu_io_domains: io-domains { + compatible = "rockchip,rk3568-pmu-io-voltage-domain"; + status = "disabled"; + }; + }; + + pipegrf: syscon@fdc50000 { + reg = <0x0 0xfdc50000 0x0 0x1000>; + }; + + grf: syscon@fdc60000 { + compatible = "rockchip,rk3568-grf", "syscon", "simple-mfd"; + reg = <0x0 0xfdc60000 0x0 0x10000>; + }; + + pipe_phy_grf1: syscon@fdc80000 { + compatible = "rockchip,rk3568-pipe-phy-grf", "syscon"; + reg = <0x0 0xfdc80000 0x0 0x1000>; + }; + + pipe_phy_grf2: syscon@fdc90000 { + compatible = "rockchip,rk3568-pipe-phy-grf", "syscon"; + reg = <0x0 0xfdc90000 0x0 0x1000>; + }; + + usb2phy0_grf: syscon@fdca0000 { + compatible = "rockchip,rk3568-usb2phy-grf", "syscon"; + reg = <0x0 0xfdca0000 0x0 0x8000>; + }; + + usb2phy1_grf: syscon@fdca8000 { + compatible = "rockchip,rk3568-usb2phy-grf", "syscon"; + reg = <0x0 0xfdca8000 0x0 0x8000>; + }; + + pmucru: clock-controller@fdd00000 { + compatible = "rockchip,rk3568-pmucru"; + reg = <0x0 0xfdd00000 0x0 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + cru: clock-controller@fdd20000 { + compatible = "rockchip,rk3568-cru"; + reg = <0x0 0xfdd20000 0x0 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; + #clock-cells = <1>; + #reset-cells = <1>; + assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>; + assigned-clock-rates = <1200000000>, <200000000>; + rockchip,grf = <&grf>; + }; + + i2c0: i2c@fdd40000 { + compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c"; + reg = <0x0 0xfdd40000 0x0 0x1000>; + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmucru CLK_I2C0>, <&pmucru PCLK_I2C0>; + clock-names = "i2c", "pclk"; + pinctrl-0 = <&i2c0_xfer>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + uart0: serial@fdd50000 { + compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; + reg = <0x0 0xfdd50000 0x0 0x100>; + interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmucru SCLK_UART0>, <&pmucru PCLK_UART0>; + clock-names = "baudclk", "apb_pclk"; + dmas = <&dmac0 0>, <&dmac0 1>; + pinctrl-0 = <&uart0_xfer>; + pinctrl-names = "default"; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + pwm0: pwm@fdd70000 { + compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; + reg = <0x0 0xfdd70000 0x0 0x10>; + clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>; + clock-names = "pwm", "pclk"; + pinctrl-0 = <&pwm0m0_pins>; + pinctrl-names = "default"; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm1: pwm@fdd70010 { + compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; + reg = <0x0 0xfdd70010 0x0 0x10>; + clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>; + clock-names = "pwm", "pclk"; + pinctrl-0 = <&pwm1m0_pins>; + pinctrl-names = "default"; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm2: pwm@fdd70020 { + compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; + reg = <0x0 0xfdd70020 0x0 0x10>; + clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>; + clock-names = "pwm", "pclk"; + pinctrl-0 = <&pwm2m0_pins>; + pinctrl-names = "default"; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm3: pwm@fdd70030 { + compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; + reg = <0x0 0xfdd70030 0x0 0x10>; + clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>; + clock-names = "pwm", "pclk"; + pinctrl-0 = <&pwm3_pins>; + pinctrl-names = "default"; + #pwm-cells = <3>; + status = "disabled"; + }; + + pmu: power-management@fdd90000 { + compatible = "rockchip,rk3568-pmu", "syscon", "simple-mfd"; + reg = <0x0 0xfdd90000 0x0 0x1000>; + + power: power-controller { + compatible = "rockchip,rk3568-power-controller"; + #power-domain-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + + /* These power domains are grouped by VD_GPU */ + power-domain@RK3568_PD_GPU { + reg = <RK3568_PD_GPU>; + clocks = <&cru ACLK_GPU_PRE>, + <&cru PCLK_GPU_PRE>; + pm_qos = <&qos_gpu>; + #power-domain-cells = <0>; + }; + + /* These power domains are grouped by VD_LOGIC */ + power-domain@RK3568_PD_VI { + reg = <RK3568_PD_VI>; + clocks = <&cru HCLK_VI>, + <&cru PCLK_VI>; + pm_qos = <&qos_isp>, + <&qos_vicap0>, + <&qos_vicap1>; + #power-domain-cells = <0>; + }; + + power-domain@RK3568_PD_VO { + reg = <RK3568_PD_VO>; + clocks = <&cru HCLK_VO>, + <&cru PCLK_VO>, + <&cru ACLK_VOP_PRE>; + pm_qos = <&qos_hdcp>, + <&qos_vop_m0>, + <&qos_vop_m1>; + #power-domain-cells = <0>; + }; + + power-domain@RK3568_PD_RGA { + reg = <RK3568_PD_RGA>; + clocks = <&cru HCLK_RGA_PRE>, + <&cru PCLK_RGA_PRE>; + pm_qos = <&qos_ebc>, + <&qos_iep>, + <&qos_jpeg_dec>, + <&qos_jpeg_enc>, + <&qos_rga_rd>, + <&qos_rga_wr>; + #power-domain-cells = <0>; + }; + + power-domain@RK3568_PD_VPU { + reg = <RK3568_PD_VPU>; + clocks = <&cru HCLK_VPU_PRE>; + pm_qos = <&qos_vpu>; + #power-domain-cells = <0>; + }; + + power-domain@RK3568_PD_RKVDEC { + clocks = <&cru HCLK_RKVDEC_PRE>; + reg = <RK3568_PD_RKVDEC>; + pm_qos = <&qos_rkvdec>; + #power-domain-cells = <0>; + }; + + power-domain@RK3568_PD_RKVENC { + reg = <RK3568_PD_RKVENC>; + clocks = <&cru HCLK_RKVENC_PRE>; + pm_qos = <&qos_rkvenc_rd_m0>, + <&qos_rkvenc_rd_m1>, + <&qos_rkvenc_wr_m0>; + #power-domain-cells = <0>; + }; + }; + }; + + gpu: gpu@fde60000 { + compatible = "rockchip,rk3568-mali", "arm,mali-bifrost"; + reg = <0x0 0xfde60000 0x0 0x4000>; + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "job", "mmu", "gpu"; + clocks = <&scmi_clk 1>, <&cru CLK_GPU>; + clock-names = "gpu", "bus"; + #cooling-cells = <2>; + operating-points-v2 = <&gpu_opp_table>; + power-domains = <&power RK3568_PD_GPU>; + status = "disabled"; + }; + + sdmmc2: mmc@fe000000 { + compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; + reg = <0x0 0xfe000000 0x0 0x4000>; + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru HCLK_SDMMC2>, <&cru CLK_SDMMC2>, + <&cru SCLK_SDMMC2_DRV>, <&cru SCLK_SDMMC2_SAMPLE>; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; + fifo-depth = <0x100>; + max-frequency = <150000000>; + resets = <&cru SRST_SDMMC2>; + reset-names = "reset"; + status = "disabled"; + }; + + gmac1: ethernet@fe010000 { + compatible = "rockchip,rk3568-gmac", "snps,dwmac-4.20a"; + reg = <0x0 0xfe010000 0x0 0x10000>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq", "eth_wake_irq"; + clocks = <&cru SCLK_GMAC1>, <&cru SCLK_GMAC1_RX_TX>, + <&cru SCLK_GMAC1_RX_TX>, <&cru CLK_MAC1_REFOUT>, + <&cru ACLK_GMAC1>, <&cru PCLK_GMAC1>, + <&cru SCLK_GMAC1_RX_TX>, <&cru CLK_GMAC1_PTP_REF>; + clock-names = "stmmaceth", "mac_clk_rx", + "mac_clk_tx", "clk_mac_refout", + "aclk_mac", "pclk_mac", + "clk_mac_speed", "ptp_ref"; + resets = <&cru SRST_A_GMAC1>; + reset-names = "stmmaceth"; + rockchip,grf = <&grf>; + snps,axi-config = <&gmac1_stmmac_axi_setup>; + snps,mixed-burst; + snps,mtl-rx-config = <&gmac1_mtl_rx_setup>; + snps,mtl-tx-config = <&gmac1_mtl_tx_setup>; + snps,tso; + status = "disabled"; + + mdio1: mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <0x1>; + #size-cells = <0x0>; + }; + + gmac1_stmmac_axi_setup: stmmac-axi-config { + snps,blen = <0 0 0 0 16 8 4>; + snps,rd_osr_lmt = <8>; + snps,wr_osr_lmt = <4>; + }; + + gmac1_mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use = <1>; + queue0 {}; + }; + + gmac1_mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use = <1>; + queue0 {}; + }; + }; + + vop: vop@fe040000 { + reg = <0x0 0xfe040000 0x0 0x3000>, <0x0 0xfe044000 0x0 0x1000>; + reg-names = "vop", "gamma-lut"; + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>, <&cru DCLK_VOP0>, + <&cru DCLK_VOP1>, <&cru DCLK_VOP2>; + clock-names = "aclk", "hclk", "dclk_vp0", "dclk_vp1", "dclk_vp2"; + iommus = <&vop_mmu>; + power-domains = <&power RK3568_PD_VO>; + rockchip,grf = <&grf>; + status = "disabled"; + + vop_out: ports { + #address-cells = <1>; + #size-cells = <0>; + + vp0: port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + vp1: port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + + vp2: port@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + + vop_mmu: iommu@fe043e00 { + compatible = "rockchip,rk3568-iommu"; + reg = <0x0 0xfe043e00 0x0 0x100>, <0x0 0xfe043f00 0x0 0x100>; + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; + clock-names = "aclk", "iface"; + #iommu-cells = <0>; + status = "disabled"; + }; + + hdmi: hdmi@fe0a0000 { + compatible = "rockchip,rk3568-dw-hdmi"; + reg = <0x0 0xfe0a0000 0x0 0x20000>; + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru PCLK_HDMI_HOST>, + <&cru CLK_HDMI_SFR>, + <&cru CLK_HDMI_CEC>, + <&pmucru CLK_HDMI_REF>, + <&cru HCLK_VO>; + clock-names = "iahb", "isfr", "cec", "ref"; + pinctrl-names = "default"; + pinctrl-0 = <&hdmitx_scl &hdmitx_sda &hdmitxm0_cec>; + power-domains = <&power RK3568_PD_VO>; + reg-io-width = <4>; + rockchip,grf = <&grf>; + #sound-dai-cells = <0>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + hdmi_in: port@0 { + reg = <0>; + }; + + hdmi_out: port@1 { + reg = <1>; + }; + }; + }; + + qos_gpu: qos@fe128000 { + compatible = "rockchip,rk3568-qos", "syscon"; + reg = <0x0 0xfe128000 0x0 0x20>; + }; + + qos_rkvenc_rd_m0: qos@fe138080 { + compatible = "rockchip,rk3568-qos", "syscon"; + reg = <0x0 0xfe138080 0x0 0x20>; + }; + + qos_rkvenc_rd_m1: qos@fe138100 { + compatible = "rockchip,rk3568-qos", "syscon"; + reg = <0x0 0xfe138100 0x0 0x20>; + }; + + qos_rkvenc_wr_m0: qos@fe138180 { + compatible = "rockchip,rk3568-qos", "syscon"; + reg = <0x0 0xfe138180 0x0 0x20>; + }; + + qos_isp: qos@fe148000 { + compatible = "rockchip,rk3568-qos", "syscon"; + reg = <0x0 0xfe148000 0x0 0x20>; + }; + + qos_vicap0: qos@fe148080 { + compatible = "rockchip,rk3568-qos", "syscon"; + reg = <0x0 0xfe148080 0x0 0x20>; + }; + + qos_vicap1: qos@fe148100 { + compatible = "rockchip,rk3568-qos", "syscon"; + reg = <0x0 0xfe148100 0x0 0x20>; + }; + + qos_vpu: qos@fe150000 { + compatible = "rockchip,rk3568-qos", "syscon"; + reg = <0x0 0xfe150000 0x0 0x20>; + }; + + qos_ebc: qos@fe158000 { + compatible = "rockchip,rk3568-qos", "syscon"; + reg = <0x0 0xfe158000 0x0 0x20>; + }; + + qos_iep: qos@fe158100 { + compatible = "rockchip,rk3568-qos", "syscon"; + reg = <0x0 0xfe158100 0x0 0x20>; + }; + + qos_jpeg_dec: qos@fe158180 { + compatible = "rockchip,rk3568-qos", "syscon"; + reg = <0x0 0xfe158180 0x0 0x20>; + }; + + qos_jpeg_enc: qos@fe158200 { + compatible = "rockchip,rk3568-qos", "syscon"; + reg = <0x0 0xfe158200 0x0 0x20>; + }; + + qos_rga_rd: qos@fe158280 { + compatible = "rockchip,rk3568-qos", "syscon"; + reg = <0x0 0xfe158280 0x0 0x20>; + }; + + qos_rga_wr: qos@fe158300 { + compatible = "rockchip,rk3568-qos", "syscon"; + reg = <0x0 0xfe158300 0x0 0x20>; + }; + + qos_npu: qos@fe180000 { + compatible = "rockchip,rk3568-qos", "syscon"; + reg = <0x0 0xfe180000 0x0 0x20>; + }; + + qos_pcie2x1: qos@fe190000 { + compatible = "rockchip,rk3568-qos", "syscon"; + reg = <0x0 0xfe190000 0x0 0x20>; + }; + + qos_sata1: qos@fe190280 { + compatible = "rockchip,rk3568-qos", "syscon"; + reg = <0x0 0xfe190280 0x0 0x20>; + }; + + qos_sata2: qos@fe190300 { + compatible = "rockchip,rk3568-qos", "syscon"; + reg = <0x0 0xfe190300 0x0 0x20>; + }; + + qos_usb3_0: qos@fe190380 { + compatible = "rockchip,rk3568-qos", "syscon"; + reg = <0x0 0xfe190380 0x0 0x20>; + }; + + qos_usb3_1: qos@fe190400 { + compatible = "rockchip,rk3568-qos", "syscon"; + reg = <0x0 0xfe190400 0x0 0x20>; + }; + + qos_rkvdec: qos@fe198000 { + compatible = "rockchip,rk3568-qos", "syscon"; + reg = <0x0 0xfe198000 0x0 0x20>; + }; + + qos_hdcp: qos@fe1a8000 { + compatible = "rockchip,rk3568-qos", "syscon"; + reg = <0x0 0xfe1a8000 0x0 0x20>; + }; + + qos_vop_m0: qos@fe1a8080 { + compatible = "rockchip,rk3568-qos", "syscon"; + reg = <0x0 0xfe1a8080 0x0 0x20>; + }; + + qos_vop_m1: qos@fe1a8100 { + compatible = "rockchip,rk3568-qos", "syscon"; + reg = <0x0 0xfe1a8100 0x0 0x20>; + }; + + pcie2x1: pcie@fe260000 { + compatible = "rockchip,rk3568-pcie"; + reg = <0x3 0xc0000000 0x0 0x00400000>, + <0x0 0xfe260000 0x0 0x00010000>, + <0x3 0x3f000000 0x0 0x01000000>; + reg-names = "dbi", "apb", "config"; + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "sys", "pmc", "msi", "legacy", "err"; + bus-range = <0x0 0xf>; + clocks = <&cru ACLK_PCIE20_MST>, <&cru ACLK_PCIE20_SLV>, + <&cru ACLK_PCIE20_DBI>, <&cru PCLK_PCIE20>, + <&cru CLK_PCIE20_AUX_NDFT>; + clock-names = "aclk_mst", "aclk_slv", + "aclk_dbi", "pclk", "aux"; + device_type = "pci"; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie_intc 0>, + <0 0 0 2 &pcie_intc 1>, + <0 0 0 3 &pcie_intc 2>, + <0 0 0 4 &pcie_intc 3>; + linux,pci-domain = <0>; + num-ib-windows = <6>; + num-ob-windows = <2>; + max-link-speed = <2>; + msi-map = <0x0 &gic 0x0 0x1000>; + num-lanes = <1>; + phys = <&combphy2 PHY_TYPE_PCIE>; + phy-names = "pcie-phy"; + power-domains = <&power RK3568_PD_PIPE>; + ranges = <0x01000000 0x0 0x3ef00000 0x3 0x3ef00000 0x0 0x00100000 + 0x02000000 0x0 0x00000000 0x3 0x00000000 0x0 0x3ef00000>; + resets = <&cru SRST_PCIE20_POWERUP>; + reset-names = "pipe"; + #address-cells = <3>; + #size-cells = <2>; + status = "disabled"; + + pcie_intc: legacy-interrupt-controller { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 72 IRQ_TYPE_EDGE_RISING>; + }; + }; + + sdmmc0: mmc@fe2b0000 { + compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; + reg = <0x0 0xfe2b0000 0x0 0x4000>; + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru HCLK_SDMMC0>, <&cru CLK_SDMMC0>, + <&cru SCLK_SDMMC0_DRV>, <&cru SCLK_SDMMC0_SAMPLE>; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; + fifo-depth = <0x100>; + max-frequency = <150000000>; + resets = <&cru SRST_SDMMC0>; + reset-names = "reset"; + status = "disabled"; + }; + + sdmmc1: mmc@fe2c0000 { + compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; + reg = <0x0 0xfe2c0000 0x0 0x4000>; + interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru HCLK_SDMMC1>, <&cru CLK_SDMMC1>, + <&cru SCLK_SDMMC1_DRV>, <&cru SCLK_SDMMC1_SAMPLE>; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; + fifo-depth = <0x100>; + max-frequency = <150000000>; + resets = <&cru SRST_SDMMC1>; + reset-names = "reset"; + status = "disabled"; + }; + + sfc: spi@fe300000 { + compatible = "rockchip,sfc"; + reg = <0x0 0xfe300000 0x0 0x4000>; + interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>; + clock-names = "clk_sfc", "hclk_sfc"; + pinctrl-0 = <&fspi_pins>; + pinctrl-names = "default"; + status = "disabled"; + }; + + sdhci: mmc@fe310000 { + compatible = "rockchip,rk3568-dwcmshc"; + reg = <0x0 0xfe310000 0x0 0x10000>; + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; + assigned-clocks = <&cru BCLK_EMMC>, <&cru TCLK_EMMC>; + assigned-clock-rates = <200000000>, <24000000>; + clocks = <&cru CCLK_EMMC>, <&cru HCLK_EMMC>, + <&cru ACLK_EMMC>, <&cru BCLK_EMMC>, + <&cru TCLK_EMMC>; + clock-names = "core", "bus", "axi", "block", "timer"; + status = "disabled"; + }; + + spdif: spdif@fe460000 { + compatible = "rockchip,rk3568-spdif"; + reg = <0x0 0xfe460000 0x0 0x1000>; + interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "mclk", "hclk"; + clocks = <&cru MCLK_SPDIF_8CH>, <&cru HCLK_SPDIF_8CH>; + dmas = <&dmac1 1>; + dma-names = "tx"; + pinctrl-names = "default"; + pinctrl-0 = <&spdifm0_tx>; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + i2s0_8ch: i2s@fe400000 { + compatible = "rockchip,rk3568-i2s-tdm"; + reg = <0x0 0xfe400000 0x0 0x1000>; + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; + assigned-clocks = <&cru CLK_I2S0_8CH_TX_SRC>, <&cru CLK_I2S0_8CH_RX_SRC>; + assigned-clock-rates = <1188000000>, <1188000000>; + clocks = <&cru MCLK_I2S0_8CH_TX>, <&cru MCLK_I2S0_8CH_RX>, <&cru HCLK_I2S0_8CH>; + clock-names = "mclk_tx", "mclk_rx", "hclk"; + dmas = <&dmac1 0>; + dma-names = "tx"; + resets = <&cru SRST_M_I2S0_8CH_TX>, <&cru SRST_M_I2S0_8CH_RX>; + reset-names = "tx-m", "rx-m"; + rockchip,grf = <&grf>; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + i2s1_8ch: i2s@fe410000 { + compatible = "rockchip,rk3568-i2s-tdm"; + reg = <0x0 0xfe410000 0x0 0x1000>; + interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; + assigned-clocks = <&cru CLK_I2S1_8CH_TX_SRC>, <&cru CLK_I2S1_8CH_RX_SRC>; + assigned-clock-rates = <1188000000>, <1188000000>; + clocks = <&cru MCLK_I2S1_8CH_TX>, <&cru MCLK_I2S1_8CH_RX>, + <&cru HCLK_I2S1_8CH>; + clock-names = "mclk_tx", "mclk_rx", "hclk"; + dmas = <&dmac1 3>, <&dmac1 2>; + dma-names = "rx", "tx"; + resets = <&cru SRST_M_I2S1_8CH_TX>, <&cru SRST_M_I2S1_8CH_RX>; + reset-names = "tx-m", "rx-m"; + rockchip,grf = <&grf>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_sclkrx + &i2s1m0_lrcktx &i2s1m0_lrckrx + &i2s1m0_sdi0 &i2s1m0_sdi1 + &i2s1m0_sdi2 &i2s1m0_sdi3 + &i2s1m0_sdo0 &i2s1m0_sdo1 + &i2s1m0_sdo2 &i2s1m0_sdo3>; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + i2s3_2ch: i2s@fe430000 { + compatible = "rockchip,rk3568-i2s-tdm"; + reg = <0x0 0xfe430000 0x0 0x1000>; + interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru MCLK_I2S3_2CH_TX>, <&cru MCLK_I2S3_2CH_RX>, + <&cru HCLK_I2S3_2CH>; + clock-names = "mclk_tx", "mclk_rx", "hclk"; + dmas = <&dmac1 6>, <&dmac1 7>; + dma-names = "tx", "rx"; + resets = <&cru SRST_M_I2S3_2CH_TX>, <&cru SRST_M_I2S3_2CH_RX>; + reset-names = "tx-m", "rx-m"; + rockchip,grf = <&grf>; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + pdm: pdm@fe440000 { + compatible = "rockchip,rk3568-pdm"; + reg = <0x0 0xfe440000 0x0 0x1000>; + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru MCLK_PDM>, <&cru HCLK_PDM>; + clock-names = "pdm_clk", "pdm_hclk"; + dmas = <&dmac1 9>; + dma-names = "rx"; + pinctrl-0 = <&pdmm0_clk + &pdmm0_clk1 + &pdmm0_sdi0 + &pdmm0_sdi1 + &pdmm0_sdi2 + &pdmm0_sdi3>; + pinctrl-names = "default"; + resets = <&cru SRST_M_PDM>; + reset-names = "pdm-m"; + #sound-dai-cells = <0>; + status = "disabled"; + }; + + dmac0: dma-controller@fe530000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x0 0xfe530000 0x0 0x4000>; + interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; + arm,pl330-periph-burst; + clocks = <&cru ACLK_BUS>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + }; + + dmac1: dma-controller@fe550000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x0 0xfe550000 0x0 0x4000>; + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; + arm,pl330-periph-burst; + clocks = <&cru ACLK_BUS>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + }; + + i2c1: i2c@fe5a0000 { + compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c"; + reg = <0x0 0xfe5a0000 0x0 0x1000>; + interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru CLK_I2C1>, <&cru PCLK_I2C1>; + clock-names = "i2c", "pclk"; + pinctrl-0 = <&i2c1_xfer>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c2: i2c@fe5b0000 { + compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c"; + reg = <0x0 0xfe5b0000 0x0 0x1000>; + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru CLK_I2C2>, <&cru PCLK_I2C2>; + clock-names = "i2c", "pclk"; + pinctrl-0 = <&i2c2m0_xfer>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c3: i2c@fe5c0000 { + compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c"; + reg = <0x0 0xfe5c0000 0x0 0x1000>; + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru CLK_I2C3>, <&cru PCLK_I2C3>; + clock-names = "i2c", "pclk"; + pinctrl-0 = <&i2c3m0_xfer>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c4: i2c@fe5d0000 { + compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c"; + reg = <0x0 0xfe5d0000 0x0 0x1000>; + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru CLK_I2C4>, <&cru PCLK_I2C4>; + clock-names = "i2c", "pclk"; + pinctrl-0 = <&i2c4m0_xfer>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c5: i2c@fe5e0000 { + compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c"; + reg = <0x0 0xfe5e0000 0x0 0x1000>; + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru CLK_I2C5>, <&cru PCLK_I2C5>; + clock-names = "i2c", "pclk"; + pinctrl-0 = <&i2c5m0_xfer>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + wdt: watchdog@fe600000 { + compatible = "rockchip,rk3568-wdt", "snps,dw-wdt"; + reg = <0x0 0xfe600000 0x0 0x100>; + interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru TCLK_WDT_NS>, <&cru PCLK_WDT_NS>; + clock-names = "tclk", "pclk"; + }; + + spi0: spi@fe610000 { + compatible = "rockchip,rk3568-spi", "rockchip,rk3066-spi"; + reg = <0x0 0xfe610000 0x0 0x1000>; + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru CLK_SPI0>, <&cru PCLK_SPI0>; + clock-names = "spiclk", "apb_pclk"; + dmas = <&dmac0 20>, <&dmac0 21>; + dma-names = "tx", "rx"; + pinctrl-names = "default"; + pinctrl-0 = <&spi0m0_cs0 &spi0m0_cs1 &spi0m0_pins>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi1: spi@fe620000 { + compatible = "rockchip,rk3568-spi", "rockchip,rk3066-spi"; + reg = <0x0 0xfe620000 0x0 0x1000>; + interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru CLK_SPI1>, <&cru PCLK_SPI1>; + clock-names = "spiclk", "apb_pclk"; + dmas = <&dmac0 22>, <&dmac0 23>; + dma-names = "tx", "rx"; + pinctrl-names = "default"; + pinctrl-0 = <&spi1m0_cs0 &spi1m0_cs1 &spi1m0_pins>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi2: spi@fe630000 { + compatible = "rockchip,rk3568-spi", "rockchip,rk3066-spi"; + reg = <0x0 0xfe630000 0x0 0x1000>; + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru CLK_SPI2>, <&cru PCLK_SPI2>; + clock-names = "spiclk", "apb_pclk"; + dmas = <&dmac0 24>, <&dmac0 25>; + dma-names = "tx", "rx"; + pinctrl-names = "default"; + pinctrl-0 = <&spi2m0_cs0 &spi2m0_cs1 &spi2m0_pins>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi3: spi@fe640000 { + compatible = "rockchip,rk3568-spi", "rockchip,rk3066-spi"; + reg = <0x0 0xfe640000 0x0 0x1000>; + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru CLK_SPI3>, <&cru PCLK_SPI3>; + clock-names = "spiclk", "apb_pclk"; + dmas = <&dmac0 26>, <&dmac0 27>; + dma-names = "tx", "rx"; + pinctrl-names = "default"; + pinctrl-0 = <&spi3m0_cs0 &spi3m0_cs1 &spi3m0_pins>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + uart1: serial@fe650000 { + compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; + reg = <0x0 0xfe650000 0x0 0x100>; + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>; + clock-names = "baudclk", "apb_pclk"; + dmas = <&dmac0 2>, <&dmac0 3>; + pinctrl-0 = <&uart1m0_xfer>; + pinctrl-names = "default"; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart2: serial@fe660000 { + compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; + reg = <0x0 0xfe660000 0x0 0x100>; + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>; + clock-names = "baudclk", "apb_pclk"; + dmas = <&dmac0 4>, <&dmac0 5>; + pinctrl-0 = <&uart2m0_xfer>; + pinctrl-names = "default"; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart3: serial@fe670000 { + compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; + reg = <0x0 0xfe670000 0x0 0x100>; + interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>; + clock-names = "baudclk", "apb_pclk"; + dmas = <&dmac0 6>, <&dmac0 7>; + pinctrl-0 = <&uart3m0_xfer>; + pinctrl-names = "default"; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart4: serial@fe680000 { + compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; + reg = <0x0 0xfe680000 0x0 0x100>; + interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>; + clock-names = "baudclk", "apb_pclk"; + dmas = <&dmac0 8>, <&dmac0 9>; + pinctrl-0 = <&uart4m0_xfer>; + pinctrl-names = "default"; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart5: serial@fe690000 { + compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; + reg = <0x0 0xfe690000 0x0 0x100>; + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>; + clock-names = "baudclk", "apb_pclk"; + dmas = <&dmac0 10>, <&dmac0 11>; + pinctrl-0 = <&uart5m0_xfer>; + pinctrl-names = "default"; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart6: serial@fe6a0000 { + compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; + reg = <0x0 0xfe6a0000 0x0 0x100>; + interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru SCLK_UART6>, <&cru PCLK_UART6>; + clock-names = "baudclk", "apb_pclk"; + dmas = <&dmac0 12>, <&dmac0 13>; + pinctrl-0 = <&uart6m0_xfer>; + pinctrl-names = "default"; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart7: serial@fe6b0000 { + compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; + reg = <0x0 0xfe6b0000 0x0 0x100>; + interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru SCLK_UART7>, <&cru PCLK_UART7>; + clock-names = "baudclk", "apb_pclk"; + dmas = <&dmac0 14>, <&dmac0 15>; + pinctrl-0 = <&uart7m0_xfer>; + pinctrl-names = "default"; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart8: serial@fe6c0000 { + compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; + reg = <0x0 0xfe6c0000 0x0 0x100>; + interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru SCLK_UART8>, <&cru PCLK_UART8>; + clock-names = "baudclk", "apb_pclk"; + dmas = <&dmac0 16>, <&dmac0 17>; + pinctrl-0 = <&uart8m0_xfer>; + pinctrl-names = "default"; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart9: serial@fe6d0000 { + compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; + reg = <0x0 0xfe6d0000 0x0 0x100>; + interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru SCLK_UART9>, <&cru PCLK_UART9>; + clock-names = "baudclk", "apb_pclk"; + dmas = <&dmac0 18>, <&dmac0 19>; + pinctrl-0 = <&uart9m0_xfer>; + pinctrl-names = "default"; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + thermal_zones: thermal-zones { + cpu_thermal: cpu-thermal { + polling-delay-passive = <100>; + polling-delay = <1000>; + + thermal-sensors = <&tsadc 0>; + + trips { + cpu_alert0: cpu_alert0 { + temperature = <70000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_alert1: cpu_alert1 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_crit: cpu_crit { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&cpu_alert0>; + cooling-device = + <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + gpu_thermal: gpu-thermal { + polling-delay-passive = <20>; /* milliseconds */ + polling-delay = <1000>; /* milliseconds */ + + thermal-sensors = <&tsadc 1>; + + trips { + gpu_threshold: gpu-threshold { + temperature = <70000>; + hysteresis = <2000>; + type = "passive"; + }; + gpu_target: gpu-target { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + gpu_crit: gpu-crit { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&gpu_target>; + cooling-device = + <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + }; + + tsadc: tsadc@fe710000 { + compatible = "rockchip,rk3568-tsadc"; + reg = <0x0 0xfe710000 0x0 0x100>; + interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; + assigned-clocks = <&cru CLK_TSADC_TSEN>, <&cru CLK_TSADC>; + assigned-clock-rates = <17000000>, <700000>; + clocks = <&cru CLK_TSADC>, <&cru PCLK_TSADC>; + clock-names = "tsadc", "apb_pclk"; + resets = <&cru SRST_P_TSADC>, <&cru SRST_TSADC>, + <&cru SRST_TSADCPHY>; + rockchip,grf = <&grf>; + rockchip,hw-tshut-temp = <95000>; + pinctrl-names = "init", "default", "sleep"; + pinctrl-0 = <&tsadc_pin>; + pinctrl-1 = <&tsadc_shutorg>; + pinctrl-2 = <&tsadc_pin>; + #thermal-sensor-cells = <1>; + status = "disabled"; + }; + + saradc: saradc@fe720000 { + compatible = "rockchip,rk3568-saradc", "rockchip,rk3399-saradc"; + reg = <0x0 0xfe720000 0x0 0x100>; + interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>; + clock-names = "saradc", "apb_pclk"; + resets = <&cru SRST_P_SARADC>; + reset-names = "saradc-apb"; + #io-channel-cells = <1>; + status = "disabled"; + }; + + pwm4: pwm@fe6e0000 { + compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; + reg = <0x0 0xfe6e0000 0x0 0x10>; + clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; + clock-names = "pwm", "pclk"; + pinctrl-0 = <&pwm4_pins>; + pinctrl-names = "default"; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm5: pwm@fe6e0010 { + compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; + reg = <0x0 0xfe6e0010 0x0 0x10>; + clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; + clock-names = "pwm", "pclk"; + pinctrl-0 = <&pwm5_pins>; + pinctrl-names = "default"; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm6: pwm@fe6e0020 { + compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; + reg = <0x0 0xfe6e0020 0x0 0x10>; + clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; + clock-names = "pwm", "pclk"; + pinctrl-0 = <&pwm6_pins>; + pinctrl-names = "default"; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm7: pwm@fe6e0030 { + compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; + reg = <0x0 0xfe6e0030 0x0 0x10>; + clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; + clock-names = "pwm", "pclk"; + pinctrl-0 = <&pwm7_pins>; + pinctrl-names = "default"; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm8: pwm@fe6f0000 { + compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; + reg = <0x0 0xfe6f0000 0x0 0x10>; + clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>; + clock-names = "pwm", "pclk"; + pinctrl-0 = <&pwm8m0_pins>; + pinctrl-names = "default"; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm9: pwm@fe6f0010 { + compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; + reg = <0x0 0xfe6f0010 0x0 0x10>; + clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>; + clock-names = "pwm", "pclk"; + pinctrl-0 = <&pwm9m0_pins>; + pinctrl-names = "default"; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm10: pwm@fe6f0020 { + compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; + reg = <0x0 0xfe6f0020 0x0 0x10>; + clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>; + clock-names = "pwm", "pclk"; + pinctrl-0 = <&pwm10m0_pins>; + pinctrl-names = "default"; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm11: pwm@fe6f0030 { + compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; + reg = <0x0 0xfe6f0030 0x0 0x10>; + clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>; + clock-names = "pwm", "pclk"; + pinctrl-0 = <&pwm11m0_pins>; + pinctrl-names = "default"; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm12: pwm@fe700000 { + compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; + reg = <0x0 0xfe700000 0x0 0x10>; + clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>; + clock-names = "pwm", "pclk"; + pinctrl-0 = <&pwm12m0_pins>; + pinctrl-names = "default"; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm13: pwm@fe700010 { + compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; + reg = <0x0 0xfe700010 0x0 0x10>; + clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>; + clock-names = "pwm", "pclk"; + pinctrl-0 = <&pwm13m0_pins>; + pinctrl-names = "default"; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm14: pwm@fe700020 { + compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; + reg = <0x0 0xfe700020 0x0 0x10>; + clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>; + clock-names = "pwm", "pclk"; + pinctrl-0 = <&pwm14m0_pins>; + pinctrl-names = "default"; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm15: pwm@fe700030 { + compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; + reg = <0x0 0xfe700030 0x0 0x10>; + clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>; + clock-names = "pwm", "pclk"; + pinctrl-0 = <&pwm15m0_pins>; + pinctrl-names = "default"; + #pwm-cells = <3>; + status = "disabled"; + }; + + combphy1: phy@fe830000 { + compatible = "rockchip,rk3568-naneng-combphy"; + reg = <0x0 0xfe830000 0x0 0x100>; + clocks = <&pmucru CLK_PCIEPHY1_REF>, + <&cru PCLK_PIPEPHY1>, + <&cru PCLK_PIPE>; + clock-names = "ref", "apb", "pipe"; + assigned-clocks = <&pmucru CLK_PCIEPHY1_REF>; + assigned-clock-rates = <100000000>; + resets = <&cru SRST_PIPEPHY1>; + rockchip,pipe-grf = <&pipegrf>; + rockchip,pipe-phy-grf = <&pipe_phy_grf1>; + #phy-cells = <1>; + status = "disabled"; + }; + + combphy2: phy@fe840000 { + compatible = "rockchip,rk3568-naneng-combphy"; + reg = <0x0 0xfe840000 0x0 0x100>; + clocks = <&pmucru CLK_PCIEPHY2_REF>, + <&cru PCLK_PIPEPHY2>, + <&cru PCLK_PIPE>; + clock-names = "ref", "apb", "pipe"; + assigned-clocks = <&pmucru CLK_PCIEPHY2_REF>; + assigned-clock-rates = <100000000>; + resets = <&cru SRST_PIPEPHY2>; + rockchip,pipe-grf = <&pipegrf>; + rockchip,pipe-phy-grf = <&pipe_phy_grf2>; + #phy-cells = <1>; + status = "disabled"; + }; + + usb2phy0: usb2phy@fe8a0000 { + compatible = "rockchip,rk3568-usb2phy"; + reg = <0x0 0xfe8a0000 0x0 0x10000>; + clocks = <&pmucru CLK_USBPHY0_REF>; + clock-names = "phyclk"; + clock-output-names = "clk_usbphy0_480m"; + interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; + rockchip,usbgrf = <&usb2phy0_grf>; + #clock-cells = <0>; + status = "disabled"; + + usb2phy0_host: host-port { + #phy-cells = <0>; + status = "disabled"; + }; + + usb2phy0_otg: otg-port { + #phy-cells = <0>; + status = "disabled"; + }; + }; + + usb2phy1: usb2phy@fe8b0000 { + compatible = "rockchip,rk3568-usb2phy"; + reg = <0x0 0xfe8b0000 0x0 0x10000>; + clocks = <&pmucru CLK_USBPHY1_REF>; + clock-names = "phyclk"; + clock-output-names = "clk_usbphy1_480m"; + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; + rockchip,usbgrf = <&usb2phy1_grf>; + #clock-cells = <0>; + status = "disabled"; + + usb2phy1_host: host-port { + #phy-cells = <0>; + status = "disabled"; + }; + + usb2phy1_otg: otg-port { + #phy-cells = <0>; + status = "disabled"; + }; + }; + + pinctrl: pinctrl { + compatible = "rockchip,rk3568-pinctrl"; + rockchip,grf = <&grf>; + rockchip,pmu = <&pmugrf>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gpio0: gpio@fdd60000 { + compatible = "rockchip,gpio-bank"; + reg = <0x0 0xfdd60000 0x0 0x100>; + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio1: gpio@fe740000 { + compatible = "rockchip,gpio-bank"; + reg = <0x0 0xfe740000 0x0 0x100>; + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio2: gpio@fe750000 { + compatible = "rockchip,gpio-bank"; + reg = <0x0 0xfe750000 0x0 0x100>; + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio3: gpio@fe760000 { + compatible = "rockchip,gpio-bank"; + reg = <0x0 0xfe760000 0x0 0x100>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio4: gpio@fe770000 { + compatible = "rockchip,gpio-bank"; + reg = <0x0 0xfe770000 0x0 0x100>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +}; + +#include "rk3568-pinctrl.dtsi" diff --git a/arch/arm/dts/sam9x60ek.dts b/arch/arm/dts/sam9x60ek.dts index 54c694bd784..eb44868a3e3 100644 --- a/arch/arm/dts/sam9x60ek.dts +++ b/arch/arm/dts/sam9x60ek.dts @@ -80,26 +80,26 @@ }; pinctrl { - pinctrl_qspi: qspi { - atmel,pins = - <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE - AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE - AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP - AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP - AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP - AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; - }; + pinctrl_qspi: qspi { + atmel,pins = + <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE + AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE + AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP + AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP + AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP + AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; + }; - pinctrl_flx0: flx0_default { - atmel,pins = - <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE - AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; - }; + pinctrl_flx0: flx0_default { + atmel,pins = + <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE + AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; - pinctrl_onewire_tm_default: onewire_tm_default { - atmel,pins = - <AT91_PIOD 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; - }; + pinctrl_onewire_tm_default: onewire_tm_default { + atmel,pins = + <AT91_PIOD 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; + }; }; }; diff --git a/arch/arm/dts/sama7g5-pinfunc.h b/arch/arm/dts/sama7g5-pinfunc.h index 38d6962d004..b77185f8eda 100644 --- a/arch/arm/dts/sama7g5-pinfunc.h +++ b/arch/arm/dts/sama7g5-pinfunc.h @@ -261,7 +261,7 @@ #define PIN_PB2__FLEXCOM6_IO0 PINMUX_PIN(PIN_PB2, 2, 1) #define PIN_PB2__ADTRG PINMUX_PIN(PIN_PB2, 3, 1) #define PIN_PB2__A20 PINMUX_PIN(PIN_PB2, 4, 1) -#define PIN_PB2__FLEXCOM11_IO0 PINMUX_PIN(PIN_PB2, 6, 3) +#define PIN_PB2__FLEXCOM11_IO1 PINMUX_PIN(PIN_PB2, 6, 3) #define PIN_PB3 35 #define PIN_PB3__GPIO PINMUX_PIN(PIN_PB3, 0, 0) #define PIN_PB3__RF1 PINMUX_PIN(PIN_PB3, 1, 1) diff --git a/arch/arm/dts/sun4i-a10-inet9f-rev03.dts b/arch/arm/dts/sun4i-a10-inet9f-rev03.dts index 0a562b2cc5b..62e7aa587f8 100644 --- a/arch/arm/dts/sun4i-a10-inet9f-rev03.dts +++ b/arch/arm/dts/sun4i-a10-inet9f-rev03.dts @@ -63,7 +63,7 @@ compatible = "gpio-keys-polled"; poll-interval = <20>; - left-joystick-left { + event-left-joystick-left { label = "Left Joystick Left"; linux,code = <ABS_X>; linux,input-type = <EV_ABS>; @@ -71,7 +71,7 @@ gpios = <&pio 0 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA6 */ }; - left-joystick-right { + event-left-joystick-right { label = "Left Joystick Right"; linux,code = <ABS_X>; linux,input-type = <EV_ABS>; @@ -79,7 +79,7 @@ gpios = <&pio 0 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA5 */ }; - left-joystick-up { + event-left-joystick-up { label = "Left Joystick Up"; linux,code = <ABS_Y>; linux,input-type = <EV_ABS>; @@ -87,7 +87,7 @@ gpios = <&pio 0 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA8 */ }; - left-joystick-down { + event-left-joystick-down { label = "Left Joystick Down"; linux,code = <ABS_Y>; linux,input-type = <EV_ABS>; @@ -95,7 +95,7 @@ gpios = <&pio 0 9 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA9 */ }; - right-joystick-left { + event-right-joystick-left { label = "Right Joystick Left"; linux,code = <ABS_Z>; linux,input-type = <EV_ABS>; @@ -103,7 +103,7 @@ gpios = <&pio 0 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA1 */ }; - right-joystick-right { + event-right-joystick-right { label = "Right Joystick Right"; linux,code = <ABS_Z>; linux,input-type = <EV_ABS>; @@ -111,7 +111,7 @@ gpios = <&pio 0 0 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA0 */ }; - right-joystick-up { + event-right-joystick-up { label = "Right Joystick Up"; linux,code = <ABS_RZ>; linux,input-type = <EV_ABS>; @@ -119,7 +119,7 @@ gpios = <&pio 0 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA3 */ }; - right-joystick-down { + event-right-joystick-down { label = "Right Joystick Down"; linux,code = <ABS_RZ>; linux,input-type = <EV_ABS>; @@ -127,7 +127,7 @@ gpios = <&pio 0 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA4 */ }; - dpad-left { + event-dpad-left { label = "DPad Left"; linux,code = <ABS_HAT0X>; linux,input-type = <EV_ABS>; @@ -135,7 +135,7 @@ gpios = <&pio 7 23 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PH23 */ }; - dpad-right { + event-dpad-right { label = "DPad Right"; linux,code = <ABS_HAT0X>; linux,input-type = <EV_ABS>; @@ -143,7 +143,7 @@ gpios = <&pio 7 24 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PH24 */ }; - dpad-up { + event-dpad-up { label = "DPad Up"; linux,code = <ABS_HAT0Y>; linux,input-type = <EV_ABS>; @@ -151,7 +151,7 @@ gpios = <&pio 7 25 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PH25 */ }; - dpad-down { + event-dpad-down { label = "DPad Down"; linux,code = <ABS_HAT0Y>; linux,input-type = <EV_ABS>; @@ -159,49 +159,49 @@ gpios = <&pio 7 26 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PH26 */ }; - x { + event-x { label = "Button X"; linux,code = <BTN_X>; gpios = <&pio 0 16 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA16 */ }; - y { + event-y { label = "Button Y"; linux,code = <BTN_Y>; gpios = <&pio 0 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA14 */ }; - a { + event-a { label = "Button A"; linux,code = <BTN_A>; gpios = <&pio 0 17 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA17 */ }; - b { + event-b { label = "Button B"; linux,code = <BTN_B>; gpios = <&pio 0 15 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA15 */ }; - select { + event-select { label = "Select Button"; linux,code = <BTN_SELECT>; gpios = <&pio 0 11 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA11 */ }; - start { + event-start { label = "Start Button"; linux,code = <BTN_START>; gpios = <&pio 0 12 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA12 */ }; - top-left { + event-top-left { label = "Top Left Button"; linux,code = <BTN_TL>; gpios = <&pio 7 22 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PH22 */ }; - top-right { + event-top-right { label = "Top Right Button"; linux,code = <BTN_TR>; gpios = <&pio 0 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA13 */ diff --git a/arch/arm/dts/sun4i-a10-pcduino.dts b/arch/arm/dts/sun4i-a10-pcduino.dts index 1ac82376bae..a332d61fd56 100644 --- a/arch/arm/dts/sun4i-a10-pcduino.dts +++ b/arch/arm/dts/sun4i-a10-pcduino.dts @@ -77,19 +77,19 @@ gpio-keys { compatible = "gpio-keys"; - back { + key-back { label = "Key Back"; linux,code = <KEY_BACK>; gpios = <&pio 7 17 GPIO_ACTIVE_LOW>; }; - home { + key-home { label = "Key Home"; linux,code = <KEY_HOME>; gpios = <&pio 7 18 GPIO_ACTIVE_LOW>; }; - menu { + key-menu { label = "Key Menu"; linux,code = <KEY_MENU>; gpios = <&pio 7 19 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/dts/sun50i-a64-amarula-relic.dts b/arch/arm/dts/sun50i-a64-amarula-relic.dts index c7bd73f35ed..ce8f6aa164e 100644 --- a/arch/arm/dts/sun50i-a64-amarula-relic.dts +++ b/arch/arm/dts/sun50i-a64-amarula-relic.dts @@ -58,7 +58,7 @@ wifi_pwrseq: wifi-pwrseq { compatible = "mmc-pwrseq-simple"; - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "ext_clock"; reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* WL-PMU-EN: PL2 */ }; diff --git a/arch/arm/dts/sun50i-a64-bananapi-m64.dts b/arch/arm/dts/sun50i-a64-bananapi-m64.dts index f7fe9fa50cb..bf66b640816 100644 --- a/arch/arm/dts/sun50i-a64-bananapi-m64.dts +++ b/arch/arm/dts/sun50i-a64-bananapi-m64.dts @@ -56,7 +56,7 @@ wifi_pwrseq: wifi_pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "ext_clock"; }; }; @@ -355,7 +355,7 @@ bluetooth { compatible = "brcm,bcm43438-bt"; - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "lpo"; vbat-supply = <®_dldo2>; vddio-supply = <®_dldo4>; diff --git a/arch/arm/dts/sun50i-a64-nanopi-a64.dts b/arch/arm/dts/sun50i-a64-nanopi-a64.dts index 09b3c7fb82c..ffc3b4c7068 100644 --- a/arch/arm/dts/sun50i-a64-nanopi-a64.dts +++ b/arch/arm/dts/sun50i-a64-nanopi-a64.dts @@ -43,7 +43,7 @@ wifi_pwrseq: wifi_pwrseq { compatible = "mmc-pwrseq-simple"; - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "ext_clock"; reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ }; diff --git a/arch/arm/dts/sun50i-a64-olinuxino.dts b/arch/arm/dts/sun50i-a64-olinuxino.dts index f3f8e177ab6..22d350249c1 100644 --- a/arch/arm/dts/sun50i-a64-olinuxino.dts +++ b/arch/arm/dts/sun50i-a64-olinuxino.dts @@ -58,6 +58,15 @@ }; }; +&codec { + status = "okay"; +}; + +&codec_analog { + cpvdd-supply = <®_eldo1>; + status = "okay"; +}; + &cpu0 { cpu-supply = <®_dcdc2>; }; @@ -74,6 +83,10 @@ cpu-supply = <®_dcdc2>; }; +&dai { + status = "okay"; +}; + &de { status = "okay"; }; @@ -328,6 +341,23 @@ vcc-hdmi-supply = <®_dldo1>; }; +&sound { + simple-audio-card,aux-devs = <&codec_analog>; + simple-audio-card,widgets = "Microphone", "Microphone Jack Left", + "Microphone", "Microphone Jack Right", + "Headphone", "Headphone Jack"; + simple-audio-card,routing = "Left DAC", "DACL", + "Right DAC", "DACR", + "Headphone Jack", "HP", + "ADCL", "Left ADC", + "ADCR", "Right ADC", + "Microphone Jack Left", "MBIAS", + "MIC1", "Microphone Jack Left", + "Microphone Jack Right", "MBIAS", + "MIC2", "Microphone Jack Right"; + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pb_pins>; diff --git a/arch/arm/dts/sun50i-a64-orangepi-win.dts b/arch/arm/dts/sun50i-a64-orangepi-win.dts index 8eee8051ac5..714a270a558 100644 --- a/arch/arm/dts/sun50i-a64-orangepi-win.dts +++ b/arch/arm/dts/sun50i-a64-orangepi-win.dts @@ -40,7 +40,7 @@ leds { compatible = "gpio-leds"; - status { + led-0 { label = "orangepi:green:status"; gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */ }; @@ -71,7 +71,7 @@ wifi_pwrseq: wifi_pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>; /* PL8 */ - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "ext_clock"; }; }; @@ -369,7 +369,7 @@ bluetooth { compatible = "brcm,bcm43438-bt"; max-speed = <1500000>; - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "lpo"; vbat-supply = <®_dldo2>; vddio-supply = <®_dldo4>; diff --git a/arch/arm/dts/sun50i-a64-pinebook.dts b/arch/arm/dts/sun50i-a64-pinebook.dts index 68b6ab4707c..c00c4c1e9e7 100644 --- a/arch/arm/dts/sun50i-a64-pinebook.dts +++ b/arch/arm/dts/sun50i-a64-pinebook.dts @@ -35,10 +35,10 @@ stdout-path = "serial0:115200n8"; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; - lid_switch { + lid-switch { label = "Lid Switch"; gpios = <&r_pio 0 12 GPIO_ACTIVE_LOW>; /* PL12 */ linux,input-type = <EV_SW>; diff --git a/arch/arm/dts/sun50i-a64-pinephone-1.0.dts b/arch/arm/dts/sun50i-a64-pinephone-1.0.dts index fb65319a3bd..219f720b8b7 100644 --- a/arch/arm/dts/sun50i-a64-pinephone-1.0.dts +++ b/arch/arm/dts/sun50i-a64-pinephone-1.0.dts @@ -10,6 +10,10 @@ compatible = "pine64,pinephone-1.0", "pine64,pinephone", "allwinner,sun50i-a64"; }; +&codec_analog { + allwinner,internal-bias-resistor; +}; + &sgm3140 { enable-gpios = <&pio 2 3 GPIO_ACTIVE_HIGH>; /* PC3 */ flash-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */ diff --git a/arch/arm/dts/sun50i-a64-pinephone-1.1.dts b/arch/arm/dts/sun50i-a64-pinephone-1.1.dts index 5e59d375217..723af64a9ce 100644 --- a/arch/arm/dts/sun50i-a64-pinephone-1.1.dts +++ b/arch/arm/dts/sun50i-a64-pinephone-1.1.dts @@ -29,6 +29,10 @@ default-brightness-level = <400>; }; +&codec_analog { + allwinner,internal-bias-resistor; +}; + &sgm3140 { enable-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */ flash-gpios = <&pio 2 3 GPIO_ACTIVE_HIGH>; /* PC3 */ diff --git a/arch/arm/dts/sun50i-a64-teres-i.dts b/arch/arm/dts/sun50i-a64-teres-i.dts index 6668431dcb4..945afdb508d 100644 --- a/arch/arm/dts/sun50i-a64-teres-i.dts +++ b/arch/arm/dts/sun50i-a64-teres-i.dts @@ -197,6 +197,14 @@ status = "okay"; }; +&pio { + vcc-pc-supply = <®_dcdc1>; + vcc-pd-supply = <®_dldo2>; + vcc-pe-supply = <®_aldo1>; + vcc-pf-supply = <®_dcdc1>; /* No dedicated supply-pin for this */ + vcc-pg-supply = <®_aldo2>; +}; + &pwm { status = "okay"; }; diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi index 555bc92a6f8..b04f492c0f2 100644 --- a/arch/arm/dts/sun50i-a64.dtsi +++ b/arch/arm/dts/sun50i-a64.dtsi @@ -4,6 +4,7 @@ // Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com> #include <dt-bindings/clock/sun50i-a64-ccu.h> +#include <dt-bindings/clock/sun6i-rtc.h> #include <dt-bindings/clock/sun8i-de2.h> #include <dt-bindings/clock/sun8i-r-ccu.h> #include <dt-bindings/interrupt-controller/arm-gic.h> @@ -660,7 +661,7 @@ ccu: clock@1c20000 { compatible = "allwinner,sun50i-a64-ccu"; reg = <0x01c20000 0x400>; - clocks = <&osc24M>, <&rtc 0>; + clocks = <&osc24M>, <&rtc CLK_OSC32K>; clock-names = "hosc", "losc"; #clock-cells = <1>; #reset-cells = <1>; @@ -672,7 +673,8 @@ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; + clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, + <&rtc CLK_OSC32K>; clock-names = "apb", "hosc", "losc"; gpio-controller; #gpio-cells = <3>; @@ -1224,7 +1226,7 @@ reg-io-width = <1>; interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>, - <&ccu CLK_HDMI>, <&rtc 0>; + <&ccu CLK_HDMI>, <&rtc CLK_OSC32K>; clock-names = "iahb", "isfr", "tmds", "cec"; resets = <&ccu RST_BUS_HDMI1>; reset-names = "ctrl"; @@ -1284,7 +1286,7 @@ r_ccu: clock@1f01400 { compatible = "allwinner,sun50i-a64-r-ccu"; reg = <0x01f01400 0x100>; - clocks = <&osc24M>, <&rtc 0>, <&rtc 2>, + clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>, <&ccu CLK_PLL_PERIPH0>; clock-names = "hosc", "losc", "iosc", "pll-periph"; #clock-cells = <1>; diff --git a/arch/arm/dts/sun50i-h5-nanopi-r1s-h5.dts b/arch/arm/dts/sun50i-h5-nanopi-r1s-h5.dts index 55b369534a0..a3e040da38a 100644 --- a/arch/arm/dts/sun50i-h5-nanopi-r1s-h5.dts +++ b/arch/arm/dts/sun50i-h5-nanopi-r1s-h5.dts @@ -52,10 +52,10 @@ }; }; - r-gpio-keys { + gpio-keys { compatible = "gpio-keys"; - reset { + key-reset { label = "reset"; linux,code = <KEY_RESTART>; gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts index 1010c1b22d2..b5c1ff19b4c 100644 --- a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts +++ b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts @@ -54,10 +54,10 @@ }; }; - r-gpio-keys { + gpio-keys { compatible = "gpio-keys"; - sw4 { + key-sw4 { label = "sw4"; linux,code = <BTN_0>; gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/dts/sun50i-h5-orangepi-prime.dts b/arch/arm/dts/sun50i-h5-orangepi-prime.dts index 74e0444af19..d7f8bad6bb9 100644 --- a/arch/arm/dts/sun50i-h5-orangepi-prime.dts +++ b/arch/arm/dts/sun50i-h5-orangepi-prime.dts @@ -48,10 +48,10 @@ }; }; - r-gpio-keys { + gpio-keys { compatible = "gpio-keys"; - sw4 { + key-sw4 { label = "sw4"; linux,code = <BTN_0>; gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/dts/sun50i-h6-orangepi-3.dts b/arch/arm/dts/sun50i-h6-orangepi-3.dts index 9f12c05e21f..f1957bb1edb 100644 --- a/arch/arm/dts/sun50i-h6-orangepi-3.dts +++ b/arch/arm/dts/sun50i-h6-orangepi-3.dts @@ -86,7 +86,7 @@ wifi_pwrseq: wifi-pwrseq { compatible = "mmc-pwrseq-simple"; - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "ext_clock"; reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */ post-power-on-delay-ms = <200>; @@ -314,7 +314,7 @@ bluetooth { compatible = "brcm,bcm4345c5"; - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "lpo"; device-wakeup-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */ host-wakeup-gpios = <&r_pio 1 1 GPIO_ACTIVE_HIGH>; /* PM1 */ diff --git a/arch/arm/dts/sun50i-h6-orangepi-lite2.dts b/arch/arm/dts/sun50i-h6-orangepi-lite2.dts index e8770858b5d..fb31dcb1cb6 100644 --- a/arch/arm/dts/sun50i-h6-orangepi-lite2.dts +++ b/arch/arm/dts/sun50i-h6-orangepi-lite2.dts @@ -13,7 +13,7 @@ wifi_pwrseq: wifi_pwrseq { compatible = "mmc-pwrseq-simple"; - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "ext_clock"; reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */ post-power-on-delay-ms = <200>; @@ -64,7 +64,7 @@ bluetooth { compatible = "brcm,bcm4345c5"; - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "lpo"; device-wakeup-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */ host-wakeup-gpios = <&r_pio 1 1 GPIO_ACTIVE_HIGH>; /* PM1 */ diff --git a/arch/arm/dts/sun50i-h6-tanix.dtsi b/arch/arm/dts/sun50i-h6-tanix.dtsi index edb71e4a030..4903d635811 100644 --- a/arch/arm/dts/sun50i-h6-tanix.dtsi +++ b/arch/arm/dts/sun50i-h6-tanix.dtsi @@ -78,7 +78,7 @@ wifi_pwrseq: wifi-pwrseq { compatible = "mmc-pwrseq-simple"; - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "ext_clock"; reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */ }; diff --git a/arch/arm/dts/sun50i-h6.dtsi b/arch/arm/dts/sun50i-h6.dtsi index 71a45a624da..afbbfc25269 100644 --- a/arch/arm/dts/sun50i-h6.dtsi +++ b/arch/arm/dts/sun50i-h6.dtsi @@ -4,6 +4,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/sun50i-h6-ccu.h> #include <dt-bindings/clock/sun50i-h6-r-ccu.h> +#include <dt-bindings/clock/sun6i-rtc.h> #include <dt-bindings/clock/sun8i-de2.h> #include <dt-bindings/clock/sun8i-tcon-top.h> #include <dt-bindings/reset/sun50i-h6-ccu.h> @@ -237,7 +238,7 @@ ccu: clock@3001000 { compatible = "allwinner,sun50i-h6-ccu"; reg = <0x03001000 0x1000>; - clocks = <&osc24M>, <&rtc 0>, <&rtc 2>; + clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>; clock-names = "hosc", "losc", "iosc"; #clock-cells = <1>; #reset-cells = <1>; @@ -316,7 +317,7 @@ <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc 0>; + clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc CLK_OSC32K>; clock-names = "apb", "hosc", "losc"; gpio-controller; #gpio-cells = <3>; @@ -724,7 +725,7 @@ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_XHCI>, <&ccu CLK_BUS_XHCI>, - <&rtc 0>; + <&rtc CLK_OSC32K>; clock-names = "ref", "bus_early", "suspend"; resets = <&ccu RST_BUS_XHCI>; /* @@ -929,7 +930,7 @@ r_ccu: clock@7010000 { compatible = "allwinner,sun50i-h6-r-ccu"; reg = <0x07010000 0x400>; - clocks = <&osc24M>, <&rtc 0>, <&rtc 2>, + clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>, <&ccu CLK_PLL_PERIPH0>; clock-names = "hosc", "losc", "iosc", "pll-periph"; #clock-cells = <1>; @@ -958,7 +959,8 @@ reg = <0x07022000 0x400>; interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&r_ccu CLK_R_APB1>, <&osc24M>, <&rtc 0>; + clocks = <&r_ccu CLK_R_APB1>, <&osc24M>, + <&rtc CLK_OSC32K>; clock-names = "apb", "hosc", "losc"; gpio-controller; #gpio-cells = <3>; diff --git a/arch/arm/dts/sun50i-h616-orangepi-zero2.dts b/arch/arm/dts/sun50i-h616-orangepi-zero2.dts index e6de49f89e3..02893f3ac99 100644 --- a/arch/arm/dts/sun50i-h616-orangepi-zero2.dts +++ b/arch/arm/dts/sun50i-h616-orangepi-zero2.dts @@ -49,29 +49,8 @@ regulator-max-microvolt = <5000000>; regulator-always-on; }; - - reg_usb1_vbus: usb1-vbus { - compatible = "regulator-fixed"; - regulator-name = "usb1-vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <®_vcc5v>; - enable-active-high; - gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */ - status = "okay"; - }; -}; - -&ehci0 { - status = "okay"; -}; - -&ehci1 { - status = "okay"; }; -/* USB 2 & 3 are on headers only. */ - &emac0 { pinctrl-names = "default"; pinctrl-0 = <&ext_rgmii_pins>; @@ -97,14 +76,6 @@ status = "okay"; }; -&ohci0 { - status = "okay"; -}; - -&ohci1 { - status = "okay"; -}; - &r_rsb { status = "okay"; @@ -181,14 +152,14 @@ reg_dcdca: dcdca { regulator-always-on; regulator-min-microvolt = <810000>; - regulator-max-microvolt = <1080000>; + regulator-max-microvolt = <1100000>; regulator-name = "vdd-cpu"; }; reg_dcdcc: dcdcc { regulator-always-on; regulator-min-microvolt = <810000>; - regulator-max-microvolt = <1080000>; + regulator-max-microvolt = <990000>; regulator-name = "vdd-gpu-sys"; }; @@ -200,7 +171,7 @@ }; reg_dcdce: dcdce { - regulator-boot-on; + regulator-always-on; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-name = "vcc-eth-mmc"; @@ -213,8 +184,18 @@ }; }; +&pio { + vcc-pc-supply = <®_aldo1>; + vcc-pf-supply = <®_aldo1>; + vcc-pg-supply = <®_bldo1>; + vcc-ph-supply = <®_aldo1>; + vcc-pi-supply = <®_aldo1>; +}; + &spi0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>; flash@0 { #address-cells = <1>; @@ -230,13 +211,3 @@ pinctrl-0 = <&uart0_ph_pins>; status = "okay"; }; - -&usbotg { - dr_mode = "peripheral"; - status = "okay"; -}; - -&usbphy { - usb1_vbus-supply = <®_usb1_vbus>; - status = "okay"; -}; diff --git a/arch/arm/dts/sun50i-h616-x96-mate.dts b/arch/arm/dts/sun50i-h616-x96-mate.dts new file mode 100644 index 00000000000..6619db34714 --- /dev/null +++ b/arch/arm/dts/sun50i-h616-x96-mate.dts @@ -0,0 +1,177 @@ +// SPDX-License-Identifier: (GPL-2.0+ or MIT) +/* + * Copyright (C) 2021 Arm Ltd. + */ + +/dts-v1/; + +#include "sun50i-h616.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + model = "X96 Mate"; + compatible = "hechuang,x96-mate", "allwinner,sun50i-h616"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reg_vcc5v: vcc5v { + /* board wide 5V supply directly from the DC input */ + compatible = "regulator-fixed"; + regulator-name = "vcc-5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; +}; + +&ir { + status = "okay"; +}; + +&mmc0 { + vmmc-supply = <®_dcdce>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ + bus-width = <4>; + status = "okay"; +}; + +&mmc2 { + vmmc-supply = <®_dcdce>; + vqmmc-supply = <®_bldo1>; + bus-width = <8>; + non-removable; + cap-mmc-hw-reset; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + status = "okay"; +}; + +&r_rsb { + status = "okay"; + + axp305: pmic@745 { + compatible = "x-powers,axp305", "x-powers,axp805", + "x-powers,axp806"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0x745>; + + x-powers,self-working-mode; + vina-supply = <®_vcc5v>; + vinb-supply = <®_vcc5v>; + vinc-supply = <®_vcc5v>; + vind-supply = <®_vcc5v>; + vine-supply = <®_vcc5v>; + aldoin-supply = <®_vcc5v>; + bldoin-supply = <®_vcc5v>; + cldoin-supply = <®_vcc5v>; + + regulators { + reg_aldo1: aldo1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-sys"; + }; + + /* Enabled by the Android BSP */ + reg_aldo2: aldo2 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3-ext"; + status = "disabled"; + }; + + /* Enabled by the Android BSP */ + reg_aldo3: aldo3 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3-ext2"; + status = "disabled"; + }; + + reg_bldo1: bldo1 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc1v8"; + }; + + /* Enabled by the Android BSP */ + reg_bldo2: bldo2 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc1v8-2"; + status = "disabled"; + }; + + bldo3 { + /* unused */ + }; + + bldo4 { + /* unused */ + }; + + cldo1 { + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-name = "vcc2v5"; + }; + + cldo2 { + /* unused */ + }; + + cldo3 { + /* unused */ + }; + + reg_dcdca: dcdca { + regulator-always-on; + regulator-min-microvolt = <810000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vdd-cpu"; + }; + + reg_dcdcc: dcdcc { + regulator-always-on; + regulator-min-microvolt = <810000>; + regulator-max-microvolt = <990000>; + regulator-name = "vdd-gpu-sys"; + }; + + reg_dcdcd: dcdcd { + regulator-always-on; + regulator-min-microvolt = <1360000>; + regulator-max-microvolt = <1360000>; + regulator-name = "vdd-dram"; + }; + + reg_dcdce: dcdce { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-eth-mmc"; + }; + + sw { + /* unused */ + }; + }; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_ph_pins>; + status = "okay"; +}; diff --git a/arch/arm/dts/sun50i-h616.dtsi b/arch/arm/dts/sun50i-h616.dtsi index 2f71e853e96..622a1f7d164 100644 --- a/arch/arm/dts/sun50i-h616.dtsi +++ b/arch/arm/dts/sun50i-h616.dtsi @@ -6,6 +6,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/sun50i-h616-ccu.h> #include <dt-bindings/clock/sun50i-h6-r-ccu.h> +#include <dt-bindings/clock/sun6i-rtc.h> #include <dt-bindings/reset/sun50i-h616-ccu.h> #include <dt-bindings/reset/sun50i-h6-r-ccu.h> @@ -51,7 +52,23 @@ }; }; - osc24M: osc24M_clk { + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* + * 256 KiB reserved for Trusted Firmware-A (BL31). + * This is added by BL31 itself, but some bootloaders fail + * to propagate this into the DTB handed to kernels. + */ + secmon@40000000 { + reg = <0x0 0x40000000 0x0 0x40000>; + no-map; + }; + }; + + osc24M: osc24M-clk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <24000000>; @@ -110,7 +127,7 @@ ccu: clock@3001000 { compatible = "allwinner,sun50i-h616-ccu"; reg = <0x03001000 0x1000>; - clocks = <&osc24M>, <&rtc 0>, <&rtc 2>; + clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>; clock-names = "hosc", "losc", "iosc"; #clock-cells = <1>; #reset-cells = <1>; @@ -135,7 +152,7 @@ <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc 0>; + clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc CLK_OSC32K>; clock-names = "apb", "hosc", "losc"; gpio-controller; #gpio-cells = <3>; @@ -161,7 +178,7 @@ function = "i2c3"; }; - ir_rx_pin: ir_rx_pin { + ir_rx_pin: ir-rx-pin { pins = "PH10"; function = "ir_rx"; }; @@ -174,6 +191,7 @@ bias-pull-up; }; + /omit-if-no-ref/ mmc1_pins: mmc1-pins { pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5"; @@ -191,17 +209,26 @@ bias-pull-up; }; + /omit-if-no-ref/ spi0_pins: spi0-pins { - pins = "PC0", "PC2", "PC3", "PC4"; + pins = "PC0", "PC2", "PC4"; function = "spi0"; }; + /omit-if-no-ref/ + spi0_cs0_pin: spi0-cs0-pin { + pins = "PC3"; + function = "spi0"; + }; + + /omit-if-no-ref/ spi1_pins: spi1-pins { pins = "PH6", "PH7", "PH8"; function = "spi1"; }; - spi1_cs_pin: spi1-cs-pin { + /omit-if-no-ref/ + spi1_cs0_pin: spi1-cs0-pin { pins = "PH5"; function = "spi1"; }; @@ -211,11 +238,13 @@ function = "uart0"; }; + /omit-if-no-ref/ uart1_pins: uart1-pins { pins = "PG6", "PG7"; function = "uart1"; }; + /omit-if-no-ref/ uart1_rts_cts_pins: uart1-rts-cts-pins { pins = "PG8", "PG9"; function = "uart1"; @@ -245,10 +274,10 @@ pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins>; status = "disabled"; + max-frequency = <150000000>; cap-sd-highspeed; cap-mmc-highspeed; mmc-ddr-3_3v; - mmc-ddr-1_8v; cap-sdio-irq; #address-cells = <1>; #size-cells = <0>; @@ -266,10 +295,10 @@ pinctrl-names = "default"; pinctrl-0 = <&mmc1_pins>; status = "disabled"; + max-frequency = <150000000>; cap-sd-highspeed; cap-mmc-highspeed; mmc-ddr-3_3v; - mmc-ddr-1_8v; cap-sdio-irq; #address-cells = <1>; #size-cells = <0>; @@ -287,10 +316,10 @@ pinctrl-names = "default"; pinctrl-0 = <&mmc2_pins>; status = "disabled"; + max-frequency = <150000000>; cap-sd-highspeed; cap-mmc-highspeed; mmc-ddr-3_3v; - mmc-ddr-1_8v; cap-sdio-irq; #address-cells = <1>; #size-cells = <0>; @@ -364,6 +393,7 @@ i2c0: i2c@5002000 { compatible = "allwinner,sun50i-h616-i2c", + "allwinner,sun8i-v536-i2c", "allwinner,sun6i-a31-i2c"; reg = <0x05002000 0x400>; interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; @@ -378,6 +408,7 @@ i2c1: i2c@5002400 { compatible = "allwinner,sun50i-h616-i2c", + "allwinner,sun8i-v536-i2c", "allwinner,sun6i-a31-i2c"; reg = <0x05002400 0x400>; interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; @@ -390,6 +421,7 @@ i2c2: i2c@5002800 { compatible = "allwinner,sun50i-h616-i2c", + "allwinner,sun8i-v536-i2c", "allwinner,sun6i-a31-i2c"; reg = <0x05002800 0x400>; interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; @@ -402,6 +434,7 @@ i2c3: i2c@5002c00 { compatible = "allwinner,sun50i-h616-i2c", + "allwinner,sun8i-v536-i2c", "allwinner,sun6i-a31-i2c"; reg = <0x05002c00 0x400>; interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; @@ -414,6 +447,7 @@ i2c4: i2c@5003000 { compatible = "allwinner,sun50i-h616-i2c", + "allwinner,sun8i-v536-i2c", "allwinner,sun6i-a31-i2c"; reg = <0x05003000 0x400>; interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; @@ -432,8 +466,6 @@ clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; clock-names = "ahb", "mod"; resets = <&ccu RST_BUS_SPI0>; - pinctrl-names = "default"; - pinctrl-0 = <&spi0_pins>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -447,224 +479,46 @@ clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; clock-names = "ahb", "mod"; resets = <&ccu RST_BUS_SPI1>; - pinctrl-names = "default"; - pinctrl-0 = <&spi1_pins>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; }; emac0: ethernet@5020000 { - compatible = "allwinner,sun50i-h616-emac", + compatible = "allwinner,sun50i-h616-emac0", "allwinner,sun50i-a64-emac"; - syscon = <&syscon>; reg = <0x05020000 0x10000>; interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "macirq"; - resets = <&ccu RST_BUS_EMAC0>; - reset-names = "stmmaceth"; clocks = <&ccu CLK_BUS_EMAC0>; clock-names = "stmmaceth"; - status = "disabled"; - - mdio0: mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - }; - }; - - emac1: ethernet@5030000 { - compatible = "allwinner,sun50i-h616-emac"; - syscon = <&syscon 1>; - reg = <0x05030000 0x10000>; - interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "macirq"; - resets = <&ccu RST_BUS_EMAC1>; + resets = <&ccu RST_BUS_EMAC0>; reset-names = "stmmaceth"; - clocks = <&ccu CLK_BUS_EMAC1>; - clock-names = "stmmaceth"; + syscon = <&syscon>; status = "disabled"; - mdio1: mdio { + mdio0: mdio { compatible = "snps,dwmac-mdio"; #address-cells = <1>; #size-cells = <0>; }; }; - usbotg: usb@5100000 { - compatible = "allwinner,sun50i-h616-musb", - "allwinner,sun8i-h3-musb"; - reg = <0x05100000 0x0400>; - clocks = <&ccu CLK_BUS_OTG>; - resets = <&ccu RST_BUS_OTG>; - interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "mc"; - phys = <&usbphy 0>; - phy-names = "usb"; - extcon = <&usbphy 0>; - status = "disabled"; - }; - - usbphy: phy@5100400 { - compatible = "allwinner,sun50i-h616-usb-phy"; - reg = <0x05100400 0x24>, - <0x05101800 0x14>, - <0x05200800 0x14>, - <0x05310800 0x14>, - <0x05311800 0x14>; - reg-names = "phy_ctrl", - "pmu0", - "pmu1", - "pmu2", - "pmu3"; - clocks = <&ccu CLK_USB_PHY0>, - <&ccu CLK_USB_PHY1>, - <&ccu CLK_USB_PHY2>, - <&ccu CLK_USB_PHY3>; - clock-names = "usb0_phy", - "usb1_phy", - "usb2_phy", - "usb3_phy"; - resets = <&ccu RST_USB_PHY0>, - <&ccu RST_USB_PHY1>, - <&ccu RST_USB_PHY2>, - <&ccu RST_USB_PHY3>; - reset-names = "usb0_reset", - "usb1_reset", - "usb2_reset", - "usb3_reset"; - status = "disabled"; - #phy-cells = <1>; - }; - - ehci0: usb@5101000 { - compatible = "allwinner,sun50i-h616-ehci", - "generic-ehci"; - reg = <0x05101000 0x100>; - interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ccu CLK_BUS_OHCI0>, - <&ccu CLK_BUS_EHCI0>, - <&ccu CLK_USB_OHCI0>; - resets = <&ccu RST_BUS_OHCI0>, - <&ccu RST_BUS_EHCI0>; - phys = <&usbphy 0>; - phy-names = "usb"; - status = "disabled"; - }; - - ohci0: usb@5101400 { - compatible = "allwinner,sun50i-h616-ohci", - "generic-ohci"; - reg = <0x05101400 0x100>; - interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ccu CLK_BUS_OHCI0>, - <&ccu CLK_USB_OHCI0>; - resets = <&ccu RST_BUS_OHCI0>; - phys = <&usbphy 0>; - phy-names = "usb"; - status = "disabled"; - }; - - ehci1: usb@5200000 { - compatible = "allwinner,sun50i-h616-ehci", - "generic-ehci"; - reg = <0x05200000 0x100>; - interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ccu CLK_BUS_OHCI1>, - <&ccu CLK_BUS_EHCI1>, - <&ccu CLK_USB_OHCI1>; - resets = <&ccu RST_BUS_OHCI1>, - <&ccu RST_BUS_EHCI1>; - phys = <&usbphy 1>; - phy-names = "usb"; - status = "disabled"; - }; - - ohci1: usb@5200400 { - compatible = "allwinner,sun50i-h616-ohci", - "generic-ohci"; - reg = <0x05200400 0x100>; - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ccu CLK_BUS_OHCI1>, - <&ccu CLK_USB_OHCI1>; - resets = <&ccu RST_BUS_OHCI1>; - phys = <&usbphy 1>; - phy-names = "usb"; - status = "disabled"; - }; - - ehci2: usb@5310000 { - compatible = "allwinner,sun50i-h616-ehci", - "generic-ehci"; - reg = <0x05310000 0x100>; - interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ccu CLK_BUS_OHCI2>, - <&ccu CLK_BUS_EHCI2>, - <&ccu CLK_USB_OHCI2>; - resets = <&ccu RST_BUS_OHCI2>, - <&ccu RST_BUS_EHCI2>; - phys = <&usbphy 2>; - phy-names = "usb"; - status = "disabled"; - }; - - ohci2: usb@5310400 { - compatible = "allwinner,sun50i-h616-ohci", - "generic-ohci"; - reg = <0x05310400 0x100>; - interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ccu CLK_BUS_OHCI2>, - <&ccu CLK_USB_OHCI2>; - resets = <&ccu RST_BUS_OHCI2>; - phys = <&usbphy 2>; - phy-names = "usb"; - status = "disabled"; - }; - - ehci3: usb@5311000 { - compatible = "allwinner,sun50i-h616-ehci", - "generic-ehci"; - reg = <0x05311000 0x100>; - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ccu CLK_BUS_OHCI3>, - <&ccu CLK_BUS_EHCI3>, - <&ccu CLK_USB_OHCI3>; - resets = <&ccu RST_BUS_OHCI3>, - <&ccu RST_BUS_EHCI3>; - phys = <&usbphy 3>; - phy-names = "usb"; - status = "disabled"; - }; - - ohci3: usb@5311400 { - compatible = "allwinner,sun50i-h616-ohci", - "generic-ohci"; - reg = <0x05311400 0x100>; - interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ccu CLK_BUS_OHCI3>, - <&ccu CLK_USB_OHCI3>; - resets = <&ccu RST_BUS_OHCI3>; - phys = <&usbphy 3>; - phy-names = "usb"; - status = "disabled"; - }; - rtc: rtc@7000000 { - compatible = "allwinner,sun50i-h616-rtc", - "allwinner,sun50i-h6-rtc"; + compatible = "allwinner,sun50i-h616-rtc"; reg = <0x07000000 0x400>; - interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; - clock-output-names = "osc32k", "osc32k-out", "iosc"; + interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&r_ccu CLK_R_APB1_RTC>, <&osc24M>, + <&ccu CLK_PLL_SYSTEM_32K>; + clock-names = "bus", "hosc", + "pll-32k"; #clock-cells = <1>; }; r_ccu: clock@7010000 { compatible = "allwinner,sun50i-h616-r-ccu"; - reg = <0x07010000 0x400>; - clocks = <&osc24M>, <&rtc 0>, <&rtc 2>, + reg = <0x07010000 0x210>; + clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>, <&ccu CLK_PLL_PERIPH0>; clock-names = "hosc", "losc", "iosc", "pll-periph"; #clock-cells = <1>; @@ -674,14 +528,13 @@ r_pio: pinctrl@7022000 { compatible = "allwinner,sun50i-h616-r-pinctrl"; reg = <0x07022000 0x400>; - interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&r_ccu CLK_R_APB1>, <&osc24M>, <&rtc 0>; + clocks = <&r_ccu CLK_R_APB1>, <&osc24M>, + <&rtc CLK_OSC32K>; clock-names = "apb", "hosc", "losc"; gpio-controller; #gpio-cells = <3>; - interrupt-controller; - #interrupt-cells = <3>; + /omit-if-no-ref/ r_i2c_pins: r-i2c-pins { pins = "PL0", "PL1"; function = "s_i2c"; @@ -694,21 +547,22 @@ }; ir: ir@7040000 { - compatible = "allwinner,sun50i-h616-ir", - "allwinner,sun6i-a31-ir"; - reg = <0x07040000 0x400>; - interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&r_ccu CLK_R_APB1_IR>, - <&r_ccu CLK_IR>; - clock-names = "apb", "ir"; - resets = <&r_ccu RST_R_APB1_IR>; - pinctrl-names = "default"; - pinctrl-0 = <&ir_rx_pin>; - status = "disabled"; + compatible = "allwinner,sun50i-h616-ir", + "allwinner,sun6i-a31-ir"; + reg = <0x07040000 0x400>; + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&r_ccu CLK_R_APB1_IR>, + <&r_ccu CLK_IR>; + clock-names = "apb", "ir"; + resets = <&r_ccu RST_R_APB1_IR>; + pinctrl-names = "default"; + pinctrl-0 = <&ir_rx_pin>; + status = "disabled"; }; r_i2c: i2c@7081400 { compatible = "allwinner,sun50i-h616-i2c", + "allwinner,sun8i-v536-i2c", "allwinner,sun6i-a31-i2c"; reg = <0x07081400 0x400>; interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm/dts/sun5i-a13-licheepi-one.dts b/arch/arm/dts/sun5i-a13-licheepi-one.dts index 2ce361f8fed..3a6c4bd0a44 100644 --- a/arch/arm/dts/sun5i-a13-licheepi-one.dts +++ b/arch/arm/dts/sun5i-a13-licheepi-one.dts @@ -67,18 +67,18 @@ compatible = "gpio-leds"; led-0 { - label ="licheepi:red:usr"; + label = "licheepi:red:usr"; gpios = <&pio 2 5 GPIO_ACTIVE_LOW>; }; led-1 { - label ="licheepi:green:usr"; + label = "licheepi:green:usr"; gpios = <&pio 2 19 GPIO_ACTIVE_LOW>; default-state = "on"; }; led-2 { - label ="licheepi:blue:usr"; + label = "licheepi:blue:usr"; gpios = <&pio 2 4 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm/dts/sun6i-a31.dtsi b/arch/arm/dts/sun6i-a31.dtsi index d7d920e9e48..f6701ece7b7 100644 --- a/arch/arm/dts/sun6i-a31.dtsi +++ b/arch/arm/dts/sun6i-a31.dtsi @@ -46,6 +46,7 @@ #include <dt-bindings/thermal/thermal.h> #include <dt-bindings/clock/sun6i-a31-ccu.h> +#include <dt-bindings/clock/sun6i-rtc.h> #include <dt-bindings/reset/sun6i-a31-ccu.h> / { @@ -598,7 +599,7 @@ ccu: clock@1c20000 { compatible = "allwinner,sun6i-a31-ccu"; reg = <0x01c20000 0x400>; - clocks = <&osc24M>, <&rtc 0>; + clocks = <&osc24M>, <&rtc CLK_OSC32K>; clock-names = "hosc", "losc"; #clock-cells = <1>; #reset-cells = <1>; @@ -611,7 +612,8 @@ <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ccu CLK_APB1_PIO>, <&osc24M>, <&rtc 0>; + clocks = <&ccu CLK_APB1_PIO>, <&osc24M>, + <&rtc CLK_OSC32K>; clock-names = "apb", "hosc", "losc"; gpio-controller; interrupt-controller; @@ -1316,7 +1318,7 @@ ar100: ar100_clk { compatible = "allwinner,sun6i-a31-ar100-clk"; #clock-cells = <0>; - clocks = <&rtc 0>, <&osc24M>, + clocks = <&rtc CLK_OSC32K>, <&osc24M>, <&ccu CLK_PLL_PERIPH>, <&ccu CLK_PLL_PERIPH>; clock-output-names = "ar100"; @@ -1351,7 +1353,7 @@ ir_clk: ir_clk { #clock-cells = <0>; compatible = "allwinner,sun4i-a10-mod0-clk"; - clocks = <&rtc 0>, <&osc24M>; + clocks = <&rtc CLK_OSC32K>, <&osc24M>; clock-output-names = "ir"; }; @@ -1381,9 +1383,8 @@ reg = <0x01f02c00 0x400>; interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>; + clocks = <&apb0_gates 0>, <&osc24M>, <&rtc CLK_OSC32K>; clock-names = "apb", "hosc", "losc"; - resets = <&apb0_rst 0>; gpio-controller; interrupt-controller; #interrupt-cells = <3>; diff --git a/arch/arm/dts/sun7i-a20-pcduino3.dts b/arch/arm/dts/sun7i-a20-pcduino3.dts index 4f8d55d3ba7..928b86a95f3 100644 --- a/arch/arm/dts/sun7i-a20-pcduino3.dts +++ b/arch/arm/dts/sun7i-a20-pcduino3.dts @@ -78,19 +78,19 @@ gpio-keys { compatible = "gpio-keys"; - back { + key-back { label = "Key Back"; linux,code = <KEY_BACK>; gpios = <&pio 7 17 GPIO_ACTIVE_LOW>; }; - home { + key-home { label = "Key Home"; linux,code = <KEY_HOME>; gpios = <&pio 7 18 GPIO_ACTIVE_LOW>; }; - menu { + key-menu { label = "Key Menu"; linux,code = <KEY_MENU>; gpios = <&pio 7 19 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/dts/sun8i-a23-a33.dtsi b/arch/arm/dts/sun8i-a23-a33.dtsi index a42fac676b3..06809c3a1f2 100644 --- a/arch/arm/dts/sun8i-a23-a33.dtsi +++ b/arch/arm/dts/sun8i-a23-a33.dtsi @@ -44,6 +44,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/clock/sun6i-rtc.h> #include <dt-bindings/clock/sun8i-a23-a33-ccu.h> #include <dt-bindings/reset/sun8i-a23-a33-ccu.h> @@ -329,7 +330,7 @@ ccu: clock@1c20000 { reg = <0x01c20000 0x400>; - clocks = <&osc24M>, <&rtc 0>; + clocks = <&osc24M>, <&rtc CLK_OSC32K>; clock-names = "hosc", "losc"; #clock-cells = <1>; #reset-cells = <1>; @@ -339,7 +340,8 @@ /* compatible gets set in SoC specific dtsi file */ reg = <0x01c20800 0x400>; /* interrupts get set in SoC specific dtsi file */ - clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; + clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, + <&rtc CLK_OSC32K>; clock-names = "apb", "hosc", "losc"; gpio-controller; interrupt-controller; @@ -806,9 +808,8 @@ compatible = "allwinner,sun8i-a23-r-pinctrl"; reg = <0x01f02c00 0x400>; interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>; + clocks = <&apb0_gates 0>, <&osc24M>, <&rtc CLK_OSC32K>; clock-names = "apb", "hosc", "losc"; - resets = <&apb0_rst 0>; gpio-controller; interrupt-controller; #interrupt-cells = <3>; diff --git a/arch/arm/dts/sun8i-a23-ippo-q8h-v1.2.dts b/arch/arm/dts/sun8i-a23-ippo-q8h-v1.2.dts index 51097c77a15..c2f22fc3381 100644..120000 --- a/arch/arm/dts/sun8i-a23-ippo-q8h-v1.2.dts +++ b/arch/arm/dts/sun8i-a23-ippo-q8h-v1.2.dts @@ -1,73 +1 @@ -/* - * Copyright 2015 Hans de Goede <hdegoede@redhat.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun8i-a23.dtsi" -#include "sun8i-q8-common.dtsi" - -/ { - model = "Q8 A23 Tablet"; - compatible = "allwinner,q8-a23", "allwinner,sun8i-a23"; -}; - -&codec { - allwinner,pa-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */ - allwinner,audio-routing = - "Headphone", "HP", - "Headphone", "HPCOM", - "Speaker", "HP", - "MIC1", "Mic", - "MIC2", "Headset Mic", - "Mic", "MBIAS", - "Headset Mic", "HBIAS"; - status = "okay"; -}; - -&panel { - compatible = "bananapi,s070wv20-ct16"; -}; - -&tcon0_out { - tcon0_out_lcd: endpoint { - remote-endpoint = <&panel_input>; - }; -}; +sun8i-a23-q8-tablet.dts
\ No newline at end of file diff --git a/arch/arm/dts/sun8i-a23-ippo-q8h-v5.dts b/arch/arm/dts/sun8i-a23-ippo-q8h-v5.dts index 51097c77a15..c2f22fc3381 100644..120000 --- a/arch/arm/dts/sun8i-a23-ippo-q8h-v5.dts +++ b/arch/arm/dts/sun8i-a23-ippo-q8h-v5.dts @@ -1,73 +1 @@ -/* - * Copyright 2015 Hans de Goede <hdegoede@redhat.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun8i-a23.dtsi" -#include "sun8i-q8-common.dtsi" - -/ { - model = "Q8 A23 Tablet"; - compatible = "allwinner,q8-a23", "allwinner,sun8i-a23"; -}; - -&codec { - allwinner,pa-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */ - allwinner,audio-routing = - "Headphone", "HP", - "Headphone", "HPCOM", - "Speaker", "HP", - "MIC1", "Mic", - "MIC2", "Headset Mic", - "Mic", "MBIAS", - "Headset Mic", "HBIAS"; - status = "okay"; -}; - -&panel { - compatible = "bananapi,s070wv20-ct16"; -}; - -&tcon0_out { - tcon0_out_lcd: endpoint { - remote-endpoint = <&panel_input>; - }; -}; +sun8i-a23-q8-tablet.dts
\ No newline at end of file diff --git a/arch/arm/dts/sun8i-a33-et-q8-v1.6.dts b/arch/arm/dts/sun8i-a33-et-q8-v1.6.dts index 9c5750c2561..4519fd791a8 100644..120000 --- a/arch/arm/dts/sun8i-a33-et-q8-v1.6.dts +++ b/arch/arm/dts/sun8i-a33-et-q8-v1.6.dts @@ -1,57 +1 @@ -/* - * Copyright 2015 Hans de Goede <hdegoede@redhat.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun8i-a33.dtsi" -#include "sun8i-q8-common.dtsi" - -/ { - model = "Q8 A33 Tablet"; - compatible = "allwinner,q8-a33", "allwinner,sun8i-a33"; -}; - -&tcon0_out { - tcon0_out_lcd: endpoint@0 { - reg = <0>; - remote-endpoint = <&panel_input>; - }; -}; +sun8i-a33-q8-tablet.dts
\ No newline at end of file diff --git a/arch/arm/dts/sun8i-a33-ippo-q8h-v1.2.dts b/arch/arm/dts/sun8i-a33-ippo-q8h-v1.2.dts index 9c5750c2561..4519fd791a8 100644..120000 --- a/arch/arm/dts/sun8i-a33-ippo-q8h-v1.2.dts +++ b/arch/arm/dts/sun8i-a33-ippo-q8h-v1.2.dts @@ -1,57 +1 @@ -/* - * Copyright 2015 Hans de Goede <hdegoede@redhat.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "sun8i-a33.dtsi" -#include "sun8i-q8-common.dtsi" - -/ { - model = "Q8 A33 Tablet"; - compatible = "allwinner,q8-a33", "allwinner,sun8i-a33"; -}; - -&tcon0_out { - tcon0_out_lcd: endpoint@0 { - reg = <0>; - remote-endpoint = <&panel_input>; - }; -}; +sun8i-a33-q8-tablet.dts
\ No newline at end of file diff --git a/arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts b/arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts index d5c7b7984d8..d729b7c705d 100644 --- a/arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts +++ b/arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts @@ -47,10 +47,10 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; - sw4 { + switch-4 { label = "power"; linux,code = <KEY_POWER>; gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; @@ -106,7 +106,7 @@ wifi_pwrseq: wifi_pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "ext_clock"; }; }; @@ -181,7 +181,7 @@ bluetooth { compatible = "brcm,bcm43438-bt"; max-speed = <1500000>; - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "lpo"; vbat-supply = <®_vcc3v3>; vddio-supply = <®_vcc3v3>; diff --git a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts index f19ed981da9..3706216ffb4 100644 --- a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts +++ b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts @@ -169,7 +169,7 @@ flash@0 { #address-cells = <1>; #size-cells = <1>; - compatible = "mxicy,mx25l1606e", "winbond,w25q128"; + compatible = "mxicy,mx25l1606e", "jedec,spi-nor"; reg = <0>; spi-max-frequency = <40000000>; }; diff --git a/arch/arm/dts/sun8i-h3-beelink-x2.dts b/arch/arm/dts/sun8i-h3-beelink-x2.dts index cd9f655e4f9..27a0d51289d 100644 --- a/arch/arm/dts/sun8i-h3-beelink-x2.dts +++ b/arch/arm/dts/sun8i-h3-beelink-x2.dts @@ -93,10 +93,10 @@ }; }; - r-gpio-keys { + gpio-keys { compatible = "gpio-keys"; - power { + key-power { label = "power"; linux,code = <KEY_POWER>; gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; @@ -125,7 +125,7 @@ wifi_pwrseq: wifi_pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "ext_clock"; }; }; diff --git a/arch/arm/dts/sun8i-h3-mapleboard-mp130.dts b/arch/arm/dts/sun8i-h3-mapleboard-mp130.dts index ff0a7a952e0..f5c8ccc5b87 100644 --- a/arch/arm/dts/sun8i-h3-mapleboard-mp130.dts +++ b/arch/arm/dts/sun8i-h3-mapleboard-mp130.dts @@ -39,16 +39,16 @@ }; }; - r_gpio_keys { + gpio-keys { compatible = "gpio-keys"; - power { + key-power { label = "power"; linux,code = <KEY_POWER>; gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; /* PL3 */ }; - user { + key-user { label = "user"; linux,code = <BTN_0>; gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/dts/sun8i-h3-nanopi-duo2.dts b/arch/arm/dts/sun8i-h3-nanopi-duo2.dts index 8e7dfcffe1f..43641cb8239 100644 --- a/arch/arm/dts/sun8i-h3-nanopi-duo2.dts +++ b/arch/arm/dts/sun8i-h3-nanopi-duo2.dts @@ -37,10 +37,10 @@ }; }; - r_gpio_keys { + gpio-keys { compatible = "gpio-keys"; - k1 { + key-0 { label = "k1"; linux,code = <BTN_0>; gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; /* PL3 */ @@ -90,7 +90,7 @@ wifi_pwrseq: wifi_pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "ext_clock"; }; @@ -151,7 +151,7 @@ bluetooth { compatible = "brcm,bcm43438-bt"; - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "lpo"; vbat-supply = <®_vcc3v3>; vddio-supply = <®_vcc3v3>; diff --git a/arch/arm/dts/sun8i-h3-nanopi-neo-air.dts b/arch/arm/dts/sun8i-h3-nanopi-neo-air.dts index cd3df12b657..9e1a33f94ca 100644 --- a/arch/arm/dts/sun8i-h3-nanopi-neo-air.dts +++ b/arch/arm/dts/sun8i-h3-nanopi-neo-air.dts @@ -127,7 +127,7 @@ bluetooth { compatible = "brcm,bcm43438-bt"; - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "lpo"; vbat-supply = <®_vcc3v3>; vddio-supply = <®_vcc3v3>; diff --git a/arch/arm/dts/sun8i-h3-nanopi-r1.dts b/arch/arm/dts/sun8i-h3-nanopi-r1.dts index 26e2e6172e0..42cd1131adf 100644 --- a/arch/arm/dts/sun8i-h3-nanopi-r1.dts +++ b/arch/arm/dts/sun8i-h3-nanopi-r1.dts @@ -46,7 +46,7 @@ wifi_pwrseq: wifi_pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "ext_clock"; }; @@ -147,7 +147,7 @@ bluetooth { compatible = "brcm,bcm43438-bt"; - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "lpo"; vbat-supply = <®_vcc3v3>; vddio-supply = <®_vcc3v3>; diff --git a/arch/arm/dts/sun8i-h3-nanopi.dtsi b/arch/arm/dts/sun8i-h3-nanopi.dtsi index fc45d5aaa67..cf8413fba6c 100644 --- a/arch/arm/dts/sun8i-h3-nanopi.dtsi +++ b/arch/arm/dts/sun8i-h3-nanopi.dtsi @@ -73,11 +73,10 @@ }; }; - r_gpio_keys { + gpio-keys { compatible = "gpio-keys"; - input-name = "k1"; - k1 { + key-0 { label = "k1"; linux,code = <KEY_POWER>; gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/dts/sun8i-h3-orangepi-2.dts b/arch/arm/dts/sun8i-h3-orangepi-2.dts index 9daffd90c12..f1f9dbead32 100644 --- a/arch/arm/dts/sun8i-h3-orangepi-2.dts +++ b/arch/arm/dts/sun8i-h3-orangepi-2.dts @@ -88,16 +88,16 @@ }; }; - r_gpio_keys { + gpio-keys { compatible = "gpio-keys"; - sw2 { + switch-2 { label = "sw2"; linux,code = <BTN_1>; gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; }; - sw4 { + switch-4 { label = "sw4"; linux,code = <KEY_POWER>; gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/dts/sun8i-h3-orangepi-lite.dts b/arch/arm/dts/sun8i-h3-orangepi-lite.dts index 6f9c97add54..305b34a321f 100644 --- a/arch/arm/dts/sun8i-h3-orangepi-lite.dts +++ b/arch/arm/dts/sun8i-h3-orangepi-lite.dts @@ -87,10 +87,10 @@ }; }; - r_gpio_keys { + gpio-keys { compatible = "gpio-keys"; - sw4 { + switch-4 { label = "sw4"; linux,code = <BTN_0>; gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/dts/sun8i-h3-orangepi-one.dts b/arch/arm/dts/sun8i-h3-orangepi-one.dts index 4759ba3f298..59f6f6d5e7c 100644 --- a/arch/arm/dts/sun8i-h3-orangepi-one.dts +++ b/arch/arm/dts/sun8i-h3-orangepi-one.dts @@ -86,10 +86,10 @@ }; }; - r_gpio_keys { + gpio-keys { compatible = "gpio-keys"; - sw4 { + switch-4 { label = "sw4"; linux,code = <BTN_0>; gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/dts/sun8i-h3-orangepi-pc.dts index 90f75fa85e6..b96e015f54e 100644 --- a/arch/arm/dts/sun8i-h3-orangepi-pc.dts +++ b/arch/arm/dts/sun8i-h3-orangepi-pc.dts @@ -86,10 +86,10 @@ }; }; - r_gpio_keys { + gpio-keys { compatible = "gpio-keys"; - sw4 { + switch-4 { label = "sw4"; linux,code = <KEY_POWER>; gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/dts/sun8i-r16-bananapi-m2m.dts b/arch/arm/dts/sun8i-r16-bananapi-m2m.dts index 293016d081c..f97218e70c1 100644 --- a/arch/arm/dts/sun8i-r16-bananapi-m2m.dts +++ b/arch/arm/dts/sun8i-r16-bananapi-m2m.dts @@ -91,7 +91,7 @@ wifi_pwrseq: wifi_pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL06 */ - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "ext_clock"; }; }; @@ -283,7 +283,7 @@ bluetooth { compatible = "brcm,bcm43438-bt"; - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "lpo"; vbat-supply = <®_dldo1>; vddio-supply = <®_aldo3>; diff --git a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts index a6a1087a0c9..28197bbcb1d 100644 --- a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts +++ b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts @@ -43,6 +43,7 @@ /dts-v1/; #include "sun8i-r40.dtsi" +#include "sun8i-r40-cpu-opp.dtsi" #include <dt-bindings/gpio/gpio.h> @@ -113,6 +114,10 @@ status = "okay"; }; +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + &de { status = "okay"; }; diff --git a/arch/arm/dts/sun8i-r40-cpu-opp.dtsi b/arch/arm/dts/sun8i-r40-cpu-opp.dtsi new file mode 100644 index 00000000000..649928b361a --- /dev/null +++ b/arch/arm/dts/sun8i-r40-cpu-opp.dtsi @@ -0,0 +1,52 @@ +/{ + cpu0_opp_table: opp-table-cpu { + compatible = "operating-points-v2"; + opp-shared; + + opp-720000000 { + opp-hz = /bits/ 64 <720000000>; + opp-microvolt = <1000000 1000000 1300000>; + clock-latency-ns = <2000000>; + }; + + opp-912000000 { + opp-hz = /bits/ 64 <912000000>; + opp-microvolt = <1100000 1100000 1300000>; + clock-latency-ns = <2000000>; + }; + + opp-1008000000 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <1160000 1160000 1300000>; + clock-latency-ns = <2000000>; + }; + + opp-1104000000 { + opp-hz = /bits/ 64 <1104000000>; + opp-microvolt = <1240000 1240000 1300000>; + clock-latency-ns = <2000000>; + }; + + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1300000 1300000 1300000>; + clock-latency-ns = <2000000>; + }; + }; +}; + +&cpu0 { + operating-points-v2 = <&cpu0_opp_table>; +}; + +&cpu1 { + operating-points-v2 = <&cpu0_opp_table>; +}; + +&cpu2 { + operating-points-v2 = <&cpu0_opp_table>; +}; + +&cpu3 { + operating-points-v2 = <&cpu0_opp_table>; +}; diff --git a/arch/arm/dts/sun8i-r40-feta40i.dtsi b/arch/arm/dts/sun8i-r40-feta40i.dtsi index 265e0fa57a3..9f39b5a2bb3 100644 --- a/arch/arm/dts/sun8i-r40-feta40i.dtsi +++ b/arch/arm/dts/sun8i-r40-feta40i.dtsi @@ -5,6 +5,11 @@ // Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io> #include "sun8i-r40.dtsi" +#include "sun8i-r40-cpu-opp.dtsi" + +&cpu0 { + cpu-supply = <®_dcdc2>; +}; &i2c0 { status = "okay"; diff --git a/arch/arm/dts/sun8i-r40.dtsi b/arch/arm/dts/sun8i-r40.dtsi index 03d3e5f45a0..4ef26d8f534 100644 --- a/arch/arm/dts/sun8i-r40.dtsi +++ b/arch/arm/dts/sun8i-r40.dtsi @@ -42,6 +42,7 @@ */ #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/clock/sun6i-rtc.h> #include <dt-bindings/clock/sun8i-de2.h> #include <dt-bindings/clock/sun8i-r40-ccu.h> #include <dt-bindings/clock/sun8i-tcon-top.h> @@ -84,24 +85,36 @@ compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <0>; + clocks = <&ccu CLK_CPU>; + clock-names = "cpu"; + #cooling-cells = <2>; }; cpu1: cpu@1 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <1>; + clocks = <&ccu CLK_CPU>; + clock-names = "cpu"; + #cooling-cells = <2>; }; cpu2: cpu@2 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <2>; + clocks = <&ccu CLK_CPU>; + clock-names = "cpu"; + #cooling-cells = <2>; }; cpu3: cpu@3 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <3>; + clocks = <&ccu CLK_CPU>; + clock-names = "cpu"; + #cooling-cells = <2>; }; }; @@ -117,6 +130,30 @@ polling-delay-passive = <0>; polling-delay = <0>; thermal-sensors = <&ths 0>; + + trips { + cpu_hot_trip: cpu-hot { + temperature = <80000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_very_hot_trip: cpu-very-hot { + temperature = <115000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + cpu-hot-limit { + trip = <&cpu_hot_trip>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; gpu_thermal: gpu-thermal { @@ -485,7 +522,7 @@ ccu: clock@1c20000 { compatible = "allwinner,sun8i-r40-ccu"; reg = <0x01c20000 0x400>; - clocks = <&osc24M>, <&rtc 0>; + clocks = <&osc24M>, <&rtc CLK_OSC32K>; clock-names = "hosc", "losc"; #clock-cells = <1>; #reset-cells = <1>; @@ -504,7 +541,8 @@ compatible = "allwinner,sun8i-r40-pinctrl"; reg = <0x01c20800 0x400>; interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; + clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, + <&rtc CLK_OSC32K>; clock-names = "apb", "hosc", "losc"; gpio-controller; interrupt-controller; @@ -1231,7 +1269,7 @@ reg-io-width = <1>; interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_HDMI0>, <&ccu CLK_HDMI_SLOW>, - <&ccu CLK_HDMI>, <&rtc 0>; + <&ccu CLK_HDMI>, <&rtc CLK_OSC32K>; clock-names = "iahb", "isfr", "tmds", "cec"; resets = <&ccu RST_BUS_HDMI1>; reset-names = "ctrl"; diff --git a/arch/arm/dts/sun8i-t3-cqa3t-bv3.dts b/arch/arm/dts/sun8i-t3-cqa3t-bv3.dts index 6931aaab238..9f472521f4a 100644 --- a/arch/arm/dts/sun8i-t3-cqa3t-bv3.dts +++ b/arch/arm/dts/sun8i-t3-cqa3t-bv3.dts @@ -45,6 +45,7 @@ /dts-v1/; #include "sun8i-r40.dtsi" +#include "sun8i-r40-cpu-opp.dtsi" #include <dt-bindings/gpio/gpio.h> @@ -88,6 +89,10 @@ status = "okay"; }; +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + &de { status = "okay"; }; diff --git a/arch/arm/dts/sun8i-v3s.dtsi b/arch/arm/dts/sun8i-v3s.dtsi index 084323d5c61..db194c606fd 100644 --- a/arch/arm/dts/sun8i-v3s.dtsi +++ b/arch/arm/dts/sun8i-v3s.dtsi @@ -42,6 +42,7 @@ */ #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/clock/sun6i-rtc.h> #include <dt-bindings/clock/sun8i-v3s-ccu.h> #include <dt-bindings/reset/sun8i-v3s-ccu.h> #include <dt-bindings/clock/sun8i-de2.h> @@ -321,7 +322,7 @@ ccu: clock@1c20000 { compatible = "allwinner,sun8i-v3s-ccu"; reg = <0x01c20000 0x400>; - clocks = <&osc24M>, <&rtc 0>; + clocks = <&osc24M>, <&rtc CLK_OSC32K>; clock-names = "hosc", "losc"; #clock-cells = <1>; #reset-cells = <1>; @@ -342,7 +343,8 @@ reg = <0x01c20800 0x400>; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; + clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, + <&rtc CLK_OSC32K>; clock-names = "apb", "hosc", "losc"; gpio-controller; #gpio-cells = <3>; diff --git a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts index 47954551f57..434871040ac 100644 --- a/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts +++ b/arch/arm/dts/sun8i-v40-bananapi-m2-berry.dts @@ -42,6 +42,7 @@ /dts-v1/; #include "sun8i-r40.dtsi" +#include "sun8i-r40-cpu-opp.dtsi" #include <dt-bindings/gpio/gpio.h> @@ -107,6 +108,10 @@ status = "okay"; }; +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + &de { status = "okay"; }; diff --git a/arch/arm/dts/sun9i-a80.dtsi b/arch/arm/dts/sun9i-a80.dtsi index ce4fa6706d0..7d3f3300f43 100644 --- a/arch/arm/dts/sun9i-a80.dtsi +++ b/arch/arm/dts/sun9i-a80.dtsi @@ -1218,7 +1218,6 @@ <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; clocks = <&apbs_gates 0>, <&osc24M>, <&osc32k>; clock-names = "apb", "hosc", "losc"; - resets = <&apbs_rst 0>; gpio-controller; interrupt-controller; #interrupt-cells = <3>; diff --git a/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi b/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi index d03f5853ef7..e899d14f38c 100644 --- a/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi +++ b/arch/arm/dts/sunxi-bananapi-m2-plus.dtsi @@ -77,10 +77,10 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; - sw4 { + switch-4 { label = "power"; linux,code = <KEY_POWER>; gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; @@ -101,7 +101,7 @@ wifi_pwrseq: wifi_pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "ext_clock"; }; }; @@ -221,7 +221,7 @@ bluetooth { compatible = "brcm,bcm43438-bt"; max-speed = <1500000>; - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "lpo"; vbat-supply = <®_vcc3v3>; vddio-supply = <®_vcc3v3>; diff --git a/arch/arm/dts/sunxi-h3-h5-emlid-neutis.dtsi b/arch/arm/dts/sunxi-h3-h5-emlid-neutis.dtsi index fc67e30fe21..60804b0e6c5 100644 --- a/arch/arm/dts/sunxi-h3-h5-emlid-neutis.dtsi +++ b/arch/arm/dts/sunxi-h3-h5-emlid-neutis.dtsi @@ -22,7 +22,7 @@ compatible = "mmc-pwrseq-simple"; reset-gpios = <&pio 2 7 GPIO_ACTIVE_LOW>; /* PC7 */ post-power-on-delay-ms = <200>; - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "ext_clock"; }; }; @@ -124,7 +124,7 @@ bluetooth { compatible = "brcm,bcm43438-bt"; - clocks = <&rtc 1>; + clocks = <&rtc CLK_OSC32K_FANOUT>; clock-names = "lpo"; vbat-supply = <®_vcc3v3>; vddio-supply = <®_vcc3v3>; diff --git a/arch/arm/dts/sunxi-h3-h5.dtsi b/arch/arm/dts/sunxi-h3-h5.dtsi index 6cea57e07f8..64391418609 100644 --- a/arch/arm/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/dts/sunxi-h3-h5.dtsi @@ -40,6 +40,7 @@ * OTHER DEALINGS IN THE SOFTWARE. */ +#include <dt-bindings/clock/sun6i-rtc.h> #include <dt-bindings/clock/sun8i-de2.h> #include <dt-bindings/clock/sun8i-h3-ccu.h> #include <dt-bindings/clock/sun8i-r-ccu.h> @@ -386,7 +387,7 @@ ccu: clock@1c20000 { /* compatible is in per SoC .dtsi file */ reg = <0x01c20000 0x400>; - clocks = <&osc24M>, <&rtc 0>; + clocks = <&osc24M>, <&rtc CLK_OSC32K>; clock-names = "hosc", "losc"; #clock-cells = <1>; #reset-cells = <1>; @@ -397,7 +398,8 @@ reg = <0x01c20800 0x400>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>; + clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, + <&rtc CLK_OSC32K>; clock-names = "apb", "hosc", "losc"; gpio-controller; #gpio-cells = <3>; @@ -817,7 +819,7 @@ reg-io-width = <1>; interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>, - <&ccu CLK_HDMI>, <&rtc 0>; + <&ccu CLK_HDMI>, <&rtc CLK_OSC32K>; clock-names = "iahb", "isfr", "tmds", "cec"; resets = <&ccu RST_BUS_HDMI1>; reset-names = "ctrl"; @@ -876,7 +878,7 @@ r_ccu: clock@1f01400 { compatible = "allwinner,sun8i-h3-r-ccu"; reg = <0x01f01400 0x100>; - clocks = <&osc24M>, <&rtc 0>, <&rtc 2>, + clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>, <&ccu CLK_PLL_PERIPH0>; clock-names = "hosc", "losc", "iosc", "pll-periph"; #clock-cells = <1>; @@ -928,7 +930,8 @@ compatible = "allwinner,sun8i-h3-r-pinctrl"; reg = <0x01f02c00 0x400>; interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&rtc 0>; + clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, + <&rtc CLK_OSC32K>; clock-names = "apb", "hosc", "losc"; gpio-controller; #gpio-cells = <3>; diff --git a/arch/arm/dts/sunxi-libretech-all-h3-cc.dtsi b/arch/arm/dts/sunxi-libretech-all-h3-cc.dtsi index 9e14fe5fdcd..89731bb34c6 100644 --- a/arch/arm/dts/sunxi-libretech-all-h3-cc.dtsi +++ b/arch/arm/dts/sunxi-libretech-all-h3-cc.dtsi @@ -42,10 +42,10 @@ }; }; - gpio_keys { + gpio-keys { compatible = "gpio-keys"; - power { + key-power { label = "power"; linux,code = <KEY_POWER>; gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h index 732ca370403..b66277fc7f3 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_px30.h +++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h @@ -445,5 +445,24 @@ enum { /* CRU_PMU_CLK_SEL0_CON */ CLK_PMU_PCLK_DIV_SHIFT = 0, CLK_PMU_PCLK_DIV_MASK = 0x1f << CLK_PMU_PCLK_DIV_SHIFT, + + /* CRU_PMU_CLKSEL3_CON */ + UART0_PLL_SEL_SHIFT = 14, + UART0_PLL_SEL_MASK = 3 << UART0_PLL_SEL_SHIFT, + UART0_PLL_SEL_GPLL = 0, + UART0_PLL_SEL_24M, + UART0_PLL_SEL_480M, + UART0_PLL_SEL_NPLL, + UART0_DIV_CON_SHIFT = 0, + UART0_DIV_CON_MASK = 0x1f << UART0_DIV_CON_SHIFT, + + /* CRU_PMU_CLKSEL4_CON */ + UART0_CLK_SEL_SHIFT = 14, + UART0_CLK_SEL_MASK = 3 << UART0_PLL_SEL_SHIFT, + UART0_CLK_SEL_UART0 = 0, + UART0_CLK_SEL_UART0_NP5, + UART0_CLK_SEL_UART0_FRAC, + UART0_DIVNP5_SHIFT = 0, + UART0_DIVNP5_MASK = 0x1f << UART0_DIVNP5_SHIFT, }; #endif diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c index be70d30cc8a..0641e6af0f7 100644 --- a/arch/arm/mach-rockchip/px30/px30.c +++ b/arch/arm/mach-rockchip/px30/px30.c @@ -41,6 +41,7 @@ struct mm_region *mem_map = px30_mem_map; #define PMUGRF_BASE 0xff010000 #define GRF_BASE 0xff140000 #define CRU_BASE 0xff2b0000 +#define PMUCRU_BASE 0xff2bc000 #define VIDEO_PHY_BASE 0xff2e0000 #define SERVICE_CORE_ADDR 0xff508000 #define DDR_FW_BASE 0xff534000 @@ -198,6 +199,21 @@ enum { GPIO3A1_UART5_RX = 4, }; +/* PMUGRF_GPIO0BL_IOMUX */ +enum { + GPIO0B3_SHIFT = 6, + GPIO0B3_MASK = 0x3 << GPIO0B3_SHIFT, + GPIO0B3_GPIO = 0, + GPIO0B3_UART0_RX, + GPIO0B3_PMU_DEBUG1, + + GPIO0B2_SHIFT = 4, + GPIO0B2_MASK = 0x3 << GPIO0B2_SHIFT, + GPIO0B2_GPIO = 0, + GPIO0B2_UART0_TX, + GPIO0B2_PMU_DEBUG0, +}; + /* PMUGRF_GPIO0CL_IOMUX */ enum { GPIO0C1_SHIFT = 2, @@ -276,12 +292,16 @@ int arch_cpu_init(void) void board_debug_uart_init(void) { #if defined(CONFIG_DEBUG_UART_BASE) && \ - (CONFIG_DEBUG_UART_BASE == 0xff168000) && \ - (CONFIG_DEBUG_UART_CHANNEL != 1) + (((CONFIG_DEBUG_UART_BASE == 0xff168000) && \ + (CONFIG_DEBUG_UART_CHANNEL != 1)) || \ + CONFIG_DEBUG_UART_BASE == 0xff030000) static struct px30_pmugrf * const pmugrf = (void *)PMUGRF_BASE; #endif static struct px30_grf * const grf = (void *)GRF_BASE; static struct px30_cru * const cru = (void *)CRU_BASE; +#if defined(CONFIG_DEBUG_UART_BASE) && CONFIG_DEBUG_UART_BASE == 0xff030000 + static struct px30_pmucru * const pmucru = (void *)PMUCRU_BASE; +#endif #if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff158000) /* uart_sel_clk default select 24MHz */ @@ -346,6 +366,19 @@ void board_debug_uart_init(void) GPIO3A2_MASK | GPIO3A1_MASK, GPIO3A2_UART5_TX << GPIO3A2_SHIFT | GPIO3A1_UART5_RX << GPIO3A1_SHIFT); +#elif defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff030000) + /* uart_sel_clk default select 24MHz */ + rk_clrsetreg(&pmucru->pmu_clksel_con[3], + UART0_PLL_SEL_MASK | UART0_DIV_CON_MASK, + UART0_PLL_SEL_24M << UART0_PLL_SEL_SHIFT | 0); + rk_clrsetreg(&pmucru->pmu_clksel_con[4], + UART0_CLK_SEL_MASK, + UART0_CLK_SEL_UART0 << UART0_CLK_SEL_SHIFT); + + rk_clrsetreg(&pmugrf->gpio0bl_iomux, + GPIO0B3_MASK | GPIO0B2_MASK, + GPIO0B3_UART0_RX << GPIO0B3_SHIFT | + GPIO0B2_UART0_TX << GPIO0B2_SHIFT); #else /* GRF_IOFUNC_CON0 */ enum { diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig index e8c57843a38..1be2b585212 100644 --- a/arch/arm/mach-rockchip/rk3288/Kconfig +++ b/arch/arm/mach-rockchip/rk3288/Kconfig @@ -89,7 +89,6 @@ config TARGET_MIQI_RK3288 config TARGET_PHYCORE_RK3288 bool "phyCORE-RK3288" select BOARD_LATE_INIT - select SPL_BOARD_INIT if SPL help Add basic support for the PCM-947 carrier board, a RK3288 based development board made by PHYTEC. This board works in a combination diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index 21db03b961c..a7cc91a952c 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -15,6 +15,7 @@ #include <asm/io.h> #include <asm/arch-rockchip/bootrom.h> #include <asm/arch-rockchip/clock.h> +#include <asm/arch-rockchip/cru.h> #include <asm/arch-rockchip/gpio.h> #include <asm/arch-rockchip/grf_rk3399.h> #include <asm/arch-rockchip/hardware.h> @@ -221,12 +222,17 @@ void spl_perform_fixups(struct spl_image_info *spl_image) "u-boot,spl-boot-device", boot_ofpath); } -#if defined(SPL_GPIO) static void rk3399_force_power_on_reset(void) { ofnode node; struct gpio_desc sysreset_gpio; + if (!IS_ENABLED(CONFIG_SPL_GPIO)) { + debug("%s: trying to force a power-on reset but no GPIO " + "support in SPL!\n", __func__); + return; + } + debug("%s: trying to force a power-on reset\n", __func__); node = ofnode_path("/config"); @@ -243,7 +249,6 @@ static void rk3399_force_power_on_reset(void) dm_gpio_set_value(&sysreset_gpio, 1); } -#endif void __weak led_setup(void) { @@ -253,35 +258,37 @@ void spl_board_init(void) { led_setup(); -#if defined(SPL_GPIO) - struct rockchip_cru *cru = rockchip_get_cru(); + if (IS_ENABLED(CONFIG_SPL_GPIO)) { + struct rockchip_cru *cru = rockchip_get_cru(); - /* - * The RK3399 resets only 'almost all logic' (see also in the TRM - * "3.9.4 Global software reset"), when issuing a software reset. - * This may cause issues during boot-up for some configurations of - * the application software stack. - * - * To work around this, we test whether the last reset reason was - * a power-on reset and (if not) issue an overtemp-reset to reset - * the entire module. - * - * While this was previously fixed by modifying the various places - * that could generate a software reset (e.g. U-Boot's sysreset - * driver, the ATF or Linux), we now have it here to ensure that - * we no longer have to track this through the various components. - */ - if (cru->glb_rst_st != 0) - rk3399_force_power_on_reset(); -#endif + /* + * The RK3399 resets only 'almost all logic' (see also in the + * TRM "3.9.4 Global software reset"), when issuing a software + * reset. This may cause issues during boot-up for some + * configurations of the application software stack. + * + * To work around this, we test whether the last reset reason + * was a power-on reset and (if not) issue an overtemp-reset to + * reset the entire module. + * + * While this was previously fixed by modifying the various + * places that could generate a software reset (e.g. U-Boot's + * sysreset driver, the ATF or Linux), we now have it here to + * ensure that we no longer have to track this through the + * various components. + */ + if (cru->glb_rst_st != 0) + rk3399_force_power_on_reset(); + } -#if defined(SPL_DM_REGULATOR) - /* - * Turning the eMMC and SPI back on (if disabled via the Qseven - * BIOS_ENABLE) signal is done through a always-on regulator). - */ - if (regulators_enable_boot_on(false)) - debug("%s: Cannot enable boot on regulator\n", __func__); -#endif + if (IS_ENABLED(CONFIG_SPL_DM_REGULATOR)) { + /* + * Turning the eMMC and SPI back on (if disabled via the Qseven + * BIOS_ENABLE) signal is done through a always-on regulator). + */ + if (regulators_enable_boot_on(false)) + debug("%s: Cannot enable boot on regulator\n", + __func__); + } } #endif diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index 57125761844..fc5d8bb3c19 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -185,6 +185,8 @@ config MACH_SUNIV select CPU_ARM926EJS select SUNXI_GEN_SUN6I select SUPPORT_SPL + select SKIP_LOWLEVEL_INIT_ONLY + select SPL_SKIP_LOWLEVEL_INIT_ONLY config MACH_SUN4I bool "sun4i (Allwinner A10)" @@ -615,6 +617,18 @@ config SYS_BOARD config SYS_SOC default "sunxi" +config SUNXI_MINIMUM_DRAM_MB + int "minimum DRAM size" + default 32 if MACH_SUNIV + default 64 if MACH_SUN8I_V3S + default 256 + ---help--- + Minimum DRAM size expected on the board. Traditionally we assumed + 256 MB, so that U-Boot would load at 160MB. With co-packaged DRAM + we have smaller sizes, though, so that U-Boot's own load address and + the default payload addresses must be shifted down. + This is expected to be fixed by the SoC selection. + config UART0_PORT_F bool "UART0 on MicroSD breakout board" ---help--- @@ -998,7 +1012,7 @@ config SPL_STACK_R_ADDR config SPL_SPI_SUNXI bool "Support for SPI Flash on Allwinner SoCs in SPL" - depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_R40 || MACH_SUN50I_H6 || MACH_SUNIV + depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_R40 || SUN50I_GEN_H6 || MACH_SUNIV help Enable support for SPI Flash. This option allows SPL to read from sunxi SPI Flash. It uses the same method as the boot ROM, so does diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index 62bb40b8c89..220ed80ba79 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -147,6 +147,10 @@ static int gpio_init(void) sunxi_gpio_set_cfgpin(SUNXI_GPH(12), SUN9I_GPH_UART0); sunxi_gpio_set_cfgpin(SUNXI_GPH(13), SUN9I_GPH_UART0); sunxi_gpio_set_pull(SUNXI_GPH(13), SUNXI_GPIO_PULL_UP); +#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUNIV) + sunxi_gpio_set_cfgpin(SUNXI_GPA(2), SUNIV_GPE_UART0); + sunxi_gpio_set_cfgpin(SUNXI_GPA(3), SUNIV_GPE_UART0); + sunxi_gpio_set_pull(SUNXI_GPA(3), SUNXI_GPIO_PULL_UP); #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I) sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1); sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1); @@ -488,7 +492,7 @@ void reset_cpu(void) } #endif -#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) && !defined(CONFIG_ARM64) +#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) && defined(CONFIG_CPU_V7A) void enable_caches(void) { /* Enable D-cache. I-cache is already enabled in start.S */ diff --git a/arch/arm/mach-sunxi/spl_spi_sunxi.c b/arch/arm/mach-sunxi/spl_spi_sunxi.c index 925bf85f2d2..520f14e5155 100644 --- a/arch/arm/mach-sunxi/spl_spi_sunxi.c +++ b/arch/arm/mach-sunxi/spl_spi_sunxi.c @@ -78,7 +78,7 @@ #define CCM_AHB_GATING0 (0x01C20000 + 0x60) #define CCM_H6_SPI_BGR_REG (0x03001000 + 0x96c) -#ifdef CONFIG_MACH_SUN50I_H6 +#ifdef CONFIG_SUN50I_GEN_H6 #define CCM_SPI0_CLK (0x03001000 + 0x940) #else #define CCM_SPI0_CLK (0x01C20000 + 0xA0) @@ -97,7 +97,7 @@ /* * Allwinner A10/A20 SoCs were using pins PC0,PC1,PC2,PC23 for booting * from SPI Flash, everything else is using pins PC0,PC1,PC2,PC3. - * The H6 uses PC0, PC2, PC3, PC5. + * The H6 uses PC0, PC2, PC3, PC5, the H616 PC0, PC2, PC3, PC4. */ static void spi0_pinmux_setup(unsigned int pin_function) { @@ -105,11 +105,14 @@ static void spi0_pinmux_setup(unsigned int pin_function) sunxi_gpio_set_cfgpin(SUNXI_GPC(0), pin_function); sunxi_gpio_set_cfgpin(SUNXI_GPC(2), pin_function); - /* All chips except H6 use PC1, and only H6 uses PC5. */ - if (!IS_ENABLED(CONFIG_MACH_SUN50I_H6)) + /* All chips except H6 and H616 use PC1. */ + if (!IS_ENABLED(CONFIG_SUN50I_GEN_H6)) sunxi_gpio_set_cfgpin(SUNXI_GPC(1), pin_function); - else + + if (IS_ENABLED(CONFIG_MACH_SUN50I_H6)) sunxi_gpio_set_cfgpin(SUNXI_GPC(5), pin_function); + if (IS_ENABLED(CONFIG_MACH_SUN50I_H616)) + sunxi_gpio_set_cfgpin(SUNXI_GPC(4), pin_function); /* Older generations use PC23 for CS, newer ones use PC3. */ if (IS_ENABLED(CONFIG_MACH_SUN4I) || IS_ENABLED(CONFIG_MACH_SUN7I) || @@ -122,7 +125,7 @@ static void spi0_pinmux_setup(unsigned int pin_function) static bool is_sun6i_gen_spi(void) { return IS_ENABLED(CONFIG_SUNXI_GEN_SUN6I) || - IS_ENABLED(CONFIG_MACH_SUN50I_H6); + IS_ENABLED(CONFIG_SUN50I_GEN_H6); } static uintptr_t spi0_base_address(void) @@ -130,7 +133,7 @@ static uintptr_t spi0_base_address(void) if (IS_ENABLED(CONFIG_MACH_SUN8I_R40)) return 0x01C05000; - if (IS_ENABLED(CONFIG_MACH_SUN50I_H6)) + if (IS_ENABLED(CONFIG_SUN50I_GEN_H6)) return 0x05010000; if (!is_sun6i_gen_spi() || @@ -148,14 +151,14 @@ static void spi0_enable_clock(void) uintptr_t base = spi0_base_address(); /* Deassert SPI0 reset on SUN6I */ - if (IS_ENABLED(CONFIG_MACH_SUN50I_H6)) + if (IS_ENABLED(CONFIG_SUN50I_GEN_H6)) setbits_le32(CCM_H6_SPI_BGR_REG, (1U << 16) | 0x1); else if (is_sun6i_gen_spi()) setbits_le32(SUN6I_BUS_SOFT_RST_REG0, (1 << AHB_RESET_SPI0_SHIFT)); /* Open the SPI0 gate */ - if (!IS_ENABLED(CONFIG_MACH_SUN50I_H6)) + if (!IS_ENABLED(CONFIG_SUN50I_GEN_H6)) setbits_le32(CCM_AHB_GATING0, (1 << AHB_GATE_OFFSET_SPI0)); if (IS_ENABLED(CONFIG_MACH_SUNIV)) { @@ -202,11 +205,11 @@ static void spi0_disable_clock(void) writel(0, CCM_SPI0_CLK); /* Close the SPI0 gate */ - if (!IS_ENABLED(CONFIG_MACH_SUN50I_H6)) + if (!IS_ENABLED(CONFIG_SUN50I_GEN_H6)) clrbits_le32(CCM_AHB_GATING0, (1 << AHB_GATE_OFFSET_SPI0)); /* Assert SPI0 reset on SUN6I */ - if (IS_ENABLED(CONFIG_MACH_SUN50I_H6)) + if (IS_ENABLED(CONFIG_SUN50I_GEN_H6)) clrbits_le32(CCM_H6_SPI_BGR_REG, (1U << 16) | 0x1); else if (is_sun6i_gen_spi()) clrbits_le32(SUN6I_BUS_SOFT_RST_REG0, @@ -218,7 +221,7 @@ static void spi0_init(void) unsigned int pin_function = SUNXI_GPC_SPI0; if (IS_ENABLED(CONFIG_MACH_SUN50I) || - IS_ENABLED(CONFIG_MACH_SUN50I_H6)) + IS_ENABLED(CONFIG_SUN50I_GEN_H6)) pin_function = SUN50I_GPC_SPI0; else if (IS_ENABLED(CONFIG_MACH_SUNIV)) pin_function = SUNIV_GPC_SPI0; diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 32a90b83b5a..8f9578171d3 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -152,6 +152,21 @@ config RISCV_ISA_C when building U-Boot, which results in compressed instructions in the U-Boot binary. +config RISCV_ISA_F + bool "Standard extension for Single-Precision Floating Point" + default y + help + Adds "F" to the ISA string passed to the compiler. + +config RISCV_ISA_D + bool "Standard extension for Double-Precision Floating Point" + depends on RISCV_ISA_F + default y + help + Adds "D" to the ISA string passed to the compiler and changes the + riscv32 ABI from ilp32 to ilp32d and the riscv64 ABI from lp64 to + lp64d. + config RISCV_ISA_A def_bool y diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile index 53d1194ffb6..4963b5109b2 100644 --- a/arch/riscv/Makefile +++ b/arch/riscv/Makefile @@ -5,15 +5,22 @@ ifeq ($(CONFIG_ARCH_RV64I),y) ARCH_BASE = rv64im - ABI = lp64 + ABI_BASE = lp64 endif ifeq ($(CONFIG_ARCH_RV32I),y) ARCH_BASE = rv32im - ABI = ilp32 + ABI_BASE = ilp32 endif ifeq ($(CONFIG_RISCV_ISA_A),y) ARCH_A = a endif +ifeq ($(CONFIG_RISCV_ISA_F),y) + ARCH_F = f +endif +ifeq ($(CONFIG_RISCV_ISA_D),y) + ARCH_D = d + ABI_D = d +endif ifeq ($(CONFIG_RISCV_ISA_C),y) ARCH_C = c endif @@ -24,7 +31,9 @@ ifeq ($(CONFIG_CMODEL_MEDANY),y) CMODEL = medany endif -RISCV_MARCH = $(ARCH_BASE)$(ARCH_A)$(ARCH_C) + +RISCV_MARCH = $(ARCH_BASE)$(ARCH_A)$(ARCH_F)$(ARCH_D)$(ARCH_C) +ABI = $(ABI_BASE)$(ABI_D) # Newer binutils versions default to ISA spec version 20191213 which moves some # instructions from the I extension to the Zicsr and Zifencei extensions. diff --git a/arch/riscv/lib/andes_plic.c b/arch/riscv/lib/andes_plic.c index 68514758a86..1eabcacd09d 100644 --- a/arch/riscv/lib/andes_plic.c +++ b/arch/riscv/lib/andes_plic.c @@ -27,8 +27,8 @@ /* claim register */ #define CLAIM_REG(base, hart) ((ulong)(base) + 0x200004 + (hart) * 0x1000) -#define ENABLE_HART_IPI (0x80808080) -#define SEND_IPI_TO_HART(hart) (0x80 >> (hart)) +#define ENABLE_HART_IPI (0x01010101) +#define SEND_IPI_TO_HART(hart) (0x1 << (hart)) DECLARE_GLOBAL_DATA_PTR; @@ -36,8 +36,9 @@ static int enable_ipi(int hart) { unsigned int en; - en = ENABLE_HART_IPI >> hart; + en = ENABLE_HART_IPI << hart; writel(en, (void __iomem *)ENABLE_REG(gd->arch.plic, hart)); + writel(en, (void __iomem *)ENABLE_REG(gd->arch.plic + 0x4, hart)); return 0; } diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/dts/sandbox.dtsi index d2db1ea5220..7387b54bbda 100644 --- a/arch/sandbox/dts/sandbox.dtsi +++ b/arch/sandbox/dts/sandbox.dtsi @@ -239,6 +239,7 @@ reset@1 { compatible = "sandbox,reset"; + u-boot,dm-pre-proper; }; rng { diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index b853e13f922..70e27cd6a8d 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -1125,10 +1125,12 @@ reset@0 { compatible = "sandbox,warm-reset"; + u-boot,dm-pre-proper; }; reset@1 { compatible = "sandbox,reset"; + u-boot,dm-pre-proper; }; resetc: reset-ctl { diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c b/board/AndesTech/ax25-ae350/ax25-ae350.c index 36f0dd4b0fd..63a966e0924 100644 --- a/board/AndesTech/ax25-ae350/ax25-ae350.c +++ b/board/AndesTech/ax25-ae350/ax25-ae350.c @@ -60,7 +60,7 @@ void *board_fdt_blob_setup(int *err) *err = 0; if (IS_ENABLED(CONFIG_OF_SEPARATE) || IS_ENABLED(CONFIG_OF_BOARD)) { - if (gd->arch.firmware_fdt_addr) + if (fdt_magic((uintptr_t)gd->arch.firmware_fdt_addr) == FDT_MAGIC) return (void *)(ulong)gd->arch.firmware_fdt_addr; } diff --git a/board/emulation/qemu-riscv/Kconfig b/board/emulation/qemu-riscv/Kconfig index d8c57e6bb05..f9883f18b0b 100644 --- a/board/emulation/qemu-riscv/Kconfig +++ b/board/emulation/qemu-riscv/Kconfig @@ -23,7 +23,7 @@ config SPL_TEXT_BASE config SPL_OPENSBI_LOAD_ADDR hex - default 0x81000000 + default 0x80100000 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 68fcc0b1e4f..0ecfd98c226 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -633,8 +633,7 @@ void setup_board_gpio(int board, struct ventana_board_info *info) ctrl); gpio_requestf(cfg->gpio_param, "dio%d", i); gpio_direction_input(cfg->gpio_param); - } else if (hwconfig_subarg_cmp(arg, "mode", "pwm") && - cfg->pwm_padmux) { + } else if (hwconfig_subarg_cmp(arg, "mode", "pwm")) { if (!cfg->pwm_param) { printf("DIO%d: Error: pwm config invalid\n", i); diff --git a/board/kosagi/novena/novena.c b/board/kosagi/novena/novena.c index 815ecf55c4d..f009a8afd48 100644 --- a/board/kosagi/novena/novena.c +++ b/board/kosagi/novena/novena.c @@ -48,67 +48,6 @@ DECLARE_GLOBAL_DATA_PTR; -/* - * GPIO button - */ -#ifdef CONFIG_KEYBOARD -static struct input_config button_input; - -static int novena_gpio_button_read_keys(struct input_config *input) -{ - int key = KEY_ENTER; - if (gpio_get_value(NOVENA_BUTTON_GPIO)) - return 0; - input_send_keycodes(&button_input, &key, 1); - return 1; -} - -static int novena_gpio_button_getc(struct stdio_dev *dev) -{ - return input_getc(&button_input); -} - -static int novena_gpio_button_tstc(struct stdio_dev *dev) -{ - return input_tstc(&button_input); -} - -static int novena_gpio_button_init(struct stdio_dev *dev) -{ - gpio_direction_input(NOVENA_BUTTON_GPIO); - input_set_delays(&button_input, 250, 250); - return 0; -} - -int drv_keyboard_init(void) -{ - int error; - struct stdio_dev dev = { - .name = "button", - .flags = DEV_FLAGS_INPUT, - .start = novena_gpio_button_init, - .getc = novena_gpio_button_getc, - .tstc = novena_gpio_button_tstc, - }; - - gpio_request(NOVENA_BUTTON_GPIO, "button"); - - error = input_init(&button_input, 0); - if (error) { - debug("%s: Cannot set up input\n", __func__); - return -1; - } - input_add_tables(&button_input, false); - button_input.read_keys = novena_gpio_button_read_keys; - - error = input_stdio_register(&dev); - if (error) - return error; - - return 0; -} -#endif - int board_early_init_f(void) { #if defined(CONFIG_VIDEO_IPUV3) diff --git a/board/phytec/phycore_rk3288/phycore-rk3288.c b/board/phytec/phycore_rk3288/phycore-rk3288.c index 17b987f67e1..3f49f39e3d5 100644 --- a/board/phytec/phycore_rk3288/phycore-rk3288.c +++ b/board/phytec/phycore_rk3288/phycore-rk3288.c @@ -19,8 +19,6 @@ #include <netdev.h> #include <linux/bitops.h> #include "som.h" -#include <power/regulator.h> -#include <power/rk8xx_pmic.h> static int valid_rk3288_som(struct rk3288_som *som) { @@ -77,47 +75,3 @@ int rk3288_board_late_init(void) return 0; } - -#ifdef CONFIG_SPL_BUILD -#if !defined(CONFIG_SPL_OF_PLATDATA) -static int phycore_init(void) -{ - struct udevice *pmic; - int ret; - - ret = uclass_first_device_err(UCLASS_PMIC, &pmic); - if (ret) - return ret; - -#if defined(CONFIG_SPL_POWER) - /* Increase USB input current to 2A */ - ret = rk818_spl_configure_usb_input_current(pmic, 2000); - if (ret) - return ret; - - /* Close charger when USB lower then 3.26V */ - ret = rk818_spl_configure_usb_chrg_shutdown(pmic, 3260000); - if (ret) - return ret; -#endif - - return 0; -} -#endif - -void spl_board_init(void) -{ -#if !defined(CONFIG_SPL_OF_PLATDATA) - int ret; - - if (of_machine_is_compatible("phytec,rk3288-phycore-som")) { - ret = phycore_init(); - if (ret) { - debug("Failed to set up phycore power settings: %d\n", - ret); - return; - } - } -#endif -} -#endif diff --git a/board/rockchip/evb_rk3399/MAINTAINERS b/board/rockchip/evb_rk3399/MAINTAINERS index 25e308d1869..5be58f80f9b 100644 --- a/board/rockchip/evb_rk3399/MAINTAINERS +++ b/board/rockchip/evb_rk3399/MAINTAINERS @@ -6,6 +6,12 @@ F: include/configs/evb_rk3399.h F: configs/evb-rk3399_defconfig F: configs/firefly-rk3399_defconfig +EAIDK-610 +M: Andy Yan <andy.yan@rock-chips.com> +S: Maintained +F: configs/eaidk-610-rk3399_defconfig +F: arch/arm/dts/rk3399-eaidk-610-u-boot.dtsi + KHADAS-EDGE M: Nick Xie <nick@khadas.com> S: Maintained diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 5a0b598a338..80e3f4be4b9 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -535,6 +535,11 @@ M: Aleksei Mamlin <mamlinav@gmail.com> S: Maintained F: configs/Wexler_TAB7200_defconfig +X96 MATE TV BOX +M: Andre Przywara <andre.przywara@arm.com> +S: Maintained +F: configs/x96_mate_defconfig + YONES TOPTECH BD1078 BOARD M: Paul Kocialkowski <contact@paulk.fr> S: Maintained diff --git a/board/theobroma-systems/puma_rk3399/Kconfig b/board/theobroma-systems/puma_rk3399/Kconfig index 21946d984da..15af55574c0 100644 --- a/board/theobroma-systems/puma_rk3399/Kconfig +++ b/board/theobroma-systems/puma_rk3399/Kconfig @@ -15,9 +15,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy config ENV_SIZE default 0x4000 -config ENV_OFFSET - default 0x3fc000 if ENV_IS_IN_SPI_FLASH - choice prompt "Theobroma Systems RK3399-Q7 DDR Option" default TARGET_PUMA_RK3399_RAM_DDR3_1333 diff --git a/board/theobroma-systems/puma_rk3399/README b/board/theobroma-systems/puma_rk3399/README index 254c3bbe966..649aa3c543d 100644 --- a/board/theobroma-systems/puma_rk3399/README +++ b/board/theobroma-systems/puma_rk3399/README @@ -44,26 +44,16 @@ Compile the U-Boot > cd ../u-boot > make CROSS_COMPILE=aarch64-linux-gnu- puma-rk3399_defconfig all -Package the image -================= - -The SPL image for SD-Card/eMMC is readily available in idbloader.img at the -root of U-Boot after compilation. - -Creating an SPL image for SPI-NOR: - > tools/mkimage -n rk3399 -T rkspi -d spl/u-boot-spl.bin idbloader-spi.img - Flash the image =============== -Copy the SPL to offset 32k for SD/eMMC, offset 0 for NOR-Flash and the FIT -image to offset 256k. +Copy u-boot-rockchip.bin to offset 32k for SD/eMMC. +Copy u-boot-rockchip-spi.bin to offset 0 for NOR-flash. SD-Card ------- - > dd if=idbloader.img of=/dev/sdb seek=64 - > dd if=u-boot.itb of=/dev/sdb seek=512 + > dd if=u-boot-rockchip.bin of=/dev/sdb seek=64 eMMC ---- @@ -79,8 +69,7 @@ help of the Rockchip loader binary. > ./tools/boot_merger RKBOOT/RK3399MINIALL.ini > cd .. > ./rkdeveloptool db rkbin/rk3399_loader_v1.25.126.bin - > ./rkdeveloptool wl 64 ../idbloader.img - > ./rkdeveloptool wl 512 ../u-boot.itb + > ./rkdeveloptool wl 64 ../u-boot-rockchip.bin NOR-Flash --------- @@ -97,5 +86,4 @@ help of the Rockchip loader binary. > cd .. > ./rkdeveloptool db rkbin/rk3399_loader_spinor_v1.25.114.bin > ./rkdeveloptool ef - > ./rkdeveloptool wl 0 ../idbloader-spi.img - > ./rkdeveloptool wl 512 ../u-boot.itb + > ./rkdeveloptool wl 0 ../u-boot-rockchip-spi.bin diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c index deeba3084a8..97f398bd754 100644 --- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c +++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c @@ -6,6 +6,7 @@ #include <common.h> #include <dm.h> #include <env.h> +#include <env_internal.h> #include <init.h> #include <log.h> #include <misc.h> @@ -77,18 +78,16 @@ static int setup_boottargets(void) } /* - * Only run, if booting from mmc1 (i.e. /mmc@fe320000) and - * only consider cases where the default boot-order first - * tries to boot from mmc0 (eMMC) and then from mmc1 - * (i.e. external SD). - * - * In other words: the SD card will be moved to earlier in the - * order, if U-Boot was also loaded from the SD-card. + * Make the default boot medium between SD Card and eMMC, the one that + * was used to load U-Boot proper. If SPI-NOR flash was used, keep + * original default order. */ - if (!strcmp(boot_device, "/mmc@fe320000")) { + if (strcmp(boot_device, "/spi@ff1d0000/flash@0")) { + bool sd_booted = !strcmp(boot_device, "/mmc@fe320000"); char *mmc0, *mmc1; - debug("%s: booted from SD-Card\n", __func__); + debug("%s: booted from %s\n", __func__, + sd_booted ? "SD-Card" : "eMMC"); mmc0 = strstr(env, "mmc0"); mmc1 = strstr(env, "mmc1"); @@ -98,10 +97,13 @@ static int setup_boottargets(void) } /* - * If mmc0 comes first in the boot order, we need to change - * the strings to make mmc1 first. + * If mmc0 comes first in the boot order and U-Boot proper was + * loaded from mmc1, swap mmc0 and mmc1 in the list. + * If mmc1 comes first in the boot order and U-Boot proper was + * loaded from mmc0, swap mmc0 and mmc1 in the list. */ - if (mmc0 < mmc1) { + if ((mmc0 < mmc1 && sd_booted) || + (mmc0 > mmc1 && !sd_booted)) { mmc0[3] = '1'; mmc1[3] = '0'; debug("%s: set boot_targets to: %s\n", __func__, env); @@ -112,6 +114,64 @@ static int setup_boottargets(void) return 0; } +int mmc_get_env_dev(void) +{ + const char *boot_device = + ofnode_read_chosen_string("u-boot,spl-boot-device"); + + if (!boot_device) { + debug("%s: /chosen/u-boot,spl-boot-device not set\n", + __func__); + return CONFIG_SYS_MMC_ENV_DEV; + } + + debug("%s: booted from %s\n", __func__, boot_device); + + if (!strcmp(boot_device, "/mmc@fe320000")) + return 1; + + if (!strcmp(boot_device, "/mmc@fe330000")) + return 0; + + return CONFIG_SYS_MMC_ENV_DEV; +} + +#if !IS_ENABLED(CONFIG_ENV_IS_NOWHERE) +#error Please enable CONFIG_ENV_IS_NOWHERE +#endif + +enum env_location arch_env_get_location(enum env_operation op, int prio) +{ + const char *boot_device = + ofnode_read_chosen_string("u-boot,spl-boot-device"); + + if (prio > 0) + return ENVL_UNKNOWN; + + if (!boot_device) { + debug("%s: /chosen/u-boot,spl-boot-device not set\n", + __func__); + return ENVL_NOWHERE; + } + + debug("%s: booted from %s\n", __func__, boot_device); + + if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH) && + !strcmp(boot_device, "/spi@ff1d0000/flash@0")) + return ENVL_SPI_FLASH; + + if (IS_ENABLED(CONFIG_ENV_IS_IN_MMC) && + (!strcmp(boot_device, "/mmc@fe320000") || + !strcmp(boot_device, "/mmc@fe330000"))) + return ENVL_MMC; + + printf("%s: No environment available: booted from %s but U-Boot " + "config does not allow loading environment from it.", + __func__, boot_device); + + return ENVL_NOWHERE; +} + int misc_init_r(void) { const u32 cpuid_offset = 0x7; @@ -136,19 +196,3 @@ int misc_init_r(void) return 0; } - -#ifdef CONFIG_SERIAL_TAG -void get_board_serial(struct tag_serialnr *serialnr) -{ - char *serial_string; - u64 serial = 0; - - serial_string = env_get("serial#"); - - if (serial_string) - serial = simple_strtoull(serial_string, NULL, 16); - - serialnr->high = (u32)(serial >> 32); - serialnr->low = (u32)(serial & 0xffffffff); -} -#endif diff --git a/boot/Kconfig b/boot/Kconfig index 6b3b8f072cb..45f86e946cd 100644 --- a/boot/Kconfig +++ b/boot/Kconfig @@ -499,8 +499,8 @@ config SYS_TEXT_BASE default 0x80800000 if ARCH_OMAP2PLUS || ARCH_K3 default 0x81700000 if MACH_SUNIV default 0x2a000000 if MACH_SUN9I - default 0x42e00000 if MACH_SUN8I_V3S - default 0x4a000000 if ARCH_SUNXI + default 0x4a000000 if SUNXI_MINIMUM_DRAM_MB >= 256 + default 0x42e00000 if SUNXI_MINIMUM_DRAM_MB >= 64 hex "Text Base" help The address in memory that U-Boot will be running from, initially. diff --git a/cmd/Kconfig b/cmd/Kconfig index 49247a41c00..41cf1d46fb1 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -86,6 +86,7 @@ config SYS_CBSIZE config SYS_PBSIZE int "Buffer size for console output" + default 1024 if ARCH_SUNXI default 1044 config SYS_XTRACE @@ -1841,6 +1842,14 @@ config CMD_LINK_LOCAL help Acquire a network IP address using the link-local protocol +config CMD_NCSI + bool "ncsi" + depends on PHY_NCSI + help + Manually configure the attached NIC via NC-SI. + Normally this happens automatically before other network + operations. + endif config CMD_ETHSW diff --git a/cmd/bcb.c b/cmd/bcb.c index 1622a90c97f..02d0c70d87e 100644 --- a/cmd/bcb.c +++ b/cmd/bcb.c @@ -14,6 +14,7 @@ #include <part.h> #include <malloc.h> #include <memalign.h> +#include <linux/err.h> enum bcb_cmd { BCB_CMD_LOAD, @@ -128,6 +129,16 @@ static int __bcb_load(int devnum, const char *partp) goto err_read_fail; } + /* + * always select the USER mmc hwpart in case another + * blk operation selected a different hwpart + */ + ret = blk_dselect_hwpart(desc, 0); + if (IS_ERR_VALUE(ret)) { + ret = -ENODEV; + goto err_read_fail; + } + part = simple_strtoul(partp, &endp, 0); if (*endp == '\0') { ret = part_get_info(desc, part, &info); diff --git a/cmd/net.c b/cmd/net.c index 46f8c87b692..addcad3ac14 100644 --- a/cmd/net.c +++ b/cmd/net.c @@ -16,6 +16,7 @@ #include <net.h> #include <net/udp.h> #include <net/sntp.h> +#include <net/ncsi.h> static int netboot_common(enum proto_t, struct cmd_tbl *, int, char * const []); @@ -566,3 +567,24 @@ U_BOOT_CMD( "list - list available devices\n" ); #endif // CONFIG_DM_ETH + +#if defined(CONFIG_CMD_NCSI) +static int do_ncsi(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[]) +{ + if (!phy_interface_is_ncsi() || !ncsi_active()) { + printf("Device not configured for NC-SI\n"); + return CMD_RET_FAILURE; + } + + if (net_loop(NCSI) < 0) + return CMD_RET_FAILURE; + + return CMD_RET_SUCCESS; +} + +U_BOOT_CMD( + ncsi, 1, 1, do_ncsi, + "Configure attached NIC via NC-SI", + "" +); +#endif /* CONFIG_CMD_NCSI */ diff --git a/cmd/qfw.c b/cmd/qfw.c index ccbc967ca9f..95ddc4b79ec 100644 --- a/cmd/qfw.c +++ b/cmd/qfw.c @@ -26,8 +26,8 @@ static int qemu_fwcfg_cmd_setup_kernel(void *load_addr, void *initrd_addr) qfw_read_entry(qfw_dev, FW_CFG_KERNEL_SIZE, 4, &kernel_size); if (kernel_size == 0) { - printf("warning: no kernel available\n"); - return -1; + printf("fatal: no kernel available\n"); + return CMD_RET_FAILURE; } data_addr = load_addr; @@ -40,6 +40,7 @@ static int qemu_fwcfg_cmd_setup_kernel(void *load_addr, void *initrd_addr) qfw_read_entry(qfw_dev, FW_CFG_KERNEL_DATA, le32_to_cpu(kernel_size), data_addr); data_addr += le32_to_cpu(kernel_size); + env_set_hex("filesize", le32_to_cpu(kernel_size)); data_addr = initrd_addr; qfw_read_entry(qfw_dev, FW_CFG_INITRD_SIZE, 4, &initrd_size); @@ -49,6 +50,7 @@ static int qemu_fwcfg_cmd_setup_kernel(void *load_addr, void *initrd_addr) qfw_read_entry(qfw_dev, FW_CFG_INITRD_DATA, le32_to_cpu(initrd_size), data_addr); data_addr += le32_to_cpu(initrd_size); + env_set_hex("filesize", le32_to_cpu(initrd_size)); } qfw_read_entry(qfw_dev, FW_CFG_CMDLINE_SIZE, 4, &cmdline_size); diff --git a/cmd/riscv/sbi.c b/cmd/riscv/sbi.c index 522f502435b..6f2cad4e7ed 100644 --- a/cmd/riscv/sbi.c +++ b/cmd/riscv/sbi.c @@ -30,15 +30,15 @@ static struct sbi_imp implementations[] = { }; static struct sbi_ext extensions[] = { - { SBI_EXT_0_1_SET_TIMER, "sbi_set_timer" }, - { SBI_EXT_0_1_CONSOLE_PUTCHAR, "sbi_console_putchar" }, - { SBI_EXT_0_1_CONSOLE_GETCHAR, "sbi_console_getchar" }, - { SBI_EXT_0_1_CLEAR_IPI, "sbi_clear_ipi" }, - { SBI_EXT_0_1_SEND_IPI, "sbi_send_ipi" }, - { SBI_EXT_0_1_REMOTE_FENCE_I, "sbi_remote_fence_i" }, - { SBI_EXT_0_1_REMOTE_SFENCE_VMA, "sbi_remote_sfence_vma" }, - { SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, "sbi_remote_sfence_vma_asid" }, - { SBI_EXT_0_1_SHUTDOWN, "sbi_shutdown" }, + { SBI_EXT_0_1_SET_TIMER, "Set Timer" }, + { SBI_EXT_0_1_CONSOLE_PUTCHAR, "Console Putchar" }, + { SBI_EXT_0_1_CONSOLE_GETCHAR, "Console Getchar" }, + { SBI_EXT_0_1_CLEAR_IPI, "Clear IPI" }, + { SBI_EXT_0_1_SEND_IPI, "Send IPI" }, + { SBI_EXT_0_1_REMOTE_FENCE_I, "Remote FENCE.I" }, + { SBI_EXT_0_1_REMOTE_SFENCE_VMA, "Remote SFENCE.VMA" }, + { SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, "Remote SFENCE.VMA with ASID" }, + { SBI_EXT_0_1_SHUTDOWN, "System Shutdown" }, { SBI_EXT_BASE, "SBI Base Functionality" }, { SBI_EXT_TIME, "Timer Extension" }, { SBI_EXT_IPI, "IPI Extension" }, @@ -56,8 +56,11 @@ static int do_sbi(struct cmd_tbl *cmdtp, int flag, int argc, long mvendorid, marchid, mimpid; ret = sbi_get_spec_version(); - if (ret >= 0) - printf("SBI %ld.%ld", ret >> 24, ret & 0xffffff); + if (ret < 0) { + printf("No SBI 0.2+\n"); + return CMD_RET_FAILURE; + } + printf("SBI %ld.%ld", ret >> 24, ret & 0xffffff); impl_id = sbi_get_impl_id(); if (impl_id >= 0) { for (i = 0; i < ARRAY_SIZE(implementations); ++i) { @@ -74,6 +77,7 @@ static int do_sbi(struct cmd_tbl *cmdtp, int flag, int argc, vers >> 16, vers & 0xffff); break; case 3: /* KVM */ + case 4: /* RustSBI */ printf("%ld.%ld.%ld", vers >> 16, (vers >> 8) & 0xff, diff --git a/common/board_f.c b/common/board_f.c index 5f1711181c7..4355d1c82d4 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -146,20 +146,27 @@ static int print_resetinfo(void) { struct udevice *dev; char status[256]; + bool status_printed = false; int ret; - ret = uclass_first_device_err(UCLASS_SYSRESET, &dev); - if (ret) { - debug("%s: No sysreset device found (error: %d)\n", - __func__, ret); - /* Not all boards have sysreset drivers available during early - * boot, so don't fail if one can't be found. - */ - return 0; - } + /* Not all boards have sysreset drivers available during early + * boot, so don't fail if one can't be found. + */ + for (ret = uclass_first_device_check(UCLASS_SYSRESET, &dev); dev; + ret = uclass_next_device_check(&dev)) { + if (ret) { + debug("%s: %s sysreset device (error: %d)\n", + __func__, dev->name, ret); + continue; + } - if (!sysreset_get_status(dev, status, sizeof(status))) - printf("%s", status); + if (!sysreset_get_status(dev, status, sizeof(status))) { + printf("%s%s", status_printed ? " " : "", status); + status_printed = true; + } + } + if (status_printed) + printf("\n"); return 0; } diff --git a/common/spl/Kconfig b/common/spl/Kconfig index f2422d28f9e..b1b9e09dc8f 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -81,6 +81,7 @@ config SPL_MAX_SIZE default 0x10000 if ARCH_MX6 && !MX6_OCRAM_256KB default 0x7fa0 if SUNXI_SRAM_ADDRESS = 0x10000 default 0x7fa0 if SUNXI_SRAM_ADDRESS = 0x20000 && !MACH_SUN50I_H616 + default 0xbfa0 if MACH_SUN50I_H616 default 0x7000 if RCAR_GEN3 default 0x5fa0 if SUNXI_SRAM_ADDRESS = 0x0 default 0x10000 if ASPEED_AST2600 @@ -353,6 +354,11 @@ config SPL_STACK default 0x946bb8 if ARCH_MX7 default 0x93ffb8 if ARCH_MX6 && MX6_OCRAM_256KB default 0x91ffb8 if ARCH_MX6 && !MX6_OCRAM_256KB + default 0x118000 if MACH_SUN50I_H6 + default 0x58000 if MACH_SUN50I_H616 + default 0x54000 if MACH_SUN50I || MACH_SUN50I_H5 + default 0x18000 if MACH_SUN9I + default 0x8000 if ARCH_SUNXI help Address of the start of the stack SPL will use before SDRAM is initialized. diff --git a/common/stdio.c b/common/stdio.c index e316a355fae..92811badb88 100644 --- a/common/stdio.c +++ b/common/stdio.c @@ -373,9 +373,6 @@ int stdio_add_devices(void) drv_video_init(); } -#if defined(CONFIG_KEYBOARD) && !defined(CONFIG_DM_KEYBOARD) - drv_keyboard_init(); -#endif drv_system_init(); serial_stdio_init(); #ifdef CONFIG_USB_TTY diff --git a/configs/A10-OLinuXino-Lime_defconfig b/configs/A10-OLinuXino-Lime_defconfig index 26a921279b5..6727932f7fe 100644 --- a/configs/A10-OLinuXino-Lime_defconfig +++ b/configs/A10-OLinuXino-Lime_defconfig @@ -11,9 +11,7 @@ CONFIG_I2C1_ENABLE=y CONFIG_SATAPWR="PC3" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/A10s-OLinuXino-M_defconfig b/configs/A10s-OLinuXino-M_defconfig index 7e9b92ee5ee..99f57857517 100644 --- a/configs/A10s-OLinuXino-M_defconfig +++ b/configs/A10s-OLinuXino-M_defconfig @@ -9,9 +9,7 @@ CONFIG_MMC1_CD_PIN="PG13" CONFIG_MMC_SUNXI_SLOT_EXTRA=1 CONFIG_USB1_VBUS_PIN="PB10" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/A13-OLinuXinoM_defconfig b/configs/A13-OLinuXinoM_defconfig index 625a331e445..f9d17b19500 100644 --- a/configs/A13-OLinuXinoM_defconfig +++ b/configs/A13-OLinuXinoM_defconfig @@ -13,8 +13,6 @@ CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH=y CONFIG_VIDEO_LCD_POWER="PB10" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig index 5e0396c150f..8c9043559bd 100644 --- a/configs/A13-OLinuXino_defconfig +++ b/configs/A13-OLinuXino_defconfig @@ -15,9 +15,7 @@ CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH=y CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_DFU=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_DFU_RAM=y diff --git a/configs/A20-OLinuXino-Lime2-eMMC_defconfig b/configs/A20-OLinuXino-Lime2-eMMC_defconfig index b5802818ec3..bccadcc7b4a 100644 --- a/configs/A20-OLinuXino-Lime2-eMMC_defconfig +++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig @@ -13,9 +13,7 @@ CONFIG_SATAPWR="PC3" CONFIG_SPL_SPI_SUNXI=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_DFU=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_SCSI_AHCI=y diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig index de4f6311f2d..0a9de5ee671 100644 --- a/configs/A20-OLinuXino-Lime2_defconfig +++ b/configs/A20-OLinuXino-Lime2_defconfig @@ -11,9 +11,7 @@ CONFIG_I2C1_ENABLE=y CONFIG_SATAPWR="PC3" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_DFU=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_SCSI_AHCI=y diff --git a/configs/A20-OLinuXino-Lime_defconfig b/configs/A20-OLinuXino-Lime_defconfig index ebb3a02b824..38daf33b95b 100644 --- a/configs/A20-OLinuXino-Lime_defconfig +++ b/configs/A20-OLinuXino-Lime_defconfig @@ -9,9 +9,7 @@ CONFIG_I2C1_ENABLE=y CONFIG_SATAPWR="PC3" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/A20-OLinuXino_MICRO-eMMC_defconfig b/configs/A20-OLinuXino_MICRO-eMMC_defconfig index c8802435b41..d73e64c4605 100644 --- a/configs/A20-OLinuXino_MICRO-eMMC_defconfig +++ b/configs/A20-OLinuXino_MICRO-eMMC_defconfig @@ -11,9 +11,7 @@ CONFIG_VIDEO_VGA=y CONFIG_SATAPWR="PB8" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/A20-OLinuXino_MICRO_defconfig b/configs/A20-OLinuXino_MICRO_defconfig index f4496412456..8a6bb885e9c 100644 --- a/configs/A20-OLinuXino_MICRO_defconfig +++ b/configs/A20-OLinuXino_MICRO_defconfig @@ -12,9 +12,7 @@ CONFIG_VIDEO_VGA=y CONFIG_SATAPWR="PB8" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/A20-Olimex-SOM-EVB_defconfig b/configs/A20-Olimex-SOM-EVB_defconfig index 67b47f51f1b..5de6c2d9a9e 100644 --- a/configs/A20-Olimex-SOM-EVB_defconfig +++ b/configs/A20-Olimex-SOM-EVB_defconfig @@ -12,9 +12,7 @@ CONFIG_USB0_VBUS_DET="PH5" CONFIG_SATAPWR="PC3" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig index e02d67da5e7..6e9bdc27d98 100644 --- a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig +++ b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig @@ -13,9 +13,7 @@ CONFIG_SATAPWR="PC3" CONFIG_GMAC_TX_DELAY=4 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_64BIT_LBA=y CONFIG_FASTBOOT_CMD_OEM_FORMAT=y diff --git a/configs/A20-Olimex-SOM204-EVB_defconfig b/configs/A20-Olimex-SOM204-EVB_defconfig index 317a1e695d8..e0517459ee6 100644 --- a/configs/A20-Olimex-SOM204-EVB_defconfig +++ b/configs/A20-Olimex-SOM204-EVB_defconfig @@ -12,9 +12,7 @@ CONFIG_SATAPWR="PC3" CONFIG_GMAC_TX_DELAY=4 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_64BIT_LBA=y CONFIG_FASTBOOT_CMD_OEM_FORMAT=y diff --git a/configs/A33-OLinuXino_defconfig b/configs/A33-OLinuXino_defconfig index c9eec1f8879..351a454339b 100644 --- a/configs/A33-OLinuXino_defconfig +++ b/configs/A33-OLinuXino_defconfig @@ -16,7 +16,5 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_BL_EN="PB2" CONFIG_VIDEO_LCD_BL_PWM="PH0" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DCDC1_VOLT=3300 CONFIG_USB_MUSB_HOST=y diff --git a/configs/Ainol_AW1_defconfig b/configs/Ainol_AW1_defconfig index 8cd38f7905b..9a18af8c6e1 100644 --- a/configs/Ainol_AW1_defconfig +++ b/configs/Ainol_AW1_defconfig @@ -14,9 +14,7 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Ampe_A76_defconfig b/configs/Ampe_A76_defconfig index 68707ed3e95..7bf3dfcd8a5 100644 --- a/configs/Ampe_A76_defconfig +++ b/configs/Ampe_A76_defconfig @@ -15,9 +15,7 @@ CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Auxtek-T003_defconfig b/configs/Auxtek-T003_defconfig index 703df186b27..7d81f12f766 100644 --- a/configs/Auxtek-T003_defconfig +++ b/configs/Auxtek-T003_defconfig @@ -8,9 +8,7 @@ CONFIG_DRAM_EMR1=0 CONFIG_USB1_VBUS_PIN="PB10" CONFIG_VIDEO_COMPOSITE=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Auxtek-T004_defconfig b/configs/Auxtek-T004_defconfig index a8d236eaf9d..4c7154b04c4 100644 --- a/configs/Auxtek-T004_defconfig +++ b/configs/Auxtek-T004_defconfig @@ -6,9 +6,7 @@ CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=432 CONFIG_USB1_VBUS_PIN="PG13" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Bananapi_M2_Ultra_defconfig b/configs/Bananapi_M2_Ultra_defconfig index be5be9ae2fb..18ee81b6378 100644 --- a/configs/Bananapi_M2_Ultra_defconfig +++ b/configs/Bananapi_M2_Ultra_defconfig @@ -12,9 +12,7 @@ CONFIG_USB2_VBUS_PIN="PH23" # CONFIG_HAS_ARMV7_SECURE_BASE is not set CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig index 053ba137652..6c2a1f630e8 100644 --- a/configs/Bananapi_defconfig +++ b/configs/Bananapi_defconfig @@ -9,9 +9,7 @@ CONFIG_VIDEO_COMPOSITE=y CONFIG_GMAC_TX_DELAY=3 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_NETCONSOLE=y CONFIG_SCSI_AHCI=y CONFIG_SYS_64BIT_LBA=y diff --git a/configs/Bananapi_m2m_defconfig b/configs/Bananapi_m2m_defconfig index 6a07f26c02c..bad38a66568 100644 --- a/configs/Bananapi_m2m_defconfig +++ b/configs/Bananapi_m2m_defconfig @@ -10,8 +10,6 @@ CONFIG_MMC0_CD_PIN="PB4" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB0_ID_DET="PH8" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/Bananapro_defconfig b/configs/Bananapro_defconfig index 36f9bf8b32e..94fd74754ea 100644 --- a/configs/Bananapro_defconfig +++ b/configs/Bananapro_defconfig @@ -11,9 +11,7 @@ CONFIG_VIDEO_COMPOSITE=y CONFIG_GMAC_TX_DELAY=3 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_NETCONSOLE=y CONFIG_SCSI_AHCI=y CONFIG_SYS_64BIT_LBA=y diff --git a/configs/CHIP_defconfig b/configs/CHIP_defconfig index 40d2c5b668a..cd9bdbfd36f 100644 --- a/configs/CHIP_defconfig +++ b/configs/CHIP_defconfig @@ -7,9 +7,7 @@ CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y CONFIG_USB0_VBUS_PIN="PB10" CONFIG_VIDEO_COMPOSITE=y CONFIG_CHIP_DIP_SCAN=y -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_DFU=y CONFIG_DFU_RAM=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/CHIP_pro_defconfig b/configs/CHIP_pro_defconfig index 90168010bb8..29179601907 100644 --- a/configs/CHIP_pro_defconfig +++ b/configs/CHIP_pro_defconfig @@ -5,9 +5,7 @@ CONFIG_SPL=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_TIMINGS_DDR3_800E_1066G_1333J=y CONFIG_USB0_VBUS_PIN="PB10" -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=sunxi-nand.0" diff --git a/configs/CSQ_CS908_defconfig b/configs/CSQ_CS908_defconfig index 49be3fc4a2d..1cd39d498f2 100644 --- a/configs/CSQ_CS908_defconfig +++ b/configs/CSQ_CS908_defconfig @@ -7,8 +7,6 @@ CONFIG_DRAM_CLK=432 CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y diff --git a/configs/Chuwi_V7_CW0825_defconfig b/configs/Chuwi_V7_CW0825_defconfig index b59d1786e6e..02b3e69584f 100644 --- a/configs/Chuwi_V7_CW0825_defconfig +++ b/configs/Chuwi_V7_CW0825_defconfig @@ -14,9 +14,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_HITACHI_TX18D42VM=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Colombus_defconfig b/configs/Colombus_defconfig index 24b55bfa8cc..270bd7d351a 100644 --- a/configs/Colombus_defconfig +++ b/configs/Colombus_defconfig @@ -15,8 +15,6 @@ CONFIG_VIDEO_LCD_BL_EN="PM1" CONFIG_VIDEO_LCD_BL_PWM="PH13" CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/Cubieboard2_defconfig b/configs/Cubieboard2_defconfig index 315c52f3448..ab5e53fb62e 100644 --- a/configs/Cubieboard2_defconfig +++ b/configs/Cubieboard2_defconfig @@ -8,9 +8,7 @@ CONFIG_MMC0_CD_PIN="PH1" CONFIG_SATAPWR="PB8" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Cubieboard4_defconfig b/configs/Cubieboard4_defconfig index 928299e8a51..04ed79afb6d 100644 --- a/configs/Cubieboard4_defconfig +++ b/configs/Cubieboard4_defconfig @@ -12,7 +12,5 @@ CONFIG_USB0_ID_DET="PH16" CONFIG_USB1_VBUS_PIN="PH14" CONFIG_USB3_VBUS_PIN="PH15" CONFIG_AXP_GPIO=y -CONFIG_SPL_STACK=0x18000 -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_SUN8I_RSB=y CONFIG_AXP809_POWER=y diff --git a/configs/Cubieboard_defconfig b/configs/Cubieboard_defconfig index 49eb0186953..c017b126b8c 100644 --- a/configs/Cubieboard_defconfig +++ b/configs/Cubieboard_defconfig @@ -8,9 +8,7 @@ CONFIG_MMC0_CD_PIN="PH1" CONFIG_SATAPWR="PB8" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig index 62668df01ec..c85468e5827 100644 --- a/configs/Cubietruck_defconfig +++ b/configs/Cubietruck_defconfig @@ -13,9 +13,7 @@ CONFIG_SATAPWR="PH12" CONFIG_GMAC_TX_DELAY=1 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_DFU=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_SCSI_AHCI=y diff --git a/configs/Cubietruck_plus_defconfig b/configs/Cubietruck_plus_defconfig index 8119b8b9cf6..13f958977be 100644 --- a/configs/Cubietruck_plus_defconfig +++ b/configs/Cubietruck_plus_defconfig @@ -16,8 +16,6 @@ CONFIG_I2C0_ENABLE=y CONFIG_AXP_GPIO=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/Empire_electronix_d709_defconfig b/configs/Empire_electronix_d709_defconfig index 0187b896f87..a9bbe8bcffa 100644 --- a/configs/Empire_electronix_d709_defconfig +++ b/configs/Empire_electronix_d709_defconfig @@ -16,9 +16,7 @@ CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Empire_electronix_m712_defconfig b/configs/Empire_electronix_m712_defconfig index 6570b97ca4c..fc1f26b7a99 100644 --- a/configs/Empire_electronix_m712_defconfig +++ b/configs/Empire_electronix_m712_defconfig @@ -15,9 +15,7 @@ CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Hummingbird_A31_defconfig b/configs/Hummingbird_A31_defconfig index 3afe4c56ae4..24e8b5be1b5 100644 --- a/configs/Hummingbird_A31_defconfig +++ b/configs/Hummingbird_A31_defconfig @@ -9,8 +9,6 @@ CONFIG_USB2_VBUS_PIN="" CONFIG_VIDEO_VGA_VIA_LCD=y CONFIG_VIDEO_VGA_EXTERNAL_DAC_EN="PH25" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y diff --git a/configs/Hyundai_A7HD_defconfig b/configs/Hyundai_A7HD_defconfig index 8bf7d1efba6..482e0fb7a83 100644 --- a/configs/Hyundai_A7HD_defconfig +++ b/configs/Hyundai_A7HD_defconfig @@ -15,9 +15,7 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_VIDEO_LCD_BL_PWM_ACTIVE_LOW is not set CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Itead_Ibox_A20_defconfig b/configs/Itead_Ibox_A20_defconfig index 1a161555842..99df9cff24f 100644 --- a/configs/Itead_Ibox_A20_defconfig +++ b/configs/Itead_Ibox_A20_defconfig @@ -8,9 +8,7 @@ CONFIG_MMC0_CD_PIN="PH1" CONFIG_SATAPWR="PB8" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Lamobo_R1_defconfig b/configs/Lamobo_R1_defconfig index 3627e4dd3af..f97dc131f28 100644 --- a/configs/Lamobo_R1_defconfig +++ b/configs/Lamobo_R1_defconfig @@ -10,9 +10,7 @@ CONFIG_SATAPWR="PB3" CONFIG_GMAC_TX_DELAY=4 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/LicheePi_Zero_defconfig b/configs/LicheePi_Zero_defconfig index 2e0b0b71e14..9815348badd 100644 --- a/configs/LicheePi_Zero_defconfig +++ b/configs/LicheePi_Zero_defconfig @@ -5,6 +5,4 @@ CONFIG_SPL=y CONFIG_MACH_SUN8I_V3S=y CONFIG_DRAM_CLK=360 # CONFIG_HAS_ARMV7_SECURE_BASE is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 # CONFIG_NETDEVICES is not set diff --git a/configs/Linksprite_pcDuino3_Nano_defconfig b/configs/Linksprite_pcDuino3_Nano_defconfig index 41ed46a7b5a..e3e30a49490 100644 --- a/configs/Linksprite_pcDuino3_Nano_defconfig +++ b/configs/Linksprite_pcDuino3_Nano_defconfig @@ -10,9 +10,7 @@ CONFIG_SATAPWR="PH2" CONFIG_GMAC_TX_DELAY=3 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Linksprite_pcDuino3_defconfig b/configs/Linksprite_pcDuino3_defconfig index 44a3901e22d..1fda0db4c9d 100644 --- a/configs/Linksprite_pcDuino3_defconfig +++ b/configs/Linksprite_pcDuino3_defconfig @@ -8,9 +8,7 @@ CONFIG_DRAM_ZQ=122 CONFIG_SATAPWR="PH2" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Linksprite_pcDuino_defconfig b/configs/Linksprite_pcDuino_defconfig index 279641551b3..49dcfa098ee 100644 --- a/configs/Linksprite_pcDuino_defconfig +++ b/configs/Linksprite_pcDuino_defconfig @@ -6,9 +6,7 @@ CONFIG_MACH_SUN4I=y CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig index 802cb5afb24..d34163515a1 100644 --- a/configs/MCR3000_defconfig +++ b/configs/MCR3000_defconfig @@ -53,7 +53,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0x4000801 CONFIG_SYS_OR0_PRELIM=0xFFC00926 diff --git a/configs/MK808C_defconfig b/configs/MK808C_defconfig index 4e678bdf051..3ed962d7cd9 100644 --- a/configs/MK808C_defconfig +++ b/configs/MK808C_defconfig @@ -5,9 +5,7 @@ CONFIG_SPL=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=384 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig index 9353467fa40..6188e88cc31 100644 --- a/configs/MPC837XERDB_defconfig +++ b/configs/MPC837XERDB_defconfig @@ -173,7 +173,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="TSEC0" -CONFIG_DM=y CONFIG_FSL_SATA=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig index feb0be5a494..50bc6d6bdb2 100644 --- a/configs/MPC8548CDS_36BIT_defconfig +++ b/configs/MPC8548CDS_36BIT_defconfig @@ -39,7 +39,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="8548cds/uImage.uboot" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC0" -CONFIG_DM=y CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig index 945347941b4..535b65e5fce 100644 --- a/configs/MPC8548CDS_defconfig +++ b/configs/MPC8548CDS_defconfig @@ -38,7 +38,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="8548cds/uImage.uboot" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC0" -CONFIG_DM=y CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig index f069451697d..bd865daae32 100644 --- a/configs/MPC8548CDS_legacy_defconfig +++ b/configs/MPC8548CDS_legacy_defconfig @@ -38,7 +38,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="8548cds/uImage.uboot" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC0" -CONFIG_DM=y CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y diff --git a/configs/MSI_Primo73_defconfig b/configs/MSI_Primo73_defconfig index 7a4b224bf2a..071169fd298 100644 --- a/configs/MSI_Primo73_defconfig +++ b/configs/MSI_Primo73_defconfig @@ -10,9 +10,7 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/MSI_Primo81_defconfig b/configs/MSI_Primo81_defconfig index bb820fd0a39..e77b0072923 100644 --- a/configs/MSI_Primo81_defconfig +++ b/configs/MSI_Primo81_defconfig @@ -13,8 +13,6 @@ CONFIG_VIDEO_LCD_BL_EN="PA25" CONFIG_VIDEO_LCD_BL_PWM="PH13" CONFIG_VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 # CONFIG_REQUIRE_SERIAL_CONSOLE is not set CONFIG_USB_MUSB_HOST=y diff --git a/configs/Marsboard_A10_defconfig b/configs/Marsboard_A10_defconfig index 1584778dc74..3c5312d8824 100644 --- a/configs/Marsboard_A10_defconfig +++ b/configs/Marsboard_A10_defconfig @@ -5,8 +5,6 @@ CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Mele_A1000G_quad_defconfig b/configs/Mele_A1000G_quad_defconfig index acd751b19c8..c697d286dc1 100644 --- a/configs/Mele_A1000G_quad_defconfig +++ b/configs/Mele_A1000G_quad_defconfig @@ -7,8 +7,6 @@ CONFIG_DRAM_ZQ=120 CONFIG_USB1_VBUS_PIN="PC27" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y diff --git a/configs/Mele_A1000_defconfig b/configs/Mele_A1000_defconfig index eb3e7988005..f5b6d908cdc 100644 --- a/configs/Mele_A1000_defconfig +++ b/configs/Mele_A1000_defconfig @@ -8,9 +8,7 @@ CONFIG_VIDEO_VGA=y CONFIG_VIDEO_COMPOSITE=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Mele_I7_defconfig b/configs/Mele_I7_defconfig index 48dad606b88..2b9bca13d08 100644 --- a/configs/Mele_I7_defconfig +++ b/configs/Mele_I7_defconfig @@ -7,8 +7,6 @@ CONFIG_DRAM_ZQ=120 CONFIG_USB1_VBUS_PIN="PC27" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y diff --git a/configs/Mele_M3_defconfig b/configs/Mele_M3_defconfig index ce962395a25..77cb464c932 100644 --- a/configs/Mele_M3_defconfig +++ b/configs/Mele_M3_defconfig @@ -9,9 +9,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_VIDEO_VGA=y CONFIG_VIDEO_COMPOSITE=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Mele_M5_defconfig b/configs/Mele_M5_defconfig index 2e6d5dd4604..b07dbbde2e4 100644 --- a/configs/Mele_M5_defconfig +++ b/configs/Mele_M5_defconfig @@ -9,9 +9,7 @@ CONFIG_MMC0_CD_PIN="PH1" CONFIG_VIDEO_COMPOSITE=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Mele_M9_defconfig b/configs/Mele_M9_defconfig index b84a2aebe20..be6dd417545 100644 --- a/configs/Mele_M9_defconfig +++ b/configs/Mele_M9_defconfig @@ -7,8 +7,6 @@ CONFIG_DRAM_ZQ=120 CONFIG_USB1_VBUS_PIN="PC27" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y diff --git a/configs/Merrii_A80_Optimus_defconfig b/configs/Merrii_A80_Optimus_defconfig index 3709a11ec03..c5d1f40df39 100644 --- a/configs/Merrii_A80_Optimus_defconfig +++ b/configs/Merrii_A80_Optimus_defconfig @@ -12,7 +12,5 @@ CONFIG_USB0_ID_DET="PH3" CONFIG_USB1_VBUS_PIN="PH4" CONFIG_USB3_VBUS_PIN="PH5" CONFIG_AXP_GPIO=y -CONFIG_SPL_STACK=0x18000 -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_SUN8I_RSB=y CONFIG_AXP809_POWER=y diff --git a/configs/Mini-X_defconfig b/configs/Mini-X_defconfig index 76b6b7d2bce..e8bc1485766 100644 --- a/configs/Mini-X_defconfig +++ b/configs/Mini-X_defconfig @@ -6,9 +6,7 @@ CONFIG_MACH_SUN4I=y CONFIG_USB0_VBUS_PIN="PB9" CONFIG_VIDEO_COMPOSITE=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Nintendo_NES_Classic_Edition_defconfig b/configs/Nintendo_NES_Classic_Edition_defconfig index 5b1a1d40614..b66023418ae 100644 --- a/configs/Nintendo_NES_Classic_Edition_defconfig +++ b/configs/Nintendo_NES_Classic_Edition_defconfig @@ -9,8 +9,6 @@ CONFIG_DRAM_ODT_EN=y CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT" CONFIG_AXP_GPIO=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 # CONFIG_CMD_FLASH is not set CONFIG_CMD_MTDPARTS=y # CONFIG_MMC is not set diff --git a/configs/Orangepi_defconfig b/configs/Orangepi_defconfig index ba976f8f5f3..c89a9a1f9dd 100644 --- a/configs/Orangepi_defconfig +++ b/configs/Orangepi_defconfig @@ -12,9 +12,7 @@ CONFIG_VIDEO_COMPOSITE=y CONFIG_GMAC_TX_DELAY=3 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Orangepi_mini_defconfig b/configs/Orangepi_mini_defconfig index 720e9e5df4c..8757dcb461c 100644 --- a/configs/Orangepi_mini_defconfig +++ b/configs/Orangepi_mini_defconfig @@ -14,9 +14,7 @@ CONFIG_VIDEO_COMPOSITE=y CONFIG_GMAC_TX_DELAY=3 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index 4fd3488fdc2..c2e79fda7ed 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -77,7 +77,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index 0e7b9313489..0764bda6672 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -45,7 +45,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index f55d337f273..2b3cfa09809 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -67,7 +67,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index 2aa662ca500..7114c0ee5e5 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -69,7 +69,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index 62b90f863ab..e5064dfd4bc 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -76,7 +76,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index ee0e1d8441b..d83b61aaaac 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -44,7 +44,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 1906754ffa2..079dc8477d8 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -66,7 +66,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index 84676ca8c58..54a7dc1d8df 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -68,7 +68,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index edc2f9e2418..bd431c26721 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -78,7 +78,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 02c94765e8d..4e482f8bc14 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -46,7 +46,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index 7d740819201..e80e39bfbb3 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -68,7 +68,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index f83ae52184a..6dd33e302a1 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -70,7 +70,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 75543769ada..de3a96d8f6d 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -77,7 +77,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index b6b7dd5b5b2..6637090ecd7 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -45,7 +45,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index df4414e9806..f096fbc5e7a 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -67,7 +67,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 72035b553ba..5da7ccbea23 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -69,7 +69,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index ffae8163e2c..4f5e89c0e9d 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -77,7 +77,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 4f27d27f04d..2f8dc8ab8ed 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -68,7 +68,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index 3795b4c947d..b0c60524c8d 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -70,7 +70,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index 9a0be6aa23c..4ad8ac80158 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -47,7 +47,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 4aae792b15b..a82ba02020d 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -76,7 +76,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 70d9166f6c2..51fb0e6acee 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -67,7 +67,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 713a16b26cb..b6d49d799af 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -69,7 +69,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 039767b7a13..c553f2ea079 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -46,7 +46,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index 3bd41330f3b..eb921d99322 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -79,7 +79,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index 4c8fd9d57d9..3197c3487c6 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -70,7 +70,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index 43261098310..80a8273143c 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -72,7 +72,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index 65032b86590..31f0c9a1aab 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -49,7 +49,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index 43d24112ef5..bfa59af3bf0 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -81,7 +81,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 22c97ac1117..fed2a0d542c 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -72,7 +72,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index bf161934776..6071fe1456c 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -74,7 +74,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index ac9ee070c7e..51200f85fe2 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -51,7 +51,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index c6507a7a4be..4e1a91268d3 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -80,7 +80,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index a9c07579d92..d6e1903a5a4 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -71,7 +71,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 4cff74da8e4..b048e44eef3 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -73,7 +73,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index fa12271b7be..21b473c61cf 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -50,7 +50,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig index e3483c5b520..b1c6f9dd5ce 100644 --- a/configs/P2041RDB_NAND_defconfig +++ b/configs/P2041RDB_NAND_defconfig @@ -52,7 +52,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig index c224cf57057..66ce4a55e79 100644 --- a/configs/P2041RDB_SDCARD_defconfig +++ b/configs/P2041RDB_SDCARD_defconfig @@ -52,7 +52,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig index 08d25c31810..e82b6289a64 100644 --- a/configs/P2041RDB_SPIFLASH_defconfig +++ b/configs/P2041RDB_SPIFLASH_defconfig @@ -54,7 +54,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig index 535201b1bd0..a5f7a08bcfa 100644 --- a/configs/P2041RDB_defconfig +++ b/configs/P2041RDB_defconfig @@ -49,7 +49,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/SBx81LIFKW_defconfig b/configs/SBx81LIFKW_defconfig index 0b610ef0f63..69899760f19 100644 --- a/configs/SBx81LIFKW_defconfig +++ b/configs/SBx81LIFKW_defconfig @@ -41,7 +41,6 @@ CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y -CONFIG_DM=y CONFIG_DM_PCA953X=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/SBx81LIFXCAT_defconfig b/configs/SBx81LIFXCAT_defconfig index 52a5b4db82c..84ac69dcc97 100644 --- a/configs/SBx81LIFXCAT_defconfig +++ b/configs/SBx81LIFXCAT_defconfig @@ -41,7 +41,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y -CONFIG_DM=y CONFIG_DM_PCA953X=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Sinlinx_SinA31s_defconfig b/configs/Sinlinx_SinA31s_defconfig index 2d33331f3d3..238b0073e79 100644 --- a/configs/Sinlinx_SinA31s_defconfig +++ b/configs/Sinlinx_SinA31s_defconfig @@ -10,8 +10,6 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=3 CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y diff --git a/configs/Sinlinx_SinA33_defconfig b/configs/Sinlinx_SinA33_defconfig index fcee14b5462..4eb5300b046 100644 --- a/configs/Sinlinx_SinA33_defconfig +++ b/configs/Sinlinx_SinA33_defconfig @@ -13,8 +13,6 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_DFU=y CONFIG_DFU_RAM=y CONFIG_FASTBOOT_CMD_OEM_FORMAT=y diff --git a/configs/Sinovoip_BPI_M2_defconfig b/configs/Sinovoip_BPI_M2_defconfig index c080a247105..aba95270eb2 100644 --- a/configs/Sinovoip_BPI_M2_defconfig +++ b/configs/Sinovoip_BPI_M2_defconfig @@ -7,8 +7,6 @@ CONFIG_DRAM_CLK=432 CONFIG_USB1_VBUS_PIN="" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y diff --git a/configs/Sinovoip_BPI_M3_defconfig b/configs/Sinovoip_BPI_M3_defconfig index 9760f9fdf4a..5116fab52d7 100644 --- a/configs/Sinovoip_BPI_M3_defconfig +++ b/configs/Sinovoip_BPI_M3_defconfig @@ -16,8 +16,6 @@ CONFIG_AXP_GPIO=y CONFIG_SATAPWR="PD25" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_REALTEK=y CONFIG_SUN8I_EMAC=y CONFIG_INITIAL_USB_SCAN_DELAY=500 diff --git a/configs/Sunchip_CX-A99_defconfig b/configs/Sunchip_CX-A99_defconfig index 749bf1cff9d..bb62ae9a7a9 100644 --- a/configs/Sunchip_CX-A99_defconfig +++ b/configs/Sunchip_CX-A99_defconfig @@ -12,5 +12,3 @@ CONFIG_USB0_VBUS_PIN="PH15" CONFIG_USB1_VBUS_PIN="PL7" CONFIG_USB3_VBUS_PIN="PL8" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x18000 -CONFIG_SYS_PBSIZE=1024 diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index eaae3178b14..1c8944e89b8 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -83,7 +83,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC4" -CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index a52ae10eb1a..8ee3c2eb44c 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -82,7 +82,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC4" -CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index ff522a2e3ec..374f222d03b 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -85,7 +85,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC4" -CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig index 2c17f78a337..d354fb889bb 100644 --- a/configs/T1024RDB_defconfig +++ b/configs/T1024RDB_defconfig @@ -57,7 +57,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC4" -CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index 5814583c5ed..438ffbd46f0 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -76,7 +76,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC4" -CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=2 diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index f78797c2e5f..0101620d962 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -75,7 +75,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC4" -CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=2 diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 1e53e5ef721..dca2dd01999 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -78,7 +78,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC4" -CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=2 diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig index e0544092b4a..3b124af21c2 100644 --- a/configs/T1042D4RDB_defconfig +++ b/configs/T1042D4RDB_defconfig @@ -50,7 +50,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC4" -CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=2 diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 7dd7cb8fb19..aa21c367009 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -81,7 +81,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index 9fec1eb88cd..bdb3c5d4d7d 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -80,7 +80,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index 878a37dacae..55ea54b146d 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -55,7 +55,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_DYNAMIC_DDR_CLK_FREQ=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index 1353f3311b9..6c2671bdb7e 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -83,7 +83,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig index 6b166c50d54..f3c0b93dabd 100644 --- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig @@ -52,7 +52,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index 7c797c8aaa0..8b966cc22ef 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -55,7 +55,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index 8040be8f6c0..2a278ac7c8d 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -83,7 +83,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index c51994d3a64..cc26ade01f2 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -82,7 +82,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index 47748d33ff5..d8216b00dfa 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -85,7 +85,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index bb8334f7023..afeba15ea33 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -57,7 +57,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig index 1fde65f78d5..6d43071143f 100644 --- a/configs/T2080RDB_revD_NAND_defconfig +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -84,7 +84,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig index 93a3649735c..03254fc1173 100644 --- a/configs/T2080RDB_revD_SDCARD_defconfig +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -83,7 +83,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig index 64ae8ea7b45..1fab5d9abf1 100644 --- a/configs/T2080RDB_revD_SPIFLASH_defconfig +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -86,7 +86,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig index fa852e4515f..fbfd4a428f7 100644 --- a/configs/T2080RDB_revD_defconfig +++ b/configs/T2080RDB_revD_defconfig @@ -58,7 +58,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index 34733e4c79d..bff883901d0 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -74,7 +74,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index 966e4a81db9..361769d9c22 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -49,7 +49,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC1" -CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/UTOO_P66_defconfig b/configs/UTOO_P66_defconfig index 4e6652db18f..b021b0a8865 100644 --- a/configs/UTOO_P66_defconfig +++ b/configs/UTOO_P66_defconfig @@ -20,9 +20,7 @@ CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_TL059WV5C0=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Wexler_TAB7200_defconfig b/configs/Wexler_TAB7200_defconfig index f63d18c327f..101ce57aa44 100644 --- a/configs/Wexler_TAB7200_defconfig +++ b/configs/Wexler_TAB7200_defconfig @@ -13,9 +13,7 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Wits_Pro_A20_DKT_defconfig b/configs/Wits_Pro_A20_DKT_defconfig index c9d22534d5c..f401ac74ef4 100644 --- a/configs/Wits_Pro_A20_DKT_defconfig +++ b/configs/Wits_Pro_A20_DKT_defconfig @@ -12,9 +12,7 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/Wobo_i5_defconfig b/configs/Wobo_i5_defconfig index ab919c0795a..e0687bf887d 100644 --- a/configs/Wobo_i5_defconfig +++ b/configs/Wobo_i5_defconfig @@ -7,9 +7,7 @@ CONFIG_DRAM_CLK=432 CONFIG_MMC0_CD_PIN="PB3" CONFIG_USB1_VBUS_PIN="PG12" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Yones_Toptech_BD1078_defconfig b/configs/Yones_Toptech_BD1078_defconfig index 1117e147cc1..f1ceb8b5527 100644 --- a/configs/Yones_Toptech_BD1078_defconfig +++ b/configs/Yones_Toptech_BD1078_defconfig @@ -19,9 +19,7 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_VIDEO_LCD_BL_PWM_ACTIVE_LOW is not set CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/Yones_Toptech_BS1078_V2_defconfig b/configs/Yones_Toptech_BS1078_V2_defconfig index ef30aee8281..6701ecce2fe 100644 --- a/configs/Yones_Toptech_BS1078_V2_defconfig +++ b/configs/Yones_Toptech_BS1078_V2_defconfig @@ -16,7 +16,5 @@ CONFIG_VIDEO_LCD_BL_EN="PA25" CONFIG_VIDEO_LCD_BL_PWM="PH13" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_USB_MUSB_HOST=y diff --git a/configs/a64-olinuxino-emmc_defconfig b/configs/a64-olinuxino-emmc_defconfig index afa0c24b688..8ec9eb3e9c2 100644 --- a/configs/a64-olinuxino-emmc_defconfig +++ b/configs/a64-olinuxino-emmc_defconfig @@ -6,9 +6,6 @@ CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x54000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/a64-olinuxino_defconfig b/configs/a64-olinuxino_defconfig index ccb5abc9845..16cef18beef 100644 --- a/configs/a64-olinuxino_defconfig +++ b/configs/a64-olinuxino_defconfig @@ -6,9 +6,6 @@ CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x54000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig index 1cc98a26539..98d39eea09a 100644 --- a/configs/ae350_rv32_spl_defconfig +++ b/configs/ae350_rv32_spl_defconfig @@ -10,6 +10,7 @@ CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_TARGET_AX25_AE350=y CONFIG_RISCV_SMODE=y +# CONFIG_AVAILABLE_HARTS is not set CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xffff00 @@ -48,4 +49,3 @@ CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_ATCSPI200_SPI=y # CONFIG_BINMAN_FDT is not set -# CONFIG_AVAILABLE_HARTS is not set diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig index 4318300300f..7186ef4d701 100644 --- a/configs/ae350_rv64_spl_defconfig +++ b/configs/ae350_rv64_spl_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_TARGET_AX25_AE350=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y +# CONFIG_AVAILABLE_HARTS is not set CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe70 @@ -49,4 +50,3 @@ CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_ATCSPI200_SPI=y # CONFIG_BINMAN_FDT is not set -# CONFIG_AVAILABLE_HARTS is not set diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig index 41042ec4ad5..2dfd936057f 100644 --- a/configs/am43xx_evm_defconfig +++ b/configs/am43xx_evm_defconfig @@ -58,7 +58,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_SYS_RX_ETH_BUFFER=64 -CONFIG_DM=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/am43xx_evm_qspiboot_defconfig b/configs/am43xx_evm_qspiboot_defconfig index 18be57a2fe9..b5db55de389 100644 --- a/configs/am43xx_evm_qspiboot_defconfig +++ b/configs/am43xx_evm_qspiboot_defconfig @@ -44,7 +44,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_SYS_RX_ETH_BUFFER=64 -CONFIG_DM=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y CONFIG_DFU_SF=y diff --git a/configs/am43xx_evm_rtconly_defconfig b/configs/am43xx_evm_rtconly_defconfig index ff5fbc6676a..357da192b83 100644 --- a/configs/am43xx_evm_rtconly_defconfig +++ b/configs/am43xx_evm_rtconly_defconfig @@ -52,7 +52,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_SYS_RX_ETH_BUFFER=64 -CONFIG_DM=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y CONFIG_DFU_SF=y diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig index 5f0cc109d9b..0e58221c820 100644 --- a/configs/am43xx_evm_usbhost_boot_defconfig +++ b/configs/am43xx_evm_usbhost_boot_defconfig @@ -64,7 +64,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_SYS_RX_ETH_BUFFER=64 -CONFIG_DM=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig index bd151fedc80..2b5a7fb2599 100644 --- a/configs/am43xx_hs_evm_defconfig +++ b/configs/am43xx_hs_evm_defconfig @@ -56,7 +56,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_SYS_RX_ETH_BUFFER=64 -CONFIG_DM=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/am43xx_hs_evm_qspi_defconfig b/configs/am43xx_hs_evm_qspi_defconfig index ddb49f49807..68a96518878 100644 --- a/configs/am43xx_hs_evm_qspi_defconfig +++ b/configs/am43xx_hs_evm_qspi_defconfig @@ -46,7 +46,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_SYS_RX_ETH_BUFFER=64 -CONFIG_DM=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y CONFIG_DFU_SF=y diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index ac8ec1b9280..054e9747a8b 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -69,7 +69,6 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index 029f3a21cce..02a2543a3f0 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -66,7 +66,6 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig index 83e488e5223..84eca42aac0 100644 --- a/configs/am57xx_hs_evm_usb_defconfig +++ b/configs/am57xx_hs_evm_usb_defconfig @@ -71,7 +71,6 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SCSI_AHCI=y diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig index 2c0bd4d2e10..ff258bcbc10 100644 --- a/configs/am62x_evm_a53_defconfig +++ b/configs/am62x_evm_a53_defconfig @@ -41,7 +41,6 @@ CONFIG_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y diff --git a/configs/am62x_evm_r5_defconfig b/configs/am62x_evm_r5_defconfig index 8bd1db9a584..20172557ef4 100644 --- a/configs/am62x_evm_r5_defconfig +++ b/configs/am62x_evm_r5_defconfig @@ -58,7 +58,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig index 9e72fbf7e6a..88776a0004e 100644 --- a/configs/am64x_evm_a53_defconfig +++ b/configs/am64x_evm_a53_defconfig @@ -83,7 +83,6 @@ CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_MMC_ENV_PART=1 CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y diff --git a/configs/am64x_evm_r5_defconfig b/configs/am64x_evm_r5_defconfig index 3f63433474c..ee3a8a4ae14 100644 --- a/configs/am64x_evm_r5_defconfig +++ b/configs/am64x_evm_r5_defconfig @@ -90,7 +90,6 @@ CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_PART=1 -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig index c235f525e96..fe3346f2150 100644 --- a/configs/am65x_evm_a53_defconfig +++ b/configs/am65x_evm_a53_defconfig @@ -89,7 +89,6 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_PART=1 CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index 7622495b5f6..45f50b6ae8e 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -81,7 +81,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_DEVICE_AND_PART="1:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y diff --git a/configs/am65x_evm_r5_usbdfu_defconfig b/configs/am65x_evm_r5_usbdfu_defconfig index 3406978f304..5d1cacd1b22 100644 --- a/configs/am65x_evm_r5_usbdfu_defconfig +++ b/configs/am65x_evm_r5_usbdfu_defconfig @@ -70,7 +70,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y diff --git a/configs/am65x_evm_r5_usbmsc_defconfig b/configs/am65x_evm_r5_usbmsc_defconfig index 641daa63537..c991eb6d618 100644 --- a/configs/am65x_evm_r5_usbmsc_defconfig +++ b/configs/am65x_evm_r5_usbmsc_defconfig @@ -69,7 +69,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y diff --git a/configs/am65x_hs_evm_a53_defconfig b/configs/am65x_hs_evm_a53_defconfig index bc24574fab9..79182a77f30 100644 --- a/configs/am65x_hs_evm_a53_defconfig +++ b/configs/am65x_hs_evm_a53_defconfig @@ -83,7 +83,6 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_PART=1 CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y diff --git a/configs/am65x_hs_evm_r5_defconfig b/configs/am65x_hs_evm_r5_defconfig index d3a0420b1c2..cbd702c3eda 100644 --- a/configs/am65x_hs_evm_r5_defconfig +++ b/configs/am65x_hs_evm_r5_defconfig @@ -77,7 +77,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_DEVICE_AND_PART="1:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y diff --git a/configs/amarula_a64_relic_defconfig b/configs/amarula_a64_relic_defconfig index 72f97cee4de..ae44b66d109 100644 --- a/configs/amarula_a64_relic_defconfig +++ b/configs/amarula_a64_relic_defconfig @@ -7,9 +7,6 @@ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_VIDEO_DE2 is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x54000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_MUSB_GADGET=y diff --git a/configs/arbel_evb_defconfig b/configs/arbel_evb_defconfig index 7285d41c36d..9dbe45ff6a8 100644 --- a/configs/arbel_evb_defconfig +++ b/configs/arbel_evb_defconfig @@ -46,7 +46,6 @@ CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCONF=y -CONFIG_PINCTRL_NPCM8XX=y CONFIG_DM_RESET=y CONFIG_RESET_SYSCON=y CONFIG_DM_SERIAL=y diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig b/configs/at91sam9260ek_dataflash_cs0_defconfig index f81265f852b..df4bebeeb5b 100644 --- a/configs/at91sam9260ek_dataflash_cs0_defconfig +++ b/configs/at91sam9260ek_dataflash_cs0_defconfig @@ -42,7 +42,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig b/configs/at91sam9260ek_dataflash_cs1_defconfig index 3e3151754dc..41bfed5dece 100644 --- a/configs/at91sam9260ek_dataflash_cs1_defconfig +++ b/configs/at91sam9260ek_dataflash_cs1_defconfig @@ -42,7 +42,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9260ek_nandflash_defconfig b/configs/at91sam9260ek_nandflash_defconfig index 29adedf0fd2..aa829b4661f 100644 --- a/configs/at91sam9260ek_nandflash_defconfig +++ b/configs/at91sam9260ek_nandflash_defconfig @@ -41,7 +41,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig index 5a935c6bdce..2fc0b8751d5 100644 --- a/configs/at91sam9261ek_dataflash_cs0_defconfig +++ b/configs/at91sam9261ek_dataflash_cs0_defconfig @@ -43,7 +43,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RETRY_COUNT=20 -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig index 8b20a856bac..599b56024e4 100644 --- a/configs/at91sam9261ek_dataflash_cs3_defconfig +++ b/configs/at91sam9261ek_dataflash_cs3_defconfig @@ -43,7 +43,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RETRY_COUNT=20 -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9261ek_nandflash_defconfig b/configs/at91sam9261ek_nandflash_defconfig index b6020624342..a8ff0d2f819 100644 --- a/configs/at91sam9261ek_nandflash_defconfig +++ b/configs/at91sam9261ek_nandflash_defconfig @@ -42,7 +42,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RETRY_COUNT=20 -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig b/configs/at91sam9263ek_dataflash_cs0_defconfig index 8d9ccc942af..1fb3153cb1c 100644 --- a/configs/at91sam9263ek_dataflash_cs0_defconfig +++ b/configs/at91sam9263ek_dataflash_cs0_defconfig @@ -45,7 +45,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9263ek_dataflash_defconfig b/configs/at91sam9263ek_dataflash_defconfig index 8d9ccc942af..1fb3153cb1c 100644 --- a/configs/at91sam9263ek_dataflash_defconfig +++ b/configs/at91sam9263ek_dataflash_defconfig @@ -45,7 +45,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9263ek_nandflash_defconfig b/configs/at91sam9263ek_nandflash_defconfig index 466461771ad..26f3932ddfe 100644 --- a/configs/at91sam9263ek_nandflash_defconfig +++ b/configs/at91sam9263ek_nandflash_defconfig @@ -44,7 +44,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9263ek_norflash_boot_defconfig b/configs/at91sam9263ek_norflash_boot_defconfig index 80d35348ac6..b0a01c2c689 100644 --- a/configs/at91sam9263ek_norflash_boot_defconfig +++ b/configs/at91sam9263ek_norflash_boot_defconfig @@ -42,7 +42,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR_REDUND=0x107D0000 -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9263ek_norflash_defconfig b/configs/at91sam9263ek_norflash_defconfig index 748d8bc62f6..fbf40ef5240 100644 --- a/configs/at91sam9263ek_norflash_defconfig +++ b/configs/at91sam9263ek_norflash_defconfig @@ -43,7 +43,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR_REDUND=0x107D0000 -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig index d570c928d89..d9178cd4962 100644 --- a/configs/at91sam9g10ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig @@ -43,7 +43,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RETRY_COUNT=20 -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig index 0bc3787a4c0..cca871f847c 100644 --- a/configs/at91sam9g10ek_dataflash_cs3_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig @@ -43,7 +43,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RETRY_COUNT=20 -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9g10ek_nandflash_defconfig b/configs/at91sam9g10ek_nandflash_defconfig index e78a3a8b335..a85c01f941e 100644 --- a/configs/at91sam9g10ek_nandflash_defconfig +++ b/configs/at91sam9g10ek_nandflash_defconfig @@ -42,7 +42,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RETRY_COUNT=20 -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9g20ek_2mmc_defconfig b/configs/at91sam9g20ek_2mmc_defconfig index da6dbea35c2..fb4cb6db313 100644 --- a/configs/at91sam9g20ek_2mmc_defconfig +++ b/configs/at91sam9g20ek_2mmc_defconfig @@ -43,7 +43,6 @@ CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9g20ek_2mmc_nandflash_defconfig b/configs/at91sam9g20ek_2mmc_nandflash_defconfig index 20af937fce8..67567c5db62 100644 --- a/configs/at91sam9g20ek_2mmc_nandflash_defconfig +++ b/configs/at91sam9g20ek_2mmc_nandflash_defconfig @@ -43,7 +43,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9g20ek_dataflash_cs0_defconfig b/configs/at91sam9g20ek_dataflash_cs0_defconfig index aacc9d1fd6d..4da431dcbc3 100644 --- a/configs/at91sam9g20ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs0_defconfig @@ -42,7 +42,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9g20ek_dataflash_cs1_defconfig b/configs/at91sam9g20ek_dataflash_cs1_defconfig index 053829ec2fb..d9281d6b09d 100644 --- a/configs/at91sam9g20ek_dataflash_cs1_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs1_defconfig @@ -42,7 +42,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9g20ek_nandflash_defconfig b/configs/at91sam9g20ek_nandflash_defconfig index 4506eac999d..ea0f171f542 100644 --- a/configs/at91sam9g20ek_nandflash_defconfig +++ b/configs/at91sam9g20ek_nandflash_defconfig @@ -41,7 +41,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9m10g45ek_mmc_defconfig b/configs/at91sam9m10g45ek_mmc_defconfig index 8938193a8a7..dd088ed8c89 100644 --- a/configs/at91sam9m10g45ek_mmc_defconfig +++ b/configs/at91sam9m10g45ek_mmc_defconfig @@ -45,7 +45,6 @@ CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_FAT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9m10g45ek_nandflash_defconfig b/configs/at91sam9m10g45ek_nandflash_defconfig index 57362bc3a45..64a2490857b 100644 --- a/configs/at91sam9m10g45ek_nandflash_defconfig +++ b/configs/at91sam9m10g45ek_nandflash_defconfig @@ -46,7 +46,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig index 45d74aa7ca3..1902844803f 100644 --- a/configs/at91sam9n12ek_mmc_defconfig +++ b/configs/at91sam9n12ek_mmc_defconfig @@ -40,7 +40,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256 CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_FAT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig index 6cd733f0271..5e727cfab83 100644 --- a/configs/at91sam9n12ek_nandflash_defconfig +++ b/configs/at91sam9n12ek_nandflash_defconfig @@ -41,7 +41,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig index 89400372c57..faa7eece3e7 100644 --- a/configs/at91sam9n12ek_spiflash_defconfig +++ b/configs/at91sam9n12ek_spiflash_defconfig @@ -42,7 +42,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256 CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9rlek_dataflash_defconfig b/configs/at91sam9rlek_dataflash_defconfig index ede5d533dea..53be4fd9d32 100644 --- a/configs/at91sam9rlek_dataflash_defconfig +++ b/configs/at91sam9rlek_dataflash_defconfig @@ -42,7 +42,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9rlek_mmc_defconfig b/configs/at91sam9rlek_mmc_defconfig index 1c9a8b37e12..88093e0dbd0 100644 --- a/configs/at91sam9rlek_mmc_defconfig +++ b/configs/at91sam9rlek_mmc_defconfig @@ -40,7 +40,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_FAT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9rlek_nandflash_defconfig b/configs/at91sam9rlek_nandflash_defconfig index 482f94c6a49..1c33181ac9b 100644 --- a/configs/at91sam9rlek_nandflash_defconfig +++ b/configs/at91sam9rlek_nandflash_defconfig @@ -41,7 +41,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig index 8ebeac2fb57..da2f263a9d3 100644 --- a/configs/at91sam9x5ek_dataflash_defconfig +++ b/configs/at91sam9x5ek_dataflash_defconfig @@ -47,7 +47,6 @@ CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig index 6649986e641..017afc2275b 100644 --- a/configs/at91sam9x5ek_mmc_defconfig +++ b/configs/at91sam9x5ek_mmc_defconfig @@ -44,7 +44,6 @@ CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_FAT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig index a9371ad1973..84a6024826b 100644 --- a/configs/at91sam9x5ek_nandflash_defconfig +++ b/configs/at91sam9x5ek_nandflash_defconfig @@ -47,7 +47,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig index 1f7d5954ade..145a989beda 100644 --- a/configs/at91sam9x5ek_spiflash_defconfig +++ b/configs/at91sam9x5ek_spiflash_defconfig @@ -48,7 +48,6 @@ CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9xeek_dataflash_cs0_defconfig b/configs/at91sam9xeek_dataflash_cs0_defconfig index f81265f852b..df4bebeeb5b 100644 --- a/configs/at91sam9xeek_dataflash_cs0_defconfig +++ b/configs/at91sam9xeek_dataflash_cs0_defconfig @@ -42,7 +42,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9xeek_dataflash_cs1_defconfig b/configs/at91sam9xeek_dataflash_cs1_defconfig index 3e3151754dc..41bfed5dece 100644 --- a/configs/at91sam9xeek_dataflash_cs1_defconfig +++ b/configs/at91sam9xeek_dataflash_cs1_defconfig @@ -42,7 +42,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/at91sam9xeek_nandflash_defconfig b/configs/at91sam9xeek_nandflash_defconfig index 29adedf0fd2..aa829b4661f 100644 --- a/configs/at91sam9xeek_nandflash_defconfig +++ b/configs/at91sam9xeek_nandflash_defconfig @@ -41,7 +41,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/ba10_tv_box_defconfig b/configs/ba10_tv_box_defconfig index 66c444fc750..b89dd8ea62b 100644 --- a/configs/ba10_tv_box_defconfig +++ b/configs/ba10_tv_box_defconfig @@ -9,9 +9,7 @@ CONFIG_USB0_VBUS_PIN="PB9" CONFIG_USB2_VBUS_PIN="PH12" CONFIG_VIDEO_COMPOSITE=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/bananapi_m1_plus_defconfig b/configs/bananapi_m1_plus_defconfig index 290e9c17e21..0fbb619d623 100644 --- a/configs/bananapi_m1_plus_defconfig +++ b/configs/bananapi_m1_plus_defconfig @@ -9,9 +9,7 @@ CONFIG_VIDEO_COMPOSITE=y CONFIG_GMAC_TX_DELAY=3 CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_NETCONSOLE=y CONFIG_SCSI_AHCI=y CONFIG_SYS_64BIT_LBA=y diff --git a/configs/bananapi_m2_berry_defconfig b/configs/bananapi_m2_berry_defconfig index e6b8f0f8a3f..588eea2a27d 100644 --- a/configs/bananapi_m2_berry_defconfig +++ b/configs/bananapi_m2_berry_defconfig @@ -9,9 +9,7 @@ CONFIG_USB1_VBUS_PIN="PH23" # CONFIG_HAS_ARMV7_SECURE_BASE is not set CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SCSI_AHCI=y CONFIG_SYS_64BIT_LBA=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/bananapi_m2_plus_h3_defconfig b/configs/bananapi_m2_plus_h3_defconfig index d0981f6481a..26ced59fb02 100644 --- a/configs/bananapi_m2_plus_h3_defconfig +++ b/configs/bananapi_m2_plus_h3_defconfig @@ -7,8 +7,6 @@ CONFIG_DRAM_CLK=672 CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/bananapi_m2_plus_h5_defconfig b/configs/bananapi_m2_plus_h5_defconfig index a68742e9d6a..fb6c945919a 100644 --- a/configs/bananapi_m2_plus_h5_defconfig +++ b/configs/bananapi_m2_plus_h5_defconfig @@ -7,9 +7,6 @@ CONFIG_DRAM_CLK=672 CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x54000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/bananapi_m2_zero_defconfig b/configs/bananapi_m2_zero_defconfig index 6a3594c0938..ac3f8f5ab8b 100644 --- a/configs/bananapi_m2_zero_defconfig +++ b/configs/bananapi_m2_zero_defconfig @@ -6,5 +6,3 @@ CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=408 CONFIG_MMC0_CD_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig index 36aa80a09ba..5463b046fdb 100644 --- a/configs/bananapi_m64_defconfig +++ b/configs/bananapi_m64_defconfig @@ -7,9 +7,6 @@ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x54000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig index 487c030bea1..89f7f2c522e 100644 --- a/configs/bcm_ns3_defconfig +++ b/configs/bcm_ns3_defconfig @@ -41,7 +41,6 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y # CONFIG_DOS_PARTITION is not set CONFIG_OF_CONTROL=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_CCF=y CONFIG_SUPPORT_EMMC_BOOT=y diff --git a/configs/beelink_gs1_defconfig b/configs/beelink_gs1_defconfig index 2c440e44f5d..42925eabcb0 100644 --- a/configs/beelink_gs1_defconfig +++ b/configs/beelink_gs1_defconfig @@ -8,9 +8,6 @@ CONFIG_MMC0_CD_PIN="PF6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_PSCI_RESET is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x118000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/beelink_x2_defconfig b/configs/beelink_x2_defconfig index 4065e64d523..6206d909003 100644 --- a/configs/beelink_x2_defconfig +++ b/configs/beelink_x2_defconfig @@ -6,7 +6,5 @@ CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=567 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/bk4r1_defconfig b/configs/bk4r1_defconfig index a0edb5976cd..40990a91f07 100644 --- a/configs/bk4r1_defconfig +++ b/configs/bk4r1_defconfig @@ -56,7 +56,6 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ARP_TIMEOUT=500 CONFIG_NETCONSOLE=y -CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_VYBRID_GPIO=y CONFIG_DM_I2C=y diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig index a45604de169..0a994c58e87 100644 --- a/configs/brppt1_mmc_defconfig +++ b/configs/brppt1_mmc_defconfig @@ -89,7 +89,6 @@ CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_OF_TRANSLATE=y diff --git a/configs/brsmarc1_defconfig b/configs/brsmarc1_defconfig index 311137acaa6..404a7205d91 100644 --- a/configs/brsmarc1_defconfig +++ b/configs/brsmarc1_defconfig @@ -93,7 +93,6 @@ CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y # CONFIG_OF_TRANSLATE is not set diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig index 0faeebb360e..2592171b611 100644 --- a/configs/brxre1_defconfig +++ b/configs/brxre1_defconfig @@ -84,7 +84,6 @@ CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y # CONFIG_OF_TRANSLATE is not set diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index dad3b36b993..657db662650 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -68,7 +68,6 @@ CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_I2C_MUX=y CONFIG_DM_KEYBOARD=y -CONFIG_KEYBOARD=y CONFIG_CROS_EC_KEYB=y CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index 35d546e6315..13ffafceec3 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -70,7 +70,6 @@ CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_I2C_MUX=y CONFIG_DM_KEYBOARD=y -CONFIG_KEYBOARD=y CONFIG_CROS_EC_KEYB=y CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y @@ -95,6 +94,7 @@ CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y +CONFIG_DM_RESET=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_ROCKCHIP_SERIAL=y CONFIG_SOUND=y diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index 60fc528a8ce..d80dd8e56c9 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -70,7 +70,6 @@ CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_I2C_MUX=y CONFIG_DM_KEYBOARD=y -CONFIG_KEYBOARD=y CONFIG_CROS_EC_KEYB=y CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig index e6f03faa87e..8e0214d21e2 100644 --- a/configs/chromebook_speedy_defconfig +++ b/configs/chromebook_speedy_defconfig @@ -69,7 +69,6 @@ CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_I2C_MUX=y CONFIG_DM_KEYBOARD=y -CONFIG_KEYBOARD=y CONFIG_CROS_EC_KEYB=y CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig index d2221ed4509..eaeddc8c96a 100644 --- a/configs/cm_t43_defconfig +++ b/configs/cm_t43_defconfig @@ -72,7 +72,6 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_SYS_RX_ETH_BUFFER=64 -CONFIG_DM=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_MMC_OMAP_HS=y diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig index 2c4983f5dfe..d5764343400 100644 --- a/configs/colibri_vf_defconfig +++ b/configs/colibri_vf_defconfig @@ -66,7 +66,6 @@ CONFIG_ENV_RANGE=0x80000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y -CONFIG_DM=y CONFIG_DFU_NAND=y CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000 CONFIG_VYBRID_GPIO=y diff --git a/configs/colorfly_e708_q1_defconfig b/configs/colorfly_e708_q1_defconfig index f17083310a2..5d3636e34e8 100644 --- a/configs/colorfly_e708_q1_defconfig +++ b/configs/colorfly_e708_q1_defconfig @@ -16,8 +16,6 @@ CONFIG_VIDEO_LCD_BL_EN="PA25" CONFIG_VIDEO_LCD_BL_PWM="PH13" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_AXP_DLDO2_VOLT=1800 CONFIG_USB_MUSB_HOST=y diff --git a/configs/cortina_presidio-asic-base_defconfig b/configs/cortina_presidio-asic-base_defconfig index 1b7df4d0342..b3f91c011e8 100644 --- a/configs/cortina_presidio-asic-base_defconfig +++ b/configs/cortina_presidio-asic-base_defconfig @@ -33,7 +33,6 @@ CONFIG_CMD_SMC=y CONFIG_OF_CONTROL=y CONFIG_OF_LIVE=y # CONFIG_NET is not set -CONFIG_DM=y CONFIG_CORTINA_GPIO=y # CONFIG_MMC is not set CONFIG_DM_SERIAL=y diff --git a/configs/cortina_presidio-asic-emmc_defconfig b/configs/cortina_presidio-asic-emmc_defconfig index 73eb4482e33..d35093ab6ad 100644 --- a/configs/cortina_presidio-asic-emmc_defconfig +++ b/configs/cortina_presidio-asic-emmc_defconfig @@ -35,7 +35,6 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_OF_CONTROL=y CONFIG_OF_LIVE=y -CONFIG_DM=y CONFIG_CORTINA_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_CA=y diff --git a/configs/cortina_presidio-asic-pnand_defconfig b/configs/cortina_presidio-asic-pnand_defconfig index 1a49eb0e480..f30f38d7d2d 100644 --- a/configs/cortina_presidio-asic-pnand_defconfig +++ b/configs/cortina_presidio-asic-pnand_defconfig @@ -34,7 +34,6 @@ CONFIG_CMD_SMC=y CONFIG_OF_CONTROL=y CONFIG_OF_LIVE=y # CONFIG_NET is not set -CONFIG_DM=y CONFIG_CORTINA_GPIO=y # CONFIG_MMC is not set CONFIG_MTD=y diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig index f2703189dcd..71bf2451b59 100644 --- a/configs/d2net_v2_defconfig +++ b/configs/d2net_v2_defconfig @@ -52,7 +52,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y -CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_LBA48=y diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index ebf585d8051..d39801068d7 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -79,7 +79,6 @@ CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_OF_TRANSLATE=y diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig index a616d417afb..a9996d78502 100644 --- a/configs/da850evm_direct_nor_defconfig +++ b/configs/da850evm_direct_nor_defconfig @@ -56,7 +56,6 @@ CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y -CONFIG_DM=y CONFIG_DA8XX_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_DAVINCI=y diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig index 4bbfb328f8e..f3ae5a77ccc 100644 --- a/configs/da850evm_nand_defconfig +++ b/configs/da850evm_nand_defconfig @@ -76,7 +76,6 @@ CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_OF_TRANSLATE=y diff --git a/configs/difrnce_dit4350_defconfig b/configs/difrnce_dit4350_defconfig index a3917eaf179..e1067b66eec 100644 --- a/configs/difrnce_dit4350_defconfig +++ b/configs/difrnce_dit4350_defconfig @@ -15,9 +15,7 @@ CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig index 242cc36fcef..39f9dd19665 100644 --- a/configs/dns325_defconfig +++ b/configs/dns325_defconfig @@ -46,7 +46,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y -CONFIG_DM=y CONFIG_SYS_ATA_STRIDE=4 CONFIG_SYS_ATA_DATA_OFFSET=0x100 CONFIG_SYS_ATA_REG_OFFSET=0x100 diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig index feba398912b..5f98c610011 100644 --- a/configs/dockstar_defconfig +++ b/configs/dockstar_defconfig @@ -49,7 +49,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y -CONFIG_DM=y # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index 40d1beb587a..d91cf3e1301 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -75,7 +75,6 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_DEVICE_REMOVE=y CONFIG_SPL_DM_SEQ_ALIAS=y diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index 44b47457553..195bc0e4ee0 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -70,7 +70,6 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_DEVICE_REMOVE=y CONFIG_SPL_DM_SEQ_ALIAS=y diff --git a/configs/dra7xx_hs_evm_usb_defconfig b/configs/dra7xx_hs_evm_usb_defconfig index 59897a80e52..99cdbbc02f8 100644 --- a/configs/dra7xx_hs_evm_usb_defconfig +++ b/configs/dra7xx_hs_evm_usb_defconfig @@ -66,7 +66,6 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_DEVICE_REMOVE=y CONFIG_SPL_DM_SEQ_ALIAS=y diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig index 650b14620ee..caa6ebc6e0c 100644 --- a/configs/dreamplug_defconfig +++ b/configs/dreamplug_defconfig @@ -46,7 +46,6 @@ CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y -CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 CONFIG_SYS_ATA_STRIDE=4 diff --git a/configs/ds109_defconfig b/configs/ds109_defconfig index db52e5deca3..6b0cbb373b0 100644 --- a/configs/ds109_defconfig +++ b/configs/ds109_defconfig @@ -41,7 +41,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y -CONFIG_DM=y CONFIG_SYS_ATA_STRIDE=4 CONFIG_SYS_ATA_DATA_OFFSET=0x100 CONFIG_SYS_ATA_REG_OFFSET=0x100 diff --git a/configs/dserve_dsrv9703c_defconfig b/configs/dserve_dsrv9703c_defconfig index c737cdb4d99..60910c3ce35 100644 --- a/configs/dserve_dsrv9703c_defconfig +++ b/configs/dserve_dsrv9703c_defconfig @@ -14,9 +14,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/durian_defconfig b/configs/durian_defconfig index 4d2ccab8a07..d7e8824e436 100644 --- a/configs/durian_defconfig +++ b/configs/durian_defconfig @@ -29,7 +29,6 @@ CONFIG_CMD_PCI=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -CONFIG_DM=y CONFIG_SCSI_AHCI=y CONFIG_AHCI_PCI=y # CONFIG_MMC is not set diff --git a/configs/eaidk-610-rk3399_defconfig b/configs/eaidk-610-rk3399_defconfig new file mode 100644 index 00000000000..b41a66fe534 --- /dev/null +++ b/configs/eaidk-610-rk3399_defconfig @@ -0,0 +1,61 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SYS_TEXT_BASE=0x00200000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-eaidk-610" +CONFIG_ROCKCHIP_RK3399=y +CONFIG_TARGET_EVB_RK3399=y +CONFIG_DEBUG_UART_BASE=0xFF1A0000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SYS_LOAD_ADDR=0x800800 +CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-eaidk-610.dtb" +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x400000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK=0x400000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 +CONFIG_TPL=y +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TIME=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_GMAC_ROCKCHIP=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_SPL_TINY_MEMSET=y +CONFIG_ERRNO_STR=y diff --git a/configs/emlid_neutis_n5_devboard_defconfig b/configs/emlid_neutis_n5_devboard_defconfig index 73121f2f4eb..a3b43dffc63 100644 --- a/configs/emlid_neutis_n5_devboard_defconfig +++ b/configs/emlid_neutis_n5_devboard_defconfig @@ -8,7 +8,4 @@ CONFIG_DRAM_ZQ=3881977 # CONFIG_DRAM_ODT_EN is not set CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x54000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUPPORT_EMMC_BOOT=y diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig index 0de06d5882b..b8542ecbf7d 100644 --- a/configs/ethernut5_defconfig +++ b/configs/ethernut5_defconfig @@ -61,7 +61,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RETRY_COUNT=20 -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig index 3061cbec412..500c85b8d50 100644 --- a/configs/evb-ast2500_defconfig +++ b/configs/evb-ast2500_defconfig @@ -28,6 +28,7 @@ CONFIG_CMD_DHCP=y CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y +CONFIG_CMD_NCSI=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y @@ -50,6 +51,7 @@ CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHY_REALTEK=y +CONFIG_PHY_NCSI=y CONFIG_FTGMAC100=y CONFIG_PHY=y CONFIG_PINCTRL=y diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index 1981f895d6d..a80513f81b6 100644 --- a/configs/evb-ast2600_defconfig +++ b/configs/evb-ast2600_defconfig @@ -66,6 +66,7 @@ CONFIG_CMD_DHCP=y CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y +CONFIG_CMD_NCSI=y CONFIG_CMD_EXT4=y CONFIG_DOS_PARTITION=y # CONFIG_SPL_DOS_PARTITION is not set @@ -98,6 +99,7 @@ CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHY_REALTEK=y +CONFIG_PHY_NCSI=y CONFIG_DM_MDIO=y CONFIG_FTGMAC100=y CONFIG_ASPEED_MDIO=y diff --git a/configs/ga10h_v1_1_defconfig b/configs/ga10h_v1_1_defconfig index 7cdb6c56755..599eeb96b4f 100644 --- a/configs/ga10h_v1_1_defconfig +++ b/configs/ga10h_v1_1_defconfig @@ -17,8 +17,6 @@ CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 CONFIG_USB_EHCI_HCD=y diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig index 5574b9d17fe..e889befcca6 100644 --- a/configs/gardena-smart-gateway-at91sam_defconfig +++ b/configs/gardena-smart-gateway-at91sam_defconfig @@ -87,7 +87,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y diff --git a/configs/gazerbeam_defconfig b/configs/gazerbeam_defconfig index bee7277483c..a432c0515cf 100644 --- a/configs/gazerbeam_defconfig +++ b/configs/gazerbeam_defconfig @@ -157,7 +157,6 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR_REDUND=0xFE090000 CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" -CONFIG_DM=y CONFIG_REGMAP=y CONFIG_AXI=y CONFIG_IHS_AXI=y diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index b59d0b9c98c..09a8432d0ba 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -48,7 +48,6 @@ CONFIG_DTB_RESELECT=y CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig index aeb4a7d368b..ef0193e786e 100644 --- a/configs/goflexhome_defconfig +++ b/configs/goflexhome_defconfig @@ -51,7 +51,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y -CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 CONFIG_LBA48=y diff --git a/configs/gt90h_v4_defconfig b/configs/gt90h_v4_defconfig index c81f0f6c5eb..1a5fe06bbe1 100644 --- a/configs/gt90h_v4_defconfig +++ b/configs/gt90h_v4_defconfig @@ -16,8 +16,6 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 CONFIG_USB_MUSB_HOST=y diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig index c5cbce52a9b..5f3424e6a8d 100644 --- a/configs/guruplug_defconfig +++ b/configs/guruplug_defconfig @@ -49,7 +49,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y -CONFIG_DM=y CONFIG_SYS_ATA_STRIDE=4 CONFIG_SYS_ATA_DATA_OFFSET=0x100 CONFIG_SYS_ATA_REG_OFFSET=0x100 diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index 01a4d28caf6..decbf5fbd60 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -94,7 +94,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_PART=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_NETCONSOLE=y -CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y CONFIG_LBA48=y diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index fb5870fa580..a5b31514ff1 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -94,7 +94,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_PART=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_NETCONSOLE=y -CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y CONFIG_LBA48=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index 9f38dfabb67..ff826deb73e 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -97,7 +97,6 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_NETCONSOLE=y -CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y CONFIG_LBA48=y diff --git a/configs/h8_homlet_v2_defconfig b/configs/h8_homlet_v2_defconfig index 8af0b3c3332..29f965200e1 100644 --- a/configs/h8_homlet_v2_defconfig +++ b/configs/h8_homlet_v2_defconfig @@ -11,8 +11,6 @@ CONFIG_USB1_VBUS_PIN="PL6" CONFIG_AXP_GPIO=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO4_VOLT=3300 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/i12-tvbox_defconfig b/configs/i12-tvbox_defconfig index 29cea180201..257dd89af45 100644 --- a/configs/i12-tvbox_defconfig +++ b/configs/i12-tvbox_defconfig @@ -7,9 +7,7 @@ CONFIG_DRAM_CLK=384 CONFIG_MACPWR="PH21" CONFIG_VIDEO_COMPOSITE=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/iNet_3F_defconfig b/configs/iNet_3F_defconfig index 8b6936497fd..436e3a8c209 100644 --- a/configs/iNet_3F_defconfig +++ b/configs/iNet_3F_defconfig @@ -14,9 +14,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/iNet_3W_defconfig b/configs/iNet_3W_defconfig index a05876a18f3..6978f8b0aab 100644 --- a/configs/iNet_3W_defconfig +++ b/configs/iNet_3W_defconfig @@ -14,9 +14,7 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/iNet_86VS_defconfig b/configs/iNet_86VS_defconfig index 3a9f30877b0..2c8ecb51de0 100644 --- a/configs/iNet_86VS_defconfig +++ b/configs/iNet_86VS_defconfig @@ -13,9 +13,7 @@ CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/iNet_D978_rev2_defconfig b/configs/iNet_D978_rev2_defconfig index 664745c9f13..9a90252dbd7 100644 --- a/configs/iNet_D978_rev2_defconfig +++ b/configs/iNet_D978_rev2_defconfig @@ -17,8 +17,6 @@ CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 # CONFIG_REQUIRE_SERIAL_CONSOLE is not set CONFIG_CONS_INDEX=5 diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig index c77fb0cf9ad..69fad829435 100644 --- a/configs/ib62x0_defconfig +++ b/configs/ib62x0_defconfig @@ -47,7 +47,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y -CONFIG_DM=y CONFIG_SYS_ATA_STRIDE=4 CONFIG_SYS_ATA_DATA_OFFSET=0x100 CONFIG_SYS_ATA_REG_OFFSET=0x100 diff --git a/configs/icnova-a20-swac_defconfig b/configs/icnova-a20-swac_defconfig index e50db015cdc..c759d7e2357 100644 --- a/configs/icnova-a20-swac_defconfig +++ b/configs/icnova-a20-swac_defconfig @@ -17,9 +17,7 @@ CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo CONFIG_VIDEO_LCD_POWER="PH22" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_UNZIP=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig index c91d58d31ac..cb4d91df8cd 100644 --- a/configs/iconnect_defconfig +++ b/configs/iconnect_defconfig @@ -51,7 +51,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y -CONFIG_DM=y # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/imx28_xea_defconfig b/configs/imx28_xea_defconfig index d7e103daa1e..dcb2f4eba06 100644 --- a/configs/imx28_xea_defconfig +++ b/configs/imx28_xea_defconfig @@ -84,7 +84,6 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_DEVRES=y CONFIG_MXS_GPIO=y diff --git a/configs/imx28_xea_sb_defconfig b/configs/imx28_xea_sb_defconfig index fd1e9fdc72e..3ffa4e0f93a 100644 --- a/configs/imx28_xea_sb_defconfig +++ b/configs/imx28_xea_sb_defconfig @@ -64,7 +64,6 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_DEVRES=y # CONFIG_SPL_BLK is not set diff --git a/configs/inet1_defconfig b/configs/inet1_defconfig index dae6b23a936..f81120b1197 100644 --- a/configs/inet1_defconfig +++ b/configs/inet1_defconfig @@ -14,9 +14,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/inet86dz_defconfig b/configs/inet86dz_defconfig index 0382a4a0541..3ade9fea824 100644 --- a/configs/inet86dz_defconfig +++ b/configs/inet86dz_defconfig @@ -16,8 +16,6 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 CONFIG_USB_MUSB_HOST=y diff --git a/configs/inet97fv2_defconfig b/configs/inet97fv2_defconfig index f3e374c2e34..d5d2dc32c93 100644 --- a/configs/inet97fv2_defconfig +++ b/configs/inet97fv2_defconfig @@ -13,9 +13,7 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/inet98v_rev2_defconfig b/configs/inet98v_rev2_defconfig index c392fc2bb87..bd6c45bd661 100644 --- a/configs/inet98v_rev2_defconfig +++ b/configs/inet98v_rev2_defconfig @@ -15,9 +15,7 @@ CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/inet9f_rev03_defconfig b/configs/inet9f_rev03_defconfig index 81a1c9940fd..4485f930236 100644 --- a/configs/inet9f_rev03_defconfig +++ b/configs/inet9f_rev03_defconfig @@ -13,9 +13,7 @@ CONFIG_VIDEO_LCD_POWER="PH8" CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/inet_q972_defconfig b/configs/inet_q972_defconfig index a4a828c70a3..1769256b7d1 100644 --- a/configs/inet_q972_defconfig +++ b/configs/inet_q972_defconfig @@ -15,8 +15,6 @@ CONFIG_VIDEO_LCD_DCLK_PHASE=0 CONFIG_VIDEO_LCD_BL_EN="PA25" CONFIG_VIDEO_LCD_BL_PWM="PH13" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig index 5ea37d11424..5b383c3f4c8 100644 --- a/configs/inetspace_v2_defconfig +++ b/configs/inetspace_v2_defconfig @@ -52,7 +52,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y -CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 CONFIG_LBA48=y diff --git a/configs/iot2050_defconfig b/configs/iot2050_defconfig index 81cce0812b5..4ae85f391b7 100644 --- a/configs/iot2050_defconfig +++ b/configs/iot2050_defconfig @@ -74,7 +74,6 @@ CONFIG_SPL_OF_LIST="k3-am65-iot2050-spl" CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig index e65777f06d4..e7cdd84ecba 100644 --- a/configs/j7200_evm_a72_defconfig +++ b/configs/j7200_evm_a72_defconfig @@ -94,7 +94,6 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y diff --git a/configs/j7200_evm_r5_defconfig b/configs/j7200_evm_r5_defconfig index 9ac6ef16786..87101cbf53e 100644 --- a/configs/j7200_evm_r5_defconfig +++ b/configs/j7200_evm_r5_defconfig @@ -78,7 +78,6 @@ CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y diff --git a/configs/j7200_hs_evm_a72_defconfig b/configs/j7200_hs_evm_a72_defconfig index 7c95b00af54..b9598ca1fe2 100644 --- a/configs/j7200_hs_evm_a72_defconfig +++ b/configs/j7200_hs_evm_a72_defconfig @@ -95,7 +95,6 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y diff --git a/configs/j7200_hs_evm_r5_defconfig b/configs/j7200_hs_evm_r5_defconfig index 0cf9c688e4a..608778ade86 100644 --- a/configs/j7200_hs_evm_r5_defconfig +++ b/configs/j7200_hs_evm_r5_defconfig @@ -78,7 +78,6 @@ CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index f139fc92c8e..48a24446941 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -97,7 +97,6 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_FAT_DEVICE_AND_PART="1:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index 5e25ed620fa..d6da4c6ae2e 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -84,7 +84,6 @@ CONFIG_SPL_OF_LIST="k3-j721e-r5-common-proc-board k3-j721e-r5-sk" CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y diff --git a/configs/j721e_hs_evm_a72_defconfig b/configs/j721e_hs_evm_a72_defconfig index f9a8e9dc1d5..a1cc7da0bfb 100644 --- a/configs/j721e_hs_evm_a72_defconfig +++ b/configs/j721e_hs_evm_a72_defconfig @@ -98,7 +98,6 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_FAT_DEVICE_AND_PART="1:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y diff --git a/configs/j721e_hs_evm_r5_defconfig b/configs/j721e_hs_evm_r5_defconfig index 9ae03ade0fd..eb9df365538 100644 --- a/configs/j721e_hs_evm_r5_defconfig +++ b/configs/j721e_hs_evm_r5_defconfig @@ -84,7 +84,6 @@ CONFIG_SPL_OF_LIST="k3-j721e-r5-common-proc-board k3-j721e-r5-sk" CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig index a06312f4f5d..9fe30066899 100644 --- a/configs/j721s2_evm_a72_defconfig +++ b/configs/j721s2_evm_a72_defconfig @@ -95,7 +95,6 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig index 98d69a18b95..f74333f27cb 100644 --- a/configs/j721s2_evm_r5_defconfig +++ b/configs/j721s2_evm_r5_defconfig @@ -85,7 +85,6 @@ CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y diff --git a/configs/j721s2_hs_evm_a72_defconfig b/configs/j721s2_hs_evm_a72_defconfig index 7ae0c3ba7b9..9207dfab7ff 100644 --- a/configs/j721s2_hs_evm_a72_defconfig +++ b/configs/j721s2_hs_evm_a72_defconfig @@ -96,7 +96,6 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y diff --git a/configs/j721s2_hs_evm_r5_defconfig b/configs/j721s2_hs_evm_r5_defconfig index 8df968c65cf..ac72f7f8a83 100644 --- a/configs/j721s2_hs_evm_r5_defconfig +++ b/configs/j721s2_hs_evm_r5_defconfig @@ -85,7 +85,6 @@ CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y diff --git a/configs/jesurun_q5_defconfig b/configs/jesurun_q5_defconfig index 5fce5836c9c..0ff666b2ee5 100644 --- a/configs/jesurun_q5_defconfig +++ b/configs/jesurun_q5_defconfig @@ -8,9 +8,7 @@ CONFIG_MACPWR="PH19" CONFIG_USB0_VBUS_PIN="PB9" CONFIG_VIDEO_COMPOSITE=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index 0789bc927d2..ed2affd8f7f 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -68,7 +68,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=32 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_TI_EDMA3=y CONFIG_SYS_I2C_DAVINCI=y diff --git a/configs/k2e_hs_evm_defconfig b/configs/k2e_hs_evm_defconfig index 4ded49d4f38..c19c69903b1 100644 --- a/configs/k2e_hs_evm_defconfig +++ b/configs/k2e_hs_evm_defconfig @@ -43,7 +43,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=32 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_TI_EDMA3=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_DAVINCI=y diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index f0d106a3b27..c7786216df5 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -68,7 +68,6 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=32 CONFIG_BOOTP_SEND_HOSTNAME=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_DFU_MMC=y CONFIG_TI_EDMA3=y diff --git a/configs/k2g_hs_evm_defconfig b/configs/k2g_hs_evm_defconfig index 41e36f95eda..5b487972818 100644 --- a/configs/k2g_hs_evm_defconfig +++ b/configs/k2g_hs_evm_defconfig @@ -44,7 +44,6 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=32 CONFIG_BOOTP_SEND_HOSTNAME=y -CONFIG_DM=y CONFIG_DFU_MMC=y CONFIG_TI_EDMA3=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index e6e71942a7e..973d812385b 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -68,7 +68,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=32 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_TI_EDMA3=y CONFIG_SYS_I2C_DAVINCI=y diff --git a/configs/k2hk_hs_evm_defconfig b/configs/k2hk_hs_evm_defconfig index 6b9b982112b..fe25c090bbf 100644 --- a/configs/k2hk_hs_evm_defconfig +++ b/configs/k2hk_hs_evm_defconfig @@ -43,7 +43,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=32 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_TI_EDMA3=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_DAVINCI=y diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index 18f2ef6dd19..437cf4b06d9 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -68,7 +68,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=32 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_TI_EDMA3=y CONFIG_SYS_I2C_DAVINCI=y diff --git a/configs/k2l_hs_evm_defconfig b/configs/k2l_hs_evm_defconfig index 518b062dc3e..9b98bc9f2ab 100644 --- a/configs/k2l_hs_evm_defconfig +++ b/configs/k2l_hs_evm_defconfig @@ -46,7 +46,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=32 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_TI_EDMA3=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_DAVINCI=y diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig index 00325add541..a13d799f367 100644 --- a/configs/kmcent2_defconfig +++ b/configs/kmcent2_defconfig @@ -56,7 +56,6 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR_REDUND=0xebf00000 CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="fm1-mac5" -CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_FSL_CAAM=y diff --git a/configs/legoev3_defconfig b/configs/legoev3_defconfig index 36e3d706923..245e7579aaf 100644 --- a/configs/legoev3_defconfig +++ b/configs/legoev3_defconfig @@ -44,7 +44,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y # CONFIG_NET is not set -CONFIG_DM=y # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_DM_I2C=y CONFIG_SYS_I2C_DAVINCI=y diff --git a/configs/libretech_all_h3_cc_h2_plus_defconfig b/configs/libretech_all_h3_cc_h2_plus_defconfig index ca995568024..8725fe64cdc 100644 --- a/configs/libretech_all_h3_cc_h2_plus_defconfig +++ b/configs/libretech_all_h3_cc_h2_plus_defconfig @@ -6,8 +6,6 @@ CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/libretech_all_h3_cc_h3_defconfig b/configs/libretech_all_h3_cc_h3_defconfig index 7ca312c8fbc..5275fdc36da 100644 --- a/configs/libretech_all_h3_cc_h3_defconfig +++ b/configs/libretech_all_h3_cc_h3_defconfig @@ -6,8 +6,6 @@ CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/libretech_all_h3_cc_h5_defconfig b/configs/libretech_all_h3_cc_h5_defconfig index 13ff7582124..96274019499 100644 --- a/configs/libretech_all_h3_cc_h5_defconfig +++ b/configs/libretech_all_h3_cc_h5_defconfig @@ -6,9 +6,6 @@ CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x54000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/libretech_all_h3_it_h5_defconfig b/configs/libretech_all_h3_it_h5_defconfig index 75280ee1e3b..cb7ffb4d7da 100644 --- a/configs/libretech_all_h3_it_h5_defconfig +++ b/configs/libretech_all_h3_it_h5_defconfig @@ -7,9 +7,6 @@ CONFIG_DRAM_CLK=672 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x54000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SPI_FLASH_XMC=y CONFIG_SPI=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/libretech_all_h5_cc_h5_defconfig b/configs/libretech_all_h5_cc_h5_defconfig index f42747e9466..c3aa4b10617 100644 --- a/configs/libretech_all_h5_cc_h5_defconfig +++ b/configs/libretech_all_h5_cc_h5_defconfig @@ -7,9 +7,6 @@ CONFIG_DRAM_CLK=672 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x54000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SPI_FLASH_XMC=y CONFIG_SUN8I_EMAC=y CONFIG_SPI=y diff --git a/configs/licheepi_nano_defconfig b/configs/licheepi_nano_defconfig index a9776bbcace..12a43c1ec10 100644 --- a/configs/licheepi_nano_defconfig +++ b/configs/licheepi_nano_defconfig @@ -1,7 +1,4 @@ CONFIG_ARM=y -CONFIG_SKIP_LOWLEVEL_INIT_ONLY=y -CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y -CONFIG_SYS_DCACHE_OFF=y CONFIG_ARCH_SUNXI=y CONFIG_DEFAULT_DEVICE_TREE="suniv-f1c100s-licheepi-nano" CONFIG_SPL=y @@ -10,8 +7,6 @@ CONFIG_DRAM_CLK=156 CONFIG_DRAM_ZQ=0 # CONFIG_VIDEO_SUNXI is not set CONFIG_SPL_SPI_SUNXI=y -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_XTX=y CONFIG_SPI=y diff --git a/configs/ls1012a2g5rdb_qspi_defconfig b/configs/ls1012a2g5rdb_qspi_defconfig index 20326acf981..08b3ea6df4f 100644 --- a/configs/ls1012a2g5rdb_qspi_defconfig +++ b/configs/ls1012a2g5rdb_qspi_defconfig @@ -45,7 +45,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1012a2g5rdb_tfa_defconfig b/configs/ls1012a2g5rdb_tfa_defconfig index ab2b5bbe1da..0120aeb7caa 100644 --- a/configs/ls1012a2g5rdb_tfa_defconfig +++ b/configs/ls1012a2g5rdb_tfa_defconfig @@ -43,7 +43,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1012afrdm_qspi_defconfig b/configs/ls1012afrdm_qspi_defconfig index ba77948d3ed..c1b85292e78 100644 --- a/configs/ls1012afrdm_qspi_defconfig +++ b/configs/ls1012afrdm_qspi_defconfig @@ -43,7 +43,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1012afrdm_tfa_defconfig b/configs/ls1012afrdm_tfa_defconfig index 65f868875df..c8d0e68bd83 100644 --- a/configs/ls1012afrdm_tfa_defconfig +++ b/configs/ls1012afrdm_tfa_defconfig @@ -41,7 +41,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig index 3790abdfdbf..949a401f101 100644 --- a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig @@ -43,7 +43,6 @@ CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_MPC8XXX_GPIO=y diff --git a/configs/ls1012afrwy_qspi_defconfig b/configs/ls1012afrwy_qspi_defconfig index e466f113364..d1e2d6f0dbc 100644 --- a/configs/ls1012afrwy_qspi_defconfig +++ b/configs/ls1012afrwy_qspi_defconfig @@ -48,7 +48,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_MPC8XXX_GPIO=y diff --git a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig index ca6062e5e67..04b6ff30a0e 100644 --- a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig @@ -41,7 +41,6 @@ CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_MPC8XXX_GPIO=y diff --git a/configs/ls1012afrwy_tfa_defconfig b/configs/ls1012afrwy_tfa_defconfig index 802d2b400ff..f8ee74f8d6c 100644 --- a/configs/ls1012afrwy_tfa_defconfig +++ b/configs/ls1012afrwy_tfa_defconfig @@ -45,7 +45,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_MPC8XXX_GPIO=y diff --git a/configs/ls1012aqds_qspi_defconfig b/configs/ls1012aqds_qspi_defconfig index fe3172c33e7..0b4f433f290 100644 --- a/configs/ls1012aqds_qspi_defconfig +++ b/configs/ls1012aqds_qspi_defconfig @@ -58,7 +58,6 @@ CONFIG_ENV_SPI_MAX_HZ=1000000 CONFIG_ENV_SPI_MODE=0x03 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig index 396be4d92fd..44b96fba67a 100644 --- a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig @@ -50,7 +50,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/ls1012aqds_tfa_defconfig b/configs/ls1012aqds_tfa_defconfig index 497e8eebf74..e72ef059276 100644 --- a/configs/ls1012aqds_tfa_defconfig +++ b/configs/ls1012aqds_tfa_defconfig @@ -57,7 +57,6 @@ CONFIG_ENV_SPI_MAX_HZ=1000000 CONFIG_ENV_SPI_MODE=0x03 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig index 6147d4b0bce..13e1a863b9e 100644 --- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig @@ -46,7 +46,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_MPC8XXX_GPIO=y diff --git a/configs/ls1012ardb_qspi_defconfig b/configs/ls1012ardb_qspi_defconfig index 01363359699..1b0869b011c 100644 --- a/configs/ls1012ardb_qspi_defconfig +++ b/configs/ls1012ardb_qspi_defconfig @@ -49,7 +49,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_MPC8XXX_GPIO=y diff --git a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig index 3fad11227b1..10c81343628 100644 --- a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig @@ -44,7 +44,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_MPC8XXX_GPIO=y diff --git a/configs/ls1012ardb_tfa_defconfig b/configs/ls1012ardb_tfa_defconfig index 161c0dee097..0a18e48a581 100644 --- a/configs/ls1012ardb_tfa_defconfig +++ b/configs/ls1012ardb_tfa_defconfig @@ -46,7 +46,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_MPC8XXX_GPIO=y diff --git a/configs/ls1021aiot_qspi_defconfig b/configs/ls1021aiot_qspi_defconfig index d731936d529..722623694f2 100644 --- a/configs/ls1021aiot_qspi_defconfig +++ b/configs/ls1021aiot_qspi_defconfig @@ -46,7 +46,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC2" -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig index c71ab781869..64ae1dfd189 100644 --- a/configs/ls1021aiot_sdcard_defconfig +++ b/configs/ls1021aiot_sdcard_defconfig @@ -73,7 +73,6 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC2" -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig index 778f22ac911..7f4a4fd0982 100644 --- a/configs/ls1021aqds_ddr4_nor_defconfig +++ b/configs/ls1021aqds_ddr4_nor_defconfig @@ -61,7 +61,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig index bf6ddb6cf01..78c69db78c3 100644 --- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig +++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig @@ -61,7 +61,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index da92ac13a10..3b7ad02e8b0 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -91,7 +91,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig index ee2c6b82edc..5992d1f4339 100644 --- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig @@ -59,7 +59,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig index 484ff026ba7..80f79c438c2 100644 --- a/configs/ls1021aqds_nor_defconfig +++ b/configs/ls1021aqds_nor_defconfig @@ -61,7 +61,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig index c19fd26dd6d..a3014316564 100644 --- a/configs/ls1021aqds_nor_lpuart_defconfig +++ b/configs/ls1021aqds_nor_lpuart_defconfig @@ -61,7 +61,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig index 750a5a501e5..69494a09cfe 100644 --- a/configs/ls1021aqds_qspi_defconfig +++ b/configs/ls1021aqds_qspi_defconfig @@ -59,7 +59,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index 66cee0b3d6e..54e82250b59 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -89,7 +89,6 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index 71eff4582f9..b528671b63f 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -86,7 +86,6 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC1" -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1021atsn_qspi_defconfig b/configs/ls1021atsn_qspi_defconfig index 8ca47afe505..74fb48c5450 100644 --- a/configs/ls1021atsn_qspi_defconfig +++ b/configs/ls1021atsn_qspi_defconfig @@ -44,7 +44,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig index 7817cfccfb3..63631f69434 100644 --- a/configs/ls1021atsn_sdcard_defconfig +++ b/configs/ls1021atsn_sdcard_defconfig @@ -70,7 +70,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig index f66aacc9912..a57d4da9ba8 100644 --- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig @@ -52,7 +52,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="ethernet@2d10000" -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_MPC8XXX_GPIO=y diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig index 110cf5d3d2b..a634b9e6fcb 100644 --- a/configs/ls1021atwr_nor_defconfig +++ b/configs/ls1021atwr_nor_defconfig @@ -54,7 +54,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="ethernet@2d10000" -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig index 9d8dbbf043b..7447b36a139 100644 --- a/configs/ls1021atwr_nor_lpuart_defconfig +++ b/configs/ls1021atwr_nor_lpuart_defconfig @@ -54,7 +54,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="ethernet@2d10000" -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig index 039c9842e99..f290cd3a105 100644 --- a/configs/ls1021atwr_qspi_defconfig +++ b/configs/ls1021atwr_qspi_defconfig @@ -55,7 +55,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="ethernet@2d10000" -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index a916959d57c..24d48b9ab6a 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -81,7 +81,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="ethernet@2d10000" -CONFIG_DM=y CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set CONFIG_MPC8XXX_GPIO=y diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index 65f033aed95..ffe377cda1e 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -82,7 +82,6 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="ethernet@2d10000" -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index 45c91797270..fb81e471df4 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -82,7 +82,6 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="ethernet@2d10000" -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig index b9728d6ffd9..038fbe5fc81 100644 --- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig @@ -49,7 +49,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_RX_ETH_BUFFER=8 -CONFIG_DM=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig index 6b305708bfa..d3edc795635 100644 --- a/configs/ls1028aqds_tfa_defconfig +++ b/configs/ls1028aqds_tfa_defconfig @@ -54,7 +54,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_RX_ETH_BUFFER=8 -CONFIG_DM=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1028aqds_tfa_lpuart_defconfig b/configs/ls1028aqds_tfa_lpuart_defconfig index c8fe769ced3..8cd90863a1c 100644 --- a/configs/ls1028aqds_tfa_lpuart_defconfig +++ b/configs/ls1028aqds_tfa_lpuart_defconfig @@ -53,7 +53,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_RX_ETH_BUFFER=8 -CONFIG_DM=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig index e40c59d0c66..2e454c2dd86 100644 --- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig @@ -48,7 +48,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_RX_ETH_BUFFER=8 -CONFIG_DM=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig index dd64b71f9b2..7826b526ae4 100644 --- a/configs/ls1028ardb_tfa_defconfig +++ b/configs/ls1028ardb_tfa_defconfig @@ -53,7 +53,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_RX_ETH_BUFFER=8 -CONFIG_DM=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig index 8f736ea4529..fa2dd86466f 100644 --- a/configs/ls1043aqds_defconfig +++ b/configs/ls1043aqds_defconfig @@ -61,7 +61,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig index 2a97e27ecfc..e0ddbe0a25e 100644 --- a/configs/ls1043aqds_lpuart_defconfig +++ b/configs/ls1043aqds_lpuart_defconfig @@ -61,7 +61,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index b0e8a472d32..d3808979019 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -90,7 +90,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig index c6fc5449c15..541a2f89859 100644 --- a/configs/ls1043aqds_nor_ddr3_defconfig +++ b/configs/ls1043aqds_nor_ddr3_defconfig @@ -61,7 +61,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig index 9b278fd0f40..660f4c850f2 100644 --- a/configs/ls1043aqds_qspi_defconfig +++ b/configs/ls1043aqds_qspi_defconfig @@ -61,7 +61,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index 0bb001305da..565970dbb84 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -88,7 +88,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index 7a2b8e68c27..ba1b7fe624d 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -86,7 +86,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig index 9e323a4a5c5..2e581e4eddb 100644 --- a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig @@ -57,7 +57,6 @@ CONFIG_CMD_CACHE=y CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y diff --git a/configs/ls1043aqds_tfa_defconfig b/configs/ls1043aqds_tfa_defconfig index 665c1ddbf3d..48c33a2993c 100644 --- a/configs/ls1043aqds_tfa_defconfig +++ b/configs/ls1043aqds_tfa_defconfig @@ -66,7 +66,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_BUS=0 CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig index 5632a95d7b9..ab171bc748f 100644 --- a/configs/ls1043ardb_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_SECURE_BOOT_defconfig @@ -47,7 +47,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y # CONFIG_DDR_SPD is not set CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_DDR_RAW_TIMING=y diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig index 39e50b2fdb6..a434aad061e 100644 --- a/configs/ls1043ardb_defconfig +++ b/configs/ls1043ardb_defconfig @@ -50,7 +50,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_FSL_CAAM=y # CONFIG_DDR_SPD is not set CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index 4ce6d5deea2..3a5b61b133a 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -73,7 +73,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index 9e969c04ec1..6100ba2c8b8 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -80,7 +80,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index 95d1ca752ec..33678c122eb 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -72,7 +72,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set CONFIG_MPC8XXX_GPIO=y diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index e731695ec4a..ad221a33294 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -78,7 +78,6 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y diff --git a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig index 374abeb1dc0..49929728f75 100644 --- a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig @@ -46,7 +46,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y # CONFIG_DDR_SPD is not set CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_DDR_RAW_TIMING=y diff --git a/configs/ls1043ardb_tfa_defconfig b/configs/ls1043ardb_tfa_defconfig index 1b408ebfed0..9128959bd3d 100644 --- a/configs/ls1043ardb_tfa_defconfig +++ b/configs/ls1043ardb_tfa_defconfig @@ -52,7 +52,6 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_NAND=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_FSL_CAAM=y # CONFIG_DDR_SPD is not set CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y diff --git a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig index 1be7002a185..d2ad85efe2f 100644 --- a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig @@ -42,7 +42,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y # CONFIG_DDR_SPD is not set diff --git a/configs/ls1046afrwy_tfa_defconfig b/configs/ls1046afrwy_tfa_defconfig index f41434c7419..5f972482266 100644 --- a/configs/ls1046afrwy_tfa_defconfig +++ b/configs/ls1046afrwy_tfa_defconfig @@ -48,7 +48,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig index 121228c266c..58130015a63 100644 --- a/configs/ls1046aqds_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_SECURE_BOOT_defconfig @@ -59,7 +59,6 @@ CONFIG_CMD_CACHE=y CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig index 864a352e99d..3d5be39e6dd 100644 --- a/configs/ls1046aqds_defconfig +++ b/configs/ls1046aqds_defconfig @@ -62,7 +62,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig index 5323f7f0645..dfdc9a3af93 100644 --- a/configs/ls1046aqds_lpuart_defconfig +++ b/configs/ls1046aqds_lpuart_defconfig @@ -62,7 +62,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig index b44336d19fa..753e7b54524 100644 --- a/configs/ls1046aqds_nand_defconfig +++ b/configs/ls1046aqds_nand_defconfig @@ -89,7 +89,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig index 27800069676..8a08f9a9901 100644 --- a/configs/ls1046aqds_qspi_defconfig +++ b/configs/ls1046aqds_qspi_defconfig @@ -62,7 +62,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig index ff9faad7185..7e12a9006a7 100644 --- a/configs/ls1046aqds_sdcard_ifc_defconfig +++ b/configs/ls1046aqds_sdcard_ifc_defconfig @@ -90,7 +90,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index 7bf45fdd1b5..47c0ae80631 100644 --- a/configs/ls1046aqds_sdcard_qspi_defconfig +++ b/configs/ls1046aqds_sdcard_qspi_defconfig @@ -88,7 +88,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig index 72ba77c4e29..e47b495aa25 100644 --- a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig @@ -58,7 +58,6 @@ CONFIG_CMD_CACHE=y CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y diff --git a/configs/ls1046aqds_tfa_defconfig b/configs/ls1046aqds_tfa_defconfig index e3721001f6c..9bcb70a82a7 100644 --- a/configs/ls1046aqds_tfa_defconfig +++ b/configs/ls1046aqds_tfa_defconfig @@ -67,7 +67,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_BUS=0 CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig index 680b64f2bd9..54c48f2ea64 100644 --- a/configs/ls1046ardb_emmc_defconfig +++ b/configs/ls1046ardb_emmc_defconfig @@ -78,7 +78,6 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig index b7dd4fec881..46a9b7c531f 100644 --- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig @@ -53,7 +53,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_DDR_ECC=y diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig index b4fad17250f..eb6f5c83424 100644 --- a/configs/ls1046ardb_qspi_defconfig +++ b/configs/ls1046ardb_qspi_defconfig @@ -57,7 +57,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig index ad895a70352..ae110b6ac8e 100644 --- a/configs/ls1046ardb_qspi_spl_defconfig +++ b/configs/ls1046ardb_qspi_spl_defconfig @@ -86,7 +86,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_ENV_IS_NOWHERE=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig index afd2c17d710..a4efdd5ce4f 100644 --- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig @@ -75,7 +75,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set CONFIG_DDR_ECC=y diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig index b39ccc36c22..dc388051c72 100644 --- a/configs/ls1046ardb_sdcard_defconfig +++ b/configs/ls1046ardb_sdcard_defconfig @@ -78,7 +78,6 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig index cbad81ae02b..2efb0467991 100644 --- a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig @@ -47,7 +47,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_DDR_ECC=y diff --git a/configs/ls1046ardb_tfa_defconfig b/configs/ls1046ardb_tfa_defconfig index 228c4683783..00265b16126 100644 --- a/configs/ls1046ardb_tfa_defconfig +++ b/configs/ls1046ardb_tfa_defconfig @@ -53,7 +53,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FM1@DTSEC3" -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls1088aqds_defconfig b/configs/ls1088aqds_defconfig index 48258e33a4e..5c06d8c2623 100644 --- a/configs/ls1088aqds_defconfig +++ b/configs/ls1088aqds_defconfig @@ -59,7 +59,6 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig index d3d5cf42f5b..14533c8ee23 100644 --- a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig @@ -55,7 +55,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1088aqds_qspi_defconfig b/configs/ls1088aqds_qspi_defconfig index 13cae395470..1964c62f13f 100644 --- a/configs/ls1088aqds_qspi_defconfig +++ b/configs/ls1088aqds_qspi_defconfig @@ -58,7 +58,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig index 1140cc1cc92..6a1ceb3b73c 100644 --- a/configs/ls1088aqds_sdcard_ifc_defconfig +++ b/configs/ls1088aqds_sdcard_ifc_defconfig @@ -79,7 +79,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig index e947273a018..b6cc4fd8992 100644 --- a/configs/ls1088aqds_sdcard_qspi_defconfig +++ b/configs/ls1088aqds_sdcard_qspi_defconfig @@ -77,7 +77,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1088aqds_tfa_defconfig b/configs/ls1088aqds_tfa_defconfig index 0b8e6293981..4a49c094b30 100644 --- a/configs/ls1088aqds_tfa_defconfig +++ b/configs/ls1088aqds_tfa_defconfig @@ -65,7 +65,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig index ed430dd8afb..1ca86397139 100644 --- a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig @@ -57,7 +57,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1088ardb_qspi_defconfig b/configs/ls1088ardb_qspi_defconfig index f920cc9e9e7..008c4b56e0a 100644 --- a/configs/ls1088ardb_qspi_defconfig +++ b/configs/ls1088ardb_qspi_defconfig @@ -60,7 +60,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig index c569bdaabc6..e62892c4d5e 100644 --- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig @@ -78,7 +78,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SCSI_AHCI=y # CONFIG_SPL_BLK is not set diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig index 56d94d86a0f..b978b660519 100644 --- a/configs/ls1088ardb_sdcard_qspi_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_defconfig @@ -79,7 +79,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig index 62c3cee99d8..3119175e0e3 100644 --- a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig @@ -55,7 +55,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1088ardb_tfa_defconfig b/configs/ls1088ardb_tfa_defconfig index e67a7431117..88e670c5e4a 100644 --- a/configs/ls1088ardb_tfa_defconfig +++ b/configs/ls1088ardb_tfa_defconfig @@ -61,7 +61,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig index 034f15760b4..6dcec8e8bf9 100644 --- a/configs/ls2080aqds_SECURE_BOOT_defconfig +++ b/configs/ls2080aqds_SECURE_BOOT_defconfig @@ -49,7 +49,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig index d8efe46f3c6..2aff7982682 100644 --- a/configs/ls2080aqds_defconfig +++ b/configs/ls2080aqds_defconfig @@ -51,7 +51,6 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index a0fbb7d3c34..6efe9426b35 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -71,7 +71,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig index 9925333678b..3667c213e96 100644 --- a/configs/ls2080aqds_qspi_defconfig +++ b/configs/ls2080aqds_qspi_defconfig @@ -52,7 +52,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig index 9d852531092..360d13bc826 100644 --- a/configs/ls2080aqds_sdcard_defconfig +++ b/configs/ls2080aqds_sdcard_defconfig @@ -67,7 +67,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig index 46dde0b6b8b..e279a387ce1 100644 --- a/configs/ls2080ardb_SECURE_BOOT_defconfig +++ b/configs/ls2080ardb_SECURE_BOOT_defconfig @@ -53,7 +53,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_DDR_CLK_FREQ=133333333 diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig index 87129967f25..e9818d62de3 100644 --- a/configs/ls2080ardb_defconfig +++ b/configs/ls2080ardb_defconfig @@ -55,7 +55,6 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index da463ebf42b..b6ae3c8df31 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -75,7 +75,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig index cc4bbaca436..a3d29e86551 100644 --- a/configs/ls2081ardb_defconfig +++ b/configs/ls2081ardb_defconfig @@ -52,7 +52,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y diff --git a/configs/ls2088aqds_tfa_defconfig b/configs/ls2088aqds_tfa_defconfig index 12a0125777a..639a16b5bba 100644 --- a/configs/ls2088aqds_tfa_defconfig +++ b/configs/ls2088aqds_tfa_defconfig @@ -58,7 +58,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig index a5438b73408..d621eb6c9ee 100644 --- a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig @@ -49,7 +49,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_DDR_CLK_FREQ=133333333 diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig index 395ba7660e8..6d737812721 100644 --- a/configs/ls2088ardb_qspi_defconfig +++ b/configs/ls2088ardb_qspi_defconfig @@ -55,7 +55,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig index 66b6d53da04..bedf588e1f3 100644 --- a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig @@ -54,7 +54,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_DDR_CLK_FREQ=133333333 diff --git a/configs/ls2088ardb_tfa_defconfig b/configs/ls2088ardb_tfa_defconfig index 6fd1556d01b..c0567964fb6 100644 --- a/configs/ls2088ardb_tfa_defconfig +++ b/configs/ls2088ardb_tfa_defconfig @@ -60,7 +60,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig index 441cd8ef24f..74a458de477 100644 --- a/configs/lschlv2_defconfig +++ b/configs/lschlv2_defconfig @@ -46,7 +46,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y -CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 CONFIG_LBA48=y diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig index f350f8ff427..474e1c64fc7 100644 --- a/configs/lsxhl_defconfig +++ b/configs/lsxhl_defconfig @@ -47,7 +47,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y -CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 CONFIG_LBA48=y diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig index 89c8b96f20a..99c861ea8bd 100644 --- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig @@ -55,7 +55,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC17@rgmii-id" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig index 88482bef13c..3610d259dbf 100644 --- a/configs/lx2160aqds_tfa_defconfig +++ b/configs/lx2160aqds_tfa_defconfig @@ -61,7 +61,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC17@rgmii-id" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig index eb6014864c1..13e46adecd0 100644 --- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig @@ -53,7 +53,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig index 998339c16ae..03c3a57bee9 100644 --- a/configs/lx2160ardb_tfa_defconfig +++ b/configs/lx2160ardb_tfa_defconfig @@ -60,7 +60,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/lx2160ardb_tfa_stmm_defconfig b/configs/lx2160ardb_tfa_stmm_defconfig index 6d3813041a3..79b0e477a9e 100644 --- a/configs/lx2160ardb_tfa_stmm_defconfig +++ b/configs/lx2160ardb_tfa_stmm_defconfig @@ -60,7 +60,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig index 90ebff4d8c0..4509d448039 100644 --- a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig @@ -57,7 +57,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC17@rgmii-id" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y diff --git a/configs/lx2162aqds_tfa_defconfig b/configs/lx2162aqds_tfa_defconfig index b178c8d20a3..81511d31db6 100644 --- a/configs/lx2162aqds_tfa_defconfig +++ b/configs/lx2162aqds_tfa_defconfig @@ -63,7 +63,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC17@rgmii-id" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/lx2162aqds_tfa_verified_boot_defconfig b/configs/lx2162aqds_tfa_verified_boot_defconfig index 1f4826eec35..72611eb8eee 100644 --- a/configs/lx2162aqds_tfa_verified_boot_defconfig +++ b/configs/lx2162aqds_tfa_verified_boot_defconfig @@ -64,7 +64,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="DPMAC17@rgmii-id" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y CONFIG_FSL_CAAM=y diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig index 5db591a2120..4bd98d235b6 100644 --- a/configs/m53menlo_defconfig +++ b/configs/m53menlo_defconfig @@ -76,7 +76,6 @@ CONFIG_BOOTFILE="boot/fitImage" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FEC0" CONFIG_VERSION_VARIABLE=y -CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_BOOTCOUNT_MAGIC=0x0B01C041 CONFIG_DM_I2C=y diff --git a/configs/marsboard_defconfig b/configs/marsboard_defconfig index 4fe153216b2..ed9c843a909 100644 --- a/configs/marsboard_defconfig +++ b/configs/marsboard_defconfig @@ -34,7 +34,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ARP_TIMEOUT=200 -CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/meesc_dataflash_defconfig b/configs/meesc_dataflash_defconfig index 315c4841825..da9a6db3095 100644 --- a/configs/meesc_dataflash_defconfig +++ b/configs/meesc_dataflash_defconfig @@ -32,7 +32,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RETRY_COUNT=20 -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/meesc_defconfig b/configs/meesc_defconfig index 9246f095254..2babff3e213 100644 --- a/configs/meesc_defconfig +++ b/configs/meesc_defconfig @@ -31,7 +31,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RETRY_COUNT=20 -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/mixtile_loftq_defconfig b/configs/mixtile_loftq_defconfig index 11e3dfcf4ba..0e4cdc44670 100644 --- a/configs/mixtile_loftq_defconfig +++ b/configs/mixtile_loftq_defconfig @@ -9,8 +9,6 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB1_VBUS_PIN="PH24" CONFIG_USB2_VBUS_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_PHY_REALTEK=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y diff --git a/configs/mk802_a10s_defconfig b/configs/mk802_a10s_defconfig index 3ce7e5f1d68..21f7a6e535d 100644 --- a/configs/mk802_a10s_defconfig +++ b/configs/mk802_a10s_defconfig @@ -7,9 +7,7 @@ CONFIG_DRAM_CLK=432 CONFIG_DRAM_EMR1=0 CONFIG_USB1_VBUS_PIN="PB10" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/mk802_defconfig b/configs/mk802_defconfig index 0fd8d3adbd2..416565e5af2 100644 --- a/configs/mk802_defconfig +++ b/configs/mk802_defconfig @@ -5,8 +5,6 @@ CONFIG_SPL=y CONFIG_MACH_SUN4I=y CONFIG_USB2_VBUS_PIN="PH12" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/mk802ii_defconfig b/configs/mk802ii_defconfig index 942911bddba..965a9cd5c4b 100644 --- a/configs/mk802ii_defconfig +++ b/configs/mk802ii_defconfig @@ -4,9 +4,7 @@ CONFIG_DEFAULT_DEVICE_TREE="sun4i-a10-mk802ii" CONFIG_SPL=y CONFIG_MACH_SUN4I=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/mt7981_emmc_rfb_defconfig b/configs/mt7981_emmc_rfb_defconfig index 5f9f6d85827..e7809e691c6 100644 --- a/configs/mt7981_emmc_rfb_defconfig +++ b/configs/mt7981_emmc_rfb_defconfig @@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x80000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DEFAULT_DEVICE_TREE="mt7981-emmc-rfb" +CONFIG_SYS_PROMPT="MT7981> " CONFIG_TARGET_MT7981=y CONFIG_DEBUG_UART_BASE=0x11002000 CONFIG_DEBUG_UART_CLOCK=40000000 @@ -16,7 +17,6 @@ CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="mt7981-emmc-rfb" CONFIG_LOGLEVEL=7 CONFIG_LOG=y -CONFIG_SYS_PROMPT="MT7981> " CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=1049 # CONFIG_BOOTM_NETBSD is not set @@ -48,7 +48,6 @@ CONFIG_CLK=y CONFIG_MMC_HS200_SUPPORT=y CONFIG_MMC_MTK=y CONFIG_PHY_FIXED=y -CONFIG_DM_ETH=y CONFIG_MEDIATEK_ETH=y CONFIG_PINCTRL=y CONFIG_PINCONF=y diff --git a/configs/mt7981_rfb_defconfig b/configs/mt7981_rfb_defconfig index 88299e3e515..4f429006d14 100644 --- a/configs/mt7981_rfb_defconfig +++ b/configs/mt7981_rfb_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x41e00000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DEFAULT_DEVICE_TREE="mt7981-rfb" +CONFIG_SYS_PROMPT="MT7981> " CONFIG_TARGET_MT7981=y CONFIG_DEBUG_UART_BASE=0x11002000 CONFIG_DEBUG_UART_CLOCK=40000000 @@ -14,7 +15,6 @@ CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="mt7981-rfb" CONFIG_LOGLEVEL=7 CONFIG_LOG=y -CONFIG_SYS_PROMPT="MT7981> " CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=1049 # CONFIG_BOOTM_NETBSD is not set @@ -33,8 +33,6 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_REGMAP=y CONFIG_SYSCON=y -CONFIG_BLK=y -CONFIG_HAVE_BLOCK_DEVICE=y CONFIG_CLK=y # CONFIG_MMC is not set CONFIG_MTD=y @@ -53,7 +51,6 @@ CONFIG_SPI_FLASH_XMC=y CONFIG_SPI_FLASH_XTX=y CONFIG_SPI_FLASH_MTD=y CONFIG_PHY_FIXED=y -CONFIG_DM_ETH=y CONFIG_MEDIATEK_ETH=y CONFIG_PINCTRL=y CONFIG_PINCONF=y @@ -66,4 +63,3 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_MTK_SPIM=y CONFIG_HEXDUMP=y -# CONFIG_EFI_LOADER is not set diff --git a/configs/mt7981_sd_rfb_defconfig b/configs/mt7981_sd_rfb_defconfig index b5c765bd7cd..2a66a280caf 100644 --- a/configs/mt7981_sd_rfb_defconfig +++ b/configs/mt7981_sd_rfb_defconfig @@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x80000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DEFAULT_DEVICE_TREE="mt7981-sd-rfb" +CONFIG_SYS_PROMPT="MT7981> " CONFIG_TARGET_MT7981=y CONFIG_DEBUG_UART_BASE=0x11002000 CONFIG_DEBUG_UART_CLOCK=40000000 @@ -16,7 +17,6 @@ CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="mt7981-sd-rfb" CONFIG_LOGLEVEL=7 CONFIG_LOG=y -CONFIG_SYS_PROMPT="MT7981> " CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=1049 # CONFIG_BOOTM_NETBSD is not set @@ -48,7 +48,6 @@ CONFIG_CLK=y CONFIG_MMC_HS200_SUPPORT=y CONFIG_MMC_MTK=y CONFIG_PHY_FIXED=y -CONFIG_DM_ETH=y CONFIG_MEDIATEK_ETH=y CONFIG_PINCTRL=y CONFIG_PINCONF=y diff --git a/configs/mt7986_rfb_defconfig b/configs/mt7986_rfb_defconfig index ff1e63b6bd9..0c7411332ca 100644 --- a/configs/mt7986_rfb_defconfig +++ b/configs/mt7986_rfb_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x41e00000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 CONFIG_DEFAULT_DEVICE_TREE="mt7986a-rfb" +CONFIG_SYS_PROMPT="MT7986> " CONFIG_TARGET_MT7986=y CONFIG_DEBUG_UART_BASE=0x11002000 CONFIG_DEBUG_UART_CLOCK=40000000 @@ -14,7 +15,6 @@ CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="mt7986a-rfb" CONFIG_LOGLEVEL=7 CONFIG_LOG=y -CONFIG_SYS_PROMPT="MT7986> " CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=1049 # CONFIG_BOOTM_NETBSD is not set @@ -51,7 +51,6 @@ CONFIG_SPI_FLASH_XMC=y CONFIG_SPI_FLASH_XTX=y CONFIG_SPI_FLASH_MTD=y CONFIG_PHY_FIXED=y -CONFIG_DM_ETH=y CONFIG_MEDIATEK_ETH=y CONFIG_PINCTRL=y CONFIG_PINCONF=y diff --git a/configs/mt7986a_bpir3_emmc_defconfig b/configs/mt7986a_bpir3_emmc_defconfig index 3e368b68de3..11ab8d13fd6 100644 --- a/configs/mt7986a_bpir3_emmc_defconfig +++ b/configs/mt7986a_bpir3_emmc_defconfig @@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x80000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DEFAULT_DEVICE_TREE="mt7986a-emmc-rfb" +CONFIG_SYS_PROMPT="MT7986> " CONFIG_TARGET_MT7986=y CONFIG_DEBUG_UART_BASE=0x11002000 CONFIG_DEBUG_UART_CLOCK=40000000 @@ -16,7 +17,6 @@ CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="mt7986a-emmc-rfb" CONFIG_LOGLEVEL=7 CONFIG_LOG=y -CONFIG_SYS_PROMPT="MT7986> " CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=1049 # CONFIG_BOOTM_NETBSD is not set @@ -48,7 +48,6 @@ CONFIG_CLK=y CONFIG_MMC_HS200_SUPPORT=y CONFIG_MMC_MTK=y CONFIG_PHY_FIXED=y -CONFIG_DM_ETH=y CONFIG_MEDIATEK_ETH=y CONFIG_PINCTRL=y CONFIG_PINCONF=y diff --git a/configs/mt7986a_bpir3_sd_defconfig b/configs/mt7986a_bpir3_sd_defconfig index b9a69a3d3de..9420a5ac666 100644 --- a/configs/mt7986a_bpir3_sd_defconfig +++ b/configs/mt7986a_bpir3_sd_defconfig @@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x80000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DEFAULT_DEVICE_TREE="mt7986a-sd-rfb" +CONFIG_SYS_PROMPT="MT7986> " CONFIG_TARGET_MT7986=y CONFIG_DEBUG_UART_BASE=0x11002000 CONFIG_DEBUG_UART_CLOCK=40000000 @@ -16,7 +17,6 @@ CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="mt7986a-sd-rfb" CONFIG_LOGLEVEL=7 CONFIG_LOG=y -CONFIG_SYS_PROMPT="MT7986> " CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=1049 # CONFIG_BOOTM_NETBSD is not set @@ -48,7 +48,6 @@ CONFIG_CLK=y CONFIG_MMC_HS200_SUPPORT=y CONFIG_MMC_MTK=y CONFIG_PHY_FIXED=y -CONFIG_DM_ETH=y CONFIG_MEDIATEK_ETH=y CONFIG_PINCTRL=y CONFIG_PINCONF=y diff --git a/configs/mx23_olinuxino_defconfig b/configs/mx23_olinuxino_defconfig index 9ff772434b7..1cb13db7a39 100644 --- a/configs/mx23_olinuxino_defconfig +++ b/configs/mx23_olinuxino_defconfig @@ -39,7 +39,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y -CONFIG_DM=y CONFIG_MXS_GPIO=y CONFIG_LED_STATUS=y CONFIG_LED_STATUS_GPIO=y diff --git a/configs/mx23evk_defconfig b/configs/mx23evk_defconfig index 56122873c4f..ef1b6d71dbe 100644 --- a/configs/mx23evk_defconfig +++ b/configs/mx23evk_defconfig @@ -42,7 +42,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y # CONFIG_NET is not set -CONFIG_DM=y CONFIG_MXS_GPIO=y CONFIG_MMC_MXS=y CONFIG_PINCTRL=y diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig index bdfad9fec62..b1877192ee7 100644 --- a/configs/mx28evk_defconfig +++ b/configs/mx28evk_defconfig @@ -50,7 +50,6 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y # CONFIG_NET is not set -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_MXS_GPIO=y CONFIG_MMC_MXS=y diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig index 82260a98321..8ce4656e1ad 100644 --- a/configs/mx51evk_defconfig +++ b/configs/mx51evk_defconfig @@ -40,7 +40,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FEC0" CONFIG_ARP_TIMEOUT=200 -CONFIG_DM=y CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_PHYLIB=y diff --git a/configs/mx53loco_defconfig b/configs/mx53loco_defconfig index cf0fd41a996..945ccfde146 100644 --- a/configs/mx53loco_defconfig +++ b/configs/mx53loco_defconfig @@ -43,7 +43,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FEC0" CONFIG_ARP_TIMEOUT=200 -CONFIG_DM=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MXC=y CONFIG_FSL_ESDHC_IMX=y diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig index c9c6b652014..7fadb6c1aff 100644 --- a/configs/mx53ppd_defconfig +++ b/configs/mx53ppd_defconfig @@ -44,7 +44,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ARP_TIMEOUT=200 -CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_DM_BOOTCOUNT_I2C_EEPROM=y diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig index 46d0e8c9903..9de5e77c75a 100644 --- a/configs/mx6cuboxi_defconfig +++ b/configs/mx6cuboxi_defconfig @@ -52,7 +52,6 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y diff --git a/configs/mx6memcal_defconfig b/configs/mx6memcal_defconfig index 021e8a6151e..17c15be9e3f 100644 --- a/configs/mx6memcal_defconfig +++ b/configs/mx6memcal_defconfig @@ -39,7 +39,6 @@ CONFIG_CMD_CACHE=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y # CONFIG_MMC is not set CONFIG_FSL_USDHC=y diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig index 8ccf6b76a5f..2834e479e88 100644 --- a/configs/mx6qsabrelite_defconfig +++ b/configs/mx6qsabrelite_defconfig @@ -51,7 +51,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FEC" CONFIG_NETCONSOLE=y -CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y CONFIG_LBA48=y diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig index 59369ba1526..7e71501d1a8 100644 --- a/configs/mx6slevk_defconfig +++ b/configs/mx6slevk_defconfig @@ -39,7 +39,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 -CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig index 7785cd5a6a3..662d1bc1ef0 100644 --- a/configs/mx6slevk_spinor_defconfig +++ b/configs/mx6slevk_spinor_defconfig @@ -39,7 +39,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig index 697d002b3f1..b6b15c064e1 100644 --- a/configs/mx6slevk_spl_defconfig +++ b/configs/mx6slevk_spl_defconfig @@ -53,7 +53,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 -CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/mx7ulp_com_defconfig b/configs/mx7ulp_com_defconfig index 2b55fbd3b29..47b6e4975d4 100644 --- a/configs/mx7ulp_com_defconfig +++ b/configs/mx7ulp_com_defconfig @@ -33,7 +33,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y # CONFIG_NET is not set -CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_IMX_RGPIO2P=y # CONFIG_MXC_GPIO is not set diff --git a/configs/mx7ulp_evk_defconfig b/configs/mx7ulp_evk_defconfig index 95cd22a59d8..0df2ee38938 100644 --- a/configs/mx7ulp_evk_defconfig +++ b/configs/mx7ulp_evk_defconfig @@ -34,7 +34,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_IMX_RGPIO2P=y # CONFIG_MXC_GPIO is not set diff --git a/configs/mx7ulp_evk_plugin_defconfig b/configs/mx7ulp_evk_plugin_defconfig index 45cdd74f09a..3afab2e8b0f 100644 --- a/configs/mx7ulp_evk_plugin_defconfig +++ b/configs/mx7ulp_evk_plugin_defconfig @@ -32,7 +32,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_IMX_RGPIO2P=y # CONFIG_MXC_GPIO is not set diff --git a/configs/nanopi_a64_defconfig b/configs/nanopi_a64_defconfig index 226ccaa12ff..70fc257eebd 100644 --- a/configs/nanopi_a64_defconfig +++ b/configs/nanopi_a64_defconfig @@ -5,9 +5,6 @@ CONFIG_SPL=y CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x54000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nanopi_m1_defconfig b/configs/nanopi_m1_defconfig index 47a6b7804e3..dc2dbd62900 100644 --- a/configs/nanopi_m1_defconfig +++ b/configs/nanopi_m1_defconfig @@ -5,7 +5,5 @@ CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=408 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nanopi_m1_plus_defconfig b/configs/nanopi_m1_plus_defconfig index c71d721f743..37b7817d869 100644 --- a/configs/nanopi_m1_plus_defconfig +++ b/configs/nanopi_m1_plus_defconfig @@ -8,8 +8,6 @@ CONFIG_MACPWR="PD6" CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nanopi_neo2_defconfig b/configs/nanopi_neo2_defconfig index 6fedf056ff7..95dd56aa04c 100644 --- a/configs/nanopi_neo2_defconfig +++ b/configs/nanopi_neo2_defconfig @@ -7,9 +7,6 @@ CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881977 # CONFIG_DRAM_ODT_EN is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x54000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nanopi_neo_air_defconfig b/configs/nanopi_neo_air_defconfig index b83b6a3499d..806d95c1cc7 100644 --- a/configs/nanopi_neo_air_defconfig +++ b/configs/nanopi_neo_air_defconfig @@ -7,7 +7,5 @@ CONFIG_DRAM_CLK=408 # CONFIG_VIDEO_DE2 is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nanopi_neo_defconfig b/configs/nanopi_neo_defconfig index f8377535e97..c0255196384 100644 --- a/configs/nanopi_neo_defconfig +++ b/configs/nanopi_neo_defconfig @@ -7,8 +7,6 @@ CONFIG_DRAM_CLK=408 # CONFIG_VIDEO_DE2 is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nanopi_neo_plus2_defconfig b/configs/nanopi_neo_plus2_defconfig index 3f834b756df..924ff38f17c 100644 --- a/configs/nanopi_neo_plus2_defconfig +++ b/configs/nanopi_neo_plus2_defconfig @@ -9,9 +9,6 @@ CONFIG_DRAM_ZQ=3881977 CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x54000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nanopi_r1s_h5_defconfig b/configs/nanopi_r1s_h5_defconfig index a0cf8ff0442..27cf172d72a 100644 --- a/configs/nanopi_r1s_h5_defconfig +++ b/configs/nanopi_r1s_h5_defconfig @@ -9,9 +9,6 @@ CONFIG_DRAM_ZQ=3881977 CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x54000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig index 07c00c88fff..0a5c79ab720 100644 --- a/configs/nas220_defconfig +++ b/configs/nas220_defconfig @@ -50,7 +50,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y -CONFIG_DM=y CONFIG_SYS_ATA_STRIDE=4 CONFIG_SYS_ATA_DATA_OFFSET=0x100 CONFIG_SYS_ATA_REG_OFFSET=0x100 diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig index a987fbb44fe..605527f2ff0 100644 --- a/configs/net2big_v2_defconfig +++ b/configs/net2big_v2_defconfig @@ -53,7 +53,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y -CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_LBA48=y diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig index fe6ff790a63..bc446bbcd8a 100644 --- a/configs/netspace_lite_v2_defconfig +++ b/configs/netspace_lite_v2_defconfig @@ -53,7 +53,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y -CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 CONFIG_LBA48=y diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig index d1913807bb1..6e28e73804c 100644 --- a/configs/netspace_max_v2_defconfig +++ b/configs/netspace_max_v2_defconfig @@ -53,7 +53,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y -CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_LBA48=y diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig index 5ce2fbdb93c..ce8049798e1 100644 --- a/configs/netspace_mini_v2_defconfig +++ b/configs/netspace_mini_v2_defconfig @@ -51,7 +51,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y -CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 CONFIG_LBA48=y diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig index 0134bae5bba..c26381a35fd 100644 --- a/configs/netspace_v2_defconfig +++ b/configs/netspace_v2_defconfig @@ -53,7 +53,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y -CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 CONFIG_LBA48=y diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig index ad3ad70a9d5..7da9dade3ac 100644 --- a/configs/nitrogen6dl2g_defconfig +++ b/configs/nitrogen6dl2g_defconfig @@ -58,7 +58,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FEC" CONFIG_NETCONSOLE=y -CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig index 4c92f6fd529..2e9be9cc66d 100644 --- a/configs/nitrogen6dl_defconfig +++ b/configs/nitrogen6dl_defconfig @@ -58,7 +58,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FEC" CONFIG_NETCONSOLE=y -CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig index 14b80c0f2d3..dd513faddca 100644 --- a/configs/nitrogen6q2g_defconfig +++ b/configs/nitrogen6q2g_defconfig @@ -59,7 +59,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FEC" CONFIG_NETCONSOLE=y -CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y CONFIG_LBA48=y diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig index 90566f11926..9e4374cae00 100644 --- a/configs/nitrogen6q_defconfig +++ b/configs/nitrogen6q_defconfig @@ -59,7 +59,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FEC" CONFIG_NETCONSOLE=y -CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y CONFIG_LBA48=y diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig index 59753b68f23..aa28beee345 100644 --- a/configs/nitrogen6s1g_defconfig +++ b/configs/nitrogen6s1g_defconfig @@ -58,7 +58,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FEC" CONFIG_NETCONSOLE=y -CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig index 2a21a207129..d98c213652d 100644 --- a/configs/nitrogen6s_defconfig +++ b/configs/nitrogen6s_defconfig @@ -58,7 +58,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FEC" CONFIG_NETCONSOLE=y -CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 diff --git a/configs/nokia_rx51_defconfig b/configs/nokia_rx51_defconfig index 6629137d004..d24a8e7c1fa 100644 --- a/configs/nokia_rx51_defconfig +++ b/configs/nokia_rx51_defconfig @@ -50,7 +50,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=onenand:128k(bootloader)ro,384k(config),256k(l CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set -CONFIG_DM=y # CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set # CONFIG_DM_SEQ_ALIAS is not set diff --git a/configs/novena_defconfig b/configs/novena_defconfig index d4ab93850c4..7e336147f8e 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -60,14 +60,12 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="fitImage" CONFIG_VERSION_VARIABLE=y CONFIG_NETCONSOLE=y -CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y CONFIG_LBA48=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MXC=y -CONFIG_KEYBOARD=y CONFIG_FSL_USDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig index 5d8777ee768..1c98b3dac96 100644 --- a/configs/nsa310s_defconfig +++ b/configs/nsa310s_defconfig @@ -43,7 +43,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y -CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 CONFIG_LBA48=y diff --git a/configs/oceanic_5205_5inmfd_defconfig b/configs/oceanic_5205_5inmfd_defconfig index 1cd8e9f2b68..7ce63ba665d 100644 --- a/configs/oceanic_5205_5inmfd_defconfig +++ b/configs/oceanic_5205_5inmfd_defconfig @@ -10,9 +10,6 @@ CONFIG_DRAM_ZQ=3881949 CONFIG_MMC0_CD_PIN="" CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x54000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_SPI=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/omap4_panda_defconfig b/configs/omap4_panda_defconfig index 814953fae64..2c4e26c290a 100644 --- a/configs/omap4_panda_defconfig +++ b/configs/omap4_panda_defconfig @@ -42,7 +42,6 @@ CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y -CONFIG_DM=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_MMC_OMAP_HS=y diff --git a/configs/omap4_sdp4430_defconfig b/configs/omap4_sdp4430_defconfig index a2645b98197..2315a84285e 100644 --- a/configs/omap4_sdp4430_defconfig +++ b/configs/omap4_sdp4430_defconfig @@ -39,7 +39,6 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_VERSION_VARIABLE=y -CONFIG_DM=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_MMC_OMAP_HS=y diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig index e471a6eeac0..bd0ede759cb 100644 --- a/configs/omap5_uevm_defconfig +++ b/configs/omap5_uevm_defconfig @@ -44,7 +44,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y -CONFIG_DM=y CONFIG_SCSI_AHCI=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index cc33fb91b77..a7918aaa0b0 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -73,7 +73,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_DA8XX_GPIO=y diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig index ba5d3a6bfc3..a67bf38acc1 100644 --- a/configs/openrd_base_defconfig +++ b/configs/openrd_base_defconfig @@ -49,7 +49,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y -CONFIG_DM=y CONFIG_SYS_ATA_STRIDE=4 CONFIG_SYS_ATA_DATA_OFFSET=0x100 CONFIG_SYS_ATA_REG_OFFSET=0x100 diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig index 0ee6ce3a65e..8f0d6bdb56d 100644 --- a/configs/openrd_client_defconfig +++ b/configs/openrd_client_defconfig @@ -50,7 +50,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y -CONFIG_DM=y CONFIG_SYS_ATA_STRIDE=4 CONFIG_SYS_ATA_DATA_OFFSET=0x100 CONFIG_SYS_ATA_REG_OFFSET=0x100 diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig index f7e8a3ee4e7..a169b5f6592 100644 --- a/configs/openrd_ultimate_defconfig +++ b/configs/openrd_ultimate_defconfig @@ -50,7 +50,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y -CONFIG_DM=y CONFIG_SYS_ATA_STRIDE=4 CONFIG_SYS_ATA_DATA_OFFSET=0x100 CONFIG_SYS_ATA_REG_OFFSET=0x100 diff --git a/configs/orangepi_2_defconfig b/configs/orangepi_2_defconfig index e18b8610847..7aaa5190b3a 100644 --- a/configs/orangepi_2_defconfig +++ b/configs/orangepi_2_defconfig @@ -7,9 +7,7 @@ CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 CONFIG_USB1_VBUS_PIN="PG13" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_3_defconfig b/configs/orangepi_3_defconfig index dbca66d1429..ebecf49ebda 100644 --- a/configs/orangepi_3_defconfig +++ b/configs/orangepi_3_defconfig @@ -8,9 +8,6 @@ CONFIG_MMC0_CD_PIN="PF6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_BLUETOOTH_DT_DEVICE_FIXUP="brcm,bcm4345c5" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x118000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_PHY_SUN50I_USB3=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y diff --git a/configs/orangepi_lite2_defconfig b/configs/orangepi_lite2_defconfig index 14c88062812..75c97d6b897 100644 --- a/configs/orangepi_lite2_defconfig +++ b/configs/orangepi_lite2_defconfig @@ -7,8 +7,5 @@ CONFIG_SUNXI_DRAM_H6_LPDDR3=y CONFIG_MMC0_CD_PIN="PF6" # CONFIG_PSCI_RESET is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x118000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_lite_defconfig b/configs/orangepi_lite_defconfig index c7174170dbf..96bbd1bab6f 100644 --- a/configs/orangepi_lite_defconfig +++ b/configs/orangepi_lite_defconfig @@ -5,7 +5,5 @@ CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_one_defconfig b/configs/orangepi_one_defconfig index 112ff5e5b6a..1064b4a39de 100644 --- a/configs/orangepi_one_defconfig +++ b/configs/orangepi_one_defconfig @@ -5,8 +5,6 @@ CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_one_plus_defconfig b/configs/orangepi_one_plus_defconfig index a4336332fc7..55a8b003fb5 100644 --- a/configs/orangepi_one_plus_defconfig +++ b/configs/orangepi_one_plus_defconfig @@ -7,8 +7,5 @@ CONFIG_SUNXI_DRAM_H6_LPDDR3=y CONFIG_MMC0_CD_PIN="PF6" # CONFIG_PSCI_RESET is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x118000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig index d0cad2a7461..777af8c60ea 100644 --- a/configs/orangepi_pc2_defconfig +++ b/configs/orangepi_pc2_defconfig @@ -8,10 +8,7 @@ CONFIG_DRAM_ZQ=3881977 CONFIG_MACPWR="PD6" CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x54000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/orangepi_pc_defconfig b/configs/orangepi_pc_defconfig index 28107ad5f7a..905ff7b1271 100644 --- a/configs/orangepi_pc_defconfig +++ b/configs/orangepi_pc_defconfig @@ -5,9 +5,7 @@ CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=624 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_pc_plus_defconfig b/configs/orangepi_pc_plus_defconfig index 30638679bc6..f845138153d 100644 --- a/configs/orangepi_pc_plus_defconfig +++ b/configs/orangepi_pc_plus_defconfig @@ -6,9 +6,7 @@ CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=624 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_plus2e_defconfig b/configs/orangepi_plus2e_defconfig index 85b25ddd167..138a6a72b8c 100644 --- a/configs/orangepi_plus2e_defconfig +++ b/configs/orangepi_plus2e_defconfig @@ -7,9 +7,7 @@ CONFIG_DRAM_CLK=672 CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_plus_defconfig b/configs/orangepi_plus_defconfig index dff0a2fd6e9..76de72aa228 100644 --- a/configs/orangepi_plus_defconfig +++ b/configs/orangepi_plus_defconfig @@ -9,9 +9,7 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB1_VBUS_PIN="PG13" CONFIG_SATAPWR="PG11" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_prime_defconfig b/configs/orangepi_prime_defconfig index 690a5f195b6..95a82e20f3e 100644 --- a/configs/orangepi_prime_defconfig +++ b/configs/orangepi_prime_defconfig @@ -7,9 +7,6 @@ CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881977 # CONFIG_DRAM_ODT_EN is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x54000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_r1_defconfig b/configs/orangepi_r1_defconfig index e15069c048e..4496aa4a45c 100644 --- a/configs/orangepi_r1_defconfig +++ b/configs/orangepi_r1_defconfig @@ -8,8 +8,6 @@ CONFIG_DRAM_CLK=624 CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_SPI_FLASH_WINBOND=y CONFIG_SUN8I_EMAC=y CONFIG_SPI=y diff --git a/configs/orangepi_win_defconfig b/configs/orangepi_win_defconfig index 7a9ca8e88a8..3b78ad7e52d 100644 --- a/configs/orangepi_win_defconfig +++ b/configs/orangepi_win_defconfig @@ -7,9 +7,6 @@ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_MACPWR="PD14" CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x54000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_REALTEK=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_zero2_defconfig b/configs/orangepi_zero2_defconfig index cad7a7bb064..ceef51b3db6 100644 --- a/configs/orangepi_zero2_defconfig +++ b/configs/orangepi_zero2_defconfig @@ -9,12 +9,9 @@ CONFIG_DRAM_SUN50I_H616_WRITE_TRAINING=y CONFIG_MACH_SUN50I_H616=y CONFIG_MMC0_CD_PIN="PF6" CONFIG_R_I2C_ENABLE=y +CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_MAX_SIZE=0xbfa0 -CONFIG_SPL_STACK=0x58000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/orangepi_zero_defconfig b/configs/orangepi_zero_defconfig index b6de0b9aa26..f7f3bfbcc41 100644 --- a/configs/orangepi_zero_defconfig +++ b/configs/orangepi_zero_defconfig @@ -8,8 +8,6 @@ CONFIG_DRAM_CLK=624 CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SUN8I_EMAC=y diff --git a/configs/orangepi_zero_plus2_defconfig b/configs/orangepi_zero_plus2_defconfig index 02f70ccf0c0..9583d24c8d6 100644 --- a/configs/orangepi_zero_plus2_defconfig +++ b/configs/orangepi_zero_plus2_defconfig @@ -9,9 +9,6 @@ CONFIG_DRAM_ZQ=3881977 CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x54000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_zero_plus2_h3_defconfig b/configs/orangepi_zero_plus2_h3_defconfig index b2d4f3f8e07..55a251374a1 100644 --- a/configs/orangepi_zero_plus2_h3_defconfig +++ b/configs/orangepi_zero_plus2_h3_defconfig @@ -8,8 +8,6 @@ CONFIG_DRAM_CLK=672 CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/orangepi_zero_plus_defconfig b/configs/orangepi_zero_plus_defconfig index 15520955f5e..f3ecf35eee1 100644 --- a/configs/orangepi_zero_plus_defconfig +++ b/configs/orangepi_zero_plus_defconfig @@ -7,9 +7,6 @@ CONFIG_DRAM_CLK=624 CONFIG_DRAM_ZQ=3881977 # CONFIG_DRAM_ODT_EN is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x54000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/parrot_r16_defconfig b/configs/parrot_r16_defconfig index 14e9b455feb..d56c4504b6a 100644 --- a/configs/parrot_r16_defconfig +++ b/configs/parrot_r16_defconfig @@ -11,8 +11,6 @@ CONFIG_USB0_ID_DET="PD10" CONFIG_USB1_VBUS_PIN="PD12" CONFIG_AXP_GPIO=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_CONS_INDEX=5 CONFIG_USB_EHCI_HCD=y diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig index a74b9378755..17f06e56c0e 100644 --- a/configs/pcm052_defconfig +++ b/configs/pcm052_defconfig @@ -43,7 +43,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_VYBRID_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig index aa4deac3df3..73ae5290edb 100644 --- a/configs/pg_wcom_expu1_defconfig +++ b/configs/pg_wcom_expu1_defconfig @@ -68,7 +68,6 @@ CONFIG_ENV_ADDR_REDUND=0x60040000 CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="ethernet@2d90000" CONFIG_VERSION_VARIABLE=y -CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_DDR_CLK_FREQ=50000000 diff --git a/configs/pg_wcom_expu1_update_defconfig b/configs/pg_wcom_expu1_update_defconfig index ba82a4f0d0f..3473457fd6c 100644 --- a/configs/pg_wcom_expu1_update_defconfig +++ b/configs/pg_wcom_expu1_update_defconfig @@ -66,7 +66,6 @@ CONFIG_ENV_ADDR_REDUND=0x60200000 CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="ethernet@2d90000" CONFIG_VERSION_VARIABLE=y -CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_DDR_CLK_FREQ=50000000 diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig index c1b60aa5166..f926cdcf039 100644 --- a/configs/pg_wcom_seli8_defconfig +++ b/configs/pg_wcom_seli8_defconfig @@ -68,7 +68,6 @@ CONFIG_ENV_ADDR_REDUND=0x60040000 CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="ethernet@2d90000" CONFIG_VERSION_VARIABLE=y -CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_DDR_CLK_FREQ=50000000 diff --git a/configs/pg_wcom_seli8_update_defconfig b/configs/pg_wcom_seli8_update_defconfig index 5aef18d5866..c7329f17a1b 100644 --- a/configs/pg_wcom_seli8_update_defconfig +++ b/configs/pg_wcom_seli8_update_defconfig @@ -66,7 +66,6 @@ CONFIG_ENV_ADDR_REDUND=0x60200000 CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="ethernet@2d90000" CONFIG_VERSION_VARIABLE=y -CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_DDR_CLK_FREQ=50000000 diff --git a/configs/pine64-lts_defconfig b/configs/pine64-lts_defconfig index 3f9ea1e329f..7e7c2d79104 100644 --- a/configs/pine64-lts_defconfig +++ b/configs/pine64-lts_defconfig @@ -10,9 +10,6 @@ CONFIG_MMC0_CD_PIN="" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x54000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SUN8I_EMAC=y diff --git a/configs/pine64_plus_defconfig b/configs/pine64_plus_defconfig index 62608f93bdb..f42f4e5923a 100644 --- a/configs/pine64_plus_defconfig +++ b/configs/pine64_plus_defconfig @@ -6,9 +6,6 @@ CONFIG_MACH_SUN50I=y CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y CONFIG_PINE64_DT_SELECTION=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x54000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_OF_LIST="sun50i-a64-pine64 sun50i-a64-pine64-plus" CONFIG_PHY_REALTEK=y CONFIG_SUN8I_EMAC=y diff --git a/configs/pine_h64_defconfig b/configs/pine_h64_defconfig index 2f511c80517..09a4275f0e7 100644 --- a/configs/pine_h64_defconfig +++ b/configs/pine_h64_defconfig @@ -11,9 +11,6 @@ CONFIG_USB3_VBUS_PIN="PL5" CONFIG_SPL_SPI_SUNXI=y # CONFIG_PSCI_RESET is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x118000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SUN8I_EMAC=y diff --git a/configs/pinebook_defconfig b/configs/pinebook_defconfig index 982f68143b9..26918dd3875 100644 --- a/configs/pinebook_defconfig +++ b/configs/pinebook_defconfig @@ -8,9 +8,6 @@ CONFIG_DRAM_CLK=552 CONFIG_DRAM_ZQ=3881949 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_R_I2C_ENABLE=y -CONFIG_SPL_STACK=0x54000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_DM_REGULATOR_FIXED=y diff --git a/configs/pinecube_defconfig b/configs/pinecube_defconfig index 531cf0f83b6..28e347b4d95 100644 --- a/configs/pinecube_defconfig +++ b/configs/pinecube_defconfig @@ -8,9 +8,7 @@ CONFIG_DRAM_CLK=504 CONFIG_DRAM_ODT_EN=y CONFIG_I2C0_ENABLE=y # CONFIG_HAS_ARMV7_SECURE_BASE is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f diff --git a/configs/pinephone_defconfig b/configs/pinephone_defconfig index 905b47d29e6..9d39204a439 100644 --- a/configs/pinephone_defconfig +++ b/configs/pinephone_defconfig @@ -10,9 +10,6 @@ CONFIG_DRAM_ZQ=3881949 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_PINEPHONE_DT_SELECTION=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x54000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_OF_LIST="sun50i-a64-pinephone-1.1 sun50i-a64-pinephone-1.2" CONFIG_LED_STATUS=y CONFIG_LED_STATUS_GPIO=y diff --git a/configs/pinetab_defconfig b/configs/pinetab_defconfig index e20d20a2fd5..0cc24146b39 100644 --- a/configs/pinetab_defconfig +++ b/configs/pinetab_defconfig @@ -8,6 +8,3 @@ CONFIG_DRAM_CLK=552 CONFIG_DRAM_ZQ=3881949 CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x54000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 diff --git a/configs/pm9261_defconfig b/configs/pm9261_defconfig index cd73fe41f98..0e9cb5d0369 100644 --- a/configs/pm9261_defconfig +++ b/configs/pm9261_defconfig @@ -38,7 +38,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y # CONFIG_NET is not set -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig index 67fb1b94831..2a16c833aec 100644 --- a/configs/pm9263_defconfig +++ b/configs/pm9263_defconfig @@ -42,7 +42,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=physmap-flash.0:256k(u-boot)ro,64k(u-boot-env) CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/pm9g45_defconfig b/configs/pm9g45_defconfig index 015fa5c4122..436bfc6109f 100644 --- a/configs/pm9g45_defconfig +++ b/configs/pm9g45_defconfig @@ -47,7 +47,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig index 6adb230e297..3ca31546ad6 100644 --- a/configs/pogo_e02_defconfig +++ b/configs/pogo_e02_defconfig @@ -49,7 +49,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y -CONFIG_DM=y # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/pogo_v4_defconfig b/configs/pogo_v4_defconfig index f402ae67ffb..49b7353ab65 100644 --- a/configs/pogo_v4_defconfig +++ b/configs/pogo_v4_defconfig @@ -57,7 +57,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y -CONFIG_DM=y # CONFIG_DM_WARN is not set CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 diff --git a/configs/polaroid_mid2407pxe03_defconfig b/configs/polaroid_mid2407pxe03_defconfig index 74ffaf1d011..17fffeb1e26 100644 --- a/configs/polaroid_mid2407pxe03_defconfig +++ b/configs/polaroid_mid2407pxe03_defconfig @@ -16,8 +16,6 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 CONFIG_USB_MUSB_HOST=y diff --git a/configs/polaroid_mid2809pxe04_defconfig b/configs/polaroid_mid2809pxe04_defconfig index 10057ade9a5..e542b711132 100644 --- a/configs/polaroid_mid2809pxe04_defconfig +++ b/configs/polaroid_mid2809pxe04_defconfig @@ -16,8 +16,6 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 CONFIG_USB_MUSB_HOST=y diff --git a/configs/pov_protab2_ips9_defconfig b/configs/pov_protab2_ips9_defconfig index 523de63fc27..a62c9f8fa37 100644 --- a/configs/pov_protab2_ips9_defconfig +++ b/configs/pov_protab2_ips9_defconfig @@ -14,9 +14,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index 6acc442ba84..34186d1caa6 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -7,9 +7,9 @@ CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma-haikou" -CONFIG_SPL_TEXT_BASE=0xff8c2000 CONFIG_ROCKCHIP_RK3399=y CONFIG_ROCKCHIP_BOOT_MODE_REG=0x0 +CONFIG_ROCKCHIP_SPI_IMAGE=y CONFIG_TARGET_PUMA_RK3399=y CONFIG_DEBUG_UART_BASE=0xFF180000 CONFIG_DEBUG_UART_CLOCK=24000000 @@ -31,12 +31,12 @@ CONFIG_SPL_BSS_MAX_SIZE=0x10000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0xff8effff CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 +CONFIG_TPL=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -51,13 +51,18 @@ CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_NOWHERE=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_GPIO_HOG=y +CONFIG_SPL_GPIO_HOG=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y @@ -80,10 +85,7 @@ CONFIG_PHY_ROCKCHIP_TYPEC=y CONFIG_DM_PMIC_FAN53555=y CONFIG_PMIC_RK8XX=y CONFIG_SPL_PMIC_RK8XX=y -CONFIG_SPL_DM_REGULATOR=y CONFIG_REGULATOR_PWM=y -CONFIG_SPL_DM_REGULATOR_FIXED=y -CONFIG_DM_REGULATOR_GPIO=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_DM_RESET=y diff --git a/configs/q8_a13_tablet_defconfig b/configs/q8_a13_tablet_defconfig index 83981d3ac74..f269b8a5889 100644 --- a/configs/q8_a13_tablet_defconfig +++ b/configs/q8_a13_tablet_defconfig @@ -15,9 +15,7 @@ CONFIG_VIDEO_LCD_POWER="AXP0-0" CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/q8_a23_tablet_800x480_defconfig b/configs/q8_a23_tablet_800x480_defconfig index 11d208a34a0..dda1a0c51f6 100644 --- a/configs/q8_a23_tablet_800x480_defconfig +++ b/configs/q8_a23_tablet_800x480_defconfig @@ -16,8 +16,6 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 CONFIG_USB_MUSB_HOST=y diff --git a/configs/q8_a33_tablet_1024x600_defconfig b/configs/q8_a33_tablet_1024x600_defconfig index c848e62d73c..7925677d30e 100644 --- a/configs/q8_a33_tablet_1024x600_defconfig +++ b/configs/q8_a33_tablet_1024x600_defconfig @@ -16,8 +16,6 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 CONFIG_USB_MUSB_HOST=y diff --git a/configs/q8_a33_tablet_800x480_defconfig b/configs/q8_a33_tablet_800x480_defconfig index ee5654185b1..f3335f9d233 100644 --- a/configs/q8_a33_tablet_800x480_defconfig +++ b/configs/q8_a33_tablet_800x480_defconfig @@ -16,8 +16,6 @@ CONFIG_VIDEO_LCD_POWER="PH7" CONFIG_VIDEO_LCD_BL_EN="PH6" CONFIG_VIDEO_LCD_BL_PWM="PH0" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_AXP_DLDO1_VOLT=3300 CONFIG_CONS_INDEX=5 CONFIG_USB_MUSB_HOST=y diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig index f48564c3f51..4e2e77a1b6c 100644 --- a/configs/qemu-ppce500_defconfig +++ b/configs/qemu-ppce500_defconfig @@ -37,7 +37,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SIMPLE_BUS_CORRECT_RANGE=y CONFIG_LBA48=y CONFIG_CHIP_SELECTS_PER_CTRL=0 diff --git a/configs/r2dplus_defconfig b/configs/r2dplus_defconfig index ab4fcc6dddb..a89a07db2a2 100644 --- a/configs/r2dplus_defconfig +++ b/configs/r2dplus_defconfig @@ -32,7 +32,6 @@ CONFIG_DOS_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y -CONFIG_DM=y CONFIG_SYS_IDE_MAXBUS=1 CONFIG_SYS_IDE_MAXDEVICE=1 CONFIG_SYS_ATA_BASE_ADDR=0xb4000000 diff --git a/configs/r7-tv-dongle_defconfig b/configs/r7-tv-dongle_defconfig index f5adbd3686c..8875a09b2c9 100644 --- a/configs/r7-tv-dongle_defconfig +++ b/configs/r7-tv-dongle_defconfig @@ -6,9 +6,7 @@ CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=384 CONFIG_USB1_VBUS_PIN="PG13" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig index 512e9d15765..bd17c02b24a 100644 --- a/configs/riotboard_defconfig +++ b/configs/riotboard_defconfig @@ -49,7 +49,6 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=2 CONFIG_ARP_TIMEOUT=200 -CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/sam9x60_curiosity_mmc_defconfig b/configs/sam9x60_curiosity_mmc_defconfig index c8dffa85d16..f7ac3dfcc38 100644 --- a/configs/sam9x60_curiosity_mmc_defconfig +++ b/configs/sam9x60_curiosity_mmc_defconfig @@ -49,7 +49,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_CCF=y CONFIG_CLK_AT91=y diff --git a/configs/sam9x60ek_mmc_defconfig b/configs/sam9x60ek_mmc_defconfig index ed8281ccbd5..20b27649bfb 100644 --- a/configs/sam9x60ek_mmc_defconfig +++ b/configs/sam9x60ek_mmc_defconfig @@ -52,7 +52,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_CCF=y CONFIG_CLK_AT91=y diff --git a/configs/sam9x60ek_nandflash_defconfig b/configs/sam9x60ek_nandflash_defconfig index ed8f04f953d..8a7f2e06415 100644 --- a/configs/sam9x60ek_nandflash_defconfig +++ b/configs/sam9x60ek_nandflash_defconfig @@ -54,7 +54,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_CCF=y CONFIG_CLK_AT91=y diff --git a/configs/sam9x60ek_qspiflash_defconfig b/configs/sam9x60ek_qspiflash_defconfig index 607a88dece9..51449f02333 100644 --- a/configs/sam9x60ek_qspiflash_defconfig +++ b/configs/sam9x60ek_qspiflash_defconfig @@ -54,7 +54,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_CCF=y CONFIG_CLK_AT91=y diff --git a/configs/sama5d27_giantboard_defconfig b/configs/sama5d27_giantboard_defconfig index df5be2357ec..71187df16e6 100644 --- a/configs/sama5d27_giantboard_defconfig +++ b/configs/sama5d27_giantboard_defconfig @@ -63,7 +63,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" CONFIG_ENV_IS_IN_FAT=y # CONFIG_NET is not set -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_CLK=y diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig index 7d6e7472269..8b99f215fb1 100644 --- a/configs/sama5d27_som1_ek_mmc1_defconfig +++ b/configs/sama5d27_som1_ek_mmc1_defconfig @@ -66,7 +66,6 @@ CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_DEVICE_AND_PART="1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_CLK=y diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig index 84ab87f8b1b..55a26b5a2f9 100644 --- a/configs/sama5d27_som1_ek_mmc_defconfig +++ b/configs/sama5d27_som1_ek_mmc_defconfig @@ -66,7 +66,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" CONFIG_ENV_IS_IN_FAT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_CLK=y diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig b/configs/sama5d27_som1_ek_qspiflash_defconfig index ffe6563091f..f86a9cca574 100644 --- a/configs/sama5d27_som1_ek_qspiflash_defconfig +++ b/configs/sama5d27_som1_ek_qspiflash_defconfig @@ -65,7 +65,6 @@ CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_CLK=y diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig index 370fd190b24..3bb3cf43a95 100644 --- a/configs/sama5d27_wlsom1_ek_mmc_defconfig +++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig @@ -68,7 +68,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" CONFIG_ENV_IS_IN_FAT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_CLK=y diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig index d6f8c165232..d2bb74811ab 100644 --- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig +++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig @@ -72,7 +72,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_CLK=y diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig index d61bbb8ef17..77bdb6d67f2 100644 --- a/configs/sama5d2_icp_mmc_defconfig +++ b/configs/sama5d2_icp_mmc_defconfig @@ -69,7 +69,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" CONFIG_ENV_IS_IN_FAT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_CLK=y diff --git a/configs/sama5d2_icp_qspiflash_defconfig b/configs/sama5d2_icp_qspiflash_defconfig index 4a9bd54375c..a8884b0b5d9 100644 --- a/configs/sama5d2_icp_qspiflash_defconfig +++ b/configs/sama5d2_icp_qspiflash_defconfig @@ -57,7 +57,6 @@ CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_UTMI=y diff --git a/configs/sama5d2_ptc_ek_mmc_defconfig b/configs/sama5d2_ptc_ek_mmc_defconfig index 1b168ab1a3e..d611f840a1b 100644 --- a/configs/sama5d2_ptc_ek_mmc_defconfig +++ b/configs/sama5d2_ptc_ek_mmc_defconfig @@ -48,7 +48,6 @@ CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_FAT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_UTMI=y diff --git a/configs/sama5d2_ptc_ek_nandflash_defconfig b/configs/sama5d2_ptc_ek_nandflash_defconfig index 7077bfba9c9..85a8baafa42 100644 --- a/configs/sama5d2_ptc_ek_nandflash_defconfig +++ b/configs/sama5d2_ptc_ek_nandflash_defconfig @@ -49,7 +49,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_UTMI=y diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig index 666fa6c8703..b27379c8f70 100644 --- a/configs/sama5d2_xplained_emmc_defconfig +++ b/configs/sama5d2_xplained_emmc_defconfig @@ -65,7 +65,6 @@ CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_CLK=y diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig index 4e31813aa7d..f63156d909c 100644 --- a/configs/sama5d2_xplained_mmc_defconfig +++ b/configs/sama5d2_xplained_mmc_defconfig @@ -67,7 +67,6 @@ CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_DEVICE_AND_PART="1:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_CLK=y diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig index bbc6e4b83e7..9526465bf90 100644 --- a/configs/sama5d2_xplained_qspiflash_defconfig +++ b/configs/sama5d2_xplained_qspiflash_defconfig @@ -67,7 +67,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_CLK=y diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index 350e401048a..fabd4ecea7c 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -71,7 +71,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_CLK=y diff --git a/configs/sama5d36ek_cmp_mmc_defconfig b/configs/sama5d36ek_cmp_mmc_defconfig index 023adb32fbc..b3e6b539038 100644 --- a/configs/sama5d36ek_cmp_mmc_defconfig +++ b/configs/sama5d36ek_cmp_mmc_defconfig @@ -44,7 +44,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_FAT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_H32MX=y diff --git a/configs/sama5d36ek_cmp_nandflash_defconfig b/configs/sama5d36ek_cmp_nandflash_defconfig index 0e304aa7fd0..a9632a198fb 100644 --- a/configs/sama5d36ek_cmp_nandflash_defconfig +++ b/configs/sama5d36ek_cmp_nandflash_defconfig @@ -45,7 +45,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_H32MX=y diff --git a/configs/sama5d36ek_cmp_spiflash_defconfig b/configs/sama5d36ek_cmp_spiflash_defconfig index c956a7187a0..5f5caf932a4 100644 --- a/configs/sama5d36ek_cmp_spiflash_defconfig +++ b/configs/sama5d36ek_cmp_spiflash_defconfig @@ -46,7 +46,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_H32MX=y diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig index e2be9c26b13..834dcc1b824 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -69,7 +69,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" CONFIG_ENV_IS_IN_FAT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_CLK=y diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index 2ea43620606..93497500bd2 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -69,7 +69,6 @@ CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_CLK=y diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig index 4e4638aa539..fce358c6c33 100644 --- a/configs/sama5d3xek_mmc_defconfig +++ b/configs/sama5d3xek_mmc_defconfig @@ -68,7 +68,6 @@ CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" CONFIG_ENV_IS_IN_FAT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_CLK=y diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index c050f77ea9e..9a4c1d846d5 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -67,7 +67,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_CLK=y diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index c9c2f77f2ab..9595c06b79c 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -69,7 +69,6 @@ CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_CLK=y diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig index 8cae9a32800..0cbdfb9939d 100644 --- a/configs/sama5d4_xplained_mmc_defconfig +++ b/configs/sama5d4_xplained_mmc_defconfig @@ -63,7 +63,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dma-names dmas" CONFIG_ENV_IS_IN_FAT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_CLK=y CONFIG_SPL_CLK=y diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig index bec2b664270..2e0e06c5f2d 100644 --- a/configs/sama5d4_xplained_nandflash_defconfig +++ b/configs/sama5d4_xplained_nandflash_defconfig @@ -64,7 +64,6 @@ CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dma-names dmas" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_CLK=y CONFIG_SPL_CLK=y diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig index 5d0e8afa275..3c2c9d69d71 100644 --- a/configs/sama5d4_xplained_spiflash_defconfig +++ b/configs/sama5d4_xplained_spiflash_defconfig @@ -68,7 +68,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dma-names dmas" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_CLK=y diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig index f639aa0e6c5..23336c56547 100644 --- a/configs/sama5d4ek_mmc_defconfig +++ b/configs/sama5d4ek_mmc_defconfig @@ -63,7 +63,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dma-names dmas" CONFIG_ENV_IS_IN_FAT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_CLK=y diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig index 175512b2ad2..0b4a2c6baad 100644 --- a/configs/sama5d4ek_nandflash_defconfig +++ b/configs/sama5d4ek_nandflash_defconfig @@ -64,7 +64,6 @@ CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dma-names dmas" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_CLK=y diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig index d014f88d71f..cca6c471c7b 100644 --- a/configs/sama5d4ek_spiflash_defconfig +++ b/configs/sama5d4ek_spiflash_defconfig @@ -66,7 +66,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dma-names dmas" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_CLK=y diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig index 0aa434b7a74..444fbadc3d5 100644 --- a/configs/sama7g5ek_mmc1_defconfig +++ b/configs/sama7g5ek_mmc1_defconfig @@ -51,7 +51,6 @@ CONFIG_ENV_FAT_DEVICE_AND_PART="1:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ARP_TIMEOUT=200 CONFIG_NET_RETRY_COUNT=50 -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_CCF=y CONFIG_CLK_AT91=y diff --git a/configs/sama7g5ek_mmc_defconfig b/configs/sama7g5ek_mmc_defconfig index 92fdd5a7bdb..9aad9ce151e 100644 --- a/configs/sama7g5ek_mmc_defconfig +++ b/configs/sama7g5ek_mmc_defconfig @@ -51,7 +51,6 @@ CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ARP_TIMEOUT=200 CONFIG_NET_RETRY_COUNT=50 -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_CCF=y CONFIG_CLK_AT91=y diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index ade1505439f..48a7fd2bc22 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -22,12 +22,12 @@ CONFIG_CONSOLE_RECORD=y CONFIG_CONSOLE_RECORD_OUT_SIZE=0x1000 CONFIG_PRE_CONSOLE_BUFFER=y CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_CMD_CAT=y CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_BOOTEFI_HELLO=y # CONFIG_CMD_ELF is not set +CONFIG_CMD_XXD=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_ERASEENV=y @@ -55,7 +55,7 @@ CONFIG_CMD_READ=y CONFIG_CMD_REMOTEPROC=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y -CONFIG_CMD_XXD=y +CONFIG_CMD_CAT=y CONFIG_BOOTP_DNS2=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_TFTPSRV=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index 1f821cd4721..e18e666f126 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -36,7 +36,6 @@ CONFIG_LOG_DEFAULT_LEVEL=6 CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_STACKPROTECTOR=y CONFIG_ANDROID_AB=y -CONFIG_CMD_CAT=y CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y CONFIG_CMD_BOOTM_PRE_LOAD=y @@ -45,6 +44,7 @@ CONFIG_CMD_BOOTEFI_HELLO=y CONFIG_CMD_BOOTMENU=y CONFIG_CMD_ABOOTIMG=y # CONFIG_CMD_ELF is not set +CONFIG_CMD_XXD=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_ERASEENV=y @@ -61,7 +61,6 @@ CONFIG_CMD_MEM_SEARCH=y CONFIG_CMD_MX_CYCLIC=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_UNZIP=y -CONFIG_CMD_XXD=y CONFIG_CMD_BIND=y CONFIG_CMD_DEMO=y CONFIG_CMD_GPIO=y @@ -82,6 +81,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_TEMPERATURE=y CONFIG_CMD_USB=y CONFIG_CMD_AXI=y +CONFIG_CMD_CAT=y CONFIG_CMD_SETEXPR_FMT=y CONFIG_CMD_AB_SELECT=y CONFIG_BOOTP_DNS2=y diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig index 6d1e59ef250..14070342977 100644 --- a/configs/sheevaplug_defconfig +++ b/configs/sheevaplug_defconfig @@ -53,7 +53,6 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y -CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_LBA48=y diff --git a/configs/smdk5250_defconfig b/configs/smdk5250_defconfig index 263fcee706f..fbc4a9244f6 100644 --- a/configs/smdk5250_defconfig +++ b/configs/smdk5250_defconfig @@ -48,7 +48,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_BUS=1 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_I2C_S3C24X0=y -# CONFIG_KEYBOARD is not set CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_DW=y CONFIG_MMC_SDHCI=y diff --git a/configs/smdk5420_defconfig b/configs/smdk5420_defconfig index 3a22f6b26fa..23aa15236cb 100644 --- a/configs/smdk5420_defconfig +++ b/configs/smdk5420_defconfig @@ -43,7 +43,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_BUS=1 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_I2C_S3C24X0=y -# CONFIG_KEYBOARD is not set CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_DW=y CONFIG_MMC_SDHCI=y diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig index 251586178ec..bb73f28b36b 100644 --- a/configs/socrates_defconfig +++ b/configs/socrates_defconfig @@ -52,7 +52,6 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR_REDUND=0xFFF20000 CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="TSEC0" -CONFIG_DM=y CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFE001001 diff --git a/configs/sopine_baseboard_defconfig b/configs/sopine_baseboard_defconfig index 55116f72d0d..fbbef7a9f9a 100644 --- a/configs/sopine_baseboard_defconfig +++ b/configs/sopine_baseboard_defconfig @@ -11,9 +11,6 @@ CONFIG_MMC0_CD_PIN="" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x54000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SUN8I_EMAC=y diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 67e238af3a1..3ba396b9671 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -166,6 +166,5 @@ CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_FAT_WRITE=y # CONFIG_BINMAN_FDT is not set -CONFIG_LZO=y CONFIG_FDT_FIXUP_PARTITIONS=y # CONFIG_EFI_LOADER is not set diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index a630713f926..ddd96ac4d29 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -165,6 +165,5 @@ CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_FAT_WRITE=y # CONFIG_BINMAN_FDT is not set -CONFIG_LZO=y CONFIG_FDT_FIXUP_PARTITIONS=y # CONFIG_EFI_LOADER is not set diff --git a/configs/sun8i_a23_evb_defconfig b/configs/sun8i_a23_evb_defconfig index 59315cdb05d..a3b1d76d8bb 100644 --- a/configs/sun8i_a23_evb_defconfig +++ b/configs/sun8i_a23_evb_defconfig @@ -9,8 +9,6 @@ CONFIG_USB0_VBUS_PIN="axp_drivebus" CONFIG_USB0_VBUS_DET="axp_vbus_detect" CONFIG_USB1_VBUS_PIN="PH7" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_CONS_INDEX=5 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/sunxi_Gemei_G9_defconfig b/configs/sunxi_Gemei_G9_defconfig index b77c4e7a3cb..3fee7c2e50c 100644 --- a/configs/sunxi_Gemei_G9_defconfig +++ b/configs/sunxi_Gemei_G9_defconfig @@ -11,9 +11,7 @@ CONFIG_VIDEO_LCD_BL_EN="PH7" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_VIDEO_LCD_PANEL_LVDS=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 CONFIG_SPL_I2C=y -CONFIG_SYS_PBSIZE=1024 CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=400000 diff --git a/configs/tanix_tx6_defconfig b/configs/tanix_tx6_defconfig index 84dbf106d49..0390347415c 100644 --- a/configs/tanix_tx6_defconfig +++ b/configs/tanix_tx6_defconfig @@ -8,6 +8,3 @@ CONFIG_DRAM_CLK=648 CONFIG_MMC0_CD_PIN="PF6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x118000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 20de590e276..9a6751bb1aa 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -68,7 +68,6 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=2 CONFIG_SYS_MMC_ENV_PART=1 -CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y CONFIG_LBA48=y diff --git a/configs/tbs_a711_defconfig b/configs/tbs_a711_defconfig index 3dd9252a742..b3c2e69d6cd 100644 --- a/configs/tbs_a711_defconfig +++ b/configs/tbs_a711_defconfig @@ -13,8 +13,6 @@ CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT" CONFIG_USB0_ID_DET="PH11" CONFIG_AXP_GPIO=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_AXP_DCDC5_VOLT=1200 CONFIG_USB_EHCI_HCD=y diff --git a/configs/ten64_tfa_defconfig b/configs/ten64_tfa_defconfig index 6c7314b6454..c90a560e326 100644 --- a/configs/ten64_tfa_defconfig +++ b/configs/ten64_tfa_defconfig @@ -54,7 +54,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_DM=y CONFIG_SCSI_AHCI=y CONFIG_AHCI_PCI=y CONFIG_GPIO_HOG=y diff --git a/configs/teres_i_defconfig b/configs/teres_i_defconfig index 6f202dc8a43..e7de85eb506 100644 --- a/configs/teres_i_defconfig +++ b/configs/teres_i_defconfig @@ -9,9 +9,6 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB1_VBUS_PIN="PL7" CONFIG_I2C0_ENABLE=y CONFIG_PREBOOT="setenv usb_pgood_delay 2000; usb start" -CONFIG_SPL_STACK=0x54000 -CONFIG_SYS_PBSIZE=1024 -CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_DM_REGULATOR_FIXED=y diff --git a/configs/thunderx_88xx_defconfig b/configs/thunderx_88xx_defconfig index 91dda7a4a35..49cdc9827f7 100644 --- a/configs/thunderx_88xx_defconfig +++ b/configs/thunderx_88xx_defconfig @@ -34,7 +34,6 @@ CONFIG_SYS_BOOTM_LEN=0x800000 # CONFIG_CMD_ENV_EXISTS is not set # CONFIG_CMD_NET is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y # CONFIG_MMC is not set CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_SKIP_INIT=y diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig index b8107c9bc06..47dbf342776 100644 --- a/configs/ti816x_evm_defconfig +++ b/configs/ti816x_evm_defconfig @@ -61,7 +61,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y -CONFIG_DM=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_OMAP24XX=y diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig index 13b0cd4030d..eadc9b600a0 100644 --- a/configs/udoo_defconfig +++ b/configs/udoo_defconfig @@ -41,7 +41,6 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=2 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y CONFIG_LBA48=y diff --git a/configs/usb_a9263_dataflash_defconfig b/configs/usb_a9263_dataflash_defconfig index 133a1298f2b..874c873358e 100644 --- a/configs/usb_a9263_dataflash_defconfig +++ b/configs/usb_a9263_dataflash_defconfig @@ -38,7 +38,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RETRY_COUNT=20 -CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y diff --git a/configs/usbarmory_defconfig b/configs/usbarmory_defconfig index e7f05627181..75d487f773b 100644 --- a/configs/usbarmory_defconfig +++ b/configs/usbarmory_defconfig @@ -27,7 +27,6 @@ CONFIG_CMD_USB=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MXC=y CONFIG_FSL_ESDHC_IMX=y diff --git a/configs/vexpress_ca9x4_defconfig b/configs/vexpress_ca9x4_defconfig index d5dde9ca943..72090deac87 100644 --- a/configs/vexpress_ca9x4_defconfig +++ b/configs/vexpress_ca9x4_defconfig @@ -37,7 +37,6 @@ CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y -CONFIG_DM=y CONFIG_CLK=y CONFIG_ARM_PL180_MMCI=y CONFIG_MTD=y diff --git a/configs/vf610twr_defconfig b/configs/vf610twr_defconfig index 998e3a279b8..072b7213256 100644 --- a/configs/vf610twr_defconfig +++ b/configs/vf610twr_defconfig @@ -46,7 +46,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_VYBRID_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MXC=y diff --git a/configs/vf610twr_nand_defconfig b/configs/vf610twr_nand_defconfig index 6aef103a0db..af54c4b4e3c 100644 --- a/configs/vf610twr_nand_defconfig +++ b/configs/vf610twr_nand_defconfig @@ -47,7 +47,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_ENV_RANGE=0x80000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_VYBRID_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MXC=y diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index 1d125d0d7bc..6b49b40fb7e 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -56,7 +56,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y CONFIG_LBA48=y diff --git a/configs/x96_mate_defconfig b/configs/x96_mate_defconfig new file mode 100644 index 00000000000..4276f4f543b --- /dev/null +++ b/configs/x96_mate_defconfig @@ -0,0 +1,15 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h616-x96-mate" +CONFIG_SPL=y +CONFIG_DRAM_SUN50I_H616_READ_CALIBRATION=y +CONFIG_MACH_SUN50I_H616=y +CONFIG_MMC0_CD_PIN="PF6" +CONFIG_R_I2C_ENABLE=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_I2C=y +CONFIG_SPL_SYS_I2C_LEGACY=y +CONFIG_SYS_I2C_MVTWSI=y +CONFIG_SYS_I2C_SLAVE=0x7f +CONFIG_SYS_I2C_SPEED=400000 +CONFIG_SUPPORT_EMMC_BOOT=y diff --git a/configs/xenguest_arm64_defconfig b/configs/xenguest_arm64_defconfig index 50a5a104616..40bb5b00293 100644 --- a/configs/xenguest_arm64_defconfig +++ b/configs/xenguest_arm64_defconfig @@ -39,7 +39,6 @@ CONFIG_CMD_PVBLOCK=y # CONFIG_CMD_SLEEP is not set CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y -CONFIG_DM=y # CONFIG_MMC is not set # CONFIG_REQUIRE_SERIAL_CONSOLE is not set CONFIG_DM_SERIAL=y diff --git a/configs/xtfpga_defconfig b/configs/xtfpga_defconfig index 65283140b7a..1242e350825 100644 --- a/configs/xtfpga_defconfig +++ b/configs/xtfpga_defconfig @@ -31,7 +31,6 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y -CONFIG_DM=y # CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set # CONFIG_DM_STDIO is not set diff --git a/configs/zeropi_defconfig b/configs/zeropi_defconfig index 7d45440c0cc..11f3715e6dc 100644 --- a/configs/zeropi_defconfig +++ b/configs/zeropi_defconfig @@ -8,8 +8,6 @@ CONFIG_MACPWR="PD6" # CONFIG_VIDEO_DE2 is not set # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_CONSOLE_MUX=y -CONFIG_SPL_STACK=0x8000 -CONFIG_SYS_PBSIZE=1024 CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/doc/develop/driver-model/migration.rst b/doc/develop/driver-model/migration.rst index 742fea5515c..645c45bc491 100644 --- a/doc/develop/driver-model/migration.rst +++ b/doc/develop/driver-model/migration.rst @@ -99,14 +99,6 @@ The I2C subsystem has supported the driver model since early 2015. Maintainers should submit patches switching over to using CONFIG_DM_I2C and other base driver model options in time for inclusion in the 2021.10 release. -CONFIG_KEYBOARD ---------------- -Deadline: 2022.10 - -This is a legacy option which has been replaced by driver model. -Maintainers should submit patches switching over to using CONFIG_DM_KEYBOARD and -other base driver model options in time for inclusion in the 2022.10 release. - CONFIG_SYS_TIMER_RATE and CONFIG_SYS_TIMER_COUNTER -------------------------------------------------- Deadline: 2023.01 diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c index b89c77bf794..2f9635524cf 100644 --- a/drivers/clk/clk-uclass.c +++ b/drivers/clk/clk-uclass.c @@ -505,7 +505,7 @@ struct clk *clk_get_parent(struct clk *clk) return pclk; } -long long clk_get_parent_rate(struct clk *clk) +ulong clk_get_parent_rate(struct clk *clk) { const struct clk_ops *ops; struct clk *pclk; @@ -544,6 +544,19 @@ ulong clk_round_rate(struct clk *clk, ulong rate) return ops->round_rate(clk, rate); } +static void clk_get_priv(struct clk *clk, struct clk **clkp) +{ + *clkp = clk; + + /* get private clock struct associated to the provided clock */ + if (CONFIG_IS_ENABLED(CLK_CCF)) { + /* Take id 0 as a non-valid clk, such as dummy */ + if (clk->id) + clk_get_by_id(clk->id, clkp); + } +} + +/* clean cache, called with private clock struct */ static void clk_clean_rate_cache(struct clk *clk) { struct udevice *child_dev; @@ -563,6 +576,7 @@ static void clk_clean_rate_cache(struct clk *clk) ulong clk_set_rate(struct clk *clk, ulong rate) { const struct clk_ops *ops; + struct clk *clkp; debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate); if (!clk_valid(clk)) @@ -572,8 +586,10 @@ ulong clk_set_rate(struct clk *clk, ulong rate) if (!ops->set_rate) return -ENOSYS; + /* get private clock struct used for cache */ + clk_get_priv(clk, &clkp); /* Clean up cached rates for us and all child clocks */ - clk_clean_rate_cache(clk); + clk_clean_rate_cache(clkp); return ops->set_rate(clk, rate); } diff --git a/drivers/clk/clk_k210.c b/drivers/clk/clk_k210.c index 1961efaa5e7..f7d36963f85 100644 --- a/drivers/clk/clk_k210.c +++ b/drivers/clk/clk_k210.c @@ -846,7 +846,7 @@ again: error = DIV_ROUND_CLOSEST_ULL(f * inv_ratio, r * od); /* The lower 16 bits are spurious */ - error = abs((error - BIT(32))) >> 16; + error = abs64((error - BIT_ULL(32))) >> 16; if (error < best_error) { best->r = r; diff --git a/drivers/clk/rockchip/clk_pll.c b/drivers/clk/rockchip/clk_pll.c index 8d2aaf5b843..09b97cf57a2 100644 --- a/drivers/clk/rockchip/clk_pll.c +++ b/drivers/clk/rockchip/clk_pll.c @@ -31,7 +31,7 @@ static struct rockchip_pll_rate_table rockchip_auto_table; #define RK3036_PLLCON1_DSMPD_SHIFT 12 #define RK3036_PLLCON2_FRAC_MASK 0xffffff #define RK3036_PLLCON2_FRAC_SHIFT 0 -#define RK3036_PLLCON1_PWRDOWN_SHIT 13 +#define RK3036_PLLCON1_PWRDOWN_SHIFT 13 #define MHZ 1000000 #define KHZ 1000 @@ -207,7 +207,7 @@ static int rk3036_pll_set_rate(struct rockchip_pll_clock *pll, /* Power down */ rk_setreg(base + pll->con_offset + 0x4, - 1 << RK3036_PLLCON1_PWRDOWN_SHIT); + 1 << RK3036_PLLCON1_PWRDOWN_SHIFT); rk_clrsetreg(base + pll->con_offset, (RK3036_PLLCON0_POSTDIV1_MASK | @@ -231,7 +231,7 @@ static int rk3036_pll_set_rate(struct rockchip_pll_clock *pll, /* Power Up */ rk_clrreg(base + pll->con_offset + 0x4, - 1 << RK3036_PLLCON1_PWRDOWN_SHIT); + 1 << RK3036_PLLCON1_PWRDOWN_SHIFT); /* waiting for pll lock */ while (!(readl(base + pll->con_offset + 0x4) & (1 << pll->lock_shift))) diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index 97bf1c6e15b..eaeac451df4 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -856,7 +856,7 @@ static ulong rk3399_ddr_set_clk(struct rockchip_cru *cru, switch (set_rate) { case 50 * MHz: dpll_cfg = (struct pll_div) - {.refdiv = 1, .fbdiv = 12, .postdiv1 = 3, .postdiv2 = 2}; + {.refdiv = 2, .fbdiv = 75, .postdiv1 = 3, .postdiv2 = 6}; break; case 200 * MHz: dpll_cfg = (struct pll_div) diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig index c9bf5de4332..0dc442b921c 100644 --- a/drivers/core/Kconfig +++ b/drivers/core/Kconfig @@ -1,7 +1,7 @@ menu "Generic Driver Options" config DM - bool "Enable Driver Model" + def_bool y help This config option enables Driver Model. This brings in the core support, including scanning of platform data on start-up. If diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 2a60478b476..220e2cb1628 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -611,4 +611,10 @@ config FTGPIO010 help Support for GPIOs on Faraday Technology's FTGPIO010 controller. +config ADP5585_GPIO + bool "ADP5585 GPIO driver" + depends on DM_GPIO && DM_I2C + help + Support ADP5585 GPIO expander. + endif diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index eee7908871d..7235714fcc0 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -76,3 +76,4 @@ obj-$(CONFIG_ZYNQMP_GPIO_MODEPIN) += zynqmp_gpio_modepin.o obj-$(CONFIG_SLG7XL45106_I2C_GPO) += gpio_slg7xl45106.o obj-$(CONFIG_$(SPL_TPL_)TURRIS_OMNIA_MCU) += turris_omnia_mcu.o obj-$(CONFIG_FTGPIO010) += ftgpio010.o +obj-$(CONFIG_ADP5585_GPIO) += adp5585_gpio.o diff --git a/drivers/gpio/adp5585_gpio.c b/drivers/gpio/adp5585_gpio.c new file mode 100644 index 00000000000..ea0cb75459b --- /dev/null +++ b/drivers/gpio/adp5585_gpio.c @@ -0,0 +1,238 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2022 NXP + * + * ADP5585 I/O Expander Controller + * + * Author: Alice Guo <alice.guo@nxp.com> + */ + +#include <asm/gpio.h> +#include <dm.h> +#include <dt-bindings/gpio/gpio.h> +#include <i2c.h> + +#define ADP5585_ID 0x00 +#define ADP5585_INT_STATUS 0x01 +#define ADP5585_STATUS 0x02 +#define ADP5585_FIFO_1 0x03 +#define ADP5585_FIFO_2 0x04 +#define ADP5585_FIFO_3 0x05 +#define ADP5585_FIFO_4 0x06 +#define ADP5585_FIFO_5 0x07 +#define ADP5585_FIFO_6 0x08 +#define ADP5585_FIFO_7 0x09 +#define ADP5585_FIFO_8 0x0A +#define ADP5585_FIFO_9 0x0B +#define ADP5585_FIFO_10 0x0C +#define ADP5585_FIFO_11 0x0D +#define ADP5585_FIFO_12 0x0E +#define ADP5585_FIFO_13 0x0F +#define ADP5585_FIFO_14 0x10 +#define ADP5585_FIFO_15 0x11 +#define ADP5585_FIFO_16 0x12 +#define ADP5585_GPI_INT_STAT_A 0x13 +#define ADP5585_GPI_INT_STAT_B 0x14 +#define ADP5585_GPI_STATUS_A 0x15 +#define ADP5585_GPI_STATUS_B 0x16 +#define ADP5585_RPULL_CONFIG_A 0x17 +#define ADP5585_RPULL_CONFIG_B 0x18 +#define ADP5585_RPULL_CONFIG_C 0x19 +#define ADP5585_RPULL_CONFIG_D 0x1A +#define ADP5585_GPI_INT_LEVEL_A 0x1B +#define ADP5585_GPI_INT_LEVEL_B 0x1C +#define ADP5585_GPI_EVENT_EN_A 0x1D +#define ADP5585_GPI_EVENT_EN_B 0x1E +#define ADP5585_GPI_INTERRUPT_EN_A 0x1F +#define ADP5585_GPI_INTERRUPT_EN_B 0x20 +#define ADP5585_DEBOUNCE_DIS_A 0x21 +#define ADP5585_DEBOUNCE_DIS_B 0x22 +#define ADP5585_GPO_DATA_OUT_A 0x23 +#define ADP5585_GPO_DATA_OUT_B 0x24 +#define ADP5585_GPO_OUT_MODE_A 0x25 +#define ADP5585_GPO_OUT_MODE_B 0x26 +#define ADP5585_GPIO_DIRECTION_A 0x27 +#define ADP5585_GPIO_DIRECTION_B 0x28 +#define ADP5585_RESET1_EVENT_A 0x29 +#define ADP5585_RESET1_EVENT_B 0x2A +#define ADP5585_RESET1_EVENT_C 0x2B +#define ADP5585_RESET2_EVENT_A 0x2C +#define ADP5585_RESET2_EVENT_B 0x2D +#define ADP5585_RESET_CFG 0x2E +#define ADP5585_PWM_OFFT_LOW 0x2F +#define ADP5585_PWM_OFFT_HIGH 0x30 +#define ADP5585_PWM_ONT_LOW 0x31 +#define ADP5585_PWM_ONT_HIGH 0x32 +#define ADP5585_PWM_CFG 0x33 +#define ADP5585_LOGIC_CFG 0x34 +#define ADP5585_LOGIC_FF_CFG 0x35 +#define ADP5585_LOGIC_INT_EVENT_EN 0x36 +#define ADP5585_POLL_PTIME_CFG 0x37 +#define ADP5585_PIN_CONFIG_A 0x38 +#define ADP5585_PIN_CONFIG_B 0x39 +#define ADP5585_PIN_CONFIG_D 0x3A +#define ADP5585_GENERAL_CFG 0x3B +#define ADP5585_INT_EN 0x3C + +#define ADP5585_MAXGPIO 10 +#define ADP5585_BANK(offs) ((offs) > 4) +#define ADP5585_BIT(offs) ((offs) > 4 ? \ + 1u << ((offs) - 5) : 1u << (offs)) + +struct adp5585_plat { + fdt_addr_t addr; + u8 id; + u8 dat_out[2]; + u8 dir[2]; +}; + +static int adp5585_direction_input(struct udevice *dev, unsigned int offset) +{ + int ret; + unsigned int bank; + struct adp5585_plat *plat = dev_get_plat(dev); + + bank = ADP5585_BANK(offset); + + plat->dir[bank] &= ~ADP5585_BIT(offset); + ret = dm_i2c_write(dev, ADP5585_GPIO_DIRECTION_A + bank, &plat->dir[bank], 1); + + return ret; +} + +static int adp5585_direction_output(struct udevice *dev, unsigned int offset, + int value) +{ + int ret; + unsigned int bank, bit; + struct adp5585_plat *plat = dev_get_plat(dev); + + bank = ADP5585_BANK(offset); + bit = ADP5585_BIT(offset); + + plat->dir[bank] |= bit; + + if (value) + plat->dat_out[bank] |= bit; + else + plat->dat_out[bank] &= ~bit; + + ret = dm_i2c_write(dev, ADP5585_GPO_DATA_OUT_A + bank, &plat->dat_out[bank], 1); + ret |= dm_i2c_write(dev, ADP5585_GPIO_DIRECTION_A + bank, &plat->dir[bank], 1); + + return ret; +} + +static int adp5585_get_value(struct udevice *dev, unsigned int offset) +{ + struct adp5585_plat *plat = dev_get_plat(dev); + unsigned int bank = ADP5585_BANK(offset); + unsigned int bit = ADP5585_BIT(offset); + u8 val; + + if (plat->dir[bank] & bit) + val = plat->dat_out[bank]; + else + dm_i2c_read(dev, ADP5585_GPI_STATUS_A + bank, &val, 1); + + return !!(val & bit); +} + +static int adp5585_set_value(struct udevice *dev, unsigned int offset, int value) +{ + int ret; + unsigned int bank, bit; + struct adp5585_plat *plat = dev_get_plat(dev); + + bank = ADP5585_BANK(offset); + bit = ADP5585_BIT(offset); + + if (value) + plat->dat_out[bank] |= bit; + else + plat->dat_out[bank] &= ~bit; + + ret = dm_i2c_write(dev, ADP5585_GPO_DATA_OUT_A + bank, &plat->dat_out[bank], 1); + + return ret; +} + +static int adp5585_get_function(struct udevice *dev, unsigned int offset) +{ + unsigned int bank, bit, dir; + struct adp5585_plat *plat = dev_get_plat(dev); + + bank = ADP5585_BANK(offset); + bit = ADP5585_BIT(offset); + dir = plat->dir[bank] & bit; + + if (!dir) + return GPIOF_INPUT; + else + return GPIOF_OUTPUT; +} + +static int adp5585_xlate(struct udevice *dev, struct gpio_desc *desc, + struct ofnode_phandle_args *args) +{ + desc->offset = args->args[0]; + desc->flags = args->args[1] & GPIO_ACTIVE_LOW ? GPIOD_ACTIVE_LOW : 0; + + return 0; +} + +static const struct dm_gpio_ops adp5585_ops = { + .direction_input = adp5585_direction_input, + .direction_output = adp5585_direction_output, + .get_value = adp5585_get_value, + .set_value = adp5585_set_value, + .get_function = adp5585_get_function, + .xlate = adp5585_xlate, +}; + +static int adp5585_probe(struct udevice *dev) +{ + struct adp5585_plat *plat = dev_get_plat(dev); + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + int ret; + + if (!plat) + return 0; + + plat->addr = dev_read_addr(dev); + if (plat->addr == FDT_ADDR_T_NONE) + return -EINVAL; + + ret = dm_i2c_read(dev, ADP5585_ID, &plat->id, 1); + if (ret < 0) + return ret; + + uc_priv->gpio_count = ADP5585_MAXGPIO; + uc_priv->bank_name = "adp5585-gpio"; + + for (int i = 0; i < 2; i++) { + ret = dm_i2c_read(dev, ADP5585_GPO_DATA_OUT_A + i, &plat->dat_out[i], 1); + if (ret) + return ret; + + ret = dm_i2c_read(dev, ADP5585_GPIO_DIRECTION_A + i, &plat->dir[i], 1); + if (ret) + return ret; + } + + return 0; +} + +static const struct udevice_id adp5585_ids[] = { + { .compatible = "adp5585" }, + { } +}; + +U_BOOT_DRIVER(adp5585) = { + .name = "adp5585", + .id = UCLASS_GPIO, + .of_match = adp5585_ids, + .probe = adp5585_probe, + .ops = &adp5585_ops, + .plat_auto = sizeof(struct adp5585_plat), +}; diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig index 2718b3674a5..1c534be0058 100644 --- a/drivers/input/Kconfig +++ b/drivers/input/Kconfig @@ -38,15 +38,6 @@ config TPL_DM_KEYBOARD includes methods to start/stop the device, check for available input and update LEDs if the keyboard has them. -config KEYBOARD - bool "Enable legacy keyboard support (deprecated)" - help - Enable this to enable a custom keyboard support. - This simply calls drv_keyboard_init() which must be - defined in your board-specific files. This option is deprecated - and is only used by novena. For new boards, use driver model - instead. - config APPLE_SPI_KEYB bool "Enable Apple SPI keyboard support" depends on DM_KEYBOARD && DM_SPI diff --git a/drivers/input/Makefile b/drivers/input/Makefile index b1133f772f2..ded76bddb22 100644 --- a/drivers/input/Makefile +++ b/drivers/input/Makefile @@ -3,7 +3,6 @@ # (C) Copyright 2000-2007 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. -obj-$(CONFIG_KEYBOARD) += input.o obj-$(CONFIG_$(SPL_TPL_)CROS_EC_KEYB) += cros_ec_keyb.o obj-$(CONFIG_$(SPL_TPL_)OF_CONTROL) += key_matrix.o obj-$(CONFIG_$(SPL_TPL_)DM_KEYBOARD) += input.o keyboard-uclass.o diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c index 74261d14e54..a50cde338a2 100644 --- a/drivers/net/ftgmac100.c +++ b/drivers/net/ftgmac100.c @@ -188,7 +188,7 @@ static int ftgmac100_phy_adjust_link(struct ftgmac100_data *priv) struct phy_device *phydev = priv->phydev; u32 maccr; - if (!phydev->link) { + if (!phydev->link && priv->phy_mode != PHY_INTERFACE_MODE_NCSI) { dev_err(phydev->dev, "No link\n"); return -EREMOTEIO; } @@ -228,7 +228,8 @@ static int ftgmac100_phy_init(struct udevice *dev) if (!phydev) return -ENODEV; - phydev->supported &= PHY_GBIT_FEATURES; + if (priv->phy_mode != PHY_INTERFACE_MODE_NCSI) + phydev->supported &= PHY_GBIT_FEATURES; if (priv->max_speed) { ret = phy_set_supported(phydev, priv->max_speed); if (ret) @@ -308,7 +309,8 @@ static void ftgmac100_stop(struct udevice *dev) writel(0, &ftgmac100->maccr); - phy_shutdown(priv->phydev); + if (priv->phy_mode != PHY_INTERFACE_MODE_NCSI) + phy_shutdown(priv->phydev); } static int ftgmac100_start(struct udevice *dev) @@ -580,6 +582,9 @@ static int ftgmac100_probe(struct udevice *dev) priv->max_speed = pdata->max_speed; priv->phy_addr = 0; + if (dev_read_bool(dev, "use-ncsi")) + priv->phy_mode = PHY_INTERFACE_MODE_NCSI; + #ifdef CONFIG_PHY_ADDR priv->phy_addr = CONFIG_PHY_ADDR; #endif @@ -592,7 +597,8 @@ static int ftgmac100_probe(struct udevice *dev) * If DM MDIO is enabled, the MDIO bus will be initialized later in * dm_eth_phy_connect */ - if (!IS_ENABLED(CONFIG_DM_MDIO)) { + if (priv->phy_mode != PHY_INTERFACE_MODE_NCSI && + !IS_ENABLED(CONFIG_DM_MDIO)) { ret = ftgmac100_mdio_init(dev); if (ret) { dev_err(dev, "Failed to initialize mdiobus: %d\n", ret); diff --git a/drivers/net/phy/ncsi.c b/drivers/net/phy/ncsi.c index bf1e832be9f..bb7ecebed38 100644 --- a/drivers/net/phy/ncsi.c +++ b/drivers/net/phy/ncsi.c @@ -9,6 +9,7 @@ #include <log.h> #include <malloc.h> #include <phy.h> +#include <net.h> #include <net/ncsi.h> #include <net/ncsi-pkt.h> #include <asm/unaligned.h> diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index 0350afdd1b6..90876630533 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -1026,7 +1026,7 @@ struct phy_device *phy_connect(struct mii_dev *bus, int addr, #endif #ifdef CONFIG_PHY_NCSI - if (!phydev) + if (!phydev && interface == PHY_INTERFACE_MODE_NCSI) phydev = phy_device_create(bus, 0, PHY_NCSI_ID, false); #endif @@ -1275,3 +1275,10 @@ int phy_clear_bits_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val return 0; } + +bool phy_interface_is_ncsi(void) +{ + struct eth_pdata *pdata = dev_get_plat(eth_get_dev()); + + return pdata->phy_interface == PHY_INTERFACE_MODE_NCSI; +} diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c index 9ce2bc1b3af..061104be056 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c @@ -245,6 +245,7 @@ static const struct sunxi_pinctrl_function suniv_f1c100s_pinctrl_functions[] = { #else { "uart0", 5 }, /* PE0-PE1 */ #endif + { "uart1", 5 }, /* PA0-PA3 */ }; static const struct sunxi_pinctrl_desc __maybe_unused suniv_f1c100s_pinctrl_desc = { diff --git a/drivers/ram/rockchip/Kconfig b/drivers/ram/rockchip/Kconfig index c459bbf5e24..c29d5e8b38c 100644 --- a/drivers/ram/rockchip/Kconfig +++ b/drivers/ram/rockchip/Kconfig @@ -23,7 +23,7 @@ config RAM_ROCKCHIP_DEBUG initialization, configurations and etc. config RAM_PX30_DDR4 - bool "DDR3 support for Rockchip PX30" + bool "DDR4 support for Rockchip PX30" depends on RAM_ROCKCHIP && ROCKCHIP_PX30 help This enables DDR4 sdram support instead of the default DDR3 support diff --git a/include/blk.h b/include/blk.h index 8806c382d4e..d3ab9a10b96 100644 --- a/include/blk.h +++ b/include/blk.h @@ -119,7 +119,7 @@ int blkcache_init(void); * @param start - starting block number * @param blkcnt - number of blocks to read * @param blksz - size in bytes of each block - * @param buf - buffer to contain cached data + * @param buffer - buffer to contain cached data * * Return: - 1 if block returned from cache, 0 otherwise. */ @@ -136,7 +136,7 @@ int blkcache_read(int iftype, int dev, * @param start - starting block number * @param blkcnt - number of blocks available * @param blksz - size in bytes of each block - * @param buf - buffer containing data to cache + * @param buffer - buffer containing data to cache * */ void blkcache_fill(int iftype, int dev, @@ -250,7 +250,7 @@ struct blk_ops { * The MMC standard provides for two boot partitions (numbered 1 and 2), * rpmb (3), and up to 4 addition general-purpose partitions (4-7). * - * @desc: Block device to update + * @dev: Block device to update * @hwpart: Hardware partition number to select. 0 means the raw * device, 1 is the first partition, 2 is the second, etc. * @return 0 if OK, -ve on error @@ -642,6 +642,7 @@ int blk_print_part_devnum(enum uclass_id uclass_id, int devnum); * * @uclass_id: Block device type * @devnum: Device number + * @start: Start block number to read (0=first) * @blkcnt: Number of blocks to read * @buffer: Address to write data to * Return: number of blocks read, or -ve error number on error @@ -654,6 +655,7 @@ ulong blk_read_devnum(enum uclass_id uclass_id, int devnum, lbaint_t start, * * @uclass_id: Block device type * @devnum: Device number + * @start: Start block number to write (0=first) * @blkcnt: Number of blocks to write * @buffer: Address to read data from * Return: number of blocks written, or -ve error number on error diff --git a/include/clk.h b/include/clk.h index 407513e0fa2..138766bd49f 100644 --- a/include/clk.h +++ b/include/clk.h @@ -474,7 +474,7 @@ struct clk *clk_get_parent(struct clk *clk); * * Return: clock rate in Hz, or -ve error code. */ -long long clk_get_parent_rate(struct clk *clk); +ulong clk_get_parent_rate(struct clk *clk); /** * clk_round_rate() - Adjust a rate to the exact rate a clock can provide @@ -607,7 +607,7 @@ static inline struct clk *clk_get_parent(struct clk *clk) return ERR_PTR(-ENOSYS); } -static inline long long clk_get_parent_rate(struct clk *clk) +static inline ulong clk_get_parent_rate(struct clk *clk) { return -ENOSYS; } diff --git a/include/configs/km/km-powerpc.h b/include/configs/km/km-powerpc.h index 20a36fbe115..424caa0df97 100644 --- a/include/configs/km/km-powerpc.h +++ b/include/configs/km/km-powerpc.h @@ -21,11 +21,8 @@ * @CONFIG_KM_RESERVED_PRAM: reserved pram for special purpose * @CONFIG_KM_PHRAM: address for /var * @CONFIG_KM_PNVRAM: address for PNVRAM (for the application) - * @CONFIG_KM_ROOTFSSIZE: address for rootfilesystem in RAM */ -/* size of rootfs in RAM */ -#define CONFIG_KM_ROOTFSSIZE 0x0 /* set the default PRAM value to at least PNVRAM + PHRAM when pram env variable * is not valid yet, which is the case for when u-boot copies itself to RAM */ #define CONFIG_PRAM ((CONFIG_KM_PNVRAM + CONFIG_KM_PHRAM)>>10) diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 0d470c4b4a1..1b1900179ef 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -179,11 +179,8 @@ * @CONFIG_KM_RESERVED_PRAM: reserved pram for special purpose * @CONFIG_KM_PHRAM: address for /var * @CONFIG_KM_PNVRAM: address for PNVRAM (for the application) - * @CONFIG_KM_ROOTFSSIZE: address for rootfilesystem in RAM */ -/* size of rootfs in RAM */ -#define CONFIG_KM_ROOTFSSIZE 0x0 /* set the default PRAM value to at least PNVRAM + PHRAM when pram env variable * is not valid yet, which is the case for when u-boot copies itself to RAM */ diff --git a/include/configs/qemu-arm.h b/include/configs/qemu-arm.h index dd2faebbbb2..535762ecb24 100644 --- a/include/configs/qemu-arm.h +++ b/include/configs/qemu-arm.h @@ -21,6 +21,17 @@ EFI_GUID(0x058b7d83, 0x50d5, 0x4c47, 0xa1, 0x95, \ 0x60, 0xd8, 0x6a, 0xd3, 0x41, 0xc4) +/* Try files from QEMU's -kernel/-initrd, through the QEMU firmware device. */ +#define BOOTENV_DEV_QFW(devtypeu, devtypel, instance) \ + "bootcmd_qfw= " \ + "if qfw load $kernel_addr_r $ramdisk_addr_r; then " \ + " booti $kernel_addr_r $ramdisk_addr_r:$filesize $fdtcontroladdr; " \ + " if test $? -eq 1; then " \ + " bootz $kernel_addr_r $ramdisk_addr_r:$filesize $fdtcontroladdr; " \ + " fi ; " \ + "fi\0" +#define BOOTENV_DEV_NAME_QFW(devtypeu, devtypel, instance) "qfw " + /* For timer, QEMU emulates an ARMv7/ARMv8 architected timer */ /* Environment options */ @@ -56,6 +67,7 @@ #endif #define BOOT_TARGET_DEVICES(func) \ + func(QFW, qfw, na) \ BOOT_TARGET_USB(func) \ BOOT_TARGET_SCSI(func) \ BOOT_TARGET_VIRTIO(func) \ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 0f0ef4f64bb..fe90d55bd45 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -135,7 +135,21 @@ #define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(FE00000)) #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FF00000)) -#elif defined(CONFIG_MACH_SUN8I_V3S) +#elif (CONFIG_SUNXI_MINIMUM_DRAM_MB >= 256) +/* + * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc. + * 32M uncompressed kernel, 16M compressed kernel, 1M fdt, + * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end. + */ +#define BOOTM_SIZE __stringify(0xa000000) +#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000)) +#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000)) +#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000)) +#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000)) +#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(3300000)) +#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3400000)) + +#elif (CONFIG_SUNXI_MINIMUM_DRAM_MB >= 64) /* * 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc. * 16M uncompressed kernel, 8M compressed kernel, 1M fdt, @@ -149,33 +163,22 @@ #define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(1B00000)) #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1C00000)) -#elif defined(CONFIG_MACH_SUNIV) +#elif (CONFIG_SUNXI_MINIMUM_DRAM_MB >= 32) /* - * 32M RAM minus 1MB heap + 8MB for u-boot, stack, fb, etc. - * 8M uncompressed kernel, 4M compressed kernel, 512K fdt, - * 512K script, 512K pxe and the ramdisk at the end. + * 32M RAM minus 2.5MB for u-boot, heap, stack, etc. + * 16M uncompressed kernel, 7M compressed kernel, 128K fdt, 64K script, + * 128K DT overlay, 128K PXE and the ramdisk in the rest (max. 5MB) */ #define BOOTM_SIZE __stringify(0x1700000) -#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0500000)) -#define FDT_ADDR_R __stringify(SDRAM_OFFSET(0C00000)) -#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(0C50000)) -#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(0D00000)) -#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(0D50000)) -#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(0D60000)) +#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000)) +#define FDT_ADDR_R __stringify(SDRAM_OFFSET(1d50000)) +#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1d40000)) +#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1d00000)) +#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(1d20000)) +#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1800000)) #else -/* - * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc. - * 32M uncompressed kernel, 16M compressed kernel, 1M fdt, - * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end. - */ -#define BOOTM_SIZE __stringify(0xa000000) -#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000)) -#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000)) -#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000)) -#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000)) -#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(3300000)) -#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3400000)) +#error Need at least 32MB of DRAM. Please adjust load addresses. #endif #define MEM_LAYOUT_ENV_SETTINGS \ diff --git a/include/dt-bindings/clock/sun50i-h6-r-ccu.h b/include/dt-bindings/clock/sun50i-h6-r-ccu.h index 890368d252c..a96087abc86 100644 --- a/include/dt-bindings/clock/sun50i-h6-r-ccu.h +++ b/include/dt-bindings/clock/sun50i-h6-r-ccu.h @@ -22,5 +22,6 @@ #define CLK_W1 12 #define CLK_R_APB2_RSB 13 +#define CLK_R_APB1_RTC 14 #endif /* _DT_BINDINGS_CLK_SUN50I_H6_R_CCU_H_ */ diff --git a/include/dt-bindings/clock/sun50i-h616-ccu.h b/include/dt-bindings/clock/sun50i-h616-ccu.h index 4fc08b0df2f..1191aca53ac 100644 --- a/include/dt-bindings/clock/sun50i-h616-ccu.h +++ b/include/dt-bindings/clock/sun50i-h616-ccu.h @@ -111,5 +111,6 @@ #define CLK_BUS_TVE0 125 #define CLK_HDCP 126 #define CLK_BUS_HDCP 127 +#define CLK_PLL_SYSTEM_32K 128 #endif /* _DT_BINDINGS_CLK_SUN50I_H616_H_ */ diff --git a/include/dt-bindings/clock/sun6i-rtc.h b/include/dt-bindings/clock/sun6i-rtc.h new file mode 100644 index 00000000000..c845493e4d3 --- /dev/null +++ b/include/dt-bindings/clock/sun6i-rtc.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ + +#ifndef _DT_BINDINGS_CLK_SUN6I_RTC_H_ +#define _DT_BINDINGS_CLK_SUN6I_RTC_H_ + +#define CLK_OSC32K 0 +#define CLK_OSC32K_FANOUT 1 +#define CLK_IOSC 2 + +#endif /* _DT_BINDINGS_CLK_SUN6I_RTC_H_ */ diff --git a/include/dt-bindings/power/rk3568-power.h b/include/dt-bindings/power/rk3568-power.h new file mode 100644 index 00000000000..6cc1af1a9d2 --- /dev/null +++ b/include/dt-bindings/power/rk3568-power.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __DT_BINDINGS_POWER_RK3568_POWER_H__ +#define __DT_BINDINGS_POWER_RK3568_POWER_H__ + +/* VD_CORE */ +#define RK3568_PD_CPU_0 0 +#define RK3568_PD_CPU_1 1 +#define RK3568_PD_CPU_2 2 +#define RK3568_PD_CPU_3 3 +#define RK3568_PD_CORE_ALIVE 4 + +/* VD_PMU */ +#define RK3568_PD_PMU 5 + +/* VD_NPU */ +#define RK3568_PD_NPU 6 + +/* VD_GPU */ +#define RK3568_PD_GPU 7 + +/* VD_LOGIC */ +#define RK3568_PD_VI 8 +#define RK3568_PD_VO 9 +#define RK3568_PD_RGA 10 +#define RK3568_PD_VPU 11 +#define RK3568_PD_CENTER 12 +#define RK3568_PD_RKVDEC 13 +#define RK3568_PD_RKVENC 14 +#define RK3568_PD_PIPE 15 +#define RK3568_PD_LOGIC_ALIVE 16 + +#endif diff --git a/include/net.h b/include/net.h index c06b577808b..32364ed0ced 100644 --- a/include/net.h +++ b/include/net.h @@ -560,7 +560,7 @@ extern int net_restart_wrap; /* Tried all network devices */ enum proto_t { BOOTP, RARP, ARP, TFTPGET, DHCP, PING, DNS, NFS, CDP, NETCONS, SNTP, - TFTPSRV, TFTPPUT, LINKLOCAL, FASTBOOT, WOL, UDP + TFTPSRV, TFTPPUT, LINKLOCAL, FASTBOOT, WOL, UDP, NCSI }; extern char net_boot_file_name[1024];/* Boot File name */ diff --git a/include/phy.h b/include/phy.h index ad2096ca84f..0737c4e8f9a 100644 --- a/include/phy.h +++ b/include/phy.h @@ -412,6 +412,8 @@ static inline bool phy_interface_is_sgmii(struct phy_device *phydev) phydev->interface <= PHY_INTERFACE_MODE_QSGMII; } +bool phy_interface_is_ncsi(void); + /* PHY UIDs for various PHYs that are referenced in external code */ #define PHY_UID_CS4340 0x13e51002 #define PHY_UID_CS4223 0x03e57003 diff --git a/net/net.c b/net/net.c index f9d11c08d2e..b27b021d071 100644 --- a/net/net.c +++ b/net/net.c @@ -93,6 +93,7 @@ #include <net.h> #include <net/fastboot.h> #include <net/tftp.h> +#include <net/ncsi.h> #if defined(CONFIG_CMD_PCAP) #include <net/pcap.h> #endif @@ -410,6 +411,16 @@ int net_loop(enum proto_t protocol) net_try_count = 1; debug_cond(DEBUG_INT_STATE, "--- net_loop Entry\n"); +#ifdef CONFIG_PHY_NCSI + if (phy_interface_is_ncsi() && protocol != NCSI && !ncsi_active()) { + printf("%s: configuring NCSI first\n", __func__); + if (net_loop(NCSI) < 0) + return ret; + eth_init_state_only(); + goto restart; + } +#endif + bootstage_mark_name(BOOTSTAGE_ID_ETH_START, "eth_start"); net_init(); if (eth_is_on_demand_init()) { @@ -423,6 +434,7 @@ int net_loop(enum proto_t protocol) } else { eth_init_state_only(); } + restart: #ifdef CONFIG_USB_KEYBOARD net_busy_flag = 0; @@ -527,6 +539,11 @@ restart: wol_start(); break; #endif +#if defined(CONFIG_PHY_NCSI) + case NCSI: + ncsi_probe_packages(); + break; +#endif default: break; } @@ -637,7 +654,7 @@ restart: env_set_hex("filesize", net_boot_file_size); env_set_hex("fileaddr", image_load_addr); } - if (protocol != NETCONS) + if (protocol != NETCONS && protocol != NCSI) eth_halt(); else eth_halt_state_only(); @@ -1322,6 +1339,11 @@ void net_process_received_packet(uchar *in_packet, int len) wol_receive(ip, len); break; #endif +#ifdef CONFIG_PHY_NCSI + case PROT_NCSI: + ncsi_receive(et, ip, len); + break; +#endif } } @@ -1382,6 +1404,9 @@ common: #ifdef CONFIG_CMD_RARP case RARP: #endif +#ifdef CONFIG_PHY_NCSI + case NCSI: +#endif case BOOTP: case CDP: case DHCP: diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 137b7f61ac1..4c760fe62c8 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -246,13 +246,11 @@ CONFIG_KM_DEF_ENV_FLASH_BOOT CONFIG_KM_DEV_ENV_FLASH_BOOT_UBI CONFIG_KM_ECC_MODE CONFIG_KM_NEW_ENV -CONFIG_KM_ROOTFSSIZE CONFIG_KM_UBI_LINUX_MTD CONFIG_KM_UBI_PARTITION_NAME_APP CONFIG_KM_UBI_PARTITION_NAME_BOOT CONFIG_KM_UBI_PART_BOOT_OPTS CONFIG_KM_UIMAGE_NAME -CONFIG_KM_UPDATE_UBOOT CONFIG_KSNET_CPSW_NUM_PORTS CONFIG_KSNET_MAC_ID_BASE CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE @@ -621,7 +619,6 @@ CONFIG_SYS_DPAA_PME CONFIG_SYS_DPAA_RMAN CONFIG_SYS_DRAM_TEST CONFIG_SYS_DV_NOR_BOOT_CFG -CONFIG_SYS_EEPROM_WREN CONFIG_SYS_ENV_SECT_SIZE CONFIG_SYS_ETHOC_BASE CONFIG_SYS_ETHOC_BUFFER_ADDR @@ -1328,7 +1325,6 @@ CONFIG_TSEC_TBICR_SETTINGS CONFIG_TWL6030_POWER CONFIG_UBIFS_VOLUME CONFIG_UBI_PART -CONFIG_UBI_SIZE CONFIG_UBOOTPATH CONFIG_UBOOT_SECTOR_COUNT CONFIG_UBOOT_SECTOR_START @@ -1342,7 +1338,6 @@ CONFIG_USBD_PRODUCTID_CDCACM CONFIG_USBD_PRODUCTID_GSERIAL CONFIG_USBD_PRODUCT_NAME CONFIG_USBD_VENDORID -CONFIG_USBNET_DEV_ADDR CONFIG_USB_BOOTING CONFIG_USB_DEVICE CONFIG_USB_EXT2_BOOT diff --git a/test/dm/k210_pll.c b/test/dm/k210_pll.c index a0cc84c3961..354720f61e2 100644 --- a/test/dm/k210_pll.c +++ b/test/dm/k210_pll.c @@ -33,7 +33,7 @@ static int dm_test_k210_pll_calc_config(u32 rate, u32 rate_in, error = DIV_ROUND_CLOSEST_ULL(f * inv_ratio, r * od); /* The lower 16 bits are spurious */ - error = abs((error - BIT(32))) >> 16; + error = abs64((error - BIT_ULL(32))) >> 16; if (error < best_error) { best->r = r; best->f = f; @@ -51,9 +51,9 @@ echo "${prompt}" run_test "sandbox_spl" ./test/py/test.py --bd sandbox_spl --build ${para} \ -k 'test_ofplatdata or test_handoff or test_spl' -# Run the sane tests with sandbox_noinst (i.e. without OF_PLATDATA_INST) +# Run the same tests with sandbox_noinst (i.e. without OF_PLATDATA_INST) echo "${prompt}" -run_test "sandbox_spl" ./test/py/test.py --bd sandbox_noinst --build ${para} \ +run_test "sandbox_noinst" ./test/py/test.py --bd sandbox_noinst --build ${para} \ -k 'test_ofplatdata or test_handoff or test_spl' if [ -z "$tools_only" ]; then |