diff options
276 files changed, 5189 insertions, 5089 deletions
@@ -209,6 +209,7 @@ config ENV_VARS_UBOOT_CONFIG config NR_DRAM_BANKS int "Number of DRAM banks" default 1 if ARCH_SUNXI || ARCH_OWL + default 2 if OMAP34XX default 4 help This defines the number of DRAM banks. @@ -236,6 +237,7 @@ config SYS_BOOT_GET_KBD config HAS_CUSTOM_SYS_INIT_SP_ADDR bool "Use a custom location for the initial stack pointer address" depends on ARC || (ARM && !INIT_SP_RELATIVE) || MIPS || PPC || RISCV + default y if OMAP34XX || AM33XX || AM43XX || DRA7XX default y if TFABOOT help Typically, we use an initial stack pointer address that is calculated @@ -249,6 +251,10 @@ config HAS_CUSTOM_SYS_INIT_SP_ADDR config CUSTOM_SYS_INIT_SP_ADDR hex "Static location for the initial stack pointer" depends on HAS_CUSTOM_SYS_INIT_SP_ADDR + default 0x4020ff00 if OMAP34XX + default 0x4030ff00 if AM33XX + default 0x4033ff00 if AM43XX + default 0x4037ff00 if DRA7XX default TEXT_BASE if TFABOOT config SYS_MALLOC_F @@ -615,6 +621,7 @@ config SYS_SRAM_SIZE config SYS_MONITOR_LEN int "Maximum size in bytes reserved for U-Boot in memory" default 1048576 if X86 + default 262144 if OMAP34XX default 786432 if ARCH_SUNXI default 0 help diff --git a/MAINTAINERS b/MAINTAINERS index ddcb7128db4..44e9c2f03f3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1709,6 +1709,19 @@ M: Neha Malcom Francis <n-francis@ti.com> S: Maintained F: drivers/ufs/ +UPL +M: Simon Glass <sjg@chromium.org> +S: Maintained +T: git https://source.denx.de/u-boot/custodians/u-boot-dm.git +F: boot/upl* +F: cmd/upl.c +F: common/spl/spl_upl.c +F: doc/usage/upl.rst +F: doc/usage/cmd/upl.rst +F: include/upl.h +F: test/boot/upl.c +F: test/py/tests/test_upl.py + USB M: Marek Vasut <marex@denx.de> S: Maintained @@ -3,7 +3,7 @@ VERSION = 2024 PATCHLEVEL = 10 SUBLEVEL = -EXTRAVERSION = -rc1 +EXTRAVERSION = -rc2 NAME = # *DOCUMENTATION* @@ -1473,8 +1473,10 @@ u-boot.bin.lzma: u-boot.bin FORCE u-boot-lzma.img: u-boot.bin.lzma FORCE $(call if_changed,mkimage) +fit_image := $(if $(CONFIG_SANDBOX_VPL),u-boot,u-boot-nodtb.bin) + u-boot-dtb.img u-boot.img u-boot.kwb u-boot.pbl u-boot-ivt.img: \ - $(if $(CONFIG_SPL_LOAD_FIT),u-boot-nodtb.bin \ + $(if $(CONFIG_SPL_LOAD_FIT),$(fit_image) \ $(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_SANDBOX),dts/dt.dtb) \ ,$(UBOOT_BIN)) FORCE $(call if_changed,mkimage) @@ -771,21 +771,8 @@ The following options need to be configured: CFG_SYS_NUM_I2C_BUSES Hold the number of i2c buses you want to use. - CFG_SYS_I2C_DIRECT_BUS - define this, if you don't use i2c muxes on your hardware. - if CFG_SYS_I2C_MAX_HOPS is not defined or == 0 you can - omit this define. - - CFG_SYS_I2C_MAX_HOPS - define how many muxes are maximal consecutively connected - on one i2c bus. If you not use i2c muxes, omit this - define. - CFG_SYS_I2C_BUSES - hold a list of buses you want to use, only used if - CFG_SYS_I2C_DIRECT_BUS is not defined, for example - a board with CFG_SYS_I2C_MAX_HOPS = 1 and - CFG_SYS_NUM_I2C_BUSES = 9: + hold a list of buses you want to use CFG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP}}, \ {0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \ @@ -883,13 +870,6 @@ The following options need to be configured: You should define these to the GPIO value as given directly to the generic GPIO functions. - CFG_I2C_MULTI_BUS - - This option allows the use of multiple I2C buses, each of which - must have a controller. At any point in time, only one bus is - active. To switch to a different bus, use the 'i2c dev' command. - Note that bus numbering is zero-based. - CFG_SYS_I2C_NOPROBES This option specifies a list of I2C devices that will be skipped @@ -900,11 +880,6 @@ The following options need to be configured: will skip addresses 0x50 and 0x68 on a board with one I2C bus - CFG_SYS_RTC_BUS_NUM - - If defined, then this indicates the I2C bus number for the RTC. - If not defined, then U-Boot assumes that RTC is on I2C bus 0. - CONFIG_SOFT_I2C_READ_REPEATED_START defining this will force the i2c_read() function in diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ba0359fed5a..656f588a97c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -802,7 +802,7 @@ config ARCH_OMAP2PLUS bool "TI OMAP2+" select CPU_V7A select GPIO_EXTRA_HEADER - select SPL_BOARD_INIT if SPL + select SPL_SOC_INIT if SPL select SPL_STACK_R if SPL select SUPPORT_SPL imply TI_SYSC if DM && OF_CONTROL diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 82d37adae3f..2c983b2224c 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -953,13 +953,6 @@ endif dtb-$(CONFIG_RZA1) += \ r7s72100-gr-peach.dtb -dtb-$(CONFIG_ARCH_KEYSTONE) += keystone-k2hk-evm.dtb \ - keystone-k2l-evm.dtb \ - keystone-k2e-evm.dtb \ - keystone-k2g-evm.dtb \ - keystone-k2g-generic.dtb \ - keystone-k2g-ice.dtb - dtb-$(CONFIG_TARGET_AT91SAM9261EK) += at91sam9261ek.dtb dtb-$(CONFIG_TARGET_PM9261) += at91sam9261ek.dtb diff --git a/arch/arm/dts/keystone-clocks.dtsi b/arch/arm/dts/keystone-clocks.dtsi deleted file mode 100644 index 33742d81971..00000000000 --- a/arch/arm/dts/keystone-clocks.dtsi +++ /dev/null @@ -1,411 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for Keystone 2 clock tree - * - * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ - */ - -clocks { - #address-cells = <1>; - #size-cells = <1>; - ranges; - - mainmuxclk: mainmuxclk@2310108 { - #clock-cells = <0>; - compatible = "ti,keystone,pll-mux-clock"; - clocks = <&mainpllclk>, <&refclksys>; - reg = <0x02310108 4>; - bit-shift = <23>; - bit-mask = <1>; - clock-output-names = "mainmuxclk"; - }; - - chipclk1: chipclk1 { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&mainmuxclk>; - clock-div = <1>; - clock-mult = <1>; - clock-output-names = "chipclk1"; - }; - - chipclk1rstiso: chipclk1rstiso { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&mainmuxclk>; - clock-div = <1>; - clock-mult = <1>; - clock-output-names = "chipclk1rstiso"; - }; - - gemtraceclk: gemtraceclk@2310120 { - #clock-cells = <0>; - compatible = "ti,keystone,pll-divider-clock"; - clocks = <&mainmuxclk>; - reg = <0x02310120 4>; - bit-shift = <0>; - bit-mask = <8>; - clock-output-names = "gemtraceclk"; - }; - - chipstmxptclk: chipstmxptclk@2310164 { - #clock-cells = <0>; - compatible = "ti,keystone,pll-divider-clock"; - clocks = <&mainmuxclk>; - reg = <0x02310164 4>; - bit-shift = <0>; - bit-mask = <8>; - clock-output-names = "chipstmxptclk"; - }; - - chipclk12: chipclk12 { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&chipclk1>; - clock-div = <2>; - clock-mult = <1>; - clock-output-names = "chipclk12"; - }; - - chipclk13: chipclk13 { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&chipclk1>; - clock-div = <3>; - clock-mult = <1>; - clock-output-names = "chipclk13"; - }; - - paclk13: paclk13 { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&papllclk>; - clock-div = <3>; - clock-mult = <1>; - clock-output-names = "paclk13"; - }; - - chipclk14: chipclk14 { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&chipclk1>; - clock-div = <4>; - clock-mult = <1>; - clock-output-names = "chipclk14"; - }; - - chipclk16: chipclk16 { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&chipclk1>; - clock-div = <6>; - clock-mult = <1>; - clock-output-names = "chipclk16"; - }; - - chipclk112: chipclk112 { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&chipclk1>; - clock-div = <12>; - clock-mult = <1>; - clock-output-names = "chipclk112"; - }; - - chipclk124: chipclk124 { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&chipclk1>; - clock-div = <24>; - clock-mult = <1>; - clock-output-names = "chipclk114"; - }; - - chipclk1rstiso13: chipclk1rstiso13 { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&chipclk1rstiso>; - clock-div = <3>; - clock-mult = <1>; - clock-output-names = "chipclk1rstiso13"; - }; - - chipclk1rstiso14: chipclk1rstiso14 { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&chipclk1rstiso>; - clock-div = <4>; - clock-mult = <1>; - clock-output-names = "chipclk1rstiso14"; - }; - - chipclk1rstiso16: chipclk1rstiso16 { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&chipclk1rstiso>; - clock-div = <6>; - clock-mult = <1>; - clock-output-names = "chipclk1rstiso16"; - }; - - chipclk1rstiso112: chipclk1rstiso112 { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&chipclk1rstiso>; - clock-div = <12>; - clock-mult = <1>; - clock-output-names = "chipclk1rstiso112"; - }; - - clkmodrst0: clkmodrst0@2350000 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk16>; - clock-output-names = "modrst0"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - - clkusb: clkusb@2350008 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk16>; - clock-output-names = "usb"; - reg = <0x02350008 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clkaemifspi: clkaemifspi@235000c { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk16>; - clock-output-names = "aemif-spi"; - reg = <0x0235000c 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - - clkdebugsstrc: clkdebugsstrc@2350014 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "debugss-trc"; - reg = <0x02350014 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <1>; - }; - - clktetbtrc: clktetbtrc@2350018 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "tetb-trc"; - reg = <0x02350018 0xb00>, <0x02350004 0x400>; - reg-names = "control", "domain"; - domain-id = <1>; - }; - - clkpa: clkpa@235001c { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&paclk13>; - clock-output-names = "pa"; - reg = <0x0235001c 0xb00>, <0x02350008 0x400>; - reg-names = "control", "domain"; - domain-id = <2>; - }; - - clkcpgmac: clkcpgmac@2350020 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkpa>; - clock-output-names = "cpgmac"; - reg = <0x02350020 0xb00>, <0x02350008 0x400>; - reg-names = "control", "domain"; - domain-id = <2>; - }; - - clksa: clksa@2350024 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkpa>; - clock-output-names = "sa"; - reg = <0x02350024 0xb00>, <0x02350008 0x400>; - reg-names = "control", "domain"; - domain-id = <2>; - }; - - clkpcie: clkpcie@2350028 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk12>; - clock-output-names = "pcie"; - reg = <0x02350028 0xb00>, <0x0235000c 0x400>; - reg-names = "control", "domain"; - domain-id = <3>; - }; - - clksr: clksr@2350034 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk1rstiso112>; - clock-output-names = "sr"; - reg = <0x02350034 0xb00>, <0x02350018 0x400>; - reg-names = "control", "domain"; - domain-id = <6>; - }; - - clkgem0: clkgem0@235003c { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk1>; - clock-output-names = "gem0"; - reg = <0x0235003c 0xb00>, <0x02350020 0x400>; - reg-names = "control", "domain"; - domain-id = <8>; - }; - - clkddr30: clkddr30@235005c { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk12>; - clock-output-names = "ddr3-0"; - reg = <0x0235005c 0xb00>, <0x02350040 0x400>; - reg-names = "control", "domain"; - domain-id = <16>; - }; - - clkwdtimer0: clkwdtimer0@2350000 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkmodrst0>; - clock-output-names = "timer0"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clkwdtimer1: clkwdtimer1@2350000 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkmodrst0>; - clock-output-names = "timer1"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clkwdtimer2: clkwdtimer2@2350000 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkmodrst0>; - clock-output-names = "timer2"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clkwdtimer3: clkwdtimer3@2350000 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkmodrst0>; - clock-output-names = "timer3"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clktimer15: clktimer15@2350000 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkmodrst0>; - clock-output-names = "timer15"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clkuart0: clkuart0@2350000 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkmodrst0>; - clock-output-names = "uart0"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clkuart1: clkuart1@2350000 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkmodrst0>; - clock-output-names = "uart1"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clkaemif: clkaemif@2350000 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkaemifspi>; - clock-output-names = "aemif"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clkusim: clkusim@2350000 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkmodrst0>; - clock-output-names = "usim"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clki2c: clki2c@2350000 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkmodrst0>; - clock-output-names = "i2c"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clkspi: clkspi@2350000 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkaemifspi>; - clock-output-names = "spi"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clkgpio: clkgpio@2350000 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkmodrst0>; - clock-output-names = "gpio"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clkkeymgr: clkkeymgr@2350000 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkmodrst0>; - clock-output-names = "keymgr"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; -}; diff --git a/arch/arm/dts/keystone-k2e-clocks.dtsi b/arch/arm/dts/keystone-k2e-clocks.dtsi deleted file mode 100644 index 46f8ab3a11d..00000000000 --- a/arch/arm/dts/keystone-k2e-clocks.dtsi +++ /dev/null @@ -1,74 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Keystone 2 Edison SoC specific device tree - * - * Copyright (C) 2014-2017 Texas Instruments Incorporated - https://www.ti.com/ - */ - -clocks { - mainpllclk: mainpllclk@2310110 { - #clock-cells = <0>; - compatible = "ti,keystone,main-pll-clock"; - clocks = <&refclksys>; - reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>; - reg-names = "control", "multiplier", "post-divider"; - }; - - papllclk: papllclk@2620358 { - #clock-cells = <0>; - compatible = "ti,keystone,pll-clock"; - clocks = <&refclkpass>; - clock-output-names = "papllclk"; - reg = <0x02620358 4>; - reg-names = "control"; - }; - - ddr3apllclk: ddr3apllclk@2620360 { - #clock-cells = <0>; - compatible = "ti,keystone,pll-clock"; - clocks = <&refclkddr3a>; - clock-output-names = "ddr-3a-pll-clk"; - reg = <0x02620360 4>; - reg-names = "control"; - }; - - clkusb1: clkusb1@2350004 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk16>; - clock-output-names = "usb1"; - reg = <0x02350004 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clkhyperlink0: clkhyperlink0@2350030 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk12>; - clock-output-names = "hyperlink-0"; - reg = <0x02350030 0xb00>, <0x02350014 0x400>; - reg-names = "control", "domain"; - domain-id = <5>; - }; - - clkpcie1: clkpcie1@235006c { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk12>; - clock-output-names = "pcie1"; - reg = <0x0235006c 0xb00>, <0x02350048 0x400>; - reg-names = "control", "domain"; - domain-id = <18>; - }; - - clkxge: clkxge@23500c8 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "xge"; - reg = <0x023500c8 0xb00>, <0x02350074 0x400>; - reg-names = "control", "domain"; - domain-id = <29>; - }; -}; diff --git a/arch/arm/dts/keystone-k2e-evm-u-boot.dtsi b/arch/arm/dts/keystone-k2e-evm-u-boot.dtsi index 953c7502260..e77c53dbf7b 100644 --- a/arch/arm/dts/keystone-k2e-evm-u-boot.dtsi +++ b/arch/arm/dts/keystone-k2e-evm-u-boot.dtsi @@ -4,15 +4,23 @@ */ /{ - soc { - bootph-all; - }; aliases { usb0 = &usb; usb1 = &usb1; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + }; + + chosen { + stdout-path = &uart0; }; }; +&soc0 { + bootph-all; +}; + &i2c1 { bootph-all; }; diff --git a/arch/arm/dts/keystone-k2e-evm.dts b/arch/arm/dts/keystone-k2e-evm.dts deleted file mode 100644 index bf884442617..00000000000 --- a/arch/arm/dts/keystone-k2e-evm.dts +++ /dev/null @@ -1,152 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Keystone 2 Edison EVM device tree - * - * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ - */ -/dts-v1/; - -#include "keystone.dtsi" -#include "keystone-k2e.dtsi" - -/ { - compatible = "ti,k2e-evm", "ti,k2e", "ti,keystone"; - model = "Texas Instruments Keystone 2 Edison EVM"; - - soc { - - clocks { - refclksys: refclksys { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <100000000>; - clock-output-names = "refclk-sys"; - }; - - refclkpass: refclkpass { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <100000000>; - clock-output-names = "refclk-pass"; - }; - - refclkddr3a: refclkddr3a { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <100000000>; - clock-output-names = "refclk-ddr3a"; - }; - }; - }; -}; - -&usb_phy { - status = "okay"; -}; - -&usb { - status = "okay"; -}; - -&usb1_phy { - status = "okay"; -}; - -&usb1 { - status = "okay"; -}; - -&i2c0 { - dtt@50 { - compatible = "at,24c1024"; - reg = <0x50>; - }; -}; - -&aemif { - cs0 { - #address-cells = <2>; - #size-cells = <1>; - clock-ranges; - ranges; - - ti,cs-chipselect = <0>; - /* all timings in nanoseconds */ - ti,cs-min-turnaround-ns = <12>; - ti,cs-read-hold-ns = <6>; - ti,cs-read-strobe-ns = <23>; - ti,cs-read-setup-ns = <9>; - ti,cs-write-hold-ns = <8>; - ti,cs-write-strobe-ns = <23>; - ti,cs-write-setup-ns = <8>; - - nand@0,0 { - compatible = "ti,keystone-nand","ti,davinci-nand"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0 0 0x4000000 - 1 0 0x0000100>; - - ti,davinci-chipselect = <0>; - ti,davinci-mask-ale = <0x2000>; - ti,davinci-mask-cle = <0x4000>; - ti,davinci-mask-chipsel = <0>; - nand-ecc-mode = "hw"; - ti,davinci-ecc-bits = <4>; - nand-on-flash-bbt; - - partition@0 { - label = "u-boot"; - reg = <0x0 0x100000>; - read-only; - }; - - partition@100000 { - label = "params"; - reg = <0x100000 0x80000>; - read-only; - }; - - partition@180000 { - label = "ubifs"; - reg = <0x180000 0x1FE80000>; - }; - }; - }; -}; - -&spi0 { - status = "okay"; - nor_flash: flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "Micron,n25q128a11", "jedec,spi-nor"; - spi-max-frequency = <54000000>; - m25p,fast-read; - reg = <0>; - - partition@0 { - label = "u-boot-spl"; - reg = <0x0 0x80000>; - read-only; - }; - - partition@1 { - label = "misc"; - reg = <0x80000 0xf80000>; - }; - }; -}; - -&mdio { - status = "okay"; - ethphy0: ethernet-phy@0 { - compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22"; - reg = <0>; - }; - - ethphy1: ethernet-phy@1 { - compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22"; - reg = <1>; - }; -}; diff --git a/arch/arm/dts/keystone-k2e-netcp.dtsi b/arch/arm/dts/keystone-k2e-netcp.dtsi deleted file mode 100644 index dd61503db39..00000000000 --- a/arch/arm/dts/keystone-k2e-netcp.dtsi +++ /dev/null @@ -1,203 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for Keystone 2 Edison Netcp driver - * - * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/ - */ - -qmss: qmss@2a40000 { - compatible = "ti,keystone-navigator-qmss"; - dma-coherent; - #address-cells = <1>; - #size-cells = <1>; - clocks = <&chipclk13>; - ranges; - queue-range = <0 0x2000>; - linkram0 = <0x100000 0x4000>; - linkram1 = <0 0x10000>; - - qmgrs { - #address-cells = <1>; - #size-cells = <1>; - ranges; - qmgr0 { - managed-queues = <0 0x2000>; - reg = <0x2a40000 0x20000>, - <0x2a06000 0x400>, - <0x2a02000 0x1000>, - <0x2a03000 0x1000>, - <0x23a80000 0x20000>, - <0x2a80000 0x20000>; - reg-names = "peek", "status", "config", - "region", "push", "pop"; - }; - }; - queue-pools { - qpend { - qpend-0 { - qrange = <658 8>; - interrupts =<0 40 0xf04 0 41 0xf04 0 42 0xf04 - 0 43 0xf04 0 44 0xf04 0 45 0xf04 - 0 46 0xf04 0 47 0xf04>; - }; - qpend-1 { - qrange = <528 16>; - interrupts = <0 48 0xf04 0 49 0xf04 0 50 0xf04 - 0 51 0xf04 0 52 0xf04 0 53 0xf04 - 0 54 0xf04 0 55 0xf04 0 56 0xf04 - 0 57 0xf04 0 58 0xf04 0 59 0xf04 - 0 60 0xf04 0 61 0xf04 0 62 0xf04 - 0 63 0xf04>; - qalloc-by-id; - }; - qpend-2 { - qrange = <544 16>; - interrupts = <0 64 0xf04 0 65 0xf04 0 66 0xf04 - 0 59 0xf04 0 68 0xf04 0 69 0xf04 - 0 70 0xf04 0 71 0xf04 0 72 0xf04 - 0 73 0xf04 0 74 0xf04 0 75 0xf04 - 0 76 0xf04 0 77 0xf04 0 78 0xf04 - 0 79 0xf04>; - }; - }; - general-purpose { - gp-0 { - qrange = <4000 64>; - }; - netcp-tx { - qrange = <896 128>; - qalloc-by-id; - }; - }; - }; - descriptor-regions { - #address-cells = <1>; - #size-cells = <1>; - ranges; - region-12 { - id = <12>; - region-spec = <8192 128>; /* num_desc desc_size */ - link-index = <0x4000>; - }; - }; -}; /* qmss */ - -knav_dmas: knav_dmas@0 { - compatible = "ti,keystone-navigator-dma"; - clocks = <&papllclk>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - ti,navigator-cloud-address = <0x23a80000 0x23a90000 - 0x23a80000 0x23a90000>; - - dma_gbe: dma_gbe@0 { - reg = <0x24186000 0x100>, - <0x24187000 0x2a0>, - <0x24188000 0xb60>, - <0x24186100 0x80>, - <0x24189000 0x1000>; - reg-names = "global", "txchan", "rxchan", - "txsched", "rxflow"; - }; -}; - -netcp: netcp@24000000 { - reg = <0x2620110 0x8>; - reg-names = "efuse"; - compatible = "ti,netcp-1.0"; - #address-cells = <1>; - #size-cells = <1>; - - /* NetCP address range */ - ranges = <0 0x24000000 0x1000000>; - - clocks = <&papllclk>, <&clkcpgmac>, <&chipclk12>; - dma-coherent; - - ti,navigator-dmas = <&dma_gbe 0>, - <&dma_gbe 8>, - <&dma_gbe 0>; - ti,navigator-dma-names = "netrx0", "netrx1", "nettx"; - - netcp-devices { - #address-cells = <1>; - #size-cells = <1>; - ranges; - gbe@200000 { /* ETHSS */ - label = "netcp-gbe"; - compatible = "ti,netcp-gbe-9"; - reg = <0x200000 0x900>, <0x220000 0x20000>; - /* enable-ale; */ - tx-queue = <896>; - tx-channel = "nettx"; - - interfaces { - gbe0: interface-0 { - slave-port = <0>; - link-interface = <1>; - phy-handle = <ðphy0>; - }; - gbe1: interface-1 { - slave-port = <1>; - link-interface = <1>; - phy-handle = <ðphy1>; - }; - }; - - secondary-slave-ports { - port-2 { - slave-port = <2>; - link-interface = <2>; - }; - port-3 { - slave-port = <3>; - link-interface = <2>; - }; - port-4 { - slave-port = <4>; - link-interface = <2>; - }; - port-5 { - slave-port = <5>; - link-interface = <2>; - }; - port-6 { - slave-port = <6>; - link-interface = <2>; - }; - port-7 { - slave-port = <7>; - link-interface = <2>; - }; - }; - }; - }; - - netcp-interfaces { - interface-0 { - rx-channel = "netrx0"; - rx-pool = <1024 12>; - tx-pool = <1024 12>; - rx-queue-depth = <128 128 0 0>; - rx-buffer-size = <1518 4096 0 0>; - rx-queue = <528>; - tx-completion-queue = <530>; - efuse-mac = <1>; - netcp-gbe = <&gbe0>; - - }; - interface-1 { - rx-channel = "netrx1"; - rx-pool = <1024 12>; - tx-pool = <1024 12>; - rx-queue-depth = <128 128 0 0>; - rx-buffer-size = <1518 4096 0 0>; - rx-queue = <529>; - tx-completion-queue = <531>; - efuse-mac = <0>; - local-mac-address = [02 18 31 7e 3e 00]; - netcp-gbe = <&gbe1>; - }; - }; -}; diff --git a/arch/arm/dts/keystone-k2e.dtsi b/arch/arm/dts/keystone-k2e.dtsi deleted file mode 100644 index 449cddcb814..00000000000 --- a/arch/arm/dts/keystone-k2e.dtsi +++ /dev/null @@ -1,144 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Keystone 2 Edison soc device tree - * - * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ - */ - -/ { - cpus { - #address-cells = <1>; - #size-cells = <0>; - - interrupt-parent = <&gic>; - - cpu@0 { - compatible = "arm,cortex-a15"; - device_type = "cpu"; - reg = <0>; - }; - - cpu@1 { - compatible = "arm,cortex-a15"; - device_type = "cpu"; - reg = <1>; - }; - - cpu@2 { - compatible = "arm,cortex-a15"; - device_type = "cpu"; - reg = <2>; - }; - - cpu@3 { - compatible = "arm,cortex-a15"; - device_type = "cpu"; - reg = <3>; - }; - }; - - soc { - /include/ "keystone-k2e-clocks.dtsi" - - usb: usb@2680000 { - interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>; - usb@2690000 { - interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>; - }; - }; - - usb1_phy: usb_phy@2620750 { - compatible = "ti,keystone-usbphy"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x2620750 24>; - status = "disabled"; - }; - - usb1: usb@25000000 { - compatible = "ti,keystone-dwc3"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x25000000 0x10000>; - clocks = <&clkusb1>; - clock-names = "usb"; - interrupts = <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>; - ranges; - dma-coherent; - dma-ranges; - status = "disabled"; - - usb@25010000 { - compatible = "synopsys,dwc3"; - reg = <0x25010000 0x70000>; - interrupts = <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>; - usb-phy = <&usb1_phy>, <&usb1_phy>; - }; - }; - - dspgpio0: keystone_dsp_gpio@02620240 { - compatible = "ti,keystone-dsp-gpio"; - gpio-controller; - #gpio-cells = <2>; - gpio,syscon-dev = <&devctrl 0x240>; - }; - - pcie1: pcie@21020000 { - compatible = "ti,keystone-pcie","snps,dw-pcie"; - clocks = <&clkpcie1>; - clock-names = "pcie"; - #address-cells = <3>; - #size-cells = <2>; - reg = <0x21021000 0x2000>, <0x21020000 0x1000>, <0x02620128 4>; - ranges = <0x81000000 0 0 0x23260000 0x4000 0x4000 - 0x82000000 0 0x60000000 0x60000000 0 0x10000000>; - - status = "disabled"; - device_type = "pci"; - num-lanes = <2>; - - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 7>; - interrupt-map = <0 0 0 1 &pcie_intc1 0>, /* INT A */ - <0 0 0 2 &pcie_intc1 1>, /* INT B */ - <0 0 0 3 &pcie_intc1 2>, /* INT C */ - <0 0 0 4 &pcie_intc1 3>; /* INT D */ - - pcie_msi_intc1: msi-interrupt-controller { - interrupt-controller; - #interrupt-cells = <1>; - interrupt-parent = <&gic>; - interrupts = <GIC_SPI 377 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 378 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 379 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 380 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 381 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 382 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 383 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 384 IRQ_TYPE_EDGE_RISING>; - }; - - pcie_intc1: legacy-interrupt-controller { - interrupt-controller; - #interrupt-cells = <1>; - interrupt-parent = <&gic>; - interrupts = <GIC_SPI 373 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 374 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 375 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 376 IRQ_TYPE_EDGE_RISING>; - }; - }; - - mdio: mdio@24200f00 { - compatible = "ti,keystone_mdio", "ti,davinci_mdio"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x24200f00 0x100>; - status = "disabled"; - clocks = <&clkcpgmac>; - clock-names = "fck"; - bus_freq = <2500000>; - }; - /include/ "keystone-k2e-netcp.dtsi" - }; -}; diff --git a/arch/arm/dts/keystone-k2g-evm-u-boot.dtsi b/arch/arm/dts/keystone-k2g-evm-u-boot.dtsi index 72b67b232dd..19c78c97ae3 100644 --- a/arch/arm/dts/keystone-k2g-evm-u-boot.dtsi +++ b/arch/arm/dts/keystone-k2g-evm-u-boot.dtsi @@ -4,20 +4,34 @@ */ /{ - soc { - bootph-all; - }; aliases { usb0 = &usb0; usb1 = &usb1; }; + + chosen { + stdout-path = &uart0; + }; +}; + +&soc0 { + bootph-all; + + pmmc@2900000 { + bootph-all; + compatible = "ti,power-processor"; + reg = <0x02900000 0x40000>; + ti,lpsc_module = <1>; + }; }; &i2c0 { + status = "okay"; bootph-all; }; &i2c1 { + status = "okay"; bootph-all; }; diff --git a/arch/arm/dts/keystone-k2g-evm.dts b/arch/arm/dts/keystone-k2g-evm.dts deleted file mode 100644 index 491fdc4b046..00000000000 --- a/arch/arm/dts/keystone-k2g-evm.dts +++ /dev/null @@ -1,148 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for K2G EVM - * - * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/ - */ -/dts-v1/; - -#include "keystone-k2g.dtsi" - -/ { - compatible = "ti,k2g-evm","ti,keystone"; - model = "Texas Instruments K2G General Purpose EVM"; - - chosen { - stdout-path = &uart0; - }; - - memory@80000000 { - device_type = "memory"; - reg = <0x80000000 0x80000000>; - }; -}; - -&mdio { - status = "okay"; - ethphy0: ethernet-phy@0 { - reg = <0>; - }; -}; - -&keystone_usb0 { - status = "okay"; -}; - -&usb0_phy { - status = "okay"; -}; - -&usb0 { - dr_mode = "host"; - status = "okay"; -}; - -&keystone_usb1 { - status = "okay"; -}; - -&usb1_phy { - status = "okay"; -}; - -&usb1 { - dr_mode = "peripheral"; - status = "okay"; -}; - -&gbe0 { - phy-handle = <ðphy0>; -}; - -&netcp { - status = "okay"; -}; - -&spi1 { - status = "okay"; - - spi_nor: flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "jedec,spi-nor"; - spi-max-frequency = <50000000>; - m25p,fast-read; - reg = <0>; - - partition@0 { - label = "u-boot-spl"; - reg = <0x0 0x80000>; - read-only; - }; - - partition@1 { - label = "misc"; - reg = <0x80000 0xf80000>; - }; - }; -}; - -&qspi { - status = "okay"; - - flash0: flash@0 { - compatible = "s25fl512s", "jedec,spi-nor"; - reg = <0>; - spi-tx-bus-width = <1>; - spi-rx-bus-width = <4>; - spi-max-frequency = <96000000>; - #address-cells = <1>; - #size-cells = <1>; - cdns,tshsl-ns = <392>; - cdns,tsd2d-ns = <392>; - cdns,tchsh-ns = <100>; - cdns,tslch-ns = <100>; - block-size = <18>; - - partition@0 { - label = "QSPI.u-boot-spl-os"; - reg = <0x00000000 0x00100000>; - }; - partition@1 { - label = "QSPI.u-boot-env"; - reg = <0x00100000 0x00040000>; - }; - partition@2 { - label = "QSPI.skern"; - reg = <0x00140000 0x0040000>; - }; - partition@3 { - label = "QSPI.pmmc-firmware"; - reg = <0x00180000 0x0040000>; - }; - partition@4 { - label = "QSPI.kernel"; - reg = <0x001C0000 0x0800000>; - }; - partition@5 { - label = "QSPI.file-system"; - reg = <0x009C0000 0x3640000>; - }; - }; -}; - -&mmc0 { - status = "okay"; -}; - -&mmc1 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; -}; - -&i2c1 { - status = "okay"; -}; diff --git a/arch/arm/dts/keystone-k2g-generic-u-boot.dtsi b/arch/arm/dts/keystone-k2g-generic-u-boot.dtsi deleted file mode 100644 index 3634ed7268c..00000000000 --- a/arch/arm/dts/keystone-k2g-generic-u-boot.dtsi +++ /dev/null @@ -1,18 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ - */ - -/{ - soc { - bootph-all; - }; -}; - -&i2c0 { - bootph-all; -}; - -&i2c1 { - bootph-all; -}; diff --git a/arch/arm/dts/keystone-k2g-generic.dts b/arch/arm/dts/keystone-k2g-generic.dts deleted file mode 100644 index dc6c31a31b4..00000000000 --- a/arch/arm/dts/keystone-k2g-generic.dts +++ /dev/null @@ -1,27 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Device Tree Source for Generic 66AK2G0X EVM - * - * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ - */ - -/dts-v1/; - -#include "keystone-k2g.dtsi" - -/ { - compatible = "ti,k2g-generic", "ti,k2g", "ti,keystone"; - model = "Texas Instruments 66AK2G02 Generic"; - - chosen { - stdout-path = &uart0; - }; -}; - -&i2c0 { - status = "okay"; -}; - -&i2c1 { - status = "okay"; -}; diff --git a/arch/arm/dts/keystone-k2g-ice-u-boot.dtsi b/arch/arm/dts/keystone-k2g-ice-u-boot.dtsi index 3634ed7268c..152744686b5 100644 --- a/arch/arm/dts/keystone-k2g-ice-u-boot.dtsi +++ b/arch/arm/dts/keystone-k2g-ice-u-boot.dtsi @@ -4,15 +4,28 @@ */ /{ - soc { + chosen { + stdout-path = &uart0; + }; +}; + +&soc0 { + bootph-all; + + pmmc@2900000 { bootph-all; + compatible = "ti,power-processor"; + reg = <0x02900000 0x40000>; + ti,lpsc_module = <1>; }; }; &i2c0 { + status = "okay"; bootph-all; }; &i2c1 { + status = "okay"; bootph-all; }; diff --git a/arch/arm/dts/keystone-k2g-ice.dts b/arch/arm/dts/keystone-k2g-ice.dts deleted file mode 100644 index b898ae668a9..00000000000 --- a/arch/arm/dts/keystone-k2g-ice.dts +++ /dev/null @@ -1,118 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for K2G Industrial Communication Engine EVM - * - * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ - */ -/dts-v1/; - -#include "keystone-k2g.dtsi" -#include <dt-bindings/net/ti-dp83867.h> - -/ { - compatible = "ti,k2g-ice", "ti,k2g", "ti,keystone"; - model = "Texas Instruments K2G Industrial Communication EVM"; - - chosen { - stdout-path = &uart0; - }; - - memory@80000000 { - device_type = "memory"; - reg = <0x80000000 0x20000000>; - }; -}; - -&mmc1 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; -}; - -&i2c1 { - status = "okay"; -}; - -&qspi { - status = "okay"; - - flash0: flash@0 { - compatible = "s25fl256s1", "jedec,spi-nor"; - reg = <0>; - spi-tx-bus-width = <1>; - spi-rx-bus-width = <4>; - spi-max-frequency = <96000000>; - #address-cells = <1>; - #size-cells = <1>; - cdns,read-delay = <5>; - cdns,tshsl-ns = <500>; - cdns,tsd2d-ns = <500>; - cdns,tchsh-ns = <119>; - cdns,tslch-ns = <119>; - - partition@0 { - label = "QSPI.u-boot"; - reg = <0x00000000 0x00100000>; - }; - partition@1 { - label = "QSPI.u-boot-env"; - reg = <0x00100000 0x00040000>; - }; - partition@2 { - label = "QSPI.skern"; - reg = <0x00140000 0x0040000>; - }; - partition@3 { - label = "QSPI.pmmc-firmware"; - reg = <0x00180000 0x0040000>; - }; - partition@4 { - label = "QSPI.kernel"; - reg = <0x001c0000 0x0800000>; - }; - partition@5 { - label = "QSPI.u-boot-spl-os"; - reg = <0x009c0000 0x0040000>; - }; - partition@6 { - label = "QSPI.file-system"; - reg = <0x00a00000 0x1600000>; - }; - }; -}; - -&qmss { - status = "okay"; -}; - -&knav_dmas { - status = "okay"; -}; - -&netcp { - pinctrl-names = "default"; - //pinctrl-0 = <&emac_pins>; - status = "okay"; -}; - -&mdio { - pinctrl-names = "default"; - //pinctrl-0 = <&mdio_pins>; - status = "okay"; - ethphy0: ethernet-phy@0 { - reg = <0>; - ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; - ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>; - ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>; - ti,min-output-impedance; - ti,dp83867-rxctrl-strap-quirk; - }; -}; - -&gbe0 { - phy-handle = <ðphy0>; - phy-mode = "rgmii-id"; - status = "okay"; -}; diff --git a/arch/arm/dts/keystone-k2g-netcp.dtsi b/arch/arm/dts/keystone-k2g-netcp.dtsi deleted file mode 100644 index 2afb48823c1..00000000000 --- a/arch/arm/dts/keystone-k2g-netcp.dtsi +++ /dev/null @@ -1,149 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for K2G Netcp driver - * - * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ - */ - -qmss: qmss@4020000 { - compatible = "ti,keystone-navigator-qmss-l"; - dma-coherent; - #address-cells = <1>; - #size-cells = <1>; - /* power-domains = <&k2g_pds K2G_DEV_NSS0>; */ - /* clocks = <&k2g_clks K2G_DEV_NSS0 K2G_DEV_NSS_VCLK>; */ - clock-names = "nss_vclk"; - ranges; - queue-range = <0 0x80>; - linkram0 = <0x4020000 0x7ff>; - - qmgrs { - #address-cells = <1>; - #size-cells = <1>; - ranges; - qmgr0 { - managed-queues = <0 0x80>; - reg = <0x4100000 0x800>, - <0x4040000 0x100>, - <0x4080000 0x800>, - <0x40c0000 0x800>; - reg-names = "peek", "config", - "region", "push"; - }; - - }; - queue-pools { - qpend { - qpend-0 { - qrange = <77 8>; - interrupts =<0 308 0xf04 0 309 0xf04 0 310 0xf04 - 0 311 0xf04 0 312 0xf04 0 313 0xf04 - 0 314 0xf04 0 315 0xf04>; - qalloc-by-id; - }; - }; - general-purpose { - gp-0 { - qrange = <112 8>; - }; - netcp-tx { - qrange = <5 8>; - qalloc-by-id; - }; - }; - }; - - descriptor-regions { - #address-cells = <1>; - #size-cells = <1>; - ranges; - region-12 { - id = <12>; - region-spec = <1023 128>; /* num_desc desc_size */ - link-index = <0x400>; - }; - }; -}; /* qmss */ - -knav_dmas: knav_dmas@0 { - compatible = "ti,keystone-navigator-dma"; - #address-cells = <1>; - #size-cells = <1>; - /* power-domains = <&k2g_pds K2G_DEV_NSS0>; */ - /* clocks = <&k2g_clks K2G_DEV_NSS0 K2G_DEV_NSS_VCLK>; */ - clock-names = "nss_vclk"; - ranges; - ti,navigator-cloud-address = <0x40c0000 0x40c0000 0x40c0000 0x40c0000>; - - dma_gbe: dma_gbe@0 { - reg = <0x4010000 0x100>, - <0x4011000 0x2a0>, /* 21 Tx channels */ - <0x4012000 0x400>, /* 32 Rx channels */ - <0x4010100 0x80>, - <0x4013000 0x400>; /* 32 Rx flows */ - reg-names = "global", "txchan", "rxchan", - "txsched", "rxflow"; - }; - -}; - -gbe_subsys: subsys@4200000 { - compatible = "syscon"; - reg = <0x4200000 0x100>; -}; - -netcp: netcp@4000000 { - reg = <0x2620110 0x8>; - reg-names = "efuse"; - compatible = "ti,netcp-1.0"; - #address-cells = <1>; - #size-cells = <1>; - status = "disabled"; - /* power-domains = <&k2g_pds K2G_DEV_NSS0>; */ - /* clocks = <&k2g_clks K2G_DEV_NSS0 K2G_DEV_NSS_ESW_CLK>; */ - clock-names = "ethss_clk"; - - /* NetCP address range */ - ranges = <0 0x4000000 0x1000000>; - - dma-coherent; - - ti,navigator-dmas = <&dma_gbe 0>, <&dma_gbe 5>; - ti,navigator-dma-names = "netrx0", "nettx"; - - netcp-devices { - #address-cells = <1>; - #size-cells = <1>; - ranges; - gbe@200000 { - label = "netcp-gbe"; - compatible = "ti,netcp-gbe-2"; - syscon-subsys = <&gbe_subsys>; - reg = <0x200100 0xe00>, <0x220000 0x20000>; - /* enable-ale; */ - tx-queue = <5>; - tx-channel = "nettx"; - - interfaces { - gbe0: interface-0 { - slave-port = <0>; - link-interface = <5>; - }; - }; - }; - }; - - netcp-interfaces { - interface-0 { - rx-channel = "netrx0"; - rx-pool = <512 12>; - tx-pool = <511 12>; - rx-queue-depth = <128 128 0 0>; - rx-buffer-size = <1518 4096 0 0>; - rx-queue = <77>; - tx-completion-queue = <78>; - efuse-mac = <1>; - netcp-gbe = <&gbe0>; - }; - }; -}; diff --git a/arch/arm/dts/keystone-k2g.dtsi b/arch/arm/dts/keystone-k2g.dtsi deleted file mode 100644 index 5c3ff127218..00000000000 --- a/arch/arm/dts/keystone-k2g.dtsi +++ /dev/null @@ -1,258 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for K2G SOC - * - * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/ - */ - -#include <dt-bindings/interrupt-controller/arm-gic.h> - -/ { - model = "Texas Instruments K2G SoC"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&gic>; - - chosen { }; - - aliases { - serial0 = &uart0; - spi0 = &spi0; - spi1 = &spi1; - spi2 = &spi2; - spi3 = &spi3; - spi4 = &qspi; - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - interrupt-parent = <&gic>; - - cpu@0 { - compatible = "arm,cortex-a15"; - device_type = "cpu"; - reg = <0>; - }; - }; - - gic: interrupt-controller@2561000 { - compatible = "arm,cortex-a15-gic"; - #interrupt-cells = <3>; - interrupt-controller; - reg = <0x0 0x02561000 0x0 0x1000>, - <0x0 0x02562000 0x0 0x2000>, - <0x0 0x02564000 0x0 0x1000>, - <0x0 0x02566000 0x0 0x2000>; - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | - IRQ_TYPE_LEVEL_HIGH)>; - }; - - soc { - #address-cells = <1>; - #size-cells = <1>; - compatible = "ti,keystone","simple-bus"; - interrupt-parent = <&gic>; - ranges; - - uart0: serial@02530c00 { - compatible = "ns16550a"; - current-speed = <115200>; - reg-shift = <2>; - reg-io-width = <4>; - reg = <0x02530c00 0x100>; - clock-names = "uart"; - interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>; - }; - - mdio: mdio@4200f00 { - compatible = "ti,keystone_mdio", "ti,davinci_mdio"; - #address-cells = <1>; - #size-cells = <0>; - /* power-domains = <&k2g_pds K2G_DEV_NSS0>; */ - /* clocks = <&k2g_clks K2G_DEV_NSS0 K2G_DEV_NSS_ESW_CLK>; */ - clock-names = "fck"; - reg = <0x04200f00 0x100>; - status = "disabled"; - bus_freq = <2500000>; - }; - - qspi: qspi@2940000 { - compatible = "cdns,qspi-nor"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x02940000 0x1000>, - <0x24000000 0x4000000>; - interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>; - num-cs = <4>; - cdns,fifo-depth = <256>; - cdns,fifo-width = <4>; - cdns,trigger-address = <0x24000000>; - status = "disabled"; - }; - - #include "keystone-k2g-netcp.dtsi" - - pmmc: pmmc@2900000 { - compatible = "ti,power-processor"; - reg = <0x02900000 0x40000>; - ti,lpsc_module = <1>; - }; - - spi0: spi@21805400 { - compatible = "ti,keystone-spi", "ti,dm6441-spi"; - reg = <0x21805400 0x200>; - num-cs = <4>; - ti,davinci-spi-intr-line = <0>; - interrupts = <GIC_SPI 64 IRQ_TYPE_EDGE_RISING>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi1: spi@21805800 { - compatible = "ti,keystone-spi", "ti,dm6441-spi"; - reg = <0x21805800 0x200>; - num-cs = <4>; - ti,davinci-spi-intr-line = <0>; - interrupts = <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi2: spi@21805c00 { - compatible = "ti,keystone-spi", "ti,dm6441-spi"; - reg = <0x21805C00 0x200>; - num-cs = <4>; - ti,davinci-spi-intr-line = <0>; - interrupts = <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi3: spi@21806000 { - compatible = "ti,keystone-spi", "ti,dm6441-spi"; - reg = <0x21806000 0x200>; - num-cs = <4>; - ti,davinci-spi-intr-line = <0>; - interrupts = <GIC_SPI 70 IRQ_TYPE_EDGE_RISING>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - i2c0: i2c@2530000 { - compatible = "ti,keystone-i2c"; - reg = <0x02530000 0x400>; - clock-frequency = <100000>; - interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c1: i2c@2530400 { - compatible = "ti,keystone-i2c"; - reg = <0x02530400 0x400>; - clock-frequency = <100000>; - interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c2: i2c@2530800 { - compatible = "ti,keystone-i2c"; - reg = <0x02530800 0x400>; - clock-frequency = <100000>; - interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - mmc0: mmc@23000000 { - compatible = "ti,omap4-hsmmc"; - reg = <0x23000000 0x400>; - interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>; - bus-width = <4>; - ti,needs-special-reset; - no-1-8-v; - max-frequency = <96000000>; - status = "disabled"; - }; - - mmc1: mmc@23100000 { - compatible = "ti,omap4-hsmmc"; - reg = <0x23100000 0x400>; - interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>; - bus-width = <8>; - ti,needs-special-reset; - ti,non-removable; - max-frequency = <96000000>; - status = "disabled"; - clock-names = "fck"; - }; - - usb0_phy: usb-phy@0 { - compatible = "usb-nop-xceiv"; - status = "disabled"; - }; - - keystone_usb0: keystone-dwc3@2680000 { - compatible = "ti,keystone-dwc3"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x2680000 0x10000>; - interrupts = <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>; - ranges; - dma-coherent; - dma-ranges; - status = "disabled"; - /*power-domains = <&k2g_pds 0x0016>;*/ - - usb0: usb@2690000 { - compatible = "snps,dwc3"; - reg = <0x2690000 0x10000>; - interrupts = <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>; - maximum-speed = "high-speed"; - dr_mode = "otg"; - /*usb-phy = <&usb0_phy>;*/ - status = "disabled"; - }; - }; - - usb1_phy: usb-phy@1 { - compatible = "usb-nop-xceiv"; - status = "disabled"; - }; - - keystone_usb1: keystone-dwc3@2580000 { - compatible = "ti,keystone-dwc3"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x2580000 0x10000>; - interrupts = <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>; - ranges; - dma-coherent; - dma-ranges; - status = "disabled"; - /*power-domains = <&k2g_pds 0x0017>;*/ - - usb1: usb@2590000 { - compatible = "snps,dwc3"; - reg = <0x2590000 0x10000>; - interrupts = <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>; - maximum-speed = "high-speed"; - dr_mode = "otg"; - /*usb-phy = <&usb1_phy>;*/ - status = "disabled"; - }; - }; - }; -}; diff --git a/arch/arm/dts/keystone-k2hk-clocks.dtsi b/arch/arm/dts/keystone-k2hk-clocks.dtsi deleted file mode 100644 index 3ca4722087c..00000000000 --- a/arch/arm/dts/keystone-k2hk-clocks.dtsi +++ /dev/null @@ -1,422 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Keystone 2 Kepler/Hawking SoC clock nodes - * - * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ - */ - -clocks { - armpllclk: armpllclk@2620370 { - #clock-cells = <0>; - compatible = "ti,keystone,pll-clock"; - clocks = <&refclkarm>; - clock-output-names = "arm-pll-clk"; - reg = <0x02620370 4>; - reg-names = "control"; - }; - - mainpllclk: mainpllclk@2310110 { - #clock-cells = <0>; - compatible = "ti,keystone,main-pll-clock"; - clocks = <&refclksys>; - reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>; - reg-names = "control", "multiplier", "post-divider"; - }; - - papllclk: papllclk@2620358 { - #clock-cells = <0>; - compatible = "ti,keystone,pll-clock"; - clocks = <&refclkpass>; - clock-output-names = "papllclk"; - reg = <0x02620358 4>; - reg-names = "control"; - }; - - ddr3apllclk: ddr3apllclk@2620360 { - #clock-cells = <0>; - compatible = "ti,keystone,pll-clock"; - clocks = <&refclkddr3a>; - clock-output-names = "ddr-3a-pll-clk"; - reg = <0x02620360 4>; - reg-names = "control"; - }; - - ddr3bpllclk: ddr3bpllclk@2620368 { - #clock-cells = <0>; - compatible = "ti,keystone,pll-clock"; - clocks = <&refclkddr3b>; - clock-output-names = "ddr-3b-pll-clk"; - reg = <0x02620368 4>; - reg-names = "control"; - }; - - clktsip: clktsip@2350000 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk16>; - clock-output-names = "tsip"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clksrio: clksrio@235002c { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk1rstiso13>; - clock-output-names = "srio"; - reg = <0x0235002c 0xb00>, <0x02350010 0x400>; - reg-names = "control", "domain"; - domain-id = <4>; - }; - - clkhyperlink0: clkhyperlink0@2350030 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk12>; - clock-output-names = "hyperlink-0"; - reg = <0x02350030 0xb00>, <0x02350014 0x400>; - reg-names = "control", "domain"; - domain-id = <5>; - }; - - clkgem1: clkgem1@2350040 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk1>; - clock-output-names = "gem1"; - reg = <0x02350040 0xb00>, <0x02350024 0x400>; - reg-names = "control", "domain"; - domain-id = <9>; - }; - - clkgem2: clkgem2@2350044 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk1>; - clock-output-names = "gem2"; - reg = <0x02350044 0xb00>, <0x02350028 0x400>; - reg-names = "control", "domain"; - domain-id = <10>; - }; - - clkgem3: clkgem3@2350048 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk1>; - clock-output-names = "gem3"; - reg = <0x02350048 0xb00>, <0x0235002c 0x400>; - reg-names = "control", "domain"; - domain-id = <11>; - }; - - clkgem4: clkgem4@235004c { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk1>; - clock-output-names = "gem4"; - reg = <0x0235004c 0xb00>, <0x02350030 0x400>; - reg-names = "control", "domain"; - domain-id = <12>; - }; - - clkgem5: clkgem5@2350050 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk1>; - clock-output-names = "gem5"; - reg = <0x02350050 0xb00>, <0x02350034 0x400>; - reg-names = "control", "domain"; - domain-id = <13>; - }; - - clkgem6: clkgem6@2350054 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk1>; - clock-output-names = "gem6"; - reg = <0x02350054 0xb00>, <0x02350038 0x400>; - reg-names = "control", "domain"; - domain-id = <14>; - }; - - clkgem7: clkgem7@2350058 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk1>; - clock-output-names = "gem7"; - reg = <0x02350058 0xb00>, <0x0235003c 0x400>; - reg-names = "control", "domain"; - domain-id = <15>; - }; - - clkddr31: clkddr31@2350060 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "ddr3-1"; - reg = <0x02350060 0xb00>, <0x02350040 0x400>; - reg-names = "control", "domain"; - domain-id = <16>; - }; - - clktac: clktac@2350064 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "tac"; - reg = <0x02350064 0xb00>, <0x02350044 0x400>; - reg-names = "control", "domain"; - domain-id = <17>; - }; - - clkrac01: clkrac01@2350068 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "rac-01"; - reg = <0x02350068 0xb00>, <0x02350044 0x400>; - reg-names = "control", "domain"; - domain-id = <17>; - }; - - clkrac23: clkrac23@235006c { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "rac-23"; - reg = <0x0235006c 0xb00>, <0x02350048 0x400>; - reg-names = "control", "domain"; - domain-id = <18>; - }; - - clkfftc0: clkfftc0@2350070 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "fftc-0"; - reg = <0x02350070 0xb00>, <0x0235004c 0x400>; - reg-names = "control", "domain"; - domain-id = <19>; - }; - - clkfftc1: clkfftc1@2350074 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "fftc-1"; - reg = <0x02350074 0xb00>, <0x0235004c 0x400>; - reg-names = "control", "domain"; - domain-id = <19>; - }; - - clkfftc2: clkfftc2@2350078 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "fftc-2"; - reg = <0x02350078 0xb00>, <0x02350050 0x400>; - reg-names = "control", "domain"; - domain-id = <20>; - }; - - clkfftc3: clkfftc3@235007c { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "fftc-3"; - reg = <0x0235007c 0xb00>, <0x02350050 0x400>; - reg-names = "control", "domain"; - domain-id = <20>; - }; - - clkfftc4: clkfftc4@2350080 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "fftc-4"; - reg = <0x02350080 0xb00>, <0x02350050 0x400>; - reg-names = "control", "domain"; - domain-id = <20>; - }; - - clkfftc5: clkfftc5@2350084 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "fftc-5"; - reg = <0x02350084 0xb00>, <0x02350050 0x400>; - reg-names = "control", "domain"; - domain-id = <20>; - }; - - clkaif: clkaif@2350088 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "aif"; - reg = <0x02350088 0xb00>, <0x02350054 0x400>; - reg-names = "control", "domain"; - domain-id = <21>; - }; - - clktcp3d0: clktcp3d0@235008c { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "tcp3d-0"; - reg = <0x0235008c 0xb00>, <0x02350058 0x400>; - reg-names = "control", "domain"; - domain-id = <22>; - }; - - clktcp3d1: clktcp3d1@2350090 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "tcp3d-1"; - reg = <0x02350090 0xb00>, <0x02350058 0x400>; - reg-names = "control", "domain"; - domain-id = <22>; - }; - - clktcp3d2: clktcp3d2@2350094 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "tcp3d-2"; - reg = <0x02350094 0xb00>, <0x0235005c 0x400>; - reg-names = "control", "domain"; - domain-id = <23>; - }; - - clktcp3d3: clktcp3d3@2350098 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "tcp3d-3"; - reg = <0x02350098 0xb00>, <0x0235005c 0x400>; - reg-names = "control", "domain"; - domain-id = <23>; - }; - - clkvcp0: clkvcp0@235009c { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "vcp-0"; - reg = <0x0235009c 0xb00>, <0x02350060 0x400>; - reg-names = "control", "domain"; - domain-id = <24>; - }; - - clkvcp1: clkvcp1@23500a0 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "vcp-1"; - reg = <0x023500a0 0xb00>, <0x02350060 0x400>; - reg-names = "control", "domain"; - domain-id = <24>; - }; - - clkvcp2: clkvcp2@23500a4 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "vcp-2"; - reg = <0x023500a4 0xb00>, <0x02350060 0x400>; - reg-names = "control", "domain"; - domain-id = <24>; - }; - - clkvcp3: clkvcp3@23500a8 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "vcp-3"; - reg = <0x023500a8 0xb00>, <0x02350060 0x400>; - reg-names = "control", "domain"; - domain-id = <24>; - }; - - clkvcp4: clkvcp4@23500ac { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "vcp-4"; - reg = <0x023500ac 0xb00>, <0x02350064 0x400>; - reg-names = "control", "domain"; - domain-id = <25>; - }; - - clkvcp5: clkvcp5@23500b0 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "vcp-5"; - reg = <0x023500b0 0xb00>, <0x02350064 0x400>; - reg-names = "control", "domain"; - domain-id = <25>; - }; - - clkvcp6: clkvcp6@23500b4 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "vcp-6"; - reg = <0x023500b4 0xb00>, <0x02350064 0x400>; - reg-names = "control", "domain"; - domain-id = <25>; - }; - - clkvcp7: clkvcp7@23500b8 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "vcp-7"; - reg = <0x023500b8 0xb00>, <0x02350064 0x400>; - reg-names = "control", "domain"; - domain-id = <25>; - }; - - clkbcp: clkbcp@23500bc { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "bcp"; - reg = <0x023500bc 0xb00>, <0x02350068 0x400>; - reg-names = "control", "domain"; - domain-id = <26>; - }; - - clkdxb: clkdxb@23500c0 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "dxb"; - reg = <0x023500c0 0xb00>, <0x0235006c 0x400>; - reg-names = "control", "domain"; - domain-id = <27>; - }; - - clkhyperlink1: clkhyperlink1@23500c4 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk12>; - clock-output-names = "hyperlink-1"; - reg = <0x023500c4 0xb00>, <0x02350070 0x400>; - reg-names = "control", "domain"; - domain-id = <28>; - }; - - clkxge: clkxge@23500c8 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "xge"; - reg = <0x023500c8 0xb00>, <0x02350074 0x400>; - reg-names = "control", "domain"; - domain-id = <29>; - }; -}; diff --git a/arch/arm/dts/keystone-k2hk-evm-u-boot.dtsi b/arch/arm/dts/keystone-k2hk-evm-u-boot.dtsi index 3e38f228a6a..3b3d327562c 100644 --- a/arch/arm/dts/keystone-k2hk-evm-u-boot.dtsi +++ b/arch/arm/dts/keystone-k2hk-evm-u-boot.dtsi @@ -4,9 +4,19 @@ */ /{ - soc { - bootph-all; + aliases { + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; }; + + chosen { + stdout-path = &uart0; + }; +}; + +&soc0 { + bootph-all; }; &i2c1 { @@ -18,11 +28,9 @@ psc-domain = <2>; }; -&usb { - dwc3@2690000 { - phys = <&usb_phy>; - dr_mode = "host"; - snps,u2ss_inp3_quirk; - status = "okay"; - }; +&usb0 { + phys = <&usb_phy>; + dr_mode = "host"; + snps,u2ss_inp3_quirk; + status = "okay"; }; diff --git a/arch/arm/dts/keystone-k2hk-evm.dts b/arch/arm/dts/keystone-k2hk-evm.dts deleted file mode 100644 index 6222876f277..00000000000 --- a/arch/arm/dts/keystone-k2hk-evm.dts +++ /dev/null @@ -1,180 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Keystone 2 Kepler/Hawking EVM device tree - * - * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ - */ -/dts-v1/; - -#include "keystone.dtsi" -#include "keystone-k2hk.dtsi" - -/ { - compatible = "ti,k2hk-evm","ti,keystone"; - model = "Texas Instruments Keystone 2 Kepler/Hawking EVM"; - - soc { - clocks { - refclksys: refclksys { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <122880000>; - clock-output-names = "refclk-sys"; - }; - - refclkpass: refclkpass { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <122880000>; - clock-output-names = "refclk-pass"; - }; - - refclkarm: refclkarm { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "refclk-arm"; - }; - - refclkddr3a: refclkddr3a { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <100000000>; - clock-output-names = "refclk-ddr3a"; - }; - - refclkddr3b: refclkddr3b { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <100000000>; - clock-output-names = "refclk-ddr3b"; - }; - }; - }; - - leds { - compatible = "gpio-leds"; - led-debug-1-1 { - label = "keystone:green:debug1"; - gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; /* 12 */ - }; - - led-debug-1-2 { - label = "keystone:red:debug1"; - gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; /* 13 */ - }; - - led-debug-2 { - label = "keystone:blue:debug2"; - gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; /* 14 */ - }; - - led-debug-3 { - label = "keystone:blue:debug3"; - gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; /* 15 */ - }; - }; -}; - -&usb_phy { - status = "okay"; -}; - -&usb { - status = "okay"; -}; - -&aemif { - cs0 { - #address-cells = <2>; - #size-cells = <1>; - clock-ranges; - ranges; - - ti,cs-chipselect = <0>; - /* all timings in nanoseconds */ - ti,cs-min-turnaround-ns = <12>; - ti,cs-read-hold-ns = <6>; - ti,cs-read-strobe-ns = <23>; - ti,cs-read-setup-ns = <9>; - ti,cs-write-hold-ns = <8>; - ti,cs-write-strobe-ns = <23>; - ti,cs-write-setup-ns = <8>; - - nand@0,0 { - compatible = "ti,keystone-nand","ti,davinci-nand"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0 0 0x4000000 - 1 0 0x0000100>; - - ti,davinci-chipselect = <0>; - ti,davinci-mask-ale = <0x2000>; - ti,davinci-mask-cle = <0x4000>; - ti,davinci-mask-chipsel = <0>; - nand-ecc-mode = "hw"; - ti,davinci-ecc-bits = <4>; - nand-on-flash-bbt; - - partition@0 { - label = "u-boot"; - reg = <0x0 0x100000>; - read-only; - }; - - partition@100000 { - label = "params"; - reg = <0x100000 0x80000>; - read-only; - }; - - partition@180000 { - label = "ubifs"; - reg = <0x180000 0x1fe80000>; - }; - }; - }; -}; - -&i2c0 { - dtt@50 { - compatible = "at,24c1024"; - reg = <0x50>; - }; -}; - -&spi0 { - status = "okay"; - nor_flash: flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "Micron,n25q128a11", "jedec,spi-nor"; - spi-max-frequency = <54000000>; - m25p,fast-read; - reg = <0>; - - partition@0 { - label = "u-boot-spl"; - reg = <0x0 0x80000>; - read-only; - }; - - partition@1 { - label = "misc"; - reg = <0x80000 0xf80000>; - }; - }; -}; - -&mdio { - status = "okay"; - ethphy0: ethernet-phy@0 { - compatible = "marvell,88E1111", "ethernet-phy-ieee802.3-c22"; - reg = <0>; - }; - - ethphy1: ethernet-phy@1 { - compatible = "marvell,88E1111", "ethernet-phy-ieee802.3-c22"; - reg = <1>; - }; -}; diff --git a/arch/arm/dts/keystone-k2hk-netcp.dtsi b/arch/arm/dts/keystone-k2hk-netcp.dtsi deleted file mode 100644 index 3f8c4c263a2..00000000000 --- a/arch/arm/dts/keystone-k2hk-netcp.dtsi +++ /dev/null @@ -1,207 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for Keystone 2 Hawking Netcp driver - * - * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/ - */ - -qmss: qmss@2a40000 { - compatible = "ti,keystone-navigator-qmss"; - dma-coherent; - #address-cells = <1>; - #size-cells = <1>; - clocks = <&chipclk13>; - ranges; - queue-range = <0 0x4000>; - linkram0 = <0x100000 0x8000>; - linkram1 = <0x0 0x10000>; - - qmgrs { - #address-cells = <1>; - #size-cells = <1>; - ranges; - qmgr0 { - managed-queues = <0 0x2000>; - reg = <0x2a40000 0x20000>, - <0x2a06000 0x400>, - <0x2a02000 0x1000>, - <0x2a03000 0x1000>, - <0x23a80000 0x20000>, - <0x2a80000 0x20000>; - reg-names = "peek", "status", "config", - "region", "push", "pop"; - }; - - qmgr1 { - managed-queues = <0x2000 0x2000>; - reg = <0x2a60000 0x20000>, - <0x2a06400 0x400>, - <0x2a04000 0x1000>, - <0x2a05000 0x1000>, - <0x23aa0000 0x20000>, - <0x2aa0000 0x20000>; - reg-names = "peek", "status", "config", - "region", "push", "pop"; - }; - }; - - queue-pools { - qpend { - qpend-0 { - qrange = <658 8>; - interrupts =<0 40 0xf04 0 41 0xf04 0 42 0xf04 - 0 43 0xf04 0 44 0xf04 0 45 0xf04 - 0 46 0xf04 0 47 0xf04>; - }; - qpend-1 { - qrange = <8704 16>; - interrupts = <0 48 0xf04 0 49 0xf04 0 50 0xf04 - 0 51 0xf04 0 52 0xf04 0 53 0xf04 - 0 54 0xf04 0 55 0xf04 0 56 0xf04 - 0 57 0xf04 0 58 0xf04 0 59 0xf04 - 0 60 0xf04 0 61 0xf04 0 62 0xf04 - 0 63 0xf04>; - qalloc-by-id; - }; - qpend-2 { - qrange = <8720 16>; - interrupts = <0 64 0xf04 0 65 0xf04 0 66 0xf04 - 0 59 0xf04 0 68 0xf04 0 69 0xf04 - 0 70 0xf04 0 71 0xf04 0 72 0xf04 - 0 73 0xf04 0 74 0xf04 0 75 0xf04 - 0 76 0xf04 0 77 0xf04 0 78 0xf04 - 0 79 0xf04>; - }; - }; - general-purpose { - gp-0 { - qrange = <4000 64>; - }; - netcp-tx { - qrange = <640 9>; - qalloc-by-id; - }; - netcpx-tx { - qrange = <8752 8>; - qalloc-by-id; - }; - }; - }; - - descriptor-regions { - #address-cells = <1>; - #size-cells = <1>; - ranges; - region-12 { - id = <12>; - region-spec = <8192 128>; /* num_desc desc_size */ - link-index = <0x4000>; - }; - }; -}; /* qmss */ - -knav_dmas: knav_dmas@0 { - compatible = "ti,keystone-navigator-dma"; - clocks = <&papllclk>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - ti,navigator-cloud-address = <0x23a80000 0x23a90000 - 0x23aa0000 0x23ab0000>; - - dma_gbe: dma_gbe@0 { - reg = <0x2004000 0x100>, - <0x2004400 0x120>, - <0x2004800 0x300>, - <0x2004c00 0x120>, - <0x2005000 0x400>; - reg-names = "global", "txchan", "rxchan", - "txsched", "rxflow"; - }; -}; - -netcp: netcp@2000000 { - reg = <0x2620110 0x8>; - reg-names = "efuse"; - compatible = "ti,netcp-1.0"; - #address-cells = <1>; - #size-cells = <1>; - - /* NetCP address range */ - ranges = <0 0x2000000 0x100000>; - - clocks = <&papllclk>, <&clkcpgmac>, <&chipclk12>; - dma-coherent; - - ti,navigator-dmas = <&dma_gbe 22>, - <&dma_gbe 23>, - <&dma_gbe 8>; - ti,navigator-dma-names = "netrx0", "netrx1", "nettx"; - - netcp-devices { - ranges; - #address-cells = <1>; - #size-cells = <1>; - gbe@90000 { /* ETHSS */ - #address-cells = <1>; - #size-cells = <1>; - label = "netcp-gbe"; - compatible = "ti,netcp-gbe"; - reg = <0x90000 0x300>, <0x90400 0x400>, <0x90800 0x700>; - /* enable-ale; */ - tx-queue = <648>; - tx-channel = "nettx"; - - interfaces { - gbe0: interface-0 { - slave-port = <0>; - link-interface = <1>; - phy-handle = <ðphy0>; - }; - gbe1: interface-1 { - slave-port = <1>; - link-interface = <1>; - phy-handle = <ðphy1>; - }; - }; - - secondary-slave-ports { - port-2 { - slave-port = <2>; - link-interface = <2>; - }; - port-3 { - slave-port = <3>; - link-interface = <2>; - }; - }; - }; - }; - - netcp-interfaces { - interface-0 { - rx-channel = "netrx0"; - rx-pool = <1024 12>; - tx-pool = <1024 12>; - rx-queue-depth = <128 128 0 0>; - rx-buffer-size = <1518 4096 0 0>; - rx-queue = <8704>; - tx-completion-queue = <8706>; - efuse-mac = <1>; - netcp-gbe = <&gbe0>; - - }; - interface-1 { - rx-channel = "netrx1"; - rx-pool = <1024 12>; - tx-pool = <1024 12>; - rx-queue-depth = <128 128 0 0>; - rx-buffer-size = <1518 4096 0 0>; - rx-queue = <8705>; - tx-completion-queue = <8707>; - efuse-mac = <0>; - local-mac-address = [02 18 31 7e 3e 6f]; - netcp-gbe = <&gbe1>; - }; - }; -}; diff --git a/arch/arm/dts/keystone-k2hk.dtsi b/arch/arm/dts/keystone-k2hk.dtsi deleted file mode 100644 index e5ab1fbb559..00000000000 --- a/arch/arm/dts/keystone-k2hk.dtsi +++ /dev/null @@ -1,111 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Keystone 2 Kepler/Hawking soc specific device tree - * - * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ - */ - -/ { - cpus { - #address-cells = <1>; - #size-cells = <0>; - - interrupt-parent = <&gic>; - - cpu@0 { - compatible = "arm,cortex-a15"; - device_type = "cpu"; - reg = <0>; - }; - - cpu@1 { - compatible = "arm,cortex-a15"; - device_type = "cpu"; - reg = <1>; - }; - - cpu@2 { - compatible = "arm,cortex-a15"; - device_type = "cpu"; - reg = <2>; - }; - - cpu@3 { - compatible = "arm,cortex-a15"; - device_type = "cpu"; - reg = <3>; - }; - }; - - soc { - /include/ "keystone-k2hk-clocks.dtsi" - - dspgpio0: keystone_dsp_gpio@02620240 { - compatible = "ti,keystone-dsp-gpio"; - gpio-controller; - #gpio-cells = <2>; - gpio,syscon-dev = <&devctrl 0x240>; - }; - - dspgpio1: keystone_dsp_gpio@2620244 { - compatible = "ti,keystone-dsp-gpio"; - gpio-controller; - #gpio-cells = <2>; - gpio,syscon-dev = <&devctrl 0x244>; - }; - - dspgpio2: keystone_dsp_gpio@2620248 { - compatible = "ti,keystone-dsp-gpio"; - gpio-controller; - #gpio-cells = <2>; - gpio,syscon-dev = <&devctrl 0x248>; - }; - - dspgpio3: keystone_dsp_gpio@262024c { - compatible = "ti,keystone-dsp-gpio"; - gpio-controller; - #gpio-cells = <2>; - gpio,syscon-dev = <&devctrl 0x24c>; - }; - - dspgpio4: keystone_dsp_gpio@2620250 { - compatible = "ti,keystone-dsp-gpio"; - gpio-controller; - #gpio-cells = <2>; - gpio,syscon-dev = <&devctrl 0x250>; - }; - - dspgpio5: keystone_dsp_gpio@2620254 { - compatible = "ti,keystone-dsp-gpio"; - gpio-controller; - #gpio-cells = <2>; - gpio,syscon-dev = <&devctrl 0x254>; - }; - - dspgpio6: keystone_dsp_gpio@2620258 { - compatible = "ti,keystone-dsp-gpio"; - gpio-controller; - #gpio-cells = <2>; - gpio,syscon-dev = <&devctrl 0x258>; - }; - - dspgpio7: keystone_dsp_gpio@262025c { - compatible = "ti,keystone-dsp-gpio"; - gpio-controller; - #gpio-cells = <2>; - gpio,syscon-dev = <&devctrl 0x25c>; - }; - - mdio: mdio@02090300 { - compatible = "ti,keystone_mdio", "ti,davinci_mdio"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x02090300 0x100>; - status = "disabled"; - clocks = <&clkcpgmac>; - clock-names = "fck"; - bus_freq = <2500000>; - }; - /include/ "keystone-k2hk-netcp.dtsi" - }; -}; diff --git a/arch/arm/dts/keystone-k2l-clocks.dtsi b/arch/arm/dts/keystone-k2l-clocks.dtsi deleted file mode 100644 index fcfc2fb6cc2..00000000000 --- a/arch/arm/dts/keystone-k2l-clocks.dtsi +++ /dev/null @@ -1,263 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Keystone 2 lamarr SoC clock nodes - * - * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ - */ - -clocks { - armpllclk: armpllclk@2620370 { - #clock-cells = <0>; - compatible = "ti,keystone,pll-clock"; - clocks = <&refclksys>; - clock-output-names = "arm-pll-clk"; - reg = <0x02620370 4>; - reg-names = "control"; - }; - - mainpllclk: mainpllclk@2310110 { - #clock-cells = <0>; - compatible = "ti,keystone,main-pll-clock"; - clocks = <&refclksys>; - reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>; - reg-names = "control", "multiplier", "post-divider"; - }; - - papllclk: papllclk@2620358 { - #clock-cells = <0>; - compatible = "ti,keystone,pll-clock"; - clocks = <&refclksys>; - clock-output-names = "papllclk"; - reg = <0x02620358 4>; - reg-names = "control"; - }; - - ddr3apllclk: ddr3apllclk@2620360 { - #clock-cells = <0>; - compatible = "ti,keystone,pll-clock"; - clocks = <&refclksys>; - clock-output-names = "ddr-3a-pll-clk"; - reg = <0x02620360 4>; - reg-names = "control"; - }; - - clkdfeiqnsys: clkdfeiqnsys@2350004 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk12>; - clock-output-names = "dfe"; - reg-names = "control", "domain"; - reg = <0x02350004 0xb00>, <0x02350000 0x400>; - domain-id = <0>; - }; - - clkpcie1: clkpcie1@235002c { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk12>; - clock-output-names = "pcie"; - reg = <0x0235002c 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <4>; - }; - - clkgem1: clkgem1@2350040 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk1>; - clock-output-names = "gem1"; - reg = <0x02350040 0xb00>, <0x02350024 0x400>; - reg-names = "control", "domain"; - domain-id = <9>; - }; - - clkgem2: clkgem2@2350044 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk1>; - clock-output-names = "gem2"; - reg = <0x02350044 0xb00>, <0x02350028 0x400>; - reg-names = "control", "domain"; - domain-id = <10>; - }; - - clkgem3: clkgem3@2350048 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk1>; - clock-output-names = "gem3"; - reg = <0x02350048 0xb00>, <0x0235002c 0x400>; - reg-names = "control", "domain"; - domain-id = <11>; - }; - - clktac: clktac@2350064 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "tac"; - reg = <0x02350064 0xb00>, <0x02350044 0x400>; - reg-names = "control", "domain"; - domain-id = <17>; - }; - - clkrac: clkrac@2350068 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "rac"; - reg = <0x02350068 0xb00>, <0x02350044 0x400>; - reg-names = "control", "domain"; - domain-id = <17>; - }; - - clkdfepd0: clkdfepd0@235006c { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "dfe-pd0"; - reg = <0x0235006c 0xb00>, <0x02350044 0x400>; - reg-names = "control", "domain"; - domain-id = <18>; - }; - - clkfftc0: clkfftc0@2350070 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "fftc-0"; - reg = <0x02350070 0xb00>, <0x0235004c 0x400>; - reg-names = "control", "domain"; - domain-id = <19>; - }; - - clkosr: clkosr@2350088 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "osr"; - reg = <0x02350088 0xb00>, <0x0235004c 0x400>; - reg-names = "control", "domain"; - domain-id = <21>; - }; - - clktcp3d0: clktcp3d0@235008c { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "tcp3d-0"; - reg = <0x0235008c 0xb00>, <0x02350058 0x400>; - reg-names = "control", "domain"; - domain-id = <22>; - }; - - clktcp3d1: clktcp3d1@2350094 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "tcp3d-1"; - reg = <0x02350094 0xb00>, <0x02350058 0x400>; - reg-names = "control", "domain"; - domain-id = <23>; - }; - - clkvcp0: clkvcp0@235009c { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "vcp-0"; - reg = <0x0235009c 0xb00>, <0x02350060 0x400>; - reg-names = "control", "domain"; - domain-id = <24>; - }; - - clkvcp1: clkvcp1@23500a0 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "vcp-1"; - reg = <0x023500a0 0xb00>, <0x02350060 0x400>; - reg-names = "control", "domain"; - domain-id = <24>; - }; - - clkvcp2: clkvcp2@23500a4 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "vcp-2"; - reg = <0x023500a4 0xb00>, <0x02350060 0x400>; - reg-names = "control", "domain"; - domain-id = <24>; - }; - - clkvcp3: clkvcp3@23500a8 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "vcp-3"; - reg = <0x023500a8 0xb00>, <0x02350060 0x400>; - reg-names = "control", "domain"; - domain-id = <24>; - }; - - clkbcp: clkbcp@23500bc { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "bcp"; - reg = <0x023500bc 0xb00>, <0x02350068 0x400>; - reg-names = "control", "domain"; - domain-id = <26>; - }; - - clkdfepd1: clkdfepd1@23500c0 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "dfe-pd1"; - reg = <0x023500c0 0xb00>, <0x02350044 0x400>; - reg-names = "control", "domain"; - domain-id = <27>; - }; - - clkfftc1: clkfftc1@23500c4 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "fftc-1"; - reg = <0x023500c4 0xb00>, <0x023504c0 0x400>; - reg-names = "control", "domain"; - domain-id = <28>; - }; - - clkiqnail: clkiqnail@23500c8 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&chipclk13>; - clock-output-names = "iqn-ail"; - reg = <0x023500c8 0xb00>, <0x0235004c 0x400>; - reg-names = "control", "domain"; - domain-id = <29>; - }; - - clkuart2: clkuart2@2350000 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkmodrst0>; - clock-output-names = "uart2"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; - - clkuart3: clkuart3@2350000 { - #clock-cells = <0>; - compatible = "ti,keystone,psc-clock"; - clocks = <&clkmodrst0>; - clock-output-names = "uart3"; - reg = <0x02350000 0xb00>, <0x02350000 0x400>; - reg-names = "control", "domain"; - domain-id = <0>; - }; -}; diff --git a/arch/arm/dts/keystone-k2l-evm-u-boot.dtsi b/arch/arm/dts/keystone-k2l-evm-u-boot.dtsi index f1aed14b0b5..d9dee805ebe 100644 --- a/arch/arm/dts/keystone-k2l-evm-u-boot.dtsi +++ b/arch/arm/dts/keystone-k2l-evm-u-boot.dtsi @@ -3,16 +3,30 @@ * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ */ +/{ + aliases { + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + }; + + chosen { + stdout-path = &uart0; + }; +}; + +&soc0 { + bootph-all; +}; + &usb_phy { #phy-cells = <0>; psc-domain = <2>; }; -&usb { - dwc3@2690000 { - phys = <&usb_phy>; - dr_mode = "host"; - snps,u2ss_inp3_quirk; - status = "okay"; - }; +&usb0 { + phys = <&usb_phy>; + dr_mode = "host"; + snps,u2ss_inp3_quirk; + status = "okay"; }; diff --git a/arch/arm/dts/keystone-k2l-evm.dts b/arch/arm/dts/keystone-k2l-evm.dts deleted file mode 100644 index 9d2b4542e81..00000000000 --- a/arch/arm/dts/keystone-k2l-evm.dts +++ /dev/null @@ -1,129 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Keystone 2 Lamarr EVM device tree - * - * Copyright (C) 2014-2017 Texas Instruments Incorporated - https://www.ti.com/ - */ -/dts-v1/; - -#include "keystone.dtsi" -#include "keystone-k2l.dtsi" - -/ { - compatible = "ti,k2l-evm","ti,keystone"; - model = "Texas Instruments Keystone 2 Lamarr EVM"; - - soc { - clocks { - refclksys: refclksys { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <122880000>; - clock-output-names = "refclk-sys"; - }; - }; - }; -}; - -&usb_phy { - status = "okay"; -}; - -&usb { - status = "okay"; -}; - -&i2c0 { - dtt@50 { - compatible = "at,24c1024"; - reg = <0x50>; - }; -}; - -&aemif { - cs0 { - #address-cells = <2>; - #size-cells = <1>; - clock-ranges; - ranges; - - ti,cs-chipselect = <0>; - /* all timings in nanoseconds */ - ti,cs-min-turnaround-ns = <12>; - ti,cs-read-hold-ns = <6>; - ti,cs-read-strobe-ns = <23>; - ti,cs-read-setup-ns = <9>; - ti,cs-write-hold-ns = <8>; - ti,cs-write-strobe-ns = <23>; - ti,cs-write-setup-ns = <8>; - - nand@0,0 { - compatible = "ti,keystone-nand","ti,davinci-nand"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0 0 0x4000000 - 1 0 0x0000100>; - - ti,davinci-chipselect = <0>; - ti,davinci-mask-ale = <0x2000>; - ti,davinci-mask-cle = <0x4000>; - ti,davinci-mask-chipsel = <0>; - nand-ecc-mode = "hw"; - ti,davinci-ecc-bits = <4>; - nand-on-flash-bbt; - - partition@0 { - label = "u-boot"; - reg = <0x0 0x100000>; - read-only; - }; - - partition@100000 { - label = "params"; - reg = <0x100000 0x80000>; - read-only; - }; - - partition@180000 { - label = "ubifs"; - reg = <0x180000 0x7FE80000>; - }; - }; - }; -}; - -&spi0 { - status ="okay"; - nor_flash: flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "Micron,n25q128a11", "jedec,spi-nor"; - spi-max-frequency = <54000000>; - m25p,fast-read; - reg = <0>; - - partition@0 { - label = "u-boot-spl"; - reg = <0x0 0x80000>; - read-only; - }; - - partition@1 { - label = "misc"; - reg = <0x80000 0xf80000>; - }; - }; -}; - -&mdio { - status = "okay"; - ethphy0: ethernet-phy@0 { - compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22"; - reg = <0>; - }; - - ethphy1: ethernet-phy@1 { - compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22"; - reg = <1>; - }; -}; diff --git a/arch/arm/dts/keystone-k2l-netcp.dtsi b/arch/arm/dts/keystone-k2l-netcp.dtsi deleted file mode 100644 index 2caa0583fc8..00000000000 --- a/arch/arm/dts/keystone-k2l-netcp.dtsi +++ /dev/null @@ -1,187 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Device Tree Source for Keystone 2 Lamarr Netcp driver - * - * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/ - */ - -qmss: qmss@2a40000 { - compatible = "ti,keystone-navigator-qmss"; - dma-coherent; - #address-cells = <1>; - #size-cells = <1>; - clocks = <&chipclk13>; - ranges; - queue-range = <0 0x2000>; - linkram0 = <0x100000 0x4000>; - linkram1 = <0x70000000 0x10000>; /* 1MB OSR mem */ - - qmgrs { - #address-cells = <1>; - #size-cells = <1>; - ranges; - qmgr0 { - managed-queues = <0 0x2000>; - reg = <0x2a40000 0x20000>, - <0x2a06000 0x400>, - <0x2a02000 0x1000>, - <0x2a03000 0x1000>, - <0x23a80000 0x20000>, - <0x2a80000 0x20000>; - reg-names = "peek", "status", "config", - "region", "push", "pop"; - }; - }; - queue-pools { - qpend { - qpend-0 { - qrange = <658 8>; - interrupts =<0 40 0xf04 0 41 0xf04 0 42 0xf04 - 0 43 0xf04 0 44 0xf04 0 45 0xf04 - 0 46 0xf04 0 47 0xf04>; - }; - qpend-1 { - qrange = <528 16>; - interrupts = <0 48 0xf04 0 49 0xf04 0 50 0xf04 - 0 51 0xf04 0 52 0xf04 0 53 0xf04 - 0 54 0xf04 0 55 0xf04 0 56 0xf04 - 0 57 0xf04 0 58 0xf04 0 59 0xf04 - 0 60 0xf04 0 61 0xf04 0 62 0xf04 - 0 63 0xf04>; - qalloc-by-id; - }; - qpend-2 { - qrange = <544 16>; - interrupts = <0 64 0xf04 0 65 0xf04 0 66 0xf04 - 0 59 0xf04 0 68 0xf04 0 69 0xf04 - 0 70 0xf04 0 71 0xf04 0 72 0xf04 - 0 73 0xf04 0 74 0xf04 0 75 0xf04 - 0 76 0xf04 0 77 0xf04 0 78 0xf04 - 0 79 0xf04>; - }; - }; - general-purpose { - gp-0 { - qrange = <4000 64>; - }; - netcp-tx { - qrange = <896 128>; - qalloc-by-id; - }; - }; - }; - - descriptor-regions { - #address-cells = <1>; - #size-cells = <1>; - ranges; - region-12 { - id = <12>; - region-spec = <8192 128>; /* num_desc desc_size */ - link-index = <0x4000>; - }; - }; -}; /* qmss */ - -knav_dmas: knav_dmas@0 { - compatible = "ti,keystone-navigator-dma"; - clocks = <&papllclk>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - ti,navigator-cloud-address = <0x23a80000 0x23a90000>; - - dma_gbe: dma_gbe@0 { - reg = <0x26186000 0x100>, - <0x26187000 0x2a0>, - <0x26188000 0xb60>, - <0x26186100 0x80>, - <0x26189000 0x1000>; - reg-names = "global", "txchan", "rxchan", - "txsched", "rxflow"; - }; -}; - -netcp: netcp@26000000 { - reg = <0x2620110 0x8>; - reg-names = "efuse"; - compatible = "ti,netcp-1.0"; - #address-cells = <1>; - #size-cells = <1>; - - /* NetCP address range */ - ranges = <0 0x26000000 0x1000000>; - - clocks = <&papllclk>, <&clkcpgmac>, <&chipclk12>; - dma-coherent; - - ti,navigator-dmas = <&dma_gbe 0>, - <&dma_gbe 8>, - <&dma_gbe 0>; - ti,navigator-dma-names = "netrx0", "netrx1", "nettx"; - - netcp-devices { - #address-cells = <1>; - #size-cells = <1>; - ranges; - gbe@200000 { /* ETHSS */ - label = "netcp-gbe"; - compatible = "ti,netcp-gbe-5"; - reg = <0x200000 0x900>, <0x220000 0x20000>; - /* enable-ale; */ - tx-queue = <896>; - tx-channel = "nettx"; - - interfaces { - gbe0: interface-0 { - slave-port = <0>; - link-interface = <1>; - phy-handle = <ðphy0>; - }; - gbe1: interface-1 { - slave-port = <1>; - link-interface = <1>; - phy-handle = <ðphy1>; - }; - }; - - secondary-slave-ports { - port-2 { - slave-port = <2>; - link-interface = <2>; - }; - port-3 { - slave-port = <3>; - link-interface = <2>; - }; - }; - }; - }; - - netcp-interfaces { - interface-0 { - rx-channel = "netrx0"; - rx-pool = <1024 12>; - tx-pool = <1024 12>; - rx-queue-depth = <128 128 0 0>; - rx-buffer-size = <1518 4096 0 0>; - rx-queue = <528>; - tx-completion-queue = <530>; - efuse-mac = <1>; - netcp-gbe = <&gbe0>; - - }; - interface-1 { - rx-channel = "netrx1"; - rx-pool = <1024 12>; - tx-pool = <1024 12>; - rx-queue-depth = <128 128 0 0>; - rx-buffer-size = <1518 4096 0 0>; - rx-queue = <529>; - tx-completion-queue = <531>; - efuse-mac = <0>; - local-mac-address = [02 18 31 7e 3e 7f]; - netcp-gbe = <&gbe1>; - }; - }; -}; diff --git a/arch/arm/dts/keystone-k2l.dtsi b/arch/arm/dts/keystone-k2l.dtsi deleted file mode 100644 index c8893e284f2..00000000000 --- a/arch/arm/dts/keystone-k2l.dtsi +++ /dev/null @@ -1,105 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Keystone 2 Lamarr SoC specific device tree - * - * Copyright (C) 2014-2017 Texas Instruments Incorporated - https://www.ti.com/ - */ - -/ { - cpus { - #address-cells = <1>; - #size-cells = <0>; - - interrupt-parent = <&gic>; - - cpu@0 { - compatible = "arm,cortex-a15"; - device_type = "cpu"; - reg = <0>; - }; - - cpu@1 { - compatible = "arm,cortex-a15"; - device_type = "cpu"; - reg = <1>; - }; - }; - - soc { - /include/ "keystone-k2l-clocks.dtsi" - - uart2: serial@2348400 { - compatible = "ns16550a"; - current-speed = <115200>; - reg-shift = <2>; - reg-io-width = <4>; - reg = <0x02348400 0x100>; - clocks = <&clkuart2>; - interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>; - }; - - uart3: serial@2348800 { - compatible = "ns16550a"; - current-speed = <115200>; - reg-shift = <2>; - reg-io-width = <4>; - reg = <0x02348800 0x100>; - clocks = <&clkuart3>; - interrupts = <GIC_SPI 435 IRQ_TYPE_EDGE_RISING>; - }; - - dspgpio0: keystone_dsp_gpio@02620240 { - compatible = "ti,keystone-dsp-gpio"; - gpio-controller; - #gpio-cells = <2>; - gpio,syscon-dev = <&devctrl 0x240>; - }; - - dspgpio1: keystone_dsp_gpio@2620244 { - compatible = "ti,keystone-dsp-gpio"; - gpio-controller; - #gpio-cells = <2>; - gpio,syscon-dev = <&devctrl 0x244>; - }; - - dspgpio2: keystone_dsp_gpio@2620248 { - compatible = "ti,keystone-dsp-gpio"; - gpio-controller; - #gpio-cells = <2>; - gpio,syscon-dev = <&devctrl 0x248>; - }; - - dspgpio3: keystone_dsp_gpio@262024c { - compatible = "ti,keystone-dsp-gpio"; - gpio-controller; - #gpio-cells = <2>; - gpio,syscon-dev = <&devctrl 0x24c>; - }; - - mdio: mdio@26200f00 { - compatible = "ti,keystone_mdio", "ti,davinci_mdio"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x26200f00 0x100>; - status = "disabled"; - clocks = <&clkcpgmac>; - clock-names = "fck"; - bus_freq = <2500000>; - }; - /include/ "keystone-k2l-netcp.dtsi" - }; -}; - -&spi0 { - ti,davinci-spi-num-cs = <5>; -}; - -&spi1 { - ti,davinci-spi-num-cs = <3>; -}; - -&spi2 { - ti,davinci-spi-num-cs = <5>; - /* Pin muxed. Enabled and configured by Bootloader */ - status = "disabled"; -}; diff --git a/arch/arm/dts/keystone.dtsi b/arch/arm/dts/keystone.dtsi deleted file mode 100644 index 1538ccef81a..00000000000 --- a/arch/arm/dts/keystone.dtsi +++ /dev/null @@ -1,330 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ - */ - -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/gpio/gpio.h> - -#include "skeleton.dtsi" - -/ { - model = "Texas Instruments Keystone 2 SoC"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&gic>; - - aliases { - serial0 = &uart0; - spi0 = &spi0; - spi1 = &spi1; - spi2 = &spi2; - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - }; - - chosen { - stdout-path = &uart0; - }; - - memory { - reg = <0x80000000 0x40000000>; - }; - - gic: interrupt-controller { - compatible = "arm,cortex-a15-gic"; - #interrupt-cells = <3>; - interrupt-controller; - reg = <0x02561000 0x1000>, - <0x02562000 0x2000>, - <0x02564000 0x1000>, - <0x02566000 0x2000>; - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | - IRQ_TYPE_LEVEL_HIGH)>; - }; - - timer { - compatible = "arm,armv7-timer"; - interrupts = - <GIC_PPI 13 - (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 14 - (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 11 - (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 10 - (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; - }; - - pmu { - compatible = "arm,cortex-a15-pmu"; - interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>; - }; - - soc { - #address-cells = <1>; - #size-cells = <1>; - compatible = "ti,keystone","simple-bus"; - interrupt-parent = <&gic>; - ranges; - - pllctrl: pll-controller@02310000 { - compatible = "ti,keystone-pllctrl", "syscon"; - reg = <0x02310000 0x200>; - }; - - devctrl: device-state-control@02620000 { - compatible = "ti,keystone-devctrl", "syscon"; - reg = <0x02620000 0x1000>; - }; - - rstctrl: reset-controller { - compatible = "ti,keystone-reset"; - ti,syscon-pll = <&pllctrl 0xe4>; - ti,syscon-dev = <&devctrl 0x328>; - ti,wdt-list = <0>; - }; - - /include/ "keystone-clocks.dtsi" - - uart0: serial@2530c00 { - compatible = "ns16550a"; - current-speed = <115200>; - reg-shift = <2>; - reg-io-width = <4>; - reg = <0x02530c00 0x100>; - clocks = <&clkuart0>; - interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>; - }; - - uart1: serial@2531000 { - compatible = "ns16550a"; - current-speed = <115200>; - reg-shift = <2>; - reg-io-width = <4>; - reg = <0x02531000 0x100>; - clocks = <&clkuart1>; - interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>; - }; - - i2c0: i2c@2530000 { - compatible = "ti,davinci-i2c"; - reg = <0x02530000 0x400>; - clock-frequency = <100000>; - clocks = <&clki2c>; - interrupts = <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c1: i2c@2530400 { - compatible = "ti,davinci-i2c"; - reg = <0x02530400 0x400>; - clock-frequency = <100000>; - clocks = <&clki2c>; - interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING>; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c2: i2c@2530800 { - compatible = "ti,davinci-i2c"; - reg = <0x02530800 0x400>; - clock-frequency = <100000>; - clocks = <&clki2c>; - interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>; - #address-cells = <1>; - #size-cells = <0>; - }; - - spi0: spi@21000400 { - compatible = "ti,dm6441-spi"; - reg = <0x21000400 0x200>; - num-cs = <4>; - ti,davinci-spi-intr-line = <0>; - interrupts = <GIC_SPI 292 IRQ_TYPE_EDGE_RISING>; - clocks = <&clkspi>; - #address-cells = <1>; - #size-cells = <0>; - }; - - spi1: spi@21000600 { - compatible = "ti,dm6441-spi"; - reg = <0x21000600 0x200>; - num-cs = <4>; - ti,davinci-spi-intr-line = <0>; - interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>; - clocks = <&clkspi>; - #address-cells = <1>; - #size-cells = <0>; - }; - - spi2: spi@21000800 { - compatible = "ti,dm6441-spi"; - reg = <0x21000800 0x200>; - num-cs = <4>; - ti,davinci-spi-intr-line = <0>; - interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>; - clocks = <&clkspi>; - #address-cells = <1>; - #size-cells = <0>; - }; - - usb_phy: usb_phy@2620738 { - compatible = "ti,keystone-usbphy"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x2620738 24>; - status = "disabled"; - }; - - usb: usb@2680000 { - compatible = "ti,keystone-dwc3"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x2680000 0x10000>; - clocks = <&clkusb>; - clock-names = "usb"; - interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>; - ranges; - dma-coherent; - dma-ranges; - status = "disabled"; - - usb@2690000 { - compatible = "synopsys,dwc3"; - reg = <0x2690000 0x70000>; - interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>; - usb-phy = <&usb_phy>, <&usb_phy>; - }; - }; - - wdt: wdt@22f0080 { - compatible = "ti,keystone-wdt","ti,davinci-wdt"; - reg = <0x022f0080 0x80>; - clocks = <&clkwdtimer0>; - }; - - clock_event: timer@22f0000 { - compatible = "ti,keystone-timer"; - reg = <0x022f0000 0x80>; - interrupts = <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>; - clocks = <&clktimer15>; - }; - - gpio0: gpio@260bf00 { - compatible = "ti,keystone-gpio"; - reg = <0x0260bf00 0x100>; - gpio-controller; - #gpio-cells = <2>; - /* HW Interrupts mapped to GPIO pins */ - interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 121 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 122 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 124 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 125 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 126 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 127 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 130 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 132 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 133 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 135 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 136 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 137 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 138 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 139 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 145 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 146 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 147 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>; - clocks = <&clkgpio>; - clock-names = "gpio"; - ti,ngpio = <32>; - ti,davinci-gpio-unbanked = <32>; - }; - - aemif: aemif@21000A00 { - compatible = "ti,keystone-aemif", "ti,davinci-aemif"; - #address-cells = <2>; - #size-cells = <1>; - clocks = <&clkaemif>; - clock-names = "aemif"; - clock-ranges; - - reg = <0x21000A00 0x00000100>; - ranges = <0 0 0x30000000 0x10000000 - 1 0 0x21000A00 0x00000100>; - }; - - kirq0: keystone_irq@26202a0 { - compatible = "ti,keystone-irq"; - interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>; - interrupt-controller; - #interrupt-cells = <1>; - ti,syscon-dev = <&devctrl 0x2a0>; - }; - - pcie0: pcie@21800000 { - compatible = "ti,keystone-pcie", "snps,dw-pcie"; - clocks = <&clkpcie>; - clock-names = "pcie"; - #address-cells = <3>; - #size-cells = <2>; - reg = <0x21801000 0x2000>, <0x21800000 0x1000>, <0x02620128 4>; - ranges = <0x81000000 0 0 0x23250000 0 0x4000 - 0x82000000 0 0x50000000 0x50000000 0 0x10000000>; - - status = "disabled"; - device_type = "pci"; - num-lanes = <2>; - - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 7>; - interrupt-map = <0 0 0 1 &pcie_intc0 0>, /* INT A */ - <0 0 0 2 &pcie_intc0 1>, /* INT B */ - <0 0 0 3 &pcie_intc0 2>, /* INT C */ - <0 0 0 4 &pcie_intc0 3>; /* INT D */ - - pcie_msi_intc0: msi-interrupt-controller { - interrupt-controller; - #interrupt-cells = <1>; - interrupt-parent = <&gic>; - interrupts = <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 33 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 37 IRQ_TYPE_EDGE_RISING>; - }; - - pcie_intc0: legacy-interrupt-controller { - interrupt-controller; - #interrupt-cells = <1>; - interrupt-parent = <&gic>; - interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 27 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 28 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 29 IRQ_TYPE_EDGE_RISING>; - }; - }; - }; -}; diff --git a/arch/arm/dts/omap3-sniper-u-boot.dtsi b/arch/arm/dts/omap3-sniper-u-boot.dtsi new file mode 100644 index 00000000000..d467f533a12 --- /dev/null +++ b/arch/arm/dts/omap3-sniper-u-boot.dtsi @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2024 Paul Kocialkowski <contact@paulk.fr> + */ + +#include "omap3-u-boot.dtsi" + +/ { + chosen { + stdout-path = &uart3; + }; +}; + +&i2c1 { + clock-frequency = <400000>; +}; diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h b/arch/arm/include/asm/arch-am33xx/sys_proto.h index 513cdaca859..7abcd1cb615 100644 --- a/arch/arm/include/asm/arch-am33xx/sys_proto.h +++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h @@ -37,7 +37,6 @@ u32 wait_on_value(u32, u32, void *, u32); #ifdef CONFIG_NOR_BOOT void enable_norboot_pin_mux(void); #endif -void am33xx_spl_board_init(void); int am335x_get_efuse_mpu_max_freq(struct ctrl_dev *cdev); int am335x_get_mpu_vdd(int sil_rev, int frequency); int am335x_get_tps65910_mpu_vdd(int sil_rev, int frequency); diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c index 84a60dedd72..abdc1e40335 100644 --- a/arch/arm/mach-omap2/am33xx/board.c +++ b/arch/arm/mach-omap2/am33xx/board.c @@ -337,14 +337,6 @@ int board_early_init_f(void) return 0; } -/* - * This function is the place to do per-board things such as ramp up the - * MPU clock frequency. - */ -__weak void am33xx_spl_board_init(void) -{ -} - #if defined(CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC) static void rtc32k_enable(void) { diff --git a/arch/arm/mach-omap2/boot-common.c b/arch/arm/mach-omap2/boot-common.c index e1ea3515ac1..649bc07047a 100644 --- a/arch/arm/mach-omap2/boot-common.c +++ b/arch/arm/mach-omap2/boot-common.c @@ -269,7 +269,7 @@ skip_ipu1: debug("%s: IPU2 failed to start (%d)\n", __func__, ret); } -void spl_board_init(void) +void spl_soc_init(void) { /* Prepare console output */ preloader_console_init(); @@ -286,9 +286,6 @@ void spl_board_init(void) #if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) hw_watchdog_init(); #endif -#ifdef CONFIG_AM33XX - am33xx_spl_board_init(); -#endif if (IS_ENABLED(CONFIG_SPL_BUILD) && IS_ENABLED(CONFIG_REMOTEPROC_TI_IPU)) spl_boot_ipu(); diff --git a/arch/mips/mach-octeon/octeon_fdt.c b/arch/mips/mach-octeon/octeon_fdt.c index c74fe9d9fb8..15ce292be95 100644 --- a/arch/mips/mach-octeon/octeon_fdt.c +++ b/arch/mips/mach-octeon/octeon_fdt.c @@ -687,13 +687,6 @@ int octeon_fdt_i2c_get_bus(const void *fdt, int node_offset) while (node_offset > 0 && !(found = !fdt_node_check_compatible(fdt, node_offset, compat))) { node_offset = fdt_parent_offset(fdt, node_offset); -#ifdef CONFIG_OCTEON_I2C_FDT - bus = i2c_get_bus_num_fdt(node_offset); - if (bus >= 0) { - debug("%s: Found bus 0x%x\n", __func__, bus); - return bus; - } -#endif } if (!found) { printf("Error: node %d in device tree is not a child of the I2C bus\n", diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c index 0ed85b354cf..4f15a560902 100644 --- a/arch/sandbox/cpu/cpu.c +++ b/arch/sandbox/cpu/cpu.c @@ -340,6 +340,8 @@ void *board_fdt_blob_setup(int *ret) int err; int fd; + if (gd->fdt_blob) + return (void *)gd->fdt_blob; blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0); *ret = 0; if (!state->fdt_fname) { diff --git a/arch/sandbox/cpu/os.c b/arch/sandbox/cpu/os.c index 46ff305b536..f5c9a8aecf2 100644 --- a/arch/sandbox/cpu/os.c +++ b/arch/sandbox/cpu/os.c @@ -47,12 +47,24 @@ struct os_mem_hdr { ssize_t os_read(int fd, void *buf, size_t count) { - return read(fd, buf, count); + ssize_t ret; + + ret = read(fd, buf, count); + if (ret == -1) + return -errno; + + return ret; } ssize_t os_write(int fd, const void *buf, size_t count) { - return write(fd, buf, count); + ssize_t ret; + + ret = write(fd, buf, count); + if (ret == -1) + return -errno; + + return ret; } int os_printf(const char *fmt, ...) @@ -69,6 +81,8 @@ int os_printf(const char *fmt, ...) off_t os_lseek(int fd, off_t offset, int whence) { + off_t ret; + if (whence == OS_SEEK_SET) whence = SEEK_SET; else if (whence == OS_SEEK_CUR) @@ -77,7 +91,11 @@ off_t os_lseek(int fd, off_t offset, int whence) whence = SEEK_END; else os_exit(1); - return lseek(fd, offset, whence); + ret = lseek(fd, offset, whence); + if (ret == -1) + return -errno; + + return ret; } int os_open(const char *pathname, int os_flags) @@ -808,7 +826,7 @@ static int make_exec(char *fname, const void *data, int size) * @count: Number of arguments in @add_args * Return: 0 if OK, -ENOMEM if out of memory */ -static int add_args(char ***argvp, char *add_args[], int count) +static int add_args(char ***argvp, const char *add_args[], int count) { char **argv, **ap; int argc; @@ -859,7 +877,7 @@ static int os_jump_to_file(const char *fname, bool delete_it) struct sandbox_state *state = state_get_current(); char mem_fname[30]; int fd, err; - char *extra_args[5]; + const char *extra_args[5]; char **argv = state->argv; int argc; #ifdef DEBUG @@ -964,7 +982,7 @@ int os_find_u_boot(char *fname, int maxlen, bool use_img, p = strstr(fname, subdir); if (p) { if (*next_prefix) - /* e.g. ".../tpl/u-boot-spl" to "../spl/u-boot-spl" */ + /* e.g. ".../tpl/u-boot-spl" to ".../spl/u-boot-spl" */ memcpy(p + 1, next_prefix, strlen(next_prefix)); else /* e.g. ".../spl/u-boot" to ".../u-boot" */ diff --git a/arch/sandbox/cpu/spl.c b/arch/sandbox/cpu/spl.c index 9ad9da686c6..bcb1ca10a51 100644 --- a/arch/sandbox/cpu/spl.c +++ b/arch/sandbox/cpu/spl.c @@ -3,13 +3,18 @@ * Copyright (c) 2016 Google, Inc */ +#define LOG_CATEGORY LOGC_BOOT + #include <dm.h> #include <hang.h> #include <handoff.h> +#include <image.h> #include <init.h> #include <log.h> +#include <mapmem.h> #include <os.h> #include <spl.h> +#include <upl.h> #include <asm/global_data.h> #include <asm/spl.h> #include <asm/state.h> @@ -51,7 +56,8 @@ void board_init_f(ulong flag) void board_boot_order(u32 *spl_boot_list) { spl_boot_list[0] = BOOT_DEVICE_VBE; - spl_boot_list[1] = BOOT_DEVICE_BOARD; + spl_boot_list[1] = BOOT_DEVICE_UPL; + spl_boot_list[2] = BOOT_DEVICE_BOARD; } static int spl_board_load_file(struct spl_image_info *spl_image, @@ -179,3 +185,115 @@ int handoff_arch_save(struct spl_handoff *ho) return 0; } + +/* Context used to hold file descriptor */ +struct load_ctx { + int fd; +}; + +static ulong read_fit_image(struct spl_load_info *load, ulong offset, + ulong size, void *buf) +{ + struct load_ctx *load_ctx = load->priv; + off_t ret; + ssize_t res; + + ret = os_lseek(load_ctx->fd, offset, OS_SEEK_SET); + if (ret < 0) { + printf("Failed to seek to %zx, got %zx\n", offset, ret); + return log_msg_ret("lse", ret); + } + + res = os_read(load_ctx->fd, buf, size); + if (res < 0) { + printf("Failed to read %lx bytes, got %ld\n", size, res); + return log_msg_ret("osr", res); + } + + return size; +} + +int sandbox_spl_load_fit(char *fname, int maxlen, struct spl_image_info *image) +{ + struct legacy_img_hdr *header; + struct load_ctx load_ctx; + struct spl_load_info load; + int ret; + int fd; + + memset(&load, '\0', sizeof(load)); + spl_set_bl_len(&load, IS_ENABLED(CONFIG_SPL_LOAD_BLOCK) ? 512 : 1); + load.read = read_fit_image; + + ret = sandbox_find_next_phase(fname, maxlen, true); + if (ret) { + printf("%s not found, error %d\n", fname, ret); + return log_msg_ret("nph", ret); + } + + header = spl_get_load_buffer(-sizeof(*header), sizeof(*header)); + + log_debug("reading from %s\n", fname); + fd = os_open(fname, OS_O_RDONLY); + if (fd < 0) { + printf("Failed to open '%s'\n", fname); + return log_msg_ret("ope", -errno); + } + ret = os_read(fd, header, sizeof(*header)); + if (ret != sizeof(*header)) { + printf("Failed to read %lx bytes, got %d\n", sizeof(*header), + ret); + return log_msg_ret("rea", ret); + } + load_ctx.fd = fd; + + load.priv = &load_ctx; + + ret = spl_load_simple_fit(image, &load, 0, header); + if (ret) + return log_msg_ret("slf", ret); + + return 0; +} + +static int upl_load_from_image(struct spl_image_info *spl_image, + struct spl_boot_device *bootdev) +{ + long long size; + char *fname; + int ret, fd; + ulong addr; + + if (!CONFIG_IS_ENABLED(UPL_OUT)) + return -ENOTSUPP; + + spl_upl_init(); + fname = os_malloc(256); + + ret = sandbox_spl_load_fit(fname, 256, spl_image); + if (ret) + return log_msg_ret("fit", ret); + spl_image->flags = SPL_SANDBOXF_ARG_IS_BUF; + spl_image->arg = map_sysmem(spl_image->load_addr, 0); + /* size is set by load_simple_fit(), offset is left as 0 */ + + /* now read the whole FIT into memory */ + fd = os_open(fname, OS_O_RDONLY); + if (fd < 0) + return log_msg_ret("op2", -ENOENT); + if (os_get_filesize(fname, &size)) + return log_msg_ret("fis", -ENOENT); + + /* place it after the loaded image, allowing plenty of space */ + addr = ALIGN(spl_image->load_addr + size, 0x1000); + log_debug("Loading whole FIT to %lx\n", addr); + if (os_read(fd, map_sysmem(addr, 0), size) != size) + return log_msg_ret("rea", -EIO); + os_close(fd); + + /* tell UPL where it is */ + upl_set_fit_addr(addr); + + return 0; +} +SPL_LOAD_IMAGE_METHOD("upl", 4, BOOT_DEVICE_UPL, upl_load_from_image); diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c index dce80416529..9ad5d46271a 100644 --- a/arch/sandbox/cpu/start.c +++ b/arch/sandbox/cpu/start.c @@ -431,6 +431,14 @@ static int sandbox_cmdline_cb_autoboot_keyed(struct sandbox_state *state, } SANDBOX_CMDLINE_OPT(autoboot_keyed, 0, "Allow keyed autoboot"); +static int sandbox_cmdline_cb_upl(struct sandbox_state *state, const char *arg) +{ + state->upl = true; + + return 0; +} +SANDBOX_CMDLINE_OPT(upl, 0, "Enable Universal Payload (UPL)"); + static void setup_ram_buf(struct sandbox_state *state) { /* Zero the RAM buffer if we didn't read it, to keep valgrind happy */ @@ -483,6 +491,9 @@ int sandbox_main(int argc, char *argv[]) text_base = os_find_text_base(); + memset(&data, '\0', sizeof(data)); + gd = &data; + /* * This must be the first invocation of os_malloc() to have * state->ram_buf in the low 4 GiB. @@ -501,8 +512,6 @@ int sandbox_main(int argc, char *argv[]) os_exit(1); memcpy(os_argv, argv, size); - memset(&data, '\0', sizeof(data)); - gd = &data; gd->arch.text_base = text_base; state = state_get_current(); @@ -539,6 +548,9 @@ int sandbox_main(int argc, char *argv[]) goto err; } + if (state->upl) + gd->flags |= GD_FLG_UPL; + #if CONFIG_IS_ENABLED(SYS_MALLOC_F) gd->malloc_base = CFG_MALLOC_F_ADDR; #endif @@ -557,7 +569,7 @@ int sandbox_main(int argc, char *argv[]) log_debug("debug: %s\n", __func__); /* Do pre- and post-relocation init */ - board_init_f(0); + board_init_f(gd->flags); board_init_r(gd->new_gd, 0); diff --git a/arch/sandbox/include/asm/spl.h b/arch/sandbox/include/asm/spl.h index 4fab24cd156..d824b2123a2 100644 --- a/arch/sandbox/include/asm/spl.h +++ b/arch/sandbox/include/asm/spl.h @@ -6,6 +6,8 @@ #ifndef __asm_spl_h #define __asm_spl_h +struct spl_image_info; + enum { BOOT_DEVICE_MMC1, BOOT_DEVICE_MMC2, @@ -16,6 +18,7 @@ enum { BOOT_DEVICE_NOR, BOOT_DEVICE_SPI, BOOT_DEVICE_NAND, + BOOT_DEVICE_UPL, }; /** @@ -31,4 +34,16 @@ enum { */ int sandbox_find_next_phase(char *fname, int maxlen, bool use_img); +/** + * sandbox_spl_load_fit() - Load the next phase from a FIT + * + * Loads a FIT containing the next phase and sets it up for booting + * + * @fname: Returns filename loaded + * @maxlen: Maximum length for @fname including \0 + * @image: Place to put SPL-image information + * Return: 0 if OK, -ve on error + */ +int sandbox_spl_load_fit(char *fname, int maxlen, struct spl_image_info *image); + #endif diff --git a/arch/sandbox/include/asm/state.h b/arch/sandbox/include/asm/state.h index c84a1f7060f..6b50473ed41 100644 --- a/arch/sandbox/include/asm/state.h +++ b/arch/sandbox/include/asm/state.h @@ -97,6 +97,7 @@ struct sandbox_state { bool autoboot_keyed; /* Use keyed-autoboot feature */ bool disable_eth; /* Disable Ethernet devices */ bool disable_sf_bootdevs; /* Don't bind SPI flash bootdevs */ + bool upl; /* Enable Universal Payload (UPL) */ /* Pointer to information for each SPI bus/cs */ struct sandbox_spi_info spi[CONFIG_SANDBOX_SPI_MAX_BUS] diff --git a/arch/x86/include/asm/posix_types.h b/arch/x86/include/asm/posix_types.h index dbcea7f47ff..e1ed9bcabc7 100644 --- a/arch/x86/include/asm/posix_types.h +++ b/arch/x86/include/asm/posix_types.h @@ -20,11 +20,12 @@ typedef unsigned short __kernel_gid_t; #if defined(__x86_64__) typedef unsigned long __kernel_size_t; typedef long __kernel_ssize_t; +typedef long __kernel_ptrdiff_t; #else typedef unsigned int __kernel_size_t; typedef int __kernel_ssize_t; -#endif typedef int __kernel_ptrdiff_t; +#endif typedef long __kernel_time_t; typedef long __kernel_suseconds_t; typedef long __kernel_clock_t; diff --git a/board/BuR/brppt1/board.c b/board/BuR/brppt1/board.c index 192a2fa6327..80e0ca805b5 100644 --- a/board/BuR/brppt1/board.c +++ b/board/BuR/brppt1/board.c @@ -79,7 +79,7 @@ static const struct ctrl_ioregs ddr3_ioregs = { #define OSC (V_OSCK/1000000) static const struct dpll_params dpll_ddr3 = { 400, OSC-1, 1, -1, -1, -1, -1}; -void am33xx_spl_board_init(void) +void spl_board_init(void) { int rc; diff --git a/board/BuR/brsmarc1/board.c b/board/BuR/brsmarc1/board.c index 2d3f593d0ab..bfb6adf6d5c 100644 --- a/board/BuR/brsmarc1/board.c +++ b/board/BuR/brsmarc1/board.c @@ -72,7 +72,7 @@ static const struct ctrl_ioregs ddr3_ioregs = { #define OSC (V_OSCK / 1000000) const struct dpll_params dpll_ddr3 = { 400, OSC - 1, 1, -1, -1, -1, -1}; -void am33xx_spl_board_init(void) +void spl_board_init(void) { struct cm_perpll *const cmper = (struct cm_perpll *)CM_PER; struct cm_wkuppll *const cmwkup = (struct cm_wkuppll *)CM_WKUP; diff --git a/board/BuR/brxre1/board.c b/board/BuR/brxre1/board.c index b9b595cb156..510d2af3147 100644 --- a/board/BuR/brxre1/board.c +++ b/board/BuR/brxre1/board.c @@ -79,7 +79,7 @@ static const struct ctrl_ioregs ddr3_ioregs = { #define OSC (V_OSCK / 1000000) const struct dpll_params dpll_ddr3 = { 400, OSC - 1, 1, -1, -1, -1, -1}; -void am33xx_spl_board_init(void) +void spl_board_init(void) { int rc; diff --git a/board/bosch/guardian/board.c b/board/bosch/guardian/board.c index 41d7567ad21..33ba7a7751c 100644 --- a/board/bosch/guardian/board.c +++ b/board/bosch/guardian/board.c @@ -75,7 +75,7 @@ static struct emif_regs ddr3_emif_reg_data = { const struct dpll_params dpll_ddr = { 400, OSC - 1, 1, -1, -1, -1, -1}; -void am33xx_spl_board_init(void) +void spl_board_init(void) { int mpu_vdd; int usb_cur_lim; diff --git a/board/bosch/shc/board.c b/board/bosch/shc/board.c index ab688745938..1f9dc2d8df1 100644 --- a/board/bosch/shc/board.c +++ b/board/bosch/shc/board.c @@ -34,6 +34,7 @@ #include <asm/emif.h> #include <asm/gpio.h> #include <i2c.h> +#include <i2c_eeprom.h> #include <miiphy.h> #include <cpsw.h> #include <linux/delay.h> @@ -51,21 +52,21 @@ static int shc_eeprom_valid; /* * Read header information from EEPROM into global structure. */ -#define EEPROM_ADDR 0x50 static int read_eeprom(void) { + struct udevice *dev; + int ret; + /* Check if baseboard eeprom is available */ - if (i2c_probe(EEPROM_ADDR)) { - puts("Could not probe the EEPROM; something fundamentally wrong on the I2C bus.\n"); - return -ENODEV; + ret = uclass_first_device_err(UCLASS_I2C_EEPROM, &dev); + if (ret) { + puts("Could not find EEPROM.\n"); + return ret; } - /* read the eeprom using i2c */ - if (i2c_read(EEPROM_ADDR, 0, 2, (uchar *)&header, - sizeof(header))) { - puts("Could not read the EEPROM; something fundamentally wrong on the I2C bus.\n"); - return -EIO; - } + ret = i2c_eeprom_read(dev, 0, (uint8_t *)&header, sizeof(header)); + if (ret) + return ret; if (header.magic != HDR_MAGIC) { printf("Incorrect magic number (0x%x) in EEPROM\n", @@ -310,7 +311,7 @@ const struct dpll_params *get_dpll_ddr_params(void) const struct dpll_params dpll_mpu_shc_opp100 = { 99, MPUPLL_N, 1, -1, -1, -1, -1}; -void am33xx_spl_board_init(void) +void spl_board_init(void) { int sil_rev; int mpu_vdd; @@ -445,7 +446,6 @@ int board_init(void) #if defined(CONFIG_HW_WATCHDOG) hw_watchdog_init(); #endif - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); if (read_eeprom() < 0) puts("EEPROM Content Invalid.\n"); diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c index c6d33c32ccd..40047cf6783 100644 --- a/board/compulab/cm_fx6/cm_fx6.c +++ b/board/compulab/cm_fx6/cm_fx6.c @@ -14,6 +14,7 @@ #include <env.h> #include <fsl_esdhc_imx.h> #include <init.h> +#include <i2c.h> #include <miiphy.h> #include <mtd_node.h> #include <net.h> @@ -256,7 +257,7 @@ static int cm_fx6_setup_one_i2c(int busnum, struct i2c_pads_info *pads) { int ret; - ret = setup_i2c(busnum, CONFIG_SYS_I2C_SPEED, 0x7f, pads); + ret = setup_i2c(busnum, I2C_SPEED_STANDARD_RATE, 0x7f, pads); if (ret) printf("Warning: I2C%d setup failed: %d\n", busnum, ret); diff --git a/board/compulab/cm_t43/cm_t43.c b/board/compulab/cm_t43/cm_t43.c index 181581926c3..983991ea462 100644 --- a/board/compulab/cm_t43/cm_t43.c +++ b/board/compulab/cm_t43/cm_t43.c @@ -48,8 +48,6 @@ int board_init(void) gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100; gpmc_init(); set_i2c_pin_mux(); - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); - i2c_probe(TPS65218_CHIP_PM); return 0; } diff --git a/board/compulab/common/Makefile b/board/compulab/common/Makefile index 7c8226e6e16..c7b2237e5c1 100644 --- a/board/compulab/common/Makefile +++ b/board/compulab/common/Makefile @@ -4,6 +4,12 @@ # # Author: Igor Grinberg <grinberg@compulab.co.il> +CL_EEPROM=y + +ifdef CONFIG_TARGET_TRIMSLICE +CL_EEPROM= +endif + obj-y += common.o -obj-$(CONFIG_$(SPL_)SYS_I2C_LEGACY) += eeprom.o +obj-$(CL_EEPROM) += eeprom.o obj-$(CONFIG_SMC911X) += omap3_smc911x.o diff --git a/board/compulab/common/eeprom.c b/board/compulab/common/eeprom.c index efdaf342d5c..1b12d096041 100644 --- a/board/compulab/common/eeprom.c +++ b/board/compulab/common/eeprom.c @@ -34,19 +34,15 @@ static int cl_eeprom_layout; /* Implicitly LAYOUT_INVALID */ static int cl_eeprom_read(uint offset, uchar *buf, int len) { + struct udevice *eeprom; int res; - unsigned int current_i2c_bus = i2c_get_bus_num(); - res = i2c_set_bus_num(cl_eeprom_bus); - if (res < 0) + res = i2c_get_chip_for_busnum(cl_eeprom_bus, CONFIG_SYS_I2C_EEPROM_ADDR, + CONFIG_SYS_I2C_EEPROM_ADDR_LEN, &eeprom); + if (res) return res; - res = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, offset, - CONFIG_SYS_I2C_EEPROM_ADDR_LEN, buf, len); - - i2c_set_bus_num(current_i2c_bus); - - return res; + return dm_i2c_read(eeprom, offset, (uint8_t *)buf, len); } static int cl_eeprom_setup(uint eeprom_bus) diff --git a/board/compulab/common/eeprom.h b/board/compulab/common/eeprom.h index 9bd7604a999..0a44926ebd1 100644 --- a/board/compulab/common/eeprom.h +++ b/board/compulab/common/eeprom.h @@ -10,7 +10,7 @@ #define _EEPROM_ #include <errno.h> -#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) +#if !CONFIG_IS_ENABLED(TARGET_TRIMSLICE) int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus); u32 cl_eeprom_get_board_rev(uint eeprom_bus); int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus); diff --git a/board/eets/pdu001/board.c b/board/eets/pdu001/board.c index 2ad256f8635..00f9a5ef341 100644 --- a/board/eets/pdu001/board.c +++ b/board/eets/pdu001/board.c @@ -56,10 +56,10 @@ DECLARE_GLOBAL_DATA_PTR; * boot device save register * ------------------------- * The boot device can be quired by 'spl_boot_device()' in - * 'am33xx_spl_board_init'. However it can't be saved in the u-boot + * 'spl_board_init'. However it can't be saved in the u-boot * environment here. In turn 'spl_boot_device' can't be called in * 'board_late_init' which allows writing to u-boot environment. - * To get the boot device from 'am33xx_spl_board_init' to + * To get the boot device from 'spl_board_init' to * 'board_late_init' we therefore use a scratch register from the RTC. */ #define CFG_SYS_RTC_SCRATCH0 0x60 @@ -192,7 +192,7 @@ const struct dpll_params dpll_ddr_evm_sk = { const struct dpll_params dpll_ddr_bone_black = { 400, OSC - 1, 1, -1, -1, -1, -1}; -void am33xx_spl_board_init(void) +void spl_board_init(void) { struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; diff --git a/board/grinn/chiliboard/board.c b/board/grinn/chiliboard/board.c index 8313b37655f..e0eb8aa9f2b 100644 --- a/board/grinn/chiliboard/board.c +++ b/board/grinn/chiliboard/board.c @@ -80,7 +80,7 @@ void set_mux_conf_regs(void) enable_board_pin_mux(); } -void am33xx_spl_board_init(void) +void spl_board_init(void) { chilisom_spl_board_init(); } diff --git a/board/kosagi/novena/novena.c b/board/kosagi/novena/novena.c index 3220727f236..f65551ece5e 100644 --- a/board/kosagi/novena/novena.c +++ b/board/kosagi/novena/novena.c @@ -137,23 +137,23 @@ struct novena_eeprom_data { int misc_init_r(void) { struct novena_eeprom_data data; - uchar *datap = (uchar *)&data; + uint8_t *datap = (uint8_t *)&data; const char *signature = "Novena"; + struct udevice *eeprom; int ret; /* If 'ethaddr' is already set, do nothing. */ if (env_get("ethaddr")) return 0; - /* EEPROM is at bus 2. */ - ret = i2c_set_bus_num(2); + /* EEPROM is at bus 2, address 0x56 */ + ret = i2c_get_chip_for_busnum(2, 0x56, 1, &eeprom); if (ret) { puts("Cannot select EEPROM I2C bus.\n"); return 0; } - /* EEPROM is at address 0x56. */ - ret = eeprom_read(0x56, 0, datap, sizeof(data)); + ret = dm_i2c_read(eeprom, 0, datap, sizeof(data)); if (ret) { puts("Cannot read I2C EEPROM.\n"); return 0; diff --git a/board/kosagi/novena/video.c b/board/kosagi/novena/video.c index be5a737a31d..67f98431b58 100644 --- a/board/kosagi/novena/video.c +++ b/board/kosagi/novena/video.c @@ -58,28 +58,29 @@ #define IT6521_RETRY_MAX 20 +static struct udevice *it6251_chip; +static struct udevice *it6251_lvds; + static int it6251_is_stable(void) { - const unsigned int caddr = NOVENA_IT6251_CHIPADDR; - const unsigned int laddr = NOVENA_IT6251_LVDSADDR; int status; int clkcnt; int rpclkcnt; int refstate; - rpclkcnt = (i2c_reg_read(caddr, 0x13) & 0xff) | - ((i2c_reg_read(caddr, 0x14) << 8) & 0x0f00); + rpclkcnt = (dm_i2c_reg_read(it6251_chip, 0x13) & 0xff) | + ((dm_i2c_reg_read(it6251_chip, 0x14) << 8) & 0x0f00); debug("RPCLKCnt: %d\n", rpclkcnt); - status = i2c_reg_read(caddr, IT6251_SYSTEM_STATUS); + status = dm_i2c_reg_read(it6251_chip, IT6251_SYSTEM_STATUS); debug("System status: 0x%02x\n", status); - clkcnt = (i2c_reg_read(laddr, IT6251_REG_PCLK_CNT_LOW) & 0xff) | - ((i2c_reg_read(laddr, IT6251_REG_PCLK_CNT_HIGH) << 8) & + clkcnt = (dm_i2c_reg_read(it6251_lvds, IT6251_REG_PCLK_CNT_LOW) & 0xff) | + ((dm_i2c_reg_read(it6251_lvds, IT6251_REG_PCLK_CNT_HIGH) << 8) & 0x0f00); debug("Clock: 0x%02x\n", clkcnt); - refstate = i2c_reg_read(laddr, IT6251_REF_STATE); + refstate = dm_i2c_reg_read(it6251_lvds, IT6251_REF_STATE); debug("Ref Link State: 0x%02x\n", refstate); if ((refstate & 0x1f) != 0) @@ -97,16 +98,14 @@ static int it6251_is_stable(void) static int it6251_ready(void) { - const unsigned int caddr = NOVENA_IT6251_CHIPADDR; - /* Test if the IT6251 came out of reset by reading ID regs. */ - if (i2c_reg_read(caddr, IT6251_VENDOR_ID_LOW) != 0x15) + if (dm_i2c_reg_read(it6251_chip, IT6251_VENDOR_ID_LOW) != 0x15) return 0; - if (i2c_reg_read(caddr, IT6251_VENDOR_ID_HIGH) != 0xca) + if (dm_i2c_reg_read(it6251_chip, IT6251_VENDOR_ID_HIGH) != 0xca) return 0; - if (i2c_reg_read(caddr, IT6251_DEVICE_ID_LOW) != 0x51) + if (dm_i2c_reg_read(it6251_chip, IT6251_DEVICE_ID_LOW) != 0x51) return 0; - if (i2c_reg_read(caddr, IT6251_DEVICE_ID_HIGH) != 0x62) + if (dm_i2c_reg_read(it6251_chip, IT6251_DEVICE_ID_HIGH) != 0x62) return 0; return 1; @@ -114,116 +113,112 @@ static int it6251_ready(void) static void it6251_program_regs(void) { - const unsigned int caddr = NOVENA_IT6251_CHIPADDR; - const unsigned int laddr = NOVENA_IT6251_LVDSADDR; - - i2c_reg_write(caddr, 0x05, 0x00); + dm_i2c_reg_write(it6251_chip, 0x05, 0x00); mdelay(1); /* set LVDSRX address, and enable */ - i2c_reg_write(caddr, 0xfd, 0xbc); - i2c_reg_write(caddr, 0xfe, 0x01); + dm_i2c_reg_write(it6251_chip, 0xfd, 0xbc); + dm_i2c_reg_write(it6251_chip, 0xfe, 0x01); /* * LVDSRX */ /* This write always fails, because the chip goes into reset */ /* reset LVDSRX */ - i2c_reg_write(laddr, 0x05, 0xff); - i2c_reg_write(laddr, 0x05, 0x00); + dm_i2c_reg_write(it6251_lvds, 0x05, 0xff); + dm_i2c_reg_write(it6251_lvds, 0x05, 0x00); /* reset LVDSRX PLL */ - i2c_reg_write(laddr, 0x3b, 0x42); - i2c_reg_write(laddr, 0x3b, 0x43); + dm_i2c_reg_write(it6251_lvds, 0x3b, 0x42); + dm_i2c_reg_write(it6251_lvds, 0x3b, 0x43); /* something with SSC PLL */ - i2c_reg_write(laddr, 0x3c, 0x08); + dm_i2c_reg_write(it6251_lvds, 0x3c, 0x08); /* don't swap links, but writing reserved registers */ - i2c_reg_write(laddr, 0x0b, 0x88); + dm_i2c_reg_write(it6251_lvds, 0x0b, 0x88); /* JEIDA, 8-bit depth 0x11, orig 0x42 */ - i2c_reg_write(laddr, 0x2c, 0x01); + dm_i2c_reg_write(it6251_lvds, 0x2c, 0x01); /* "reserved" */ - i2c_reg_write(laddr, 0x32, 0x04); + dm_i2c_reg_write(it6251_lvds, 0x32, 0x04); /* "reserved" */ - i2c_reg_write(laddr, 0x35, 0xe0); + dm_i2c_reg_write(it6251_lvds, 0x35, 0xe0); /* "reserved" + clock delay */ - i2c_reg_write(laddr, 0x2b, 0x24); + dm_i2c_reg_write(it6251_lvds, 0x2b, 0x24); /* reset LVDSRX pix clock */ - i2c_reg_write(laddr, 0x05, 0x02); - i2c_reg_write(laddr, 0x05, 0x00); + dm_i2c_reg_write(it6251_lvds, 0x05, 0x02); + dm_i2c_reg_write(it6251_lvds, 0x05, 0x00); /* * DPTX */ /* set for two lane mode, normal op, no swapping, no downspread */ - i2c_reg_write(caddr, 0x16, 0x02); + dm_i2c_reg_write(it6251_chip, 0x16, 0x02); /* some AUX channel EDID magic */ - i2c_reg_write(caddr, 0x23, 0x40); + dm_i2c_reg_write(it6251_chip, 0x23, 0x40); /* power down lanes 3-0 */ - i2c_reg_write(caddr, 0x5c, 0xf3); + dm_i2c_reg_write(it6251_chip, 0x5c, 0xf3); /* enable DP scrambling, change EQ CR phase */ - i2c_reg_write(caddr, 0x5f, 0x06); + dm_i2c_reg_write(it6251_chip, 0x5f, 0x06); /* color mode RGB, pclk/2 */ - i2c_reg_write(caddr, 0x60, 0x02); + dm_i2c_reg_write(it6251_chip, 0x60, 0x02); /* dual pixel input mode, no EO swap, no RGB swap */ - i2c_reg_write(caddr, 0x61, 0x04); + dm_i2c_reg_write(it6251_chip, 0x61, 0x04); /* M444B24 video format */ - i2c_reg_write(caddr, 0x62, 0x01); + dm_i2c_reg_write(it6251_chip, 0x62, 0x01); /* vesa range / not interlace / vsync high / hsync high */ - i2c_reg_write(caddr, 0xa0, 0x0F); + dm_i2c_reg_write(it6251_chip, 0xa0, 0x0F); /* hpd event timer set to 1.6-ish ms */ - i2c_reg_write(caddr, 0xc9, 0xf5); + dm_i2c_reg_write(it6251_chip, 0xc9, 0xf5); /* more reserved magic */ - i2c_reg_write(caddr, 0xca, 0x4d); - i2c_reg_write(caddr, 0xcb, 0x37); + dm_i2c_reg_write(it6251_chip, 0xca, 0x4d); + dm_i2c_reg_write(it6251_chip, 0xcb, 0x37); /* enhanced framing mode, auto video fifo reset, video mute disable */ - i2c_reg_write(caddr, 0xd3, 0x03); + dm_i2c_reg_write(it6251_chip, 0xd3, 0x03); /* "vidstmp" and some reserved stuff */ - i2c_reg_write(caddr, 0xd4, 0x45); + dm_i2c_reg_write(it6251_chip, 0xd4, 0x45); /* queue number -- reserved */ - i2c_reg_write(caddr, 0xe7, 0xa0); + dm_i2c_reg_write(it6251_chip, 0xe7, 0xa0); /* info frame packets and reserved */ - i2c_reg_write(caddr, 0xe8, 0x33); + dm_i2c_reg_write(it6251_chip, 0xe8, 0x33); /* more AVI stuff */ - i2c_reg_write(caddr, 0xec, 0x00); + dm_i2c_reg_write(it6251_chip, 0xec, 0x00); /* select PC master reg for aux channel? */ - i2c_reg_write(caddr, 0x23, 0x42); + dm_i2c_reg_write(it6251_chip, 0x23, 0x42); /* send PC request commands */ - i2c_reg_write(caddr, 0x24, 0x00); - i2c_reg_write(caddr, 0x25, 0x00); - i2c_reg_write(caddr, 0x26, 0x00); + dm_i2c_reg_write(it6251_chip, 0x24, 0x00); + dm_i2c_reg_write(it6251_chip, 0x25, 0x00); + dm_i2c_reg_write(it6251_chip, 0x26, 0x00); /* native aux read */ - i2c_reg_write(caddr, 0x2b, 0x00); + dm_i2c_reg_write(it6251_chip, 0x2b, 0x00); /* back to internal */ - i2c_reg_write(caddr, 0x23, 0x40); + dm_i2c_reg_write(it6251_chip, 0x23, 0x40); /* voltage swing level 3 */ - i2c_reg_write(caddr, 0x19, 0xff); + dm_i2c_reg_write(it6251_chip, 0x19, 0xff); /* pre-emphasis level 3 */ - i2c_reg_write(caddr, 0x1a, 0xff); + dm_i2c_reg_write(it6251_chip, 0x1a, 0xff); /* start link training */ - i2c_reg_write(caddr, 0x17, 0x01); + dm_i2c_reg_write(it6251_chip, 0x17, 0x01); } static int it6251_init(void) { - const unsigned int caddr = NOVENA_IT6251_CHIPADDR; int reg; int tries, retries = 0; @@ -233,7 +228,7 @@ static int it6251_init(void) /* Wait for video stable. */ for (tries = 0; tries < 100; tries++) { - reg = i2c_reg_read(caddr, 0x17); + reg = dm_i2c_reg_read(it6251_chip, 0x17); /* Test Link CFG, STS, LCS read done. */ if ((reg & 0xe0) != 0xe0) { /* Not yet, wait a bit more. */ @@ -285,10 +280,14 @@ static int detect_lvds(struct display_info_t const *dev) enable_lvds(dev); - ret = i2c_set_bus_num(NOVENA_IT6251_I2C_BUS); - if (ret) { - puts("Cannot select IT6251 I2C bus.\n"); - return 0; + if (!it6251_chip) { + ret = i2c_get_chip_for_busnum(NOVENA_IT6251_I2C_BUS, + NOVENA_IT6251_CHIPADDR, + 1, &it6251_chip); + if (ret) { + puts("Cannot select IT6251 I2C bus.\n"); + return 0; + } } /* Wait up-to ~250 mS for the LVDS to come up. */ @@ -435,9 +434,20 @@ void setup_display_lvds(void) { int ret; - ret = i2c_set_bus_num(NOVENA_IT6251_I2C_BUS); + if (!it6251_chip) { + ret = i2c_get_chip_for_busnum(NOVENA_IT6251_I2C_BUS, + NOVENA_IT6251_CHIPADDR, + 1, &it6251_chip); + if (ret) { + puts("Cannot select LVDS-to-eDP I2C bus.\n"); + return; + } + } + + ret = i2c_get_chip_for_busnum(NOVENA_IT6251_I2C_BUS, + NOVENA_IT6251_LVDSADDR, 1, &it6251_lvds); if (ret) { - puts("Cannot select LVDS-to-eDP I2C bus.\n"); + puts("Cannot find IT6251 LVDS bus.\n"); return; } diff --git a/board/lg/sniper/sniper.c b/board/lg/sniper/sniper.c index 88d5d088143..9d0959f294e 100644 --- a/board/lg/sniper/sniper.c +++ b/board/lg/sniper/sniper.c @@ -14,11 +14,9 @@ #include <linux/ctype.h> #include <linux/usb/musb.h> #include <asm/omap_musb.h> -#include <asm/arch/mmc_host_def.h> #include <asm/arch/sys_proto.h> #include <asm/arch/mem.h> #include <asm/io.h> -#include <ns16550.h> #include <twl4030.h> #include "sniper.h" @@ -30,18 +28,6 @@ const omap3_sysinfo sysinfo = { .nand_string = "MMC" }; -static const struct ns16550_plat serial_omap_plat = { - .base = OMAP34XX_UART3, - .reg_shift = 2, - .clock = V_NS16550_CLK, - .fcr = UART_FCR_DEFVAL, -}; - -U_BOOT_DRVINFO(sniper_serial) = { - .name = "ns16550_serial", - .plat = &serial_omap_plat -}; - #if defined(CONFIG_USB_MUSB_HOST) || defined(CONFIG_USB_MUSB_GADGET) static struct musb_hdrc_config musb_config = { .multipoint = 1, @@ -77,6 +63,11 @@ void get_board_mem_timings(struct board_sdrc_timings *timings) timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; timings->mr = MICRON_V_MR_165; } + +void spl_board_init(void) +{ + twl4030_power_mmc_init(1); +} #endif int board_init(void) @@ -188,13 +179,3 @@ int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason) return omap_reboot_mode_store("b"); } - -int board_mmc_init(struct bd_info *bis) -{ - return omap_mmc_init(1, 0, 0, -1, -1); -} - -void board_mmc_power_init(void) -{ - twl4030_power_mmc_init(1); -} diff --git a/board/softing/vining_2000/vining_2000.c b/board/softing/vining_2000/vining_2000.c index a0dbf97524b..bd430cfaa7f 100644 --- a/board/softing/vining_2000/vining_2000.c +++ b/board/softing/vining_2000/vining_2000.c @@ -18,7 +18,6 @@ #include <asm/gpio.h> #include <asm/mach-imx/iomux-v3.h> #include <asm/io.h> -#include <asm/mach-imx/mxc_i2c.h> #include <asm/sections.h> #include <env.h> #include <linux/bitops.h> @@ -27,7 +26,6 @@ #include <config.h> #include <fsl_esdhc_imx.h> #include <mmc.h> -#include <i2c.h> #include <miiphy.h> #include <netdev.h> #include <power/pmic.h> @@ -53,10 +51,6 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_HIGH | \ PAD_CTL_SRE_FAST) -#define I2C_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | \ - PAD_CTL_PKE | PAD_CTL_ODE | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm) - #define USDHC_CLK_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST) @@ -120,21 +114,6 @@ eth_fail: return ret; } -#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) -/* I2C1 for PMIC */ -static struct i2c_pads_info i2c_pad_info1 = { - .scl = { - .i2c_mode = MX6_PAD_GPIO1_IO00__I2C1_SCL | PC, - .gpio_mode = MX6_PAD_GPIO1_IO00__GPIO1_IO_0 | PC, - .gp = IMX_GPIO_NR(1, 0), - }, - .sda = { - .i2c_mode = MX6_PAD_GPIO1_IO01__I2C1_SDA | PC, - .gpio_mode = MX6_PAD_GPIO1_IO01__GPIO1_IO_1 | PC, - .gp = IMX_GPIO_NR(1, 1), - }, -}; - static struct pmic *pfuze_init(unsigned char i2cbus) { struct pmic *p; @@ -400,10 +379,6 @@ int board_init(void) /* Address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; -#ifdef CONFIG_SYS_I2C_MXC - setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); -#endif - return board_net_init(); } diff --git a/board/tcl/sl50/board.c b/board/tcl/sl50/board.c index 484b4e24428..6c60c70b7b4 100644 --- a/board/tcl/sl50/board.c +++ b/board/tcl/sl50/board.c @@ -92,7 +92,7 @@ int spl_start_uboot(void) const struct dpll_params dpll_ddr_sl50 = { 400, OSC-1, 1, -1, -1, -1, -1}; -void am33xx_spl_board_init(void) +void spl_board_init(void) { int mpu_vdd; diff --git a/board/vscom/baltos/board.c b/board/vscom/baltos/board.c index cea25f8c900..f54f183038b 100644 --- a/board/vscom/baltos/board.c +++ b/board/vscom/baltos/board.c @@ -177,7 +177,7 @@ const struct dpll_params dpll_ddr_evm_sk = { const struct dpll_params dpll_ddr_baltos = { 400, OSC-1, 1, -1, -1, -1, -1}; -void am33xx_spl_board_init(void) +void spl_board_init(void) { int sil_rev, mpu_vdd; int freq; diff --git a/boot/Kconfig b/boot/Kconfig index 940389d4882..7ac34574079 100644 --- a/boot/Kconfig +++ b/boot/Kconfig @@ -745,6 +745,76 @@ config BOOTMETH_SCRIPT This provides a way to try out standard boot on an existing boot flow. It is not enabled by default to save space. +config UPL + bool "upl - Universal Payload Specification" + imply CMD_UPL + imply UPL_READ + imply UPL_WRITE + imply SPL_UPL if SPL + help + Provides support for UPL payloads and handoff information. U-Boot + supports generating and accepting handoff information. The mkimage + tool will eventually support creating payloads. + +if UPL + +config UPL_READ + bool "upl - Support reading a Universal Payload handoff" + help + Provides support for decoding a UPL-format payload into a C structure + which can be used elsewhere in U-Boot. This is just the reading + implementation, useful for trying it out. See UPL_IN for how + to tell U-Boot to actually read it on startup and use it for memory + and device information, etc. + +config UPL_WRITE + bool "upl - Support writing a Universal Payload handoff" + help + Provides support for encoding a UPL-format payload from a C structure + so it can be passed to another program. This is just the writing + implementation, useful for trying it out. See SPL_UPL_OUT + for how to tell U-Boot SPL to actually write it before jumping to + the next phase. + +config UPL_IN + bool "upl - Read the UPL handoff on startup" + select UPL_READ + help + Read an SPL handoff when U-Boot starts and use it to provide + devices, memory layout, etc. required by U-Boot. This allows U-Boot + to function as a payload in the meaning of the specification. + +if SPL + +config SPL_UPL + bool "Write a UPL handoff in SPL" + imply SPL_UPL_OUT + help + This tells SPL to write a UPL handoff and pass it to the next phase + (e.g. to U-Boot or another program which SPL loads and runs). THis + provides information to help that program run correctly and + efficiently on the machine. + +config SPL_UPL_WRITE + bool # upl - Support writing a Universal Payload handoff in SPL + select SPL_BLOBLIST + help + Provides support for encoding a UPL-format payload from a C structure + so it can be passed to another program. This is just the writing + implementation, useful for trying it out. + +config SPL_UPL_OUT + bool "upl - Support writing a Universal Payload handoff in SPL" + select SPL_UPL_WRITE + help + Provides support for encoding a UPL-format payload and passing it to + the next firmware phase. This allows U-Boot SPL to function as + Platform Init in the meaning of the specification. + +endif # SPL + +endif # UPL + endif # BOOTSTD config LEGACY_IMAGE_FORMAT diff --git a/boot/Makefile b/boot/Makefile index dff6f99081a..f4675d6ffd5 100644 --- a/boot/Makefile +++ b/boot/Makefile @@ -43,6 +43,10 @@ endif obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += fdt_support.o obj-$(CONFIG_$(SPL_TPL_)FDT_SIMPLEFB) += fdt_simplefb.o +obj-$(CONFIG_$(SPL_TPL_)UPL) += upl_common.o +obj-$(CONFIG_$(SPL_TPL_)UPL_READ) += upl_read.o +obj-$(CONFIG_$(SPL_TPL_)UPL_WRITE) += upl_write.o + obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += image-fdt.o obj-$(CONFIG_$(SPL_TPL_)FIT_SIGNATURE) += fdt_region.o obj-$(CONFIG_$(SPL_TPL_)FIT) += image-fit.o diff --git a/boot/image-fit.c b/boot/image-fit.c index 9253f81fff5..7d56f0b5e6e 100644 --- a/boot/image-fit.c +++ b/boot/image-fit.c @@ -36,6 +36,7 @@ DECLARE_GLOBAL_DATA_PTR; #include <bootm.h> #include <image.h> #include <bootstage.h> +#include <upl.h> #include <u-boot/crc.h> /*****************************************************************************/ @@ -2294,6 +2295,8 @@ int fit_image_load(struct bootm_headers *images, ulong addr, bootstage_mark(bootstage_id + BOOTSTAGE_SUB_LOAD); + upl_add_image(fit, noffset, load, len); + *datap = load; *lenp = len; if (fit_unamep) diff --git a/boot/upl_common.c b/boot/upl_common.c new file mode 100644 index 00000000000..3924423abd5 --- /dev/null +++ b/boot/upl_common.c @@ -0,0 +1,60 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * UPL handoff command functions + * + * Copyright 2024 Google LLC + * Written by Simon Glass <sjg@chromium.org> + */ + +#define LOG_CATEGORY UCLASS_BOOTSTD + +#include <string.h> +#include <upl.h> + +/* Names of bootmodes */ +const char *const bootmode_names[UPLBM_COUNT] = { + [UPLBM_FULL] = "full", + [UPLBM_MINIMAL] = "minimal", + [UPLBM_FAST] = "fast", + [UPLBM_DIAG] = "diag", + [UPLBM_DEFAULT] = "default", + [UPLBM_S2] = "s2", + [UPLBM_S3] = "s3", + [UPLBM_S4] = "s4", + [UPLBM_S5] = "s5", + [UPLBM_FACTORY] = "factory", + [UPLBM_FLASH] = "flash", + [UPLBM_RECOVERY] = "recovery", +}; + +/* Names of memory usages */ +const char *const usage_names[UPLUS_COUNT] = { + [UPLUS_ACPI_RECLAIM] = "acpi-reclaim", + [UPLUS_ACPI_NVS] = "acpi-nvs", + [UPLUS_BOOT_CODE] = "boot-code", + [UPLUS_BOOT_DATA] = "boot-data", + [UPLUS_RUNTIME_CODE] = "runtime-code", + [UPLUS_RUNTIME_DATA] = "runtime-data", +}; + +/* Names of access types */ +const char *const access_types[UPLUS_COUNT] = { + [UPLAT_MMIO] = "mmio", + [UPLAT_IO] = "io", +}; + +/* Names of graphics formats */ +const char *const graphics_formats[UPLUS_COUNT] = { + [UPLGF_ARGB32] = "a8r8g8b8", + [UPLGF_ABGR32] = "a8b8g8r8", + [UPLGF_ABGR64] = "a16b16g16r16", +}; + +void upl_init(struct upl *upl) +{ + memset(upl, '\0', sizeof(struct upl)); + alist_init_struct(&upl->image, struct upl_image); + alist_init_struct(&upl->mem, struct upl_mem); + alist_init_struct(&upl->memmap, struct upl_memmap); + alist_init_struct(&upl->memres, struct upl_memres); +} diff --git a/boot/upl_common.h b/boot/upl_common.h new file mode 100644 index 00000000000..cc517dc1de9 --- /dev/null +++ b/boot/upl_common.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * UPL handoff command functions + * + * Copyright 2024 Google LLC + * Written by Simon Glass <sjg@chromium.org> + */ + +#ifndef __UPL_COMMON_H +#define __UPL_COMMON_H + +/* Names of bootmodes */ +extern const char *const bootmode_names[UPLBM_COUNT]; + +/* Names of memory usages */ +extern const char *const usage_names[UPLUS_COUNT]; + +/* Names of access types */ +extern const char *const access_types[UPLUS_COUNT]; + +/* Names of graphics formats */ +extern const char *const graphics_formats[UPLUS_COUNT]; + +#endif /* __UPL_COMMON_H */ diff --git a/boot/upl_read.c b/boot/upl_read.c new file mode 100644 index 00000000000..5063897a132 --- /dev/null +++ b/boot/upl_read.c @@ -0,0 +1,588 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * UPL handoff parsing + * + * Copyright 2024 Google LLC + * Written by Simon Glass <sjg@chromium.org> + */ + +#define LOG_CATEGORY UCLASS_BOOTSTD + +#include <log.h> +#include <upl.h> +#include <dm/ofnode.h> +#include "upl_common.h" + +/** + * read_addr() - Read an address + * + * Reads an address in the correct format, either 32- or 64-bit + * + * @upl: UPL state + * @node: Node to read from + * @prop: Property name to read + * @addr: Place to put the address + * Return: 0 if OK, -ve on error + */ +static int read_addr(const struct upl *upl, ofnode node, const char *prop, + ulong *addrp) +{ + int ret; + + if (upl->addr_cells == 1) { + u32 val; + + ret = ofnode_read_u32(node, prop, &val); + if (!ret) + *addrp = val; + } else { + u64 val; + + ret = ofnode_read_u64(node, prop, &val); + if (!ret) + *addrp = val; + } + + return ret; +} + +/** + * read_size() - Read a size + * + * Reads a size in the correct format, either 32- or 64-bit + * + * @upl: UPL state + * @node: Node to read from + * @prop: Property name to read + * @addr: Place to put the size + * Return: 0 if OK, -ve on error + */ +static int read_size(const struct upl *upl, ofnode node, const char *prop, + ulong *sizep) +{ + int ret; + + if (upl->size_cells == 1) { + u32 val; + + ret = ofnode_read_u32(node, prop, &val); + if (!ret) + *sizep = val; + } else { + u64 val; + + ret = ofnode_read_u64(node, prop, &val); + if (!ret) + *sizep = val; + } + + return ret; +} + +/** + * ofnode_read_bitmask() - Read a bit mask from a string list + * + * @node: Node to read from + * @prop: Property name to read + * @names: Array of names for each bit + * @count: Number of array entries + * @value: Returns resulting bit-mask value on success + * Return: 0 if OK, -EINVAL if a bit number is not defined, -ENOSPC if the + * string is too long for the (internal) buffer, -EINVAL if no such property + */ +static int ofnode_read_bitmask(ofnode node, const char *prop, + const char *const names[], uint count, + uint *valuep) +{ + const char **list; + const char **strp; + uint val; + uint bit; + int ret; + + ret = ofnode_read_string_list(node, prop, &list); + if (ret < 0) + return log_msg_ret("rea", ret); + + val = 0; + for (strp = list; *strp; strp++) { + const char *str = *strp; + bool found = false; + + for (bit = 0; bit < count; bit++) { + if (!strcmp(str, names[bit])) { + found = true; + break; + } + } + if (found) + val |= BIT(bit); + else + log_warning("%s/%s: Invalid value '%s'\n", + ofnode_get_name(node), prop, str); + } + *valuep = val; + + return 0; +} + +/** + * ofnode_read_value() - Read a string value as an int using a lookup + * + * @node: Node to read from + * @prop: Property name to read + * @names: Array of names for each int value + * @count: Number of array entries + * @valuep: Returns int value read + * Return: 0 if OK, -EINVAL if a bit number is not defined, -ENOENT if the + * property does not exist + */ +static int ofnode_read_value(ofnode node, const char *prop, + const char *const names[], uint count, + uint *valuep) +{ + const char *str; + int i; + + str = ofnode_read_string(node, prop); + if (!str) + return log_msg_ret("rd", -ENOENT); + + for (i = 0; i < count; i++) { + if (!strcmp(names[i], str)) { + *valuep = i; + return 0; + } + } + + log_debug("Unnamed value '%s'\n", str); + return log_msg_ret("val", -EINVAL); +} + +static int read_uint(ofnode node, const char *prop, uint *valp) +{ + u32 val; + int ret; + + ret = ofnode_read_u32(node, prop, &val); + if (ret) + return ret; + *valp = val; + + return 0; +} + +/** + * decode_root_props() - Decode root properties from the tree + * + * @upl: UPL state + * @node: Node to decode + * Return 0 if OK, -ve on error + */ +static int decode_root_props(struct upl *upl, ofnode node) +{ + int ret; + + ret = read_uint(node, UPLP_ADDRESS_CELLS, &upl->addr_cells); + if (!ret) + ret = read_uint(node, UPLP_SIZE_CELLS, &upl->size_cells); + if (ret) + return log_msg_ret("cel", ret); + + return 0; +} + +/** + * decode_root_props() - Decode UPL parameters from the tree + * + * @upl: UPL state + * @node: Node to decode + * Return 0 if OK, -ve on error + */ +static int decode_upl_params(struct upl *upl, ofnode options) +{ + ofnode node; + int ret; + + node = ofnode_find_subnode(options, UPLN_UPL_PARAMS); + if (!ofnode_valid(node)) + return log_msg_ret("par", -EINVAL); + log_debug("decoding '%s'\n", ofnode_get_name(node)); + + ret = read_addr(upl, node, UPLP_SMBIOS, &upl->smbios); + if (ret) + return log_msg_ret("smb", ret); + ret = read_addr(upl, node, UPLP_ACPI, &upl->acpi); + if (ret) + return log_msg_ret("acp", ret); + ret = ofnode_read_bitmask(node, UPLP_BOOTMODE, bootmode_names, + UPLBM_COUNT, &upl->bootmode); + if (ret) + return log_msg_ret("boo", ret); + ret = read_uint(node, UPLP_ADDR_WIDTH, &upl->addr_width); + if (ret) + return log_msg_ret("add", ret); + ret = read_uint(node, UPLP_ACPI_NVS_SIZE, &upl->acpi_nvs_size); + if (ret) + return log_msg_ret("nvs", ret); + + return 0; +} + +/** + * decode_upl_images() - Decode /options/upl-image nodes + * + * @node: /options node in which to look for the node + * Return 0 if OK, -ve on error + */ +static int decode_upl_images(struct upl *upl, ofnode options) +{ + ofnode node, images; + int ret; + + images = ofnode_find_subnode(options, UPLN_UPL_IMAGE); + if (!ofnode_valid(images)) + return log_msg_ret("img", -EINVAL); + log_debug("decoding '%s'\n", ofnode_get_name(images)); + + ret = read_addr(upl, images, UPLP_FIT, &upl->fit); + if (!ret) + ret = read_uint(images, UPLP_CONF_OFFSET, &upl->conf_offset); + if (ret) + return log_msg_ret("cnf", ret); + + ofnode_for_each_subnode(node, images) { + struct upl_image img; + + ret = read_addr(upl, node, UPLP_LOAD, &img.load); + if (!ret) + ret = read_size(upl, node, UPLP_SIZE, &img.size); + if (!ret) + ret = read_uint(node, UPLP_OFFSET, &img.offset); + img.description = ofnode_read_string(node, UPLP_DESCRIPTION); + if (!img.description) + return log_msg_ret("sim", ret); + if (!alist_add(&upl->image, img)) + return log_msg_ret("img", -ENOMEM); + } + + return 0; +} + +/** + * decode_addr_size() - Decide a set of addr/size pairs + * + * Each base/size value from the devicetree is written to the region list + * + * @upl: UPL state + * @buf: Bytes to decode + * @size: Number of bytes to decode + * @regions: List of regions to process (struct memregion) + * Returns: number of regions found, if OK, else -ve on error + */ +static int decode_addr_size(const struct upl *upl, const char *buf, int size, + struct alist *regions) +{ + const char *ptr, *end = buf + size; + int i; + + alist_init_struct(regions, struct memregion); + ptr = buf; + for (i = 0; ptr < end; i++) { + struct memregion reg; + + if (upl->addr_cells == 1) + reg.base = fdt32_to_cpu(*(u32 *)ptr); + else + reg.base = fdt64_to_cpu(*(u64 *)ptr); + ptr += upl->addr_cells * sizeof(u32); + + if (upl->size_cells == 1) + reg.size = fdt32_to_cpu(*(u32 *)ptr); + else + reg.size = fdt64_to_cpu(*(u64 *)ptr); + ptr += upl->size_cells * sizeof(u32); + if (ptr > end) + return -ENOSPC; + + if (!alist_add(regions, reg)) + return log_msg_ret("reg", -ENOMEM); + } + + return i; +} + +/** + * node_matches_at() - Check if a node name matches "base@..." + * + * Return: true if the node name matches the base string followed by an @ sign; + * false otherwise + */ +static bool node_matches_at(ofnode node, const char *base) +{ + const char *name = ofnode_get_name(node); + int len = strlen(base); + + return !strncmp(base, name, len) && name[len] == '@'; +} + +/** + * decode_upl_memory_node() - Decode a /memory node from the tree + * + * @upl: UPL state + * @node: Node to decode + * Return 0 if OK, -ve on error + */ +static int decode_upl_memory_node(struct upl *upl, ofnode node) +{ + struct upl_mem mem; + const char *buf; + int size, len; + + buf = ofnode_read_prop(node, UPLP_REG, &size); + if (!buf) { + log_warning("Node '%s': Missing '%s' property\n", + ofnode_get_name(node), UPLP_REG); + return log_msg_ret("reg", -EINVAL); + } + len = decode_addr_size(upl, buf, size, &mem.region); + if (len < 0) + return log_msg_ret("buf", len); + mem.hotpluggable = ofnode_read_bool(node, UPLP_HOTPLUGGABLE); + if (!alist_add(&upl->mem, mem)) + return log_msg_ret("mem", -ENOMEM); + + return 0; +} + +/** + * decode_upl_memmap() - Decode memory-map nodes from the tree + * + * @upl: UPL state + * @root: Parent node containing the /memory-map nodes + * Return 0 if OK, -ve on error + */ +static int decode_upl_memmap(struct upl *upl, ofnode root) +{ + ofnode node; + + ofnode_for_each_subnode(node, root) { + struct upl_memmap memmap; + int size, len, ret; + const char *buf; + + memmap.name = ofnode_get_name(node); + memmap.usage = 0; + + buf = ofnode_read_prop(node, UPLP_REG, &size); + if (!buf) { + log_warning("Node '%s': Missing '%s' property\n", + ofnode_get_name(node), UPLP_REG); + continue; + } + + len = decode_addr_size(upl, buf, size, &memmap.region); + if (len < 0) + return log_msg_ret("buf", len); + ret = ofnode_read_bitmask(node, UPLP_USAGE, usage_names, + UPLUS_COUNT, &memmap.usage); + if (ret && ret != -EINVAL) /* optional property */ + return log_msg_ret("bit", ret); + + if (!alist_add(&upl->memmap, memmap)) + return log_msg_ret("mmp", -ENOMEM); + } + + return 0; +} + +/** + * decode_upl_memres() - Decode reserved-memory nodes from the tree + * + * @upl: UPL state + * @root: Parent node containing the reserved-memory nodes + * Return 0 if OK, -ve on error + */ +static int decode_upl_memres(struct upl *upl, ofnode root) +{ + ofnode node; + + ofnode_for_each_subnode(node, root) { + struct upl_memres memres; + const char *buf; + int size, len; + + log_debug("decoding '%s'\n", ofnode_get_name(node)); + memres.name = ofnode_get_name(node); + + buf = ofnode_read_prop(node, UPLP_REG, &size); + if (!buf) { + log_warning("Node '%s': Missing 'reg' property\n", + ofnode_get_name(node)); + continue; + } + + len = decode_addr_size(upl, buf, size, &memres.region); + if (len < 0) + return log_msg_ret("buf", len); + memres.no_map = ofnode_read_bool(node, UPLP_NO_MAP); + + if (!alist_add(&upl->memres, memres)) + return log_msg_ret("mre", -ENOMEM); + } + + return 0; +} + +/** + * decode_upl_serial() - Decode the serial node + * + * @upl: UPL state + * @root: Parent node contain node + * Return 0 if OK, -ve on error + */ +static int decode_upl_serial(struct upl *upl, ofnode node) +{ + struct upl_serial *ser = &upl->serial; + const char *buf; + int len, size; + int ret; + + ser->compatible = ofnode_read_string(node, UPLP_COMPATIBLE); + if (!ser->compatible) { + log_warning("Node '%s': Missing compatible string\n", + ofnode_get_name(node)); + return log_msg_ret("com", -EINVAL); + } + ret = read_uint(node, UPLP_CLOCK_FREQUENCY, &ser->clock_frequency); + if (!ret) + ret = read_uint(node, UPLP_CURRENT_SPEED, &ser->current_speed); + if (ret) + return log_msg_ret("spe", ret); + + buf = ofnode_read_prop(node, UPLP_REG, &size); + if (!buf) { + log_warning("Node '%s': Missing 'reg' property\n", + ofnode_get_name(node)); + return log_msg_ret("reg", -EINVAL); + } + + len = decode_addr_size(upl, buf, sizeof(buf), &ser->reg); + if (len < 0) + return log_msg_ret("buf", len); + + /* set defaults */ + ser->reg_io_shift = UPLD_REG_IO_SHIFT; + ser->reg_offset = UPLD_REG_OFFSET; + ser->reg_io_width = UPLD_REG_IO_WIDTH; + read_uint(node, UPLP_REG_IO_SHIFT, &ser->reg_io_shift); + read_uint(node, UPLP_REG_OFFSET, &ser->reg_offset); + read_uint(node, UPLP_REG_IO_WIDTH, &ser->reg_io_width); + read_addr(upl, node, UPLP_VIRTUAL_REG, &ser->virtual_reg); + ret = ofnode_read_value(node, UPLP_ACCESS_TYPE, access_types, + ARRAY_SIZE(access_types), &ser->access_type); + if (ret && ret != -ENOENT) + return log_msg_ret("ser", ret); + + return 0; +} + +/** + * decode_upl_graphics() - Decode graphics node + * + * @upl: UPL state + * @root: Node to decode + * Return 0 if OK, -ve on error + */ +static int decode_upl_graphics(struct upl *upl, ofnode node) +{ + struct upl_graphics *gra = &upl->graphics; + const char *buf, *compat; + int len, size; + int ret; + + compat = ofnode_read_string(node, UPLP_COMPATIBLE); + if (!compat) { + log_warning("Node '%s': Missing compatible string\n", + ofnode_get_name(node)); + return log_msg_ret("com", -EINVAL); + } + if (strcmp(UPLC_GRAPHICS, compat)) { + log_warning("Node '%s': Ignoring compatible '%s'\n", + ofnode_get_name(node), compat); + return 0; + } + + buf = ofnode_read_prop(node, UPLP_REG, &size); + if (!buf) { + log_warning("Node '%s': Missing 'reg' property\n", + ofnode_get_name(node)); + return log_msg_ret("reg", -EINVAL); + } + + len = decode_addr_size(upl, buf, sizeof(buf), &gra->reg); + if (len < 0) + return log_msg_ret("buf", len); + + ret = read_uint(node, UPLP_WIDTH, &gra->width); + if (!ret) + ret = read_uint(node, UPLP_HEIGHT, &gra->height); + if (!ret) + ret = read_uint(node, UPLP_STRIDE, &gra->stride); + if (!ret) { + ret = ofnode_read_value(node, UPLP_GRAPHICS_FORMAT, + graphics_formats, + ARRAY_SIZE(graphics_formats), + &gra->format); + } + if (ret) + return log_msg_ret("pro", ret); + + return 0; +} + +int upl_read_handoff(struct upl *upl, oftree tree) +{ + ofnode root, node; + int ret; + + if (!oftree_valid(tree)) + return log_msg_ret("tre", -EINVAL); + + root = oftree_root(tree); + + upl_init(upl); + ret = decode_root_props(upl, root); + if (ret) + return log_msg_ret("roo", ret); + + ofnode_for_each_subnode(node, root) { + const char *name = ofnode_get_name(node); + + log_debug("decoding '%s'\n", name); + if (!strcmp(UPLN_OPTIONS, name)) { + ret = decode_upl_params(upl, node); + if (ret) + return log_msg_ret("opt", ret); + + ret = decode_upl_images(upl, node); + } else if (node_matches_at(node, UPLN_MEMORY)) { + ret = decode_upl_memory_node(upl, node); + } else if (!strcmp(UPLN_MEMORY_MAP, name)) { + ret = decode_upl_memmap(upl, node); + } else if (!strcmp(UPLN_MEMORY_RESERVED, name)) { + ret = decode_upl_memres(upl, node); + } else if (node_matches_at(node, UPLN_SERIAL)) { + ret = decode_upl_serial(upl, node); + } else if (node_matches_at(node, UPLN_GRAPHICS)) { + ret = decode_upl_graphics(upl, node); + } else { + log_debug("Unknown node '%s'\n", name); + ret = 0; + } + if (ret) + return log_msg_ret("err", ret); + } + + return 0; +} diff --git a/boot/upl_write.c b/boot/upl_write.c new file mode 100644 index 00000000000..7d637c15ba0 --- /dev/null +++ b/boot/upl_write.c @@ -0,0 +1,622 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * UPL handoff generation + * + * Copyright 2024 Google LLC + * Written by Simon Glass <sjg@chromium.org> + */ + +#define LOG_CATEGORY UCLASS_BOOTSTD + +#include <log.h> +#include <upl.h> +#include <dm/ofnode.h> +#include "upl_common.h" + +/** + * write_addr() - Write an address + * + * Writes an address in the correct format, either 32- or 64-bit + * + * @upl: UPL state + * @node: Node to write to + * @prop: Property name to write + * @addr: Address to write + * Return: 0 if OK, -ve on error + */ +static int write_addr(const struct upl *upl, ofnode node, const char *prop, + ulong addr) +{ + int ret; + + if (upl->addr_cells == 1) + ret = ofnode_write_u32(node, prop, addr); + else + ret = ofnode_write_u64(node, prop, addr); + + return ret; +} + +/** + * write_size() - Write a size + * + * Writes a size in the correct format, either 32- or 64-bit + * + * @upl: UPL state + * @node: Node to write to + * @prop: Property name to write + * @size: Size to write + * Return: 0 if OK, -ve on error + */ +static int write_size(const struct upl *upl, ofnode node, const char *prop, + ulong size) +{ + int ret; + + if (upl->size_cells == 1) + ret = ofnode_write_u32(node, prop, size); + else + ret = ofnode_write_u64(node, prop, size); + + return ret; +} + +/** + * ofnode_write_bitmask() - Write a bit mask as a string list + * + * @node: Node to write to + * @prop: Property name to write + * @names: Array of names for each bit + * @count: Number of array entries + * @value: Bit-mask value to write + * Return: 0 if OK, -EINVAL if a bit number is not defined, -ENOSPC if the + * string is too long for the (internal) buffer + */ +static int ofnode_write_bitmask(ofnode node, const char *prop, + const char *const names[], uint count, + uint value) +{ + char buf[128]; + char *ptr, *end = buf + sizeof(buf); + uint bit; + int ret; + + ptr = buf; + for (bit = 0; bit < count; bit++) { + if (value & BIT(bit)) { + const char *str = names[bit]; + uint len; + + if (!str) { + log_debug("Unnamed bit number %d\n", bit); + return log_msg_ret("bit", -EINVAL); + } + len = strlen(str) + 1; + if (ptr + len > end) { + log_debug("String array too long\n"); + return log_msg_ret("bit", -ENOSPC); + } + + memcpy(ptr, str, len); + ptr += len; + } + } + + ret = ofnode_write_prop(node, prop, buf, ptr - buf, true); + if (ret) + return log_msg_ret("wri", ret); + + return 0; +} + +/** + * ofnode_write_value() - Write an int as a string value using a lookup + * + * @node: Node to write to + * @prop: Property name to write + * @names: Array of names for each int value + * @count: Number of array entries + * @value: Int value to write + * Return: 0 if OK, -EINVAL if a bit number is not defined, -ENOSPC if the + * string is too long for the (internal) buffer + */ +static int ofnode_write_value(ofnode node, const char *prop, + const char *const names[], uint count, + uint value) +{ + const char *str; + int ret; + + if (value >= count) { + log_debug("Value of range %d\n", value); + return log_msg_ret("val", -ERANGE); + } + str = names[value]; + if (!str) { + log_debug("Unnamed value %d\n", value); + return log_msg_ret("val", -EINVAL); + } + ret = ofnode_write_string(node, prop, str); + if (ret) + return log_msg_ret("wri", ret); + + return 0; +} + +/** + * add_root_props() - Add root properties to the tree + * + * @node: Node to add to + * Return 0 if OK, -ve on error + */ +static int add_root_props(const struct upl *upl, ofnode node) +{ + int ret; + + ret = ofnode_write_u32(node, UPLP_ADDRESS_CELLS, upl->addr_cells); + if (!ret) + ret = ofnode_write_u32(node, UPLP_SIZE_CELLS, upl->size_cells); + if (ret) + return log_msg_ret("cel", ret); + + return 0; +} + +/** + * add_upl_params() - Add UPL parameters node + * + * @upl: UPL state + * @options: /options node to add to + * Return 0 if OK, -ve on error + */ +static int add_upl_params(const struct upl *upl, ofnode options) +{ + ofnode node; + int ret; + + ret = ofnode_add_subnode(options, UPLN_UPL_PARAMS, &node); + if (ret) + return log_msg_ret("img", ret); + + ret = write_addr(upl, node, UPLP_SMBIOS, upl->smbios); + if (!ret) + ret = write_addr(upl, node, UPLP_ACPI, upl->acpi); + if (!ret && upl->bootmode) + ret = ofnode_write_bitmask(node, UPLP_BOOTMODE, bootmode_names, + UPLBM_COUNT, upl->bootmode); + if (!ret) + ret = ofnode_write_u32(node, UPLP_ADDR_WIDTH, upl->addr_width); + if (!ret) + ret = ofnode_write_u32(node, UPLP_ACPI_NVS_SIZE, + upl->acpi_nvs_size); + if (ret) + return log_msg_ret("cnf", ret); + + return 0; +} + +/** + * add_upl_image() - Add /options/upl-image nodes and properties to the tree + * + * @upl: UPL state + * @node: /options node to add to + * Return 0 if OK, -ve on error + */ +static int add_upl_image(const struct upl *upl, ofnode options) +{ + ofnode node; + int ret, i; + + ret = ofnode_add_subnode(options, UPLN_UPL_IMAGE, &node); + if (ret) + return log_msg_ret("img", ret); + + if (upl->fit) + ret = ofnode_write_u32(node, UPLP_FIT, upl->fit); + if (!ret && upl->conf_offset) + ret = ofnode_write_u32(node, UPLP_CONF_OFFSET, + upl->conf_offset); + if (ret) + return log_msg_ret("cnf", ret); + + for (i = 0; i < upl->image.count; i++) { + const struct upl_image *img = alist_get(&upl->image, i, + struct upl_image); + ofnode subnode; + char name[10]; + + snprintf(name, sizeof(name), UPLN_IMAGE "-%d", i + 1); + ret = ofnode_add_subnode(node, name, &subnode); + if (ret) + return log_msg_ret("sub", ret); + + ret = write_addr(upl, subnode, UPLP_LOAD, img->load); + if (!ret) + ret = write_size(upl, subnode, UPLP_SIZE, img->size); + if (!ret && img->offset) + ret = ofnode_write_u32(subnode, UPLP_OFFSET, + img->offset); + ret = ofnode_write_string(subnode, UPLP_DESCRIPTION, + img->description); + if (ret) + return log_msg_ret("sim", ret); + } + + return 0; +} + +/** + * buffer_addr_size() - Generate a set of addr/size pairs + * + * Each base/size value from each region is written to the buffer in a suitable + * format to be written to the devicetree + * + * @upl: UPL state + * @buf: Buffer to write to + * @size: Buffer size + * @num_regions: Number of regions to process + * @region: List of regions to process (struct memregion) + * Returns: Number of bytes written, or -ENOSPC if the buffer is too small + */ +static int buffer_addr_size(const struct upl *upl, char *buf, int size, + uint num_regions, const struct alist *region) +{ + char *ptr, *end = buf + size; + int i; + + ptr = buf; + for (i = 0; i < num_regions; i++) { + const struct memregion *reg = alist_get(region, i, + struct memregion); + + if (upl->addr_cells == 1) + *(u32 *)ptr = cpu_to_fdt32(reg->base); + else + *(u64 *)ptr = cpu_to_fdt64(reg->base); + ptr += upl->addr_cells * sizeof(u32); + + if (upl->size_cells == 1) + *(u32 *)ptr = cpu_to_fdt32(reg->size); + else + *(u64 *)ptr = cpu_to_fdt64(reg->size); + ptr += upl->size_cells * sizeof(u32); + if (ptr > end) + return -ENOSPC; + } + + return ptr - buf; +} + +/** + * add_upl_memory() - Add /memory nodes to the tree + * + * @upl: UPL state + * @root: Parent node to contain the new /memory nodes + * Return 0 if OK, -ve on error + */ +static int add_upl_memory(const struct upl *upl, ofnode root) +{ + int i; + + for (i = 0; i < upl->mem.count; i++) { + const struct upl_mem *mem = alist_get(&upl->mem, i, + struct upl_mem); + char buf[mem->region.count * sizeof(64) * 2]; + const struct memregion *first; + char name[26]; + int ret, len; + ofnode node; + + if (!mem->region.count) { + log_debug("Memory %d has no regions\n", i); + return log_msg_ret("reg", -EINVAL); + } + first = alist_get(&mem->region, 0, struct memregion); + sprintf(name, UPLN_MEMORY "@0x%lx", first->base); + ret = ofnode_add_subnode(root, name, &node); + if (ret) + return log_msg_ret("mem", ret); + + len = buffer_addr_size(upl, buf, sizeof(buf), mem->region.count, + &mem->region); + if (len < 0) + return log_msg_ret("buf", len); + + ret = ofnode_write_prop(node, UPLP_REG, buf, len, true); + if (!ret && mem->hotpluggable) + ret = ofnode_write_bool(node, UPLP_HOTPLUGGABLE, + mem->hotpluggable); + if (ret) + return log_msg_ret("lst", ret); + } + + return 0; +} + +/** + * add_upl_memmap() - Add memory-map nodes to the tree + * + * @upl: UPL state + * @root: Parent node to contain the new /memory-map node and its subnodes + * Return 0 if OK, -ve on error + */ +static int add_upl_memmap(const struct upl *upl, ofnode root) +{ + ofnode mem_node; + int i, ret; + + if (!upl->memmap.count) + return 0; + ret = ofnode_add_subnode(root, UPLN_MEMORY_MAP, &mem_node); + if (ret) + return log_msg_ret("img", ret); + + for (i = 0; i < upl->memmap.count; i++) { + const struct upl_memmap *memmap = alist_get(&upl->memmap, i, + struct upl_memmap); + char buf[memmap->region.count * sizeof(64) * 2]; + const struct memregion *first; + char name[26]; + int ret, len; + ofnode node; + + if (!memmap->region.count) { + log_debug("Memory %d has no regions\n", i); + return log_msg_ret("reg", -EINVAL); + } + first = alist_get(&memmap->region, 0, struct memregion); + sprintf(name, "%s@0x%lx", memmap->name, first->base); + ret = ofnode_add_subnode(mem_node, name, &node); + if (ret) + return log_msg_ret("memmap", ret); + + len = buffer_addr_size(upl, buf, sizeof(buf), + memmap->region.count, &memmap->region); + if (len < 0) + return log_msg_ret("buf", len); + ret = ofnode_write_prop(node, UPLP_REG, buf, len, true); + if (!ret && memmap->usage) + ret = ofnode_write_bitmask(node, UPLP_USAGE, + usage_names, + UPLUS_COUNT, memmap->usage); + if (ret) + return log_msg_ret("lst", ret); + } + + return 0; +} + +/** + * add_upl_memres() - Add /memory-reserved nodes to the tree + * + * @upl: UPL state + * @root: Parent node to contain the new node + * Return 0 if OK, -ve on error + */ +static int add_upl_memres(const struct upl *upl, ofnode root, + bool skip_existing) +{ + ofnode mem_node; + int i, ret; + + if (!upl->memmap.count) + return 0; + ret = ofnode_add_subnode(root, UPLN_MEMORY_RESERVED, &mem_node); + if (ret) { + if (skip_existing && ret == -EEXIST) + return 0; + return log_msg_ret("img", ret); + } + + for (i = 0; i < upl->memres.count; i++) { + const struct upl_memres *memres = alist_get(&upl->memres, i, + struct upl_memres); + char buf[memres->region.count * sizeof(64) * 2]; + const struct memregion *first; + char name[26]; + int ret, len; + ofnode node; + + if (!memres->region.count) { + log_debug("Memory %d has no regions\n", i); + return log_msg_ret("reg", -EINVAL); + } + first = alist_get(&memres->region, 0, struct memregion); + sprintf(name, "%s@0x%lx", memres->name, first->base); + ret = ofnode_add_subnode(mem_node, name, &node); + if (ret) + return log_msg_ret("memres", ret); + + len = buffer_addr_size(upl, buf, sizeof(buf), + memres->region.count, &memres->region); + ret = ofnode_write_prop(node, UPLP_REG, buf, len, true); + if (!ret && memres->no_map) + ret = ofnode_write_bool(node, UPLP_NO_MAP, + memres->no_map); + if (ret) + return log_msg_ret("lst", ret); + } + + return 0; +} + +/** + * add_upl_serial() - Add serial node + * + * @upl: UPL state + * @root: Parent node to contain the new node + * Return 0 if OK, -ve on error + */ +static int add_upl_serial(const struct upl *upl, ofnode root, + bool skip_existing) +{ + const struct upl_serial *ser = &upl->serial; + const struct memregion *first; + char name[26]; + ofnode node; + int ret; + + if (!ser->compatible || skip_existing) + return 0; + if (!ser->reg.count) + return log_msg_ret("ser", -EINVAL); + first = alist_get(&ser->reg, 0, struct memregion); + sprintf(name, UPLN_SERIAL "@0x%lx", first->base); + ret = ofnode_add_subnode(root, name, &node); + if (ret) + return log_msg_ret("img", ret); + ret = ofnode_write_string(node, UPLP_COMPATIBLE, ser->compatible); + if (!ret) + ret = ofnode_write_u32(node, UPLP_CLOCK_FREQUENCY, + ser->clock_frequency); + if (!ret) + ret = ofnode_write_u32(node, UPLP_CURRENT_SPEED, + ser->current_speed); + if (!ret) { + char buf[16]; + int len; + + len = buffer_addr_size(upl, buf, sizeof(buf), 1, &ser->reg); + if (len < 0) + return log_msg_ret("buf", len); + + ret = ofnode_write_prop(node, UPLP_REG, buf, len, true); + } + if (!ret && ser->reg_io_shift != UPLD_REG_IO_SHIFT) + ret = ofnode_write_u32(node, UPLP_REG_IO_SHIFT, + ser->reg_io_shift); + if (!ret && ser->reg_offset != UPLD_REG_OFFSET) + ret = ofnode_write_u32(node, UPLP_REG_OFFSET, ser->reg_offset); + if (!ret && ser->reg_io_width != UPLD_REG_IO_WIDTH) + ret = ofnode_write_u32(node, UPLP_REG_IO_WIDTH, + ser->reg_io_width); + if (!ret && ser->virtual_reg) + ret = write_addr(upl, node, UPLP_VIRTUAL_REG, ser->virtual_reg); + if (!ret) { + ret = ofnode_write_value(node, UPLP_ACCESS_TYPE, access_types, + ARRAY_SIZE(access_types), + ser->access_type); + } + if (ret) + return log_msg_ret("ser", ret); + + return 0; +} + +/** + * add_upl_graphics() - Add graphics node + * + * @upl: UPL state + * @root: Parent node to contain the new node + * Return 0 if OK, -ve on error + */ +static int add_upl_graphics(const struct upl *upl, ofnode root) +{ + const struct upl_graphics *gra = &upl->graphics; + const struct memregion *first; + char name[36]; + ofnode node; + int ret; + + if (!gra->reg.count) + return log_msg_ret("gra", -ENOENT); + first = alist_get(&gra->reg, 0, struct memregion); + sprintf(name, UPLN_GRAPHICS "@0x%lx", first->base); + ret = ofnode_add_subnode(root, name, &node); + if (ret) + return log_msg_ret("gra", ret); + + ret = ofnode_write_string(node, UPLP_COMPATIBLE, UPLC_GRAPHICS); + if (!ret) { + char buf[16]; + int len; + + len = buffer_addr_size(upl, buf, sizeof(buf), 1, &gra->reg); + if (len < 0) + return log_msg_ret("buf", len); + + ret = ofnode_write_prop(node, UPLP_REG, buf, len, true); + } + if (!ret) + ret = ofnode_write_u32(node, UPLP_WIDTH, gra->width); + if (!ret) + ret = ofnode_write_u32(node, UPLP_HEIGHT, gra->height); + if (!ret) + ret = ofnode_write_u32(node, UPLP_STRIDE, gra->stride); + if (!ret) { + ret = ofnode_write_value(node, UPLP_GRAPHICS_FORMAT, + graphics_formats, + ARRAY_SIZE(graphics_formats), + gra->format); + } + if (ret) + return log_msg_ret("pro", ret); + + return 0; +} + +int upl_write_handoff(const struct upl *upl, ofnode root, bool skip_existing) +{ + ofnode options; + int ret; + + ret = add_root_props(upl, root); + if (ret) + return log_msg_ret("ad1", ret); + ret = ofnode_add_subnode(root, UPLN_OPTIONS, &options); + if (ret && ret != -EEXIST) + return log_msg_ret("opt", -EINVAL); + + ret = add_upl_params(upl, options); + if (ret) + return log_msg_ret("ad1", ret); + + ret = add_upl_image(upl, options); + if (ret) + return log_msg_ret("ad2", ret); + + ret = add_upl_memory(upl, root); + if (ret) + return log_msg_ret("ad3", ret); + + ret = add_upl_memmap(upl, root); + if (ret) + return log_msg_ret("ad4", ret); + + ret = add_upl_memres(upl, root, skip_existing); + if (ret) + return log_msg_ret("ad5", ret); + + ret = add_upl_serial(upl, root, skip_existing); + if (ret) + return log_msg_ret("ad6", ret); + + ret = add_upl_graphics(upl, root); + if (ret && ret != -ENOENT) + return log_msg_ret("ad6", ret); + + return 0; +} + +int upl_create_handoff_tree(const struct upl *upl, oftree *treep) +{ + ofnode root; + oftree tree; + int ret; + + ret = oftree_new(&tree); + if (ret) + return log_msg_ret("new", ret); + + root = oftree_root(tree); + if (!ofnode_valid(root)) + return log_msg_ret("roo", -EINVAL); + + ret = upl_write_handoff(upl, root, false); + if (ret) + return log_msg_ret("wr", ret); + + *treep = tree; + + return 0; +} diff --git a/cmd/Kconfig b/cmd/Kconfig index 978f44eda42..43f78a5aeb1 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -388,6 +388,13 @@ config CMD_SEAMA help Support reading NAND Seattle Image (SEAMA) images. +config CMD_UPL + bool "upl - Universal Payload Specification" + help + Provides commands to deal with UPL payloads and handoff information. + U-Boot supports generating and accepting handoff information. The + mkimage tool will eventually support creating payloads. + config CMD_VBE bool "vbe - Verified Boot for Embedded" depends on BOOTMETH_VBE @@ -2003,6 +2010,7 @@ config SYS_DISABLE_AUTOLOAD config CMD_WGET bool "wget" select PROT_TCP + default y if SANDBOX help wget is a simple command to download kernel, or other files, from a http server over TCP. diff --git a/cmd/Makefile b/cmd/Makefile index 87133cc27a8..91227f1249c 100644 --- a/cmd/Makefile +++ b/cmd/Makefile @@ -189,6 +189,7 @@ obj-$(CONFIG_CMD_UBIFS) += ubifs.o obj-$(CONFIG_CMD_UNIVERSE) += universe.o obj-$(CONFIG_CMD_UNLZ4) += unlz4.o obj-$(CONFIG_CMD_UNZIP) += unzip.o +obj-$(CONFIG_CMD_UPL) += upl.o obj-$(CONFIG_CMD_VIRTIO) += virtio.o obj-$(CONFIG_CMD_WDT) += wdt.o obj-$(CONFIG_CMD_LZMADEC) += lzmadec.o diff --git a/cmd/date.c b/cmd/date.c index 755adec1e71..8614f022761 100644 --- a/cmd/date.c +++ b/cmd/date.c @@ -31,7 +31,6 @@ static int do_date(struct cmd_tbl *cmdtp, int flag, int argc, int old_bus __maybe_unused; /* switch to correct I2C bus */ -#ifdef CONFIG_DM_RTC struct udevice *dev; rcode = uclass_get_device_by_seq(UCLASS_RTC, 0, &dev); @@ -42,35 +41,19 @@ static int do_date(struct cmd_tbl *cmdtp, int flag, int argc, return CMD_RET_FAILURE; } } -#elif CONFIG_IS_ENABLED(SYS_I2C_LEGACY) - old_bus = i2c_get_bus_num(); - i2c_set_bus_num(CFG_SYS_RTC_BUS_NUM); -#else - old_bus = I2C_GET_BUS(); - I2C_SET_BUS(CFG_SYS_RTC_BUS_NUM); -#endif switch (argc) { case 2: /* set date & time */ if (strcmp(argv[1],"reset") == 0) { puts ("Reset RTC...\n"); -#ifdef CONFIG_DM_RTC rcode = dm_rtc_reset(dev); if (!rcode) rcode = dm_rtc_set(dev, &default_tm); -#else - rtc_reset(); - rcode = rtc_set(&default_tm); -#endif if (rcode) puts("## Failed to set date after RTC reset\n"); } else { /* initialize tm with current time */ -#ifdef CONFIG_DM_RTC rcode = dm_rtc_get(dev, &tm); -#else - rcode = rtc_get(&tm); -#endif if (!rcode) { /* insert new date & time */ if (mk_date(argv[1], &tm) != 0) { @@ -78,11 +61,7 @@ static int do_date(struct cmd_tbl *cmdtp, int flag, int argc, break; } /* and write to RTC */ -#ifdef CONFIG_DM_RTC rcode = dm_rtc_set(dev, &tm); -#else - rcode = rtc_set(&tm); -#endif if (rcode) { printf("## Set date failed: err=%d\n", rcode); @@ -93,11 +72,7 @@ static int do_date(struct cmd_tbl *cmdtp, int flag, int argc, } fallthrough; case 1: /* get date & time */ -#ifdef CONFIG_DM_RTC rcode = dm_rtc_get(dev, &tm); -#else - rcode = rtc_get(&tm); -#endif if (rcode) { puts("## Get date failed\n"); break; @@ -114,13 +89,6 @@ static int do_date(struct cmd_tbl *cmdtp, int flag, int argc, rcode = CMD_RET_USAGE; } - /* switch back to original I2C bus */ -#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) - i2c_set_bus_num(old_bus); -#elif !defined(CONFIG_DM_RTC) - I2C_SET_BUS(old_bus); -#endif - return rcode ? CMD_RET_FAILURE : 0; } diff --git a/cmd/i2c.c b/cmd/i2c.c index 7dac0a9fb6c..7246c4fa3e7 100644 --- a/cmd/i2c.c +++ b/cmd/i2c.c @@ -1698,18 +1698,6 @@ static int do_i2c_show_bus(struct cmd_tbl *cmdtp, int flag, int argc, for (i = 0; i < CFG_SYS_NUM_I2C_BUSES; i++) { printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name); -#ifndef CFG_SYS_I2C_DIRECT_BUS - int j; - - for (j = 0; j < CFG_SYS_I2C_MAX_HOPS; j++) { - if (i2c_bus[i].next_hop[j].chip == 0) - break; - printf("->%s@0x%2x:%d", - i2c_bus[i].next_hop[j].mux.name, - i2c_bus[i].next_hop[j].chip, - i2c_bus[i].next_hop[j].channel); - } -#endif printf("\n"); } #endif @@ -1734,17 +1722,6 @@ static int do_i2c_show_bus(struct cmd_tbl *cmdtp, int flag, int argc, return -1; } printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name); -#ifndef CFG_SYS_I2C_DIRECT_BUS - int j; - for (j = 0; j < CFG_SYS_I2C_MAX_HOPS; j++) { - if (i2c_bus[i].next_hop[j].chip == 0) - break; - printf("->%s@0x%2x:%d", - i2c_bus[i].next_hop[j].mux.name, - i2c_bus[i].next_hop[j].chip, - i2c_bus[i].next_hop[j].channel); - } -#endif printf("\n"); #endif } diff --git a/cmd/led.c b/cmd/led.c index 2f786f34c67..91fb856ee59 100644 --- a/cmd/led.c +++ b/cmd/led.c @@ -118,7 +118,7 @@ int do_led(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) return 0; } -#ifdef CONFIG_LED_BLINK +#if defined(CONFIG_LED_BLINK) || defined(CONFIG_LED_SW_BLINK) #define BLINK "|blink [blink-freq in ms]" #else #define BLINK "" diff --git a/cmd/upl.c b/cmd/upl.c new file mode 100644 index 00000000000..c9745886507 --- /dev/null +++ b/cmd/upl.c @@ -0,0 +1,118 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Commands for UPL handoff generation + * + * Copyright 2024 Google LLC + * Written by Simon Glass <sjg@chromium.org> + */ + +#define LOG_CATEGORY UCLASS_BOOTSTD + +#include <abuf.h> +#include <alist.h> +#include <command.h> +#include <display_options.h> +#include <mapmem.h> +#include <string.h> +#include <upl.h> +#include <dm/ofnode.h> +#include <test/ut.h> + +DECLARE_GLOBAL_DATA_PTR; + +static int do_upl_info(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + const struct upl *upl = gd_upl(); + + printf("UPL state: %sactive\n", upl ? "" : "in"); + if (!upl) + return 0; + if (argc > 1 && !strcmp("-v", argv[1])) { + int i; + + printf("fit %lx\n", upl->fit); + printf("conf_offset %x\n", upl->conf_offset); + for (i = 0; i < upl->image.count; i++) { + const struct upl_image *img = + alist_get(&upl->image, i, struct upl_image); + + printf("image %d: load %lx size %lx offset %x: %s\n", i, + img->load, img->size, img->offset, + img->description); + } + } + + return 0; +} + +static int do_upl_write(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + struct upl s_upl, *upl = &s_upl; + struct unit_test_state uts; + struct abuf buf; + oftree tree; + ulong addr; + int ret; + + upl_get_test_data(&uts, upl); + + log_debug("Writing UPL\n"); + ret = upl_create_handoff_tree(upl, &tree); + if (ret) { + log_err("Failed to write (err=%dE)\n", ret); + return CMD_RET_FAILURE; + } + + log_debug("Flattening\n"); + ret = oftree_to_fdt(tree, &buf); + if (ret) { + log_err("Failed to write (err=%dE)\n", ret); + return CMD_RET_FAILURE; + } + addr = map_to_sysmem(abuf_data(&buf)); + printf("UPL handoff written to %lx size %lx\n", addr, abuf_size(&buf)); + if (env_set_hex("upladdr", addr) || + env_set_hex("uplsize", abuf_size(&buf))) { + printf("Cannot set env var\n"); + return CMD_RET_FAILURE; + } + + log_debug("done\n"); + + return 0; +} + +static int do_upl_read(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + struct upl s_upl, *upl = &s_upl; + oftree tree; + ulong addr; + int ret; + + if (argc < 1) + return CMD_RET_USAGE; + addr = hextoul(argv[1], NULL); + + printf("Reading UPL at %lx\n", addr); + tree = oftree_from_fdt(map_sysmem(addr, 0)); + ret = upl_read_handoff(upl, tree); + if (ret) { + log_err("Failed to read (err=%dE)\n", ret); + return CMD_RET_FAILURE; + } + + return 0; +} + +U_BOOT_LONGHELP(upl, + "info [-v] - Check UPL status\n" + "upl read <addr> - Read handoff information\n" + "upl write - Write handoff information"); + +U_BOOT_CMD_WITH_SUBCMDS(upl, "Universal Payload support", upl_help_text, + U_BOOT_SUBCMD_MKENT(info, 2, 1, do_upl_info), + U_BOOT_SUBCMD_MKENT(read, 2, 1, do_upl_read), + U_BOOT_SUBCMD_MKENT(write, 1, 1, do_upl_write)); diff --git a/common/board_f.c b/common/board_f.c index 29e185137ad..454426d921c 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -40,6 +40,7 @@ #include <sysreset.h> #include <timer.h> #include <trace.h> +#include <upl.h> #include <video.h> #include <watchdog.h> #include <asm/cache.h> @@ -683,13 +684,7 @@ static int reloc_bootstage(void) if (gd->flags & GD_FLG_SKIP_RELOC) return 0; if (gd->new_bootstage) { - int size = bootstage_get_size(); - - debug("Copying bootstage from %p to %p, size %x\n", - gd->bootstage, gd->new_bootstage, size); - memcpy(gd->new_bootstage, gd->bootstage, size); - gd->bootstage = gd->new_bootstage; - bootstage_relocate(); + bootstage_relocate(gd->new_bootstage); } #endif @@ -859,6 +854,26 @@ __weak int clear_bss(void) return 0; } +static int initf_upl(void) +{ + struct upl *upl; + int ret; + + if (!IS_ENABLED(CONFIG_UPL_IN) || !(gd->flags & GD_FLG_UPL)) + return 0; + + upl = malloc(sizeof(struct upl)); + if (upl) + ret = upl_read_handoff(upl, oftree_default()); + if (ret) { + printf("UPL handoff: read failure (err=%dE)\n", ret); + return ret; + } + gd_set_upl(upl); + + return 0; +} + static const init_fnc_t init_sequence_f[] = { setup_mon_len, #ifdef CONFIG_OF_CONTROL @@ -868,6 +883,7 @@ static const init_fnc_t init_sequence_f[] = { trace_early_init, #endif initf_malloc, + initf_upl, log_init, initf_bootstage, /* uses its own timer, so does not need DM */ event_init, diff --git a/common/board_r.c b/common/board_r.c index d4ba245ac69..f445803d7a4 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -521,6 +521,8 @@ static int dm_announce(void) uclass_count); if (CONFIG_IS_ENABLED(OF_REAL)) printf(", devicetree: %s", fdtdec_get_srcname()); + if (CONFIG_IS_ENABLED(UPL)) + printf(", universal payload active"); printf("\n"); if (IS_ENABLED(CONFIG_OF_HAS_PRIOR_STAGE) && (gd->fdt_src == FDTSRC_SEPARATE || diff --git a/common/bootstage.c b/common/bootstage.c index b6c268d9f47..49acc9078a6 100644 --- a/common/bootstage.c +++ b/common/bootstage.c @@ -54,12 +54,16 @@ struct bootstage_hdr { u32 next_id; /* Next ID to use for bootstage */ }; -int bootstage_relocate(void) +int bootstage_relocate(void *to) { - struct bootstage_data *data = gd->bootstage; + struct bootstage_data *data; int i; char *ptr; + debug("Copying bootstage from %p to %p\n", gd->bootstage, to); + memcpy(to, gd->bootstage, sizeof(struct bootstage_data)); + data = gd->bootstage = to; + /* Figure out where to relocate the strings to */ ptr = (char *)(data + 1); diff --git a/common/dlmalloc.c b/common/dlmalloc.c index 62e8557daa7..1ac7ce3f43c 100644 --- a/common/dlmalloc.c +++ b/common/dlmalloc.c @@ -386,8 +386,8 @@ nextchunk-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ /* pad request bytes into a usable size */ #define request2size(req) \ - (((long)((req) + (SIZE_SZ + MALLOC_ALIGN_MASK)) < \ - (long)(MINSIZE + MALLOC_ALIGN_MASK)) ? MINSIZE : \ + ((((req) + (SIZE_SZ + MALLOC_ALIGN_MASK)) < \ + (MINSIZE + MALLOC_ALIGN_MASK)) ? MINSIZE : \ (((req) + (SIZE_SZ + MALLOC_ALIGN_MASK)) & ~(MALLOC_ALIGN_MASK))) /* Check if m has acceptable alignment */ @@ -581,6 +581,9 @@ void *sbrk(ptrdiff_t increment) ulong old = mem_malloc_brk; ulong new = old + increment; + if ((new < mem_malloc_start) || (new > mem_malloc_end)) + return (void *)MORECORE_FAILURE; + /* * if we are giving memory back make sure we clear it out since * we set MORECORE_CLEARS to 1 @@ -588,9 +591,6 @@ void *sbrk(ptrdiff_t increment) if (increment < 0) memset((void *)new, 0, -increment); - if ((new < mem_malloc_start) || (new > mem_malloc_end)) - return (void *)MORECORE_FAILURE; - mem_malloc_brk = new; return (void *)old; @@ -1274,7 +1274,8 @@ Void_t* mALLOc_impl(bytes) size_t bytes; return NULL; } - if ((long)bytes < 0) return NULL; + if (bytes > CONFIG_SYS_MALLOC_LEN || (long)bytes < 0) + return NULL; nb = request2size(bytes); /* padded request size; */ @@ -1687,7 +1688,8 @@ Void_t* rEALLOc_impl(oldmem, bytes) Void_t* oldmem; size_t bytes; } #endif - if ((long)bytes < 0) return NULL; + if (bytes > CONFIG_SYS_MALLOC_LEN || (long)bytes < 0) + return NULL; /* realloc of null is supposed to be same as malloc */ if (oldmem == NULL) return mALLOc_impl(bytes); @@ -1698,6 +1700,10 @@ Void_t* rEALLOc_impl(oldmem, bytes) Void_t* oldmem; size_t bytes; panic("pre-reloc realloc() is not supported"); } #endif + if (CONFIG_IS_ENABLED(UNIT_TEST) && malloc_testing) { + if (--malloc_max_allocs < 0) + return NULL; + } newp = oldp = mem2chunk(oldmem); newsize = oldsize = chunksize(oldp); @@ -1907,7 +1913,8 @@ Void_t* mEMALIGn_impl(alignment, bytes) size_t alignment; size_t bytes; mchunkptr remainder; /* spare room at end to split off */ long remainder_size; /* its size */ - if ((long)bytes < 0) return NULL; + if (bytes > CONFIG_SYS_MALLOC_LEN || (long)bytes < 0) + return NULL; #if CONFIG_IS_ENABLED(SYS_MALLOC_F) if (!(gd->flags & GD_FLG_FULL_MALLOC_INIT)) { diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 6f56ca911c1..3fd113d776b 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -78,6 +78,7 @@ config SPL_MAX_SIZE hex "Maximum size of the SPL image, excluding BSS" default 0x30000 if ARCH_MX6 && MX6_OCRAM_256KB default 0x1b000 if AM33XX && !TI_SECURE_DEVICE + default 0xec00 if OMAP34XX default 0x10000 if ARCH_MX6 && !MX6_OCRAM_256KB default 0x7fa0 if SUNXI_SRAM_ADDRESS = 0x10000 default 0x7fa0 if SUNXI_SRAM_ADDRESS = 0x20000 && !MACH_SUN50I_H616 @@ -261,6 +262,7 @@ config SPL_LDSCRIPT config SPL_TEXT_BASE hex "SPL Text Base" + default 0x40200000 if OMAP34XX default 0x402F4000 if AM43XX default 0x402F0400 if AM33XX default 0x40301350 if OMAP54XX diff --git a/common/spl/Makefile b/common/spl/Makefile index 4809f9c3ec1..137b18428bd 100644 --- a/common/spl/Makefile +++ b/common/spl/Makefile @@ -37,3 +37,5 @@ obj-$(CONFIG_$(SPL_TPL_)SPI_LOAD) += spl_spi.o obj-$(CONFIG_$(SPL_TPL_)RAM_SUPPORT) += spl_ram.o obj-$(CONFIG_$(SPL_TPL_)USB_SDP_SUPPORT) += spl_sdp.o endif + +obj-$(CONFIG_$(SPL_TPL_)UPL) += spl_upl.o diff --git a/common/spl/spl.c b/common/spl/spl.c index 7794ddccade..d6a364de6ee 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -810,6 +810,14 @@ void board_init_r(gd_t *dummy1, ulong dummy2) printf(SPL_TPL_PROMPT "SPL hand-off write failed (err=%d)\n", ret); } + if (CONFIG_IS_ENABLED(UPL_OUT) && (gd->flags & GD_FLG_UPL)) { + ret = spl_write_upl_handoff(&spl_image); + if (ret) { + printf(SPL_TPL_PROMPT + "UPL hand-off write failed (err=%d)\n", ret); + hang(); + } + } if (CONFIG_IS_ENABLED(BLOBLIST)) { ret = bloblist_finish(); if (ret) diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c index 2a097f4464c..1ad5a69d807 100644 --- a/common/spl/spl_fit.c +++ b/common/spl/spl_fit.c @@ -12,6 +12,7 @@ #include <memalign.h> #include <mapmem.h> #include <spl.h> +#include <upl.h> #include <sysinfo.h> #include <asm/global_data.h> #include <asm/io.h> @@ -336,6 +337,8 @@ static int load_simple_fit(struct spl_load_info *info, ulong fit_offset, image_info->entry_point = FDT_ERROR; } + upl_add_image(fit, node, load_addr, length); + return 0; } @@ -847,6 +850,8 @@ int spl_load_simple_fit(struct spl_image_info *spl_image, spl_image->entry_point = spl_image->load_addr; spl_image->flags |= SPL_FIT_FOUND; + upl_set_fit_info(map_to_sysmem(ctx.fit), ctx.conf_node, + spl_image->entry_point); return 0; } @@ -941,6 +946,10 @@ int spl_load_fit_image(struct spl_image_info *spl_image, if (ret < 0) return ret; } + spl_image->flags |= SPL_FIT_FOUND; + + upl_set_fit_info(map_to_sysmem(header), conf_noffset, + spl_image->entry_point); return 0; } diff --git a/common/spl/spl_upl.c b/common/spl/spl_upl.c new file mode 100644 index 00000000000..067d437150f --- /dev/null +++ b/common/spl/spl_upl.c @@ -0,0 +1,172 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * UPL handoff parsing + * + * Copyright 2024 Google LLC + * Written by Simon Glass <sjg@chromium.org> + */ + +#define LOG_CATEGORY UCLASS_BOOTSTD + +#include <alist.h> +#include <bloblist.h> +#include <dm.h> +#include <image.h> +#include <mapmem.h> +#include <serial.h> +#include <spl.h> +#include <upl.h> +#include <video.h> +#include <asm/global_data.h> +#include <dm/read.h> +#include <dm/uclass-internal.h> + +DECLARE_GLOBAL_DATA_PTR; + +struct upl s_upl; + +void upl_set_fit_addr(ulong fit) +{ + struct upl *upl = &s_upl; + + upl->fit = fit; +} + +void upl_set_fit_info(ulong fit, int conf_offset, ulong entry_addr) +{ + struct upl *upl = &s_upl; + + upl->fit = fit; + upl->conf_offset = conf_offset; + log_debug("upl: add fit %lx conf %x\n", fit, conf_offset); +} + +int _upl_add_image(int node, ulong load_addr, ulong size, const char *desc) +{ + struct upl *upl = &s_upl; + struct upl_image img; + + img.load = load_addr; + img.size = size; + img.offset = node; + img.description = desc; + if (!alist_add(&upl->image, img)) + return -ENOMEM; + log_debug("upl: add image %s at %lx size %lx\n", desc, load_addr, size); + + return 0; +} + +static int write_serial(struct upl_serial *ser) +{ + struct udevice *dev = gd->cur_serial_dev; + struct serial_device_info info; + struct memregion region; + int ret; + + if (!dev) + return log_msg_ret("ser", -ENOENT); + ret = serial_getinfo(dev, &info); + if (ret) + return log_msg_ret("inf", ret); + + ser->compatible = ofnode_read_string(dev_ofnode(dev), "compatible"); + ser->clock_frequency = info.clock; + ser->current_speed = gd->baudrate; + region.base = info.addr; + region.size = info.size; + alist_init_struct(&ser->reg, struct memregion); + if (!alist_add(&ser->reg, region)) + return -ENOMEM; + ser->reg_io_shift = info.reg_shift; + ser->reg_offset = info.reg_offset; + ser->reg_io_width = info.reg_width; + ser->virtual_reg = 0; + ser->access_type = info.addr_space; + + return 0; +} + +static int write_graphics(struct upl_graphics *gra) +{ + struct video_uc_plat *plat; + struct video_priv *priv; + struct memregion region; + struct udevice *dev; + + alist_init_struct(&gra->reg, struct memregion); + uclass_find_first_device(UCLASS_VIDEO, &dev); + if (!dev || !device_active(dev)) + return log_msg_ret("vid", -ENOENT); + + plat = dev_get_uclass_plat(dev); + region.base = plat->base; + region.size = plat->size; + if (!alist_add(&gra->reg, region)) + return log_msg_ret("reg", -ENOMEM); + + priv = dev_get_uclass_priv(dev); + gra->width = priv->xsize; + gra->height = priv->ysize; + gra->stride = priv->line_length; /* private field */ + switch (priv->format) { + case VIDEO_RGBA8888: + case VIDEO_X8R8G8B8: + gra->format = UPLGF_ARGB32; + break; + case VIDEO_X8B8G8R8: + gra->format = UPLGF_ABGR32; + break; + case VIDEO_X2R10G10B10: + log_debug("device '%s': VIDEO_X2R10G10B10 not supported\n", + dev->name); + return log_msg_ret("for", -EPROTO); + case VIDEO_UNKNOWN: + log_debug("device '%s': Unknown video format\n", dev->name); + return log_msg_ret("for", -EPROTO); + } + + return 0; +} + +int spl_write_upl_handoff(struct spl_image_info *spl_image) +{ + struct upl *upl = &s_upl; + struct abuf buf; + ofnode root; + void *ptr; + int ret; + + log_debug("UPL: Writing handoff - image_count=%d\n", upl->image.count); + upl->addr_cells = IS_ENABLED(CONFIG_PHYS_64BIT) ? 2 : 1; + upl->size_cells = IS_ENABLED(CONFIG_PHYS_64BIT) ? 2 : 1; + upl->bootmode = UPLBM_DEFAULT; + ret = write_serial(&upl->serial); + if (ret) + return log_msg_ret("ser", ret); + ret = write_graphics(&upl->graphics); + if (ret && ret != -ENOENT) + return log_msg_ret("gra", ret); + + root = ofnode_root(); + ret = upl_write_handoff(upl, root, true); + if (ret) + return log_msg_ret("wr", ret); + + ret = oftree_to_fdt(oftree_default(), &buf); + if (ret) + return log_msg_ret("fdt", ret); + log_debug("FDT size %zx\n", abuf_size(&buf)); + + ptr = bloblist_add(BLOBLISTT_CONTROL_FDT, abuf_size(&buf), 0); + if (!ptr) + return log_msg_ret("blo", -ENOENT); + memcpy(ptr, abuf_data(&buf), abuf_size(&buf)); + + return 0; +} + +void spl_upl_init(void) +{ + upl_init(&s_upl); +} diff --git a/configs/M5208EVBE_defconfig b/configs/M5208EVBE_defconfig index ed146628918..c6c2ad71e40 100644 --- a/configs/M5208EVBE_defconfig +++ b/configs/M5208EVBE_defconfig @@ -5,6 +5,7 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="M5208EVBE" CONFIG_SYS_MONITOR_LEN=262144 +CONFIG_WATCHDOG_TIMEOUT_MSECS=5000 CONFIG_SYS_LOAD_ADDR=0x40010000 CONFIG_ENV_ADDR=0x2000 CONFIG_TARGET_M5208EVBE=y @@ -50,6 +51,5 @@ CONFIG_SYS_MAX_FLASH_SECT=254 CONFIG_MCFFEC=y CONFIG_MII=y CONFIG_MCFUART=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=5000 CONFIG_WDT=y CONFIG_WDT_MCF=y diff --git a/configs/M5235EVB_Flash32_defconfig b/configs/M5235EVB_Flash32_defconfig index 45e046017e2..9b191858738 100644 --- a/configs/M5235EVB_Flash32_defconfig +++ b/configs/M5235EVB_Flash32_defconfig @@ -5,6 +5,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="M5235EVB_Flash32" CONFIG_SYS_MONITOR_LEN=262144 +CONFIG_WATCHDOG_TIMEOUT_MSECS=5000 CONFIG_SYS_LOAD_ADDR=0x20000 CONFIG_ENV_ADDR=0xFFE04000 CONFIG_TARGET_M5235EVB=y @@ -58,4 +59,3 @@ CONFIG_SYS_MAX_FLASH_SECT=137 CONFIG_MCFFEC=y CONFIG_MII=y CONFIG_MCFUART=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=5000 diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig index 719a4354053..fac30716dac 100644 --- a/configs/M5235EVB_defconfig +++ b/configs/M5235EVB_defconfig @@ -5,6 +5,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="M5235EVB" CONFIG_SYS_MONITOR_LEN=262144 +CONFIG_WATCHDOG_TIMEOUT_MSECS=5000 CONFIG_SYS_LOAD_ADDR=0x20000 CONFIG_ENV_ADDR=0xFFE04000 CONFIG_TARGET_M5235EVB=y @@ -57,4 +58,3 @@ CONFIG_SYS_MAX_FLASH_SECT=137 CONFIG_MCFFEC=y CONFIG_MII=y CONFIG_MCFUART=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=5000 diff --git a/configs/M5272C3_defconfig b/configs/M5272C3_defconfig index ccb756ede7c..b6f8d183b3b 100644 --- a/configs/M5272C3_defconfig +++ b/configs/M5272C3_defconfig @@ -5,6 +5,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="M5272C3" CONFIG_SYS_MONITOR_LEN=131072 +CONFIG_WATCHDOG_TIMEOUT_MSECS=10000 CONFIG_SYS_LOAD_ADDR=0x20000 CONFIG_ENV_ADDR=0xFFE04000 CONFIG_TARGET_M5272C3=y @@ -72,4 +73,3 @@ CONFIG_SYS_MAX_FLASH_SECT=137 CONFIG_MCFFEC=y CONFIG_MII=y CONFIG_MCFUART=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=10000 diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig index f0a7b1c2b6c..46df7c2a70c 100644 --- a/configs/M53017EVB_defconfig +++ b/configs/M53017EVB_defconfig @@ -5,6 +5,7 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_SECT_SIZE=0x8000 CONFIG_DEFAULT_DEVICE_TREE="M53017EVB" CONFIG_SYS_MONITOR_LEN=262144 +CONFIG_WATCHDOG_TIMEOUT_MSECS=5000 CONFIG_SYS_LOAD_ADDR=0x40010000 CONFIG_ENV_ADDR=0x40000 CONFIG_TARGET_M53017EVB=y @@ -57,4 +58,3 @@ CONFIG_DM_RTC=y CONFIG_MCFRTC=y CONFIG_SYS_MCFRTC_BASE=0xFC0A8000 CONFIG_MCFUART=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=5000 diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig index bbb5a23c8e0..3e5da1f5bc6 100644 --- a/configs/M5329AFEE_defconfig +++ b/configs/M5329AFEE_defconfig @@ -5,6 +5,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="M5329AFEE" CONFIG_SYS_MONITOR_LEN=262144 +CONFIG_WATCHDOG_TIMEOUT_MSECS=5000 CONFIG_SYS_LOAD_ADDR=0x40010000 CONFIG_ENV_ADDR=0x4000 CONFIG_TARGET_M5329EVB=y @@ -54,4 +55,3 @@ CONFIG_DM_RTC=y CONFIG_MCFRTC=y CONFIG_SYS_MCFRTC_BASE=0xFC0A8000 CONFIG_MCFUART=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=5000 diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig index ff8522baff5..ab7b8e6883c 100644 --- a/configs/M5329BFEE_defconfig +++ b/configs/M5329BFEE_defconfig @@ -5,6 +5,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="M5329BFEE" CONFIG_SYS_MONITOR_LEN=262144 +CONFIG_WATCHDOG_TIMEOUT_MSECS=5000 CONFIG_SYS_LOAD_ADDR=0x40010000 CONFIG_ENV_ADDR=0x4000 CONFIG_TARGET_M5329EVB=y @@ -56,4 +57,3 @@ CONFIG_DM_RTC=y CONFIG_MCFRTC=y CONFIG_SYS_MCFRTC_BASE=0xFC0A8000 CONFIG_MCFUART=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=5000 diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig index 981542fd369..1df1682b73a 100644 --- a/configs/M5373EVB_defconfig +++ b/configs/M5373EVB_defconfig @@ -5,6 +5,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="M5373EVB" CONFIG_SYS_MONITOR_LEN=262144 +CONFIG_WATCHDOG_TIMEOUT_MSECS=3360 CONFIG_SYS_LOAD_ADDR=0x40010000 CONFIG_ENV_ADDR=0x4000 CONFIG_TARGET_M5373EVB=y @@ -56,4 +57,3 @@ CONFIG_DM_RTC=y CONFIG_MCFRTC=y CONFIG_SYS_MCFRTC_BASE=0xFC0A8000 CONFIG_MCFUART=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=3360 diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig index 9eac43a0fcb..dd30e8d30da 100644 --- a/configs/MPC837XERDB_defconfig +++ b/configs/MPC837XERDB_defconfig @@ -139,7 +139,6 @@ CONFIG_CMD_USB=y CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y -CONFIG_CMD_DATE=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig index f8dfd1d2060..3fcebc6aa7d 100644 --- a/configs/am335x_baltos_defconfig +++ b/configs/am335x_baltos_defconfig @@ -3,8 +3,6 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_DEFAULT_DEVICE_TREE="am335x-baltos" CONFIG_AM33XX=y CONFIG_TARGET_AM335X_BALTOS=y @@ -19,6 +17,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run usbboot;run mmcboot;setenv mmcdev 1; setenv bootpart 1:2; run mmcboot;run nandboot;" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 CONFIG_SPL_FS_EXT4=y diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig index cabc181460a..5dd0b328835 100644 --- a/configs/am335x_evm_defconfig +++ b/configs/am335x_evm_defconfig @@ -2,8 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_AM33XX=y diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig index 8239f5f84da..a55aace0246 100644 --- a/configs/am335x_evm_spiboot_defconfig +++ b/configs/am335x_evm_spiboot_defconfig @@ -2,8 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_ENV_OFFSET=0x100000 CONFIG_SPL_DM_SPI=y diff --git a/configs/am335x_guardian_defconfig b/configs/am335x_guardian_defconfig index 75138542431..7c7041c23b0 100644 --- a/configs/am335x_guardian_defconfig +++ b/configs/am335x_guardian_defconfig @@ -3,8 +3,6 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030fef0 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x500000 CONFIG_DEFAULT_DEVICE_TREE="am335x-guardian" @@ -31,6 +29,7 @@ CONFIG_AUTOBOOT_DELAY_STR="d" CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig index 3694cc32db9..d780239715f 100644 --- a/configs/am335x_hs_evm_defconfig +++ b/configs/am335x_hs_evm_defconfig @@ -3,8 +3,6 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_SPL_TEXT_BASE=0x40300350 diff --git a/configs/am335x_hs_evm_uart_defconfig b/configs/am335x_hs_evm_uart_defconfig index a99b7b46cfb..bd979941b7a 100644 --- a/configs/am335x_hs_evm_uart_defconfig +++ b/configs/am335x_hs_evm_uart_defconfig @@ -3,8 +3,6 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_SPL_TEXT_BASE=0x40301950 diff --git a/configs/am335x_igep003x_defconfig b/configs/am335x_igep003x_defconfig index ddffd4f46f0..19943881973 100644 --- a/configs/am335x_igep003x_defconfig +++ b/configs/am335x_igep003x_defconfig @@ -4,8 +4,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x18000 CONFIG_DEFAULT_DEVICE_TREE="am335x-base0033" CONFIG_AM33XX=y @@ -76,7 +74,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y -CONFIG_SYS_I2C_LEGACY=y +CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_MMC_OMAP_HS=y CONFIG_MTD=y diff --git a/configs/am335x_pdu001_defconfig b/configs/am335x_pdu001_defconfig index febe5ebaabb..a0163f16f36 100644 --- a/configs/am335x_pdu001_defconfig +++ b/configs/am335x_pdu001_defconfig @@ -4,8 +4,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x1200 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="am335x-pdu001" @@ -24,6 +22,7 @@ CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_BOOTCOMMAND="run eval_boot_device;part uuid mmc ${mmc_boot}:${root_fs_partition} root_fs_partuuid;setenv bootargs console=${console} vt.global_cursor_default=0 root=PARTUUID=${root_fs_partuuid} rootfstype=ext4 rootwait rootdelay=1;fatload mmc ${mmc_boot} ${fdtaddr} ${fdtfile};fatload mmc ${mmc_boot} ${loadaddr} ${bootfile};bootz ${loadaddr} - ${fdtaddr}" CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig index 47c08e5054b..72933ba1a64 100644 --- a/configs/am335x_shc_defconfig +++ b/configs/am335x_shc_defconfig @@ -4,8 +4,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" @@ -33,6 +31,7 @@ CONFIG_BOOTCOMMAND="if mmc dev 1; mmc rescan; then run emmc_setup; else echo ERR CONFIG_DEFAULT_FDT_FILE="am335x-shc" CONFIG_SYS_PBSIZE=1049 CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 @@ -66,10 +65,12 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y -CONFIG_SYS_I2C_LEGACY=y +CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_SLAVE=0x1 CONFIG_SYS_I2C_SPEED=400000 +CONFIG_MISC=y +CONFIG_I2C_EEPROM=y CONFIG_MMC_OMAP_HS=y CONFIG_HSMMC2_8BIT=y CONFIG_PHY_ADDR_ENABLE=y diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig index c7618c5c799..b8a3227557d 100644 --- a/configs/am335x_shc_ict_defconfig +++ b/configs/am335x_shc_ict_defconfig @@ -4,8 +4,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" @@ -31,6 +29,7 @@ CONFIG_BOOTCOMMAND="if mmc dev 0; mmc rescan; then run sd_setup; else echo ERROR CONFIG_DEFAULT_FDT_FILE="am335x-shc" CONFIG_SYS_PBSIZE=1049 CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 @@ -64,10 +63,12 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y -CONFIG_SYS_I2C_LEGACY=y +CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_SLAVE=0x1 CONFIG_SYS_I2C_SPEED=400000 +CONFIG_MISC=y +CONFIG_I2C_EEPROM=y CONFIG_MMC_OMAP_HS=y CONFIG_HSMMC2_8BIT=y CONFIG_PHY_ADDR_ENABLE=y diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig index 934265815be..b25a4de30c7 100644 --- a/configs/am335x_shc_netboot_defconfig +++ b/configs/am335x_shc_netboot_defconfig @@ -4,8 +4,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" @@ -34,6 +32,7 @@ CONFIG_BOOTCOMMAND="run fusecmd; if run netboot; then echo Booting from network; CONFIG_DEFAULT_FDT_FILE="am335x-shc" CONFIG_SYS_PBSIZE=1049 CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 @@ -67,10 +66,12 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y -CONFIG_SYS_I2C_LEGACY=y +CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_SLAVE=0x1 CONFIG_SYS_I2C_SPEED=400000 +CONFIG_MISC=y +CONFIG_I2C_EEPROM=y CONFIG_MMC_OMAP_HS=y CONFIG_HSMMC2_8BIT=y CONFIG_PHY_ADDR_ENABLE=y diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig index 439f9b8188a..8486ccb6d52 100644 --- a/configs/am335x_shc_sdboot_defconfig +++ b/configs/am335x_shc_sdboot_defconfig @@ -4,8 +4,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" @@ -34,6 +32,7 @@ CONFIG_BOOTCOMMAND="if mmc dev 0; mmc rescan; then run sd_setup; else echo ERROR CONFIG_DEFAULT_FDT_FILE="am335x-shc" CONFIG_SYS_PBSIZE=1049 CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 @@ -66,10 +65,12 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y -CONFIG_SYS_I2C_LEGACY=y +CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_SLAVE=0x1 CONFIG_SYS_I2C_SPEED=400000 +CONFIG_MISC=y +CONFIG_I2C_EEPROM=y CONFIG_MMC_OMAP_HS=y CONFIG_HSMMC2_8BIT=y CONFIG_PHY_ADDR_ENABLE=y diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig index 88122bd052c..7444e55b6f7 100644 --- a/configs/am335x_sl50_defconfig +++ b/configs/am335x_sl50_defconfig @@ -4,8 +4,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_OFFSET=0x0 CONFIG_DEFAULT_DEVICE_TREE="am335x-sl50" CONFIG_AM33XX=y @@ -24,6 +22,7 @@ CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" CONFIG_AUTOBOOT_DELAY_STR="d" CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 CONFIG_SPL_ENV_SUPPORT=y @@ -66,7 +65,7 @@ CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_BOOTCOUNT_BE=y -CONFIG_SYS_I2C_LEGACY=y +CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_EEPROM_ADDR=0x50 CONFIG_MMC_OMAP_HS=y diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig index 3236f1dd672..4eb406673ff 100644 --- a/configs/am3517_evm_defconfig +++ b/configs/am3517_evm_defconfig @@ -5,15 +5,10 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TEXT_BASE=0x80100000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_ENV_SOURCE_FILE="am3517evm" -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_DEFAULT_DEVICE_TREE="ti/omap/am3517-evm" -CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_AM3517_EVM=y CONFIG_EMIF4=y -CONFIG_SYS_MONITOR_LEN=262144 CONFIG_SPL_SYS_MALLOC_F_LEN=0x2500 CONFIG_SPL=y CONFIG_LTO=y @@ -21,7 +16,6 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=10 CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then echo SD/MMC found on device $mmcdev; if run loadbootenv; then run importbootenv; fi; echo Checking if uenvcmd is set ...; if test -n $uenvcmd; then echo Running uenvcmd ...; run uenvcmd; fi; echo Running default loadimage ...; setenv bootfile zImage; if run loadimage; then run loadfdt; run mmcboot; fi; else run nandboot; fi" CONFIG_SYS_PBSIZE=1054 -CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig index d73b1cb804b..0fc4c0f269a 100644 --- a/configs/am43xx_evm_defconfig +++ b/configs/am43xx_evm_defconfig @@ -3,8 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_SF_DEFAULT_SPEED=48000000 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y diff --git a/configs/am43xx_evm_qspiboot_defconfig b/configs/am43xx_evm_qspiboot_defconfig index 89e212595af..c538c1ae352 100644 --- a/configs/am43xx_evm_qspiboot_defconfig +++ b/configs/am43xx_evm_qspiboot_defconfig @@ -4,8 +4,6 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TEXT_BASE=0x30000000 CONFIG_SYS_MALLOC_F_LEN=0x400 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_SF_DEFAULT_SPEED=48000000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x110000 diff --git a/configs/am43xx_evm_rtconly_defconfig b/configs/am43xx_evm_rtconly_defconfig index 2ff01193285..0fe5479757b 100644 --- a/configs/am43xx_evm_rtconly_defconfig +++ b/configs/am43xx_evm_rtconly_defconfig @@ -3,8 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_SF_DEFAULT_SPEED=48000000 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig index 845b686ac93..c4693bc9824 100644 --- a/configs/am43xx_evm_usbhost_boot_defconfig +++ b/configs/am43xx_evm_usbhost_boot_defconfig @@ -2,8 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_SF_DEFAULT_SPEED=48000000 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig index ff5073cbb2b..980ef13f104 100644 --- a/configs/am43xx_hs_evm_defconfig +++ b/configs/am43xx_hs_evm_defconfig @@ -4,8 +4,6 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_SF_DEFAULT_SPEED=48000000 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y diff --git a/configs/am43xx_hs_evm_qspi_defconfig b/configs/am43xx_hs_evm_qspi_defconfig index 5ef59d830e5..75725e179d7 100644 --- a/configs/am43xx_hs_evm_qspi_defconfig +++ b/configs/am43xx_hs_evm_qspi_defconfig @@ -3,8 +3,6 @@ CONFIG_ARCH_CPU_INIT=y # CONFIG_SYS_THUMB_BUILD is not set CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_SF_DEFAULT_SPEED=48000000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x110000 diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index 7c3ceeb07db..587af53acb6 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -1,9 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037ff00 CONFIG_SF_DEFAULT_SPEED=76800000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index 1f7eca4691e..b790897645f 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -2,9 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037ff00 CONFIG_SF_DEFAULT_SPEED=76800000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig index 807e1d66a6d..450751b354f 100644 --- a/configs/am57xx_hs_evm_usb_defconfig +++ b/configs/am57xx_hs_evm_usb_defconfig @@ -2,9 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037ff00 CONFIG_SF_DEFAULT_SPEED=76800000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y diff --git a/configs/am62ax_evm_a53_defconfig b/configs/am62ax_evm_a53_defconfig index 2a71b06310f..4a351cd015a 100644 --- a/configs/am62ax_evm_a53_defconfig +++ b/configs/am62ax_evm_a53_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_DM_MAILBOX=y CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_CMD_MMC=y +CONFIG_CMD_REMOTEPROC=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_UPSTREAM=y @@ -73,8 +74,8 @@ CONFIG_POWER_DOMAIN=y CONFIG_TI_SCI_POWER_DOMAIN=y CONFIG_K3_SYSTEM_CONTROLLER=y CONFIG_REMOTEPROC_TI_K3_ARM64=y -CONFIG_REMOTEPROC_TI_K3_R5F=y CONFIG_REMOTEPROC_TI_K3_DSP=y +CONFIG_REMOTEPROC_TI_K3_R5F=y CONFIG_RESET_TI_SCI=y CONFIG_DM_SERIAL=y CONFIG_SOC_DEVICE=y @@ -84,4 +85,3 @@ CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y CONFIG_SYSRESET_TI_SCI=y CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 -CONFIG_CMD_REMOTEPROC=y diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig index 4bade848e6f..afe8de81ab7 100644 --- a/configs/bitmain_antminer_s9_defconfig +++ b/configs/bitmain_antminer_s9_defconfig @@ -99,4 +99,3 @@ CONFIG_WDT_CDNS=y CONFIG_SYS_TIMER_COUNTS_DOWN=y CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y -CONFIG_TOOLS_MKEFICAPSULE=y diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig index 0b2ee74b003..8947b76e11f 100644 --- a/configs/brppt1_mmc_defconfig +++ b/configs/brppt1_mmc_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 CONFIG_DM_GPIO=y @@ -39,6 +37,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x500000 diff --git a/configs/brsmarc1_defconfig b/configs/brsmarc1_defconfig index f584b8d30b1..dc868b72b21 100644 --- a/configs/brsmarc1_defconfig +++ b/configs/brsmarc1_defconfig @@ -4,8 +4,6 @@ CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x20000 @@ -39,6 +37,7 @@ CONFIG_BOARD_TYPES=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig index 6c27f07fc79..fc801f26740 100644 --- a/configs/brxre1_defconfig +++ b/configs/brxre1_defconfig @@ -4,8 +4,6 @@ CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 CONFIG_DM_GPIO=y @@ -35,6 +33,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x500000 diff --git a/configs/chiliboard_defconfig b/configs/chiliboard_defconfig index c574d93806a..8cb6b34ce76 100644 --- a/configs/chiliboard_defconfig +++ b/configs/chiliboard_defconfig @@ -3,8 +3,6 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030fef0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x20000 CONFIG_DM_GPIO=y @@ -24,6 +22,7 @@ CONFIG_BOOTCOMMAND="run mmcboot; run nandboot; run netboot" CONFIG_DEFAULT_FDT_FILE="am335x-chiliboard.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 CONFIG_SPL_I2C=y @@ -53,7 +52,7 @@ CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_BOOTCOUNT_BE=y -CONFIG_SYS_I2C_LEGACY=y +CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_MISC=y CONFIG_MMC_OMAP_HS=y diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index 9fcac5a3796..b3ebc04e4af 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -9,7 +9,6 @@ CONFIG_DEFAULT_DEVICE_TREE="chromebook_coral" CONFIG_SPL_TEXT_BASE=0xfef10000 CONFIG_TPL_TEXT_BASE=0xffff8000 CONFIG_SPL_SYS_MALLOC_F_LEN=0xf000 -CONFIG_BOOTSTAGE_STASH_ADDR=0xfef00000 CONFIG_DEBUG_UART_BASE=0xde000000 CONFIG_DEBUG_UART_CLOCK=1843200 CONFIG_DEBUG_UART_BOARD_INIT=y @@ -32,6 +31,7 @@ CONFIG_TPL_BOOTSTAGE=y CONFIG_BOOTSTAGE_REPORT=y CONFIG_SPL_BOOTSTAGE_RECORD_COUNT=10 CONFIG_BOOTSTAGE_STASH=y +CONFIG_BOOTSTAGE_STASH_ADDR=0xfef00000 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS_SUBST=y CONFIG_BOOTCOMMAND="tpm init; tpm startup TPM2_SU_CLEAR; bootflow scan -lb" diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index 386616cc420..81a39f70735 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -80,7 +80,7 @@ CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y # CONFIG_DWC_AHSATA_AHCI is not set CONFIG_LBA48=y -CONFIG_SYS_I2C_LEGACY=y +CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MXC=y CONFIG_SYS_MXC_I2C3_SPEED=400000 diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig index 32f126a5174..eabeee8b8da 100644 --- a/configs/cm_t43_defconfig +++ b/configs/cm_t43_defconfig @@ -5,8 +5,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_SF_DEFAULT_SPEED=48000000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0xC0000 @@ -38,6 +36,7 @@ CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x480 CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C=y +# CONFIG_SPL_DM_I2C is not set CONFIG_SPL_MTD=y # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_NAND_DRIVERS=y @@ -72,7 +71,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_SYS_RX_ETH_BUFFER=64 -CONFIG_SYS_I2C_LEGACY=y +CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_MMC_OMAP_HS=y CONFIG_HSMMC2_8BIT=y diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig index ab4e0fefc90..26e157dc2cb 100644 --- a/configs/corstone1000_defconfig +++ b/configs/corstone1000_defconfig @@ -66,6 +66,5 @@ CONFIG_FFA_SHARED_MM_BUF_SIZE=4096 CONFIG_FFA_SHARED_MM_BUF_OFFSET=0 CONFIG_FFA_SHARED_MM_BUF_ADDR=0x02000000 CONFIG_EFI_CAPSULE_ON_DISK=y -CONFIG_EFI_IGNORE_OSINDICATIONS=y CONFIG_FWU_MULTI_BANK_UPDATE=y CONFIG_FWU_MDATA_V1=y diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig index 7653fbbe7e5..33201cec772 100644 --- a/configs/devkit8000_defconfig +++ b/configs/devkit8000_defconfig @@ -3,13 +3,8 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TEXT_BASE=0x80100000 CONFIG_SYS_MALLOC_LEN=0x40000 CONFIG_SYS_MALLOC_F_LEN=0x4000 -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_DEFAULT_DEVICE_TREE="omap3-devkit8000" -CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_DEVKIT8000=y -CONFIG_SYS_MONITOR_LEN=262144 CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL_BSS_START_ADDR=0x80000500 CONFIG_SPL=y @@ -17,7 +12,6 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="run autoboot" CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index 41804a0fb63..27dab9e2e95 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -23,6 +23,7 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x020CC068 +CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_SPL=y CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_ENV_OFFSET_REDUND=0x110000 @@ -127,6 +128,5 @@ CONFIG_CI_UDC=y CONFIG_SDP_LOADADDR=0x17ffffc0 CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_SPL_USB_SDP_SUPPORT=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_IMX_WATCHDOG=y CONFIG_BZIP2=y diff --git a/configs/display5_defconfig b/configs/display5_defconfig index 7707b327a93..1d3336b8c6a 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -25,6 +25,7 @@ CONFIG_SPL_SERIAL=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x020CC068 CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 +CONFIG_WATCHDOG_TIMEOUT_MSECS=15000 CONFIG_SPL=y CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_ENV_OFFSET_REDUND=0x130000 @@ -127,5 +128,4 @@ CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_SYSRESET=y CONFIG_SYSRESET_WATCHDOG=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=15000 CONFIG_IMX_WATCHDOG=y diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig index 58f47512136..7c681f095c5 100644 --- a/configs/display5_factory_defconfig +++ b/configs/display5_factory_defconfig @@ -23,6 +23,7 @@ CONFIG_SYS_MONITOR_LEN=409600 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 +CONFIG_WATCHDOG_TIMEOUT_MSECS=15000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x130000 CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -134,6 +135,5 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_SPL_USB_SDP_SUPPORT=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=15000 CONFIG_IMX_WATCHDOG=y CONFIG_PANIC_HANG=y diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index 0cea5504364..6264d9fa7ad 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -2,9 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x18000 CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037fef0 CONFIG_SF_DEFAULT_SPEED=76800000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index 5f56b187503..4e7929718fd 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -3,9 +3,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y CONFIG_SYS_MALLOC_F_LEN=0x18000 CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037fef0 CONFIG_SF_DEFAULT_SPEED=76800000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y diff --git a/configs/dra7xx_hs_evm_usb_defconfig b/configs/dra7xx_hs_evm_usb_defconfig index 5b67a0e8392..68d342b277c 100644 --- a/configs/dra7xx_hs_evm_usb_defconfig +++ b/configs/dra7xx_hs_evm_usb_defconfig @@ -3,9 +3,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y CONFIG_SYS_MALLOC_F_LEN=0x18000 CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037fef0 CONFIG_SF_DEFAULT_SPEED=76800000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y diff --git a/configs/draco-etamin_defconfig b/configs/draco-etamin_defconfig index ba3f381f69f..78ee5c1eb66 100644 --- a/configs/draco-etamin_defconfig +++ b/configs/draco-etamin_defconfig @@ -5,8 +5,6 @@ CONFIG_SYS_MALLOC_LEN=0x1000000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x980000 CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" diff --git a/configs/draco-rastaban_defconfig b/configs/draco-rastaban_defconfig index 43d29f5b11a..81a349b730c 100644 --- a/configs/draco-rastaban_defconfig +++ b/configs/draco-rastaban_defconfig @@ -5,8 +5,6 @@ CONFIG_SYS_MALLOC_LEN=0x1000000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_AM33XX=y diff --git a/configs/draco-thuban_defconfig b/configs/draco-thuban_defconfig index b457b22fc64..265c1138dfe 100644 --- a/configs/draco-thuban_defconfig +++ b/configs/draco-thuban_defconfig @@ -5,8 +5,6 @@ CONFIG_SYS_MALLOC_LEN=0x1000000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_AM33XX=y diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig index cc2f567c8a8..004f1866162 100644 --- a/configs/ethernut5_defconfig +++ b/configs/ethernut5_defconfig @@ -46,7 +46,6 @@ CONFIG_CMD_SNTP=y CONFIG_CMD_DNS=y CONFIG_CMD_BSP=y CONFIG_CMD_CACHE=y -CONFIG_CMD_DATE=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_CMD_JFFS2=y diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig index 488a259e268..972f4188373 100644 --- a/configs/evb-px30_defconfig +++ b/configs/evb-px30_defconfig @@ -29,8 +29,8 @@ CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set -# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set # CONFIG_TPL_BANNER_PRINT is not set +# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set diff --git a/configs/firefly-px30_defconfig b/configs/firefly-px30_defconfig index 3fe1dc3ab10..a1ce9222c32 100644 --- a/configs/firefly-px30_defconfig +++ b/configs/firefly-px30_defconfig @@ -30,8 +30,8 @@ CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set -# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set # CONFIG_TPL_BANNER_PRINT is not set +# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set diff --git a/configs/ge_b1x5v2_defconfig b/configs/ge_b1x5v2_defconfig index 20384bcca64..403a5a526f0 100644 --- a/configs/ge_b1x5v2_defconfig +++ b/configs/ge_b1x5v2_defconfig @@ -19,6 +19,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6dl-b1x5v2" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL=y CONFIG_BOOTCOUNT_BOOTLIMIT=10 +CONFIG_WATCHDOG_TIMEOUT_MSECS=30000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0x21ec000 CONFIG_DEBUG_UART_CLOCK=24000000 @@ -134,6 +135,5 @@ CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_VIDEO=y CONFIG_VIDEO_IPUV3=y CONFIG_IMX_VIDEO_SKIP=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=30000 CONFIG_IMX_WATCHDOG=y CONFIG_BCH=y diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index 2a429388829..ce5dfb49279 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -11,6 +11,7 @@ CONFIG_TARGET_GE_BX50V3=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-bx50v3" CONFIG_BOOTCOUNT_BOOTLIMIT=10 +CONFIG_WATCHDOG_TIMEOUT_MSECS=8000 CONFIG_PCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y @@ -97,7 +98,6 @@ CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_IPUV3=y CONFIG_IMX_VIDEO_SKIP=y CONFIG_IMX_HDMI=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=8000 CONFIG_IMX_WATCHDOG=y CONFIG_BCH=y # CONFIG_EFI_LOADER is not set diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index ad994744c82..213a5e5eca8 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -22,6 +22,7 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x18000000 CONFIG_SPL_STACK_R=y +CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0xD1400 CONFIG_CMD_HDMIDETECT=y @@ -174,5 +175,4 @@ CONFIG_IMX_HDMI=y CONFIG_SPLASH_SCREEN=y CONFIG_SPLASH_SCREEN_ALIGN=y CONFIG_HIDE_LOGO_VERSION=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_IMX_WATCHDOG=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index 96c64c8b767..2306cd61068 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -22,6 +22,7 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x18000000 CONFIG_SPL_STACK_R=y +CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x1080000 CONFIG_CMD_HDMIDETECT=y @@ -181,5 +182,4 @@ CONFIG_IMX_HDMI=y CONFIG_SPLASH_SCREEN=y CONFIG_SPLASH_SCREEN_ALIGN=y CONFIG_HIDE_LOGO_VERSION=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_IMX_WATCHDOG=y diff --git a/configs/igep00x0_defconfig b/configs/igep00x0_defconfig index 473891607b0..f1d9bb34aba 100644 --- a/configs/igep00x0_defconfig +++ b/configs/igep00x0_defconfig @@ -4,14 +4,9 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_ENV_SIZE=0x8000 CONFIG_DEFAULT_DEVICE_TREE="ti/omap/omap3-igep0020" -CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_IGEP00X0=y -CONFIG_SYS_MONITOR_LEN=262144 CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y @@ -22,7 +17,6 @@ CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 diff --git a/configs/imx6q_bosch_acc_defconfig b/configs/imx6q_bosch_acc_defconfig index 73ae4acfb43..dce1b64bf69 100644 --- a/configs/imx6q_bosch_acc_defconfig +++ b/configs/imx6q_bosch_acc_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_MONITOR_LEN=409600 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_BOOTCOUNT_BOOTLIMIT=8 +CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_SPL_SIZE_LIMIT=69632 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x1ff000 @@ -94,7 +95,6 @@ CONFIG_DM_PMIC=y CONFIG_DM_PMIC_PFUZE100=y CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_IMX_WATCHDOG=y CONFIG_WDT=y CONFIG_EXT4_WRITE=y diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index 8b04586f861..788770bb364 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -41,6 +41,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_CMD_CPU=y # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set @@ -68,6 +69,8 @@ CONFIG_SPL_CLK_COMPOSITE_CCF=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_SPL_CLK_IMX8MM=y CONFIG_CLK_IMX8MM=y +CONFIG_CPU=y +CONFIG_CPU_IMX=y CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y CONFIG_SUPPORT_EMMC_BOOT=y @@ -118,6 +121,3 @@ CONFIG_SDP_LOADADDR=0x40400000 CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_IMX_WATCHDOG=y -CONFIG_CPU=y -CONFIG_CPU_IMX=y -CONFIG_CMD_CPU=y diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig index ee7a5e90883..679ca71ade0 100644 --- a/configs/imx8mn_evk_defconfig +++ b/configs/imx8mn_evk_defconfig @@ -50,6 +50,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_CMD_CPU=y # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CMD_ERASEENV=y @@ -71,6 +72,8 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_SPL_DM=y CONFIG_SPL_CLK_IMX8MN=y CONFIG_CLK_IMX8MN=y +CONFIG_CPU=y +CONFIG_CPU_IMX=y CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y CONFIG_SUPPORT_EMMC_BOOT=y @@ -105,6 +108,3 @@ CONFIG_SYSRESET_PSCI=y CONFIG_SYSRESET_WATCHDOG=y CONFIG_DM_THERMAL=y CONFIG_IMX_WATCHDOG=y -CONFIG_CPU=y -CONFIG_CPU_IMX=y -CONFIG_CMD_CPU=y diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index 31760699916..a2c07967f59 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -47,6 +47,7 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_CMD_CPU=y # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set # CONFIG_CMD_CRC32 is not set @@ -74,6 +75,8 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_CLK_IMX8MP=y +CONFIG_CPU=y +CONFIG_CPU_IMX=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x42800000 CONFIG_FASTBOOT_BUF_SIZE=0x20000000 @@ -137,6 +140,3 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_IMX_WATCHDOG=y -CONFIG_CPU=y -CONFIG_CPU_IMX=y -CONFIG_CMD_CPU=y diff --git a/configs/imx93_11x11_evk_defconfig b/configs/imx93_11x11_evk_defconfig index 93ab0b9aa30..6f083e0cd8c 100644 --- a/configs/imx93_11x11_evk_defconfig +++ b/configs/imx93_11x11_evk_defconfig @@ -48,11 +48,11 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_CMD_CPU=y CONFIG_CMD_ERASEENV=y # CONFIG_CMD_CRC32 is not set CONFIG_CMD_MEMTEST=y CONFIG_CMD_CLK=y -CONFIG_CMD_CPU=y CONFIG_CMD_DFU=y CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y diff --git a/configs/iot2050_defconfig b/configs/iot2050_defconfig index e0c2b140441..8654bf20865 100644 --- a/configs/iot2050_defconfig +++ b/configs/iot2050_defconfig @@ -27,6 +27,7 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x80a00000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_STACK_R=y +CONFIG_WATCHDOG_TIMEOUT_MSECS=0 CONFIG_ENV_OFFSET_REDUND=0x6a0000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y @@ -147,7 +148,6 @@ CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_KEYBOARD=y # CONFIG_WATCHDOG is not set # CONFIG_WATCHDOG_AUTOSTART is not set -CONFIG_WATCHDOG_TIMEOUT_MSECS=0 CONFIG_WDT=y CONFIG_WDT_K3_RTI=y CONFIG_WDT_K3_RTI_LOAD_FW=y diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig index 4db5654ca1c..fcfa9265996 100644 --- a/configs/j7200_evm_a72_defconfig +++ b/configs/j7200_evm_a72_defconfig @@ -85,6 +85,7 @@ CONFIG_CMD_UBI=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_UPSTREAM=y CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y @@ -96,7 +97,6 @@ CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y CONFIG_SPL_OF_TRANSLATE=y -CONFIG_OF_UPSTREAM=y CONFIG_CLK=y CONFIG_SPL_CLK=y CONFIG_CLK_CCF=y diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index ffaf21d4999..f1c9bbd3fa8 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -82,7 +82,6 @@ CONFIG_CMD_MTDPARTS=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_SPL_MULTI_DTB_FIT=y -CONFIG_SPL_OF_LIST="k3-j721e-r5-common-proc-board" CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig index 5c3b52baaee..5800e4be963 100644 --- a/configs/j721s2_evm_a72_defconfig +++ b/configs/j721s2_evm_a72_defconfig @@ -34,9 +34,8 @@ CONFIG_SPL_SPI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 -CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTSTD_FULL=y -CONFIG_BOOTSTD_DEFAULTS=y +CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb" CONFIG_LOGLEVEL=7 CONFIG_SPL_MAX_SIZE=0xc0000 @@ -85,9 +84,8 @@ CONFIG_CMD_UBI=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y -CONFIG_OF_LIST="ti/k3-j721s2-common-proc-board" -CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_OF_UPSTREAM=y +CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig index 6404b1cc303..d0af664a6b7 100644 --- a/configs/j721s2_evm_r5_defconfig +++ b/configs/j721s2_evm_r5_defconfig @@ -83,7 +83,6 @@ CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_SPL_MULTI_DTB_FIT=y -CONFIG_SPL_OF_LIST="k3-j721s2-r5-common-proc-board" CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/j722s_evm_r5_defconfig b/configs/j722s_evm_r5_defconfig index d7b99cb2b27..8ba3916807d 100644 --- a/configs/j722s_evm_r5_defconfig +++ b/configs/j722s_evm_r5_defconfig @@ -23,7 +23,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x43c7b000 CONFIG_SPL_BSS_MAX_SIZE=0x3000 CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000 CONFIG_SPL_SIZE_LIMIT=0x3C000 CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x5000 CONFIG_SPL_FS_FAT=y diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index 8d6cb240446..f201a175727 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -18,7 +18,7 @@ CONFIG_SF_DEFAULT_SPEED=30000000 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 CONFIG_SPL_DM_SPI=y -CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm" +CONFIG_DEFAULT_DEVICE_TREE="ti/keystone/keystone-k2e-evm" CONFIG_SPL_TEXT_BASE=0xC100000 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0xc1223f4 @@ -99,3 +99,4 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y +CONFIG_OF_UPSTREAM=y diff --git a/configs/k2e_hs_evm_defconfig b/configs/k2e_hs_evm_defconfig index e3c0ae15071..46501d59e09 100644 --- a/configs/k2e_hs_evm_defconfig +++ b/configs/k2e_hs_evm_defconfig @@ -15,7 +15,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0fff10 CONFIG_SF_DEFAULT_SPEED=30000000 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm" +CONFIG_DEFAULT_DEVICE_TREE="ti/keystone/keystone-k2e-evm" CONFIG_TIMESTAMP=y CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y @@ -73,3 +73,4 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y +CONFIG_OF_UPSTREAM=y diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index 5d54d75f974..57a3d362a1b 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -17,7 +17,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc09ff10 CONFIG_SF_DEFAULT_SPEED=30000000 CONFIG_ENV_SIZE=0x40000 CONFIG_SPL_DM_SPI=y -CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm" +CONFIG_DEFAULT_DEVICE_TREE="ti/keystone/keystone-k2g-evm" CONFIG_SPL_TEXT_BASE=0xC0A0000 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0xc0c23f4 @@ -57,7 +57,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=davinci_nand.0" CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y -CONFIG_OF_LIST="keystone-k2g-generic keystone-k2g-evm keystone-k2g-ice" +CONFIG_OF_LIST="ti/keystone/keystone-k2g-evm ti/keystone/keystone-k2g-ice" CONFIG_DTB_RESELECT=y CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_OVERWRITE=y @@ -109,3 +109,4 @@ CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_SDP=y +CONFIG_OF_UPSTREAM=y diff --git a/configs/k2g_hs_evm_defconfig b/configs/k2g_hs_evm_defconfig index 9adab3af305..392ec5b2a05 100644 --- a/configs/k2g_hs_evm_defconfig +++ b/configs/k2g_hs_evm_defconfig @@ -14,7 +14,7 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc09ff10 CONFIG_SF_DEFAULT_SPEED=30000000 CONFIG_ENV_SIZE=0x40000 -CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm" +CONFIG_DEFAULT_DEVICE_TREE="ti/keystone/keystone-k2g-evm" CONFIG_TIMESTAMP=y CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y @@ -33,7 +33,7 @@ CONFIG_BOOTP_DNS2=y CONFIG_MTDIDS_DEFAULT="nand0=davinci_nand.0" CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y -CONFIG_OF_LIST="keystone-k2g-generic keystone-k2g-evm keystone-k2g-ice" +CONFIG_OF_LIST="ti/keystone/keystone-k2g-evm ti/keystone/keystone-k2g-ice" CONFIG_DTB_RESELECT=y CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_OVERWRITE=y @@ -84,3 +84,4 @@ CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_SDP=y +CONFIG_OF_UPSTREAM=y diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index 4da75d1ca76..2e29b2f2aeb 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -18,7 +18,7 @@ CONFIG_SF_DEFAULT_SPEED=30000000 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 CONFIG_SPL_DM_SPI=y -CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm" +CONFIG_DEFAULT_DEVICE_TREE="ti/keystone/keystone-k2hk-evm" CONFIG_SPL_TEXT_BASE=0xC200000 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0xc2223f4 @@ -100,3 +100,4 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y +CONFIG_OF_UPSTREAM=y diff --git a/configs/k2hk_hs_evm_defconfig b/configs/k2hk_hs_evm_defconfig index 1a24d7142b8..cf299f2457c 100644 --- a/configs/k2hk_hs_evm_defconfig +++ b/configs/k2hk_hs_evm_defconfig @@ -15,7 +15,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc1fff10 CONFIG_SF_DEFAULT_SPEED=30000000 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm" +CONFIG_DEFAULT_DEVICE_TREE="ti/keystone/keystone-k2hk-evm" CONFIG_TIMESTAMP=y CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y @@ -74,3 +74,4 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y +CONFIG_OF_UPSTREAM=y diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index c4534f033ac..0cadece4b02 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -18,7 +18,7 @@ CONFIG_SF_DEFAULT_SPEED=30000000 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 CONFIG_SPL_DM_SPI=y -CONFIG_DEFAULT_DEVICE_TREE="keystone-k2l-evm" +CONFIG_DEFAULT_DEVICE_TREE="ti/keystone/keystone-k2l-evm" CONFIG_SPL_TEXT_BASE=0xC100000 CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0xc1223f4 @@ -100,3 +100,4 @@ CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y +CONFIG_OF_UPSTREAM=y diff --git a/configs/k2l_hs_evm_defconfig b/configs/k2l_hs_evm_defconfig index c874349e942..5496049d3a3 100644 --- a/configs/k2l_hs_evm_defconfig +++ b/configs/k2l_hs_evm_defconfig @@ -15,7 +15,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0fff10 CONFIG_SF_DEFAULT_SPEED=30000000 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 -CONFIG_DEFAULT_DEVICE_TREE="keystone-k2l-evm" +CONFIG_DEFAULT_DEVICE_TREE="ti/keystone/keystone-k2l-evm" CONFIG_TIMESTAMP=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTCOMMAND=y @@ -78,3 +78,4 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_STORAGE=y +CONFIG_OF_UPSTREAM=y diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig index f2570289298..1b7d22b43e1 100644 --- a/configs/kontron-sl-mx8mm_defconfig +++ b/configs/kontron-sl-mx8mm_defconfig @@ -148,5 +148,4 @@ CONFIG_IMX_WATCHDOG=y CONFIG_EFI_SET_TIME=y CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y CONFIG_EFI_CAPSULE_ON_DISK=y -CONFIG_EFI_IGNORE_OSINDICATIONS=y CONFIG_EFI_CAPSULE_FIRMWARE_FIT=y diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig index cc57ab09af2..fceda3f14d4 100644 --- a/configs/kp_imx6q_tpc_defconfig +++ b/configs/kp_imx6q_tpc_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SYS_MONITOR_LEN=409600 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y +CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x102000 CONFIG_SPL_PAYLOAD="u-boot.img" @@ -83,5 +84,4 @@ CONFIG_USB=y # CONFIG_SPL_DM_USB is not set CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_IMX_WATCHDOG=y diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index 06e41546d67..0066414f0f5 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -61,7 +61,6 @@ CONFIG_CMD_PCI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y -CONFIG_CMD_DATE=y # CONFIG_ISO_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig index 0b54bc999e7..44a1459749f 100644 --- a/configs/ls2080aqds_qspi_defconfig +++ b/configs/ls2080aqds_qspi_defconfig @@ -43,7 +43,6 @@ CONFIG_CMD_PCI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y -CONFIG_CMD_DATE=y # CONFIG_ISO_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index f1009e1738b..cbc8d6a5cf4 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -68,7 +68,6 @@ CONFIG_CMD_PCI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y -CONFIG_CMD_DATE=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig index db3a5b9f206..65a98758aac 100644 --- a/configs/m53menlo_defconfig +++ b/configs/m53menlo_defconfig @@ -18,11 +18,11 @@ CONFIG_SPL_SERIAL=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x53FA401C CONFIG_SPL_STACK=0x70004000 +CONFIG_WATCHDOG_TIMEOUT_MSECS=8000 CONFIG_SPL=y CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_SYS_LOAD_ADDR=0x70800000 -CONFIG_CMD_BMODE=y CONFIG_FIT=y CONFIG_BOOTDELAY=1 CONFIG_OF_BOARD_SETUP=y @@ -132,5 +132,4 @@ CONFIG_SPLASH_SOURCE=y CONFIG_VIDEO_BMP_GZIP=y CONFIG_VIDEO_LOGO_MAX_SIZE=0x200000 CONFIG_BMP_16BPP=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=8000 CONFIG_IMX_WATCHDOG=y diff --git a/configs/malta64_defconfig b/configs/malta64_defconfig index ff371daaa0d..8ac29b9289f 100644 --- a/configs/malta64_defconfig +++ b/configs/malta64_defconfig @@ -27,7 +27,6 @@ CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y -CONFIG_CMD_DATE=y # CONFIG_ISO_PARTITION is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_SYS_IDE_MAXBUS=1 diff --git a/configs/malta64el_defconfig b/configs/malta64el_defconfig index 5b130bcde9b..0a71013d5fc 100644 --- a/configs/malta64el_defconfig +++ b/configs/malta64el_defconfig @@ -29,7 +29,6 @@ CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y -CONFIG_CMD_DATE=y # CONFIG_ISO_PARTITION is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_SYS_IDE_MAXBUS=1 diff --git a/configs/malta_defconfig b/configs/malta_defconfig index ce917a69de5..355292ef950 100644 --- a/configs/malta_defconfig +++ b/configs/malta_defconfig @@ -26,7 +26,6 @@ CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y -CONFIG_CMD_DATE=y # CONFIG_ISO_PARTITION is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_SYS_IDE_MAXBUS=1 diff --git a/configs/maltael_defconfig b/configs/maltael_defconfig index de29a7a3a5b..ffd27713963 100644 --- a/configs/maltael_defconfig +++ b/configs/maltael_defconfig @@ -28,7 +28,6 @@ CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y -CONFIG_CMD_DATE=y # CONFIG_ISO_PARTITION is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_SYS_IDE_MAXBUS=1 diff --git a/configs/mt7629_rfb_defconfig b/configs/mt7629_rfb_defconfig index bccbbccc601..8e9306acd57 100644 --- a/configs/mt7629_rfb_defconfig +++ b/configs/mt7629_rfb_defconfig @@ -60,9 +60,7 @@ CONFIG_IPADDR="192.168.1.1" CONFIG_USE_SERVERIP=y CONFIG_SERVERIP="192.168.1.2" CONFIG_SPL_DM_SEQ_ALIAS=y -CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y -CONFIG_SYSCON=y CONFIG_SPL_SYSCON=y CONFIG_CLK=y CONFIG_SPL_CLK=y diff --git a/configs/mt8512_bm1_emmc_defconfig b/configs/mt8512_bm1_emmc_defconfig index 2a285a56ba1..c7ac0df39f5 100644 --- a/configs/mt8512_bm1_emmc_defconfig +++ b/configs/mt8512_bm1_emmc_defconfig @@ -25,8 +25,6 @@ CONFIG_CMD_FS_GENERIC=y # CONFIG_DOS_PARTITION is not set CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y -CONFIG_REGMAP=y -CONFIG_SYSCON=y CONFIG_CLK=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x56000000 diff --git a/configs/mvebu_espressobin_ultra-88f3720_defconfig b/configs/mvebu_espressobin_ultra-88f3720_defconfig index c6ffaaabcad..974b6df165a 100644 --- a/configs/mvebu_espressobin_ultra-88f3720_defconfig +++ b/configs/mvebu_espressobin_ultra-88f3720_defconfig @@ -11,7 +11,6 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3F0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y -CONFIG_OF_UPSTREAM=y CONFIG_DEFAULT_DEVICE_TREE="marvell/armada-3720-espressobin-ultra" CONFIG_SYS_LOAD_ADDR=0x6000000 CONFIG_PCI=y @@ -46,6 +45,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_SQUASHFS=y CONFIG_CMD_FS_UUID=y CONFIG_MAC_PARTITION=y +CONFIG_OF_UPSTREAM=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y @@ -64,7 +64,6 @@ CONFIG_MISC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_XENON=y -CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_ISSI=y @@ -75,8 +74,8 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_MTD=y CONFIG_PHY_MARVELL=y CONFIG_PHY_FIXED=y -CONFIG_PHY_GIGE=y CONFIG_DM_DSA=y +CONFIG_PHY_GIGE=y CONFIG_MV88E6XXX=y CONFIG_MVNETA=y CONFIG_MVMDIO=y @@ -87,6 +86,8 @@ CONFIG_MVEBU_COMPHY_SUPPORT=y CONFIG_PINCTRL=y CONFIG_PINCTRL_ARMADA_37XX=y CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_RTC=y +CONFIG_RTC_PCF8563=y CONFIG_DEFAULT_ENV_IS_RW=y CONFIG_MVEBU_A3700_UART=y CONFIG_MVEBU_A3700_SPI=y @@ -97,10 +98,3 @@ CONFIG_USB_EHCI_HCD=y CONFIG_WDT=y CONFIG_WDT_ARMADA_37XX=y CONFIG_SHA1=y -CONFIG_DM_RTC=y -CONFIG_RTC_PCF8563=y -# CONFIG_DEBUG_UART=y -# CONFIG_DEBUG_UART_BASE=0xd0012000 -# CONFIG_DEBUG_UART_CLOCK=25804800 -# CONFIG_DEBUG_UART_SHIFT=2 -# CONFIG_DEBUG_UART_ANNOUNCE=y diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig index 1fe68ef93f9..dddb57efd3e 100644 --- a/configs/mx28evk_defconfig +++ b/configs/mx28evk_defconfig @@ -32,7 +32,6 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_CACHE=y -CONFIG_CMD_DATE=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig index e5178fb3d6b..5932a15a33d 100644 --- a/configs/mx51evk_defconfig +++ b/configs/mx51evk_defconfig @@ -31,7 +31,6 @@ CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y -CONFIG_CMD_DATE=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig index 659de719082..463cfc64ada 100644 --- a/configs/mx53ppd_defconfig +++ b/configs/mx53ppd_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_MX53PPD=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx53-ppd" CONFIG_BOOTCOUNT_BOOTLIMIT=10 +CONFIG_WATCHDOG_TIMEOUT_MSECS=8000 CONFIG_SYS_LOAD_ADDR=0x72000000 CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y @@ -81,6 +82,5 @@ CONFIG_VIDEO=y CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_IPUV3=y CONFIG_IMX_VIDEO_SKIP=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=8000 CONFIG_IMX_WATCHDOG=y CONFIG_BCH=y diff --git a/configs/novena_defconfig b/configs/novena_defconfig index 322689ef3a2..dd3541bc59a 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -67,7 +67,7 @@ CONFIG_NETCONSOLE=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y CONFIG_LBA48=y -CONFIG_SYS_I2C_LEGACY=y +CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MXC=y CONFIG_FSL_USDHC=y diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig index 78fb7580da7..efcc8f70370 100644 --- a/configs/nyan-big_defconfig +++ b/configs/nyan-big_defconfig @@ -10,7 +10,6 @@ CONFIG_ENV_OFFSET=0xFFFFE000 CONFIG_DEFAULT_DEVICE_TREE="tegra124-nyan-big" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_SPL_STACK=0x800ffffc -CONFIG_BOOTSTAGE_STASH_ADDR=0x83000000 CONFIG_TEGRA124=y CONFIG_TARGET_NYAN_BIG=y CONFIG_TEGRA_GPU=y @@ -20,6 +19,7 @@ CONFIG_FIT_BEST_MATCH=y CONFIG_BOOTSTAGE=y CONFIG_SPL_BOOTSTAGE=y CONFIG_BOOTSTAGE_STASH=y +CONFIG_BOOTSTAGE_STASH_ADDR=0x83000000 CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_PBSIZE=2087 CONFIG_SYS_STDIO_DEREGISTER=y diff --git a/configs/odroid-go2_defconfig b/configs/odroid-go2_defconfig index a9af4151014..b38676a0a8a 100644 --- a/configs/odroid-go2_defconfig +++ b/configs/odroid-go2_defconfig @@ -36,8 +36,8 @@ CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set -# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set # CONFIG_TPL_BANNER_PRINT is not set +# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set diff --git a/configs/omap35_logic_defconfig b/configs/omap35_logic_defconfig index 23b2e503385..843b61dec4a 100644 --- a/configs/omap35_logic_defconfig +++ b/configs/omap35_logic_defconfig @@ -6,14 +6,9 @@ CONFIG_TEXT_BASE=0x80100000 CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_TI_COMMON_CMD_OPTIONS=y # CONFIG_SPL_GPIO is not set -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_DEFAULT_DEVICE_TREE="ti/omap/logicpd-torpedo-35xx-devkit" -CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_LOGIC=y # CONFIG_SPL_OMAP3_ID_NAND is not set -CONFIG_SYS_MONITOR_LEN=262144 CONFIG_SPL=y CONFIG_LTO=y CONFIG_ANDROID_BOOT_IMAGE=y @@ -24,7 +19,6 @@ CONFIG_PREBOOT="setenv preboot;saveenv;" CONFIG_DEFAULT_FDT_FILE="logicpd-torpedo-35xx-devkit.dtb" CONFIG_SYS_PBSIZE=1054 CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 diff --git a/configs/omap35_logic_somlv_defconfig b/configs/omap35_logic_somlv_defconfig index a5f242ff40c..bbd1b746cf9 100644 --- a/configs/omap35_logic_somlv_defconfig +++ b/configs/omap35_logic_somlv_defconfig @@ -6,14 +6,9 @@ CONFIG_TEXT_BASE=0x80100000 CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_TI_COMMON_CMD_OPTIONS=y # CONFIG_SPL_GPIO is not set -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_DEFAULT_DEVICE_TREE="ti/omap/logicpd-som-lv-35xx-devkit" -CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_LOGIC=y # CONFIG_SPL_OMAP3_ID_NAND is not set -CONFIG_SYS_MONITOR_LEN=262144 CONFIG_SPL=y CONFIG_LTO=y CONFIG_SYS_MONITOR_BASE=0x10000000 @@ -25,7 +20,6 @@ CONFIG_PREBOOT="setenv preboot;saveenv;" CONFIG_DEFAULT_FDT_FILE="logicpd-som-lv-35xx-devkit.dtb" CONFIG_SYS_PBSIZE=1054 CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig index 3c8d974fbd0..cc0b61af509 100644 --- a/configs/omap3_evm_defconfig +++ b/configs/omap3_evm_defconfig @@ -3,13 +3,8 @@ CONFIG_ARM=y # CONFIG_SPL_USE_ARCH_MEMSET is not set CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x4000 -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_DEFAULT_DEVICE_TREE="omap3-evm" -CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_EVM=y -CONFIG_SYS_MONITOR_LEN=262144 CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y @@ -18,7 +13,6 @@ CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="omap3-evm.dtb" CONFIG_SYS_PBSIZE=1053 CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig index d081d4e0fb4..ed04386cf95 100644 --- a/configs/omap3_logic_defconfig +++ b/configs/omap3_logic_defconfig @@ -6,14 +6,9 @@ CONFIG_TEXT_BASE=0x80100000 CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_TI_COMMON_CMD_OPTIONS=y # CONFIG_SPL_GPIO is not set -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_DEFAULT_DEVICE_TREE="ti/omap/logicpd-torpedo-37xx-devkit" -CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_LOGIC=y # CONFIG_SPL_OMAP3_ID_NAND is not set -CONFIG_SYS_MONITOR_LEN=262144 CONFIG_SPL=y CONFIG_LTO=y CONFIG_ANDROID_BOOT_IMAGE=y @@ -23,7 +18,6 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="setenv preboot;saveenv;" CONFIG_SYS_PBSIZE=1054 CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 diff --git a/configs/omap3_logic_somlv_defconfig b/configs/omap3_logic_somlv_defconfig index 68e89d245ee..c5d76d0d086 100644 --- a/configs/omap3_logic_somlv_defconfig +++ b/configs/omap3_logic_somlv_defconfig @@ -6,14 +6,9 @@ CONFIG_TEXT_BASE=0x80100000 CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_TI_COMMON_CMD_OPTIONS=y # CONFIG_SPL_GPIO is not set -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_DEFAULT_DEVICE_TREE="ti/omap/logicpd-som-lv-37xx-devkit" -CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_LOGIC=y # CONFIG_SPL_OMAP3_ID_NAND is not set -CONFIG_SYS_MONITOR_LEN=262144 CONFIG_SPL=y CONFIG_LTO=y CONFIG_SYS_MONITOR_BASE=0x10000000 @@ -25,7 +20,6 @@ CONFIG_PREBOOT="setenv preboot;saveenv;" CONFIG_DEFAULT_FDT_FILE="logicpd-som-lv-37xx-devkit.dtb" CONFIG_SYS_PBSIZE=1054 CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 diff --git a/configs/pcm051_rev3_defconfig b/configs/pcm051_rev3_defconfig index 78469814af3..a4e467fa05e 100644 --- a/configs/pcm051_rev3_defconfig +++ b/configs/pcm051_rev3_defconfig @@ -3,8 +3,6 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_DEFAULT_DEVICE_TREE="am335x-wega-rdk" CONFIG_AM33XX=y diff --git a/configs/phycore-am335x-r2-regor_defconfig b/configs/phycore-am335x-r2-regor_defconfig index ac638c4e321..d5056ccd98e 100644 --- a/configs/phycore-am335x-r2-regor_defconfig +++ b/configs/phycore-am335x-r2-regor_defconfig @@ -4,8 +4,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_OFFSET=0xA0000 CONFIG_DEFAULT_DEVICE_TREE="am335x-regor-rdk" CONFIG_AM33XX=y diff --git a/configs/phycore-am335x-r2-wega_defconfig b/configs/phycore-am335x-r2-wega_defconfig index 98c62171865..5813d102475 100644 --- a/configs/phycore-am335x-r2-wega_defconfig +++ b/configs/phycore-am335x-r2-wega_defconfig @@ -4,8 +4,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_OFFSET=0xA0000 CONFIG_DEFAULT_DEVICE_TREE="am335x-wega-rdk" CONFIG_AM33XX=y diff --git a/configs/phycore_am62x_r5_defconfig b/configs/phycore_am62x_r5_defconfig index c1664c4295f..b7d0273dd74 100644 --- a/configs/phycore_am62x_r5_defconfig +++ b/configs/phycore_am62x_r5_defconfig @@ -90,6 +90,7 @@ CONFIG_SPL_CLK_K3=y CONFIG_TI_SCI_PROTOCOL=y CONFIG_DA8XX_GPIO=y CONFIG_DM_I2C=y +CONFIG_SYS_I2C_OMAP24XX=y CONFIG_DM_MAILBOX=y CONFIG_K3_SEC_PROXY=y CONFIG_SPL_MISC=y @@ -130,4 +131,3 @@ CONFIG_SPL_TIMER=y CONFIG_OMAP_TIMER=y CONFIG_LIB_RATIONAL=y CONFIG_SPL_LIB_RATIONAL=y -CONFIG_SYS_I2C_OMAP24XX=y diff --git a/configs/px30-core-ctouch2-of10-px30_defconfig b/configs/px30-core-ctouch2-of10-px30_defconfig index fdcbd8a0fc0..3d44c018c99 100644 --- a/configs/px30-core-ctouch2-of10-px30_defconfig +++ b/configs/px30-core-ctouch2-of10-px30_defconfig @@ -30,8 +30,8 @@ CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set -# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set # CONFIG_TPL_BANNER_PRINT is not set +# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set diff --git a/configs/px30-core-ctouch2-px30_defconfig b/configs/px30-core-ctouch2-px30_defconfig index 343fd0bf516..7a655988a89 100644 --- a/configs/px30-core-ctouch2-px30_defconfig +++ b/configs/px30-core-ctouch2-px30_defconfig @@ -30,8 +30,8 @@ CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set -# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set # CONFIG_TPL_BANNER_PRINT is not set +# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set diff --git a/configs/px30-core-edimm2.2-px30_defconfig b/configs/px30-core-edimm2.2-px30_defconfig index aa0bff4667d..0c80f40dcfc 100644 --- a/configs/px30-core-edimm2.2-px30_defconfig +++ b/configs/px30-core-edimm2.2-px30_defconfig @@ -30,8 +30,8 @@ CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set -# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set # CONFIG_TPL_BANNER_PRINT is not set +# CONFIG_TPL_SYS_MALLOC_SIMPLE is not set # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set # CONFIG_CMD_IMI is not set diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig index c2f869391d7..30946b8f6b4 100644 --- a/configs/pxm2_defconfig +++ b/configs/pxm2_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x2000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="am335x-pxm50" diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig index 419e969e5d1..8852e83a52b 100644 --- a/configs/qcom_defconfig +++ b/configs/qcom_defconfig @@ -36,9 +36,9 @@ CONFIG_CMD_BMP=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_LOG=y CONFIG_OF_LIVE=y -CONFIG_BUTTON_QCOM_PMIC=y CONFIG_USE_DEFAULT_ENV_FILE=y CONFIG_DEFAULT_ENV_FILE="board/qualcomm/default.env" +CONFIG_BUTTON_QCOM_PMIC=y CONFIG_CLK=y CONFIG_CLK_QCOM_APQ8016=y CONFIG_CLK_QCOM_APQ8096=y diff --git a/configs/rut_defconfig b/configs/rut_defconfig index 7e78f1d6491..2bcbdd6b12a 100644 --- a/configs/rut_defconfig +++ b/configs/rut_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x2000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="am335x-rut" @@ -90,7 +88,7 @@ CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y CONFIG_DFU_NAND=y CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000 -CONFIG_SYS_I2C_LEGACY=y +CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y # CONFIG_SPL_DM_MMC is not set CONFIG_MMC_OMAP_HS=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index dc5fcdbd1c9..484f9e1bf8d 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -16,6 +16,7 @@ CONFIG_FIT_RSASSA_PSS=y CONFIG_FIT_CIPHER=y CONFIG_FIT_VERBOSE=y CONFIG_BOOTMETH_ANDROID=y +CONFIG_UPL=y CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_MEASURED_BOOT=y CONFIG_BOOTSTAGE=y diff --git a/configs/sandbox_vpl_defconfig b/configs/sandbox_vpl_defconfig index 72483d8ba10..96e9211bd19 100644 --- a/configs/sandbox_vpl_defconfig +++ b/configs/sandbox_vpl_defconfig @@ -27,6 +27,9 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y CONFIG_SPL_LOAD_FIT=y +CONFIG_UPL=y +CONFIG_UPL_IN=y +CONFIG_SPL_UPL_OUT=y CONFIG_BOOTSTAGE=y CONFIG_BOOTSTAGE_REPORT=y CONFIG_BOOTSTAGE_FDT=y @@ -35,6 +38,7 @@ CONFIG_BOOTSTAGE_STASH_SIZE=0x4096 CONFIG_CONSOLE_RECORD=y CONFIG_CONSOLE_RECORD_OUT_SIZE=0x1000 CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_BLOBLIST_SIZE=0x5000 CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_HANDOFF=y CONFIG_SPL_BOARD_INIT=y diff --git a/configs/sheep-rk3368_defconfig b/configs/sheep-rk3368_defconfig index a591b2741dd..00a7f79401d 100644 --- a/configs/sheep-rk3368_defconfig +++ b/configs/sheep-rk3368_defconfig @@ -8,7 +8,6 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_DEVICE_TREE="rk3368-sheep" CONFIG_ROCKCHIP_RK3368=y -CONFIG_TARGET_SHEEP=y CONFIG_DEBUG_UART_BASE=0xFF1b0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 diff --git a/configs/sniper_defconfig b/configs/sniper_defconfig index 0243b15f31c..06e9b2ae2fa 100644 --- a/configs/sniper_defconfig +++ b/configs/sniper_defconfig @@ -1,43 +1,33 @@ CONFIG_ARM=y -# CONFIG_SYS_THUMB_BUILD is not set CONFIG_ARCH_OMAP2PLUS=y -CONFIG_TEXT_BASE=0x80100000 -CONFIG_SYS_MALLOC_LEN=0x120000 -CONFIG_SYS_MALLOC_F_LEN=0x400 -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 -CONFIG_SPL_TEXT_BASE=0x40200000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_DEFAULT_DEVICE_TREE="ti/omap/omap3-sniper" CONFIG_TARGET_SNIPER=y -CONFIG_SPL_STACK=0x4020fffc -CONFIG_SPL_BSS_START_ADDR=0x80000000 +CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="setenv boot_mmc_part ${kernel_mmc_part}; if test reboot-${reboot-mode} = reboot-r; then echo recovery; setenv boot_mmc_part ${recovery_mmc_part}; fi; if test reboot-${reboot-mode} = reboot-b; then echo fastboot; fastboot 0; fi; part start mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_start; part size mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_size; mmc dev ${boot_mmc_dev}; mmc read ${kernel_addr_r} ${boot_mmc_start} ${boot_mmc_size} && bootm ${kernel_addr_r};" -CONFIG_SYS_CBSIZE=512 -CONFIG_SYS_PBSIZE=538 CONFIG_SYS_CONSOLE_IS_IN_ENV=y -CONFIG_SPL_MAX_SIZE=0xec00 -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SYS_MALLOC=y -CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y -CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80208000 +CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=2 # CONFIG_SPL_FS_EXT4 is not set # CONFIG_SPL_NAND_SUPPORT is not set -CONFIG_SYS_PROMPT="sniper # " CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y # CONFIG_CMD_SETEXPR is not set +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_UPSTREAM=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_SYS_I2C_LEGACY=y -CONFIG_SPL_SYS_I2C_LEGACY=y -CONFIG_SYS_I2C_SPEED=400000 +CONFIG_SPL_DM=y +CONFIG_DM_I2C=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_TWL4030_INPUT=y CONFIG_MMC_OMAP_HS=y -CONFIG_CONS_INDEX=3 -CONFIG_OF_LIBFDT=y diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig index 5f68a71bfbb..b8d9c849bcd 100644 --- a/configs/socfpga_secu1_defconfig +++ b/configs/socfpga_secu1_defconfig @@ -15,6 +15,7 @@ CONFIG_DM_RESET=y # CONFIG_SPL_MMC is not set CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK=0x0 +CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_TARGET_SOCFPGA_ARRIA5_SECU1=y CONFIG_ENV_OFFSET_REDUND=0x120000 # CONFIG_SPL_LIBDISK_SUPPORT is not set @@ -106,7 +107,6 @@ CONFIG_RTC_M41T62=y CONFIG_SPI=y CONFIG_SPI_MEM=y CONFIG_DESIGNWARE_SPI=y -CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_DESIGNWARE_WATCHDOG=y CONFIG_WDT=y CONFIG_SYS_TIMER_COUNTS_DOWN=y diff --git a/configs/synquacer_developerbox_defconfig b/configs/synquacer_developerbox_defconfig index 7e1aeac217c..a7b3d1912d3 100644 --- a/configs/synquacer_developerbox_defconfig +++ b/configs/synquacer_developerbox_defconfig @@ -14,7 +14,6 @@ CONFIG_TARGET_DEVELOPERBOX=y CONFIG_AHCI=y CONFIG_FIT=y CONFIG_SYS_BOOTM_LEN=0x800000 -CONFIG_BOOTSTAGE_STASH_SIZE=4096 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=128 CONFIG_CMD_FWU_METADATA=y @@ -93,7 +92,6 @@ CONFIG_FS_EXT4=y CONFIG_EFI_SET_TIME=y CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y CONFIG_EFI_CAPSULE_ON_DISK=y -CONFIG_EFI_IGNORE_OSINDICATIONS=y CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y CONFIG_FWU_MULTI_BANK_UPDATE=y CONFIG_FWU_MDATA_V2=y diff --git a/configs/verdin-am62_a53_defconfig b/configs/verdin-am62_a53_defconfig index 464d0bbb159..25f5f5e7ee5 100644 --- a/configs/verdin-am62_a53_defconfig +++ b/configs/verdin-am62_a53_defconfig @@ -74,7 +74,6 @@ CONFIG_CMD_MEMTEST=y CONFIG_CMD_BCB=y CONFIG_CMD_CLK=y CONFIG_CMD_DFU=y -CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y diff --git a/configs/vf610twr_defconfig b/configs/vf610twr_defconfig index af889ec903f..7713454136b 100644 --- a/configs/vf610twr_defconfig +++ b/configs/vf610twr_defconfig @@ -47,7 +47,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VYBRID_GPIO=y -CONFIG_SYS_I2C_LEGACY=y +CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y diff --git a/configs/vf610twr_nand_defconfig b/configs/vf610twr_nand_defconfig index c50afc4bec1..2cef8988638 100644 --- a/configs/vf610twr_nand_defconfig +++ b/configs/vf610twr_nand_defconfig @@ -48,7 +48,7 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_ENV_RANGE=0x80000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VYBRID_GPIO=y -CONFIG_SYS_I2C_LEGACY=y +CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig index c39597cdf52..e5c9c2861e1 100644 --- a/configs/vining_2000_defconfig +++ b/configs/vining_2000_defconfig @@ -70,7 +70,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="FEC" CONFIG_BOUNCE_BUFFER=y -CONFIG_SYS_I2C_LEGACY=y +CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MXC=y CONFIG_SUPPORT_EMMC_RPMB=y diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig index 1de61886b38..e7da0de5df1 100644 --- a/configs/work_92105_defconfig +++ b/configs/work_92105_defconfig @@ -12,7 +12,6 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007ff20 -CONFIG_TARGET_WORK_92105=y CONFIG_CMD_HD44760=y CONFIG_CMD_MAX6957=y CONFIG_ENV_SIZE=0x20000 @@ -48,7 +47,6 @@ CONFIG_CMD_NAND=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y -CONFIG_CMD_DATE=y CONFIG_DOS_PARTITION=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index 9be904fd301..b2a1f14eb34 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -155,4 +155,3 @@ CONFIG_SYS_TIMER_COUNTS_DOWN=y CONFIG_SPL_GZIP=y CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y -CONFIG_TOOLS_MKEFICAPSULE=y diff --git a/doc/I2C_Edge_Conditions b/doc/I2C_Edge_Conditions index f4a99687011..9ccb21c5092 100644 --- a/doc/I2C_Edge_Conditions +++ b/doc/I2C_Edge_Conditions @@ -31,12 +31,10 @@ Notes !!!THIS IS AN UNDOCUMENTED I2C BUS BUG, NOT A AMCC 4xx BUG!!! This reset edge condition could possibly be present in every I2C -controller and device available. For boards where a I2C bus reset -function can be implemented a i2c_init_board() function should be -provided and enabled by #define'ing CONFIG_SYS_I2C_INIT_BOARD in your -board's config file. Note that this is NOT necessary when using the -bit-banging I2C driver (common/soft_i2c.c) as this already includes -the I2C bus reset sequence. +controller and device available. + +Note that this problem does not happen when using the bit-banging I2C driver +(common/soft_i2c.c) as this already includes the I2C bus reset sequence. Many thanks to Bill Hunter for finding this serious BUG. diff --git a/doc/develop/release_cycle.rst b/doc/develop/release_cycle.rst index e3c13b93afd..776af601e20 100644 --- a/doc/develop/release_cycle.rst +++ b/doc/develop/release_cycle.rst @@ -55,7 +55,7 @@ Current Status * The Merge Window for the next release (v2024.10) is **closed**. -* The next branch is now **closed**. +* The next branch is now **open**. * Release "v2024.10" is scheduled for 07 October 2024. @@ -69,7 +69,7 @@ For the next scheduled release, release candidates were made on:: * U-Boot v2024.10-rc1 was released on Mon 22 July 2024. -.. * U-Boot v2024.10-rc2 was released on Mon 05 August 2024. +* U-Boot v2024.10-rc2 was released on Mon 05 August 2024. .. * U-Boot v2024.10-rc3 was released on Mon 19 August 2024. diff --git a/doc/device-tree-bindings/spi/soft-spi.txt b/doc/device-tree-bindings/spi/soft-spi.txt index bdf7e86befb..77b01b2fd9a 100644 --- a/doc/device-tree-bindings/spi/soft-spi.txt +++ b/doc/device-tree-bindings/spi/soft-spi.txt @@ -8,14 +8,15 @@ The soft SPI node requires the following properties: Mandatory properties: compatible: "spi-gpio" -cs-gpios: GPIOs to use for SPI chip select (output) +cs-gpios: GPIOs to use for SPI chip select (output), not required if num-chipselects = <0> sck-gpios: GPIO to use for SPI clock (output) And at least one of: mosi-gpios: GPIO to use for SPI MOSI line (output) miso-gpios: GPIO to use for SPI MISO line (input) -Optional propertie: +Optional properties: spi-delay-us: Number of microseconds of delay between each CS transition +num-chipselects: Number of chipselect lines The GPIOs should be specified as required by the GPIO controller referenced. The first cell holds the phandle of the controller and the second cell diff --git a/doc/mkeficapsule.1 b/doc/mkeficapsule.1 index c4c2057d5c7..c3d0f21488a 100644 --- a/doc/mkeficapsule.1 +++ b/doc/mkeficapsule.1 @@ -88,6 +88,10 @@ Generate a firmware revert empty capsule Capsule OEM flag, value between 0x0000 to 0xffff .TP +.BR -V ", " --version +Print version information and exit. + +.TP .BR -h ", " --help Print a help message diff --git a/doc/usage/cmd/env.rst b/doc/usage/cmd/env.rst index 9629f97ffc4..b65d85b6681 100644 --- a/doc/usage/cmd/env.rst +++ b/doc/usage/cmd/env.rst @@ -79,7 +79,8 @@ The *env default* command resets the selected variables in the U-Boot environment to their default values. var - list of variable name. + list of variable names. If variable is not part of default + environment, it is deleted with a warning message on console. \-a all U-Boot environment. \-f @@ -309,6 +310,7 @@ Delete environment variable in memory:: Reset environment variable to default value, in memory:: => env default bootcmd + => env default ipaddr serverip => env default -a Save current environment in persistent storage:: diff --git a/doc/usage/cmd/upl.rst b/doc/usage/cmd/upl.rst new file mode 100644 index 00000000000..8d6ea5daa37 --- /dev/null +++ b/doc/usage/cmd/upl.rst @@ -0,0 +1,186 @@ +.. SPDX-License-Identifier: GPL-2.0+: + +upl command +=========== + +Synopsis +-------- + +:: + + upl write + upl read <addr> + upl info [-v] + +Description +----------- + +The *upl* command is used to test U-Boot's support for the Universal Payload +Specification (UPL) firmware standard (see :doc:`../upl`). It allows creation of +a fake handoff for use in testing. + + +upl write +~~~~~~~~~ + +Write a fake UPL handoff structure. The `upladdr` environment variable is set to +the address of this structure and `uplsize` is set to the size. + + +upl read +~~~~~~~~ + +Read a UPL handoff structure into internal state. This allows testing that the +handoff can be obtained. + +upl info +~~~~~~~~ + +Show basic information about usage of UPL: + + UPL state + active or inactive (indicates whether U-Boot booted from UPL or not) + + fit + Address of the FIT which was loaded + + conf_offset 2a4 + FIT offset of the chosen configuration + +For each image the following information is shown: + + Image number + Images are numbered from 0 + + load + Address to which the image was loaded + + size + Size of the loaded image + + offset + FIT offset of the image + + description + Description of the image + + +Example +------- + +This shows checking whether a UPL handoff was read at start-up:: + + => upl info + UPL state: active + +This shows how to use the command to write and display the handoff:: + + => upl write + UPL handoff written to bc8a5e0 size 662 + => print upladdr + upladdr=bc8a5e0 + => print uplsize + uplsize=662 + + > fdt addr ${upladdr} + Working FDT set to bc8a5e0 + => fdt print + / { + #address-cells = <0x00000001>; + #size-cells = <0x00000001>; + options { + upl-params { + smbios = <0x00000123>; + acpi = <0x00000456>; + bootmode = "default", "s3"; + addr-width = <0x0000002e>; + acpi-nvs-size = <0x00000100>; + }; + upl-image { + fit = <0x00000789>; + conf-offset = <0x00000234>; + image-1 { + load = <0x00000001>; + size = <0x00000002>; + offset = <0x00000003>; + description = "U-Boot"; + }; + image-2 { + load = <0x00000004>; + size = <0x00000005>; + offset = <0x00000006>; + description = "ATF"; + }; + }; + }; + memory@0x10 { + reg = <0x00000010 0x00000020 0x00000030 0x00000040 0x00000050 0x00000060>; + }; + memory@0x70 { + reg = <0x00000070 0x00000080>; + hotpluggable; + }; + memory-map { + acpi@0x11 { + reg = <0x00000011 0x00000012 0x00000013 0x00000014 0x00000015 0x00000016 0x00000017 0x00000018 0x00000019 0x0000001a>; + usage = "acpi-reclaim"; + }; + u-boot@0x21 { + reg = <0x00000021 0x00000022>; + usage = "boot-data"; + }; + efi@0x23 { + reg = <0x00000023 0x00000024>; + usage = "runtime-code"; + }; + empty@0x25 { + reg = <0x00000025 0x00000026 0x00000027 0x00000028>; + }; + acpi-things@0x2a { + reg = <0x0000002a 0x00000000>; + usage = "acpi-nvs", "runtime-code"; + }; + }; + reserved-memory { + mmio@0x2b { + reg = <0x0000002b 0x0000002c>; + }; + memory@0x2d { + reg = <0x0000002d 0x0000002e 0x0000002f 0x00000030>; + no-map; + }; + }; + serial@0xf1de0000 { + compatible = "ns16550a"; + clock-frequency = <0x001c2000>; + current-speed = <0x0001c200>; + reg = <0xf1de0000 0x00000100>; + reg-io-shift = <0x00000002>; + reg-offset = <0x00000040>; + virtual-reg = <0x20000000>; + access-type = "mmio"; + }; + framebuffer@0xd0000000 { + compatible = "simple-framebuffer"; + reg = <0xd0000000 0x10000000>; + width = <0x00000500>; + height = <0x00000500>; + stride = <0x00001400>; + format = "a8r8g8b8"; + }; + }; + => + +This showing reading the handoff into internal state:: + + => upl read bc8a5e0 + Reading UPL at bc8a5e0 + => + +This shows getting basic information about UPL: + + => upl info -v + UPL state: active + fit 1264000 + conf_offset 2a4 + image 0: load 200000 size 105f5c8 offset a4: U-Boot 2024.07-00770-g739ee12e8358 for sandbox board diff --git a/doc/usage/index.rst b/doc/usage/index.rst index 1f6518b77c4..b058c2254fb 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -15,6 +15,7 @@ Use U-Boot cmdline semihosting measured_boot + upl Shell commands -------------- @@ -114,6 +115,7 @@ Shell commands cmd/tftpput cmd/trace cmd/true + cmd/upl cmd/ums cmd/unbind cmd/ut diff --git a/doc/usage/upl.rst b/doc/usage/upl.rst new file mode 100644 index 00000000000..3c4a10c862c --- /dev/null +++ b/doc/usage/upl.rst @@ -0,0 +1,46 @@ +.. SPDX-License-Identifier: GPL-2.0-or-later + +Universal Payload +----------------- + +`Universal Payload (UPL) <https://universalpayload.github.io/spec/index.html>`_ +is an Industry Standard for firmware components. UPL +is designed to improve interoperability within the firmware industry, allowing +mixing and matching of projects with less friction and fewer project-specific +implementations. UPL is cross-platform, supporting ARM, x86 and RISC-V +initially. + +UPL is defined in termns of two firmware components: + +`Platform Init` + Perhaps initial setup of the hardware and jumps to the payload. + +`Payload` + Selects the OS to boot + +In practice UPL can be used to handle any number of handoffs through the +firmware startup process, with one program acting as platform init and another +acting as the payload. + +UPL provides a standard for three main pieces: + +- file format for the payload, which may comprise multiple images to load +- handoff format for the information the payload needs, such as serial port, + memory layout, etc. +- machine state and register settings at the point of handoff + +See also the :doc:`cmd/upl`. + +UPL in U-Boot +~~~~~~~~~~~~~ + +U-Boot supports: + +- writing a UPL handoff (devicetree) in SPL +- reading a UPL handoff in U-Boot proper +- creating a FIT + +There are some new FIT features in UPL which are not yet supported in U-Boot. + +.. sectionauthor:: Simon Glass <sjg@chromium.org> +.. July 2024 diff --git a/drivers/block/sandbox.c b/drivers/block/sandbox.c index ec34f1ad8c2..6c74d66037e 100644 --- a/drivers/block/sandbox.c +++ b/drivers/block/sandbox.c @@ -25,7 +25,7 @@ static unsigned long host_block_read(struct udevice *dev, struct udevice *host_dev = dev_get_parent(dev); struct host_sb_plat *plat = dev_get_plat(host_dev); - if (os_lseek(plat->fd, start * desc->blksz, OS_SEEK_SET) == -1) { + if (os_lseek(plat->fd, start * desc->blksz, OS_SEEK_SET) < 0) { printf("ERROR: Invalid block %lx\n", start); return -1; } @@ -44,7 +44,7 @@ static unsigned long host_block_write(struct udevice *dev, struct udevice *host_dev = dev_get_parent(dev); struct host_sb_plat *plat = dev_get_plat(host_dev); - if (os_lseek(plat->fd, start * desc->blksz, OS_SEEK_SET) == -1) { + if (os_lseek(plat->fd, start * desc->blksz, OS_SEEK_SET) < 0) { printf("ERROR: Invalid block %lx\n", start); return -1; } diff --git a/drivers/clk/mediatek/clk-mt7623.c b/drivers/clk/mediatek/clk-mt7623.c index 5072c9983c1..d0b80f48b0a 100644 --- a/drivers/clk/mediatek/clk-mt7623.c +++ b/drivers/clk/mediatek/clk-mt7623.c @@ -25,6 +25,22 @@ #define AXI_DIV_SEL(x) (x) /* apmixedsys */ +static const int pll_id_offs_map[] = { + [CLK_APMIXED_ARMPLL] = 0, + [CLK_APMIXED_MAINPLL] = 1, + [CLK_APMIXED_UNIVPLL] = 2, + [CLK_APMIXED_MMPLL] = 3, + [CLK_APMIXED_MSDCPLL] = 4, + [CLK_APMIXED_TVDPLL] = 5, + [CLK_APMIXED_AUD1PLL] = 6, + [CLK_APMIXED_TRGPLL] = 7, + [CLK_APMIXED_ETHPLL] = 8, + [CLK_APMIXED_VDECPLL] = 9, + [CLK_APMIXED_HADDS2PLL] = 10, + [CLK_APMIXED_AUD2PLL] = 11, + [CLK_APMIXED_TVD2PLL] = 12, +}; + #define PLL(_id, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ _pd_shift, _pcw_reg, _pcw_shift) { \ .id = _id, \ @@ -71,6 +87,176 @@ static const struct mtk_pll_data apmixed_plls[] = { }; /* topckgen */ + +/* Fixed CLK exposed upstream by the hdmi PHY driver */ +#define CLK_TOP_HDMITX_CLKDIG_CTS CLK_TOP_NR + +static const int top_id_offs_map[CLK_TOP_NR + 1] = { + /* Fixed CLK */ + [CLK_TOP_DPI] = 0, + [CLK_TOP_DMPLL] = 1, + [CLK_TOP_VENCPLL] = 2, + [CLK_TOP_HDMI_0_PIX340M] = 3, + [CLK_TOP_HDMI_0_DEEP340M] = 4, + [CLK_TOP_HDMI_0_PLL340M] = 5, + [CLK_TOP_HADDS2_FB] = 6, + [CLK_TOP_WBG_DIG_416M] = 7, + [CLK_TOP_DSI0_LNTC_DSI] = 8, + [CLK_TOP_HDMI_SCL_RX] = 9, + [CLK_TOP_32K_EXTERNAL] = 10, + [CLK_TOP_HDMITX_CLKDIG_CTS] = 11, + [CLK_TOP_AUD_EXT1] = 12, + [CLK_TOP_AUD_EXT2] = 13, + [CLK_TOP_NFI1X_PAD] = 14, + /* Factor CLK */ + [CLK_TOP_SYSPLL] = 15, + [CLK_TOP_SYSPLL_D2] = 16, + [CLK_TOP_SYSPLL_D3] = 17, + [CLK_TOP_SYSPLL_D5] = 18, + [CLK_TOP_SYSPLL_D7] = 19, + [CLK_TOP_SYSPLL1_D2] = 20, + [CLK_TOP_SYSPLL1_D4] = 21, + [CLK_TOP_SYSPLL1_D8] = 22, + [CLK_TOP_SYSPLL1_D16] = 23, + [CLK_TOP_SYSPLL2_D2] = 24, + [CLK_TOP_SYSPLL2_D4] = 25, + [CLK_TOP_SYSPLL2_D8] = 26, + [CLK_TOP_SYSPLL3_D2] = 27, + [CLK_TOP_SYSPLL3_D4] = 28, + [CLK_TOP_SYSPLL4_D2] = 29, + [CLK_TOP_SYSPLL4_D4] = 30, + [CLK_TOP_UNIVPLL] = 31, + [CLK_TOP_UNIVPLL_D2] = 32, + [CLK_TOP_UNIVPLL_D3] = 33, + [CLK_TOP_UNIVPLL_D5] = 34, + [CLK_TOP_UNIVPLL_D7] = 35, + [CLK_TOP_UNIVPLL_D26] = 36, + [CLK_TOP_UNIVPLL_D52] = 37, + [CLK_TOP_UNIVPLL_D108] = 38, + [CLK_TOP_USB_PHY48M] = 39, + [CLK_TOP_UNIVPLL1_D2] = 40, + [CLK_TOP_UNIVPLL1_D4] = 41, + [CLK_TOP_UNIVPLL1_D8] = 42, + [CLK_TOP_UNIVPLL2_D2] = 43, + [CLK_TOP_UNIVPLL2_D4] = 44, + [CLK_TOP_UNIVPLL2_D8] = 45, + [CLK_TOP_UNIVPLL2_D16] = 46, + [CLK_TOP_UNIVPLL2_D32] = 47, + [CLK_TOP_UNIVPLL3_D2] = 48, + [CLK_TOP_UNIVPLL3_D4] = 49, + [CLK_TOP_UNIVPLL3_D8] = 50, + [CLK_TOP_MSDCPLL] = 51, + [CLK_TOP_MSDCPLL_D2] = 52, + [CLK_TOP_MSDCPLL_D4] = 53, + [CLK_TOP_MSDCPLL_D8] = 54, + [CLK_TOP_MMPLL] = 55, + [CLK_TOP_MMPLL_D2] = 56, + [CLK_TOP_DMPLL_D2] = 57, + [CLK_TOP_DMPLL_D4] = 58, + [CLK_TOP_DMPLL_X2] = 59, + [CLK_TOP_TVDPLL] = 60, + [CLK_TOP_TVDPLL_D2] = 61, + [CLK_TOP_TVDPLL_D4] = 62, + [CLK_TOP_VDECPLL] = 63, + [CLK_TOP_TVD2PLL] = 64, + [CLK_TOP_TVD2PLL_D2] = 65, + [CLK_TOP_MIPIPLL] = 66, + [CLK_TOP_MIPIPLL_D2] = 67, + [CLK_TOP_MIPIPLL_D4] = 68, + [CLK_TOP_HDMIPLL] = 69, + [CLK_TOP_HDMIPLL_D2] = 70, + [CLK_TOP_HDMIPLL_D3] = 71, + [CLK_TOP_ARMPLL_1P3G] = 72, + [CLK_TOP_AUDPLL] = 73, + [CLK_TOP_AUDPLL_D4] = 74, + [CLK_TOP_AUDPLL_D8] = 75, + [CLK_TOP_AUDPLL_D16] = 76, + [CLK_TOP_AUDPLL_D24] = 77, + [CLK_TOP_AUD1PLL_98M] = 78, + [CLK_TOP_AUD2PLL_90M] = 79, + [CLK_TOP_HADDS2PLL_98M] = 80, + [CLK_TOP_HADDS2PLL_294M] = 81, + [CLK_TOP_ETHPLL_500M] = 82, + [CLK_TOP_CLK26M_D8] = 83, + [CLK_TOP_32K_INTERNAL] = 84, + [CLK_TOP_AXISEL_D4] = 85, + [CLK_TOP_8BDAC] = 86, + /* MUX CLK */ + [CLK_TOP_AXI_SEL] = 87, + [CLK_TOP_MEM_SEL] = 88, + [CLK_TOP_DDRPHYCFG_SEL] = 89, + [CLK_TOP_MM_SEL] = 90, + [CLK_TOP_PWM_SEL] = 91, + [CLK_TOP_VDEC_SEL] = 92, + [CLK_TOP_MFG_SEL] = 93, + [CLK_TOP_CAMTG_SEL] = 94, + [CLK_TOP_UART_SEL] = 95, + [CLK_TOP_SPI0_SEL] = 96, + [CLK_TOP_USB20_SEL] = 97, + [CLK_TOP_MSDC30_0_SEL] = 98, + [CLK_TOP_MSDC30_1_SEL] = 99, + [CLK_TOP_MSDC30_2_SEL] = 100, + [CLK_TOP_AUDIO_SEL] = 101, + [CLK_TOP_AUDINTBUS_SEL] = 102, + [CLK_TOP_PMICSPI_SEL] = 103, + [CLK_TOP_SCP_SEL] = 104, + [CLK_TOP_DPI0_SEL] = 105, + [CLK_TOP_DPI1_SEL] = 106, + [CLK_TOP_TVE_SEL] = 107, + [CLK_TOP_HDMI_SEL] = 108, + [CLK_TOP_APLL_SEL] = 109, + [CLK_TOP_RTC_SEL] = 110, + [CLK_TOP_NFI2X_SEL] = 111, + [CLK_TOP_EMMC_HCLK_SEL] = 112, + [CLK_TOP_FLASH_SEL] = 113, + [CLK_TOP_DI_SEL] = 114, + [CLK_TOP_NR_SEL] = 115, + [CLK_TOP_OSD_SEL] = 116, + [CLK_TOP_HDMIRX_BIST_SEL] = 117, + [CLK_TOP_INTDIR_SEL] = 118, + [CLK_TOP_ASM_I_SEL] = 119, + [CLK_TOP_ASM_M_SEL] = 120, + [CLK_TOP_ASM_H_SEL] = 121, + [CLK_TOP_MS_CARD_SEL] = 122, + [CLK_TOP_ETHIF_SEL] = 123, + [CLK_TOP_HDMIRX26_24_SEL] = 124, + [CLK_TOP_MSDC30_3_SEL] = 125, + [CLK_TOP_CMSYS_SEL] = 126, + [CLK_TOP_SPI1_SEL] = 127, + [CLK_TOP_SPI2_SEL] = 128, + [CLK_TOP_8BDAC_SEL] = 129, + [CLK_TOP_AUD2DVD_SEL] = 130, + [CLK_TOP_PADMCLK_SEL] = 131, + [CLK_TOP_AUD_MUX1_SEL] = 132, + [CLK_TOP_AUD_MUX2_SEL] = 133, + [CLK_TOP_AUDPLL_MUX_SEL] = 134, + [CLK_TOP_AUD_K1_SRC_SEL] = 135, + [CLK_TOP_AUD_K2_SRC_SEL] = 136, + [CLK_TOP_AUD_K3_SRC_SEL] = 137, + [CLK_TOP_AUD_K4_SRC_SEL] = 138, + [CLK_TOP_AUD_K5_SRC_SEL] = 139, + [CLK_TOP_AUD_K6_SRC_SEL] = 140, + /* Misc CLK only used as parents */ + [CLK_TOP_AUD_EXTCK1_DIV] = 141, + [CLK_TOP_AUD_EXTCK2_DIV] = 142, + [CLK_TOP_AUD_MUX1_DIV] = 143, + [CLK_TOP_AUD_MUX2_DIV] = 144, + [CLK_TOP_AUD_K1_SRC_DIV] = 145, + [CLK_TOP_AUD_K2_SRC_DIV] = 146, + [CLK_TOP_AUD_K3_SRC_DIV] = 147, + [CLK_TOP_AUD_K4_SRC_DIV] = 148, + [CLK_TOP_AUD_K5_SRC_DIV] = 149, + [CLK_TOP_AUD_K6_SRC_DIV] = 150, + [CLK_TOP_AUD_48K_TIMING] = 151, + [CLK_TOP_AUD_44K_TIMING] = 152, + [CLK_TOP_AUD_I2S1_MCLK] = 153, + [CLK_TOP_AUD_I2S2_MCLK] = 154, + [CLK_TOP_AUD_I2S3_MCLK] = 155, + [CLK_TOP_AUD_I2S4_MCLK] = 156, + [CLK_TOP_AUD_I2S5_MCLK] = 157, + [CLK_TOP_AUD_I2S6_MCLK] = 158, +}; + #define FACTOR0(_id, _parent, _mult, _div) \ FACTOR(_id, _parent, _mult, _div, CLK_PARENT_APMIXED) @@ -586,21 +772,26 @@ static const struct mtk_gate_regs infra_cg_regs = { .sta_ofs = 0x48, }; -#define GATE_INFRA(_id, _parent, _shift) { \ +#define GATE_INFRA_FLAGS(_id, _parent, _shift, _flags) { \ .id = _id, \ .parent = _parent, \ .regs = &infra_cg_regs, \ .shift = _shift, \ - .flags = CLK_GATE_SETCLR | CLK_PARENT_TOPCKGEN, \ + .flags = _flags, \ } +#define GATE_INFRA(_id, _parent, _shift) \ + GATE_INFRA_FLAGS(_id, _parent, _shift, CLK_GATE_SETCLR | CLK_PARENT_TOPCKGEN) +#define GATE_INFRA_XTAL(_id, _parent, _shift) \ + GATE_INFRA_FLAGS(_id, _parent, _shift, CLK_GATE_SETCLR | CLK_PARENT_XTAL) + static const struct mtk_gate infra_cgs[] = { GATE_INFRA(CLK_INFRA_DBG, CLK_TOP_AXI_SEL, 0), GATE_INFRA(CLK_INFRA_SMI, CLK_TOP_MM_SEL, 1), GATE_INFRA(CLK_INFRA_QAXI_CM4, CLK_TOP_AXI_SEL, 2), GATE_INFRA(CLK_INFRA_AUD_SPLIN_B, CLK_TOP_HADDS2PLL_294M, 4), - GATE_INFRA(CLK_INFRA_AUDIO, CLK_XTAL, 5), - GATE_INFRA(CLK_INFRA_EFUSE, CLK_XTAL, 6), + GATE_INFRA_XTAL(CLK_INFRA_AUDIO, CLK_XTAL, 5), + GATE_INFRA_XTAL(CLK_INFRA_EFUSE, CLK_XTAL, 6), GATE_INFRA(CLK_INFRA_L2C_SRAM, CLK_TOP_MM_SEL, 7), GATE_INFRA(CLK_INFRA_M4U, CLK_TOP_MEM_SEL, 8), GATE_INFRA(CLK_INFRA_CONNMCU, CLK_TOP_WBG_DIG_416M, 12), @@ -616,6 +807,74 @@ static const struct mtk_gate infra_cgs[] = { }; /* pericfg */ +static const int peri_id_offs_map[] = { + /* MUX CLK */ + [CLK_PERI_UART0_SEL] = 1, + [CLK_PERI_UART1_SEL] = 2, + [CLK_PERI_UART2_SEL] = 3, + [CLK_PERI_UART3_SEL] = 4, + /* GATE CLK */ + [CLK_PERI_NFI] = 5, + [CLK_PERI_THERM] = 6, + [CLK_PERI_PWM1] = 7, + [CLK_PERI_PWM2] = 8, + [CLK_PERI_PWM3] = 9, + [CLK_PERI_PWM4] = 10, + [CLK_PERI_PWM5] = 11, + [CLK_PERI_PWM6] = 12, + [CLK_PERI_PWM7] = 13, + [CLK_PERI_PWM] = 14, + [CLK_PERI_USB0] = 15, + [CLK_PERI_USB1] = 16, + [CLK_PERI_AP_DMA] = 17, + [CLK_PERI_MSDC30_0] = 18, + [CLK_PERI_MSDC30_1] = 19, + [CLK_PERI_MSDC30_2] = 20, + [CLK_PERI_MSDC30_3] = 21, + [CLK_PERI_MSDC50_3] = 22, + [CLK_PERI_NLI] = 23, + [CLK_PERI_UART0] = 24, + [CLK_PERI_UART1] = 25, + [CLK_PERI_UART2] = 26, + [CLK_PERI_UART3] = 27, + [CLK_PERI_BTIF] = 28, + [CLK_PERI_I2C0] = 29, + [CLK_PERI_I2C1] = 30, + [CLK_PERI_I2C2] = 31, + [CLK_PERI_I2C3] = 32, + [CLK_PERI_AUXADC] = 33, + [CLK_PERI_SPI0] = 34, + [CLK_PERI_ETH] = 35, + [CLK_PERI_USB0_MCU] = 36, + [CLK_PERI_USB1_MCU] = 37, + [CLK_PERI_USB_SLV] = 38, + [CLK_PERI_GCPU] = 39, + [CLK_PERI_NFI_ECC] = 40, + [CLK_PERI_NFI_PAD] = 41, + [CLK_PERI_FLASH] = 42, + [CLK_PERI_HOST89_INT] = 43, + [CLK_PERI_HOST89_SPI] = 44, + [CLK_PERI_HOST89_DVD] = 45, + [CLK_PERI_SPI1] = 46, + [CLK_PERI_SPI2] = 47, + [CLK_PERI_FCI] = 48, +}; + +#define TOP_PARENT(_id) PARENT(_id, CLK_PARENT_TOPCKGEN) +#define XTAL_PARENT(_id) PARENT(_id, CLK_PARENT_XTAL) + +static const struct mtk_parent uart_ck_sel_parents[] = { + XTAL_PARENT(CLK_XTAL), + TOP_PARENT(CLK_TOP_UART_SEL), +}; + +static const struct mtk_composite peri_muxes[] = { + MUX_MIXED(CLK_PERI_UART0_SEL, uart_ck_sel_parents, 0x40C, 0, 1), + MUX_MIXED(CLK_PERI_UART1_SEL, uart_ck_sel_parents, 0x40C, 1, 1), + MUX_MIXED(CLK_PERI_UART2_SEL, uart_ck_sel_parents, 0x40C, 2, 1), + MUX_MIXED(CLK_PERI_UART3_SEL, uart_ck_sel_parents, 0x40C, 3, 1), +}; + static const struct mtk_gate_regs peri0_cg_regs = { .set_ofs = 0x8, .clr_ofs = 0x10, @@ -628,13 +887,17 @@ static const struct mtk_gate_regs peri1_cg_regs = { .sta_ofs = 0x1C, }; -#define GATE_PERI0(_id, _parent, _shift) { \ +#define GATE_PERI0_FLAGS(_id, _parent, _shift, _flags) { \ .id = _id, \ .parent = _parent, \ .regs = &peri0_cg_regs, \ .shift = _shift, \ - .flags = CLK_GATE_SETCLR | CLK_PARENT_TOPCKGEN, \ + .flags = _flags, \ } +#define GATE_PERI0(_id, _parent, _shift) \ + GATE_PERI0_FLAGS(_id, _parent, _shift, CLK_GATE_SETCLR | CLK_PARENT_TOPCKGEN) +#define GATE_PERI0_XTAL(_id, _parent, _shift) \ + GATE_PERI0_FLAGS(_id, _parent, _shift, CLK_GATE_SETCLR | CLK_PARENT_XTAL) #define GATE_PERI1(_id, _parent, _shift) { \ .id = _id, \ @@ -672,10 +935,10 @@ static const struct mtk_gate peri_cgs[] = { GATE_PERI0(CLK_PERI_I2C0, CLK_TOP_AXI_SEL, 24), GATE_PERI0(CLK_PERI_I2C1, CLK_TOP_AXI_SEL, 25), GATE_PERI0(CLK_PERI_I2C2, CLK_TOP_AXI_SEL, 26), - GATE_PERI0(CLK_PERI_I2C3, CLK_XTAL, 27), - GATE_PERI0(CLK_PERI_AUXADC, CLK_XTAL, 28), + GATE_PERI0_XTAL(CLK_PERI_I2C3, CLK_XTAL, 27), + GATE_PERI0_XTAL(CLK_PERI_AUXADC, CLK_XTAL, 28), GATE_PERI0(CLK_PERI_SPI0, CLK_TOP_SPI0_SEL, 29), - GATE_PERI0(CLK_PERI_ETH, CLK_XTAL, 30), + GATE_PERI0_XTAL(CLK_PERI_ETH, CLK_XTAL, 30), GATE_PERI0(CLK_PERI_USB0_MCU, CLK_TOP_AXI_SEL, 31), GATE_PERI1(CLK_PERI_USB1_MCU, CLK_TOP_AXI_SEL, 0), @@ -730,12 +993,17 @@ static const struct mtk_gate hif_cgs[] = { GATE_ETH_HIF1(CLK_HIFSYS_PCIE2, CLK_TOP_ETHPLL_500M, 26), }; -static const struct mtk_clk_tree mt7623_clk_tree = { - .xtal_rate = 26 * MHZ, +static const struct mtk_clk_tree mt7623_apmixedsys_clk_tree = { .xtal2_rate = 26 * MHZ, - .fdivs_offs = CLK_TOP_SYSPLL, - .muxes_offs = CLK_TOP_AXI_SEL, + .id_offs_map = pll_id_offs_map, .plls = apmixed_plls, +}; + +static const struct mtk_clk_tree mt7623_topckgen_clk_tree = { + .xtal_rate = 26 * MHZ, + .id_offs_map = top_id_offs_map, + .fdivs_offs = top_id_offs_map[CLK_TOP_SYSPLL], + .muxes_offs = top_id_offs_map[CLK_TOP_AXI_SEL], .fclks = top_fixed_clks, .fdivs = top_fixed_divs, .muxes = top_muxes, @@ -760,7 +1028,7 @@ static int mt7623_apmixedsys_probe(struct udevice *dev) struct mtk_clk_priv *priv = dev_get_priv(dev); int ret; - ret = mtk_common_clk_init(dev, &mt7623_clk_tree); + ret = mtk_common_clk_init(dev, &mt7623_apmixedsys_clk_tree); if (ret) return ret; @@ -774,27 +1042,45 @@ static int mt7623_apmixedsys_probe(struct udevice *dev) static int mt7623_topckgen_probe(struct udevice *dev) { - return mtk_common_clk_init(dev, &mt7623_clk_tree); + return mtk_common_clk_init(dev, &mt7623_topckgen_clk_tree); } +static const struct mtk_clk_tree mt7623_clk_gate_tree = { + /* Each CLK ID for gates clock starts at index 1 */ + .gates_offs = 1, + .xtal_rate = 26 * MHZ, +}; + static int mt7623_infracfg_probe(struct udevice *dev) { - return mtk_common_clk_gate_init(dev, &mt7623_clk_tree, infra_cgs); + return mtk_common_clk_gate_init(dev, &mt7623_clk_gate_tree, + infra_cgs); } +static const struct mtk_clk_tree mt7623_clk_peri_tree = { + .id_offs_map = peri_id_offs_map, + .muxes_offs = peri_id_offs_map[CLK_PERI_UART0_SEL], + .gates_offs = peri_id_offs_map[CLK_PERI_NFI], + .muxes = peri_muxes, + .gates = peri_cgs, + .xtal_rate = 26 * MHZ, +}; + static int mt7623_pericfg_probe(struct udevice *dev) { - return mtk_common_clk_gate_init(dev, &mt7623_clk_tree, peri_cgs); + return mtk_common_clk_infrasys_init(dev, &mt7623_clk_peri_tree); } static int mt7623_hifsys_probe(struct udevice *dev) { - return mtk_common_clk_gate_init(dev, &mt7623_clk_tree, hif_cgs); + return mtk_common_clk_gate_init(dev, &mt7623_clk_gate_tree, + hif_cgs); } static int mt7623_ethsys_probe(struct udevice *dev) { - return mtk_common_clk_gate_init(dev, &mt7623_clk_tree, eth_cgs); + return mtk_common_clk_gate_init(dev, &mt7623_clk_gate_tree, + eth_cgs); } static int mt7623_ethsys_hifsys_bind(struct udevice *dev) @@ -889,7 +1175,7 @@ U_BOOT_DRIVER(mtk_clk_pericfg) = { .of_match = mt7623_pericfg_compat, .probe = mt7623_pericfg_probe, .priv_auto = sizeof(struct mtk_cg_priv), - .ops = &mtk_clk_gate_ops, + .ops = &mtk_clk_infrasys_ops, .flags = DM_FLAG_PRE_RELOC, }; diff --git a/drivers/ddr/fsl/main.c b/drivers/ddr/fsl/main.c index 31091bb4495..888dfb7ff33 100644 --- a/drivers/ddr/fsl/main.c +++ b/drivers/ddr/fsl/main.c @@ -111,7 +111,7 @@ static int ddr_i2c_read(DEV_TYPE *dev, unsigned int addr, #if CONFIG_IS_ENABLED(DM_I2C) ret = dm_i2c_read(dev, 0, buf, len); #else - ret = i2c_read(dev->chip, addr, alen, buf, len); + ret = 0; #endif return ret; @@ -162,7 +162,6 @@ static void __get_spd(generic_spd_eeprom_t *spd, u8 i2c_address) }; dev = &ldev; - i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM); #endif #ifdef CONFIG_SYS_FSL_DDR4 diff --git a/drivers/i2c/i2c_core.c b/drivers/i2c/i2c_core.c index 7c43a5546d3..cccd45027db 100644 --- a/drivers/i2c/i2c_core.c +++ b/drivers/i2c/i2c_core.c @@ -33,137 +33,8 @@ struct i2c_adapter *i2c_get_adapter(int index) return i2c_adap_p; } -#if !defined(CFG_SYS_I2C_DIRECT_BUS) -struct i2c_bus_hose i2c_bus[CFG_SYS_NUM_I2C_BUSES] = - CFG_SYS_I2C_BUSES; -#endif - DECLARE_GLOBAL_DATA_PTR; -#ifndef CFG_SYS_I2C_DIRECT_BUS -/* - * i2c_mux_set() - * ------------- - * - * This turns on the given channel on I2C multiplexer chip connected to - * a given I2C adapter directly or via other multiplexers. In the latter - * case the entire multiplexer chain must be initialized first starting - * with the one connected directly to the adapter. When disabling a chain - * muxes must be programmed in reverse order, starting with the one - * farthest from the adapter. - * - * mux_id is the multiplexer chip type from defined in i2c.h. So far only - * NXP (Philips) PCA954x multiplexers are supported. Switches are NOT - * supported (anybody uses them?) - */ - -static int i2c_mux_set(struct i2c_adapter *adap, int mux_id, int chip, - int channel) -{ - uint8_t buf; - int ret; - - /* channel < 0 - turn off the mux */ - if (channel < 0) { - buf = 0; - ret = adap->write(adap, chip, 0, 0, &buf, 1); - if (ret) - printf("%s: Could not turn off the mux.\n", __func__); - return ret; - } - - switch (mux_id) { - case I2C_MUX_PCA9540_ID: - case I2C_MUX_PCA9542_ID: - if (channel > 1) - return -1; - buf = (uint8_t)((channel & 0x01) | (1 << 2)); - break; - case I2C_MUX_PCA9544_ID: - if (channel > 3) - return -1; - buf = (uint8_t)((channel & 0x03) | (1 << 2)); - break; - case I2C_MUX_PCA9547_ID: - if (channel > 7) - return -1; - buf = (uint8_t)((channel & 0x07) | (1 << 3)); - break; - case I2C_MUX_PCA9548_ID: - if (channel > 7) - return -1; - buf = (uint8_t)(0x01 << channel); - break; - default: - printf("%s: wrong mux id: %d\n", __func__, mux_id); - return -1; - } - - ret = adap->write(adap, chip, 0, 0, &buf, 1); - if (ret) - printf("%s: could not set mux: id: %d chip: %x channel: %d\n", - __func__, mux_id, chip, channel); - return ret; -} - -static int i2c_mux_set_all(void) -{ - struct i2c_bus_hose *i2c_bus_tmp = &i2c_bus[I2C_BUS]; - int i; - - /* Connect requested bus if behind muxes */ - if (i2c_bus_tmp->next_hop[0].chip != 0) { - /* Set all muxes along the path to that bus */ - for (i = 0; i < CFG_SYS_I2C_MAX_HOPS; i++) { - int ret; - - if (i2c_bus_tmp->next_hop[i].chip == 0) - break; - - ret = i2c_mux_set(I2C_ADAP, - i2c_bus_tmp->next_hop[i].mux.id, - i2c_bus_tmp->next_hop[i].chip, - i2c_bus_tmp->next_hop[i].channel); - if (ret != 0) - return ret; - } - } - return 0; -} - -static int i2c_mux_disconnect_all(void) -{ - struct i2c_bus_hose *i2c_bus_tmp = &i2c_bus[I2C_BUS]; - int i; - uint8_t buf = 0; - - if (I2C_ADAP->init_done == 0) - return 0; - - /* Disconnect current bus (turn off muxes if any) */ - if ((i2c_bus_tmp->next_hop[0].chip != 0) && - (I2C_ADAP->init_done != 0)) { - i = CFG_SYS_I2C_MAX_HOPS; - do { - uint8_t chip; - int ret; - - chip = i2c_bus_tmp->next_hop[--i].chip; - if (chip == 0) - continue; - - ret = I2C_ADAP->write(I2C_ADAP, chip, 0, 0, &buf, 1); - if (ret != 0) { - printf("i2c: mux disconnect error\n"); - return ret; - } - } while (i > 0); - } - - return 0; -} -#endif - /* * i2c_init_bus(): * --------------- @@ -237,11 +108,6 @@ int i2c_set_bus_num(unsigned int bus) if ((bus == I2C_BUS) && (I2C_ADAP->init_done > 0)) return 0; -#ifndef CFG_SYS_I2C_DIRECT_BUS - if (bus >= CFG_SYS_NUM_I2C_BUSES) - return -1; -#endif - max = ll_entry_count(struct i2c_adapter, i2c); if (I2C_ADAPTER(bus) >= max) { printf("Error, wrong i2c adapter %d max %d possible\n", @@ -249,17 +115,10 @@ int i2c_set_bus_num(unsigned int bus) return -2; } -#ifndef CFG_SYS_I2C_DIRECT_BUS - i2c_mux_disconnect_all(); -#endif - gd->cur_i2c_bus = bus; if (I2C_ADAP->init_done == 0) i2c_init_bus(bus, I2C_ADAP->speed, I2C_ADAP->slaveaddr); -#ifndef CFG_SYS_I2C_DIRECT_BUS - i2c_mux_set_all(); -#endif return 0; } diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index 84c0050eac0..2f3cb5908c9 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -620,6 +620,7 @@ int enable_i2c_clk(unsigned char enable, unsigned int i2c_num) __attribute__((weak, alias("__enable_i2c_clk"))); #if !CONFIG_IS_ENABLED(DM_I2C) + /* * Read data from I2C device * diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c index 89ddf821063..79f7a320502 100644 --- a/drivers/i2c/soft_i2c.c +++ b/drivers/i2c/soft_i2c.c @@ -107,16 +107,13 @@ DECLARE_GLOBAL_DATA_PTR; /*----------------------------------------------------------------------- * Local functions */ -#if !defined(CONFIG_SYS_I2C_INIT_BOARD) static void send_reset (void); -#endif static void send_start (void); static void send_stop (void); static void send_ack (int); static int write_byte (uchar byte); static uchar read_byte (int); -#if !defined(CONFIG_SYS_I2C_INIT_BOARD) /*----------------------------------------------------------------------- * Send a reset sequence consisting of 9 clocks with the data signal high * to clock any confused device back into an idle state. Also send a @@ -144,7 +141,6 @@ static void send_reset(void) send_stop(); I2C_TRISTATE; } -#endif /*----------------------------------------------------------------------- * START: High -> Low on SDA while SCL is High @@ -277,12 +273,6 @@ static uchar read_byte(int ack) */ static void soft_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr) { -#if defined(CONFIG_SYS_I2C_INIT_BOARD) - /* call board specific i2c bus reset routine before accessing the */ - /* environment, which might be in a chip on that bus. For details */ - /* about this problem see doc/I2C_Edge_Conditions. */ - i2c_init_board(); -#else /* * WARNING: Do NOT save speed in a static variable: if the * I2C routines are called before RAM is initialized (to read @@ -290,7 +280,6 @@ static void soft_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr) * system will crash. */ send_reset (); -#endif } /*----------------------------------------------------------------------- diff --git a/drivers/pinctrl/pinctrl-generic.c b/drivers/pinctrl/pinctrl-generic.c index 2464acf0b85..81a9327eb35 100644 --- a/drivers/pinctrl/pinctrl-generic.c +++ b/drivers/pinctrl/pinctrl-generic.c @@ -22,7 +22,7 @@ static int pinctrl_pin_name_to_selector(struct udevice *dev, const char *pin) if (!ops->get_pins_count || !ops->get_pin_name) { dev_dbg(dev, "get_pins_count or get_pin_name missing\n"); - return -ENOSYS; + return -ENOENT; } npins = ops->get_pins_count(dev); @@ -35,7 +35,7 @@ static int pinctrl_pin_name_to_selector(struct udevice *dev, const char *pin) return selector; } - return -ENOSYS; + return -ENOENT; } /** @@ -53,7 +53,7 @@ static int pinctrl_group_name_to_selector(struct udevice *dev, if (!ops->get_groups_count || !ops->get_group_name) { dev_dbg(dev, "get_groups_count or get_group_name missing\n"); - return -ENOSYS; + return -ENOENT; } ngroups = ops->get_groups_count(dev); @@ -66,7 +66,7 @@ static int pinctrl_group_name_to_selector(struct udevice *dev, return selector; } - return -ENOSYS; + return -ENOENT; } #if CONFIG_IS_ENABLED(PINMUX) @@ -86,7 +86,7 @@ static int pinmux_func_name_to_selector(struct udevice *dev, if (!ops->get_functions_count || !ops->get_function_name) { dev_dbg(dev, "get_functions_count or get_function_name missing\n"); - return -ENOSYS; + return -ENOENT; } nfuncs = ops->get_functions_count(dev); @@ -99,7 +99,7 @@ static int pinmux_func_name_to_selector(struct udevice *dev, return selector; } - return -ENOSYS; + return -ENOENT; } /** @@ -119,14 +119,14 @@ static int pinmux_enable_setting(struct udevice *dev, bool is_group, if (is_group) { if (!ops->pinmux_group_set) { dev_dbg(dev, "pinmux_group_set op missing\n"); - return -ENOSYS; + return -ENOENT; } return ops->pinmux_group_set(dev, selector, func_selector); } else { if (!ops->pinmux_set) { dev_dbg(dev, "pinmux_set op missing\n"); - return -ENOSYS; + return -ENOENT; } return ops->pinmux_set(dev, selector, func_selector); } @@ -162,7 +162,7 @@ static int pinconf_prop_name_to_param(struct udevice *dev, if (!ops->pinconf_num_params || !ops->pinconf_params) { dev_dbg(dev, "pinconf_num_params or pinconf_params missing\n"); - return -ENOSYS; + return -ENOENT; } p = ops->pinconf_params; @@ -176,7 +176,7 @@ static int pinconf_prop_name_to_param(struct udevice *dev, } } - return -ENOSYS; + return -ENOENT; } /** @@ -198,7 +198,7 @@ static int pinconf_enable_setting(struct udevice *dev, bool is_group, if (is_group) { if (!ops->pinconf_group_set) { dev_dbg(dev, "pinconf_group_set op missing\n"); - return -ENOSYS; + return -ENOENT; } return ops->pinconf_group_set(dev, selector, param, @@ -206,7 +206,7 @@ static int pinconf_enable_setting(struct udevice *dev, bool is_group, } else { if (!ops->pinconf_set) { dev_dbg(dev, "pinconf_set op missing\n"); - return -ENOSYS; + return -ENOENT; } return ops->pinconf_set(dev, selector, param, argument); } @@ -215,7 +215,7 @@ static int pinconf_enable_setting(struct udevice *dev, bool is_group, static int pinconf_prop_name_to_param(struct udevice *dev, const char *property, u32 *default_value) { - return -ENOSYS; + return -ENOENT; } static int pinconf_enable_setting(struct udevice *dev, bool is_group, diff --git a/drivers/power/power_i2c.c b/drivers/power/power_i2c.c index a871fc41987..c2fc1c6b42f 100644 --- a/drivers/power/power_i2c.c +++ b/drivers/power/power_i2c.c @@ -33,8 +33,6 @@ int pmic_reg_write(struct pmic *p, u32 reg, u32 val) p->bus); return -ENXIO; } -#else /* Non DM I2C support - will be removed */ - I2C_SET_BUS(p->bus); #endif switch (pmic_i2c_tx_num) { @@ -93,9 +91,6 @@ int pmic_reg_read(struct pmic *p, u32 reg, u32 *val) return -ENXIO; } ret = dm_i2c_read(dev, reg, buf, pmic_i2c_tx_num); -#else /* Non DM I2C support - will be removed */ - I2C_SET_BUS(p->bus); - ret = i2c_read(pmic_i2c_addr, reg, 1, buf, pmic_i2c_tx_num); #endif if (ret) return ret; diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index ef9a1824b2b..45270e27184 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -13,6 +13,7 @@ #include <log.h> #include <ram.h> #include <regmap.h> +#include <spl.h> #include <syscon.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cru.h> @@ -63,8 +64,6 @@ struct chan_info { }; struct dram_info { -#if defined(CONFIG_TPL_BUILD) || \ - (!defined(CONFIG_TPL) && defined(CONFIG_SPL_BUILD)) u32 pwrup_srefresh_exit[2]; struct chan_info chan[2]; struct clk ddr_clk; @@ -75,7 +74,6 @@ struct dram_info { struct rk3399_pmusgrf_regs *pmusgrf; struct rk3399_ddr_cic_regs *cic; const struct sdram_rk3399_ops *ops; -#endif struct ram_info info; struct rk3399_pmugrf_regs *pmugrf; }; @@ -92,9 +90,6 @@ struct sdram_rk3399_ops { struct rk3399_sdram_params *params); }; -#if defined(CONFIG_TPL_BUILD) || \ - (!defined(CONFIG_TPL) && defined(CONFIG_SPL_BUILD)) - struct rockchip_dmc_plat { #if CONFIG_IS_ENABLED(OF_PLATDATA) struct dtd_rockchip_rk3399_dmc dtplat; @@ -191,6 +186,19 @@ struct io_setting { }, }; +/** + * phase_sdram_init() - Check if this is the phase where SDRAM init happens + * + * Returns: true to do SDRAM init in this phase, false to not + */ +static bool phase_sdram_init(void) +{ + return spl_phase() == PHASE_TPL || + (!IS_ENABLED(CONFIG_TPL) && + !IS_ENABLED(CONFIG_ROCKCHIP_EXTERNAL_TPL) && + !spl_in_proper()); +} + static struct io_setting * lpddr4_get_io_settings(const struct rk3399_sdram_params *params, u32 mr5) { @@ -3021,12 +3029,13 @@ static int sdram_init(struct dram_info *dram, static int rk3399_dmc_of_to_plat(struct udevice *dev) { - struct rockchip_dmc_plat *plat = dev_get_plat(dev); + struct rockchip_dmc_plat *plat; int ret; - if (!CONFIG_IS_ENABLED(OF_REAL)) + if (!CONFIG_IS_ENABLED(OF_REAL) || !phase_sdram_init()) return 0; + plat = dev_get_plat(dev); ret = dev_read_u32_array(dev, "rockchip,sdram-params", (u32 *)&plat->sdram_params, sizeof(plat->sdram_params) / sizeof(u32)); @@ -3093,7 +3102,6 @@ static int rk3399_dmc_init(struct udevice *dev) priv->cic = syscon_get_first_range(ROCKCHIP_SYSCON_CIC); priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); priv->pmu = syscon_get_first_range(ROCKCHIP_SYSCON_PMU); - priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); priv->pmusgrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUSGRF); priv->pmucru = rockchip_get_pmucru(); priv->cru = rockchip_get_cru(); @@ -3138,23 +3146,26 @@ static int rk3399_dmc_init(struct udevice *dev) return 0; } -#endif static int rk3399_dmc_probe(struct udevice *dev) { -#if defined(CONFIG_TPL_BUILD) || \ - (!defined(CONFIG_TPL) && defined(CONFIG_SPL_BUILD)) - if (rk3399_dmc_init(dev)) - return 0; -#else struct dram_info *priv = dev_get_priv(dev); priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); debug("%s: pmugrf = %p\n", __func__, priv->pmugrf); - priv->info.base = CFG_SYS_SDRAM_BASE; - priv->info.size = - rockchip_sdram_size((phys_addr_t)&priv->pmugrf->os_reg2); -#endif + if (phase_sdram_init() && rk3399_dmc_init(dev)) + return 0; + + /* + * There is no point in checking the SDRAM size in TPL as it is not + * used, so avoid the code size increment. + */ + if (!IS_ENABLED(CONFIG_TPL_BUILD)) { + priv->info.base = CFG_SYS_SDRAM_BASE; + priv->info.size = rockchip_sdram_size( + (phys_addr_t)&priv->pmugrf->os_reg2); + } + return 0; } @@ -3181,10 +3192,7 @@ U_BOOT_DRIVER(dmc_rk3399) = { .id = UCLASS_RAM, .of_match = rk3399_dmc_ids, .ops = &rk3399_dmc_ops, -#if defined(CONFIG_TPL_BUILD) || \ - (!defined(CONFIG_TPL) && defined(CONFIG_SPL_BUILD)) .of_to_plat = rk3399_dmc_of_to_plat, -#endif .probe = rk3399_dmc_probe, .priv_auto = sizeof(struct dram_info), #if defined(CONFIG_TPL_BUILD) || \ diff --git a/drivers/spi/soft_spi.c b/drivers/spi/soft_spi.c index 9bdb4a5bff9..a8ec2f4f7b4 100644 --- a/drivers/spi/soft_spi.c +++ b/drivers/spi/soft_spi.c @@ -237,6 +237,18 @@ static int soft_spi_of_to_plat(struct udevice *dev) return 0; } +static int retrieve_num_chipselects(struct udevice *dev) +{ + int chipselects; + int ret; + + ret = ofnode_read_u32(dev_ofnode(dev), "num-chipselects", &chipselects); + if (ret) + return ret; + + return chipselects; +} + static int soft_spi_probe(struct udevice *dev) { struct spi_slave *slave = dev_get_parent_priv(dev); @@ -249,7 +261,15 @@ static int soft_spi_probe(struct udevice *dev) ret = gpio_request_by_name(dev, "cs-gpios", 0, &plat->cs, GPIOD_IS_OUT | cs_flags); - if (ret) + /* + * If num-chipselects is zero we're ignoring absence of cs-gpios. This + * code relies on the fact that `gpio_request_by_name` call above + * initiailizes plat->cs to correct value with invalid GPIO even when + * there is no cs-gpios node in dts. All other functions which work + * with plat->cs verify it via `dm_gpio_is_valid` before using it, so + * such value doesn't cause any problems. + */ + if (ret && retrieve_num_chipselects(dev) != 0) return -EINVAL; ret = gpio_request_by_name(dev, "gpio-sck", 0, &plat->sclk, @@ -271,7 +291,7 @@ static int soft_spi_probe(struct udevice *dev) ret = gpio_request_by_name(dev, "gpio-miso", 0, &plat->miso, GPIOD_IS_IN); if (ret) - ret = gpio_request_by_name(dev, "gpio-miso", 0, &plat->miso, + ret = gpio_request_by_name(dev, "miso-gpios", 0, &plat->miso, GPIOD_IS_IN); if (ret) plat->flags |= SPI_MASTER_NO_RX; diff --git a/drivers/usb/emul/sandbox_flash.c b/drivers/usb/emul/sandbox_flash.c index 24420e3d51e..b5176bb30ce 100644 --- a/drivers/usb/emul/sandbox_flash.c +++ b/drivers/usb/emul/sandbox_flash.c @@ -196,7 +196,7 @@ static int handle_ufi_command(struct sandbox_flash_priv *priv, const void *buff, priv->fd != -1) { offset = os_lseek(priv->fd, info->seek_block * info->block_size, OS_SEEK_SET); - if (offset == (off_t)-1) + if (offset < 0) setup_fail_response(priv); else setup_response(priv); diff --git a/drivers/usb/host/ohci-lpc32xx.c b/drivers/usb/host/ohci-lpc32xx.c index ed04cae7afe..bf89bf8ab49 100644 --- a/drivers/usb/host/ohci-lpc32xx.c +++ b/drivers/usb/host/ohci-lpc32xx.c @@ -94,10 +94,6 @@ static int isp1301_set_value(struct udevice *dev, int reg, u8 value) static void isp1301_configure(struct udevice *dev) { -#if !CONFIG_IS_ENABLED(DM_I2C) - i2c_set_bus_num(I2C_2); -#endif - /* * LPC32XX only supports DAT_SE0 USB mode * This sequence is important diff --git a/env/common.c b/env/common.c index 8d47d726059..6cba7f1c187 100644 --- a/env/common.c +++ b/env/common.c @@ -401,7 +401,15 @@ int env_set_default_vars(int nvars, char * const vars[], int flags) * Special use-case: import from default environment * (and use \0 as a separator) */ - flags |= H_NOCLEAR | H_DEFAULT; + + /* + * When vars are passed remove variables that are not in + * the default environment. + */ + if (!nvars) + flags |= H_NOCLEAR; + + flags |= H_DEFAULT; return himport_r(&env_htab, default_environment, sizeof(default_environment), '\0', flags, 0, nvars, vars); diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c index 52152a2295a..76f7102456e 100644 --- a/fs/ext4/ext4_common.c +++ b/fs/ext4/ext4_common.c @@ -2181,13 +2181,18 @@ static char *ext4fs_read_symlink(struct ext2fs_node *node) struct ext2fs_node *diro = node; int status; loff_t actread; + size_t alloc_size; if (!diro->inode_read) { status = ext4fs_read_inode(diro->data, diro->ino, &diro->inode); if (status == 0) return NULL; } - symlink = zalloc(le32_to_cpu(diro->inode.size) + 1); + + if (__builtin_add_overflow(le32_to_cpu(diro->inode.size), 1, &alloc_size)) + return NULL; + + symlink = zalloc(alloc_size); if (!symlink) return NULL; @@ -2383,6 +2388,20 @@ int ext4fs_mount(void) fs->inodesz = 128; fs->gdsize = 32; } else { + int missing = __le32_to_cpu(data->sblock.feature_incompat) & + ~(EXT4_FEATURE_INCOMPAT_SUPP | + EXT4_FEATURE_INCOMPAT_SUPP_LAZY_RO); + + if (missing) { + /* + * This code used to be relaxed about feature flags. + * We don't stop the mount to avoid breaking existing setups. + * But, incompatible features can cause serious read errors. + */ + log_err("fs uses incompatible features: %08x, ignoring\n", + missing); + } + debug("EXT4 features COMPAT: %08x INCOMPAT: %08x RO_COMPAT: %08x\n", __le32_to_cpu(data->sblock.feature_compatibility), __le32_to_cpu(data->sblock.feature_incompat), diff --git a/fs/ext4/ext4_common.h b/fs/ext4/ext4_common.h index 84500e990aa..346752092b0 100644 --- a/fs/ext4/ext4_common.h +++ b/fs/ext4/ext4_common.h @@ -24,6 +24,7 @@ #include <ext4fs.h> #include <malloc.h> #include <asm/cache.h> +#include <linux/compat.h> #include <linux/errno.h> #if defined(CONFIG_EXT4_WRITE) #include "ext4_journal.h" @@ -43,9 +44,7 @@ static inline void *zalloc(size_t size) { - void *p = memalign(ARCH_DMA_MINALIGN, size); - memset(p, 0, size); - return p; + return kzalloc(size, 0); } int ext4fs_read_inode(struct ext2_data *data, int ino, diff --git a/fs/ext4/ext4_write.c b/fs/ext4/ext4_write.c index a2dfff81979..d109ed6e90d 100644 --- a/fs/ext4/ext4_write.c +++ b/fs/ext4/ext4_write.c @@ -866,6 +866,7 @@ int ext4fs_write(const char *fname, const char *buffer, ALLOC_CACHE_ALIGN_BUFFER(char, filename, 256); bool store_link_in_inode = false; memset(filename, 0x00, 256); + int missing_feat; if (type != FILETYPE_REG && type != FILETYPE_SYMLINK) return -1; @@ -879,8 +880,15 @@ int ext4fs_write(const char *fname, const char *buffer, return -1; } - if (le32_to_cpu(fs->sb->feature_ro_compat) & EXT4_FEATURE_RO_COMPAT_METADATA_CSUM) { - printf("Unsupported feature metadata_csum found, not writing.\n"); + missing_feat = le32_to_cpu(fs->sb->feature_incompat) & ~EXT4_FEATURE_INCOMPAT_SUPP; + if (missing_feat) { + log_err("Unsupported features found %08x, not writing.\n", missing_feat); + return -1; + } + + missing_feat = le32_to_cpu(fs->sb->feature_ro_compat) & ~EXT4_FEATURE_RO_COMPAT_SUPP; + if (missing_feat) { + log_err("Unsupported RO compat features found %08x, not writing.\n", missing_feat); return -1; } diff --git a/fs/sandbox/sandboxfs.c b/fs/sandbox/sandboxfs.c index 773b583fa43..76f1a71f412 100644 --- a/fs/sandbox/sandboxfs.c +++ b/fs/sandbox/sandboxfs.c @@ -28,7 +28,7 @@ int sandbox_fs_read_at(const char *filename, loff_t pos, void *buffer, if (fd < 0) return fd; ret = os_lseek(fd, pos, OS_SEEK_SET); - if (ret == -1) { + if (ret < 0) { os_close(fd); return ret; } @@ -65,14 +65,14 @@ int sandbox_fs_write_at(const char *filename, loff_t pos, void *buffer, if (fd < 0) return fd; ret = os_lseek(fd, pos, OS_SEEK_SET); - if (ret == -1) { + if (ret < 0) { os_close(fd); return ret; } size = os_write(fd, buffer, towrite); os_close(fd); - if (size == -1) { + if (size < 0) { ret = -1; } else { ret = 0; diff --git a/fs/squashfs/sqfs.c b/fs/squashfs/sqfs.c index 1430e671a5a..b9314019b1b 100644 --- a/fs/squashfs/sqfs.c +++ b/fs/squashfs/sqfs.c @@ -24,7 +24,12 @@ #include "sqfs_filesystem.h" #include "sqfs_utils.h" +#define MAX_SYMLINK_NEST 8 + static struct squashfs_ctxt ctxt; +static int symlinknest; + +static int sqfs_readdir_nest(struct fs_dir_stream *fs_dirs, struct fs_dirent **dentp); static int sqfs_disk_read(__u32 block, __u32 nr_blocks, void *buf) { @@ -422,8 +427,10 @@ static char *sqfs_resolve_symlink(struct squashfs_symlink_inode *sym, char *resolved, *target; u32 sz; - sz = get_unaligned_le32(&sym->symlink_size); - target = malloc(sz + 1); + if (__builtin_add_overflow(get_unaligned_le32(&sym->symlink_size), 1, &sz)) + return NULL; + + target = malloc(sz); if (!target) return NULL; @@ -431,9 +438,9 @@ static char *sqfs_resolve_symlink(struct squashfs_symlink_inode *sym, * There is no trailling null byte in the symlink's target path, so a * copy is made and a '\0' is added at its end. */ - target[sz] = '\0'; + target[sz - 1] = '\0'; /* Get target name (relative path) */ - strncpy(target, sym->symlink, sz); + strncpy(target, sym->symlink, sz - 1); /* Relative -> absolute path conversion */ resolved = sqfs_get_abs_path(base_path, target); @@ -472,6 +479,8 @@ static int sqfs_search_dir(struct squashfs_dir_stream *dirs, char **token_list, /* Start by root inode */ table = sqfs_find_inode(dirs->inode_table, le32_to_cpu(sblk->inodes), sblk->inodes, sblk->block_size); + if (!table) + return -EINVAL; dir = (struct squashfs_dir_inode *)table; ldir = (struct squashfs_ldir_inode *)table; @@ -506,7 +515,7 @@ static int sqfs_search_dir(struct squashfs_dir_stream *dirs, char **token_list, goto out; } - while (!sqfs_readdir(dirsp, &dent)) { + while (!sqfs_readdir_nest(dirsp, &dent)) { ret = strcmp(dent->name, token_list[j]); if (!ret) break; @@ -527,10 +536,17 @@ static int sqfs_search_dir(struct squashfs_dir_stream *dirs, char **token_list, /* Get reference to inode in the inode table */ table = sqfs_find_inode(dirs->inode_table, new_inode_number, sblk->inodes, sblk->block_size); + if (!table) + return -EINVAL; dir = (struct squashfs_dir_inode *)table; /* Check for symbolic link and inode type sanity */ if (get_unaligned_le16(&dir->inode_type) == SQFS_SYMLINK_TYPE) { + if (++symlinknest == MAX_SYMLINK_NEST) { + ret = -ELOOP; + goto out; + } + sym = (struct squashfs_symlink_inode *)table; /* Get first j + 1 tokens */ path = sqfs_concat_tokens(token_list, j + 1); @@ -551,8 +567,11 @@ static int sqfs_search_dir(struct squashfs_dir_stream *dirs, char **token_list, ret = -ENOMEM; goto out; } - /* Concatenate remaining tokens and symlink's target */ - res = malloc(strlen(rem) + strlen(target) + 1); + /* + * Concatenate remaining tokens and symlink's target. + * Allocate enough space for rem, target, '/' and '\0'. + */ + res = malloc(strlen(rem) + strlen(target) + 2); if (!res) { ret = -ENOMEM; goto out; @@ -878,7 +897,7 @@ out: return metablks_count; } -int sqfs_opendir(const char *filename, struct fs_dir_stream **dirsp) +static int sqfs_opendir_nest(const char *filename, struct fs_dir_stream **dirsp) { unsigned char *inode_table = NULL, *dir_table = NULL; int j, token_count = 0, ret = 0, metablks_count; @@ -973,8 +992,20 @@ out: return ret; } +int sqfs_opendir(const char *filename, struct fs_dir_stream **dirsp) +{ + symlinknest = 0; + return sqfs_opendir_nest(filename, dirsp); +} + int sqfs_readdir(struct fs_dir_stream *fs_dirs, struct fs_dirent **dentp) { + symlinknest = 0; + return sqfs_readdir_nest(fs_dirs, dentp); +} + +static int sqfs_readdir_nest(struct fs_dir_stream *fs_dirs, struct fs_dirent **dentp) +{ struct squashfs_super_block *sblk = ctxt.sblk; struct squashfs_dir_stream *dirs; struct squashfs_lreg_inode *lreg; @@ -1023,6 +1054,8 @@ int sqfs_readdir(struct fs_dir_stream *fs_dirs, struct fs_dirent **dentp) i_number = dirs->dir_header->inode_number + dirs->entry->inode_offset; ipos = sqfs_find_inode(dirs->inode_table, i_number, sblk->inodes, sblk->block_size); + if (!ipos) + return -SQFS_STOP_READDIR; base = (struct squashfs_base_inode *)ipos; @@ -1317,8 +1350,8 @@ static int sqfs_get_lregfile_info(struct squashfs_lreg_inode *lreg, return datablk_count; } -int sqfs_read(const char *filename, void *buf, loff_t offset, loff_t len, - loff_t *actread) +static int sqfs_read_nest(const char *filename, void *buf, loff_t offset, + loff_t len, loff_t *actread) { char *dir = NULL, *fragment_block, *datablock = NULL; char *fragment = NULL, *file = NULL, *resolved, *data; @@ -1348,11 +1381,11 @@ int sqfs_read(const char *filename, void *buf, loff_t offset, loff_t len, } /* - * sqfs_opendir will uncompress inode and directory tables, and will + * sqfs_opendir_nest will uncompress inode and directory tables, and will * return a pointer to the directory that contains the requested file. */ sqfs_split_path(&file, &dir, filename); - ret = sqfs_opendir(dir, &dirsp); + ret = sqfs_opendir_nest(dir, &dirsp); if (ret) { goto out; } @@ -1360,7 +1393,7 @@ int sqfs_read(const char *filename, void *buf, loff_t offset, loff_t len, dirs = (struct squashfs_dir_stream *)dirsp; /* For now, only regular files are able to be loaded */ - while (!sqfs_readdir(dirsp, &dent)) { + while (!sqfs_readdir_nest(dirsp, &dent)) { ret = strcmp(dent->name, file); if (!ret) break; @@ -1379,6 +1412,10 @@ int sqfs_read(const char *filename, void *buf, loff_t offset, loff_t len, i_number = dirs->dir_header->inode_number + dirs->entry->inode_offset; ipos = sqfs_find_inode(dirs->inode_table, i_number, sblk->inodes, sblk->block_size); + if (!ipos) { + ret = -EINVAL; + goto out; + } base = (struct squashfs_base_inode *)ipos; switch (get_unaligned_le16(&base->inode_type)) { @@ -1409,9 +1446,14 @@ int sqfs_read(const char *filename, void *buf, loff_t offset, loff_t len, break; case SQFS_SYMLINK_TYPE: case SQFS_LSYMLINK_TYPE: + if (++symlinknest == MAX_SYMLINK_NEST) { + ret = -ELOOP; + goto out; + } + symlink = (struct squashfs_symlink_inode *)ipos; resolved = sqfs_resolve_symlink(symlink, filename); - ret = sqfs_read(resolved, buf, offset, len, actread); + ret = sqfs_read_nest(resolved, buf, offset, len, actread); free(resolved); goto out; case SQFS_BLKDEV_TYPE: @@ -1582,7 +1624,14 @@ out: return ret; } -int sqfs_size(const char *filename, loff_t *size) +int sqfs_read(const char *filename, void *buf, loff_t offset, loff_t len, + loff_t *actread) +{ + symlinknest = 0; + return sqfs_read_nest(filename, buf, offset, len, actread); +} + +static int sqfs_size_nest(const char *filename, loff_t *size) { struct squashfs_super_block *sblk = ctxt.sblk; struct squashfs_symlink_inode *symlink; @@ -1598,10 +1647,10 @@ int sqfs_size(const char *filename, loff_t *size) sqfs_split_path(&file, &dir, filename); /* - * sqfs_opendir will uncompress inode and directory tables, and will + * sqfs_opendir_nest will uncompress inode and directory tables, and will * return a pointer to the directory that contains the requested file. */ - ret = sqfs_opendir(dir, &dirsp); + ret = sqfs_opendir_nest(dir, &dirsp); if (ret) { ret = -EINVAL; goto free_strings; @@ -1609,7 +1658,7 @@ int sqfs_size(const char *filename, loff_t *size) dirs = (struct squashfs_dir_stream *)dirsp; - while (!sqfs_readdir(dirsp, &dent)) { + while (!sqfs_readdir_nest(dirsp, &dent)) { ret = strcmp(dent->name, file); if (!ret) break; @@ -1627,6 +1676,13 @@ int sqfs_size(const char *filename, loff_t *size) i_number = dirs->dir_header->inode_number + dirs->entry->inode_offset; ipos = sqfs_find_inode(dirs->inode_table, i_number, sblk->inodes, sblk->block_size); + + if (!ipos) { + *size = 0; + ret = -EINVAL; + goto free_strings; + } + free(dirs->entry); dirs->entry = NULL; @@ -1642,6 +1698,11 @@ int sqfs_size(const char *filename, loff_t *size) break; case SQFS_SYMLINK_TYPE: case SQFS_LSYMLINK_TYPE: + if (++symlinknest == MAX_SYMLINK_NEST) { + *size = 0; + return -ELOOP; + } + symlink = (struct squashfs_symlink_inode *)ipos; resolved = sqfs_resolve_symlink(symlink, filename); ret = sqfs_size(resolved, size); @@ -1681,10 +1742,11 @@ int sqfs_exists(const char *filename) sqfs_split_path(&file, &dir, filename); /* - * sqfs_opendir will uncompress inode and directory tables, and will + * sqfs_opendir_nest will uncompress inode and directory tables, and will * return a pointer to the directory that contains the requested file. */ - ret = sqfs_opendir(dir, &dirsp); + symlinknest = 0; + ret = sqfs_opendir_nest(dir, &dirsp); if (ret) { ret = -EINVAL; goto free_strings; @@ -1692,7 +1754,7 @@ int sqfs_exists(const char *filename) dirs = (struct squashfs_dir_stream *)dirsp; - while (!sqfs_readdir(dirsp, &dent)) { + while (!sqfs_readdir_nest(dirsp, &dent)) { ret = strcmp(dent->name, file); if (!ret) break; @@ -1709,6 +1771,12 @@ free_strings: return ret == 0; } +int sqfs_size(const char *filename, loff_t *size) +{ + symlinknest = 0; + return sqfs_size_nest(filename, size); +} + void sqfs_close(void) { sqfs_decompressor_cleanup(&ctxt); diff --git a/fs/squashfs/sqfs_inode.c b/fs/squashfs/sqfs_inode.c index d25cfb53e75..bb3ccd37e33 100644 --- a/fs/squashfs/sqfs_inode.c +++ b/fs/squashfs/sqfs_inode.c @@ -78,11 +78,16 @@ int sqfs_inode_size(struct squashfs_base_inode *inode, u32 blk_size) case SQFS_SYMLINK_TYPE: case SQFS_LSYMLINK_TYPE: { + int size; + struct squashfs_symlink_inode *symlink = (struct squashfs_symlink_inode *)inode; - return sizeof(*symlink) + - get_unaligned_le32(&symlink->symlink_size); + if (__builtin_add_overflow(sizeof(*symlink), + get_unaligned_le32(&symlink->symlink_size), &size)) + return -EINVAL; + + return size; } case SQFS_BLKDEV_TYPE: diff --git a/include/alist.h b/include/alist.h new file mode 100644 index 00000000000..586a1efa5c8 --- /dev/null +++ b/include/alist.h @@ -0,0 +1,228 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Handles a contiguous list of pointers which be allocated and freed + * + * Copyright 2023 Google LLC + * Written by Simon Glass <sjg@chromium.org> + */ + +#ifndef __ALIST_H +#define __ALIST_H + +#include <stdbool.h> +#include <linux/bitops.h> +#include <linux/types.h> + +/** + * struct alist - object list that can be allocated and freed + * + * Holds a list of objects, each of the same size. The object is typically a + * C struct. The array is alloced in memory can change in size. + * + * The list rememebers the size of the list, but has a separate count of how + * much space is allocated, This allows it increase in size in steps as more + * elements are added, which is more efficient that reallocating the list every + * time a single item is added + * + * Two types of access are provided: + * + * alist_get...(index) + * gets an existing element, if its index is less that size + * + * alist_ensure(index) + * address an existing element, or creates a new one if not present + * + * @data: object data of size `@obj_size * @alloc`. The list can grow as + * needed but never shrinks + * @obj_size: Size of each object in bytes + * @count: number of objects in array + * @alloc: allocated length of array, to which @count can grow + * @flags: flags for the alist (ALISTF_...) + */ +struct alist { + void *data; + u16 obj_size; + u16 count; + u16 alloc; + u16 flags; +}; + +/** + * enum alist_flags - Flags for the alist + * + * @ALIST_FAIL: true if any allocation has failed. Once this has happened, the + * alist is dead and cannot grow further + */ +enum alist_flags { + ALISTF_FAIL = BIT(0), +}; + +/** + * alist_has() - Check if an index is within the list range + * + * Checks if index is within the current alist count + * + * @lst: alist to check + * @index: Index to check + * Returns: true if value, else false + */ +static inline bool alist_has(struct alist *lst, uint index) +{ + return index < lst->count; +} + +/** + * alist_err() - Check if the alist is still valid + * + * @lst: List to check + * Return: false if OK, true if any previous allocation failed + */ +static inline bool alist_err(struct alist *lst) +{ + return lst->flags & ALISTF_FAIL; +} + +/** + * alist_get_ptr() - Get the value of a pointer + * + * @lst: alist to check + * @index: Index to read from + * Returns: pointer, if present, else NULL + */ +const void *alist_get_ptr(const struct alist *lst, uint index); + +/** + * alist_getd() - Get the value of a pointer directly, with no checking + * + * This must only be called on indexes for which alist_has() returns true + * + * @lst: alist to check + * @index: Index to read from + * Returns: pointer value (may be NULL) + */ +static inline const void *alist_getd(struct alist *lst, uint index) +{ + return lst->data + index * lst->obj_size; +} + +/** get an entry as a constant */ +#define alist_get(_lst, _index, _struct) \ + ((const _struct *)alist_get_ptr(_lst, _index)) + +/** get an entry which can be written to */ +#define alist_getw(_lst, _index, _struct) \ + ((_struct *)alist_get_ptr(_lst, _index)) + +/** + * alist_ensure_ptr() - Ensure an object exists at a given index + * + * This provides read/write access to an array element. If it does not exist, + * it is allocated, reading for the caller to store the object into + * + * Allocates a object at the given index if needed + * + * @lst: alist to check + * @index: Index to address + * Returns: pointer where struct can be read/written, or NULL if out of memory + */ +void *alist_ensure_ptr(struct alist *lst, uint index); + +/** + * alist_ensure() - Address a struct, the correct object type + * + * Use as: + * struct my_struct *ptr = alist_ensure(&lst, 4, struct my_struct); + */ +#define alist_ensure(_lst, _index, _struct) \ + ((_struct *)alist_ensure_ptr(_lst, _index)) + +/** + * alist_add_placeholder() - Add a new item to the end of the list + * + * @lst: alist to add to + * Return: Pointer to the newly added position. Note that this is not inited so + * the caller must copy the requested struct to the returned pointer + */ +void *alist_add_placeholder(struct alist *lst); + +/** + * alist_add_ptr() - Ad a new object to the list + * + * @lst: alist to add to + * @obj: Pointer to object to copy in + * Returns: pointer to where the object was copied, or NULL if out of memory + */ +void *alist_add_ptr(struct alist *lst, void *obj); + +/** + * alist_expand_by() - Expand a list by the given amount + * + * @lst: alist to expand + * @inc_by: Amount to expand by + * Return: true if OK, false if out of memory + */ +bool alist_expand_by(struct alist *lst, uint inc_by); + +/** + * alist_add() - Used to add an object type with the correct type + * + * Use as: + * struct my_struct obj; + * struct my_struct *ptr = alist_add(&lst, &obj); + */ +#define alist_add(_lst, _obj) \ + ((typeof(_obj) *)alist_add_ptr(_lst, &(_obj))) + +/** + * alist_init() - Set up a new object list + * + * Sets up a list of objects, initially empty + * + * @lst: alist to set up + * @obj_size: Size of each element in bytes + * @alloc_size: Number of items to allowed to start, before reallocation is + * needed (0 to start with no space) + * Return: true if OK, false if out of memory + */ +bool alist_init(struct alist *lst, uint obj_size, uint alloc_size); + +#define alist_init_struct(_lst, _struct) \ + alist_init(_lst, sizeof(_struct), 0) + +/** + * alist_uninit_move_ptr() - Return the allocated contents and uninit the alist + * + * This returns the alist data to the caller, so that the caller receives data + * that it can be sure will hang around. The caller is responsible for freeing + * the data. + * + * If the alist size is 0, this returns NULL + * + * The alist is uninited as part of this. + * + * The alist must be inited before this can be called. + * + * @alist: alist to uninit + * @countp: if non-NULL, returns the number of objects in the returned data + * (which is @alist->size) + * Return: data contents, allocated with malloc(), or NULL if the data could not + * be allocated, or the data size is 0 + */ +void *alist_uninit_move_ptr(struct alist *alist, size_t *countp); + +/** + * alist_uninit_move() - Typed version of alist_uninit_move_ptr() + */ +#define alist_uninit_move(_lst, _countp, _struct) \ + (_struct *)alist_uninit_move_ptr(_lst, _countp) + +/** + * alist_uninit() - Free any memory used by an alist + * + * The alist must be inited before this can be called. + * + * @alist: alist to uninit + */ +void alist_uninit(struct alist *alist); + +#endif /* __ALIST_H */ diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h index 27aa75e7036..19c66e1fe5d 100644 --- a/include/asm-generic/global_data.h +++ b/include/asm-generic/global_data.h @@ -30,6 +30,7 @@ struct acpi_ctx; struct driver_rt; +struct upl; typedef struct global_data gd_t; @@ -491,6 +492,12 @@ struct global_data { * @dmtag_list: List of DM tags */ struct list_head dmtag_list; +#if CONFIG_IS_ENABLED(UPL) + /** + * @upl: Universal Payload-handoff information + */ + struct upl *upl; +#endif }; #ifndef DO_DEPS_ONLY static_assert(sizeof(struct global_data) == GD_SIZE); @@ -590,6 +597,14 @@ static_assert(sizeof(struct global_data) == GD_SIZE); #define gd_malloc_ptr() 0L #endif +#if CONFIG_IS_ENABLED(UPL) +#define gd_upl() gd->upl +#define gd_set_upl(_val) gd->upl = (_val) +#else +#define gd_upl() NULL +#define gd_set_upl(val) +#endif + /** * enum gd_flags - global data flags * @@ -701,6 +716,10 @@ enum gd_flags { * @GD_FLG_HUSH_MODERN_PARSER: Use hush 2021 parser. */ GD_FLG_HUSH_MODERN_PARSER = 0x2000000, + /** + * @GD_FLG_UPL: Read/write a Universal Payload (UPL) handoff + */ + GD_FLG_UPL = 0x4000000, }; #endif /* __ASSEMBLY__ */ diff --git a/include/bootstage.h b/include/bootstage.h index f4e77b09d74..57792648c49 100644 --- a/include/bootstage.h +++ b/include/bootstage.h @@ -258,7 +258,7 @@ void show_boot_progress(int val); * relocation, since memory can be overwritten later. * Return: Always returns 0, to indicate success */ -int bootstage_relocate(void); +int bootstage_relocate(void *to); /** * Add a new bootstage record @@ -395,7 +395,7 @@ static inline ulong bootstage_add_record(enum bootstage_id id, * and won't even do that unless CONFIG_SHOW_BOOT_PROGRESS is defined */ -static inline int bootstage_relocate(void) +static inline int bootstage_relocate(void *to) { return 0; } diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index 807c6963192..c327bbbe07d 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -59,9 +59,6 @@ #define CFG_SYS_I2C_RTC_ADDR 0x51 #endif -/* I2C */ -#define CFG_SYS_MAX_I2C_BUS 1 - #define I2C_SOFT_DECLARATIONS #define GPIO_I2C_SCL AT91_PIO_PORTA, 24 diff --git a/include/configs/ls1028aqds.h b/include/configs/ls1028aqds.h index 769ece901c1..ed93b51d808 100644 --- a/include/configs/ls1028aqds.h +++ b/include/configs/ls1028aqds.h @@ -47,7 +47,6 @@ #endif /* RTC */ -#define CFG_SYS_RTC_BUS_NUM 1 #define I2C_MUX_CH_RTC 0xB /* Store environment at top of flash */ diff --git a/include/configs/ls1028ardb.h b/include/configs/ls1028ardb.h index 0f591e3c4ab..d44ce45fd6b 100644 --- a/include/configs/ls1028ardb.h +++ b/include/configs/ls1028ardb.h @@ -10,8 +10,6 @@ #define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4) -#define CFG_SYS_RTC_BUS_NUM 0 - /* Store environment at top of flash */ /* diff --git a/include/configs/ls1046afrwy.h b/include/configs/ls1046afrwy.h index 5e03a962d10..21804fc6654 100644 --- a/include/configs/ls1046afrwy.h +++ b/include/configs/ls1046afrwy.h @@ -66,7 +66,6 @@ /* RTC */ #define CFG_SYS_I2C_RTC_ADDR 0x51 /* Channel 0 I2C bus 0*/ -#define CFG_SYS_RTC_BUS_NUM 0 /* * Environment diff --git a/include/configs/lx2160aqds.h b/include/configs/lx2160aqds.h index 3a316e73308..5b397e23d89 100644 --- a/include/configs/lx2160aqds.h +++ b/include/configs/lx2160aqds.h @@ -8,9 +8,6 @@ #include "lx2160a_common.h" -/* RTC */ -#define CFG_SYS_RTC_BUS_NUM 0 - /* MAC/PHY configuration */ /* Initial environment variables */ diff --git a/include/configs/lx2160ardb.h b/include/configs/lx2160ardb.h index 6404b359111..e700a7b1135 100644 --- a/include/configs/lx2160ardb.h +++ b/include/configs/lx2160ardb.h @@ -8,9 +8,6 @@ #include "lx2160a_common.h" -/* RTC */ -#define CFG_SYS_RTC_BUS_NUM 4 - #if defined(CONFIG_FSL_MC_ENET) #define AQR113C_PHY_ADDR1 0x0 #define AQR113C_PHY_ADDR2 0x08 diff --git a/include/configs/lx2162aqds.h b/include/configs/lx2162aqds.h index 54d7cea4c59..2d0db47b334 100644 --- a/include/configs/lx2162aqds.h +++ b/include/configs/lx2162aqds.h @@ -10,9 +10,6 @@ /* USB */ -/* RTC */ -#define CFG_SYS_RTC_BUS_NUM 0 - /* Initial environment variables */ #define CFG_EXTRA_ENV_SETTINGS \ EXTRA_ENV_SETTINGS \ diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 9cf46b2c362..c245cbe427b 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -57,8 +57,6 @@ #define CFG_FEC_MXC_PHYADDR 0x0 #endif -#define CFG_SYS_RTC_BUS_NUM 1 /* I2C2 */ - /* * RTC */ diff --git a/include/configs/sniper.h b/include/configs/sniper.h index 45a3102aeee..d0ae5e18605 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -35,20 +35,6 @@ #define CFG_SYS_SDRAM_BASE 0x80000000 /* - * I2C - */ - -#define CFG_I2C_MULTI_BUS - -/* - * Input - */ - -/* - * SPL - */ - -/* * Serial */ diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index 2da76f15431..ceeed174ec5 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -26,9 +26,6 @@ #define TQMA6_SPI_FLASH_SECTOR_SIZE SZ_64K -/* I2C Configs */ -#define CFG_I2C_MULTI_BUS - #if !defined(CONFIG_DM_PMIC) #define CFG_POWER_PFUZE100_I2C_ADDR 0x08 #define TQMA6_PFUZE100_I2C_BUS 2 diff --git a/include/configs/tqma6_wru4.h b/include/configs/tqma6_wru4.h index e06fc7fe155..5e21463305a 100644 --- a/include/configs/tqma6_wru4.h +++ b/include/configs/tqma6_wru4.h @@ -16,7 +16,6 @@ /* Watchdog */ /* Config on-board RTC */ -#define CFG_SYS_RTC_BUS_NUM 2 #define CFG_SYS_I2C_RTC_ADDR 0x68 /* Turn off RTC square-wave output to save battery */ diff --git a/include/dt-bindings/clock/mt7623-clk.h b/include/dt-bindings/clock/mt7623-clk.h index 71ced1593af..0caeb65c3d2 100644 --- a/include/dt-bindings/clock/mt7623-clk.h +++ b/include/dt-bindings/clock/mt7623-clk.h @@ -7,407 +7,477 @@ #define _DT_BINDINGS_CLK_MT2701_H /* TOPCKGEN */ -#define CLK_TOP_FCLKS_OFF 0 - -#define CLK_TOP_DPI 0 -#define CLK_TOP_DMPLL 1 -#define CLK_TOP_VENCPLL 2 -#define CLK_TOP_HDMI_0_PIX340M 3 -#define CLK_TOP_HDMI_0_DEEP340M 4 -#define CLK_TOP_HDMI_0_PLL340M 5 -#define CLK_TOP_HADDS2_FB 6 -#define CLK_TOP_WBG_DIG_416M 7 -#define CLK_TOP_DSI0_LNTC_DSI 8 -#define CLK_TOP_HDMI_SCL_RX 9 -#define CLK_TOP_32K_EXTERNAL 10 -#define CLK_TOP_HDMITX_CLKDIG_CTS 11 -#define CLK_TOP_AUD_EXT1 12 -#define CLK_TOP_AUD_EXT2 13 -#define CLK_TOP_NFI1X_PAD 14 - -#define CLK_TOP_SYSPLL 15 -#define CLK_TOP_SYSPLL_D2 16 -#define CLK_TOP_SYSPLL_D3 17 -#define CLK_TOP_SYSPLL_D5 18 -#define CLK_TOP_SYSPLL_D7 19 -#define CLK_TOP_SYSPLL1_D2 20 -#define CLK_TOP_SYSPLL1_D4 21 -#define CLK_TOP_SYSPLL1_D8 22 -#define CLK_TOP_SYSPLL1_D16 23 -#define CLK_TOP_SYSPLL2_D2 24 -#define CLK_TOP_SYSPLL2_D4 25 -#define CLK_TOP_SYSPLL2_D8 26 -#define CLK_TOP_SYSPLL3_D2 27 -#define CLK_TOP_SYSPLL3_D4 28 -#define CLK_TOP_SYSPLL4_D2 29 -#define CLK_TOP_SYSPLL4_D4 30 -#define CLK_TOP_UNIVPLL 31 -#define CLK_TOP_UNIVPLL_D2 32 -#define CLK_TOP_UNIVPLL_D3 33 -#define CLK_TOP_UNIVPLL_D5 34 -#define CLK_TOP_UNIVPLL_D7 35 -#define CLK_TOP_UNIVPLL_D26 36 -#define CLK_TOP_UNIVPLL_D52 37 -#define CLK_TOP_UNIVPLL_D108 38 -#define CLK_TOP_USB_PHY48M 39 -#define CLK_TOP_UNIVPLL1_D2 40 -#define CLK_TOP_UNIVPLL1_D4 41 -#define CLK_TOP_UNIVPLL1_D8 42 -#define CLK_TOP_UNIVPLL2_D2 43 -#define CLK_TOP_UNIVPLL2_D4 44 -#define CLK_TOP_UNIVPLL2_D8 45 -#define CLK_TOP_UNIVPLL2_D16 46 -#define CLK_TOP_UNIVPLL2_D32 47 -#define CLK_TOP_UNIVPLL3_D2 48 -#define CLK_TOP_UNIVPLL3_D4 49 -#define CLK_TOP_UNIVPLL3_D8 50 -#define CLK_TOP_MSDCPLL 51 -#define CLK_TOP_MSDCPLL_D2 52 -#define CLK_TOP_MSDCPLL_D4 53 -#define CLK_TOP_MSDCPLL_D8 54 -#define CLK_TOP_MMPLL 55 -#define CLK_TOP_MMPLL_D2 56 -#define CLK_TOP_DMPLL_D2 57 -#define CLK_TOP_DMPLL_D4 58 -#define CLK_TOP_DMPLL_X2 59 -#define CLK_TOP_TVDPLL 60 -#define CLK_TOP_TVDPLL_D2 61 -#define CLK_TOP_TVDPLL_D4 62 -#define CLK_TOP_VDECPLL 63 -#define CLK_TOP_TVD2PLL 64 -#define CLK_TOP_TVD2PLL_D2 65 -#define CLK_TOP_MIPIPLL 66 -#define CLK_TOP_MIPIPLL_D2 67 -#define CLK_TOP_MIPIPLL_D4 68 -#define CLK_TOP_HDMIPLL 69 -#define CLK_TOP_HDMIPLL_D2 70 -#define CLK_TOP_HDMIPLL_D3 71 -#define CLK_TOP_ARMPLL_1P3G 72 -#define CLK_TOP_AUDPLL 73 -#define CLK_TOP_AUDPLL_D4 74 -#define CLK_TOP_AUDPLL_D8 75 -#define CLK_TOP_AUDPLL_D16 76 -#define CLK_TOP_AUDPLL_D24 77 -#define CLK_TOP_AUD1PLL_98M 78 -#define CLK_TOP_AUD2PLL_90M 79 -#define CLK_TOP_HADDS2PLL_98M 80 -#define CLK_TOP_HADDS2PLL_294M 81 -#define CLK_TOP_ETHPLL_500M 82 -#define CLK_TOP_CLK26M_D8 83 -#define CLK_TOP_32K_INTERNAL 84 -#define CLK_TOP_AXISEL_D4 85 -#define CLK_TOP_8BDAC 86 - -#define CLK_TOP_AXI_SEL 87 -#define CLK_TOP_MEM_SEL 88 -#define CLK_TOP_DDRPHYCFG_SEL 89 -#define CLK_TOP_MM_SEL 90 -#define CLK_TOP_PWM_SEL 91 -#define CLK_TOP_VDEC_SEL 92 -#define CLK_TOP_MFG_SEL 93 -#define CLK_TOP_CAMTG_SEL 94 -#define CLK_TOP_UART_SEL 95 -#define CLK_TOP_SPI0_SEL 96 -#define CLK_TOP_USB20_SEL 97 -#define CLK_TOP_MSDC30_0_SEL 98 -#define CLK_TOP_MSDC30_1_SEL 99 -#define CLK_TOP_MSDC30_2_SEL 100 -#define CLK_TOP_AUDIO_SEL 101 -#define CLK_TOP_AUDINTBUS_SEL 102 -#define CLK_TOP_PMICSPI_SEL 103 -#define CLK_TOP_SCP_SEL 104 -#define CLK_TOP_DPI0_SEL 105 -#define CLK_TOP_DPI1_SEL 106 -#define CLK_TOP_TVE_SEL 107 -#define CLK_TOP_HDMI_SEL 108 -#define CLK_TOP_APLL_SEL 109 -#define CLK_TOP_RTC_SEL 110 -#define CLK_TOP_NFI2X_SEL 111 -#define CLK_TOP_EMMC_HCLK_SEL 112 -#define CLK_TOP_FLASH_SEL 113 -#define CLK_TOP_DI_SEL 114 -#define CLK_TOP_NR_SEL 115 -#define CLK_TOP_OSD_SEL 116 -#define CLK_TOP_HDMIRX_BIST_SEL 117 -#define CLK_TOP_INTDIR_SEL 118 -#define CLK_TOP_ASM_I_SEL 119 -#define CLK_TOP_ASM_M_SEL 120 -#define CLK_TOP_ASM_H_SEL 121 -#define CLK_TOP_MS_CARD_SEL 122 -#define CLK_TOP_ETHIF_SEL 123 -#define CLK_TOP_HDMIRX26_24_SEL 124 -#define CLK_TOP_MSDC30_3_SEL 125 -#define CLK_TOP_CMSYS_SEL 126 -#define CLK_TOP_SPI1_SEL 127 -#define CLK_TOP_SPI2_SEL 128 -#define CLK_TOP_8BDAC_SEL 129 -#define CLK_TOP_AUD2DVD_SEL 130 -#define CLK_TOP_PADMCLK_SEL 131 -#define CLK_TOP_AUD_MUX1_SEL 132 -#define CLK_TOP_AUD_MUX2_SEL 133 -#define CLK_TOP_AUDPLL_MUX_SEL 134 -#define CLK_TOP_AUD_K1_SRC_SEL 135 -#define CLK_TOP_AUD_K2_SRC_SEL 136 -#define CLK_TOP_AUD_K3_SRC_SEL 137 -#define CLK_TOP_AUD_K4_SRC_SEL 138 -#define CLK_TOP_AUD_K5_SRC_SEL 139 -#define CLK_TOP_AUD_K6_SRC_SEL 140 - -#define CLK_TOP_AUD_EXTCK1_DIV 141 -#define CLK_TOP_AUD_EXTCK2_DIV 142 -#define CLK_TOP_AUD_MUX1_DIV 143 -#define CLK_TOP_AUD_MUX2_DIV 144 -#define CLK_TOP_AUD_K1_SRC_DIV 145 -#define CLK_TOP_AUD_K2_SRC_DIV 146 -#define CLK_TOP_AUD_K3_SRC_DIV 147 -#define CLK_TOP_AUD_K4_SRC_DIV 148 -#define CLK_TOP_AUD_K5_SRC_DIV 149 -#define CLK_TOP_AUD_K6_SRC_DIV 150 -#define CLK_TOP_AUD_48K_TIMING 151 -#define CLK_TOP_AUD_44K_TIMING 152 -#define CLK_TOP_AUD_I2S1_MCLK 153 -#define CLK_TOP_AUD_I2S2_MCLK 154 -#define CLK_TOP_AUD_I2S3_MCLK 155 -#define CLK_TOP_AUD_I2S4_MCLK 156 -#define CLK_TOP_AUD_I2S5_MCLK 157 -#define CLK_TOP_AUD_I2S6_MCLK 158 +#define CLK_TOP_SYSPLL 1 +#define CLK_TOP_SYSPLL_D2 2 +#define CLK_TOP_SYSPLL_D3 3 +#define CLK_TOP_SYSPLL_D5 4 +#define CLK_TOP_SYSPLL_D7 5 +#define CLK_TOP_SYSPLL1_D2 6 +#define CLK_TOP_SYSPLL1_D4 7 +#define CLK_TOP_SYSPLL1_D8 8 +#define CLK_TOP_SYSPLL1_D16 9 +#define CLK_TOP_SYSPLL2_D2 10 +#define CLK_TOP_SYSPLL2_D4 11 +#define CLK_TOP_SYSPLL2_D8 12 +#define CLK_TOP_SYSPLL3_D2 13 +#define CLK_TOP_SYSPLL3_D4 14 +#define CLK_TOP_SYSPLL4_D2 15 +#define CLK_TOP_SYSPLL4_D4 16 +#define CLK_TOP_UNIVPLL 17 +#define CLK_TOP_UNIVPLL_D2 18 +#define CLK_TOP_UNIVPLL_D3 19 +#define CLK_TOP_UNIVPLL_D5 20 +#define CLK_TOP_UNIVPLL_D7 21 +#define CLK_TOP_UNIVPLL_D26 22 +#define CLK_TOP_UNIVPLL_D52 23 +#define CLK_TOP_UNIVPLL_D108 24 +#define CLK_TOP_USB_PHY48M 25 +#define CLK_TOP_UNIVPLL1_D2 26 +#define CLK_TOP_UNIVPLL1_D4 27 +#define CLK_TOP_UNIVPLL1_D8 28 +#define CLK_TOP_UNIVPLL2_D2 29 +#define CLK_TOP_UNIVPLL2_D4 30 +#define CLK_TOP_UNIVPLL2_D8 31 +#define CLK_TOP_UNIVPLL2_D16 32 +#define CLK_TOP_UNIVPLL2_D32 33 +#define CLK_TOP_UNIVPLL3_D2 34 +#define CLK_TOP_UNIVPLL3_D4 35 +#define CLK_TOP_UNIVPLL3_D8 36 +#define CLK_TOP_MSDCPLL 37 +#define CLK_TOP_MSDCPLL_D2 38 +#define CLK_TOP_MSDCPLL_D4 39 +#define CLK_TOP_MSDCPLL_D8 40 +#define CLK_TOP_MMPLL 41 +#define CLK_TOP_MMPLL_D2 42 +#define CLK_TOP_DMPLL 43 +#define CLK_TOP_DMPLL_D2 44 +#define CLK_TOP_DMPLL_D4 45 +#define CLK_TOP_DMPLL_X2 46 +#define CLK_TOP_TVDPLL 47 +#define CLK_TOP_TVDPLL_D2 48 +#define CLK_TOP_TVDPLL_D4 49 +#define CLK_TOP_TVD2PLL 50 +#define CLK_TOP_TVD2PLL_D2 51 +#define CLK_TOP_HADDS2PLL_98M 52 +#define CLK_TOP_HADDS2PLL_294M 53 +#define CLK_TOP_HADDS2_FB 54 +#define CLK_TOP_MIPIPLL_D2 55 +#define CLK_TOP_MIPIPLL_D4 56 +#define CLK_TOP_HDMIPLL 57 +#define CLK_TOP_HDMIPLL_D2 58 +#define CLK_TOP_HDMIPLL_D3 59 +#define CLK_TOP_HDMI_SCL_RX 60 +#define CLK_TOP_HDMI_0_PIX340M 61 +#define CLK_TOP_HDMI_0_DEEP340M 62 +#define CLK_TOP_HDMI_0_PLL340M 63 +#define CLK_TOP_AUD1PLL_98M 64 +#define CLK_TOP_AUD2PLL_90M 65 +#define CLK_TOP_AUDPLL 66 +#define CLK_TOP_AUDPLL_D4 67 +#define CLK_TOP_AUDPLL_D8 68 +#define CLK_TOP_AUDPLL_D16 69 +#define CLK_TOP_AUDPLL_D24 70 +#define CLK_TOP_ETHPLL_500M 71 +#define CLK_TOP_VDECPLL 72 +#define CLK_TOP_VENCPLL 73 +#define CLK_TOP_MIPIPLL 74 +#define CLK_TOP_ARMPLL_1P3G 75 + +#define CLK_TOP_MM_SEL 76 +#define CLK_TOP_DDRPHYCFG_SEL 77 +#define CLK_TOP_MEM_SEL 78 +#define CLK_TOP_AXI_SEL 79 +#define CLK_TOP_CAMTG_SEL 80 +#define CLK_TOP_MFG_SEL 81 +#define CLK_TOP_VDEC_SEL 82 +#define CLK_TOP_PWM_SEL 83 +#define CLK_TOP_MSDC30_0_SEL 84 +#define CLK_TOP_USB20_SEL 85 +#define CLK_TOP_SPI0_SEL 86 +#define CLK_TOP_UART_SEL 87 +#define CLK_TOP_AUDINTBUS_SEL 88 +#define CLK_TOP_AUDIO_SEL 89 +#define CLK_TOP_MSDC30_2_SEL 90 +#define CLK_TOP_MSDC30_1_SEL 91 +#define CLK_TOP_DPI1_SEL 92 +#define CLK_TOP_DPI0_SEL 93 +#define CLK_TOP_SCP_SEL 94 +#define CLK_TOP_PMICSPI_SEL 95 +#define CLK_TOP_APLL_SEL 96 +#define CLK_TOP_HDMI_SEL 97 +#define CLK_TOP_TVE_SEL 98 +#define CLK_TOP_EMMC_HCLK_SEL 99 +#define CLK_TOP_NFI2X_SEL 100 +#define CLK_TOP_RTC_SEL 101 +#define CLK_TOP_OSD_SEL 102 +#define CLK_TOP_NR_SEL 103 +#define CLK_TOP_DI_SEL 104 +#define CLK_TOP_FLASH_SEL 105 +#define CLK_TOP_ASM_M_SEL 106 +#define CLK_TOP_ASM_I_SEL 107 +#define CLK_TOP_INTDIR_SEL 108 +#define CLK_TOP_HDMIRX_BIST_SEL 109 +#define CLK_TOP_ETHIF_SEL 110 +#define CLK_TOP_MS_CARD_SEL 111 +#define CLK_TOP_ASM_H_SEL 112 +#define CLK_TOP_SPI1_SEL 113 +#define CLK_TOP_CMSYS_SEL 114 +#define CLK_TOP_MSDC30_3_SEL 115 +#define CLK_TOP_HDMIRX26_24_SEL 116 +#define CLK_TOP_AUD2DVD_SEL 117 +#define CLK_TOP_8BDAC_SEL 118 +#define CLK_TOP_SPI2_SEL 119 +#define CLK_TOP_AUD_MUX1_SEL 120 +#define CLK_TOP_AUD_MUX2_SEL 121 +#define CLK_TOP_AUDPLL_MUX_SEL 122 +#define CLK_TOP_AUD_K1_SRC_SEL 123 +#define CLK_TOP_AUD_K2_SRC_SEL 124 +#define CLK_TOP_AUD_K3_SRC_SEL 125 +#define CLK_TOP_AUD_K4_SRC_SEL 126 +#define CLK_TOP_AUD_K5_SRC_SEL 127 +#define CLK_TOP_AUD_K6_SRC_SEL 128 +#define CLK_TOP_PADMCLK_SEL 129 +#define CLK_TOP_AUD_EXTCK1_DIV 130 +#define CLK_TOP_AUD_EXTCK2_DIV 131 +#define CLK_TOP_AUD_MUX1_DIV 132 +#define CLK_TOP_AUD_MUX2_DIV 133 +#define CLK_TOP_AUD_K1_SRC_DIV 134 +#define CLK_TOP_AUD_K2_SRC_DIV 135 +#define CLK_TOP_AUD_K3_SRC_DIV 136 +#define CLK_TOP_AUD_K4_SRC_DIV 137 +#define CLK_TOP_AUD_K5_SRC_DIV 138 +#define CLK_TOP_AUD_K6_SRC_DIV 139 +#define CLK_TOP_AUD_I2S1_MCLK 140 +#define CLK_TOP_AUD_I2S2_MCLK 141 +#define CLK_TOP_AUD_I2S3_MCLK 142 +#define CLK_TOP_AUD_I2S4_MCLK 143 +#define CLK_TOP_AUD_I2S5_MCLK 144 +#define CLK_TOP_AUD_I2S6_MCLK 145 +#define CLK_TOP_AUD_48K_TIMING 146 +#define CLK_TOP_AUD_44K_TIMING 147 + +#define CLK_TOP_32K_INTERNAL 148 +#define CLK_TOP_32K_EXTERNAL 149 +#define CLK_TOP_CLK26M_D8 150 +#define CLK_TOP_8BDAC 151 +#define CLK_TOP_WBG_DIG_416M 152 +#define CLK_TOP_DPI 153 +#define CLK_TOP_DSI0_LNTC_DSI 154 +#define CLK_TOP_AUD_EXT1 155 +#define CLK_TOP_AUD_EXT2 156 +#define CLK_TOP_NFI1X_PAD 157 +#define CLK_TOP_AXISEL_D4 158 #define CLK_TOP_NR 159 /* APMIXEDSYS */ -#define CLK_APMIXED_ARMPLL 0 -#define CLK_APMIXED_MAINPLL 1 -#define CLK_APMIXED_UNIVPLL 2 -#define CLK_APMIXED_MMPLL 3 -#define CLK_APMIXED_MSDCPLL 4 -#define CLK_APMIXED_TVDPLL 5 -#define CLK_APMIXED_AUD1PLL 6 -#define CLK_APMIXED_TRGPLL 7 -#define CLK_APMIXED_ETHPLL 8 -#define CLK_APMIXED_VDECPLL 9 -#define CLK_APMIXED_HADDS2PLL 10 -#define CLK_APMIXED_AUD2PLL 11 -#define CLK_APMIXED_TVD2PLL 12 -#define CLK_APMIXED_NR 13 + +#define CLK_APMIXED_ARMPLL 1 +#define CLK_APMIXED_MAINPLL 2 +#define CLK_APMIXED_UNIVPLL 3 +#define CLK_APMIXED_MMPLL 4 +#define CLK_APMIXED_MSDCPLL 5 +#define CLK_APMIXED_TVDPLL 6 +#define CLK_APMIXED_AUD1PLL 7 +#define CLK_APMIXED_TRGPLL 8 +#define CLK_APMIXED_ETHPLL 9 +#define CLK_APMIXED_VDECPLL 10 +#define CLK_APMIXED_HADDS2PLL 11 +#define CLK_APMIXED_AUD2PLL 12 +#define CLK_APMIXED_TVD2PLL 13 +#define CLK_APMIXED_HDMI_REF 14 +#define CLK_APMIXED_NR 15 + +/* DDRPHY */ + +#define CLK_DDRPHY_VENCPLL 1 +#define CLK_DDRPHY_NR 2 /* INFRACFG */ -#define CLK_INFRA_DBG 0 -#define CLK_INFRA_SMI 1 -#define CLK_INFRA_QAXI_CM4 2 -#define CLK_INFRA_AUD_SPLIN_B 3 -#define CLK_INFRA_AUDIO 4 -#define CLK_INFRA_EFUSE 5 -#define CLK_INFRA_L2C_SRAM 6 -#define CLK_INFRA_M4U 7 -#define CLK_INFRA_CONNMCU 8 -#define CLK_INFRA_TRNG 9 -#define CLK_INFRA_RAMBUFIF 10 -#define CLK_INFRA_CPUM 11 -#define CLK_INFRA_KP 12 -#define CLK_INFRA_CEC 13 -#define CLK_INFRA_IRRX 14 -#define CLK_INFRA_PMICSPI 15 -#define CLK_INFRA_PMICWRAP 16 -#define CLK_INFRA_DDCCI 17 -#define CLK_INFRA_CPUSEL 18 -#define CLK_INFRA_NR 19 + +#define CLK_INFRA_DBG 1 +#define CLK_INFRA_SMI 2 +#define CLK_INFRA_QAXI_CM4 3 +#define CLK_INFRA_AUD_SPLIN_B 4 +#define CLK_INFRA_AUDIO 5 +#define CLK_INFRA_EFUSE 6 +#define CLK_INFRA_L2C_SRAM 7 +#define CLK_INFRA_M4U 8 +#define CLK_INFRA_CONNMCU 9 +#define CLK_INFRA_TRNG 10 +#define CLK_INFRA_RAMBUFIF 11 +#define CLK_INFRA_CPUM 12 +#define CLK_INFRA_KP 13 +#define CLK_INFRA_CEC 14 +#define CLK_INFRA_IRRX 15 +#define CLK_INFRA_PMICSPI 16 +#define CLK_INFRA_PMICWRAP 17 +#define CLK_INFRA_DDCCI 18 +#define CLK_INFRA_CLK_13M 19 +#define CLK_INFRA_CPUSEL 20 +#define CLK_INFRA_NR 21 /* PERICFG */ -#define CLK_PERI_NFI 0 -#define CLK_PERI_THERM 1 -#define CLK_PERI_PWM1 2 -#define CLK_PERI_PWM2 3 -#define CLK_PERI_PWM3 4 -#define CLK_PERI_PWM4 5 -#define CLK_PERI_PWM5 6 -#define CLK_PERI_PWM6 7 -#define CLK_PERI_PWM7 8 -#define CLK_PERI_PWM 9 -#define CLK_PERI_USB0 10 -#define CLK_PERI_USB1 11 -#define CLK_PERI_AP_DMA 12 -#define CLK_PERI_MSDC30_0 13 -#define CLK_PERI_MSDC30_1 14 -#define CLK_PERI_MSDC30_2 15 -#define CLK_PERI_MSDC30_3 16 -#define CLK_PERI_MSDC50_3 17 -#define CLK_PERI_NLI 18 -#define CLK_PERI_UART0 19 -#define CLK_PERI_UART1 20 -#define CLK_PERI_UART2 21 -#define CLK_PERI_UART3 22 -#define CLK_PERI_BTIF 23 -#define CLK_PERI_I2C0 24 -#define CLK_PERI_I2C1 25 -#define CLK_PERI_I2C2 26 -#define CLK_PERI_I2C3 27 -#define CLK_PERI_AUXADC 28 -#define CLK_PERI_SPI0 39 -#define CLK_PERI_ETH 30 -#define CLK_PERI_USB0_MCU 31 - -#define CLK_PERI_USB1_MCU 32 -#define CLK_PERI_USB_SLV 33 -#define CLK_PERI_GCPU 34 -#define CLK_PERI_NFI_ECC 35 -#define CLK_PERI_NFI_PAD 36 -#define CLK_PERI_FLASH 37 -#define CLK_PERI_HOST89_INT 38 -#define CLK_PERI_HOST89_SPI 39 -#define CLK_PERI_HOST89_DVD 40 -#define CLK_PERI_SPI1 41 -#define CLK_PERI_SPI2 42 -#define CLK_PERI_FCI 43 -#define CLK_PERI_NR 44 + +#define CLK_PERI_NFI 1 +#define CLK_PERI_THERM 2 +#define CLK_PERI_PWM1 3 +#define CLK_PERI_PWM2 4 +#define CLK_PERI_PWM3 5 +#define CLK_PERI_PWM4 6 +#define CLK_PERI_PWM5 7 +#define CLK_PERI_PWM6 8 +#define CLK_PERI_PWM7 9 +#define CLK_PERI_PWM 10 +#define CLK_PERI_USB0 11 +#define CLK_PERI_USB1 12 +#define CLK_PERI_AP_DMA 13 +#define CLK_PERI_MSDC30_0 14 +#define CLK_PERI_MSDC30_1 15 +#define CLK_PERI_MSDC30_2 16 +#define CLK_PERI_MSDC30_3 17 +#define CLK_PERI_MSDC50_3 18 +#define CLK_PERI_NLI 19 +#define CLK_PERI_UART0 20 +#define CLK_PERI_UART1 21 +#define CLK_PERI_UART2 22 +#define CLK_PERI_UART3 23 +#define CLK_PERI_BTIF 24 +#define CLK_PERI_I2C0 25 +#define CLK_PERI_I2C1 26 +#define CLK_PERI_I2C2 27 +#define CLK_PERI_I2C3 28 +#define CLK_PERI_AUXADC 29 +#define CLK_PERI_SPI0 30 +#define CLK_PERI_ETH 31 +#define CLK_PERI_USB0_MCU 32 + +#define CLK_PERI_USB1_MCU 33 +#define CLK_PERI_USB_SLV 34 +#define CLK_PERI_GCPU 35 +#define CLK_PERI_NFI_ECC 36 +#define CLK_PERI_NFI_PAD 37 +#define CLK_PERI_FLASH 38 +#define CLK_PERI_HOST89_INT 39 +#define CLK_PERI_HOST89_SPI 40 +#define CLK_PERI_HOST89_DVD 41 +#define CLK_PERI_SPI1 42 +#define CLK_PERI_SPI2 43 +#define CLK_PERI_FCI 44 + +#define CLK_PERI_UART0_SEL 45 +#define CLK_PERI_UART1_SEL 46 +#define CLK_PERI_UART2_SEL 47 +#define CLK_PERI_UART3_SEL 48 +#define CLK_PERI_NR 49 /* AUDIO */ -#define CLK_AUD_AFE 0 -#define CLK_AUD_LRCK_DETECT 1 -#define CLK_AUD_I2S 2 -#define CLK_AUD_APLL_TUNER 3 -#define CLK_AUD_HDMI 4 -#define CLK_AUD_SPDF 5 -#define CLK_AUD_SPDF2 6 -#define CLK_AUD_APLL 7 -#define CLK_AUD_TML 8 -#define CLK_AUD_AHB_IDLE_EXT 9 -#define CLK_AUD_AHB_IDLE_INT 10 - -#define CLK_AUD_I2SIN1 11 -#define CLK_AUD_I2SIN2 12 -#define CLK_AUD_I2SIN3 13 -#define CLK_AUD_I2SIN4 14 -#define CLK_AUD_I2SIN5 15 -#define CLK_AUD_I2SIN6 16 -#define CLK_AUD_I2SO1 17 -#define CLK_AUD_I2SO2 18 -#define CLK_AUD_I2SO3 19 -#define CLK_AUD_I2SO4 20 -#define CLK_AUD_I2SO5 21 -#define CLK_AUD_I2SO6 22 -#define CLK_AUD_ASRCI1 23 -#define CLK_AUD_ASRCI2 24 -#define CLK_AUD_ASRCO1 25 -#define CLK_AUD_ASRCO2 26 -#define CLK_AUD_ASRC11 27 -#define CLK_AUD_ASRC12 28 -#define CLK_AUD_HDMIRX 29 -#define CLK_AUD_INTDIR 30 -#define CLK_AUD_A1SYS 31 -#define CLK_AUD_A2SYS 32 -#define CLK_AUD_AFE_CONN 33 -#define CLK_AUD_AFE_PCMIF 34 -#define CLK_AUD_AFE_MRGIF 35 - -#define CLK_AUD_MMIF_UL1 36 -#define CLK_AUD_MMIF_UL2 37 -#define CLK_AUD_MMIF_UL3 38 -#define CLK_AUD_MMIF_UL4 39 -#define CLK_AUD_MMIF_UL5 40 -#define CLK_AUD_MMIF_UL6 41 -#define CLK_AUD_MMIF_DL1 42 -#define CLK_AUD_MMIF_DL2 43 -#define CLK_AUD_MMIF_DL3 44 -#define CLK_AUD_MMIF_DL4 45 -#define CLK_AUD_MMIF_DL5 46 -#define CLK_AUD_MMIF_DL6 47 -#define CLK_AUD_MMIF_DLMCH 48 -#define CLK_AUD_MMIF_ARB1 49 -#define CLK_AUD_MMIF_AWB1 50 -#define CLK_AUD_MMIF_AWB2 51 -#define CLK_AUD_MMIF_DAI 52 - -#define CLK_AUD_DMIC1 53 -#define CLK_AUD_DMIC2 54 -#define CLK_AUD_ASRCI3 55 -#define CLK_AUD_ASRCI4 56 -#define CLK_AUD_ASRCI5 57 -#define CLK_AUD_ASRCI6 58 -#define CLK_AUD_ASRCO3 59 -#define CLK_AUD_ASRCO4 60 -#define CLK_AUD_ASRCO5 61 -#define CLK_AUD_ASRCO6 62 -#define CLK_AUD_MEM_ASRC1 63 -#define CLK_AUD_MEM_ASRC2 64 -#define CLK_AUD_MEM_ASRC3 65 -#define CLK_AUD_MEM_ASRC4 66 -#define CLK_AUD_MEM_ASRC5 67 -#define CLK_AUD_DSD_ENC 68 -#define CLK_AUD_ASRC_BRG 60 -#define CLK_AUD_NR 70 + +#define CLK_AUD_AFE 1 +#define CLK_AUD_LRCK_DETECT 2 +#define CLK_AUD_I2S 3 +#define CLK_AUD_APLL_TUNER 4 +#define CLK_AUD_HDMI 5 +#define CLK_AUD_SPDF 6 +#define CLK_AUD_SPDF2 7 +#define CLK_AUD_APLL 8 +#define CLK_AUD_TML 9 +#define CLK_AUD_AHB_IDLE_EXT 10 +#define CLK_AUD_AHB_IDLE_INT 11 + +#define CLK_AUD_I2SIN1 12 +#define CLK_AUD_I2SIN2 13 +#define CLK_AUD_I2SIN3 14 +#define CLK_AUD_I2SIN4 15 +#define CLK_AUD_I2SIN5 16 +#define CLK_AUD_I2SIN6 17 +#define CLK_AUD_I2SO1 18 +#define CLK_AUD_I2SO2 19 +#define CLK_AUD_I2SO3 20 +#define CLK_AUD_I2SO4 21 +#define CLK_AUD_I2SO5 22 +#define CLK_AUD_I2SO6 23 +#define CLK_AUD_ASRCI1 24 +#define CLK_AUD_ASRCI2 25 +#define CLK_AUD_ASRCO1 26 +#define CLK_AUD_ASRCO2 27 +#define CLK_AUD_ASRC11 28 +#define CLK_AUD_ASRC12 29 +#define CLK_AUD_HDMIRX 30 +#define CLK_AUD_INTDIR 31 +#define CLK_AUD_A1SYS 32 +#define CLK_AUD_A2SYS 33 +#define CLK_AUD_AFE_CONN 34 +#define CLK_AUD_AFE_PCMIF 35 +#define CLK_AUD_AFE_MRGIF 36 + +#define CLK_AUD_MMIF_UL1 37 +#define CLK_AUD_MMIF_UL2 38 +#define CLK_AUD_MMIF_UL3 39 +#define CLK_AUD_MMIF_UL4 40 +#define CLK_AUD_MMIF_UL5 41 +#define CLK_AUD_MMIF_UL6 42 +#define CLK_AUD_MMIF_DL1 43 +#define CLK_AUD_MMIF_DL2 44 +#define CLK_AUD_MMIF_DL3 45 +#define CLK_AUD_MMIF_DL4 46 +#define CLK_AUD_MMIF_DL5 47 +#define CLK_AUD_MMIF_DL6 48 +#define CLK_AUD_MMIF_DLMCH 49 +#define CLK_AUD_MMIF_ARB1 50 +#define CLK_AUD_MMIF_AWB1 51 +#define CLK_AUD_MMIF_AWB2 52 +#define CLK_AUD_MMIF_DAI 53 + +#define CLK_AUD_DMIC1 54 +#define CLK_AUD_DMIC2 55 +#define CLK_AUD_ASRCI3 56 +#define CLK_AUD_ASRCI4 57 +#define CLK_AUD_ASRCI5 58 +#define CLK_AUD_ASRCI6 59 +#define CLK_AUD_ASRCO3 60 +#define CLK_AUD_ASRCO4 61 +#define CLK_AUD_ASRCO5 62 +#define CLK_AUD_ASRCO6 63 +#define CLK_AUD_MEM_ASRC1 64 +#define CLK_AUD_MEM_ASRC2 65 +#define CLK_AUD_MEM_ASRC3 66 +#define CLK_AUD_MEM_ASRC4 67 +#define CLK_AUD_MEM_ASRC5 68 +#define CLK_AUD_DSD_ENC 69 +#define CLK_AUD_ASRC_BRG 70 +#define CLK_AUD_NR 71 /* MMSYS */ -#define CLK_MM_SMI_COMMON 0 -#define CLK_MM_SMI_LARB0 1 -#define CLK_MM_CMDQ 2 -#define CLK_MM_MUTEX 3 -#define CLK_MM_DISP_COLOR 4 -#define CLK_MM_DISP_BLS 5 -#define CLK_MM_DISP_WDMA 6 -#define CLK_MM_DISP_RDMA 7 -#define CLK_MM_DISP_OVL 8 -#define CLK_MM_MDP_TDSHP 9 -#define CLK_MM_MDP_WROT 10 -#define CLK_MM_MDP_WDMA 11 -#define CLK_MM_MDP_RSZ1 12 -#define CLK_MM_MDP_RSZ0 13 -#define CLK_MM_MDP_RDMA 14 -#define CLK_MM_MDP_BLS_26M 15 -#define CLK_MM_CAM_MDP 16 -#define CLK_MM_FAKE_ENG 17 -#define CLK_MM_MUTEX_32K 18 -#define CLK_MM_DISP_RDMA1 19 -#define CLK_MM_DISP_UFOE 20 - -#define CLK_MM_DSI_ENGINE 21 -#define CLK_MM_DSI_DIG 22 -#define CLK_MM_DPI_DIGL 23 -#define CLK_MM_DPI_ENGINE 24 -#define CLK_MM_DPI1_DIGL 25 -#define CLK_MM_DPI1_ENGINE 26 -#define CLK_MM_TVE_OUTPUT 27 -#define CLK_MM_TVE_INPUT 28 -#define CLK_MM_HDMI_PIXEL 29 -#define CLK_MM_HDMI_PLL 30 -#define CLK_MM_HDMI_AUDIO 31 -#define CLK_MM_HDMI_SPDIF 32 -#define CLK_MM_TVE_FMM 33 -#define CLK_MM_NR 34 + +#define CLK_MM_SMI_COMMON 1 +#define CLK_MM_SMI_LARB0 2 +#define CLK_MM_CMDQ 3 +#define CLK_MM_MUTEX 4 +#define CLK_MM_DISP_COLOR 5 +#define CLK_MM_DISP_BLS 6 +#define CLK_MM_DISP_WDMA 7 +#define CLK_MM_DISP_RDMA 8 +#define CLK_MM_DISP_OVL 9 +#define CLK_MM_MDP_TDSHP 10 +#define CLK_MM_MDP_WROT 11 +#define CLK_MM_MDP_WDMA 12 +#define CLK_MM_MDP_RSZ1 13 +#define CLK_MM_MDP_RSZ0 14 +#define CLK_MM_MDP_RDMA 15 +#define CLK_MM_MDP_BLS_26M 16 +#define CLK_MM_CAM_MDP 17 +#define CLK_MM_FAKE_ENG 18 +#define CLK_MM_MUTEX_32K 19 +#define CLK_MM_DISP_RDMA1 20 +#define CLK_MM_DISP_UFOE 21 + +#define CLK_MM_DSI_ENGINE 22 +#define CLK_MM_DSI_DIG 23 +#define CLK_MM_DPI_DIGL 24 +#define CLK_MM_DPI_ENGINE 25 +#define CLK_MM_DPI1_DIGL 26 +#define CLK_MM_DPI1_ENGINE 27 +#define CLK_MM_TVE_OUTPUT 28 +#define CLK_MM_TVE_INPUT 29 +#define CLK_MM_HDMI_PIXEL 30 +#define CLK_MM_HDMI_PLL 31 +#define CLK_MM_HDMI_AUDIO 32 +#define CLK_MM_HDMI_SPDIF 33 +#define CLK_MM_TVE_FMM 34 +#define CLK_MM_NR 35 /* IMGSYS */ -#define CLK_IMG_SMI_COMM 0 -#define CLK_IMG_RESZ 1 -#define CLK_IMG_JPGDEC_SMI 2 -#define CLK_IMG_JPGDEC 3 -#define CLK_IMG_VENC_LT 4 -#define CLK_IMG_VENC 5 -#define CLK_IMG_NR 6 + +#define CLK_IMG_SMI_COMM 1 +#define CLK_IMG_RESZ 2 +#define CLK_IMG_JPGDEC_SMI 3 +#define CLK_IMG_JPGDEC 4 +#define CLK_IMG_VENC_LT 5 +#define CLK_IMG_VENC 6 +#define CLK_IMG_NR 7 /* VDEC */ -#define CLK_VDEC_CKGEN 0 -#define CLK_VDEC_LARB 1 -#define CLK_VDEC_NR 2 + +#define CLK_VDEC_CKGEN 1 +#define CLK_VDEC_LARB 2 +#define CLK_VDEC_NR 3 /* HIFSYS */ -#define CLK_HIFSYS_USB0PHY 0 -#define CLK_HIFSYS_USB1PHY 1 -#define CLK_HIFSYS_PCIE0 2 -#define CLK_HIFSYS_PCIE1 3 -#define CLK_HIFSYS_PCIE2 4 -#define CLK_HIFSYS_NR 5 + +#define CLK_HIFSYS_USB0PHY 1 +#define CLK_HIFSYS_USB1PHY 2 +#define CLK_HIFSYS_PCIE0 3 +#define CLK_HIFSYS_PCIE1 4 +#define CLK_HIFSYS_PCIE2 5 +#define CLK_HIFSYS_NR 6 /* ETHSYS */ -#define CLK_ETHSYS_HSDMA 0 -#define CLK_ETHSYS_ESW 1 -#define CLK_ETHSYS_GP2 2 -#define CLK_ETHSYS_GP1 3 -#define CLK_ETHSYS_PCM 4 -#define CLK_ETHSYS_GDMA 5 -#define CLK_ETHSYS_I2S 6 -#define CLK_ETHSYS_CRYPTO 7 -#define CLK_ETHSYS_NR 8 +#define CLK_ETHSYS_HSDMA 1 +#define CLK_ETHSYS_ESW 2 +#define CLK_ETHSYS_GP2 3 +#define CLK_ETHSYS_GP1 4 +#define CLK_ETHSYS_PCM 5 +#define CLK_ETHSYS_GDMA 6 +#define CLK_ETHSYS_I2S 7 +#define CLK_ETHSYS_CRYPTO 8 +#define CLK_ETHSYS_NR 9 /* G3DSYS */ -#define CLK_G3DSYS_CORE 0 -#define CLK_G3DSYS_NR 1 +#define CLK_G3DSYS_CORE 1 +#define CLK_G3DSYS_NR 2 + +/* BDP */ + +#define CLK_BDP_BRG_BA 1 +#define CLK_BDP_BRG_DRAM 2 +#define CLK_BDP_LARB_DRAM 3 +#define CLK_BDP_WR_VDI_PXL 4 +#define CLK_BDP_WR_VDI_DRAM 5 +#define CLK_BDP_WR_B 6 +#define CLK_BDP_DGI_IN 7 +#define CLK_BDP_DGI_OUT 8 +#define CLK_BDP_FMT_MAST_27 9 +#define CLK_BDP_FMT_B 10 +#define CLK_BDP_OSD_B 11 +#define CLK_BDP_OSD_DRAM 12 +#define CLK_BDP_OSD_AGENT 13 +#define CLK_BDP_OSD_PXL 14 +#define CLK_BDP_RLE_B 15 +#define CLK_BDP_RLE_AGENT 16 +#define CLK_BDP_RLE_DRAM 17 +#define CLK_BDP_F27M 18 +#define CLK_BDP_F27M_VDOUT 19 +#define CLK_BDP_F27_74_74 20 +#define CLK_BDP_F2FS 21 +#define CLK_BDP_F2FS74_148 22 +#define CLK_BDP_FB 23 +#define CLK_BDP_VDO_DRAM 24 +#define CLK_BDP_VDO_2FS 25 +#define CLK_BDP_VDO_B 26 +#define CLK_BDP_WR_DI_PXL 27 +#define CLK_BDP_WR_DI_DRAM 28 +#define CLK_BDP_WR_DI_B 29 +#define CLK_BDP_NR_PXL 30 +#define CLK_BDP_NR_DRAM 31 +#define CLK_BDP_NR_B 32 + +#define CLK_BDP_RX_F 33 +#define CLK_BDP_RX_X 34 +#define CLK_BDP_RXPDT 35 +#define CLK_BDP_RX_CSCL_N 36 +#define CLK_BDP_RX_CSCL 37 +#define CLK_BDP_RX_DDCSCL_N 38 +#define CLK_BDP_RX_DDCSCL 39 +#define CLK_BDP_RX_VCO 40 +#define CLK_BDP_RX_DP 41 +#define CLK_BDP_RX_P 42 +#define CLK_BDP_RX_M 43 +#define CLK_BDP_RX_PLL 44 +#define CLK_BDP_BRG_RT_B 45 +#define CLK_BDP_BRG_RT_DRAM 46 +#define CLK_BDP_LARBRT_DRAM 47 +#define CLK_BDP_TMDS_SYN 48 +#define CLK_BDP_HDMI_MON 49 +#define CLK_BDP_NR 50 #endif /* _DT_BINDINGS_CLK_MT2701_H */ diff --git a/include/ext4fs.h b/include/ext4fs.h index d96edfd0576..41f9eb8bd33 100644 --- a/include/ext4fs.h +++ b/include/ext4fs.h @@ -34,12 +34,63 @@ struct disk_partition; #define EXT4_TOPDIR_FL 0x00020000 /* Top of directory hierarchies*/ #define EXT4_EXTENTS_FL 0x00080000 /* Inode uses extents */ #define EXT4_EXT_MAGIC 0xf30a -#define EXT4_FEATURE_RO_COMPAT_GDT_CSUM 0x0010 + +#define EXT4_FEATURE_RO_COMPAT_SPARSE_SUPER 0x0001 +#define EXT4_FEATURE_RO_COMPAT_LARGE_FILE 0x0002 +#define EXT4_FEATURE_RO_COMPAT_BTREE_DIR 0x0004 +#define EXT4_FEATURE_RO_COMPAT_HUGE_FILE 0x0008 +#define EXT4_FEATURE_RO_COMPAT_GDT_CSUM 0x0010 +#define EXT4_FEATURE_RO_COMPAT_DIR_NLINK 0x0020 +#define EXT4_FEATURE_RO_COMPAT_EXTRA_ISIZE 0x0040 +#define EXT4_FEATURE_RO_COMPAT_QUOTA 0x0100 +#define EXT4_FEATURE_RO_COMPAT_BIGALLOC 0x0200 #define EXT4_FEATURE_RO_COMPAT_METADATA_CSUM 0x0400 + +#define EXT4_FEATURE_INCOMPAT_FILETYPE 0x0002 +#define EXT4_FEATURE_INCOMPAT_RECOVER 0x0004 #define EXT4_FEATURE_INCOMPAT_EXTENTS 0x0040 #define EXT4_FEATURE_INCOMPAT_64BIT 0x0080 +#define EXT4_FEATURE_INCOMPAT_MMP 0x0100 +#define EXT4_FEATURE_INCOMPAT_FLEX_BG 0x0200 +#define EXT4_FEATURE_INCOMPAT_CSUM_SEED 0x2000 +#define EXT4_FEATURE_INCOMPAT_ENCRYPT 0x10000 + #define EXT4_INDIRECT_BLOCKS 12 +/* + * Incompat features supported by this implementation. + */ +#define EXT4_FEATURE_INCOMPAT_SUPP (EXT4_FEATURE_INCOMPAT_FILETYPE | \ + EXT4_FEATURE_INCOMPAT_RECOVER | \ + EXT4_FEATURE_INCOMPAT_EXTENTS | \ + EXT4_FEATURE_INCOMPAT_64BIT | \ + EXT4_FEATURE_INCOMPAT_FLEX_BG) + +/* + * Incompat features supported by this implementation only in a lazy + * way, good enough for reading files. + * + * - Multi mount protection (mmp) is not supported, but for read-only + * we get away with it. + * - Same for metadata_csum_seed and metadata_csum. + * - The implementation has also no clue about fscrypt, but it can read + * unencrypted files. Reading encrypted files will read garbage. + */ +#define EXT4_FEATURE_INCOMPAT_SUPP_LAZY_RO (EXT4_FEATURE_INCOMPAT_MMP | \ + EXT4_FEATURE_INCOMPAT_CSUM_SEED | \ + EXT4_FEATURE_INCOMPAT_ENCRYPT) + +/* + * Read-only compat features we support. + * If unknown ro compat features are detected, writing to the fs is denied. + */ +#define EXT4_FEATURE_RO_COMPAT_SUPP (EXT4_FEATURE_RO_COMPAT_SPARSE_SUPER | \ + EXT4_FEATURE_RO_COMPAT_LARGE_FILE | \ + EXT4_FEATURE_RO_COMPAT_HUGE_FILE | \ + EXT4_FEATURE_RO_COMPAT_GDT_CSUM | \ + EXT4_FEATURE_RO_COMPAT_DIR_NLINK | \ + EXT4_FEATURE_RO_COMPAT_EXTRA_ISIZE) + #define EXT4_BG_INODE_UNINIT 0x0001 #define EXT4_BG_BLOCK_UNINIT 0x0002 #define EXT4_BG_INODE_ZEROED 0x0004 diff --git a/include/i2c.h b/include/i2c.h index 4e59009cd93..91917f54be9 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -645,20 +645,8 @@ void i2c_early_init_f(void); */ #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */ -#if !defined(CFG_SYS_I2C_MAX_HOPS) /* no muxes used bus = i2c adapters */ -#define CFG_SYS_I2C_DIRECT_BUS 1 -#define CFG_SYS_I2C_MAX_HOPS 0 #define CFG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c) -#else -/* we use i2c muxes */ -#undef CFG_SYS_I2C_DIRECT_BUS -#endif - -/* define the I2C bus number for RTC and DTT if not already done */ -#if !defined(CFG_SYS_RTC_BUS_NUM) -#define CFG_SYS_RTC_BUS_NUM 0 -#endif struct i2c_adapter { void (*init)(struct i2c_adapter *adap, int speed, @@ -703,48 +691,13 @@ struct i2c_adapter { struct i2c_adapter *i2c_get_adapter(int index); -#ifndef CFG_SYS_I2C_DIRECT_BUS -struct i2c_mux { - int id; - char name[16]; -}; - -struct i2c_next_hop { - struct i2c_mux mux; - uint8_t chip; - uint8_t channel; -}; - -struct i2c_bus_hose { - int adapter; - struct i2c_next_hop next_hop[CFG_SYS_I2C_MAX_HOPS]; -}; -#define I2C_NULL_HOP {{-1, ""}, 0, 0} -extern struct i2c_bus_hose i2c_bus[]; - -#define I2C_ADAPTER(bus) i2c_bus[bus].adapter -#else #define I2C_ADAPTER(bus) bus -#endif #define I2C_BUS gd->cur_i2c_bus #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus)) #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus) #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr) -#ifndef CFG_SYS_I2C_DIRECT_BUS -#define I2C_MUX_PCA9540_ID 1 -#define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"} -#define I2C_MUX_PCA9542_ID 2 -#define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"} -#define I2C_MUX_PCA9544_ID 3 -#define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"} -#define I2C_MUX_PCA9547_ID 4 -#define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"} -#define I2C_MUX_PCA9548_ID 5 -#define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"} -#endif - #ifndef I2C_SOFT_DECLARATIONS # if (defined(CONFIG_AT91RM9200) || \ defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \ @@ -938,66 +891,6 @@ int i2c_set_bus_speed(unsigned int); unsigned int i2c_get_bus_speed(void); #endif /* CONFIG_SYS_I2C_LEGACY */ -/* - * only for backwardcompatibility, should go away if we switched - * completely to new multibus support. - */ -#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || defined(CFG_I2C_MULTI_BUS) -# if !defined(CFG_SYS_MAX_I2C_BUS) -# define CFG_SYS_MAX_I2C_BUS 2 -# endif -# define I2C_MULTI_BUS 1 -#else -# define CFG_SYS_MAX_I2C_BUS 1 -# define I2C_MULTI_BUS 0 -#endif - -/* NOTE: These two functions MUST be always_inline to avoid code growth! */ -static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline)); -static inline unsigned int I2C_GET_BUS(void) -{ - return I2C_MULTI_BUS ? i2c_get_bus_num() : 0; -} - -static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline)); -static inline void I2C_SET_BUS(unsigned int bus) -{ - if (I2C_MULTI_BUS) - i2c_set_bus_num(bus); -} - -/* Multi I2C definitions */ -enum { - I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7, - I2C_8, I2C_9, I2C_10, -}; - -/** - * Get FDT values for i2c bus. - * - * @param blob Device tree blbo - * Return: the number of I2C bus - */ -void board_i2c_init(const void *blob); - -/** - * Find the I2C bus number by given a FDT I2C node. - * - * @param blob Device tree blbo - * @param node FDT I2C node to find - * Return: the number of I2C bus (zero based), or -1 on error - */ -int i2c_get_bus_num_fdt(int node); - -/** - * Reset the I2C bus represented by the given a FDT I2C node. - * - * @param blob Device tree blbo - * @param node FDT I2C node to find - * Return: 0 if port was reset, -1 if not found - */ -int i2c_reset_port_fdt(const void *blob, int node); - #endif /* !CONFIG_DM_I2C */ #endif /* _I2C_H_ */ diff --git a/include/linux/compiler_types.h b/include/linux/compiler_types.h index 1a3060117f1..8b6ce9c11cd 100644 --- a/include/linux/compiler_types.h +++ b/include/linux/compiler_types.h @@ -71,6 +71,13 @@ extern void __chk_io_ptr(const volatile void __iomem *); #endif /* + * At least gcc 5.1 or clang 8 are needed. + */ +#ifndef COMPILER_HAS_GENERIC_BUILTIN_OVERFLOW +#error Unsupported compiler +#endif + +/* * Some architectures need to provide custom definitions of macros provided * by linux/compiler-*.h, and can do so using asm/compiler.h. We include that * conditionally rather than using an asm-generic wrapper in order to avoid diff --git a/include/os.h b/include/os.h index 877404a6c13..4371270a1ee 100644 --- a/include/os.h +++ b/include/os.h @@ -29,7 +29,7 @@ int os_printf(const char *format, ...); * @fd: File descriptor as returned by os_open() * @buf: Buffer to place data * @count: Number of bytes to read - * Return: number of bytes read, or -1 on error + * Return: number of bytes read, or -errno on error */ ssize_t os_read(int fd, void *buf, size_t count); @@ -39,7 +39,7 @@ ssize_t os_read(int fd, void *buf, size_t count); * @fd: File descriptor as returned by os_open() * @buf: Buffer containing data to write * @count: Number of bytes to write - * Return: number of bytes written, or -1 on error + * Return: number of bytes written, or -errno on error */ ssize_t os_write(int fd, const void *buf, size_t count); @@ -49,7 +49,7 @@ ssize_t os_write(int fd, const void *buf, size_t count); * @fd: File descriptor as returned by os_open() * @offset: File offset (based on whence) * @whence: Position offset is relative to (see below) - * Return: new file offset + * Return: new file offset, or -errno on error */ off_t os_lseek(int fd, off_t offset, int whence); diff --git a/include/spl.h b/include/spl.h index 1eebea3f981..f92089b69ea 100644 --- a/include/spl.h +++ b/include/spl.h @@ -1073,4 +1073,20 @@ static inline bool spl_decompression_enabled(void) { return IS_ENABLED(CONFIG_SPL_GZIP) || IS_ENABLED(CONFIG_SPL_LZMA); } + +/** + * spl_write_upl_handoff() - Write a Universal Payload hand-off structure + * + * @spl_image: Information about the image being booted + * Return: 0 if OK, -ve on error + */ +int spl_write_upl_handoff(struct spl_image_info *spl_image); + +/** + * spl_upl_init() - Get UPL ready for information to be added + * + * This must be called before upl_add_image(), etc. + */ +void spl_upl_init(void); + #endif diff --git a/include/test/suites.h b/include/test/suites.h index 365d5f20dfe..2ceef577f7f 100644 --- a/include/test/suites.h +++ b/include/test/suites.h @@ -63,5 +63,6 @@ int do_ut_str(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); int do_ut_time(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); int do_ut_unicode(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); +int do_ut_upl(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); #endif /* __TEST_SUITES_H__ */ diff --git a/include/upl.h b/include/upl.h new file mode 100644 index 00000000000..2ec5ef1b5cf --- /dev/null +++ b/include/upl.h @@ -0,0 +1,382 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * UPL handoff generation + * + * Copyright 2024 Google LLC + * Written by Simon Glass <sjg@chromium.org> + */ + +#ifndef __UPL_WRITE_H +#define __UPL_WRITE_H + +#ifndef USE_HOSTCC + +#include <alist.h> +#include <image.h> +#include <dm/ofnode_decl.h> + +struct unit_test_state; + +#define UPLP_ADDRESS_CELLS "#address-cells" +#define UPLP_SIZE_CELLS "#size-cells" + +#define UPLN_OPTIONS "options" +#define UPLN_UPL_PARAMS "upl-params" +#define UPLP_SMBIOS "smbios" +#define UPLP_ACPI "acpi" +#define UPLP_BOOTMODE "bootmode" +#define UPLP_ADDR_WIDTH "addr-width" +#define UPLP_ACPI_NVS_SIZE "acpi-nvs-size" + +#define UPLPATH_UPL_IMAGE "/options/upl-image" +#define UPLN_UPL_IMAGE "upl-image" +#define UPLN_IMAGE "image" +#define UPLP_FIT "fit" +#define UPLP_CONF_OFFSET "conf-offset" +#define UPLP_LOAD "load" +#define UPLP_SIZE "size" +#define UPLP_OFFSET "offset" +#define UPLP_DESCRIPTION "description" + +#define UPLN_MEMORY "memory" +#define UPLP_HOTPLUGGABLE "hotpluggable" + +#define UPLPATH_MEMORY_MAP "/memory-map" +#define UPLN_MEMORY_MAP "memory-map" +#define UPLP_USAGE "usage" + +#define UPLN_MEMORY_RESERVED "reserved-memory" +#define UPLPATH_MEMORY_RESERVED "/reserved-memory" +#define UPLP_NO_MAP "no-map" + +#define UPLN_SERIAL "serial" +#define UPLP_REG "reg" +#define UPLP_COMPATIBLE "compatible" +#define UPLP_CLOCK_FREQUENCY "clock-frequency" +#define UPLP_CURRENT_SPEED "current-speed" +#define UPLP_REG_IO_SHIFT "reg-io-shift" +#define UPLP_REG_OFFSET "reg-offset" +#define UPLP_REG_IO_WIDTH "reg-io-width" +#define UPLP_VIRTUAL_REG "virtual-reg" +#define UPLP_ACCESS_TYPE "access-type" + +#define UPLN_GRAPHICS "framebuffer" +#define UPLC_GRAPHICS "simple-framebuffer" +#define UPLP_WIDTH "width" +#define UPLP_HEIGHT "height" +#define UPLP_STRIDE "stride" +#define UPLP_GRAPHICS_FORMAT "format" + +/** + * enum upl_boot_mode - Encodes the boot mode + * + * Each is a bit number from the boot_mode mask + */ +enum upl_boot_mode { + UPLBM_FULL, + UPLBM_MINIMAL, + UPLBM_FAST, + UPLBM_DIAG, + UPLBM_DEFAULT, + UPLBM_S2, + UPLBM_S3, + UPLBM_S4, + UPLBM_S5, + UPLBM_FACTORY, + UPLBM_FLASH, + UPLBM_RECOVERY, + + UPLBM_COUNT, +}; + +/** + * struct upl_image - UPL image informaiton + * + * @load: Address image was loaded to + * @size: Size of image in bytes + * @offset: Offset of the image in the FIT (0=none) + * @desc: Description of the iamge (taken from the FIT) + */ +struct upl_image { + ulong load; + ulong size; + uint offset; + const char *description; +}; + +/** + * struct memregion - Information about a region of memory + * + * @base: Base address + * @size: Size in bytes + */ +struct memregion { + ulong base; + ulong size; +}; + +/** + * struct upl_mem - Information about physical-memory layout + * + * TODO: Figure out initial-mapped-area + * + * @region: Memory region list (struct memregion) + * @hotpluggable: true if hotpluggable + */ +struct upl_mem { + struct alist region; + bool hotpluggable; +}; + +/** + * enum upl_usage - Encodes the usage + * + * Each is a bit number from the usage mask + */ +enum upl_usage { + UPLUS_ACPI_RECLAIM, + UPLUS_ACPI_NVS, + UPLUS_BOOT_CODE, + UPLUS_BOOT_DATA, + UPLUS_RUNTIME_CODE, + UPLUS_RUNTIME_DATA, + UPLUS_COUNT +}; + +/** + * struct upl_memmap - Information about logical-memory layout + * + * @name: Node name to use + * @region: Memory region list (struct memregion) + * @usage: Memory-usage mask (enum upl_usage) + */ +struct upl_memmap { + const char *name; + struct alist region; + uint usage; +}; + +/** + * struct upl_memres - Reserved memory + * + * @name: Node name to use + * @region: Reserved memory region list (struct memregion) + * @no_map: true to indicate that a virtual mapping must not be created + */ +struct upl_memres { + const char *name; + struct alist region; + bool no_map; +}; + +enum upl_serial_access_type { + UPLSAT_MMIO, + UPLSAT_IO, +}; + +/* serial defaults */ +enum { + UPLD_REG_IO_SHIFT = 0, + UPLD_REG_OFFSET = 0, + UPLD_REG_IO_WIDTH = 1, +}; + +/** + * enum upl_access_type - Access types + * + * @UPLAT_MMIO: Memory-mapped I/O + * @UPLAT_IO: Separate I/O + */ +enum upl_access_type { + UPLAT_MMIO, + UPLAT_IO, +}; + +/** + * struct upl_serial - Serial console + * + * @compatible: Compatible string (NULL if there is no serial console) + * @clock_frequency: Input clock frequency of UART + * @current_speed: Current baud rate of UART + * @reg: List of base address and size of registers (struct memregion) + * @reg_shift_log2: log2 of distance between each register + * @reg_offset: Offset of registers from the base address + * @reg_width: Register width in bytes + * @virtual_reg: Virtual register access (0 for none) + * @access_type: Register access type to use + */ +struct upl_serial { + const char *compatible; + uint clock_frequency; + uint current_speed; + struct alist reg; + uint reg_io_shift; + uint reg_offset; + uint reg_io_width; + ulong virtual_reg; + enum upl_serial_access_type access_type; +}; + +/** + * enum upl_graphics_format - Graphics formats + * + * @UPLGF_ARGB32: 32bpp format using 0xaarrggbb + * @UPLGF_ABGR32: 32bpp format using 0xaabbggrr + * @UPLGF_ARGB64: 64bpp format using 0xaaaabbbbggggrrrr + */ +enum upl_graphics_format { + UPLGF_ARGB32, + UPLGF_ABGR32, + UPLGF_ABGR64, +}; + +/** + * @reg: List of base address and size of registers (struct memregion) + * @width: Width of display in pixels + * @height: Height of display in pixels + * @stride: Number of bytes from one line to the next + * @format: Pixel format + */ +struct upl_graphics { + struct alist reg; + uint width; + uint height; + uint stride; + enum upl_graphics_format format; +}; + +/* + * Information about the UPL state + * + * @addr_cells: Number of address cells used in the handoff + * @size_cells: Number of size cells used in the handoff + * @bootmode: Boot-mode mask (enum upl_boot_mode) + * @fit: Address of FIT image that was loaded + * @conf_offset: Offset in FIT of the configuration that was selected + * @addr_width: Adress-bus width of machine, e.g. 46 for 46 bits + * @acpi_nvs_size: Size of the ACPI non-volatile-storage area in bytes + * @image: Information about each image (struct upl_image) + * @mem: Information about physical-memory regions (struct upl_mem) + * @nennap: Information about logical-memory regions (struct upl_memmap) + * @nennap: Information about reserved-memory regions (struct upl_memres) + */ +struct upl { + int addr_cells; + int size_cells; + + ulong smbios; + ulong acpi; + uint bootmode; + ulong fit; + uint conf_offset; + uint addr_width; + uint acpi_nvs_size; + + struct alist image; + struct alist mem; + struct alist memmap; + struct alist memres; + struct upl_serial serial; + struct upl_graphics graphics; +}; + +/** + * upl_write_handoff() - Write a Unversal Payload handoff structure + * + * upl: UPL state to write + * @root: root node to write it to + * @skip_existing: Avoid recreating any nodes which already exist in the + * devicetree. For example, if there is a serial node, just leave it alone, + * since don't need to create a new one + * Return: 0 on success, -ve on error + */ +int upl_write_handoff(const struct upl *upl, ofnode root, bool skip_existing); + +/** + * upl_create_handoff_tree() - Write a Unversal Payload handoff structure + * + * upl: UPL state to write + * @treep: Returns a new tree containing the handoff + * Return: 0 on success, -ve on error + */ +int upl_create_handoff_tree(const struct upl *upl, oftree *treep); + +/** + * upl_read_handoff() - Read a Unversal Payload handoff structure + * + * upl: UPL state to read into + * @tree: Devicetree containing the data to read + * Return: 0 on success, -ve on error + */ +int upl_read_handoff(struct upl *upl, oftree tree); + +/** + * upl_get_test_data() - Fill a UPL with some test data + * + * @uts: Test state (can be uninited) + * @upl: Returns test data + * Return: 0 on success, 1 on error + */ +int upl_get_test_data(struct unit_test_state *uts, struct upl *upl); +#endif /* USE_HOSTCC */ + +#if CONFIG_IS_ENABLED(UPL) && defined(CONFIG_SPL_BUILD) + +/** + * upl_set_fit_info() - Set up basic info about the FIT + * + * @fit: Address of FIT + * @conf_offset: Configuration node being used + * @entry_addr: Entry address for next phase + */ +void upl_set_fit_info(ulong fit, int conf_offset, ulong entry_addr); + +/** + * upl_set_fit_addr() - Set up the address of the FIT + * + * @fit: Address of FIT + */ +void upl_set_fit_addr(ulong fit); + +#else +static inline void upl_set_fit_addr(ulong fit) {} +static inline void upl_set_fit_info(ulong fit, int conf_offset, + ulong entry_addr) {} +#endif /* UPL && SPL */ + +/** + * _upl_add_image() - Internal function to add a new image to the UPL + * + * @node: Image node offset in FIT + * @load_addr: Address to which images was loaded + * @size: Image size in bytes + * @desc: Description of image + * Return: 0 if OK, -ENOMEM if out of memory + */ +int _upl_add_image(int node, ulong load_addr, ulong size, const char *desc); + +/** + * upl_add_image() - Add a new image to the UPL + * + * @fit: Pointer to FIT + * @node: Image node offset in FIT + * @load_addr: Address to which images was loaded + * @size: Image size in bytes + * Return: 0 if OK, -ENOMEM if out of memory + */ +static inline int upl_add_image(const void *fit, int node, ulong load_addr, + ulong size) +{ + if (CONFIG_IS_ENABLED(UPL) && IS_ENABLED(CONFIG_SPL_BUILD)) { + const char *desc = fdt_getprop(fit, node, FIT_DESC_PROP, NULL); + + return _upl_add_image(node, load_addr, size, desc); + } + + return 0; +} + +/** upl_init() - Set up a UPL struct */ +void upl_init(struct upl *upl); + +#endif /* __UPL_WRITE_H */ diff --git a/lib/Makefile b/lib/Makefile index e389ad014f8..81b503ab526 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -147,6 +147,7 @@ endif obj-$(CONFIG_$(SPL_)OID_REGISTRY) += oid_registry.o obj-y += abuf.o +obj-y += alist.o obj-y += date.o obj-y += rtc-lib.o obj-$(CONFIG_LIB_ELF) += elf.o diff --git a/lib/alist.c b/lib/alist.c new file mode 100644 index 00000000000..b7928cad520 --- /dev/null +++ b/lib/alist.c @@ -0,0 +1,158 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Handles a contiguous list of pointers which be allocated and freed + * + * Copyright 2023 Google LLC + * Written by Simon Glass <sjg@chromium.org> + */ + +#include <alist.h> +#include <display_options.h> +#include <malloc.h> +#include <stdio.h> +#include <string.h> + +enum { + ALIST_INITIAL_SIZE = 4, /* default size of unsized list */ +}; + +bool alist_init(struct alist *lst, uint obj_size, uint start_size) +{ + /* Avoid realloc for the initial size to help malloc_simple */ + memset(lst, '\0', sizeof(struct alist)); + if (start_size) { + lst->data = calloc(obj_size, start_size); + if (!lst->data) { + lst->flags = ALISTF_FAIL; + return false; + } + lst->alloc = start_size; + } + lst->obj_size = obj_size; + + return true; +} + +void alist_uninit(struct alist *lst) +{ + free(lst->data); + + /* Clear fields to avoid any confusion */ + memset(lst, '\0', sizeof(struct alist)); +} + +/** + * alist_expand_to() - Expand a list to the given size + * + * @lst: List to modify + * @inc_by: Amount to expand to + * Return: true if OK, false if out of memory + */ +static bool alist_expand_to(struct alist *lst, uint new_alloc) +{ + void *new_data; + + if (lst->flags & ALISTF_FAIL) + return false; + + /* avoid using realloc() since it increases code size */ + new_data = malloc(lst->obj_size * new_alloc); + if (!new_data) { + lst->flags |= ALISTF_FAIL; + return false; + } + + memcpy(new_data, lst->data, lst->obj_size * lst->alloc); + free(lst->data); + + memset(new_data + lst->obj_size * lst->alloc, '\0', + lst->obj_size * (new_alloc - lst->alloc)); + lst->alloc = new_alloc; + lst->data = new_data; + + return true; +} + +bool alist_expand_by(struct alist *lst, uint inc_by) +{ + return alist_expand_to(lst, lst->alloc + inc_by); +} + +/** + * alist_expand_min() - Expand to at least the provided size + * + * Expands to the lowest power of two which can incorporate the new size + * + * @lst: alist to expand + * @min_alloc: Minimum new allocated size; if 0 then ALIST_INITIAL_SIZE is used + * Return: true if OK, false if out of memory + */ +static bool alist_expand_min(struct alist *lst, uint min_alloc) +{ + uint new_alloc; + + for (new_alloc = lst->alloc ?: ALIST_INITIAL_SIZE; + new_alloc < min_alloc;) + new_alloc *= 2; + + return alist_expand_to(lst, new_alloc); +} + +const void *alist_get_ptr(const struct alist *lst, uint index) +{ + if (index >= lst->count) + return NULL; + + return lst->data + index * lst->obj_size; +} + +void *alist_ensure_ptr(struct alist *lst, uint index) +{ + uint minsize = index + 1; + void *ptr; + + if (index >= lst->alloc && !alist_expand_min(lst, minsize)) + return NULL; + + ptr = lst->data + index * lst->obj_size; + if (minsize >= lst->count) + lst->count = minsize; + + return ptr; +} + +void *alist_add_placeholder(struct alist *lst) +{ + return alist_ensure_ptr(lst, lst->count); +} + +void *alist_add_ptr(struct alist *lst, void *obj) +{ + void *ptr; + + ptr = alist_add_placeholder(lst); + if (!ptr) + return NULL; + memcpy(ptr, obj, lst->obj_size); + + return ptr; +} + +void *alist_uninit_move_ptr(struct alist *alist, size_t *countp) +{ + void *ptr; + + if (countp) + *countp = alist->count; + if (!alist->count) { + alist_uninit(alist); + return NULL; + } + + ptr = alist->data; + + /* Clear everything out so there is no record of the data */ + alist_init(alist, alist->obj_size, 0); + + return ptr; +} diff --git a/lib/elf.c b/lib/elf.c index dc13935e103..28ec87b8e48 100644 --- a/lib/elf.c +++ b/lib/elf.c @@ -90,6 +90,10 @@ unsigned long load_elf64_image_phdr(unsigned long addr) void *dst = (void *)(ulong)phdr->p_paddr; void *src = (void *)addr + phdr->p_offset; + /* Only load PT_LOAD program header */ + if (phdr->p_type != PT_LOAD) + continue; + debug("Loading phdr %i to 0x%p (%lu bytes)\n", i, dst, (ulong)phdr->p_filesz); if (phdr->p_filesz) @@ -205,6 +209,10 @@ unsigned long load_elf_image_phdr(unsigned long addr) void *dst = (void *)(uintptr_t)phdr->p_paddr; void *src = (void *)addr + phdr->p_offset; + /* Only load PT_LOAD program header */ + if (phdr->p_type != PT_LOAD) + continue; + debug("Loading phdr %i to 0x%p (%i bytes)\n", i, dst, phdr->p_filesz); if (phdr->p_filesz) diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 5b3b26df968..5edc8dd2f9f 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -1668,8 +1668,16 @@ int fdtdec_setup(void) { int ret = -ENOENT; - /* If allowing a bloblist, check that first */ - if (CONFIG_IS_ENABLED(BLOBLIST)) { + /* + * If allowing a bloblist, check that first. There was discussion about + * adding an OF_BLOBLIST Kconfig, but this was rejected. + * + * The necessary test is whether the previous phase passed a bloblist, + * not whether this phase creates one. + */ + if (CONFIG_IS_ENABLED(BLOBLIST) && + (spl_prev_phase() != PHASE_TPL || + !IS_ENABLED(CONFIG_TPL_BLOBLIST))) { ret = bloblist_maybe_init(); if (!ret) { gd->fdt_blob = bloblist_find(BLOBLISTT_CONTROL_FDT, 0); @@ -1677,6 +1685,7 @@ int fdtdec_setup(void) gd->fdt_src = FDTSRC_BLOBLIST; log_debug("Devicetree is in bloblist at %p\n", gd->fdt_blob); + ret = 0; } else { log_debug("No FDT found in bloblist\n"); ret = -ENOENT; diff --git a/lib/strto.c b/lib/strto.c index 5157332d6c1..f83ac67c666 100644 --- a/lib/strto.c +++ b/lib/strto.c @@ -236,12 +236,14 @@ const char **str_to_list(const char *instr) return NULL; /* count the number of space-separated strings */ - for (count = *str != '\0', p = str; *p; p++) { + for (count = 0, p = str; *p; p++) { if (*p == ' ') { count++; *p = '\0'; } } + if (p != str && p[-1]) + count++; /* allocate the pointer array, allowing for a NULL terminator */ ptr = calloc(count + 1, sizeof(char *)); diff --git a/net/wget.c b/net/wget.c index f1dd7abeff6..945bfd26693 100644 --- a/net/wget.c +++ b/net/wget.c @@ -244,7 +244,7 @@ static void wget_connected(uchar *pkt, unsigned int tcp_seq_num, pkt_in_q = (void *)image_load_addr + PKT_QUEUE_OFFSET + (pkt_q_idx * PKT_QUEUE_PACKET_SIZE); - ptr1 = map_sysmem((phys_addr_t)pkt_in_q, len); + ptr1 = map_sysmem((ulong)pkt_in_q, len); memcpy(ptr1, pkt, len); unmap_sysmem(ptr1); @@ -314,9 +314,8 @@ static void wget_connected(uchar *pkt, unsigned int tcp_seq_num, for (i = 0; i < pkt_q_idx; i++) { int err; - ptr1 = map_sysmem( - (phys_addr_t)(pkt_q[i].pkt), - pkt_q[i].len); + ptr1 = map_sysmem((ulong)pkt_q[i].pkt, + pkt_q[i].len); err = store_block(ptr1, pkt_q[i].tcp_seq_num - initial_data_seq_num, diff --git a/test/boot/Makefile b/test/boot/Makefile index 068522cb9e0..8ec5daa7bfe 100644 --- a/test/boot/Makefile +++ b/test/boot/Makefile @@ -13,3 +13,5 @@ ifdef CONFIG_OF_LIVE obj-$(CONFIG_BOOTMETH_VBE_SIMPLE) += vbe_simple.o endif obj-$(CONFIG_BOOTMETH_VBE) += vbe_fixup.o + +obj-$(CONFIG_UPL) += upl.o diff --git a/test/boot/upl.c b/test/boot/upl.c new file mode 100644 index 00000000000..364fb0526e4 --- /dev/null +++ b/test/boot/upl.c @@ -0,0 +1,437 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * UPL handoff testing + * + * Copyright 2024 Google LLC + * Written by Simon Glass <sjg@chromium.org> + */ + +#include <abuf.h> +#include <mapmem.h> +#include <upl.h> +#include <dm/ofnode.h> +#include <test/suites.h> +#include <test/test.h> +#include <test/ut.h> +#include "bootstd_common.h" + +/* Declare a new upl test */ +#define UPL_TEST(_name, _flags) UNIT_TEST(_name, _flags, upl_test) + +static int add_region(struct unit_test_state *uts, struct alist *lst, + ulong base, ulong size) +{ + struct memregion region; + + region.base = base; + region.size = size; + ut_assertnonnull(alist_add(lst, region)); + + return 0; +} + +int upl_get_test_data(struct unit_test_state *uts, struct upl *upl) +{ + struct upl_memmap memmap; + struct upl_memres memres; + struct upl_image img; + struct upl_mem mem; + + upl_init(upl); + + upl->addr_cells = 1; + upl->size_cells = 1; + upl->smbios = 0x123; + upl->acpi = 0x456; + upl->bootmode = BIT(UPLBM_DEFAULT) | BIT(UPLBM_S3); + upl->fit = 0x789; + upl->conf_offset = 0x234; + upl->addr_width = 46; + upl->acpi_nvs_size = 0x100; + + /* image[0] */ + img.load = 0x1; + img.size = 0x2; + img.offset = 0x3; + img.description = "U-Boot"; + ut_assertnonnull(alist_add(&upl->image, img)); + + /* image[1] */ + img.load = 0x4; + img.size = 0x5; + img.offset = 0x6; + img.description = "ATF"; + ut_assertnonnull(alist_add(&upl->image, img)); + + /* mem[0] : 3 regions */ + memset(&mem, '\0', sizeof(mem)); + alist_init_struct(&mem.region, struct memregion); + ut_assertok(add_region(uts, &mem.region, 0x10, 0x20)); + ut_assertok(add_region(uts, &mem.region, 0x30, 0x40)); + ut_assertok(add_region(uts, &mem.region, 0x40, 0x50)); + ut_assertnonnull(alist_add(&upl->mem, mem)); + + /* mem[0] : 1 region */ + alist_init_struct(&mem.region, struct memregion); + ut_assertok(add_region(uts, &mem.region, 0x70, 0x80)); + mem.hotpluggable = true; + ut_assertnonnull(alist_add(&upl->mem, mem)); + mem.hotpluggable = false; + + /* memmap[0] : 5 regions */ + alist_init_struct(&memmap.region, struct memregion); + memmap.name = "acpi"; + memmap.usage = BIT(UPLUS_ACPI_RECLAIM); + ut_assertok(add_region(uts, &memmap.region, 0x11, 0x12)); + ut_assertok(add_region(uts, &memmap.region, 0x13, 0x14)); + ut_assertok(add_region(uts, &memmap.region, 0x15, 0x16)); + ut_assertok(add_region(uts, &memmap.region, 0x17, 0x18)); + ut_assertok(add_region(uts, &memmap.region, 0x19, 0x1a)); + ut_assertnonnull(alist_add(&upl->memmap, memmap)); + + /* memmap[1] : 1 region */ + memmap.name = "u-boot"; + memmap.usage = BIT(UPLUS_BOOT_DATA); + alist_init_struct(&memmap.region, struct memregion); + ut_assertok(add_region(uts, &memmap.region, 0x21, 0x22)); + ut_assertnonnull(alist_add(&upl->memmap, memmap)); + + /* memmap[2] : 1 region */ + alist_init_struct(&memmap.region, struct memregion); + memmap.name = "efi"; + memmap.usage = BIT(UPLUS_RUNTIME_CODE); + ut_assertok(add_region(uts, &memmap.region, 0x23, 0x24)); + ut_assertnonnull(alist_add(&upl->memmap, memmap)); + + /* memmap[3]: 2 regions */ + alist_init_struct(&memmap.region, struct memregion); + memmap.name = "empty"; + memmap.usage = 0; + ut_assertok(add_region(uts, &memmap.region, 0x25, 0x26)); + ut_assertok(add_region(uts, &memmap.region, 0x27, 0x28)); + ut_assertnonnull(alist_add(&upl->memmap, memmap)); + + /* memmap[4]: 1 region */ + alist_init_struct(&memmap.region, struct memregion); + memmap.name = "acpi-things"; + memmap.usage = BIT(UPLUS_RUNTIME_CODE) | BIT(UPLUS_ACPI_NVS); + ut_assertok(add_region(uts, &memmap.region, 0x29, 0x2a)); + ut_assertnonnull(alist_add(&upl->memmap, memmap)); + + /* memres[0]: 1 region */ + alist_init_struct(&memres.region, struct memregion); + memset(&memres, '\0', sizeof(memres)); + memres.name = "mmio"; + ut_assertok(add_region(uts, &memres.region, 0x2b, 0x2c)); + ut_assertnonnull(alist_add(&upl->memres, memres)); + + /* memres[1]: 2 regions */ + alist_init_struct(&memres.region, struct memregion); + memres.name = "memory"; + ut_assertok(add_region(uts, &memres.region, 0x2d, 0x2e)); + ut_assertok(add_region(uts, &memres.region, 0x2f, 0x30)); + memres.no_map = true; + ut_assertnonnull(alist_add(&upl->memres, memres)); + + upl->serial.compatible = "ns16550a"; + upl->serial.clock_frequency = 1843200; + upl->serial.current_speed = 115200; + alist_init_struct(&upl->serial.reg, struct memregion); + ut_assertok(add_region(uts, &upl->serial.reg, 0xf1de0000, 0x100)); + upl->serial.reg_io_shift = 2; + upl->serial.reg_offset = 0x40; + upl->serial.reg_io_width = 1; + upl->serial.virtual_reg = 0x20000000; + upl->serial.access_type = UPLSAT_MMIO; + + alist_init_struct(&upl->graphics.reg, struct memregion); + ut_assertok(add_region(uts, &upl->graphics.reg, 0xd0000000, 0x10000000)); + upl->graphics.width = 1280; + upl->graphics.height = 1280; + upl->graphics.stride = upl->graphics.width * 4; + upl->graphics.format = UPLGF_ARGB32; + + return 0; +} + +static int compare_upl_image(struct unit_test_state *uts, + const struct upl_image *base, + const struct upl_image *cmp) +{ + ut_asserteq(base->load, cmp->load); + ut_asserteq(base->size, cmp->size); + ut_asserteq(base->offset, cmp->offset); + ut_asserteq_str(base->description, cmp->description); + + return 0; +} + +static int compare_upl_memregion(struct unit_test_state *uts, + const struct memregion *base, + const struct memregion *cmp) +{ + ut_asserteq(base->base, cmp->base); + ut_asserteq(base->size, cmp->size); + + return 0; +} + +static int compare_upl_mem(struct unit_test_state *uts, + const struct upl_mem *base, + const struct upl_mem *cmp) +{ + int i; + + ut_asserteq(base->region.count, cmp->region.count); + ut_asserteq(base->hotpluggable, cmp->hotpluggable); + for (i = 0; i < base->region.count; i++) { + ut_assertok(compare_upl_memregion(uts, + alist_get(&base->region, i, struct memregion), + alist_get(&cmp->region, i, struct memregion))); + } + + return 0; +} + +static int check_device_name(struct unit_test_state *uts, const char *base, + const char *cmp) +{ + const char *p; + + p = strchr(cmp, '@'); + if (p) { + ut_assertnonnull(p); + ut_asserteq_strn(base, cmp); + ut_asserteq(p - cmp, strlen(base)); + } else { + ut_asserteq_str(base, cmp); + } + + return 0; +} + +static int compare_upl_memmap(struct unit_test_state *uts, + const struct upl_memmap *base, + const struct upl_memmap *cmp) +{ + int i; + + ut_assertok(check_device_name(uts, base->name, cmp->name)); + ut_asserteq(base->region.count, cmp->region.count); + ut_asserteq(base->usage, cmp->usage); + for (i = 0; i < base->region.count; i++) + ut_assertok(compare_upl_memregion(uts, + alist_get(&base->region, i, struct memregion), + alist_get(&cmp->region, i, struct memregion))); + + return 0; +} + +static int compare_upl_memres(struct unit_test_state *uts, + const struct upl_memres *base, + const struct upl_memres *cmp) +{ + int i; + + ut_assertok(check_device_name(uts, base->name, cmp->name)); + ut_asserteq(base->region.count, cmp->region.count); + ut_asserteq(base->no_map, cmp->no_map); + for (i = 0; i < base->region.count; i++) + ut_assertok(compare_upl_memregion(uts, + alist_get(&base->region, i, struct memregion), + alist_get(&cmp->region, i, struct memregion))); + + return 0; +} + +static int compare_upl_serial(struct unit_test_state *uts, + struct upl_serial *base, struct upl_serial *cmp) +{ + int i; + + ut_asserteq_str(base->compatible, cmp->compatible); + ut_asserteq(base->clock_frequency, cmp->clock_frequency); + ut_asserteq(base->current_speed, cmp->current_speed); + for (i = 0; i < base->reg.count; i++) + ut_assertok(compare_upl_memregion(uts, + alist_get(&base->reg, i, struct memregion), + alist_get(&cmp->reg, i, struct memregion))); + ut_asserteq(base->reg_io_shift, cmp->reg_io_shift); + ut_asserteq(base->reg_offset, cmp->reg_offset); + ut_asserteq(base->reg_io_width, cmp->reg_io_width); + ut_asserteq(base->virtual_reg, cmp->virtual_reg); + ut_asserteq(base->access_type, cmp->access_type); + + return 0; +} + +static int compare_upl_graphics(struct unit_test_state *uts, + struct upl_graphics *base, + struct upl_graphics *cmp) +{ + int i; + + for (i = 0; i < base->reg.count; i++) + ut_assertok(compare_upl_memregion(uts, + alist_get(&base->reg, i, struct memregion), + alist_get(&cmp->reg, i, struct memregion))); + ut_asserteq(base->width, cmp->width); + ut_asserteq(base->height, cmp->height); + ut_asserteq(base->stride, cmp->stride); + ut_asserteq(base->format, cmp->format); + + return 0; +} + +static int compare_upl(struct unit_test_state *uts, struct upl *base, + struct upl *cmp) +{ + int i; + + ut_asserteq(base->addr_cells, cmp->addr_cells); + ut_asserteq(base->size_cells, cmp->size_cells); + + ut_asserteq(base->smbios, cmp->smbios); + ut_asserteq(base->acpi, cmp->acpi); + ut_asserteq(base->bootmode, cmp->bootmode); + ut_asserteq(base->fit, cmp->fit); + ut_asserteq(base->conf_offset, cmp->conf_offset); + ut_asserteq(base->addr_width, cmp->addr_width); + ut_asserteq(base->acpi_nvs_size, cmp->acpi_nvs_size); + + ut_asserteq(base->image.count, cmp->image.count); + for (i = 0; i < base->image.count; i++) + ut_assertok(compare_upl_image(uts, + alist_get(&base->image, i, struct upl_image), + alist_get(&cmp->image, i, struct upl_image))); + + ut_asserteq(base->mem.count, cmp->mem.count); + for (i = 0; i < base->mem.count; i++) + ut_assertok(compare_upl_mem(uts, + alist_get(&base->mem, i, struct upl_mem), + alist_get(&cmp->mem, i, struct upl_mem))); + + ut_asserteq(base->memmap.count, cmp->memmap.count); + for (i = 0; i < base->memmap.count; i++) + ut_assertok(compare_upl_memmap(uts, + alist_get(&base->memmap, i, struct upl_memmap), + alist_get(&cmp->memmap, i, struct upl_memmap))); + + ut_asserteq(base->memres.count, cmp->memres.count); + for (i = 0; i < base->memres.count; i++) + ut_assertok(compare_upl_memres(uts, + alist_get(&base->memres, i, struct upl_memres), + alist_get(&cmp->memres, i, struct upl_memres))); + + ut_assertok(compare_upl_serial(uts, &base->serial, &cmp->serial)); + ut_assertok(compare_upl_graphics(uts, &base->graphics, &cmp->graphics)); + + return 0; +} + +/* Basic test of writing and reading UPL handoff */ +static int upl_test_base(struct unit_test_state *uts) +{ + oftree tree, check_tree; + struct upl upl, check; + struct abuf buf; + + if (!CONFIG_IS_ENABLED(OFNODE_MULTI_TREE)) + return -EAGAIN; /* skip test */ + ut_assertok(upl_get_test_data(uts, &upl)); + + ut_assertok(upl_create_handoff_tree(&upl, &tree)); + ut_assertok(oftree_to_fdt(tree, &buf)); + + /* + * strings in check_tree and therefore check are only valid so long as + * buf stays around. As soon as we call abuf_uninit they go away + */ + check_tree = oftree_from_fdt(abuf_data(&buf)); + ut_assert(ofnode_valid(oftree_path(check_tree, "/"))); + + ut_assertok(upl_read_handoff(&check, check_tree)); + ut_assertok(compare_upl(uts, &upl, &check)); + abuf_uninit(&buf); + + return 0; +} +UPL_TEST(upl_test_base, 0); + +/* Test 'upl info' command */ +static int upl_test_info(struct unit_test_state *uts) +{ + gd_set_upl(NULL); + ut_assertok(run_command("upl info", 0)); + ut_assert_nextline("UPL state: inactive"); + ut_assert_console_end(); + + gd_set_upl((struct upl *)uts); /* set it to any non-zero value */ + ut_assertok(run_command("upl info", 0)); + ut_assert_nextline("UPL state: active"); + ut_assert_console_end(); + gd_set_upl(NULL); + + return 0; +} +UPL_TEST(upl_test_info, UT_TESTF_CONSOLE_REC); + +/* Test 'upl read' and 'upl_write' commands */ +static int upl_test_read_write(struct unit_test_state *uts) +{ + ulong addr; + + if (!CONFIG_IS_ENABLED(OFNODE_MULTI_TREE)) + return -EAGAIN; /* skip test */ + ut_assertok(run_command("upl write", 0)); + + addr = env_get_hex("upladdr", 0); + ut_assert_nextline("UPL handoff written to %lx size %lx", addr, + env_get_hex("uplsize", 0)); + ut_assert_console_end(); + + ut_assertok(run_command("upl read ${upladdr}", 0)); + ut_assert_nextline("Reading UPL at %lx", addr); + ut_assert_console_end(); + + return 0; +} +UPL_TEST(upl_test_read_write, UT_TESTF_CONSOLE_REC); + +/* Test UPL passthrough */ +static int upl_test_info_norun(struct unit_test_state *uts) +{ + const struct upl_image *img; + struct upl *upl = gd_upl(); + const void *fit; + + ut_assertok(run_command("upl info -v", 0)); + ut_assert_nextline("UPL state: active"); + ut_assert_nextline("fit %lx", upl->fit); + ut_assert_nextline("conf_offset %x", upl->conf_offset); + ut_assert_nextlinen("image 0"); + ut_assert_nextlinen("image 1"); + ut_assert_console_end(); + + /* check the offsets */ + fit = map_sysmem(upl->fit, 0); + ut_asserteq_str("conf-1", fdt_get_name(fit, upl->conf_offset, NULL)); + + ut_asserteq(2, upl->image.count); + + img = alist_get(&upl->image, 1, struct upl_image); + ut_asserteq_str("firmware-1", fdt_get_name(fit, img->offset, NULL)); + ut_asserteq(CONFIG_TEXT_BASE, img->load); + + return 0; +} +UPL_TEST(upl_test_info_norun, UT_TESTF_CONSOLE_REC | UT_TESTF_MANUAL); + +int do_ut_upl(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) +{ + struct unit_test *tests = UNIT_TEST_SUITE_START(upl_test); + const int n_ents = UNIT_TEST_SUITE_COUNT(upl_test); + + return cmd_ut_category("cmd_upl", "cmd_upl_", tests, n_ents, argc, + argv); +} diff --git a/test/cmd/wget.c b/test/cmd/wget.c index 356a4dcd8fa..b0feb21dc41 100644 --- a/test/cmd/wget.c +++ b/test/cmd/wget.c @@ -26,6 +26,8 @@ #define SHIFT_TO_TCPHDRLEN_FIELD(x) ((x) << 4) #define LEN_B_TO_DW(x) ((x) >> 2) +int net_set_ack_options(union tcp_build_pkt *b); + static int sb_arp_handler(struct udevice *dev, void *packet, unsigned int len) { @@ -105,6 +107,10 @@ static int sb_ack_handler(struct udevice *dev, void *packet, const char *payload1 = "HTTP/1.1 200 OK\r\n" "Content-Length: 30\r\n\r\n\r\n" "<html><body>Hi</body></html>\r\n"; + union tcp_build_pkt *b = (union tcp_build_pkt *)tcp; + const int recv_payload_len = len - net_set_ack_options(b) - IP_HDR_SIZE - ETHER_HDR_SIZE; + static int next_seq; + const int bottom_payload_len = 10; /* Don't allow the buffer to overrun */ if (priv->recv_packets >= PKTBUFSRX) @@ -119,13 +125,31 @@ static int sb_ack_handler(struct udevice *dev, void *packet, tcp_send->tcp_dst = tcp->tcp_src; data = (void *)tcp_send + IP_TCP_HDR_SIZE; - if (ntohl(tcp->tcp_seq) == 1 && ntohl(tcp->tcp_ack) == 1) { + if (ntohl(tcp->tcp_seq) == 1 && ntohl(tcp->tcp_ack) == 1 && recv_payload_len == 0) { + // ignore ACK for three-way handshaking + return 0; + } else if (ntohl(tcp->tcp_seq) == 1 && ntohl(tcp->tcp_ack) == 1) { + // recv HTTP request message and reply top half data tcp_send->tcp_seq = htonl(ntohl(tcp->tcp_ack)); - tcp_send->tcp_ack = htonl(ntohl(tcp->tcp_seq) + 1); - payload_len = strlen(payload1); + tcp_send->tcp_ack = htonl(ntohl(tcp->tcp_seq) + recv_payload_len); + + payload_len = strlen(payload1) - bottom_payload_len; memcpy(data, payload1, payload_len); tcp_send->tcp_flags = TCP_ACK; - } else if (ntohl(tcp->tcp_seq) == 2) { + + next_seq = ntohl(tcp_send->tcp_seq) + payload_len; + } else if (ntohl(tcp->tcp_ack) == next_seq) { + // reply bottom half data + const int top_payload_len = strlen(payload1) - bottom_payload_len; + + tcp_send->tcp_seq = htonl(next_seq); + tcp_send->tcp_ack = htonl(ntohl(tcp->tcp_seq) + recv_payload_len); + + payload_len = bottom_payload_len; + memcpy(data, payload1 + top_payload_len, payload_len); + tcp_send->tcp_flags = TCP_ACK; + } else { + // close connection tcp_send->tcp_seq = htonl(ntohl(tcp->tcp_ack)); tcp_send->tcp_ack = htonl(ntohl(tcp->tcp_seq) + 1); payload_len = 0; @@ -148,11 +172,9 @@ static int sb_ack_handler(struct udevice *dev, void *packet, pkt_len, IPPROTO_TCP); - if (ntohl(tcp->tcp_seq) == 1 || ntohl(tcp->tcp_seq) == 2) { - priv->recv_packet_length[priv->recv_packets] = - ETHER_HDR_SIZE + IP_TCP_HDR_SIZE + payload_len; - ++priv->recv_packets; - } + priv->recv_packet_length[priv->recv_packets] = + ETHER_HDR_SIZE + IP_TCP_HDR_SIZE + payload_len; + ++priv->recv_packets; return 0; } diff --git a/test/cmd_ut.c b/test/cmd_ut.c index 4e4aa8f1cb2..38ba89ee33e 100644 --- a/test/cmd_ut.c +++ b/test/cmd_ut.c @@ -133,6 +133,9 @@ static struct cmd_tbl cmd_ut_sub[] = { #ifdef CONFIG_CMD_SEAMA U_BOOT_CMD_MKENT(seama, CONFIG_SYS_MAXARGS, 1, do_ut_seama, "", ""), #endif +#ifdef CONFIG_CMD_UPL + U_BOOT_CMD_MKENT(upl, CONFIG_SYS_MAXARGS, 1, do_ut_upl, "", ""), +#endif }; static int do_ut_all(struct cmd_tbl *cmdtp, int flag, int argc, diff --git a/test/env/cmd_ut_env.c b/test/env/cmd_ut_env.c index 13e0998341e..238cf310367 100644 --- a/test/env/cmd_ut_env.c +++ b/test/env/cmd_ut_env.c @@ -9,6 +9,33 @@ #include <test/suites.h> #include <test/ut.h> +static int env_test_env_cmd(struct unit_test_state *uts) +{ + ut_assertok(run_command("setenv non_default_var1 1", 0)); + ut_assert_console_end(); + + ut_assertok(run_command("setenv non_default_var2 1", 0)); + ut_assert_console_end(); + + ut_assertok(run_command("env print non_default_var1", 0)); + ut_assert_nextline("non_default_var1=1"); + ut_assert_console_end(); + + ut_assertok(run_command("env default non_default_var1 non_default_var2", 0)); + ut_assert_nextline("WARNING: 'non_default_var1' not in imported env, deleting it!"); + ut_assert_nextline("WARNING: 'non_default_var2' not in imported env, deleting it!"); + ut_assert_console_end(); + + ut_asserteq(1, run_command("env exists non_default_var1", 0)); + ut_assert_console_end(); + + ut_asserteq(1, run_command("env exists non_default_var2", 0)); + ut_assert_console_end(); + + return 0; +} +ENV_TEST(env_test_env_cmd, UT_TESTF_CONSOLE_REC); + int do_ut_env(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { struct unit_test *tests = UNIT_TEST_SUITE_START(env_test); diff --git a/test/image/spl_load_os.c b/test/image/spl_load_os.c index 7d5fb9b07e0..56105a59236 100644 --- a/test/image/spl_load_os.c +++ b/test/image/spl_load_os.c @@ -10,63 +10,12 @@ #include <test/spl.h> #include <test/ut.h> -/* Context used for this test */ -struct text_ctx { - int fd; -}; - -static ulong read_fit_image(struct spl_load_info *load, ulong offset, - ulong size, void *buf) -{ - struct text_ctx *text_ctx = load->priv; - off_t ret; - ssize_t res; - - ret = os_lseek(text_ctx->fd, offset, OS_SEEK_SET); - if (ret != offset) { - printf("Failed to seek to %zx, got %zx (errno=%d)\n", offset, - ret, errno); - return 0; - } - - res = os_read(text_ctx->fd, buf, size); - if (res == -1) { - printf("Failed to read %lx bytes, got %ld (errno=%d)\n", - size, res, errno); - return 0; - } - - return size; -} - static int spl_test_load(struct unit_test_state *uts) { struct spl_image_info image; - struct legacy_img_hdr *header; - struct text_ctx text_ctx; - struct spl_load_info load; char fname[256]; - int ret; - int fd; - - memset(&load, '\0', sizeof(load)); - spl_set_bl_len(&load, 512); - load.read = read_fit_image; - - ret = sandbox_find_next_phase(fname, sizeof(fname), true); - if (ret) - ut_assertf(0, "%s not found, error %d\n", fname, ret); - - header = spl_get_load_buffer(-sizeof(*header), sizeof(*header)); - - fd = os_open(fname, OS_O_RDONLY); - ut_assert(fd >= 0); - ut_asserteq(512, os_read(fd, header, 512)); - text_ctx.fd = fd; - - load.priv = &text_ctx; - ut_assertok(spl_load_simple_fit(&image, &load, 0, header)); + ut_assertok(sandbox_spl_load_fit(fname, sizeof(fname), &image)); return 0; } diff --git a/test/lib/Makefile b/test/lib/Makefile index e75a263e6a4..70f14c46b1e 100644 --- a/test/lib/Makefile +++ b/test/lib/Makefile @@ -5,6 +5,7 @@ ifeq ($(CONFIG_SPL_BUILD),) obj-y += cmd_ut_lib.o obj-y += abuf.o +obj-y += alist.o obj-$(CONFIG_EFI_LOADER) += efi_device_path.o obj-$(CONFIG_EFI_SECURE_BOOT) += efi_image_region.o obj-y += hexdump.o diff --git a/test/lib/alist.c b/test/lib/alist.c new file mode 100644 index 00000000000..d41845c7e6c --- /dev/null +++ b/test/lib/alist.c @@ -0,0 +1,242 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2023 Google LLC + * Written by Simon Glass <sjg@chromium.org> + */ + +#include <alist.h> +#include <string.h> +#include <test/lib.h> +#include <test/test.h> +#include <test/ut.h> + +struct my_struct { + uint val; + uint other_val; +}; + +enum { + obj_size = sizeof(struct my_struct), +}; + +/* Test alist_init() */ +static int lib_test_alist_init(struct unit_test_state *uts) +{ + struct alist lst; + ulong start; + + start = ut_check_free(); + + /* with a size of 0, the fields should be inited, with no memory used */ + memset(&lst, '\xff', sizeof(lst)); + ut_assert(alist_init_struct(&lst, struct my_struct)); + ut_asserteq_ptr(NULL, lst.data); + ut_asserteq(0, lst.count); + ut_asserteq(0, lst.alloc); + ut_assertok(ut_check_delta(start)); + alist_uninit(&lst); + ut_asserteq_ptr(NULL, lst.data); + ut_asserteq(0, lst.count); + ut_asserteq(0, lst.alloc); + + /* use an impossible size */ + ut_asserteq(false, alist_init(&lst, obj_size, + CONFIG_SYS_MALLOC_LEN)); + ut_assertnull(lst.data); + ut_asserteq(0, lst.count); + ut_asserteq(0, lst.alloc); + + /* use a small size */ + ut_assert(alist_init(&lst, obj_size, 4)); + ut_assertnonnull(lst.data); + ut_asserteq(0, lst.count); + ut_asserteq(4, lst.alloc); + + /* free it */ + alist_uninit(&lst); + ut_asserteq_ptr(NULL, lst.data); + ut_asserteq(0, lst.count); + ut_asserteq(0, lst.alloc); + ut_assertok(ut_check_delta(start)); + + /* Check for memory leaks */ + ut_assertok(ut_check_delta(start)); + + return 0; +} +LIB_TEST(lib_test_alist_init, 0); + +/* Test alist_get() and alist_getd() */ +static int lib_test_alist_get(struct unit_test_state *uts) +{ + struct alist lst; + ulong start; + void *ptr; + + start = ut_check_free(); + + ut_assert(alist_init(&lst, obj_size, 3)); + ut_asserteq(0, lst.count); + ut_asserteq(3, lst.alloc); + + ut_assertnull(alist_get_ptr(&lst, 2)); + ut_assertnull(alist_get_ptr(&lst, 3)); + + ptr = alist_ensure_ptr(&lst, 1); + ut_assertnonnull(ptr); + ut_asserteq(2, lst.count); + ptr = alist_ensure_ptr(&lst, 2); + ut_asserteq(3, lst.count); + ut_assertnonnull(ptr); + + ptr = alist_ensure_ptr(&lst, 3); + ut_assertnonnull(ptr); + ut_asserteq(4, lst.count); + ut_asserteq(6, lst.alloc); + + ut_assertnull(alist_get_ptr(&lst, 4)); + + alist_uninit(&lst); + + /* Check for memory leaks */ + ut_assertok(ut_check_delta(start)); + + return 0; +} +LIB_TEST(lib_test_alist_get, 0); + +/* Test alist_has() */ +static int lib_test_alist_has(struct unit_test_state *uts) +{ + struct alist lst; + ulong start; + void *ptr; + + start = ut_check_free(); + + ut_assert(alist_init(&lst, obj_size, 3)); + + ut_assert(!alist_has(&lst, 0)); + ut_assert(!alist_has(&lst, 1)); + ut_assert(!alist_has(&lst, 2)); + ut_assert(!alist_has(&lst, 3)); + + /* create a new one to force expansion */ + ptr = alist_ensure_ptr(&lst, 4); + ut_assertnonnull(ptr); + + ut_assert(alist_has(&lst, 0)); + ut_assert(alist_has(&lst, 1)); + ut_assert(alist_has(&lst, 2)); + ut_assert(alist_has(&lst, 3)); + ut_assert(alist_has(&lst, 4)); + ut_assert(!alist_has(&lst, 5)); + + alist_uninit(&lst); + + /* Check for memory leaks */ + ut_assertok(ut_check_delta(start)); + + return 0; +} +LIB_TEST(lib_test_alist_has, 0); + +/* Test alist_ensure() */ +static int lib_test_alist_ensure(struct unit_test_state *uts) +{ + struct my_struct *ptr3, *ptr4; + struct alist lst; + ulong start; + + start = ut_check_free(); + + ut_assert(alist_init_struct(&lst, struct my_struct)); + ut_asserteq(obj_size, lst.obj_size); + ut_asserteq(0, lst.count); + ut_asserteq(0, lst.alloc); + ptr3 = alist_ensure_ptr(&lst, 3); + ut_asserteq(4, lst.count); + ut_asserteq(4, lst.alloc); + ut_assertnonnull(ptr3); + ptr3->val = 3; + + ptr4 = alist_ensure_ptr(&lst, 4); + ut_asserteq(8, lst.alloc); + ut_asserteq(5, lst.count); + ut_assertnonnull(ptr4); + ptr4->val = 4; + ut_asserteq(4, alist_get(&lst, 4, struct my_struct)->val); + + ut_asserteq_ptr(ptr4, alist_ensure(&lst, 4, struct my_struct)); + + alist_ensure(&lst, 4, struct my_struct)->val = 44; + ut_asserteq(44, alist_get(&lst, 4, struct my_struct)->val); + ut_asserteq(3, alist_get(&lst, 3, struct my_struct)->val); + ut_assertnull(alist_get(&lst, 7, struct my_struct)); + ut_asserteq(8, lst.alloc); + ut_asserteq(5, lst.count); + + /* add some more, checking handling of malloc() failure */ + malloc_enable_testing(0); + ut_assertnonnull(alist_ensure(&lst, 7, struct my_struct)); + ut_assertnull(alist_ensure(&lst, 8, struct my_struct)); + malloc_disable_testing(); + + lst.flags &= ~ALISTF_FAIL; + ut_assertnonnull(alist_ensure(&lst, 8, struct my_struct)); + ut_asserteq(16, lst.alloc); + ut_asserteq(9, lst.count); + + alist_uninit(&lst); + + /* Check for memory leaks */ + ut_assertok(ut_check_delta(start)); + + return 0; +} +LIB_TEST(lib_test_alist_ensure, 0); + +/* Test alist_add() bits not tested by lib_test_alist_ensure() */ +static int lib_test_alist_add(struct unit_test_state *uts) +{ + struct my_struct data, *ptr, *ptr2; + const struct my_struct *chk; + struct alist lst; + ulong start; + + start = ut_check_free(); + + ut_assert(alist_init_struct(&lst, struct my_struct)); + + data.val = 123; + data.other_val = 456; + ptr = alist_add(&lst, data); + ut_assertnonnull(ptr); + ut_asserteq(4, lst.alloc); + ut_asserteq(1, lst.count); + + ut_asserteq(123, ptr->val); + ut_asserteq(456, ptr->other_val); + + ptr2 = alist_add_placeholder(&lst); + ut_assertnonnull(ptr2); + + ptr2->val = 321; + ptr2->other_val = 654; + + chk = alist_get(&lst, 1, struct my_struct); + ut_asserteq(321, chk->val); + ut_asserteq(654, chk->other_val); + + ptr2 = alist_getw(&lst, 1, struct my_struct); + ut_asserteq(321, ptr2->val); + ut_asserteq(654, ptr2->other_val); + + alist_uninit(&lst); + + /* Check for memory leaks */ + ut_assertok(ut_check_delta(start)); + + return 0; +} +LIB_TEST(lib_test_alist_add, 0); diff --git a/test/py/tests/test_upl.py b/test/py/tests/test_upl.py new file mode 100644 index 00000000000..3164bda6b71 --- /dev/null +++ b/test/py/tests/test_upl.py @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright 2024 Google LLC +# +# Test addition of Universal Payload + +import os + +import pytest +import u_boot_utils + +@pytest.mark.boardspec('sandbox_vpl') +def test_upl_handoff(u_boot_console): + """Test of UPL handoff + + This works by starting up U-Boot VPL, which gets to SPL and then sets up a + UPL handoff using the FIT containing U-Boot proper. It then jumps to U-Boot + proper and runs a test to check that the parameters are correct. + + The entire FIT is loaded into memory in SPL (in upl_load_from_image()) so + that it can be inpected in upl_test_info_norun + """ + cons = u_boot_console + ram = os.path.join(cons.config.build_dir, 'ram.bin') + fdt = os.path.join(cons.config.build_dir, 'u-boot.dtb') + + # Remove any existing RAM file, so we don't have old data present + if os.path.exists(ram): + os.remove(ram) + flags = ['-m', ram, '-d', fdt, '--upl'] + cons.restart_uboot_with_flags(flags, use_dtb=False) + + # Make sure that Universal Payload is detected in U-Boot proper + output = cons.run_command('upl info') + assert 'UPL state: active' == output + + # Check the FIT offsets look correct + output = cons.run_command('ut upl -f upl_test_info_norun') + assert 'Failures: 0' in output diff --git a/test/str_ut.c b/test/str_ut.c index 389779859a3..96e048975d8 100644 --- a/test/str_ut.c +++ b/test/str_ut.c @@ -342,9 +342,7 @@ static int test_str_to_list(struct unit_test_state *uts) ut_asserteq_str("space", ptr[3]); ut_assertnonnull(ptr[4]); ut_asserteq_str("", ptr[4]); - ut_assertnonnull(ptr[5]); - ut_asserteq_str("", ptr[5]); - ut_assertnull(ptr[6]); + ut_assertnull(ptr[5]); str_free_list(ptr); ut_assertok(ut_check_delta(start)); diff --git a/tools/binman/btool/mkeficapsule.py b/tools/binman/btool/mkeficapsule.py index ef1da638df1..f7e5a886849 100644 --- a/tools/binman/btool/mkeficapsule.py +++ b/tools/binman/btool/mkeficapsule.py @@ -33,7 +33,8 @@ class Bintoolmkeficapsule(bintool.Bintool): commandline, or through a config file. """ def __init__(self, name): - super().__init__(name, 'mkeficapsule tool for generating capsules') + super().__init__(name, 'mkeficapsule tool for generating capsules', + r'mkeficapsule version (.*)') def generate_capsule(self, image_index, image_guid, hardware_instance, payload, output_fname, priv_key, pub_key, diff --git a/tools/binman/etype/efi_capsule.py b/tools/binman/etype/efi_capsule.py index 751f654bf31..5941545d0b2 100644 --- a/tools/binman/etype/efi_capsule.py +++ b/tools/binman/etype/efi_capsule.py @@ -148,8 +148,11 @@ class Entry_efi_capsule(Entry_section): self.fw_version, self.oem_flags) if ret is not None: - os.remove(payload) return tools.read_file(capsule_fname) + else: + # Bintool is missing; just use the input data as the output + self.record_missing_bintool(self.mkeficapsule) + return data def AddBintools(self, btools): self.mkeficapsule = self.AddBintool(btools, 'mkeficapsule') diff --git a/tools/mkeficapsule.c b/tools/mkeficapsule.c index 6a261ff549d..f28008a0829 100644 --- a/tools/mkeficapsule.c +++ b/tools/mkeficapsule.c @@ -21,6 +21,8 @@ #include <gnutls/pkcs7.h> #include <gnutls/abstract.h> +#include <version.h> + #include "eficapsule.h" static const char *tool_name = "mkeficapsule"; @@ -28,7 +30,7 @@ static const char *tool_name = "mkeficapsule"; efi_guid_t efi_guid_fm_capsule = EFI_FIRMWARE_MANAGEMENT_CAPSULE_ID_GUID; efi_guid_t efi_guid_cert_type_pkcs7 = EFI_CERT_TYPE_PKCS7_GUID; -static const char *opts_short = "g:i:I:v:p:c:m:o:dhARD"; +static const char *opts_short = "g:i:I:v:p:c:m:o:dhARDV"; enum { CAPSULE_NORMAL_BLOB = 0, @@ -70,6 +72,7 @@ static void print_usage(void) "\t-R, --fw-revert firmware revert capsule, takes no GUID, no image blob\n" "\t-o, --capoemflag Capsule OEM Flag, an integer between 0x0000 and 0xffff\n" "\t-D, --dump-capsule dump the contents of the capsule headers\n" + "\t-V, --version show version number\n" "\t-h, --help print a help message\n", tool_name); } @@ -969,9 +972,12 @@ int main(int argc, char **argv) case 'D': capsule_dump = true; break; + case 'V': + printf("mkeficapsule version %s\n", PLAIN_VERSION); + exit(EXIT_SUCCESS); default: print_usage(); - exit(EXIT_SUCCESS); + exit(EXIT_FAILURE); } } |