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-rw-r--r--.azure-pipelines.yml2
-rw-r--r--.gitlab-ci.yml2
-rw-r--r--arch/arm/mach-socfpga/include/mach/misc.h5
-rw-r--r--arch/arm/mach-socfpga/include/mach/system_manager_soc64.h6
-rw-r--r--arch/arm/mach-socfpga/misc_s10.c18
-rw-r--r--arch/x86/Kconfig3
-rw-r--r--arch/x86/cpu/start.S3
-rw-r--r--arch/x86/include/asm/acpi_nhlt.h8
-rw-r--r--board/advantech/som-db5800-som-6867/Makefile2
-rw-r--r--board/advantech/som-db5800-som-6867/start.S8
-rw-r--r--board/congatec/conga-qeval20-qa3-e3845/Makefile2
-rw-r--r--board/congatec/conga-qeval20-qa3-e3845/start.S8
-rw-r--r--board/coreboot/coreboot/Makefile2
-rw-r--r--board/coreboot/coreboot/start.S12
-rw-r--r--board/dfi/dfi-bt700/Makefile2
-rw-r--r--board/dfi/dfi-bt700/start.S8
-rw-r--r--board/efi/efi-x86_payload/Makefile2
-rw-r--r--board/efi/efi-x86_payload/start.S8
-rw-r--r--board/emulation/qemu-x86/Makefile2
-rw-r--r--board/emulation/qemu-x86/qemu-x86.c0
-rw-r--r--board/emulation/qemu-x86/start.S8
-rw-r--r--board/google/chromebook_coral/Kconfig1
-rw-r--r--board/google/chromebook_link/Kconfig1
-rw-r--r--board/google/chromebook_samus/Kconfig1
-rw-r--r--board/intel/bayleybay/Makefile2
-rw-r--r--board/intel/bayleybay/start.S8
-rw-r--r--board/intel/cherryhill/Makefile2
-rw-r--r--board/intel/cherryhill/start.S8
-rw-r--r--board/intel/cougarcanyon2/Makefile2
-rw-r--r--board/intel/cougarcanyon2/start.S8
-rw-r--r--board/intel/crownbay/Makefile2
-rw-r--r--board/intel/crownbay/start.S8
-rw-r--r--board/intel/edison/Makefile2
-rw-r--r--board/intel/edison/start.S12
-rw-r--r--board/intel/galileo/Makefile2
-rw-r--r--board/intel/galileo/start.S8
-rw-r--r--board/intel/minnowmax/Makefile2
-rw-r--r--board/intel/minnowmax/start.S8
-rw-r--r--board/intel/slimbootloader/Makefile2
-rw-r--r--board/intel/slimbootloader/start.S9
-rw-r--r--cmd/x86/mtrr.c3
-rw-r--r--drivers/pinctrl/intel/Kconfig2
-rw-r--r--drivers/serial/serial_sh.c5
43 files changed, 52 insertions, 157 deletions
diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml
index adcc0fbcb2c..1c74876cb42 100644
--- a/.azure-pipelines.yml
+++ b/.azure-pipelines.yml
@@ -2,7 +2,7 @@ variables:
windows_vm: vs2017-win2016
ubuntu_vm: ubuntu-18.04
macos_vm: macOS-10.15
- ci_runner_image: trini/u-boot-gitlab-ci-runner:bionic-20200713-05Aug2020
+ ci_runner_image: trini/u-boot-gitlab-ci-runner:bionic-20200807-02Sep2020
# Add '-u 0' options for Azure pipelines, otherwise we get "permission
# denied" error when it tries to "useradd -m -u 1001 vsts_azpcontainer",
# since our $(ci_runner_image) user is not root.
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index b0d7679b45e..08696693f18 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -2,7 +2,7 @@
# Grab our configured image. The source for this is found at:
# https://gitlab.denx.de/u-boot/gitlab-ci-runner
-image: trini/u-boot-gitlab-ci-runner:bionic-20200713-05Aug2020
+image: trini/u-boot-gitlab-ci-runner:bionic-20200807-02Sep2020
# We run some tests in different order, to catch some failures quicker.
stages:
diff --git a/arch/arm/mach-socfpga/include/mach/misc.h b/arch/arm/mach-socfpga/include/mach/misc.h
index a85c5aeef95..649d2f6ce24 100644
--- a/arch/arm/mach-socfpga/include/mach/misc.h
+++ b/arch/arm/mach-socfpga/include/mach/misc.h
@@ -39,6 +39,11 @@ void socfpga_init_security_policies(void);
void socfpga_sdram_remap_zero(void);
#endif
+#if defined(CONFIG_TARGET_SOCFPGA_STRATIX10) || \
+ defined(CONFIG_TARGET_SOCFPGA_AGILEX)
+int is_fpga_config_ready(void);
+#endif
+
void do_bridge_reset(int enable, unsigned int mask);
void socfpga_pl310_clear(void);
void socfpga_get_managers_addr(void);
diff --git a/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h b/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
index c90f63a754c..5e3f54a6a8c 100644
--- a/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
+++ b/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
@@ -88,8 +88,12 @@ void sysmgr_pinmux_table_delay(const u32 **table, unsigned int *table_len);
#define SYSMGR_ECC_OCRAM_EN BIT(0)
#define SYSMGR_ECC_OCRAM_SERR BIT(3)
#define SYSMGR_ECC_OCRAM_DERR BIT(4)
-#define SYSMGR_FPGAINTF_USEFPGA 0x1
+#define SYSMGR_FPGACONFIG_FPGA_COMPLETE BIT(0)
+#define SYSMGR_FPGACONFIG_EARLY_USERMODE BIT(1)
+#define SYSMGR_FPGACONFIG_READY_MASK (SYSMGR_FPGACONFIG_FPGA_COMPLETE | \
+ SYSMGR_FPGACONFIG_EARLY_USERMODE)
+#define SYSMGR_FPGAINTF_USEFPGA 0x1
#define SYSMGR_FPGAINTF_NAND BIT(4)
#define SYSMGR_FPGAINTF_SDMMC BIT(8)
#define SYSMGR_FPGAINTF_SPIM0 BIT(16)
diff --git a/arch/arm/mach-socfpga/misc_s10.c b/arch/arm/mach-socfpga/misc_s10.c
index 670bfa1a31f..52868fb3448 100644
--- a/arch/arm/mach-socfpga/misc_s10.c
+++ b/arch/arm/mach-socfpga/misc_s10.c
@@ -151,17 +151,19 @@ int arch_early_init_r(void)
return 0;
}
+/* Return 1 if FPGA is ready otherwise return 0 */
+int is_fpga_config_ready(void)
+{
+ return (readl(socfpga_get_sysmgr_addr() + SYSMGR_SOC64_FPGA_CONFIG) &
+ SYSMGR_FPGACONFIG_READY_MASK) == SYSMGR_FPGACONFIG_READY_MASK;
+}
+
void do_bridge_reset(int enable, unsigned int mask)
{
/* Check FPGA status before bridge enable */
- if (enable) {
- int ret = mbox_get_fpga_config_status(MBOX_RECONFIG_STATUS);
-
- if (ret && ret != MBOX_CFGSTAT_STATE_CONFIG)
- ret = mbox_get_fpga_config_status(MBOX_CONFIG_STATUS);
-
- if (ret)
- return;
+ if (!is_fpga_config_ready()) {
+ puts("FPGA not ready. Bridge reset aborted!\n");
+ return;
}
socfpga_bridges_reset(enable);
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index a34b108fffa..76276c60274 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -203,6 +203,9 @@ config SPL_X86_32BIT_INIT
help
This is enabled when 32-bit init is in SPL
+config USE_EARLY_BOARD_INIT
+ bool
+
config RESET_SEG_START
hex
depends on X86_RESET_VECTOR
diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S
index 4ad515ce085..3b6ed37bc07 100644
--- a/arch/x86/cpu/start.S
+++ b/arch/x86/cpu/start.S
@@ -88,6 +88,7 @@ _start:
/* Clear the interrupt vectors */
lidt blank_idt_ptr
+#ifdef CONFIG_USE_EARLY_BOARD_INIT
/*
* Critical early platform init - generally not used, we prefer init
* to happen later when we have a console, in case something goes
@@ -96,6 +97,8 @@ _start:
jmp early_board_init
.globl early_board_init_ret
early_board_init_ret:
+#endif
+
post_code(POST_START)
/* Initialise Cache-As-RAM */
diff --git a/arch/x86/include/asm/acpi_nhlt.h b/arch/x86/include/asm/acpi_nhlt.h
index 47203213818..2c44196317b 100644
--- a/arch/x86/include/asm/acpi_nhlt.h
+++ b/arch/x86/include/asm/acpi_nhlt.h
@@ -139,14 +139,6 @@ void nhlt_next_instance(struct nhlt *nhlt, int link_type);
/*
* Serialize NHLT object to ACPI table. Take in the beginning address of where
- * the table will reside and return the address of the next ACPI table. On
- * error 0 will be returned. The NHLT object is no longer valid after this
- * function is called.
- */
-uintptr_t nhlt_serialise(struct nhlt *nhlt, uintptr_t acpi_addr);
-
-/*
- * Serialize NHLT object to ACPI table. Take in the beginning address of where
* the table will reside oem_id and oem_table_id and return the address of the
* next ACPI table. On error 0 will be returned. The NHLT object is no longer
* valid after this function is called.
diff --git a/board/advantech/som-db5800-som-6867/Makefile b/board/advantech/som-db5800-som-6867/Makefile
index 0524766bb71..7975547f410 100644
--- a/board/advantech/som-db5800-som-6867/Makefile
+++ b/board/advantech/som-db5800-som-6867/Makefile
@@ -2,5 +2,5 @@
#
# Copyright (C) 2015, Google, Inc
-obj-y += som-db5800-som-6867.o start.o
+obj-y += som-db5800-som-6867.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
diff --git a/board/advantech/som-db5800-som-6867/start.S b/board/advantech/som-db5800-som-6867/start.S
deleted file mode 100644
index 65d1f7e9615..00000000000
--- a/board/advantech/som-db5800-som-6867/start.S
+++ /dev/null
@@ -1,8 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2015, Google, Inc
- */
-
-.globl early_board_init
-early_board_init:
- jmp early_board_init_ret
diff --git a/board/congatec/conga-qeval20-qa3-e3845/Makefile b/board/congatec/conga-qeval20-qa3-e3845/Makefile
index 2f04828a27f..451a4fcd6c4 100644
--- a/board/congatec/conga-qeval20-qa3-e3845/Makefile
+++ b/board/congatec/conga-qeval20-qa3-e3845/Makefile
@@ -2,5 +2,5 @@
#
# Copyright (C) 2015, Google, Inc
-obj-y += conga-qeval20-qa3.o start.o
+obj-y += conga-qeval20-qa3.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
diff --git a/board/congatec/conga-qeval20-qa3-e3845/start.S b/board/congatec/conga-qeval20-qa3-e3845/start.S
deleted file mode 100644
index 65d1f7e9615..00000000000
--- a/board/congatec/conga-qeval20-qa3-e3845/start.S
+++ /dev/null
@@ -1,8 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2015, Google, Inc
- */
-
-.globl early_board_init
-early_board_init:
- jmp early_board_init_ret
diff --git a/board/coreboot/coreboot/Makefile b/board/coreboot/coreboot/Makefile
index 8db7cc62f30..d292b7032c2 100644
--- a/board/coreboot/coreboot/Makefile
+++ b/board/coreboot/coreboot/Makefile
@@ -10,4 +10,4 @@
# (C) Copyright 2002
# Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
-obj-y += start.o coreboot.o
+obj-y += coreboot.o
diff --git a/board/coreboot/coreboot/start.S b/board/coreboot/coreboot/start.S
deleted file mode 100644
index aa702622d48..00000000000
--- a/board/coreboot/coreboot/start.S
+++ /dev/null
@@ -1,12 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (c) 2011 The Chromium OS Authors.
- * (C) Copyright 2008
- * Graeme Russ, graeme.russ@gmail.com.
- */
-
-/* board early intialization */
-.globl early_board_init
-early_board_init:
- /* No 32-bit board specific initialisation */
- jmp early_board_init_ret
diff --git a/board/dfi/dfi-bt700/Makefile b/board/dfi/dfi-bt700/Makefile
index 99cf357b701..50d88f29545 100644
--- a/board/dfi/dfi-bt700/Makefile
+++ b/board/dfi/dfi-bt700/Makefile
@@ -2,5 +2,5 @@
#
# Copyright (C) 2015, Google, Inc
-obj-y += dfi-bt700.o start.o
+obj-y += dfi-bt700.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
diff --git a/board/dfi/dfi-bt700/start.S b/board/dfi/dfi-bt700/start.S
deleted file mode 100644
index 65d1f7e9615..00000000000
--- a/board/dfi/dfi-bt700/start.S
+++ /dev/null
@@ -1,8 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2015, Google, Inc
- */
-
-.globl early_board_init
-early_board_init:
- jmp early_board_init_ret
diff --git a/board/efi/efi-x86_payload/Makefile b/board/efi/efi-x86_payload/Makefile
index 00ef69534d0..a4ebc85aa5b 100644
--- a/board/efi/efi-x86_payload/Makefile
+++ b/board/efi/efi-x86_payload/Makefile
@@ -2,4 +2,4 @@
#
# Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
-obj-y += start.o payload.o
+obj-y += payload.o
diff --git a/board/efi/efi-x86_payload/start.S b/board/efi/efi-x86_payload/start.S
deleted file mode 100644
index f7eaa7cb12a..00000000000
--- a/board/efi/efi-x86_payload/start.S
+++ /dev/null
@@ -1,8 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
- */
-
-.globl early_board_init
-early_board_init:
- jmp early_board_init_ret
diff --git a/board/emulation/qemu-x86/Makefile b/board/emulation/qemu-x86/Makefile
index 782e298b74c..ff4aaa51c54 100644
--- a/board/emulation/qemu-x86/Makefile
+++ b/board/emulation/qemu-x86/Makefile
@@ -2,4 +2,4 @@
#
# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
-obj-y += start.o
+obj-y += qemu-x86.o
diff --git a/board/emulation/qemu-x86/qemu-x86.c b/board/emulation/qemu-x86/qemu-x86.c
new file mode 100644
index 00000000000..e69de29bb2d
--- /dev/null
+++ b/board/emulation/qemu-x86/qemu-x86.c
diff --git a/board/emulation/qemu-x86/start.S b/board/emulation/qemu-x86/start.S
deleted file mode 100644
index e4bde561b20..00000000000
--- a/board/emulation/qemu-x86/start.S
+++ /dev/null
@@ -1,8 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
- */
-
-.globl early_board_init
-early_board_init:
- jmp early_board_init_ret
diff --git a/board/google/chromebook_coral/Kconfig b/board/google/chromebook_coral/Kconfig
index 940bee89b0b..27671958e14 100644
--- a/board/google/chromebook_coral/Kconfig
+++ b/board/google/chromebook_coral/Kconfig
@@ -18,6 +18,7 @@ config SYS_TEXT_BASE
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select X86_RESET_VECTOR
+ select USE_EARLY_BOARD_INIT
select INTEL_APOLLOLAKE
select BOARD_ROMSIZE_KB_16384
diff --git a/board/google/chromebook_link/Kconfig b/board/google/chromebook_link/Kconfig
index 944716d002c..dd29ddf694b 100644
--- a/board/google/chromebook_link/Kconfig
+++ b/board/google/chromebook_link/Kconfig
@@ -19,6 +19,7 @@ config SYS_TEXT_BASE
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select X86_RESET_VECTOR
+ select USE_EARLY_BOARD_INIT
select NORTHBRIDGE_INTEL_IVYBRIDGE
select HAVE_INTEL_ME
select BOARD_ROMSIZE_KB_8192
diff --git a/board/google/chromebook_samus/Kconfig b/board/google/chromebook_samus/Kconfig
index 90c23cba1be..9f66d799887 100644
--- a/board/google/chromebook_samus/Kconfig
+++ b/board/google/chromebook_samus/Kconfig
@@ -19,6 +19,7 @@ config SYS_TEXT_BASE
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select X86_RESET_VECTOR
+ select USE_EARLY_BOARD_INIT
select INTEL_BROADWELL
select HAVE_INTEL_ME
select BOARD_ROMSIZE_KB_8192
diff --git a/board/intel/bayleybay/Makefile b/board/intel/bayleybay/Makefile
index e0553f14624..d19447184a6 100644
--- a/board/intel/bayleybay/Makefile
+++ b/board/intel/bayleybay/Makefile
@@ -2,5 +2,5 @@
#
# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
-obj-y += bayleybay.o start.o
+obj-y += bayleybay.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
diff --git a/board/intel/bayleybay/start.S b/board/intel/bayleybay/start.S
deleted file mode 100644
index e4bde561b20..00000000000
--- a/board/intel/bayleybay/start.S
+++ /dev/null
@@ -1,8 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
- */
-
-.globl early_board_init
-early_board_init:
- jmp early_board_init_ret
diff --git a/board/intel/cherryhill/Makefile b/board/intel/cherryhill/Makefile
index b09581a9195..ff6e14836a1 100644
--- a/board/intel/cherryhill/Makefile
+++ b/board/intel/cherryhill/Makefile
@@ -2,4 +2,4 @@
#
# Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
-obj-y += cherryhill.o start.o
+obj-y += cherryhill.o
diff --git a/board/intel/cherryhill/start.S b/board/intel/cherryhill/start.S
deleted file mode 100644
index 2e3e7f84094..00000000000
--- a/board/intel/cherryhill/start.S
+++ /dev/null
@@ -1,8 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
- */
-
-.globl early_board_init
-early_board_init:
- jmp early_board_init_ret
diff --git a/board/intel/cougarcanyon2/Makefile b/board/intel/cougarcanyon2/Makefile
index 75cc508f4ec..13b19ae6538 100644
--- a/board/intel/cougarcanyon2/Makefile
+++ b/board/intel/cougarcanyon2/Makefile
@@ -2,4 +2,4 @@
#
# Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
-obj-y += cougarcanyon2.o start.o
+obj-y += cougarcanyon2.o
diff --git a/board/intel/cougarcanyon2/start.S b/board/intel/cougarcanyon2/start.S
deleted file mode 100644
index 8521800921e..00000000000
--- a/board/intel/cougarcanyon2/start.S
+++ /dev/null
@@ -1,8 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
- */
-
-.globl early_board_init
-early_board_init:
- jmp early_board_init_ret
diff --git a/board/intel/crownbay/Makefile b/board/intel/crownbay/Makefile
index b52c69aeaa1..6abd3eeb554 100644
--- a/board/intel/crownbay/Makefile
+++ b/board/intel/crownbay/Makefile
@@ -2,4 +2,4 @@
#
# Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
-obj-y += crownbay.o start.o
+obj-y += crownbay.o
diff --git a/board/intel/crownbay/start.S b/board/intel/crownbay/start.S
deleted file mode 100644
index 7faa7d05fae..00000000000
--- a/board/intel/crownbay/start.S
+++ /dev/null
@@ -1,8 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
- */
-
-.globl early_board_init
-early_board_init:
- jmp early_board_init_ret
diff --git a/board/intel/edison/Makefile b/board/intel/edison/Makefile
index eed8d65eb66..1eaf7ca7f8e 100644
--- a/board/intel/edison/Makefile
+++ b/board/intel/edison/Makefile
@@ -4,5 +4,5 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += start.o edison.o
+obj-y += edison.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
diff --git a/board/intel/edison/start.S b/board/intel/edison/start.S
deleted file mode 100644
index aa702622d48..00000000000
--- a/board/intel/edison/start.S
+++ /dev/null
@@ -1,12 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (c) 2011 The Chromium OS Authors.
- * (C) Copyright 2008
- * Graeme Russ, graeme.russ@gmail.com.
- */
-
-/* board early intialization */
-.globl early_board_init
-early_board_init:
- /* No 32-bit board specific initialisation */
- jmp early_board_init_ret
diff --git a/board/intel/galileo/Makefile b/board/intel/galileo/Makefile
index e8f58bff9ac..4130bb02365 100644
--- a/board/intel/galileo/Makefile
+++ b/board/intel/galileo/Makefile
@@ -2,5 +2,5 @@
#
# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
-obj-y += galileo.o start.o
+obj-y += galileo.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
diff --git a/board/intel/galileo/start.S b/board/intel/galileo/start.S
deleted file mode 100644
index e4bde561b20..00000000000
--- a/board/intel/galileo/start.S
+++ /dev/null
@@ -1,8 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
- */
-
-.globl early_board_init
-early_board_init:
- jmp early_board_init_ret
diff --git a/board/intel/minnowmax/Makefile b/board/intel/minnowmax/Makefile
index 989344df1c9..d339b5ad0a5 100644
--- a/board/intel/minnowmax/Makefile
+++ b/board/intel/minnowmax/Makefile
@@ -2,5 +2,5 @@
#
# Copyright (C) 2015, Google, Inc
-obj-y += minnowmax.o start.o
+obj-y += minnowmax.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
diff --git a/board/intel/minnowmax/start.S b/board/intel/minnowmax/start.S
deleted file mode 100644
index 65d1f7e9615..00000000000
--- a/board/intel/minnowmax/start.S
+++ /dev/null
@@ -1,8 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2015, Google, Inc
- */
-
-.globl early_board_init
-early_board_init:
- jmp early_board_init_ret
diff --git a/board/intel/slimbootloader/Makefile b/board/intel/slimbootloader/Makefile
index fd8fa98a8d3..50330cc6e5d 100644
--- a/board/intel/slimbootloader/Makefile
+++ b/board/intel/slimbootloader/Makefile
@@ -2,4 +2,4 @@
#
# Copyright (C) 2019 Intel Corporation <www.intel.com>
-obj-y += start.o slimbootloader.o
+obj-y += slimbootloader.o
diff --git a/board/intel/slimbootloader/start.S b/board/intel/slimbootloader/start.S
deleted file mode 100644
index 5c3f3df09eb..00000000000
--- a/board/intel/slimbootloader/start.S
+++ /dev/null
@@ -1,9 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2019 Intel Corporation <www.intel.com>
- */
-
-/* board early initialization */
-.globl early_board_init
-early_board_init:
- jmp early_board_init_ret
diff --git a/cmd/x86/mtrr.c b/cmd/x86/mtrr.c
index e118bba5a2a..99efecb9d8e 100644
--- a/cmd/x86/mtrr.c
+++ b/cmd/x86/mtrr.c
@@ -121,7 +121,8 @@ static int do_mtrr(struct cmd_tbl *cmdtp, int flag, int argc,
if (argc < 1 || !cmd) {
cmd = 'l';
reg = 0;
- } else {
+ }
+ if (cmd != 'l') {
if (argc < 2)
return CMD_RET_USAGE;
reg = simple_strtoul(argv[1], NULL, 16);
diff --git a/drivers/pinctrl/intel/Kconfig b/drivers/pinctrl/intel/Kconfig
index 1acc5dabb01..316a8fe27fd 100644
--- a/drivers/pinctrl/intel/Kconfig
+++ b/drivers/pinctrl/intel/Kconfig
@@ -22,7 +22,7 @@ config INTEL_PINCTRL_MULTI_ACPI_DEVICES
Enable this if the pinctrl devices are modelled as multiple,
separate ACPI devices in the ACPI tables. If enabled, the ACPI
devices match the U-Boot pinctrl devices and the pin 'offset' is
- relatove to a particular pinctrl device. If disabled, there is a
+ relative to a particular pinctrl device. If disabled, there is a
single ACPI pinctrl device which includes all U-Boot pinctrl devices
and the pin 'offset' is in effect a global pin number.
diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c
index 13b179f03de..e27d256574f 100644
--- a/drivers/serial/serial_sh.c
+++ b/drivers/serial/serial_sh.c
@@ -116,7 +116,10 @@ static int serial_getc_check(struct uart_port *port)
handle_error(port);
if (sci_in(port, SCLSR) & SCxSR_ORER(port))
handle_error(port);
- return status & (SCIF_DR | SCxSR_RDxF(port));
+ status &= (SCIF_DR | SCxSR_RDxF(port));
+ if (status)
+ return status;
+ return scif_rxfill(port);
}
static int sh_serial_getc_generic(struct uart_port *port)