summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
Diffstat
-rw-r--r--board/phytec/common/Kconfig9
-rw-r--r--board/phytec/common/Makefile2
-rw-r--r--board/phytec/common/k3/board.c23
-rw-r--r--board/phytec/common/phytec_som_detection.c228
-rw-r--r--board/phytec/common/phytec_som_detection.h9
-rw-r--r--board/phytec/common/phytec_som_detection_blocks.c105
-rw-r--r--board/phytec/common/phytec_som_detection_blocks.h61
-rw-r--r--configs/phycore_am62x_a53_defconfig1
8 files changed, 408 insertions, 30 deletions
diff --git a/board/phytec/common/Kconfig b/board/phytec/common/Kconfig
index 1077f0f4b61..668afe2a534 100644
--- a/board/phytec/common/Kconfig
+++ b/board/phytec/common/Kconfig
@@ -4,6 +4,13 @@ config PHYTEC_SOM_DETECTION
help
Support of I2C EEPROM based SoM detection.
+config PHYTEC_SOM_DETECTION_BLOCKS
+ bool "Extend SoM detection with block support"
+ depends on PHYTEC_SOM_DETECTION
+ help
+ Extend the I2C EEPROM based SoM detection with API v3. This API
+ introduces blocks with different payloads.
+
config PHYTEC_IMX8M_SOM_DETECTION
bool "Support SoM detection for i.MX8M PHYTEC platforms"
depends on ARCH_IMX8M && PHYTEC_SOM_DETECTION
@@ -16,6 +23,7 @@ config PHYTEC_AM62_SOM_DETECTION
bool "Support SoM detection for AM62x PHYTEC platforms"
depends on (TARGET_PHYCORE_AM62X_A53 || TARGET_PHYCORE_AM62X_R5) && \
PHYTEC_SOM_DETECTION
+ select PHYTEC_SOM_DETECTION_BLOCKS
default y
help
Support of I2C EEPROM based SoM detection. Supported
@@ -25,6 +33,7 @@ config PHYTEC_AM64_SOM_DETECTION
bool "Support SoM detection for AM64x PHYTEC platforms"
depends on (TARGET_PHYCORE_AM64X_A53 || TARGET_PHYCORE_AM64X_R5) && \
PHYTEC_SOM_DETECTION
+ select PHYTEC_SOM_DETECTION_BLOCKS
default y
help
Support of I2C EEPROM based SoM detection. Supported
diff --git a/board/phytec/common/Makefile b/board/phytec/common/Makefile
index c34fc503059..446c481a6e6 100644
--- a/board/phytec/common/Makefile
+++ b/board/phytec/common/Makefile
@@ -9,6 +9,6 @@ else
obj-$(CONFIG_ARCH_K3) += k3/
endif
-obj-y += phytec_som_detection.o
+obj-y += phytec_som_detection.o phytec_som_detection_blocks.o
obj-$(CONFIG_ARCH_K3) += am6_som_detection.o
obj-$(CONFIG_ARCH_IMX8M) += imx8m_som_detection.o
diff --git a/board/phytec/common/k3/board.c b/board/phytec/common/k3/board.c
index 9cb168c36cb..f21e154d4fe 100644
--- a/board/phytec/common/k3/board.c
+++ b/board/phytec/common/k3/board.c
@@ -8,6 +8,8 @@
#include <spl.h>
#include <asm/arch/hardware.h>
+#include "../am6_som_detection.h"
+
#if IS_ENABLED(CONFIG_ENV_IS_IN_FAT) || IS_ENABLED(CONFIG_ENV_IS_IN_MMC)
int mmc_get_env_dev(void)
{
@@ -68,6 +70,27 @@ int board_late_init(void)
break;
};
+ if (IS_ENABLED(CONFIG_PHYTEC_SOM_DETECTION_BLOCKS)) {
+ struct phytec_api3_element *block_element;
+ struct phytec_eeprom_data data;
+ int ret;
+
+ ret = phytec_eeprom_data_setup(&data, 0, EEPROM_ADDR);
+ if (ret || !data.valid)
+ return 0;
+
+ PHYTEC_API3_FOREACH_BLOCK(block_element, &data) {
+ switch (block_element->block_type) {
+ case PHYTEC_API3_BLOCK_MAC:
+ phytec_blocks_add_mac_to_env(block_element);
+ break;
+ default:
+ debug("%s: Unknown block type %i\n", __func__,
+ block_element->block_type);
+ }
+ }
+ }
+
return 0;
}
#endif
diff --git a/board/phytec/common/phytec_som_detection.c b/board/phytec/common/phytec_som_detection.c
index b14bb3dbb7f..166c3eae565 100644
--- a/board/phytec/common/phytec_som_detection.c
+++ b/board/phytec/common/phytec_som_detection.c
@@ -47,16 +47,9 @@ int phytec_eeprom_data_setup(struct phytec_eeprom_data *data,
return ret;
}
-int phytec_eeprom_data_init(struct phytec_eeprom_data *data,
- int bus_num, int addr)
+int phytec_eeprom_read(u8 *data, int bus_num, int addr, int size, int offset)
{
- int ret, i;
- unsigned int crc;
- u8 *ptr;
- const unsigned int payload_size = sizeof(struct phytec_eeprom_payload);
-
- if (!data)
- data = &eeprom_data;
+ int ret;
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *dev;
@@ -64,19 +57,182 @@ int phytec_eeprom_data_init(struct phytec_eeprom_data *data,
ret = i2c_get_chip_for_busnum(bus_num, addr, 2, &dev);
if (ret) {
pr_err("%s: i2c EEPROM not found: %i.\n", __func__, ret);
- goto err;
+ return ret;
}
- ret = dm_i2c_read(dev, 0, (uint8_t *)data, payload_size);
+ ret = dm_i2c_read(dev, offset, (uint8_t *)data, size);
if (ret) {
pr_err("%s: Unable to read EEPROM data: %i\n", __func__, ret);
- goto err;
+ return ret;
}
#else
i2c_set_bus_num(bus_num);
- ret = i2c_read(addr, 0, 2, (uint8_t *)data,
- sizeof(struct phytec_eeprom_data));
+ ret = i2c_read(addr, offset, 2, (uint8_t *)data, size);
#endif
+ return ret;
+}
+
+int phytec_eeprom_data_init_v2(struct phytec_eeprom_data *data)
+{
+ unsigned int crc;
+
+ if (!data)
+ return -1;
+
+ crc = crc8(0, (const unsigned char *)&data->payload, PHYTEC_API2_DATA_LEN);
+ debug("%s: crc: %x\n", __func__, crc);
+
+ if (crc) {
+ pr_err("%s: CRC mismatch. EEPROM data is not usable.\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+#if IS_ENABLED(CONFIG_PHYTEC_SOM_DETECTION_BLOCKS)
+
+int phytec_eeprom_data_init_v3_block(struct phytec_eeprom_data *data,
+ struct phytec_api3_block_header *header,
+ u8 *payload)
+{
+ struct phytec_api3_element *element = NULL;
+ struct phytec_api3_element *list_iterator;
+
+ if (!header)
+ return -1;
+ if (!payload)
+ return -1;
+
+ debug("%s: block type: %i\n", __func__, header->block_type);
+ switch (header->block_type) {
+ case PHYTEC_API3_BLOCK_MAC:
+ element = phytec_blocks_init_mac(header, payload);
+ break;
+ default:
+ debug("%s: Unknown block type %i\n", __func__,
+ header->block_type);
+ }
+ if (!element)
+ return -1;
+
+ if (!data->payload.block_head) {
+ data->payload.block_head = element;
+ return 0;
+ }
+
+ list_iterator = data->payload.block_head;
+ while (list_iterator && list_iterator->next)
+ list_iterator = list_iterator->next;
+ list_iterator->next = element;
+
+ return 0;
+}
+
+int phytec_eeprom_data_init_v3(struct phytec_eeprom_data *data,
+ int bus_num, int addr)
+{
+ int ret, i;
+ struct phytec_api3_header header;
+ unsigned int crc;
+ u8 *payload;
+ int block_addr;
+ struct phytec_api3_block_header *block_header;
+
+ if (!data)
+ return -1;
+
+ ret = phytec_eeprom_read((uint8_t *)&header, bus_num, addr,
+ PHYTEC_API3_DATA_HEADER_LEN,
+ PHYTEC_API2_DATA_LEN);
+ if (ret) {
+ pr_err("%s: Failed to read API v3 data header.\n", __func__);
+ goto err;
+ }
+
+ crc = crc8(0, (const unsigned char *)&header,
+ PHYTEC_API3_DATA_HEADER_LEN);
+ debug("%s: crc: %x\n", __func__, crc);
+ if (crc) {
+ pr_err("%s: CRC mismatch. API3 header is unusable.\n",
+ __func__);
+ goto err;
+ }
+
+ debug("%s: data length: %i\n", __func__, header.data_length);
+ payload = malloc(header.data_length);
+ if (!payload) {
+ pr_err("%s: Unable to allocate memory\n", __func__);
+ goto err_payload;
+ }
+
+ ret = phytec_eeprom_read(payload, bus_num, addr, header.data_length,
+ PHYTEC_API3_DATA_HEADER_LEN +
+ PHYTEC_API2_DATA_LEN);
+ if (ret) {
+ pr_err("%s: Failed to read API v3 data payload.\n", __func__);
+ goto err_payload;
+ }
+
+ block_addr = 0;
+ debug("%s: block count: %i\n", __func__, header.block_count);
+ for (i = 0; i < header.block_count; i++) {
+ debug("%s: block_addr: %i\n", __func__, block_addr);
+ block_header = (struct phytec_api3_block_header *)
+ &payload[block_addr];
+ crc = crc8(0, (const unsigned char *)block_header,
+ PHYTEC_API3_BLOCK_HEADER_LEN);
+
+ debug("%s: crc: %x\n", __func__, crc);
+ if (crc) {
+ pr_err("%s: CRC mismatch. API3 block header is unusable\n",
+ __func__);
+ goto err_payload;
+ }
+
+ ret = phytec_eeprom_data_init_v3_block(data, block_header,
+ &payload[block_addr + PHYTEC_API3_BLOCK_HEADER_LEN]);
+ /* Ignore failed block initialization and continue. */
+ if (ret)
+ debug("%s: Unable to create block with index %i.\n",
+ __func__, i);
+
+ block_addr = block_header->next_block;
+ }
+
+ free(payload);
+ return 0;
+err_payload:
+ free(payload);
+err:
+ return -1;
+}
+
+#else
+
+inline int phytec_eeprom_data_init_v3(struct phytec_eeprom_data *data,
+ int bus_num, int addr)
+{
+ return 0;
+}
+
+#endif
+
+int phytec_eeprom_data_init(struct phytec_eeprom_data *data,
+ int bus_num, int addr)
+{
+ int ret, i;
+ u8 *ptr;
+
+ if (!data)
+ data = &eeprom_data;
+
+ ret = phytec_eeprom_read((u8 *)data, bus_num, addr,
+ PHYTEC_API2_DATA_LEN, 0);
+ if (ret)
+ goto err;
+ data->payload.block_head = NULL;
if (data->payload.api_rev == 0xff) {
pr_err("%s: EEPROM is not flashed. Prototype?\n", __func__);
@@ -85,31 +241,28 @@ int phytec_eeprom_data_init(struct phytec_eeprom_data *data,
}
ptr = (u8 *)data;
- for (i = 0; i < payload_size; ++i)
+ for (i = 0; i < PHYTEC_API2_DATA_LEN; ++i)
if (ptr[i] != 0x0)
break;
- if (i == payload_size) {
+ if (i == PHYTEC_API2_DATA_LEN) {
pr_err("%s: EEPROM data is all zero. Erased?\n", __func__);
ret = -EINVAL;
goto err;
}
- /* We are done here for early revisions */
- if (data->payload.api_rev <= PHYTEC_API_REV1) {
- data->valid = true;
- return 0;
+ if (data->payload.api_rev >= PHYTEC_API_REV2) {
+ ret = phytec_eeprom_data_init_v2(data);
+ if (ret)
+ goto err;
}
- crc = crc8(0, (const unsigned char *)&data->payload, payload_size);
- debug("%s: crc: %x\n", __func__, crc);
-
- if (crc) {
- pr_err("%s: CRC mismatch. EEPROM data is not usable.\n",
- __func__);
- ret = -EINVAL;
- goto err;
- }
+ if (IS_ENABLED(CONFIG_PHYTEC_SOM_DETECTION_BLOCKS))
+ if (data->payload.api_rev >= PHYTEC_API_REV3) {
+ ret = phytec_eeprom_data_init_v3(data, bus_num, addr);
+ if (ret)
+ goto err;
+ }
data->valid = true;
return 0;
@@ -248,6 +401,17 @@ struct extension *phytec_add_extension(const char *name, const char *overlay,
}
#endif /* IS_ENABLED(CONFIG_CMD_EXTENSION) */
+struct phytec_api3_element *
+ __maybe_unused phytec_get_block_head(struct phytec_eeprom_data *data)
+{
+ if (!data)
+ data = &eeprom_data;
+ if (!data->valid)
+ return NULL;
+
+ return data->payload.block_head;
+}
+
#else
inline int phytec_eeprom_data_setup(struct phytec_eeprom_data *data,
@@ -288,6 +452,12 @@ u8 __maybe_unused phytec_get_som_type(struct phytec_eeprom_data *data)
return PHYTEC_EEPROM_INVAL;
}
+inline struct phytec_api3_element * __maybe_unused
+ phytec_get_block_head(struct phytec_eeprom_data *data)
+{
+ return NULL;
+}
+
#if IS_ENABLED(CONFIG_CMD_EXTENSION)
inline struct extension *phytec_add_extension(const char *name,
const char *overlay,
diff --git a/board/phytec/common/phytec_som_detection.h b/board/phytec/common/phytec_som_detection.h
index 0ad5c14ef4e..5e35a13cb21 100644
--- a/board/phytec/common/phytec_som_detection.h
+++ b/board/phytec/common/phytec_som_detection.h
@@ -7,9 +7,13 @@
#ifndef _PHYTEC_SOM_DETECTION_H
#define _PHYTEC_SOM_DETECTION_H
+#include "phytec_som_detection_blocks.h"
+
#define PHYTEC_MAX_OPTIONS 17
#define PHYTEC_EEPROM_INVAL 0xff
+#define PHYTEC_API2_DATA_LEN 32
+
#define PHYTEC_GET_OPTION(option) \
(((option) > '9') ? (option) - 'A' + 10 : (option) - '0')
@@ -17,6 +21,7 @@ enum {
PHYTEC_API_REV0 = 0,
PHYTEC_API_REV1,
PHYTEC_API_REV2,
+ PHYTEC_API_REV3,
};
enum phytec_som_type_str {
@@ -61,6 +66,7 @@ struct phytec_eeprom_payload {
struct phytec_api0_data data_api0;
struct phytec_api2_data data_api2;
} data;
+ struct phytec_api3_element *block_head;
} __packed;
struct phytec_eeprom_data {
@@ -86,4 +92,7 @@ struct extension *phytec_add_extension(const char *name, const char *overlay,
const char *other);
#endif /* IS_ENABLED(CONFIG_CMD_EXTENSION) */
+struct phytec_api3_element *
+ __maybe_unused phytec_get_block_head(struct phytec_eeprom_data *data);
+
#endif /* _PHYTEC_SOM_DETECTION_H */
diff --git a/board/phytec/common/phytec_som_detection_blocks.c b/board/phytec/common/phytec_som_detection_blocks.c
new file mode 100644
index 00000000000..5f3c27ef0c2
--- /dev/null
+++ b/board/phytec/common/phytec_som_detection_blocks.c
@@ -0,0 +1,105 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (C) 2024 PHYTEC Messtechnik GmbH
+ * Author: Daniel Schultz <d.schultz@phytec.de>
+ */
+
+#include <malloc.h>
+#include <u-boot/crc.h>
+#include <net.h>
+#include <vsprintf.h>
+
+#include "phytec_som_detection_blocks.h"
+
+#if IS_ENABLED(CONFIG_PHYTEC_SOM_DETECTION_BLOCKS)
+
+struct phytec_api3_element *
+ phytec_blocks_init_mac(struct phytec_api3_block_header *header,
+ uint8_t *payload)
+{
+ struct phytec_api3_element *element;
+ struct phytec_api3_block_mac *mac;
+ unsigned int crc;
+ unsigned int len = sizeof(struct phytec_api3_block_mac);
+
+ if (!header)
+ return NULL;
+ if (!payload)
+ return NULL;
+
+ element = (struct phytec_api3_element *)
+ calloc(8, PHYTEC_API3_ELEMENT_HEADER_SIZE + len);
+ if (!element) {
+ pr_err("%s: Unable to allocate memory\n", __func__);
+ return NULL;
+ }
+ element->block_type = header->block_type;
+ memcpy(&element->block.mac, payload, len);
+ mac = &element->block.mac;
+
+ debug("%s: interface: %i\n", __func__, mac->interface);
+ debug("%s: MAC %pM\n", __func__, mac->address);
+
+ crc = crc8(0, (const unsigned char *)mac, len);
+ debug("%s: crc: %x\n", __func__, crc);
+ if (crc) {
+ pr_err("%s: CRC mismatch. API3 block payload is unusable\n",
+ __func__);
+ return NULL;
+ }
+
+ return element;
+}
+
+int __maybe_unused
+ phytec_blocks_add_mac_to_env(struct phytec_api3_element *element)
+{
+ char enetenv[9] = "ethaddr";
+ char buf[ARP_HLEN_ASCII + 1];
+ struct phytec_api3_block_mac *block = &element->block.mac;
+ int ret;
+
+ if (!is_valid_ethaddr(block->address)) {
+ pr_err("%s: Invalid MAC address in block.\n", __func__);
+ return -1;
+ }
+
+ if (block->interface > 0) {
+ ret = sprintf(enetenv, "eth%iaddr", block->interface);
+ if (ret != 8) {
+ pr_err("%s: Unable to create env string\n", __func__);
+ return -1;
+ }
+ }
+
+ ret = sprintf(buf, "%pM", block->address);
+ if (ret != ARP_HLEN_ASCII) {
+ pr_err("%s: Unable to convert MAC address\n", __func__);
+ return -1;
+ }
+ ret = env_set(enetenv, buf);
+ if (ret) {
+ pr_err("%s: Failed to set MAC address to env.\n", __func__);
+ return -1;
+ }
+
+ debug("%s: Added %s to %s\n", __func__, buf, enetenv);
+ return 0;
+}
+
+#else
+
+inline struct phytec_api3_element *
+ phytec_api3_init_mac_block(struct phytec_api3_block_header *header,
+ uint8_t *payload)
+{
+ return NULL;
+}
+
+inline int __maybe_unused
+ phytec_blocks_add_mac_to_env(struct phytec_api3_element *element)
+{
+ return -1;
+}
+
+#endif
diff --git a/board/phytec/common/phytec_som_detection_blocks.h b/board/phytec/common/phytec_som_detection_blocks.h
new file mode 100644
index 00000000000..2a5a83c9039
--- /dev/null
+++ b/board/phytec/common/phytec_som_detection_blocks.h
@@ -0,0 +1,61 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Copyright (C) 2024 PHYTEC Messtechnik GmbH
+ * Author: Daniel Schultz <d.schultz@phytec.de>
+ */
+
+#ifndef _PHYTEC_SOM_DETECTION_BLOCKS_H
+#define _PHYTEC_SOM_DETECTION_BLOCKS_H
+
+#define PHYTEC_API3_DATA_HEADER_LEN 8
+#define PHYTEC_API3_BLOCK_HEADER_LEN 4
+#define PHYTEC_API3_PAYLOAD_START \
+ (PHYTEC_API2_DATA_LEN + PHYTEC_API3_DATA_HEADER_LEN)
+
+#define PHYTEC_API3_ELEMENT_HEADER_SIZE \
+ (sizeof(struct phytec_api3_element *) + \
+ sizeof(enum phytec_api3_block_types))
+
+#define PHYTEC_API3_FOREACH_BLOCK(elem, data) \
+ for (elem = phytec_get_block_head(data); elem; elem = elem->next)
+
+struct phytec_api3_header {
+ u16 data_length; /* Total length in Bytes of all blocks */
+ u8 block_count; /* Number of blocks */
+ u8 sub_version; /* Block specification version */
+ u8 reserved[3]; /* Reserved */
+ u8 crc8; /* checksum */
+} __packed;
+
+struct phytec_api3_block_header {
+ u8 block_type; /* Block payload identifier */
+ u16 next_block; /* Address of the next block */
+ u8 crc8; /* checksum */
+} __packed;
+
+enum phytec_api3_block_types {
+ PHYTEC_API3_BLOCK_MAC = 0,
+};
+
+struct phytec_api3_block_mac {
+ u8 interface; /* Ethernet interface number */
+ u8 address[6]; /* MAC-Address */
+ u8 crc8; /* checksum */
+} __packed;
+
+struct phytec_api3_element {
+ struct phytec_api3_element *next;
+ enum phytec_api3_block_types block_type;
+ union {
+ struct phytec_api3_block_mac mac;
+ } block;
+} __packed;
+
+struct phytec_api3_element *
+ phytec_blocks_init_mac(struct phytec_api3_block_header *header,
+ uint8_t *payload);
+
+int __maybe_unused
+phytec_blocks_add_mac_to_env(struct phytec_api3_element *element);
+
+#endif /* _PHYTEC_SOM_DETECTION_BLOCKS_H */
diff --git a/configs/phycore_am62x_a53_defconfig b/configs/phycore_am62x_a53_defconfig
index fd36edc29dd..286cd89c5a6 100644
--- a/configs/phycore_am62x_a53_defconfig
+++ b/configs/phycore_am62x_a53_defconfig
@@ -59,6 +59,7 @@ CONFIG_SPL_OF_CONTROL=y
CONFIG_MULTI_DTB_FIT=y
CONFIG_SPL_MULTI_DTB_FIT=y
CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
+CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_MMC_ENV_DEV=1
CONFIG_NET_RANDOM_ETHADDR=y
generated by cgit v1.2.3 (git 2.0.4) at 2025-10-14 12:00:52 +0000