diff options
-rw-r--r-- | arch/arm/dts/imx8mm-evk-u-boot.dtsi | 12 | ||||
-rw-r--r-- | arch/arm/dts/imx8mm.dtsi | 12 | ||||
-rw-r--r-- | arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 12 | ||||
-rw-r--r-- | arch/arm/dts/imx8mn.dtsi | 6 |
4 files changed, 14 insertions, 28 deletions
diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi index b0c302964fd..28a371fbfd7 100644 --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi @@ -160,18 +160,8 @@ phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; }; -&usbotg1 { - /delete-property/ assigned-clocks; - /delete-property/ assigned-clock-parents; -}; - -&usbotg2 { - /delete-property/ assigned-clocks; - /delete-property/ assigned-clock-parents; -}; - &flexspi { assigned-clock-rates = <100000000>; assigned-clocks = <&clk IMX8MM_CLK_QSPI>; assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>; -};
\ No newline at end of file +}; diff --git a/arch/arm/dts/imx8mm.dtsi b/arch/arm/dts/imx8mm.dtsi index ec61ba38906..f2b20bf505f 100644 --- a/arch/arm/dts/imx8mm.dtsi +++ b/arch/arm/dts/imx8mm.dtsi @@ -1115,8 +1115,10 @@ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX8MM_CLK_USB1_CTRL_ROOT>; clock-names = "usb1_ctrl_root_clk"; - assigned-clocks = <&clk IMX8MM_CLK_USB_BUS>; - assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>; + assigned-clocks = <&clk IMX8MM_CLK_USB_BUS>, + <&clk IMX8MM_CLK_USB_CORE_REF>; + assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>, + <&clk IMX8MM_SYS_PLL1_100M>; fsl,usbphy = <&usbphynop1>; fsl,usbmisc = <&usbmisc1 0>; power-domains = <&usb_otg1_pd>; @@ -1135,8 +1137,10 @@ interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX8MM_CLK_USB1_CTRL_ROOT>; clock-names = "usb1_ctrl_root_clk"; - assigned-clocks = <&clk IMX8MM_CLK_USB_BUS>; - assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>; + assigned-clocks = <&clk IMX8MM_CLK_USB_BUS>, + <&clk IMX8MM_CLK_USB_CORE_REF>; + assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>, + <&clk IMX8MM_SYS_PLL1_100M>; fsl,usbphy = <&usbphynop2>; fsl,usbmisc = <&usbmisc2 0>; power-domains = <&usb_otg2_pd>; diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi index 63eb89d3bd2..5aff698ba5f 100644 --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi @@ -139,18 +139,8 @@ phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; }; -&usbotg1 { - /delete-property/ assigned-clocks; - /delete-property/ assigned-clock-parents; -}; - -&usbotg2 { - /delete-property/ assigned-clocks; - /delete-property/ assigned-clock-parents; -}; - &flexspi { assigned-clock-rates = <100000000>; assigned-clocks = <&clk IMX8MN_CLK_QSPI>; assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_100M>; -};
\ No newline at end of file +}; diff --git a/arch/arm/dts/imx8mn.dtsi b/arch/arm/dts/imx8mn.dtsi index 73bab236cb5..1b720f55416 100644 --- a/arch/arm/dts/imx8mn.dtsi +++ b/arch/arm/dts/imx8mn.dtsi @@ -948,8 +948,10 @@ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX8MN_CLK_USB1_CTRL_ROOT>; clock-names = "usb1_ctrl_root_clk"; - assigned-clocks = <&clk IMX8MN_CLK_USB_BUS>; - assigned-clock-parents = <&clk IMX8MN_SYS_PLL2_500M>; + assigned-clocks = <&clk IMX8MN_CLK_USB_BUS>, + <&clk IMX8MN_CLK_USB_CORE_REF>; + assigned-clock-parents = <&clk IMX8MN_SYS_PLL2_500M>, + <&clk IMX8MN_SYS_PLL1_100M>; fsl,usbphy = <&usbphynop1>; fsl,usbmisc = <&usbmisc1 0>; power-domains = <&usb_otg1_pd>; |