diff options
262 files changed, 5632 insertions, 1432 deletions
diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index 86480581a24..f66d58aa76f 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -361,7 +361,7 @@ jobs: sun50i: BUILDMAN: "sun50i" arm_catch_all: - BUILDMAN: "arm -x arm11,arm7,arm9,aarch64,at91,bcm,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap,rockchip,toradex,socfpga,k2,k3,zynq" + BUILDMAN: "arm -x arm11,arm7,arm9,aarch64,at91,bcm,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap,rk,toradex,socfpga,k2,k3,zynq" sandbox_x86: BUILDMAN: "sandbox x86" technexion: @@ -399,9 +399,9 @@ jobs: uniphier: BUILDMAN: "uniphier" aarch64_catch_all: - BUILDMAN: "aarch64 -x bcm,k3,tegra,ls1,ls2,mvebu,uniphier,sunxi,samsung,rockchip,versal,zynq" + BUILDMAN: "aarch64 -x bcm,k3,tegra,ls1,ls2,lx216,mvebu,uniphier,sunxi,samsung,socfpga,rk,versal,zynq" rockchip: - BUILDMAN: "rockchip" + BUILDMAN: "rk" sh: BUILDMAN: "sh -x arm" zynq: diff --git a/.travis.yml b/.travis.yml index 7ab855acb21..c59bd7790b6 100644 --- a/.travis.yml +++ b/.travis.yml @@ -248,7 +248,7 @@ matrix: - BUILDMAN="sun50i -x orangepi" - name: "buildman catch-all ARM" env: - - BUILDMAN="arm -x arm11,arm7,arm9,aarch64,at91,bcm,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap,rockchip,toradex,socfpga,k2,k3,zynq" + - BUILDMAN="arm -x arm11,arm7,arm9,aarch64,at91,bcm,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap,rk,toradex,socfpga,k2,k3,zynq" - name: "buildman sandbox x86" env: - BUILDMAN="sandbox x86" @@ -322,10 +322,10 @@ matrix: - BUILDMAN="uniphier" - name: "buildman catch-all AArch64" env: - - BUILDMAN="aarch64 -x bcm,k3,tegra,ls1,ls2,mvebu,uniphier,sunxi,samsung,rockchip,versal,zynq" + - BUILDMAN="aarch64 -x bcm,k3,tegra,ls1,ls2,lx216,mvebu,uniphier,sunxi,samsung,socfpga,rk,versal,zynq" - name: "buildman rockchip" env: - - BUILDMAN="rockchip -x orangepi" + - BUILDMAN="rk -x orangepi" - name: "buildman sh" env: - BUILDMAN="sh -x arm" diff --git a/MAINTAINERS b/MAINTAINERS index 1842569f242..37ff21a037b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -345,6 +345,7 @@ L: uboot-stm32@st-md-mailman.stormreply.com (moderated for non-subscribers) T: git https://gitlab.denx.de/u-boot/custodians/u-boot-stm.git S: Maintained F: arch/arm/mach-stm32mp/ +F: doc/board/st/ F: drivers/adc/stm32-adc* F: drivers/clk/clk_stm32mp1.c F: drivers/gpio/stm32_gpio.c @@ -1830,7 +1830,7 @@ define filechk_defaultenv.h (grep -v '^#' | \ grep -v '^$$' | \ tr '\n' '\0' | \ - sed -e 's/\\\x0/\n/g' | \ + sed -e 's/\\\x0\s*//g' | \ xxd -i ; echo ", 0x00" ; ) endef diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index be4cf029d03..9c593b2c986 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -333,6 +333,7 @@ dtb-$(CONFIG_THUNDERX) += thunderx-88xx.dtb dtb-$(CONFIG_ARCH_SOCFPGA) += \ socfpga_agilex_socdk.dtb \ + socfpga_arria5_secu1.dtb \ socfpga_arria5_socdk.dtb \ socfpga_arria10_socdk_sdmmc.dtb \ socfpga_cyclone5_mcvevk.dtb \ diff --git a/arch/arm/dts/socfpga_arria5_secu1.dts b/arch/arm/dts/socfpga_arria5_secu1.dts new file mode 100644 index 00000000000..dadf766682d --- /dev/null +++ b/arch/arm/dts/socfpga_arria5_secu1.dts @@ -0,0 +1,130 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2016-2020 ABB + */ + +#include "socfpga_arria5.dtsi" +#include "socfpga-common-u-boot.dtsi" +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "ABB SoC SECU1 Board"; + compatible = "altr,socfpga-secu1", "altr,socfpga"; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs = "console=ttyS0,115200"; + }; + + memory { + name = "memory"; + device_type = "memory"; + reg = <0x0 0x20000000>; /* 512MB */ + }; + + aliases { + /* + * this allow the ethaddr uboot environment variable contents + * to be added to the gmac0 device tree blob. + */ + ethernet0 = &gmac0; + spi0 = &spi1; + }; + + i2c_gpio: i2c@0 { + compatible = "i2c-gpio"; + #address-cells = <1>; + #size-cells = <0>; + gpios = <&portc 5 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) /* SDA */ + &portc 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; /* SCL */ + i2c-gpio,delay-us = <5>; /* ~100 kHz */ + i2c-gpio,deblock; + + temp_sensor@48 { + compatible = "national,lm75"; + reg = <0x48>; + }; + + eeprom@50 { + compatible = "at,24c08"; + reg = <0x50>; + }; + + rtc: rtc@68 { + compatible = "st,m41st87"; + reg = <0x68>; + interrupt-parent = <&intc>; + interrupts = <0 42 0x4>; + }; + }; + + regulator_3_3v: 3-3-v-regulator { + compatible = "regulator-fixed"; + regulator-name = "3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +}; + +&gmac0 { + status = "okay"; + phy-mode = "rgmii"; + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&gpio2 { + status = "okay"; +}; + +&mmc0 { + vmmc-supply = <®ulator_3_3v>; + vqmmc-supply = <®ulator_3_3v>; + bus-width = <4>; + u-boot,dm-pre-reloc; +}; + +&nand0 { + status = "okay"; +}; + +&porta { + bank-name = "porta"; +}; + +&portb { + bank-name = "portb"; +}; + +&portc { + bank-name = "portc"; +}; + +&spi1 { + status = "okay"; +}; + +&uart0 { + clock-frequency = <100000000>; + u-boot,dm-pre-reloc; + status = "okay"; +}; + +&uart1 { + clock-frequency = <100000000>; +}; + +&watchdog0 { + u-boot,dm-pre-reloc; + status = "okay"; +}; diff --git a/arch/arm/dts/uniphier-ld11-global.dts b/arch/arm/dts/uniphier-ld11-global.dts index 744b36e28a3..7968d524351 100644 --- a/arch/arm/dts/uniphier-ld11-global.dts +++ b/arch/arm/dts/uniphier-ld11-global.dts @@ -132,7 +132,7 @@ }; eeprom@50 { - compatible = "st,24c64", "atmel,24c64", "i2c-eeprom"; + compatible = "st,24c64", "atmel,24c64"; reg = <0x50>; pagesize = <32>; }; diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi index 337a3537ed2..e0737ac7f06 100644 --- a/arch/arm/dts/uniphier-ld11.dtsi +++ b/arch/arm/dts/uniphier-ld11.dtsi @@ -433,7 +433,7 @@ }; }; - emmc: sdhc@5a000000 { + emmc: mmc@5a000000 { compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; reg = <0x5a000000 0x400>; interrupts = <0 78 4>; @@ -566,7 +566,7 @@ }; }; - aidet: aidet@5fc20000 { + aidet: interrupt-controller@5fc20000 { compatible = "socionext,uniphier-ld11-aidet"; reg = <0x5fc20000 0x200>; interrupt-controller; @@ -621,7 +621,7 @@ }; }; - nand: nand@68000000 { + nand: nand-controller@68000000 { compatible = "socionext,uniphier-denali-nand-v5b"; status = "disabled"; reg-names = "nand_data", "denali_reg"; @@ -631,7 +631,8 @@ pinctrl-0 = <&pinctrl_nand>; clock-names = "nand", "nand_x", "ecc"; clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; - resets = <&sys_rst 2>; + reset-names = "nand", "reg"; + resets = <&sys_rst 2>, <&sys_rst 2>; }; }; }; diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi index 3721110b17a..59e4191dfc3 100644 --- a/arch/arm/dts/uniphier-ld20.dtsi +++ b/arch/arm/dts/uniphier-ld20.dtsi @@ -559,7 +559,7 @@ }; }; - emmc: sdhc@5a000000 { + emmc: mmc@5a000000 { compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; reg = <0x5a000000 0x400>; interrupts = <0 78 4>; @@ -578,7 +578,7 @@ cdns,phy-dll-delay-sdclk-hsmmc = <21>; }; - sd: sdhc@5a400000 { + sd: mmc@5a400000 { compatible = "socionext,uniphier-sd-v3.1.1"; status = "disabled"; reg = <0x5a400000 0x800>; @@ -664,7 +664,7 @@ }; }; - aidet: aidet@5fc20000 { + aidet: interrupt-controller@5fc20000 { compatible = "socionext,uniphier-ld20-aidet"; reg = <0x5fc20000 0x200>; interrupt-controller; @@ -944,7 +944,7 @@ socionext,syscon = <&soc_glue>; }; - nand: nand@68000000 { + nand: nand-controller@68000000 { compatible = "socionext,uniphier-denali-nand-v5b"; status = "disabled"; reg-names = "nand_data", "denali_reg"; @@ -954,7 +954,8 @@ pinctrl-0 = <&pinctrl_nand>; clock-names = "nand", "nand_x", "ecc"; clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; - resets = <&sys_rst 2>; + reset-names = "nand", "reg"; + resets = <&sys_rst 2>, <&sys_rst 2>; }; }; }; diff --git a/arch/arm/dts/uniphier-ld4.dtsi b/arch/arm/dts/uniphier-ld4.dtsi index c2706cef0b8..1eebc7fa3be 100644 --- a/arch/arm/dts/uniphier-ld4.dtsi +++ b/arch/arm/dts/uniphier-ld4.dtsi @@ -51,7 +51,7 @@ ranges; interrupt-parent = <&intc>; - l2: l2-cache@500c0000 { + l2: cache-controller@500c0000 { compatible = "socionext,uniphier-system-cache"; reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>; @@ -245,7 +245,7 @@ #dma-cells = <1>; }; - sd: sdhc@5a400000 { + sd: mmc@5a400000 { compatible = "socionext,uniphier-sd-v2.91"; status = "disabled"; reg = <0x5a400000 0x200>; @@ -265,7 +265,7 @@ sd-uhs-sdr50; }; - emmc: sdhc@5a500000 { + emmc: mmc@5a500000 { compatible = "socionext,uniphier-sd-v2.91"; status = "disabled"; reg = <0x5a500000 0x200>; @@ -375,7 +375,7 @@ interrupt-controller; }; - aidet: aidet@61830000 { + aidet: interrupt-controller@61830000 { compatible = "socionext,uniphier-ld4-aidet"; reg = <0x61830000 0x200>; interrupt-controller; @@ -398,7 +398,7 @@ }; }; - nand: nand@68000000 { + nand: nand-controller@68000000 { compatible = "socionext,uniphier-denali-nand-v5a"; status = "disabled"; reg-names = "nand_data", "denali_reg"; @@ -408,7 +408,8 @@ pinctrl-0 = <&pinctrl_nand2cs>; clock-names = "nand", "nand_x", "ecc"; clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; - resets = <&sys_rst 2>; + reset-names = "nand", "reg"; + resets = <&sys_rst 2>, <&sys_rst 2>; }; }; }; diff --git a/arch/arm/dts/uniphier-pro4-ace.dts b/arch/arm/dts/uniphier-pro4-ace.dts index ce8ea7b79bb..92cc48dd86d 100644 --- a/arch/arm/dts/uniphier-pro4-ace.dts +++ b/arch/arm/dts/uniphier-pro4-ace.dts @@ -50,10 +50,9 @@ status = "okay"; eeprom@54 { - compatible = "st,24c64", "atmel,24c64", "i2c-eeprom"; + compatible = "st,24c64", "atmel,24c64"; reg = <0x54>; pagesize = <32>; - u-boot,i2c-offset-len = <2>; }; }; diff --git a/arch/arm/dts/uniphier-pro4-sanji.dts b/arch/arm/dts/uniphier-pro4-sanji.dts index 686dd3af7e9..3b68a7c605c 100644 --- a/arch/arm/dts/uniphier-pro4-sanji.dts +++ b/arch/arm/dts/uniphier-pro4-sanji.dts @@ -45,10 +45,9 @@ status = "okay"; eeprom@54 { - compatible = "st,24c64", "atmel,24c64", "i2c-eeprom"; + compatible = "st,24c64", "atmel,24c64"; reg = <0x54>; pagesize = <32>; - u-boot,i2c-offset-len = <2>; }; }; diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi index d090fc7e2d8..d006b45f7a3 100644 --- a/arch/arm/dts/uniphier-pro4.dtsi +++ b/arch/arm/dts/uniphier-pro4.dtsi @@ -59,7 +59,7 @@ ranges; interrupt-parent = <&intc>; - l2: l2-cache@500c0000 { + l2: cache-controller@500c0000 { compatible = "socionext,uniphier-system-cache"; reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>; @@ -279,7 +279,7 @@ #dma-cells = <1>; }; - sd: sdhc@5a400000 { + sd: mmc@5a400000 { compatible = "socionext,uniphier-sd-v2.91"; status = "disabled"; reg = <0x5a400000 0x200>; @@ -299,7 +299,7 @@ sd-uhs-sdr50; }; - emmc: sdhc@5a500000 { + emmc: mmc@5a500000 { compatible = "socionext,uniphier-sd-v2.91"; status = "disabled"; reg = <0x5a500000 0x200>; @@ -317,7 +317,7 @@ non-removable; }; - sd1: sdhc@5a600000 { + sd1: mmc@5a600000 { compatible = "socionext,uniphier-sd-v2.91"; status = "disabled"; reg = <0x5a600000 0x200>; @@ -426,7 +426,7 @@ }; }; - aidet: aidet@5fc20000 { + aidet: interrupt-controller@5fc20000 { compatible = "socionext,uniphier-pro4-aidet"; reg = <0x5fc20000 0x200>; interrupt-controller; @@ -626,7 +626,7 @@ }; }; - nand: nand@68000000 { + nand: nand-controller@68000000 { compatible = "socionext,uniphier-denali-nand-v5a"; status = "disabled"; reg-names = "nand_data", "denali_reg"; @@ -636,7 +636,8 @@ pinctrl-0 = <&pinctrl_nand>; clock-names = "nand", "nand_x", "ecc"; clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; - resets = <&sys_rst 2>; + reset-names = "nand", "reg"; + resets = <&sys_rst 2>, <&sys_rst 2>; }; }; }; diff --git a/arch/arm/dts/uniphier-pro5.dtsi b/arch/arm/dts/uniphier-pro5.dtsi index 9cad79d0860..ba7e224b38e 100644 --- a/arch/arm/dts/uniphier-pro5.dtsi +++ b/arch/arm/dts/uniphier-pro5.dtsi @@ -131,7 +131,7 @@ ranges; interrupt-parent = <&intc>; - l2: l2-cache@500c0000 { + l2: cache-controller@500c0000 { compatible = "socionext,uniphier-system-cache"; reg = <0x500c0000 0x2000>, <0x503c0100 0x8>, <0x506c0000 0x400>; @@ -144,7 +144,7 @@ next-level-cache = <&l3>; }; - l3: l3-cache@500c8000 { + l3: cache-controller@500c8000 { compatible = "socionext,uniphier-system-cache"; reg = <0x500c8000 0x2000>, <0x503c8100 0x8>, <0x506c8000 0x400>; @@ -408,7 +408,7 @@ }; }; - aidet: aidet@5fc20000 { + aidet: interrupt-controller@5fc20000 { compatible = "socionext,uniphier-pro5-aidet"; reg = <0x5fc20000 0x200>; interrupt-controller; @@ -489,7 +489,7 @@ }; }; - nand: nand@68000000 { + nand: nand-controller@68000000 { compatible = "socionext,uniphier-denali-nand-v5b"; status = "disabled"; reg-names = "nand_data", "denali_reg"; @@ -499,10 +499,11 @@ pinctrl-0 = <&pinctrl_nand2cs>; clock-names = "nand", "nand_x", "ecc"; clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; - resets = <&sys_rst 2>; + reset-names = "nand", "reg"; + resets = <&sys_rst 2>, <&sys_rst 2>; }; - emmc: sdhc@68400000 { + emmc: mmc@68400000 { compatible = "socionext,uniphier-sd-v3.1"; status = "disabled"; reg = <0x68400000 0x800>; @@ -518,7 +519,7 @@ non-removable; }; - sd: sdhc@68800000 { + sd: mmc@68800000 { compatible = "socionext,uniphier-sd-v3.1"; status = "disabled"; reg = <0x68800000 0x800>; diff --git a/arch/arm/dts/uniphier-pxs2-gentil.dts b/arch/arm/dts/uniphier-pxs2-gentil.dts index b13d6277bf1..e27fd4f2a56 100644 --- a/arch/arm/dts/uniphier-pxs2-gentil.dts +++ b/arch/arm/dts/uniphier-pxs2-gentil.dts @@ -48,10 +48,9 @@ status = "okay"; eeprom@54 { - compatible = "st,24c64", "atmel,24c64", "i2c-eeprom"; + compatible = "st,24c64", "atmel,24c64"; reg = <0x54>; pagesize = <32>; - u-boot,i2c-offset-len = <2>; }; }; diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi index 4e11e85d8dd..8d968d36810 100644 --- a/arch/arm/dts/uniphier-pxs2.dtsi +++ b/arch/arm/dts/uniphier-pxs2.dtsi @@ -157,7 +157,7 @@ ranges; interrupt-parent = <&intc>; - l2: l2-cache@500c0000 { + l2: cache-controller@500c0000 { compatible = "socionext,uniphier-system-cache"; reg = <0x500c0000 0x2000>, <0x503c0100 0x8>, <0x506c0000 0x400>; @@ -446,7 +446,7 @@ }; }; - emmc: sdhc@5a000000 { + emmc: mmc@5a000000 { compatible = "socionext,uniphier-sd-v3.1.1"; status = "disabled"; reg = <0x5a000000 0x800>; @@ -462,7 +462,7 @@ non-removable; }; - sd: sdhc@5a400000 { + sd: mmc@5a400000 { compatible = "socionext,uniphier-sd-v3.1.1"; status = "disabled"; reg = <0x5a400000 0x800>; @@ -508,7 +508,7 @@ }; }; - aidet: aidet@5fc20000 { + aidet: interrupt-controller@5fc20000 { compatible = "socionext,uniphier-pxs2-aidet"; reg = <0x5fc20000 0x200>; interrupt-controller; @@ -799,7 +799,7 @@ }; }; - nand: nand@68000000 { + nand: nand-controller@68000000 { compatible = "socionext,uniphier-denali-nand-v5b"; status = "disabled"; reg-names = "nand_data", "denali_reg"; @@ -809,7 +809,8 @@ pinctrl-0 = <&pinctrl_nand2cs>; clock-names = "nand", "nand_x", "ecc"; clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; - resets = <&sys_rst 2>; + reset-names = "nand", "reg"; + resets = <&sys_rst 2>, <&sys_rst 2>; }; }; }; diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi index b1aff285c8b..ed079c17113 100644 --- a/arch/arm/dts/uniphier-pxs3.dtsi +++ b/arch/arm/dts/uniphier-pxs3.dtsi @@ -353,7 +353,7 @@ }; }; - emmc: sdhc@5a000000 { + emmc: mmc@5a000000 { compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; reg = <0x5a000000 0x400>; interrupts = <0 78 4>; @@ -372,7 +372,7 @@ cdns,phy-dll-delay-sdclk-hsmmc = <21>; }; - sd: sdhc@5a400000 { + sd: mmc@5a400000 { compatible = "socionext,uniphier-sd-v3.1.1"; status = "disabled"; reg = <0x5a400000 0x800>; @@ -462,7 +462,7 @@ }; }; - aidet: aidet@5fc20000 { + aidet: interrupt-controller@5fc20000 { compatible = "socionext,uniphier-pxs3-aidet"; reg = <0x5fc20000 0x200>; interrupt-controller; @@ -821,7 +821,7 @@ socionext,syscon = <&soc_glue>; }; - nand: nand@68000000 { + nand: nand-controller@68000000 { compatible = "socionext,uniphier-denali-nand-v5b"; status = "disabled"; reg-names = "nand_data", "denali_reg"; @@ -831,7 +831,8 @@ pinctrl-0 = <&pinctrl_nand>; clock-names = "nand", "nand_x", "ecc"; clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; - resets = <&sys_rst 2>; + reset-names = "nand", "reg"; + resets = <&sys_rst 2>, <&sys_rst 2>; }; }; }; diff --git a/arch/arm/dts/uniphier-ref-daughter.dtsi b/arch/arm/dts/uniphier-ref-daughter.dtsi index 9240a313b93..a11897669c2 100644 --- a/arch/arm/dts/uniphier-ref-daughter.dtsi +++ b/arch/arm/dts/uniphier-ref-daughter.dtsi @@ -7,9 +7,8 @@ &i2c0 { eeprom@50 { - compatible = "microchip,24lc128", "i2c-eeprom"; + compatible = "microchip,24lc128", "atmel,24c128"; reg = <0x50>; pagesize = <64>; - u-boot,i2c-offset-len = <2>; }; }; diff --git a/arch/arm/dts/uniphier-sld8.dtsi b/arch/arm/dts/uniphier-sld8.dtsi index efce02768b6..393157eb14e 100644 --- a/arch/arm/dts/uniphier-sld8.dtsi +++ b/arch/arm/dts/uniphier-sld8.dtsi @@ -51,7 +51,7 @@ ranges; interrupt-parent = <&intc>; - l2: l2-cache@500c0000 { + l2: cache-controller@500c0000 { compatible = "socionext,uniphier-system-cache"; reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>; @@ -249,7 +249,7 @@ #dma-cells = <1>; }; - sd: sdhc@5a400000 { + sd: mmc@5a400000 { compatible = "socionext,uniphier-sd-v2.91"; status = "disabled"; reg = <0x5a400000 0x200>; @@ -269,7 +269,7 @@ sd-uhs-sdr50; }; - emmc: sdhc@5a500000 { + emmc: mmc@5a500000 { compatible = "socionext,uniphier-sd-v2.91"; status = "disabled"; reg = <0x5a500000 0x200>; @@ -379,7 +379,7 @@ interrupt-controller; }; - aidet: aidet@61830000 { + aidet: interrupt-controller@61830000 { compatible = "socionext,uniphier-sld8-aidet"; reg = <0x61830000 0x200>; interrupt-controller; @@ -402,7 +402,7 @@ }; }; - nand: nand@68000000 { + nand: nand-controller@68000000 { compatible = "socionext,uniphier-denali-nand-v5a"; status = "disabled"; reg-names = "nand_data", "denali_reg"; @@ -412,7 +412,8 @@ pinctrl-0 = <&pinctrl_nand2cs>; clock-names = "nand", "nand_x", "ecc"; clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; - resets = <&sys_rst 2>; + reset-names = "nand", "reg"; + resets = <&sys_rst 2>, <&sys_rst 2>; }; }; }; diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index 969698c83fa..38d6c1b2ba3 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -96,6 +96,11 @@ config TARGET_SOCFPGA_ARRIA10_SOCDK bool "Altera SOCFPGA SoCDK (Arria 10)" select TARGET_SOCFPGA_ARRIA10 +config TARGET_SOCFPGA_ARRIA5_SECU1 + bool "ABB SECU1 (Arria V)" + select TARGET_SOCFPGA_ARRIA5 + select VENDOR_KM + config TARGET_SOCFPGA_ARRIA5_SOCDK bool "Altera SOCFPGA SoCDK (Arria V)" select TARGET_SOCFPGA_ARRIA5 @@ -158,6 +163,7 @@ config SYS_BOARD default "de10-nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO default "is1" if TARGET_SOCFPGA_IS1 default "mcvevk" if TARGET_SOCFPGA_ARIES_MCVEVK + default "secu1" if TARGET_SOCFPGA_ARRIA5_SECU1 default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES default "sr1500" if TARGET_SOCFPGA_SR1500 @@ -173,6 +179,7 @@ config SYS_VENDOR default "aries" if TARGET_SOCFPGA_ARIES_MCVEVK default "devboards" if TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1 default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES + default "keymile" if TARGET_SOCFPGA_ARRIA5_SECU1 default "softing" if TARGET_SOCFPGA_SOFTING_VINING_FPGA default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO default "terasic" if TARGET_SOCFPGA_TERASIC_DE1_SOC @@ -184,6 +191,7 @@ config SYS_SOC config SYS_CONFIG_NAME default "socfpga_agilex_socdk" if TARGET_SOCFPGA_AGILEX_SOCDK + default "socfpga_arria5_secu1" if TARGET_SOCFPGA_ARRIA5_SECU1 default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK default "socfpga_arria10_socdk" if TARGET_SOCFPGA_ARRIA10_SOCDK default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK @@ -199,4 +207,6 @@ config SYS_CONFIG_NAME default "socfpga_stratix10_socdk" if TARGET_SOCFPGA_STRATIX10_SOCDK default "socfpga_vining_fpga" if TARGET_SOCFPGA_SOFTING_VINING_FPGA +source "board/keymile/Kconfig" + endif diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile index 115af244cd5..769778cf508 100644 --- a/arch/arm/mach-uniphier/Makefile +++ b/arch/arm/mach-uniphier/Makefile @@ -22,6 +22,7 @@ endif obj-$(CONFIG_MICRO_SUPPORT_CARD) += micro-support-card.o obj-y += pinctrl-glue.o obj-$(CONFIG_MMC) += mmc-first-dev.o +obj-$(CONFIG_NAND_DENALI) += nand-reset.o obj-y += fdt-fixup.o endif diff --git a/arch/arm/mach-uniphier/board_init.c b/arch/arm/mach-uniphier/board_init.c index 99727a30042..4f9cd6e722c 100644 --- a/arch/arm/mach-uniphier/board_init.c +++ b/arch/arm/mach-uniphier/board_init.c @@ -141,6 +141,10 @@ int board_init(void) support_card_late_init(); + led_puts("U4"); + + uniphier_nand_reset_assert(); + led_puts("Uboo"); return 0; diff --git a/arch/arm/mach-uniphier/board_late_init.c b/arch/arm/mach-uniphier/board_late_init.c index 793283058c3..378aad0c9c4 100644 --- a/arch/arm/mach-uniphier/board_late_init.c +++ b/arch/arm/mach-uniphier/board_late_init.c @@ -14,25 +14,9 @@ #include <stdio.h> #include <linux/io.h> #include <linux/printk.h> -#include <../drivers/mtd/nand/raw/denali.h> #include "init.h" -static void nand_denali_wp_disable(void) -{ -#ifdef CONFIG_NAND_DENALI - /* - * Since the boot rom enables the write protection for NAND boot mode, - * it must be disabled somewhere for "nand write", "nand erase", etc. - * The workaround is here to not disturb the Denali NAND controller - * driver just for a really SoC-specific thing. - */ - void __iomem *denali_reg = (void __iomem *)CONFIG_SYS_NAND_REGS_BASE; - - writel(WRITE_PROTECT__FLAG, denali_reg + WRITE_PROTECT); -#endif -} - static void uniphier_set_env_fdt_file(void) { DECLARE_GLOBAL_DATA_PTR; @@ -114,7 +98,6 @@ int board_late_init(void) case BOOT_DEVICE_NAND: printf("NAND Boot"); env_set("bootdev", "nand"); - nand_denali_wp_disable(); break; case BOOT_DEVICE_NOR: printf("NOR Boot"); diff --git a/arch/arm/mach-uniphier/clk/clk-early-ld4.c b/arch/arm/mach-uniphier/clk/clk-early-ld4.c index f32f78dd26d..0f9ce650976 100644 --- a/arch/arm/mach-uniphier/clk/clk-early-ld4.c +++ b/arch/arm/mach-uniphier/clk/clk-early-ld4.c @@ -15,13 +15,6 @@ void uniphier_ld4_early_clk_init(void) { u32 tmp; - /* deassert reset */ - if (spl_boot_device() != BOOT_DEVICE_NAND) { - tmp = readl(sc_base + SC_RSTCTRL); - tmp &= ~SC_RSTCTRL_NRST_NAND; - writel(tmp, sc_base + SC_RSTCTRL); - }; - /* provide clocks */ tmp = readl(sc_base + SC_CLKCTRL); tmp |= SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI; diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h index 9dc5b885a5f..3c77f488534 100644 --- a/arch/arm/mach-uniphier/init.h +++ b/arch/arm/mach-uniphier/init.h @@ -101,6 +101,14 @@ unsigned int uniphier_boot_device_raw(void); int uniphier_have_internal_stm(void); int uniphier_boot_from_backend(void); int uniphier_pin_init(const char *pinconfig_name); + +#ifdef CONFIG_NAND_DENALI +void uniphier_nand_reset_assert(void); +#else +static inline void uniphier_nand_reset_assert(void) +{ +} +#endif #ifdef CONFIG_ARM64 void uniphier_mem_map_init(unsigned long dram_base, unsigned long dram_size); #else diff --git a/arch/arm/mach-uniphier/micro-support-card.c b/arch/arm/mach-uniphier/micro-support-card.c index 46879019fda..c71470a2042 100644 --- a/arch/arm/mach-uniphier/micro-support-card.c +++ b/arch/arm/mach-uniphier/micro-support-card.c @@ -1,39 +1,58 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright (C) 2012-2015 Panasonic Corporation - * Copyright (C) 2015-2016 Socionext Inc. + * Copyright (C) 2015-2020 Socionext Inc. * Author: Masahiro Yamada <yamada.masahiro@socionext.com> */ #include <common.h> +#include <dm/of.h> +#include <fdt_support.h> #include <linux/ctype.h> #include <linux/io.h> #include "micro-support-card.h" -#define MICRO_SUPPORT_CARD_BASE 0x43f00000 -#define SMC911X_BASE ((MICRO_SUPPORT_CARD_BASE) + 0x00000) -#define LED_BASE ((MICRO_SUPPORT_CARD_BASE) + 0x90000) -#define NS16550A_BASE ((MICRO_SUPPORT_CARD_BASE) + 0xb0000) -#define MICRO_SUPPORT_CARD_RESET ((MICRO_SUPPORT_CARD_BASE) + 0xd0034) -#define MICRO_SUPPORT_CARD_REVISION ((MICRO_SUPPORT_CARD_BASE) + 0xd00E0) +#define SMC911X_OFFSET 0x00000 +#define LED_OFFSET 0x90000 +#define NS16550A_OFFSET 0xb0000 +#define MICRO_SUPPORT_CARD_RESET 0xd0034 +#define MICRO_SUPPORT_CARD_REVISION 0xd00e0 static bool support_card_found; +static void __iomem *support_card_base; static void support_card_detect(void) { DECLARE_GLOBAL_DATA_PTR; const void *fdt = gd->fdt_blob; int offset; + u64 addr, addr2; offset = fdt_node_offset_by_compatible(fdt, 0, "smsc,lan9118"); if (offset < 0) return; + addr = fdt_get_base_address(fdt, offset); + if (addr == OF_BAD_ADDR) + return; + addr -= SMC911X_OFFSET; + offset = fdt_node_offset_by_compatible(fdt, 0, "ns16550a"); if (offset < 0) return; + addr2 = fdt_get_base_address(fdt, offset); + if (addr2 == OF_BAD_ADDR) + return; + addr2 -= NS16550A_OFFSET; + + /* sanity check */ + if (addr != addr2) + return; + + support_card_base = ioremap(addr, 0x100000); + support_card_found = true; } @@ -45,19 +64,19 @@ static void support_card_detect(void) */ static void support_card_reset_deassert(void) { - writel(0x00010000, MICRO_SUPPORT_CARD_RESET); + writel(0x00010000, support_card_base + MICRO_SUPPORT_CARD_RESET); } static void support_card_reset(void) { - writel(0x00020003, MICRO_SUPPORT_CARD_RESET); + writel(0x00020003, support_card_base + MICRO_SUPPORT_CARD_RESET); } static int support_card_show_revision(void) { u32 revision; - revision = readl(MICRO_SUPPORT_CARD_REVISION); + revision = readl(support_card_base + MICRO_SUPPORT_CARD_REVISION); revision &= 0xff; /* revision 3.6.x card changed the revision format */ @@ -94,7 +113,7 @@ int board_eth_init(bd_t *bis) if (!support_card_found) return 0; - return smc911x_initialize(0, SMC911X_BASE); + return smc911x_initialize(0, (unsigned long)support_card_base + SMC911X_OFFSET); } #endif @@ -264,5 +283,5 @@ void led_puts(const char *s) s++; } - writel(~val, LED_BASE); + writel(~val, support_card_base + LED_OFFSET); } diff --git a/arch/arm/mach-uniphier/mmc-first-dev.c b/arch/arm/mach-uniphier/mmc-first-dev.c index 149e662070f..e2f4f4eb5c7 100644 --- a/arch/arm/mach-uniphier/mmc-first-dev.c +++ b/arch/arm/mach-uniphier/mmc-first-dev.c @@ -9,13 +9,14 @@ #include <mmc.h> #include <linux/errno.h> -static int find_first_mmc_device(void) +static int find_first_mmc_device(bool is_sd) { struct mmc *mmc; int i; for (i = 0; (mmc = find_mmc_device(i)); i++) { - if (!mmc_init(mmc) && IS_MMC(mmc)) + if (!mmc_init(mmc) && + ((is_sd && IS_SD(mmc)) || (!is_sd && IS_MMC(mmc)))) return i; } @@ -24,14 +25,14 @@ static int find_first_mmc_device(void) int mmc_get_env_dev(void) { - return find_first_mmc_device(); + return find_first_mmc_device(false); } static int do_mmcsetn(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { int dev; - dev = find_first_mmc_device(); + dev = find_first_mmc_device(false); if (dev < 0) return CMD_RET_FAILURE; @@ -44,3 +45,21 @@ U_BOOT_CMD( "Set the first MMC (not SD) dev number to \"mmc_first_dev\" environment", "" ); + +static int do_sdsetn(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + int dev; + + dev = find_first_mmc_device(true); + if (dev < 0) + return CMD_RET_FAILURE; + + env_set_ulong("sd_first_dev", dev); + return CMD_RET_SUCCESS; +} + +U_BOOT_CMD( + sdsetn, 1, 1, do_sdsetn, + "Set the first SD dev number to \"sd_first_dev\" environment", + "" +); diff --git a/arch/arm/mach-uniphier/nand-reset.c b/arch/arm/mach-uniphier/nand-reset.c new file mode 100644 index 00000000000..11cadaabd89 --- /dev/null +++ b/arch/arm/mach-uniphier/nand-reset.c @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: GPL-2.0 or later +/* + * Copyright (C) 2020 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> + */ + +#include <linux/errno.h> +#include <dm.h> +#include <dm/uclass-internal.h> +#include <reset.h> + +#include "init.h" + +/* + * Assert the Denali NAND controller reset if found. + * + * On LD4, the bootstrap process starts running after power-on reset regardless + * of the boot mode, here the pin-mux is not necessarily set up for NAND, then + * the controller is stuck. Assert the controller reset here, and should be + * deasserted in the driver after the pin-mux is correctly handled. For other + * SoCs, the bootstrap runs only when the boot mode selects ONFi, but it is yet + * effective when the boot swap is on. So, the reset should be asserted anyway. + */ +void uniphier_nand_reset_assert(void) +{ + struct udevice *dev; + struct reset_ctl_bulk resets; + int ret; + + ret = uclass_find_first_device(UCLASS_MTD, &dev); + if (ret || !dev) + return; + + /* make sure this is the Denali NAND controller */ + if (strcmp(dev->driver->name, "denali-nand-dt")) + return; + + ret = reset_get_bulk(dev, &resets); + if (ret) + return; + + reset_assert_bulk(&resets); +} diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig index 3e8ea385295..f1123173765 100644 --- a/arch/powerpc/cpu/mpc8xx/Kconfig +++ b/arch/powerpc/cpu/mpc8xx/Kconfig @@ -25,10 +25,6 @@ config MPC885 endchoice -#config MPC8xx_WATCHDOG -# bool "Watchdog" -# select HW_WATCHDOG - config 8xx_GCLK_FREQ int "CPU GCLK Frequency" diff --git a/arch/x86/cpu/apollolake/cpu.c b/arch/x86/cpu/apollolake/cpu.c index 3d05c82a5c6..aa7a3dbd63e 100644 --- a/arch/x86/cpu/apollolake/cpu.c +++ b/arch/x86/cpu/apollolake/cpu.c @@ -14,15 +14,10 @@ static int apl_get_info(struct udevice *dev, struct cpu_info *info) return cpu_intel_get_info(info, INTEL_BCLK_MHZ); } -static int apl_get_count(struct udevice *dev) -{ - return 4; -} - static const struct cpu_ops cpu_x86_apl_ops = { .get_desc = cpu_x86_get_desc, .get_info = apl_get_info, - .get_count = apl_get_count, + .get_count = cpu_x86_get_count, .get_vendor = cpu_x86_get_vendor, }; diff --git a/arch/x86/cpu/cpu_x86.c b/arch/x86/cpu/cpu_x86.c index 1aaf851bb45..3f2ba0881e8 100644 --- a/arch/x86/cpu/cpu_x86.c +++ b/arch/x86/cpu/cpu_x86.c @@ -52,7 +52,7 @@ int cpu_x86_get_desc(struct udevice *dev, char *buf, int size) return 0; } -static int cpu_x86_get_count(struct udevice *dev) +int cpu_x86_get_count(struct udevice *dev) { int node, cpu; int num = 0; diff --git a/arch/x86/cpu/intel_common/p2sb.c b/arch/x86/cpu/intel_common/p2sb.c index b72f50a6274..d5b4846e0a2 100644 --- a/arch/x86/cpu/intel_common/p2sb.c +++ b/arch/x86/cpu/intel_common/p2sb.c @@ -16,7 +16,7 @@ struct p2sb_platdata { #if CONFIG_IS_ENABLED(OF_PLATDATA) - struct dtd_intel_apl_p2sb dtplat; + struct dtd_intel_p2sb dtplat; #endif ulong mmio_base; pci_dev_t bdf; @@ -43,14 +43,14 @@ struct p2sb_platdata { #define P2SB_HPTC_ADDRESS_SELECT_3 (3 << 0) /* - * apl_p2sb_early_init() - Enable decoding for HPET range + * p2sb_early_init() - Enable decoding for HPET range * * This is needed by FSP-M which uses the High Precision Event Timer. * * @dev: P2SB device * @return 0 if OK, -ve on error */ -static int apl_p2sb_early_init(struct udevice *dev) +static int p2sb_early_init(struct udevice *dev) { struct p2sb_platdata *plat = dev_get_platdata(dev); pci_dev_t pdev = plat->bdf; @@ -76,7 +76,7 @@ static int apl_p2sb_early_init(struct udevice *dev) return 0; } -static int apl_p2sb_spl_init(struct udevice *dev) +static int p2sb_spl_init(struct udevice *dev) { /* Enable decoding for HPET. Needed for FSP global pointer storage */ dm_pci_write_config(dev, P2SB_HPTC, P2SB_HPTC_ADDRESS_SELECT_0 | @@ -85,7 +85,7 @@ static int apl_p2sb_spl_init(struct udevice *dev) return 0; } -int apl_p2sb_ofdata_to_platdata(struct udevice *dev) +int p2sb_ofdata_to_platdata(struct udevice *dev) { struct p2sb_uc_priv *upriv = dev_get_uclass_priv(dev); struct p2sb_platdata *plat = dev_get_platdata(dev); @@ -117,10 +117,10 @@ int apl_p2sb_ofdata_to_platdata(struct udevice *dev) return 0; } -static int apl_p2sb_probe(struct udevice *dev) +static int p2sb_probe(struct udevice *dev) { if (spl_phase() == PHASE_TPL) { - return apl_p2sb_early_init(dev); + return p2sb_early_init(dev); } else { struct p2sb_platdata *plat = dev_get_platdata(dev); @@ -130,7 +130,7 @@ static int apl_p2sb_probe(struct udevice *dev) return -EINVAL; if (spl_phase() == PHASE_SPL) - return apl_p2sb_spl_init(dev); + return p2sb_spl_init(dev); } return 0; @@ -152,17 +152,17 @@ static int p2sb_child_post_bind(struct udevice *dev) return 0; } -static const struct udevice_id apl_p2sb_ids[] = { - { .compatible = "intel,apl-p2sb" }, +static const struct udevice_id p2sb_ids[] = { + { .compatible = "intel,p2sb" }, { } }; -U_BOOT_DRIVER(apl_p2sb_drv) = { - .name = "intel_apl_p2sb", +U_BOOT_DRIVER(p2sb_drv) = { + .name = "intel_p2sb", .id = UCLASS_P2SB, - .of_match = apl_p2sb_ids, - .probe = apl_p2sb_probe, - .ofdata_to_platdata = apl_p2sb_ofdata_to_platdata, + .of_match = p2sb_ids, + .probe = p2sb_probe, + .ofdata_to_platdata = p2sb_ofdata_to_platdata, .platdata_auto_alloc_size = sizeof(struct p2sb_platdata), .per_child_platdata_auto_alloc_size = sizeof(struct p2sb_child_platdata), diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S index 26cf995db2d..01524635e9c 100644 --- a/arch/x86/cpu/start.S +++ b/arch/x86/cpu/start.S @@ -50,7 +50,7 @@ _x86boot_start: movl %cr0, %eax orl $(X86_CR0_NW | X86_CR0_CD), %eax movl %eax, %cr0 - invd + wbinvd /* * Zero the BIST (Built-In Self Test) value since we don't have it. diff --git a/arch/x86/cpu/start16.S b/arch/x86/cpu/start16.S index 292e7505081..54f4ff6662a 100644 --- a/arch/x86/cpu/start16.S +++ b/arch/x86/cpu/start16.S @@ -28,7 +28,7 @@ start16: movl %cr0, %eax orl $(X86_CR0_NW | X86_CR0_CD), %eax movl %eax, %cr0 - invd + wbinvd /* load the temporary Global Descriptor Table */ data32 cs lidt idt_ptr diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts index 44a4619a669..af52e11c89a 100644 --- a/arch/x86/dts/chromebook_coral.dts +++ b/arch/x86/dts/chromebook_coral.dts @@ -136,7 +136,7 @@ p2sb: p2sb@d,0 { u-boot,dm-pre-reloc; reg = <0x02006810 0 0 0 0>; - compatible = "intel,apl-p2sb"; + compatible = "intel,p2sb"; early-regs = <IOMAP_P2SB_BAR 0x100000>; n { diff --git a/arch/x86/include/asm/cpu_x86.h b/arch/x86/include/asm/cpu_x86.h index 19223f2c3b4..ae8f4dcd5dc 100644 --- a/arch/x86/include/asm/cpu_x86.h +++ b/arch/x86/include/asm/cpu_x86.h @@ -31,6 +31,18 @@ int cpu_x86_bind(struct udevice *dev); int cpu_x86_get_desc(struct udevice *dev, char *buf, int size); /** + * cpu_x86_get_count() - Get the number of cores for an x86 CPU + * + * This function is suitable to use as the get_count() method for + * the CPU uclass. + * + * @dev: Device to check (UCLASS_CPU) + * @return: Number of cores if successful, + * -ENOENT if not "/cpus" entry is found in the device tree + */ +int cpu_x86_get_count(struct udevice *dev); + +/** * cpu_x86_get_vendor() - Get a vendor string for an x86 CPU * * This uses cpu_vendor_name() and is suitable to use as the get_vendor() diff --git a/arch/x86/lib/mrccache.c b/arch/x86/lib/mrccache.c index 8914960226d..d1c44f290c4 100644 --- a/arch/x86/lib/mrccache.c +++ b/arch/x86/lib/mrccache.c @@ -241,6 +241,8 @@ int mrccache_get_region(enum mrc_type_t type, struct udevice **devp, * memory map cannot be read. */ ret = uclass_find_first_device(UCLASS_SPI_FLASH, &dev); + if (!ret && !dev) + ret = -ENODEV; if (ret) return log_msg_ret("Cannot find SPI flash\n", ret); ret = dm_spi_get_mmap(dev, &map_base, &map_size, &offset); diff --git a/board/keymile/Kconfig b/board/keymile/Kconfig index 634dbbe097b..7f4cad86aa7 100644 --- a/board/keymile/Kconfig +++ b/board/keymile/Kconfig @@ -14,6 +14,7 @@ menu "KM Board Setup" config KM_PNVRAM hex "Pseudo RAM" default 0x80000 + depends on !ARCH_SOCFPGA help Start address of the pseudo non-volatile RAM for application. @@ -21,6 +22,7 @@ config KM_PHRAM hex "Physical RAM" default 0x17F000 if ARM default 0x100000 if PPC + depends on !ARCH_SOCFPGA help Start address of the physical RAM, which is the mounted /var folder. @@ -29,6 +31,7 @@ config KM_RESERVED_PRAM default 0x801000 if KIRKWOOD default 0x0 if MPC83xx default 0x1000 if MPC85xx + depends on !ARCH_SOCFPGA help Reserved physical RAM area at the end of memory for special purposes. @@ -37,6 +40,7 @@ config KM_CRAMFS_ADDR default 0x2400000 if KIRKWOOD default 0xC00000 if MPC83xx default 0x2000000 if MPC85xx + depends on !ARCH_SOCFPGA help Start address of the CRAMFS containing the Linux kernel. @@ -44,13 +48,13 @@ config KM_KERNEL_ADDR hex "Kernel Load Address" default 0x2000000 if KIRKWOOD default 0x400000 if MPC83xx - default 0x1000000 if MPC85xx + default 0x1000000 if MPC85xx || ARCH_SOCFPGA help Address where to load Linux kernel in RAM. config KM_FDT_ADDR hex "FDT Load Address" - default 0x23E0000 if KIRKWOOD + default 0x23E0000 if KIRKWOOD || ARCH_SOCFPGA default 0xB80000 if MPC83xx default 0x1F80000 if MPC85xx help @@ -71,7 +75,7 @@ config KM_DEF_NETDEV config KM_COMMON_ETH_INIT bool "Common Ethernet Initialization" default y if KIRKWOOD || MPC83xx - default n if MPC85xx + default n if MPC85xx || ARCH_SOCFPGA help Use the Ethernet initialization implemented in common code, which detects if a Piggy board is present. @@ -91,6 +95,7 @@ config KM_MVEXTSW_ADDR config KM_IVM_BUS int "IVM I2C Bus" + default 0 if ARCH_SOCFPGA default 1 if KIRKWOOD || MPC85xx default 2 if MPC83xx help diff --git a/board/keymile/common/ivm.c b/board/keymile/common/ivm.c index fee7f03c8c6..60b89fe348c 100644 --- a/board/keymile/common/ivm.c +++ b/board/keymile/common/ivm.c @@ -328,7 +328,24 @@ static int ivm_populate_env(unsigned char *buf, int len, int mac_address_offset) int ivm_read_eeprom(unsigned char *buf, int len, int mac_address_offset) { int ret; +#ifdef CONFIG_DM_I2C + struct udevice *eedev = NULL; + + ret = i2c_get_chip_for_busnum(CONFIG_KM_IVM_BUS, + CONFIG_SYS_I2C_EEPROM_ADDR, 1, &eedev); + if (ret) { + printf("failed to get device for EEPROM at address 0x%02x\n", + CONFIG_SYS_I2C_EEPROM_ADDR); + return 1; + } + ret = dm_i2c_read(eedev, 0, buf, len); + if (ret != 0) { + printf("Error: Unable to read from I2C EEPROM at address %02X:%02X\n", + CONFIG_SYS_I2C_EEPROM_ADDR, 0); + return 1; + } +#else i2c_set_bus_num(CONFIG_KM_IVM_BUS); /* add deblocking here */ i2c_make_abort(); @@ -338,6 +355,6 @@ int ivm_read_eeprom(unsigned char *buf, int len, int mac_address_offset) printf("Error reading EEprom\n"); return -2; } - +#endif return ivm_populate_env(buf, len, mac_address_offset); } diff --git a/board/keymile/secu1/MAINTAINERS b/board/keymile/secu1/MAINTAINERS new file mode 100644 index 00000000000..5dc4aa6a68b --- /dev/null +++ b/board/keymile/secu1/MAINTAINERS @@ -0,0 +1,5 @@ +ABB SECU1 BOARD +M: Holger Brunck <holger.brunck@ch.abb.com> +S: Maintained +F: include/configs/socfpga_arria5_secu1.h +F: configs/socfpga_secu1_defconfig diff --git a/board/keymile/secu1/Makefile b/board/keymile/secu1/Makefile new file mode 100644 index 00000000000..4704d59e48c --- /dev/null +++ b/board/keymile/secu1/Makefile @@ -0,0 +1,7 @@ +# +# (C) Copyright 2020 ABB +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := socfpga.o ../common/ivm.o diff --git a/board/keymile/secu1/qts/iocsr_config.h b/board/keymile/secu1/qts/iocsr_config.h new file mode 100644 index 00000000000..7640c56db16 --- /dev/null +++ b/board/keymile/secu1/qts/iocsr_config.h @@ -0,0 +1,694 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* + * Altera SoCFPGA IOCSR configuration + */ + +#ifndef __SOCFPGA_IOCSR_CONFIG_H__ +#define __SOCFPGA_IOCSR_CONFIG_H__ + +#define CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH 1337 +#define CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH 1719 +#define CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH 1528 +#define CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH 16766 + +const unsigned long iocsr_scan_chain0_table[] = { + 0x00100000, + 0x40000000, + 0x00000000, + 0x00000100, + 0x00040000, + 0x00008000, + 0x00080000, + 0x20000000, + 0x00000000, + 0x00000080, + 0x00020000, + 0x00004000, + 0x00040000, + 0x10000000, + 0x00000000, + 0x00000040, + 0x00010000, + 0x00002000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000020, + 0x00008000, + 0x00001000, + 0x00000000, + 0x0300C000, + 0x0000000C, + 0x00000000, + 0x00000000, + 0x00000800, + 0x01806018, + 0x00000000, + 0x01800000, + 0x00001806, + 0x00001806, + 0x00000400, + 0x00C0300C, + 0x00C03000, + 0x00C00003, + 0x00000C03, + 0x00300C03, + 0x00000200, +}; + +const unsigned long iocsr_scan_chain1_table[] = { + 0x00100000, + 0x40000000, + 0x00000000, + 0x00000100, + 0x00040000, + 0x00008000, + 0x00060180, + 0x18060000, + 0x00000000, + 0x00000080, + 0x00020000, + 0x00004000, + 0x00040000, + 0x10000000, + 0x00000000, + 0x00000040, + 0x00010000, + 0x00002000, + 0x00020000, + 0x08000000, + 0x01FE0000, + 0xF8000000, + 0x00000007, + 0x00001000, + 0x00010000, + 0x04000000, + 0x00000000, + 0x00000010, + 0x00004000, + 0x00000800, + 0x00006018, + 0x01806000, + 0x00000006, + 0x00000008, + 0x00601806, + 0x00000400, + 0x0000300C, + 0x00C03000, + 0x00C00000, + 0x00000003, + 0x00000C03, + 0x00000200, + 0x00000000, + 0x00601800, + 0x80600000, + 0x80000001, + 0x00000601, + 0x00000100, + 0x00300C03, + 0xC0300C00, + 0xC0300000, + 0xC0000300, + 0x000C0300, + 0x00000080, +}; + +const unsigned long iocsr_scan_chain2_table[] = { + 0x00100000, + 0x40000000, + 0x00000000, + 0x00000100, + 0x00040000, + 0x00008000, + 0x00080000, + 0x20000000, + 0x00000000, + 0x00000080, + 0x00020000, + 0x00004000, + 0x00040000, + 0x10000000, + 0x00000000, + 0x00000040, + 0x00010000, + 0x00002000, + 0x00018060, + 0x08000000, + 0x00000000, + 0x00000020, + 0x00008000, + 0x00001000, + 0x0300C030, + 0x00000000, + 0x03000000, + 0x0000000C, + 0x00C0300C, + 0x00000800, + 0x01806018, + 0x01806000, + 0x00000006, + 0x00000000, + 0x00601806, + 0x00000400, + 0x00C0300C, + 0x00C03000, + 0x00C00003, + 0x00000C03, + 0x00300C03, + 0x00000200, + 0x00601806, + 0x80601800, + 0x80600001, + 0x80000601, + 0x00180601, + 0x00000100, +}; + +const unsigned long iocsr_scan_chain3_table[] = { + 0x2CC20D80, + 0x082000FF, + 0x08028001, + 0x00100000, + 0x08020000, + 0x00100000, + 0x0A800000, + 0x07900000, + 0x08020000, + 0x00100000, + 0x00000000, + 0xC0000010, + 0x00C00512, + 0x00000000, + 0x00000021, + 0x82000004, + 0x05400000, + 0x03C80000, + 0x04010000, + 0x00080000, + 0x05400000, + 0x03C80000, + 0x05400000, + 0x03C80000, + 0xA2580000, + 0x60001800, + 0x00600289, + 0x800A2580, + 0x00000001, + 0x40000002, + 0x02A00000, + 0x01E40000, + 0x02A00000, + 0x01E40000, + 0x02A00000, + 0x01E40000, + 0x02A00000, + 0x01E40000, + 0x512C0000, + 0xB0000C00, + 0x00300144, + 0xC00512C0, + 0x144B0000, + 0x20000300, + 0x00040000, + 0x50670000, + 0x00000050, + 0x24590000, + 0x00001000, + 0xA0000034, + 0x0D000001, + 0xA0680514, + 0xC3034028, + 0x06181A00, + 0x805140D0, + 0x34069A06, + 0x01A034D0, + 0x240D0000, + 0x28A06809, + 0x00000340, + 0xD000001A, + 0x06809240, + 0x10040000, + 0x00200000, + 0x10040000, + 0x00200000, + 0x15000000, + 0x0F200000, + 0x15000000, + 0x0F200000, + 0x01FE0000, + 0x80000000, + 0x01800A25, + 0x00289600, + 0x007F8006, + 0x00000000, + 0x0A800001, + 0x07900000, + 0x0A800000, + 0x07900000, + 0x0A800000, + 0x07900000, + 0x08020000, + 0x00100000, + 0x44B00000, + 0xC0003001, + 0x00C00512, + 0x00000FF0, + 0x512C0000, + 0x80000C00, + 0x05400000, + 0x02480000, + 0x04000000, + 0x00080000, + 0x05400000, + 0x03C80000, + 0x05400000, + 0x03C80000, + 0x581D8000, + 0x60001800, + 0x00600289, + 0x800A2580, + 0x16076001, + 0x40000600, + 0x02A00040, + 0x01E40000, + 0x02A00000, + 0x01E40000, + 0x02A00000, + 0x01E40000, + 0x02A00000, + 0x01E40000, + 0x512C0000, + 0xB0000C00, + 0x00300144, + 0xC00512C0, + 0x144B0000, + 0x20000300, + 0x00040000, + 0x50670000, + 0x00000050, + 0x24590000, + 0x00001000, + 0xA0000034, + 0x0D000001, + 0xA0680514, + 0x4D034028, + 0x1A681A03, + 0x805140D0, + 0x34069A06, + 0x01A00020, + 0x240D0001, + 0x49206809, + 0x034D0340, + 0xD01A681A, + 0x06805140, + 0x10040000, + 0x00200000, + 0x10040000, + 0x00200000, + 0x15000000, + 0x0F200000, + 0x15000000, + 0x0F200000, + 0x01FE0000, + 0x80000000, + 0x01800A25, + 0x00289600, + 0x007F8006, + 0x00000000, + 0x99300001, + 0x34343400, + 0xAA0D4000, + 0x01C3A800, + 0xAA0D4000, + 0x01C3A800, + 0xAA0D4000, + 0x01C3A800, + 0x00040100, + 0x00000800, + 0x00000000, + 0x00001208, + 0x00482000, + 0x01000000, + 0x00000000, + 0x00410482, + 0x0006A000, + 0x0001B400, + 0x00020000, + 0x00000400, + 0x0002A000, + 0x0001E400, + 0x5506A000, + 0x00E1D400, + 0x00000000, + 0x44B0090C, + 0x00003001, + 0x90400000, + 0x00000000, + 0x2020C243, + 0x2A835000, + 0x0070EA00, + 0x2A835000, + 0x0070EA00, + 0x2A835000, + 0x0070EA00, + 0x00010040, + 0x00000200, + 0x00000000, + 0x00000482, + 0x00120800, + 0x00002000, + 0x80000000, + 0x00104120, + 0x00000200, + 0xAC0D5F80, + 0xFFFFFFFF, + 0x14F3690D, + 0x1A041414, + 0x00D00000, + 0x1C864000, + 0x45147A07, + 0xA228A3DA, + 0xF491451E, + 0x0358D348, + 0x821A0000, + 0x0000D000, + 0x028A0680, + 0xDA79E47A, + 0x1EA228A3, + 0xC8F49965, + 0x000344B2, + 0x00080000, + 0x00001000, + 0x00080200, + 0x00001000, + 0x000A8000, + 0x00075000, + 0x541A8000, + 0x03875001, + 0x00000000, + 0x00000020, + 0x0080C000, + 0x41000000, + 0x00003FC2, + 0x00820000, + 0xAA0D4000, + 0x01C3A800, + 0xAA0D4000, + 0x01C3A800, + 0xAA0D4000, + 0x01C3A800, + 0x00040000, + 0x00000800, + 0x00000000, + 0x00001208, + 0x00482000, + 0x01000000, + 0x00000000, + 0x00410482, + 0x0006A000, + 0x0001B400, + 0x00020000, + 0x00000400, + 0x00020080, + 0x00000400, + 0x5506A000, + 0x00E1D400, + 0x00000000, + 0x0000090C, + 0x00000010, + 0x90400000, + 0x00000000, + 0x2020C243, + 0x2A835000, + 0x0070EA00, + 0x2A835000, + 0x0070EA00, + 0x2A835000, + 0x0070EA00, + 0x00015000, + 0x0000F200, + 0x00000000, + 0x00000482, + 0x60120800, + 0x00600289, + 0x80000000, + 0x00104120, + 0x00000200, + 0xAC0D5F80, + 0xFFFFFFFF, + 0x14F3690D, + 0x1A041414, + 0x00D00000, + 0x14864000, + 0x59647A05, + 0xC228A3DC, + 0xF491451E, + 0x0344B2C8, + 0x821A034D, + 0x0000D000, + 0x00000680, + 0xD469A47A, + 0x1E83CF23, + 0xC8F71E79, + 0x000344B2, + 0x00080000, + 0x00001000, + 0x00080000, + 0x00001000, + 0x000A8000, + 0x00075000, + 0x541A8000, + 0x03875001, + 0x00000000, + 0x00000020, + 0x0080C000, + 0x41000000, + 0x00000002, + 0x00820008, + 0xAA0D4000, + 0x01C3A800, + 0xAA0D4000, + 0x01C3A800, + 0xAA0D4000, + 0x01C3A800, + 0x00040000, + 0x00000800, + 0x00000000, + 0x00001208, + 0x00482000, + 0x01000000, + 0x00000000, + 0x00410482, + 0x0006A000, + 0x0001B400, + 0x00020000, + 0x00000400, + 0x00020080, + 0x00000400, + 0x5506A000, + 0x00E1D400, + 0x00000000, + 0x0000090C, + 0x00000010, + 0x90400000, + 0x00000000, + 0x2020C243, + 0x2A835000, + 0x0070EA00, + 0x2A835000, + 0x0070EA00, + 0x2A835000, + 0x0070EA00, + 0x00010000, + 0x00000200, + 0x00000000, + 0x00000482, + 0x00120800, + 0x00400000, + 0x80000000, + 0x00104120, + 0x00000200, + 0xAC0D5F80, + 0xFFFFFFFF, + 0x14F1690D, + 0x1A041414, + 0x00D00000, + 0x0C864000, + 0x79E47A03, + 0x92AAA3D2, + 0xF595551E, + 0x034CF3C8, + 0x821A0000, + 0x0000D000, + 0x00000680, + 0xDA79E47A, + 0x1EA32CA3, + 0xC8F69965, + 0x000354F3, + 0x00080000, + 0x00001000, + 0x00080000, + 0x00001000, + 0x000A8000, + 0x00075000, + 0x541A8000, + 0x03875001, + 0x00000000, + 0x00000020, + 0x0080C000, + 0x41000000, + 0x00000002, + 0x00820008, + 0xAA0D4000, + 0x01C3A800, + 0xAA0D4000, + 0x01C3A800, + 0xAA0D4000, + 0x01C3A800, + 0x00040000, + 0x00000800, + 0x00000000, + 0x00001208, + 0x00482000, + 0x01000000, + 0x00000000, + 0x00410482, + 0x0006A000, + 0x0001B400, + 0x00020000, + 0x00000400, + 0x00020000, + 0x00000400, + 0x5506A000, + 0x00E1D400, + 0x00000000, + 0x0000090C, + 0x00002000, + 0x90400000, + 0x00000000, + 0x2020C243, + 0x2A835000, + 0x0070EA00, + 0x2A835000, + 0x0070EA00, + 0x2A835000, + 0x0070EA00, + 0x00010040, + 0x00000200, + 0x00000000, + 0x00000482, + 0x00120800, + 0x00400000, + 0x80000000, + 0x00104120, + 0x00000200, + 0xAC0D5F80, + 0xFFFFFFFF, + 0x14F1690D, + 0x1A041414, + 0x00D00000, + 0x0C864000, + 0x59647A03, + 0xC3CF23DC, + 0xF711451E, + 0x0358D348, + 0x821A0000, + 0x0000D000, + 0x00000680, + 0xD459647A, + 0x1E83CF23, + 0x48F51E79, + 0x000348D3, + 0x00080000, + 0x00001000, + 0x00080000, + 0x00001000, + 0x000A8000, + 0x00075000, + 0x541A8000, + 0x03875001, + 0x00000000, + 0x00000020, + 0x0080C000, + 0x41000000, + 0x00000002, + 0x00820008, + 0x00489800, + 0x801A1A1A, + 0x00000200, + 0x80000004, + 0x00000200, + 0x80000004, + 0x00000200, + 0x00000004, + 0x00000200, + 0x00000004, + 0x00040000, + 0x10000000, + 0x00000000, + 0x00008000, + 0x00010000, + 0x40002000, + 0x00000100, + 0x40000002, + 0x00000100, + 0x00000002, + 0x00000100, + 0x40000002, + 0x00000100, + 0x00000002, + 0x00020000, + 0x00000000, + 0x00000010, + 0x00000020, + 0x00008000, + 0x20001000, + 0x00000080, + 0x20000001, + 0x00000080, + 0x20000001, + 0x00000080, + 0x20000001, + 0x00000080, + 0x00000001, + 0x00010000, + 0x04000000, + 0x00FF0000, + 0x00000000, + 0x00004000, + 0x00000800, + 0xC0000001, + 0x00141419, + 0x40000000, + 0x04000816, + 0x000D0000, + 0x00006800, + 0x00000340, + 0xD000001A, + 0x06800000, + 0x00340000, + 0x0001A000, + 0x00000D00, + 0x40000068, + 0x1A000003, + 0x00D00000, + 0x00068000, + 0x00003400, + 0x000001A0, + 0x00000401, + 0x00000008, + 0x00000401, + 0x00000008, + 0x00000401, + 0x00000008, + 0x00000401, + 0x80000008, + 0x0000007F, + 0x20000000, + 0x00000000, + 0xE0000080, + 0x0000001F, + 0x00004000, +}; + +#endif /* __SOCFPGA_IOCSR_CONFIG_H__ */ diff --git a/board/keymile/secu1/qts/pinmux_config.h b/board/keymile/secu1/qts/pinmux_config.h new file mode 100644 index 00000000000..a9406060edc --- /dev/null +++ b/board/keymile/secu1/qts/pinmux_config.h @@ -0,0 +1,218 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* + * Altera SoCFPGA PinMux configuration + */ + +#ifndef __SOCFPGA_PINMUX_CONFIG_H__ +#define __SOCFPGA_PINMUX_CONFIG_H__ + +const u8 sys_mgr_init_table[] = { + 3, /* EMACIO0 */ + 3, /* EMACIO1 */ + 3, /* EMACIO2 */ + 3, /* EMACIO3 */ + 3, /* EMACIO4 */ + 3, /* EMACIO5 */ + 3, /* EMACIO6 */ + 3, /* EMACIO7 */ + 3, /* EMACIO8 */ + 3, /* EMACIO9 */ + 3, /* EMACIO10 */ + 3, /* EMACIO11 */ + 3, /* EMACIO12 */ + 3, /* EMACIO13 */ + 0, /* EMACIO14 */ + 0, /* EMACIO15 */ + 0, /* EMACIO16 */ + 0, /* EMACIO17 */ + 0, /* EMACIO18 */ + 0, /* EMACIO19 */ + 0, /* FLASHIO0 */ + 0, /* FLASHIO1 */ + 0, /* FLASHIO2 */ + 0, /* FLASHIO3 */ + 0, /* FLASHIO4 */ + 0, /* FLASHIO5 */ + 0, /* FLASHIO6 */ + 0, /* FLASHIO7 */ + 0, /* FLASHIO8 */ + 0, /* FLASHIO9 */ + 0, /* FLASHIO10 */ + 0, /* FLASHIO11 */ + 3, /* GENERALIO0 */ + 3, /* GENERALIO1 */ + 3, /* GENERALIO2 */ + 3, /* GENERALIO3 */ + 3, /* GENERALIO4 */ + 3, /* GENERALIO5 */ + 3, /* GENERALIO6 */ + 3, /* GENERALIO7 */ + 3, /* GENERALIO8 */ + 3, /* GENERALIO9 */ + 3, /* GENERALIO10 */ + 3, /* GENERALIO11 */ + 3, /* GENERALIO12 */ + 3, /* GENERALIO13 */ + 3, /* GENERALIO14 */ + 0, /* GENERALIO15 */ + 0, /* GENERALIO16 */ + 0, /* GENERALIO17 */ + 0, /* GENERALIO18 */ + 0, /* GENERALIO19 */ + 0, /* GENERALIO20 */ + 0, /* GENERALIO21 */ + 0, /* GENERALIO22 */ + 0, /* GENERALIO23 */ + 0, /* GENERALIO24 */ + 0, /* GENERALIO25 */ + 0, /* GENERALIO26 */ + 0, /* GENERALIO27 */ + 0, /* GENERALIO28 */ + 0, /* GENERALIO29 */ + 0, /* GENERALIO30 */ + 0, /* GENERALIO31 */ + 3, /* MIXED1IO0 */ + 3, /* MIXED1IO1 */ + 3, /* MIXED1IO2 */ + 3, /* MIXED1IO3 */ + 3, /* MIXED1IO4 */ + 3, /* MIXED1IO5 */ + 3, /* MIXED1IO6 */ + 3, /* MIXED1IO7 */ + 3, /* MIXED1IO8 */ + 3, /* MIXED1IO9 */ + 3, /* MIXED1IO10 */ + 3, /* MIXED1IO11 */ + 3, /* MIXED1IO12 */ + 3, /* MIXED1IO13 */ + 3, /* MIXED1IO14 */ + 0, /* MIXED1IO15 */ + 0, /* MIXED1IO16 */ + 0, /* MIXED1IO17 */ + 0, /* MIXED1IO18 */ + 0, /* MIXED1IO19 */ + 0, /* MIXED1IO20 */ + 0, /* MIXED1IO21 */ + 0, /* MIXED2IO0 */ + 0, /* MIXED2IO1 */ + 0, /* MIXED2IO2 */ + 0, /* MIXED2IO3 */ + 0, /* MIXED2IO4 */ + 0, /* MIXED2IO5 */ + 0, /* MIXED2IO6 */ + 0, /* MIXED2IO7 */ + 0, /* GPLINMUX48 */ + 0, /* GPLINMUX49 */ + 0, /* GPLINMUX50 */ + 0, /* GPLINMUX51 */ + 0, /* GPLINMUX52 */ + 0, /* GPLINMUX53 */ + 0, /* GPLINMUX54 */ + 0, /* GPLINMUX55 */ + 0, /* GPLINMUX56 */ + 0, /* GPLINMUX57 */ + 0, /* GPLINMUX58 */ + 0, /* GPLINMUX59 */ + 0, /* GPLINMUX60 */ + 0, /* GPLINMUX61 */ + 0, /* GPLINMUX62 */ + 0, /* GPLINMUX63 */ + 0, /* GPLINMUX64 */ + 0, /* GPLINMUX65 */ + 0, /* GPLINMUX66 */ + 0, /* GPLINMUX67 */ + 0, /* GPLINMUX68 */ + 0, /* GPLINMUX69 */ + 0, /* GPLINMUX70 */ + 1, /* GPLMUX0 */ + 1, /* GPLMUX1 */ + 1, /* GPLMUX2 */ + 1, /* GPLMUX3 */ + 1, /* GPLMUX4 */ + 1, /* GPLMUX5 */ + 1, /* GPLMUX6 */ + 1, /* GPLMUX7 */ + 1, /* GPLMUX8 */ + 1, /* GPLMUX9 */ + 1, /* GPLMUX10 */ + 1, /* GPLMUX11 */ + 1, /* GPLMUX12 */ + 1, /* GPLMUX13 */ + 1, /* GPLMUX14 */ + 1, /* GPLMUX15 */ + 1, /* GPLMUX16 */ + 1, /* GPLMUX17 */ + 1, /* GPLMUX18 */ + 1, /* GPLMUX19 */ + 1, /* GPLMUX20 */ + 1, /* GPLMUX21 */ + 1, /* GPLMUX22 */ + 1, /* GPLMUX23 */ + 1, /* GPLMUX24 */ + 1, /* GPLMUX25 */ + 1, /* GPLMUX26 */ + 1, /* GPLMUX27 */ + 1, /* GPLMUX28 */ + 1, /* GPLMUX29 */ + 1, /* GPLMUX30 */ + 1, /* GPLMUX31 */ + 1, /* GPLMUX32 */ + 1, /* GPLMUX33 */ + 1, /* GPLMUX34 */ + 1, /* GPLMUX35 */ + 1, /* GPLMUX36 */ + 1, /* GPLMUX37 */ + 1, /* GPLMUX38 */ + 1, /* GPLMUX39 */ + 1, /* GPLMUX40 */ + 1, /* GPLMUX41 */ + 1, /* GPLMUX42 */ + 1, /* GPLMUX43 */ + 1, /* GPLMUX44 */ + 1, /* GPLMUX45 */ + 1, /* GPLMUX46 */ + 1, /* GPLMUX47 */ + 1, /* GPLMUX48 */ + 1, /* GPLMUX49 */ + 1, /* GPLMUX50 */ + 1, /* GPLMUX51 */ + 1, /* GPLMUX52 */ + 1, /* GPLMUX53 */ + 1, /* GPLMUX54 */ + 1, /* GPLMUX55 */ + 1, /* GPLMUX56 */ + 1, /* GPLMUX57 */ + 1, /* GPLMUX58 */ + 1, /* GPLMUX59 */ + 1, /* GPLMUX60 */ + 1, /* GPLMUX61 */ + 1, /* GPLMUX62 */ + 1, /* GPLMUX63 */ + 1, /* GPLMUX64 */ + 1, /* GPLMUX65 */ + 1, /* GPLMUX66 */ + 1, /* GPLMUX67 */ + 1, /* GPLMUX68 */ + 1, /* GPLMUX69 */ + 1, /* GPLMUX70 */ + 0, /* NANDUSEFPGA */ + 0, /* UART0USEFPGA */ + 0, /* RGMII1USEFPGA */ + 0, /* SPIS0USEFPGA */ + 0, /* CAN0USEFPGA */ + 0, /* I2C0USEFPGA */ + 0, /* SDMMCUSEFPGA */ + 0, /* QSPIUSEFPGA */ + 0, /* SPIS1USEFPGA */ + 0, /* RGMII0USEFPGA */ + 0, /* UART1USEFPGA */ + 0, /* CAN1USEFPGA */ + 0, /* USB1USEFPGA */ + 0, /* I2C3USEFPGA */ + 0, /* I2C2USEFPGA */ + 0, /* I2C1USEFPGA */ + 1, /* SPIM1USEFPGA */ + 0, /* USB0USEFPGA */ + 0 /* SPIM0USEFPGA */ +}; +#endif /* __SOCFPGA_PINMUX_CONFIG_H__ */ diff --git a/board/keymile/secu1/qts/pll_config.h b/board/keymile/secu1/qts/pll_config.h new file mode 100644 index 00000000000..f0c31860ca4 --- /dev/null +++ b/board/keymile/secu1/qts/pll_config.h @@ -0,0 +1,83 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* + * Altera SoCFPGA Clock and PLL configuration + */ + +#ifndef __SOCFPGA_PLL_CONFIG_H__ +#define __SOCFPGA_PLL_CONFIG_H__ + +#define CONFIG_HPS_DBCTRL_STAYOSC1 1 + +#define CONFIG_HPS_MAINPLLGRP_VCO_DENOM 0 +#define CONFIG_HPS_MAINPLLGRP_VCO_NUMER 39 +#define CONFIG_HPS_MAINPLLGRP_MPUCLK_CNT 0 +#define CONFIG_HPS_MAINPLLGRP_MAINCLK_CNT 0 +#define CONFIG_HPS_MAINPLLGRP_DBGATCLK_CNT 0 +#define CONFIG_HPS_MAINPLLGRP_MAINQSPICLK_CNT 511 +#define CONFIG_HPS_MAINPLLGRP_MAINNANDSDMMCCLK_CNT 511 +#define CONFIG_HPS_MAINPLLGRP_CFGS2FUSER0CLK_CNT 15 +#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3MPCLK 1 +#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L3SPCLK 1 +#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4MPCLK 1 +#define CONFIG_HPS_MAINPLLGRP_MAINDIV_L4SPCLK 1 +#define CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGATCLK 0 +#define CONFIG_HPS_MAINPLLGRP_DBGDIV_DBGCLK 1 +#define CONFIG_HPS_MAINPLLGRP_TRACEDIV_TRACECLK 0 +#define CONFIG_HPS_MAINPLLGRP_L4SRC_L4MP 1 +#define CONFIG_HPS_MAINPLLGRP_L4SRC_L4SP 1 + +#define CONFIG_HPS_PERPLLGRP_VCO_DENOM 0 +#define CONFIG_HPS_PERPLLGRP_VCO_NUMER 24 +#define CONFIG_HPS_PERPLLGRP_VCO_PSRC 0 +#define CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT 3 +#define CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT 511 +#define CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT 511 +#define CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT 7 +#define CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT 4 +#define CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT 511 +#define CONFIG_HPS_PERPLLGRP_DIV_USBCLK 4 +#define CONFIG_HPS_PERPLLGRP_DIV_SPIMCLK 0 +#define CONFIG_HPS_PERPLLGRP_DIV_CAN0CLK 4 +#define CONFIG_HPS_PERPLLGRP_DIV_CAN1CLK 4 +#define CONFIG_HPS_PERPLLGRP_GPIODIV_GPIODBCLK 6249 +#define CONFIG_HPS_PERPLLGRP_SRC_SDMMC 1 +#define CONFIG_HPS_PERPLLGRP_SRC_NAND 2 +#define CONFIG_HPS_PERPLLGRP_SRC_QSPI 1 + +#define CONFIG_HPS_SDRPLLGRP_VCO_DENOM 0 +#define CONFIG_HPS_SDRPLLGRP_VCO_NUMER 14 +#define CONFIG_HPS_SDRPLLGRP_VCO_SSRC 0 +#define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_CNT 1 +#define CONFIG_HPS_SDRPLLGRP_DDRDQSCLK_PHASE 0 +#define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_CNT 0 +#define CONFIG_HPS_SDRPLLGRP_DDR2XDQSCLK_PHASE 0 +#define CONFIG_HPS_SDRPLLGRP_DDRDQCLK_CNT 1 +#define CONFIG_HPS_SDRPLLGRP_DDRDQCLK_PHASE 4 +#define CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_CNT 1 +#define CONFIG_HPS_SDRPLLGRP_S2FUSER2CLK_PHASE 0 + +#define CONFIG_HPS_CLK_OSC1_HZ 40000000 +#define CONFIG_HPS_CLK_OSC2_HZ 40000000 +#define CONFIG_HPS_CLK_F2S_SDR_REF_HZ 0 +#define CONFIG_HPS_CLK_F2S_PER_REF_HZ 0 +#define CONFIG_HPS_CLK_MAINVCO_HZ 1600000000 +#define CONFIG_HPS_CLK_PERVCO_HZ 1000000000 +#define CONFIG_HPS_CLK_SDRVCO_HZ 600000000 +#define CONFIG_HPS_CLK_EMAC0_HZ 250000000 +#define CONFIG_HPS_CLK_EMAC1_HZ 1953125 +#define CONFIG_HPS_CLK_USBCLK_HZ 12500000 +#define CONFIG_HPS_CLK_NAND_HZ 31250000 +#define CONFIG_HPS_CLK_SDMMC_HZ 3125000 +#define CONFIG_HPS_CLK_QSPI_HZ 3125000 +#define CONFIG_HPS_CLK_SPIM_HZ 200000000 +#define CONFIG_HPS_CLK_CAN0_HZ 12500000 +#define CONFIG_HPS_CLK_CAN1_HZ 12500000 +#define CONFIG_HPS_CLK_GPIODB_HZ 32000 +#define CONFIG_HPS_CLK_L4_MP_HZ 100000000 +#define CONFIG_HPS_CLK_L4_SP_HZ 100000000 + +#define CONFIG_HPS_ALTERAGRP_MPUCLK 1 +#define CONFIG_HPS_ALTERAGRP_MAINCLK 3 +#define CONFIG_HPS_ALTERAGRP_DBGATCLK 3 + +#endif /* __SOCFPGA_PLL_CONFIG_H__ */ diff --git a/board/keymile/secu1/qts/sdram_config.h b/board/keymile/secu1/qts/sdram_config.h new file mode 100644 index 00000000000..b0ff86ef381 --- /dev/null +++ b/board/keymile/secu1/qts/sdram_config.h @@ -0,0 +1,327 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* + * Altera SoCFPGA SDRAM configuration + * + */ + +#ifndef __SOCFPGA_SDRAM_CONFIG_H__ +#define __SOCFPGA_SDRAM_CONFIG_H__ + +/* SDRAM configuration */ +#define CONFIG_HPS_SDR_CTRLCFG_CPORTRDWR_CPORTRDWR 0x5A56A +#define CONFIG_HPS_SDR_CTRLCFG_CPORTRMAP_CPORTRMAP 0xB00088 +#define CONFIG_HPS_SDR_CTRLCFG_CPORTWIDTH_CPORTWIDTH 0x44555 +#define CONFIG_HPS_SDR_CTRLCFG_CPORTWMAP_CPORTWMAP 0x2C011000 +#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ADDRORDER 0 +#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_DQSTRKEN 0 +#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCCORREN 0 +#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN 0 +#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMBL 8 +#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_MEMTYPE 1 +#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_NODMPINS 0 +#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_REORDEREN 1 +#define CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_STARVELIMIT 10 +#define CONFIG_HPS_SDR_CTRLCFG_CTRLWIDTH_CTRLWIDTH 2 +#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_BANKBITS 3 +#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_COLBITS 10 +#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_CSBITS 1 +#define CONFIG_HPS_SDR_CTRLCFG_DRAMADDRW_ROWBITS 14 +#define CONFIG_HPS_SDR_CTRLCFG_DRAMDEVWIDTH_DEVWIDTH 8 +#define CONFIG_HPS_SDR_CTRLCFG_DRAMIFWIDTH_IFWIDTH 32 +#define CONFIG_HPS_SDR_CTRLCFG_DRAMINTR_INTREN 0 +#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_READ 0 +#define CONFIG_HPS_SDR_CTRLCFG_DRAMODT_WRITE 1 +#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_AL 0 +#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCL 5 +#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TCWL 4 +#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TFAW 16 +#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRFC 60 +#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING1_TRRD 4 +#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRCD 5 +#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TREFI 2341 +#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TRP 5 +#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWR 5 +#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING2_IF_TWTR 2 +#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TCCD 4 +#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TMRD 2 +#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRAS 13 +#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRC 17 +#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP 3 +#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT 3 +#define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT 200 +#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR 3 +#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC 3 +#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_DIFF_CHIP 3 +#define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC 0 +#define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE 0 +#define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST 0x0 +#define CONFIG_HPS_SDR_CTRLCFG_LOWPWREQ_SELFRFSHMASK 3 +#define CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_AUTOPDCYCLES 0 +#define CONFIG_HPS_SDR_CTRLCFG_LOWPWRTIMING_CLKDISABLECYCLES 8 +#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0 0x20820820 +#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32 0x8208208 +#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0 0 +#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4 0x41041041 +#define CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36 0x410410 +#define CONFIG_HPS_SDR_CTRLCFG_MPPRIORITY_USERPRIORITY 0x0 +#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0 0x01010101 +#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32 0x01010101 +#define CONFIG_HPS_SDR_CTRLCFG_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64 0x0101 +#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0 0x21084210 +#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32 0x10441 +#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0 0x78 +#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14 0x0 +#define CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46 0x0 +#define CONFIG_HPS_SDR_CTRLCFG_PHYCTRL_PHYCTRL_0 0x200 +#define CONFIG_HPS_SDR_CTRLCFG_PORTCFG_AUTOPCHEN 0 +#define CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP 0x760210 +#define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL 2 +#define CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA 0 +#define CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP 0x980543 + +/* Sequencer auto configuration */ +#define RW_MGR_ACTIVATE_0_AND_1 0x11 +#define RW_MGR_ACTIVATE_0_AND_1_WAIT1 0x12 +#define RW_MGR_ACTIVATE_0_AND_1_WAIT2 0x14 +#define RW_MGR_CLEAR_DQS_ENABLE 0x4B +#define RW_MGR_EMR 0x09 +#define RW_MGR_EMR2 0x0D +#define RW_MGR_EMR3 0x0F +#define RW_MGR_EMR_OCD_ENABLE 0x0B +#define RW_MGR_GUARANTEED_READ 0x4E +#define RW_MGR_GUARANTEED_READ_CONT 0x56 +#define RW_MGR_GUARANTEED_WRITE 0x1A +#define RW_MGR_GUARANTEED_WRITE_WAIT0 0x1D +#define RW_MGR_GUARANTEED_WRITE_WAIT1 0x21 +#define RW_MGR_GUARANTEED_WRITE_WAIT2 0x1B +#define RW_MGR_GUARANTEED_WRITE_WAIT3 0x1F +#define RW_MGR_IDLE 0x00 +#define RW_MGR_IDLE_LOOP1 0x77 +#define RW_MGR_IDLE_LOOP2 0x76 +#define RW_MGR_INIT_CKE_0 0x71 +#define RW_MGR_LFSR_WR_RD_BANK_0 0x24 +#define RW_MGR_LFSR_WR_RD_BANK_0_DATA 0x27 +#define RW_MGR_LFSR_WR_RD_BANK_0_DQS 0x26 +#define RW_MGR_LFSR_WR_RD_BANK_0_NOP 0x25 +#define RW_MGR_LFSR_WR_RD_BANK_0_WAIT 0x34 +#define RW_MGR_LFSR_WR_RD_BANK_0_WL_1 0x23 +#define RW_MGR_LFSR_WR_RD_DM_BANK_0 0x38 +#define RW_MGR_LFSR_WR_RD_DM_BANK_0_DATA 0x3B +#define RW_MGR_LFSR_WR_RD_DM_BANK_0_DQS 0x3A +#define RW_MGR_LFSR_WR_RD_DM_BANK_0_NOP 0x39 +#define RW_MGR_LFSR_WR_RD_DM_BANK_0_WAIT 0x48 +#define RW_MGR_LFSR_WR_RD_DM_BANK_0_WL_1 0x37 +#define RW_MGR_MR_CALIB 0x05 +#define RW_MGR_MR_DLL_RESET 0x07 +#define RW_MGR_MR_USER 0x03 +#define RW_MGR_NOP 0x01 +#define RW_MGR_PRECHARGE_ALL 0x16 +#define RW_MGR_READ_B2B 0x5B +#define RW_MGR_READ_B2B_WAIT1 0x63 +#define RW_MGR_READ_B2B_WAIT2 0x6D +#define RW_MGR_REFRESH 0x18 + +/* Sequencer defines configuration */ +#define AFI_CLK_FREQ 301 +#define AFI_RATE_RATIO 1 +#define CALIB_LFIFO_OFFSET 6 +#define CALIB_VFIFO_OFFSET 4 +#define ENABLE_SUPER_QUICK_CALIBRATION 0 +#define IO_DELAY_PER_DCHAIN_TAP 25 +#define IO_DELAY_PER_DQS_EN_DCHAIN_TAP 25 +#define IO_DELAY_PER_OPA_TAP 416 +#define IO_DLL_CHAIN_LENGTH 8 +#define IO_DQDQS_OUT_PHASE_MAX 0 +#define IO_DQS_EN_DELAY_MAX 31 +#define IO_DQS_EN_DELAY_OFFSET 0 +#define IO_DQS_EN_PHASE_MAX 7 +#define IO_DQS_IN_DELAY_MAX 31 +#define IO_DQS_IN_RESERVE 4 +#define IO_DQS_OUT_RESERVE 4 +#define IO_IO_IN_DELAY_MAX 31 +#define IO_IO_OUT1_DELAY_MAX 31 +#define IO_IO_OUT2_DELAY_MAX 0 +#define IO_SHIFT_DQS_EN_WHEN_SHIFT_DQS 0 +#define MAX_LATENCY_COUNT_WIDTH 5 +#define READ_VALID_FIFO_SIZE 16 +#define REG_FILE_INIT_SEQ_SIGNATURE 0x555504bf +#define RW_MGR_MEM_ADDRESS_MIRRORING 0 +#define RW_MGR_MEM_DATA_MASK_WIDTH 4 +#define RW_MGR_MEM_DATA_WIDTH 32 +#define RW_MGR_MEM_DQ_PER_READ_DQS 8 +#define RW_MGR_MEM_DQ_PER_WRITE_DQS 8 +#define RW_MGR_MEM_IF_READ_DQS_WIDTH 4 +#define RW_MGR_MEM_IF_WRITE_DQS_WIDTH 4 +#define RW_MGR_MEM_NUMBER_OF_CS_PER_DIMM 1 +#define RW_MGR_MEM_NUMBER_OF_RANKS 1 +#define RW_MGR_MEM_VIRTUAL_GROUPS_PER_READ_DQS 1 +#define RW_MGR_MEM_VIRTUAL_GROUPS_PER_WRITE_DQS 1 +#define RW_MGR_TRUE_MEM_DATA_MASK_WIDTH 4 +#define TINIT_CNTR0_VAL 74 +#define TINIT_CNTR1_VAL 20 +#define TINIT_CNTR2_VAL 20 +#define TRESET_CNTR0_VAL 74 +#define TRESET_CNTR1_VAL 99 +#define TRESET_CNTR2_VAL 10 + +/* Sequencer ac_rom_init configuration */ +const u32 ac_rom_init[] = { + 0x30700000, + 0x38700000, + 0x30700000, + 0x20700000, + 0x10000853, + 0x10000853, + 0x10000953, + 0x10010000, + 0x10010380, + 0x10020000, + 0x10030000, + 0x10300400, + 0x10600000, + 0x10620000, + 0x10200400, + 0x10400000, + 0x1c900000, + 0x1c920000, + 0x1c900008, + 0x1c920008, + 0x38f00000, + 0x3cf00000, + 0x38700000, + 0x10100000, + 0x18900000, + 0x13500000, + 0x13520000, + 0x13500008, + 0x13520008, + 0x33700000, + 0x10500008 +}; + +/* Sequencer inst_rom_init configuration */ +const u32 inst_rom_init[] = { + 0x80180, + 0x100, + 0x80000, + 0x200, + 0x80000, + 0x280, + 0x80000, + 0x300, + 0x80000, + 0x380, + 0x80000, + 0x400, + 0x80000, + 0x480, + 0x80000, + 0x500, + 0x80000, + 0x600, + 0x8000, + 0x680, + 0xa000, + 0x80000, + 0x700, + 0x80000, + 0x780, + 0x80000, + 0x968, + 0xcae8, + 0x8e8, + 0x8ae8, + 0x988, + 0xea88, + 0x808, + 0xaa88, + 0x80000, + 0xcc00, + 0xcb80, + 0xe080, + 0xa00, + 0x20ae0, + 0x20ae0, + 0x20ae0, + 0x20ae0, + 0xb00, + 0x0, + 0x0, + 0x0, + 0x0, + 0x60c80, + 0x60e80, + 0x60e80, + 0x60e80, + 0xa000, + 0x8000, + 0x80000, + 0xcc00, + 0xcb80, + 0xe080, + 0xa00, + 0x30ae0, + 0x30ae0, + 0x30ae0, + 0x30ae0, + 0xb00, + 0x0, + 0x0, + 0x0, + 0x0, + 0x70c80, + 0x70e80, + 0x70e80, + 0x70e80, + 0xa000, + 0x8000, + 0x80000, + 0xf58, + 0x58, + 0x80000, + 0xf68, + 0x168, + 0x168, + 0x8168, + 0x40de8, + 0x40ee8, + 0x40ee8, + 0x40ee8, + 0xf68, + 0x168, + 0x168, + 0xa168, + 0x80000, + 0x40c88, + 0x40e88, + 0x40e88, + 0x40e88, + 0x40d68, + 0x40ee8, + 0x40ee8, + 0x40ee8, + 0xa000, + 0x40de8, + 0x40ee8, + 0x40ee8, + 0x40ee8, + 0x40e08, + 0x40e88, + 0x40e88, + 0x40e88, + 0xf00, + 0xc000, + 0x8000, + 0xe000, + 0x80000, + 0x180, + 0x8180, + 0xa180, + 0xc180, + 0x80180, + 0x8000, + 0xa000, + 0x80000 +}; + +#endif /* __SOCFPGA_SDRAM_CONFIG_H__ */ diff --git a/board/keymile/secu1/socfpga.c b/board/keymile/secu1/socfpga.c new file mode 100644 index 00000000000..dc04a21abea --- /dev/null +++ b/board/keymile/secu1/socfpga.c @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2017-2020 ABB + */ +#include <common.h> +#include <i2c.h> +#include <asm/gpio.h> + +#include "../common/common.h" + +/* + * For FU1, the MAC address associated with the mgmt port should + * be the base address (as read from the IVM) + 4, and for FU2 it + * is + 10 + */ +#define MAC_ADDRESS_OFFSET_FU1 4 +#define MAC_ADDRESS_OFFSET_FU2 10 + +/* + * This function reads the state of GPIO40 and returns true (non-zero) + * if it is '1' and false(0) otherwise. + * + * This pin is routed to a pull-up on FU2 and a pull-down on + */ +#define GPIO_FU_DETECTION 40 + +int secu1_is_fu2(void) +{ + int value; + int ret = gpio_request(GPIO_FU_DETECTION, "secu"); + + if (ret) { + printf("gpio: failed to request pin for FU detection\n"); + return 1; + } + gpio_direction_input(GPIO_FU_DETECTION); + value = gpio_get_value(GPIO_FU_DETECTION); + + if (value == 1) + printf("FU2 detected\n"); + else + printf("FU1 detected\n"); + + return value; +} + +static uchar ivm_content[CONFIG_SYS_IVM_EEPROM_MAX_LEN]; + +#if defined(CONFIG_HUSH_INIT_VAR) +int hush_init_var(void) +{ + ivm_analyze_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN); + return 0; +} +#endif + +int misc_init_r(void) +{ + if (secu1_is_fu2()) + ivm_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN, + MAC_ADDRESS_OFFSET_FU2); + else + ivm_read_eeprom(ivm_content, CONFIG_SYS_IVM_EEPROM_MAX_LEN, + MAC_ADDRESS_OFFSET_FU1); + + return 0; +} diff --git a/board/st/stm32mp1/README b/board/st/stm32mp1/README index 5d7465a8c85..8172d26a66c 100644 --- a/board/st/stm32mp1/README +++ b/board/st/stm32mp1/README @@ -1,519 +1 @@ -SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause -# -# Copyright (C) 2018 STMicroelectronics - All Rights Reserved -# - -U-Boot on STMicroelectronics STM32MP15x -======================================= - -1. Summary -========== -This is a quick instruction for setup stm32mp1 boards. - -2. Supported devices -==================== -U-Boot supports STMP32MP15x SoCs: STM32MP157, STM32MP153 and STM32MP151 - -The STM32MP15x is a Cortex-A MPU aimed at various applications. -It features: -- Dual core Cortex-A7 application core (Single on STM32MP151) -- 2D/3D image composition with GPU (only on STM32MP157) -- Standard memories interface support -- Standard connectivity, widely inherited from the STM32 MCU family -- Comprehensive security support - -Everything is supported in Linux but U-Boot is limited to: -1. UART -2. SDCard/MMC controller (SDMMC) -3. NAND controller (FMC) -4. NOR controller (QSPI) -5. USB controller (OTG DWC2) -6. Ethernet controller - -And the necessary drivers -1. I2C -2. STPMIC1 (PMIC and regulator) -3. Clock, Reset, Sysreset -4. Fuse - -Currently the following boards are supported: -+ stm32mp157a-avenger96.dts -+ stm32mp157a-dk1.dts -+ stm32mp157c-dk2.dts -+ stm32mp157c-ed1.dts -+ stm32mp157c-ev1.dts - -3. Boot Sequences -================= - -BootRom => FSBL in SYSRAM => SSBL in DDR => OS (Linux Kernel) - -with FSBL = First Stage Bootloader - SSBL = Second Stage Bootloader - -3 boot configurations are supported: - -1) The "Trusted" boot chain (defconfig_file : stm32mp15_trusted_defconfig) - BootRom => FSBL = Trusted Firmware-A (TF-A) => SSBL = U-Boot - TF-A performs a full initialization of Secure peripherals and installs a - secure monitor. - U-Boot is running in normal world and uses TF-A monitor - to access to secure resources. - -2) The "Trusted" boot chain with OP-TEE - (defconfig_file : stm32mp15_optee_defconfig) - BootRom => FSBL = Trusted Firmware-A (TF-A) => SSBL = U-Boot - TF-A performs a full initialization of Secure peripherals and installs OP-TEE - from specific partitions (teeh, teed, teex). - U-Boot is running in normal world and uses OP-TEE monitor to access - to secure resources. - -3) The "Basic" boot chain (defconfig_file : stm32mp15_basic_defconfig) - BootRom => FSBL = U-Boot SPL => SSBL = U-Boot - SPL has limited security initialisation - U-Boot is running in secure mode and provide a secure monitor to the kernel - with only PSCI support (Power State Coordination Interface defined by ARM). - -All the STM32MP15x boards supported by U-Boot use the same generic board -stm32mp1 which support all the bootable devices. - -Each board is configurated only with the associated device tree. - -4. Device Tree Selection -======================== - -You need to select the appropriate device tree for your board, -the supported device trees for stm32mp157 are: - -+ ev1: eval board with pmic stpmic1 (ev1 = mother board + daughter ed1) - dts: stm32mp157c-ev1 - -+ ed1: daughter board with pmic stpmic1 - dts: stm32mp157c-ed1 - -+ dk1: Discovery board - dts: stm32mp157a-dk1 - -+ dk2: Discovery board = dk1 with a BT/WiFI combo and a DSI panel - dts: stm32mp157c-dk2 - -+ avenger96: Avenger96 board from Arrow Electronics - dts: stm32mp157a-avenger96 - -5. Build Procedure -================== - -1. Install required tools for U-Boot - - + install package needed in U-Boot makefile - (libssl-dev, swig, libpython-dev...) - + install ARMv7 toolchain for 32bit Cortex-A (from Linaro, - from SDK for STM32MP15x, or any crosstoolchains from your distribution) - -2. Set the cross compiler: - - # export CROSS_COMPILE=/path/to/toolchain/arm-linux-gnueabi- - (you can use any gcc cross compiler compatible with U-Boot) - -3. Select the output directory (optional) - - # export KBUILD_OUTPUT=/path/to/output - - for example: use one output directory for each configuration - # export KBUILD_OUTPUT=stm32mp15_trusted - # export KBUILD_OUTPUT=stm32mp15_optee - # export KBUILD_OUTPUT=stm32mp15_basic - - you can build outside of code directory: - # export KBUILD_OUTPUT=../build/stm32mp15_trusted - -4. Configure U-Boot: - - # make <defconfig_file> - - - For trusted boot mode : "stm32mp15_trusted_defconfig" - - For trusted with OP-TEE boot mode : "stm32mp15_optee_defconfig" - - For basic boot mode: "stm32mp15_basic_defconfig" - -5. Configure the device-tree and build the U-Boot image: - - # make DEVICE_TREE=<name> all - - example: - a) trusted boot on ev1 - # export KBUILD_OUTPUT=stm32mp15_trusted - # make stm32mp15_trusted_defconfig - # make DEVICE_TREE=stm32mp157c-ev1 all - - b) trusted with OP-TEE boot on dk2 - # export KBUILD_OUTPUT=stm32mp15_optee - # make stm32mp15_optee_defconfig - # make DEVICE_TREE=stm32mp157c-dk2 all - - c) basic boot on ev1 - # export KBUILD_OUTPUT=stm32mp15_basic - # make stm32mp15_basic_defconfig - # make DEVICE_TREE=stm32mp157c-ev1 all - - d) basic boot on ed1 - # export KBUILD_OUTPUT=stm32mp15_basic - # make stm32mp15_basic_defconfig - # make DEVICE_TREE=stm32mp157c-ed1 all - - e) basic boot on dk1 - # export KBUILD_OUTPUT=stm32mp15_basic - # make stm32mp15_basic_defconfig - # make DEVICE_TREE=stm32mp157a-dk1 all - - f) basic boot on avenger96 - # export KBUILD_OUTPUT=stm32mp15_basic - # make stm32mp15_basic_defconfig - # make DEVICE_TREE=stm32mp157a-avenger96 all - -6. Output files - - BootRom and TF-A expect binaries with STM32 image header - SPL expects file with U-Boot uImage header - - So in the output directory (selected by KBUILD_OUTPUT), - you can found the needed files: - - a) For Trusted boot (with or without OP-TEE) - + FSBL = tf-a.stm32 (provided by TF-A compilation) - + SSBL = u-boot.stm32 - - b) For Basic boot - + FSBL = spl/u-boot-spl.stm32 - + SSBL = u-boot.img - -6. Switch Setting for Boot Mode -=============================== - -You can select the boot mode, on the board with one switch : - -- on the daugther board ed1 with the switch SW1 : BOOT0, BOOT1, BOOT2 - - ----------------------------------- - Boot Mode BOOT2 BOOT1 BOOT0 - ----------------------------------- - Reserved 0 0 0 - NOR 0 0 1 - SD-Card 1 0 1 - eMMC 0 1 0 - NAND 0 1 1 - Recovery 1 1 0 - Recovery 0 0 0 - -- on board DK1/DK2 with the switch SW1 : BOOT0, BOOT2 - (BOOT1 forced to 0, NOR not supported) - - -------------------------- - Boot Mode BOOT2 BOOT0 - -------------------------- - Reserved 1 0 - SD-Card 1 1 - Recovery 0 0 - -- Boot mode of Avenger96 can be selected using switch S3 - - ----------------------------------- - Boot Mode BOOT2 BOOT1 BOOT0 - ----------------------------------- - Recovery 0 0 0 - NOR 0 0 1 - SD-Card 1 0 1 - eMMC 0 1 0 - NAND 0 1 1 - Reserved 1 0 0 - Recovery 1 1 0 - SD-Card 1 1 1 - -Recovery is a boot from serial link (UART/USB) and it is used with -STM32CubeProgrammer tool to load executable in RAM and to update the flash -devices available on the board (NOR/NAND/eMMC/SDCARD). -The communication between HOST and board is based on -- for UARTs : the uart protocol used with all MCU STM32 -- for USB : based on USB DFU 1.1 (without the ST extensions used on MCU STM32) - -7. Prepare an SDCard -=================== - -The minimal requirements for STMP32MP1 boot up to U-Boot are: -- GPT partitioning (with gdisk or with sgdisk) -- 2 fsbl partitions, named fsbl1 and fsbl2, size at least 256KiB -- one ssbl partition for U-Boot - -Then the minimal GPT partition is: - ----- ------- --------- -------------- - | Num | Name | Size | Content | - ----- ------- -------- --------------- - | 1 | fsbl1 | 256 KiB | TF-A or SPL | - | 2 | fsbl2 | 256 KiB | TF-A or SPL | - | 3 | ssbl | enought | U-Boot | - | * | - | - | Boot/Rootfs | - ----- ------- --------- -------------- - -(*) add bootable partition for extlinux.conf - following Generic Distribution - (doc/README.distro for use) - - according the used card reader select the block device - (/dev/sdx or /dev/mmcblk0) - in the next example I use /dev/mmcblk0 - -for example: with gpt table with 128 entries - - a) remove previous formatting - # sgdisk -o /dev/<SDCard dev> - - b) create minimal image - # sgdisk --resize-table=128 -a 1 \ - -n 1:34:545 -c 1:fsbl1 \ - -n 2:546:1057 -c 2:fsbl2 \ - -n 3:1058:5153 -c 3:ssbl \ - -p /dev/<SDCard dev> - - you can add other partitions for kernel - one partition rootfs for example: - -n 4:5154: -c 4:rootfs \ - - c) copy the FSBL (2 times) and SSBL file on the correct partition. - in this example in partition 1 to 3 - - for basic boot mode : <SDCard dev> = /dev/mmcblk0 - # dd if=u-boot-spl.stm32 of=/dev/mmcblk0p1 - # dd if=u-boot-spl.stm32 of=/dev/mmcblk0p2 - # dd if=u-boot.img of=/dev/mmcblk0p3 - - for trusted boot mode : - # dd if=tf-a.stm32 of=/dev/mmcblk0p1 - # dd if=tf-a.stm32 of=/dev/mmcblk0p2 - # dd if=u-boot.stm32 of=/dev/mmcblk0p3 - -To boot from SDCard, select BootPinMode = 1 0 1 and reset. - -8. Prepare eMMC -=============== -You can use U-Boot to copy binary in eMMC. - -In the next example, you need to boot from SDCARD and the images (u-boot-spl.stm32, u-boot.img) -are presents on SDCARD (mmc 0) in ext4 partition 4 (bootfs). - -To boot from SDCard, select BootPinMode = 1 0 1 and reset. - -Then you update the eMMC with the next U-Boot command : - -a) prepare GPT on eMMC, - example with 2 partitions, bootfs and roots: - - # setenv emmc_part "name=ssbl,size=2MiB;name=bootfs,type=linux,bootable,size=64MiB;name=rootfs,type=linux,size=512" - # gpt write mmc 1 ${emmc_part} - -b) copy SPL on eMMC on firts boot partition - (SPL max size is 256kB, with LBA 512, 0x200) - - # ext4load mmc 0:4 0xC0000000 u-boot-spl.stm32 - # mmc dev 1 - # mmc partconf 1 1 1 1 - # mmc write ${fileaddr} 0 200 - # mmc partconf 1 1 1 0 - -c) copy U-Boot in first GPT partition of eMMC - - # ext4load mmc 0:4 0xC0000000 u-boot.img - # mmc dev 1 - # part start mmc 1 1 partstart - # mmc write ${fileaddr} ${partstart} ${filesize} - -To boot from eMMC, select BootPinMode = 0 1 0 and reset. - -9. MAC Address -============== - -Please read doc/README.enetaddr for the implementation guidelines for mac id -usage. Basically, environment has precedence over board specific storage. - -For STMicroelectonics board, it is retrieved in STM32MP15x otp : -- OTP_57[31:0] = MAC_ADDR[31:0] -- OTP_58[15:0] = MAC_ADDR[47:32] - -To program a MAC address on virgin OTP words above, you can use the fuse command -on bank 0 to access to internal OTP: - - Prerequisite: check if a MAC address isn't yet programmed in OTP - - 1- check OTP: their value must be equal to 0 - - STM32MP> fuse sense 0 57 2 - Sensing bank 0: - Word 0x00000039: 00000000 00000000 - - 2- check environment variable - - STM32MP> env print ethaddr - ## Error: "ethaddr" not defined - - Example to set mac address "12:34:56:78:9a:bc" - - 1- Write OTP - STM32MP> fuse prog -y 0 57 0x78563412 0x0000bc9a - - 2- Read OTP - STM32MP> fuse sense 0 57 2 - Sensing bank 0: - Word 0x00000039: 78563412 0000bc9a - - 3- next REBOOT : - ### Setting environment from OTP MAC address = "12:34:56:78:9a:bc" - - 4 check env update - STM32MP> env print ethaddr - ethaddr=12:34:56:78:9a:bc - -warning:: This MAC address provisioning can't be executed twice on the same - board as the OTP are protected. It is already done for the board - provided by STMicroelectronics. - -10. Coprocessor firmware -======================== - -U-Boot can boot the coprocessor before the kernel (coprocessor early boot). - -A/ Manuallly by using rproc commands (update the bootcmd) - Configurations - # env set name_copro "rproc-m4-fw.elf" - # env set dev_copro 0 - # env set loadaddr_copro 0xC1000000 - - Load binary from bootfs partition (number 4) on SDCard (mmc 0) - # ext4load mmc 0:4 ${loadaddr_copro} ${name_copro} - => ${filesize} updated with the size of the loaded file - - Start M4 firmware with remote proc command - # rproc init - # rproc load ${dev_copro} ${loadaddr_copro} ${filesize} - # rproc start ${dev_copro} - -B/ Automatically by using FIT feature and generic DISTRO bootcmd - - see examples in this directory : - - Generate FIT including kernel + device tree + M4 firmware - with cfg with M4 boot - $> mkimage -f fit_copro_kernel_dtb.its fit_copro_kernel_dtb.itb - - Then using DISTRO configuration file: see extlinux.conf to select - the correct configuration - => stm32mp157c-ev1-m4 - => stm32mp157c-dk2-m4 - -11. DFU support -=============== - -The DFU is supported on ST board. -The env variable dfu_alt_info is automatically build, and all -the memory present on the ST boards are exported. - -The mode is started by - -STM32MP> dfu 0 - -On EV1 board: - -STM32MP> dfu 0 list - -DFU alt settings list: -dev: RAM alt: 0 name: uImage layout: RAM_ADDR -dev: RAM alt: 1 name: devicetree.dtb layout: RAM_ADDR -dev: RAM alt: 2 name: uramdisk.image.gz layout: RAM_ADDR -dev: eMMC alt: 3 name: sdcard_fsbl1 layout: RAW_ADDR -dev: eMMC alt: 4 name: sdcard_fsbl2 layout: RAW_ADDR -dev: eMMC alt: 5 name: sdcard_ssbl layout: RAW_ADDR -dev: eMMC alt: 6 name: sdcard_bootfs layout: RAW_ADDR -dev: eMMC alt: 7 name: sdcard_vendorfs layout: RAW_ADDR -dev: eMMC alt: 8 name: sdcard_rootfs layout: RAW_ADDR -dev: eMMC alt: 9 name: sdcard_userfs layout: RAW_ADDR -dev: eMMC alt: 10 name: emmc_fsbl1 layout: RAW_ADDR -dev: eMMC alt: 11 name: emmc_fsbl2 layout: RAW_ADDR -dev: eMMC alt: 12 name: emmc_ssbl layout: RAW_ADDR -dev: eMMC alt: 13 name: emmc_bootfs layout: RAW_ADDR -dev: eMMC alt: 14 name: emmc_vendorfs layout: RAW_ADDR -dev: eMMC alt: 15 name: emmc_rootfs layout: RAW_ADDR -dev: eMMC alt: 16 name: emmc_userfs layout: RAW_ADDR -dev: MTD alt: 17 name: nor_fsbl1 layout: RAW_ADDR -dev: MTD alt: 18 name: nor_fsbl2 layout: RAW_ADDR -dev: MTD alt: 19 name: nor_ssbl layout: RAW_ADDR -dev: MTD alt: 20 name: nor_env layout: RAW_ADDR -dev: MTD alt: 21 name: nand_fsbl layout: RAW_ADDR -dev: MTD alt: 22 name: nand_ssbl1 layout: RAW_ADDR -dev: MTD alt: 23 name: nand_ssbl2 layout: RAW_ADDR -dev: MTD alt: 24 name: nand_UBI layout: RAW_ADDR -dev: VIRT alt: 25 name: OTP layout: RAW_ADDR -dev: VIRT alt: 26 name: PMIC layout: RAW_ADDR - -All the supported device are exported for dfu-util tool: - -$> dfu-util -l -Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=26, name="PMIC", serial="002700333338511934383330" -Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=25, name="OTP", serial="002700333338511934383330" -Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=24, name="nand_UBI", serial="002700333338511934383330" -Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=23, name="nand_ssbl2", serial="002700333338511934383330" -Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=22, name="nand_ssbl1", serial="002700333338511934383330" -Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=21, name="nand_fsbl", serial="002700333338511934383330" -Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=20, name="nor_env", serial="002700333338511934383330" -Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=19, name="nor_ssbl", serial="002700333338511934383330" -Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=18, name="nor_fsbl2", serial="002700333338511934383330" -Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=17, name="nor_fsbl1", serial="002700333338511934383330" -Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=16, name="emmc_userfs", serial="002700333338511934383330" -Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=15, name="emmc_rootfs", serial="002700333338511934383330" -Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=14, name="emmc_vendorfs", serial="002700333338511934383330" -Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=13, name="emmc_bootfs", serial="002700333338511934383330" -Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=12, name="emmc_ssbl", serial="002700333338511934383330" -Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=11, name="emmc_fsbl2", serial="002700333338511934383330" -Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=10, name="emmc_fsbl1", serial="002700333338511934383330" -Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=9, name="sdcard_userfs", serial="002700333338511934383330" -Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=8, name="sdcard_rootfs", serial="002700333338511934383330" -Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=7, name="sdcard_vendorfs", serial="002700333338511934383330" -Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=6, name="sdcard_bootfs", serial="002700333338511934383330" -Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=5, name="sdcard_ssbl", serial="002700333338511934383330" -Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=4, name="sdcard_fsbl2", serial="002700333338511934383330" -Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=3, name="sdcard_fsbl1", serial="002700333338511934383330" -Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=2, name="uramdisk.image.gz", serial="002700333338511934383330" -Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=1, name="devicetree.dtb", serial="002700333338511934383330" -Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=0, name="uImage", serial="002700333338511934383330" - -You can update the boot device: - -#SDCARD -$> dfu-util -d 0483:5720 -a 3 -D tf-a-stm32mp157c-ev1-trusted.stm32 -$> dfu-util -d 0483:5720 -a 4 -D tf-a-stm32mp157c-ev1-trusted.stm32 -$> dfu-util -d 0483:5720 -a 5 -D u-boot-stm32mp157c-ev1-trusted.img -$> dfu-util -d 0483:5720 -a 6 -D st-image-bootfs-openstlinux-weston-stm32mp1.ext4 -$> dfu-util -d 0483:5720 -a 7 -D st-image-vendorfs-openstlinux-weston-stm32mp1.ext4 -$> dfu-util -d 0483:5720 -a 8 -D st-image-weston-openstlinux-weston-stm32mp1.ext4 -$> dfu-util -d 0483:5720 -a 9 -D st-image-userfs-openstlinux-weston-stm32mp1.ext4 - -#EMMC -$> dfu-util -d 0483:5720 -a 10 -D tf-a-stm32mp157c-ev1-trusted.stm32 -$> dfu-util -d 0483:5720 -a 11 -D tf-a-stm32mp157c-ev1-trusted.stm32 -$> dfu-util -d 0483:5720 -a 12 -D u-boot-stm32mp157c-ev1-trusted.img -$> dfu-util -d 0483:5720 -a 13 -D st-image-bootfs-openstlinux-weston-stm32mp1.ext4 -$> dfu-util -d 0483:5720 -a 14 -D st-image-vendorfs-openstlinux-weston-stm32mp1.ext4 -$> dfu-util -d 0483:5720 -a 15 -D st-image-weston-openstlinux-weston-stm32mp1.ext4 -$> dfu-util -d 0483:5720 -a 16 -D st-image-userfs-openstlinux-weston-stm32mp1.ext4 - -#NOR -$> dfu-util -d 0483:5720 -a 17 -D tf-a-stm32mp157c-ev1-trusted.stm32 -$> dfu-util -d 0483:5720 -a 18 -D tf-a-stm32mp157c-ev1-trusted.stm32 -$> dfu-util -d 0483:5720 -a 19 -D u-boot-stm32mp157c-ev1-trusted.img - -#NAND (UBI partition used for NAND only boot or NOR + NAND boot) -$> dfu-util -d 0483:5720 -a 21 -D tf-a-stm32mp157c-ev1-trusted.stm32 -$> dfu-util -d 0483:5720 -a 22 -D u-boot-stm32mp157c-ev1-trusted.img -$> dfu-util -d 0483:5720 -a 23 -D u-boot-stm32mp157c-ev1-trusted.img -$> dfu-util -d 0483:5720 -a 24 -D st-image-weston-openstlinux-weston-stm32mp1_nand_4_256_multivolume.ubi - -And you can also dump the OTP and the PMIC NVM with: - -$> dfu-util -d 0483:5720 -a 25 -U otp.bin -$> dfu-util -d 0483:5720 -a 26 -U pmic.bin +see doc/board/st/stm32mp1.rst diff --git a/board/toradex/apalis-imx8/MAINTAINERS b/board/toradex/apalis-imx8/MAINTAINERS index c9ac58b47b1..feacf7eded6 100644 --- a/board/toradex/apalis-imx8/MAINTAINERS +++ b/board/toradex/apalis-imx8/MAINTAINERS @@ -6,4 +6,5 @@ F: arch/arm/dts/fsl-imx8-apalis.dts F: arch/arm/dts/fsl-imx8-apalis-u-boot.dtsi F: board/toradex/apalis-imx8/ F: configs/apalis-imx8qm_defconfig +F: doc/board/toradex/apalix-imx8.rst F: include/configs/apalis-imx8.h diff --git a/board/toradex/apalis-imx8/README b/board/toradex/apalis-imx8/README deleted file mode 100644 index e6e3dcb367f..00000000000 --- a/board/toradex/apalis-imx8/README +++ /dev/null @@ -1,66 +0,0 @@ -U-Boot for the Toradex Apalis iMX8QM V1.0B Module - -Quick Start -=========== - -- Build the ARM trusted firmware binary -- Get scfw_tcm.bin and ahab-container.img -- Build U-Boot -- Load U-Boot binary using uuu -- Flash U-Boot binary into the eMMC -- Boot - -Get and Build the ARM Trusted Firmware -====================================== - -$ git clone -b imx_4.14.78_1.0.0_ga https://source.codeaurora.org/external/imx/imx-atf -$ cd imx-atf/ -$ make PLAT=imx8qm bl31 - -Get scfw_tcm.bin and ahab-container.img -======================================= - -$ wget https://github.com/toradex/meta-fsl-bsp-release/blob/toradex-sumo-4.14.78-1.0.0_ga-bringup/imx/meta-bsp/recipes-bsp/imx-sc-firmware/files/mx8qm-apalis-scfw-tcm.bin?raw=true -$ mv mx8qm-apalis-scfw-tcm.bin\?raw\=true mx8qm-apalis-scfw-tcm.bin -$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.0.bin -$ chmod +x firmware-imx-8.0.bin -$ ./firmware-imx-8.0.bin - -Copy the following binaries to the U-Boot folder: - -$ cp imx-atf/build/imx8qm/release/bl31.bin . -$ cp u-boot/u-boot.bin . - -Copy the following firmware to the U-Boot folder: - -$ cp firmware-imx-8.0/firmware/seco/ahab-container.img . - -Build U-Boot -============ - -$ make apalis-imx8qm_defconfig -$ make u-boot-dtb.imx - -Load the U-Boot Binary Using UUU -================================ - -Get the latest version of the universal update utility (uuu) aka mfgtools 3.0: - -https://community.nxp.com/external-link.jspa?url=https%3A%2F%2Fgithub.com%2FNXPmicro%2Fmfgtools%2Freleases - -Put the module into USB recovery aka serial downloader mode, connect USB device -to your host and execute uuu: - -sudo ./uuu u-boot/u-boot-dtb.imx - -Flash the U-Boot Binary into the eMMC -===================================== - -Burn the u-boot-dtb.imx binary to the primary eMMC hardware boot area partition: - -load mmc 1:1 $loadaddr u-boot-dtb.imx -setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt ${blkcnt} / 0x200 -mmc dev 0 1 -mmc write ${loadaddr} 0x0 ${blkcnt} - -Boot diff --git a/board/toradex/colibri-imx8x/MAINTAINERS b/board/toradex/colibri-imx8x/MAINTAINERS index e91b9975c27..f6853586c8b 100644 --- a/board/toradex/colibri-imx8x/MAINTAINERS +++ b/board/toradex/colibri-imx8x/MAINTAINERS @@ -6,4 +6,5 @@ F: arch/arm/dts/fsl-imx8x-colibri.dts F: arch/arm/dts/fsl-imx8x-colibri-u-boot.dtsi F: board/toradex/colibri-imx8x/ F: configs/colibri-imx8qxp_defconfig +F: doc/board/toradex/colibri-imx8x.rst F: include/configs/colibri-imx8x.h diff --git a/board/toradex/colibri-imx8x/README b/board/toradex/colibri-imx8x/README deleted file mode 100644 index 708bb3e51c9..00000000000 --- a/board/toradex/colibri-imx8x/README +++ /dev/null @@ -1,66 +0,0 @@ -U-Boot for the Toradex Colibri iMX8QXP V1.0B Module - -Quick Start -=========== - -- Build the ARM trusted firmware binary -- Get scfw_tcm.bin and ahab-container.img -- Build U-Boot -- Load U-Boot binary using uuu -- Flash U-Boot binary into the eMMC -- Boot - -Get and Build the ARM Trusted Firmware -====================================== - -$ git clone -b imx_4.14.78_1.0.0_ga https://source.codeaurora.org/external/imx/imx-atf -$ cd imx-atf/ -$ make PLAT=imx8qxp bl31 - -Get scfw_tcm.bin and ahab-container.img -======================================= - -$ wget https://github.com/toradex/meta-fsl-bsp-release/blob/toradex-sumo-4.14.78-1.0.0_ga-bringup/imx/meta-bsp/recipes-bsp/imx-sc-firmware/files/mx8qx-colibri-scfw-tcm.bin?raw=true -$ mv mx8qx-colibri-scfw-tcm.bin\?raw\=true mx8qx-colibri-scfw-tcm.bin -$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.0.bin -$ chmod +x firmware-imx-8.0.bin -$ ./firmware-imx-8.0.bin - -Copy the following binaries to the U-Boot folder: - -$ cp imx-atf/build/imx8qxp/release/bl31.bin . -$ cp u-boot/u-boot.bin . - -Copy the following firmware to the U-Boot folder: - -$ cp firmware-imx-8.0/firmware/seco/ahab-container.img . - -Build U-Boot -============ - -$ make colibri-imx8qxp_defconfig -$ make u-boot-dtb.imx - -Load the U-Boot Binary Using UUU -================================ - -Get the latest version of the universal update utility (uuu) aka mfgtools 3.0: - -https://community.nxp.com/external-link.jspa?url=https%3A%2F%2Fgithub.com%2FNXPmicro%2Fmfgtools%2Freleases - -Put the module into USB recovery aka serial downloader mode, connect USB device -to your host and execute uuu: - -sudo ./uuu u-boot/u-boot-dtb.imx - -Flash the U-Boot Binary into the eMMC -===================================== - -Burn the u-boot-dtb.imx binary to the primary eMMC hardware boot area partition: - -load mmc 1:1 $loadaddr u-boot-dtb.imx -setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt ${blkcnt} / 0x200 -mmc dev 0 1 -mmc write ${loadaddr} 0x0 ${blkcnt} - -Boot diff --git a/board/toradex/colibri_imx7/MAINTAINERS b/board/toradex/colibri_imx7/MAINTAINERS index 178dece7970..82246be1603 100644 --- a/board/toradex/colibri_imx7/MAINTAINERS +++ b/board/toradex/colibri_imx7/MAINTAINERS @@ -4,6 +4,7 @@ W: http://developer.toradex.com/software/linux/linux-software W: https://www.toradex.com/community S: Maintained F: board/toradex/colibri_imx7/ +F: doc/board/toradex/colibri_imx7.rst F: include/configs/colibri_imx7.h F: configs/colibri_imx7_defconfig F: configs/colibri_imx7_emmc_defconfig diff --git a/board/toradex/verdin-imx8mm/MAINTAINERS b/board/toradex/verdin-imx8mm/MAINTAINERS index 3b4fae5c664..2495696e9d8 100644 --- a/board/toradex/verdin-imx8mm/MAINTAINERS +++ b/board/toradex/verdin-imx8mm/MAINTAINERS @@ -6,4 +6,5 @@ F: arch/arm/dts/imx8mm-verdin.dts F: arch/arm/dts/imx8mm-verdin-u-boot.dtsi F: board/toradex/verdin-imx8mm/ F: configs/verdin-imx8mm_defconfig +F: doc/board/toradex/verdin-imx8mm.rst F: include/configs/verdin-imx8mm.h diff --git a/board/toradex/verdin-imx8mm/README b/board/toradex/verdin-imx8mm/README deleted file mode 100644 index 1dac969476a..00000000000 --- a/board/toradex/verdin-imx8mm/README +++ /dev/null @@ -1,88 +0,0 @@ -U-Boot for the Toradex Verdin iMX8M Mini Module - -Quick Start -=========== - -- Build the ARM trusted firmware binary -- Get the DDR firmware -- Build U-Boot -- Flash to eMMC -- Boot - -Get and Build the ARM Trusted Firmware (Trusted Firmware A) -=========================================================== - -$ echo "Downloading and building TF-A..." -$ git clone -b imx_4.14.98_2.3.0 https://source.codeaurora.org/external/imx/imx-atf -$ cd imx-atf - -Please edit `plat/imx/imx8mm/include/platform_def.h` so it contains proper -values for UART configuration and BL31 base address (correct values listed -below): -#define BL31_BASE 0x910000 -#define IMX_BOOT_UART_BASE 0x30860000 -#define DEBUG_CONSOLE 1 - -Then build ATF (TF-A): -$ make PLAT=imx8mm bl31 - -Get the DDR Firmware -==================== - -$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.4.1.bin -$ chmod +x firmware-imx-8.4.1.bin -$ ./firmware-imx-8.4.1.bin -$ cp firmware-imx-8.4.1/firmware/ddr/synopsys/lpddr4*.bin ./ - -Build U-Boot -============ - -$ export CROSS_COMPILE=aarch64-linux-gnu- -$ make verdin-imx8mm_defconfig -$ make flash.bin - -Flash to eMMC -============= - -> tftpboot ${loadaddr} flash.bin -> setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt ${blkcnt} / 0x200 -> mmc dev 0 1 && mmc write ${loadaddr} 0x2 ${blkcnt} - -As a convenience, instead of the last two commands one may also use the update -U-Boot wrapper: -> run update_uboot - -Boot -==== - -ATF, U-boot proper and u-boot.dtb images are packed into FIT image, -which is loaded and parsed by SPL. - -Boot sequence is: -SPL ---> ATF (TF-A) ---> U-boot proper - -Output: -U-Boot SPL 2020.01-00187-gd411d164e5 (Jan 26 2020 - 04:47:26 +0100) -Normal Boot -Trying to boot from MMC1 -NOTICE: Configuring TZASC380 -NOTICE: RDC off -NOTICE: BL31: v2.0(release):rel_imx_4.14.98_2.3.0-0-g09c5cc994-dirty -NOTICE: BL31: Built : 01:11:41, Jan 25 2020 -NOTICE: sip svc init - - -U-Boot 2020.01-00187-gd411d164e5 (Jan 26 2020 - 04:47:26 +0100) - -CPU: Freescale i.MX8MMQ rev1.0 at 0 MHz -Reset cause: POR -DRAM: 2 GiB -MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 -Loading Environment from MMC... OK -In: serial -Out: serial -Err: serial -Model: Toradex Verdin iMX8M Mini Quad 2GB Wi-Fi / BT IT V1.0A, Serial# 06535149 -Net: eth0: ethernet@30be0000 -Hit any key to stop autoboot: 0 -Verdin iMX8MM # diff --git a/board/xilinx/zynq/MAINTAINERS b/board/xilinx/zynq/MAINTAINERS index fc6463a8c61..78bcd84d30e 100644 --- a/board/xilinx/zynq/MAINTAINERS +++ b/board/xilinx/zynq/MAINTAINERS @@ -5,3 +5,4 @@ F: arch/arm/dts/zynq-* F: board/xilinx/zynq/ F: include/configs/zynq*.h F: configs/zynq_*_defconfig +F: configs/xilinx_zynq_* diff --git a/board/xilinx/zynq/Makefile b/board/xilinx/zynq/Makefile index 6a2acee108f..096a7aceb93 100644 --- a/board/xilinx/zynq/Makefile +++ b/board/xilinx/zynq/Makefile @@ -13,6 +13,11 @@ spl/board/xilinx/zynq/ps_init_gpl.o board/xilinx/zynq/ps_init_gpl.o: $(PS_INIT_F $(CC) $(c_flags) -I $(srctree)/$(src) -c -o $@ $^ endif +DEVICE_TREE ?= $(CONFIG_DEFAULT_DEVICE_TREE:"%"=%) +ifeq ($(DEVICE_TREE),) +DEVICE_TREE := unset +endif + ifeq ($(init-objs),) hw-platform-y :=$(shell echo $(DEVICE_TREE)) init-objs := $(if $(wildcard $(srctree)/$(src)/$(hw-platform-y)/ps7_init_gpl.c),\ diff --git a/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c b/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c index 7c6bc9fa3f4..a376ba574ea 100644 --- a/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c +++ b/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c @@ -219,8 +219,8 @@ static unsigned long ps7_mio_init_data_3_0[] = { EMIT_MASKWRITE(0xF80007BC, 0x00003F01U, 0x00001201U), EMIT_MASKWRITE(0xF80007C0, 0x00003FFFU, 0x000012E0U), EMIT_MASKWRITE(0xF80007C4, 0x00003FFFU, 0x000012E1U), - EMIT_MASKWRITE(0xF80007C8, 0x00003FFFU, 0x00001200U), - EMIT_MASKWRITE(0xF80007CC, 0x00003FFFU, 0x00001200U), + EMIT_MASKWRITE(0xF80007C8, 0x00003FFFU, 0x00000200U), + EMIT_MASKWRITE(0xF80007CC, 0x00003FFFU, 0x00000200U), EMIT_MASKWRITE(0xF80007D0, 0x00003FFFU, 0x00001280U), EMIT_MASKWRITE(0xF80007D4, 0x00003FFFU, 0x00001280U), EMIT_MASKWRITE(0xF8000830, 0x003F003FU, 0x002F0037U), diff --git a/board/xilinx/zynqmp/Makefile b/board/xilinx/zynqmp/Makefile index 174f4ed24be..398c6aaa452 100644 --- a/board/xilinx/zynqmp/Makefile +++ b/board/xilinx/zynqmp/Makefile @@ -13,6 +13,11 @@ spl/board/xilinx/zynqmp/ps_init_gpl.o board/xilinx/zynqmp/ps_init_gpl.o: $(PS_IN $(CC) $(c_flags) -I $(srctree)/$(src) -c -o $@ $^ endif +DEVICE_TREE ?= $(CONFIG_DEFAULT_DEVICE_TREE:"%"=%) +ifeq ($(DEVICE_TREE),) +DEVICE_TREE := unset +endif + ifeq ($(init-objs),) hw-platform-y :=$(shell echo $(DEVICE_TREE)) init-objs := $(if $(wildcard $(srctree)/$(src)/$(hw-platform-y)/psu_init_gpl.c),\ diff --git a/cmd/efidebug.c b/cmd/efidebug.c index 576e95b395d..21dfd44fcc9 100644 --- a/cmd/efidebug.c +++ b/cmd/efidebug.c @@ -244,6 +244,10 @@ static const struct { EFI_HII_CONFIG_ROUTING_PROTOCOL_GUID, }, { + "Load File2", + EFI_LOAD_FILE2_PROTOCOL_GUID, + }, + { "Simple Network", EFI_SIMPLE_NETWORK_PROTOCOL_GUID, }, @@ -264,6 +268,10 @@ static const struct { "SMBIOS table", SMBIOS_TABLE_GUID, }, + { + "Runtime properties", + EFI_RT_PROPERTIES_TABLE_GUID, + }, }; /** diff --git a/configs/MPC8313ERDB_NAND_33_defconfig b/configs/MPC8313ERDB_NAND_33_defconfig index 388b8fb395f..af09f1641d7 100644 --- a/configs/MPC8313ERDB_NAND_33_defconfig +++ b/configs/MPC8313ERDB_NAND_33_defconfig @@ -4,6 +4,7 @@ CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x80000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_SYS_CLK_FREQ=33333333 CONFIG_MPC83xx=y CONFIG_HIGH_BATS=y @@ -153,7 +154,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=e2800000.flash:512k(uboot),128k(env),6m@1m(ker # CONFIG_ENV_IS_IN_FLASH is not set CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_MMC is not set CONFIG_MTD=y diff --git a/configs/MPC8313ERDB_NAND_66_defconfig b/configs/MPC8313ERDB_NAND_66_defconfig index 284d84d2a68..f2d8a653ac3 100644 --- a/configs/MPC8313ERDB_NAND_66_defconfig +++ b/configs/MPC8313ERDB_NAND_66_defconfig @@ -4,6 +4,7 @@ CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x80000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_SYS_CLK_FREQ=66666667 CONFIG_MPC83xx=y CONFIG_HIGH_BATS=y @@ -152,7 +153,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=e2800000.flash:512k(uboot),128k(env),6m@1m(ker # CONFIG_ENV_IS_IN_FLASH is not set CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_MMC is not set CONFIG_MTD=y diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index 8e631ad5640..ef5aa483f81 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -32,7 +32,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y -CONFIG_FSL_AHCI=y CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y @@ -65,4 +64,3 @@ CONFIG_USB_STORAGE=y CONFIG_RSA=y CONFIG_SPL_RSA=y CONFIG_RSA_SOFTWARE_EXP=y --CONFIG_FSL_AHCI=y diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig index 9cea85413b8..d8a7b7dcf51 100644 --- a/configs/am335x_boneblack_vboot_defconfig +++ b/configs/am335x_boneblack_vboot_defconfig @@ -6,6 +6,7 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_AM33XX=y CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y @@ -32,7 +33,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="am335x-boneblack" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y # CONFIG_SPL_BLK is not set diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig index 64f0d933a45..b7ee1a71292 100644 --- a/configs/am335x_shc_defconfig +++ b/configs/am335x_shc_defconfig @@ -11,6 +11,7 @@ CONFIG_TARGET_AM335X_SHC=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x9000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SERIES=y @@ -43,7 +44,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x9000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_MMC=y diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig index 5d8cafc2cae..641d15be169 100644 --- a/configs/am335x_shc_ict_defconfig +++ b/configs/am335x_shc_ict_defconfig @@ -11,6 +11,7 @@ CONFIG_TARGET_AM335X_SHC=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x9000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SHC_ICT=y @@ -44,7 +45,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x9000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_MMC=y diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig index 8fbdc892e30..49c0966fa89 100644 --- a/configs/am335x_shc_netboot_defconfig +++ b/configs/am335x_shc_netboot_defconfig @@ -11,6 +11,7 @@ CONFIG_TARGET_AM335X_SHC=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x9000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SHC_NETBOOT=y @@ -45,7 +46,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x9000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_MMC=y diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig index 4c8a4f6fcbd..a2dc081c3d7 100644 --- a/configs/am335x_shc_sdboot_defconfig +++ b/configs/am335x_shc_sdboot_defconfig @@ -11,6 +11,7 @@ CONFIG_TARGET_AM335X_SHC=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x9000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SHC_SDBOOT=y @@ -44,7 +45,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x9000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_MMC=y diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig index 1f562eabecc..ecbe094c73c 100644 --- a/configs/am335x_sl50_defconfig +++ b/configs/am335x_sl50_defconfig @@ -10,6 +10,7 @@ CONFIG_TARGET_AM335X_SL50=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x20000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y @@ -42,7 +43,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="am335x-sl50" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x20000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_BOOTCOUNT_LIMIT=y diff --git a/configs/am43xx_evm_qspiboot_defconfig b/configs/am43xx_evm_qspiboot_defconfig index 4c828d17cee..d52745fd843 100644 --- a/configs/am43xx_evm_qspiboot_defconfig +++ b/configs/am43xx_evm_qspiboot_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x110000 CONFIG_DM_GPIO=y CONFIG_AM43XX=y +CONFIG_ENV_OFFSET_REDUND=0x120000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1,QSPI,QSPI_BOOT" CONFIG_QSPI_BOOT=y @@ -33,7 +34,6 @@ CONFIG_DTB_RESELECT=y CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x120000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index f39f553afba..f0ddb020ee3 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -7,6 +7,7 @@ CONFIG_OMAP54XX=y CONFIG_TARGET_AM57XX_EVM=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_ARMV7_LPAE=y @@ -47,7 +48,6 @@ CONFIG_DEFAULT_DEVICE_TREE="am572x-idk" CONFIG_OF_LIST="am57xx-beagle-x15 am57xx-beagle-x15-revb1 am57xx-beagle-x15-revc am5729-beagleboneai am572x-idk am571x-idk am574x-idk" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index 4480f1c84d0..5db187738ef 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -11,6 +11,7 @@ CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000 CONFIG_TARGET_AM57XX_EVM=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_ARMV7_LPAE=y @@ -49,7 +50,6 @@ CONFIG_DEFAULT_DEVICE_TREE="am57xx-beagle-x15" CONFIG_OF_LIST="am57xx-beagle-x15 am57xx-beagle-x15-revb1 am57xx-beagle-x15-revc am572x-idk am571x-idk am574x-idk" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig index 1e9268f68dd..5ef15187a63 100644 --- a/configs/am57xx_hs_evm_usb_defconfig +++ b/configs/am57xx_hs_evm_usb_defconfig @@ -12,6 +12,7 @@ CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000 CONFIG_TARGET_AM57XX_EVM=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_ARMV7_LPAE=y @@ -54,7 +55,6 @@ CONFIG_DEFAULT_DEVICE_TREE="am57xx-beagle-x15" CONFIG_OF_LIST="am57xx-beagle-x15 am57xx-beagle-x15-revb1 am57xx-beagle-x15-revc am572x-idk am571x-idk am574x-idk" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig index 079cd912ba3..121d8de2317 100644 --- a/configs/am65x_evm_a53_defconfig +++ b/configs/am65x_evm_a53_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_ENV_OFFSET_REDUND=0x6A0000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_PSCI_RESET is not set @@ -51,7 +52,6 @@ CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x6A0000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y diff --git a/configs/apf27_defconfig b/configs/apf27_defconfig index 5fb41bd9465..73a53047244 100644 --- a/configs/apf27_defconfig +++ b/configs/apf27_defconfig @@ -7,6 +7,7 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_IDENT_STRING=" apf27 patch 3.10" CONFIG_SPL_TEXT_BASE=0xA0000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y @@ -42,7 +43,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=mxc_nand.0:1M(u-boot)ro,512K(env),512K(env2),5 CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_FPGA_XILINX=y CONFIG_FPGA_SPARTAN3=y diff --git a/configs/apx4devkit_defconfig b/configs/apx4devkit_defconfig index bb57b29a0bb..1d4e987daf0 100644 --- a/configs/apx4devkit_defconfig +++ b/configs/apx4devkit_defconfig @@ -10,6 +10,7 @@ CONFIG_TARGET_APX4DEVKIT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_SPL_TEXT_BASE=0x00001000 CONFIG_BOOTDELAY=1 CONFIG_VERSION_VARIABLE=y @@ -34,7 +35,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:128k(bootstrap),1024k(boot),768k(env CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_MXS_GPIO=y CONFIG_MMC_MXS=y diff --git a/configs/aristainetos2_defconfig b/configs/aristainetos2_defconfig index cf272ae0583..25ac75d4ee1 100644 --- a/configs/aristainetos2_defconfig +++ b/configs/aristainetos2_defconfig @@ -6,6 +6,7 @@ CONFIG_TARGET_ARISTAINETOS2=y CONFIG_ENV_OFFSET=0xD0000 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_OFFSET_REDUND=0xE0000 CONFIG_IMX_HAB=y # CONFIG_CMD_DEKBLOB is not set # CONFIG_CMD_NANDBCB is not set @@ -58,7 +59,6 @@ CONFIG_DTB_RESELECT=y CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0xE0000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_GPIO_HOG=y CONFIG_DM_PCA953X=y diff --git a/configs/aristainetos2b_defconfig b/configs/aristainetos2b_defconfig index b44f674e21e..d1a20b643ec 100644 --- a/configs/aristainetos2b_defconfig +++ b/configs/aristainetos2b_defconfig @@ -6,6 +6,7 @@ CONFIG_TARGET_ARISTAINETOS2B=y CONFIG_ENV_OFFSET=0xD0000 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_OFFSET_REDUND=0xE0000 CONFIG_IMX_HAB=y # CONFIG_CMD_DEKBLOB is not set CONFIG_FIT=y @@ -56,7 +57,6 @@ CONFIG_DTB_RESELECT=y CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0xE0000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_GPIO_HOG=y CONFIG_DM_PCA953X=y diff --git a/configs/aristainetos2bcsl_defconfig b/configs/aristainetos2bcsl_defconfig index 48dab90dd07..712e6324603 100644 --- a/configs/aristainetos2bcsl_defconfig +++ b/configs/aristainetos2bcsl_defconfig @@ -6,6 +6,7 @@ CONFIG_TARGET_ARISTAINETOS2BCSL=y CONFIG_ENV_OFFSET=0xD0000 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_OFFSET_REDUND=0xE0000 CONFIG_IMX_HAB=y # CONFIG_CMD_DEKBLOB is not set CONFIG_FIT=y @@ -56,7 +57,6 @@ CONFIG_DTB_RESELECT=y CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0xE0000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_GPIO_HOG=y CONFIG_DM_PCA953X=y diff --git a/configs/aristainetos2c_defconfig b/configs/aristainetos2c_defconfig index 9775223f664..c6d92251cea 100644 --- a/configs/aristainetos2c_defconfig +++ b/configs/aristainetos2c_defconfig @@ -6,6 +6,7 @@ CONFIG_TARGET_ARISTAINETOS2C=y CONFIG_ENV_OFFSET=0xD0000 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_OFFSET_REDUND=0xE0000 CONFIG_IMX_HAB=y # CONFIG_CMD_DEKBLOB is not set CONFIG_FIT=y @@ -56,7 +57,6 @@ CONFIG_DTB_RESELECT=y CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0xE0000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_APBH_DMA=y CONFIG_APBH_DMA_BURST=y diff --git a/configs/at91sam9260ek_nandflash_defconfig b/configs/at91sam9260ek_nandflash_defconfig index 2cfbf067367..e82ee5b6da3 100644 --- a/configs/at91sam9260ek_nandflash_defconfig +++ b/configs/at91sam9260ek_nandflash_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 @@ -31,7 +32,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_CLK=y diff --git a/configs/at91sam9261ek_nandflash_defconfig b/configs/at91sam9261ek_nandflash_defconfig index a893505088b..030659fd317 100644 --- a/configs/at91sam9261ek_nandflash_defconfig +++ b/configs/at91sam9261ek_nandflash_defconfig @@ -8,6 +8,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 @@ -31,7 +32,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_CLK=y diff --git a/configs/at91sam9263ek_nandflash_defconfig b/configs/at91sam9263ek_nandflash_defconfig index d2cadde48e3..8c89d14b19e 100644 --- a/configs/at91sam9263ek_nandflash_defconfig +++ b/configs/at91sam9263ek_nandflash_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 @@ -35,7 +36,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_CLK=y diff --git a/configs/at91sam9g10ek_nandflash_defconfig b/configs/at91sam9g10ek_nandflash_defconfig index 7814046bb6f..1dfb724c07f 100644 --- a/configs/at91sam9g10ek_nandflash_defconfig +++ b/configs/at91sam9g10ek_nandflash_defconfig @@ -8,6 +8,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 @@ -31,7 +32,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_CLK=y diff --git a/configs/at91sam9g20ek_2mmc_nandflash_defconfig b/configs/at91sam9g20ek_2mmc_nandflash_defconfig index 201c1d53c06..5dbf2dbc8a3 100644 --- a/configs/at91sam9g20ek_2mmc_nandflash_defconfig +++ b/configs/at91sam9g20ek_2mmc_nandflash_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 @@ -32,7 +33,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek_2mmc" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_CLK=y diff --git a/configs/at91sam9g20ek_nandflash_defconfig b/configs/at91sam9g20ek_nandflash_defconfig index 6cc9a08ec9f..b8c9c28ed0c 100644 --- a/configs/at91sam9g20ek_nandflash_defconfig +++ b/configs/at91sam9g20ek_nandflash_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 @@ -31,7 +32,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_CLK=y diff --git a/configs/at91sam9m10g45ek_nandflash_defconfig b/configs/at91sam9m10g45ek_nandflash_defconfig index 3fa71313796..36cf4ed9934 100644 --- a/configs/at91sam9m10g45ek_nandflash_defconfig +++ b/configs/at91sam9m10g45ek_nandflash_defconfig @@ -8,6 +8,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_DEBUG_UART=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 @@ -34,7 +35,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_CLK=y diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig index 521bb98a49e..b02be844931 100644 --- a/configs/at91sam9n12ek_nandflash_defconfig +++ b/configs/at91sam9n12ek_nandflash_defconfig @@ -8,6 +8,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_DEBUG_UART=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 @@ -33,7 +34,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9n12ek" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_CLK=y diff --git a/configs/at91sam9rlek_nandflash_defconfig b/configs/at91sam9rlek_nandflash_defconfig index fbd81b9c9a9..77ecbe0ea32 100644 --- a/configs/at91sam9rlek_nandflash_defconfig +++ b/configs/at91sam9rlek_nandflash_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 @@ -32,7 +33,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set CONFIG_DM=y diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig index 4a3918cc048..7c69f571c9d 100644 --- a/configs/at91sam9x5ek_nandflash_defconfig +++ b/configs/at91sam9x5ek_nandflash_defconfig @@ -8,6 +8,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_NAND_BOOT=y @@ -35,7 +36,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_CLK=y diff --git a/configs/at91sam9xeek_nandflash_defconfig b/configs/at91sam9xeek_nandflash_defconfig index 32506f73a13..19ba293718b 100644 --- a/configs/at91sam9xeek_nandflash_defconfig +++ b/configs/at91sam9xeek_nandflash_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 @@ -31,7 +32,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_CLK=y diff --git a/configs/axm_defconfig b/configs/axm_defconfig index 0e9f5637af1..57683b183fc 100644 --- a/configs/axm_defconfig +++ b/configs/axm_defconfig @@ -18,6 +18,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=18432000 +CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEBUG_UART=y @@ -51,7 +52,6 @@ CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus" CONFIG_SPL_OF_PLATDATA=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_DM=y CONFIG_BLK=y diff --git a/configs/bcm7260_defconfig b/configs/bcm7260_defconfig index 97401f5f396..afb59ec8847 100644 --- a/configs/bcm7260_defconfig +++ b/configs/bcm7260_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_BCM7260=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x814800 CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_OFFSET_REDUND=0x824800 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_BOOTDELAY=1 @@ -16,7 +17,6 @@ CONFIG_EFI_PARTITION=y CONFIG_OF_PRIOR_STAGE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x824800 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y diff --git a/configs/bcm7445_defconfig b/configs/bcm7445_defconfig index 0d3b0c398d9..20526d05dc6 100644 --- a/configs/bcm7445_defconfig +++ b/configs/bcm7445_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1E0000 CONFIG_NR_DRAM_BANKS=3 +CONFIG_ENV_OFFSET_REDUND=0x1F0000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_BOOTDELAY=1 @@ -18,7 +19,6 @@ CONFIG_CMD_SPI=y CONFIG_OF_PRIOR_STAGE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x1F0000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y diff --git a/configs/bk4r1_defconfig b/configs/bk4r1_defconfig index 1ee4a2fd3a7..deec16e55cb 100644 --- a/configs/bk4r1_defconfig +++ b/configs/bk4r1_defconfig @@ -10,6 +10,7 @@ CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x4006e02c CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y +CONFIG_ENV_OFFSET_REDUND=0x220000 CONFIG_TARGET_BK4R1=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/phytec/pcm052/imximage.cfg" @@ -37,7 +38,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="vf610-bk4r1" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x220000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y CONFIG_DM=y diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig index 8f3963a0032..59c2e2af9a1 100644 --- a/configs/brppt1_mmc_defconfig +++ b/configs/brppt1_mmc_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x50000 # CONFIG_EXPERT is not set # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y @@ -67,7 +68,6 @@ CONFIG_DEFAULT_DEVICE_TREE="am335x-brppt1-mmc" CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clocks clock-names interrupt-parent interrupt-controller interrupt-cells dma-names dmas " CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x50000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig index a2f45b241cd..a8a71d195be 100644 --- a/configs/brppt1_spi_defconfig +++ b/configs/brppt1_spi_defconfig @@ -13,6 +13,7 @@ CONFIG_TARGET_BRPPT1=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x30000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y # CONFIG_EXPERT is not set @@ -74,7 +75,6 @@ CONFIG_DEFAULT_DEVICE_TREE="am335x-brppt1-spi" CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clocks clock-names interrupt-parent interrupt-controller interrupt-cells dma-names dmas " CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x30000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y diff --git a/configs/brsmarc1_defconfig b/configs/brsmarc1_defconfig index 0be679813e0..bb710148282 100644 --- a/configs/brsmarc1_defconfig +++ b/configs/brsmarc1_defconfig @@ -14,6 +14,7 @@ CONFIG_TARGET_BRSMARC1=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x30000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y # CONFIG_EXPERT is not set @@ -73,7 +74,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="am335x-brsmarc1" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x30000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig index 9df7ea30fcb..5d3246ac8c7 100644 --- a/configs/brxre1_defconfig +++ b/configs/brxre1_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x50000 # CONFIG_EXPERT is not set # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y @@ -66,7 +67,6 @@ CONFIG_DEFAULT_DEVICE_TREE="am335x-brxre1" CONFIG_OF_SPL_REMOVE_PROPS="" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x50000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y diff --git a/configs/chiliboard_defconfig b/configs/chiliboard_defconfig index 1534fbe6d10..4c118a615a7 100644 --- a/configs/chiliboard_defconfig +++ b/configs/chiliboard_defconfig @@ -11,6 +11,7 @@ CONFIG_TARGET_CHILIBOARD=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x22000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y @@ -37,7 +38,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="am335x-chiliboard" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x22000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_MISC=y diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig index 0a3acd36c2a..439c8cb0cec 100644 --- a/configs/chromebook_bob_defconfig +++ b/configs/chromebook_bob_defconfig @@ -7,7 +7,6 @@ CONFIG_ROCKCHIP_RK3399=y CONFIG_ROCKCHIP_BOOT_MODE_REG=0 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 # CONFIG_SPL_MMC_SUPPORT is not set -CONFIG_TARGET_CHROMEBOOK_BOB=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BASE=0xff1a0000 CONFIG_DEBUG_UART_CLOCK=24000000 diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index a7b71d99a10..67713ba8833 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -88,7 +88,6 @@ CONFIG_SOUND_RT5677=y CONFIG_SPI=y CONFIG_ICH_SPI=y CONFIG_TPL_SYSRESET=y -CONFIG_TPM_TIS_LPC=y # CONFIG_TPM_V1 is not set CONFIG_TPM2_CR50_I2C=y CONFIG_USB_XHCI_HCD=y diff --git a/configs/cm_t54_defconfig b/configs/cm_t54_defconfig index b83c49a0609..98361c4e274 100644 --- a/configs/cm_t54_defconfig +++ b/configs/cm_t54_defconfig @@ -6,6 +6,7 @@ CONFIG_OMAP54XX=y CONFIG_TARGET_CM_T54=y CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC=16296 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0xC4000 CONFIG_SPL_TEXT_BASE=0x40300000 CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y @@ -32,7 +33,6 @@ CONFIG_CMD_USB=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0xC4000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_SCSI_AHCI=y diff --git a/configs/cortina_presidio-asic-base_defconfig b/configs/cortina_presidio-asic-base_defconfig index ec64bd2aef5..3bfc28b1186 100644 --- a/configs/cortina_presidio-asic-base_defconfig +++ b/configs/cortina_presidio-asic-base_defconfig @@ -2,8 +2,8 @@ CONFIG_ARM=y # CONFIG_SYS_ARCH_TIMER is not set CONFIG_TARGET_PRESIDIO_ASIC=y CONFIG_SYS_TEXT_BASE=0x04000000 -CONFIG_DM_GPIO=y CONFIG_ENV_SIZE=0x20000 +CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_IDENT_STRING="Presidio-SoC" CONFIG_SHOW_BOOT_PROGRESS=y diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig index 5833fd8901e..0eedaa93667 100644 --- a/configs/corvus_defconfig +++ b/configs/corvus_defconfig @@ -13,6 +13,7 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,MACH_TYPE=2066,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 @@ -42,7 +43,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g45-corvus" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_BLK=y CONFIG_CLK=y diff --git a/configs/deneb_defconfig b/configs/deneb_defconfig index e139a143c67..388330afc41 100644 --- a/configs/deneb_defconfig +++ b/configs/deneb_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_NR_DRAM_BANKS=3 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x2000 CONFIG_SPL_TEXT_BASE=0x100000 CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y @@ -56,7 +57,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="imx8-deneb" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x2000 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index 3b46a4bdaa3..cbfc3c394e7 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SYS_BOOTCOUNT_ADDR=0x00900000 CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x110000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_AHCI=y @@ -51,7 +52,6 @@ CONFIG_OF_LIST="imx6q-dhcom-pdk2 imx6dl-dhcom-pdk2" CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x110000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DWC_AHSATA=y CONFIG_BOOTCOUNT_LIMIT=y diff --git a/configs/display5_defconfig b/configs/display5_defconfig index 163fb52e56c..9026c17f3fb 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -21,6 +21,7 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y +CONFIG_ENV_OFFSET_REDUND=0x130000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_TEXT_BASE=0x00908000 @@ -76,7 +77,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-display5" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x130000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig index ac436af3edf..710fef4a208 100644 --- a/configs/display5_factory_defconfig +++ b/configs/display5_factory_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x130000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_TEXT_BASE=0x00908000 @@ -78,7 +79,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-display5" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x130000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DFU_MMC=y CONFIG_DFU_SF=y diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index 9db80aac590..4d765da4e05 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -7,6 +7,7 @@ CONFIG_OMAP54XX=y CONFIG_TARGET_DRA7XX_EVM=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_ARMV7_LPAE=y @@ -49,7 +50,6 @@ CONFIG_OF_SPL_REMOVE_PROPS="clocks clock-names interrupt-parent" # CONFIG_ENV_IS_IN_FAT is not set CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index 470b8286e97..c25d4ce5c14 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -11,6 +11,7 @@ CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000 CONFIG_TARGET_DRA7XX_EVM=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_ARMV7_LPAE=y @@ -52,7 +53,6 @@ CONFIG_OF_SPL_REMOVE_PROPS="clocks clock-names interrupt-parent" # CONFIG_ENV_IS_IN_FAT is not set CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y diff --git a/configs/dra7xx_hs_evm_usb_defconfig b/configs/dra7xx_hs_evm_usb_defconfig index dc918fd9a99..8e74496b2cc 100644 --- a/configs/dra7xx_hs_evm_usb_defconfig +++ b/configs/dra7xx_hs_evm_usb_defconfig @@ -12,6 +12,7 @@ CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000 CONFIG_TARGET_DRA7XX_EVM=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_ARMV7_LPAE=y @@ -51,7 +52,6 @@ CONFIG_SPL_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x9000 CONFIG_OF_SPL_REMOVE_PROPS="clocks clock-names interrupt-parent" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y diff --git a/configs/draco_defconfig b/configs/draco_defconfig index cbed7a3f3b2..1e1ea38a302 100644 --- a/configs/draco_defconfig +++ b/configs/draco_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x2E0000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -61,7 +62,6 @@ CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x2E0000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y diff --git a/configs/edison_defconfig b/configs/edison_defconfig index 58707d619a2..ffb55546345 100644 --- a/configs/edison_defconfig +++ b/configs/edison_defconfig @@ -3,6 +3,7 @@ CONFIG_SYS_TEXT_BASE=0x1101000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x300000 CONFIG_NR_DRAM_BANKS=3 +CONFIG_ENV_OFFSET_REDUND=0x600000 CONFIG_VENDOR_INTEL=y CONFIG_TARGET_EDISON=y CONFIG_SMP=y @@ -30,7 +31,6 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_DEFAULT_DEVICE_TREE="edison" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x600000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_CPU=y CONFIG_DFU_TIMEOUT=y diff --git a/configs/etamin_defconfig b/configs/etamin_defconfig index 5d9dd88204c..424dc949c45 100644 --- a/configs/etamin_defconfig +++ b/configs/etamin_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0xB80000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -62,7 +63,6 @@ CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0xB80000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y diff --git a/configs/gardena-smart-gateway-mt7688-ram_defconfig b/configs/gardena-smart-gateway-mt7688-ram_defconfig index 0704f70e055..dbc94b41063 100644 --- a/configs/gardena-smart-gateway-mt7688-ram_defconfig +++ b/configs/gardena-smart-gateway-mt7688-ram_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0xA0000 CONFIG_SYS_BOOTCOUNT_ADDR=0xb000006c CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y +CONFIG_ENV_OFFSET_REDUND=0xB0000 CONFIG_ARCH_MTMIPS=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y @@ -44,7 +45,6 @@ CONFIG_CMD_UBI=y CONFIG_DEFAULT_DEVICE_TREE="gardena-smart-gateway-mt7688" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0xB0000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y # CONFIG_DM_DEVICE_REMOVE is not set diff --git a/configs/gardena-smart-gateway-mt7688_defconfig b/configs/gardena-smart-gateway-mt7688_defconfig index 99389995a06..23d8ddb128b 100644 --- a/configs/gardena-smart-gateway-mt7688_defconfig +++ b/configs/gardena-smart-gateway-mt7688_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0xA0000 CONFIG_SYS_BOOTCOUNT_ADDR=0xb000006c CONFIG_NR_DRAM_BANKS=1 CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y +CONFIG_ENV_OFFSET_REDUND=0xB0000 CONFIG_ARCH_MTMIPS=y CONFIG_BOOT_ROM=y CONFIG_ONBOARD_DDR2_SIZE_1024MBIT=y @@ -47,7 +48,6 @@ CONFIG_CMD_UBI=y CONFIG_DEFAULT_DEVICE_TREE="gardena-smart-gateway-mt7688" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0xB0000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y # CONFIG_DM_DEVICE_REMOVE is not set diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index 96dd2f26d5b..a978d4e460f 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -48,13 +48,13 @@ CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_DM_BOOTCOUNT_I2C_EEPROM=y -CONFIG_DM_MMC=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_I2C_MUX=y CONFIG_I2C_MUX_PCA954x=y CONFIG_MISC=y CONFIG_I2C_EEPROM=y +CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y @@ -74,13 +74,13 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y -CONFIG_PWM_IMX=y -CONFIG_DM_PWM=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_DA9063=y CONFIG_DM_REGULATOR=y -CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_DA9063=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_PWM=y +CONFIG_PWM_IMX=y CONFIG_DM_RTC=y CONFIG_RTC_RX8010SJ=y # CONFIG_REQUIRE_SERIAL_CONSOLE is not set diff --git a/configs/giedi_defconfig b/configs/giedi_defconfig index 72978dc9b6b..957875f782c 100644 --- a/configs/giedi_defconfig +++ b/configs/giedi_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_NR_DRAM_BANKS=3 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x2000 CONFIG_SPL_TEXT_BASE=0x100000 CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y @@ -56,7 +57,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="imx8-giedi" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x2000 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index f3ae1f03257..3ec8485c9bb 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x18000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0xD1400 CONFIG_CMD_HDMIDETECT=y CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_FIT=y @@ -62,7 +63,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=nand:16m(uboot),1m(env),-(rootfs)" CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0xD1400 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_DWC_AHSATA=y diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index b45d4d6ad32..a3a432de124 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x18000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0xD1400 CONFIG_CMD_HDMIDETECT=y CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_FIT=y @@ -62,7 +63,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=nand:16m(uboot),1m(env),-(rootfs)" CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0xD1400 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_DWC_AHSATA=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index 514800675e0..9d147b0a312 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x18000000 CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x1080000 CONFIG_CMD_HDMIDETECT=y CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_FIT=y @@ -65,7 +66,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=nand:16m(uboot),1m(env),-(rootfs)" CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x1080000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_DWC_AHSATA=y diff --git a/configs/imx28_xea_defconfig b/configs/imx28_xea_defconfig index ef83e4d3ff9..2d49b664dea 100644 --- a/configs/imx28_xea_defconfig +++ b/configs/imx28_xea_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000 CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_TEXT_BASE=0x1000 @@ -69,7 +70,6 @@ CONFIG_ENV_SPI_MAX_HZ=40000000 CONFIG_USE_ENV_SPI_MODE=y CONFIG_ENV_SPI_MODE=0x0 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SPL_DM=y diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index f53f1ede7f5..ef44ed0367b 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_ENV_OFFSET_REDUND=0x6A0000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -67,7 +68,6 @@ CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x6A0000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index b449d9b9971..607e748ef73 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_ENV_OFFSET_REDUND=0x700000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -54,7 +55,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-r5-common-proc-board" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x700000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SPL_DM=y diff --git a/configs/j721e_hs_evm_a72_defconfig b/configs/j721e_hs_evm_a72_defconfig index dd552c5d1a2..f7918773e0d 100644 --- a/configs/j721e_hs_evm_a72_defconfig +++ b/configs/j721e_hs_evm_a72_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_ENV_OFFSET_REDUND=0x700000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -63,7 +64,6 @@ CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x700000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y diff --git a/configs/j721e_hs_evm_r5_defconfig b/configs/j721e_hs_evm_r5_defconfig index 9348be33201..91d1cc8b735 100644 --- a/configs/j721e_hs_evm_r5_defconfig +++ b/configs/j721e_hs_evm_r5_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_ENV_OFFSET_REDUND=0x700000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -52,7 +53,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-r5-common-proc-board" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x700000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SPL_DM=y diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index 29334c41858..5df19efa9b0 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -37,8 +37,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=davinci_nand.0:1024k(bootloader)ro,512k(params CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm" -CONFIG_DTB_RESELECT=y -CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/k2e_hs_evm_defconfig b/configs/k2e_hs_evm_defconfig index 87050ef4894..d4b5a5fddd6 100644 --- a/configs/k2e_hs_evm_defconfig +++ b/configs/k2e_hs_evm_defconfig @@ -29,8 +29,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=davinci_nand.0:1024k(bootloader)ro,512k(params CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm" -CONFIG_DTB_RESELECT=y -CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index 4cd8647d0fc..0635f4a976b 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -37,8 +37,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=davinci_nand.0:1024k(bootloader)ro,512k(params CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm" -CONFIG_DTB_RESELECT=y -CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/k2hk_hs_evm_defconfig b/configs/k2hk_hs_evm_defconfig index bd60aa86a3c..96cab516872 100644 --- a/configs/k2hk_hs_evm_defconfig +++ b/configs/k2hk_hs_evm_defconfig @@ -29,8 +29,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=davinci_nand.0:1024k(bootloader)ro,512k(params CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm" -CONFIG_DTB_RESELECT=y -CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index b564b23dca5..66f778fa0ba 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -37,8 +37,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=davinci_nand.0:1024k(bootloader)ro,512k(params CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="keystone-k2l-evm" -CONFIG_DTB_RESELECT=y -CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig index 2470037f181..d185100f665 100644 --- a/configs/km_kirkwood_128m16_defconfig +++ b/configs/km_kirkwood_128m16_defconfig @@ -7,6 +7,7 @@ CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_BOOTCOUNT_BOOTLIMIT=3 +CONFIG_ENV_OFFSET_REDUND=0x2000 CONFIG_IDENT_STRING="\nKeymile Kirkwood 128M16" CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD_128M16" CONFIG_MISC_INIT_R=y @@ -35,7 +36,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_ENV_IS_IN_EEPROM=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x2000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig index 283b117a28b..a8374d9fc23 100644 --- a/configs/km_kirkwood_defconfig +++ b/configs/km_kirkwood_defconfig @@ -7,6 +7,7 @@ CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_BOOTCOUNT_BOOTLIMIT=3 +CONFIG_ENV_OFFSET_REDUND=0x2000 CONFIG_IDENT_STRING="\nKeymile Kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD" CONFIG_MISC_INIT_R=y @@ -35,7 +36,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_ENV_IS_IN_EEPROM=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x2000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig index 1fa0312d085..7ad69e1639e 100644 --- a/configs/km_kirkwood_pci_defconfig +++ b/configs/km_kirkwood_pci_defconfig @@ -8,6 +8,7 @@ CONFIG_KM_FPGA_CONFIG=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_BOOTCOUNT_BOOTLIMIT=3 +CONFIG_ENV_OFFSET_REDUND=0x2000 CONFIG_IDENT_STRING="\nKeymile Kirkwood PCI" CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD_PCI" CONFIG_MISC_INIT_R=y @@ -36,7 +37,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_ENV_IS_IN_EEPROM=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x2000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y diff --git a/configs/kmcoge4_defconfig b/configs/kmcoge4_defconfig index 6b85928ff6e..55379658e79 100644 --- a/configs/kmcoge4_defconfig +++ b/configs/kmcoge4_defconfig @@ -5,6 +5,7 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0xFB000020 +CONFIG_ENV_OFFSET_REDUND=0x110000 CONFIG_MPC85xx=y CONFIG_TARGET_KMP204X=y # CONFIG_SYS_MALLOC_F is not set @@ -42,7 +43,6 @@ CONFIG_CMD_UBI=y CONFIG_DOS_PARTITION=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x110000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig index f712193b0d8..1775273807a 100644 --- a/configs/kmcoge5un_defconfig +++ b/configs/kmcoge5un_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_BOOTCOUNT_BOOTLIMIT=3 +CONFIG_ENV_OFFSET_REDUND=0xD0000 CONFIG_IDENT_STRING="\nKeymile COGE5UN" CONFIG_SYS_EXTRA_OPTIONS="KM_COGE5UN" CONFIG_MISC_INIT_R=y @@ -39,7 +40,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0xD0000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig index b5167e736ee..3cef72cc860 100644 --- a/configs/kmnusa_defconfig +++ b/configs/kmnusa_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_BOOTCOUNT_BOOTLIMIT=3 +CONFIG_ENV_OFFSET_REDUND=0xD0000 CONFIG_IDENT_STRING="\nKeymile NUSA" CONFIG_SYS_EXTRA_OPTIONS="KM_NUSA" CONFIG_MISC_INIT_R=y @@ -39,7 +40,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0xD0000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y diff --git a/configs/kmsuse2_defconfig b/configs/kmsuse2_defconfig index 442e15ef7b3..e81a8b02fc2 100644 --- a/configs/kmsuse2_defconfig +++ b/configs/kmsuse2_defconfig @@ -12,6 +12,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_BOOTCOUNT_BOOTLIMIT=3 +CONFIG_ENV_OFFSET_REDUND=0xD0000 CONFIG_IDENT_STRING="\nABB SUSE2" CONFIG_SYS_EXTRA_OPTIONS="KM_SUSE2" CONFIG_MISC_INIT_R=y @@ -40,7 +41,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0xD0000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y diff --git a/configs/kp_imx53_defconfig b/configs/kp_imx53_defconfig index 8f3a938a854..f29dec01617 100644 --- a/configs/kp_imx53_defconfig +++ b/configs/kp_imx53_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_KP_IMX53=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_OFFSET_REDUND=0x102000 # CONFIG_CMD_BMODE is not set CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53loco/imximage.cfg" @@ -32,7 +33,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="imx53-kp" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x102000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_DEFAULT_BUS_NUMBER=0x1 diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig index e2eeea3af7b..6bfe9af402b 100644 --- a/configs/kp_imx6q_tpc_defconfig +++ b/configs/kp_imx6q_tpc_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x102000 CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y @@ -46,7 +47,6 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6q-kp" CONFIG_OF_SPL_REMOVE_PROPS="interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents interrupts dmas dma-names" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x102000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_BLOCK_CACHE is not set CONFIG_SPL_CLK_IMX6Q=y diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig index 0a8d9ecea7e..b7c1e6fcd87 100644 --- a/configs/m53menlo_defconfig +++ b/configs/m53menlo_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_BOOTCOUNT_ADDR=0x53FA401C CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y +CONFIG_ENV_OFFSET_REDUND=0x180000 # CONFIG_CMD_BMODE is not set CONFIG_SPL_TEXT_BASE=0x70008000 CONFIG_FIT=y @@ -61,7 +62,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="imx53-m53menlo" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y diff --git a/configs/mscc_jr2_defconfig b/configs/mscc_jr2_defconfig index 0c39a9d30d7..a27eb4b950a 100644 --- a/configs/mscc_jr2_defconfig +++ b/configs/mscc_jr2_defconfig @@ -8,6 +8,7 @@ CONFIG_DM_GPIO=y CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x70100000 CONFIG_DEBUG_UART_CLOCK=250000000 +CONFIG_ENV_OFFSET_REDUND=0x140000 CONFIG_ARCH_MSCC=y CONFIG_SOC_JR2=y CONFIG_SYS_LITTLE_ENDIAN=y @@ -45,7 +46,6 @@ CONFIG_DTB_RESELECT=y CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x140000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_CLK=y diff --git a/configs/mscc_luton_defconfig b/configs/mscc_luton_defconfig index 53ff7a4e319..cd3f1bba52d 100644 --- a/configs/mscc_luton_defconfig +++ b/configs/mscc_luton_defconfig @@ -8,6 +8,7 @@ CONFIG_DM_GPIO=y CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x70100000 CONFIG_DEBUG_UART_CLOCK=208333333 +CONFIG_ENV_OFFSET_REDUND=0x140000 CONFIG_ARCH_MSCC=y CONFIG_SOC_LUTON=y CONFIG_DDRTYPE_MT47H128M8HQ=y @@ -48,7 +49,6 @@ CONFIG_DTB_RESELECT=y CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x140000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_CLK=y diff --git a/configs/mscc_ocelot_defconfig b/configs/mscc_ocelot_defconfig index cbbe1198887..4aa0dd04fd0 100644 --- a/configs/mscc_ocelot_defconfig +++ b/configs/mscc_ocelot_defconfig @@ -8,6 +8,7 @@ CONFIG_DM_GPIO=y CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0x70100000 CONFIG_DEBUG_UART_CLOCK=250000000 +CONFIG_ENV_OFFSET_REDUND=0x140000 CONFIG_ARCH_MSCC=y CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_DEBUG_UART=y @@ -47,7 +48,6 @@ CONFIG_DTB_RESELECT=y CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x140000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_CLK=y diff --git a/configs/mscc_serval_defconfig b/configs/mscc_serval_defconfig index d9035d724ee..606ea5be500 100644 --- a/configs/mscc_serval_defconfig +++ b/configs/mscc_serval_defconfig @@ -5,6 +5,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DM_GPIO=y +CONFIG_ENV_OFFSET_REDUND=0x140000 CONFIG_ARCH_MSCC=y CONFIG_SOC_SERVAL=y CONFIG_DDRTYPE_H5TQ1G63BFA=y @@ -42,7 +43,6 @@ CONFIG_DTB_RESELECT=y CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x140000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_CLK=y diff --git a/configs/mscc_servalt_defconfig b/configs/mscc_servalt_defconfig index 0d7cc3bccc8..c7829923eb6 100644 --- a/configs/mscc_servalt_defconfig +++ b/configs/mscc_servalt_defconfig @@ -5,6 +5,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DM_GPIO=y +CONFIG_ENV_OFFSET_REDUND=0x140000 CONFIG_ARCH_MSCC=y CONFIG_SOC_SERVALT=y CONFIG_SYS_LITTLE_ENDIAN=y @@ -40,7 +41,6 @@ CONFIG_DTB_RESELECT=y CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x140000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_CLK=y diff --git a/configs/mt7622_rfb_defconfig b/configs/mt7622_rfb_defconfig index d8c7ca3d4ff..1ce6ebdfebb 100644 --- a/configs/mt7622_rfb_defconfig +++ b/configs/mt7622_rfb_defconfig @@ -3,7 +3,6 @@ CONFIG_POSITION_INDEPENDENT=y CONFIG_ARCH_MEDIATEK=y CONFIG_SYS_TEXT_BASE=0x41e00000 CONFIG_SYS_MALLOC_F_LEN=0x4000 -CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_FIT=y @@ -15,9 +14,11 @@ CONFIG_SYS_PROMPT="MT7622> " CONFIG_CMD_BOOTMENU=y CONFIG_CMD_MMC=y CONFIG_CMD_SF_TEST=y +CONFIG_CMD_PING=y CONFIG_CMD_SMC=y CONFIG_DEFAULT_DEVICE_TREE="mt7622-rfb" CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_CLK=y @@ -32,18 +33,15 @@ CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y -CONFIG_DM_ETH=y CONFIG_PHY_FIXED=y +CONFIG_DM_ETH=y CONFIG_MEDIATEK_ETH=y -CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_CMD_PING=y CONFIG_PINCTRL=y CONFIG_PINCONF=y CONFIG_PINCTRL_MT7622=y CONFIG_POWER_DOMAIN=y CONFIG_MTK_POWER_DOMAIN=y CONFIG_RAM=y -CONFIG_DM_RESET=y CONFIG_DM_SERIAL=y CONFIG_MTK_SERIAL=y CONFIG_SPI=y diff --git a/configs/mx28evk_nand_defconfig b/configs/mx28evk_nand_defconfig index d7747751380..7522bd0626b 100644 --- a/configs/mx28evk_nand_defconfig +++ b/configs/mx28evk_nand_defconfig @@ -10,6 +10,7 @@ CONFIG_TARGET_MX28EVK=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x380000 CONFIG_SPL_TEXT_BASE=0x00001000 # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -40,7 +41,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:3m(bootloader)ro,512k(environment),5 CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x380000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_MXS_GPIO=y CONFIG_MMC_MXS=y diff --git a/configs/mx31pdk_defconfig b/configs/mx31pdk_defconfig index 9ab4a09ea9c..ac1dac00052 100644 --- a/configs/mx31pdk_defconfig +++ b/configs/mx31pdk_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_OFFSET=0x40000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x60000 CONFIG_SPL_TEXT_BASE=0x87dc0000 # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_NAND_SUPPORT=y @@ -25,7 +26,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_DATE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x60000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_MXC_GPIO=y # CONFIG_MMC is not set diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig index 1876b54ace3..29c918740f6 100644 --- a/configs/mx53ppd_defconfig +++ b/configs/mx53ppd_defconfig @@ -1,9 +1,11 @@ CONFIG_ARM=y CONFIG_ARCH_MX5=y CONFIG_SYS_TEXT_BASE=0x77800000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_TARGET_MX53PPD=y CONFIG_ENV_SIZE=0x2800 CONFIG_ENV_OFFSET=0xC0000 +CONFIG_DM_GPIO=y CONFIG_BOOTCOUNT_BOOTLIMIT=10 CONFIG_NR_DRAM_BANKS=2 CONFIG_FIT=y @@ -22,9 +24,9 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y -CONFIG_CMD_BOOTCOUNT=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y +CONFIG_CMD_BOOTCOUNT=y CONFIG_CMD_CLS=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y @@ -39,7 +41,6 @@ CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_DM_BOOTCOUNT_I2C_EEPROM=y -CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_I2C_MUX=y @@ -57,6 +58,7 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX5=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_PWM=y CONFIG_PWM_IMX=y CONFIG_DM_RTC=y CONFIG_RTC_S35392A=y @@ -68,12 +70,8 @@ CONFIG_SYSRESET_WATCHDOG=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_EHCI_MX5=y +CONFIG_DM_VIDEO=y +CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_IPUV3=y -# CONFIG_VIDEO_SW_CURSOR is not set CONFIG_WATCHDOG_TIMEOUT_MSECS=8000 CONFIG_IMX_WATCHDOG=y -CONFIG_SYS_MALLOC_F_LEN=0x4000 -CONFIG_DM_VIDEO=y -CONFIG_SYS_WHITE_ON_BLACK=y -CONFIG_DM_PWM=y -CONFIG_VIDEO_BPP16=y diff --git a/configs/novena_defconfig b/configs/novena_defconfig index 296e69c3716..87adc1eb4c9 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x84000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_CMD_HDMIDETECT=y @@ -45,7 +46,6 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-novena" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x84000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_DWC_AHSATA=y diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig index d19d9b06754..487f7f305cc 100644 --- a/configs/omap5_uevm_defconfig +++ b/configs/omap5_uevm_defconfig @@ -4,6 +4,7 @@ CONFIG_OMAP54XX=y CONFIG_TARGET_OMAP5_UEVM=y CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC=16296 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_ARMV7_LPAE=y CONFIG_SPL_TEXT_BASE=0x40300000 CONFIG_DISTRO_DEFAULTS=y @@ -25,7 +26,6 @@ CONFIG_CMD_USB=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_SCSI_AHCI=y diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig index 57fe10ed333..8dee24c2cc6 100644 --- a/configs/opos6uldev_defconfig +++ b/configs/opos6uldev_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_SPL_TEXT_BASE=0x00908000 @@ -64,7 +65,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="imx6ul-opos6uldev" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_REGMAP=y diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig index e7e889a4dc8..61928948136 100644 --- a/configs/pcm052_defconfig +++ b/configs/pcm052_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xA0000 CONFIG_DM_GPIO=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_OFFSET_REDUND=0xC0000 CONFIG_TARGET_PCM052=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/phytec/pcm052/imximage.cfg" CONFIG_BOOTDELAY=3 @@ -28,7 +29,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="vf610-pcm052" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0xC0000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_VYBRID_GPIO=y diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig index cd698a3225c..87cac5c3fd7 100644 --- a/configs/pcm058_defconfig +++ b/configs/pcm058_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x110000 CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y @@ -47,7 +48,6 @@ CONFIG_CMD_UBI=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x110000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_FSL_USDHC=y diff --git a/configs/pfla02_defconfig b/configs/pfla02_defconfig index e4a0f6dbcca..50fcbb30ecc 100644 --- a/configs/pfla02_defconfig +++ b/configs/pfla02_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x110000 CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y @@ -47,7 +48,6 @@ CONFIG_CMD_UBI=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x110000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_FSL_USDHC=y diff --git a/configs/platinum_picon_defconfig b/configs/platinum_picon_defconfig index 68459ba119f..216dad85779 100644 --- a/configs/platinum_picon_defconfig +++ b/configs/platinum_picon_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x1080000 CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6DL" @@ -51,7 +52,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:14M(spl),2M(uboot),512k(env1),512k(e CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x1080000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_FSL_USDHC=y CONFIG_MTD=y diff --git a/configs/platinum_titanium_defconfig b/configs/platinum_titanium_defconfig index 08b8fc5c343..a01641f825d 100644 --- a/configs/platinum_titanium_defconfig +++ b/configs/platinum_titanium_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x1080000 CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q" @@ -51,7 +52,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:14M(spl),2M(uboot),512k(env1),512k(e CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x1080000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_FSL_USDHC=y CONFIG_MTD=y diff --git a/configs/pm9g45_defconfig b/configs/pm9g45_defconfig index c6e94b9e4a9..798b618de8e 100644 --- a/configs/pm9g45_defconfig +++ b/configs/pm9g45_defconfig @@ -8,6 +8,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_DEBUG_UART=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 @@ -34,7 +35,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig index 273c71289f1..905e53b6325 100644 --- a/configs/rastaban_defconfig +++ b/configs/rastaban_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x2E0000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -61,7 +62,6 @@ CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x2E0000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index 9ae9b35aaec..659c67a0336 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -14,6 +14,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y +CONFIG_TPL_GPIO_SUPPORT=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y @@ -57,4 +58,3 @@ CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_SPL_TINY_MEMSET=y CONFIG_ERRNO_STR=y -CONFIG_TPL_GPIO_SUPPORT=y diff --git a/configs/sam9x60ek_nandflash_defconfig b/configs/sam9x60ek_nandflash_defconfig index a7a1903059b..7dc4fe7c634 100644 --- a/configs/sam9x60ek_nandflash_defconfig +++ b/configs/sam9x60ek_nandflash_defconfig @@ -8,6 +8,7 @@ CONFIG_NR_DRAM_BANKS=8 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=200000000 +CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_NAND_BOOT=y @@ -36,7 +37,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_CLK=y diff --git a/configs/sama5d2_ptc_ek_nandflash_defconfig b/configs/sama5d2_ptc_ek_nandflash_defconfig index 2c7a9838fff..52908d45d92 100644 --- a/configs/sama5d2_ptc_ek_nandflash_defconfig +++ b/configs/sama5d2_ptc_ek_nandflash_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xf801c000 CONFIG_DEBUG_UART_CLOCK=82000000 +CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y @@ -36,7 +37,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_ptc_ek" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_CLK=y diff --git a/configs/sama5d36ek_cmp_nandflash_defconfig b/configs/sama5d36ek_cmp_nandflash_defconfig index dc0609421da..a736e81eec4 100644 --- a/configs/sama5d36ek_cmp_nandflash_defconfig +++ b/configs/sama5d36ek_cmp_nandflash_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y @@ -34,7 +35,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index bfc639975d6..83ff270e5cf 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL=y CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_ENV_VARS_UBOOT_CONFIG=y @@ -48,7 +49,6 @@ CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained" CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SPL_DM=y diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index fd06a93d985..e39bd49b8c0 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL=y CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 +CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_ENV_VARS_UBOOT_CONFIG=y @@ -46,7 +47,6 @@ CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek" CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig index 88483d11bfb..58f314b4ecb 100644 --- a/configs/sama5d4_xplained_nandflash_defconfig +++ b/configs/sama5d4_xplained_nandflash_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL=y CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_ENV_VARS_UBOOT_CONFIG=y @@ -42,7 +43,6 @@ CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained" CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dma-names dmas" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SPL_DM=y diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig index 7bda22eadac..9fdc36a7ee9 100644 --- a/configs/sama5d4ek_nandflash_defconfig +++ b/configs/sama5d4ek_nandflash_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL=y CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=88000000 +CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_DEBUG_UART=y CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_ENV_VARS_UBOOT_CONFIG=y @@ -44,7 +45,6 @@ CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek" CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dma-names dmas" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SPL_DM=y diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index 941b1fd2c74..d1c94b65a1e 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -30,8 +30,8 @@ CONFIG_CMD_ENV_FLAGS=y CONFIG_LOOPW=y CONFIG_CMD_MD5SUM=y CONFIG_CMD_MEMINFO=y -CONFIG_CMD_MEMTEST=y CONFIG_CMD_MX_CYCLIC=y +CONFIG_CMD_MEMTEST=y CONFIG_CMD_DEMO=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index 7b02b8de7cc..45b5475b79b 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -34,8 +34,8 @@ CONFIG_CMD_ENV_FLAGS=y CONFIG_LOOPW=y CONFIG_CMD_MD5SUM=y CONFIG_CMD_MEMINFO=y -CONFIG_CMD_MEMTEST=y CONFIG_CMD_MX_CYCLIC=y +CONFIG_CMD_MEMTEST=y CONFIG_CMD_BIND=y CONFIG_CMD_DEMO=y CONFIG_CMD_GPIO=y diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig index 0049da3d483..43efefda517 100644 --- a/configs/sandbox_flattree_defconfig +++ b/configs/sandbox_flattree_defconfig @@ -25,8 +25,8 @@ CONFIG_CMD_GREPENV=y CONFIG_LOOPW=y CONFIG_CMD_MD5SUM=y CONFIG_CMD_MEMINFO=y -CONFIG_CMD_MEMTEST=y CONFIG_CMD_MX_CYCLIC=y +CONFIG_CMD_MEMTEST=y CONFIG_CMD_DEMO=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig index f55692c2b55..cb387e744b0 100644 --- a/configs/sandbox_spl_defconfig +++ b/configs/sandbox_spl_defconfig @@ -36,8 +36,8 @@ CONFIG_CMD_ENV_FLAGS=y CONFIG_LOOPW=y CONFIG_CMD_MD5SUM=y CONFIG_CMD_MEMINFO=y -CONFIG_CMD_MEMTEST=y CONFIG_CMD_MX_CYCLIC=y +CONFIG_CMD_MEMTEST=y CONFIG_CMD_DEMO=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y diff --git a/configs/sksimx6_defconfig b/configs/sksimx6_defconfig index 8026c59aa8b..601a29e66f6 100644 --- a/configs/sksimx6_defconfig +++ b/configs/sksimx6_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x64000 CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_DISTRO_DEFAULTS=y @@ -34,7 +35,6 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x64000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_FSL_USDHC=y diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig index 2b40e777c00..8f9a19f695b 100644 --- a/configs/smartweb_defconfig +++ b/configs/smartweb_defconfig @@ -15,6 +15,7 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260" CONFIG_BOOTDELAY=3 @@ -44,7 +45,6 @@ CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9260-smartweb" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_CLK=y CONFIG_CLK_AT91=y diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig new file mode 100644 index 00000000000..230959ec865 --- /dev/null +++ b/configs/socfpga_secu1_defconfig @@ -0,0 +1,84 @@ +CONFIG_ARM=y +CONFIG_ARCH_SOCFPGA=y +CONFIG_SYS_MALLOC_F_LEN=0x800 +CONFIG_ENV_SIZE=0x1000 +CONFIG_ENV_OFFSET=0x100000 +CONFIG_DM_GPIO=y +# CONFIG_SPL_MMC_SUPPORT is not set +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_TARGET_SOCFPGA_ARRIA5_SECU1=y +CONFIG_ENV_OFFSET_REDUND=0x120000 +# CONFIG_SPL_LIBDISK_SUPPORT is not set +# CONFIG_SPL_SPI_SUPPORT is not set +CONFIG_SPL_TEXT_BASE=0xFFFF0000 +CONFIG_DISTRO_DEFAULTS=y +CONFIG_BUILD_TARGET="u-boot-with-nand-spl.sfp" +CONFIG_FIT=y +# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y +CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y +CONFIG_DEFAULT_FDT_FILE="socfpga_arria5_secu1.dtb" +CONFIG_VERSION_VARIABLE=y +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y +# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set +# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is not set +CONFIG_SPL_MTD_SUPPORT=y +CONFIG_CMD_ASKENV=y +CONFIG_CMD_GREPENV=y +CONFIG_CMD_EEPROM=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_NAND_TRIMFFS=y +CONFIG_CMD_SPI=y +CONFIG_CMD_WDT=y +CONFIG_CMD_CACHE=y +CONFIG_MTDIDS_DEFAULT="nand0=denali-nand" +CONFIG_MTDPARTS_DEFAULT="mtdparts=denali-nand:512k(nand.4spl),512k(nand.uboot),128k(nand.env1),128k(nand.env2),0x1000000(nand.rec),0x3ee40000(nand.ubi),0x80000@0x3ff80000(nand.bbt)" +CONFIG_CMD_UBI=y +# CONFIG_CMD_UBIFS is not set +# CONFIG_ISO_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_secu1" +CONFIG_ENV_IS_IN_NAND=y +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_SPL_DM_SEQ_ALIAS=y +# CONFIG_SPL_BLK is not set +CONFIG_DWAPB_GPIO=y +CONFIG_DM_I2C=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_DM_I2C_GPIO=y +CONFIG_MISC=y +CONFIG_I2C_EEPROM=y +CONFIG_SYS_I2C_EEPROM_ADDR=0x50 +CONFIG_SYS_EEPROM_SIZE=1024 +CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 +CONFIG_DM_MMC=y +CONFIG_MMC_DW=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_RAW_NAND=y +CONFIG_SYS_NAND_USE_FLASH_BBT=y +CONFIG_NAND_DENALI_DT=y +CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=2 +CONFIG_SPL_NAND_DENALI=y +# CONFIG_DM_SPI_FLASH is not set +CONFIG_MTD_UBI_FASTMAP=y +CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1 +CONFIG_MV88E6352_SWITCH=y +CONFIG_PHY_FIXED=y +CONFIG_DM_ETH=y +CONFIG_PHY_GIGE=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y +CONFIG_DM_RESET=y +CONFIG_SPI=y +CONFIG_SPI_MEM=y +CONFIG_DESIGNWARE_SPI=y +CONFIG_DESIGNWARE_WATCHDOG=y +CONFIG_WDT=y +# CONFIG_GZIP is not set diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index 1883d1f9ac4..af7c7bc5de5 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0xE0000 CONFIG_DM_GPIO=y CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8 CONFIG_TARGET_SOCFPGA_SR1500=y +CONFIG_ENV_OFFSET_REDUND=0xF0000 CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y @@ -40,7 +41,6 @@ CONFIG_CMD_UBI=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0xF0000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_BOOTCOUNT_LIMIT=y diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index 0dcae8199a4..47fb5a89f5b 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -5,6 +5,7 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DM_GPIO=y CONFIG_TARGET_SOCFPGA_SOFTING_VINING_FPGA=y +CONFIG_ENV_OFFSET_REDUND=0x110000 CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y @@ -45,7 +46,6 @@ CONFIG_CMD_UBI=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_vining_fpga" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x110000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index f6913068007..6d82365348b 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x280000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL=y CONFIG_TARGET_ST_STM32MP15x=y +CONFIG_ENV_OFFSET_REDUND=0x2C0000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y # CONFIG_ARMV7_VIRT is not set @@ -61,7 +62,6 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_EXT4_INTERFACE="mmc" CONFIG_ENV_EXT4_DEVICE_AND_PART="0:auto" CONFIG_ENV_EXT4_FILE="/uboot.env" -CONFIG_ENV_OFFSET_REDUND=0x2C0000 CONFIG_ENV_UBI_PART="UBI" CONFIG_ENV_UBI_VOLUME="uboot_config" CONFIG_ENV_UBI_VOLUME_REDUND="uboot_config_r" diff --git a/configs/stm32mp15_optee_defconfig b/configs/stm32mp15_optee_defconfig index 521b24e2cb4..298611776d1 100644 --- a/configs/stm32mp15_optee_defconfig +++ b/configs/stm32mp15_optee_defconfig @@ -5,6 +5,7 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x280000 CONFIG_TARGET_ST_STM32MP15x=y CONFIG_STM32MP1_OPTEE=y +CONFIG_ENV_OFFSET_REDUND=0x2C0000 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" @@ -48,7 +49,6 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_EXT4_INTERFACE="mmc" CONFIG_ENV_EXT4_DEVICE_AND_PART="0:auto" CONFIG_ENV_EXT4_FILE="/uboot.env" -CONFIG_ENV_OFFSET_REDUND=0x2C0000 CONFIG_ENV_UBI_PART="UBI" CONFIG_ENV_UBI_VOLUME="uboot_config" CONFIG_ENV_UBI_VOLUME_REDUND="uboot_config_r" diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index c8b328d01af..6928e9a65c1 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_OFFSET=0x280000 CONFIG_TARGET_ST_STM32MP15x=y +CONFIG_ENV_OFFSET_REDUND=0x2C0000 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" @@ -47,7 +48,6 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_EXT4_INTERFACE="mmc" CONFIG_ENV_EXT4_DEVICE_AND_PART="0:auto" CONFIG_ENV_EXT4_FILE="/uboot.env" -CONFIG_ENV_OFFSET_REDUND=0x2C0000 CONFIG_ENV_UBI_PART="UBI" CONFIG_ENV_UBI_VOLUME="uboot_config" CONFIG_ENV_UBI_VOLUME_REDUND="uboot_config_r" diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig index eaeed449c60..0399132230a 100644 --- a/configs/taurus_defconfig +++ b/configs/taurus_defconfig @@ -20,6 +20,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=18432000 +CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEBUG_UART=y @@ -59,7 +60,6 @@ CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus" CONFIG_SPL_OF_PLATDATA=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_DM=y CONFIG_BLK=y diff --git a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig index c12b569ed06..5710ad520a9 100644 --- a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig +++ b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig @@ -4,6 +4,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x6EC000 CONFIG_NR_DRAM_BANKS=8 +CONFIG_ENV_OFFSET_REDUND=0x6EE000 CONFIG_VENDOR_CONGATEC=y CONFIG_TARGET_THEADORABLE_X86_CONGA_QA3_E3845=y CONFIG_INTERNAL_UART=y @@ -48,7 +49,6 @@ CONFIG_AMIGA_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845" CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x6EE000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/theadorable-x86-conga-qa3-e3845_defconfig b/configs/theadorable-x86-conga-qa3-e3845_defconfig index 49ab1d39fe3..a69b9076b68 100644 --- a/configs/theadorable-x86-conga-qa3-e3845_defconfig +++ b/configs/theadorable-x86-conga-qa3-e3845_defconfig @@ -4,6 +4,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x6EC000 CONFIG_NR_DRAM_BANKS=8 +CONFIG_ENV_OFFSET_REDUND=0x6EE000 CONFIG_VENDOR_CONGATEC=y CONFIG_TARGET_THEADORABLE_X86_CONGA_QA3_E3845=y CONFIG_INTERNAL_UART=y @@ -47,7 +48,6 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845" CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x6EE000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/theadorable-x86-dfi-bt700_defconfig b/configs/theadorable-x86-dfi-bt700_defconfig index 2e751be0da3..3f63bdeb1c8 100644 --- a/configs/theadorable-x86-dfi-bt700_defconfig +++ b/configs/theadorable-x86-dfi-bt700_defconfig @@ -4,6 +4,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_ENV_OFFSET=0x6EC000 CONFIG_NR_DRAM_BANKS=8 +CONFIG_ENV_OFFSET_REDUND=0x6EE000 CONFIG_VENDOR_DFI=y CONFIG_TARGET_THEADORABLE_X86_DFI_BT700=y CONFIG_SMP=y @@ -45,7 +46,6 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_DEFAULT_DEVICE_TREE="theadorable-x86-dfi-bt700" CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x6EE000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig index 0d813999dd5..447491f9a6e 100644 --- a/configs/thuban_defconfig +++ b/configs/thuban_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x2E0000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -61,7 +62,6 @@ CONFIG_OF_EMBED=y CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x2E0000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig index 6bbb83782f7..17aa6a02067 100644 --- a/configs/ti816x_evm_defconfig +++ b/configs/ti816x_evm_defconfig @@ -11,6 +11,7 @@ CONFIG_TARGET_TI816X_EVM=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x1E0000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_TEXT_BASE=0x40400000 @@ -42,7 +43,6 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="dm8168-evm" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x1E0000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_DM_I2C=y diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig index be636c05ea7..50820ba08ea 100644 --- a/configs/tinker-rk3288_defconfig +++ b/configs/tinker-rk3288_defconfig @@ -14,7 +14,6 @@ CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y CONFIG_SILENT_CONSOLE=y -CONFIG_CONSOLE_MUX=y CONFIG_DEFAULT_FDT_FILE="rk3288-tinker.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_STACK_R=y @@ -81,11 +80,9 @@ CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_SMSC95XX=y -CONFIG_CMD_DHRYSTONE=y -CONFIG_ERRNO_STR=y CONFIG_DM_VIDEO=y -CONFIG_VIDEO_BPP16=y -CONFIG_VIDEO_BPP32=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y +CONFIG_CMD_DHRYSTONE=y +CONFIG_ERRNO_STR=y diff --git a/configs/titanium_defconfig b/configs/titanium_defconfig index 4f0e50017d1..d1235445f79 100644 --- a/configs/titanium_defconfig +++ b/configs/titanium_defconfig @@ -5,6 +5,7 @@ CONFIG_TARGET_TITANIUM=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x1000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_OFFSET_REDUND=0x1080000 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/barco/titanium/imximage.cfg" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y @@ -37,7 +38,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:16M(uboot),512k(env1),512k(env2),-(u CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x1080000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_FSL_USDHC=y CONFIG_MTD=y diff --git a/configs/tqma6dl_mba6_spi_defconfig b/configs/tqma6dl_mba6_spi_defconfig index c4a45cb3b38..e21b4219775 100644 --- a/configs/tqma6dl_mba6_spi_defconfig +++ b/configs/tqma6dl_mba6_spi_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_TQMA6DL=y CONFIG_TQMA6X_SPI_BOOT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -36,7 +37,6 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_FSL_USDHC=y CONFIG_SPI_FLASH=y diff --git a/configs/tqma6q_mba6_spi_defconfig b/configs/tqma6q_mba6_spi_defconfig index 2dc751aa710..648bc64cbd0 100644 --- a/configs/tqma6q_mba6_spi_defconfig +++ b/configs/tqma6q_mba6_spi_defconfig @@ -7,6 +7,7 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_ENV_OFFSET=0x80000 CONFIG_TQMA6X_SPI_BOOT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -35,7 +36,6 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_FSL_USDHC=y CONFIG_SPI_FLASH=y diff --git a/configs/tqma6s_mba6_spi_defconfig b/configs/tqma6s_mba6_spi_defconfig index 9c65ad35a64..bfe04259911 100644 --- a/configs/tqma6s_mba6_spi_defconfig +++ b/configs/tqma6s_mba6_spi_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_TQMA6S=y CONFIG_TQMA6X_SPI_BOOT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -36,7 +37,6 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_FSL_USDHC=y CONFIG_SPI_FLASH=y diff --git a/configs/tricorder_defconfig b/configs/tricorder_defconfig index bd6cbdcbf81..cd731b90515 100644 --- a/configs/tricorder_defconfig +++ b/configs/tricorder_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x120000 CONFIG_TARGET_TRICORDER=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x2A0000 CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_BOOTDELAY=0 CONFIG_SILENT_CONSOLE=y @@ -27,7 +28,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:128k(SPL),1m(u-boot),384k(u-boot- CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x2A0000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set CONFIG_LED_STATUS=y diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig index d8ce1980df5..4514468abf8 100644 --- a/configs/uniphier_v8_defconfig +++ b/configs/uniphier_v8_defconfig @@ -39,10 +39,10 @@ CONFIG_I2C_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_MMC_HS200_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y CONFIG_MMC_UNIPHIER=y CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ADMA=y CONFIG_MMC_SDHCI_CADENCE=y CONFIG_MTD=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig index 3a7aa8de82b..a964e3ccfdc 100644 --- a/configs/verdin-imx8mm_defconfig +++ b/configs/verdin-imx8mm_defconfig @@ -26,9 +26,9 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/toradex/verdin-imx8mm/imximage.cfg" -CONFIG_DEFAULT_FDT_FILE="fsl-imx8mm-verdin-dev.dtb" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_LOG=y +CONFIG_DEFAULT_FDT_FILE="fsl-imx8mm-verdin-dev.dtb" CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_LATE_INIT=y # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig index 1a58d4c201f..bcab7fb83d6 100644 --- a/configs/vining_2000_defconfig +++ b/configs/vining_2000_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_SPL_TEXT_BASE=0x00908000 @@ -55,7 +56,6 @@ CONFIG_EFI_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="imx6sx-softing-vining-2000" CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x90000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_MMC=y diff --git a/configs/wb45n_defconfig b/configs/wb45n_defconfig index 2538f47f2c4..fbb039dec9d 100644 --- a/configs/wb45n_defconfig +++ b/configs/wb45n_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_OFFSET=0xA0000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0xC0000 CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_NANDFLASH" @@ -29,7 +30,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_MTDPARTS=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0xC0000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/wb50n_defconfig b/configs/wb50n_defconfig index e18f2973980..25a6edd1d87 100644 --- a/configs/wb50n_defconfig +++ b/configs/wb50n_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_OFFSET=0xA0000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0xC0000 CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH" @@ -28,7 +29,6 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0xC0000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_MTD=y diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig index 26984d3c24f..3de8ebbcc77 100644 --- a/configs/work_92105_defconfig +++ b/configs/work_92105_defconfig @@ -14,6 +14,7 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL=y +CONFIG_ENV_OFFSET_REDUND=0x120000 CONFIG_SPL_TEXT_BASE=0x00000000 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -39,7 +40,6 @@ CONFIG_CMD_DATE=y CONFIG_DOS_PARTITION=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x120000 # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index ece619f239b..ece619f239b 100644 --- a/configs/zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig diff --git a/configs/zynq_zybo_z7_defconfig b/configs/zynq_zybo_z7_defconfig index 12e1367e972..1dee7570628 100644 --- a/configs/zynq_zybo_z7_defconfig +++ b/configs/zynq_zybo_z7_defconfig @@ -6,7 +6,7 @@ CONFIG_DM_GPIO=y CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xe0001000 -CONFIG_DEBUG_UART_CLOCK=50000000 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_CUSTOM_LDSCRIPT=y diff --git a/doc/README.drivers.eth b/doc/README.drivers.eth deleted file mode 100644 index 1a9a23b51b9..00000000000 --- a/doc/README.drivers.eth +++ /dev/null @@ -1,215 +0,0 @@ -!!! WARNING !!! - -This guide describes to the old way of doing things. No new Ethernet drivers -should be implemented this way. All new drivers should be written against the -U-Boot core driver model. See doc/driver-model/README.txt - ------------------------ - Ethernet Driver Guide ------------------------ - -The networking stack in Das U-Boot is designed for multiple network devices -to be easily added and controlled at runtime. This guide is meant for people -who wish to review the net driver stack with an eye towards implementing your -own ethernet device driver. Here we will describe a new pseudo 'APE' driver. - ------------------- - Driver Functions ------------------- - -All functions you will be implementing in this document have the return value -meaning of 0 for success and non-zero for failure. - - ---------- - Register - ---------- - -When U-Boot initializes, it will call the common function eth_initialize(). -This will in turn call the board-specific board_eth_init() (or if that fails, -the cpu-specific cpu_eth_init()). These board-specific functions can do random -system handling, but ultimately they will call the driver-specific register -function which in turn takes care of initializing that particular instance. - -Keep in mind that you should code the driver to avoid storing state in global -data as someone might want to hook up two of the same devices to one board. -Any such information that is specific to an interface should be stored in a -private, driver-defined data structure and pointed to by eth->priv (see below). - -So the call graph at this stage would look something like: -board_init() - eth_initialize() - board_eth_init() / cpu_eth_init() - driver_register() - initialize eth_device - eth_register() - -At this point in time, the only thing you need to worry about is the driver's -register function. The pseudo code would look something like: -int ape_register(bd_t *bis, int iobase) -{ - struct ape_priv *priv; - struct eth_device *dev; - struct mii_dev *bus; - - priv = malloc(sizeof(*priv)); - if (priv == NULL) - return -ENOMEM; - - dev = malloc(sizeof(*dev)); - if (dev == NULL) { - free(priv); - return -ENOMEM; - } - - /* setup whatever private state you need */ - - memset(dev, 0, sizeof(*dev)); - sprintf(dev->name, "APE"); - - /* - * if your device has dedicated hardware storage for the - * MAC, read it and initialize dev->enetaddr with it - */ - ape_mac_read(dev->enetaddr); - - dev->iobase = iobase; - dev->priv = priv; - dev->init = ape_init; - dev->halt = ape_halt; - dev->send = ape_send; - dev->recv = ape_recv; - dev->write_hwaddr = ape_write_hwaddr; - - eth_register(dev); - -#ifdef CONFIG_PHYLIB - bus = mdio_alloc(); - if (!bus) { - free(priv); - free(dev); - return -ENOMEM; - } - - bus->read = ape_mii_read; - bus->write = ape_mii_write; - mdio_register(bus); -#endif - - return 1; -} - -The exact arguments needed to initialize your device are up to you. If you -need to pass more/less arguments, that's fine. You should also add the -prototype for your new register function to include/netdev.h. - -The return value for this function should be as follows: -< 0 - failure (hardware failure, not probe failure) ->=0 - number of interfaces detected - -You might notice that many drivers seem to use xxx_initialize() rather than -xxx_register(). This is the old naming convention and should be avoided as it -causes confusion with the driver-specific init function. - -Other than locating the MAC address in dedicated hardware storage, you should -not touch the hardware in anyway. That step is handled in the driver-specific -init function. Remember that we are only registering the device here, we are -not checking its state or doing random probing. - - ----------- - Callbacks - ----------- - -Now that we've registered with the ethernet layer, we can start getting some -real work done. You will need five functions: - int ape_init(struct eth_device *dev, bd_t *bis); - int ape_send(struct eth_device *dev, volatile void *packet, int length); - int ape_recv(struct eth_device *dev); - int ape_halt(struct eth_device *dev); - int ape_write_hwaddr(struct eth_device *dev); - -The init function checks the hardware (probing/identifying) and gets it ready -for send/recv operations. You often do things here such as resetting the MAC -and/or PHY, and waiting for the link to autonegotiate. You should also take -the opportunity to program the device's MAC address with the dev->enetaddr -member. This allows the rest of U-Boot to dynamically change the MAC address -and have the new settings be respected. - -The send function does what you think -- transmit the specified packet whose -size is specified by length (in bytes). You should not return until the -transmission is complete, and you should leave the state such that the send -function can be called multiple times in a row. - -The recv function should process packets as long as the hardware has them -readily available before returning. i.e. you should drain the hardware fifo. -For each packet you receive, you should call the net_process_received_packet() function on it -along with the packet length. The common code sets up packet buffers for you -already in the .bss (net_rx_packets), so there should be no need to allocate your -own. This doesn't mean you must use the net_rx_packets array however; you're -free to call the net_process_received_packet() function with any buffer you wish. So the pseudo -code here would look something like: -int ape_recv(struct eth_device *dev) -{ - int length, i = 0; - ... - while (packets_are_available()) { - ... - length = ape_get_packet(&net_rx_packets[i]); - ... - net_process_received_packet(&net_rx_packets[i], length); - ... - if (++i >= PKTBUFSRX) - i = 0; - ... - } - ... - return 0; -} - -The halt function should turn off / disable the hardware and place it back in -its reset state. It can be called at any time (before any call to the related -init function), so make sure it can handle this sort of thing. - -The write_hwaddr function should program the MAC address stored in dev->enetaddr -into the Ethernet controller. - -So the call graph at this stage would look something like: -some net operation (ping / tftp / whatever...) - eth_init() - dev->init() - eth_send() - dev->send() - eth_rx() - dev->recv() - eth_halt() - dev->halt() - --------------------------------- - CONFIG_PHYLIB / CONFIG_CMD_MII --------------------------------- - -If your device supports banging arbitrary values on the MII bus (pretty much -every device does), you should add support for the mii command. Doing so is -fairly trivial and makes debugging mii issues a lot easier at runtime. - -After you have called eth_register() in your driver's register function, add -a call to mdio_alloc() and mdio_register() like so: - bus = mdio_alloc(); - if (!bus) { - free(priv); - free(dev); - return -ENOMEM; - } - - bus->read = ape_mii_read; - bus->write = ape_mii_write; - mdio_register(bus); - -And then define the mii_read and mii_write functions if you haven't already. -Their syntax is straightforward: - int mii_read(struct mii_dev *bus, int addr, int devad, int reg); - int mii_write(struct mii_dev *bus, int addr, int devad, int reg, - u16 val); - -The read function should read the register 'reg' from the phy at address 'addr' -and return the result to its caller. The implementation for the write function -should logically follow. diff --git a/doc/api/efi.rst b/doc/api/efi.rst index bc593826082..631c0ceb1df 100644 --- a/doc/api/efi.rst +++ b/doc/api/efi.rst @@ -125,6 +125,15 @@ Graphical output protocol .. kernel-doc:: lib/efi_loader/efi_gop.c :internal: +Load file 2 protocol +~~~~~~~~~~~~~~~~~~~~ + +The load file 2 protocol can be used by the Linux kernel to load the initial +RAM disk. U-Boot can be configured to provide an implementation. + +.. kernel-doc:: lib/efi_loader/efi_load_initrd.c + :internal: + Network protocols ~~~~~~~~~~~~~~~~~ diff --git a/doc/board/google/chromebook_coral.rst b/doc/board/google/chromebook_coral.rst index d10e0c49544..40bd9397d42 100644 --- a/doc/board/google/chromebook_coral.rst +++ b/doc/board/google/chromebook_coral.rst @@ -179,7 +179,7 @@ Partial memory map ffffffff Top of ROM (and last byte of 32-bit address space) ffff8000 TPL loaded here (from IFWI) ff000000 Bottom of ROM - fefc000 Top of CAR region + fefc0000 Top of CAR region fef96000 Stack for FSP-M fef40000 59000 FSP-M fef11000 SPL loaded here diff --git a/doc/board/index.rst b/doc/board/index.rst index b8b956d730d..51a2ae6f28d 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -16,4 +16,6 @@ Board-specific doc renesas/index rockchip/index sifive/index + st/index + toradex/index xilinx/index diff --git a/doc/board/st/index.rst b/doc/board/st/index.rst new file mode 100644 index 00000000000..91f1d51b42b --- /dev/null +++ b/doc/board/st/index.rst @@ -0,0 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +STMicroelectronics +================== + +.. toctree:: + :maxdepth: 2 + + stm32mp1 diff --git a/doc/board/st/stm32mp1.rst b/doc/board/st/stm32mp1.rst new file mode 100644 index 00000000000..1640bf910ec --- /dev/null +++ b/doc/board/st/stm32mp1.rst @@ -0,0 +1,611 @@ +.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +.. sectionauthor:: Patrick Delaunay <patrick.delaunay@st.com> + +STM32MP15x boards +================= + +This is a quick instruction for setup STM32MP15x boards. + +Supported devices +----------------- + +U-Boot supports STMP32MP15x SoCs: + + - STM32MP157 + - STM32MP153 + - STM32MP151 + +The STM32MP15x is a Cortex-A MPU aimed at various applications. + +It features: + + - Dual core Cortex-A7 application core (Single on STM32MP151) + - 2D/3D image composition with GPU (only on STM32MP157) + - Standard memories interface support + - Standard connectivity, widely inherited from the STM32 MCU family + - Comprehensive security support + +Everything is supported in Linux but U-Boot is limited to: + + 1. UART + 2. SD card/MMC controller (SDMMC) + 3. NAND controller (FMC) + 4. NOR controller (QSPI) + 5. USB controller (OTG DWC2) + 6. Ethernet controller + +And the necessary drivers + + 1. I2C + 2. STPMIC1 (PMIC and regulator) + 3. Clock, Reset, Sysreset + 4. Fuse + +Currently the following boards are supported: + + + stm32mp157a-avenger96.dts + + stm32mp157a-dk1.dts + + stm32mp157c-dk2.dts + + stm32mp157c-ed1.dts + + stm32mp157c-ev1.dts + +Boot Sequences +-------------- + +3 boot configurations are supported with: + ++----------+------------------------+-------------------------+--------------+ +| **ROM** | **FSBL** | **SSBL** | **OS** | ++ **code** +------------------------+-------------------------+--------------+ +| | First Stage Bootloader | Second Stage Bootloader | Linux Kernel | ++ +------------------------+-------------------------+--------------+ +| | embedded RAM | DDR | ++----------+------------------------+-------------------------+--------------+ + +The **Trusted** boot chain +`````````````````````````` + +defconfig_file : stm32mp15_trusted_defconfig + + +-------------+-------------------------+------------+-------+ + | ROM code | FSBL | SSBL | OS | + + +-------------------------+------------+-------+ + | |Trusted Firmware-A (TF-A)| U-Boot | Linux | + +-------------+-------------------------+------------+-------+ + | TrustZone |TF-A secure monitor | + +-------------+-------------------------+------------+-------+ + +TF-A performs a full initialization of Secure peripherals and installs a +secure monitor (BL32=SPMin). + +U-Boot is running in normal world and uses TF-A monitor to access +to secure resources. + +The **Trusted** boot chain with **OP-TEE** +`````````````````````````````````````````` + +defconfig_file : stm32mp15_optee_defconfig + + +-------------+-------------------------+------------+-------+ + | ROM code | FSBL | SSBL | OS | + + +-------------------------+------------+-------+ + | |Trusted Firmware-A (TF-A)| U-Boot | Linux | + +-------------+-------------------------+------------+-------+ + | TrustZone |OP-TEE | + +-------------+-------------------------+------------+-------+ + +TF-A performs a full initialization of Secure peripherals and installs OP-TEE +from specific partitions (teeh, teed, teex). + +U-Boot is running in normal world and uses OP-TEE monitor to access +to secure resources. + +The **Basic** boot chain +```````````````````````` + +defconfig_file : stm32mp15_basic_defconfig + + +-------------+------------+------------+-------+ + | ROM code | FSBL | SSBL | OS | + + +------------+------------+-------+ + | |U-Boot SPL | U-Boot | Linux | + +-------------+------------+------------+-------+ + | TrustZone | | PSCI from U-Boot | + +-------------+------------+------------+-------+ + +SPL has limited security initialization + +U-Boot is running in secure mode and provide a secure monitor to the kernel +with only PSCI support (Power State Coordination Interface defined by ARM). + +All the STM32MP15x boards supported by U-Boot use the same generic board +stm32mp1 which support all the bootable devices. + +Each board is configured only with the associated device tree. + +Device Tree Selection +--------------------- + +You need to select the appropriate device tree for your board, +the supported device trees for STM32MP15x are: + ++ ev1: eval board with pmic stpmic1 (ev1 = mother board + daughter ed1) + + + stm32mp157c-ev1 + ++ ed1: daughter board with pmic stpmic1 + + + stm32mp157c-ed1 + ++ dk1: Discovery board + + + stm32mp157a-dk1 + ++ dk2: Discovery board = dk1 with a BT/WiFI combo and a DSI panel + + + stm32mp157c-dk2 + ++ avenger96: Avenger96 board from Arrow Electronics + + + stm32mp157a-avenger96 + +Build Procedure +--------------- + +1. Install the required tools for U-Boot + + * install package needed in U-Boot makefile + (libssl-dev, swig, libpython-dev...) + + * install ARMv7 toolchain for 32bit Cortex-A (from Linaro, + from SDK for STM32MP15x, or any crosstoolchains from your distribution) + (you can use any gcc cross compiler compatible with U-Boot) + +2. Set the cross compiler:: + + # export CROSS_COMPILE=/path/to/toolchain/arm-linux-gnueabi- + +3. Select the output directory (optional):: + + # export KBUILD_OUTPUT=/path/to/output + + for example: use one output directory for each configuration:: + + # export KBUILD_OUTPUT=stm32mp15_trusted + # export KBUILD_OUTPUT=stm32mp15_optee + # export KBUILD_OUTPUT=stm32mp15_basic + + you can build outside of code directory:: + + # export KBUILD_OUTPUT=../build/stm32mp15_trusted + +4. Configure U-Boot:: + + # make <defconfig_file> + + with <defconfig_file>: + + - For **trusted** boot mode : **stm32mp15_trusted_defconfig** + - For **trusted** with OP-TEE boot mode : **stm32mp15_optee_defconfig** + - For basic boot mode: stm32mp15_basic_defconfig + +5. Configure the device-tree and build the U-Boot image:: + + # make DEVICE_TREE=<name> all + + Examples: + + a) trusted boot on ev1:: + + # export KBUILD_OUTPUT=stm32mp15_trusted + # make stm32mp15_trusted_defconfig + # make DEVICE_TREE=stm32mp157c-ev1 all + + b) trusted with OP-TEE boot on dk2:: + + # export KBUILD_OUTPUT=stm32mp15_optee + # make stm32mp15_optee_defconfig + # make DEVICE_TREE=stm32mp157c-dk2 all + + c) basic boot on ev1:: + + # export KBUILD_OUTPUT=stm32mp15_basic + # make stm32mp15_basic_defconfig + # make DEVICE_TREE=stm32mp157c-ev1 all + + d) basic boot on ed1:: + + # export KBUILD_OUTPUT=stm32mp15_basic + # make stm32mp15_basic_defconfig + # make DEVICE_TREE=stm32mp157c-ed1 all + + e) basic boot on dk1:: + + # export KBUILD_OUTPUT=stm32mp15_basic + # make stm32mp15_basic_defconfig + # make DEVICE_TREE=stm32mp157a-dk1 all + + f) basic boot on avenger96:: + + # export KBUILD_OUTPUT=stm32mp15_basic + # make stm32mp15_basic_defconfig + # make DEVICE_TREE=stm32mp157a-avenger96 all + +6. Output files + + BootRom and TF-A expect binaries with STM32 image header + SPL expects file with U-Boot uImage header + + So in the output directory (selected by KBUILD_OUTPUT), + you can found the needed files: + + - For **Trusted** boot (with or without OP-TEE) + + - FSBL = **tf-a.stm32** (provided by TF-A compilation) + - SSBL = **u-boot.stm32** + + - For Basic boot + + - FSBL = spl/u-boot-spl.stm32 + - SSBL = u-boot.img + +Switch Setting for Boot Mode +---------------------------- + +You can select the boot mode, on the board with one switch, to select +the boot pin values = BOOT0, BOOT1, BOOT2 + + +-------------+---------+---------+---------+ + |*Boot Mode* | *BOOT2* | *BOOT1* | *BOOT0* | + +=============+=========+=========+=========+ + | Recovery | 0 | 0 | 0 | + +-------------+---------+---------+---------+ + | NOR | 0 | 0 | 1 | + +-------------+---------+---------+---------+ + | eMMC | 0 | 1 | 0 | + +-------------+---------+---------+---------+ + | NAND | 0 | 1 | 1 | + +-------------+---------+---------+---------+ + | Reserved | 1 | 0 | 0 | + +-------------+---------+---------+---------+ + | SD-Card | 1 | 0 | 1 | + +-------------+---------+---------+---------+ + | Recovery | 1 | 1 | 0 | + +-------------+---------+---------+---------+ + | SPI-NAND | 1 | 1 | 1 | + +-------------+---------+---------+---------+ + +- on the **daugther board ed1 = MB1263** with the switch SW1 +- on **Avenger96** with switch S3 (NOR and SPI-NAND are not applicable) +- on board **DK1/DK2** with the switch SW1 = BOOT0, BOOT2 + with only 2 pins available (BOOT1 is forced to 0 and NOR not supported), + the possible value becomes: + + +-------------+---------+---------+ + |*Boot Mode* | *BOOT2* | *BOOT0* | + +=============+=========+=========+ + | Recovery | 0 | 0 | + +-------------+---------+---------+ + | NOR (NA)| 0 | 1 | + +-------------+---------+---------+ + | Reserved | 1 | 0 | + +-------------+---------+---------+ + | SD-Card | 1 | 1 | + +-------------+---------+---------+ + +Recovery is a boot from serial link (UART/USB) and it is used with +STM32CubeProgrammer tool to load executable in RAM and to update the flash +devices available on the board (NOR/NAND/eMMC/SD card). + +The communication between HOST and board is based on + + - for UARTs : the uart protocol used with all MCU STM32 + - for USB : based on USB DFU 1.1 (without the ST extensions used on MCU STM32) + +Prepare an SD card +------------------ + +The minimal requirements for STMP32MP15x boot up to U-Boot are: + +- GPT partitioning (with gdisk or with sgdisk) +- 2 fsbl partitions, named fsbl1 and fsbl2, size at least 256KiB +- one ssbl partition for U-Boot + +Then the minimal GPT partition is: + + +-------+--------+---------+-------------+ + | *Num* | *Name* | *Size* | *Content* | + +=======+========+=========+=============+ + | 1 | fsbl1 | 256 KiB | TF-A or SPL | + +-------+--------+---------+-------------+ + | 2 | fsbl2 | 256 KiB | TF-A or SPL | + +-------+--------+---------+-------------+ + | 3 | ssbl | enought | U-Boot | + +-------+--------+---------+-------------+ + | 4 | <any> | <any> | Rootfs | + +-------+--------+---------+-------------+ + +Add a 4th partition (Rootfs) marked bootable with a file extlinux.conf +following the Generic Distribution feature (doc/README.distro for use). + +According the used card reader select the correct block device +(for example /dev/sdx or /dev/mmcblk0). + +In the next example, it is /dev/mmcblk0 + +For example: with gpt table with 128 entries + +a) remove previous formatting:: + + # sgdisk -o /dev/<SD card dev> + +b) create minimal image:: + + # sgdisk --resize-table=128 -a 1 \ + -n 1:34:545 -c 1:fsbl1 \ + -n 2:546:1057 -c 2:fsbl2 \ + -n 3:1058:5153 -c 3:ssbl \ + -n 4:5154: -c 4:rootfs \ + -p /dev/<SD card dev> + + With other partition for kernel one partition rootfs for kernel. + +c) copy the FSBL (2 times) and SSBL file on the correct partition. + in this example in partition 1 to 3 + + for basic boot mode : <SD card dev> = /dev/mmcblk0:: + + # dd if=u-boot-spl.stm32 of=/dev/mmcblk0p1 + # dd if=u-boot-spl.stm32 of=/dev/mmcblk0p2 + # dd if=u-boot.img of=/dev/mmcblk0p3 + + for trusted boot mode: :: + + # dd if=tf-a.stm32 of=/dev/mmcblk0p1 + # dd if=tf-a.stm32 of=/dev/mmcblk0p2 + # dd if=u-boot.stm32 of=/dev/mmcblk0p3 + +To boot from SD card, select BootPinMode = 1 0 1 and reset. + +Prepare eMMC +------------ + +You can use U-Boot to copy binary in eMMC. + +In the next example, you need to boot from SD card and the images +(u-boot-spl.stm32, u-boot.img) are presents on SD card (mmc 0) +in ext4 partition 4 (bootfs). + +To boot from SD card, select BootPinMode = 1 0 1 and reset. + +Then you update the eMMC with the next U-Boot command : + +a) prepare GPT on eMMC, + example with 2 partitions, bootfs and roots:: + + # setenv emmc_part "name=ssbl,size=2MiB;name=bootfs,type=linux,bootable,size=64MiB;name=rootfs,type=linux,size=512" + # gpt write mmc 1 ${emmc_part} + +b) copy SPL on eMMC on firts boot partition + (SPL max size is 256kB, with LBA 512, 0x200):: + + # ext4load mmc 0:4 0xC0000000 u-boot-spl.stm32 + # mmc dev 1 + # mmc partconf 1 1 1 1 + # mmc write ${fileaddr} 0 200 + # mmc partconf 1 1 1 0 + +c) copy U-Boot in first GPT partition of eMMC:: + + # ext4load mmc 0:4 0xC0000000 u-boo t.img + # mmc dev 1 + # part start mmc 1 1 partstart + # mmc write ${fileaddr} ${partstart} ${filesize} + +To boot from eMMC, select BootPinMode = 0 1 0 and reset. + +MAC Address +----------- + +Please read doc/README.enetaddr for the implementation guidelines for mac id +usage. Basically, environment has precedence over board specific storage. + +For STMicroelectonics board, it is retrieved in STM32MP15x OTP : + + - OTP_57[31:0] = MAC_ADDR[31:0] + - OTP_58[15:0] = MAC_ADDR[47:32] + +To program a MAC address on virgin OTP words above, you can use the fuse command +on bank 0 to access to internal OTP: + +Prerequisite: check if a MAC address isn't yet programmed in OTP + +1) check OTP: their value must be equal to 0 + + STM32MP> fuse sense 0 57 2 + Sensing bank 0: + Word 0x00000039: 00000000 00000000 + +2) check environment variable + + STM32MP> env print ethaddr + ## Error: "ethaddr" not defined + +Example to set mac address "12:34:56:78:9a:bc" + +1) Write OTP:: + + STM32MP> fuse prog -y 0 57 0x78563412 0x0000bc9a + +2) Read OTP:: + + STM32MP> fuse sense 0 57 2 + Sensing bank 0: + Word 0x00000039: 78563412 0000bc9a + +3) next REBOOT, in the trace:: + + ### Setting environment from OTP MAC address = "12:34:56:78:9a:bc" + +4) check env update:: + + STM32MP> env print ethaddr + ethaddr=12:34:56:78:9a:bc + +.. warning:: This command can't be executed twice on the same board as + OTP are protected. It is already done for the board + provided by STMicroelectronics. + +Coprocessor firmware +-------------------- + +U-Boot can boot the coprocessor before the kernel (coprocessor early boot). + +a) Manuallly by using rproc commands (update the bootcmd) + + Configurations:: + + # env set name_copro "rproc-m4-fw.elf" + # env set dev_copro 0 + # env set loadaddr_copro 0xC1000000 + + Load binary from bootfs partition (number 4) on SD card (mmc 0):: + + # ext4load mmc 0:4 ${loadaddr_copro} ${name_copro} + + => ${filesize} variable is updated with the size of the loaded file. + + Start M4 firmware with remote proc command:: + + # rproc init + # rproc load ${dev_copro} ${loadaddr_copro} ${filesize} + # rproc start ${dev_copro}"00270033 + +b) Automatically by using FIT feature and generic DISTRO bootcmd + + see examples in the board stm32mp1 directory: fit_copro_kernel_dtb.its + + Generate FIT including kernel + device tree + M4 firmware with cfg with M4 boot:: + + $> mkimage -f fit_copro_kernel_dtb.its fit_copro_kernel_dtb.itb + + Then using DISTRO configuration file: see extlinux.conf to select the correct + configuration: + + - stm32mp157c-ev1-m4 + - stm32mp157c-dk2-m4 + +DFU support +----------- + +The DFU is supported on ST board. + +The env variable dfu_alt_info is automatically build, and all +the memory present on the ST boards are exported. + +The dfu mode is started by the command:: + + STM32MP> dfu 0 + +On EV1 board, booting from SD card, without OP-TEE:: + + STM32MP> dfu 0 list + DFU alt settings list: + dev: RAM alt: 0 name: uImage layout: RAM_ADDR + dev: RAM alt: 1 name: devicetree.dtb layout: RAM_ADDR + dev: RAM alt: 2 name: uramdisk.image.gz layout: RAM_ADDR + dev: eMMC alt: 3 name: sdcard_fsbl1 layout: RAW_ADDR + dev: eMMC alt: 4 name: sdcard_fsbl2 layout: RAW_ADDR + dev: eMMC alt: 5 name: sdcard_ssbl layout: RAW_ADDR + dev: eMMC alt: 6 name: sdcard_bootfs layout: RAW_ADDR + dev: eMMC alt: 7 name: sdcard_vendorfs layout: RAW_ADDR + dev: eMMC alt: 8 name: sdcard_rootfs layout: RAW_ADDR + dev: eMMC alt: 9 name: sdcard_userfs layout: RAW_ADDR + dev: eMMC alt: 10 name: emmc_fsbl1 layout: RAW_ADDR + dev: eMMC alt: 11 name: emmc_fsbl2 layout: RAW_ADDR + dev: eMMC alt: 12 name: emmc_ssbl layout: RAW_ADDR + dev: eMMC alt: 13 name: emmc_bootfs layout: RAW_ADDR + dev: eMMC alt: 14 name: emmc_vendorfs layout: RAW_ADDR + dev: eMMC alt: 15 name: emmc_rootfs layout: RAW_ADDR + dev: eMMC alt: 16 name: emmc_userfs layout: RAW_ADDR + dev: MTD alt: 17 name: nor_fsbl1 layout: RAW_ADDR + dev: MTD alt: 18 name: nor_fsbl2 layout: RAW_ADDR + dev: MTD alt: 19 name: nor_ssbl layout: RAW_ADDR + dev: MTD alt: 20 name: nor_env layout: RAW_ADDR + dev: MTD alt: 21 name: nand_fsbl layout: RAW_ADDR + dev: MTD alt: 22 name: nand_ssbl1 layout: RAW_ADDR + dev: MTD alt: 23 name: nand_ssbl2 layout: RAW_ADDR + dev: MTD alt: 24 name: nand_UBI layout: RAW_ADDR + dev: VIRT alt: 25 name: OTP layout: RAW_ADDR + dev: VIRT alt: 26 name: PMIC layout: RAW_ADDR + +All the supported device are exported for dfu-util tool:: + + $> dfu-util -l + Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=26, name="PMIC", serial="002700333338511934383330" + Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=25, name="OTP", serial="002700333338511934383330" + Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=24, name="nand_UBI", serial="002700333338511934383330" + Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=23, name="nand_ssbl2", serial="002700333338511934383330" + Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=22, name="nand_ssbl1", serial="002700333338511934383330" + Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=21, name="nand_fsbl", serial="002700333338511934383330" + Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=20, name="nor_env", serial="002700333338511934383330" + Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=19, name="nor_ssbl", serial="002700333338511934383330" + Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=18, name="nor_fsbl2", serial="002700333338511934383330" + Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=17, name="nor_fsbl1", serial="002700333338511934383330" + Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=16, name="emmc_userfs", serial="002700333338511934383330" + Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=15, name="emmc_rootfs", serial="002700333338511934383330" + Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=14, name="emmc_vendorfs", serial="002700333338511934383330" + Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=13, name="emmc_bootfs", serial="002700333338511934383330" + Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=12, name="emmc_ssbl", serial="002700333338511934383330" + Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=11, name="emmc_fsbl2", serial="002700333338511934383330" + Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=10, name="emmc_fsbl1", serial="002700333338511934383330" + Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=9, name="sdcard_userfs", serial="002700333338511934383330" + Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=8, name="sdcard_rootfs", serial="002700333338511934383330" + Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=7, name="sdcard_vendorfs", serial="002700333338511934383330" + Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=6, name="sdcard_bootfs", serial="002700333338511934383330" + Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=5, name="sdcard_ssbl", serial="002700333338511934383330" + Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=4, name="sdcard_fsbl2", serial="002700333338511934383330" + Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=3, name="sdcard_fsbl1", serial="002700333338511934383330" + Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=2, name="uramdisk.image.gz", serial="002700333338511934383330" + Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=1, name="devicetree.dtb", serial="002700333338511934383330" + Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=0, name="uImage", serial="002700333338511934383330" + +You can update the boot device: + +- SD card (mmc0) :: + + $> dfu-util -d 0483:5720 -a 3 -D tf-a-stm32mp157c-ev1-trusted.stm32 + $> dfu-util -d 0483:5720 -a 4 -D tf-a-stm32mp157c-ev1-trusted.stm32 + $> dfu-util -d 0483:5720 -a 5 -D u-boot-stm32mp157c-ev1-trusted.img + $> dfu-util -d 0483:5720 -a 6 -D st-image-bootfs-openstlinux-weston-stm32mp1.ext4 + $> dfu-util -d 0483:5720 -a 7 -D st-image-vendorfs-openstlinux-weston-stm32mp1.ext4 + $> dfu-util -d 0483:5720 -a 8 -D st-image-weston-openstlinux-weston-stm32mp1.ext4 + $> dfu-util -d 0483:5720 -a 9 -D st-image-userfs-openstlinux-weston-stm32mp1.ext4 + +- EMMC (mmc1):: + + $> dfu-util -d 0483:5720 -a 10 -D tf-a-stm32mp157c-ev1-trusted.stm32 + $> dfu-util -d 0483:5720 -a 11 -D tf-a-stm32mp157c-ev1-trusted.stm32 + $> dfu-util -d 0483:5720 -a 12 -D u-boot-stm32mp157c-ev1-trusted.img + $> dfu-util -d 0483:5720 -a 13 -D st-image-bootfs-openstlinux-weston-stm32mp1.ext4 + $> dfu-util -d 0483:5720 -a 14 -D st-image-vendorfs-openstlinux-weston-stm32mp1.ext4 + $> dfu-util -d 0483:5720 -a 15 -D st-image-weston-openstlinux-weston-stm32mp1.ext4 + $> dfu-util -d 0483:5720 -a 16 -D st-image-userfs-openstlinux-weston-stm32mp1.ext4 + +- NOR:: + + $> dfu-util -d 0483:5720 -a 17 -D tf-a-stm32mp157c-ev1-trusted.stm32 + $> dfu-util -d 0483:5720 -a 18 -D tf-a-stm32mp157c-ev1-trusted.stm32 + $> dfu-util -d 0483:5720 -a 19 -D u-boot-stm32mp157c-ev1-trusted.img + +- NAND (UBI partition used for NAND only boot or NOR + NAND boot):: + + $> dfu-util -d 0483:5720 -a 21 -D tf-a-stm32mp157c-ev1-trusted.stm32 + $> dfu-util -d 0483:5720 -a 22 -D u-boot-stm32mp157c-ev1-trusted.img + $> dfu-util -d 0483:5720 -a 23 -D u-boot-stm32mp157c-ev1-trusted.img + $> dfu-util -d 0483:5720 -a 24 -D st-image-weston-openstlinux-weston-stm32mp1_nand_4_256_multivolume.ubi + +- you can also dump the OTP and the PMIC NVM with:: + + $> dfu-util -d 0483:5720 -a 25 -U otp.bin + $> dfu-util -d 0483:5720 -a 26 -U pmic.bin diff --git a/doc/board/toradex/apalix-imx8.rst b/doc/board/toradex/apalix-imx8.rst new file mode 100644 index 00000000000..4b7ea65d31b --- /dev/null +++ b/doc/board/toradex/apalix-imx8.rst @@ -0,0 +1,82 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Apalis iMX8QM V1.0B Module +========================== + +Quick Start +----------- + +- Build the ARM trusted firmware binary +- Get scfw_tcm.bin and ahab-container.img +- Build U-Boot +- Load U-Boot binary using uuu +- Flash U-Boot binary into the eMMC +- Boot + +Get and Build the ARM Trusted Firmware +-------------------------------------- + +.. code-block:: bash + + $ git clone -b imx_4.14.78_1.0.0_ga https://source.codeaurora.org/external/imx/imx-atf + $ cd imx-atf/ + $ make PLAT=imx8qm bl31 + +Get scfw_tcm.bin and ahab-container.img +--------------------------------------- + +.. code-block:: bash + + $ wget https://github.com/toradex/meta-fsl-bsp-release/blob/toradex-sumo-4.14.78-1.0.0_ga-bringup/imx/meta-bsp/recipes- + bsp/imx-sc-firmware/files/mx8qm-apalis-scfw-tcm.bin?raw=true + $ mv mx8qm-apalis-scfw-tcm.bin\?raw\=true mx8qm-apalis-scfw-tcm.bin + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.0.bin + $ chmod +x firmware-imx-8.0.bin + $ ./firmware-imx-8.0.bin + +Copy the following binaries to the U-Boot folder: + +.. code-block:: bash + + $ cp imx-atf/build/imx8qm/release/bl31.bin . + $ cp u-boot/u-boot.bin . + +Copy the following firmware to the U-Boot folder: + +.. code-block:: bash + + $ cp firmware-imx-8.0/firmware/seco/ahab-container.img . + +Build U-Boot +------------ +.. code-block:: bash + + $ make apalis-imx8qm_defconfig + $ make u-boot-dtb.imx + +Load the U-Boot Binary Using UUU +-------------------------------- + +Get the latest version of the universal update utility (uuu) aka ``mfgtools 3.0``: + +https://community.nxp.com/external-link.jspa?url=https%3A%2F%2Fgithub.com%2FNXPmicro%2Fmfgtools%2Freleases + +Put the module into USB recovery aka serial downloader mode, connect USB device +to your host and execute uuu: + +.. code-block:: bash + + sudo ./uuu u-boot/u-boot-dtb.imx + +Flash the U-Boot Binary into the eMMC +------------------------------------- + +Burn the ``u-boot-dtb.imx`` binary to the primary eMMC hardware boot area +partition and boot: + +.. code-block:: bash + + load mmc 1:1 $loadaddr u-boot-dtb.imx + setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt ${blkcnt} / 0x200 + mmc dev 0 1 + mmc write ${loadaddr} 0x0 ${blkcnt} diff --git a/doc/board/toradex/colibri-imx8x.rst b/doc/board/toradex/colibri-imx8x.rst new file mode 100644 index 00000000000..244e5a4c047 --- /dev/null +++ b/doc/board/toradex/colibri-imx8x.rst @@ -0,0 +1,82 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Colibri iMX8QXP V1.0B Module +============================ + +Quick Start +----------- + +- Build the ARM trusted firmware binary +- Get scfw_tcm.bin and ahab-container.img +- Build U-Boot +- Load U-Boot binary using uuu +- Flash U-Boot binary into the eMMC +- Boot + +Get and Build the ARM Trusted Firmware +-------------------------------------- + +.. code-block:: bash + + $ git clone -b imx_4.14.78_1.0.0_ga https://source.codeaurora.org/external/imx/imx-atf + $ cd imx-atf/ + $ make PLAT=imx8qxp bl31 + +Get scfw_tcm.bin and ahab-container.img +--------------------------------------- +.. code-block:: bash + + $ wget https://github.com/toradex/meta-fsl-bsp-release/blob/ + toradex-sumo-4.14.78-1.0.0_ga-bringup/imx/meta-bsp/recipes- + bsp/imx-sc-firmware/files/mx8qx-colibri-scfw-tcm.bin?raw=true + $ mv mx8qx-colibri-scfw-tcm.bin\?raw\=true mx8qx-colibri-scfw-tcm.bin + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.0.bin + $ chmod +x firmware-imx-8.0.bin + $ ./firmware-imx-8.0.bin + +Copy the following binaries to the U-Boot folder: + +.. code-block:: bash + + $ cp imx-atf/build/imx8qxp/release/bl31.bin . + $ cp u-boot/u-boot.bin . + +Copy the following firmware to the U-Boot folder: + +.. code-block:: bash + + $ cp firmware-imx-8.0/firmware/seco/ahab-container.img . + +Build U-Boot +------------ + +.. code-block:: bash + + $ make colibri-imx8qxp_defconfig + $ make u-boot-dtb.imx + +Load the U-Boot Binary Using UUU +-------------------------------- + +Get the latest version of the universal update utility (uuu) aka ``mfgtools 3.0``: + +https://community.nxp.com/external-link.jspa?url=https%3A%2F%2Fgithub.com%2FNXPmicro%2Fmfgtools%2Freleases + +Put the module into USB recovery aka serial downloader mode, connect USB device +to your host and execute ``uuu``: + +.. code-block:: bash + + sudo ./uuu u-boot/u-boot-dtb.imx + +Flash the U-Boot Binary into the eMMC +------------------------------------- + +Burn the ``u-boot-dtb.imx`` binary to the primary eMMC hardware boot area partition: + +.. code-block:: bash + + load mmc 1:1 $loadaddr u-boot-dtb.imx + setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt ${blkcnt} / 0x200 + mmc dev 0 1 + mmc write ${loadaddr} 0x0 ${blkcnt} diff --git a/doc/board/toradex/colibri_imx7.rst b/doc/board/toradex/colibri_imx7.rst new file mode 100644 index 00000000000..6fb95266666 --- /dev/null +++ b/doc/board/toradex/colibri_imx7.rst @@ -0,0 +1,127 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Colibri iMX7 +============ + +Quick Start +----------- + +- Build U-Boot +- NAND IMX image adjustments before flashing +- Flashing manually U-Boot to eMMC +- Flashing manually U-Boot to NAND +- Using ``update_uboot`` script + +Build U-Boot +------------ + +.. code-block:: bash + + $ export CROSS_COMPILE=arm-linux-gnueabi- + $ export ARCH=arm + $ make colibri_imx7_emmc_defconfig # For NAND: colibri_imx7_defconfig + $ make + +After build succeeds, you will obtain final ``u-boot-dtb.imx`` IMX specific +image, ready for flashing (but check next section for additional +adjustments). + +Final IMX program image includes (section ``6.6.7`` from `IMX7DRM +<https://www.nxp.com/webapp/Download?colCode=IMX7DRM>`_): + +* **Image vector table** (IVT) for BootROM +* **Boot data** -indicates the program image location, program image size + in bytes, and the plugin flag. +* **Device configuration data** +* **User image**: U-Boot image (``u-boot-dtb.bin``) + + +IMX image adjustments prior to flashing +--------------------------------------- + +1. U-Boot for both Colibri iMX7 NAND and eMMC versions +is built with HABv4 support (`AN4581.pdf +<https://www.nxp.com/docs/en/application-note/AN4581.pdf>`_) +enabled by default, which requires to generate a proper +Command Sequence File (CSF) by srktool from NXP (not included in the +U-Boot tree, check additional details in introduction_habv4.txt) +and concatenate it to the final ``u-boot-dtb.imx``. + +2. In case if you don't want to generate a proper ``CSF`` (for any reason), +you still need to pad the IMX image so i has the same size as specified in +in **Boot Data** section of IMX image. +To obtain this value, run: + +.. code-block:: bash + + $ od -X -N 0x30 u-boot-dtb.imx + 0000000 402000d1 87800000 00000000 877ff42c + 0000020 877ff420 877ff400 878a5000 00000000 + ^^^^^^^^ + 0000040 877ff000 000a8060 00000000 40b401d2 + ^^^^^^^^ ^^^^^^^^ + +Where: + +* ``877ff400`` - IVT self address +* ``877ff000`` - Program image address +* ``000a8060`` - Program image size + +To calculate the padding: + +* IVT offset = ``0x877ff400`` - ``0x877ff000`` = ``0x400`` +* Program image size = ``0xa8060`` - ``0x400`` = ``0xa7c60`` + +and then pad the image: + +.. code-block:: bash + + $ objcopy -I binary -O binary --pad-to 0xa7c60 --gap-fill=0x00 \ + u-boot-dtb.imx u-boot-dtb.imx.zero-padded + +3. Also, according to requirement from ``6.6.7.1``, the final image +should have ``0x400`` offset for initial IVT table. + +For eMMC setup we handle this by flashing it to ``0x400``, howewer +for NAND setup we adjust the image prior to flashing, adding padding in the +beginning of the image. + +.. code-block:: bash + + $ dd if=u-boot-dtb.imx.zero-padded of=u-boot-dtb.imx.ready bs=1024 seek=1 + +Flash U-Boot IMX image to eMMC +------------------------------ + +Flash the ``u-boot-dtb.imx.zero-padded`` binary to the primary eMMC hardware +boot area partition: + +.. code-block:: bash + + + => load mmc 1:1 $loadaddr u-boot-dtb.imx.zero-padded + => setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt ${blkcnt} / 0x200 + => mmc dev 0 1 + => mmc write ${loadaddr} 0x2 ${blkcnt} + +Flash U-Boot IMX image to NAND +------------------------------ + +.. code-block:: bash + + => load mmc 1:1 $loadaddr u-boot-dtb.imx.ready + => nand erase.part u-boot1 + => nand write ${loadaddr} u-boot1 ${filesize} + => nand erase.part u-boot2 + => nand write ${loadaddr} u-boot2 ${filesize} + +Using update_uboot script +------------------------- + +You can also usb U-Boot env update_uboot script, +which wraps all eMMC/NAND specific command invocation: + +.. code-block:: bash + + => load mmc 1:1 $loadaddr u-boot-dtb.imx.ready + => run update_uboot diff --git a/doc/board/toradex/index.rst b/doc/board/toradex/index.rst new file mode 100644 index 00000000000..16b5a0770d1 --- /dev/null +++ b/doc/board/toradex/index.rst @@ -0,0 +1,12 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Toradex +======= + +.. toctree:: + :maxdepth: 2 + + apalix-imx8 + colibri_imx7 + colibri-imx8x + verdin-imx8mm diff --git a/doc/board/toradex/verdin-imx8mm.rst b/doc/board/toradex/verdin-imx8mm.rst new file mode 100644 index 00000000000..b2ae4fabea9 --- /dev/null +++ b/doc/board/toradex/verdin-imx8mm.rst @@ -0,0 +1,112 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Verdin iMX8M Mini Module +======================== + +Quick Start +----------- + +- Build the ARM trusted firmware binary +- Get the DDR firmware +- Build U-Boot +- Flash to eMMC +- Boot + +Get and Build the ARM Trusted Firmware (Trusted Firmware A) +----------------------------------------------------------- + +.. code-block:: bash + + $ echo "Downloading and building TF-A..." + $ git clone -b imx_4.14.98_2.3.0 \ + https://source.codeaurora.org/external/imx/imx-atf + $ cd imx-atf + +Please edit ``plat/imx/imx8mm/include/platform_def.h`` so it contains proper +values for UART configuration and BL31 base address (correct values listed +below): + +.. code-block:: bash + + #define BL31_BASE 0x910000 + #define IMX_BOOT_UART_BASE 0x30860000 + #define DEBUG_CONSOLE 1 + +Then build ATF (TF-A): + +.. code-block:: bash + + $ make PLAT=imx8mm bl31 + +Get the DDR Firmware +-------------------- + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.4.1.bin + $ chmod +x firmware-imx-8.4.1.bin + $ ./firmware-imx-8.4.1.bin + $ cp firmware-imx-8.4.1/firmware/ddr/synopsys/lpddr4*.bin ./ + +Build U-Boot +------------ +.. code-block:: bash + + $ export CROSS_COMPILE=aarch64-linux-gnu- + $ make verdin-imx8mm_defconfig + $ make flash.bin + +Flash to eMMC +------------- + +.. code-block:: bash + + > tftpboot ${loadaddr} flash.bin + > setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt ${blkcnt} / 0x200 + > mmc dev 0 1 && mmc write ${loadaddr} 0x2 ${blkcnt} + +As a convenience, instead of the last two commands one may also use the update +U-Boot wrapper: + +.. code-block:: bash + + > run update_uboot + +Boot +---- + +ATF, U-Boot proper and u-boot.dtb images are packed into FIT image, +which is loaded and parsed by SPL. + +Boot sequence is: + +* SPL ---> ATF (TF-A) ---> U-Boot proper + +Output: + +.. code-block:: bash + + U-Boot SPL 2020.01-00187-gd411d164e5 (Jan 26 2020 - 04:47:26 +0100) + Normal Boot + Trying to boot from MMC1 + NOTICE: Configuring TZASC380 + NOTICE: RDC off + NOTICE: BL31: v2.0(release):rel_imx_4.14.98_2.3.0-0-g09c5cc994-dirty + NOTICE: BL31: Built : 01:11:41, Jan 25 2020 + NOTICE: sip svc init + + + U-Boot 2020.01-00187-gd411d164e5 (Jan 26 2020 - 04:47:26 +0100) + + CPU: Freescale i.MX8MMQ rev1.0 at 0 MHz + Reset cause: POR + DRAM: 2 GiB + MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 + Loading Environment from MMC... OK + In: serial + Out: serial + Err: serial + Model: Toradex Verdin iMX8M Mini Quad 2GB Wi-Fi / BT IT V1.0A, Serial: + Net: eth0: ethernet@30be0000 + Hit any key to stop autoboot: 0 + Verdin iMX8MM # diff --git a/doc/device-tree-bindings/gpio/intel,apl-gpio.txt b/doc/device-tree-bindings/gpio/intel,apl-gpio.txt index e27a40b4374..cf0659b70ec 100644 --- a/doc/device-tree-bindings/gpio/intel,apl-gpio.txt +++ b/doc/device-tree-bindings/gpio/intel,apl-gpio.txt @@ -23,7 +23,7 @@ Example: { p2sb: p2sb@d,0 { reg = <0x02006810 0 0 0 0>; - compatible = "intel,apl-p2sb"; + compatible = "intel,p2sb"; early-regs = <IOMAP_P2SB_BAR 0x100000>; north { diff --git a/doc/device-tree-bindings/net/ti,dp83867.txt b/doc/device-tree-bindings/net/ti,dp83867.txt deleted file mode 100644 index 268220964aa..00000000000 --- a/doc/device-tree-bindings/net/ti,dp83867.txt +++ /dev/null @@ -1,35 +0,0 @@ -* Texas Instruments - dp83867 Giga bit ethernet phy - -Required properties: - - reg - The ID number for the phy, usually a small integer - - ti,rx-internal-delay - RGMII Recieve Clock Delay - see dt-bindings/net/ti-dp83867.h - for applicable values - - ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h - for applicable values - - ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h - for applicable values - - enet-phy-lane-swap - Indicates that PHY will swap the TX/RX lanes to - compensate for the board being designed with the lanes swapped. - - enet-phy-no-lane-swap - Indicates that PHY will disable swap of the - TX/RX lanes. - - ti,clk-output-sel - Muxing option for CLK_OUT pin. See dt-bindings/net/ti-dp83867.h - for applicable values. The CLK_OUT pin can also - be disabled by this property. When omitted, the - PHY's default will be left as is. - -Default child nodes are standard Ethernet PHY device -nodes as described in doc/devicetree/bindings/net/ethernet.txt - -Example: - - ethernet-phy@0 { - reg = <0>; - ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; - ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_75_NS>; - ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; - enet-phy-lane-no-swap; - ti,clk-output-sel = <DP83867_CLK_O_SEL_CHN_A_TCLK>; - }; - -Datasheet can be found: -http://www.ti.com/product/DP83867IR/datasheet diff --git a/doc/device-tree-bindings/pinctrl/intel,apl-pinctrl.txt b/doc/device-tree-bindings/pinctrl/intel,apl-pinctrl.txt index cd7f8a0ca38..12ec8461073 100644 --- a/doc/device-tree-bindings/pinctrl/intel,apl-pinctrl.txt +++ b/doc/device-tree-bindings/pinctrl/intel,apl-pinctrl.txt @@ -23,7 +23,7 @@ Example: { p2sb: p2sb@d,0 { reg = <0x02006810 0 0 0 0>; - compatible = "intel,apl-p2sb"; + compatible = "intel,p2sb"; early-regs = <IOMAP_P2SB_BAR 0x100000>; n { diff --git a/doc/driver-model/ethernet.rst b/doc/driver-model/ethernet.rst new file mode 100644 index 00000000000..359a0523cf9 --- /dev/null +++ b/doc/driver-model/ethernet.rst @@ -0,0 +1,321 @@ +Ethernet Driver Guide +======================= + +The networking stack in Das U-Boot is designed for multiple network devices +to be easily added and controlled at runtime. This guide is meant for people +who wish to review the net driver stack with an eye towards implementing your +own ethernet device driver. Here we will describe a new pseudo 'APE' driver. + +Most existing drivers do already - and new network driver MUST - use the +U-Boot core driver model. Generic information about this can be found in +doc/driver-model/design.rst, this document will thus focus on the network +specific code parts. +Some drivers are still using the old Ethernet interface, differences between +the two and hints about porting will be handled at the end. + +Driver framework +------------------ + +A network driver following the driver model must declare itself using +the UCLASS_ETH .id field in the U-Boot driver struct: + +.. code-block:: c + + U_BOOT_DRIVER(eth_ape) = { + .name = "eth_ape", + .id = UCLASS_ETH, + .of_match = eth_ape_ids, + .ofdata_to_platdata = eth_ape_ofdata_to_platdata, + .probe = eth_ape_probe, + .ops = ð_ape_ops, + .priv_auto_alloc_size = sizeof(struct eth_ape_priv), + .platdata_auto_alloc_size = sizeof(struct eth_ape_pdata), + .flags = DM_FLAG_ALLOC_PRIV_DMA, + }; + +struct eth_ape_priv contains runtime per-instance data, like buffers, pointers +to current descriptors, current speed settings, pointers to PHY related data +(like struct mii_dev) and so on. Declaring its size in .priv_auto_alloc_size +will let the driver framework allocate it at the right time. +It can be retrieved using a dev_get_priv(dev) call. + +struct eth_ape_pdata contains static platform data, like the MMIO base address, +a hardware variant, the MAC address. ``struct eth_pdata eth_pdata`` +as the first member of this struct helps to avoid duplicated code. +If you don't need any more platform data beside the standard member, +just use sizeof(struct eth_pdata) for the platdata_auto_alloc_size. + +PCI devices add a line pointing to supported vendor/device ID pairs: + +.. code-block:: c + + static struct pci_device_id supported[] = { + { PCI_DEVICE(PCI_VENDOR_ID_APE, 0x4223) }, + {} + }; + + U_BOOT_PCI_DEVICE(eth_ape, supported); + +It is also possible to declare support for a whole class of PCI devices:: + + { PCI_DEVICE_CLASS(PCI_CLASS_SYSTEM_SDHCI << 8, 0xffff00) }, + +Device probing and instantiation will be handled by the driver model framework, +so follow the guidelines there. The probe() function would initialise the +platform specific parts of the hardware, like clocks, resets, GPIOs, the MDIO +bus. Also it would take care of any special PHY setup (power rails, enable +bits for internal PHYs, etc.). + +Driver methods +---------------- + +The real work will be done in the driver method functions the driver provides +by defining the members of struct eth_ops: + +.. code-block:: c + + struct eth_ops { + int (*start)(struct udevice *dev); + int (*send)(struct udevice *dev, void *packet, int length); + int (*recv)(struct udevice *dev, int flags, uchar **packetp); + int (*free_pkt)(struct udevice *dev, uchar *packet, int length); + void (*stop)(struct udevice *dev); + int (*mcast)(struct udevice *dev, const u8 *enetaddr, int join); + int (*write_hwaddr)(struct udevice *dev); + int (*read_rom_hwaddr)(struct udevice *dev); + }; + +An up-to-date version of this struct together with more information can be +found in include/net.h. + +Only start, stop, send and recv are required, the rest are optional and are +handled by generic code or ignored if not provided. + +The **start** function initialises the hardware and gets it ready for send/recv +operations. You often do things here such as resetting the MAC +and/or PHY, and waiting for the link to autonegotiate. You should also take +the opportunity to program the device's MAC address with the enetaddr member +of the generic struct eth_pdata (which would be the first member of your +own platdata struct). This allows the rest of U-Boot to dynamically change +the MAC address and have the new settings be respected. + +The **send** function does what you think -- transmit the specified packet +whose size is specified by length (in bytes). The packet buffer can (and +will!) be reused for subsequent calls to send(), so it must be no longer +used when the send() function returns. The easiest way to achieve this is +to wait until the transmission is complete. Alternatively, if supported by +the hardware, just waiting for the buffer to be consumed (by some DMA engine) +might be an option as well. +Another way of consuming the buffer could be to copy the data to be send, +then just queue the copied packet (for instance handing it over to a DMA +engine), and return immediately afterwards. +In any case you should leave the state such that the send function can be +called multiple times in a row. + +The **recv** function polls for availability of a new packet. If none is +available, it must return with -EAGAIN. +If a packet has been received, make sure it is accessible to the CPU +(invalidate caches if needed), then write its address to the packetp pointer, +and return the length. If there is an error (receive error, too short or too +long packet), return 0 if you require the packet to be cleaned up normally, +or a negative error code otherwise (cleanup not necessary or already done). +The U-Boot network stack will then process the packet. + +If **free_pkt** is defined, U-Boot will call it after a received packet has +been processed, so the packet buffer can be freed or recycled. Typically you +would hand it back to the hardware to acquire another packet. free_pkt() will +be called after recv(), for the same packet, so you don't necessarily need +to infer the buffer to free from the ``packet`` pointer, but can rely on that +being the last packet that recv() handled. +The common code sets up packet buffers for you already in the .bss +(net_rx_packets), so there should be no need to allocate your own. This doesn't +mean you must use the net_rx_packets array however; you're free to use any +buffer you wish. + +The **stop** function should turn off / disable the hardware and place it back +in its reset state. It can be called at any time (before any call to the +related start() function), so make sure it can handle this sort of thing. + +The (optional) **write_hwaddr** function should program the MAC address stored +in pdata->enetaddr into the Ethernet controller. + +So the call graph at this stage would look something like: + +.. code-block:: c + + (some net operation (ping / tftp / whatever...)) + eth_init() + ops->start() + eth_send() + ops->send() + eth_rx() + ops->recv() + (process packet) + if (ops->free_pkt) + ops->free_pkt() + eth_halt() + ops->stop() + + +CONFIG_PHYLIB / CONFIG_CMD_MII +-------------------------------- + +If your device supports banging arbitrary values on the MII bus (pretty much +every device does), you should add support for the mii command. Doing so is +fairly trivial and makes debugging mii issues a lot easier at runtime. + +In your driver's ``probe()`` function, add a call to mdio_alloc() and +mdio_register() like so: + +.. code-block:: c + + bus = mdio_alloc(); + if (!bus) { + ... + return -ENOMEM; + } + + bus->read = ape_mii_read; + bus->write = ape_mii_write; + mdio_register(bus); + +And then define the mii_read and mii_write functions if you haven't already. +Their syntax is straightforward:: + + int mii_read(struct mii_dev *bus, int addr, int devad, int reg); + int mii_write(struct mii_dev *bus, int addr, int devad, int reg, + u16 val); + +The read function should read the register 'reg' from the phy at address 'addr' +and return the result to its caller. The implementation for the write function +should logically follow. + +................................................................ + +Legacy network drivers +------------------------ + +!!! WARNING !!! + +This section below describes the old way of doing things. No new Ethernet +drivers should be implemented this way. All new drivers should be written +against the U-Boot core driver model, as described above. + +The actual callback functions are fairly similar, the differences are: + +- ``start()`` is called ``init()`` +- ``stop()`` is called ``halt()`` +- The ``recv()`` function must loop until all packets have been received, for + each packet it must call the net_process_received_packet() function, + handing it over the pointer and the length. Afterwards it should free + the packet, before checking for new data. + +For porting an old driver to the new driver model, split the existing recv() +function into the actual new recv() function, just fetching **one** packet, +remove the call to net_process_received_packet(), then move the packet +cleanup into the ``free_pkt()`` function. + +Registering the driver and probing a device is handled very differently, +follow the recommendations in the driver model design documentation for +instructions on how to port this over. For the records, the old way of +initialising a network driver is as follows: + +Old network driver registration +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +When U-Boot initializes, it will call the common function eth_initialize(). +This will in turn call the board-specific board_eth_init() (or if that fails, +the cpu-specific cpu_eth_init()). These board-specific functions can do random +system handling, but ultimately they will call the driver-specific register +function which in turn takes care of initializing that particular instance. + +Keep in mind that you should code the driver to avoid storing state in global +data as someone might want to hook up two of the same devices to one board. +Any such information that is specific to an interface should be stored in a +private, driver-defined data structure and pointed to by eth->priv (see below). + +So the call graph at this stage would look something like: + +.. code-block:: c + + board_init() + eth_initialize() + board_eth_init() / cpu_eth_init() + driver_register() + initialize eth_device + eth_register() + +At this point in time, the only thing you need to worry about is the driver's +register function. The pseudo code would look something like: + +.. code-block:: c + + int ape_register(bd_t *bis, int iobase) + { + struct ape_priv *priv; + struct eth_device *dev; + struct mii_dev *bus; + + priv = malloc(sizeof(*priv)); + if (priv == NULL) + return -ENOMEM; + + dev = malloc(sizeof(*dev)); + if (dev == NULL) { + free(priv); + return -ENOMEM; + } + + /* setup whatever private state you need */ + + memset(dev, 0, sizeof(*dev)); + sprintf(dev->name, "APE"); + + /* + * if your device has dedicated hardware storage for the + * MAC, read it and initialize dev->enetaddr with it + */ + ape_mac_read(dev->enetaddr); + + dev->iobase = iobase; + dev->priv = priv; + dev->init = ape_init; + dev->halt = ape_halt; + dev->send = ape_send; + dev->recv = ape_recv; + dev->write_hwaddr = ape_write_hwaddr; + + eth_register(dev); + + #ifdef CONFIG_PHYLIB + bus = mdio_alloc(); + if (!bus) { + free(priv); + free(dev); + return -ENOMEM; + } + + bus->read = ape_mii_read; + bus->write = ape_mii_write; + mdio_register(bus); + #endif + + return 1; + } + +The exact arguments needed to initialize your device are up to you. If you +need to pass more/less arguments, that's fine. You should also add the +prototype for your new register function to include/netdev.h. + +The return value for this function should be as follows: +< 0 - failure (hardware failure, not probe failure) +>=0 - number of interfaces detected + +You might notice that many drivers seem to use xxx_initialize() rather than +xxx_register(). This is the old naming convention and should be avoided as it +causes confusion with the driver-specific init function. + +Other than locating the MAC address in dedicated hardware storage, you should +not touch the hardware in anyway. That step is handled in the driver-specific +init function. Remember that we are only registering the device here, we are +not checking its state or doing random probing. diff --git a/doc/driver-model/index.rst b/doc/driver-model/index.rst index 6d55774b4c2..b9df221627e 100644 --- a/doc/driver-model/index.rst +++ b/doc/driver-model/index.rst @@ -8,6 +8,7 @@ Driver Model debugging design + ethernet fdt-fixup fs_firmware_loader i2c-howto diff --git a/doc/uefi/uefi.rst b/doc/uefi/uefi.rst index a8fd886d6b5..cfe2d84a4c6 100644 --- a/doc/uefi/uefi.rst +++ b/doc/uefi/uefi.rst @@ -356,6 +356,18 @@ This driver is only available if U-Boot is configured with:: CONFIG_BLK=y CONFIG_PARTITIONS=y +Miscellaneous +------------- + +Load file 2 protocol +~~~~~~~~~~~~~~~~~~~~ + +The load file 2 protocol can be used by the Linux kernel to load the initial +RAM disk. U-Boot can be configured to provide an implementation with:: + + EFI_LOAD_FILE2_INITRD=y + EFI_INITRD_FILESPEC=interface dev:part path_to_initrd + Links ----- diff --git a/drivers/clk/clk_versal.c b/drivers/clk/clk_versal.c index 9d4d2149e32..d3673a5c8b8 100644 --- a/drivers/clk/clk_versal.c +++ b/drivers/clk/clk_versal.c @@ -571,6 +571,12 @@ static void versal_get_clock_info(void) continue; clock[i].valid = attr & CLK_VALID_MASK; + + /* skip query for Invalid clock */ + ret = versal_is_valid_clock(i); + if (ret != CLK_VALID_MASK) + continue; + clock[i].type = ((attr >> CLK_TYPE_SHIFT) & 0x1) ? CLK_TYPE_EXTERNAL : CLK_TYPE_OUTPUT; nodetype = (attr >> NODE_TYPE_SHIFT) & NODE_CLASS_MASK; diff --git a/drivers/clk/intel/clk_intel.c b/drivers/clk/intel/clk_intel.c index d2e15491a3d..b633934d90a 100644 --- a/drivers/clk/intel/clk_intel.c +++ b/drivers/clk/intel/clk_intel.c @@ -11,8 +11,6 @@ static ulong intel_clk_get_rate(struct clk *clk) { - ulong rate; - switch (clk->id) { case CLK_I2C: /* Hard-coded to 133MHz on current platforms */ @@ -20,8 +18,6 @@ static ulong intel_clk_get_rate(struct clk *clk) default: return -ENODEV; } - - return rate; } static struct clk_ops intel_clk_ops = { diff --git a/drivers/core/device-remove.c b/drivers/core/device-remove.c index 444e34b4921..ff5b28cb6a7 100644 --- a/drivers/core/device-remove.c +++ b/drivers/core/device-remove.c @@ -194,8 +194,9 @@ int device_remove(struct udevice *dev, uint flags) } } - if (!(drv->flags & DM_FLAG_DEFAULT_PD_CTRL_OFF) && - (dev != gd->cur_serial_dev)) + if (!(drv->flags & + (DM_FLAG_DEFAULT_PD_CTRL_OFF | DM_FLAG_REMOVE_WITH_PD_ON)) && + dev != gd->cur_serial_dev) dev_power_domain_off(dev); if (flags_remove(flags, drv->flags)) { diff --git a/drivers/misc/k3_avs.c b/drivers/misc/k3_avs.c index 47e42738e04..90df3772505 100644 --- a/drivers/misc/k3_avs.c +++ b/drivers/misc/k3_avs.c @@ -191,6 +191,10 @@ int k3_avs_notify_freq(int dev_id, int clk_id, u32 freq) struct k3_avs_privdata *priv = k3_avs_priv; struct vd_data *vd; + /* Driver may not be probed yet */ + if (!priv) + return -EINVAL; + for (vd = priv->vd_config->vds; vd->id >= 0; vd++) { if (vd->dev_id != dev_id || vd->clk_id != clk_id) continue; diff --git a/drivers/mtd/nand/raw/arasan_nfc.c b/drivers/mtd/nand/raw/arasan_nfc.c index d1b1a4263a2..110c32b3961 100644 --- a/drivers/mtd/nand/raw/arasan_nfc.c +++ b/drivers/mtd/nand/raw/arasan_nfc.c @@ -1120,12 +1120,15 @@ static void arasan_nand_cmd_function(struct mtd_info *mtd, unsigned int command, static void arasan_check_ondie(struct mtd_info *mtd) { struct nand_chip *nand_chip = mtd_to_nand(mtd); - struct nand_config *nand = nand_get_controller_data(nand_chip); + struct nand_drv *info = nand_get_controller_data(nand_chip); + struct nand_config *nand = &info->config; u8 maf_id, dev_id; u8 get_feature[4]; u8 set_feature[4] = {ENABLE_ONDIE_ECC, 0x00, 0x00, 0x00}; u32 i; + nand_chip->select_chip(mtd, 0); + /* Send the command for reading device ID */ nand_chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); nand_chip->cmdfunc(mtd, NAND_CMD_READID, 0, -1); @@ -1150,10 +1153,12 @@ static void arasan_check_ondie(struct mtd_info *mtd) for (i = 0; i < 4; i++) get_feature[i] = nand_chip->read_byte(mtd); - if (get_feature[0] & ENABLE_ONDIE_ECC) + if (get_feature[0] & ENABLE_ONDIE_ECC) { nand->on_die_ecc_enabled = true; - else + printf("On-DIE ECC Enabled\n"); + } else { printf("%s: Unable to enable OnDie ECC\n", __func__); + } /* Use the BBT pattern descriptors */ nand_chip->bbt_td = &bbt_main_descr; diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig index dceea1516f4..d1f049e62ab 100644 --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig @@ -267,4 +267,8 @@ config PHY_FIXED on, the link is always up with fixed speed and fixed duplex-setting. More information: doc/device-tree-bindings/net/fixed-link.txt +config PHY_NCSI + bool "NC-SI based PHY" + depends on DM_ETH + endif #PHYLIB diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile index 78955c57a8b..1d81516ecd1 100644 --- a/drivers/net/phy/Makefile +++ b/drivers/net/phy/Makefile @@ -31,3 +31,4 @@ obj-$(CONFIG_PHY_XILINX_GMII2RGMII) += xilinx_gmii2rgmii.o obj-$(CONFIG_PHY_VITESSE) += vitesse.o obj-$(CONFIG_PHY_MSCC) += mscc.o obj-$(CONFIG_PHY_FIXED) += fixed.o +obj-$(CONFIG_PHY_NCSI) += ncsi.o diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c index c4bd4430017..8ece926dd37 100644 --- a/drivers/net/phy/aquantia.c +++ b/drivers/net/phy/aquantia.c @@ -306,30 +306,29 @@ struct { AQUANTIA_VND1_GSTART_RATE_1G}, [PHY_INTERFACE_MODE_SGMII_2500] = {0x144, AQUANTIA_VND1_GSYSCFG_2_5G, AQUANTIA_VND1_GSTART_RATE_2_5G}, - [PHY_INTERFACE_MODE_XGMII] = {0x100, AQUANTIA_VND1_GSYSCFG_10G, - AQUANTIA_VND1_GSTART_RATE_10G}, [PHY_INTERFACE_MODE_XFI] = {0x100, AQUANTIA_VND1_GSYSCFG_10G, AQUANTIA_VND1_GSTART_RATE_10G}, [PHY_INTERFACE_MODE_USXGMII] = {0x080, AQUANTIA_VND1_GSYSCFG_10G, AQUANTIA_VND1_GSTART_RATE_10G}, }; -static int aquantia_set_proto(struct phy_device *phydev) +static int aquantia_set_proto(struct phy_device *phydev, + phy_interface_t interface) { int i; - if (!aquantia_syscfg[phydev->interface].cnt) + if (!aquantia_syscfg[interface].cnt) return 0; /* set the default rate to enable the SI link */ phy_write(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_GSTART_RATE, - aquantia_syscfg[phydev->interface].start_rate); + aquantia_syscfg[interface].start_rate); /* set selected protocol for all relevant line side link speeds */ - for (i = 0; i <= aquantia_syscfg[phydev->interface].cnt; i++) + for (i = 0; i <= aquantia_syscfg[interface].cnt; i++) phy_write(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_GSYSCFG_BASE + i, - aquantia_syscfg[phydev->interface].syscfg); + aquantia_syscfg[interface].syscfg); return 0; } @@ -425,9 +424,9 @@ int aquantia_config(struct phy_device *phydev) fault = phy_read(phydev, MDIO_MMD_VEND1, GLOBAL_FAULT); if (id != 0) - printf("%s running firmware version %X.%X.%X\n", - phydev->dev->name, (id >> 8), id & 0xff, - (rstatus >> 4) & 0xf); + debug("%s running firmware version %X.%X.%X\n", + phydev->dev->name, (id >> 8), id & 0xff, + (rstatus >> 4) & 0xf); if (fault != 0) printf("%s fault 0x%04x detected\n", phydev->dev->name, fault); @@ -444,6 +443,8 @@ int aquantia_config(struct phy_device *phydev) * on FW config */ if (interface == PHY_INTERFACE_MODE_XGMII) { + debug("use XFI or USXGMII SI protos, XGMII is not valid\n"); + reg_val1 = phy_read(phydev, MDIO_MMD_PHYXS, AQUANTIA_SYSTEM_INTERFACE_SR); if ((reg_val1 & AQUANTIA_SI_IN_USE_MASK) == AQUANTIA_SI_USXGMII) @@ -466,7 +467,7 @@ int aquantia_config(struct phy_device *phydev) mdelay(10); /* configure protocol based on phydev->interface */ - aquantia_set_proto(phydev); + aquantia_set_proto(phydev, interface); /* apply custom configuration based on DT */ aquantia_dts_config(phydev); @@ -506,12 +507,12 @@ int aquantia_config(struct phy_device *phydev) if (usx_an) { reg_val1 |= AQUANTIA_USX_AUTONEG_CONTROL_ENA; - printf("%s: system interface USXGMII\n", - phydev->dev->name); + debug("%s: system interface USXGMII\n", + phydev->dev->name); } else { reg_val1 &= ~AQUANTIA_USX_AUTONEG_CONTROL_ENA; - printf("%s: system interface XFI\n", - phydev->dev->name); + debug("%s: system interface XFI\n", + phydev->dev->name); } phy_write(phydev, MDIO_MMD_PHYXS, @@ -538,11 +539,11 @@ int aquantia_config(struct phy_device *phydev) val = phy_read(phydev, MDIO_MMD_VEND1, AQUANTIA_RESERVED_STATUS); reg_val1 = phy_read(phydev, MDIO_MMD_VEND1, AQUANTIA_FIRMWARE_ID); - printf("%s: %s Firmware Version %x.%x.%x\n", phydev->dev->name, - phydev->drv->name, - (reg_val1 & AQUANTIA_FIRMWARE_MAJOR_MASK) >> 8, - reg_val1 & AQUANTIA_FIRMWARE_MINOR_MASK, - (val & AQUANTIA_FIRMWARE_BUILD_MASK) >> 4); + debug("%s: %s Firmware Version %x.%x.%x\n", phydev->dev->name, + phydev->drv->name, + (reg_val1 & AQUANTIA_FIRMWARE_MAJOR_MASK) >> 8, + reg_val1 & AQUANTIA_FIRMWARE_MINOR_MASK, + (val & AQUANTIA_FIRMWARE_BUILD_MASK) >> 4); return 0; } diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c index 08935d9c15f..50804c130ef 100644 --- a/drivers/net/phy/dp83867.c +++ b/drivers/net/phy/dp83867.c @@ -29,6 +29,7 @@ #define DP83867_STRAP_STS2 0x006f #define DP83867_RGMIIDCTL 0x0086 #define DP83867_IO_MUX_CFG 0x0170 +#define DP83867_SGMIICTL 0x00D3 #define DP83867_SW_RESET BIT(15) #define DP83867_SW_RESTART BIT(14) @@ -65,6 +66,7 @@ #define DP83867_PHYCR_FIFO_DEPTH_SHIFT 14 #define DP83867_PHYCR_FIFO_DEPTH_MASK GENMASK(15, 14) #define DP83867_PHYCR_RESERVED_MASK BIT(11) +#define DP83867_PHYCR_FORCE_LINK_GOOD BIT(10) #define DP83867_MDI_CROSSOVER 5 #define DP83867_MDI_CROSSOVER_MDIX 2 #define DP83867_PHYCTRL_SGMIIEN 0x0800 @@ -100,6 +102,9 @@ /* CFG4 bits */ #define DP83867_CFG4_PORT_MIRROR_EN BIT(0) +/* SGMIICTL bits */ +#define DP83867_SGMII_TYPE BIT(14) + enum { DP83867_PORT_MIRRORING_KEEP, DP83867_PORT_MIRRORING_EN, @@ -115,6 +120,7 @@ struct dp83867_private { int port_mirroring; bool set_clk_output; unsigned int clk_output_sel; + bool sgmii_ref_clk_en; }; static int dp83867_config_port_mirroring(struct phy_device *phydev) @@ -235,6 +241,9 @@ static int dp83867_of_init(struct phy_device *phydev) if (ofnode_read_bool(node, "enet-phy-lane-no-swap")) dp83867->port_mirroring = DP83867_PORT_MIRRORING_DIS; + if (ofnode_read_bool(node, "ti,sgmii-ref-clock-output-enable")) + dp83867->sgmii_ref_clk_en = true; + return 0; } #else @@ -284,6 +293,9 @@ static int dp83867_config(struct phy_device *phydev) val &= ~DP83867_PHYCR_FIFO_DEPTH_MASK; val |= (dp83867->fifo_depth << DP83867_PHYCR_FIFO_DEPTH_SHIFT); + /* Do not force link good */ + val &= ~DP83867_PHYCR_FORCE_LINK_GOOD; + /* The code below checks if "port mirroring" N/A MODE4 has been * enabled during power on bootstrap. * @@ -327,6 +339,10 @@ static int dp83867_config(struct phy_device *phydev) } if (phy_interface_is_sgmii(phydev)) { + if (dp83867->sgmii_ref_clk_en) + phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_SGMIICTL, + DP83867_SGMII_TYPE); + phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, (BMCR_ANENABLE | BMCR_FULLDPLX | BMCR_SPEED1000)); diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c index efbbd31ff71..93cf44ad4cb 100644 --- a/drivers/net/phy/marvell.c +++ b/drivers/net/phy/marvell.c @@ -303,9 +303,9 @@ static int m88e1111s_config(struct phy_device *phydev) } /** - * m88e1518_phy_writebits - write bits to a register + * m88e151x_phy_writebits - write bits to a register */ -void m88e1518_phy_writebits(struct phy_device *phydev, +void m88e151x_phy_writebits(struct phy_device *phydev, u8 reg_num, u16 offset, u16 len, u16 data) { u16 reg, mask; @@ -323,7 +323,7 @@ void m88e1518_phy_writebits(struct phy_device *phydev, phy_write(phydev, MDIO_DEVAD_NONE, reg_num, reg); } -static int m88e1518_config(struct phy_device *phydev) +static int m88e151x_config(struct phy_device *phydev) { u16 reg; @@ -350,11 +350,11 @@ static int m88e1518_config(struct phy_device *phydev) phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1118_PHY_PAGE, 18); /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */ - m88e1518_phy_writebits(phydev, MIIM_88E151x_GENERAL_CTRL, + m88e151x_phy_writebits(phydev, MIIM_88E151x_GENERAL_CTRL, 0, 3, MIIM_88E151x_MODE_SGMII); /* PHY reset is necessary after changing MODE[2:0] */ - m88e1518_phy_writebits(phydev, MIIM_88E151x_GENERAL_CTRL, + m88e151x_phy_writebits(phydev, MIIM_88E151x_GENERAL_CTRL, MIIM_88E151x_RESET_OFFS, 1, 1); /* Reset page selection */ @@ -401,33 +401,6 @@ static int m88e1518_config(struct phy_device *phydev) return 0; } -/* Marvell 88E1510 */ -static int m88e1510_config(struct phy_device *phydev) -{ - /* Select page 3 */ - phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1118_PHY_PAGE, - MIIM_88E1118_PHY_LED_PAGE); - - /* Enable INTn output on LED[2] */ - m88e1518_phy_writebits(phydev, MIIM_88E151x_LED_TIMER_CTRL, - MIIM_88E151x_INT_EN_OFFS, 1, 1); - - /* Configure LEDs */ - /* LED[0]:0011 (ACT) */ - m88e1518_phy_writebits(phydev, MIIM_88E151x_LED_FUNC_CTRL, - MIIM_88E151x_LED0_OFFS, MIIM_88E151x_LED_FLD_SZ, - MIIM_88E151x_LED0_ACT); - /* LED[1]:0110 (LINK 100/1000 Mbps) */ - m88e1518_phy_writebits(phydev, MIIM_88E151x_LED_FUNC_CTRL, - MIIM_88E151x_LED1_OFFS, MIIM_88E151x_LED_FLD_SZ, - MIIM_88E151x_LED1_100_1000_LINK); - - /* Reset page selection */ - phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1118_PHY_PAGE, 0); - - return m88e1518_config(phydev); -} - /* Marvell 88E1118 */ static int m88e1118_config(struct phy_device *phydev) { @@ -685,29 +658,12 @@ static struct phy_driver M88E1149S_driver = { .shutdown = &genphy_shutdown, }; -static struct phy_driver M88E1510_driver = { - .name = "Marvell 88E1510", - .uid = 0x1410dd0, - .mask = 0xfffffff, - .features = PHY_GBIT_FEATURES, - .config = &m88e1510_config, - .startup = &m88e1011s_startup, - .shutdown = &genphy_shutdown, - .readext = &m88e1xxx_phy_extread, - .writeext = &m88e1xxx_phy_extwrite, -}; - -/* - * This supports: - * 88E1518, uid 0x1410dd1 - * 88E1512, uid 0x1410dd4 - */ -static struct phy_driver M88E1518_driver = { - .name = "Marvell 88E1518", +static struct phy_driver M88E151x_driver = { + .name = "Marvell 88E151x", .uid = 0x1410dd0, - .mask = 0xffffffa, + .mask = 0xffffff0, .features = PHY_GBIT_FEATURES, - .config = &m88e1518_config, + .config = &m88e151x_config, .startup = &m88e1011s_startup, .shutdown = &genphy_shutdown, .readext = &m88e1xxx_phy_extread, @@ -744,8 +700,7 @@ int phy_marvell_init(void) phy_register(&M88E1118R_driver); phy_register(&M88E1111S_driver); phy_register(&M88E1011S_driver); - phy_register(&M88E1510_driver); - phy_register(&M88E1518_driver); + phy_register(&M88E151x_driver); phy_register(&M88E1680_driver); return 0; diff --git a/drivers/net/phy/ncsi.c b/drivers/net/phy/ncsi.c new file mode 100644 index 00000000000..adc3ac033e0 --- /dev/null +++ b/drivers/net/phy/ncsi.c @@ -0,0 +1,897 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * NC-SI protocol configuration + * + * Copyright (C) 2019, IBM Corporation. + */ + +#include <common.h> +#include <malloc.h> +#include <phy.h> +#include <net/ncsi.h> +#include <net/ncsi-pkt.h> +#include <asm/unaligned.h> + +#define NCSI_PACKAGE_MAX 8 +#define NCSI_CHANNEL_MAX 31 + +#define NCSI_PACKAGE_SHIFT 5 +#define NCSI_PACKAGE_INDEX(c) (((c) >> NCSI_PACKAGE_SHIFT) & 0x7) +#define NCSI_RESERVED_CHANNEL 0x1f +#define NCSI_CHANNEL_INDEX(c) ((c) & ((1 << NCSI_PACKAGE_SHIFT) - 1)) +#define NCSI_TO_CHANNEL(p, c) (((p) << NCSI_PACKAGE_SHIFT) | (c)) + +#define NCSI_PKT_REVISION 0x01 + +#define NCSI_CAP_GENERIC_MASK 0x7f +#define NCSI_CAP_BC_MASK 0x0f +#define NCSI_CAP_MC_MASK 0x3f +#define NCSI_CAP_AEN_MASK 0x07 +#define NCSI_CAP_VLAN_MASK 0x07 + +static void ncsi_send_ebf(unsigned int np, unsigned int nc); +static void ncsi_send_ae(unsigned int np, unsigned int nc); +static void ncsi_send_gls(unsigned int np, unsigned int nc); +static int ncsi_send_command(unsigned int np, unsigned int nc, unsigned int cmd, + uchar *payload, int len, bool wait); + +struct ncsi_channel { + unsigned int id; + bool has_link; + + /* capabilities */ + u32 cap_generic; + u32 cap_bc; + u32 cap_mc; + u32 cap_buffer; + u32 cap_aen; + u32 cap_vlan; + + /* version information */ + struct { + u32 version; /* Supported BCD encoded NCSI version */ + u32 alpha2; /* Supported BCD encoded NCSI version */ + u8 fw_name[12]; /* Firmware name string */ + u32 fw_version; /* Firmware version */ + u16 pci_ids[4]; /* PCI identification */ + u32 mf_id; /* Manufacture ID */ + } version; + +}; + +struct ncsi_package { + unsigned int id; + unsigned int n_channels; + struct ncsi_channel *channels; +}; + +struct ncsi { + enum { + NCSI_PROBE_PACKAGE_SP, + NCSI_PROBE_PACKAGE_DP, + NCSI_PROBE_CHANNEL_SP, + NCSI_PROBE_CHANNEL, + NCSI_CONFIG, + } state; + + unsigned int pending_requests; + unsigned int requests[256]; + unsigned int last_request; + + unsigned int current_package; + unsigned int current_channel; + + unsigned int n_packages; + struct ncsi_package *packages; +}; + +struct ncsi *ncsi_priv; + +bool ncsi_active(void) +{ + unsigned int np, nc; + + if (!ncsi_priv) + return false; + + np = ncsi_priv->current_package; + nc = ncsi_priv->current_channel; + + if (ncsi_priv->state != NCSI_CONFIG) + return false; + + return np < NCSI_PACKAGE_MAX && nc < NCSI_CHANNEL_MAX && + ncsi_priv->packages[np].channels[nc].has_link; +} + +static unsigned int cmd_payload(int cmd) +{ + switch (cmd) { + case NCSI_PKT_CMD_CIS: + return 0; + case NCSI_PKT_CMD_SP: + return 4; + case NCSI_PKT_CMD_DP: + return 0; + case NCSI_PKT_CMD_EC: + return 0; + case NCSI_PKT_CMD_DC: + return 4; + case NCSI_PKT_CMD_RC: + return 4; + case NCSI_PKT_CMD_ECNT: + return 0; + case NCSI_PKT_CMD_DCNT: + return 0; + case NCSI_PKT_CMD_AE: + return 8; + case NCSI_PKT_CMD_SL: + return 8; + case NCSI_PKT_CMD_GLS: + return 0; + case NCSI_PKT_CMD_SVF: + return 8; + case NCSI_PKT_CMD_EV: + return 4; + case NCSI_PKT_CMD_DV: + return 0; + case NCSI_PKT_CMD_SMA: + return 8; + case NCSI_PKT_CMD_EBF: + return 4; + case NCSI_PKT_CMD_DBF: + return 0; + case NCSI_PKT_CMD_EGMF: + return 4; + case NCSI_PKT_CMD_DGMF: + return 0; + case NCSI_PKT_CMD_SNFC: + return 4; + case NCSI_PKT_CMD_GVI: + return 0; + case NCSI_PKT_CMD_GC: + return 0; + case NCSI_PKT_CMD_GP: + return 0; + case NCSI_PKT_CMD_GCPS: + return 0; + case NCSI_PKT_CMD_GNS: + return 0; + case NCSI_PKT_CMD_GNPTS: + return 0; + case NCSI_PKT_CMD_GPS: + return 0; + default: + printf("NCSI: Unknown command 0x%02x\n", cmd); + return 0; + } +} + +static u32 ncsi_calculate_checksum(unsigned char *data, int len) +{ + u32 checksum = 0; + int i; + + for (i = 0; i < len; i += 2) + checksum += (((u32)data[i] << 8) | data[i + 1]); + + checksum = (~checksum + 1); + return checksum; +} + +static int ncsi_validate_rsp(struct ncsi_rsp_pkt *pkt, int payload) +{ + struct ncsi_rsp_pkt_hdr *hdr = &pkt->rsp; + u32 checksum, c_offset; + __be32 pchecksum; + + if (hdr->common.revision != 1) { + printf("NCSI: 0x%02x response has unsupported revision 0x%x\n", + hdr->common.type, hdr->common.revision); + return -1; + } + + if (hdr->code != 0) { + printf("NCSI: 0x%02x response returns error %d\n", + hdr->common.type, __be16_to_cpu(hdr->code)); + if (ntohs(hdr->reason) == 0x05) + printf("(Invalid command length)\n"); + return -1; + } + + if (ntohs(hdr->common.length) != payload) { + printf("NCSI: 0x%02x response has incorrect length %d\n", + hdr->common.type, hdr->common.length); + return -1; + } + + c_offset = sizeof(struct ncsi_rsp_pkt_hdr) + payload - sizeof(checksum); + pchecksum = get_unaligned_be32((void *)hdr + c_offset); + if (pchecksum != 0) { + checksum = ncsi_calculate_checksum((unsigned char *)hdr, + c_offset); + if (pchecksum != checksum) { + printf("NCSI: 0x%02x response has invalid checksum\n", + hdr->common.type); + return -1; + } + } + + return 0; +} + +static void ncsi_rsp_ec(struct ncsi_rsp_pkt *pkt) +{ + struct ncsi_rsp_pkt_hdr *rsp = (struct ncsi_rsp_pkt_hdr *)&pkt->rsp; + unsigned int np, nc; + + np = NCSI_PACKAGE_INDEX(rsp->common.channel); + nc = NCSI_CHANNEL_INDEX(rsp->common.channel); + + if (ncsi_priv->packages[np].channels[nc].cap_aen != 0) + ncsi_send_ae(np, nc); + /* else, done */ +} + +static void ncsi_rsp_ecnt(struct ncsi_rsp_pkt *pkt) +{ + struct ncsi_rsp_pkt_hdr *rsp = (struct ncsi_rsp_pkt_hdr *)&pkt->rsp; + unsigned int np, nc; + + np = NCSI_PACKAGE_INDEX(rsp->common.channel); + nc = NCSI_CHANNEL_INDEX(rsp->common.channel); + + ncsi_send_command(np, nc, NCSI_PKT_CMD_EC, NULL, 0, true); +} + +static void ncsi_rsp_ebf(struct ncsi_rsp_pkt *pkt) +{ + struct ncsi_rsp_pkt_hdr *rsp = (struct ncsi_rsp_pkt_hdr *)&pkt->rsp; + unsigned int np, nc; + + np = NCSI_PACKAGE_INDEX(rsp->common.channel); + nc = NCSI_CHANNEL_INDEX(rsp->common.channel); + + ncsi_send_command(np, nc, NCSI_PKT_CMD_ECNT, NULL, 0, true); +} + +static void ncsi_rsp_sma(struct ncsi_rsp_pkt *pkt) +{ + struct ncsi_rsp_pkt_hdr *rsp = (struct ncsi_rsp_pkt_hdr *)&pkt->rsp; + unsigned int np, nc; + + np = NCSI_PACKAGE_INDEX(rsp->common.channel); + nc = NCSI_CHANNEL_INDEX(rsp->common.channel); + + ncsi_send_ebf(np, nc); +} + +static void ncsi_rsp_gc(struct ncsi_rsp_pkt *pkt) +{ + struct ncsi_rsp_gc_pkt *gc = (struct ncsi_rsp_gc_pkt *)pkt; + struct ncsi_rsp_pkt_hdr *rsp = (struct ncsi_rsp_pkt_hdr *)&gc->rsp; + struct ncsi_channel *c; + unsigned int np, nc; + + np = NCSI_PACKAGE_INDEX(rsp->common.channel); + nc = NCSI_CHANNEL_INDEX(rsp->common.channel); + + if (np >= ncsi_priv->n_packages || + nc >= ncsi_priv->packages[np].n_channels) { + printf("NCSI: Invalid package / channel (0x%02x, 0x%02x)\n", + np, nc); + return; + } + + c = &ncsi_priv->packages[np].channels[nc]; + c->cap_generic = ntohl(gc->cap) & NCSI_CAP_GENERIC_MASK; + c->cap_bc = ntohl(gc->bc_cap) & NCSI_CAP_BC_MASK; + c->cap_mc = ntohl(gc->mc_cap) & NCSI_CAP_MC_MASK; + c->cap_aen = ntohl(gc->aen_cap) & NCSI_CAP_AEN_MASK; + c->cap_vlan = ntohl(gc->vlan_mode) & NCSI_CAP_VLAN_MASK; + + /* End of probe for this channel */ +} + +static void ncsi_rsp_gvi(struct ncsi_rsp_pkt *pkt) +{ + struct ncsi_rsp_gvi_pkt *gvi = (struct ncsi_rsp_gvi_pkt *)pkt; + struct ncsi_rsp_pkt_hdr *rsp = (struct ncsi_rsp_pkt_hdr *)&gvi->rsp; + struct ncsi_channel *c; + unsigned int np, nc, i; + + np = NCSI_PACKAGE_INDEX(rsp->common.channel); + nc = NCSI_CHANNEL_INDEX(rsp->common.channel); + + if (np >= ncsi_priv->n_packages || + nc >= ncsi_priv->packages[np].n_channels) { + printf("NCSI: Invalid package / channel (0x%02x, 0x%02x)\n", + np, nc); + return; + } + + c = &ncsi_priv->packages[np].channels[nc]; + c->version.version = get_unaligned_be32(&gvi->ncsi_version); + c->version.alpha2 = gvi->alpha2; + memcpy(c->version.fw_name, gvi->fw_name, sizeof(c->version.fw_name)); + c->version.fw_version = get_unaligned_be32(&gvi->fw_version); + for (i = 0; i < ARRAY_SIZE(c->version.pci_ids); i++) + c->version.pci_ids[i] = get_unaligned_be16(gvi->pci_ids + i); + c->version.mf_id = get_unaligned_be32(&gvi->mf_id); + + if (ncsi_priv->state == NCSI_PROBE_CHANNEL) + ncsi_send_command(np, nc, NCSI_PKT_CMD_GC, NULL, 0, true); +} + +static void ncsi_rsp_gls(struct ncsi_rsp_pkt *pkt) +{ + struct ncsi_rsp_gls_pkt *gls = (struct ncsi_rsp_gls_pkt *)pkt; + struct ncsi_rsp_pkt_hdr *rsp = (struct ncsi_rsp_pkt_hdr *)&gls->rsp; + unsigned int np, nc; + + np = NCSI_PACKAGE_INDEX(rsp->common.channel); + nc = NCSI_CHANNEL_INDEX(rsp->common.channel); + + if (np >= ncsi_priv->n_packages || + nc >= ncsi_priv->packages[np].n_channels) { + printf("NCSI: Invalid package / channel (0x%02x, 0x%02x)\n", + np, nc); + return; + } + + ncsi_priv->packages[np].channels[nc].has_link = + !!(get_unaligned_be32(&gls->status)); + + if (ncsi_priv->state == NCSI_PROBE_CHANNEL) + ncsi_send_command(np, nc, NCSI_PKT_CMD_GVI, NULL, 0, true); +} + +static void ncsi_rsp_cis(struct ncsi_rsp_pkt *pkt) +{ + struct ncsi_rsp_pkt_hdr *rsp = (struct ncsi_rsp_pkt_hdr *)pkt; + struct ncsi_package *package; + unsigned int np, nc; + + np = NCSI_PACKAGE_INDEX(rsp->common.channel); + nc = NCSI_CHANNEL_INDEX(rsp->common.channel); + + if (np >= ncsi_priv->n_packages) { + printf("NCSI: Mystery package 0x%02x from CIS\n", np); + return; + } + + package = &ncsi_priv->packages[np]; + + if (nc < package->n_channels) { + /* + * This is fine in general but in the current design we + * don't send CIS commands to known channels. + */ + debug("NCSI: Duplicate channel 0x%02x\n", nc); + return; + } + + package->channels = realloc(package->channels, + sizeof(struct ncsi_channel) * + (package->n_channels + 1)); + if (!package->channels) { + printf("NCSI: Could not allocate memory for new channel\n"); + return; + } + + debug("NCSI: New channel 0x%02x\n", nc); + + package->channels[nc].id = nc; + package->channels[nc].has_link = false; + package->n_channels++; + + ncsi_send_gls(np, nc); +} + +static void ncsi_rsp_dp(struct ncsi_rsp_pkt *pkt) +{ + struct ncsi_rsp_pkt_hdr *rsp = (struct ncsi_rsp_pkt_hdr *)pkt; + unsigned int np; + + /* No action needed */ + + np = NCSI_PACKAGE_INDEX(rsp->common.channel); + if (np >= ncsi_priv->n_packages) + debug("NCSI: DP response from unknown package %d\n", np); +} + +static void ncsi_rsp_sp(struct ncsi_rsp_pkt *pkt) +{ + struct ncsi_rsp_pkt_hdr *rsp = (struct ncsi_rsp_pkt_hdr *)pkt; + unsigned int np; + + np = NCSI_PACKAGE_INDEX(rsp->common.channel); + + if (np < ncsi_priv->n_packages) { + /* Already know about this package */ + debug("NCSI: package 0x%02x selected\n", np); + return; + } + + debug("NCSI: adding new package %d\n", np); + + ncsi_priv->packages = realloc(ncsi_priv->packages, + sizeof(struct ncsi_package) * + (ncsi_priv->n_packages + 1)); + if (!ncsi_priv->packages) { + printf("NCSI: could not allocate memory for new package\n"); + return; + } + + ncsi_priv->packages[np].id = np; + ncsi_priv->packages[np].n_channels = 0; + ncsi_priv->packages[np].channels = NULL; + ncsi_priv->n_packages++; +} + +static void ncsi_update_state(struct ncsi_rsp_pkt_hdr *nh) +{ + bool timeout = !nh; + int np, nc; + + switch (ncsi_priv->state) { + case NCSI_PROBE_PACKAGE_SP: + if (!timeout && + ncsi_priv->current_package + 1 < NCSI_PACKAGE_MAX) { + ncsi_priv->current_package++; + } else { + ncsi_priv->state = NCSI_PROBE_PACKAGE_DP; + ncsi_priv->current_package = 0; + } + return ncsi_probe_packages(); + case NCSI_PROBE_PACKAGE_DP: + if (ncsi_priv->current_package + 1 < ncsi_priv->n_packages && + !timeout) { + ncsi_priv->current_package++; + } else { + if (!ncsi_priv->n_packages) { + printf("NCSI: no packages found\n"); + net_set_state(NETLOOP_FAIL); + return; + } + printf("NCSI: probing channels\n"); + ncsi_priv->state = NCSI_PROBE_CHANNEL_SP; + ncsi_priv->current_package = 0; + ncsi_priv->current_channel = 0; + } + return ncsi_probe_packages(); + case NCSI_PROBE_CHANNEL_SP: + if (!timeout && nh->common.type == NCSI_PKT_RSP_SP) { + ncsi_priv->state = NCSI_PROBE_CHANNEL; + return ncsi_probe_packages(); + } + printf("NCSI: failed to select package 0x%0x2 or timeout\n", + ncsi_priv->current_package); + net_set_state(NETLOOP_FAIL); + break; + case NCSI_PROBE_CHANNEL: + // TODO only does package 0 for now + if (ncsi_priv->pending_requests == 0) { + np = ncsi_priv->current_package; + nc = ncsi_priv->current_channel; + + /* Configure first channel that has link */ + if (ncsi_priv->packages[np].channels[nc].has_link) { + ncsi_priv->state = NCSI_CONFIG; + } else if (ncsi_priv->current_channel + 1 < + NCSI_CHANNEL_MAX) { + ncsi_priv->current_channel++; + } else { + // XXX As above only package 0 + printf("NCSI: no channel found with link\n"); + net_set_state(NETLOOP_FAIL); + return; + } + return ncsi_probe_packages(); + } + break; + case NCSI_CONFIG: + if (ncsi_priv->pending_requests == 0) { + printf("NCSI: configuration done!\n"); + net_set_state(NETLOOP_SUCCESS); + } else if (timeout) { + printf("NCSI: timeout during configure\n"); + net_set_state(NETLOOP_FAIL); + } + break; + default: + printf("NCSI: something went very wrong, nevermind\n"); + net_set_state(NETLOOP_FAIL); + break; + } +} + +static void ncsi_timeout_handler(void) +{ + if (ncsi_priv->pending_requests) + ncsi_priv->pending_requests--; + + ncsi_update_state(NULL); +} + +static int ncsi_send_command(unsigned int np, unsigned int nc, unsigned int cmd, + uchar *payload, int len, bool wait) +{ + struct ncsi_pkt_hdr *hdr; + __be32 *pchecksum; + int eth_hdr_size; + u32 checksum; + uchar *pkt, *start; + int final_len; + + pkt = calloc(1, PKTSIZE_ALIGN + PKTALIGN); + if (!pkt) + return -ENOMEM; + start = pkt; + + eth_hdr_size = net_set_ether(pkt, net_bcast_ethaddr, PROT_NCSI); + pkt += eth_hdr_size; + + /* Set NCSI command header fields */ + hdr = (struct ncsi_pkt_hdr *)pkt; + hdr->mc_id = 0; + hdr->revision = NCSI_PKT_REVISION; + hdr->id = ++ncsi_priv->last_request; + ncsi_priv->requests[ncsi_priv->last_request] = 1; + hdr->type = cmd; + hdr->channel = NCSI_TO_CHANNEL(np, nc); + hdr->length = htons(len); + + if (payload && len) + memcpy(pkt + sizeof(struct ncsi_pkt_hdr), payload, len); + + /* Calculate checksum */ + checksum = ncsi_calculate_checksum((unsigned char *)hdr, + sizeof(*hdr) + len); + pchecksum = (__be32 *)((void *)(hdr + 1) + len); + put_unaligned_be32(htonl(checksum), pchecksum); + + if (wait) { + net_set_timeout_handler(1000UL, ncsi_timeout_handler); + ncsi_priv->pending_requests++; + } + + if (len < 26) + len = 26; + /* frame header, packet header, payload, checksum */ + final_len = eth_hdr_size + sizeof(struct ncsi_cmd_pkt_hdr) + len + 4; + + net_send_packet(start, final_len); + free(start); + return 0; +} + +static void ncsi_handle_aen(struct ip_udp_hdr *ip, unsigned int len) +{ + struct ncsi_aen_pkt_hdr *hdr = (struct ncsi_aen_pkt_hdr *)ip; + int payload, i; + __be32 pchecksum; + u32 checksum; + + switch (hdr->type) { + case NCSI_PKT_AEN_LSC: + printf("NCSI: link state changed\n"); + payload = 12; + break; + case NCSI_PKT_AEN_CR: + printf("NCSI: re-configuration required\n"); + payload = 4; + break; + case NCSI_PKT_AEN_HNCDSC: + /* Host notifcation - N/A but weird */ + debug("NCSI: HNCDSC AEN received\n"); + return; + default: + printf("%s: Invalid type 0x%02x\n", __func__, hdr->type); + return; + } + + /* Validate packet */ + if (hdr->common.revision != 1) { + printf("NCSI: 0x%02x response has unsupported revision 0x%x\n", + hdr->common.type, hdr->common.revision); + return; + } + + if (ntohs(hdr->common.length) != payload) { + printf("NCSI: 0x%02x response has incorrect length %d\n", + hdr->common.type, hdr->common.length); + return; + } + + pchecksum = get_unaligned_be32((void *)(hdr + 1) + payload - 4); + if (pchecksum != 0) { + checksum = ncsi_calculate_checksum((unsigned char *)hdr, + sizeof(*hdr) + payload - 4); + if (pchecksum != checksum) { + printf("NCSI: 0x%02x response has invalid checksum\n", + hdr->common.type); + return; + } + } + + /* Link or configuration lost - just redo the discovery process */ + ncsi_priv->state = NCSI_PROBE_PACKAGE_SP; + for (i = 0; i < ncsi_priv->n_packages; i++) + free(ncsi_priv->packages[i].channels); + free(ncsi_priv->packages); + ncsi_priv->n_packages = 0; + + ncsi_priv->current_package = NCSI_PACKAGE_MAX; + ncsi_priv->current_channel = NCSI_CHANNEL_MAX; + + ncsi_probe_packages(); +} + +void ncsi_receive(struct ethernet_hdr *et, struct ip_udp_hdr *ip, + unsigned int len) +{ + struct ncsi_rsp_pkt *pkt = (struct ncsi_rsp_pkt *)ip; + struct ncsi_rsp_pkt_hdr *nh = (struct ncsi_rsp_pkt_hdr *)&pkt->rsp; + void (*handler)(struct ncsi_rsp_pkt *pkt) = NULL; + unsigned short payload; + + if (ncsi_priv->pending_requests) + ncsi_priv->pending_requests--; + + if (len < sizeof(struct ncsi_rsp_pkt_hdr)) { + printf("NCSI: undersized packet: %u bytes\n", len); + goto out; + } + + if (nh->common.type == NCSI_PKT_AEN) + return ncsi_handle_aen(ip, len); + + switch (nh->common.type) { + case NCSI_PKT_RSP_SP: + payload = 4; + handler = ncsi_rsp_sp; + break; + case NCSI_PKT_RSP_DP: + payload = 4; + handler = ncsi_rsp_dp; + break; + case NCSI_PKT_RSP_CIS: + payload = 4; + handler = ncsi_rsp_cis; + break; + case NCSI_PKT_RSP_GLS: + payload = 16; + handler = ncsi_rsp_gls; + break; + case NCSI_PKT_RSP_GVI: + payload = 40; + handler = ncsi_rsp_gvi; + break; + case NCSI_PKT_RSP_GC: + payload = 32; + handler = ncsi_rsp_gc; + break; + case NCSI_PKT_RSP_SMA: + payload = 4; + handler = ncsi_rsp_sma; + break; + case NCSI_PKT_RSP_EBF: + payload = 4; + handler = ncsi_rsp_ebf; + break; + case NCSI_PKT_RSP_ECNT: + payload = 4; + handler = ncsi_rsp_ecnt; + break; + case NCSI_PKT_RSP_EC: + payload = 4; + handler = ncsi_rsp_ec; + break; + case NCSI_PKT_RSP_AE: + payload = 4; + handler = NULL; + break; + default: + printf("NCSI: unsupported packet type 0x%02x\n", + nh->common.type); + goto out; + } + + if (ncsi_validate_rsp(pkt, payload) != 0) { + printf("NCSI: discarding invalid packet of type 0x%02x\n", + nh->common.type); + goto out; + } + + if (handler) + handler(pkt); +out: + ncsi_update_state(nh); +} + +static void ncsi_send_sp(unsigned int np) +{ + uchar payload[4] = {0}; + + ncsi_send_command(np, NCSI_RESERVED_CHANNEL, NCSI_PKT_CMD_SP, + (unsigned char *)&payload, + cmd_payload(NCSI_PKT_CMD_SP), true); +} + +static void ncsi_send_dp(unsigned int np) +{ + ncsi_send_command(np, NCSI_RESERVED_CHANNEL, NCSI_PKT_CMD_DP, NULL, 0, + true); +} + +static void ncsi_send_gls(unsigned int np, unsigned int nc) +{ + ncsi_send_command(np, nc, NCSI_PKT_CMD_GLS, NULL, 0, true); +} + +static void ncsi_send_cis(unsigned int np, unsigned int nc) +{ + ncsi_send_command(np, nc, NCSI_PKT_CMD_CIS, NULL, 0, true); +} + +static void ncsi_send_ae(unsigned int np, unsigned int nc) +{ + struct ncsi_cmd_ae_pkt cmd; + + memset(&cmd, 0, sizeof(cmd)); + cmd.mode = htonl(ncsi_priv->packages[np].channels[nc].cap_aen); + + ncsi_send_command(np, nc, NCSI_PKT_CMD_AE, + ((unsigned char *)&cmd) + + sizeof(struct ncsi_cmd_pkt_hdr), + cmd_payload(NCSI_PKT_CMD_AE), true); +} + +static void ncsi_send_ebf(unsigned int np, unsigned int nc) +{ + struct ncsi_cmd_ebf_pkt cmd; + + memset(&cmd, 0, sizeof(cmd)); + cmd.mode = htonl(ncsi_priv->packages[np].channels[nc].cap_bc); + + ncsi_send_command(np, nc, NCSI_PKT_CMD_EBF, + ((unsigned char *)&cmd) + + sizeof(struct ncsi_cmd_pkt_hdr), + cmd_payload(NCSI_PKT_CMD_EBF), true); +} + +static void ncsi_send_sma(unsigned int np, unsigned int nc) +{ + struct ncsi_cmd_sma_pkt cmd; + unsigned char *addr, i; + + addr = eth_get_ethaddr(); + if (!addr) { + printf("NCSI: no MAC address configured\n"); + return; + } + + memset(&cmd, 0, sizeof(cmd)); + for (i = 0; i < ARP_HLEN; i++) + cmd.mac[i] = addr[i]; + cmd.index = 1; + cmd.at_e = 1; + + ncsi_send_command(np, nc, NCSI_PKT_CMD_SMA, + ((unsigned char *)&cmd) + + sizeof(struct ncsi_cmd_pkt_hdr), + cmd_payload(NCSI_PKT_CMD_SMA), true); +} + +void ncsi_probe_packages(void) +{ + struct ncsi_package *package; + unsigned int np, nc; + + switch (ncsi_priv->state) { + case NCSI_PROBE_PACKAGE_SP: + if (ncsi_priv->current_package == NCSI_PACKAGE_MAX) + ncsi_priv->current_package = 0; + ncsi_send_sp(ncsi_priv->current_package); + break; + case NCSI_PROBE_PACKAGE_DP: + ncsi_send_dp(ncsi_priv->current_package); + break; + case NCSI_PROBE_CHANNEL_SP: + if (ncsi_priv->n_packages > 0) + ncsi_send_sp(ncsi_priv->current_package); + else + printf("NCSI: no packages discovered, configuration not possible\n"); + break; + case NCSI_PROBE_CHANNEL: + /* Kicks off chain of channel discovery */ + ncsi_send_cis(ncsi_priv->current_package, + ncsi_priv->current_channel); + break; + case NCSI_CONFIG: + for (np = 0; np < ncsi_priv->n_packages; np++) { + package = &ncsi_priv->packages[np]; + for (nc = 0; nc < package->n_channels; nc++) + if (package->channels[nc].has_link) + break; + if (nc < package->n_channels) + break; + } + if (np == ncsi_priv->n_packages) { + printf("NCSI: no link available\n"); + return; + } + + printf("NCSI: configuring channel %d\n", nc); + ncsi_priv->current_package = np; + ncsi_priv->current_channel = nc; + /* Kicks off rest of configure chain */ + ncsi_send_sma(np, nc); + break; + default: + printf("NCSI: unknown state 0x%x\n", ncsi_priv->state); + } +} + +int ncsi_probe(struct phy_device *phydev) +{ + if (!phydev->priv) { + phydev->priv = malloc(sizeof(struct ncsi)); + if (!phydev->priv) + return -ENOMEM; + memset(phydev->priv, 0, sizeof(struct ncsi)); + } + + ncsi_priv = phydev->priv; + + return 0; +} + +int ncsi_startup(struct phy_device *phydev) +{ + /* Set phydev parameters */ + phydev->speed = SPEED_100; + phydev->duplex = DUPLEX_FULL; + /* Normal phy reset is N/A */ + phydev->flags |= PHY_FLAG_BROKEN_RESET; + + /* Set initial probe state */ + ncsi_priv->state = NCSI_PROBE_PACKAGE_SP; + + /* No active package/channel yet */ + ncsi_priv->current_package = NCSI_PACKAGE_MAX; + ncsi_priv->current_channel = NCSI_CHANNEL_MAX; + + /* Pretend link works so the MAC driver sets final bits up */ + phydev->link = true; + + /* Set ncsi_priv so we can use it when called from net_loop() */ + ncsi_priv = phydev->priv; + + return 0; +} + +int ncsi_shutdown(struct phy_device *phydev) +{ + printf("NCSI: Disabling package %d\n", ncsi_priv->current_package); + ncsi_send_dp(ncsi_priv->current_package); + return 0; +} + +static struct phy_driver ncsi_driver = { + .uid = PHY_NCSI_ID, + .mask = 0xffffffff, + .name = "NC-SI", + .features = PHY_100BT_FEATURES | PHY_DEFAULT_FEATURES | + SUPPORTED_100baseT_Full | SUPPORTED_MII, + .probe = ncsi_probe, + .startup = ncsi_startup, + .shutdown = ncsi_shutdown, +}; + +int phy_ncsi_init(void) +{ + phy_register(&ncsi_driver); + return 0; +} diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index 80a7664e497..505d3ab6590 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -244,7 +244,7 @@ int genphy_update_link(struct phy_device *phydev) /* * Timeout reached ? */ - if (i > PHY_ANEG_TIMEOUT) { + if (i > (PHY_ANEG_TIMEOUT / 50)) { printf(" TIMEOUT !\n"); phydev->link = 0; return -ETIMEDOUT; @@ -545,6 +545,9 @@ int phy_init(void) #ifdef CONFIG_PHY_FIXED phy_fixed_init(); #endif +#ifdef CONFIG_PHY_NCSI + phy_ncsi_init(); +#endif #ifdef CONFIG_PHY_XILINX_GMII2RGMII phy_xilinx_gmii2rgmii_init(); #endif @@ -1002,6 +1005,12 @@ struct phy_device *phy_connect(struct mii_dev *bus, int addr, #ifdef CONFIG_PHY_FIXED phydev = phy_connect_fixed(bus, dev, interface); #endif + +#ifdef CONFIG_PHY_NCSI + if (!phydev) + phydev = phy_device_create(bus, 0, PHY_NCSI_ID, false, interface); +#endif + #ifdef CONFIG_PHY_XILINX_GMII2RGMII if (!phydev) phydev = phy_connect_gmii2rgmii(bus, dev, interface); diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 288037e2a0f..5f2f87d352c 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -655,14 +655,16 @@ static int zynq_gem_probe(struct udevice *dev) return -ENOMEM; memset(priv->rxbuffers, 0, RX_BUF * PKTSIZE_ALIGN); - u32 addr = (ulong)priv->rxbuffers; + ulong addr = (ulong)priv->rxbuffers; flush_dcache_range(addr, addr + roundup(RX_BUF * PKTSIZE_ALIGN, ARCH_DMA_MINALIGN)); barrier(); /* Align bd_space to MMU_SECTION_SHIFT */ bd_space = memalign(1 << MMU_SECTION_SHIFT, BD_SPACE); - if (!bd_space) - return -ENOMEM; + if (!bd_space) { + ret = -ENOMEM; + goto err1; + } mmu_set_region_dcache_behaviour((phys_addr_t)bd_space, BD_SPACE, DCACHE_OFF); @@ -674,7 +676,7 @@ static int zynq_gem_probe(struct udevice *dev) ret = clk_get_by_name(dev, "tx_clk", &priv->clk); if (ret < 0) { dev_err(dev, "failed to get clock\n"); - return -EINVAL; + goto err1; } priv->bus = mdio_alloc(); @@ -684,9 +686,19 @@ static int zynq_gem_probe(struct udevice *dev) ret = mdio_register_seq(priv->bus, dev->seq); if (ret) - return ret; + goto err2; - return zynq_phy_init(dev); + ret = zynq_phy_init(dev); + if (ret) + goto err2; + + return ret; + +err2: + free(priv->rxbuffers); +err1: + free(priv->tx_bd); + return ret; } static int zynq_gem_remove(struct udevice *dev) diff --git a/drivers/rng/stm32mp1_rng.c b/drivers/rng/stm32mp1_rng.c index dab3b995eb6..e0f0a66c6e7 100644 --- a/drivers/rng/stm32mp1_rng.c +++ b/drivers/rng/stm32mp1_rng.c @@ -33,7 +33,7 @@ struct stm32_rng_platdata { static int stm32_rng_read(struct udevice *dev, void *data, size_t len) { - int retval = 0, i; + int retval, i; u32 sr, count, reg; size_t increment; struct stm32_rng_platdata *pdata = dev_get_platdata(dev); diff --git a/drivers/rtc/m41t62.c b/drivers/rtc/m41t62.c index 6161b767128..f52e1291a98 100644 --- a/drivers/rtc/m41t62.c +++ b/drivers/rtc/m41t62.c @@ -173,6 +173,7 @@ static const struct rtc_ops m41t62_rtc_ops = { static const struct udevice_id m41t62_rtc_ids[] = { { .compatible = "st,m41t62" }, { .compatible = "st,m41t82" }, + { .compatible = "st,m41st87" }, { .compatible = "microcrystal,rv4162" }, { } }; diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 1fcbc350154..c1b303ffcba 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -479,12 +479,40 @@ static int ns16550_serial_getinfo(struct udevice *dev, return 0; } +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) +static int ns1655_serial_set_base_addr(struct udevice *dev) +{ + fdt_addr_t addr; + struct ns16550_platdata *plat; + + plat = dev_get_platdata(dev); + + addr = dev_read_addr_pci(dev); + if (addr == FDT_ADDR_T_NONE) + return -EINVAL; + +#ifdef CONFIG_SYS_NS16550_PORT_MAPPED + plat->base = addr; +#else + plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE); +#endif + + return 0; +} +#endif + int ns16550_serial_probe(struct udevice *dev) { struct NS16550 *const com_port = dev_get_priv(dev); struct reset_ctl_bulk reset_bulk; int ret; +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) + ret = ns1655_serial_set_base_addr(dev); + if (ret) + return ret; +#endif + ret = reset_get_bulk(dev, &reset_bulk); if (!ret) reset_deassert_bulk(&reset_bulk); @@ -507,21 +535,9 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev) { struct ns16550_platdata *plat = dev->platdata; const u32 port_type = dev_get_driver_data(dev); - fdt_addr_t addr; struct clk clk; int err; - /* try Processor Local Bus device first */ - addr = dev_read_addr_pci(dev); - if (addr == FDT_ADDR_T_NONE) - return -EINVAL; - -#ifdef CONFIG_SYS_NS16550_PORT_MAPPED - plat->base = addr; -#else - plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE); -#endif - plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0); plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0); plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1); diff --git a/drivers/usb/gadget/f_dfu.c b/drivers/usb/gadget/f_dfu.c index 67561551330..a4a57ba5f59 100644 --- a/drivers/usb/gadget/f_dfu.c +++ b/drivers/usb/gadget/f_dfu.c @@ -596,6 +596,11 @@ dfu_handle(struct usb_function *f, const struct usb_ctrlrequest *ctrl) debug("req_type: 0x%x ctrl->bRequest: 0x%x f_dfu->dfu_state: 0x%x\n", req_type, ctrl->bRequest, f_dfu->dfu_state); +#ifdef CONFIG_DFU_TIMEOUT + /* Forbid aborting by timeout. Next dfu command may update this */ + dfu_set_timeout(0); +#endif + if (req_type == USB_TYPE_STANDARD) { if (ctrl->bRequest == USB_REQ_GET_DESCRIPTOR && (w_value >> 8) == DFU_DT_FUNC) { diff --git a/drivers/usb/gadget/f_thor.c b/drivers/usb/gadget/f_thor.c index 5a023a2b34c..ee646fdd5ce 100644 --- a/drivers/usb/gadget/f_thor.c +++ b/drivers/usb/gadget/f_thor.c @@ -174,7 +174,7 @@ static long long int download_head(unsigned long long total, transfer_buffer, THOR_STORE_UNIT_SIZE, (*cnt)++); if (ret) { - pr_err("DFU write failed [%d] cnt: %d", + pr_err("DFU write failed [%d] cnt: %d\n", ret, *cnt); return ret; } @@ -224,14 +224,14 @@ static int download_tail(long long int left, int cnt) transfer_buffer = dfu_get_buf(dfu_entity); if (!transfer_buffer) { - pr_err("Transfer buffer not allocated!"); + pr_err("Transfer buffer not allocated!\n"); return -ENXIO; } if (left) { ret = dfu_write(dfu_entity, transfer_buffer, left, cnt++); if (ret) { - pr_err("DFU write failed [%d]: left: %llu", ret, left); + pr_err("DFU write failed[%d]: left: %llu\n", ret, left); return ret; } } @@ -245,7 +245,7 @@ static int download_tail(long long int left, int cnt) */ ret = dfu_flush(dfu_entity, transfer_buffer, 0, cnt); if (ret) - pr_err("DFU flush failed!"); + pr_err("DFU flush failed!\n"); return ret; } @@ -290,7 +290,7 @@ static long long int process_rqt_download(const struct rqt_box *rqt) alt_setting_num = dfu_get_alt(f_name); if (alt_setting_num < 0) { - pr_err("Alt setting [%d] to write not found!", + pr_err("Alt setting [%d] to write not found!\n", alt_setting_num); rsp->ack = -ENODEV; ret = rsp->ack; @@ -316,7 +316,7 @@ static long long int process_rqt_download(const struct rqt_box *rqt) debug("DL EXIT\n"); break; default: - pr_err("Operation not supported: %d", rqt->rqt_data); + pr_err("Operation not supported: %d\n", rqt->rqt_data); ret = -ENOTSUPP; } @@ -347,7 +347,7 @@ static int process_data(void) puts("RQT: UPLOAD not supported!\n"); break; default: - pr_err("unknown request (%d)", rqt->rqt); + pr_err("unknown request (%d)\n", rqt->rqt); } return ret; @@ -546,7 +546,7 @@ static int thor_rx_data(void) status = usb_ep_queue(dev->out_ep, dev->out_req, 0); if (status) { - pr_err("kill %s: resubmit %d bytes --> %d", + pr_err("kill %s: resubmit %d bytes --> %d\n", dev->out_ep->name, dev->out_req->length, status); usb_ep_set_halt(dev->out_ep); return -EAGAIN; @@ -580,7 +580,7 @@ static void thor_tx_data(unsigned char *data, int len) status = usb_ep_queue(dev->in_ep, dev->in_req, 0); if (status) { - pr_err("kill %s: resubmit %d bytes --> %d", + pr_err("kill %s: resubmit %d bytes --> %d\n", dev->in_ep->name, dev->in_req->length, status); usb_ep_set_halt(dev->in_ep); } @@ -613,7 +613,7 @@ static void thor_rx_tx_complete(struct usb_ep *ep, struct usb_request *req) case -ESHUTDOWN: /* disconnect from host */ case -EREMOTEIO: /* short read */ case -EOVERFLOW: - pr_err("ERROR:%d", status); + pr_err("ERROR:%d\n", status); break; } @@ -653,7 +653,7 @@ thor_func_setup(struct usb_function *f, const struct usb_ctrlrequest *ctrl) break; default: - pr_err("thor_setup: unknown request: %d", ctrl->bRequest); + pr_err("thor_setup: unknown request: %d\n", ctrl->bRequest); } if (value >= 0) { @@ -984,7 +984,7 @@ static int thor_func_set_alt(struct usb_function *f, debug("Communication Data interface\n"); result = thor_eps_setup(f); if (result) - pr_err("%s: EPs setup failed!", __func__); + pr_err("%s: EPs setup failed!\n", __func__); dev->configuration_done = 1; break; } diff --git a/drivers/video/meson/meson_vpu.c b/drivers/video/meson/meson_vpu.c index 4eb66398d09..aa8c0a962fa 100644 --- a/drivers/video/meson/meson_vpu.c +++ b/drivers/video/meson/meson_vpu.c @@ -210,5 +210,5 @@ U_BOOT_DRIVER(meson_vpu) = { .probe = meson_vpu_probe, .bind = meson_vpu_bind, .priv_auto_alloc_size = sizeof(struct meson_vpu_priv), - .flags = DM_FLAG_PRE_RELOC, + .flags = DM_FLAG_PRE_RELOC | DM_FLAG_REMOVE_WITH_PD_ON, }; diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 36fbdce5520..d24c1e48353 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -2,6 +2,7 @@ menu "Watchdog Timer Support" config WATCHDOG bool "Enable U-Boot watchdog reset" + depends on !HW_WATCHDOG help This option enables U-Boot watchdog support where U-Boot is using watchdog_reset function to service watchdog device in U-Boot. Enable @@ -118,7 +119,7 @@ config WDT_CORTINA config WDT_MPC8xx bool "MPC8xx watchdog timer support" depends on WDT && MPC8xx - select CONFIG_MPC8xx_WATCHDOG + select HW_WATCHDOG help Select this to enable mpc8xx watchdog timer diff --git a/drivers/watchdog/mpc8xx_wdt.c b/drivers/watchdog/mpc8xx_wdt.c index 675b62d8b39..30758aeed4c 100644 --- a/drivers/watchdog/mpc8xx_wdt.c +++ b/drivers/watchdog/mpc8xx_wdt.c @@ -10,7 +10,7 @@ #include <asm/cpm_8xx.h> #include <asm/io.h> -static void hw_watchdog_reset(void) +void hw_watchdog_reset(void) { immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR; diff --git a/env/mmc.c b/env/mmc.c index b24c35cec94..251ad07d7c0 100644 --- a/env/mmc.c +++ b/env/mmc.c @@ -353,6 +353,7 @@ static int env_mmc_load(void) int ret; int dev = mmc_get_env_dev(); const char *errmsg; + env_t *ep = NULL; mmc = find_mmc_device(dev); @@ -374,6 +375,10 @@ static int env_mmc_load(void) } ret = env_import(buf, 1); + if (!ret) { + ep = (env_t *)buf; + gd->env_addr = (ulong)&ep->data; + } fini: fini_mmc_for_env(mmc); diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index 520da5027ef..6528f1fa622 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -46,10 +46,13 @@ #define CONFIG_MAX_MEM_MAPPED (0x80000000u - DRAM_RSV_SIZE) #define CONFIG_SYS_MONITOR_BASE 0x00000000 -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) +#define CONFIG_SYS_MONITOR_LEN (1 * 1024 * 1024) #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) #define CONFIG_SYS_BOOTM_LEN (64 << 20) +/* The HF/QSPI layout permits up to 1 MiB large bootloader blob */ +#define CONFIG_BOARD_SIZE_LIMIT 1048576 + /* ENV setting */ #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/socfpga_arria5_secu1.h b/include/configs/socfpga_arria5_secu1.h new file mode 100644 index 00000000000..b059100ccd4 --- /dev/null +++ b/include/configs/socfpga_arria5_secu1.h @@ -0,0 +1,131 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2017-2020 ABB + * + */ +#ifndef __CONFIG_SOCFPGA_SECU1_H__ +#define __CONFIG_SOCFPGA_SECU1_H__ + +#include <asm/arch/base_addr_ac5.h> + +/* Call misc_init_r */ +#define CONFIG_MISC_INIT_R + +#define CONFIG_HUSH_INIT_VAR +/* Eternal oscillator */ +#define CONFIG_SYS_TIMER_RATE 40000000 + +/* Memory configurations */ +#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512MiB on SECU1 */ + +/* + * We use bootcounter in i2c nvram of the RTC (0x68) + * The offset fopr the bootcounter is 0x9e, which are + * the last two bytes of the 128 bytes large NVRAM in the + * RTC which begin at address 0x20 + */ +#define CONFIG_SYS_I2C_RTC_ADDR 0x68 + +/* Booting Linux */ +#define CONFIG_BOOTDELAY 2 +#define CONFIG_BOOTFILE "zImage" +#define CONFIG_BOOTARGS \ + "console=ttyS0," __stringify(CONFIG_BAUDRATE) \ + " ubi.fm_autoconvert=1" \ + " uio_pdrv_genirq.of_id=\"idq,regbank\"" + +#define CONFIG_BOOTCOMMAND \ + "setenv bootcmd '" \ + "bridge enable; " \ + "if test ${bootnum} = \"b\"; " \ + "then run _fpga_loadsafe; " \ + "else if test ${bootcount} -eq 4; then echo \"Switching copy...\"; setexpr x $bootnum % 2 && setexpr bootnum $x + 1; saveenv; fi; " \ + "run _fpga_loaduser; " \ + "fi;" \ + "echo \"Booting bank $bootnum\" && run userload && run userboot;" \ + "' && " \ + "setenv altbootcmd 'setenv bootnum b && saveenv && boot;' && " \ + "saveenv && saveenv && boot;" + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SYS_BOOTM_LEN (64 << 20) + +/* Environment settings */ +#define CONFIG_ENV_OVERWRITE + +/* + * Autoboot + * + * After 45s of inactivity in the prompt, the board will reset. + * Set 'bootretry' in the environment to -1 to disable this behavior + */ +#define CONFIG_BOOT_RETRY_TIME 45 +#define CONFIG_RESET_TO_RETRY + +#define CONFIG_LOADADDR 0x01000000 +#define CONFIG_SYS_LOAD_ADDR CONFIG_KM_KERNEL_ADDR + +/* + * FPGA Remote Update related environment + * + * Note that since those commands access the FPGA, the HPS-to-FPGA + * bridges MUST have been previously enabled (for example + * with 'bridge enable'). + */ +#define FPGA_RMTU_ENV \ + "rmtu_page=0xFF29000C\0" \ + "rmtu_reconfig=0xFF290018\0" \ + "fpga_safebase=0x0\0" \ + "fpga_userbase=0x2000000\0" \ + "_fpga_loaduser=echo Loading FPGA USER image..." \ + " && mw ${rmtu_page} ${fpga_userbase} && mw ${rmtu_reconfig} 1\0" \ + "_fpga_loadsafe=echo Loading FPGA SAFE image..." \ + " && mw ${rmtu_page} ${fpga_safebase} && mw ${rmtu_reconfig} 1\0" \ + +#define CONFIG_KM_NEW_ENV \ + "newenv=" \ + "nand erase 0x100000 0x40000\0" + +#define CONFIG_KM_DEF_ENV_BOOTTARGETS \ + "release=" \ + "run newenv; reset\0" \ + "develop=" \ + "tftp 0x200000 scripts/develop-secu.txt && env import -t 0x200000 ${filesize} && saveenv && reset\0" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + FPGA_RMTU_ENV \ + CONFIG_KM_DEF_ENV_BOOTTARGETS \ + CONFIG_KM_NEW_ENV \ + "socfpga_legacy_reset_compat=1\0" \ + "altbootcmd=run bootcmd;\0" \ + "bootlimit=6\0" \ + "bootnum=1\0" \ + "bootretry=" __stringify(CONFIG_BOOT_RETRY_TIME) "\0" \ + "fdt_addr=" __stringify(CONFIG_KM_FDT_ADDR) "\0" \ + "load=tftpboot ${loadaddr} u-boot-with-nand-spl.sfp\0" \ + "loadaddr=" __stringify(CONFIG_KM_KERNEL_ADDR) "\0" \ + "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ + "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ + "update=nand erase 0x0 0x00100000 && nand write ${loadaddr} 0x0 ${filesize}\0" \ + "userload=ubi part nand.ubi &&" \ + "ubi check rootfs$bootnum &&" \ + "ubi read $fdt_addr dtb$bootnum &&" \ + "ubi read $loadaddr kernel$bootnum\0" \ + "userboot=setenv bootargs " CONFIG_BOOTARGS \ + " ubi.mtd=1 ubi.block=0,rootfs$bootnum root=/dev/ubiblock0_$ubivolid" \ + " ro rootfstype=squashfs init=sbin/preinit;" \ + "bootz ${loadaddr} - ${fdt_addr}\0" \ + "verify=y\0" + +/* The rest of the configuration is shared */ +#include <configs/socfpga_common.h> + +#ifdef CONFIG_SPL_NAND_SUPPORT +#undef CONFIG_SYS_NAND_U_BOOT_OFFS +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 +#endif + +#undef CONFIG_WATCHDOG_TIMEOUT_MSECS +#define CONFIG_WATCHDOG_TIMEOUT_MSECS 60000 + +#endif /* __CONFIG_SOCFPGA_SECU1_H__ */ diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 8d10469e7c3..ec418436953 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -94,12 +94,13 @@ * L4 OSC1 Timer 0 */ #ifndef CONFIG_TIMER -/* This timer uses eosc1, whose clock frequency is fixed at any condition. */ #define CONFIG_SYS_TIMERBASE SOCFPGA_OSC1TIMER0_ADDRESS #define CONFIG_SYS_TIMER_COUNTS_DOWN #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) +#ifndef CONFIG_SYS_TIMER_RATE #define CONFIG_SYS_TIMER_RATE 25000000 #endif +#endif /* * L4 Watchdog @@ -120,6 +121,7 @@ * NAND Support */ #ifdef CONFIG_NAND_DENALI +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_ONFI_DETECTION #define CONFIG_SYS_NAND_REGS_BASE SOCFPGA_NANDREGS_ADDRESS diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index b95fb9c93fa..55fa85ed625 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -160,6 +160,7 @@ "emmcboot=mmcsetn && run bootcmd_mmc${mmc_first_dev}\0" \ "nandboot=run bootcmd_ubifs0\0" \ "norboot=run tftpboot\0" \ + "sdboot=sdsetn && run bootcmd_mmc${sd_first_dev}\0" \ "usbboot=run bootcmd_usb0\0" \ "emmcscript=setenv devtype mmc && " \ "mmcsetn && " \ @@ -170,6 +171,10 @@ "ubifsmount ubi0:boot && " \ "ubifsload ${loadaddr} ${script} && " \ "source $loadaddr\0" \ + "sdscript=setenv devtype mmc && " \ + "sdsetn && " \ + "setenv devnum ${sd_first_dev} && " \ + "run loadscript_fat\0" \ "norscript=echo Running ${script} from tftp ... && " \ "tftpboot ${script} &&" \ "source $loadaddr\0" \ @@ -196,6 +201,12 @@ "nand write $loadaddr 0 0x00020000 && " \ "tftpboot $third_image && " \ "nand write $loadaddr 0x00020000 0x001e0000\0" \ + "sdupdate=sdsetn &&" \ + "mmc dev $sd_first_dev &&" \ + "tftpboot $second_image && " \ + "mmc write $loadaddr 0 100 && " \ + "tftpboot $third_image && " \ + "mmc write $loadaddr 100 f00\0" \ "usbupdate=usb start &&" \ "tftpboot $second_image && " \ "usb write $loadaddr 0 100 && " \ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 2d53237df43..b1cef4d4695 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -41,8 +41,6 @@ # define CONFIG_BOOTP_MAY_FAIL #endif -/* QSPI */ - /* NOR */ #ifdef CONFIG_MTD_NOR_FLASH # define CONFIG_SYS_FLASH_BASE 0xE2000000 diff --git a/include/dm/device.h b/include/dm/device.h index ab806d0b7e9..a56164b19bb 100644 --- a/include/dm/device.h +++ b/include/dm/device.h @@ -68,6 +68,12 @@ struct driver_info; #define DM_FLAG_PLATDATA_VALID (1 << 12) /* + * Device is removed without switching off its power domain. This might + * be required, i. e. for serial console (debug) output when booting OS. + */ +#define DM_FLAG_REMOVE_WITH_PD_ON (1 << 13) + +/* * One or multiple of these flags are passed to device_remove() so that * a selective device removal as specified by the remove-stage and the * driver flags can be done. diff --git a/include/efi_api.h b/include/efi_api.h index 22396172e15..3d1a6beeeac 100644 --- a/include/efi_api.h +++ b/include/efi_api.h @@ -228,6 +228,18 @@ struct efi_capsule_header { #define EFI_RT_SUPPORTED_QUERY_CAPSULE_CAPABILITIES 0x1000 #define EFI_RT_SUPPORTED_QUERY_VARIABLE_INFO 0x2000 +#define EFI_RT_PROPERTIES_TABLE_GUID \ + EFI_GUID(0xeb66918a, 0x7eef, 0x402a, 0x84, 0x2e, \ + 0x93, 0x1d, 0x21, 0xc3, 0x8a, 0xe9) + +#define EFI_RT_PROPERTIES_TABLE_VERSION 0x1 + +struct efi_rt_properties_table { + u16 version; + u16 length; + u32 runtime_services_supported; +}; + struct efi_runtime_services { struct efi_table_hdr hdr; efi_status_t (EFIAPI *get_time)(struct efi_time *time, @@ -319,6 +331,14 @@ struct efi_runtime_services { EFI_GUID(0xeb9d2d31, 0x2d88, 0x11d3, \ 0x9a, 0x16, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d) +#define EFI_LOAD_FILE_PROTOCOL_GUID \ + EFI_GUID(0x56ec3091, 0x954c, 0x11d2, \ + 0x8e, 0x3f, 0x00, 0xa0, 0xc9, 0x69, 0x72, 0x3b) + +#define EFI_LOAD_FILE2_PROTOCOL_GUID \ + EFI_GUID(0x4006c0c1, 0xfcb3, 0x403e, \ + 0x99, 0x6d, 0x4a, 0x6c, 0x87, 0x24, 0xe0, 0x6d) + struct efi_configuration_table { efi_guid_t guid; void *table; @@ -474,6 +494,7 @@ struct efi_device_path_nvme { #define DEVICE_PATH_TYPE_MEDIA_DEVICE 0x04 # define DEVICE_PATH_SUB_TYPE_HARD_DRIVE_PATH 0x01 # define DEVICE_PATH_SUB_TYPE_CDROM_PATH 0x02 +# define DEVICE_PATH_SUB_TYPE_VENDOR_PATH 0x03 # define DEVICE_PATH_SUB_TYPE_FILE_PATH 0x04 struct efi_device_path_hard_drive_path { @@ -1607,6 +1628,14 @@ struct efi_unicode_collation_protocol { char *supported_languages; }; +struct efi_load_file_protocol { + efi_status_t (EFIAPI *load_file)(struct efi_load_file_protocol *this, + struct efi_device_path *file_path, + bool boot_policy, + efi_uintn_t *buffer_size, + void *buffer); +}; + /* Boot manager load options */ #define LOAD_OPTION_ACTIVE 0x00000001 #define LOAD_OPTION_FORCE_RECONNECT 0x00000002 diff --git a/include/efi_load_initrd.h b/include/efi_load_initrd.h new file mode 100644 index 00000000000..478ae807c68 --- /dev/null +++ b/include/efi_load_initrd.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2020, Linaro Limited + */ + +#if !defined _EFI_LOAD_INITRD_H_ +#define _EFI_LOAD_INITRD_H_ + +#include <efi.h> +#include <efi_api.h> + +/* + * Vendor GUID used by Linux to identify the handle with the + * EFI_LOAD_FILE2_PROTOCOL and load an initial ramdisk. + */ +#define EFI_INITRD_MEDIA_GUID \ + EFI_GUID(0x5568e427, 0x68fc, 0x4f3d, \ + 0xac, 0x74, 0xca, 0x55, 0x52, 0x31, 0xcc, 0x68) + +struct efi_initrd_dp { + struct efi_device_path_vendor vendor; + struct efi_device_path end; +} __packed; + +#endif diff --git a/include/efi_loader.h b/include/efi_loader.h index d4c59b54c48..8e343798339 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -378,6 +378,7 @@ efi_status_t efi_gop_register(void); efi_status_t efi_net_register(void); /* Called by bootefi to make the watchdog available */ efi_status_t efi_watchdog_register(void); +efi_status_t efi_initrd_register(void); /* Called by bootefi to make SMBIOS tables available */ /** * efi_acpi_register() - write out ACPI tables diff --git a/include/net.h b/include/net.h index 8a02c923a40..82500eeb30f 100644 --- a/include/net.h +++ b/include/net.h @@ -356,6 +356,7 @@ struct vlan_ethernet_hdr { #define PROT_VLAN 0x8100 /* IEEE 802.1q protocol */ #define PROT_IPV6 0x86dd /* IPv6 over bluebook */ #define PROT_PPP_SES 0x8864 /* PPPoE session messages */ +#define PROT_NCSI 0x88f8 /* NC-SI control packets */ #define IPPROTO_ICMP 1 /* Internet Control Message Protocol */ #define IPPROTO_UDP 17 /* User Datagram Protocol */ diff --git a/include/net/ncsi-pkt.h b/include/net/ncsi-pkt.h new file mode 100644 index 00000000000..a8e9def593f --- /dev/null +++ b/include/net/ncsi-pkt.h @@ -0,0 +1,442 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright Gavin Shan, IBM Corporation 2016. + */ + +#ifndef __NCSI_PKT_H__ +#define __NCSI_PKT_H__ + +struct ncsi_pkt_hdr { + unsigned char mc_id; /* Management controller ID */ + unsigned char revision; /* NCSI version - 0x01 */ + unsigned char reserved; /* Reserved */ + unsigned char id; /* Packet sequence number */ + unsigned char type; /* Packet type */ + unsigned char channel; /* Network controller ID */ + __be16 length; /* Payload length */ + __be32 reserved1[2]; /* Reserved */ +}; + +struct ncsi_cmd_pkt_hdr { + struct ncsi_pkt_hdr common; /* Common NCSI packet header */ +}; + +struct ncsi_rsp_pkt_hdr { + struct ncsi_pkt_hdr common; /* Common NCSI packet header */ + __be16 code; /* Response code */ + __be16 reason; /* Response reason */ +}; + +struct ncsi_aen_pkt_hdr { + struct ncsi_pkt_hdr common; /* Common NCSI packet header */ + unsigned char reserved2[3]; /* Reserved */ + unsigned char type; /* AEN packet type */ +}; + +/* NCSI common command packet */ +struct ncsi_cmd_pkt { + struct ncsi_cmd_pkt_hdr cmd; /* Command header */ + __be32 checksum; /* Checksum */ + unsigned char pad[26]; +}; + +struct ncsi_rsp_pkt { + struct ncsi_rsp_pkt_hdr rsp; /* Response header */ + __be32 checksum; /* Checksum */ + unsigned char pad[22]; +}; + +/* Select Package */ +struct ncsi_cmd_sp_pkt { + struct ncsi_cmd_pkt_hdr cmd; /* Command header */ + unsigned char reserved[3]; /* Reserved */ + unsigned char hw_arbitration; /* HW arbitration */ + __be32 checksum; /* Checksum */ + unsigned char pad[22]; +}; + +/* Disable Channel */ +struct ncsi_cmd_dc_pkt { + struct ncsi_cmd_pkt_hdr cmd; /* Command header */ + unsigned char reserved[3]; /* Reserved */ + unsigned char ald; /* Allow link down */ + __be32 checksum; /* Checksum */ + unsigned char pad[22]; +}; + +/* Reset Channel */ +struct ncsi_cmd_rc_pkt { + struct ncsi_cmd_pkt_hdr cmd; /* Command header */ + __be32 reserved; /* Reserved */ + __be32 checksum; /* Checksum */ + unsigned char pad[22]; +}; + +/* AEN Enable */ +struct ncsi_cmd_ae_pkt { + struct ncsi_cmd_pkt_hdr cmd; /* Command header */ + unsigned char reserved[3]; /* Reserved */ + unsigned char mc_id; /* MC ID */ + __be32 mode; /* AEN working mode */ + __be32 checksum; /* Checksum */ + unsigned char pad[18]; +}; + +/* Set Link */ +struct ncsi_cmd_sl_pkt { + struct ncsi_cmd_pkt_hdr cmd; /* Command header */ + __be32 mode; /* Link working mode */ + __be32 oem_mode; /* OEM link mode */ + __be32 checksum; /* Checksum */ + unsigned char pad[18]; +}; + +/* Set VLAN Filter */ +struct ncsi_cmd_svf_pkt { + struct ncsi_cmd_pkt_hdr cmd; /* Command header */ + __be16 reserved; /* Reserved */ + __be16 vlan; /* VLAN ID */ + __be16 reserved1; /* Reserved */ + unsigned char index; /* VLAN table index */ + unsigned char enable; /* Enable or disable */ + __be32 checksum; /* Checksum */ + unsigned char pad[18]; +}; + +/* Enable VLAN */ +struct ncsi_cmd_ev_pkt { + struct ncsi_cmd_pkt_hdr cmd; /* Command header */ + unsigned char reserved[3]; /* Reserved */ + unsigned char mode; /* VLAN filter mode */ + __be32 checksum; /* Checksum */ + unsigned char pad[22]; +}; + +/* Set MAC Address */ +struct ncsi_cmd_sma_pkt { + struct ncsi_cmd_pkt_hdr cmd; /* Command header */ + unsigned char mac[6]; /* MAC address */ + unsigned char index; /* MAC table index */ + unsigned char at_e; /* Addr type and operation */ + __be32 checksum; /* Checksum */ + unsigned char pad[18]; +}; + +/* Enable Broadcast Filter */ +struct ncsi_cmd_ebf_pkt { + struct ncsi_cmd_pkt_hdr cmd; /* Command header */ + __be32 mode; /* Filter mode */ + __be32 checksum; /* Checksum */ + unsigned char pad[22]; +}; + +/* Enable Global Multicast Filter */ +struct ncsi_cmd_egmf_pkt { + struct ncsi_cmd_pkt_hdr cmd; /* Command header */ + __be32 mode; /* Global MC mode */ + __be32 checksum; /* Checksum */ + unsigned char pad[22]; +}; + +/* Set NCSI Flow Control */ +struct ncsi_cmd_snfc_pkt { + struct ncsi_cmd_pkt_hdr cmd; /* Command header */ + unsigned char reserved[3]; /* Reserved */ + unsigned char mode; /* Flow control mode */ + __be32 checksum; /* Checksum */ + unsigned char pad[22]; +}; + +/* OEM Request Command as per NCSI Specification */ +struct ncsi_cmd_oem_pkt { + struct ncsi_cmd_pkt_hdr cmd; /* Command header */ + __be32 mfr_id; /* Manufacture ID */ + unsigned char data[]; /* OEM Payload Data */ +}; + +/* OEM Response Packet as per NCSI Specification */ +struct ncsi_rsp_oem_pkt { + struct ncsi_rsp_pkt_hdr rsp; /* Command header */ + __be32 mfr_id; /* Manufacture ID */ + unsigned char data[]; /* Payload data */ +}; + +/* Mellanox Response Data */ +struct ncsi_rsp_oem_mlx_pkt { + unsigned char cmd_rev; /* Command Revision */ + unsigned char cmd; /* Command ID */ + unsigned char param; /* Parameter */ + unsigned char optional; /* Optional data */ + unsigned char data[]; /* Data */ +}; + +/* Broadcom Response Data */ +struct ncsi_rsp_oem_bcm_pkt { + unsigned char ver; /* Payload Version */ + unsigned char type; /* OEM Command type */ + __be16 len; /* Payload Length */ + unsigned char data[]; /* Cmd specific Data */ +}; + +/* Get Link Status */ +struct ncsi_rsp_gls_pkt { + struct ncsi_rsp_pkt_hdr rsp; /* Response header */ + __be32 status; /* Link status */ + __be32 other; /* Other indications */ + __be32 oem_status; /* OEM link status */ + __be32 checksum; + unsigned char pad[10]; +}; + +/* Get Version ID */ +struct ncsi_rsp_gvi_pkt { + struct ncsi_rsp_pkt_hdr rsp; /* Response header */ + __be32 ncsi_version; /* NCSI version */ + unsigned char reserved[3]; /* Reserved */ + unsigned char alpha2; /* NCSI version */ + unsigned char fw_name[12]; /* f/w name string */ + __be32 fw_version; /* f/w version */ + __be16 pci_ids[4]; /* PCI IDs */ + __be32 mf_id; /* Manufacture ID */ + __be32 checksum; +}; + +/* Get Capabilities */ +struct ncsi_rsp_gc_pkt { + struct ncsi_rsp_pkt_hdr rsp; /* Response header */ + __be32 cap; /* Capabilities */ + __be32 bc_cap; /* Broadcast cap */ + __be32 mc_cap; /* Multicast cap */ + __be32 buf_cap; /* Buffering cap */ + __be32 aen_cap; /* AEN cap */ + unsigned char vlan_cnt; /* VLAN filter count */ + unsigned char mixed_cnt; /* Mix filter count */ + unsigned char mc_cnt; /* MC filter count */ + unsigned char uc_cnt; /* UC filter count */ + unsigned char reserved[2]; /* Reserved */ + unsigned char vlan_mode; /* VLAN mode */ + unsigned char channel_cnt; /* Channel count */ + __be32 checksum; /* Checksum */ +}; + +/* Get Parameters */ +struct ncsi_rsp_gp_pkt { + struct ncsi_rsp_pkt_hdr rsp; /* Response header */ + unsigned char mac_cnt; /* Number of MAC addr */ + unsigned char reserved[2]; /* Reserved */ + unsigned char mac_enable; /* MAC addr enable flags */ + unsigned char vlan_cnt; /* VLAN tag count */ + unsigned char reserved1; /* Reserved */ + __be16 vlan_enable; /* VLAN tag enable flags */ + __be32 link_mode; /* Link setting */ + __be32 bc_mode; /* BC filter mode */ + __be32 valid_modes; /* Valid mode parameters */ + unsigned char vlan_mode; /* VLAN mode */ + unsigned char fc_mode; /* Flow control mode */ + unsigned char reserved2[2]; /* Reserved */ + __be32 aen_mode; /* AEN mode */ + unsigned char mac[6]; /* Supported MAC addr */ + __be16 vlan; /* Supported VLAN tags */ + __be32 checksum; /* Checksum */ +}; + +/* Get Controller Packet Statistics */ +struct ncsi_rsp_gcps_pkt { + struct ncsi_rsp_pkt_hdr rsp; /* Response header */ + __be32 cnt_hi; /* Counter cleared */ + __be32 cnt_lo; /* Counter cleared */ + __be32 rx_bytes; /* Rx bytes */ + __be32 tx_bytes; /* Tx bytes */ + __be32 rx_uc_pkts; /* Rx UC packets */ + __be32 rx_mc_pkts; /* Rx MC packets */ + __be32 rx_bc_pkts; /* Rx BC packets */ + __be32 tx_uc_pkts; /* Tx UC packets */ + __be32 tx_mc_pkts; /* Tx MC packets */ + __be32 tx_bc_pkts; /* Tx BC packets */ + __be32 fcs_err; /* FCS errors */ + __be32 align_err; /* Alignment errors */ + __be32 false_carrier; /* False carrier detection */ + __be32 runt_pkts; /* Rx runt packets */ + __be32 jabber_pkts; /* Rx jabber packets */ + __be32 rx_pause_xon; /* Rx pause XON frames */ + __be32 rx_pause_xoff; /* Rx XOFF frames */ + __be32 tx_pause_xon; /* Tx XON frames */ + __be32 tx_pause_xoff; /* Tx XOFF frames */ + __be32 tx_s_collision; /* Single collision frames */ + __be32 tx_m_collision; /* Multiple collision frames */ + __be32 l_collision; /* Late collision frames */ + __be32 e_collision; /* Excessive collision frames */ + __be32 rx_ctl_frames; /* Rx control frames */ + __be32 rx_64_frames; /* Rx 64-bytes frames */ + __be32 rx_127_frames; /* Rx 65-127 bytes frames */ + __be32 rx_255_frames; /* Rx 128-255 bytes frames */ + __be32 rx_511_frames; /* Rx 256-511 bytes frames */ + __be32 rx_1023_frames; /* Rx 512-1023 bytes frames */ + __be32 rx_1522_frames; /* Rx 1024-1522 bytes frames */ + __be32 rx_9022_frames; /* Rx 1523-9022 bytes frames */ + __be32 tx_64_frames; /* Tx 64-bytes frames */ + __be32 tx_127_frames; /* Tx 65-127 bytes frames */ + __be32 tx_255_frames; /* Tx 128-255 bytes frames */ + __be32 tx_511_frames; /* Tx 256-511 bytes frames */ + __be32 tx_1023_frames; /* Tx 512-1023 bytes frames */ + __be32 tx_1522_frames; /* Tx 1024-1522 bytes frames */ + __be32 tx_9022_frames; /* Tx 1523-9022 bytes frames */ + __be32 rx_valid_bytes; /* Rx valid bytes */ + __be32 rx_runt_pkts; /* Rx error runt packets */ + __be32 rx_jabber_pkts; /* Rx error jabber packets */ + __be32 checksum; /* Checksum */ +}; + +/* Get NCSI Statistics */ +struct ncsi_rsp_gns_pkt { + struct ncsi_rsp_pkt_hdr rsp; /* Response header */ + __be32 rx_cmds; /* Rx NCSI commands */ + __be32 dropped_cmds; /* Dropped commands */ + __be32 cmd_type_errs; /* Command type errors */ + __be32 cmd_csum_errs; /* Command checksum errors */ + __be32 rx_pkts; /* Rx NCSI packets */ + __be32 tx_pkts; /* Tx NCSI packets */ + __be32 tx_aen_pkts; /* Tx AEN packets */ + __be32 checksum; /* Checksum */ +}; + +/* Get NCSI Pass-through Statistics */ +struct ncsi_rsp_gnpts_pkt { + struct ncsi_rsp_pkt_hdr rsp; /* Response header */ + __be32 tx_pkts; /* Tx packets */ + __be32 tx_dropped; /* Tx dropped packets */ + __be32 tx_channel_err; /* Tx channel errors */ + __be32 tx_us_err; /* Tx undersize errors */ + __be32 rx_pkts; /* Rx packets */ + __be32 rx_dropped; /* Rx dropped packets */ + __be32 rx_channel_err; /* Rx channel errors */ + __be32 rx_us_err; /* Rx undersize errors */ + __be32 rx_os_err; /* Rx oversize errors */ + __be32 checksum; /* Checksum */ +}; + +/* Get package status */ +struct ncsi_rsp_gps_pkt { + struct ncsi_rsp_pkt_hdr rsp; /* Response header */ + __be32 status; /* Hardware arbitration status */ + __be32 checksum; +}; + +/* Get package UUID */ +struct ncsi_rsp_gpuuid_pkt { + struct ncsi_rsp_pkt_hdr rsp; /* Response header */ + unsigned char uuid[16]; /* UUID */ + __be32 checksum; +}; + +/* AEN: Link State Change */ +struct ncsi_aen_lsc_pkt { + struct ncsi_aen_pkt_hdr aen; /* AEN header */ + __be32 status; /* Link status */ + __be32 oem_status; /* OEM link status */ + __be32 checksum; /* Checksum */ + unsigned char pad[14]; +}; + +/* AEN: Configuration Required */ +struct ncsi_aen_cr_pkt { + struct ncsi_aen_pkt_hdr aen; /* AEN header */ + __be32 checksum; /* Checksum */ + unsigned char pad[22]; +}; + +/* AEN: Host Network Controller Driver Status Change */ +struct ncsi_aen_hncdsc_pkt { + struct ncsi_aen_pkt_hdr aen; /* AEN header */ + __be32 status; /* Status */ + __be32 checksum; /* Checksum */ + unsigned char pad[18]; +}; + +/* NCSI packet revision */ +#define NCSI_PKT_REVISION 0x01 + +/* NCSI packet commands */ +#define NCSI_PKT_CMD_CIS 0x00 /* Clear Initial State */ +#define NCSI_PKT_CMD_SP 0x01 /* Select Package */ +#define NCSI_PKT_CMD_DP 0x02 /* Deselect Package */ +#define NCSI_PKT_CMD_EC 0x03 /* Enable Channel */ +#define NCSI_PKT_CMD_DC 0x04 /* Disable Channel */ +#define NCSI_PKT_CMD_RC 0x05 /* Reset Channel */ +#define NCSI_PKT_CMD_ECNT 0x06 /* Enable Channel Network Tx */ +#define NCSI_PKT_CMD_DCNT 0x07 /* Disable Channel Network Tx */ +#define NCSI_PKT_CMD_AE 0x08 /* AEN Enable */ +#define NCSI_PKT_CMD_SL 0x09 /* Set Link */ +#define NCSI_PKT_CMD_GLS 0x0a /* Get Link */ +#define NCSI_PKT_CMD_SVF 0x0b /* Set VLAN Filter */ +#define NCSI_PKT_CMD_EV 0x0c /* Enable VLAN */ +#define NCSI_PKT_CMD_DV 0x0d /* Disable VLAN */ +#define NCSI_PKT_CMD_SMA 0x0e /* Set MAC address */ +#define NCSI_PKT_CMD_EBF 0x10 /* Enable Broadcast Filter */ +#define NCSI_PKT_CMD_DBF 0x11 /* Disable Broadcast Filter */ +#define NCSI_PKT_CMD_EGMF 0x12 /* Enable Global Multicast Filter */ +#define NCSI_PKT_CMD_DGMF 0x13 /* Disable Global Multicast Filter */ +#define NCSI_PKT_CMD_SNFC 0x14 /* Set NCSI Flow Control */ +#define NCSI_PKT_CMD_GVI 0x15 /* Get Version ID */ +#define NCSI_PKT_CMD_GC 0x16 /* Get Capabilities */ +#define NCSI_PKT_CMD_GP 0x17 /* Get Parameters */ +#define NCSI_PKT_CMD_GCPS 0x18 /* Get Controller Packet Statistics */ +#define NCSI_PKT_CMD_GNS 0x19 /* Get NCSI Statistics */ +#define NCSI_PKT_CMD_GNPTS 0x1a /* Get NCSI Pass-throu Statistics */ +#define NCSI_PKT_CMD_GPS 0x1b /* Get package status */ +#define NCSI_PKT_CMD_OEM 0x50 /* OEM */ +#define NCSI_PKT_CMD_PLDM 0x51 /* PLDM request over NCSI over RBT */ +#define NCSI_PKT_CMD_GPUUID 0x52 /* Get package UUID */ + +/* NCSI packet responses */ +#define NCSI_PKT_RSP_CIS (NCSI_PKT_CMD_CIS + 0x80) +#define NCSI_PKT_RSP_SP (NCSI_PKT_CMD_SP + 0x80) +#define NCSI_PKT_RSP_DP (NCSI_PKT_CMD_DP + 0x80) +#define NCSI_PKT_RSP_EC (NCSI_PKT_CMD_EC + 0x80) +#define NCSI_PKT_RSP_DC (NCSI_PKT_CMD_DC + 0x80) +#define NCSI_PKT_RSP_RC (NCSI_PKT_CMD_RC + 0x80) +#define NCSI_PKT_RSP_ECNT (NCSI_PKT_CMD_ECNT + 0x80) +#define NCSI_PKT_RSP_DCNT (NCSI_PKT_CMD_DCNT + 0x80) +#define NCSI_PKT_RSP_AE (NCSI_PKT_CMD_AE + 0x80) +#define NCSI_PKT_RSP_SL (NCSI_PKT_CMD_SL + 0x80) +#define NCSI_PKT_RSP_GLS (NCSI_PKT_CMD_GLS + 0x80) +#define NCSI_PKT_RSP_SVF (NCSI_PKT_CMD_SVF + 0x80) +#define NCSI_PKT_RSP_EV (NCSI_PKT_CMD_EV + 0x80) +#define NCSI_PKT_RSP_DV (NCSI_PKT_CMD_DV + 0x80) +#define NCSI_PKT_RSP_SMA (NCSI_PKT_CMD_SMA + 0x80) +#define NCSI_PKT_RSP_EBF (NCSI_PKT_CMD_EBF + 0x80) +#define NCSI_PKT_RSP_DBF (NCSI_PKT_CMD_DBF + 0x80) +#define NCSI_PKT_RSP_EGMF (NCSI_PKT_CMD_EGMF + 0x80) +#define NCSI_PKT_RSP_DGMF (NCSI_PKT_CMD_DGMF + 0x80) +#define NCSI_PKT_RSP_SNFC (NCSI_PKT_CMD_SNFC + 0x80) +#define NCSI_PKT_RSP_GVI (NCSI_PKT_CMD_GVI + 0x80) +#define NCSI_PKT_RSP_GC (NCSI_PKT_CMD_GC + 0x80) +#define NCSI_PKT_RSP_GP (NCSI_PKT_CMD_GP + 0x80) +#define NCSI_PKT_RSP_GCPS (NCSI_PKT_CMD_GCPS + 0x80) +#define NCSI_PKT_RSP_GNS (NCSI_PKT_CMD_GNS + 0x80) +#define NCSI_PKT_RSP_GNPTS (NCSI_PKT_CMD_GNPTS + 0x80) +#define NCSI_PKT_RSP_GPS (NCSI_PKT_CMD_GPS + 0x80) +#define NCSI_PKT_RSP_OEM (NCSI_PKT_CMD_OEM + 0x80) +#define NCSI_PKT_RSP_PLDM (NCSI_PKT_CMD_PLDM + 0x80) +#define NCSI_PKT_RSP_GPUUID (NCSI_PKT_CMD_GPUUID + 0x80) + +/* NCSI response code/reason */ +#define NCSI_PKT_RSP_C_COMPLETED 0x0000 /* Command Completed */ +#define NCSI_PKT_RSP_C_FAILED 0x0001 /* Command Failed */ +#define NCSI_PKT_RSP_C_UNAVAILABLE 0x0002 /* Command Unavailable */ +#define NCSI_PKT_RSP_C_UNSUPPORTED 0x0003 /* Command Unsupported */ +#define NCSI_PKT_RSP_R_NO_ERROR 0x0000 /* No Error */ +#define NCSI_PKT_RSP_R_INTERFACE 0x0001 /* Interface not ready */ +#define NCSI_PKT_RSP_R_PARAM 0x0002 /* Invalid Parameter */ +#define NCSI_PKT_RSP_R_CHANNEL 0x0003 /* Channel not Ready */ +#define NCSI_PKT_RSP_R_PACKAGE 0x0004 /* Package not Ready */ +#define NCSI_PKT_RSP_R_LENGTH 0x0005 /* Invalid payload length */ +#define NCSI_PKT_RSP_R_UNKNOWN 0x7fff /* Command type unsupported */ + +/* NCSI AEN packet type */ +#define NCSI_PKT_AEN 0xFF /* AEN Packet */ +#define NCSI_PKT_AEN_LSC 0x00 /* Link status change */ +#define NCSI_PKT_AEN_CR 0x01 /* Configuration required */ +#define NCSI_PKT_AEN_HNCDSC 0x02 /* HNC driver status change */ + +#endif /* __NCSI_PKT_H__ */ diff --git a/include/net/ncsi.h b/include/net/ncsi.h new file mode 100644 index 00000000000..2800c842b72 --- /dev/null +++ b/include/net/ncsi.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * NC-SI PHY + * + * Copyright (C) 2019, IBM Corporation. + */ + +#include <common.h> +#include <phy.h> + +bool ncsi_active(void); +void ncsi_receive(struct ethernet_hdr *et, struct ip_udp_hdr *ip, + unsigned int len); +void ncsi_probe_packages(void); diff --git a/include/phy.h b/include/phy.h index 42cfc59ec0a..b5de14cbfc2 100644 --- a/include/phy.h +++ b/include/phy.h @@ -15,9 +15,12 @@ #include <linux/mii.h> #include <linux/ethtool.h> #include <linux/mdio.h> +#include <log.h> #include <phy_interface.h> #define PHY_FIXED_ID 0xa5a55a5a +#define PHY_NCSI_ID 0xbeefcafe + /* * There is no actual id for this. * This is just a dummy id for gmii2rgmmi converter. @@ -171,6 +174,11 @@ static inline int phy_read(struct phy_device *phydev, int devad, int regnum) { struct mii_dev *bus = phydev->bus; + if (!bus || !bus->read) { + debug("%s: No bus configured\n", __func__); + return -1; + } + return bus->read(bus, phydev->addr, devad, regnum); } @@ -179,6 +187,11 @@ static inline int phy_write(struct phy_device *phydev, int devad, int regnum, { struct mii_dev *bus = phydev->bus; + if (!bus || !bus->read) { + debug("%s: No bus configured\n", __func__); + return -1; + } + return bus->write(bus, phydev->addr, devad, regnum, val); } @@ -247,10 +260,15 @@ static inline int phy_write_mmd(struct phy_device *phydev, int devad, #ifdef CONFIG_PHYLIB_10G extern struct phy_driver gen10g_driver; -/* For now, XGMII is the only 10G interface */ +/* + * List all 10G interfaces here, the assumption being that PHYs on these + * interfaces are C45 + */ static inline int is_10g_interface(phy_interface_t interface) { - return interface == PHY_INTERFACE_MODE_XGMII; + return interface == PHY_INTERFACE_MODE_XGMII || + interface == PHY_INTERFACE_MODE_USXGMII || + interface == PHY_INTERFACE_MODE_XFI; } #endif @@ -400,6 +418,7 @@ int phy_vitesse_init(void); int phy_xilinx_init(void); int phy_mscc_init(void); int phy_fixed_init(void); +int phy_ncsi_init(void); int phy_xilinx_gmii2rgmii_init(void); int board_phy_config(struct phy_device *phydev); diff --git a/include/phy_interface.h b/include/phy_interface.h index 73f3a3679ce..31ca72a81fd 100644 --- a/include/phy_interface.h +++ b/include/phy_interface.h @@ -31,6 +31,7 @@ typedef enum { PHY_INTERFACE_MODE_XLAUI, PHY_INTERFACE_MODE_CAUI2, PHY_INTERFACE_MODE_CAUI4, + PHY_INTERFACE_MODE_NCSI, PHY_INTERFACE_MODE_XFI, PHY_INTERFACE_MODE_USXGMII, PHY_INTERFACE_MODE_NONE, /* Must be last */ @@ -60,6 +61,7 @@ static const char * const phy_interface_strings[] = { [PHY_INTERFACE_MODE_XLAUI] = "xlaui4", [PHY_INTERFACE_MODE_CAUI2] = "caui2", [PHY_INTERFACE_MODE_CAUI4] = "caui4", + [PHY_INTERFACE_MODE_NCSI] = "NC-SI", [PHY_INTERFACE_MODE_XFI] = "xfi", [PHY_INTERFACE_MODE_USXGMII] = "usxgmii", [PHY_INTERFACE_MODE_NONE] = "", diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig index 76f43eca95f..9890144d416 100644 --- a/lib/efi_loader/Kconfig +++ b/lib/efi_loader/Kconfig @@ -130,4 +130,19 @@ config EFI_RNG_PROTOCOL Provide a EFI_RNG_PROTOCOL implementation using the hardware random number generator of the platform. +config EFI_LOAD_FILE2_INITRD + bool "EFI_FILE_LOAD2_PROTOCOL for Linux initial ramdisk" + default n + help + Expose a EFI_FILE_LOAD2_PROTOCOL that the Linux UEFI stub can + use to load the initial ramdisk. Once this is enabled using + initrd=<ramdisk> will stop working. + +config EFI_INITRD_FILESPEC + string "initramfs path" + default "host 0:1 initrd" + depends on EFI_LOAD_FILE2_INITRD + help + Full path of the initramfs file, e.g. mmc 0:2 initramfs.cpio.gz. + endif diff --git a/lib/efi_loader/Makefile b/lib/efi_loader/Makefile index 04dc8648512..9b3b7044733 100644 --- a/lib/efi_loader/Makefile +++ b/lib/efi_loader/Makefile @@ -43,3 +43,4 @@ obj-$(CONFIG_NET) += efi_net.o obj-$(CONFIG_GENERATE_ACPI_TABLE) += efi_acpi.o obj-$(CONFIG_GENERATE_SMBIOS_TABLE) += efi_smbios.o obj-$(CONFIG_EFI_RNG_PROTOCOL) += efi_rng.o +obj-$(CONFIG_EFI_LOAD_FILE2_INITRD) += efi_load_initrd.o diff --git a/lib/efi_loader/efi_load_initrd.c b/lib/efi_loader/efi_load_initrd.c new file mode 100644 index 00000000000..574a83d7e30 --- /dev/null +++ b/lib/efi_loader/efi_load_initrd.c @@ -0,0 +1,198 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2020, Linaro Limited + */ + +#include <common.h> +#include <env.h> +#include <malloc.h> +#include <mapmem.h> +#include <dm.h> +#include <fs.h> +#include <efi_loader.h> +#include <efi_load_initrd.h> + +static const efi_guid_t efi_guid_load_file2_protocol = + EFI_LOAD_FILE2_PROTOCOL_GUID; + +static efi_status_t EFIAPI +efi_load_file2_initrd(struct efi_load_file_protocol *this, + struct efi_device_path *file_path, bool boot_policy, + efi_uintn_t *buffer_size, void *buffer); + +static const struct efi_load_file_protocol efi_lf2_protocol = { + .load_file = efi_load_file2_initrd, +}; + +/* + * Device path defined by Linux to identify the handle providing the + * EFI_LOAD_FILE2_PROTOCOL used for loading the initial ramdisk. + */ +static const struct efi_initrd_dp dp = { + .vendor = { + { + DEVICE_PATH_TYPE_MEDIA_DEVICE, + DEVICE_PATH_SUB_TYPE_VENDOR_PATH, + sizeof(dp.vendor), + }, + EFI_INITRD_MEDIA_GUID, + }, + .end = { + DEVICE_PATH_TYPE_END, + DEVICE_PATH_SUB_TYPE_END, + sizeof(dp.end), + } +}; + +/** + * get_file_size() - retrieve the size of initramfs, set efi status on error + * + * @dev: device to read from. i.e "mmc" + * @part: device partition. i.e "0:1" + * @file: name fo file + * @status: EFI exit code in case of failure + * + * Return: size of file + */ +static loff_t get_file_size(const char *dev, const char *part, const char *file, + efi_status_t *status) +{ + loff_t sz = 0; + int ret; + + ret = fs_set_blk_dev(dev, part, FS_TYPE_ANY); + if (ret) { + *status = EFI_NO_MEDIA; + goto out; + } + + ret = fs_size(file, &sz); + if (ret) { + sz = 0; + *status = EFI_NOT_FOUND; + goto out; + } + +out: + return sz; +} + +/** + * load_file2() - get information about random number generation + * + * This function implement the LoadFile2() service in order to load an initram + * disk requested by the Linux kernel stub. + * See the UEFI spec for details. + * + * @this: loadfile2 protocol instance + * @file_path: relative path of the file. "" in this case + * @boot_policy: must be false for Loadfile2 + * @buffer_size: size of allocated buffer + * @buffer: buffer to load the file + * + * Return: status code + */ +static efi_status_t EFIAPI +efi_load_file2_initrd(struct efi_load_file_protocol *this, + struct efi_device_path *file_path, bool boot_policy, + efi_uintn_t *buffer_size, void *buffer) +{ + const char *filespec = CONFIG_EFI_INITRD_FILESPEC; + efi_status_t status = EFI_NOT_FOUND; + loff_t file_sz = 0, read_sz = 0; + char *dev, *part, *file; + char *s; + int ret; + + EFI_ENTRY("%p, %p, %d, %p, %p", this, file_path, boot_policy, + buffer_size, buffer); + + s = strdup(filespec); + if (!s) + goto out; + + if (!this || this != &efi_lf2_protocol || + !buffer_size) { + status = EFI_INVALID_PARAMETER; + goto out; + } + + if (file_path->type != dp.end.type || + file_path->sub_type != dp.end.sub_type) { + status = EFI_INVALID_PARAMETER; + goto out; + } + + if (boot_policy) { + status = EFI_UNSUPPORTED; + goto out; + } + + /* expect something like 'mmc 0:1 initrd.cpio.gz' */ + dev = strsep(&s, " "); + if (!dev) + goto out; + part = strsep(&s, " "); + if (!part) + goto out; + file = strsep(&s, " "); + if (!file) + goto out; + + file_sz = get_file_size(dev, part, file, &status); + if (!file_sz) + goto out; + + if (!buffer || *buffer_size < file_sz) { + status = EFI_BUFFER_TOO_SMALL; + *buffer_size = file_sz; + } else { + ret = fs_set_blk_dev(dev, part, FS_TYPE_ANY); + if (ret) { + status = EFI_NO_MEDIA; + goto out; + } + + ret = fs_read(file, map_to_sysmem(buffer), 0, *buffer_size, + &read_sz); + if (ret || read_sz != file_sz) + goto out; + *buffer_size = read_sz; + + status = EFI_SUCCESS; + } + +out: + free(s); + return EFI_EXIT(status); +} + +/** + * efi_initrd_register() - Register a handle and loadfile2 protocol + * + * This function creates a new handle and installs a linux specific GUID + * to handle initram disk loading during boot. + * See the UEFI spec for details. + * + * Return: status code + */ +efi_status_t efi_initrd_register(void) +{ + efi_handle_t efi_initrd_handle = NULL; + efi_status_t ret; + + /* + * Set up the handle with the EFI_LOAD_FILE2_PROTOCOL which Linux may + * use to load the initial ramdisk. + */ + ret = EFI_CALL(efi_install_multiple_protocol_interfaces + (&efi_initrd_handle, + /* initramfs */ + &efi_guid_device_path, &dp, + /* LOAD_FILE2 */ + &efi_guid_load_file2_protocol, + (void *)&efi_lf2_protocol, + NULL)); + + return ret; +} diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c index 4b3c843b2ce..4be51335bcb 100644 --- a/lib/efi_loader/efi_runtime.c +++ b/lib/efi_loader/efi_runtime.c @@ -18,6 +18,10 @@ /* For manual relocation support */ DECLARE_GLOBAL_DATA_PTR; +/* GUID of the runtime properties table */ +static const efi_guid_t efi_rt_properties_table_guid = + EFI_RT_PROPERTIES_TABLE_GUID; + struct efi_runtime_mmio_list { struct list_head link; void **ptr; @@ -94,9 +98,28 @@ static __efi_runtime_data efi_uintn_t efi_descriptor_size; * handle a good number of runtime callbacks */ +/** + * efi_init_runtime_supported() - create runtime properties table + * + * Create a configuration table specifying which services are available at + * runtime. + * + * Return: status code + */ efi_status_t efi_init_runtime_supported(void) { - u16 efi_runtime_services_supported = + efi_status_t ret; + struct efi_rt_properties_table *rt_table; + + ret = efi_allocate_pool(EFI_RUNTIME_SERVICES_DATA, + sizeof(struct efi_rt_properties_table), + (void **)&rt_table); + if (ret != EFI_SUCCESS) + return ret; + + rt_table->version = EFI_RT_PROPERTIES_TABLE_VERSION; + rt_table->length = sizeof(struct efi_rt_properties_table); + rt_table->runtime_services_supported = EFI_RT_SUPPORTED_SET_VIRTUAL_ADDRESS_MAP | EFI_RT_SUPPORTED_CONVERT_POINTER; @@ -105,15 +128,12 @@ efi_status_t efi_init_runtime_supported(void) * as well as efi_runtime_services. */ #ifdef CONFIG_EFI_HAVE_RUNTIME_RESET - efi_runtime_services_supported |= EFI_RT_SUPPORTED_RESET_SYSTEM; + rt_table->runtime_services_supported |= EFI_RT_SUPPORTED_RESET_SYSTEM; #endif - return EFI_CALL(efi_set_variable(L"RuntimeServicesSupported", - &efi_global_variable_guid, - EFI_VARIABLE_BOOTSERVICE_ACCESS | - EFI_VARIABLE_RUNTIME_ACCESS, - sizeof(efi_runtime_services_supported), - &efi_runtime_services_supported)); + ret = efi_install_configuration_table(&efi_rt_properties_table_guid, + rt_table); + return ret; } /** diff --git a/lib/efi_loader/efi_setup.c b/lib/efi_loader/efi_setup.c index de7b616c6da..b458093dfbd 100644 --- a/lib/efi_loader/efi_setup.c +++ b/lib/efi_loader/efi_setup.c @@ -122,13 +122,13 @@ efi_status_t efi_init_obj_list(void) if (ret != EFI_SUCCESS) goto out; - /* Indicate supported runtime services */ - ret = efi_init_runtime_supported(); + /* Initialize system table */ + ret = efi_initialize_system_table(); if (ret != EFI_SUCCESS) goto out; - /* Initialize system table */ - ret = efi_initialize_system_table(); + /* Indicate supported runtime services */ + ret = efi_init_runtime_supported(); if (ret != EFI_SUCCESS) goto out; @@ -155,6 +155,11 @@ efi_status_t efi_init_obj_list(void) if (ret != EFI_SUCCESS) goto out; #endif +#ifdef CONFIG_EFI_LOAD_FILE2_INITRD + ret = efi_initrd_register(); + if (ret != EFI_SUCCESS) + goto out; +#endif #ifdef CONFIG_NET ret = efi_net_register(); if (ret != EFI_SUCCESS) diff --git a/lib/efi_selftest/Makefile b/lib/efi_selftest/Makefile index 3ad96e1cbf0..cf132c372e1 100644 --- a/lib/efi_selftest/Makefile +++ b/lib/efi_selftest/Makefile @@ -49,6 +49,7 @@ obj-$(CONFIG_CPU_V7) += efi_selftest_unaligned.o obj-$(CONFIG_EFI_LOADER_HII) += efi_selftest_hii.o obj-$(CONFIG_EFI_RNG_PROTOCOL) += efi_selftest_rng.o obj-$(CONFIG_EFI_GET_TIME) += efi_selftest_rtc.o +obj-$(CONFIG_EFI_LOAD_FILE2_INITRD) += efi_selftest_load_initrd.o ifeq ($(CONFIG_GENERATE_ACPI_TABLE),) obj-y += efi_selftest_fdt.o diff --git a/lib/efi_selftest/efi_selftest_load_initrd.c b/lib/efi_selftest/efi_selftest_load_initrd.c new file mode 100644 index 00000000000..e16163caca8 --- /dev/null +++ b/lib/efi_selftest/efi_selftest_load_initrd.c @@ -0,0 +1,220 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * efi_selftest_load_initrd + * + * Copyright (c) 2020 Ilias Apalodimas <ilias.apalodimas@linaro.org> + * + * This test checks the FileLoad2 protocol. + * A known file is read from the file system and verified. + * + * An example usage - given a file image with a file system in partition 1 + * holding file initrd - is: + * + * * Configure the sandbox with + * + * CONFIG_EFI_SELFTEST=y + * CONFIG_EFI_LOAD_FILE2_INITRD=y + * CONFIG_EFI_INITRD_FILESPEC="host 0:1 initrd" + * + * * Run ./u-boot and execute + * + * host bind 0 image + * setenv efi_selftest load initrd + * bootefi selftest + * + * This would provide a test output like: + * + * Testing EFI API implementation + * + * Selected test: 'load initrd' + * + * Setting up 'load initrd' + * Setting up 'load initrd' succeeded + * + * Executing 'load initrd' + * Loaded 12378613 bytes + * CRC32 2997478465 + * + * Now the size and CRC32 can be compared to the provided file. + */ + +#include <efi_selftest.h> +#include <efi_loader.h> +#include <efi_load_initrd.h> + +static struct efi_boot_services *boottime; + +static struct efi_initrd_dp dp = { + .vendor = { + { + DEVICE_PATH_TYPE_MEDIA_DEVICE, + DEVICE_PATH_SUB_TYPE_VENDOR_PATH, + sizeof(dp.vendor), + }, + EFI_INITRD_MEDIA_GUID, + }, + .end = { + DEVICE_PATH_TYPE_END, + DEVICE_PATH_SUB_TYPE_END, + sizeof(dp.end), + } +}; + +static struct efi_initrd_dp dp_invalid = { + .vendor = { + { + DEVICE_PATH_TYPE_MEDIA_DEVICE, + DEVICE_PATH_SUB_TYPE_VENDOR_PATH, + sizeof(dp.vendor), + }, + EFI_INITRD_MEDIA_GUID, + }, + .end = { + 0x8f, /* invalid */ + 0xfe, /* invalid */ + sizeof(dp.end), + } +}; + +static int setup(const efi_handle_t handle, + const struct efi_system_table *systable) +{ + boottime = systable->boottime; + + return EFI_ST_SUCCESS; +} + +static int execute(void) +{ + efi_guid_t lf2_proto_guid = EFI_LOAD_FILE2_PROTOCOL_GUID; + struct efi_load_file_protocol *lf2; + struct efi_device_path *dp2, *dp2_invalid; + efi_status_t status; + efi_handle_t handle; + char buffer[64]; + efi_uintn_t buffer_size; + void *buf; + u32 crc32; + + memset(buffer, 0, sizeof(buffer)); + + dp2 = (struct efi_device_path *)&dp; + status = boottime->locate_device_path(&lf2_proto_guid, &dp2, &handle); + if (status != EFI_SUCCESS) { + efi_st_error("Unable to locate device path\n"); + return EFI_ST_FAILURE; + } + + status = boottime->handle_protocol(handle, &lf2_proto_guid, + (void **)&lf2); + if (status != EFI_SUCCESS) { + efi_st_error("Unable to locate protocol\n"); + return EFI_ST_FAILURE; + } + + /* Case 1: + * buffer_size can't be NULL + * protocol can't be NULL + */ + status = lf2->load_file(lf2, dp2, false, NULL, &buffer); + if (status != EFI_INVALID_PARAMETER) { + efi_st_error("Buffer size can't be NULL\n"); + return EFI_ST_FAILURE; + } + buffer_size = sizeof(buffer); + status = lf2->load_file(NULL, dp2, false, &buffer_size, &buffer); + if (status != EFI_INVALID_PARAMETER) { + efi_st_error("Protocol can't be NULL\n"); + return EFI_ST_FAILURE; + } + + /* + * Case 2: Match end node type/sub-type on device path + */ + dp2_invalid = (struct efi_device_path *)&dp_invalid; + buffer_size = sizeof(buffer); + status = lf2->load_file(lf2, dp2_invalid, false, &buffer_size, &buffer); + if (status != EFI_INVALID_PARAMETER) { + efi_st_error("Invalid device path type must return EFI_INVALID_PARAMETER\n"); + return EFI_ST_FAILURE; + } + + status = lf2->load_file(lf2, dp2_invalid, false, &buffer_size, &buffer); + if (status != EFI_INVALID_PARAMETER) { + efi_st_error("Invalid device path sub-type must return EFI_INVALID_PARAMETER\n"); + return EFI_ST_FAILURE; + } + + /* + * Case 3: + * BootPolicy 'true' must return EFI_UNSUPPORTED + */ + buffer_size = sizeof(buffer); + status = lf2->load_file(lf2, dp2, true, &buffer_size, &buffer); + if (status != EFI_UNSUPPORTED) { + efi_st_error("BootPolicy true must return EFI_UNSUPPORTED\n"); + return EFI_ST_FAILURE; + } + + /* + * Case: Pass buffer size as zero, firmware must return + * EFI_BUFFER_TOO_SMALL and an appropriate size + */ + buffer_size = 0; + status = lf2->load_file(lf2, dp2, false, &buffer_size, NULL); + if (status != EFI_BUFFER_TOO_SMALL || !buffer_size) { + efi_st_printf("buffer_size: %u\n", (unsigned int)buffer_size); + efi_st_printf("status: %x\n", (unsigned int)status); + efi_st_error("Buffer size not updated\n"); + return EFI_ST_FAILURE; + } + + /* + * Case: Pass buffer size as smaller than the file_size, + * firmware must return * EFI_BUFFER_TOO_SMALL and an appropriate size + */ + buffer_size = 1; + status = lf2->load_file(lf2, dp2, false, &buffer_size, &buffer); + if (status != EFI_BUFFER_TOO_SMALL || buffer_size <= 1) { + efi_st_error("Buffer size not updated\n"); + return EFI_ST_FAILURE; + } + + status = boottime->allocate_pool(EFI_BOOT_SERVICES_DATA, buffer_size, + &buf); + if (status != EFI_SUCCESS) { + efi_st_error("Cannot allocate buffer\n"); + return EFI_ST_FAILURE; + } + + /* Case: Pass correct buffer, load the file and verify checksum*/ + status = lf2->load_file(lf2, dp2, false, &buffer_size, buf); + if (status != EFI_SUCCESS) { + efi_st_error("Loading initrd failed\n"); + return EFI_ST_FAILURE; + } + + efi_st_printf("Loaded %u bytes\n", (unsigned int)buffer_size); + status = boottime->calculate_crc32(buf, buffer_size, &crc32); + if (status != EFI_SUCCESS) { + efi_st_error("Could not determine CRC32\n"); + return EFI_ST_FAILURE; + } + efi_st_printf("CRC32 %u\n", (unsigned int)crc32); + + status = boottime->free_pool(buf); + if (status != EFI_SUCCESS) { + efi_st_error("Cannot free buffer\n"); + return EFI_ST_FAILURE; + } + + return EFI_ST_SUCCESS; +} + +EFI_UNIT_TEST(load_initrd) = { + .name = "load initrd", + .phase = EFI_EXECUTE_BEFORE_BOOTTIME_EXIT, + .setup = setup, + .execute = execute, + .on_request = true, +}; diff --git a/net/tftp.c b/net/tftp.c index 02401898c55..585eb6ef0cb 100644 --- a/net/tftp.c +++ b/net/tftp.c @@ -223,7 +223,7 @@ static int load_block(unsigned block, uchar *dst, unsigned len) tosend = min(net_boot_file_size - offset, tosend); (void)memcpy(dst, (void *)(image_save_addr + offset), tosend); - debug("%s: block=%d, offset=%ld, len=%d, tosend=%ld\n", __func__, + debug("%s: block=%u, offset=%lu, len=%u, tosend=%lu\n", __func__, block, offset, len, tosend); return tosend; } diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 405c62e9be2..6908431d03c 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -235,7 +235,6 @@ CONFIG_CORTINA_FW_LENGTH CONFIG_CPLD_BR_PRELIM CONFIG_CPLD_OR_PRELIM CONFIG_CPM2 -CONFIG_CPU_ARCHS34 CONFIG_CPU_ARMV8 CONFIG_CPU_CAVIUM_OCTEON CONFIG_CPU_FREQ_HZ |