diff options
187 files changed, 2187 insertions, 309 deletions
diff --git a/arch/arc/lib/bootm.c b/arch/arc/lib/bootm.c index 07b2c1540d0..2dd003445f8 100644 --- a/arch/arc/lib/bootm.c +++ b/arch/arc/lib/bootm.c @@ -29,7 +29,7 @@ static int boot_prep_linux(struct bootm_headers *images) { int ret; - if (CONFIG_IS_ENABLED(LMB)) { + if (IS_ENABLED(CONFIG_LMB)) { ret = image_setup_linux(images); if (ret) return ret; diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index b0e86785337..12d31184ad9 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -760,7 +760,7 @@ enum boot_src __get_boot_src(u32 porsr1) } #endif - if (CONFIG_IS_ENABLED(SYS_FSL_ERRATUM_A010539) && !rcw_src) + if (IS_ENABLED(CONFIG_SYS_FSL_ERRATUM_A010539) && !rcw_src) src = BOOT_SOURCE_QSPI_NOR; debug("%s: src 0x%x\n", __func__, src); diff --git a/arch/arm/dts/am3517-evm-ui.dtsi b/arch/arm/dts/am3517-evm-ui.dtsi index 7d8f32bf70d..340e68178ce 100644 --- a/arch/arm/dts/am3517-evm-ui.dtsi +++ b/arch/arm/dts/am3517-evm-ui.dtsi @@ -72,7 +72,7 @@ record { label = "Record"; - /* linux,code = <BTN_0>; */ + linux,code = <KEY_RECORD>; gpios = <&tca6416_2 15 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts index 59cf45eb175..9230dd3fd96 100644 --- a/arch/arm/dts/dragonboard410c.dts +++ b/arch/arm/dts/dragonboard410c.dts @@ -9,7 +9,6 @@ #include "skeleton64.dtsi" #include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/pinctrl/pinctrl-snapdragon.h> / { model = "Qualcomm Technologies, Inc. Dragonboard 410c"; @@ -71,7 +70,7 @@ blsp1_uart: uart { function = "blsp1_uart"; pins = "GPIO_4", "GPIO_5"; - drive-strength = <DRIVE_STRENGTH_8MA>; + drive-strength = <8>; bias-disable; }; }; diff --git a/arch/arm/dts/dragonboard820c.dts b/arch/arm/dts/dragonboard820c.dts index aaca681d2e1..ad201d48749 100644 --- a/arch/arm/dts/dragonboard820c.dts +++ b/arch/arm/dts/dragonboard820c.dts @@ -8,7 +8,6 @@ /dts-v1/; #include "skeleton64.dtsi" -#include <dt-bindings/pinctrl/pinctrl-snapdragon.h> / { model = "Qualcomm Technologies, Inc. DB820c"; @@ -71,7 +70,7 @@ blsp8_uart: uart { function = "blsp_uart8"; pins = "GPIO_4", "GPIO_5"; - drive-strength = <DRIVE_STRENGTH_8MA>; + drive-strength = <8>; bias-disable; }; }; diff --git a/arch/arm/dts/imx6ul-phytec-segin-peb-eval-01.dtsi b/arch/arm/dts/imx6ul-phytec-segin-peb-eval-01.dtsi index 2f3fd32a116..5f760ed6987 100644 --- a/arch/arm/dts/imx6ul-phytec-segin-peb-eval-01.dtsi +++ b/arch/arm/dts/imx6ul-phytec-segin-peb-eval-01.dtsi @@ -8,7 +8,7 @@ / { gpio_keys: gpio-keys { - compatible = "gpio-key"; + compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_keys>; status = "disabled"; diff --git a/arch/arm/dts/qcom-ipq4019.dtsi b/arch/arm/dts/qcom-ipq4019.dtsi index 181732d2622..6edc69da674 100644 --- a/arch/arm/dts/qcom-ipq4019.dtsi +++ b/arch/arm/dts/qcom-ipq4019.dtsi @@ -9,7 +9,6 @@ #include "skeleton.dtsi" #include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/pinctrl/pinctrl-snapdragon.h> #include <dt-bindings/clock/qcom,ipq4019-gcc.h> #include <dt-bindings/reset/qcom,ipq4019-reset.h> diff --git a/arch/arm/dts/qcs404-evb.dts b/arch/arm/dts/qcs404-evb.dts index 0639af8fe33..8d7893c1169 100644 --- a/arch/arm/dts/qcs404-evb.dts +++ b/arch/arm/dts/qcs404-evb.dts @@ -9,7 +9,6 @@ #include "skeleton64.dtsi" #include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/pinctrl/pinctrl-snapdragon.h> #include <dt-bindings/clock/qcom,gcc-qcs404.h> / { @@ -24,6 +23,11 @@ aliases { serial0 = &debug_uart; + i2c0 = &blsp1_i2c0; + i2c1 = &blsp1_i2c1; + i2c2 = &blsp1_i2c2; + i2c3 = &blsp1_i2c3; + i2c4 = &blsp1_i2c4; }; memory { @@ -37,14 +41,165 @@ ranges = <0x0 0x0 0x0 0xffffffff>; compatible = "simple-bus"; - pinctrl_north@1300000 { + soc_gpios: pinctrl_north@1300000 { compatible = "qcom,qcs404-pinctrl"; reg = <0x1300000 0x200000>; + gpio-controller; + gpio-count = <120>; + gpio-bank-name="soc"; + #gpio-cells = <2>; blsp1_uart2: uart { pins = "GPIO_17", "GPIO_18"; function = "blsp_uart2"; }; + + blsp1_i2c0_default: blsp1-i2c0-default { + pins = "GPIO_32", "GPIO_33"; + function = "blsp_i2c0"; + }; + + blsp1_i2c1_default: blsp1-i2c1-default { + pins = "GPIO_24", "GPIO_25"; + function = "blsp_i2c1"; + }; + + blsp1_i2c2_default: blsp1-i2c2-default { + sda { + pins = "GPIO_19"; + function = "blsp_i2c_sda_a2"; + }; + + scl { + pins = "GPIO_20"; + function = "blsp_i2c_scl_a2"; + }; + }; + + blsp1_i2c3_default: blsp1-i2c3-default { + pins = "GPIO_84", "GPIO_85"; + function = "blsp_i2c3"; + }; + + blsp1_i2c4_default: blsp1-i2c4-default { + pins = "GPIO_117", "GPIO_118"; + function = "blsp_i2c4"; + }; + + ethernet_defaults: ethernet-defaults { + int { + pins = "GPIO_61"; + function = "rgmii_int"; + bias-disable; + drive-strength = <2>; + }; + mdc { + pins = "GPIO_76"; + function = "rgmii_mdc"; + bias-pull-up; + }; + mdio { + pins = "GPIO_75"; + function = "rgmii_mdio"; + bias-pull-up; + }; + tx { + pins = "GPIO_67", "GPIO_66", "GPIO_65", "GPIO_64"; + function = "rgmii_tx"; + bias-pull-up; + drive-strength = <16>; + }; + rx { + pins = "GPIO_73", "GPIO_72", "GPIO_71", "GPIO_70"; + function = "rgmii_rx"; + bias-disable; + drive-strength = <2>; + }; + tx-ctl { + pins = "GPIO_68"; + function = "rgmii_ctl"; + bias-pull-up; + drive-strength = <16>; + }; + rx-ctl { + pins = "GPIO_74"; + function = "rgmii_ctl"; + bias-disable; + drive-strength = <2>; + }; + tx-ck { + pins = "GPIO_63"; + function = "rgmii_ck"; + bias-pull-up; + drive-strength = <16>; + }; + rx-ck { + pins = "GPIO_69"; + function = "rgmii_ck"; + bias-disable; + drive-strength = <2>; + }; + }; + }; + + blsp1_i2c0: i2c@78b5000 { + compatible = "qcom,i2c-qup-v2.2.1"; + reg = <0x078b5000 0x600>; + clocks = <&gcc GCC_BLSP1_AHB_CLK>, + <&gcc GCC_BLSP1_QUP0_I2C_APPS_CLK>; + clock-names = "iface", "core"; + pinctrl-names = "default"; + pinctrl-0 = <&blsp1_i2c0_default>; + #address-cells = <1>; + #size-cells = <0>; + }; + + blsp1_i2c1: i2c@78b6000 { + compatible = "qcom,i2c-qup-v2.2.1"; + reg = <0x078b6000 0x600>; + clocks = <&gcc GCC_BLSP1_AHB_CLK>, + <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>; + clock-names = "iface", "core"; + pinctrl-names = "default"; + pinctrl-0 = <&blsp1_i2c1_default>; + #address-cells = <1>; + #size-cells = <0>; + }; + + blsp1_i2c2: i2c@78b7000 { + compatible = "qcom,i2c-qup-v2.2.1"; + reg = <0x078b7000 0x600>; + clocks = <&gcc GCC_BLSP1_AHB_CLK>, + <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>; + clock-names = "iface", "core"; + pinctrl-names = "default"; + pinctrl-0 = <&blsp1_i2c2_default>; + #address-cells = <1>; + #size-cells = <0>; + }; + + blsp1_i2c3: i2c@78b8000 { + compatible = "qcom,i2c-qup-v2.2.1"; + reg = <0x078b8000 0x600>; + clocks = <&gcc GCC_BLSP1_AHB_CLK>, + <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>; + clock-names = "iface", "core"; + pinctrl-names = "default"; + pinctrl-0 = <&blsp1_i2c3_default>; + #address-cells = <1>; + #size-cells = <0>; + }; + + blsp1_i2c4: i2c@78b9000 { + compatible = "qcom,i2c-qup-v2.2.1"; + reg = <0x078b9000 0x600>; + clocks = <&gcc GCC_BLSP1_AHB_CLK>, + <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>; + clock-names = "iface", "core"; + pinctrl-names = "default"; + pinctrl-0 = <&blsp1_i2c4_default>; + #address-cells = <1>; + #size-cells = <0>; }; gcc: clock-controller@1800000 { @@ -169,6 +324,47 @@ }; }; + ethernet: ethernet@7a80000 { + compatible = "qcom,qcs404-ethqos"; + reg = <0x07a80000 0x10000>, + <0x07a96000 0x100>; + reg-names = "stmmaceth", "rgmii"; + clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii"; + clocks = <&gcc GCC_ETH_AXI_CLK>, + <&gcc GCC_ETH_SLAVE_AHB_CLK>, + <&gcc GCC_ETH_PTP_CLK>, + <&gcc GCC_ETH_RGMII_CLK>; + + resets = <&reset GCC_EMAC_BCR>; + reset-names = "emac"; + + snps,tso; + rx-fifo-depth = <4096>; + tx-fifo-depth = <4096>; + + snps,reset-gpio = <&soc_gpios 60 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 10000>; + + pinctrl-names = "default"; + pinctrl-0 = <ðernet_defaults>; + + phy-handle = <&phy1>; + phy-mode = "rgmii"; + max-speed = <1000>; + + mdio { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "snps,dwmac-mdio"; + phy1: phy@3 { + compatible = "ethernet-phy-ieee802.3-c22"; + device_type = "ethernet-phy"; + reg = <0x3>; + }; + }; + }; + spmi@200f000 { compatible = "qcom,spmi-pmic-arb"; reg = <0x200f000 0x1000 diff --git a/arch/arm/dts/rk3288-popmetal.dtsi b/arch/arm/dts/rk3288-popmetal.dtsi index 63785eb55ef..0253933a117 100644 --- a/arch/arm/dts/rk3288-popmetal.dtsi +++ b/arch/arm/dts/rk3288-popmetal.dtsi @@ -38,6 +38,7 @@ * OTHER DEALINGS IN THE SOFTWARE. */ +#include <dt-bindings/input/input.h> #include "rk3288.dtsi" / { @@ -63,6 +64,7 @@ power { gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; label = "GPIO Key Power"; + linux,code = <KEY_POWER>; linux,input-type = <1>; wakeup-source; debounce-interval = <100>; diff --git a/arch/arm/dts/rk3288-tinker.dtsi b/arch/arm/dts/rk3288-tinker.dtsi index 2f816af47f1..46460ae455e 100644 --- a/arch/arm/dts/rk3288-tinker.dtsi +++ b/arch/arm/dts/rk3288-tinker.dtsi @@ -38,6 +38,7 @@ * OTHER DEALINGS IN THE SOFTWARE. */ +#include <dt-bindings/input/input.h> #include "rk3288.dtsi" / { @@ -63,6 +64,7 @@ button@0 { gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; label = "GPIO Key Power"; + linux,code = <KEY_POWER>; linux,input-type = <1>; gpio-key,wakeup = <1>; debounce-interval = <100>; diff --git a/arch/arm/include/asm/mach-imx/module_fuse.h b/arch/arm/include/asm/mach-imx/module_fuse.h index a46fc3f1f8e..6c92cb40d6d 100644 --- a/arch/arm/include/asm/mach-imx/module_fuse.h +++ b/arch/arm/include/asm/mach-imx/module_fuse.h @@ -74,7 +74,7 @@ struct fuse_entry_desc { u32 status; }; -#if !CONFIG_IS_ENABLED(IMX_MODULE_FUSE) +#if !IS_ENABLED(CONFIG_IMX_MODULE_FUSE) static inline u32 check_module_fused(enum fuse_module_type module) { return 0; diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c index e414ef82673..c56285738a2 100644 --- a/arch/arm/lib/bootm.c +++ b/arch/arm/lib/bootm.c @@ -199,7 +199,7 @@ static void boot_prep_linux(struct bootm_headers *images) { char *commandline = env_get("bootargs"); - if (CONFIG_IS_ENABLED(OF_LIBFDT) && CONFIG_IS_ENABLED(LMB) && images->ft_len) { + if (CONFIG_IS_ENABLED(OF_LIBFDT) && IS_ENABLED(CONFIG_LMB) && images->ft_len) { debug("using: FDT\n"); if (image_setup_linux(images)) { panic("FDT creation failed!"); diff --git a/arch/arm/lib/save_prev_bl_data.c b/arch/arm/lib/save_prev_bl_data.c index f4ee86a89c6..f7b23faf0d6 100644 --- a/arch/arm/lib/save_prev_bl_data.c +++ b/arch/arm/lib/save_prev_bl_data.c @@ -60,9 +60,9 @@ int save_prev_bl_data(void) return -ENODATA; } - if (CONFIG_IS_ENABLED(SAVE_PREV_BL_FDT_ADDR)) + if (IS_ENABLED(CONFIG_SAVE_PREV_BL_FDT_ADDR)) env_set_addr("prevbl_fdt_addr", (void *)reg0); - if (!CONFIG_IS_ENABLED(SAVE_PREV_BL_INITRAMFS_START_ADDR)) + if (!IS_ENABLED(CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR)) return 0; node = fdt_path_offset(fdt_blob, "/chosen"); diff --git a/arch/arm/mach-exynos/mmu-arm64.c b/arch/arm/mach-exynos/mmu-arm64.c index d2c550b27d3..8d8c64e8f8f 100644 --- a/arch/arm/mach-exynos/mmu-arm64.c +++ b/arch/arm/mach-exynos/mmu-arm64.c @@ -7,7 +7,7 @@ #include <common.h> #include <asm/armv8/mmu.h> -#if CONFIG_IS_ENABLED(EXYNOS7420) +#if IS_ENABLED(CONFIG_EXYNOS7420) static struct mm_region exynos7420_mem_map[] = { { diff --git a/arch/arm/mach-mvebu/arm64-common.c b/arch/arm/mach-mvebu/arm64-common.c index 2c94f899f37..d3a95730be5 100644 --- a/arch/arm/mach-mvebu/arm64-common.c +++ b/arch/arm/mach-mvebu/arm64-common.c @@ -49,11 +49,11 @@ const struct mbus_dram_target_info *mvebu_mbus_dram_info(void) __weak int dram_init_banksize(void) { - if (CONFIG_IS_ENABLED(ARMADA_8K)) + if (IS_ENABLED(CONFIG_ARMADA_8K)) return a8k_dram_init_banksize(); - else if (CONFIG_IS_ENABLED(ARMADA_3700)) + else if (IS_ENABLED(CONFIG_ARMADA_3700)) return a3700_dram_init_banksize(); - else if (CONFIG_IS_ENABLED(ALLEYCAT_5)) + else if (IS_ENABLED(CONFIG_ALLEYCAT_5)) return alleycat5_dram_init_banksize(); else return fdtdec_setup_memory_banksize(); @@ -61,16 +61,16 @@ __weak int dram_init_banksize(void) __weak int dram_init(void) { - if (CONFIG_IS_ENABLED(ARMADA_8K)) { + if (IS_ENABLED(CONFIG_ARMADA_8K)) { gd->ram_size = a8k_dram_scan_ap_sz(); if (gd->ram_size != 0) return 0; } - if (CONFIG_IS_ENABLED(ARMADA_3700)) + if (IS_ENABLED(CONFIG_ARMADA_3700)) return a3700_dram_init(); - if (CONFIG_IS_ENABLED(ALLEYCAT_5)) + if (IS_ENABLED(CONFIG_ALLEYCAT_5)) return alleycat5_dram_init(); if (fdtdec_setup_mem_size_base() != 0) diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c index 6e05a8f76ef..ebffb6c3ff0 100644 --- a/arch/arm/mach-rockchip/board.c +++ b/arch/arm/mach-rockchip/board.c @@ -306,7 +306,7 @@ int board_usb_init(int index, enum usb_init_type init) #endif /* CONFIG_USB_GADGET */ -#if CONFIG_IS_ENABLED(FASTBOOT) +#if IS_ENABLED(CONFIG_FASTBOOT) int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason) { if (reason != FASTBOOT_REBOOT_REASON_BOOTLOADER) diff --git a/arch/arm/mach-rockchip/cpu-info.c b/arch/arm/mach-rockchip/cpu-info.c index d0f030109f4..dac24910e0c 100644 --- a/arch/arm/mach-rockchip/cpu-info.c +++ b/arch/arm/mach-rockchip/cpu-info.c @@ -44,7 +44,7 @@ char *get_reset_cause(void) return cause; } -#if CONFIG_IS_ENABLED(DISPLAY_CPUINFO) +#if IS_ENABLED(CONFIG_DISPLAY_CPUINFO) int print_cpuinfo(void) { char *cause = get_reset_cause(); diff --git a/arch/arm/mach-rockchip/misc.c b/arch/arm/mach-rockchip/misc.c index 87eebd9872d..b350f18f114 100644 --- a/arch/arm/mach-rockchip/misc.c +++ b/arch/arm/mach-rockchip/misc.c @@ -23,7 +23,7 @@ int rockchip_setup_macaddr(void) { -#if CONFIG_IS_ENABLED(CMD_NET) +#if IS_ENABLED(CONFIG_CMD_NET) int ret; const char *cpuid = env_get("cpuid#"); u8 hash[SHA256_SUM_LEN]; @@ -60,15 +60,15 @@ int rockchip_cpuid_from_efuse(const u32 cpuid_offset, const u32 cpuid_length, u8 *cpuid) { -#if CONFIG_IS_ENABLED(ROCKCHIP_EFUSE) || CONFIG_IS_ENABLED(ROCKCHIP_OTP) +#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE) || IS_ENABLED(CONFIG_ROCKCHIP_OTP) struct udevice *dev; int ret; /* retrieve the device */ -#if CONFIG_IS_ENABLED(ROCKCHIP_EFUSE) +#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE) ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(rockchip_efuse), &dev); -#elif CONFIG_IS_ENABLED(ROCKCHIP_OTP) +#elif IS_ENABLED(CONFIG_ROCKCHIP_OTP) ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(rockchip_otp), &dev); #endif diff --git a/arch/arm/mach-snapdragon/clock-qcs404.c b/arch/arm/mach-snapdragon/clock-qcs404.c index 6fe92afe8dc..b8f5691aae2 100644 --- a/arch/arm/mach-snapdragon/clock-qcs404.c +++ b/arch/arm/mach-snapdragon/clock-qcs404.c @@ -18,6 +18,9 @@ /* GPLL0 clock control registers */ #define GPLL0_STATUS_ACTIVE BIT(31) +#define CFG_CLK_SRC_GPLL1 BIT(8) +#define GPLL1_STATUS_ACTIVE BIT(31) + static struct vote_clk gcc_blsp1_ahb_clk = { .cbcr_reg = BLSP1_AHB_CBCR, .ena_vote = APCS_CLOCK_BRANCH_ENA_VOTE, @@ -47,6 +50,13 @@ static struct pll_vote_clk gpll0_vote_clk = { .vote_bit = BIT(0), }; +static struct pll_vote_clk gpll1_vote_clk = { + .status = GPLL1_STATUS, + .status_bit = GPLL1_STATUS_ACTIVE, + .ena_vote = APCS_GPLL_ENA_VOTE, + .vote_bit = BIT(1), +}; + static const struct bcr_regs usb30_master_regs = { .cfg_rcgr = USB30_MASTER_CFG_RCGR, .cmd_rcgr = USB30_MASTER_CMD_RCGR, @@ -55,6 +65,22 @@ static const struct bcr_regs usb30_master_regs = { .D = USB30_MASTER_D, }; +static const struct bcr_regs emac_regs = { + .cfg_rcgr = EMAC_CFG_RCGR, + .cmd_rcgr = EMAC_CMD_RCGR, + .M = EMAC_M, + .N = EMAC_N, + .D = EMAC_D, +}; + +static const struct bcr_regs emac_ptp_regs = { + .cfg_rcgr = EMAC_PTP_CFG_RCGR, + .cmd_rcgr = EMAC_PTP_CMD_RCGR, + .M = EMAC_M, + .N = EMAC_N, + .D = EMAC_D, +}; + ulong msm_set_rate(struct clk *clk, ulong rate) { struct msm_clk_priv *priv = dev_get_priv(clk->dev); @@ -79,6 +105,20 @@ ulong msm_set_rate(struct clk *clk, ulong rate) case GCC_SDCC1_AHB_CLK: clk_enable_cbc(priv->base + SDCC_AHB_CBCR(1)); break; + case GCC_ETH_RGMII_CLK: + if (rate == 250000000) + clk_rcg_set_rate_mnd(priv->base, &emac_regs, 2, 0, 0, + CFG_CLK_SRC_GPLL1); + else if (rate == 125000000) + clk_rcg_set_rate_mnd(priv->base, &emac_regs, 4, 0, 0, + CFG_CLK_SRC_GPLL1); + else if (rate == 50000000) + clk_rcg_set_rate_mnd(priv->base, &emac_regs, 10, 0, 0, + CFG_CLK_SRC_GPLL1); + else if (rate == 5000000) + clk_rcg_set_rate_mnd(priv->base, &emac_regs, 2, 1, 50, + CFG_CLK_SRC_GPLL1); + break; default: return 0; } @@ -111,6 +151,26 @@ int msm_enable(struct clk *clk) case GCC_USB2A_PHY_SLEEP_CLK: clk_enable_cbc(priv->base + USB_HS_PHY_CFG_AHB_CBCR); break; + case GCC_ETH_PTP_CLK: + /* SPEED_1000: freq -> 250MHz */ + clk_enable_cbc(priv->base + ETH_PTP_CBCR); + clk_enable_gpll0(priv->base, &gpll1_vote_clk); + clk_rcg_set_rate_mnd(priv->base, &emac_ptp_regs, 2, 0, 0, + CFG_CLK_SRC_GPLL1); + break; + case GCC_ETH_RGMII_CLK: + /* SPEED_1000: freq -> 250MHz */ + clk_enable_cbc(priv->base + ETH_RGMII_CBCR); + clk_enable_gpll0(priv->base, &gpll1_vote_clk); + clk_rcg_set_rate_mnd(priv->base, &emac_regs, 2, 0, 0, + CFG_CLK_SRC_GPLL1); + break; + case GCC_ETH_SLAVE_AHB_CLK: + clk_enable_cbc(priv->base + ETH_SLAVE_AHB_CBCR); + break; + case GCC_ETH_AXI_CLK: + clk_enable_cbc(priv->base + ETH_AXI_CBCR); + break; default: return 0; } diff --git a/arch/arm/mach-snapdragon/clock-snapdragon.c b/arch/arm/mach-snapdragon/clock-snapdragon.c index fda7098274f..0ac45dce9a9 100644 --- a/arch/arm/mach-snapdragon/clock-snapdragon.c +++ b/arch/arm/mach-snapdragon/clock-snapdragon.c @@ -111,6 +111,30 @@ void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, clk_bcr_update(base + regs->cmd_rcgr); } +/* root set rate for clocks with half integer and mnd_width=0 */ +void clk_rcg_set_rate(phys_addr_t base, const struct bcr_regs *regs, int div, + int source) +{ + u32 cfg; + + /* setup src select and divider */ + cfg = readl(base + regs->cfg_rcgr); + cfg &= ~CFG_MASK; + cfg |= source & CFG_CLK_SRC_MASK; /* Select clock source */ + + /* + * Set the divider; HW permits fraction dividers (+0.5), but + * for simplicity, we will support integers only + */ + if (div) + cfg |= (2 * div - 1) & CFG_DIVIDER_MASK; + + writel(cfg, base + regs->cfg_rcgr); /* Write new clock configuration */ + + /* Inform h/w to start using the new config. */ + clk_bcr_update(base + regs->cmd_rcgr); +} + static int msm_clk_probe(struct udevice *dev) { struct msm_clk_priv *priv = dev_get_priv(dev); diff --git a/arch/arm/mach-snapdragon/clock-snapdragon.h b/arch/arm/mach-snapdragon/clock-snapdragon.h index 2ac53b538dc..c90bbefa588 100644 --- a/arch/arm/mach-snapdragon/clock-snapdragon.h +++ b/arch/arm/mach-snapdragon/clock-snapdragon.h @@ -42,5 +42,7 @@ void clk_enable_cbc(phys_addr_t cbcr); void clk_enable_vote_clk(phys_addr_t base, const struct vote_clk *vclk); void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, int div, int m, int n, int source); +void clk_rcg_set_rate(phys_addr_t base, const struct bcr_regs *regs, int div, + int source); #endif diff --git a/arch/arm/mach-snapdragon/include/mach/sysmap-qcs404.h b/arch/arm/mach-snapdragon/include/mach/sysmap-qcs404.h index e448faad2d6..8920c4ee8ff 100644 --- a/arch/arm/mach-snapdragon/include/mach/sysmap-qcs404.h +++ b/arch/arm/mach-snapdragon/include/mach/sysmap-qcs404.h @@ -12,6 +12,7 @@ /* Clocks: (from CLK_CTL_BASE) */ #define GPLL0_STATUS (0x21000) +#define GPLL1_STATUS (0x20000) #define APCS_GPLL_ENA_VOTE (0x45000) #define APCS_CLOCK_BRANCH_ENA_VOTE (0x45004) @@ -54,4 +55,17 @@ #define USB2A_PHY_SLEEP_CBCR (0x4102C) #define USB_HS_PHY_CFG_AHB_CBCR (0x41030) +/* ETH controller clock control registers */ +#define ETH_PTP_CBCR (0x4e004) +#define ETH_RGMII_CBCR (0x4e008) +#define ETH_SLAVE_AHB_CBCR (0x4e00c) +#define ETH_AXI_CBCR (0x4e010) +#define EMAC_PTP_CMD_RCGR (0x4e014) +#define EMAC_PTP_CFG_RCGR (0x4e018) +#define EMAC_CMD_RCGR (0x4e01c) +#define EMAC_CFG_RCGR (0x4e020) +#define EMAC_M (0x4e024) +#define EMAC_N (0x4e028) +#define EMAC_D (0x4e02c) + #endif diff --git a/arch/arm/mach-snapdragon/pinctrl-qcs404.c b/arch/arm/mach-snapdragon/pinctrl-qcs404.c index 889ead0f572..a6e53c4412e 100644 --- a/arch/arm/mach-snapdragon/pinctrl-qcs404.c +++ b/arch/arm/mach-snapdragon/pinctrl-qcs404.c @@ -22,6 +22,19 @@ static const char * const msm_pinctrl_pins[] = { static const struct pinctrl_function msm_pinctrl_functions[] = { {"blsp_uart2", 1}, + {"rgmii_int", 1}, + {"rgmii_ck", 1}, + {"rgmii_tx", 1}, + {"rgmii_ctl", 1}, + {"rgmii_rx", 1}, + {"rgmii_mdio", 1}, + {"rgmii_mdc", 1}, + {"blsp_i2c0", 3}, + {"blsp_i2c1", 2}, + {"blsp_i2c_sda_a2", 3}, + {"blsp_i2c_scl_a2", 3}, + {"blsp_i2c3", 2}, + {"blsp_i2c4", 1}, }; static const char *qcs404_get_function_name(struct udevice *dev, diff --git a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c index ab884ab6bf9..826dc514866 100644 --- a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c +++ b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c @@ -28,8 +28,9 @@ struct msm_pinctrl_priv { #define TLMM_GPIO_DISABLE BIT(9) static const struct pinconf_param msm_conf_params[] = { - { "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 3 }, + { "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 2 }, { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 }, + { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 3 }, }; static int msm_get_functions_count(struct udevice *dev) @@ -89,6 +90,7 @@ static int msm_pinconf_set(struct udevice *dev, unsigned int pin_selector, switch (param) { case PIN_CONFIG_DRIVE_STRENGTH: + argument = (argument / 2) - 1; clrsetbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector), TLMM_DRV_STRENGTH_MASK, argument << 6); break; @@ -96,6 +98,10 @@ static int msm_pinconf_set(struct udevice *dev, unsigned int pin_selector, clrbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector), TLMM_GPIO_PULL_MASK); break; + case PIN_CONFIG_BIAS_PULL_UP: + clrsetbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector), + TLMM_GPIO_PULL_MASK, argument); + break; default: return 0; } diff --git a/arch/arm/mach-snapdragon/sysmap-qcs404.c b/arch/arm/mach-snapdragon/sysmap-qcs404.c index b7409031a03..64ca4adf1bd 100644 --- a/arch/arm/mach-snapdragon/sysmap-qcs404.c +++ b/arch/arm/mach-snapdragon/sysmap-qcs404.c @@ -19,7 +19,19 @@ static struct mm_region qcs404_mem_map[] = { }, { .virt = 0x80000000UL, /* DDR */ .phys = 0x80000000UL, /* DDR */ - .size = 0x40000000UL, + .size = 0x05900000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + .virt = 0x89600000UL, /* DDR */ + .phys = 0x89600000UL, /* DDR */ + .size = 0x162000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + .virt = 0xa0000000UL, /* DDR */ + .phys = 0xa0000000UL, /* DDR */ + .size = 0x20000000UL, .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE }, { diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c index a8372356b0e..cfafa539aeb 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c @@ -150,7 +150,7 @@ static int do_stm32prog(struct cmd_tbl *cmdtp, int flag, int argc, /* Try bootm for legacy and FIT format image */ if (genimg_get_format(uimage) != IMAGE_FORMAT_INVALID) do_bootm(cmdtp, 0, 4, bootm_argv); - else if (CONFIG_IS_ENABLED(CMD_BOOTZ)) + else if (IS_ENABLED(CONFIG_CMD_BOOTZ)) do_bootz(cmdtp, 0, 4, bootm_argv); } if (data->script) diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c index 89552d2ad10..6f3641ccf57 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c @@ -1583,7 +1583,7 @@ int stm32prog_pmic_read(struct stm32prog_data *data, u32 offset, u8 *buffer, int result = 0, ret; struct udevice *dev; - if (!CONFIG_IS_ENABLED(PMIC_STPMIC1)) { + if (!IS_ENABLED(CONFIG_PMIC_STPMIC1)) { stm32prog_err("PMIC update not supported"); return -EOPNOTSUPP; @@ -1633,7 +1633,7 @@ int stm32prog_pmic_start(struct stm32prog_data *data) int ret; struct udevice *dev; - if (!CONFIG_IS_ENABLED(PMIC_STPMIC1)) { + if (!IS_ENABLED(CONFIG_PMIC_STPMIC1)) { stm32prog_err("PMIC update not supported"); return -EOPNOTSUPP; @@ -1748,7 +1748,7 @@ static void stm32prog_end_phase(struct stm32prog_data *data, u64 offset) } } - if (CONFIG_IS_ENABLED(MTD) && + if (IS_ENABLED(CONFIG_MTD) && data->cur_part->bin_nb > 1) { if (stm32prog_copy_fsbl(data->cur_part)) { stm32prog_err("%s (0x%x): copy of fsbl failed", diff --git a/arch/arm/mach-stm32mp/fdt.c b/arch/arm/mach-stm32mp/fdt.c index 3b4c05d7451..de5c5a55ea0 100644 --- a/arch/arm/mach-stm32mp/fdt.c +++ b/arch/arm/mach-stm32mp/fdt.c @@ -505,7 +505,7 @@ int ft_system_setup(void *blob, struct bd_info *bd) * under CONFIG_STM32MP15x_STM32IMAGE only for compatibility * when FIP is not used by TF-A */ - if (CONFIG_IS_ENABLED(STM32MP15x_STM32IMAGE) && + if (IS_ENABLED(CONFIG_STM32MP15x_STM32IMAGE) && !tee_find_device(NULL, NULL, NULL, NULL)) stm32_fdt_disable_optee(blob); } diff --git a/arch/m68k/lib/bootm.c b/arch/m68k/lib/bootm.c index c1c9bdceb50..f18bed235d4 100644 --- a/arch/m68k/lib/bootm.c +++ b/arch/m68k/lib/bootm.c @@ -60,7 +60,7 @@ int do_bootm_linux(int flag, int argc, char *const argv[], } set_clocks_in_mhz(kbd); - if (CONFIG_IS_ENABLED(LMB)) { + if (IS_ENABLED(CONFIG_LMB)) { ret = image_setup_linux(images); if (ret) goto error; diff --git a/arch/microblaze/cpu/cpuinfo.c b/arch/microblaze/cpu/cpuinfo.c index f021f4e5e25..6b15d6ca41c 100644 --- a/arch/microblaze/cpu/cpuinfo.c +++ b/arch/microblaze/cpu/cpuinfo.c @@ -8,7 +8,7 @@ DECLARE_GLOBAL_DATA_PTR; -#if CONFIG_IS_ENABLED(CPU_MICROBLAZE) +#if IS_ENABLED(CONFIG_CPU_MICROBLAZE) /* These key value are as per MBV field in PVR0 */ static const struct microblaze_version_map cpu_ver_lookup[] = { {"5.00.a", 0x01}, diff --git a/arch/microblaze/include/asm/cpuinfo.h b/arch/microblaze/include/asm/cpuinfo.h index 86d2c8a034d..3c58e52217c 100644 --- a/arch/microblaze/include/asm/cpuinfo.h +++ b/arch/microblaze/include/asm/cpuinfo.h @@ -26,7 +26,7 @@ struct microblaze_cpuinfo { u32 dcache_size; u32 dcache_line_length; -#if CONFIG_IS_ENABLED(CPU_MICROBLAZE) +#if IS_ENABLED(CONFIG_CPU_MICROBLAZE) u32 use_mmu; u32 cpu_freq; u32 addr_size; diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c index 4a5421497e5..930384f4015 100644 --- a/arch/microblaze/lib/bootm.c +++ b/arch/microblaze/lib/bootm.c @@ -73,7 +73,7 @@ static void boot_jump_linux(struct bootm_headers *images, int flag) static void boot_prep_linux(struct bootm_headers *images) { - if (CONFIG_IS_ENABLED(OF_LIBFDT) && CONFIG_IS_ENABLED(LMB) && images->ft_len) { + if (CONFIG_IS_ENABLED(OF_LIBFDT) && IS_ENABLED(CONFIG_LMB) && images->ft_len) { debug("using: FDT\n"); if (image_setup_linux(images)) { printf("FDT creation failed! hanging..."); diff --git a/arch/mips/include/asm/cm.h b/arch/mips/include/asm/cm.h index 5cc8c09621d..c695ffc71f5 100644 --- a/arch/mips/include/asm/cm.h +++ b/arch/mips/include/asm/cm.h @@ -108,7 +108,7 @@ #include <asm/io.h> #include <linux/bitops.h> -#if CONFIG_IS_ENABLED(MIPS_CM) +#if IS_ENABLED(CONFIG_MIPS_CM) static inline void *mips_cm_base(void) { return (void *)CKSEG1ADDR(CONFIG_MIPS_CM_BASE); diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c index 5fda914e6ba..ab92bd06b0e 100644 --- a/arch/mips/lib/bootm.c +++ b/arch/mips/lib/bootm.c @@ -284,10 +284,10 @@ static void boot_jump_linux(struct bootm_headers *images) if (CONFIG_IS_ENABLED(MALTA)) linux_extra = gd->ram_size; -#if CONFIG_IS_ENABLED(BOOTSTAGE_FDT) +#if IS_ENABLED(CONFIG_BOOTSTAGE_FDT) bootstage_fdt_add_report(); #endif -#if CONFIG_IS_ENABLED(BOOTSTAGE_REPORT) +#if IS_ENABLED(CONFIG_BOOTSTAGE_REPORT) bootstage_report(); #endif diff --git a/arch/mips/mach-octeon/cpu.c b/arch/mips/mach-octeon/cpu.c index 1bdc6cd7290..c7744e84706 100644 --- a/arch/mips/mach-octeon/cpu.c +++ b/arch/mips/mach-octeon/cpu.c @@ -448,10 +448,10 @@ int arch_misc_init(void) if (ret) return ret; - if (CONFIG_IS_ENABLED(OCTEON_SERIAL_PCIE_CONSOLE)) + if (IS_ENABLED(CONFIG_OCTEON_SERIAL_PCIE_CONSOLE)) init_pcie_console(); - if (CONFIG_IS_ENABLED(OCTEON_SERIAL_BOOTCMD)) + if (IS_ENABLED(CONFIG_OCTEON_SERIAL_BOOTCMD)) init_bootcmd_console(); return 0; diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c index 7b392b06bcb..910121ec9c8 100644 --- a/arch/powerpc/lib/bootm.c +++ b/arch/powerpc/lib/bootm.c @@ -214,7 +214,7 @@ static int boot_body_linux(struct bootm_headers *images) if (ret) return ret; - if (CONFIG_IS_ENABLED(LMB)) { + if (IS_ENABLED(CONFIG_LMB)) { ret = image_setup_linux(images); if (ret) return ret; diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c index f5f8b4c7333..276677a5e2f 100644 --- a/arch/riscv/lib/bootm.c +++ b/arch/riscv/lib/bootm.c @@ -64,7 +64,7 @@ static void announce_and_cleanup(int fake) static void boot_prep_linux(struct bootm_headers *images) { - if (CONFIG_IS_ENABLED(OF_LIBFDT) && CONFIG_IS_ENABLED(LMB) && images->ft_len) { + if (CONFIG_IS_ENABLED(OF_LIBFDT) && IS_ENABLED(CONFIG_LMB) && images->ft_len) { debug("using: FDT\n"); if (image_setup_linux(images)) { printf("FDT creation failed! hanging..."); diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/dts/sandbox.dtsi index 18bf1cb5b69..7e7fcff6d28 100644 --- a/arch/sandbox/dts/sandbox.dtsi +++ b/arch/sandbox/dts/sandbox.dtsi @@ -4,6 +4,8 @@ * and sandbox64 builds. */ +#include <dt-bindings/input/input.h> + #define USB_CLASS_HUB 9 / { @@ -36,11 +38,13 @@ btn1 { gpios = <&gpio_a 3 0>; label = "button1"; + linux,code = <BTN_1>; }; btn2 { gpios = <&gpio_a 4 0>; label = "button2"; + linux,code = <BTN_2>; }; }; diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index f98f0152ee8..88d4d3cb983 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -172,11 +172,13 @@ btn1 { gpios = <&gpio_a 3 0>; label = "button1"; + linux,code = <BTN_1>; }; btn2 { gpios = <&gpio_a 4 0>; label = "button2"; + linux,code = <BTN_2>; }; }; @@ -1537,6 +1539,20 @@ }; }; + ofnode-foreach { + compatible = "foreach"; + + first { + prop1 = <1>; + prop2 = <2>; + }; + + second { + prop1 = <1>; + prop2 = <2>; + }; + }; + osd { compatible = "sandbox,sandbox_osd"; }; diff --git a/arch/sandbox/lib/bootm.c b/arch/sandbox/lib/bootm.c index 28f4a746fb6..dc8b8e46cb4 100644 --- a/arch/sandbox/lib/bootm.c +++ b/arch/sandbox/lib/bootm.c @@ -55,7 +55,7 @@ static int boot_prep_linux(struct bootm_headers *images) { int ret; - if (CONFIG_IS_ENABLED(LMB)) { + if (IS_ENABLED(CONFIG_LMB)) { ret = image_setup_linux(images); if (ret) return ret; diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c index aaa5ae112e4..d7eedbd7436 100644 --- a/arch/x86/cpu/coreboot/coreboot.c +++ b/arch/x86/cpu/coreboot/coreboot.c @@ -77,7 +77,7 @@ static void board_final_init(void) int last_stage_init(void) { /* start usb so that usb keyboard can be used as input device */ - if (CONFIG_IS_ENABLED(USB_KEYBOARD)) + if (IS_ENABLED(CONFIG_USB_KEYBOARD)) usb_init(); board_final_init(); diff --git a/arch/x86/cpu/efi/payload.c b/arch/x86/cpu/efi/payload.c index 1c28a43778e..19a25dd6408 100644 --- a/arch/x86/cpu/efi/payload.c +++ b/arch/x86/cpu/efi/payload.c @@ -171,7 +171,7 @@ int reserve_arch(void) int last_stage_init(void) { /* start usb so that usb keyboard can be used as input device */ - if (CONFIG_IS_ENABLED(USB_KEYBOARD)) + if (IS_ENABLED(CONFIG_USB_KEYBOARD)) usb_init(); return 0; diff --git a/arch/x86/lib/bootm.c b/arch/x86/lib/bootm.c index eafcddfa24b..873e2bc176f 100644 --- a/arch/x86/lib/bootm.c +++ b/arch/x86/lib/bootm.c @@ -39,7 +39,7 @@ void bootm_announce_and_cleanup(void) timestamp_add_now(TS_START_KERNEL); #endif bootstage_mark_name(BOOTSTAGE_ID_BOOTM_HANDOFF, "start_kernel"); -#if CONFIG_IS_ENABLED(BOOTSTAGE_REPORT) +#if IS_ENABLED(CONFIG_BOOTSTAGE_REPORT) bootstage_report(); #endif @@ -78,7 +78,7 @@ static int boot_prep_linux(struct bootm_headers *images) size_t len; int ret; - if (CONFIG_IS_ENABLED(OF_LIBFDT) && CONFIG_IS_ENABLED(LMB) && images->ft_len) { + if (CONFIG_IS_ENABLED(OF_LIBFDT) && IS_ENABLED(CONFIG_LMB) && images->ft_len) { debug("using: FDT\n"); if (image_setup_linux(images)) { puts("FDT creation failed! hanging..."); diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c index 2bd408d0c56..cc889a688d8 100644 --- a/arch/x86/lib/fsp/fsp_dram.c +++ b/arch/x86/lib/fsp/fsp_dram.c @@ -60,7 +60,7 @@ int dram_init_banksize(void) * * However it seems FSP2's behavior is different. We need to add the * DRAM range in MTRR otherwise the boot process goes very slowly, - * which was observed on Chrromebook Coral with FSP2. + * which was observed on Chromebook Coral with FSP2. */ update_mtrr = CONFIG_IS_ENABLED(FSP_VERSION2); diff --git a/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c b/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c index aa9687f7a9d..34109c69ddb 100644 --- a/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c +++ b/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c @@ -35,7 +35,7 @@ static void setup_gpmi_nand(void) } #endif -#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT) +#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) struct efi_fw_image fw_images[] = { #if defined(CONFIG_TARGET_IMX8MP_RSB3720A1_4G) { diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c index 26652e8f773..2a78df670cc 100644 --- a/board/broadcom/bcmns3/ns3.c +++ b/board/broadcom/bcmns3/ns3.c @@ -150,7 +150,7 @@ int board_init(void) if (bl33_info->version != BL33_INFO_VERSION) printf("*** warning: ATF BL31 and U-Boot not in sync! ***\n"); -#if CONFIG_IS_ENABLED(BNXT_ETH) +#if IS_ENABLED(CONFIG_BNXT_ETH) if (chimp_fastboot_optee() != 0) printf("*** warning: secure chimp fastboot failed! ***\n"); #endif diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c index 847ac33ad6b..7bce09e432c 100644 --- a/board/compulab/cm_fx6/cm_fx6.c +++ b/board/compulab/cm_fx6/cm_fx6.c @@ -736,7 +736,7 @@ U_BOOT_DRVINFO(cm_fx6_serial) = { .plat = &cm_fx6_mxc_serial_plat, }; -#if CONFIG_IS_ENABLED(AHCI) +#if IS_ENABLED(CONFIG_AHCI) static int sata_imx_probe(struct udevice *dev) { int i, err; diff --git a/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c b/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c index 3d7fff34d25..b373e45df95 100644 --- a/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c +++ b/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c @@ -31,7 +31,7 @@ DECLARE_GLOBAL_DATA_PTR; -#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT) +#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) struct efi_fw_image fw_images[] = { #if defined(CONFIG_TARGET_IMX8MM_CL_IOT_GATE) { diff --git a/board/emulation/common/qemu_dfu.c b/board/emulation/common/qemu_dfu.c index c1aeaf10d93..332d659c1f7 100644 --- a/board/emulation/common/qemu_dfu.c +++ b/board/emulation/common/qemu_dfu.c @@ -44,7 +44,7 @@ void set_dfu_alt_info(char *interface, char *devstr) ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN); - if (!CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT) && + if (!IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && env_get("dfu_alt_info")) return; diff --git a/board/emulation/qemu-arm/qemu-arm.c b/board/emulation/qemu-arm/qemu-arm.c index dae37640bc5..34ed3e8ae63 100644 --- a/board/emulation/qemu-arm/qemu-arm.c +++ b/board/emulation/qemu-arm/qemu-arm.c @@ -29,7 +29,7 @@ #ifdef CONFIG_ARM64 #include <asm/armv8/mmu.h> -#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT) +#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) struct efi_fw_image fw_images[] = { #if defined(CONFIG_TARGET_QEMU_ARM_32BIT) { diff --git a/board/engicam/imx8mp/icore_mx8mp.c b/board/engicam/imx8mp/icore_mx8mp.c index b309a12df08..500080c7cff 100644 --- a/board/engicam/imx8mp/icore_mx8mp.c +++ b/board/engicam/imx8mp/icore_mx8mp.c @@ -58,10 +58,10 @@ int board_phy_config(struct phy_device *phydev) int board_init(void) { - if (CONFIG_IS_ENABLED(FEC_MXC)) + if (IS_ENABLED(CONFIG_FEC_MXC)) setup_fec(); - if (CONFIG_IS_ENABLED(DWC_ETH_QOS)) + if (IS_ENABLED(CONFIG_DWC_ETH_QOS)) setup_eqos(); return 0; diff --git a/board/engicam/stm32mp1/stm32mp1.c b/board/engicam/stm32mp1/stm32mp1.c index 0a3e580f5b4..5223e9bae8d 100644 --- a/board/engicam/stm32mp1/stm32mp1.c +++ b/board/engicam/stm32mp1/stm32mp1.c @@ -68,7 +68,7 @@ enum env_location env_get_location(enum env_operation op, int prio) case BOOT_FLASH_NAND: case BOOT_FLASH_SPINAND: - if (CONFIG_IS_ENABLED(ENV_IS_IN_UBI)) + if (IS_ENABLED(CONFIG_ENV_IS_IN_UBI)) return ENVL_UBI; else return ENVL_NOWHERE; diff --git a/board/freescale/imx8mp_evk/imx8mp_evk.c b/board/freescale/imx8mp_evk/imx8mp_evk.c index 8971a827df3..ce211d486ab 100644 --- a/board/freescale/imx8mp_evk/imx8mp_evk.c +++ b/board/freescale/imx8mp_evk/imx8mp_evk.c @@ -55,11 +55,11 @@ int board_init(void) { int ret = 0; - if (CONFIG_IS_ENABLED(FEC_MXC)) { + if (IS_ENABLED(CONFIG_FEC_MXC)) { setup_fec(); } - if (CONFIG_IS_ENABLED(DWC_ETH_QOS)) { + if (IS_ENABLED(CONFIG_DWC_ETH_QOS)) { ret = setup_eqos(); } diff --git a/board/freescale/imx93_evk/imx93_evk.c b/board/freescale/imx93_evk/imx93_evk.c index 182ae5fd518..e73a498733b 100644 --- a/board/freescale/imx93_evk/imx93_evk.c +++ b/board/freescale/imx93_evk/imx93_evk.c @@ -66,10 +66,10 @@ static int setup_eqos(void) int board_init(void) { - if (CONFIG_IS_ENABLED(FEC_MXC)) + if (IS_ENABLED(CONFIG_FEC_MXC)) setup_fec(); - if (CONFIG_IS_ENABLED(DWC_ETH_QOS)) + if (IS_ENABLED(CONFIG_DWC_ETH_QOS)) setup_eqos(); return 0; diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c index cf5b1ee46e0..d8a86cdf618 100644 --- a/board/freescale/lx2160a/lx2160a.c +++ b/board/freescale/lx2160a/lx2160a.c @@ -676,7 +676,7 @@ void board_quiesce_devices(void) } #endif -#if CONFIG_IS_ENABLED(TARGET_LX2160ARDB) +#if IS_ENABLED(CONFIG_TARGET_LX2160ARDB) int fdt_fixup_add_thermal(void *blob, int mux_node, int channel, int reg) { int err; @@ -798,7 +798,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) u64 mc_memory_size = 0; u16 total_memory_banks; int err; -#if CONFIG_IS_ENABLED(TARGET_LX2160ARDB) +#if IS_ENABLED(CONFIG_TARGET_LX2160ARDB) u8 board_rev; #endif @@ -862,7 +862,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) #endif fdt_fixup_icid(blob); -#if CONFIG_IS_ENABLED(TARGET_LX2160ARDB) +#if IS_ENABLED(CONFIG_TARGET_LX2160ARDB) board_rev = (QIXIS_READ(arch) & 0xf) - 1 + 'A'; if (board_rev == 'C') fdt_fixup_i2c_thermal_node(blob); diff --git a/board/keymile/common/common.c b/board/keymile/common/common.c index 0252ada93ff..8c282f9952a 100644 --- a/board/keymile/common/common.c +++ b/board/keymile/common/common.c @@ -79,10 +79,10 @@ int set_km_env(void) } #if CONFIG_IS_ENABLED(PG_WCOM_UBOOT_UPDATE_SUPPORTED) -#if ((!CONFIG_IS_ENABLED(PG_WCOM_UBOOT_BOOTPACKAGE) && \ - !CONFIG_IS_ENABLED(PG_WCOM_UBOOT_UPDATE)) || \ - (CONFIG_IS_ENABLED(PG_WCOM_UBOOT_BOOTPACKAGE) && \ - CONFIG_IS_ENABLED(PG_WCOM_UBOOT_UPDATE))) +#if ((!IS_ENABLED(CONFIG_PG_WCOM_UBOOT_BOOTPACKAGE) && \ + !IS_ENABLED(CONFIG_PG_WCOM_UBOOT_UPDATE)) || \ + (IS_ENABLED(CONFIG_PG_WCOM_UBOOT_BOOTPACKAGE) && \ + IS_ENABLED(CONFIG_PG_WCOM_UBOOT_UPDATE))) #error "It has to be either bootpackage or update u-boot image!" #endif void check_for_uboot_update(void) diff --git a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c index e005ece469b..2f1731eea6a 100644 --- a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c +++ b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c @@ -71,7 +71,7 @@ int board_early_init_f(void) /* QRIO Configuration */ qrio_uprstreq(UPREQ_CORE_RST); -#if CONFIG_IS_ENABLED(TARGET_PG_WCOM_SELI8) +#if IS_ENABLED(CONFIG_TARGET_PG_WCOM_SELI8) qrio_prstcfg(KM_LIU_RST, PRSTCFG_POWUP_UNIT_RST); qrio_wdmask(KM_LIU_RST, true); @@ -79,7 +79,7 @@ int board_early_init_f(void) qrio_wdmask(KM_PAXK_RST, true); #endif -#if CONFIG_IS_ENABLED(TARGET_PG_WCOM_EXPU1) +#if IS_ENABLED(CONFIG_TARGET_PG_WCOM_EXPU1) qrio_prstcfg(WCOM_TMG_RST, PRSTCFG_POWUP_UNIT_RST); qrio_wdmask(WCOM_TMG_RST, true); diff --git a/board/kontron/pitx_imx8m/pitx_imx8m.c b/board/kontron/pitx_imx8m/pitx_imx8m.c index d974af8da1a..af1832c4736 100644 --- a/board/kontron/pitx_imx8m/pitx_imx8m.c +++ b/board/kontron/pitx_imx8m/pitx_imx8m.c @@ -32,7 +32,7 @@ static iomux_v3_cfg_t const uart_pads[] = { IMX8MQ_PAD_ECSPI1_MISO__UART3_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL), }; -#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT) +#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) struct efi_fw_image fw_images[] = { { .image_type_id = KONTRON_PITX_IMX8M_FIT_IMAGE_GUID, diff --git a/board/kontron/sl-mx8mm/sl-mx8mm.c b/board/kontron/sl-mx8mm/sl-mx8mm.c index 4ac430b29a9..250195694ba 100644 --- a/board/kontron/sl-mx8mm/sl-mx8mm.c +++ b/board/kontron/sl-mx8mm/sl-mx8mm.c @@ -18,7 +18,7 @@ DECLARE_GLOBAL_DATA_PTR; -#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT) +#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) struct efi_fw_image fw_images[] = { { .image_type_id = KONTRON_SL_MX8MM_FIT_IMAGE_GUID, diff --git a/board/kontron/sl28/sl28.c b/board/kontron/sl28/sl28.c index 0576b3eae48..89948e087f1 100644 --- a/board/kontron/sl28/sl28.c +++ b/board/kontron/sl28/sl28.c @@ -28,7 +28,7 @@ DECLARE_GLOBAL_DATA_PTR; -#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT) +#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) struct efi_fw_image fw_images[] = { { .image_type_id = KONTRON_SL28_FIT_IMAGE_GUID, @@ -109,7 +109,7 @@ static void print_cpld_version(void) int checkboard(void) { printf("EL: %d\n", current_el()); - if (CONFIG_IS_ENABLED(SL28CPLD)) + if (IS_ENABLED(CONFIG_SL28CPLD)) print_cpld_version(); return 0; @@ -157,7 +157,7 @@ int fsl_board_late_init(void) * If the watchdog isn't enabled at reset (which is a configuration * option) disabling it doesn't hurt either. */ - if (!CONFIG_IS_ENABLED(WATCHDOG_AUTOSTART)) + if (!IS_ENABLED(CONFIG_WATCHDOG_AUTOSTART)) stop_recovery_watchdog(); return 0; @@ -188,7 +188,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) fdt_fixup_icid(blob); - if (CONFIG_IS_ENABLED(SL28_SPL_LOADS_OPTEE_BL32)) { + if (IS_ENABLED(CONFIG_SL28_SPL_LOADS_OPTEE_BL32)) { node = fdt_node_offset_by_compatible(blob, -1, "linaro,optee-tz"); if (node) fdt_set_node_status(blob, node, FDT_STATUS_OKAY); diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c index f56b379b937..c99ffdd75e8 100644 --- a/board/rockchip/evb_rk3399/evb-rk3399.c +++ b/board/rockchip/evb_rk3399/evb-rk3399.c @@ -14,7 +14,7 @@ #define ROCKPI4_UPDATABLE_IMAGES 2 -#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT) +#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) static struct efi_fw_image fw_images[ROCKPI4_UPDATABLE_IMAGES] = {0}; struct efi_capsule_update_info update_info = { diff --git a/board/sandbox/sandbox.c b/board/sandbox/sandbox.c index 8b953f9b397..2e44bdf0df3 100644 --- a/board/sandbox/sandbox.c +++ b/board/sandbox/sandbox.c @@ -29,7 +29,7 @@ */ gd_t *gd; -#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT) +#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) /* GUIDs for capsule updatable firmware images */ #define SANDBOX_UBOOT_IMAGE_GUID \ EFI_GUID(0x09d7cf52, 0x0720, 0x4710, 0x91, 0xd1, \ diff --git a/board/sifive/unleashed/unleashed.c b/board/sifive/unleashed/unleashed.c index f8aad862c6d..b6ab06a08fb 100644 --- a/board/sifive/unleashed/unleashed.c +++ b/board/sifive/unleashed/unleashed.c @@ -27,7 +27,7 @@ #ifdef CONFIG_MISC_INIT_R -#if CONFIG_IS_ENABLED(SIFIVE_OTP) +#if IS_ENABLED(CONFIG_SIFIVE_OTP) static u32 otp_read_serialnum(struct udevice *dev) { int ret; @@ -53,7 +53,7 @@ static u32 fu540_read_serialnum(void) { u32 serial = ERROR_READING_SERIAL_NUMBER; -#if CONFIG_IS_ENABLED(SIFIVE_OTP) +#if IS_ENABLED(CONFIG_SIFIVE_OTP) struct udevice *dev; int ret; diff --git a/board/socionext/developerbox/developerbox.c b/board/socionext/developerbox/developerbox.c index 6415c90c1c1..16e14d4f7f5 100644 --- a/board/socionext/developerbox/developerbox.c +++ b/board/socionext/developerbox/developerbox.c @@ -18,7 +18,7 @@ #include <linux/kernel.h> -#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT) +#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) struct efi_fw_image fw_images[] = { { .image_type_id = DEVELOPERBOX_UBOOT_IMAGE_GUID, diff --git a/board/st/common/stm32mp_dfu.c b/board/st/common/stm32mp_dfu.c index 0096f71dfc1..1cf4a3d5fa1 100644 --- a/board/st/common/stm32mp_dfu.c +++ b/board/st/common/stm32mp_dfu.c @@ -123,7 +123,7 @@ void set_dfu_alt_info(char *interface, char *devstr) board_get_alt_info_mmc(dev, buf); } - if (CONFIG_IS_ENABLED(MTD)) { + if (IS_ENABLED(CONFIG_MTD)) { /* probe all MTD devices */ mtd_probe_devices(); diff --git a/board/st/common/stm32mp_mtdparts.c b/board/st/common/stm32mp_mtdparts.c index 18878424c7a..67a56a2623a 100644 --- a/board/st/common/stm32mp_mtdparts.c +++ b/board/st/common/stm32mp_mtdparts.c @@ -96,7 +96,7 @@ void board_mtdparts_default(const char **mtdids, const char **mtdparts) case BOOT_SERIAL_UART: case BOOT_SERIAL_USB: serial = true; - if (CONFIG_IS_ENABLED(CMD_STM32PROG)) { + if (IS_ENABLED(CONFIG_CMD_STM32PROG)) { #ifdef CONFIG_STM32MP15x_STM32IMAGE tee = stm32prog_get_tee_partitions(); #endif diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index 47b3d1bf4c5..ca8f0255ae0 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -88,7 +88,7 @@ #define USB_START_LOW_THRESHOLD_UV 1230000 #define USB_START_HIGH_THRESHOLD_UV 2150000 -#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT) +#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) struct efi_fw_image fw_images[1]; struct efi_capsule_update_info update_info = { @@ -129,7 +129,7 @@ int checkboard(void) fdt_compat && fdt_compat_len ? fdt_compat : ""); /* display the STMicroelectronics board identification */ - if (CONFIG_IS_ENABLED(CMD_STBOARD)) { + if (IS_ENABLED(CONFIG_CMD_STBOARD)) { ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(stm32mp_bsec), &dev); @@ -677,7 +677,7 @@ int board_init(void) setup_led(LEDST_ON); -#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT) +#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) efi_guid_t image_type_guid = STM32MP_FIP_IMAGE_GUID; guidcpy(&fw_images[0].image_type_id, &image_type_guid); @@ -831,7 +831,7 @@ enum env_location env_get_location(enum env_operation op, int prio) case BOOT_FLASH_NAND: case BOOT_FLASH_SPINAND: - if (CONFIG_IS_ENABLED(ENV_IS_IN_UBI)) + if (IS_ENABLED(CONFIG_ENV_IS_IN_UBI)) return ENVL_UBI; else return ENVL_NOWHERE; @@ -930,7 +930,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) if (IS_ENABLED(CONFIG_FDT_FIXUP_PARTITIONS)) fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes)); - if (CONFIG_IS_ENABLED(FDT_SIMPLEFB)) + if (IS_ENABLED(CONFIG_FDT_SIMPLEFB)) fdt_simplefb_enable_and_mem_rsv(blob); return 0; diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c index 0e57ee566b3..9ea507a8e96 100644 --- a/board/ti/am57xx/board.c +++ b/board/ti/am57xx/board.c @@ -1172,7 +1172,7 @@ int board_fit_config_name_match(const char *name) } #endif -#if CONFIG_IS_ENABLED(FASTBOOT) && !CONFIG_IS_ENABLED(ENV_IS_NOWHERE) +#if IS_ENABLED(CONFIG_FASTBOOT) && !CONFIG_IS_ENABLED(ENV_IS_NOWHERE) int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason) { if (reason != FASTBOOT_REBOOT_REASON_BOOTLOADER) diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c index 568c8fb0411..a8a216d034a 100644 --- a/board/ti/dra7xx/evm.c +++ b/board/ti/dra7xx/evm.c @@ -1049,7 +1049,7 @@ int board_fit_config_name_match(const char *name) } #endif -#if CONFIG_IS_ENABLED(FASTBOOT) && !CONFIG_IS_ENABLED(ENV_IS_NOWHERE) +#if IS_ENABLED(CONFIG_FASTBOOT) && !CONFIG_IS_ENABLED(ENV_IS_NOWHERE) int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason) { if (reason != FASTBOOT_REBOOT_REASON_BOOTLOADER) diff --git a/board/traverse/ten64/ten64.c b/board/traverse/ten64/ten64.c index e6403cad1f5..5dfb7165c0e 100644 --- a/board/traverse/ten64/ten64.c +++ b/board/traverse/ten64/ten64.c @@ -97,7 +97,7 @@ int checkboard(void) printf("Unknown boot source %d\n", src); puts("Controller: "); - if (CONFIG_IS_ENABLED(TEN64_CONTROLLER)) { + if (IS_ENABLED(CONFIG_TEN64_CONTROLLER)) { /* Driver not compatible with alpha/beta board MCU firmware */ if (board_rev <= TEN64_BOARD_REV_C) { if (ten64_read_board_info(&boardinfo)) { @@ -123,7 +123,7 @@ int board_init(void) { init_final_memctl_regs(); - if (CONFIG_IS_ENABLED(FSL_CAAM)) + if (IS_ENABLED(CONFIG_FSL_CAAM)) sec_init(); return 0; @@ -211,7 +211,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) base[i] = gd->bd->bi_dram[i].start; size[i] = gd->bd->bi_dram[i].size; /* reduce size if reserved memory is within this bank */ - if (CONFIG_IS_ENABLED(RESV_RAM) && RESV_MEM_IN_BANK(i)) + if (IS_ENABLED(CONFIG_RESV_RAM) && RESV_MEM_IN_BANK(i)) size[i] = gd->arch.resv_ram - base[i]; } @@ -229,7 +229,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) fdt_fsl_mc_fixup_iommu_map_entry(blob); - if (CONFIG_IS_ENABLED(FSL_MC_ENET)) + if (IS_ENABLED(CONFIG_FSL_MC_ENET)) fdt_fixup_board_enet(blob); fdt_fixup_icid(blob); @@ -375,7 +375,7 @@ static void ten64_board_retimer_ds110df410_init(void) /* Retimer power cycle not implemented on early board * revisions/controller firmwares */ - if (CONFIG_IS_ENABLED(TEN64_CONTROLLER) && + if (IS_ENABLED(CONFIG_TEN64_CONTROLLER) && board_rev >= TEN64_BOARD_REV_C) { ret = board_cycle_retimer(&retim_dev); if (ret) { diff --git a/board/variscite/imx8mn_var_som/imx8mn_var_som.c b/board/variscite/imx8mn_var_som/imx8mn_var_som.c index e274e0e0a4c..d40f4d01761 100644 --- a/board/variscite/imx8mn_var_som/imx8mn_var_som.c +++ b/board/variscite/imx8mn_var_som/imx8mn_var_som.c @@ -18,7 +18,7 @@ static void setup_fec(void) int board_init(void) { - if (CONFIG_IS_ENABLED(FEC_MXC)) + if (IS_ENABLED(CONFIG_FEC_MXC)) setup_fec(); return 0; diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c index fbc76eef20d..d071ebfb9cc 100644 --- a/board/xilinx/common/board.c +++ b/board/xilinx/common/board.c @@ -33,7 +33,7 @@ #include "fru.h" -#if CONFIG_IS_ENABLED(EFI_HAVE_CAPSULE_SUPPORT) +#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) struct efi_fw_image fw_images[] = { #if defined(XILINX_BOOT_IMAGE_GUID) { @@ -208,7 +208,7 @@ static int xilinx_read_eeprom_fru(struct udevice *dev, char *name, } fru_capture((unsigned long)fru_content); - if (gd->flags & GD_FLG_RELOC || (_DEBUG && CONFIG_IS_ENABLED(DTB_RESELECT))) { + if (gd->flags & GD_FLG_RELOC || (_DEBUG && IS_ENABLED(CONFIG_DTB_RESELECT))) { printf("Xilinx I2C FRU format at %s:\n", name); ret = fru_display(0); if (ret) { @@ -306,7 +306,7 @@ static int xilinx_read_eeprom_single(char *name, debug("%s: i2c memory detected: %s\n", __func__, name); - if (CONFIG_IS_ENABLED(CMD_FRU) && xilinx_detect_fru(buffer)) + if (IS_ENABLED(CONFIG_CMD_FRU) && xilinx_detect_fru(buffer)) return xilinx_read_eeprom_fru(dev, name, desc); if (xilinx_detect_legacy(buffer)) @@ -412,14 +412,14 @@ int board_late_init_xilinx(void) struct xilinx_board_description *desc; phys_size_t bootm_size = gd->ram_top - gd->ram_base; - if (!CONFIG_IS_ENABLED(MICROBLAZE)) { + if (!IS_ENABLED(CONFIG_MICROBLAZE)) { ulong scriptaddr; scriptaddr = env_get_hex("scriptaddr", 0); ret |= env_set_hex("scriptaddr", gd->ram_base + scriptaddr); } - if (CONFIG_IS_ENABLED(ARCH_ZYNQ) || CONFIG_IS_ENABLED(MICROBLAZE)) + if (IS_ENABLED(CONFIG_ARCH_ZYNQ) || IS_ENABLED(CONFIG_MICROBLAZE)) bootm_size = min(bootm_size, (phys_size_t)(SZ_512M + SZ_256M)); ret |= env_set_hex("script_offset_f", CONFIG_BOOT_SCRIPT_OFFSET); @@ -481,7 +481,7 @@ int __maybe_unused board_fit_config_name_match(const char *name) debug("%s: Check %s, default %s\n", __func__, name, board_name); #if !defined(CONFIG_SPL_BUILD) - if (CONFIG_IS_ENABLED(REGEX)) { + if (IS_ENABLED(CONFIG_REGEX)) { struct slre slre; int ret; @@ -501,7 +501,7 @@ int __maybe_unused board_fit_config_name_match(const char *name) return -1; } -#if CONFIG_IS_ENABLED(DTB_RESELECT) +#if IS_ENABLED(CONFIG_DTB_RESELECT) #define MAX_NAME_LENGTH 50 char * __maybe_unused __weak board_name_decode(void) diff --git a/board/xilinx/versal-net/board.c b/board/xilinx/versal-net/board.c index 5fb71107ddc..6724c7290f8 100644 --- a/board/xilinx/versal-net/board.c +++ b/board/xilinx/versal-net/board.c @@ -172,7 +172,7 @@ int board_late_init(void) return 0; } - if (!CONFIG_IS_ENABLED(ENV_VARS_UBOOT_RUNTIME_CONFIG)) + if (!IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) return 0; return board_late_init_xilinx(); @@ -195,7 +195,7 @@ int dram_init(void) { int ret; - if (CONFIG_IS_ENABLED(SYS_MEM_RSVD_FOR_MMU)) + if (IS_ENABLED(CONFIG_SYS_MEM_RSVD_FOR_MMU)) ret = fdtdec_setup_mem_size_base(); else ret = fdtdec_setup_mem_size_base_lowest(); diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c index 4cdc2ecd1d2..81e1b69905e 100644 --- a/board/xilinx/versal/board.c +++ b/board/xilinx/versal/board.c @@ -142,7 +142,7 @@ int board_late_init(void) return 0; } - if (!CONFIG_IS_ENABLED(ENV_VARS_UBOOT_RUNTIME_CONFIG)) + if (!IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) return 0; bootmode = versal_get_bootmode(); diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c index df4c4576723..9a59445b442 100644 --- a/board/xilinx/zynq/board.c +++ b/board/xilinx/zynq/board.c @@ -55,7 +55,7 @@ int board_late_init(void) return 0; } - if (!CONFIG_IS_ENABLED(ENV_VARS_UBOOT_RUNTIME_CONFIG)) + if (!IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) return 0; switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) { diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index e3f70c4caf4..39da96bcfb0 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -405,7 +405,7 @@ int board_late_init(void) return 0; } - if (!CONFIG_IS_ENABLED(ENV_VARS_UBOOT_RUNTIME_CONFIG)) + if (!IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) return 0; ret = set_fdtfile(); diff --git a/boot/Makefile b/boot/Makefile index 0db4672b050..5424b6fafcc 100644 --- a/boot/Makefile +++ b/boot/Makefile @@ -30,8 +30,9 @@ obj-$(CONFIG_$(SPL_TPL_)QFW) += bootmeth_qfw.o obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_SANDBOX) += bootmeth_sandbox.o obj-$(CONFIG_$(SPL_TPL_)BOOTMETH_SCRIPT) += bootmeth_script.o ifdef CONFIG_$(SPL_TPL_)BOOTSTD_FULL -obj-$(CONFIG_$(SPL_TPL_)CMD_BOOTEFI_BOOTMGR) += bootmeth_efi_mgr.o +obj-$(CONFIG_CMD_BOOTEFI_BOOTMGR) += bootmeth_efi_mgr.o obj-$(CONFIG_$(SPL_TPL_)EXPO) += bootflow_menu.o +obj-$(CONFIG_$(SPL_TPL_)BOOTSTD) += bootflow_menu.o endif obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += image-fdt.o diff --git a/boot/bootm.c b/boot/bootm.c index 15fce8ad95e..2eec60ec7b5 100644 --- a/boot/bootm.c +++ b/boot/bootm.c @@ -100,7 +100,7 @@ static int bootm_pre_load(struct cmd_tbl *cmdtp, int flag, int argc, ulong data_addr = bootm_data_addr(argc, argv); int ret = 0; - if (CONFIG_IS_ENABLED(CMD_BOOTM_PRE_LOAD)) + if (IS_ENABLED(CONFIG_CMD_BOOTM_PRE_LOAD)) ret = image_pre_load(data_addr); if (ret) @@ -226,7 +226,7 @@ static int bootm_find_os(struct cmd_tbl *cmdtp, int flag, int argc, } if (images.os.type == IH_TYPE_KERNEL_NOLOAD) { - if (CONFIG_IS_ENABLED(CMD_BOOTI) && + if (IS_ENABLED(CONFIG_CMD_BOOTI) && images.os.arch == IH_ARCH_ARM64) { ulong image_addr; ulong image_size; @@ -313,7 +313,7 @@ int bootm_find_images(int flag, int argc, char *const argv[], ulong start, return 1; } - if (CONFIG_IS_ENABLED(CMD_FDT)) + if (IS_ENABLED(CONFIG_CMD_FDT)) set_working_fdt_addr(map_to_sysmem(images.ft_addr)); #endif @@ -893,7 +893,7 @@ static const void *boot_get_kernel(struct cmd_tbl *cmdtp, int flag, int argc, &fit_uname_config, &fit_uname_kernel); - if (CONFIG_IS_ENABLED(CMD_BOOTM_PRE_LOAD)) + if (IS_ENABLED(CONFIG_CMD_BOOTM_PRE_LOAD)) img_addr += image_load_offset; bootstage_mark(BOOTSTAGE_ID_CHECK_MAGIC); diff --git a/boot/image-board.c b/boot/image-board.c index e5d71a3d541..25b60ec30b3 100644 --- a/boot/image-board.c +++ b/boot/image-board.c @@ -927,7 +927,7 @@ int image_setup_linux(struct bootm_headers *images) int ret; /* This function cannot be called without lmb support */ - if (!CONFIG_IS_ENABLED(LMB)) + if (!IS_ENABLED(CONFIG_LMB)) return -EFAULT; if (CONFIG_IS_ENABLED(OF_LIBFDT)) boot_fdt_add_mem_rsv_regions(lmb, *of_flat_tree); diff --git a/boot/image-fdt.c b/boot/image-fdt.c index b830a0ab418..714d05d1a53 100644 --- a/boot/image-fdt.c +++ b/boot/image-fdt.c @@ -272,7 +272,7 @@ int boot_relocate_fdt(struct lmb *lmb, char **of_flat_tree, ulong *of_size) *of_flat_tree = of_start; *of_size = of_len; - if (CONFIG_IS_ENABLED(CMD_FDT)) + if (IS_ENABLED(CONFIG_CMD_FDT)) set_working_fdt_addr(map_to_sysmem(*of_flat_tree)); return 0; @@ -638,7 +638,7 @@ int image_setup_libfdt(struct bootm_headers *images, void *blob, /* Update ethernet nodes */ fdt_fixup_ethernet(blob); -#if CONFIG_IS_ENABLED(CMD_PSTORE) +#if IS_ENABLED(CONFIG_CMD_PSTORE) /* Append PStore configuration */ fdt_fixup_pstore(blob); #endif diff --git a/cmd/bootcount.c b/cmd/bootcount.c index 654bbb805c1..3898d2543d2 100644 --- a/cmd/bootcount.c +++ b/cmd/bootcount.c @@ -46,7 +46,7 @@ static int do_bootcount(struct cmd_tbl *cmdtp, int flag, int argc, return CMD_RET_USAGE; } -#if CONFIG_IS_ENABLED(SYS_LONGHELP) +#if IS_ENABLED(CONFIG_SYS_LONGHELP) static char bootcount_help_text[] = "print - print current bootcounter\n" "reset - reset the bootcounter" @@ -55,7 +55,7 @@ static char bootcount_help_text[] = U_BOOT_CMD(bootcount, 2, 1, do_bootcount, "bootcount", -#if CONFIG_IS_ENABLED(SYS_LONGHELP) +#if IS_ENABLED(CONFIG_SYS_LONGHELP) bootcount_help_text #endif ); diff --git a/cmd/bootmenu.c b/cmd/bootmenu.c index 8dc133c2362..6baeedc69f9 100644 --- a/cmd/bootmenu.c +++ b/cmd/bootmenu.c @@ -223,7 +223,7 @@ static int prepare_bootmenu_entry(struct bootmenu_data *menu, return 1; } -#if (CONFIG_IS_ENABLED(CMD_BOOTEFI_BOOTMGR)) && (CONFIG_IS_ENABLED(CMD_EFICONFIG)) +#if (IS_ENABLED(CONFIG_CMD_BOOTEFI_BOOTMGR)) && (IS_ENABLED(CONFIG_CMD_EFICONFIG)) /** * prepare_uefi_bootorder_entry() - generate the uefi bootmenu entries * @@ -343,7 +343,7 @@ static struct bootmenu_data *bootmenu_create(int delay) if (ret < 0) goto cleanup; -#if (CONFIG_IS_ENABLED(CMD_BOOTEFI_BOOTMGR)) && (CONFIG_IS_ENABLED(CMD_EFICONFIG)) +#if (IS_ENABLED(CONFIG_CMD_BOOTEFI_BOOTMGR)) && (IS_ENABLED(CONFIG_CMD_EFICONFIG)) if (i < MAX_COUNT - 1) { efi_status_t efi_ret; diff --git a/cmd/cls.c b/cmd/cls.c index 18643ec0243..40a32eeab63 100644 --- a/cmd/cls.c +++ b/cmd/cls.c @@ -19,7 +19,7 @@ static int do_video_clear(struct cmd_tbl *cmdtp, int flag, int argc, /* Send clear screen and home */ printf(CSI "2J" CSI "1;1H"); - if (CONFIG_IS_ENABLED(VIDEO) && !CONFIG_IS_ENABLED(VIDEO_ANSI)) { + if (IS_ENABLED(CONFIG_VIDEO) && !IS_ENABLED(CONFIG_VIDEO_ANSI)) { if (uclass_first_device_err(UCLASS_VIDEO, &dev)) return CMD_RET_FAILURE; if (video_clear(dev)) diff --git a/cmd/cpu.c b/cmd/cpu.c index a09736e1bb9..314852440f1 100644 --- a/cmd/cpu.c +++ b/cmd/cpu.c @@ -83,7 +83,7 @@ static int do_cpu_detail(struct cmd_tbl *cmdtp, int flag, int argc, return 0; } -#if CONFIG_IS_ENABLED(SYS_LONGHELP) +#if IS_ENABLED(CONFIG_SYS_LONGHELP) static char cpu_help_text[] = "list - list available CPUs\n" "cpu detail - show CPU detail" @@ -84,7 +84,7 @@ static int do_dm_dump_uclass(struct cmd_tbl *cmdtp, int flag, int argc, #define DM_MEM #endif -#if CONFIG_IS_ENABLED(SYS_LONGHELP) +#if IS_ENABLED(CONFIG_SYS_LONGHELP) static char dm_help_text[] = "compat Dump list of drivers with compatibility strings\n" "dm devres Dump list of device resources for each device\n" diff --git a/cmd/eficonfig.c b/cmd/eficonfig.c index 0a17b8cf343..720f52b48b8 100644 --- a/cmd/eficonfig.c +++ b/cmd/eficonfig.c @@ -2674,7 +2674,7 @@ static const struct eficonfig_item maintenance_menu_items[] = { {"Edit Boot Option", eficonfig_process_edit_boot_option}, {"Change Boot Order", eficonfig_process_change_boot_order}, {"Delete Boot Option", eficonfig_process_delete_boot_option}, -#if (CONFIG_IS_ENABLED(EFI_SECURE_BOOT) && CONFIG_IS_ENABLED(EFI_MM_COMM_TEE)) +#if (IS_ENABLED(CONFIG_EFI_SECURE_BOOT) && IS_ENABLED(CONFIG_EFI_MM_COMM_TEE)) {"Secure Boot Configuration", eficonfig_process_secure_boot_config}, #endif {"Quit", eficonfig_process_quit}, diff --git a/cmd/fastboot.c b/cmd/fastboot.c index b94dbd54884..97dc02ce748 100644 --- a/cmd/fastboot.c +++ b/cmd/fastboot.c @@ -21,7 +21,7 @@ static int do_fastboot_udp(int argc, char *const argv[], { int err; - if (!CONFIG_IS_ENABLED(UDP_FUNCTION_FASTBOOT)) { + if (!IS_ENABLED(CONFIG_UDP_FUNCTION_FASTBOOT)) { pr_err("Fastboot UDP not enabled\n"); return CMD_RET_FAILURE; } @@ -44,7 +44,7 @@ static int do_fastboot_usb(int argc, char *const argv[], char *endp; int ret; - if (!CONFIG_IS_ENABLED(USB_FUNCTION_FASTBOOT)) { + if (!IS_ENABLED(CONFIG_USB_FUNCTION_FASTBOOT)) { pr_err("Fastboot USB not enabled\n"); return CMD_RET_FAILURE; } diff --git a/cmd/net.c b/cmd/net.c index 4227321871c..d5e20843dda 100644 --- a/cmd/net.c +++ b/cmd/net.c @@ -280,7 +280,7 @@ static int parse_args(enum proto_t proto, int argc, char *const argv[]) switch (argc) { case 1: - if (CONFIG_IS_ENABLED(CMD_TFTPPUT) && proto == TFTPPUT) + if (IS_ENABLED(CONFIG_CMD_TFTPPUT) && proto == TFTPPUT) return 1; /* refresh bootfile name from env */ @@ -289,7 +289,7 @@ static int parse_args(enum proto_t proto, int argc, char *const argv[]) break; case 2: - if (CONFIG_IS_ENABLED(CMD_TFTPPUT) && proto == TFTPPUT) + if (IS_ENABLED(CONFIG_CMD_TFTPPUT) && proto == TFTPPUT) return 1; /* * Only one arg - accept two forms: @@ -311,7 +311,7 @@ static int parse_args(enum proto_t proto, int argc, char *const argv[]) break; case 3: - if (CONFIG_IS_ENABLED(CMD_TFTPPUT) && proto == TFTPPUT) { + if (IS_ENABLED(CONFIG_CMD_TFTPPUT) && proto == TFTPPUT) { if (parse_addr_size(argv)) return 1; } else { diff --git a/cmd/nvedit.c b/cmd/nvedit.c index e2a5f0089e9..7cbc3fd573a 100644 --- a/cmd/nvedit.c +++ b/cmd/nvedit.c @@ -231,7 +231,7 @@ static int _do_env_set(int flag, int argc, char *const argv[], int env_flag) debug("Initial value for argc=%d\n", argc); -#if CONFIG_IS_ENABLED(CMD_NVEDIT_EFI) +#if !IS_ENABLED(CONFIG_SPL_BUILD) && IS_ENABLED(CONFIG_CMD_NVEDIT_EFI) if (argc > 1 && argv[1][0] == '-' && argv[1][1] == 'e') return do_env_set_efi(NULL, flag, --argc, ++argv); #endif diff --git a/cmd/ti/pd.c b/cmd/ti/pd.c index 008668fd903..a9a182fc386 100644 --- a/cmd/ti/pd.c +++ b/cmd/ti/pd.c @@ -177,7 +177,7 @@ static int ti_do_pd(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv U_BOOT_CMD(pd, 4, 1, ti_do_pd, "TI power domain control", -#if CONFIG_IS_ENABLED(SYS_LONGHELP) +#if IS_ENABLED(CONFIG_SYS_LONGHELP) "dump - show power domain status\n" "enable [psc] [lpsc] - enable power domain\n" "disable [psc] [lpsc] - disable power domain\n" diff --git a/common/board_r.c b/common/board_r.c index 3618acad437..c6c0c1ab1d9 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -155,7 +155,7 @@ static int initr_reloc_global_data(void) * The fdt_blob needs to be moved to new relocation address * incase of FDT blob is embedded with in image */ - if (CONFIG_IS_ENABLED(OF_EMBED) && CONFIG_IS_ENABLED(NEEDS_MANUAL_RELOC)) + if (IS_ENABLED(CONFIG_OF_EMBED) && IS_ENABLED(CONFIG_NEEDS_MANUAL_RELOC)) gd->fdt_blob += gd->reloc_off; #ifdef CONFIG_EFI_LOADER @@ -452,8 +452,8 @@ static int initr_env(void) env_set_hex("fdtcontroladdr", (unsigned long)map_to_sysmem(gd->fdt_blob)); - #if (CONFIG_IS_ENABLED(SAVE_PREV_BL_INITRAMFS_START_ADDR) || \ - CONFIG_IS_ENABLED(SAVE_PREV_BL_FDT_ADDR)) + #if (IS_ENABLED(CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR) || \ + IS_ENABLED(CONFIG_SAVE_PREV_BL_FDT_ADDR)) save_prev_bl_data(); #endif @@ -609,7 +609,7 @@ static init_fnc_t init_sequence_r[] = { */ #endif initr_reloc_global_data, -#if CONFIG_IS_ENABLED(NEEDS_MANUAL_RELOC) && CONFIG_IS_ENABLED(EVENT) +#if IS_ENABLED(CONFIG_NEEDS_MANUAL_RELOC) && CONFIG_IS_ENABLED(EVENT) event_manual_reloc, #endif #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500) diff --git a/common/cli.c b/common/cli.c index ba45dad2db5..9451e6a1426 100644 --- a/common/cli.c +++ b/common/cli.c @@ -31,7 +31,7 @@ */ int run_command(const char *cmd, int flag) { -#if !CONFIG_IS_ENABLED(HUSH_PARSER) +#if !IS_ENABLED(CONFIG_HUSH_PARSER) /* * cli_run_command can return 0 or 1 for success, so clean up * its result. diff --git a/common/event.c b/common/event.c index c312556490e..164c95f8f52 100644 --- a/common/event.c +++ b/common/event.c @@ -155,7 +155,7 @@ void event_show_spy_list(void) } } -#if CONFIG_IS_ENABLED(NEEDS_MANUAL_RELOC) +#if IS_ENABLED(CONFIG_NEEDS_MANUAL_RELOC) int event_manual_reloc(void) { struct evspy_info *spy, *end; diff --git a/common/fdt_simplefb.c b/common/fdt_simplefb.c index 71d4c8fde90..282c34fe0b9 100644 --- a/common/fdt_simplefb.c +++ b/common/fdt_simplefb.c @@ -82,7 +82,7 @@ int fdt_simplefb_enable_existing_node(void *blob) return fdt_simplefb_configure_node(blob, off); } -#if CONFIG_IS_ENABLED(VIDEO) +#if IS_ENABLED(CONFIG_VIDEO) int fdt_simplefb_enable_and_mem_rsv(void *blob) { struct fdt_memory mem; diff --git a/common/hash.c b/common/hash.c index 9e53545dbde..9a52d6073ce 100644 --- a/common/hash.c +++ b/common/hash.c @@ -326,8 +326,8 @@ static struct hash_algo hash_algo[] = { }; /* Try to minimize code size for boards that don't want much hashing */ -#if CONFIG_IS_ENABLED(SHA256) || CONFIG_IS_ENABLED(CMD_SHA1SUM) || \ - CONFIG_IS_ENABLED(CRC32_VERIFY) || CONFIG_IS_ENABLED(CMD_HASH) || \ +#if CONFIG_IS_ENABLED(SHA256) || IS_ENABLED(CONFIG_CMD_SHA1SUM) || \ + CONFIG_IS_ENABLED(CRC32_VERIFY) || IS_ENABLED(CONFIG_CMD_HASH) || \ CONFIG_IS_ENABLED(SHA384) || CONFIG_IS_ENABLED(SHA512) #define multi_hash() 1 #else diff --git a/common/splash.c b/common/splash.c index 2e466a8a0f5..245ff680ebd 100644 --- a/common/splash.c +++ b/common/splash.c @@ -89,7 +89,7 @@ static inline int splash_video_logo_load(void) { return -ENOSYS; } __weak int splash_screen_prepare(void) { - if (CONFIG_IS_ENABLED(SPLASH_SOURCE)) + if (IS_ENABLED(CONFIG_SPLASH_SOURCE)) return splash_source_load(default_splash_locations, ARRAY_SIZE(default_splash_locations)); diff --git a/configs/bcm7260_defconfig b/configs/bcm7260_defconfig index f8e0327d8f5..51e0a5ddd71 100644 --- a/configs/bcm7260_defconfig +++ b/configs/bcm7260_defconfig @@ -40,6 +40,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_BCMSTB=y CONFIG_MTD=y -CONFIG_SYS_NS16550_SERIAL=y -CONFIG_SYS_NS16550_REG_SIZE=-4 +CONFIG_DM_SERIAL=y +CONFIG_SYS_NS16550=y # CONFIG_EFI_LOADER is not set diff --git a/configs/bcm7445_defconfig b/configs/bcm7445_defconfig index 81433b02cbc..f5f1e8d3970 100644 --- a/configs/bcm7445_defconfig +++ b/configs/bcm7445_defconfig @@ -44,8 +44,8 @@ CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SYS_NS16550_SERIAL=y -CONFIG_SYS_NS16550_REG_SIZE=-4 +CONFIG_DM_SERIAL=y +CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_BCMSTB_SPI=y diff --git a/configs/qcs404evb_defconfig b/configs/qcs404evb_defconfig index dae15514115..d64cd742693 100644 --- a/configs/qcs404evb_defconfig +++ b/configs/qcs404evb_defconfig @@ -44,6 +44,7 @@ CONFIG_DM_PMIC=y CONFIG_PMIC_QCOM=y CONFIG_DM_RESET=y CONFIG_MSM_SERIAL=y +CONFIG_MSM_GPIO=y CONFIG_SPMI_MSM=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y diff --git a/disk/part_dos.c b/disk/part_dos.c index a94702c5f34..56e61884def 100644 --- a/disk/part_dos.c +++ b/disk/part_dos.c @@ -318,7 +318,7 @@ int is_valid_dos_buf(void *buf) return test_block_type(buf) == DOS_MBR ? 0 : -1; } -#if CONFIG_IS_ENABLED(CMD_MBR) +#if IS_ENABLED(CONFIG_CMD_MBR) static void lba_to_chs(lbaint_t lba, unsigned char *rc, unsigned char *rh, unsigned char *rs) { diff --git a/disk/part_efi.c b/disk/part_efi.c index 18f7e584050..80a44dc9f07 100644 --- a/disk/part_efi.c +++ b/disk/part_efi.c @@ -242,7 +242,7 @@ void part_print_efi(struct blk_desc *dev_desc) print_efiname(&gpt_pte[i])); printf("\tattrs:\t0x%016llx\n", gpt_pte[i].attributes.raw); uuid = (unsigned char *)gpt_pte[i].partition_type_guid.b; - if (CONFIG_IS_ENABLED(PARTITION_TYPE_GUID)) + if (IS_ENABLED(CONFIG_PARTITION_TYPE_GUID)) printf("\ttype:\t%pUl\n\t\t(%pUs)\n", uuid, uuid); else printf("\ttype:\t%pUl\n", uuid); diff --git a/doc/README.bcm7xxx b/doc/README.bcm7xxx index 9b5eae4741a..6839da5f974 100644 --- a/doc/README.bcm7xxx +++ b/doc/README.bcm7xxx @@ -31,6 +31,12 @@ ${CROSS_COMPILE}strip u-boot Run === +To tell U-Boot which serial port to use for its console, set the +"stdout-path" property in the "/chosen" node of the BOLT-generated +device tree. For example: + +BOLT> dt add prop chosen stdout-path s serial0:115200n8 + Flash the u-boot binary into board storage, then invoke it from BOLT. For example: diff --git a/drivers/button/button-gpio.c b/drivers/button/button-gpio.c index dbb000622c7..7b5b3affe2d 100644 --- a/drivers/button/button-gpio.c +++ b/drivers/button/button-gpio.c @@ -13,6 +13,7 @@ struct button_gpio_priv { struct gpio_desc gpio; + int linux_code; }; static enum button_state_t button_gpio_get_state(struct udevice *dev) @@ -29,6 +30,17 @@ static enum button_state_t button_gpio_get_state(struct udevice *dev) return ret ? BUTTON_ON : BUTTON_OFF; } +static int button_gpio_get_code(struct udevice *dev) +{ + struct button_gpio_priv *priv = dev_get_priv(dev); + int code = priv->linux_code; + + if (!code) + return -ENODATA; + + return code; +} + static int button_gpio_probe(struct udevice *dev) { struct button_uc_plat *uc_plat = dev_get_uclass_plat(dev); @@ -43,7 +55,9 @@ static int button_gpio_probe(struct udevice *dev) if (ret) return ret; - return 0; + ret = dev_read_u32(dev, "linux,code", &priv->linux_code); + + return ret; } static int button_gpio_remove(struct udevice *dev) @@ -92,6 +106,7 @@ static int button_gpio_bind(struct udevice *parent) static const struct button_ops button_gpio_ops = { .get_state = button_gpio_get_state, + .get_code = button_gpio_get_code, }; static const struct udevice_id button_gpio_ids[] = { diff --git a/drivers/button/button-uclass.c b/drivers/button/button-uclass.c index e33ed7d01d1..032191d61ab 100644 --- a/drivers/button/button-uclass.c +++ b/drivers/button/button-uclass.c @@ -38,6 +38,16 @@ enum button_state_t button_get_state(struct udevice *dev) return ops->get_state(dev); } +int button_get_code(struct udevice *dev) +{ + struct button_ops *ops = button_get_ops(dev); + + if (!ops->get_code) + return -ENOSYS; + + return ops->get_code(dev); +} + UCLASS_DRIVER(button) = { .id = UCLASS_BUTTON, .name = "button", diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index 7e8e62feeee..6ab137a72be 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -81,7 +81,7 @@ static ulong clk_divider_recalc_rate(struct clk *clk) unsigned long parent_rate = clk_get_parent_rate(clk); unsigned int val; -#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF) +#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF) val = divider->io_divider_val; #else val = readl(divider->reg); @@ -210,7 +210,7 @@ static struct clk *_register_divider(struct device *dev, const char *name, div->width = width; div->flags = clk_divider_flags; div->table = table; -#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF) +#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF) div->io_divider_val = *(u32 *)reg; #endif diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c index aa40daf3d79..a8775c77dc2 100644 --- a/drivers/clk/clk-gate.c +++ b/drivers/clk/clk-gate.c @@ -62,7 +62,7 @@ static void clk_gate_endisable(struct clk *clk, int enable) if (set) reg |= BIT(gate->bit_idx); } else { -#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF) +#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF) reg = gate->io_gate_val; #else reg = readl(gate->reg); @@ -96,7 +96,7 @@ int clk_gate_is_enabled(struct clk *clk) struct clk_gate *gate = to_clk_gate(clk); u32 reg; -#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF) +#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF) reg = gate->io_gate_val; #else reg = readl(gate->reg); @@ -142,7 +142,7 @@ struct clk *clk_register_gate(struct device *dev, const char *name, gate->reg = reg; gate->bit_idx = bit_idx; gate->flags = clk_gate_flags; -#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF) +#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF) gate->io_gate_val = *(u32 *)reg; #endif diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c index b49946fbcd5..184d426d0b3 100644 --- a/drivers/clk/clk-mux.c +++ b/drivers/clk/clk-mux.c @@ -90,7 +90,7 @@ u8 clk_mux_get_parent(struct clk *clk) struct clk_mux *mux = to_clk_mux(clk); u32 val; -#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF) +#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF) val = mux->io_mux_val; #else val = readl(mux->reg); @@ -137,7 +137,7 @@ static int clk_mux_set_parent(struct clk *clk, struct clk *parent) if (mux->flags & CLK_MUX_HIWORD_MASK) { reg = mux->mask << (mux->shift + 16); } else { -#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF) +#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF) reg = mux->io_mux_val; #else reg = readl(mux->reg); @@ -146,7 +146,7 @@ static int clk_mux_set_parent(struct clk *clk, struct clk *parent) } val = val << mux->shift; reg |= val; -#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF) +#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF) mux->io_mux_val = reg; #else writel(reg, mux->reg); @@ -194,7 +194,7 @@ struct clk *clk_hw_register_mux_table(struct device *dev, const char *name, mux->mask = mask; mux->flags = clk_mux_flags; mux->table = table; -#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF) +#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF) mux->io_mux_val = *(u32 *)reg; #endif diff --git a/drivers/clk/clk_k210.c b/drivers/clk/clk_k210.c index f7d36963f85..c534cc07e09 100644 --- a/drivers/clk/clk_k210.c +++ b/drivers/clk/clk_k210.c @@ -308,7 +308,7 @@ enum k210_clk_flags { * @gate: An &enum k210_gate_id of this clock's gate */ struct k210_clk_params { -#if CONFIG_IS_ENABLED(CMD_CLK) +#if IS_ENABLED(CONFIG_CMD_CLK) const char *name; #endif u8 flags; @@ -326,7 +326,7 @@ struct k210_clk_params { }; static const struct k210_clk_params k210_clks[] = { -#if CONFIG_IS_ENABLED(CMD_CLK) +#if IS_ENABLED(CONFIG_CMD_CLK) #define NAME(_name) .name = (_name), #else #define NAME(name) @@ -1284,7 +1284,7 @@ U_BOOT_DRIVER(k210_clk) = { .priv_auto = sizeof(struct k210_clk_priv), }; -#if CONFIG_IS_ENABLED(CMD_CLK) +#if IS_ENABLED(CONFIG_CMD_CLK) static char show_enabled(struct k210_clk_priv *priv, int id) { bool enabled; diff --git a/drivers/clk/imx/clk-imx8.c b/drivers/clk/imx/clk-imx8.c index b3dc138c4bb..24bdab28aa4 100644 --- a/drivers/clk/imx/clk-imx8.c +++ b/drivers/clk/imx/clk-imx8.c @@ -42,7 +42,7 @@ static int imx8_clk_enable(struct clk *clk) return __imx8_clk_enable(clk, 1); } -#if CONFIG_IS_ENABLED(CMD_CLK) +#if IS_ENABLED(CONFIG_CMD_CLK) int soc_clk_dump(void) { struct udevice *dev; diff --git a/drivers/clk/imx/clk-imx8.h b/drivers/clk/imx/clk-imx8.h index 68ad6755e80..6e850ba2666 100644 --- a/drivers/clk/imx/clk-imx8.h +++ b/drivers/clk/imx/clk-imx8.h @@ -9,7 +9,7 @@ struct imx8_clks { const char *name; }; -#if CONFIG_IS_ENABLED(CMD_CLK) +#if IS_ENABLED(CONFIG_CMD_CLK) extern struct imx8_clks imx8_clk_names[]; extern int num_clks; #endif diff --git a/drivers/clk/imx/clk-imx8qm.c b/drivers/clk/imx/clk-imx8qm.c index 7759dc63ee1..b874915ba6a 100644 --- a/drivers/clk/imx/clk-imx8qm.c +++ b/drivers/clk/imx/clk-imx8qm.c @@ -16,7 +16,7 @@ #include "clk-imx8.h" -#if CONFIG_IS_ENABLED(CMD_CLK) +#if IS_ENABLED(CONFIG_CMD_CLK) struct imx8_clks imx8_clk_names[] = { { IMX8QM_A53_DIV, "A53_DIV" }, { IMX8QM_UART0_CLK, "UART0" }, diff --git a/drivers/clk/imx/clk-imx8qxp.c b/drivers/clk/imx/clk-imx8qxp.c index ffa2fcee0b2..d580b437221 100644 --- a/drivers/clk/imx/clk-imx8qxp.c +++ b/drivers/clk/imx/clk-imx8qxp.c @@ -16,7 +16,7 @@ #include "clk-imx8.h" -#if CONFIG_IS_ENABLED(CMD_CLK) +#if IS_ENABLED(CONFIG_CMD_CLK) struct imx8_clks imx8_clk_names[] = { { IMX8QXP_A35_DIV, "A35_DIV" }, { IMX8QXP_I2C0_CLK, "I2C0" }, diff --git a/drivers/crypto/aspeed/aspeed_hace.c b/drivers/crypto/aspeed/aspeed_hace.c index a1b0b9f564b..6b6c8fa6588 100644 --- a/drivers/crypto/aspeed/aspeed_hace.c +++ b/drivers/crypto/aspeed/aspeed_hace.c @@ -288,7 +288,7 @@ static int aspeed_hace_digest_wd(struct udevice *dev, enum HASH_ALGO algo, if (rc) return rc; - if (CONFIG_IS_ENABLED(HW_WATCHDOG) || CONFIG_IS_ENABLED(WATCHDOG)) { + if (IS_ENABLED(CONFIG_HW_WATCHDOG) || CONFIG_IS_ENABLED(WATCHDOG)) { cur = ibuf; end = ibuf + ilen; diff --git a/drivers/crypto/hash/hash_sw.c b/drivers/crypto/hash/hash_sw.c index 553c068010c..d8065d68ea4 100644 --- a/drivers/crypto/hash/hash_sw.c +++ b/drivers/crypto/hash/hash_sw.c @@ -244,7 +244,7 @@ static int sw_hash_digest_wd(struct udevice *dev, enum HASH_ALGO algo, if (rc) return rc; - if (CONFIG_IS_ENABLED(HW_WATCHDOG) || CONFIG_IS_ENABLED(WATCHDOG)) { + if (IS_ENABLED(CONFIG_HW_WATCHDOG) || CONFIG_IS_ENABLED(WATCHDOG)) { cur = ibuf; end = ibuf + ilen; diff --git a/drivers/fastboot/fb_command.c b/drivers/fastboot/fb_command.c index 67a94798287..71cfaec6e9d 100644 --- a/drivers/fastboot/fb_command.c +++ b/drivers/fastboot/fb_command.c @@ -295,11 +295,11 @@ void fastboot_data_complete(char *response) */ static void __maybe_unused flash(char *cmd_parameter, char *response) { - if (CONFIG_IS_ENABLED(FASTBOOT_FLASH_MMC)) + if (IS_ENABLED(CONFIG_FASTBOOT_FLASH_MMC)) fastboot_mmc_flash_write(cmd_parameter, fastboot_buf_addr, image_size, response); - if (CONFIG_IS_ENABLED(FASTBOOT_FLASH_NAND)) + if (IS_ENABLED(CONFIG_FASTBOOT_FLASH_NAND)) fastboot_nand_flash_write(cmd_parameter, fastboot_buf_addr, image_size, response); } @@ -315,10 +315,10 @@ static void __maybe_unused flash(char *cmd_parameter, char *response) */ static void __maybe_unused erase(char *cmd_parameter, char *response) { - if (CONFIG_IS_ENABLED(FASTBOOT_FLASH_MMC)) + if (IS_ENABLED(CONFIG_FASTBOOT_FLASH_MMC)) fastboot_mmc_erase(cmd_parameter, response); - if (CONFIG_IS_ENABLED(FASTBOOT_FLASH_NAND)) + if (IS_ENABLED(CONFIG_FASTBOOT_FLASH_NAND)) fastboot_nand_erase(cmd_parameter, response); } diff --git a/drivers/fastboot/fb_common.c b/drivers/fastboot/fb_common.c index 7563650d07d..57b6182c46a 100644 --- a/drivers/fastboot/fb_common.c +++ b/drivers/fastboot/fb_common.c @@ -99,7 +99,7 @@ int __weak fastboot_set_reboot_flag(enum fastboot_reboot_reason reason) const int mmc_dev = config_opt_enabled(CONFIG_FASTBOOT_FLASH_MMC, CONFIG_FASTBOOT_FLASH_MMC_DEV, -1); - if (!CONFIG_IS_ENABLED(FASTBOOT_FLASH_MMC)) + if (!IS_ENABLED(CONFIG_FASTBOOT_FLASH_MMC)) return -EINVAL; if (reason >= FASTBOOT_REBOOT_REASONS_COUNT) diff --git a/drivers/fastboot/fb_getvar.c b/drivers/fastboot/fb_getvar.c index 2fbd285db38..dd3475e0a8b 100644 --- a/drivers/fastboot/fb_getvar.c +++ b/drivers/fastboot/fb_getvar.c @@ -57,17 +57,17 @@ static const struct { }, { .variable = "current-slot", .dispatch = getvar_current_slot -#if CONFIG_IS_ENABLED(FASTBOOT_FLASH) +#if IS_ENABLED(CONFIG_FASTBOOT_FLASH) }, { .variable = "has-slot", .dispatch = getvar_has_slot #endif -#if CONFIG_IS_ENABLED(FASTBOOT_FLASH_MMC) +#if IS_ENABLED(CONFIG_FASTBOOT_FLASH_MMC) }, { .variable = "partition-type", .dispatch = getvar_partition_type #endif -#if CONFIG_IS_ENABLED(FASTBOOT_FLASH) +#if IS_ENABLED(CONFIG_FASTBOOT_FLASH) }, { .variable = "partition-size", .dispatch = getvar_partition_size @@ -99,12 +99,12 @@ static int getvar_get_part_info(const char *part_name, char *response, struct disk_partition disk_part; struct part_info *part_info; - if (CONFIG_IS_ENABLED(FASTBOOT_FLASH_MMC)) { + if (IS_ENABLED(CONFIG_FASTBOOT_FLASH_MMC)) { r = fastboot_mmc_get_part_info(part_name, &dev_desc, &disk_part, response); if (r >= 0 && size) *size = disk_part.size * disk_part.blksz; - } else if (CONFIG_IS_ENABLED(FASTBOOT_FLASH_NAND)) { + } else if (IS_ENABLED(CONFIG_FASTBOOT_FLASH_NAND)) { r = fastboot_nand_get_part_info(part_name, &part_info, response); if (r >= 0 && size) *size = part_info->size; diff --git a/drivers/fastboot/fb_mmc.c b/drivers/fastboot/fb_mmc.c index 033c510bc09..a06c590234f 100644 --- a/drivers/fastboot/fb_mmc.c +++ b/drivers/fastboot/fb_mmc.c @@ -588,7 +588,7 @@ void fastboot_mmc_flash_write(const char *cmd, void *download_buffer, } #endif -#if CONFIG_IS_ENABLED(FASTBOOT_MMC_USER_SUPPORT) +#if IS_ENABLED(CONFIG_FASTBOOT_MMC_USER_SUPPORT) if (strcmp(cmd, CONFIG_FASTBOOT_MMC_USER_NAME) == 0) { dev_desc = fastboot_mmc_get_dev(response); if (!dev_desc) diff --git a/drivers/gpio/qcom_pmic_gpio.c b/drivers/gpio/qcom_pmic_gpio.c index 3be1be8692c..65feb453ebc 100644 --- a/drivers/gpio/qcom_pmic_gpio.c +++ b/drivers/gpio/qcom_pmic_gpio.c @@ -303,9 +303,25 @@ static int qcom_pwrkey_get_value(struct udevice *dev, unsigned offset) } } +/* + * Since pmic buttons modelled as GPIO, we need empty direction functions + * to trick u-boot button driver + */ +static int qcom_pwrkey_direction_input(struct udevice *dev, unsigned int offset) +{ + return 0; +} + +static int qcom_pwrkey_direction_output(struct udevice *dev, unsigned int offset, int value) +{ + return -EOPNOTSUPP; +} + static const struct dm_gpio_ops qcom_pwrkey_ops = { .get_value = qcom_pwrkey_get_value, .get_function = qcom_pwrkey_get_function, + .direction_input = qcom_pwrkey_direction_input, + .direction_output = qcom_pwrkey_direction_output, }; static int qcom_pwrkey_probe(struct udevice *dev) diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 76e19918aad..427074bff83 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -580,6 +580,18 @@ config SYS_I2C_OCTEON chips have several I2C ports and all are provided, controlled by the device tree. +config SYS_I2C_QUP + bool "Qualcomm QUP I2C controller" + depends on ARCH_SNAPDRAGON + help + Support for Qualcomm QUP I2C controller based on Qualcomm Universal + Peripherals (QUP) engine. The QUP engine is an advanced high + performance slave port that provides a common data path (an output + FIFO and an input FIFO) for I2C and SPI interfaces. The I2C/SPI QUP + controller is publicly documented in the Snapdragon 410E (APQ8016E) + Technical Reference Manual, chapter "6.1 Qualcomm Universal + Peripherals Engine (QUP)". + config SYS_I2C_S3C24X0 bool "Samsung I2C driver" depends on (ARCH_EXYNOS4 || ARCH_EXYNOS5) && DM_I2C diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile index cde0597290c..8a70b5ba88e 100644 --- a/drivers/i2c/Makefile +++ b/drivers/i2c/Makefile @@ -37,6 +37,7 @@ obj-$(CONFIG_SYS_I2C_NPCM) += npcm_i2c.o obj-$(CONFIG_SYS_I2C_OCORES) += ocores_i2c.o obj-$(CONFIG_SYS_I2C_OCTEON) += octeon_i2c.o obj-$(CONFIG_SYS_I2C_OMAP24XX) += omap24xx_i2c.o +obj-$(CONFIG_SYS_I2C_QUP) += qup_i2c.o obj-$(CONFIG_SYS_I2C_RCAR_I2C) += rcar_i2c.o obj-$(CONFIG_SYS_I2C_RCAR_IIC) += rcar_iic.o obj-$(CONFIG_SYS_I2C_ROCKCHIP) += rk_i2c.o diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index 9a1599dcd91..86b9fb57c83 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -744,7 +744,7 @@ void bus_i2c_init(int index, int speed, int unused, return; } - if (CONFIG_IS_ENABLED(IMX_MODULE_FUSE)) { + if (IS_ENABLED(CONFIG_IMX_MODULE_FUSE)) { if (i2c_fused((ulong)mxc_i2c_buses[index].base)) { printf("SoC fuse indicates I2C@0x%lx is unavailable.\n", (ulong)mxc_i2c_buses[index].base); @@ -878,7 +878,7 @@ static int mxc_i2c_probe(struct udevice *bus) if (addr == FDT_ADDR_T_NONE) return -EINVAL; - if (CONFIG_IS_ENABLED(IMX_MODULE_FUSE)) { + if (IS_ENABLED(CONFIG_IMX_MODULE_FUSE)) { if (i2c_fused((ulong)addr)) { printf("SoC fuse indicates I2C@0x%lx is unavailable.\n", (ulong)addr); diff --git a/drivers/i2c/qup_i2c.c b/drivers/i2c/qup_i2c.c new file mode 100644 index 00000000000..5ae3cccd4ac --- /dev/null +++ b/drivers/i2c/qup_i2c.c @@ -0,0 +1,579 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2009-2013, 2016-2018, The Linux Foundation. All rights reserved. + * Copyright (c) 2014, Sony Mobile Communications AB. + * Copyright (c) 2022-2023, Sumit Garg <sumit.garg@linaro.org> + * + * Inspired by corresponding driver in Linux: drivers/i2c/busses/i2c-qup.c + */ + +#include <init.h> +#include <env.h> +#include <common.h> +#include <log.h> +#include <dm/device_compat.h> +#include <linux/delay.h> +#include <linux/errno.h> +#include <linux/err.h> +#include <linux/compat.h> +#include <linux/bitops.h> +#include <asm/io.h> +#include <i2c.h> +#include <watchdog.h> +#include <fdtdec.h> +#include <clk.h> +#include <reset.h> +#include <asm/arch/gpio.h> +#include <cpu_func.h> +#include <asm/system.h> +#include <asm/gpio.h> +#include <dm.h> +#include <dm/pinctrl.h> + +/* QUP Registers */ +#define QUP_CONFIG 0x000 +#define QUP_STATE 0x004 +#define QUP_IO_MODE 0x008 +#define QUP_SW_RESET 0x00c +#define QUP_OPERATIONAL 0x018 +#define QUP_ERROR_FLAGS 0x01c /* NOT USED */ +#define QUP_ERROR_FLAGS_EN 0x020 /* NOT USED */ +#define QUP_TEST_CTRL 0x024 /* NOT USED */ +#define QUP_OPERATIONAL_MASK 0x028 /* NOT USED */ +#define QUP_HW_VERSION 0x030 +#define QUP_MX_OUTPUT_CNT 0x100 +#define QUP_OUT_DEBUG 0x108 /* NOT USED */ +#define QUP_OUT_FIFO_CNT 0x10C /* NOT USED */ +#define QUP_OUT_FIFO_BASE 0x110 +#define QUP_MX_WRITE_CNT 0x150 +#define QUP_MX_INPUT_CNT 0x200 +#define QUP_MX_READ_CNT 0x208 +#define QUP_IN_READ_CUR 0x20C /* NOT USED */ +#define QUP_IN_DEBUG 0x210 /* NOT USED */ +#define QUP_IN_FIFO_CNT 0x214 /* NOT USED */ +#define QUP_IN_FIFO_BASE 0x218 +#define QUP_I2C_CLK_CTL 0x400 +#define QUP_I2C_STATUS 0x404 /* NOT USED */ +#define QUP_I2C_MASTER_GEN 0x408 +#define QUP_I2C_MASTER_BUS_CLR 0x40C /* NOT USED */ + +/* QUP States and reset values */ +#define QUP_RESET_STATE 0 +#define QUP_RUN_STATE 1 +#define QUP_PAUSE_STATE 3 +#define QUP_STATE_MASK 3 + +#define QUP_STATE_VALID BIT(2) +#define QUP_I2C_MAST_GEN BIT(4) +#define QUP_I2C_FLUSH BIT(6) + +#define QUP_OPERATIONAL_RESET 0x000ff0 +#define QUP_I2C_STATUS_RESET 0xfffffc + +/* QUP OPERATIONAL FLAGS */ +#define QUP_I2C_NACK_FLAG BIT(3) +#define QUP_OUT_NOT_EMPTY BIT(4) +#define QUP_IN_NOT_EMPTY BIT(5) +#define QUP_OUT_FULL BIT(6) +#define QUP_OUT_SVC_FLAG BIT(8) +#define QUP_IN_SVC_FLAG BIT(9) +#define QUP_MX_OUTPUT_DONE BIT(10) +#define QUP_MX_INPUT_DONE BIT(11) +#define OUT_BLOCK_WRITE_REQ BIT(12) +#define IN_BLOCK_READ_REQ BIT(13) + +/* + * QUP engine acting as I2C controller is referred to as + * I2C mini core, following are related macros. + */ +#define QUP_NO_OUTPUT BIT(6) +#define QUP_NO_INPUT BIT(7) +#define QUP_CLOCK_AUTO_GATE BIT(13) +#define QUP_I2C_MINI_CORE (2 << 8) +#define QUP_I2C_N_VAL_V2 7 + +/* Packing/Unpacking words in FIFOs, and IO modes */ +#define QUP_OUTPUT_BLK_MODE BIT(10) +#define QUP_OUTPUT_BAM_MODE (BIT(10) | BIT(11)) +#define QUP_INPUT_BLK_MODE BIT(12) +#define QUP_INPUT_BAM_MODE (BIT(12) | BIT(13)) +#define QUP_BAM_MODE (QUP_OUTPUT_BAM_MODE | QUP_INPUT_BAM_MODE) +#define QUP_BLK_MODE (QUP_OUTPUT_BLK_MODE | QUP_INPUT_BLK_MODE) +#define QUP_UNPACK_EN BIT(14) +#define QUP_PACK_EN BIT(15) + +#define QUP_REPACK_EN (QUP_UNPACK_EN | QUP_PACK_EN) +#define QUP_V2_TAGS_EN 1 + +#define QUP_OUTPUT_BLOCK_SIZE(x) (((x) >> 0) & 0x03) +#define QUP_OUTPUT_FIFO_SIZE(x) (((x) >> 2) & 0x07) +#define QUP_INPUT_BLOCK_SIZE(x) (((x) >> 5) & 0x03) +#define QUP_INPUT_FIFO_SIZE(x) (((x) >> 7) & 0x07) + +/* QUP v2 tags */ +#define QUP_TAG_V2_START 0x81 +#define QUP_TAG_V2_DATAWR 0x82 +#define QUP_TAG_V2_DATAWR_STOP 0x83 +#define QUP_TAG_V2_DATARD 0x85 +#define QUP_TAG_V2_DATARD_NACK 0x86 +#define QUP_TAG_V2_DATARD_STOP 0x87 + +#define QUP_I2C_MX_CONFIG_DURING_RUN BIT(31) + +/* Minimum transfer timeout for i2c transfers in micro seconds */ +#define TOUT_CNT (2 * 1000 * 1000) + +/* Default values. Use these if FW query fails */ +#define DEFAULT_CLK_FREQ I2C_SPEED_STANDARD_RATE +#define DEFAULT_SRC_CLK 19200000 + +/* + * Max tags length (start, stop and maximum 2 bytes address) for each QUP + * data transfer + */ +#define QUP_MAX_TAGS_LEN 4 +/* Max data length for each DATARD tags */ +#define RECV_MAX_DATA_LEN 254 +/* TAG length for DATA READ in RX FIFO */ +#define READ_RX_TAGS_LEN 2 + +struct qup_i2c_priv { + phys_addr_t base; + struct clk core; + struct clk iface; + u32 in_fifo_sz; + u32 out_fifo_sz; + u32 clk_ctl; + u32 config_run; +}; + +static inline u8 i2c_8bit_addr_from_msg(const struct i2c_msg *msg) +{ + return (msg->addr << 1) | (msg->flags & I2C_M_RD ? 1 : 0); +} + +static int qup_i2c_poll_state_mask(struct qup_i2c_priv *qup, + u32 req_state, u32 req_mask) +{ + int retries = 1; + u32 state; + + /* + * State transition takes 3 AHB clocks cycles + 3 I2C master clock + * cycles. So retry once after a 1uS delay. + */ + do { + state = readl(qup->base + QUP_STATE); + + if (state & QUP_STATE_VALID && + (state & req_mask) == req_state) + return 0; + + udelay(1); + } while (retries--); + + return -ETIMEDOUT; +} + +static int qup_i2c_poll_state(struct qup_i2c_priv *qup, u32 req_state) +{ + return qup_i2c_poll_state_mask(qup, req_state, QUP_STATE_MASK); +} + +static int qup_i2c_poll_state_valid(struct qup_i2c_priv *qup) +{ + return qup_i2c_poll_state_mask(qup, 0, 0); +} + +static int qup_i2c_poll_state_i2c_master(struct qup_i2c_priv *qup) +{ + return qup_i2c_poll_state_mask(qup, QUP_I2C_MAST_GEN, QUP_I2C_MAST_GEN); +} + +static int qup_i2c_change_state(struct qup_i2c_priv *qup, u32 state) +{ + if (qup_i2c_poll_state_valid(qup) != 0) + return -EIO; + + writel(state, qup->base + QUP_STATE); + + if (qup_i2c_poll_state(qup, state) != 0) + return -EIO; + return 0; +} + +/* + * Function to check wheather Input or Output FIFO + * has data to be serviced + */ +static int qup_i2c_check_fifo_status(struct qup_i2c_priv *qup, u32 reg_addr, + u32 flags) +{ + unsigned long count = TOUT_CNT; + u32 val, status_flag; + int ret = 0; + + do { + val = readl(qup->base + reg_addr); + status_flag = val & flags; + + if (!count) { + printf("%s, timeout\n", __func__); + ret = -ETIMEDOUT; + break; + } + + count--; + udelay(1); + } while (!status_flag); + + return ret; +} + +/* + * Function to configure Input and Output enable/disable + */ +static void qup_i2c_enable_io_config(struct qup_i2c_priv *qup, u32 write_cnt, + u32 read_cnt) +{ + u32 qup_config = QUP_I2C_MINI_CORE | QUP_I2C_N_VAL_V2; + + writel(qup->config_run | write_cnt, qup->base + QUP_MX_WRITE_CNT); + + if (read_cnt) + writel(qup->config_run | read_cnt, qup->base + QUP_MX_READ_CNT); + else + qup_config |= QUP_NO_INPUT; + + writel(qup_config, qup->base + QUP_CONFIG); +} + +static unsigned int qup_i2c_read_word(struct qup_i2c_priv *qup) +{ + return readl(qup->base + QUP_IN_FIFO_BASE); +} + +static void qup_i2c_write_word(struct qup_i2c_priv *qup, u32 word) +{ + writel(word, qup->base + QUP_OUT_FIFO_BASE); +} + +static int qup_i2c_blsp_read(struct qup_i2c_priv *qup, unsigned int addr, + bool last, u8 *buffer, unsigned int bytes) +{ + unsigned int i, j, word; + int ret = 0; + + /* FIFO mode size limitation, for larger size implement block mode */ + if (bytes > (qup->in_fifo_sz - READ_RX_TAGS_LEN)) + return -EINVAL; + + qup_i2c_enable_io_config(qup, QUP_MAX_TAGS_LEN, + bytes + READ_RX_TAGS_LEN); + + if (last) + qup_i2c_write_word(qup, QUP_TAG_V2_START | addr << 8 | + QUP_TAG_V2_DATARD_STOP << 16 | + bytes << 24); + else + qup_i2c_write_word(qup, QUP_TAG_V2_START | addr << 8 | + QUP_TAG_V2_DATARD << 16 | bytes << 24); + + ret = qup_i2c_change_state(qup, QUP_RUN_STATE); + if (ret) + return ret; + + ret = qup_i2c_check_fifo_status(qup, QUP_OPERATIONAL, QUP_OUT_SVC_FLAG); + if (ret) + return ret; + writel(QUP_OUT_SVC_FLAG, qup->base + QUP_OPERATIONAL); + + ret = qup_i2c_check_fifo_status(qup, QUP_OPERATIONAL, QUP_IN_SVC_FLAG); + if (ret) + return ret; + writel(QUP_IN_SVC_FLAG, qup->base + QUP_OPERATIONAL); + + word = qup_i2c_read_word(qup); + *(buffer++) = (word >> (8 * READ_RX_TAGS_LEN)) & 0xff; + if (bytes > 1) + *(buffer++) = (word >> (8 * (READ_RX_TAGS_LEN + 1))) & 0xff; + + for (i = 2; i < bytes; i += 4) { + word = qup_i2c_read_word(qup); + + for (j = 0; j < 4; j++) { + if ((i + j) == bytes) + break; + *buffer = (word >> (j * 8)) & 0xff; + buffer++; + } + } + + ret = qup_i2c_change_state(qup, QUP_PAUSE_STATE); + return ret; +} + +static int qup_i2c_blsp_write(struct qup_i2c_priv *qup, unsigned int addr, + bool first, bool last, const u8 *buffer, + unsigned int bytes) +{ + unsigned int i; + u32 word = 0; + int ret = 0; + + /* FIFO mode size limitation, for larger size implement block mode */ + if (bytes > (qup->out_fifo_sz - QUP_MAX_TAGS_LEN)) + return -EINVAL; + + qup_i2c_enable_io_config(qup, bytes + QUP_MAX_TAGS_LEN, 0); + + if (first) { + ret = qup_i2c_change_state(qup, QUP_RUN_STATE); + if (ret) + return ret; + + writel(qup->clk_ctl, qup->base + QUP_I2C_CLK_CTL); + + ret = qup_i2c_change_state(qup, QUP_PAUSE_STATE); + if (ret) + return ret; + } + + if (last) + qup_i2c_write_word(qup, QUP_TAG_V2_START | addr << 8 | + QUP_TAG_V2_DATAWR_STOP << 16 | + bytes << 24); + else + qup_i2c_write_word(qup, QUP_TAG_V2_START | addr << 8 | + QUP_TAG_V2_DATAWR << 16 | bytes << 24); + + for (i = 0; i < bytes; i++) { + /* Write the byte of data */ + word |= *buffer << ((i % 4) * 8); + if ((i % 4) == 3) { + qup_i2c_write_word(qup, word); + word = 0; + } + buffer++; + } + + if ((i % 4) != 0) + qup_i2c_write_word(qup, word); + + ret = qup_i2c_change_state(qup, QUP_RUN_STATE); + if (ret) + return ret; + + ret = qup_i2c_check_fifo_status(qup, QUP_OPERATIONAL, QUP_OUT_SVC_FLAG); + if (ret) + return ret; + writel(QUP_OUT_SVC_FLAG, qup->base + QUP_OPERATIONAL); + + ret = qup_i2c_change_state(qup, QUP_PAUSE_STATE); + return ret; +} + +static void qup_i2c_conf_mode_v2(struct qup_i2c_priv *qup) +{ + u32 io_mode = QUP_REPACK_EN; + + writel(0, qup->base + QUP_MX_OUTPUT_CNT); + writel(0, qup->base + QUP_MX_INPUT_CNT); + + writel(io_mode, qup->base + QUP_IO_MODE); +} + +static int qup_i2c_xfer_v2(struct udevice *bus, struct i2c_msg msgs[], int num) +{ + struct qup_i2c_priv *qup = dev_get_priv(bus); + int ret, idx = 0; + u32 i2c_addr; + + writel(1, qup->base + QUP_SW_RESET); + ret = qup_i2c_poll_state(qup, QUP_RESET_STATE); + if (ret) + goto out; + + /* Configure QUP as I2C mini core */ + writel(QUP_I2C_MINI_CORE | QUP_I2C_N_VAL_V2 | QUP_NO_INPUT, + qup->base + QUP_CONFIG); + writel(QUP_V2_TAGS_EN, qup->base + QUP_I2C_MASTER_GEN); + + if (qup_i2c_poll_state_i2c_master(qup)) { + ret = -EIO; + goto out; + } + + qup_i2c_conf_mode_v2(qup); + + for (idx = 0; idx < num; idx++) { + struct i2c_msg *m = &msgs[idx]; + + qup->config_run = !idx ? 0 : QUP_I2C_MX_CONFIG_DURING_RUN; + i2c_addr = i2c_8bit_addr_from_msg(m); + + if (m->flags & I2C_M_RD) + ret = qup_i2c_blsp_read(qup, i2c_addr, idx == (num - 1), + m->buf, m->len); + else + ret = qup_i2c_blsp_write(qup, i2c_addr, idx == 0, + idx == (num - 1), m->buf, + m->len); + if (ret) + break; + } +out: + qup_i2c_change_state(qup, QUP_RESET_STATE); + return ret; +} + +static int qup_i2c_enable_clocks(struct udevice *dev, struct qup_i2c_priv *qup) +{ + int ret; + + ret = clk_enable(&qup->core); + if (ret) { + dev_err(dev, "clk_enable failed %d\n", ret); + return ret; + } + + ret = clk_enable(&qup->iface); + if (ret) { + dev_err(dev, "clk_enable failed %d\n", ret); + return ret; + } + + return 0; +} + +static int qup_i2c_probe(struct udevice *dev) +{ + static const int blk_sizes[] = {4, 16, 32}; + struct qup_i2c_priv *qup = dev_get_priv(dev); + u32 io_mode, hw_ver, size, size_idx; + int ret; + + qup->base = (phys_addr_t)dev_read_addr_ptr(dev); + if (!qup->base) + return -EINVAL; + + ret = clk_get_by_name(dev, "core", &qup->core); + if (ret) { + pr_err("clk_get_by_name(core) failed: %d\n", ret); + return ret; + } + ret = clk_get_by_name(dev, "iface", &qup->iface); + if (ret) { + pr_err("clk_get_by_name(iface) failed: %d\n", ret); + return ret; + } + qup_i2c_enable_clocks(dev, qup); + + writel(1, qup->base + QUP_SW_RESET); + ret = qup_i2c_poll_state_valid(qup); + if (ret) + return ret; + + hw_ver = readl(qup->base + QUP_HW_VERSION); + dev_dbg(dev, "Revision %x\n", hw_ver); + + io_mode = readl(qup->base + QUP_IO_MODE); + + /* + * The block/fifo size w.r.t. 'actual data' is 1/2 due to 'tag' + * associated with each byte written/received + */ + size_idx = QUP_OUTPUT_BLOCK_SIZE(io_mode); + if (size_idx >= ARRAY_SIZE(blk_sizes)) { + ret = -EIO; + return ret; + } + size = QUP_OUTPUT_FIFO_SIZE(io_mode); + qup->out_fifo_sz = blk_sizes[size_idx] * (2 << size); + + size_idx = QUP_INPUT_BLOCK_SIZE(io_mode); + if (size_idx >= ARRAY_SIZE(blk_sizes)) { + ret = -EIO; + return ret; + } + size = QUP_INPUT_FIFO_SIZE(io_mode); + qup->in_fifo_sz = blk_sizes[size_idx] * (2 << size); + + dev_dbg(dev, "IN:fifo:%d, OUT:fifo:%d\n", qup->in_fifo_sz, + qup->out_fifo_sz); + + return 0; +} + +static int qup_i2c_set_bus_speed(struct udevice *dev, unsigned int clk_freq) +{ + struct qup_i2c_priv *qup = dev_get_priv(dev); + unsigned int src_clk_freq; + int fs_div, hs_div; + + /* We support frequencies up to FAST Mode Plus (1MHz) */ + if (!clk_freq || clk_freq > I2C_SPEED_FAST_PLUS_RATE) { + dev_err(dev, "clock frequency not supported %d\n", clk_freq); + return -EINVAL; + } + + src_clk_freq = clk_get_rate(&qup->iface); + if ((int)src_clk_freq < 0) { + src_clk_freq = DEFAULT_SRC_CLK; + dev_dbg(dev, "using default core freq %d\n", src_clk_freq); + } + + dev_dbg(dev, "src_clk_freq %u\n", src_clk_freq); + dev_dbg(dev, "clk_freq %u\n", clk_freq); + + hs_div = 3; + if (clk_freq <= I2C_SPEED_STANDARD_RATE) { + fs_div = ((src_clk_freq / clk_freq) / 2) - 3; + qup->clk_ctl = (hs_div << 8) | (fs_div & 0xff); + } else { + /* 33%/66% duty cycle */ + fs_div = ((src_clk_freq / clk_freq) - 6) * 2 / 3; + qup->clk_ctl = ((fs_div / 2) << 16) | (hs_div << 8) | (fs_div & 0xff); + } + + dev_dbg(dev, "clk_ctl %u\n", qup->clk_ctl); + + return 0; +} + +/* Probe to see if a chip is present. */ +static int qup_i2c_probe_chip(struct udevice *dev, uint chip_addr, + uint chip_flags) +{ + struct qup_i2c_priv *qup = dev_get_priv(dev); + u32 hw_ver = readl(qup->base + QUP_HW_VERSION); + + return hw_ver ? 0 : -1; +} + +static const struct dm_i2c_ops qup_i2c_ops = { + .xfer = qup_i2c_xfer_v2, + .probe_chip = qup_i2c_probe_chip, + .set_bus_speed = qup_i2c_set_bus_speed, +}; + +/* + * Currently this driver only supports v2.x of QUP I2C controller, hence + * functions above are named with a _v2 suffix. So when we have the + * v1.1.1 support added as per the Linux counterpart then it should be easy + * to add corresponding functions named with a _v1 suffix. + */ +static const struct udevice_id qup_i2c_ids[] = { + { .compatible = "qcom,i2c-qup-v2.1.1" }, + { .compatible = "qcom,i2c-qup-v2.2.1" }, + {} +}; + +U_BOOT_DRIVER(i2c_qup) = { + .name = "i2c_qup", + .id = UCLASS_I2C, + .of_match = qup_i2c_ids, + .probe = qup_i2c_probe, + .priv_auto = sizeof(struct qup_i2c_priv), + .ops = &qup_i2c_ops, +}; diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig index 1c534be0058..32360d94c05 100644 --- a/drivers/input/Kconfig +++ b/drivers/input/Kconfig @@ -46,6 +46,15 @@ config APPLE_SPI_KEYB laptops based on Apple SoCs. These keyboards use an Apple-specific HID-over-SPI protocol. +config BUTTON_KEYBOARD + bool "Buttons as keyboard" + depends on BUTTON_GPIO + depends on DM_KEYBOARD + help + Enable support for mapping buttons to keycode events. Use linux,code button driver + dt node to define button-event mapping. + For example, an arrows and enter may be implemented to navigate boot menu. + config CROS_EC_KEYB bool "Enable Chrome OS EC keyboard support" depends on INPUT diff --git a/drivers/input/Makefile b/drivers/input/Makefile index ded76bddb22..14c0ea73254 100644 --- a/drivers/input/Makefile +++ b/drivers/input/Makefile @@ -6,6 +6,7 @@ obj-$(CONFIG_$(SPL_TPL_)CROS_EC_KEYB) += cros_ec_keyb.o obj-$(CONFIG_$(SPL_TPL_)OF_CONTROL) += key_matrix.o obj-$(CONFIG_$(SPL_TPL_)DM_KEYBOARD) += input.o keyboard-uclass.o +obj-$(CONFIG_BUTTON_KEYBOARD) += button_kbd.o ifndef CONFIG_SPL_BUILD diff --git a/drivers/input/button_kbd.c b/drivers/input/button_kbd.c new file mode 100644 index 00000000000..99e65f12f01 --- /dev/null +++ b/drivers/input/button_kbd.c @@ -0,0 +1,126 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2023 Dzmitry Sankouski <dsankouski@gmail.com> + */ + +#include <stdlib.h> +#include <common.h> +#include <dm.h> +#include <fdtdec.h> +#include <input.h> +#include <keyboard.h> +#include <button.h> +#include <dm/device-internal.h> +#include <log.h> +#include <asm/io.h> +#include <asm/gpio.h> +#include <linux/delay.h> +#include <linux/input.h> + +/** + * struct button_kbd_priv - driver private data + * + * @input: input configuration + * @button_size: number of buttons found + * @old_state: a pointer to old button states array. Used to determine button state change. + */ +struct button_kbd_priv { + struct input_config *input; + u32 button_size; + u32 *old_state; +}; + +static int button_kbd_start(struct udevice *dev) +{ + struct button_kbd_priv *priv = dev_get_priv(dev); + int i = 0; + struct udevice *button_gpio_devp; + + uclass_foreach_dev_probe(UCLASS_BUTTON, button_gpio_devp) { + struct button_uc_plat *uc_plat = dev_get_uclass_plat(button_gpio_devp); + /* Ignore the top-level button node */ + if (!uc_plat->label) + continue; + debug("Found button %s #%d - %s, probing...\n", + uc_plat->label, i, button_gpio_devp->name); + i++; + } + + priv->button_size = i; + priv->old_state = calloc(i, sizeof(int)); + + return 0; +} + +int button_read_keys(struct input_config *input) +{ + struct button_kbd_priv *priv = dev_get_priv(input->dev); + struct udevice *button_gpio_devp; + struct uclass *uc; + int i = 0; + u32 code, state, state_changed = 0; + + uclass_id_foreach_dev(UCLASS_BUTTON, button_gpio_devp, uc) { + struct button_uc_plat *uc_plat = dev_get_uclass_plat(button_gpio_devp); + /* Ignore the top-level button node */ + if (!uc_plat->label) + continue; + code = button_get_code(button_gpio_devp); + if (!code) + continue; + + state = button_get_state(button_gpio_devp); + state_changed = state != priv->old_state[i]; + + if (state_changed) { + debug("%s: %d\n", uc_plat->label, code); + priv->old_state[i] = state; + input_add_keycode(input, code, state); + } + i++; + } + return 0; +} + +static const struct keyboard_ops button_kbd_ops = { + .start = button_kbd_start, +}; + +static int button_kbd_probe(struct udevice *dev) +{ + struct button_kbd_priv *priv = dev_get_priv(dev); + struct keyboard_priv *uc_priv = dev_get_uclass_priv(dev); + struct stdio_dev *sdev = &uc_priv->sdev; + struct input_config *input = &uc_priv->input; + int ret = 0; + + input_init(input, false); + input_add_tables(input, false); + + /* Register the device. */ + priv->input = input; + input->dev = dev; + input->read_keys = button_read_keys; + strcpy(sdev->name, "button-kbd"); + ret = input_stdio_register(sdev); + if (ret) { + debug("%s: input_stdio_register() failed\n", __func__); + return ret; + } + + return 0; +} + +static const struct udevice_id button_kbd_ids[] = { + { .compatible = "button-kbd" }, + { } +}; + +U_BOOT_DRIVER(button_kbd) = { + .name = "button_kbd", + .id = UCLASS_KEYBOARD, + .of_match = button_kbd_ids, + .ops = &button_kbd_ops, + .priv_auto = sizeof(struct button_kbd_priv), + .probe = button_kbd_probe, +}; diff --git a/drivers/misc/fsl_ifc.c b/drivers/misc/fsl_ifc.c index 58b00587363..f165b8c36ba 100644 --- a/drivers/misc/fsl_ifc.c +++ b/drivers/misc/fsl_ifc.c @@ -371,7 +371,7 @@ void init_early_memctl_regs(void) for (i = 0 ; i < regs_info.cs_size; i++) { if (regs[i].pr && (regs[i].pr & CSPR_V)) { /* skip setting cspr/csor_ext in below condition */ - if (!(CONFIG_IS_ENABLED(A003399_NOR_WORKAROUND) && + if (!(IS_ENABLED(CONFIG_A003399_NOR_WORKAROUND) && i == 0 && ((regs[0].pr & CSPR_MSEL) == CSPR_MSEL_NOR))) { if (regs[i].pr_ext) diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 3a664c2ebbb..3dc757108d5 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -46,7 +46,7 @@ obj-$(CONFIG_MMC_MXS) += mxsmmc.o obj-$(CONFIG_MMC_OCTEONTX) += octeontx_hsmmc.o obj-$(CONFIG_MMC_OWL) += owl_mmc.o obj-$(CONFIG_MMC_PCI) += pci_mmc.o -obj-$(CONFIG_$(SPL_TPL_)SUPPORT_EMMC_RPMB) += rpmb.o +obj-$(CONFIG_SUPPORT_EMMC_RPMB) += rpmb.o obj-$(CONFIG_MMC_SANDBOX) += sandbox_mmc.o obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o obj-$(CONFIG_SH_SDHI) += sh_sdhi.o diff --git a/drivers/mmc/tmio-common.h b/drivers/mmc/tmio-common.h index 88244e878b4..4d717d85dec 100644 --- a/drivers/mmc/tmio-common.h +++ b/drivers/mmc/tmio-common.h @@ -140,7 +140,7 @@ struct tmio_sd_priv { struct clk clk; struct clk clkh; #endif -#if CONFIG_IS_ENABLED(RENESAS_SDHI) +#if IS_ENABLED(CONFIG_RENESAS_SDHI) unsigned int smpcmp; u8 tap_set; u8 tap_num; diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 62d2c03849a..ceadee98a1e 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -242,6 +242,13 @@ config DWC_ETH_QOS_TEGRA186 The Synopsys Designware Ethernet QOS IP block with specific configuration used in NVIDIA's Tegra186 chip. +config DWC_ETH_QOS_QCOM + bool "Synopsys DWC Ethernet QOS device support for Qcom SoCs" + depends on DWC_ETH_QOS + help + The Synopsys Designware Ethernet QOS IP block with specific + configuration used in Qcom QCS404 SoC. + config E1000 bool "Intel PRO/1000 Gigabit Ethernet support" depends on PCI @@ -406,6 +413,7 @@ config FSL_FM_10GEC_REGULAR_NOTATION config FTMAC100 bool "Ftmac100 Ethernet Support" + select MII help This MAC is present in Andestech SoCs. diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 90fbb02ab02..75daa5e694c 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -20,6 +20,7 @@ obj-$(CONFIG_DRIVER_DM9000) += dm9000x.o obj-$(CONFIG_DSA_SANDBOX) += dsa_sandbox.o obj-$(CONFIG_DWC_ETH_QOS) += dwc_eth_qos.o obj-$(CONFIG_DWC_ETH_QOS_IMX) += dwc_eth_qos_imx.o +obj-$(CONFIG_DWC_ETH_QOS_QCOM) += dwc_eth_qos_qcom.o obj-$(CONFIG_E1000) += e1000.o obj-$(CONFIG_E1000_SPI) += e1000_spi.o obj-$(CONFIG_EEPRO100) += eepro100.o diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c index afc47b56ff5..112deb546de 100644 --- a/drivers/net/dwc_eth_qos.c +++ b/drivers/net/dwc_eth_qos.c @@ -774,10 +774,13 @@ static int eqos_start(struct udevice *dev) pr_err("eqos_calibrate_pads() failed: %d", ret); goto err_stop_resets; } - rate = eqos->config->ops->eqos_get_tick_clk_rate(dev); - val = (rate / 1000000) - 1; - writel(val, &eqos->mac_regs->us_tic_counter); + if (eqos->config->ops->eqos_get_tick_clk_rate) { + rate = eqos->config->ops->eqos_get_tick_clk_rate(dev); + + val = (rate / 1000000) - 1; + writel(val, &eqos->mac_regs->us_tic_counter); + } /* * if PHY was already connected and configured, @@ -849,12 +852,19 @@ static int eqos_start(struct udevice *dev) rx_fifo_sz = (val >> EQOS_MAC_HW_FEATURE1_RXFIFOSIZE_SHIFT) & EQOS_MAC_HW_FEATURE1_RXFIFOSIZE_MASK; - /* - * r/tx_fifo_sz is encoded as log2(n / 128). Undo that by shifting. - * r/tqs is encoded as (n / 256) - 1. - */ - tqs = (128 << tx_fifo_sz) / 256 - 1; - rqs = (128 << rx_fifo_sz) / 256 - 1; + /* r/tx_fifo_sz is encoded as log2(n / 128). Undo that by shifting */ + tx_fifo_sz = 128 << tx_fifo_sz; + rx_fifo_sz = 128 << rx_fifo_sz; + + /* Allow platform to override TX/RX fifo size */ + if (eqos->tx_fifo_sz) + tx_fifo_sz = eqos->tx_fifo_sz; + if (eqos->rx_fifo_sz) + rx_fifo_sz = eqos->rx_fifo_sz; + + /* r/tqs is encoded as (n / 256) - 1 */ + tqs = tx_fifo_sz / 256 - 1; + rqs = rx_fifo_sz / 256 - 1; clrsetbits_le32(&eqos->mtl_regs->txq0_operation_mode, EQOS_MTL_TXQ0_OPERATION_MODE_TQS_MASK << @@ -1702,6 +1712,13 @@ static const struct udevice_id eqos_ids[] = { }, #endif +#if IS_ENABLED(CONFIG_DWC_ETH_QOS_QCOM) + { + .compatible = "qcom,qcs404-ethqos", + .data = (ulong)&eqos_qcom_config + }, +#endif + { } }; diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h index 8fccd6f0572..fddbe9336c9 100644 --- a/drivers/net/dwc_eth_qos.h +++ b/drivers/net/dwc_eth_qos.h @@ -253,6 +253,7 @@ struct eqos_priv { struct eqos_mtl_regs *mtl_regs; struct eqos_dma_regs *dma_regs; struct eqos_tegra186_regs *tegra186_regs; + void *eqos_qcom_rgmii_regs; struct reset_ctl reset_ctl; struct gpio_desc phy_reset_gpio; struct clk clk_master_bus; @@ -276,6 +277,8 @@ struct eqos_priv { bool started; bool reg_access_ok; bool clk_ck_enabled; + unsigned int tx_fifo_sz, rx_fifo_sz; + u32 reset_delays[3]; }; void eqos_inval_desc_generic(void *desc); @@ -285,3 +288,4 @@ void eqos_flush_buffer_generic(void *buf, size_t size); int eqos_null_ops(struct udevice *dev); extern struct eqos_config eqos_imx_config; +extern struct eqos_config eqos_qcom_config; diff --git a/drivers/net/dwc_eth_qos_qcom.c b/drivers/net/dwc_eth_qos_qcom.c new file mode 100644 index 00000000000..df83f1c5f9e --- /dev/null +++ b/drivers/net/dwc_eth_qos_qcom.c @@ -0,0 +1,612 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2022-2023 Sumit Garg <sumit.garg@linaro.org> + * + * Qcom DWMAC specific glue layer + */ + +#include <common.h> +#include <asm/global_data.h> +#include <asm/gpio.h> +#include <asm/io.h> +#include <clk.h> +#include <dm.h> +#include <dm/device_compat.h> +#include <phy.h> +#include <reset.h> +#include <syscon.h> +#include <linux/bitops.h> +#include <linux/delay.h> + +#include "dwc_eth_qos.h" + +/* RGMII_IO_MACRO_CONFIG fields */ +#define RGMII_CONFIG_FUNC_CLK_EN BIT(30) +#define RGMII_CONFIG_POS_NEG_DATA_SEL BIT(23) +#define RGMII_CONFIG_GPIO_CFG_RX_INT GENMASK(21, 20) +#define RGMII_CONFIG_GPIO_CFG_TX_INT GENMASK(19, 17) +#define RGMII_CONFIG_MAX_SPD_PRG_9 GENMASK(16, 8) +#define RGMII_CONFIG_MAX_SPD_PRG_2 GENMASK(7, 6) +#define RGMII_CONFIG_INTF_SEL GENMASK(5, 4) +#define RGMII_CONFIG_BYPASS_TX_ID_EN BIT(3) +#define RGMII_CONFIG_LOOPBACK_EN BIT(2) +#define RGMII_CONFIG_PROG_SWAP BIT(1) +#define RGMII_CONFIG_DDR_MODE BIT(0) + +/* SDCC_HC_REG_DLL_CONFIG fields */ +#define SDCC_DLL_CONFIG_DLL_RST BIT(30) +#define SDCC_DLL_CONFIG_PDN BIT(29) +#define SDCC_DLL_CONFIG_MCLK_FREQ GENMASK(26, 24) +#define SDCC_DLL_CONFIG_CDR_SELEXT GENMASK(23, 20) +#define SDCC_DLL_CONFIG_CDR_EXT_EN BIT(19) +#define SDCC_DLL_CONFIG_CK_OUT_EN BIT(18) +#define SDCC_DLL_CONFIG_CDR_EN BIT(17) +#define SDCC_DLL_CONFIG_DLL_EN BIT(16) +#define SDCC_DLL_MCLK_GATING_EN BIT(5) +#define SDCC_DLL_CDR_FINE_PHASE GENMASK(3, 2) + +/* SDCC_HC_REG_DDR_CONFIG fields */ +#define SDCC_DDR_CONFIG_PRG_DLY_EN BIT(31) +#define SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY GENMASK(26, 21) +#define SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY_CODE GENMASK(29, 27) +#define SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY_EN BIT(30) +#define SDCC_DDR_CONFIG_PRG_RCLK_DLY GENMASK(8, 0) + +/* SDCC_HC_REG_DLL_CONFIG2 fields */ +#define SDCC_DLL_CONFIG2_DLL_CLOCK_DIS BIT(21) +#define SDCC_DLL_CONFIG2_MCLK_FREQ_CALC GENMASK(17, 10) +#define SDCC_DLL_CONFIG2_DDR_TRAFFIC_INIT_SEL GENMASK(3, 2) +#define SDCC_DLL_CONFIG2_DDR_TRAFFIC_INIT_SW BIT(1) +#define SDCC_DLL_CONFIG2_DDR_CAL_EN BIT(0) + +/* SDC4_STATUS bits */ +#define SDC4_STATUS_DLL_LOCK BIT(7) + +/* RGMII_IO_MACRO_CONFIG2 fields */ +#define RGMII_CONFIG2_RSVD_CONFIG15 GENMASK(31, 17) +#define RGMII_CONFIG2_RGMII_CLK_SEL_CFG BIT(16) +#define RGMII_CONFIG2_TX_TO_RX_LOOPBACK_EN BIT(13) +#define RGMII_CONFIG2_CLK_DIVIDE_SEL BIT(12) +#define RGMII_CONFIG2_RX_PROG_SWAP BIT(7) +#define RGMII_CONFIG2_DATA_DIVIDE_CLK_SEL BIT(6) +#define RGMII_CONFIG2_TX_CLK_PHASE_SHIFT_EN BIT(5) + +struct dwmac_rgmii_regs { + u32 io_macro_config; /* 0x00 */ + u32 sdcc_hc_dll_config; /* 0x04 */ + u32 reserved_1; /* 0x08 */ + u32 sdcc_hc_ddr_config; /* 0x0c */ + u32 sdcc_hc_dll_config2; /* 0x10 */ + u32 sdc4_status; /* 0x14 */ + u32 sdcc_usr_ctl; /* 0x18 */ + u32 io_macro_config2; /* 0x1c */ + u32 io_macro_debug1; /* 0x20 */ + u32 reserved_2; /* 0x24 */ + u32 emac_sys_low_power_dbg; /* 0x28 */ + u32 reserved_3[53]; /* upto 0x100 */ +}; + +static struct dwmac_rgmii_regs emac_v2_3_0_por = { + .io_macro_config = 0x00C01343, + .sdcc_hc_dll_config = 0x2004642C, + .sdcc_hc_ddr_config = 0x00000000, + .sdcc_hc_dll_config2 = 0x00200000, + .sdcc_usr_ctl = 0x00010800, + .io_macro_config2 = 0x00002060 +}; + +static void ethqos_set_func_clk_en(struct dwmac_rgmii_regs *regs) +{ + setbits_le32(®s->io_macro_config, RGMII_CONFIG_FUNC_CLK_EN); +} + +static int ethqos_dll_configure(struct udevice *dev, + struct dwmac_rgmii_regs *regs) +{ + unsigned int val; + int retry = 1000; + + /* Set CDR_EN */ + setbits_le32(®s->sdcc_hc_dll_config, SDCC_DLL_CONFIG_CDR_EN); + + /* Set CDR_EXT_EN */ + setbits_le32(®s->sdcc_hc_dll_config, SDCC_DLL_CONFIG_CDR_EXT_EN); + + /* Clear CK_OUT_EN */ + clrbits_le32(®s->sdcc_hc_dll_config, SDCC_DLL_CONFIG_CK_OUT_EN); + + /* Set DLL_EN */ + setbits_le32(®s->sdcc_hc_dll_config, SDCC_DLL_CONFIG_DLL_EN); + + clrbits_le32(®s->sdcc_hc_dll_config, SDCC_DLL_MCLK_GATING_EN); + + clrbits_le32(®s->sdcc_hc_dll_config, SDCC_DLL_CDR_FINE_PHASE); + + /* Wait for CK_OUT_EN clear */ + do { + val = readl(®s->sdcc_hc_dll_config); + val &= SDCC_DLL_CONFIG_CK_OUT_EN; + if (!val) + break; + mdelay(1); + retry--; + } while (retry > 0); + if (!retry) + dev_err(dev, "Clear CK_OUT_EN timedout\n"); + + /* Set CK_OUT_EN */ + setbits_le32(®s->sdcc_hc_dll_config, SDCC_DLL_CONFIG_CK_OUT_EN); + + /* Wait for CK_OUT_EN set */ + retry = 1000; + do { + val = readl(®s->sdcc_hc_dll_config); + val &= SDCC_DLL_CONFIG_CK_OUT_EN; + if (val) + break; + mdelay(1); + retry--; + } while (retry > 0); + if (!retry) + dev_err(dev, "Set CK_OUT_EN timedout\n"); + + /* Set DDR_CAL_EN */ + setbits_le32(®s->sdcc_hc_dll_config2, SDCC_DLL_CONFIG2_DDR_CAL_EN); + + clrbits_le32(®s->sdcc_hc_dll_config2, + SDCC_DLL_CONFIG2_DLL_CLOCK_DIS); + + clrsetbits_le32(®s->sdcc_hc_dll_config2, + SDCC_DLL_CONFIG2_MCLK_FREQ_CALC, 0x1A << 10); + + clrsetbits_le32(®s->sdcc_hc_dll_config2, + SDCC_DLL_CONFIG2_DDR_TRAFFIC_INIT_SEL, BIT(2)); + + setbits_le32(®s->sdcc_hc_dll_config2, + SDCC_DLL_CONFIG2_DDR_TRAFFIC_INIT_SW); + + return 0; +} + +static int ethqos_rgmii_macro_init(struct udevice *dev, + struct dwmac_rgmii_regs *regs, + unsigned long speed) +{ + /* Disable loopback mode */ + clrbits_le32(®s->io_macro_config2, + RGMII_CONFIG2_TX_TO_RX_LOOPBACK_EN); + + /* Select RGMII, write 0 to interface select */ + clrbits_le32(®s->io_macro_config, RGMII_CONFIG_INTF_SEL); + + switch (speed) { + case SPEED_1000: + setbits_le32(®s->io_macro_config, RGMII_CONFIG_DDR_MODE); + clrbits_le32(®s->io_macro_config, + RGMII_CONFIG_BYPASS_TX_ID_EN); + setbits_le32(®s->io_macro_config, + RGMII_CONFIG_POS_NEG_DATA_SEL); + setbits_le32(®s->io_macro_config, RGMII_CONFIG_PROG_SWAP); + + clrbits_le32(®s->io_macro_config2, + RGMII_CONFIG2_DATA_DIVIDE_CLK_SEL); + setbits_le32(®s->io_macro_config2, + RGMII_CONFIG2_TX_CLK_PHASE_SHIFT_EN); + clrbits_le32(®s->io_macro_config2, + RGMII_CONFIG2_RSVD_CONFIG15); + setbits_le32(®s->io_macro_config2, + RGMII_CONFIG2_RX_PROG_SWAP); + + /* Set PRG_RCLK_DLY to 57 for 1.8 ns delay */ + clrsetbits_le32(®s->sdcc_hc_ddr_config, + SDCC_DDR_CONFIG_PRG_RCLK_DLY, 57); + setbits_le32(®s->sdcc_hc_ddr_config, SDCC_DDR_CONFIG_PRG_DLY_EN); + + setbits_le32(®s->io_macro_config, RGMII_CONFIG_LOOPBACK_EN); + break; + + case SPEED_100: + setbits_le32(®s->io_macro_config, RGMII_CONFIG_DDR_MODE); + setbits_le32(®s->io_macro_config, + RGMII_CONFIG_BYPASS_TX_ID_EN); + clrbits_le32(®s->io_macro_config, + RGMII_CONFIG_POS_NEG_DATA_SEL); + clrbits_le32(®s->io_macro_config, RGMII_CONFIG_PROG_SWAP); + clrsetbits_le32(®s->io_macro_config, + RGMII_CONFIG_MAX_SPD_PRG_2, BIT(6)); + + clrbits_le32(®s->io_macro_config2, + RGMII_CONFIG2_DATA_DIVIDE_CLK_SEL); + setbits_le32(®s->io_macro_config2, + RGMII_CONFIG2_TX_CLK_PHASE_SHIFT_EN); + clrbits_le32(®s->io_macro_config2, + RGMII_CONFIG2_RSVD_CONFIG15); + clrbits_le32(®s->io_macro_config2, + RGMII_CONFIG2_RX_PROG_SWAP); + + /* Write 0x5 to PRG_RCLK_DLY_CODE */ + clrsetbits_le32(®s->sdcc_hc_ddr_config, + SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY_CODE, + (BIT(29) | BIT(27))); + setbits_le32(®s->sdcc_hc_ddr_config, + SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY); + setbits_le32(®s->sdcc_hc_ddr_config, + SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY_EN); + + setbits_le32(®s->io_macro_config, RGMII_CONFIG_LOOPBACK_EN); + break; + + case SPEED_10: + setbits_le32(®s->io_macro_config, RGMII_CONFIG_DDR_MODE); + setbits_le32(®s->io_macro_config, + RGMII_CONFIG_BYPASS_TX_ID_EN); + clrbits_le32(®s->io_macro_config, + RGMII_CONFIG_POS_NEG_DATA_SEL); + clrbits_le32(®s->io_macro_config, RGMII_CONFIG_PROG_SWAP); + clrsetbits_le32(®s->io_macro_config, + RGMII_CONFIG_MAX_SPD_PRG_9, + BIT(12) | GENMASK(9, 8)); + + clrbits_le32(®s->io_macro_config2, + RGMII_CONFIG2_DATA_DIVIDE_CLK_SEL); + clrbits_le32(®s->io_macro_config2, + RGMII_CONFIG2_TX_CLK_PHASE_SHIFT_EN); + clrbits_le32(®s->io_macro_config2, + RGMII_CONFIG2_RSVD_CONFIG15); + clrbits_le32(®s->io_macro_config2, + RGMII_CONFIG2_RX_PROG_SWAP); + + /* Write 0x5 to PRG_RCLK_DLY_CODE */ + clrsetbits_le32(®s->sdcc_hc_ddr_config, + SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY_CODE, + (BIT(29) | BIT(27))); + setbits_le32(®s->sdcc_hc_ddr_config, + SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY); + setbits_le32(®s->sdcc_hc_ddr_config, + SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY_EN); + + setbits_le32(®s->io_macro_config, RGMII_CONFIG_LOOPBACK_EN); + break; + + default: + dev_err(dev, "Invalid speed %ld\n", speed); + return -EINVAL; + } + + return 0; +} + +static int ethqos_configure(struct udevice *dev, + struct dwmac_rgmii_regs *regs, + unsigned long speed) +{ + unsigned int retry = 1000; + + /* Reset to POR values and enable clk */ + writel(emac_v2_3_0_por.io_macro_config, ®s->io_macro_config); + writel(emac_v2_3_0_por.sdcc_hc_dll_config, ®s->sdcc_hc_dll_config); + writel(emac_v2_3_0_por.sdcc_hc_ddr_config, ®s->sdcc_hc_ddr_config); + writel(emac_v2_3_0_por.sdcc_hc_dll_config2, ®s->sdcc_hc_dll_config2); + writel(emac_v2_3_0_por.sdcc_usr_ctl, ®s->sdcc_usr_ctl); + writel(emac_v2_3_0_por.io_macro_config2, ®s->io_macro_config2); + + ethqos_set_func_clk_en(regs); + + /* Initialize the DLL first */ + + /* Set DLL_RST */ + setbits_le32(®s->sdcc_hc_dll_config, SDCC_DLL_CONFIG_DLL_RST); + + /* Set PDN */ + setbits_le32(®s->sdcc_hc_dll_config, SDCC_DLL_CONFIG_PDN); + + /* Clear DLL_RST */ + clrbits_le32(®s->sdcc_hc_dll_config, SDCC_DLL_CONFIG_DLL_RST); + + /* Clear PDN */ + clrbits_le32(®s->sdcc_hc_dll_config, SDCC_DLL_CONFIG_PDN); + + if (speed == SPEED_1000) { + /* Set DLL_EN */ + setbits_le32(®s->sdcc_hc_dll_config, SDCC_DLL_CONFIG_DLL_EN); + + /* Set CK_OUT_EN */ + setbits_le32(®s->sdcc_hc_dll_config, + SDCC_DLL_CONFIG_CK_OUT_EN); + + /* Set USR_CTL bit 26 with mask of 3 bits */ + clrsetbits_le32(®s->sdcc_usr_ctl, GENMASK(26, 24), BIT(26)); + + /* wait for DLL LOCK */ + do { + mdelay(1); + if (readl(®s->sdc4_status) & SDC4_STATUS_DLL_LOCK) + break; + retry--; + } while (retry > 0); + if (!retry) + dev_err(dev, "Timeout while waiting for DLL lock\n"); + + ethqos_dll_configure(dev, regs); + } + + ethqos_rgmii_macro_init(dev, regs, speed); + + return 0; +} + +static void ethqos_rgmii_dump(struct udevice *dev, + struct dwmac_rgmii_regs *regs) +{ + dev_dbg(dev, "Rgmii register dump\n"); + dev_dbg(dev, "RGMII_IO_MACRO_CONFIG: %08x\n", + readl(®s->io_macro_config)); + dev_dbg(dev, "SDCC_HC_REG_DLL_CONFIG: %08x\n", + readl(®s->sdcc_hc_dll_config)); + dev_dbg(dev, "SDCC_HC_REG_DDR_CONFIG: %08x\n", + readl(®s->sdcc_hc_ddr_config)); + dev_dbg(dev, "SDCC_HC_REG_DLL_CONFIG2: %08x\n", + readl(®s->sdcc_hc_dll_config2)); + dev_dbg(dev, "SDC4_STATUS: %08x\n", + readl(®s->sdc4_status)); + dev_dbg(dev, "SDCC_USR_CTL: %08x\n", + readl(®s->sdcc_usr_ctl)); + dev_dbg(dev, "RGMII_IO_MACRO_CONFIG2: %08x\n", + readl(®s->io_macro_config2)); + dev_dbg(dev, "RGMII_IO_MACRO_DEBUG1: %08x\n", + readl(®s->io_macro_debug1)); + dev_dbg(dev, "EMAC_SYSTEM_LOW_POWER_DEBUG: %08x\n", + readl(®s->emac_sys_low_power_dbg)); +} + +static int qcom_eqos_rgmii_set_speed(struct udevice *dev, + void *rgmii_regs, + unsigned long speed) +{ + int ret; + + ethqos_rgmii_dump(dev, rgmii_regs); + + ret = ethqos_configure(dev, rgmii_regs, speed); + if (ret) + return ret; + + ethqos_rgmii_dump(dev, rgmii_regs); + + return 0; +} + +static int qcom_eqos_rgmii_reset(struct udevice *dev, void *rgmii_regs) +{ + ethqos_set_func_clk_en(rgmii_regs); + + return 0; +} + +static int eqos_start_clks_qcom(struct udevice *dev) +{ + if (IS_ENABLED(CONFIG_CLK)) { + struct clk_bulk clocks; + int ret; + + ret = clk_get_bulk(dev, &clocks); + if (ret) + return ret; + + ret = clk_enable_bulk(&clocks); + if (ret) + return ret; + } + + debug("%s: OK\n", __func__); + return 0; +} + +static int eqos_stop_clks_qcom(struct udevice *dev) +{ + if (IS_ENABLED(CONFIG_CLK)) { + struct clk_bulk clocks; + int ret; + + ret = clk_get_bulk(dev, &clocks); + if (ret) + return ret; + + ret = clk_disable_bulk(&clocks); + if (ret) + return ret; + } + + debug("%s: OK\n", __func__); + return 0; +} + +static int eqos_start_resets_qcom(struct udevice *dev) +{ + struct eqos_priv *eqos = dev_get_priv(dev); + int ret; + + debug("%s(dev=%p):\n", __func__, dev); + + if (!eqos->phy) { + ret = dm_gpio_set_value(&eqos->phy_reset_gpio, 0); + if (ret < 0) { + pr_err("dm_gpio_set_value(phy_reset, assert) failed: %d", ret); + return ret; + } + + udelay(eqos->reset_delays[0]); + + ret = dm_gpio_set_value(&eqos->phy_reset_gpio, 1); + if (ret < 0) { + pr_err("dm_gpio_set_value(phy_reset, deassert) failed: %d", ret); + return ret; + } + + udelay(eqos->reset_delays[1]); + + ret = dm_gpio_set_value(&eqos->phy_reset_gpio, 0); + if (ret < 0) { + pr_err("dm_gpio_set_value(phy_reset, deassert) failed: %d", ret); + return ret; + } + + udelay(eqos->reset_delays[2]); + } + + ret = reset_deassert(&eqos->reset_ctl); + if (ret < 0) { + pr_err("reset_deassert() failed: %d", ret); + return ret; + } + + ret = qcom_eqos_rgmii_reset(dev, eqos->eqos_qcom_rgmii_regs); + if (ret < 0) { + pr_err("qcom rgmii_reset failed: %d", ret); + return ret; + } + + debug("%s: OK\n", __func__); + return 0; +} + +/* Clock rates */ +#define RGMII_1000_NOM_CLK_FREQ (250 * 1000 * 1000UL) +#define RGMII_ID_MODE_100_LOW_SVS_CLK_FREQ (50 * 1000 * 1000UL) +#define RGMII_ID_MODE_10_LOW_SVS_CLK_FREQ (5 * 1000 * 1000UL) + +static int eqos_set_tx_clk_speed_qcom(struct udevice *dev) +{ + struct eqos_priv *eqos = dev_get_priv(dev); + ulong rate; + int ret; + + debug("%s(dev=%p):\n", __func__, dev); + + switch (eqos->phy->speed) { + case SPEED_1000: + rate = RGMII_1000_NOM_CLK_FREQ; + break; + case SPEED_100: + rate = RGMII_ID_MODE_100_LOW_SVS_CLK_FREQ; + break; + case SPEED_10: + rate = RGMII_ID_MODE_10_LOW_SVS_CLK_FREQ; + break; + default: + pr_err("invalid speed %d", eqos->phy->speed); + return -EINVAL; + } + + ret = clk_set_rate(&eqos->clk_tx, rate); + if (ret < 0) { + pr_err("clk_set_rate(tx_clk, %lu) failed: %d", rate, ret); + return ret; + } + + ret = qcom_eqos_rgmii_set_speed(dev, eqos->eqos_qcom_rgmii_regs, + eqos->phy->speed); + if (ret < 0) { + pr_err("qcom set_speed: %d, failed: %d", eqos->phy->speed, ret); + return ret; + } + + return 0; +} + +static int eqos_probe_resources_qcom(struct udevice *dev) +{ + struct eqos_priv *eqos = dev_get_priv(dev); + phy_interface_t interface; + int reset_flags = GPIOD_IS_OUT; + int ret; + + debug("%s(dev=%p):\n", __func__, dev); + + interface = eqos->config->interface(dev); + + if (interface == PHY_INTERFACE_MODE_NA) { + pr_err("Invalid PHY interface\n"); + return -EINVAL; + } + + eqos->max_speed = dev_read_u32_default(dev, "max-speed", 0); + + eqos->tx_fifo_sz = dev_read_u32_default(dev, "tx-fifo-depth", 0); + eqos->rx_fifo_sz = dev_read_u32_default(dev, "rx-fifo-depth", 0); + + ret = reset_get_by_name(dev, "emac", &eqos->reset_ctl); + if (ret) { + pr_err("reset_get_by_name(rst) failed: %d", ret); + return ret; + } + + if (dev_read_bool(dev, "snps,reset-active-low")) + reset_flags |= GPIOD_ACTIVE_LOW; + + ret = gpio_request_by_name(dev, "snps,reset-gpio", 0, + &eqos->phy_reset_gpio, reset_flags); + if (ret == 0) { + ret = dev_read_u32_array(dev, "snps,reset-delays-us", + eqos->reset_delays, 3); + } else if (ret == -ENOENT) { + ret = 0; + } + + eqos->eqos_qcom_rgmii_regs = (void *)dev_read_addr_name(dev, "rgmii"); + if ((fdt_addr_t)eqos->eqos_qcom_rgmii_regs == FDT_ADDR_T_NONE) { + pr_err("Invalid RGMII address\n"); + return -EINVAL; + } + + ret = clk_get_by_name(dev, "rgmii", &eqos->clk_tx); + if (ret) { + pr_err("clk_get_by_name(tx) failed: %d", ret); + return -EINVAL; + } + + debug("%s: OK\n", __func__); + return 0; +} + +static int eqos_remove_resources_qcom(struct udevice *dev) +{ + struct eqos_priv *eqos = dev_get_priv(dev); + + debug("%s(dev=%p):\n", __func__, dev); + + clk_free(&eqos->clk_tx); + dm_gpio_free(dev, &eqos->phy_reset_gpio); + reset_free(&eqos->reset_ctl); + + debug("%s: OK\n", __func__); + return 0; +} + +static struct eqos_ops eqos_qcom_ops = { + .eqos_inval_desc = eqos_inval_desc_generic, + .eqos_flush_desc = eqos_flush_desc_generic, + .eqos_inval_buffer = eqos_inval_buffer_generic, + .eqos_flush_buffer = eqos_flush_buffer_generic, + .eqos_probe_resources = eqos_probe_resources_qcom, + .eqos_remove_resources = eqos_remove_resources_qcom, + .eqos_stop_resets = eqos_null_ops, + .eqos_start_resets = eqos_start_resets_qcom, + .eqos_stop_clks = eqos_stop_clks_qcom, + .eqos_start_clks = eqos_start_clks_qcom, + .eqos_calibrate_pads = eqos_null_ops, + .eqos_disable_calibration = eqos_null_ops, + .eqos_set_tx_clk_speed = eqos_set_tx_clk_speed_qcom, + .eqos_get_enetaddr = eqos_null_ops, +}; + +struct eqos_config __maybe_unused eqos_qcom_config = { + .reg_access_always_ok = false, + .mdio_wait = 10, + .swr_wait = 50, + .config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB, + .config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300, + .axi_bus_width = EQOS_AXI_WIDTH_64, + .interface = dev_read_phy_mode, + .ops = &eqos_qcom_ops +}; diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 8abfdbd5d91..1a6c18a441f 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -1205,7 +1205,7 @@ static int fecmxc_probe(struct udevice *dev) uint32_t start; int ret; - if (CONFIG_IS_ENABLED(IMX_MODULE_FUSE)) { + if (IS_ENABLED(CONFIG_IMX_MODULE_FUSE)) { if (enet_fused((ulong)priv->eth)) { printf("SoC fuse indicates Ethernet@0x%lx is unavailable.\n", (ulong)priv->eth); return -ENODEV; diff --git a/drivers/net/ftmac100.c b/drivers/net/ftmac100.c index f710c271c64..fae3adc3de3 100644 --- a/drivers/net/ftmac100.c +++ b/drivers/net/ftmac100.c @@ -12,9 +12,13 @@ #include <env.h> #include <malloc.h> #include <net.h> +#include <phy.h> +#include <miiphy.h> +#include <dm/device_compat.h> #include <asm/global_data.h> #include <linux/delay.h> #include <linux/io.h> +#include <linux/iopoll.h> #include "ftmac100.h" #include <dm.h> @@ -23,12 +27,16 @@ DECLARE_GLOBAL_DATA_PTR; #define ETH_ZLEN 60 +/* Timeout for a mdio read/write operation */ +#define FTMAC100_MDIO_TIMEOUT_USEC 10000 + struct ftmac100_data { struct ftmac100_txdes txdes[1]; struct ftmac100_rxdes rxdes[PKTBUFSRX]; int rx_index; const char *name; - phys_addr_t iobase; + struct ftmac100 *ftmac100; + struct mii_dev *bus; }; /* @@ -36,7 +44,7 @@ struct ftmac100_data { */ static void ftmac100_reset(struct ftmac100_data *priv) { - struct ftmac100 *ftmac100 = (struct ftmac100 *)(uintptr_t)priv->iobase; + struct ftmac100 *ftmac100 = priv->ftmac100; debug ("%s()\n", __func__); @@ -57,7 +65,7 @@ static void ftmac100_reset(struct ftmac100_data *priv) static void ftmac100_set_mac(struct ftmac100_data *priv , const unsigned char *mac) { - struct ftmac100 *ftmac100 = (struct ftmac100 *)(uintptr_t)priv->iobase; + struct ftmac100 *ftmac100 = priv->ftmac100; unsigned int maddr = mac[0] << 8 | mac[1]; unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5]; @@ -72,7 +80,7 @@ static void ftmac100_set_mac(struct ftmac100_data *priv , */ static void _ftmac100_halt(struct ftmac100_data *priv) { - struct ftmac100 *ftmac100 = (struct ftmac100 *)(uintptr_t)priv->iobase; + struct ftmac100 *ftmac100 = priv->ftmac100; debug ("%s()\n", __func__); writel (0, &ftmac100->maccr); } @@ -82,7 +90,7 @@ static void _ftmac100_halt(struct ftmac100_data *priv) */ static int _ftmac100_init(struct ftmac100_data *priv, unsigned char enetaddr[6]) { - struct ftmac100 *ftmac100 = (struct ftmac100 *)(uintptr_t)priv->iobase; + struct ftmac100 *ftmac100 = priv->ftmac100; struct ftmac100_txdes *txdes = priv->txdes; struct ftmac100_rxdes *rxdes = priv->rxdes; unsigned int maccr; @@ -187,7 +195,7 @@ static int __ftmac100_recv(struct ftmac100_data *priv) */ static int _ftmac100_send(struct ftmac100_data *priv, void *packet, int length) { - struct ftmac100 *ftmac100 = (struct ftmac100 *)(uintptr_t)priv->iobase; + struct ftmac100 *ftmac100 = priv->ftmac100; struct ftmac100_txdes *curr_des = priv->txdes; ulong start; @@ -314,7 +322,7 @@ static int ftmac100_of_to_plat(struct udevice *dev) struct eth_pdata *pdata = dev_get_plat(dev); const char *mac; pdata->iobase = dev_read_addr(dev); - priv->iobase = pdata->iobase; + priv->ftmac100 = phys_to_virt(pdata->iobase); mac = dtbmacaddr(0); if (mac) memcpy(pdata->enetaddr , mac , 6); @@ -322,10 +330,104 @@ static int ftmac100_of_to_plat(struct udevice *dev) return 0; } +/* + * struct mii_bus functions + */ +static int ftmac100_mdio_read(struct mii_dev *bus, int addr, int devad, + int reg) +{ + struct ftmac100_data *priv = bus->priv; + struct ftmac100 *ftmac100 = priv->ftmac100; + int phycr = FTMAC100_PHYCR_PHYAD(addr) | + FTMAC100_PHYCR_REGAD(reg) | + FTMAC100_PHYCR_MIIRD; + int ret; + + writel(phycr, &ftmac100->phycr); + + ret = readl_poll_timeout(&ftmac100->phycr, phycr, + !(phycr & FTMAC100_PHYCR_MIIRD), + FTMAC100_MDIO_TIMEOUT_USEC); + if (ret) + pr_err("%s: mdio read failed (addr=0x%x reg=0x%x)\n", + bus->name, addr, reg); + else + ret = phycr & FTMAC100_PHYCR_MIIRDATA; + + return ret; +} + +static int ftmac100_mdio_write(struct mii_dev *bus, int addr, int devad, + int reg, u16 value) +{ + struct ftmac100_data *priv = bus->priv; + struct ftmac100 *ftmac100 = priv->ftmac100; + int phycr = FTMAC100_PHYCR_PHYAD(addr) | + FTMAC100_PHYCR_REGAD(reg) | + FTMAC100_PHYCR_MIIWR; + int ret; + + writel(value, &ftmac100->phywdata); + writel(phycr, &ftmac100->phycr); + + ret = readl_poll_timeout(&ftmac100->phycr, phycr, + !(phycr & FTMAC100_PHYCR_MIIWR), + FTMAC100_MDIO_TIMEOUT_USEC); + if (ret) + pr_err("%s: mdio write failed (addr=0x%x reg=0x%x)\n", + bus->name, addr, reg); + + return ret; +} + +static int ftmac100_mdio_init(struct udevice *dev) +{ + struct ftmac100_data *priv = dev_get_priv(dev); + struct mii_dev *bus; + int ret; + + bus = mdio_alloc(); + if (!bus) + return -ENOMEM; + + bus->read = ftmac100_mdio_read; + bus->write = ftmac100_mdio_write; + bus->priv = priv; + + ret = mdio_register_seq(bus, dev_seq(dev)); + if (ret) { + mdio_free(bus); + return ret; + } + + priv->bus = bus; + + return 0; +} + static int ftmac100_probe(struct udevice *dev) { struct ftmac100_data *priv = dev_get_priv(dev); priv->name = dev->name; + int ret = 0; + + ret = ftmac100_mdio_init(dev); + if (ret) { + dev_err(dev, "Failed to initialize mdiobus: %d\n", ret); + goto out; + } + +out: + return ret; +} + +static int ftmac100_remove(struct udevice *dev) +{ + struct ftmac100_data *priv = dev_get_priv(dev); + + mdio_unregister(priv->bus); + mdio_free(priv->bus); + return 0; } @@ -348,12 +450,13 @@ static const struct udevice_id ftmac100_ids[] = { }; U_BOOT_DRIVER(ftmac100) = { - .name = "nds32_mac", + .name = "ftmac100", .id = UCLASS_ETH, .of_match = ftmac100_ids, .bind = ftmac100_bind, .of_to_plat = ftmac100_of_to_plat, .probe = ftmac100_probe, + .remove = ftmac100_remove, .ops = &ftmac100_ops, .priv_auto = sizeof(struct ftmac100_data), .plat_auto = sizeof(struct eth_pdata), diff --git a/drivers/net/ftmac100.h b/drivers/net/ftmac100.h index 75a49f628a6..21d339f835b 100644 --- a/drivers/net/ftmac100.h +++ b/drivers/net/ftmac100.h @@ -93,6 +93,15 @@ struct ftmac100 { #define FTMAC100_MACCR_RX_BROADPKT (1 << 17) /* + * PHY control register + */ +#define FTMAC100_PHYCR_MIIRDATA 0xffff +#define FTMAC100_PHYCR_PHYAD(x) (((x) & 0x1f) << 16) +#define FTMAC100_PHYCR_REGAD(x) (((x) & 0x1f) << 21) +#define FTMAC100_PHYCR_MIIWR BIT(27) +#define FTMAC100_PHYCR_MIIRD BIT(26) + +/* * Transmit descriptor, aligned to 16 bytes */ struct ftmac100_txdes { diff --git a/drivers/phy/phy-ab8500-usb.c b/drivers/phy/phy-ab8500-usb.c index 0e04595717b..3d3d48c9733 100644 --- a/drivers/phy/phy-ab8500-usb.c +++ b/drivers/phy/phy-ab8500-usb.c @@ -19,7 +19,7 @@ static int ab8500_usb_phy_power_on(struct phy *phy) struct udevice *dev = phy->dev; uint set = AB8500_BIT_PHY_CTRL_DEVICE_EN; - if (CONFIG_IS_ENABLED(USB_MUSB_HOST)) + if (IS_ENABLED(CONFIG_USB_MUSB_HOST)) set = AB8500_BIT_PHY_CTRL_HOST_EN; return pmic_clrsetbits(dev->parent, AB8500_USB_PHY_CTRL_REG, diff --git a/drivers/pinctrl/broadcom/pinctrl-bcm283x.c b/drivers/pinctrl/broadcom/pinctrl-bcm283x.c index 44a310f83de..e949cb70900 100644 --- a/drivers/pinctrl/broadcom/pinctrl-bcm283x.c +++ b/drivers/pinctrl/broadcom/pinctrl-bcm283x.c @@ -153,7 +153,7 @@ U_BOOT_DRIVER(pinctrl_bcm283x) = { .priv_auto = sizeof(struct bcm283x_pinctrl_priv), .ops = &bcm283x_pinctrl_ops, .probe = bcm283x_pinctl_probe, -#if CONFIG_IS_ENABLED(OF_BOARD) +#if IS_ENABLED(CONFIG_OF_BOARD) .flags = DM_FLAG_PRE_RELOC, #endif }; diff --git a/drivers/pinctrl/pinctrl-at91-pio4.c b/drivers/pinctrl/pinctrl-at91-pio4.c index 50e3dd449ab..84b398619c4 100644 --- a/drivers/pinctrl/pinctrl-at91-pio4.c +++ b/drivers/pinctrl/pinctrl-at91-pio4.c @@ -271,7 +271,7 @@ static int atmel_pinctrl_bind(struct udevice *dev) ofnode node = dev_ofnode(dev); struct atmel_pinctrl_data *priv = (struct atmel_pinctrl_data *)dev_get_driver_data(dev); - if (!CONFIG_IS_ENABLED(ATMEL_PIO4)) + if (!IS_ENABLED(CONFIG_ATMEL_PIO4)) return 0; /* Obtain a handle to the GPIO driver */ diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index bc9c17bce84..d80281fd3dd 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -541,7 +541,7 @@ static int single_probe(struct udevice *dev) INIT_LIST_HEAD(&priv->gpiofuncs); size = pdata->offset + pdata->width / BITS_PER_BYTE; - #if (CONFIG_IS_ENABLED(SANDBOX)) + #if (IS_ENABLED(CONFIG_SANDBOX)) priv->sandbox_regs = devm_kzalloc(dev, size * sizeof(*priv->sandbox_regs), GFP_KERNEL); diff --git a/drivers/serial/serial_bcm283x_mu.c b/drivers/serial/serial_bcm283x_mu.c index 12cbcb9858c..7585f790d22 100644 --- a/drivers/serial/serial_bcm283x_mu.c +++ b/drivers/serial/serial_bcm283x_mu.c @@ -197,7 +197,7 @@ U_BOOT_DRIVER(serial_bcm283x_mu) = { .plat_auto = sizeof(struct bcm283x_mu_serial_plat), .probe = bcm283x_mu_serial_probe, .ops = &bcm283x_mu_serial_ops, -#if !CONFIG_IS_ENABLED(OF_CONTROL) || CONFIG_IS_ENABLED(OF_BOARD) +#if !CONFIG_IS_ENABLED(OF_CONTROL) || IS_ENABLED(CONFIG_OF_BOARD) .flags = DM_FLAG_PRE_RELOC, #endif .priv_auto = sizeof(struct bcm283x_mu_priv), diff --git a/drivers/serial/serial_bcm283x_pl011.c b/drivers/serial/serial_bcm283x_pl011.c index 7d172cdac0a..09a9868a38f 100644 --- a/drivers/serial/serial_bcm283x_pl011.c +++ b/drivers/serial/serial_bcm283x_pl011.c @@ -94,7 +94,7 @@ U_BOOT_DRIVER(bcm283x_pl011_uart) = { .probe = bcm283x_pl011_serial_probe, .plat_auto = sizeof(struct pl01x_serial_plat), .ops = &bcm283x_pl011_serial_ops, -#if !CONFIG_IS_ENABLED(OF_CONTROL) || CONFIG_IS_ENABLED(OF_BOARD) +#if !CONFIG_IS_ENABLED(OF_CONTROL) || IS_ENABLED(CONFIG_OF_BOARD) .flags = DM_FLAG_PRE_RELOC, #endif .priv_auto = sizeof(struct pl01x_priv), diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c index 4b1818313a8..9bb9b7d3b8d 100644 --- a/drivers/serial/serial_zynq.c +++ b/drivers/serial/serial_zynq.c @@ -108,7 +108,7 @@ static void _uart_zynq_serial_init(struct uart_zynq *regs) static int _uart_zynq_serial_putc(struct uart_zynq *regs, const char c) { - if (CONFIG_IS_ENABLED(DEBUG_UART_ZYNQ)) { + if (IS_ENABLED(CONFIG_DEBUG_UART_ZYNQ)) { if (!(readl(®s->channel_sts) & ZYNQ_UART_SR_TXEMPTY)) return -EAGAIN; } else { diff --git a/drivers/spi/cadence_ospi_versal.c b/drivers/spi/cadence_ospi_versal.c index e0d5e6b9e69..434c6038f3b 100644 --- a/drivers/spi/cadence_ospi_versal.c +++ b/drivers/spi/cadence_ospi_versal.c @@ -216,7 +216,7 @@ int cadence_qspi_versal_flash_reset(struct udevice *dev) void cadence_qspi_apb_enable_linear_mode(bool enable) { - if (CONFIG_IS_ENABLED(ZYNQMP_FIRMWARE)) { + if (IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE)) { if (enable) /* ahb read mode */ xilinx_pm_request(PM_IOCTL, PM_DEV_OSPI, diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index 328dfb0a388..c7f10c50132 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -215,7 +215,7 @@ static int cadence_spi_probe(struct udevice *bus) priv->tchsh_ns = plat->tchsh_ns; priv->tslch_ns = plat->tslch_ns; - if (CONFIG_IS_ENABLED(ZYNQMP_FIRMWARE)) + if (IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE)) xilinx_pm_request(PM_REQUEST_NODE, PM_DEV_OSPI, ZYNQMP_PM_CAPABILITY_ACCESS, ZYNQMP_PM_MAX_QOS, ZYNQMP_PM_REQUEST_ACK_NO, NULL); @@ -249,7 +249,7 @@ static int cadence_spi_probe(struct udevice *bus) priv->wr_delay = 50 * DIV_ROUND_UP(NSEC_PER_SEC, priv->ref_clk_hz); - if (CONFIG_IS_ENABLED(ARCH_VERSAL)) { + if (IS_ENABLED(CONFIG_ARCH_VERSAL)) { /* Versal platform uses spi calibration to set read delay */ if (priv->read_delay >= 0) priv->read_delay = -1; diff --git a/drivers/sysreset/sysreset_mpc83xx.c b/drivers/sysreset/sysreset_mpc83xx.c index 81fccf95767..c9a03266595 100644 --- a/drivers/sysreset/sysreset_mpc83xx.c +++ b/drivers/sysreset/sysreset_mpc83xx.c @@ -120,7 +120,7 @@ static int print_83xx_arb_event(bool force, char *buf, int size) "Master ID", mstr_id, master[mstr_id], "Transfer Size", tsize_val, tsize_bytes, "Transfer Type", ttype, transfer[ttype]); - } else if (CONFIG_IS_ENABLED(DISPLAY_AER_BRIEF)) { + } else if (IS_ENABLED(CONFIG_DISPLAY_AER_BRIEF)) { res = snprintf(buf, size, "Arbiter Event Status: AEATR=0x%08lX, AEADR=0x%08lX\n", gd->arch.arbiter_event_attributes, @@ -185,7 +185,7 @@ static int mpc83xx_sysreset_get_status(struct udevice *dev, char *buf, int size) * arbiter driver */ if (CONFIG_IS_ENABLED(DISPLAY_AER_FULL) || - CONFIG_IS_ENABLED(DISPLAY_AER_BRIEF)) { + IS_ENABLED(CONFIG_DISPLAY_AER_BRIEF)) { /* * If there was a bus monitor reset event, we force the arbiter * event to be printed diff --git a/drivers/tpm/tpm-uclass.c b/drivers/tpm/tpm-uclass.c index 5ff0cd3958c..b2286f7e7ed 100644 --- a/drivers/tpm/tpm-uclass.c +++ b/drivers/tpm/tpm-uclass.c @@ -156,7 +156,7 @@ static int tpm_uclass_post_probe(struct udevice *dev) const char *drv = TPM_RNG_DRV_NAME; struct udevice *child; - if (CONFIG_IS_ENABLED(TPM_RNG)) { + if (IS_ENABLED(CONFIG_TPM_RNG)) { ret = device_find_first_child_by_uclass(dev, UCLASS_RNG, &child); diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index 0a12db614ff..91633f013a5 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -360,7 +360,7 @@ int ehci_hcd_init(int index, enum usb_init_type init, if (index > 3) return -EINVAL; - if (CONFIG_IS_ENABLED(IMX_MODULE_FUSE)) { + if (IS_ENABLED(CONFIG_IMX_MODULE_FUSE)) { if (usb_fused((ulong)ehci)) { printf("SoC fuse indicates USB@0x%lx is unavailable.\n", (ulong)ehci); @@ -641,7 +641,7 @@ static int ehci_usb_probe(struct udevice *dev) struct ehci_hcor *hcor; int ret; - if (CONFIG_IS_ENABLED(IMX_MODULE_FUSE)) { + if (IS_ENABLED(CONFIG_IMX_MODULE_FUSE)) { if (usb_fused((ulong)ehci)) { printf("SoC fuse indicates USB@0x%lx is unavailable.\n", (ulong)ehci); diff --git a/drivers/usb/musb-new/omap2430.c b/drivers/usb/musb-new/omap2430.c index 42e7abddbc2..482dfdc6be6 100644 --- a/drivers/usb/musb-new/omap2430.c +++ b/drivers/usb/musb-new/omap2430.c @@ -231,7 +231,7 @@ static int omap2430_musb_probe(struct udevice *dev) otg_board_data = &plat->otg_board_data; - if (CONFIG_IS_ENABLED(USB_MUSB_HOST)) { + if (IS_ENABLED(CONFIG_USB_MUSB_HOST)) { struct musb_host_data *host = dev_get_priv(dev); struct usb_bus_priv *priv = dev_get_uclass_priv(dev); diff --git a/drivers/video/imx/mxc_ipuv3_fb.c b/drivers/video/imx/mxc_ipuv3_fb.c index 8b01a1be112..7e60385bcfa 100644 --- a/drivers/video/imx/mxc_ipuv3_fb.c +++ b/drivers/video/imx/mxc_ipuv3_fb.c @@ -615,7 +615,7 @@ static int ipuv3_video_probe(struct udevice *dev) if (ret < 0) return ret; #endif - if (CONFIG_IS_ENABLED(PANEL)) { + if (IS_ENABLED(CONFIG_PANEL)) { struct udevice *panel_dev; ret = uclass_get_device(UCLASS_PANEL, 0, &panel_dev); diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c index 0ce376ca3f1..6aaacff10df 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c @@ -196,14 +196,14 @@ u32 video_index_to_colour(struct video_priv *priv, unsigned int idx) { switch (priv->bpix) { case VIDEO_BPP16: - if (CONFIG_IS_ENABLED(VIDEO_BPP16)) { + if (IS_ENABLED(CONFIG_VIDEO_BPP16)) { return ((colours[idx].r >> 3) << 11) | ((colours[idx].g >> 2) << 5) | ((colours[idx].b >> 3) << 0); } break; case VIDEO_BPP32: - if (CONFIG_IS_ENABLED(VIDEO_BPP32)) { + if (IS_ENABLED(CONFIG_VIDEO_BPP32)) { if (priv->format == VIDEO_X2R10G10B10) return (colours[idx].r << 22) | (colours[idx].g << 12) | diff --git a/drivers/xen/events.c b/drivers/xen/events.c index 532216fece3..2ebe20dbf26 100644 --- a/drivers/xen/events.c +++ b/drivers/xen/events.c @@ -23,9 +23,9 @@ #include <xen/events.h> #include <xen/hvm.h> -#if CONFIG_IS_ENABLED(XEN_SERIAL) +#if IS_ENABLED(CONFIG_XEN_SERIAL) extern u32 console_evtchn; -#endif /* CONFIG_IS_ENABLED(XEN_SERIAL) */ +#endif /* IS_ENABLED(CONFIG_XEN_SERIAL) */ #define NR_EVS 1024 @@ -53,10 +53,10 @@ void unbind_all_ports(void) struct vcpu_info *vcpu_info = &s->vcpu_info[cpu]; for (i = 0; i < NR_EVS; i++) { -#if CONFIG_IS_ENABLED(XEN_SERIAL) +#if IS_ENABLED(CONFIG_XEN_SERIAL) if (i == console_evtchn) continue; -#endif /* CONFIG_IS_ENABLED(XEN_SERIAL) */ +#endif /* IS_ENABLED(CONFIG_XEN_SERIAL) */ if (test_and_clear_bit(i, bound_ports)) { printf("port %d still bound!\n", i); diff --git a/env/Kconfig b/env/Kconfig index c409ea71fe5..6e24eee55f2 100644 --- a/env/Kconfig +++ b/env/Kconfig @@ -733,6 +733,7 @@ config ENV_APPEND config ENV_WRITEABLE_LIST bool "Permit write access only to listed variables" + select ENV_APPEND help If defined, only environment variables which explicitly set the 'w' writeable flag can be written and modified at runtime. No variables diff --git a/env/env.c b/env/env.c index 0f73ebc08e0..ad774f41175 100644 --- a/env/env.c +++ b/env/env.c @@ -192,6 +192,14 @@ int env_load(void) int best_prio = -1; int prio; + if (CONFIG_IS_ENABLED(ENV_WRITEABLE_LIST)) { + /* + * When using a list of writeable variables, the baseline comes + * from the built-in default env. So load this first. + */ + env_set_default(NULL, 0); + } + for (prio = 0; (drv = env_driver_lookup(ENVOP_LOAD, prio)); prio++) { int ret; diff --git a/env/flags.c b/env/flags.c index e3e833c4333..e2866361dfe 100644 --- a/env/flags.c +++ b/env/flags.c @@ -22,7 +22,7 @@ #include <env_internal.h> #endif -#ifdef CONFIG_CMD_NET +#ifdef CONFIG_NET #define ENV_FLAGS_NET_VARTYPE_REPS "im" #else #define ENV_FLAGS_NET_VARTYPE_REPS "" @@ -57,7 +57,7 @@ static const char * const env_flags_vartype_names[] = { "decimal", "hexadecimal", "boolean", -#ifdef CONFIG_CMD_NET +#ifdef CONFIG_NET "IP address", "MAC address", #endif @@ -211,7 +211,7 @@ static void skip_num(int hex, const char *value, const char **end, *end = value; } -#ifdef CONFIG_CMD_NET +#ifdef CONFIG_NET int eth_validate_ethaddr_str(const char *addr) { const char *end; @@ -244,7 +244,7 @@ static int _env_flags_validate_type(const char *value, enum env_flags_vartype type) { const char *end; -#ifdef CONFIG_CMD_NET +#ifdef CONFIG_NET const char *cur; int i; #endif @@ -273,7 +273,7 @@ static int _env_flags_validate_type(const char *value, if (value[1] != '\0') return -1; break; -#ifdef CONFIG_CMD_NET +#ifdef CONFIG_NET case env_flags_vartype_ipaddr: cur = value; for (i = 0; i < 4; i++) { diff --git a/fs/erofs/Makefile b/fs/erofs/Makefile index 58af6a68e41..ef94d2db45d 100644 --- a/fs/erofs/Makefile +++ b/fs/erofs/Makefile @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_$(SPL_)FS_EROFS) = fs.o \ +obj-$(CONFIG_FS_EROFS) = fs.o \ super.o \ namei.o \ data.o \ diff --git a/include/bcb.h b/include/bcb.h index 897e83d371f..5edb17aa47d 100644 --- a/include/bcb.h +++ b/include/bcb.h @@ -8,7 +8,7 @@ #ifndef __BCB_H__ #define __BCB_H__ -#if CONFIG_IS_ENABLED(CMD_BCB) +#if IS_ENABLED(CONFIG_CMD_BCB) int bcb_write_reboot_reason(int devnum, char *partp, const char *reasonp); #else #include <linux/errno.h> diff --git a/include/button.h b/include/button.h index 96e6b1901fc..207f4a0f4db 100644 --- a/include/button.h +++ b/include/button.h @@ -37,6 +37,14 @@ struct button_ops { * @return button state button_state_t, or -ve on error */ enum button_state_t (*get_state)(struct udevice *dev); + + /** + * get_code() - get linux event code of a button + * + * @dev: button device to change + * @return button code, or -ENODATA on error + */ + int (*get_code)(struct udevice *dev); }; #define button_get_ops(dev) ((struct button_ops *)(dev)->driver->ops) @@ -58,4 +66,12 @@ int button_get_by_label(const char *label, struct udevice **devp); */ enum button_state_t button_get_state(struct udevice *dev); +/** + * button_get_code() - get linux event code of a button + * + * @dev: button device to change + * @return button code, or -ve on error + */ +int button_get_code(struct udevice *dev); + #endif diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 1f473b5a150..5b477785174 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -47,7 +47,7 @@ #define BOOTENV_DEV_NAME_NAND(devtypeu, devtypel, instance) \ #devtypel #instance " " -#if CONFIG_IS_ENABLED(CMD_USB) +#if IS_ENABLED(CONFIG_CMD_USB) # define BOOT_TARGET_USB(func) func(USB, usb, 0) #else # define BOOT_TARGET_USB(func) diff --git a/include/configs/am62ax_evm.h b/include/configs/am62ax_evm.h index cdd639b9309..a18b1572b13 100644 --- a/include/configs/am62ax_evm.h +++ b/include/configs/am62ax_evm.h @@ -71,12 +71,12 @@ #define BOOTENV_DEV_NAME_TI_MMC(devtyeu, devtypel, instance) \ "ti_mmc " -#if CONFIG_IS_ENABLED(CMD_MMC) +#if IS_ENABLED(CONFIG_CMD_MMC) #define BOOT_TARGET_MMC(func) \ func(TI_MMC, ti_mmc, na) #else #define BOOT_TARGET_MMC(func) -#endif /* CONFIG_IS_ENABLED(CMD_MMC) */ +#endif /* IS_ENABLED(CONFIG_CMD_MMC) */ #define BOOT_TARGET_DEVICES(func) \ BOOT_TARGET_MMC(func) diff --git a/include/configs/apple.h b/include/configs/apple.h index fe7d11bcdb3..0576bc04c94 100644 --- a/include/configs/apple.h +++ b/include/configs/apple.h @@ -9,13 +9,13 @@ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" -#if CONFIG_IS_ENABLED(CMD_NVME) +#if IS_ENABLED(CONFIG_CMD_NVME) #define BOOT_TARGET_NVME(func) func(NVME, nvme, 0) #else #define BOOT_TARGET_NVME(func) #endif -#if CONFIG_IS_ENABLED(CMD_USB) +#if IS_ENABLED(CONFIG_CMD_USB) #define BOOT_TARGET_USB(func) func(USB, usb, 0) #else #define BOOT_TARGET_USB(func) diff --git a/include/configs/bcm7260.h b/include/configs/bcm7260.h index 43edc91b101..dbe545c1759 100644 --- a/include/configs/bcm7260.h +++ b/include/configs/bcm7260.h @@ -10,8 +10,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CFG_SYS_NS16550_COM1 0xf040c000 - #define CFG_SYS_INIT_RAM_ADDR 0x10200000 #include "bcmstb.h" diff --git a/include/configs/bcm7445.h b/include/configs/bcm7445.h index 114337294e0..b59048d175b 100644 --- a/include/configs/bcm7445.h +++ b/include/configs/bcm7445.h @@ -10,8 +10,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CFG_SYS_NS16550_COM1 0xf040ab00 - #define CFG_SYS_INIT_RAM_ADDR 0x80200000 #include "bcmstb.h" diff --git a/include/configs/bcmstb.h b/include/configs/bcmstb.h index d1de3561af6..c9280927b3c 100644 --- a/include/configs/bcmstb.h +++ b/include/configs/bcmstb.h @@ -93,19 +93,6 @@ extern phys_addr_t prior_stage_fdt_address; */ /* - * NS16550 configuration. - */ -#define V_NS16550_CLK 81000000 - -#define CFG_SYS_NS16550_CLK V_NS16550_CLK - -/* - * Serial console configuration. - */ -#define CFG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ - 115200} - -/* * Informational display configuration. */ diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index 2641d7bc960..09d87cf214b 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -30,7 +30,7 @@ EFI_GUID(0x0bf1165c, 0x1831, 0x4864, 0x94, 0x5e, \ 0xac, 0x3d, 0x38, 0x48, 0xf4, 0x99) -#if CONFIG_IS_ENABLED(CMD_MMC) +#if IS_ENABLED(CONFIG_CMD_MMC) # define BOOT_TARGET_MMC(func) \ func(MMC, mmc, 2) \ func(MMC, mmc, 0) @@ -38,7 +38,7 @@ # define BOOT_TARGET_MMC(func) #endif -#if CONFIG_IS_ENABLED(CMD_USB) +#if IS_ENABLED(CONFIG_CMD_USB) # define BOOT_TARGET_USB(func) func(USB, usb, 0) #else # define BOOT_TARGET_USB(func) diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h index bb3dfe3fa0d..1880d0311e4 100644 --- a/include/configs/imx8mn_beacon.h +++ b/include/configs/imx8mn_beacon.h @@ -80,7 +80,7 @@ #define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 -#if CONFIG_IS_ENABLED(IMX8MN_BEACON_2GB_LPDDR) +#if IS_ENABLED(CONFIG_IMX8MN_BEACON_2GB_LPDDR) #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ #else #define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */ diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index d4ab6a6207d..e577f60ae72 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -39,7 +39,7 @@ #endif -#if CONFIG_IS_ENABLED(CMD_MMC) +#if IS_ENABLED(CONFIG_CMD_MMC) # define BOOT_TARGET_MMC(func) \ func(MMC, mmc, 2) \ func(MMC, mmc, 1) diff --git a/include/configs/iot2050.h b/include/configs/iot2050.h index 7d087413362..cfff46ce339 100644 --- a/include/configs/iot2050.h +++ b/include/configs/iot2050.h @@ -19,7 +19,7 @@ #define EXTRA_ENV_IOT2050_BOARD_SETTINGS \ "usb_pgood_delay=900\0" -#if CONFIG_IS_ENABLED(CMD_USB) +#if IS_ENABLED(CONFIG_CMD_USB) # define BOOT_TARGET_USB(func) \ func(USB, usb, 0) \ func(USB, usb, 1) \ diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index 635ae78abcb..98b743b9364 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -13,7 +13,7 @@ #include "mx6_common.h" #include <asm/mach-imx/gpio.h> -#define is_mx6ul_9x9_evk() CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK) +#define is_mx6ul_9x9_evk() IS_ENABLED(CONFIG_TARGET_MX6UL_9X9_EVK) #define CFG_MXC_UART_BASE UART1_BASE diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h index 0b23e4c0433..ff8123dabd6 100644 --- a/include/configs/rockchip-common.h +++ b/include/configs/rockchip-common.h @@ -12,7 +12,7 @@ #ifndef CONFIG_SPL_BUILD /* First try to boot from SD (index 1), then eMMC (index 0) */ -#if CONFIG_IS_ENABLED(CMD_MMC) +#if IS_ENABLED(CONFIG_CMD_MMC) #define BOOT_TARGET_MMC(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 0) @@ -20,19 +20,19 @@ #define BOOT_TARGET_MMC(func) #endif -#if CONFIG_IS_ENABLED(CMD_NVME) +#if IS_ENABLED(CONFIG_CMD_NVME) #define BOOT_TARGET_NVME(func) func(NVME, nvme, 0) #else #define BOOT_TARGET_NVME(func) #endif -#if CONFIG_IS_ENABLED(CMD_SCSI) +#if IS_ENABLED(CONFIG_CMD_SCSI) #define BOOT_TARGET_SCSI(func) func(SCSI, scsi, 0) #else #define BOOT_TARGET_SCSI(func) #endif -#if CONFIG_IS_ENABLED(CMD_USB) +#if IS_ENABLED(CONFIG_CMD_USB) #define BOOT_TARGET_USB(func) func(USB, usb, 0) #else #define BOOT_TARGET_USB(func) @@ -50,7 +50,7 @@ #define BOOT_TARGET_DHCP(func) #endif -#if CONFIG_IS_ENABLED(CMD_SF) +#if IS_ENABLED(CONFIG_CMD_SF) #define BOOT_TARGET_SF(func) func(SF, sf, 0) #else #define BOOT_TARGET_SF(func) diff --git a/include/configs/rpi.h b/include/configs/rpi.h index c3f8e7bf85c..4da982f7357 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -122,7 +122,7 @@ "fdt_addr_r=0x02600000\0" \ "ramdisk_addr_r=0x02700000\0" -#if CONFIG_IS_ENABLED(CMD_MMC) +#if IS_ENABLED(CONFIG_CMD_MMC) #define BOOT_TARGET_MMC(func) \ func(MMC, mmc, 0) \ func(MMC, mmc, 1) \ @@ -131,7 +131,7 @@ #define BOOT_TARGET_MMC(func) #endif -#if CONFIG_IS_ENABLED(CMD_USB) +#if IS_ENABLED(CONFIG_CMD_USB) #define BOOT_TARGET_USB(func) func(USB, usb, 0) #else #define BOOT_TARGET_USB(func) diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 0fdb5a81605..991ffbb7dff 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -7,7 +7,7 @@ #ifndef __TEGRA_COMMON_POST_H #define __TEGRA_COMMON_POST_H -#if CONFIG_IS_ENABLED(CMD_USB) +#if IS_ENABLED(CONFIG_CMD_USB) # define BOOT_TARGET_USB(func) func(USB, usb, 0) #else # define BOOT_TARGET_USB(func) diff --git a/include/dt-bindings/pinctrl/pinctrl-snapdragon.h b/include/dt-bindings/pinctrl/pinctrl-snapdragon.h deleted file mode 100644 index 615affb6f26..00000000000 --- a/include/dt-bindings/pinctrl/pinctrl-snapdragon.h +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * This header provides constants for Qualcomm Snapdragon pinctrl bindings. - * - * (C) Copyright 2018 Ramon Fried <ramon.fried@gmail.com> - * - */ - -#ifndef _DT_BINDINGS_PINCTRL_SNAPDRAGON_H -#define _DT_BINDINGS_PINCTRL_SNAPDRAGON_H - -/* GPIO Drive Strength */ -#define DRIVE_STRENGTH_2MA 0 -#define DRIVE_STRENGTH_4MA 1 -#define DRIVE_STRENGTH_6MA 2 -#define DRIVE_STRENGTH_8MA 3 -#define DRIVE_STRENGTH_10MA 4 -#define DRIVE_STRENGTH_12MA 5 -#define DRIVE_STRENGTH_14MA 6 -#define DRIVE_STRENGTH_16MA 7 - -#endif diff --git a/include/env_flags.h b/include/env_flags.h index 6bd574c2bdb..7de58cc57c3 100644 --- a/include/env_flags.h +++ b/include/env_flags.h @@ -12,7 +12,7 @@ enum env_flags_vartype { env_flags_vartype_decimal, env_flags_vartype_hex, env_flags_vartype_bool, -#ifdef CONFIG_CMD_NET +#ifdef CONFIG_NET env_flags_vartype_ipaddr, env_flags_vartype_macaddr, #endif @@ -121,7 +121,7 @@ enum env_flags_varaccess env_flags_parse_varaccess(const char *flags); */ enum env_flags_varaccess env_flags_parse_varaccess_from_binflags(int binflags); -#ifdef CONFIG_CMD_NET +#ifdef CONFIG_NET /* * Check if a string has the format of an Ethernet MAC address */ diff --git a/include/env_internal.h b/include/env_internal.h index aee6b3e48fa..6a694946468 100644 --- a/include/env_internal.h +++ b/include/env_internal.h @@ -189,7 +189,7 @@ struct env_driver { #endif #define ENV_SAVE_PTR(x) (CONFIG_IS_ENABLED(SAVEENV) ? (x) : NULL) -#define ENV_ERASE_PTR(x) (CONFIG_IS_ENABLED(CMD_ERASEENV) ? (x) : NULL) +#define ENV_ERASE_PTR(x) (IS_ENABLED(CONFIG_CMD_ERASEENV) ? (x) : NULL) extern struct hsearch_data env_htab; diff --git a/include/environment/distro/sf.h b/include/environment/distro/sf.h index 62624d553c0..ee48a8a4e8f 100644 --- a/include/environment/distro/sf.h +++ b/include/environment/distro/sf.h @@ -8,7 +8,7 @@ #ifndef __DISTRO_SF_CONFIG_H #define __DISTRO_SF_CONFIG_H -#if CONFIG_IS_ENABLED(CMD_SF) +#if IS_ENABLED(CONFIG_CMD_SF) #define BOOTENV_SHARED_SF(devtypel) \ #devtypel "_boot=" \ "if " #devtypel " probe ${busnum}; then " \ diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 2d04882d053..b8acacd49ee 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -65,7 +65,7 @@ struct clk_mux { */ const char * const *parent_names; u8 num_parents; -#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF) +#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF) u32 io_mux_val; #endif @@ -93,7 +93,7 @@ struct clk_gate { void __iomem *reg; u8 bit_idx; u8 flags; -#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF) +#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF) u32 io_gate_val; #endif }; @@ -121,7 +121,7 @@ struct clk_divider { u8 width; u8 flags; const struct clk_div_table *table; -#if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF) +#if IS_ENABLED(CONFIG_SANDBOX_CLK_CCF) u32 io_divider_val; #endif }; diff --git a/include/tee.h b/include/tee.h index 13f6096b9a6..ab0c5832613 100644 --- a/include/tee.h +++ b/include/tee.h @@ -328,7 +328,7 @@ bool tee_shm_is_registered(struct tee_shm *shm, struct udevice *dev); * Returns a probed TEE device of the first TEE device matched by the * match() callback or NULL. */ -#if CONFIG_IS_ENABLED(TEE) +#if IS_ENABLED(CONFIG_TEE) struct udevice *tee_find_device(struct udevice *start, int (*match)(struct tee_version_data *vers, const void *data), diff --git a/lib/efi_loader/efi_image_loader.c b/lib/efi_loader/efi_image_loader.c index eaf75a5803d..26df0da16c9 100644 --- a/lib/efi_loader/efi_image_loader.c +++ b/lib/efi_loader/efi_image_loader.c @@ -938,7 +938,7 @@ efi_status_t efi_load_pe(struct efi_loaded_image_obj *handle, goto err; } -#if CONFIG_IS_ENABLED(EFI_TCG2_PROTOCOL) +#if IS_ENABLED(CONFIG_EFI_TCG2_PROTOCOL) /* Measure an PE/COFF image */ ret = tcg2_measure_pe_image(efi, efi_size, handle, loaded_image_info); if (ret == EFI_SECURITY_VIOLATION) { diff --git a/lib/efi_loader/efi_root_node.c b/lib/efi_loader/efi_root_node.c index a4eb6f493dc..108c14b95bd 100644 --- a/lib/efi_loader/efi_root_node.c +++ b/lib/efi_loader/efi_root_node.c @@ -58,7 +58,7 @@ efi_status_t efi_root_node_register(void) &efi_guid_device_path_to_text_protocol, &efi_device_path_to_text, #endif -#if CONFIG_IS_ENABLED(EFI_DEVICE_PATH_UTIL) +#if IS_ENABLED(CONFIG_EFI_DEVICE_PATH_UTIL) /* Device path utilities protocol */ &efi_guid_device_path_utilities_protocol, &efi_device_path_utilities, @@ -68,11 +68,11 @@ efi_status_t efi_root_node_register(void) &efi_guid_dt_fixup_protocol, &efi_dt_fixup_prot, #endif -#if CONFIG_IS_ENABLED(EFI_UNICODE_COLLATION_PROTOCOL2) +#if IS_ENABLED(CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2) &efi_guid_unicode_collation_protocol2, &efi_unicode_collation_protocol2, #endif -#if CONFIG_IS_ENABLED(EFI_LOADER_HII) +#if IS_ENABLED(CONFIG_EFI_LOADER_HII) /* HII string protocol */ &efi_guid_hii_string_protocol, &efi_hii_string, diff --git a/lib/hashtable.c b/lib/hashtable.c index 90c8465611e..f2d36bd34b4 100644 --- a/lib/hashtable.c +++ b/lib/hashtable.c @@ -942,7 +942,7 @@ int himport_r(struct hsearch_data *htab, e.data = value; hsearch_r(e, ENV_ENTER, &rv, htab, flag); -#if !CONFIG_IS_ENABLED(ENV_WRITEABLE_LIST) +#if !IS_ENABLED(CONFIG_ENV_WRITEABLE_LIST) if (rv == NULL) { printf("himport_r: can't insert \"%s=%s\" into hash table\n", name, value); diff --git a/lib/vsprintf.c b/lib/vsprintf.c index 8de3882fb6c..2d13e68b579 100644 --- a/lib/vsprintf.c +++ b/lib/vsprintf.c @@ -629,7 +629,7 @@ repeat: case 's': /* U-Boot uses UTF-16 strings in the EFI context only. */ -#if (CONFIG_IS_ENABLED(EFI_LOADER) || CONFIG_IS_ENABLED(EFI_APP)) && \ +#if (CONFIG_IS_ENABLED(EFI_LOADER) || IS_ENABLED(CONFIG_EFI_APP)) && \ !defined(API_BUILD) if (qualifier == 'l') { str = string16(str, end, va_arg(args, u16 *), diff --git a/net/bootp.c b/net/bootp.c index cae041988db..8b1a4ae2ef8 100644 --- a/net/bootp.c +++ b/net/bootp.c @@ -1078,7 +1078,7 @@ static void dhcp_handler(uchar *pkt, unsigned dest, struct in_addr sip, #endif /* CONFIG_SYS_BOOTFILE_PREFIX */ dhcp_packet_process_options(bp); if (CONFIG_IS_ENABLED(EFI_LOADER) && - CONFIG_IS_ENABLED(NETDEVICES)) + IS_ENABLED(CONFIG_NETDEVICES)) efi_net_set_dhcp_ack(pkt, len); #if defined(CONFIG_SERVERIP_FROM_PROXYDHCP) diff --git a/net/fastboot.c b/net/fastboot.c index 96bdf5486fa..e9569d88d2a 100644 --- a/net/fastboot.c +++ b/net/fastboot.c @@ -307,7 +307,7 @@ void fastboot_start_server(void) fastboot_our_port = CONFIG_UDP_FUNCTION_FASTBOOT_PORT; - if (CONFIG_IS_ENABLED(FASTBOOT_FLASH)) + if (IS_ENABLED(CONFIG_FASTBOOT_FLASH)) fastboot_set_progress_callback(fastboot_timed_send_info); net_set_udp_handler(fastboot_handler); diff --git a/test/dm/button.c b/test/dm/button.c index e76c1ad030a..3318668df25 100644 --- a/test/dm/button.c +++ b/test/dm/button.c @@ -13,6 +13,7 @@ #include <power/sandbox_pmic.h> #include <asm/gpio.h> #include <dm/test.h> +#include <dt-bindings/input/input.h> #include <test/ut.h> /* Base test of the button uclass */ @@ -85,6 +86,18 @@ static int dm_test_button_label(struct unit_test_state *uts) } DM_TEST(dm_test_button_label, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); +/* Test button has linux,code */ +static int dm_test_button_linux_code(struct unit_test_state *uts) +{ + struct udevice *dev; + + ut_assertok(uclass_get_device(UCLASS_BUTTON, 1, &dev)); + ut_asserteq(BTN_1, button_get_code(dev)); + + return 0; +} +DM_TEST(dm_test_button_linux_code, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); + /* Test adc-keys driver */ static int dm_test_button_keys_adc(struct unit_test_state *uts) { diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c index 8077affabb7..473a8cef578 100644 --- a/test/dm/ofnode.c +++ b/test/dm/ofnode.c @@ -1046,7 +1046,7 @@ static int dm_test_ofnode_for_each_prop(struct unit_test_state *uts) struct ofprop prop; int count; - node = ofnode_path("/buttons"); + node = ofnode_path("/ofnode-foreach"); count = 0; /* we expect "compatible" for each node */ |