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-rw-r--r--arch/arm/mach-mvebu/Kconfig10
-rw-r--r--arch/arm/mach-mvebu/Makefile5
-rw-r--r--arch/arm/mach-mvebu/kwbimage.cfg.in3
3 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index b1f2e97ae73..ac484c73f62 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -381,6 +381,16 @@ config MVEBU_SPL_NAND_BADBLK_LOCATION
Value 0x0 = SLC flash = BBI at page 0 or page 1
Value 0x1 = MLC flash = BBI at last page in the block
+config MVEBU_SPL_SATA_BLKSZ
+ int "SATA block size"
+ depends on MVEBU_SPL_BOOT_DEVICE_SATA
+ range 512 32768
+ default 512
+ help
+ Block size of the SATA disk in bytes.
+ Typically 512 bytes for majority of disks
+ and 4096 bytes for 4K Native disks.
+
config MVEBU_EFUSE
bool "Enable eFuse support"
depends on HAVE_MVEBU_EFUSE
diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
index 90f88337bc1..0584ed2be5b 100644
--- a/arch/arm/mach-mvebu/Makefile
+++ b/arch/arm/mach-mvebu/Makefile
@@ -73,6 +73,11 @@ KWB_CFG_NAND_BLKSZ = $(CONFIG_SYS_NAND_BLOCK_SIZE)
KWB_CFG_NAND_BADBLK_LOCATION = $(CONFIG_MVEBU_SPL_NAND_BADBLK_LOCATION)
endif
+ifneq ($(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA),)
+KWB_REPLACE += SATA_BLKSZ
+KWB_CFG_SATA_BLKSZ = $(CONFIG_MVEBU_SPL_SATA_BLKSZ)
+endif
+
ifneq ($(CONFIG_SECURED_MODE_IMAGE),)
KWB_REPLACE += CSK_INDEX
KWB_CFG_CSK_INDEX = $(CONFIG_SECURED_MODE_CSK_INDEX)
diff --git a/arch/arm/mach-mvebu/kwbimage.cfg.in b/arch/arm/mach-mvebu/kwbimage.cfg.in
index 90cf00c5b98..588c259202b 100644
--- a/arch/arm/mach-mvebu/kwbimage.cfg.in
+++ b/arch/arm/mach-mvebu/kwbimage.cfg.in
@@ -16,6 +16,9 @@ VERSION 1
#@NAND_BLKSZ
#@NAND_BADBLK_LOCATION
+# SATA configuration
+#@SATA_BLKSZ
+
# Enable BootROM output via DEBUG flag on SoCs which require it
#@DEBUG