diff options
180 files changed, 3528 insertions, 800 deletions
@@ -57,6 +57,21 @@ config LOCALVERSION_AUTO which is done within the script "scripts/setlocalversion".) +config CC_IS_GCC + def_bool $(success,$(CC) --version | head -n 1 | grep -q gcc) + +config GCC_VERSION + int + default $(shell,$(srctree)/scripts/gcc-version.sh -p $(CC) | sed 's/^0*//') if CC_IS_GCC + default 0 + +config CC_IS_CLANG + def_bool $(success,$(CC) --version | head -n 1 | grep -q clang) + +config CLANG_VERSION + int + default $(shell,$(srctree)/scripts/clang-version.sh $(CC)) + config CC_OPTIMIZE_FOR_SIZE bool "Optimize for size" default y diff --git a/MAINTAINERS b/MAINTAINERS index 79d356dd729..34ed880387d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -118,8 +118,8 @@ F: cmd/arm/ ARM ALTERA SOCFPGA M: Marek Vasut <marex@denx.de> M: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> -M: Ley Foon Tan <lftan.linux@gmail.com> -S: Maintainted +M: Tien Fong Chee <tien.fong.chee@intel.com> +S: Maintained T: git https://source.denx.de/u-boot/custodians/u-boot-socfpga.git F: arch/arm/mach-socfpga/ F: drivers/sysreset/sysreset_socfpga* @@ -12,10 +12,9 @@ NAME = # Comments in this file are targeted only to the developer, do not # expect to learn how to build the kernel reading this file. -# o Do not use make's built-in rules and variables -# (this increases performance and avoids hard-to-debug behaviour); -# o Look for make include files relative to root of kernel src -MAKEFLAGS += -rR --include-dir=$(CURDIR) +# Do not use make's built-in rules and variables +# (this increases performance and avoids hard-to-debug behaviour) +MAKEFLAGS += -rR # Determine target architecture for the sandbox include include/host_arch.h @@ -162,6 +161,13 @@ KBUILD_OUTPUT := $(shell mkdir -p $(KBUILD_OUTPUT) && cd $(KBUILD_OUTPUT) \ $(if $(KBUILD_OUTPUT),, \ $(error failed to create output directory "$(saved-output)")) +# Look for make include files relative to root of kernel src +# +# This does not become effective immediately because MAKEFLAGS is re-parsed +# once after the Makefile is read. It is OK since we are going to invoke +# 'sub-make' below. +MAKEFLAGS += --include-dir=$(CURDIR) + PHONY += $(MAKECMDGOALS) sub-make $(filter-out _all sub-make $(CURDIR)/Makefile, $(MAKECMDGOALS)) _all: sub-make @@ -492,8 +498,7 @@ PHONY += outputmakefile outputmakefile: ifneq ($(KBUILD_SRC),) $(Q)ln -fsn $(srctree) source - $(Q)$(CONFIG_SHELL) $(srctree)/scripts/mkmakefile \ - $(srctree) $(objtree) $(VERSION) $(PATCHLEVEL) + $(Q)$(CONFIG_SHELL) $(srctree)/scripts/mkmakefile $(srctree) endif # To make sure we do not include .config for any of the *config targets @@ -572,7 +577,7 @@ else # Carefully list dependencies so we do not try to build scripts twice # in parallel PHONY += scripts -scripts: scripts_basic include/config/auto.conf +scripts: scripts_basic scripts_dtc include/config/auto.conf $(Q)$(MAKE) $(build)=$(@) ifeq ($(dot-config),1) @@ -709,6 +714,9 @@ KBUILD_CFLAGS += $(call cc-option,-fno-stack-protector) endif KBUILD_CFLAGS += $(call cc-option,-fno-delete-null-pointer-checks) +# disable pointer signed / unsigned warnings in gcc 4.0 +KBUILD_CFLAGS += -Wno-pointer-sign + # disable stringop warnings in gcc 8+ KBUILD_CFLAGS += $(call cc-disable-warning, stringop-truncation) @@ -739,7 +747,7 @@ endif KBUILD_CFLAGS += $(call cc-option,-Wno-format-nonliteral) KBUILD_CFLAGS += $(call cc-disable-warning, address-of-packed-member) -ifeq ($(cc-name),clang) +ifdef CONFIG_CC_IS_CLANG KBUILD_CPPFLAGS += $(call cc-option,-Qunused-arguments,) KBUILD_CFLAGS += $(call cc-disable-warning, format-invalid-specifier) KBUILD_CFLAGS += $(call cc-disable-warning, gnu) @@ -751,12 +759,11 @@ KBUILD_CFLAGS += $(call cc-disable-warning, tautological-compare) # See modpost pattern 2 KBUILD_CFLAGS += $(call cc-option, -mno-global-merge,) KBUILD_CFLAGS += $(call cc-option, -fcatch-undefined-behavior) -else +endif # These warnings generated too much noise in a regular build. # Use make W=1 to enable them (see scripts/Makefile.extrawarn) KBUILD_CFLAGS += $(call cc-disable-warning, unused-but-set-variable) -endif # Prohibit date/time macros, which would make the build non-deterministic KBUILD_CFLAGS += $(call cc-option,-Werror=date-time) @@ -1864,6 +1871,8 @@ endif ifeq ($(CONFIG_USE_DEFAULT_ENV_FILE),y) prepare1: $(defaultenv_h) + +envtools: $(defaultenv_h) endif archprepare: prepare1 scripts_basic @@ -1947,6 +1956,35 @@ $(defaultenv_h): $(CONFIG_DEFAULT_ENV_FILE:"%"=%) FORCE $(call filechk,defaultenv.h) # --------------------------------------------------------------------------- +# Devicetree files + +ifneq ($(wildcard $(srctree)/arch/$(SRCARCH)/boot/dts/),) +dtstree := arch/$(SRCARCH)/boot/dts +endif + +ifneq ($(dtstree),) + +%.dtb: prepare3 scripts_dtc + $(Q)$(MAKE) $(build)=$(dtstree) $(dtstree)/$@ + +PHONY += dtbs dtbs_install +dtbs: prepare3 scripts_dtc + $(Q)$(MAKE) $(build)=$(dtstree) + +dtbs_install: + $(Q)$(MAKE) $(dtbinst)=$(dtstree) + +ifdef CONFIG_OF_EARLY_FLATTREE +all: dtbs +endif + +endif + +PHONY += scripts_dtc +scripts_dtc: scripts_basic + $(Q)$(MAKE) $(build)=scripts/dtc + +# --------------------------------------------------------------------------- quiet_cmd_cpp_lds = LDS $@ cmd_cpp_lds = $(CPP) -Wp,-MD,$(depfile) $(cpp_flags) $(LDPPFLAGS) \ -D__ASSEMBLY__ -x assembler-with-cpp -std=c99 -P -o $@ $< @@ -2208,9 +2246,6 @@ PHONY += $(DOC_TARGETS) $(DOC_TARGETS): scripts_basic FORCE $(Q)$(MAKE) $(build)=doc $@ -endif #ifeq ($(config-targets),1) -endif #ifeq ($(mixed-targets),1) - PHONY += checkstack ubootrelease ubootversion checkstack: @@ -2298,13 +2333,15 @@ quiet_cmd_rmfiles = $(if $(wildcard $(rm-files)),CLEAN $(wildcard $(rm-files)) # read all saved command lines -cmd_files := $(wildcard .*.cmd $(foreach f,$(sort $(targets)),$(dir $(f)).$(notdir $(f)).cmd)) +cmd_files := $(wildcard .*.cmd) ifneq ($(cmd_files),) $(cmd_files): ; # Do not try to update included dependency files include $(cmd_files) endif +endif #ifeq ($(config-targets),1) +endif #ifeq ($(mixed-targets),1) endif # skip-makefile PHONY += FORCE diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index db3891e3346..90e3004dbe7 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -254,6 +254,7 @@ dtb-$(CONFIG_ARCH_UNIPHIER_LD11) += \ uniphier-ld11-global.dtb \ uniphier-ld11-ref.dtb dtb-$(CONFIG_ARCH_UNIPHIER_LD20) += \ + uniphier-ld20-akebi96.dtb \ uniphier-ld20-global.dtb \ uniphier-ld20-ref.dtb dtb-$(CONFIG_ARCH_UNIPHIER_LD4) += \ @@ -612,7 +613,8 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \ sun8i-h3-orangepi-plus.dtb \ sun8i-h3-orangepi-plus2e.dtb \ sun8i-h3-orangepi-zero-plus2.dtb \ - sun8i-h3-rervision-dvk.dtb + sun8i-h3-rervision-dvk.dtb \ + sun8i-h3-zeropi.dtb dtb-$(CONFIG_MACH_SUN8I_R40) += \ sun8i-r40-bananapi-m2-ultra.dtb \ sun8i-v40-bananapi-m2-berry.dtb diff --git a/arch/arm/dts/stm32mp15-pinctrl.dtsi b/arch/arm/dts/stm32mp15-pinctrl.dtsi index 20a59e8f7a3..060baa8b7e9 100644 --- a/arch/arm/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/dts/stm32mp15-pinctrl.dtsi @@ -1273,6 +1273,18 @@ }; }; + sdmmc1_b4_init_pins_a: sdmmc1-b4-init-0 { + pins1 { + pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ + <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ + <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */ + <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */ + slew-rate = <1>; + drive-push-pull; + bias-disable; + }; + }; + sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 { pins { pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */ @@ -1299,6 +1311,17 @@ }; }; + sdmmc1_dir_init_pins_a: sdmmc1-dir-init-0 { + pins1 { + pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */ + <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */ + <STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */ + slew-rate = <1>; + drive-push-pull; + bias-pull-up; + }; + }; + sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 { pins { pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */ @@ -1868,10 +1891,15 @@ usart2_idle_pins_c: usart2-idle-2 { pins1 { pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */ - <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */ <STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */ }; pins2 { + pinmux = <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <3>; + }; + pins3 { pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */ bias-disable; }; @@ -1917,10 +1945,15 @@ usart3_idle_pins_b: usart3-idle-1 { pins1 { pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ - <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */ <STM32_PINMUX('I', 10, ANALOG)>; /* USART3_CTS_NSS */ }; pins2 { + pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins3 { pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */ bias-disable; }; @@ -1953,10 +1986,15 @@ usart3_idle_pins_c: usart3-idle-2 { pins1 { pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */ - <STM32_PINMUX('G', 8, ANALOG)>, /* USART3_RTS */ <STM32_PINMUX('B', 13, ANALOG)>; /* USART3_CTS_NSS */ }; pins2 { + pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins3 { pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */ bias-disable; }; @@ -2018,6 +2056,23 @@ }; }; + i2c6_pins_a: i2c6-0 { + pins { + pinmux = <STM32_PINMUX('Z', 6, AF2)>, /* I2C6_SCL */ + <STM32_PINMUX('Z', 7, AF2)>; /* I2C6_SDA */ + bias-disable; + drive-open-drain; + slew-rate = <0>; + }; + }; + + i2c6_sleep_pins_a: i2c6-sleep-0 { + pins { + pinmux = <STM32_PINMUX('Z', 6, ANALOG)>, /* I2C6_SCL */ + <STM32_PINMUX('Z', 7, ANALOG)>; /* I2C6_SDA */ + }; + }; + spi1_pins_a: spi1-0 { pins1 { pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */ diff --git a/arch/arm/dts/stm32mp151.dtsi b/arch/arm/dts/stm32mp151.dtsi index b564fc62693..177927d14ef 100644 --- a/arch/arm/dts/stm32mp151.dtsi +++ b/arch/arm/dts/stm32mp151.dtsi @@ -470,32 +470,36 @@ usart2: serial@4000e000 { compatible = "st,stm32h7-uart"; reg = <0x4000e000 0x400>; - interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; + interrupts-extended = <&exti 27 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc USART2_K>; + wakeup-source; status = "disabled"; }; usart3: serial@4000f000 { compatible = "st,stm32h7-uart"; reg = <0x4000f000 0x400>; - interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; + interrupts-extended = <&exti 28 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc USART3_K>; + wakeup-source; status = "disabled"; }; uart4: serial@40010000 { compatible = "st,stm32h7-uart"; reg = <0x40010000 0x400>; - interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; + interrupts-extended = <&exti 30 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc UART4_K>; + wakeup-source; status = "disabled"; }; uart5: serial@40011000 { compatible = "st,stm32h7-uart"; reg = <0x40011000 0x400>; - interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; + interrupts-extended = <&exti 31 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc UART5_K>; + wakeup-source; status = "disabled"; }; @@ -511,6 +515,7 @@ #size-cells = <0>; st,syscfg-fmp = <&syscfg 0x4 0x1>; wakeup-source; + i2c-analog-filter; status = "disabled"; }; @@ -526,6 +531,7 @@ #size-cells = <0>; st,syscfg-fmp = <&syscfg 0x4 0x2>; wakeup-source; + i2c-analog-filter; status = "disabled"; }; @@ -541,6 +547,7 @@ #size-cells = <0>; st,syscfg-fmp = <&syscfg 0x4 0x4>; wakeup-source; + i2c-analog-filter; status = "disabled"; }; @@ -556,6 +563,7 @@ #size-cells = <0>; st,syscfg-fmp = <&syscfg 0x4 0x10>; wakeup-source; + i2c-analog-filter; status = "disabled"; }; @@ -595,16 +603,18 @@ uart7: serial@40018000 { compatible = "st,stm32h7-uart"; reg = <0x40018000 0x400>; - interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; + interrupts-extended = <&exti 32 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc UART7_K>; + wakeup-source; status = "disabled"; }; uart8: serial@40019000 { compatible = "st,stm32h7-uart"; reg = <0x40019000 0x400>; - interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; + interrupts-extended = <&exti 33 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc UART8_K>; + wakeup-source; status = "disabled"; }; @@ -683,8 +693,9 @@ usart6: serial@44003000 { compatible = "st,stm32h7-uart"; reg = <0x44003000 0x400>; - interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + interrupts-extended = <&exti 29 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc USART6_K>; + wakeup-source; status = "disabled"; }; @@ -1065,7 +1076,7 @@ }; }; - sdmmc3: sdmmc@48004000 { + sdmmc3: mmc@48004000 { compatible = "arm,pl18x", "arm,primecell"; arm,primecell-periphid = <0x00253180>; reg = <0x48004000 0x400>; @@ -1398,7 +1409,7 @@ status = "disabled"; }; - sdmmc1: sdmmc@58005000 { + sdmmc1: mmc@58005000 { compatible = "arm,pl18x", "arm,primecell"; arm,primecell-periphid = <0x00253180>; reg = <0x58005000 0x1000>; @@ -1413,7 +1424,7 @@ status = "disabled"; }; - sdmmc2: sdmmc@58007000 { + sdmmc2: mmc@58007000 { compatible = "arm,pl18x", "arm,primecell"; arm,primecell-periphid = <0x00253180>; reg = <0x58007000 0x1000>; @@ -1451,11 +1462,13 @@ "mac-clk-tx", "mac-clk-rx", "eth-ck", + "ptp_ref", "ethstp"; clocks = <&rcc ETHMAC>, <&rcc ETHTX>, <&rcc ETHRX>, <&rcc ETHCK_K>, + <&rcc ETHPTP_K>, <&rcc ETHSTP>; st,syscon = <&syscfg 0x4>; snps,mixed-burst; @@ -1512,6 +1525,7 @@ usbphyc: usbphyc@5a006000 { #address-cells = <1>; #size-cells = <0>; + #clock-cells = <0>; compatible = "st,stm32mp1-usbphyc"; reg = <0x5a006000 0x1000>; clocks = <&rcc USBPHY_K>; @@ -1534,8 +1548,9 @@ usart1: serial@5c000000 { compatible = "st,stm32h7-uart"; reg = <0x5c000000 0x400>; - interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + interrupts-extended = <&exti 26 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc USART1_K>; + wakeup-source; status = "disabled"; }; @@ -1565,6 +1580,7 @@ #size-cells = <0>; st,syscfg-fmp = <&syscfg 0x4 0x8>; wakeup-source; + i2c-analog-filter; status = "disabled"; }; @@ -1605,6 +1621,7 @@ #size-cells = <0>; st,syscfg-fmp = <&syscfg 0x4 0x20>; wakeup-source; + i2c-analog-filter; status = "disabled"; }; diff --git a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi index 67876192900..7dcc96c19cf 100644 --- a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi @@ -10,7 +10,6 @@ / { aliases { i2c3 = &i2c4; - mmc0 = &sdmmc1; usb0 = &usbotg_hs; }; config { diff --git a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi index f3002e995bc..46a43371bdf 100644 --- a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi @@ -10,8 +10,6 @@ / { aliases { i2c3 = &i2c4; - mmc0 = &sdmmc1; - mmc1 = &sdmmc2; }; config { diff --git a/arch/arm/dts/sun50i-h5-bananapi-m2-plus-v1.2.dts b/arch/arm/dts/sun50i-h5-bananapi-m2-plus-v1.2.dts index 2e2b14c0ae7..8857a379159 100644 --- a/arch/arm/dts/sun50i-h5-bananapi-m2-plus-v1.2.dts +++ b/arch/arm/dts/sun50i-h5-bananapi-m2-plus-v1.2.dts @@ -3,6 +3,7 @@ /dts-v1/; #include "sun50i-h5.dtsi" +#include "sun50i-h5-cpu-opp.dtsi" #include <arm/sunxi-bananapi-m2-plus-v1.2.dtsi> / { diff --git a/arch/arm/dts/sun50i-h5-cpu-opp.dtsi b/arch/arm/dts/sun50i-h5-cpu-opp.dtsi new file mode 100644 index 00000000000..b2657201957 --- /dev/null +++ b/arch/arm/dts/sun50i-h5-cpu-opp.dtsi @@ -0,0 +1,79 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (C) 2020 Chen-Yu Tsai <wens@csie.org> + +/ { + cpu_opp_table: cpu-opp-table { + compatible = "operating-points-v2"; + opp-shared; + + opp-408000000 { + opp-hz = /bits/ 64 <408000000>; + opp-microvolt = <1000000 1000000 1310000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-648000000 { + opp-hz = /bits/ 64 <648000000>; + opp-microvolt = <1040000 1040000 1310000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-816000000 { + opp-hz = /bits/ 64 <816000000>; + opp-microvolt = <1080000 1080000 1310000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-912000000 { + opp-hz = /bits/ 64 <912000000>; + opp-microvolt = <1120000 1120000 1310000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-960000000 { + opp-hz = /bits/ 64 <960000000>; + opp-microvolt = <1160000 1160000 1310000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-1008000000 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <1200000 1200000 1310000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-1056000000 { + opp-hz = /bits/ 64 <1056000000>; + opp-microvolt = <1240000 1240000 1310000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-1104000000 { + opp-hz = /bits/ 64 <1104000000>; + opp-microvolt = <1260000 1260000 1310000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-1152000000 { + opp-hz = /bits/ 64 <1152000000>; + opp-microvolt = <1300000 1300000 1310000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + }; +}; + +&cpu0 { + operating-points-v2 = <&cpu_opp_table>; +}; + +&cpu1 { + operating-points-v2 = <&cpu_opp_table>; +}; + +&cpu2 { + operating-points-v2 = <&cpu_opp_table>; +}; + +&cpu3 { + operating-points-v2 = <&cpu_opp_table>; +}; diff --git a/arch/arm/dts/sun50i-h5-libretech-all-h3-cc.dts b/arch/arm/dts/sun50i-h5-libretech-all-h3-cc.dts index a91806618e6..016da3ec321 100644 --- a/arch/arm/dts/sun50i-h5-libretech-all-h3-cc.dts +++ b/arch/arm/dts/sun50i-h5-libretech-all-h3-cc.dts @@ -4,6 +4,7 @@ /dts-v1/; #include "sun50i-h5.dtsi" +#include "sun50i-h5-cpu-opp.dtsi" #include <sunxi-libretech-all-h3-cc.dtsi> / { diff --git a/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts b/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts index df1b9263ad0..6e30a564c87 100644 --- a/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts +++ b/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts @@ -36,7 +36,7 @@ pinctrl-0 = <&emac_rgmii_pins>; phy-supply = <®_gmac_3v3>; phy-handle = <&ext_rgmii_phy>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; /delete-property/ allwinner,leds-active-low; status = "okay"; }; diff --git a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts index 4f9ba53ffaa..4c3921ac236 100644 --- a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts +++ b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts @@ -25,13 +25,13 @@ leds { compatible = "gpio-leds"; - pwr { + led-0 { label = "nanopi:green:pwr"; gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; default-state = "on"; }; - status { + led-1 { label = "nanopi:red:status"; gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>; }; @@ -96,7 +96,7 @@ pinctrl-0 = <&emac_rgmii_pins>; phy-supply = <®_gmac_3v3>; phy-handle = <&ext_rgmii_phy>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; status = "okay"; }; diff --git a/arch/arm/dts/sun50i-h5-nanopi-neo2.dts b/arch/arm/dts/sun50i-h5-nanopi-neo2.dts index b059e20813b..02f8e72f0ca 100644 --- a/arch/arm/dts/sun50i-h5-nanopi-neo2.dts +++ b/arch/arm/dts/sun50i-h5-nanopi-neo2.dts @@ -22,13 +22,13 @@ leds { compatible = "gpio-leds"; - pwr { + led-0 { label = "nanopi:green:pwr"; gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; default-state = "on"; }; - status { + led-1 { label = "nanopi:blue:status"; gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; }; diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts index 70b5f099842..1010c1b22d2 100644 --- a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts +++ b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts @@ -42,13 +42,13 @@ leds { compatible = "gpio-leds"; - pwr { + led-0 { label = "orangepi:green:pwr"; gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; default-state = "on"; }; - status { + led-1 { label = "orangepi:red:status"; gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>; }; @@ -61,6 +61,7 @@ label = "sw4"; linux,code = <BTN_0>; gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; + wakeup-source; }; }; @@ -93,6 +94,10 @@ status = "okay"; }; +&cpu0 { + cpu-supply = <®_vdd_cpux>; +}; + &de { status = "okay"; }; @@ -118,7 +123,7 @@ pinctrl-0 = <&emac_rgmii_pins>; phy-supply = <®_gmac_3v3>; phy-handle = <&ext_rgmii_phy>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; status = "okay"; }; @@ -168,6 +173,22 @@ status = "okay"; }; +&r_i2c { + status = "okay"; + + reg_vdd_cpux: regulator@65 { + compatible = "silergy,sy8106a"; + reg = <0x65>; + regulator-name = "vdd-cpux"; + silergy,fixed-microvolt = <1100000>; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-ramp-delay = <200>; + regulator-boot-on; + regulator-always-on; + }; +}; + &spi0 { status = "okay"; diff --git a/arch/arm/dts/sun50i-h5-orangepi-prime.dts b/arch/arm/dts/sun50i-h5-orangepi-prime.dts index cb44bfa5981..74e0444af19 100644 --- a/arch/arm/dts/sun50i-h5-orangepi-prime.dts +++ b/arch/arm/dts/sun50i-h5-orangepi-prime.dts @@ -36,13 +36,13 @@ leds { compatible = "gpio-leds"; - pwr { + led-0 { label = "orangepi:green:pwr"; gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; default-state = "on"; }; - status { + led-1 { label = "orangepi:red:status"; gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>; }; @@ -124,7 +124,7 @@ pinctrl-0 = <&emac_rgmii_pins>; phy-supply = <®_gmac_3v3>; phy-handle = <&ext_rgmii_phy>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; status = "okay"; }; diff --git a/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts b/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts index ef5ca644422..d13980ed7a7 100644 --- a/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts +++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts @@ -33,13 +33,13 @@ leds { compatible = "gpio-leds"; - pwr { + led-0 { label = "orangepi:green:pwr"; gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */ default-state = "on"; }; - status { + led-1 { label = "orangepi:red:status"; gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */ }; diff --git a/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts b/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts index c95a6854130..22530ace12d 100644 --- a/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts +++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts @@ -30,6 +30,21 @@ }; }; + leds { + compatible = "gpio-leds"; + + led-0 { + label = "orangepi:green:pwr"; + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + + led-1 { + label = "orangepi:red:status"; + gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; + }; + }; + reg_vcc3v3: vcc3v3 { compatible = "regulator-fixed"; regulator-name = "vcc3v3"; @@ -48,6 +63,10 @@ status = "okay"; }; +&ehci0 { + status = "okay"; +}; + &hdmi { status = "okay"; }; @@ -92,6 +111,10 @@ status = "okay"; }; +&ohci0 { + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pa_pins>; @@ -103,3 +126,18 @@ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; status = "okay"; }; + +&usb_otg { + /* + * According to schematics CN1 MicroUSB port can be used to take + * external 5V to power up the board VBUS. On the contrary CN1 MicroUSB + * port cannot provide power externally even if the board is powered + * via GPIO pins. It thus makes sense to force peripheral mode. + */ + dr_mode = "peripheral"; + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; diff --git a/arch/arm/dts/sun50i-h5.dtsi b/arch/arm/dts/sun50i-h5.dtsi index 3a1c8b2efd6..ab860e20d08 100644 --- a/arch/arm/dts/sun50i-h5.dtsi +++ b/arch/arm/dts/sun50i-h5.dtsi @@ -3,6 +3,8 @@ #include <sunxi-h3-h5.dtsi> +#include <dt-bindings/thermal/thermal.h> + / { cpus { #address-cells = <1>; @@ -13,6 +15,9 @@ device_type = "cpu"; reg = <0>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; + clock-latency-ns = <244144>; /* 8 32k periods */ + #cooling-cells = <2>; }; cpu1: cpu@1 { @@ -20,6 +25,9 @@ device_type = "cpu"; reg = <1>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; + clock-latency-ns = <244144>; /* 8 32k periods */ + #cooling-cells = <2>; }; cpu2: cpu@2 { @@ -27,6 +35,9 @@ device_type = "cpu"; reg = <2>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; + clock-latency-ns = <244144>; /* 8 32k periods */ + #cooling-cells = <2>; }; cpu3: cpu@3 { @@ -34,12 +45,14 @@ device_type = "cpu"; reg = <3>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; + clock-latency-ns = <244144>; /* 8 32k periods */ + #cooling-cells = <2>; }; }; pmu { - compatible = "arm,cortex-a53-pmu", - "arm,armv8-pmuv3"; + compatible = "arm,cortex-a53-pmu"; interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, @@ -54,6 +67,7 @@ timer { compatible = "arm,armv8-timer"; + arm,no-tick-in-suspend; interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, <GIC_PPI 14 @@ -107,6 +121,19 @@ resets = <&ccu RST_BUS_CE>; }; + deinterlace: deinterlace@1e00000 { + compatible = "allwinner,sun8i-h3-deinterlace"; + reg = <0x01e00000 0x20000>; + clocks = <&ccu CLK_BUS_DEINTERLACE>, + <&ccu CLK_DEINTERLACE>, + <&ccu CLK_DRAM_DEINTERLACE>; + clock-names = "bus", "mod", "ram"; + resets = <&ccu RST_BUS_DEINTERLACE>; + interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; + interconnects = <&mbus 9>; + interconnect-names = "dma-mem"; + }; + mali: gpu@1e80000 { compatible = "allwinner,sun50i-h5-mali", "arm,mali-450"; reg = <0x01e80000 0x30000>; @@ -126,8 +153,7 @@ <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; + <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "gp", "gpmmu", "pp", @@ -138,8 +164,7 @@ "pp2", "ppmmu2", "pp3", - "ppmmu3", - "pmu"; + "ppmmu3"; clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>; clock-names = "bus", "core"; resets = <&ccu RST_BUS_GPU>; @@ -166,6 +191,30 @@ polling-delay-passive = <0>; polling-delay = <0>; thermal-sensors = <&ths 0>; + + trips { + cpu_hot_trip: cpu-hot { + temperature = <80000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_very_hot_trip: cpu-very-hot { + temperature = <100000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + cpu-hot-limit { + trip = <&cpu_hot_trip>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; gpu_thermal { diff --git a/arch/arm/dts/sun50i-h6-beelink-gs1.dts b/arch/arm/dts/sun50i-h6-beelink-gs1.dts index 7c9dbde645b..b5808047d6e 100644 --- a/arch/arm/dts/sun50i-h6-beelink-gs1.dts +++ b/arch/arm/dts/sun50i-h6-beelink-gs1.dts @@ -43,7 +43,7 @@ leds { compatible = "gpio-leds"; - power { + led { label = "beelink:white:power"; gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */ default-state = "on"; @@ -289,10 +289,6 @@ vcc-pm-supply = <®_aldo1>; }; -&rtc { - clocks = <&ext_osc32k>; -}; - &spdif { status = "okay"; }; diff --git a/arch/arm/dts/sun50i-h6-cpu-opp.dtsi b/arch/arm/dts/sun50i-h6-cpu-opp.dtsi index 1a5eddc5a40..8c6e8536b69 100644 --- a/arch/arm/dts/sun50i-h6-cpu-opp.dtsi +++ b/arch/arm/dts/sun50i-h6-cpu-opp.dtsi @@ -8,7 +8,7 @@ nvmem-cells = <&cpu_speed_grade>; opp-shared; - opp@480000000 { + opp-480000000 { clock-latency-ns = <244144>; /* 8 32k periods */ opp-hz = /bits/ 64 <480000000>; @@ -17,7 +17,7 @@ opp-microvolt-speed2 = <820000 820000 1200000>; }; - opp@720000000 { + opp-720000000 { clock-latency-ns = <244144>; /* 8 32k periods */ opp-hz = /bits/ 64 <720000000>; @@ -26,7 +26,7 @@ opp-microvolt-speed2 = <820000 820000 1200000>; }; - opp@816000000 { + opp-816000000 { clock-latency-ns = <244144>; /* 8 32k periods */ opp-hz = /bits/ 64 <816000000>; @@ -35,7 +35,7 @@ opp-microvolt-speed2 = <820000 820000 1200000>; }; - opp@888000000 { + opp-888000000 { clock-latency-ns = <244144>; /* 8 32k periods */ opp-hz = /bits/ 64 <888000000>; @@ -44,7 +44,7 @@ opp-microvolt-speed2 = <820000 820000 1200000>; }; - opp@1080000000 { + opp-1080000000 { clock-latency-ns = <244144>; /* 8 32k periods */ opp-hz = /bits/ 64 <1080000000>; @@ -53,7 +53,7 @@ opp-microvolt-speed2 = <880000 880000 1200000>; }; - opp@1320000000 { + opp-1320000000 { clock-latency-ns = <244144>; /* 8 32k periods */ opp-hz = /bits/ 64 <1320000000>; @@ -62,7 +62,7 @@ opp-microvolt-speed2 = <940000 940000 1200000>; }; - opp@1488000000 { + opp-1488000000 { clock-latency-ns = <244144>; /* 8 32k periods */ opp-hz = /bits/ 64 <1488000000>; @@ -71,7 +71,7 @@ opp-microvolt-speed2 = <1000000 1000000 1200000>; }; - opp@1608000000 { + opp-1608000000 { clock-latency-ns = <244144>; /* 8 32k periods */ opp-hz = /bits/ 64 <1608000000>; @@ -80,7 +80,7 @@ opp-microvolt-speed2 = <1030000 1030000 1200000>; }; - opp@1704000000 { + opp-1704000000 { clock-latency-ns = <244144>; /* 8 32k periods */ opp-hz = /bits/ 64 <1704000000>; @@ -89,7 +89,7 @@ opp-microvolt-speed2 = <1060000 1060000 1200000>; }; - opp@1800000000 { + opp-1800000000 { clock-latency-ns = <244144>; /* 8 32k periods */ opp-hz = /bits/ 64 <1800000000>; diff --git a/arch/arm/dts/sun50i-h6-orangepi-3.dts b/arch/arm/dts/sun50i-h6-orangepi-3.dts index 15c9dd8c447..7e83f6146f8 100644 --- a/arch/arm/dts/sun50i-h6-orangepi-3.dts +++ b/arch/arm/dts/sun50i-h6-orangepi-3.dts @@ -43,13 +43,13 @@ leds { compatible = "gpio-leds"; - power { + led-0 { label = "orangepi:red:power"; gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */ default-state = "on"; }; - status { + led-1 { label = "orangepi:green:status"; gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */ }; diff --git a/arch/arm/dts/sun50i-h6-orangepi.dtsi b/arch/arm/dts/sun50i-h6-orangepi.dtsi index ebc120a9232..da0875bd38d 100644 --- a/arch/arm/dts/sun50i-h6-orangepi.dtsi +++ b/arch/arm/dts/sun50i-h6-orangepi.dtsi @@ -42,13 +42,13 @@ leds { compatible = "gpio-leds"; - power { + led-0 { label = "orangepi:red:power"; gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */ default-state = "on"; }; - status { + led-1 { label = "orangepi:green:status"; gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */ }; diff --git a/arch/arm/dts/sun50i-h6-pine-h64.dts b/arch/arm/dts/sun50i-h6-pine-h64.dts index 961732c52aa..b868ad17af8 100644 --- a/arch/arm/dts/sun50i-h6-pine-h64.dts +++ b/arch/arm/dts/sun50i-h6-pine-h64.dts @@ -44,17 +44,17 @@ leds { compatible = "gpio-leds"; - heartbeat { + led-0 { label = "pine-h64:green:heartbeat"; gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */ }; - link { + led-1 { label = "pine-h64:white:link"; gpios = <&r_pio 0 3 GPIO_ACTIVE_HIGH>; /* PL3 */ }; - status { + led-2 { label = "pine-h64:blue:status"; gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */ }; @@ -142,6 +142,7 @@ vqmmc-supply = <®_bldo2>; non-removable; cap-mmc-hw-reset; + mmc-hs200-1_8v; bus-width = <8>; status = "okay"; }; diff --git a/arch/arm/dts/sun50i-h6.dtsi b/arch/arm/dts/sun50i-h6.dtsi index 8a62a9fbe34..af8b7d0ef75 100644 --- a/arch/arm/dts/sun50i-h6.dtsi +++ b/arch/arm/dts/sun50i-h6.dtsi @@ -436,6 +436,7 @@ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins>; + max-frequency = <150000000>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -452,6 +453,7 @@ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&mmc1_pins>; + max-frequency = <150000000>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -468,6 +470,7 @@ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&mmc2_pins>; + max-frequency = <150000000>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -680,6 +683,8 @@ <&ccu CLK_USB_OHCI0>; resets = <&ccu RST_BUS_OHCI0>, <&ccu RST_BUS_EHCI0>; + phys = <&usb2phy 0>; + phy-names = "usb"; status = "disabled"; }; @@ -690,6 +695,8 @@ clocks = <&ccu CLK_BUS_OHCI0>, <&ccu CLK_USB_OHCI0>; resets = <&ccu RST_BUS_OHCI0>; + phys = <&usb2phy 0>; + phy-names = "usb"; status = "disabled"; }; @@ -949,6 +956,11 @@ pins = "PL9"; function = "s_cir_rx"; }; + + r_rsb_pins: r-rsb-pins { + pins = "PL0", "PL1"; + function = "s_rsb"; + }; }; r_ir: ir@7040000 { @@ -979,6 +991,20 @@ #size-cells = <0>; }; + r_rsb: rsb@7083000 { + compatible = "allwinner,sun8i-a23-rsb"; + reg = <0x07083000 0x400>; + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&r_ccu CLK_R_APB2_RSB>; + clock-frequency = <3000000>; + resets = <&r_ccu RST_R_APB2_RSB>; + pinctrl-names = "default"; + pinctrl-0 = <&r_rsb_pins>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + ths: thermal-sensor@5070400 { compatible = "allwinner,sun50i-h6-ths"; reg = <0x05070400 0x100>; diff --git a/arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts b/arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts index d277d043031..f3f7a2c912a 100644 --- a/arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts +++ b/arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts @@ -31,7 +31,7 @@ pwr_led { label = "bananapi-m2-zero:red:pwr"; - gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */ + gpios = <&r_pio 0 10 GPIO_ACTIVE_LOW>; /* PL10 */ default-state = "on"; }; }; @@ -62,6 +62,35 @@ states = <1100000 0>, <1300000 1>; }; + reg_vcc_dram: vcc-dram { + compatible = "regulator-fixed"; + regulator-name = "vcc-dram"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + enable-active-high; + gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */ + vin-supply = <®_vcc5v0>; + }; + + reg_vcc1v2: vcc1v2 { + compatible = "regulator-fixed"; + regulator-name = "vcc1v2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + regulator-boot-on; + enable-active-high; + gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */ + vin-supply = <®_vcc5v0>; + }; + + poweroff { + compatible = "regulator-poweroff"; + cpu-supply = <®_vcc1v2>; + }; + wifi_pwrseq: wifi_pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ @@ -125,6 +154,7 @@ bluetooth { compatible = "brcm,bcm43438-bt"; + max-speed = <1500000>; clocks = <&rtc 1>; clock-names = "lpo"; vbat-supply = <®_vcc3v3>; @@ -136,6 +166,70 @@ }; +&pio { + gpio-line-names = + /* PA */ + "CON2-P13", "CON2-P11", "CON2-P22", "CON2-P15", + "CON3-P03", "CON3-P02", "CON2-P07", "CON2-P29", + "CON2-P31", "CON2-P33", "CON2-P35", "CON2-P05", + "CON2-P03", "CON2-P08", "CON2-P10", "CON2-P16", + "CON2-P12", "CON2-P37", "CON2-P28", "CON2-P27", + "CON2-P40", "CON2-P38", "", "", + "", "", "", "", "", "", "", "", + + /* PB */ + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + + /* PC */ + "CON2-P19", "CON2-P21", "CON2-P23", "CON2-P24", + "CON2-P18", "", "", "CON2-P26", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + + /* PD */ + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "CSI-PWR-EN", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + + /* PE */ + "CN3-P17", "CN3-P13", "CN3-P09", "CN3-P07", + "CN3-P19", "CN3-P21", "CN3-P22", "CN3-P20", + "CN3-P18", "CN3-P16", "CN3-P14", "CN3-P12", + "CN3-P05", "CN3-P03", "CN3-P06", "CN3-P08", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + + /* PF */ + "SDC0-D1", "SDC0-D0", "SDC0-CLK", "SDC0-CMD", "SDC0-D3", + "SDC0-D2", "SDC0-DET", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + + /* PG */ + "WL-SDIO-CLK", "WL-SDIO-CMD", "WL-SDIO-D0", "WL-SDIO-D1", + "WL-SDIO-D2", "WL-SDIO-D3", "BT-UART-TX", "BT-UART-RX", + "BT-UART-RTS", "BT-UART-CTS", "WL-WAKE-AP", "BT-WAKE-AP", + "BT-RST-N", "AP-WAKE-BT", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", ""; +}; + +&r_pio { + gpio-line-names = + /* PL */ + "", "CPUX-SET", "CON2-P32", "POWER-KEY", "CON2-P36", + "VCC-IO-EN", "USB0-ID", "WL-PWR-EN", + "PWR-STB", "PWR-DRAM", "PWR-LED", "IR-RX", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", ""; +}; + &usb_otg { dr_mode = "otg"; status = "okay"; diff --git a/arch/arm/dts/sun8i-h3-beelink-x2.dts b/arch/arm/dts/sun8i-h3-beelink-x2.dts index 45a24441ff1..62b5280ec09 100644 --- a/arch/arm/dts/sun8i-h3-beelink-x2.dts +++ b/arch/arm/dts/sun8i-h3-beelink-x2.dts @@ -75,13 +75,13 @@ leds { compatible = "gpio-leds"; - blue { + led-0 { label = "beelink-x2:blue:pwr"; gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */ default-state = "on"; }; - red { + led-1 { label = "beelink-x2:red:standby"; gpios = <&pio 0 15 GPIO_ACTIVE_HIGH>; /* PA15 */ }; diff --git a/arch/arm/dts/sun8i-h3-nanopi-duo2.dts b/arch/arm/dts/sun8i-h3-nanopi-duo2.dts index 6b149271ef1..8e7dfcffe1f 100644 --- a/arch/arm/dts/sun8i-h3-nanopi-duo2.dts +++ b/arch/arm/dts/sun8i-h3-nanopi-duo2.dts @@ -25,13 +25,13 @@ leds { compatible = "gpio-leds"; - pwr { + led-0 { label = "nanopi:red:pwr"; gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */ default-state = "on"; }; - status { + led-1 { label = "nanopi:green:status"; gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */ }; diff --git a/arch/arm/dts/sun8i-h3-nanopi-neo-air.dts b/arch/arm/dts/sun8i-h3-nanopi-neo-air.dts index 07867a0d569..be49eabbff9 100644 --- a/arch/arm/dts/sun8i-h3-nanopi-neo-air.dts +++ b/arch/arm/dts/sun8i-h3-nanopi-neo-air.dts @@ -61,13 +61,13 @@ leds { compatible = "gpio-leds"; - pwr { + led-0 { label = "nanopi:green:pwr"; gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */ default-state = "on"; }; - status { + led-1 { label = "nanopi:blue:status"; gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */ }; diff --git a/arch/arm/dts/sun8i-h3-nanopi.dtsi b/arch/arm/dts/sun8i-h3-nanopi.dtsi index 4df29a65316..c7c3e7d8b3c 100644 --- a/arch/arm/dts/sun8i-h3-nanopi.dtsi +++ b/arch/arm/dts/sun8i-h3-nanopi.dtsi @@ -60,13 +60,13 @@ leds { compatible = "gpio-leds"; - status { + led-0 { label = "nanopi:blue:status"; gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; }; - pwr { + led-1 { label = "nanopi:green:pwr"; gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; default-state = "on"; diff --git a/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts index 71fb7320893..babf4cf1b2f 100644 --- a/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts +++ b/arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts @@ -53,11 +53,6 @@ }; }; -&emac { - /* LEDs changed to active high on the plus */ - /delete-property/ allwinner,leds-active-low; -}; - &mmc1 { vmmc-supply = <®_vcc3v3>; bus-width = <4>; diff --git a/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts b/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts index 6dbf7b2e0c1..b6ca45d18e5 100644 --- a/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts +++ b/arch/arm/dts/sun8i-h3-orangepi-plus2e.dts @@ -67,7 +67,7 @@ pinctrl-0 = <&emac_rgmii_pins>; phy-supply = <®_gmac_3v3>; phy-handle = <&ext_rgmii_phy>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; status = "okay"; }; diff --git a/arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts b/arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts index b8f46e2802f..561ea1d2f86 100644 --- a/arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts +++ b/arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts @@ -70,6 +70,21 @@ }; }; + leds { + compatible = "gpio-leds"; + + led-0 { + label = "orangepi:green:pwr"; + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + + led-1 { + label = "orangepi:red:status"; + gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; + }; + }; + reg_vcc3v3: vcc3v3 { compatible = "regulator-fixed"; regulator-name = "vcc3v3"; @@ -88,6 +103,10 @@ status = "okay"; }; +&ehci0 { + status = "okay"; +}; + &hdmi { status = "okay"; }; @@ -132,8 +151,27 @@ status = "okay"; }; +&ohci0 { + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pa_pins>; status = "okay"; }; + +&usb_otg { + /* + * According to schematics CN1 MicroUSB port can be used to take + * external 5V to power up the board VBUS. On the contrary CN1 MicroUSB + * port cannot provide power externally even if the board is powered + * via GPIO pins. It thus makes sense to force peripheral mode. + */ + dr_mode = "peripheral"; + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; diff --git a/arch/arm/dts/sun8i-h3-zeropi.dts b/arch/arm/dts/sun8i-h3-zeropi.dts new file mode 100644 index 00000000000..7d3e7323b66 --- /dev/null +++ b/arch/arm/dts/sun8i-h3-zeropi.dts @@ -0,0 +1,85 @@ +/* + * Copyright (C) 2020 Yu-Tung Chang <mtwget@gmail.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "sun8i-h3-nanopi.dtsi" + +/ { + model = "FriendlyARM ZeroPi"; + compatible = "friendlyarm,zeropi", "allwinner,sun8i-h3"; + + aliases { + ethernet0 = &emac; + }; + + reg_gmac_3v3: gmac-3v3 { + compatible = "regulator-fixed"; + regulator-name = "gmac-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <100000>; + enable-active-high; + gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */ + }; +}; + +&external_mdio { + ext_rgmii_phy: ethernet-phy@7 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <7>; + }; +}; + +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&emac_rgmii_pins>; + phy-supply = <®_gmac_3v3>; + phy-handle = <&ext_rgmii_phy>; + phy-mode = "rgmii-id"; + + allwinner,leds-active-low; + status = "okay"; +}; + +&usb_otg { + status = "okay"; + dr_mode = "host"; +}; diff --git a/arch/arm/dts/sun8i-h3.dtsi b/arch/arm/dts/sun8i-h3.dtsi index 20217e2ca4d..4e89701df91 100644 --- a/arch/arm/dts/sun8i-h3.dtsi +++ b/arch/arm/dts/sun8i-h3.dtsi @@ -41,6 +41,7 @@ */ #include "sunxi-h3-h5.dtsi" +#include <dt-bindings/thermal/thermal.h> / { cpu0_opp_table: opp_table0 { @@ -111,6 +112,26 @@ }; }; + gpu_opp_table: gpu-opp-table { + compatible = "operating-points-v2"; + + opp-120000000 { + opp-hz = /bits/ 64 <120000000>; + }; + + opp-312000000 { + opp-hz = /bits/ 64 <312000000>; + }; + + opp-432000000 { + opp-hz = /bits/ 64 <432000000>; + }; + + opp-576000000 { + opp-hz = /bits/ 64 <576000000>; + }; + }; + pmu { compatible = "arm,cortex-a7-pmu"; interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, @@ -204,9 +225,7 @@ clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>; clock-names = "bus", "core"; resets = <&ccu RST_BUS_GPU>; - - assigned-clocks = <&ccu CLK_GPU>; - assigned-clock-rates = <384000000>; + operating-points-v2 = <&gpu_opp_table>; }; ths: thermal-sensor@1c25000 { @@ -227,6 +246,30 @@ polling-delay-passive = <0>; polling-delay = <0>; thermal-sensors = <&ths 0>; + + trips { + cpu_hot_trip: cpu-hot { + temperature = <80000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_very_hot_trip: cpu-very-hot { + temperature = <100000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + cpu-hot-limit { + trip = <&cpu_hot_trip>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; }; }; }; diff --git a/arch/arm/dts/sunxi-h3-h5.dtsi b/arch/arm/dts/sunxi-h3-h5.dtsi index 5e9c3060aa0..9be13378d4d 100644 --- a/arch/arm/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/dts/sunxi-h3-h5.dtsi @@ -114,7 +114,7 @@ display_clocks: clock@1000000 { /* compatible is in per SoC .dtsi file */ - reg = <0x01000000 0x100000>; + reg = <0x01000000 0x10000>; clocks = <&ccu CLK_BUS_DE>, <&ccu CLK_DE>; clock-names = "bus", @@ -239,6 +239,16 @@ }; }; + msgbox: mailbox@1c17000 { + compatible = "allwinner,sun8i-h3-msgbox", + "allwinner,sun6i-a31-msgbox"; + reg = <0x01c17000 0x1000>; + clocks = <&ccu CLK_BUS_MSGBOX>; + resets = <&ccu RST_BUS_MSGBOX>; + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; + #mbox-cells = <1>; + }; + usb_otg: usb@1c19000 { compatible = "allwinner,sun8i-h3-musb"; reg = <0x01c19000 0x400>; @@ -560,6 +570,8 @@ compatible = "allwinner,sun8i-h3-mbus"; reg = <0x01c62000 0x1000>; clocks = <&ccu CLK_MBUS>; + #address-cells = <1>; + #size-cells = <1>; dma-ranges = <0x00000000 0x40000000 0xc0000000>; #interconnect-cells = <1>; }; @@ -650,6 +662,19 @@ status = "disabled"; }; + i2s2: i2s@1c22800 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun8i-h3-i2s"; + reg = <0x01c22800 0x400>; + interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_I2S2>, <&ccu CLK_I2S2>; + clock-names = "apb", "mod"; + dmas = <&dma 27>; + resets = <&ccu RST_BUS_I2S2>; + dma-names = "tx"; + status = "disabled"; + }; + codec: codec@1c22c00 { #sound-dai-cells = <0>; compatible = "allwinner,sun8i-h3-codec"; @@ -892,6 +917,21 @@ pins = "PL0", "PL1"; function = "s_i2c"; }; + + r_pwm_pin: r-pwm-pin { + pins = "PL10"; + function = "s_pwm"; + }; + }; + + r_pwm: pwm@1f03800 { + compatible = "allwinner,sun8i-h3-pwm"; + reg = <0x01f03800 0x8>; + pinctrl-names = "default"; + pinctrl-0 = <&r_pwm_pin>; + clocks = <&osc24M>; + #pwm-cells = <3>; + status = "disabled"; }; }; }; diff --git a/arch/arm/dts/uniphier-ld20-akebi96.dts b/arch/arm/dts/uniphier-ld20-akebi96.dts new file mode 100644 index 00000000000..aa159a11292 --- /dev/null +++ b/arch/arm/dts/uniphier-ld20-akebi96.dts @@ -0,0 +1,189 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +// +// Device Tree Source for Akebi96 Development Board +// +// Derived from uniphier-ld20-global.dts. +// +// Copyright (C) 2015-2017 Socionext Inc. +// Copyright (C) 2019-2020 Linaro Ltd. + +/dts-v1/; +#include <dt-bindings/gpio/uniphier-gpio.h> +#include "uniphier-ld20.dtsi" + +/ { + model = "Akebi96"; + compatible = "socionext,uniphier-ld20-akebi96", + "socionext,uniphier-ld20"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; + serial3 = &serial3; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; + spi0 = &spi0; + spi1 = &spi1; + spi2 = &spi2; + spi3 = &spi3; + ethernet0 = ð + }; + + memory@80000000 { + device_type = "memory"; + reg = <0 0x80000000 0 0xc0000000>; + }; + + framebuffer@c0000000 { + compatible = "simple-framebuffer"; + reg = <0 0xc0000000 0 0x02000000>; + width = <1920>; + height = <1080>; + stride = <7680>; + format = "a8r8g8b8"; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + memory@c0000000 { + reg = <0 0xc0000000 0 0x02000000>; + no-map; + }; + }; + + sound { + compatible = "audio-graph-card"; + label = "UniPhier LD20"; + dais = <&spdif_port0 + &comp_spdif_port0>; + }; + + spdif-out { + compatible = "linux,spdif-dit"; + #sound-dai-cells = <0>; + + port@0 { + spdif_tx: endpoint { + remote-endpoint = <&spdif_hiecout1>; + }; + }; + }; + + comp-spdif-out { + compatible = "linux,spdif-dit"; + #sound-dai-cells = <0>; + + port@0 { + comp_spdif_tx: endpoint { + remote-endpoint = <&comp_spdif_hiecout1>; + }; + }; + }; + + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; +}; + +&spi3 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + usb-over-spi@0 { + compatible = "maxim,max3421-udc"; + reg = <0>; + spi-max-frequency = <12500000>; + interrupt-parent = <&gpio>; + interrupt-names = "udc"; + interrupts = <0 2>; + }; +}; + +&serial0 { + /* Onboard USB-UART */ + status = "okay"; +}; + +&serial2 { + /* LS connector UART1 */ + status = "okay"; +}; + +&serial3 { + /* LS connector UART0 */ + status = "okay"; +}; + +&spdif_hiecout1 { + remote-endpoint = <&spdif_tx>; +}; + +&comp_spdif_hiecout1 { + remote-endpoint = <&comp_spdif_tx>; +}; + +&i2c0 { + /* LS connector I2C0 */ + status = "okay"; +}; + +&i2c1 { + /* LS connector I2C1 */ + status = "okay"; +}; + +ð { + status = "okay"; + phy-handle = <ðphy>; +}; + +&mdio { + ethphy: ethernet-phy@0 { + reg = <0>; + }; +}; + +&usb { + status = "okay"; +}; + +&pcie { + status = "okay"; +}; + +&gpio { + /* IRQs for Max3421 */ + xirq0 { + gpio-hog; + gpios = <UNIPHIER_GPIO_IRQ(0) 1>; + input; + }; + xirq10 { + gpio-hog; + gpios = <UNIPHIER_GPIO_IRQ(10) 1>; + input; + }; +}; + +&pinctrl_aout1 { + groups = "aout1b"; +}; + +&pinctrl_uart3 { + groups = "uart3", "uart3_ctsrts"; +}; diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h b/arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h index 62abfc4ef6b..37df4410eaa 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h @@ -233,14 +233,14 @@ struct sunxi_ccm_reg { #define CCM_PLL1_OUT_EN BIT(27) #define CCM_PLL1_CLOCK_TIME_2 (2 << 24) #define CCM_PLL1_CTRL_P(p) ((p) << 16) -#define CCM_PLL1_CTRL_N(n) ((n) << 8) +#define CCM_PLL1_CTRL_N(n) (((n) - 1) << 8) /* pll5 bit field */ #define CCM_PLL5_CTRL_EN BIT(31) #define CCM_PLL5_LOCK_EN BIT(29) #define CCM_PLL5_LOCK BIT(28) #define CCM_PLL5_OUT_EN BIT(27) -#define CCM_PLL5_CTRL_N(n) ((n) << 8) +#define CCM_PLL5_CTRL_N(n) (((n) - 1) << 8) #define CCM_PLL5_CTRL_DIV1(div1) ((div1) << 0) #define CCM_PLL5_CTRL_DIV2(div0) ((div0) << 1) @@ -326,7 +326,7 @@ struct sunxi_ccm_reg { #define CCM_MMC_CTRL_M(x) ((x) - 1) #define CCM_MMC_CTRL_N(x) ((x) << 8) #define CCM_MMC_CTRL_OSCM24 (0x0 << 24) -#define CCM_MMC_CTRL_PLL6X2 (0x1 << 24) +#define CCM_MMC_CTRL_PLL6 (0x1 << 24) #define CCM_MMC_CTRL_PLL_PERIPH2X2 (0x2 << 24) #define CCM_MMC_CTRL_ENABLE (0x1 << 31) /* H6 doesn't have these delays */ diff --git a/arch/arm/include/asm/arch-sunxi/mmc.h b/arch/arm/include/asm/arch-sunxi/mmc.h index 340e25b04d2..5daacf10eb1 100644 --- a/arch/arm/include/asm/arch-sunxi/mmc.h +++ b/arch/arm/include/asm/arch-sunxi/mmc.h @@ -119,6 +119,7 @@ struct sunxi_mmc { #define SUNXI_MMC_STATUS_CARD_PRESENT (0x1 << 8) #define SUNXI_MMC_STATUS_CARD_DATA_BUSY (0x1 << 9) #define SUNXI_MMC_STATUS_DATA_FSM_BUSY (0x1 << 10) +#define SUNXI_MMC_STATUS_FIFO_LEVEL(reg) (((reg) >> 17) & 0x3fff) #define SUNXI_MMC_NTSR_MODE_SEL_NEW (0x1 << 31) diff --git a/arch/arm/mach-mvebu/armada3700/cpu.c b/arch/arm/mach-mvebu/armada3700/cpu.c index 9aec0ce9a43..7702028ba19 100644 --- a/arch/arm/mach-mvebu/armada3700/cpu.c +++ b/arch/arm/mach-mvebu/armada3700/cpu.c @@ -331,6 +331,10 @@ int a3700_fdt_fix_pcie_regions(void *blob) /* Calculate fixup offset from first child address (in last cell) */ fix_offset = base - fdt32_to_cpu(ranges[2]); + /* If fixup offset is zero then there is nothing to fix */ + if (!fix_offset) + return 0; + /* * Fix address (last cell) of each child address and each parent * address diff --git a/arch/arm/mach-snapdragon/pinctrl-apq8016.c b/arch/arm/mach-snapdragon/pinctrl-apq8016.c index 1042b564c37..70c0be0bca9 100644 --- a/arch/arm/mach-snapdragon/pinctrl-apq8016.c +++ b/arch/arm/mach-snapdragon/pinctrl-apq8016.c @@ -10,7 +10,7 @@ #include <common.h> #define MAX_PIN_NAME_LEN 32 -static char pin_name[MAX_PIN_NAME_LEN]; +static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); static const char * const msm_pinctrl_pins[] = { "SDC1_CLK", "SDC1_CMD", @@ -59,4 +59,3 @@ struct msm_pinctrl_data apq8016_data = { .get_function_mux = apq8016_get_function_mux, .get_pin_name = apq8016_get_pin_name, }; - diff --git a/arch/arm/mach-snapdragon/pinctrl-apq8096.c b/arch/arm/mach-snapdragon/pinctrl-apq8096.c index 20a71c319b3..45462f01c2c 100644 --- a/arch/arm/mach-snapdragon/pinctrl-apq8096.c +++ b/arch/arm/mach-snapdragon/pinctrl-apq8096.c @@ -10,7 +10,7 @@ #include <common.h> #define MAX_PIN_NAME_LEN 32 -static char pin_name[MAX_PIN_NAME_LEN]; +static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); static const char * const msm_pinctrl_pins[] = { "SDC1_CLK", "SDC1_CMD", diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index 7c25266f33e..0e599316795 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -174,10 +174,12 @@ config STM32_ETZPC config CMD_STM32KEY bool "command stm32key to fuse public key hash" - default y + default n help fuse public key hash in corresponding fuse used to authenticate binary. + This command is used to evaluate the secure boot on stm32mp SOC, + it is deactivated by default in real products. config PRE_CON_BUF_ADDR default 0xC02FF000 diff --git a/arch/arm/mach-stm32mp/cmd_stm32key.c b/arch/arm/mach-stm32mp/cmd_stm32key.c index 42fdc112388..50840b0f38b 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32key.c +++ b/arch/arm/mach-stm32mp/cmd_stm32key.c @@ -11,13 +11,30 @@ #include <dm/device.h> #include <dm/uclass.h> -#define STM32_OTP_HASH_KEY_START 24 -#define STM32_OTP_HASH_KEY_SIZE 8 +/* Closed device : bit 6 of OPT0*/ +#define STM32_OTP_CLOSE_ID 0 +#define STM32_OTP_CLOSE_MASK BIT(6) + +/* HASH of key: 8 OTPs, starting with OTP24) */ +#define STM32_OTP_HASH_KEY_START 24 +#define STM32_OTP_HASH_KEY_SIZE 8 + +static int get_misc_dev(struct udevice **dev) +{ + int ret; + + ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(stm32mp_bsec), dev); + if (ret) + log_err("Can't find stm32mp_bsec driver\n"); + + return ret; +} static void read_hash_value(u32 addr) { int i; + printf("Read KEY at 0x%x\n", addr); for (i = 0; i < STM32_OTP_HASH_KEY_SIZE; i++) { printf("OTP value %i: %x\n", STM32_OTP_HASH_KEY_START + i, __be32_to_cpu(*(u32 *)addr)); @@ -25,32 +42,101 @@ static void read_hash_value(u32 addr) } } -static void fuse_hash_value(u32 addr, bool print) +static int read_hash_otp(bool print, bool *locked, bool *closed) { struct udevice *dev; - u32 word, val; - int i, ret; + int i, word, ret; + int nb_invalid = 0, nb_zero = 0, nb_lock = 0; + u32 val, lock; + bool status; - ret = uclass_get_device_by_driver(UCLASS_MISC, - DM_DRIVER_GET(stm32mp_bsec), - &dev); - if (ret) { - log_err("Can't find stm32mp_bsec driver\n"); - return; + ret = get_misc_dev(&dev); + if (ret) + return ret; + + for (i = 0, word = STM32_OTP_HASH_KEY_START; i < STM32_OTP_HASH_KEY_SIZE; i++, word++) { + ret = misc_read(dev, STM32_BSEC_OTP(word), &val, 4); + if (ret != 4) + val = ~0x0; + ret = misc_read(dev, STM32_BSEC_LOCK(word), &lock, 4); + if (ret != 4) + lock = -1; + if (print) + printf("OTP HASH %i: %x lock : %d\n", word, val, lock); + if (val == ~0x0) + nb_invalid++; + else if (val == 0x0) + nb_zero++; + if (lock == 1) + nb_lock++; } - for (i = 0; i < STM32_OTP_HASH_KEY_SIZE; i++) { + word = STM32_OTP_CLOSE_ID; + ret = misc_read(dev, STM32_BSEC_OTP(word), &val, 4); + if (ret != 4) + val = 0x0; + ret = misc_read(dev, STM32_BSEC_LOCK(word), &lock, 4); + if (ret != 4) + lock = -1; + + status = (val & STM32_OTP_CLOSE_MASK) == STM32_OTP_CLOSE_MASK; + if (closed) + *closed = status; + if (print) + printf("OTP %d: closed status: %d lock : %d\n", word, status, lock); + + status = (nb_lock == STM32_OTP_HASH_KEY_SIZE); + if (locked) + *locked = status; + if (!status && print) + printf("Hash of key is not locked!\n"); + + if (nb_invalid == STM32_OTP_HASH_KEY_SIZE) { if (print) - printf("Fuse OTP %i : %x\n", - STM32_OTP_HASH_KEY_START + i, - __be32_to_cpu(*(u32 *)addr)); + printf("Hash of key is invalid!\n"); + return -EINVAL; + } + if (nb_zero == STM32_OTP_HASH_KEY_SIZE) { + if (print) + printf("Hash of key is free!\n"); + return -ENOENT; + } + + return 0; +} - word = STM32_OTP_HASH_KEY_START + i; +static int fuse_hash_value(u32 addr, bool print) +{ + struct udevice *dev; + u32 word, val; + int i, ret; + + ret = get_misc_dev(&dev); + if (ret) + return ret; + + for (i = 0, word = STM32_OTP_HASH_KEY_START; + i < STM32_OTP_HASH_KEY_SIZE; + i++, word++, addr += 4) { val = __be32_to_cpu(*(u32 *)addr); - misc_write(dev, STM32_BSEC_OTP(word), &val, 4); + if (print) + printf("Fuse OTP %i : %x\n", word, val); - addr += 4; + ret = misc_write(dev, STM32_BSEC_OTP(word), &val, 4); + if (ret != 4) { + log_err("Fuse OTP %i failed\n", word); + return ret; + } + /* on success, lock the OTP for HASH key */ + val = 1; + ret = misc_write(dev, STM32_BSEC_LOCK(word), &val, 4); + if (ret != 4) { + log_err("Lock OTP %i failed\n", word); + return ret; + } } + + return 0; } static int confirm_prog(void) @@ -67,36 +153,117 @@ static int confirm_prog(void) return 0; } -static int do_stm32key(struct cmd_tbl *cmdtp, int flag, int argc, - char *const argv[]) +static int do_stm32key_read(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { u32 addr; - const char *op = argc >= 2 ? argv[1] : NULL; - int confirmed = argc > 3 && !strcmp(argv[2], "-y"); - argc -= 2 + confirmed; - argv += 2 + confirmed; + if (argc == 1) { + read_hash_otp(true, NULL, NULL); + return CMD_RET_SUCCESS; + } + + addr = simple_strtoul(argv[1], NULL, 16); + if (!addr) + return CMD_RET_USAGE; + + read_hash_value(addr); + + return CMD_RET_SUCCESS; +} + +static int do_stm32key_fuse(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) +{ + u32 addr; + bool yes = false, lock, closed; - if (argc < 1) + if (argc < 2) return CMD_RET_USAGE; - addr = simple_strtoul(argv[0], NULL, 16); + if (argc == 3) { + if (strcmp(argv[1], "-y")) + return CMD_RET_USAGE; + yes = true; + } + + addr = simple_strtoul(argv[argc - 1], NULL, 16); if (!addr) return CMD_RET_USAGE; - if (!strcmp(op, "read")) - read_hash_value(addr); + if (read_hash_otp(!yes, &lock, &closed) != -ENOENT) { + printf("Error: can't fuse again the OTP\n"); + return CMD_RET_FAILURE; + } - if (!strcmp(op, "fuse")) { - if (!confirmed && !confirm_prog()) - return CMD_RET_FAILURE; - fuse_hash_value(addr, !confirmed); + if (lock || closed) { + printf("Error: invalid OTP configuration (lock=%d, closed=%d)\n", lock, closed); + return CMD_RET_FAILURE; } + if (!yes && !confirm_prog()) + return CMD_RET_FAILURE; + + if (fuse_hash_value(addr, !yes)) + return CMD_RET_FAILURE; + + printf("Hash key updated !\n"); + return CMD_RET_SUCCESS; } -U_BOOT_CMD(stm32key, 4, 1, do_stm32key, - "Fuse ST Hash key", - "read <addr>: Read the hash store at addr in memory\n" - "stm32key fuse [-y] <addr> : Fuse hash store at addr in otp\n"); +static int do_stm32key_close(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) +{ + bool yes, lock, closed; + struct udevice *dev; + u32 val; + int ret; + + yes = false; + if (argc == 2) { + if (strcmp(argv[1], "-y")) + return CMD_RET_USAGE; + yes = true; + } + + ret = read_hash_otp(!yes, &lock, &closed); + if (ret) { + if (ret == -ENOENT) + printf("Error: OTP not programmed!\n"); + return CMD_RET_FAILURE; + } + + if (closed) { + printf("Error: already closed!\n"); + return CMD_RET_FAILURE; + } + + if (!lock) + printf("Warning: OTP not locked!\n"); + + if (!yes && !confirm_prog()) + return CMD_RET_FAILURE; + + ret = get_misc_dev(&dev); + if (ret) + return CMD_RET_FAILURE; + + val = STM32_OTP_CLOSE_MASK; + ret = misc_write(dev, STM32_BSEC_OTP(STM32_OTP_CLOSE_ID), &val, 4); + if (ret != 4) { + printf("Error: can't update OTP\n"); + return CMD_RET_FAILURE; + } + + printf("Device is closed !\n"); + + return CMD_RET_SUCCESS; +} + +static char stm32key_help_text[] = + "read [<addr>]: Read the hash stored at addr in memory or in OTP\n" + "stm32key fuse [-y] <addr> : Fuse hash stored at addr in OTP\n" + "stm32key close [-y] : Close the device, the hash stored in OTP\n"; + +U_BOOT_CMD_WITH_SUBCMDS(stm32key, "Fuse ST Hash key", stm32key_help_text, + U_BOOT_SUBCMD_MKENT(read, 2, 0, do_stm32key_read), + U_BOOT_SUBCMD_MKENT(fuse, 3, 0, do_stm32key_fuse), + U_BOOT_SUBCMD_MKENT(close, 2, 0, do_stm32key_close)); diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c index feff73c79ef..064f51b2c7f 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c @@ -177,12 +177,12 @@ cleanup: } U_BOOT_CMD(stm32prog, 5, 0, do_stm32prog, + "start communication with tools STM32Cubeprogrammer", "<link> <dev> [<addr>] [<size>]\n" - "start communication with tools STM32Cubeprogrammer on <link> with Flashlayout at <addr>", - "<link> = serial|usb\n" - "<dev> = device instance\n" - "<addr> = address of flashlayout\n" - "<size> = size of flashlayout\n" + " <link> = serial|usb\n" + " <dev> = device instance\n" + " <addr> = address of flashlayout\n" + " <size> = size of flashlayout (optional for image with STM32 header)\n" ); bool stm32prog_get_tee_partitions(void) diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c index f7c93a1298d..96ebc6d9783 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c @@ -1199,13 +1199,13 @@ static int dfu_init_entities(struct stm32prog_data *data) } if (!ret) - ret = stm32prog_alt_add_virt(dfu, "virtual", PHASE_CMD, 512); + ret = stm32prog_alt_add_virt(dfu, "virtual", PHASE_CMD, CMD_SIZE); if (!ret) - ret = stm32prog_alt_add_virt(dfu, "OTP", PHASE_OTP, 512); + ret = stm32prog_alt_add_virt(dfu, "OTP", PHASE_OTP, OTP_SIZE); if (!ret && CONFIG_IS_ENABLED(DM_PMIC)) - ret = stm32prog_alt_add_virt(dfu, "PMIC", PHASE_PMIC, 8); + ret = stm32prog_alt_add_virt(dfu, "PMIC", PHASE_PMIC, PMIC_SIZE); if (ret) stm32prog_err("dfu init failed: %d", ret); diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h index efb51a3022b..9d58cf0e2da 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h @@ -19,6 +19,7 @@ #define DEFAULT_ADDRESS 0xFFFFFFFF +#define CMD_SIZE 512 #define OTP_SIZE 1024 #define PMIC_SIZE 8 diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_usb.c b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_usb.c index d4a3f7ea16f..e8acc302f9e 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_usb.c +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_usb.c @@ -178,7 +178,7 @@ int stm32prog_get_medium_size_virt(struct dfu_entity *dfu, u64 *size) switch (dfu->data.virt.dev_num) { case PHASE_CMD: - *size = 512; + *size = CMD_SIZE; break; case PHASE_OTP: *size = OTP_SIZE; diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index 592bfd413df..f6ed2ce0e4d 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -483,6 +483,11 @@ static void setup_boot_mode(void) STM32_UART7_BASE, STM32_UART8_BASE }; + const u32 sdmmc_addr[] = { + STM32_SDMMC1_BASE, + STM32_SDMMC2_BASE, + STM32_SDMMC3_BASE + }; char cmd[60]; u32 boot_ctx = readl(TAMP_BOOT_CONTEXT); u32 boot_mode = @@ -525,7 +530,16 @@ static void setup_boot_mode(void) break; case BOOT_FLASH_SD: case BOOT_FLASH_EMMC: - sprintf(cmd, "%d", instance); + if (instance > ARRAY_SIZE(sdmmc_addr)) + break; + /* search associated sdmmc node in devicetree */ + sprintf(cmd, "mmc@%x", sdmmc_addr[instance]); + if (uclass_get_device_by_name(UCLASS_MMC, cmd, &dev)) { + printf("mmc%d = %s not found in device tree!\n", + instance, cmd); + break; + } + sprintf(cmd, "%d", dev_seq(dev)); env_set("boot_device", "mmc"); env_set("boot_instance", cmd); break; diff --git a/arch/arm/mach-stm32mp/include/mach/stm32.h b/arch/arm/mach-stm32mp/include/mach/stm32.h index 5fdb893b0ed..c11a9903f20 100644 --- a/arch/arm/mach-stm32mp/include/mach/stm32.h +++ b/arch/arm/mach-stm32mp/include/mach/stm32.h @@ -32,6 +32,10 @@ #define STM32_UART7_BASE 0x40018000 #define STM32_UART8_BASE 0x40019000 +#define STM32_SDMMC1_BASE 0x58005000 +#define STM32_SDMMC2_BASE 0x58007000 +#define STM32_SDMMC3_BASE 0x48004000 + #define STM32_SYSRAM_BASE 0x2FFC0000 #define STM32_SYSRAM_SIZE SZ_256K diff --git a/arch/arm/mach-stm32mp/syscon.c b/arch/arm/mach-stm32mp/syscon.c index 3e61ce40978..a0e8e1dfdc5 100644 --- a/arch/arm/mach-stm32mp/syscon.c +++ b/arch/arm/mach-stm32mp/syscon.c @@ -4,6 +4,7 @@ */ #include <common.h> +#include <clk.h> #include <dm.h> #include <syscon.h> #include <asm/arch/stm32.h> @@ -14,9 +15,22 @@ static const struct udevice_id stm32mp_syscon_ids[] = { { } }; +static int stm32mp_syscon_probe(struct udevice *dev) +{ + struct clk_bulk clk_bulk; + int ret; + + ret = clk_get_bulk(dev, &clk_bulk); + if (!ret) + clk_enable_bulk(&clk_bulk); + + return 0; +} + U_BOOT_DRIVER(syscon_stm32mp) = { .name = "stmp32mp_syscon", .id = UCLASS_SYSCON, .of_match = stm32mp_syscon_ids, .bind = dm_scan_fdt_dev, + .probe = stm32mp_syscon_probe, }; diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index bc8509b72a2..49f94f095c1 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -152,6 +152,7 @@ config SUN50I_GEN_H6 bool select FIT select SPL_LOAD_FIT + select MMC_SUNXI_HAS_NEW_MODE select SUPPORT_SPL ---help--- Select this for sunxi SoCs which have H6 like peripherals, clocks @@ -190,10 +191,10 @@ config MACH_SUNXI_H3_H5 select SUPPORT_SPL # TODO: try out A80's 8GiB DRAM space -# TODO: H616 supports 4 GiB DRAM space config SUNXI_DRAM_MAX_SIZE hex - default 0xC0000000 if MACH_SUN50I || MACH_SUN50I_H5 || MACH_SUN50I_H6 || MACH_SUN50I_H616 + default 0x100000000 if MACH_SUN50I_H616 + default 0xC0000000 if MACH_SUN50I || MACH_SUN50I_H5 || MACH_SUN50I_H6 default 0x80000000 choice @@ -297,6 +298,7 @@ config MACH_SUN8I_R40 select CPU_V7_HAS_VIRT select ARCH_SUPPORT_PSCI select SUNXI_GEN_SUN6I + select MMC_SUNXI_HAS_NEW_MODE select SUPPORT_SPL select SUNXI_DRAM_DW select SUNXI_DRAM_DW_32BIT @@ -346,6 +348,7 @@ config MACH_SUN50I_H5 bool "sun50i (Allwinner H5)" select ARM64 select MACH_SUNXI_H3_H5 + select MMC_SUNXI_HAS_NEW_MODE select FIT select SPL_LOAD_FIT diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index 9b84132eda6..e979e426dd1 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -56,7 +56,7 @@ static struct mm_region sunxi_mem_map[] = { /* RAM */ .virt = 0x40000000UL, .phys = 0x40000000UL, - .size = 0xC0000000UL, + .size = CONFIG_SUNXI_DRAM_MAX_SIZE, .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE }, { @@ -65,6 +65,15 @@ static struct mm_region sunxi_mem_map[] = { } }; struct mm_region *mem_map = sunxi_mem_map; + +ulong board_get_usable_ram_top(ulong total_size) +{ + /* Some devices (like the EMAC) have a 32-bit DMA limit. */ + if (gd->ram_top > (1ULL << 32)) + return 1ULL << 32; + + return gd->ram_top; +} #endif static int gpio_init(void) diff --git a/arch/arm/mach-sunxi/clock_sun50i_h6.c b/arch/arm/mach-sunxi/clock_sun50i_h6.c index 492fc4a3fca..a947463e0a5 100644 --- a/arch/arm/mach-sunxi/clock_sun50i_h6.c +++ b/arch/arm/mach-sunxi/clock_sun50i_h6.c @@ -94,7 +94,7 @@ unsigned int clock_get_pll6(void) int m = IS_ENABLED(CONFIG_MACH_SUN50I_H6) ? 4 : 2; uint32_t rval = readl(&ccm->pll6_cfg); - int n = ((rval & CCM_PLL6_CTRL_N_MASK) >> CCM_PLL6_CTRL_N_SHIFT); + int n = ((rval & CCM_PLL6_CTRL_N_MASK) >> CCM_PLL6_CTRL_N_SHIFT) + 1; int div1 = ((rval & CCM_PLL6_CTRL_DIV1_MASK) >> CCM_PLL6_CTRL_DIV1_SHIFT) + 1; int div2 = ((rval & CCM_PLL6_CTRL_DIV2_MASK) >> diff --git a/arch/arm/mach-sunxi/dram_sun50i_h6.c b/arch/arm/mach-sunxi/dram_sun50i_h6.c index 32ec0bc4cd4..d05375c9027 100644 --- a/arch/arm/mach-sunxi/dram_sun50i_h6.c +++ b/arch/arm/mach-sunxi/dram_sun50i_h6.c @@ -171,7 +171,7 @@ static void mctl_sys_init(struct dram_para *para) /* Set PLL5 rate to doubled DRAM clock rate */ writel(CCM_PLL5_CTRL_EN | CCM_PLL5_LOCK_EN | - CCM_PLL5_CTRL_N(para->clk * 2 / 24 - 1), &ccm->pll5_cfg); + CCM_PLL5_CTRL_N(para->clk * 2 / 24), &ccm->pll5_cfg); mctl_await_completion(&ccm->pll5_cfg, CCM_PLL5_LOCK, CCM_PLL5_LOCK); /* Configure DRAM mod clock */ diff --git a/arch/arm/mach-sunxi/dram_sun50i_h616.c b/arch/arm/mach-sunxi/dram_sun50i_h616.c index ef5876971ca..acdfb3ceef8 100644 --- a/arch/arm/mach-sunxi/dram_sun50i_h616.c +++ b/arch/arm/mach-sunxi/dram_sun50i_h616.c @@ -113,7 +113,7 @@ static void mctl_sys_init(struct dram_para *para) /* Set PLL5 rate to doubled DRAM clock rate */ writel(CCM_PLL5_CTRL_EN | CCM_PLL5_LOCK_EN | CCM_PLL5_OUT_EN | - CCM_PLL5_CTRL_N(para->clk * 2 / 24 - 1), &ccm->pll5_cfg); + CCM_PLL5_CTRL_N(para->clk * 2 / 24), &ccm->pll5_cfg); mctl_await_completion(&ccm->pll5_cfg, CCM_PLL5_LOCK, CCM_PLL5_LOCK); /* Configure DRAM mod clock */ diff --git a/arch/arm/mach-u8500/Kconfig b/arch/arm/mach-u8500/Kconfig index 7478deb25f5..db7a29a54c2 100644 --- a/arch/arm/mach-u8500/Kconfig +++ b/arch/arm/mach-u8500/Kconfig @@ -8,6 +8,7 @@ choice config TARGET_STEMMY bool "Samsung (stemmy) board" + select MISC_INIT_R help The Samsung "stemmy" board supports Samsung smartphones released with the ST-Ericsson NovaThor U8500 SoC, e.g. @@ -15,6 +16,7 @@ config TARGET_STEMMY - Samsung Galaxy S III mini (GT-I8190) "golden" - Samsung Galaxy S Advance (GT-I9070) "janice" - Samsung Galaxy Xcover 2 (GT-S7710) "skomer" + - Samsung Galaxy Ace 2 (GT-I8160) "codina" and likely others as well (untested). diff --git a/arch/sandbox/cpu/state.c b/arch/sandbox/cpu/state.c index f63cfd38ee4..a4d99bade41 100644 --- a/arch/sandbox/cpu/state.c +++ b/arch/sandbox/cpu/state.c @@ -78,6 +78,10 @@ static int state_read_file(struct sandbox_state *state, const char *fname) err_read: os_close(fd); err_open: + /* + * tainted scalar, since size is obtained from the file. But we can rely + * on os_malloc() to handle invalid values. + */ os_free(state->state_fdt); state->state_fdt = NULL; diff --git a/arch/x86/cpu/coreboot/Kconfig b/arch/x86/cpu/coreboot/Kconfig index 497d6284ac1..b97c2779041 100644 --- a/arch/x86/cpu/coreboot/Kconfig +++ b/arch/x86/cpu/coreboot/Kconfig @@ -1,4 +1,4 @@ -if TARGET_COREBOOT +if VENDOR_COREBOOT config SYS_COREBOOT bool diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c index e59215cc20e..c7f6c5a013e 100644 --- a/arch/x86/cpu/i386/cpu.c +++ b/arch/x86/cpu/i386/cpu.c @@ -423,7 +423,7 @@ static void setup_mtrr(void) u64 mtrr_cap; /* Configure fixed range MTRRs for some legacy regions */ - if (!gd->arch.has_mtrr) + if (!gd->arch.has_mtrr || !ll_boot_init()) return; mtrr_cap = native_read_msr(MTRR_CAP_MSR); diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts index c8cb4e21c6d..66c31efb6cd 100644 --- a/arch/x86/dts/chromebook_coral.dts +++ b/arch/x86/dts/chromebook_coral.dts @@ -10,7 +10,7 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" -#ifdef CONFIG_CHROMEOS_VBOOT +#if defined(CONFIG_CHROMEOS_VBOOT) && defined(CONFIG_ROM_SIZE) #include "chromeos-x86.dtsi" #include "flashmap-x86-ro.dtsi" #include "flashmap-16mb-rw.dtsi" diff --git a/arch/x86/dts/chromebook_samus.dts b/arch/x86/dts/chromebook_samus.dts index adaeb1ea355..ad35ab2e3fd 100644 --- a/arch/x86/dts/chromebook_samus.dts +++ b/arch/x86/dts/chromebook_samus.dts @@ -11,7 +11,7 @@ #include "smbios.dtsi" -#ifdef CONFIG_CHROMEOS_VBOOT +#if defined(CONFIG_CHROMEOS_VBOOT) && defined(CONFIG_ROM_SIZE) #include "chromeos-x86.dtsi" #include "flashmap-x86-ro.dtsi" #include "flashmap-8mb-rw.dtsi" diff --git a/arch/x86/include/asm/cb_sysinfo.h b/arch/x86/include/asm/cb_sysinfo.h index 675eef6f2c9..75901359f98 100644 --- a/arch/x86/include/asm/cb_sysinfo.h +++ b/arch/x86/include/asm/cb_sysinfo.h @@ -215,6 +215,22 @@ struct sysinfo_t { extern struct sysinfo_t lib_sysinfo; +/** + * get_coreboot_info() - parse the coreboot sysinfo table + * + * Parses the coreboot table if found, setting the GD_FLG_SKIP_LL_INIT flag if + * so. + * + * @info: Place to put the parsed information + * @return 0 if OK, -ENOENT if no table found + */ int get_coreboot_info(struct sysinfo_t *info); +/** + * cb_get_sysinfo() - get a pointer to the parsed coreboot sysinfo + * + * @return pointer to sysinfo, or NULL if not available + */ +const struct sysinfo_t *cb_get_sysinfo(void); + #endif diff --git a/arch/x86/include/asm/mp.h b/arch/x86/include/asm/mp.h index 1a3ae8e3950..e48ba051d92 100644 --- a/arch/x86/include/asm/mp.h +++ b/arch/x86/include/asm/mp.h @@ -10,18 +10,22 @@ #include <asm/atomic.h> #include <asm/cache.h> +#include <linux/bitops.h> struct udevice; enum { - /* Indicates that the function should run on all CPUs */ - MP_SELECT_ALL = -1, + /* + * Indicates that the function should run on all CPUs. We use a large + * number, above the number of real CPUs we expect to find. + */ + MP_SELECT_ALL = BIT(16), /* Run on boot CPUs */ - MP_SELECT_BSP = -2, + MP_SELECT_BSP, /* Run on non-boot CPUs */ - MP_SELECT_APS = -3, + MP_SELECT_APS, }; typedef int (*mp_callback_t)(struct udevice *cpu, void *arg); diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c index 67401b9ba79..f33194045f9 100644 --- a/arch/x86/lib/init_helpers.c +++ b/arch/x86/lib/init_helpers.c @@ -18,10 +18,20 @@ int init_cache_f_r(void) IS_ENABLED(CONFIG_FSP_VERSION2); int ret; - if (!ll_boot_init()) - return 0; - - do_mtrr &= !IS_ENABLED(CONFIG_FSP_VERSION1) && + /* + * Supported configurations: + * + * booting from slimbootloader - in that case the MTRRs are already set + * up + * booting with FSPv1 - MTRRs are already set up + * booting with FSPv2 - MTRRs must be set here + * booting from coreboot - in this case there is no SPL, so we set up + * the MTRRs here + * Note: if there is an SPL, then it has already set up MTRRs so we + * don't need to do that here + */ + do_mtrr &= !IS_ENABLED(CONFIG_SPL) && + !IS_ENABLED(CONFIG_FSP_VERSION1) && !IS_ENABLED(CONFIG_SYS_SLIMBOOTLOADER); if (do_mtrr) { diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c index 90fc8a466d7..cf4210cd4ba 100644 --- a/arch/x86/lib/zimage.c +++ b/arch/x86/lib/zimage.c @@ -313,12 +313,12 @@ int setup_zimage(struct boot_params *setup_base, char *cmd_line, int auto_boot, int bootproto = get_boot_protocol(hdr, false); log_debug("Setup E820 entries\n"); - if (ll_boot_init()) { - setup_base->e820_entries = install_e820_map( - ARRAY_SIZE(setup_base->e820_map), setup_base->e820_map); - } else if (IS_ENABLED(CONFIG_COREBOOT_SYSINFO)) { + if (IS_ENABLED(CONFIG_COREBOOT_SYSINFO)) { setup_base->e820_entries = cb_install_e820_map( ARRAY_SIZE(setup_base->e820_map), setup_base->e820_map); + } else { + setup_base->e820_entries = install_e820_map( + ARRAY_SIZE(setup_base->e820_map), setup_base->e820_map); } if (bootproto == 0x0100) { diff --git a/board/Marvell/mvebu_armada-37xx/board.c b/board/Marvell/mvebu_armada-37xx/board.c index c630437c080..2de9c2ac173 100644 --- a/board/Marvell/mvebu_armada-37xx/board.c +++ b/board/Marvell/mvebu_armada-37xx/board.c @@ -124,7 +124,7 @@ int board_late_init(void) /* eMMC is mmc dev num 1 */ mmc_dev = find_mmc_device(1); - emmc = (mmc_dev && mmc_init(mmc_dev) == 0); + emmc = (mmc_dev && mmc_get_op_cond(mmc_dev, true) == 0); /* if eMMC is not present then remove it from DM */ if (!emmc && mmc_dev) { @@ -133,9 +133,6 @@ int board_late_init(void) device_unbind(dev); } - if (env_get("fdtfile")) - return 0; - /* Ensure that 'env default -a' set correct value to $fdtfile */ if (ddr4 && emmc) strcpy(ptr, "fdtfile=marvell/armada-3720-espressobin-v7-emmc.dtb"); @@ -146,10 +143,6 @@ int board_late_init(void) else strcpy(ptr, "fdtfile=marvell/armada-3720-espressobin.dtb"); - /* If $fdtfile was not set explicitly by user then set default value */ - if (!env_get("fdtfile")) - env_set("fdtfile", ptr + sizeof("fdtfile=")); - return 0; } #endif diff --git a/board/coreboot/coreboot/Kconfig b/board/coreboot/coreboot/Kconfig index 5bd6465d989..05e9b3b6f75 100644 --- a/board/coreboot/coreboot/Kconfig +++ b/board/coreboot/coreboot/Kconfig @@ -1,4 +1,4 @@ -if TARGET_COREBOOT +if VENDOR_COREBOOT config SYS_BOARD default "coreboot" @@ -9,9 +9,6 @@ config SYS_VENDOR config SYS_SOC default "coreboot" -config SYS_CONFIG_NAME - default "coreboot" - config SYS_TEXT_BASE default 0x01110000 @@ -31,4 +28,11 @@ config SYS_CAR_SIZE help This option specifies the board specific Cache-As-RAM (CAR) size. +endif # CONFIG_VENDOR_COREBOOT + +if TARGET_COREBOOT + +config SYS_CONFIG_NAME + default "coreboot" + endif diff --git a/board/coreboot/coreboot/coreboot.c b/board/coreboot/coreboot/coreboot.c index 175d3ce691a..11294d6e870 100644 --- a/board/coreboot/coreboot/coreboot.c +++ b/board/coreboot/coreboot/coreboot.c @@ -37,6 +37,7 @@ int show_board_info(void) goto fallback; const char *bios_ver = smbios_string(bios, t0->bios_ver); + const char *bios_date = smbios_string(bios, t0->bios_release_date); const char *model = smbios_string(system, t1->product_name); const char *manufacturer = smbios_string(system, t1->manufacturer); @@ -46,6 +47,8 @@ int show_board_info(void) printf("Vendor: %s\n", manufacturer); printf("Model: %s\n", model); printf("BIOS Version: %s\n", bios_ver); + if (bios_date) + printf("BIOS date: %s\n", bios_date); return 0; diff --git a/board/google/chromebook_coral/coral.c b/board/google/chromebook_coral/coral.c index 3f9235c903b..85cba50d4e5 100644 --- a/board/google/chromebook_coral/coral.c +++ b/board/google/chromebook_coral/coral.c @@ -10,17 +10,21 @@ #include <command.h> #include <cros_ec.h> #include <dm.h> +#include <init.h> #include <log.h> #include <sysinfo.h> #include <acpi/acpigen.h> #include <asm-generic/gpio.h> #include <asm/acpi_nhlt.h> +#include <asm/cb_sysinfo.h> #include <asm/intel_gnvs.h> #include <asm/intel_pinctrl.h> #include <dm/acpi.h> #include <linux/delay.h> #include "variant_gpio.h" +DECLARE_GLOBAL_DATA_PTR; + struct cros_gpio_info { const char *linux_name; enum cros_gpio_t type; @@ -28,6 +32,30 @@ struct cros_gpio_info { int flags; }; +int misc_init_f(void) +{ + if (!ll_boot_init()) { + printf("Running as secondary loader"); + if (gd->arch.coreboot_table) { + int ret; + + printf(" (found coreboot table at %lx)", + gd->arch.coreboot_table); + + ret = get_coreboot_info(&lib_sysinfo); + if (ret) { + printf("\nFailed to parse coreboot tables (err=%d)\n", + ret); + return ret; + } + } + + printf("\n"); + } + + return 0; +} + int arch_misc_init(void) { return 0; diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c b/board/solidrun/mx6cuboxi/mx6cuboxi.c index 3eadc38f6fd..6207bf8253a 100644 --- a/board/solidrun/mx6cuboxi/mx6cuboxi.c +++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c @@ -374,7 +374,7 @@ static bool has_emmc(void) mmc = find_mmc_device(2); if (!mmc) return 0; - return (mmc_get_op_cond(mmc) < 0) ? 0 : 1; + return (mmc_get_op_cond(mmc, true) < 0) ? 0 : 1; } int checkboard(void) diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index 18b8870269f..2faf5c81b45 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -841,6 +841,31 @@ const char *env_ext4_get_intf(void) } } +int mmc_get_boot(void) +{ + struct udevice *dev; + u32 boot_mode = get_bootmode(); + unsigned int instance = (boot_mode & TAMP_BOOT_INSTANCE_MASK) - 1; + char cmd[20]; + const u32 sdmmc_addr[] = { + STM32_SDMMC1_BASE, + STM32_SDMMC2_BASE, + STM32_SDMMC3_BASE + }; + + if (instance > ARRAY_SIZE(sdmmc_addr)) + return 0; + + /* search associated sdmmc node in devicetree */ + snprintf(cmd, sizeof(cmd), "mmc@%x", sdmmc_addr[instance]); + if (uclass_get_device_by_name(UCLASS_MMC, cmd, &dev)) { + log_err("mmc%d = %s not found in device tree!\n", instance, cmd); + return 0; + } + + return dev_seq(dev); +}; + const char *env_ext4_get_dev_part(void) { static char *const env_dev_part = @@ -854,22 +879,16 @@ const char *env_ext4_get_dev_part(void) if (strlen(env_dev_part) > 0) return env_dev_part; - u32 bootmode = get_bootmode(); - - return dev_part[(bootmode & TAMP_BOOT_INSTANCE_MASK) - 1]; + return dev_part[mmc_get_boot()]; } int mmc_get_env_dev(void) { - u32 bootmode; - if (CONFIG_SYS_MMC_ENV_DEV >= 0) return CONFIG_SYS_MMC_ENV_DEV; - bootmode = get_bootmode(); - /* use boot instance to select the correct mmc device identifier */ - return (bootmode & TAMP_BOOT_INSTANCE_MASK) - 1; + return mmc_get_boot(); } #if defined(CONFIG_OF_BOARD_SETUP) diff --git a/board/ste/stemmy/README b/board/ste/stemmy/README index 81f72426f20..1b83b833c04 100644 --- a/board/ste/stemmy/README +++ b/board/ste/stemmy/README @@ -7,6 +7,7 @@ the ST-Ericsson NovaThor U8500 SoC, e.g. - Samsung Galaxy S III mini (GT-I8190) "golden" - Samsung Galaxy S Advance (GT-I9070) "janice" - Samsung Galaxy Xcover 2 (GT-S7710) "skomer" + - Samsung Galaxy Ace 2 (GT-I8160) "codina" and likely others as well (untested). diff --git a/board/ste/stemmy/stemmy.c b/board/ste/stemmy/stemmy.c index b9b2a6fddc2..5f1150c0c77 100644 --- a/board/ste/stemmy/stemmy.c +++ b/board/ste/stemmy/stemmy.c @@ -3,18 +3,165 @@ * Copyright (C) 2019 Stephan Gerhold <stephan@gerhold.net> */ #include <common.h> +#include <env.h> #include <init.h> +#include <log.h> +#include <stdlib.h> #include <asm/global_data.h> +#include <asm/setup.h> +#include <asm/system.h> DECLARE_GLOBAL_DATA_PTR; +/* Parse atags provided by Samsung bootloader to get available memory */ +static ulong fw_mach __section(".data"); +static ulong fw_atags __section(".data"); + +static const struct tag *fw_atags_copy; +static uint fw_atags_size; + +void save_boot_params(ulong r0, ulong r1, ulong r2, ulong r3) +{ + fw_mach = r1; + fw_atags = r2; + save_boot_params_ret(); +} + +static const struct tag *fw_atags_get(void) +{ + const struct tag *tags = (const struct tag *)fw_atags; + + if (tags->hdr.tag != ATAG_CORE) { + log_err("Invalid atags: tag 0x%x at %p\n", tags->hdr.tag, tags); + return NULL; + } + + return tags; +} + int dram_init(void) { - gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_SDRAM_SIZE); + const struct tag *t, *tags = fw_atags_get(); + + if (!tags) + return -EINVAL; + + for_each_tag(t, tags) { + if (t->hdr.tag != ATAG_MEM) + continue; + + debug("Memory: %#x-%#x (size %#x)\n", t->u.mem.start, + t->u.mem.start + t->u.mem.size, t->u.mem.size); + gd->ram_size += t->u.mem.size; + } + return 0; +} + +int dram_init_banksize(void) +{ + const struct tag *t, *tags = fw_atags_get(); + unsigned int bank = 0; + + if (!tags) + return -EINVAL; + + for_each_tag(t, tags) { + if (t->hdr.tag != ATAG_MEM) + continue; + + gd->bd->bi_dram[bank].start = t->u.mem.start; + gd->bd->bi_dram[bank].size = t->u.mem.size; + if (++bank == CONFIG_NR_DRAM_BANKS) + break; + } return 0; } int board_init(void) { + gd->bd->bi_arch_number = fw_mach; + gd->bd->bi_boot_params = fw_atags; return 0; } + +static void parse_serial(const struct tag_serialnr *serialnr) +{ + char serial[17]; + + if (env_get("serial#")) + return; + + sprintf(serial, "%08x%08x", serialnr->high, serialnr->low); + env_set("serial#", serial); +} + +/* + * The downstream/vendor kernel (provided by Samsung) uses ATAGS for booting. + * It also requires an extremely long cmdline provided by the primary bootloader + * that is not suitable for booting mainline. + * + * Since downstream is the only user of ATAGS, we emulate the behavior of the + * Samsung bootloader by generating only the initrd atag in U-Boot, and copying + * all other ATAGS as-is from the primary bootloader. + */ +static inline bool skip_atag(u32 tag) +{ + return (tag == ATAG_NONE || tag == ATAG_CORE || + tag == ATAG_INITRD || tag == ATAG_INITRD2); +} + +static void copy_atags(const struct tag *tags) +{ + const struct tag *t; + struct tag *copy; + + if (!tags) + return; + + /* Calculate necessary size for tags we want to copy */ + for_each_tag(t, tags) { + if (skip_atag(t->hdr.tag)) + continue; + + if (t->hdr.tag == ATAG_SERIAL) + parse_serial(&t->u.serialnr); + + fw_atags_size += t->hdr.size * sizeof(u32); + } + + if (!fw_atags_size) + return; /* No tags to copy */ + + copy = malloc(fw_atags_size); + if (!copy) + return; + fw_atags_copy = copy; + + /* Copy tags */ + for_each_tag(t, tags) { + if (skip_atag(t->hdr.tag)) + continue; + + memcpy(copy, t, t->hdr.size * sizeof(u32)); + copy = tag_next(copy); + } +} + +int misc_init_r(void) +{ + copy_atags(fw_atags_get()); + return 0; +} + +void setup_board_tags(struct tag **in_params) +{ + if (!fw_atags_copy) + return; + + /* + * fw_atags_copy contains only full "struct tag" (plus data) + * so copying it bytewise here should be fine. + */ + memcpy(*in_params, fw_atags_copy, fw_atags_size); + *(u8 **)in_params += fw_atags_size; +} diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 76eba2ad204..4fc26077b23 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -529,3 +529,9 @@ YONES TOPTECH BS1078 V2 BOARD M: Peter Korsgaard <peter@korsgaard.com> S: Maintained F: configs/Yones_Toptech_BS1078_V2_defconfig + +ZEROPI BOARD +M: Yu-Tung Chang <mtwget@gmail.com> +S: Maintained +F: configs/zeropi_defconfig +F: arch/arm/dts/sun8i-h3-zeropi.dts diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 21651a1bfca..67acc01d83a 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -555,6 +555,17 @@ static void mmc_pinmux_setup(int sdc) sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); sunxi_gpio_set_drv(pin, 2); } +#elif defined(CONFIG_MACH_SUN50I_H616) + /* SDC2: PC0-PC1, PC5-PC6, PC8-PC11, PC13-PC16 */ + for (pin = SUNXI_GPC(0); pin <= SUNXI_GPC(16); pin++) { + if (pin > SUNXI_GPC(1) && pin < SUNXI_GPC(5)) + continue; + if (pin == SUNXI_GPC(7) || pin == SUNXI_GPC(12)) + continue; + sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); + sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); + sunxi_gpio_set_drv(pin, 3); + } #elif defined(CONFIG_MACH_SUN9I) /* SDC2: PC6-PC16 */ for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(16); pin++) { @@ -562,6 +573,8 @@ static void mmc_pinmux_setup(int sdc) sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); sunxi_gpio_set_drv(pin, 2); } +#else + puts("ERROR: No pinmux setup defined for MMC2!\n"); #endif break; diff --git a/common/board_info.c b/common/board_info.c index 1cfe34f7067..e0f2d939220 100644 --- a/common/board_info.c +++ b/common/board_info.c @@ -31,11 +31,15 @@ int __weak show_board_info(void) if (IS_ENABLED(CONFIG_SYSINFO)) { /* This might provide more detail */ - ret = uclass_first_device_err(UCLASS_SYSINFO, &dev); - if (!ret) - ret = sysinfo_get_str(dev, + ret = sysinfo_get(&dev); + if (!ret) { + ret = sysinfo_detect(dev); + if (!ret) { + ret = sysinfo_get_str(dev, SYSINFO_ID_BOARD_MODEL, sizeof(str), str); + } + } } /* Fail back to the main 'model' if available */ diff --git a/common/image-android.c b/common/image-android.c index d07b0e0f09b..1fbbbba1eb0 100644 --- a/common/image-android.c +++ b/common/image-android.c @@ -164,7 +164,7 @@ ulong android_image_get_kcomp(const struct andr_img_hdr *hdr) else if (get_unaligned_le32(p) == LZ4F_MAGIC) return IH_COMP_LZ4; else - return IH_COMP_NONE; + return image_decomp_type(p, sizeof(u32)); } int android_image_get_ramdisk(const struct andr_img_hdr *hdr, diff --git a/common/image-fit.c b/common/image-fit.c index 0c5a05948d1..e9b455deadb 100644 --- a/common/image-fit.c +++ b/common/image-fit.c @@ -17,6 +17,7 @@ #include <u-boot/crc.h> #else #include <linux/compiler.h> +#include <linux/sizes.h> #include <common.h> #include <errno.h> #include <log.h> @@ -2267,10 +2268,10 @@ int boot_get_fdt_fit(bootm_headers_t *images, ulong addr, ulong load, len; #ifdef CONFIG_OF_LIBFDT_OVERLAY ulong image_start, image_end; - ulong ovload, ovlen; + ulong ovload, ovlen, ovcopylen; const char *uconfig; const char *uname; - void *base, *ov; + void *base, *ov, *ovcopy = NULL; int i, err, noffset, ov_noffset; #endif @@ -2360,7 +2361,7 @@ int boot_get_fdt_fit(bootm_headers_t *images, ulong addr, addr, &uname, &uconfig, arch, IH_TYPE_FLATDT, BOOTSTAGE_ID_FIT_FDT_START, - FIT_LOAD_REQUIRED, &ovload, &ovlen); + FIT_LOAD_IGNORED, &ovload, &ovlen); if (ov_noffset < 0) { printf("load of %s failed\n", uname); continue; @@ -2369,6 +2370,21 @@ int boot_get_fdt_fit(bootm_headers_t *images, ulong addr, uname, ovload, ovlen); ov = map_sysmem(ovload, ovlen); + ovcopylen = ALIGN(fdt_totalsize(ov), SZ_4K); + ovcopy = malloc(ovcopylen); + if (!ovcopy) { + printf("failed to duplicate DTO before application\n"); + fdt_noffset = -ENOMEM; + goto out; + } + + err = fdt_open_into(ov, ovcopy, ovcopylen); + if (err < 0) { + printf("failed on fdt_open_into for DTO\n"); + fdt_noffset = err; + goto out; + } + base = map_sysmem(load, len + ovlen); err = fdt_open_into(base, base, len + ovlen); if (err < 0) { @@ -2376,14 +2392,18 @@ int boot_get_fdt_fit(bootm_headers_t *images, ulong addr, fdt_noffset = err; goto out; } + /* the verbose method prints out messages on error */ - err = fdt_overlay_apply_verbose(base, ov); + err = fdt_overlay_apply_verbose(base, ovcopy); if (err < 0) { fdt_noffset = err; goto out; } fdt_pack(base); len = fdt_totalsize(base); + + free(ovcopy); + ovcopy = NULL; } #else printf("config with overlays but CONFIG_OF_LIBFDT_OVERLAY not set\n"); @@ -2400,6 +2420,10 @@ out: if (fit_uname_configp) *fit_uname_configp = fit_uname_config; +#ifdef CONFIG_OF_LIBFDT_OVERLAY + if (ovcopy) + free(ovcopy); +#endif if (fit_uname_config_copy) free(fit_uname_config_copy); return fdt_noffset; diff --git a/configs/mvebu_db-88f3720_defconfig b/configs/mvebu_db-88f3720_defconfig index c9935da1028..ff4668e8376 100644 --- a/configs/mvebu_db-88f3720_defconfig +++ b/configs/mvebu_db-88f3720_defconfig @@ -11,7 +11,6 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="armada-3720-db" CONFIG_DEBUG_UART_BASE=0xd0012000 -CONFIG_DEBUG_UART_CLOCK=25804800 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/mvebu_espressobin-88f3720_defconfig b/configs/mvebu_espressobin-88f3720_defconfig index 157a4b7cb22..dc199cfe503 100644 --- a/configs/mvebu_espressobin-88f3720_defconfig +++ b/configs/mvebu_espressobin-88f3720_defconfig @@ -11,7 +11,6 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="armada-3720-espressobin" CONFIG_DEBUG_UART_BASE=0xd0012000 -CONFIG_DEBUG_UART_CLOCK=25804800 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig index 5a538e133f1..528e5f33ac1 100644 --- a/configs/orangepi_pc2_defconfig +++ b/configs/orangepi_pc2_defconfig @@ -5,11 +5,13 @@ CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881977 -# CONFIG_DRAM_ODT_EN is not set CONFIG_MACPWR="PD6" CONFIG_SPL_SPI_SUNXI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_I2C_SUPPORT=y CONFIG_SUN8I_EMAC=y +CONFIG_SY8106A_POWER=y +CONFIG_SY8106A_VOUT1_VOLT=1100 CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_MUSB_GADGET=y diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index bbbae14366d..f83a90c5aea 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -39,6 +39,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_WDT=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/stemmy_defconfig b/configs/stemmy_defconfig index 79c05acc6ac..f31960b8147 100644 --- a/configs/stemmy_defconfig +++ b/configs/stemmy_defconfig @@ -1,7 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_U8500=y CONFIG_SYS_TEXT_BASE=0x100000 -CONFIG_NR_DRAM_BANKS=1 +CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="ste-ux500-samsung-stemmy" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_HUSH_PARSER=y diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index e199f2b7f98..ab02c35b124 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL=y CONFIG_TARGET_ST_STM32MP15x=y +CONFIG_CMD_STM32KEY=y CONFIG_CMD_STM32PROG=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 CONFIG_TYPEC_STUSB160X=y @@ -54,6 +55,7 @@ CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_TIME=y +CONFIG_CMD_RNG=y CONFIG_CMD_TIMER=y CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y @@ -168,7 +170,6 @@ CONFIG_BMP_32BPP=y CONFIG_WDT=y CONFIG_WDT_STM32MP=y CONFIG_ERRNO_STR=y -# CONFIG_HEXDUMP is not set CONFIG_FDT_FIXUP_PARTITIONS=y # CONFIG_LMB_USE_MAX_REGIONS is not set CONFIG_LMB_MEMORY_REGIONS=2 diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index 5bc5e794003..a58ea91d3ef 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_OFFSET=0x280000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_TARGET_ST_STM32MP15x=y +CONFIG_CMD_STM32KEY=y CONFIG_CMD_STM32PROG=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 CONFIG_TYPEC_STUSB160X=y @@ -37,6 +38,7 @@ CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_TIME=y +CONFIG_CMD_RNG=y CONFIG_CMD_TIMER=y CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y @@ -150,7 +152,6 @@ CONFIG_BMP_32BPP=y CONFIG_WDT=y CONFIG_WDT_STM32MP=y CONFIG_ERRNO_STR=y -# CONFIG_HEXDUMP is not set CONFIG_FDT_FIXUP_PARTITIONS=y # CONFIG_LMB_USE_MAX_REGIONS is not set CONFIG_LMB_MEMORY_REGIONS=2 diff --git a/configs/total_compute_defconfig b/configs/total_compute_defconfig index 418f94b4bce..63f2e9c3750 100644 --- a/configs/total_compute_defconfig +++ b/configs/total_compute_defconfig @@ -13,8 +13,7 @@ CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_BOOTDELAY=5 -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyAMA0 debug user_debug=31 earlycon=pl011,0x7ff80000 loglevel=9 androidboot.hardware=total_compute video=640x480-32@60 androidboot.boot_devices=1c050000.mmci ip=dhcp androidboot.selinux=permissive" +# CONFIG_USE_BOOTARGS is not set # CONFIG_USE_BOOTCOMMAND is not set # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/turris_mox_defconfig b/configs/turris_mox_defconfig index 2c6f4938dbd..fd5b6f351ee 100644 --- a/configs/turris_mox_defconfig +++ b/configs/turris_mox_defconfig @@ -11,7 +11,6 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="armada-3720-turris-mox" CONFIG_DEBUG_UART_BASE=0xd0012000 -CONFIG_DEBUG_UART_CLOCK=25804800 CONFIG_DEBUG_UART=y CONFIG_OF_BOARD_FIXUP=y CONFIG_DISTRO_DEFAULTS=y @@ -31,6 +30,7 @@ CONFIG_CMD_CLK=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y CONFIG_CMD_PCI=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y @@ -60,12 +60,14 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_XENON=y CONFIG_MTD=y +CONFIG_DM_MTD=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_MTD=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVNETA=y diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index 57ab384f639..f860cf5e7de 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -41,6 +41,7 @@ CONFIG_CMD_LZMADEC=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y CONFIG_CMD_PCI=y CONFIG_CMD_SATA=y CONFIG_CMD_SPI=y @@ -56,7 +57,7 @@ CONFIG_CMD_FS_UUID=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_OVERWRITE=y CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=50000000 +CONFIG_ENV_SPI_MAX_HZ=40000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_AHCI_PCI=y @@ -65,8 +66,13 @@ CONFIG_AHCI_MVEBU=y CONFIG_DM_PCA953X=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_MV=y +CONFIG_MTD=y +CONFIG_DM_MTD=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_MTD=y +CONFIG_SF_DEFAULT_MODE=0x0 +CONFIG_SF_DEFAULT_SPEED=40000000 CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVNETA=y diff --git a/configs/uDPU_defconfig b/configs/uDPU_defconfig index cdf6b2274ce..649248d74dc 100644 --- a/configs/uDPU_defconfig +++ b/configs/uDPU_defconfig @@ -10,7 +10,6 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="armada-3720-uDPU" CONFIG_DEBUG_UART_BASE=0xd0012000 -CONFIG_DEBUG_UART_CLOCK=25804800 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/zeropi_defconfig b/configs/zeropi_defconfig new file mode 100644 index 00000000000..11f3715e6dc --- /dev/null +++ b/configs/zeropi_defconfig @@ -0,0 +1,13 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-zeropi" +CONFIG_SPL=y +CONFIG_MACH_SUN8I_H3=y +CONFIG_DRAM_CLK=408 +CONFIG_MACPWR="PD6" +# CONFIG_VIDEO_DE2 is not set +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_CONSOLE_MUX=y +CONFIG_SUN8I_EMAC=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y diff --git a/doc/board/coreboot/coreboot.rst b/doc/board/coreboot/coreboot.rst index 9c44c025a48..3792f9e1c8d 100644 --- a/doc/board/coreboot/coreboot.rst +++ b/doc/board/coreboot/coreboot.rst @@ -50,3 +50,24 @@ works by using a 32-bit SPL binary to switch to 64-bit for running U-Boot. It can be useful for running UEFI applications, for example. This has only been lightly tested. + + +Memory map +---------- + + ========== ================================================================== + Address Region at that address + ========== ================================================================== + ffffffff Top of ROM (and last byte of 32-bit address space) + 7a9fd000 Typical top of memory available to U-Boot + (use cbsysinfo to see where memory range 'table' starts) + 10000000 Memory reserved by coreboot for mapping PCI devices + (typical size 2151000, includes framebuffer) + 1920000 CONFIG_SYS_CAR_ADDR, fake Cache-as-RAM memory, used during startup + 1110000 CONFIG_SYS_TEXT_BASE (start address of U-Boot code, before reloc) + 110000 CONFIG_BLOBLIST_ADDR (before being relocated) + 100000 CONFIG_PRE_CON_BUF_ADDR + f0000 ACPI tables set up by U-Boot + (typically redirects to 7ab10030 or similar) + 500 Location of coreboot sysinfo table, used during startup + ========== ================================================================== diff --git a/doc/chromium/run_vboot.rst b/doc/chromium/run_vboot.rst index 41b4f631835..a9e4408d55f 100644 --- a/doc/chromium/run_vboot.rst +++ b/doc/chromium/run_vboot.rst @@ -6,11 +6,15 @@ Running U-Boot with Chromium OS verified boot ============================================= +Note: Once you use the source below you can obtain extra documentation with +'make htmldocs'. See the 'Internal Documentation' link, under +'Chromium OS-specific doc'. + To obtain:: git clone https://github.com/sjg20/u-boot.git cd u-boot - git checkout cros-master + git checkout cros-2021.04 cd .. git clone https://chromium.googlesource.com/chromiumos/platform/vboot_reference @@ -169,7 +173,8 @@ detect problems that affect the flow or particular vboot features. U-Boot without Chromium OS verified boot ---------------------------------------- -The following script can be used to boot a Chrome OS image on coral:: +The following script can be used to boot a Chrome OS image on coral. It is +defined as the boot command in mainline:: # Read the image header and obtain the address of the kernel # The offset 4f0 is defined by verified boot and may change for other @@ -195,10 +200,4 @@ The following script can be used to boot a Chrome OS image on coral:: zboot go -TO DO ------ - -Get the full ACPI tables working with Coral - - 7 October 2018 diff --git a/doc/device-tree-bindings/pci/x86-pci.txt b/doc/device-tree-bindings/pci/x86-pci.txt index 95e370b3e72..cf4e5ed595a 100644 --- a/doc/device-tree-bindings/pci/x86-pci.txt +++ b/doc/device-tree-bindings/pci/x86-pci.txt @@ -20,6 +20,10 @@ For PCI devices the following optional property is available: output to be lost. This should not generally be used in production code, although it is often harmless. +- u-boot,pci-pre-reloc : List of vendor/device IDs to bind before relocation, even + if they are not bridges. This is useful if the device is needed (e.g. a + UART). The format is 0xvvvvdddd where d is the device ID and v is the + vendor ID. Example: @@ -32,7 +36,8 @@ pci { 0x42000000 0x0 0xb0000000 0xb0000000 0 0x10000000 0x01000000 0x0 0x1000 0x1000 0 0xefff>; u-boot,skip-auto-config-until-reloc; - + u-boot,pci-pre-reloc = < + PCI_VENDEV(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_APL_UART2)>; serial: serial@18,2 { reg = <0x0200c210 0 0 0 0>; diff --git a/doc/git-mailrc b/doc/git-mailrc index 3ed38026af1..001681c899a 100644 --- a/doc/git-mailrc +++ b/doc/git-mailrc @@ -46,6 +46,7 @@ alias simongoldschmidt Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> alias sjg Simon Glass <sjg@chromium.org> alias smcnutt Scott McNutt <smcnutt@psyent.com> alias stroese Stefan Roese <sr@denx.de> +alias tienfong Tien Fong Chee <tien.fong.chee@intel.com> alias trini Tom Rini <trini@konsulko.com> alias wd Wolfgang Denk <wd@denx.de> alias priyankajain Priyanka Jain <priyanka.jain@nxp.com> @@ -69,7 +70,7 @@ alias s3c samsung alias s5pc samsung alias samsung uboot, prom alias snapdragon uboot, mateusz -alias socfpga uboot, marex, dinh, simongoldschmidt, leyfoon +alias socfpga uboot, marex, dinh, simongoldschmidt, tienfong alias sunxi uboot, jagan, apritzel alias tegra uboot, sjg, Tom Warren <twarren@nvidia.com>, Stephen Warren <swarren@nvidia.com> alias tegra2 tegra diff --git a/doc/uImage.FIT/signature.txt b/doc/uImage.FIT/signature.txt index d9a91211903..7cb1c15e5e1 100644 --- a/doc/uImage.FIT/signature.txt +++ b/doc/uImage.FIT/signature.txt @@ -266,14 +266,14 @@ As an example, consider this FIT: data = <data for fdt1>; signature-1 { algo = "sha1,rsa2048"; - vaue = <...fdt signature 1...> + value = <...fdt signature 1...> }; }; fdt-2 { data = <data for fdt2>; signature-1 { algo = "sha1,rsa2048"; - vaue = <...fdt signature 2...> + value = <...fdt signature 2...> }; }; }; diff --git a/drivers/Kconfig b/drivers/Kconfig index b1ada1cb7f8..c9c812b7526 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -80,6 +80,8 @@ source "drivers/phy/allwinner/Kconfig" source "drivers/phy/marvell/Kconfig" +source "drivers/phy/socionext/Kconfig" + source "drivers/pinctrl/Kconfig" source "drivers/power/Kconfig" diff --git a/drivers/Makefile b/drivers/Makefile index 3510daba29f..40812891046 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -96,6 +96,7 @@ obj-$(CONFIG_PCH) += pch/ obj-y += phy/allwinner/ obj-y += phy/marvell/ obj-y += phy/rockchip/ +obj-y += phy/socionext/ obj-y += rtc/ obj-y += scsi/ obj-y += sound/ diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c index f049e36380f..cea38a4c6e5 100644 --- a/drivers/clk/clk-uclass.c +++ b/drivers/clk/clk-uclass.c @@ -847,13 +847,17 @@ void devm_clk_put(struct udevice *dev, struct clk *clk) int clk_uclass_post_probe(struct udevice *dev) { + int ret; + /* * when a clock provider is probed. Call clk_set_defaults() * also after the device is probed. This takes care of cases * where the DT is used to setup default parents and rates * using assigned-clocks */ - clk_set_defaults(dev, CLK_DEFAULTS_POST); + ret = clk_set_defaults(dev, CLK_DEFAULTS_POST); + if (ret) + return log_ret(ret); return 0; } diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c index 0c0ef366a19..48c9514ba04 100644 --- a/drivers/clk/clk_stm32mp1.c +++ b/drivers/clk/clk_stm32mp1.c @@ -540,6 +540,7 @@ static const struct stm32mp1_clk_gate stm32mp1_clk_gate[] = { STM32MP1_CLK_SET_CLR(RCC_MP_APB2ENSETR, 13, USART6_K, _UART6_SEL), STM32MP1_CLK_SET_CLR_F(RCC_MP_APB3ENSETR, 13, VREF, _PCLK3), + STM32MP1_CLK_SET_CLR_F(RCC_MP_APB3ENSETR, 11, SYSCFG, _UNKNOWN_SEL), STM32MP1_CLK_SET_CLR_F(RCC_MP_APB4ENSETR, 0, LTDC_PX, _PLL4_Q), STM32MP1_CLK_SET_CLR_F(RCC_MP_APB4ENSETR, 4, DSI_PX, _PLL4_Q), diff --git a/drivers/clk/uniphier/clk-uniphier-sys.c b/drivers/clk/uniphier/clk-uniphier-sys.c index c627a4bf851..ff5d364f597 100644 --- a/drivers/clk/uniphier/clk-uniphier-sys.c +++ b/drivers/clk/uniphier/clk-uniphier-sys.c @@ -29,6 +29,7 @@ const struct uniphier_clk_data uniphier_pxs2_sys_clk_data[] = { UNIPHIER_CLK_GATE_SIMPLE(15, 0x2104, 17), /* usb31 (Pro4, Pro5, PXs2) */ UNIPHIER_CLK_GATE_SIMPLE(16, 0x2104, 19), /* usb30-phy (PXs2) */ UNIPHIER_CLK_GATE_SIMPLE(20, 0x2104, 20), /* usb31-phy (PXs2) */ + UNIPHIER_CLK_GATE_SIMPLE(24, 0x2108, 2), /* pcie (Pro5) */ { /* sentinel */ } #endif }; @@ -43,6 +44,7 @@ const struct uniphier_clk_data uniphier_ld20_sys_clk_data[] = { UNIPHIER_CLK_GATE_SIMPLE(14, 0x210c, 14), /* usb30 (LD20) */ UNIPHIER_CLK_GATE_SIMPLE(16, 0x210c, 12), /* usb30-phy0 (LD20) */ UNIPHIER_CLK_GATE_SIMPLE(17, 0x210c, 13), /* usb30-phy1 (LD20) */ + UNIPHIER_CLK_GATE_SIMPLE(24, 0x210c, 4), /* pcie */ { /* sentinel */ } #endif }; @@ -62,6 +64,7 @@ const struct uniphier_clk_data uniphier_pxs3_sys_clk_data[] = { UNIPHIER_CLK_GATE_SIMPLE(18, 0x210c, 20), /* usb30-phy2 */ UNIPHIER_CLK_GATE_SIMPLE(20, 0x210c, 17), /* usb31-phy0 */ UNIPHIER_CLK_GATE_SIMPLE(21, 0x210c, 19), /* usb31-phy1 */ + UNIPHIER_CLK_GATE_SIMPLE(24, 0x210c, 3), /* pcie */ { /* sentinel */ } #endif }; diff --git a/drivers/core/dump.c b/drivers/core/dump.c index f8afea30a93..f2f9cacc56c 100644 --- a/drivers/core/dump.c +++ b/drivers/core/dump.c @@ -130,18 +130,19 @@ void dm_dump_drivers(void) struct driver *entry; struct udevice *udev; struct uclass *uc; + int ret; int i; puts("Driver uid uclass Devices\n"); puts("----------------------------------------------------------\n"); for (entry = d; entry < d + n_ents; entry++) { - uclass_get(entry->id, &uc); + ret = uclass_get(entry->id, &uc); printf("%-25.25s %-3.3d %-20.20s ", entry->name, entry->id, - uc ? uc->uc_drv->name : "<no uclass>"); + !ret ? uc->uc_drv->name : "<no uclass>"); - if (!uc) { + if (ret) { puts("\n"); continue; } diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c index 3206f3d1128..5f98f85cfce 100644 --- a/drivers/core/regmap.c +++ b/drivers/core/regmap.c @@ -293,6 +293,7 @@ struct regmap *devm_regmap_init(struct udevice *dev, int rc; struct regmap **mapp, *map; + /* this looks like a leak, but devres takes care of it */ mapp = devres_alloc(devm_regmap_release, sizeof(struct regmap *), __GFP_ZERO); if (unlikely(!mapp)) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index de4dc51d4b4..0817b12c5f7 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -495,4 +495,12 @@ config NX_GPIO The GPIOs for a device are defined in the device tree with one node for each bank. +config NOMADIK_GPIO + bool "Nomadik GPIO driver" + depends on DM_GPIO + help + Support GPIO access on ST-Ericsson Ux500 SoCs. The GPIOs are arranged + into a number of banks each with 32 GPIOs. The GPIOs for a device are + defined in the device tree with one node for each bank. + endmenu diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 06dfc32fa54..16b09fb1b5b 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -43,7 +43,6 @@ obj-$(CONFIG_MPC8XXX_GPIO) += mpc8xxx_gpio.o obj-$(CONFIG_MPC83XX_SPISEL_BOOT) += mpc83xx_spisel_boot.o obj-$(CONFIG_SH_GPIO_PFC) += sh_pfc.o obj-$(CONFIG_OMAP_GPIO) += omap_gpio.o -obj-$(CONFIG_DB8500_GPIO) += db8500_gpio.o obj-$(CONFIG_BCM2835_GPIO) += bcm2835_gpio.o obj-$(CONFIG_XILINX_GPIO) += xilinx_gpio.o obj-$(CONFIG_ADI_GPIO2) += adi_gpio2.o @@ -68,3 +67,4 @@ obj-$(CONFIG_MT7621_GPIO) += mt7621_gpio.o obj-$(CONFIG_MSCC_SGPIO) += mscc_sgpio.o obj-$(CONFIG_NX_GPIO) += nx_gpio.o obj-$(CONFIG_SIFIVE_GPIO) += sifive-gpio.o +obj-$(CONFIG_NOMADIK_GPIO) += nmk_gpio.o diff --git a/drivers/gpio/db8500_gpio.c b/drivers/gpio/db8500_gpio.c deleted file mode 100644 index eefb56d83f6..00000000000 --- a/drivers/gpio/db8500_gpio.c +++ /dev/null @@ -1,221 +0,0 @@ -/* - * Code ported from Nomadik GPIO driver in ST-Ericsson Linux kernel code. - * The purpose is that GPIO config found in kernel should work by simply - * copy-paste it to U-Boot. - * - * Original Linux authors: - * Copyright (C) 2008,2009 STMicroelectronics - * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it> - * Rewritten based on work by Prafulla WADASKAR <prafulla.wadaskar@st.com> - * - * Ported to U-Boot by: - * Copyright (C) 2010 Joakim Axelsson <joakim.axelsson AT stericsson.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <common.h> -#include <asm/io.h> - -#include <asm/arch/db8500_gpio.h> -#include <asm/arch/db8500_pincfg.h> -#include <linux/compiler.h> - -#define IO_ADDR(x) (void *) (x) - -/* - * The GPIO module in the db8500 Systems-on-Chip is an - * AMBA device, managing 32 pins and alternate functions. The logic block - * is currently only used in the db8500. - */ - -#define GPIO_TOTAL_PINS 268 -#define GPIO_PINS_PER_BLOCK 32 -#define GPIO_BLOCKS_COUNT (GPIO_TOTAL_PINS/GPIO_PINS_PER_BLOCK + 1) -#define GPIO_BLOCK(pin) (((pin + GPIO_PINS_PER_BLOCK) >> 5) - 1) -#define GPIO_PIN_WITHIN_BLOCK(pin) ((pin)%(GPIO_PINS_PER_BLOCK)) - -/* Register in the logic block */ -#define DB8500_GPIO_DAT 0x00 -#define DB8500_GPIO_DATS 0x04 -#define DB8500_GPIO_DATC 0x08 -#define DB8500_GPIO_PDIS 0x0c -#define DB8500_GPIO_DIR 0x10 -#define DB8500_GPIO_DIRS 0x14 -#define DB8500_GPIO_DIRC 0x18 -#define DB8500_GPIO_SLPC 0x1c -#define DB8500_GPIO_AFSLA 0x20 -#define DB8500_GPIO_AFSLB 0x24 - -#define DB8500_GPIO_RIMSC 0x40 -#define DB8500_GPIO_FIMSC 0x44 -#define DB8500_GPIO_IS 0x48 -#define DB8500_GPIO_IC 0x4c -#define DB8500_GPIO_RWIMSC 0x50 -#define DB8500_GPIO_FWIMSC 0x54 -#define DB8500_GPIO_WKS 0x58 - -static void __iomem *get_gpio_addr(unsigned gpio) -{ - /* Our list of GPIO chips */ - static void __iomem *gpio_addrs[GPIO_BLOCKS_COUNT] = { - IO_ADDR(CFG_GPIO_0_BASE), - IO_ADDR(CFG_GPIO_1_BASE), - IO_ADDR(CFG_GPIO_2_BASE), - IO_ADDR(CFG_GPIO_3_BASE), - IO_ADDR(CFG_GPIO_4_BASE), - IO_ADDR(CFG_GPIO_5_BASE), - IO_ADDR(CFG_GPIO_6_BASE), - IO_ADDR(CFG_GPIO_7_BASE), - IO_ADDR(CFG_GPIO_8_BASE) - }; - - return gpio_addrs[GPIO_BLOCK(gpio)]; -} - -static unsigned get_gpio_offset(unsigned gpio) -{ - return GPIO_PIN_WITHIN_BLOCK(gpio); -} - -/* Can only be called from config_pin. Don't configure alt-mode directly */ -static void gpio_set_mode(unsigned gpio, enum db8500_gpio_alt mode) -{ - void __iomem *addr = get_gpio_addr(gpio); - unsigned offset = get_gpio_offset(gpio); - u32 bit = 1 << offset; - u32 afunc, bfunc; - - afunc = readl(addr + DB8500_GPIO_AFSLA) & ~bit; - bfunc = readl(addr + DB8500_GPIO_AFSLB) & ~bit; - if (mode & DB8500_GPIO_ALT_A) - afunc |= bit; - if (mode & DB8500_GPIO_ALT_B) - bfunc |= bit; - writel(afunc, addr + DB8500_GPIO_AFSLA); - writel(bfunc, addr + DB8500_GPIO_AFSLB); -} - -/** - * db8500_gpio_set_pull() - enable/disable pull up/down on a gpio - * @gpio: pin number - * @pull: one of DB8500_GPIO_PULL_DOWN, DB8500_GPIO_PULL_UP, - * and DB8500_GPIO_PULL_NONE - * - * Enables/disables pull up/down on a specified pin. This only takes effect if - * the pin is configured as an input (either explicitly or by the alternate - * function). - * - * NOTE: If enabling the pull up/down, the caller must ensure that the GPIO is - * configured as an input. Otherwise, due to the way the controller registers - * work, this function will change the value output on the pin. - */ -void db8500_gpio_set_pull(unsigned gpio, enum db8500_gpio_pull pull) -{ - void __iomem *addr = get_gpio_addr(gpio); - unsigned offset = get_gpio_offset(gpio); - u32 bit = 1 << offset; - u32 pdis; - - pdis = readl(addr + DB8500_GPIO_PDIS); - if (pull == DB8500_GPIO_PULL_NONE) - pdis |= bit; - else - pdis &= ~bit; - writel(pdis, addr + DB8500_GPIO_PDIS); - - if (pull == DB8500_GPIO_PULL_UP) - writel(bit, addr + DB8500_GPIO_DATS); - else if (pull == DB8500_GPIO_PULL_DOWN) - writel(bit, addr + DB8500_GPIO_DATC); -} - -void db8500_gpio_make_input(unsigned gpio) -{ - void __iomem *addr = get_gpio_addr(gpio); - unsigned offset = get_gpio_offset(gpio); - - writel(1 << offset, addr + DB8500_GPIO_DIRC); -} - -int db8500_gpio_get_input(unsigned gpio) -{ - void __iomem *addr = get_gpio_addr(gpio); - unsigned offset = get_gpio_offset(gpio); - u32 bit = 1 << offset; - - printf("db8500_gpio_get_input gpio=%u addr=%p offset=%u bit=%#x\n", - gpio, addr, offset, bit); - - return (readl(addr + DB8500_GPIO_DAT) & bit) != 0; -} - -void db8500_gpio_make_output(unsigned gpio, int val) -{ - void __iomem *addr = get_gpio_addr(gpio); - unsigned offset = get_gpio_offset(gpio); - - writel(1 << offset, addr + DB8500_GPIO_DIRS); - db8500_gpio_set_output(gpio, val); -} - -void db8500_gpio_set_output(unsigned gpio, int val) -{ - void __iomem *addr = get_gpio_addr(gpio); - unsigned offset = get_gpio_offset(gpio); - - if (val) - writel(1 << offset, addr + DB8500_GPIO_DATS); - else - writel(1 << offset, addr + DB8500_GPIO_DATC); -} - -/** - * config_pin - configure a pin's mux attributes - * @cfg: pin configuration - * - * Configures a pin's mode (alternate function or GPIO), its pull up status, - * and its sleep mode based on the specified configuration. The @cfg is - * usually one of the SoC specific macros defined in mach/<soc>-pins.h. These - * are constructed using, and can be further enhanced with, the macros in - * plat/pincfg.h. - * - * If a pin's mode is set to GPIO, it is configured as an input to avoid - * side-effects. The gpio can be manipulated later using standard GPIO API - * calls. - */ -static void config_pin(unsigned long cfg) -{ - int pin = PIN_NUM(cfg); - int pull = PIN_PULL(cfg); - int af = PIN_ALT(cfg); - int output = PIN_DIR(cfg); - int val = PIN_VAL(cfg); - - if (output) - db8500_gpio_make_output(pin, val); - else { - db8500_gpio_make_input(pin); - db8500_gpio_set_pull(pin, pull); - } - - gpio_set_mode(pin, af); -} - -/** - * db8500_config_pins - configure several pins at once - * @cfgs: array of pin configurations - * @num: number of elments in the array - * - * Configures several pins using config_pin(). Refer to that function for - * further information. - */ -void db8500_gpio_config_pins(unsigned long *cfgs, size_t num) -{ - size_t i; - - for (i = 0; i < num; i++) - config_pin(cfgs[i]); -} diff --git a/drivers/gpio/nmk_gpio.c b/drivers/gpio/nmk_gpio.c new file mode 100644 index 00000000000..e1bb41b196c --- /dev/null +++ b/drivers/gpio/nmk_gpio.c @@ -0,0 +1,125 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* Copyright (C) 2019 Stephan Gerhold */ + +#include <common.h> +#include <dm.h> +#include <asm/gpio.h> +#include <asm/io.h> + +struct nmk_gpio_regs { + u32 dat; /* data */ + u32 dats; /* data set */ + u32 datc; /* data clear */ + u32 pdis; /* pull disable */ + u32 dir; /* direction */ + u32 dirs; /* direction set */ + u32 dirc; /* direction clear */ + u32 slpm; /* sleep mode */ + u32 afsla; /* alternate function select A */ + u32 afslb; /* alternate function select B */ + u32 lowemi; /* low EMI mode */ +}; + +struct nmk_gpio { + struct nmk_gpio_regs *regs; +}; + +static int nmk_gpio_get_value(struct udevice *dev, unsigned offset) +{ + struct nmk_gpio *priv = dev_get_priv(dev); + + return !!(readl(&priv->regs->dat) & BIT(offset)); +} + +static int nmk_gpio_set_value(struct udevice *dev, unsigned offset, int value) +{ + struct nmk_gpio *priv = dev_get_priv(dev); + + if (value) + writel(BIT(offset), &priv->regs->dats); + else + writel(BIT(offset), &priv->regs->datc); + + return 0; +} + +static int nmk_gpio_get_function(struct udevice *dev, unsigned offset) +{ + struct nmk_gpio *priv = dev_get_priv(dev); + + if (readl(&priv->regs->afsla) & BIT(offset) || + readl(&priv->regs->afslb) & BIT(offset)) + return GPIOF_FUNC; + + if (readl(&priv->regs->dir) & BIT(offset)) + return GPIOF_OUTPUT; + else + return GPIOF_INPUT; +} + +static int nmk_gpio_direction_input(struct udevice *dev, unsigned offset) +{ + struct nmk_gpio *priv = dev_get_priv(dev); + + writel(BIT(offset), &priv->regs->dirc); + return 0; +} + +static int nmk_gpio_direction_output(struct udevice *dev, unsigned offset, + int value) +{ + struct nmk_gpio *priv = dev_get_priv(dev); + + writel(BIT(offset), &priv->regs->dirs); + return nmk_gpio_set_value(dev, offset, value); +} + +static const struct dm_gpio_ops nmk_gpio_ops = { + .get_value = nmk_gpio_get_value, + .set_value = nmk_gpio_set_value, + .get_function = nmk_gpio_get_function, + .direction_input = nmk_gpio_direction_input, + .direction_output = nmk_gpio_direction_output, +}; + +static int nmk_gpio_probe(struct udevice *dev) +{ + struct nmk_gpio *priv = dev_get_priv(dev); + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + char buf[20]; + u32 bank; + int ret; + + priv->regs = dev_read_addr_ptr(dev); + if (!priv->regs) + return -EINVAL; + + ret = dev_read_u32(dev, "gpio-bank", &bank); + if (ret < 0) { + printf("nmk_gpio(%s): Failed to read gpio-bank\n", dev->name); + return ret; + } + + sprintf(buf, "nmk%u-gpio", bank); + uc_priv->bank_name = strdup(buf); + if (!uc_priv->bank_name) + return -ENOMEM; + + uc_priv->gpio_count = sizeof(priv->regs->dat) * BITS_PER_BYTE; + + return 0; +} + +static const struct udevice_id nmk_gpio_ids[] = { + { .compatible = "st,nomadik-gpio" }, + { } +}; + +U_BOOT_DRIVER(gpio_nmk) = { + .name = "nmk_gpio", + .id = UCLASS_GPIO, + .of_match = nmk_gpio_ids, + .probe = nmk_gpio_probe, + .ops = &nmk_gpio_ops, + .priv_auto = sizeof(struct nmk_gpio), +}; diff --git a/drivers/misc/cros_ec_sandbox.c b/drivers/misc/cros_ec_sandbox.c index db5e3b0f51a..beea47caa33 100644 --- a/drivers/misc/cros_ec_sandbox.c +++ b/drivers/misc/cros_ec_sandbox.c @@ -5,6 +5,8 @@ * Copyright (c) 2013 The Chromium OS Authors. */ +#define LOG_CATEGORY UCLASS_CROS_EC + #include <common.h> #include <cros_ec.h> #include <dm.h> @@ -221,11 +223,12 @@ static int keyscan_read_fdt_matrix(struct ec_state *ec, ofnode node) int len; cell = ofnode_get_property(node, "linux,keymap", &len); + if (!cell) + return log_msg_ret("prop", -EINVAL); ec->matrix_count = len / 4; ec->matrix = calloc(ec->matrix_count, sizeof(*ec->matrix)); if (!ec->matrix) { - debug("%s: Out of memory for key matrix\n", __func__); - return -1; + return log_msg_ret("mem", -ENOMEM); } /* Now read the data */ @@ -243,13 +246,12 @@ static int keyscan_read_fdt_matrix(struct ec_state *ec, ofnode node) matrix->col >= KEYBOARD_COLS) { debug("%s: Matrix pos out of range (%d,%d)\n", __func__, matrix->row, matrix->col); - return -1; + return log_msg_ret("matrix", -ERANGE); } } if (upto != ec->matrix_count) { - debug("%s: Read mismatch from key matrix\n", __func__); - return -1; + return log_msg_ret("matrix", -E2BIG); } return 0; diff --git a/drivers/misc/i2c_eeprom.c b/drivers/misc/i2c_eeprom.c index 3b249842f8b..89a450d0f8d 100644 --- a/drivers/misc/i2c_eeprom.c +++ b/drivers/misc/i2c_eeprom.c @@ -264,6 +264,7 @@ static const struct i2c_eeprom_drv_data atmel24c512_data = { static const struct udevice_id i2c_eeprom_std_ids[] = { { .compatible = "i2c-eeprom", (ulong)&eeprom_data }, { .compatible = "microchip,24aa02e48", (ulong)&mc24aa02e48_data }, + { .compatible = "atmel,24c01", (ulong)&atmel24c01a_data }, { .compatible = "atmel,24c01a", (ulong)&atmel24c01a_data }, { .compatible = "atmel,24c02", (ulong)&atmel24c02_data }, { .compatible = "atmel,24c04", (ulong)&atmel24c04_data }, diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 1e83007286b..8078a89f18c 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -2766,7 +2766,7 @@ static int mmc_power_cycle(struct mmc *mmc) return mmc_power_on(mmc); } -int mmc_get_op_cond(struct mmc *mmc) +int mmc_get_op_cond(struct mmc *mmc, bool quiet) { bool uhs_en = supports_uhs(mmc->cfg->host_caps); int err; @@ -2842,7 +2842,8 @@ retry: if (err) { #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) - pr_err("Card did not respond to voltage select! : %d\n", err); + if (!quiet) + pr_err("Card did not respond to voltage select! : %d\n", err); #endif return -EOPNOTSUPP; } @@ -2882,7 +2883,7 @@ int mmc_start_init(struct mmc *mmc) return -ENOMEDIUM; } - err = mmc_get_op_cond(mmc); + err = mmc_get_op_cond(mmc, false); if (!err) mmc->init_in_progress = 1; diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c index 3503ccdb2ee..178b8cf106d 100644 --- a/drivers/mmc/sunxi_mmc.c +++ b/drivers/mmc/sunxi_mmc.c @@ -23,6 +23,10 @@ #include <asm-generic/gpio.h> #include <linux/delay.h> +#ifndef CCM_MMC_CTRL_MODE_SEL_NEW +#define CCM_MMC_CTRL_MODE_SEL_NEW 0 +#endif + struct sunxi_mmc_plat { struct mmc_config cfg; struct mmc mmc; @@ -33,7 +37,6 @@ struct sunxi_mmc_priv { uint32_t *mclkreg; unsigned fatal_err; struct gpio_desc cd_gpio; /* Change Detect GPIO */ - int cd_inverted; /* Inverted Card Detect */ struct sunxi_mmc *reg; struct mmc_config cfg; }; @@ -99,24 +102,29 @@ static int mmc_resource_init(int sdc_no) } #endif +/* + * All A64 and later MMC controllers feature auto-calibration. This would + * normally be detected via the compatible string, but we need something + * which works in the SPL as well. + */ +static bool sunxi_mmc_can_calibrate(void) +{ + return IS_ENABLED(CONFIG_MACH_SUN50I) || + IS_ENABLED(CONFIG_MACH_SUN50I_H5) || + IS_ENABLED(CONFIG_SUN50I_GEN_H6) || + IS_ENABLED(CONFIG_MACH_SUN8I_R40); +} + static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv, unsigned int hz) { unsigned int pll, pll_hz, div, n, oclk_dly, sclk_dly; - bool new_mode = true; - bool calibrate = false; + bool new_mode = IS_ENABLED(CONFIG_MMC_SUNXI_HAS_NEW_MODE); u32 val = 0; - if (!IS_ENABLED(CONFIG_MMC_SUNXI_HAS_NEW_MODE)) - new_mode = false; - /* A83T support new mode only on eMMC */ if (IS_ENABLED(CONFIG_MACH_SUN8I_A83T) && priv->mmc_no != 2) new_mode = false; -#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_SUN50I_GEN_H6) - calibrate = true; -#endif - if (hz <= 24000000) { pll = CCM_MMC_CTRL_OSCM24; pll_hz = 24000000; @@ -124,10 +132,14 @@ static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv, unsigned int hz) #ifdef CONFIG_MACH_SUN9I pll = CCM_MMC_CTRL_PLL_PERIPH0; pll_hz = clock_get_pll4_periph0(); -#elif defined(CONFIG_SUN50I_GEN_H6) - pll = CCM_MMC_CTRL_PLL6X2; - pll_hz = clock_get_pll6() * 2; #else + /* + * SoCs since the A64 (H5, H6, H616) actually use the doubled + * rate of PLL6/PERIPH0 as an input clock, but compensate for + * that with a fixed post-divider of 2 in the mod clock. + * This cancels each other out, so for simplicity we just + * pretend it's always PLL6 without a post divider here. + */ pll = CCM_MMC_CTRL_PLL6; pll_hz = clock_get_pll6(); #endif @@ -156,33 +168,27 @@ static int mmc_set_mod_clk(struct sunxi_mmc_priv *priv, unsigned int hz) } else if (hz <= 25000000) { oclk_dly = 0; sclk_dly = 5; -#ifdef CONFIG_MACH_SUN9I - } else if (hz <= 52000000) { - oclk_dly = 5; - sclk_dly = 4; } else { - /* hz > 52000000 */ - oclk_dly = 2; - sclk_dly = 4; -#else - } else if (hz <= 52000000) { - oclk_dly = 3; - sclk_dly = 4; - } else { - /* hz > 52000000 */ - oclk_dly = 1; + if (IS_ENABLED(CONFIG_MACH_SUN9I)) { + if (hz <= 52000000) + oclk_dly = 5; + else + oclk_dly = 2; + } else { + if (hz <= 52000000) + oclk_dly = 3; + else + oclk_dly = 1; + } sclk_dly = 4; -#endif } if (new_mode) { -#ifdef CONFIG_MMC_SUNXI_HAS_NEW_MODE -#ifdef CONFIG_MMC_SUNXI_HAS_MODE_SWITCH - val = CCM_MMC_CTRL_MODE_SEL_NEW; -#endif + val |= CCM_MMC_CTRL_MODE_SEL_NEW; setbits_le32(&priv->reg->ntsr, SUNXI_MMC_NTSR_MODE_SEL_NEW); -#endif - } else if (!calibrate) { + } + + if (!sunxi_mmc_can_calibrate()) { /* * Use hardcoded delay values if controller doesn't support * calibration @@ -240,14 +246,15 @@ static int mmc_config_clock(struct sunxi_mmc_priv *priv, struct mmc *mmc) rval &= ~SUNXI_MMC_CLK_DIVIDER_MASK; writel(rval, &priv->reg->clkcr); -#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_SUN50I_GEN_H6) +#if defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_SUN50I_GEN_H6) /* A64 supports calibration of delays on MMC controller and we * have to set delay of zero before starting calibration. * Allwinner BSP driver sets a delay only in the case of * using HS400 which is not supported by mainline U-Boot or * Linux at the moment */ - writel(SUNXI_MMC_CAL_DL_SW_EN, &priv->reg->samp_dl); + if (sunxi_mmc_can_calibrate()) + writel(SUNXI_MMC_CAL_DL_SW_EN, &priv->reg->samp_dl); #endif /* Re-enable Clock */ @@ -303,8 +310,9 @@ static int mmc_trans_data_by_cpu(struct sunxi_mmc_priv *priv, struct mmc *mmc, SUNXI_MMC_STATUS_FIFO_FULL; unsigned i; unsigned *buff = (unsigned int *)(reading ? data->dest : data->src); - unsigned byte_cnt = data->blocksize * data->blocks; - unsigned timeout_msecs = byte_cnt >> 8; + unsigned word_cnt = (data->blocksize * data->blocks) >> 2; + unsigned timeout_msecs = word_cnt >> 6; + uint32_t status; unsigned long start; if (timeout_msecs < 2000) @@ -315,16 +323,38 @@ static int mmc_trans_data_by_cpu(struct sunxi_mmc_priv *priv, struct mmc *mmc, start = get_timer(0); - for (i = 0; i < (byte_cnt >> 2); i++) { - while (readl(&priv->reg->status) & status_bit) { + for (i = 0; i < word_cnt;) { + unsigned int in_fifo; + + while ((status = readl(&priv->reg->status)) & status_bit) { if (get_timer(start) > timeout_msecs) return -1; } - if (reading) - buff[i] = readl(&priv->reg->fifo); - else - writel(buff[i], &priv->reg->fifo); + /* + * For writing we do not easily know the FIFO size, so have + * to check the FIFO status after every word written. + * TODO: For optimisation we could work out a minimum FIFO + * size across all SoCs, and use that together with the current + * fill level to write chunks of words. + */ + if (!reading) { + writel(buff[i++], &priv->reg->fifo); + continue; + } + + /* + * The status register holds the current FIFO level, so we + * can be sure to collect as many words from the FIFO + * register without checking the status register after every + * read. That saves half of the costly MMIO reads, effectively + * doubling the read performance. + */ + for (in_fifo = SUNXI_MMC_STATUS_FIFO_LEVEL(status); + in_fifo > 0; + in_fifo--) + buff[i++] = readl_relaxed(&priv->reg->fifo); + dmb(); } return 0; @@ -521,10 +551,11 @@ struct mmc *sunxi_mmc_init(int sdc_no) cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; cfg->host_caps = MMC_MODE_4BIT; -#if defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUN8I) || defined(CONFIG_SUN50I_GEN_H6) - if (sdc_no == 2) + + if ((IS_ENABLED(CONFIG_MACH_SUN50I) || IS_ENABLED(CONFIG_MACH_SUN8I) || + IS_ENABLED(CONFIG_SUN50I_GEN_H6)) && (sdc_no == 2)) cfg->host_caps = MMC_MODE_8BIT; -#endif + cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; @@ -580,12 +611,21 @@ static int sunxi_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, static int sunxi_mmc_getcd(struct udevice *dev) { + struct mmc *mmc = mmc_get_mmc_dev(dev); struct sunxi_mmc_priv *priv = dev_get_priv(dev); + /* If polling, assume that the card is always present. */ + if ((mmc->cfg->host_caps & MMC_CAP_NONREMOVABLE) || + (mmc->cfg->host_caps & MMC_CAP_NEEDS_POLL)) + return 1; + if (dm_gpio_is_valid(&priv->cd_gpio)) { int cd_state = dm_gpio_get_value(&priv->cd_gpio); - return cd_state ^ priv->cd_inverted; + if (mmc->cfg->host_caps & MMC_CAP_CD_ACTIVE_HIGH) + return !cd_state; + else + return cd_state; } return 1; } @@ -617,31 +657,29 @@ static int sunxi_mmc_probe(struct udevice *dev) struct mmc_config *cfg = &plat->cfg; struct ofnode_phandle_args args; u32 *ccu_reg; - int bus_width, ret; + int ret; cfg->name = dev->name; - bus_width = dev_read_u32_default(dev, "bus-width", 1); cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; - cfg->host_caps = 0; - if (bus_width == 8) - cfg->host_caps |= MMC_MODE_8BIT; - if (bus_width >= 4) - cfg->host_caps |= MMC_MODE_4BIT; - cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; + cfg->host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS; cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; cfg->f_min = 400000; cfg->f_max = 52000000; - priv->reg = (void *)dev_read_addr(dev); + ret = mmc_of_parse(dev, cfg); + if (ret) + return ret; + + priv->reg = dev_read_addr_ptr(dev); /* We don't have a sunxi clock driver so find the clock address here */ ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0, 1, &args); if (ret) return ret; - ccu_reg = (u32 *)ofnode_get_addr(args.node); + ccu_reg = (u32 *)(uintptr_t)ofnode_get_addr(args.node); priv->mmc_no = ((uintptr_t)priv->reg - SUNXI_MMC0_BASE) / 0x1000; priv->mclkreg = (void *)ccu_reg + get_mclk_offset() + priv->mmc_no * 4; @@ -659,17 +697,13 @@ static int sunxi_mmc_probe(struct udevice *dev) return ret; /* This GPIO is optional */ - if (!dev_read_bool(dev, "non-removable") && - !gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio, + if (!gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio, GPIOD_IS_IN)) { int cd_pin = gpio_get_number(&priv->cd_gpio); sunxi_gpio_set_pull(cd_pin, SUNXI_GPIO_PULL_UP); } - /* Check if card detect is inverted */ - priv->cd_inverted = dev_read_bool(dev, "cd-inverted"); - upriv->mmc = &plat->mmc; /* Reset controller */ diff --git a/drivers/net/sandbox-raw.c b/drivers/net/sandbox-raw.c index ce66ff781ff..99eb7a3bbff 100644 --- a/drivers/net/sandbox-raw.c +++ b/drivers/net/sandbox-raw.c @@ -161,7 +161,7 @@ static int sb_eth_raw_of_to_plat(struct udevice *dev) ifname = dev_read_string(dev, "host-raw-interface"); if (ifname) { - strncpy(priv->host_ifname, ifname, IFNAMSIZ); + strlcpy(priv->host_ifname, ifname, IFNAMSIZ); printf(": Using %s from DT\n", priv->host_ifname); } if (dev_read_u32(dev, "host-raw-interface-idx", diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index 782179eb0f6..517cf956ea0 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -340,4 +340,14 @@ config PCI_BRCMSTB on Broadcom set-top-box (STB) SoCs. This driver currently supports only BCM2711 SoC and RC mode of the controller. + +config PCIE_UNIPHIER + bool "Socionext UniPhier PCIe driver" + depends on DM_PCI + depends on ARCH_UNIPHIER + select PHY_UNIPHIER_PCIE + help + Say Y here if you want to enable PCIe controller support on + UniPhier SoCs. + endif diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile index 6568dc9a088..ec8ee9dda75 100644 --- a/drivers/pci/Makefile +++ b/drivers/pci/Makefile @@ -56,3 +56,4 @@ obj-$(CONFIG_PCI_BRCMSTB) += pcie_brcmstb.o obj-$(CONFIG_PCI_OCTEONTX) += pci_octeontx.o obj-$(CONFIG_PCIE_OCTEON) += pcie_octeon.o obj-$(CONFIG_PCIE_DW_SIFIVE) += pcie_dw_sifive.o +obj-$(CONFIG_PCIE_UNIPHIER) += pcie_uniphier.o diff --git a/drivers/pci/pci-aardvark.c b/drivers/pci/pci-aardvark.c index 96aa039bdc2..1b9bae7cca7 100644 --- a/drivers/pci/pci-aardvark.c +++ b/drivers/pci/pci-aardvark.c @@ -605,25 +605,26 @@ static void pcie_advk_set_ob_region(struct pcie_advk *pcie, int *wins, /* * The n-th PCIe window is configured by tuple (match, remap, mask) - * and an access to address A uses this window it if A matches the + * and an access to address A uses this window if A matches the * match with given mask. * So every PCIe window size must be a power of two and every start * address must be aligned to window size. Minimal size is 64 KiB - * because lower 16 bits of mask must be zero. + * because lower 16 bits of mask must be zero. Remapped address + * may have set only bits from the mask. */ while (*wins < OB_WIN_COUNT && size > 0) { /* Calculate the largest aligned window size */ win_size = (1ULL << (fls64(size) - 1)) | (phys_start ? (1ULL << __ffs64(phys_start)) : 0); win_size = 1ULL << __ffs64(win_size); - if (win_size < 0x10000) + win_mask = ~(win_size - 1); + if (win_size < 0x10000 || (bus_start & ~win_mask)) break; dev_dbg(pcie->dev, "Configuring PCIe window %d: [0x%llx-0x%llx] as 0x%x\n", *wins, (u64)phys_start, (u64)phys_start + win_size, actions); - win_mask = ~(win_size - 1) & ~0xffff; pcie_advk_set_ob_win(pcie, *wins, phys_start, bus_start, win_mask, actions); diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index cb9aa818359..fb12732926d 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -21,6 +21,7 @@ #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP) #include <asm/fsp/fsp_support.h> #endif +#include <dt-bindings/pci/pci.h> #include <linux/delay.h> #include "pci_internal.h" @@ -164,7 +165,7 @@ int dm_pci_bus_find_bdf(pci_dev_t bdf, struct udevice **devp) } static int pci_device_matches_ids(struct udevice *dev, - struct pci_device_id *ids) + const struct pci_device_id *ids) { struct pci_child_plat *pplat; int i; @@ -181,7 +182,7 @@ static int pci_device_matches_ids(struct udevice *dev, return -EINVAL; } -int pci_bus_find_devices(struct udevice *bus, struct pci_device_id *ids, +int pci_bus_find_devices(struct udevice *bus, const struct pci_device_id *ids, int *indexp, struct udevice **devp) { struct udevice *dev; @@ -201,7 +202,7 @@ int pci_bus_find_devices(struct udevice *bus, struct pci_device_id *ids, return -ENODEV; } -int pci_find_device_id(struct pci_device_id *ids, int index, +int pci_find_device_id(const struct pci_device_id *ids, int index, struct udevice **devp) { struct udevice *bus; @@ -682,6 +683,34 @@ static bool pci_match_one_id(const struct pci_device_id *id, } /** + * pci_need_device_pre_reloc() - Check if a device should be bound + * + * This checks a list of vendor/device-ID values indicating devices that should + * be bound before relocation. + * + * @bus: Bus to check + * @vendor: Vendor ID to check + * @device: Device ID to check + * @return true if the vendor/device is in the list, false if not + */ +static bool pci_need_device_pre_reloc(struct udevice *bus, uint vendor, + uint device) +{ + u32 vendev; + int index; + + for (index = 0; + !dev_read_u32_index(bus, "u-boot,pci-pre-reloc", index, + &vendev); + index++) { + if (vendev == PCI_VENDEV(vendor, device)) + return true; + } + + return false; +} + +/** * pci_find_and_bind_driver() - Find and bind the right PCI driver * * This only looks at certain fields in the descriptor. @@ -769,7 +798,9 @@ static int pci_find_and_bind_driver(struct udevice *parent, * precious memory space as on some platforms as that space is pretty * limited (ie: using Cache As RAM). */ - if (!(gd->flags & GD_FLG_RELOC) && !bridge) + if (!(gd->flags & GD_FLG_RELOC) && !bridge && + !pci_need_device_pre_reloc(parent, find_id->vendor, + find_id->device)) return log_msg_ret("notbr", -EPERM); /* Bind a generic driver so that the device can be used */ diff --git a/drivers/pci/pcie_uniphier.c b/drivers/pci/pcie_uniphier.c new file mode 100644 index 00000000000..f2edea9899a --- /dev/null +++ b/drivers/pci/pcie_uniphier.c @@ -0,0 +1,424 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * pcie_uniphier.c - Socionext UniPhier PCIe driver + * Copyright 2019-2021 Socionext, Inc. + */ + +#include <clk.h> +#include <common.h> +#include <dm.h> +#include <dm/device_compat.h> +#include <generic-phy.h> +#include <linux/bitfield.h> +#include <linux/bitops.h> +#include <linux/compat.h> +#include <linux/delay.h> +#include <linux/io.h> +#include <pci.h> +#include <reset.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* DBI registers */ +#define PCIE_LINK_STATUS_REG 0x0080 +#define PCIE_LINK_STATUS_WIDTH_MASK GENMASK(25, 20) +#define PCIE_LINK_STATUS_SPEED_MASK GENMASK(19, 16) + +#define PCIE_MISC_CONTROL_1_OFF 0x08BC +#define PCIE_DBI_RO_WR_EN BIT(0) + +/* DBI iATU registers */ +#define PCIE_ATU_VIEWPORT 0x0900 +#define PCIE_ATU_REGION_INBOUND BIT(31) +#define PCIE_ATU_REGION_OUTBOUND 0 +#define PCIE_ATU_REGION_INDEX_MASK GENMASK(3, 0) + +#define PCIE_ATU_CR1 0x0904 +#define PCIE_ATU_TYPE_MEM 0 +#define PCIE_ATU_TYPE_IO 2 +#define PCIE_ATU_TYPE_CFG0 4 +#define PCIE_ATU_TYPE_CFG1 5 + +#define PCIE_ATU_CR2 0x0908 +#define PCIE_ATU_ENABLE BIT(31) +#define PCIE_ATU_MATCH_MODE BIT(30) +#define PCIE_ATU_BAR_NUM_MASK GENMASK(10, 8) + +#define PCIE_ATU_LOWER_BASE 0x090C +#define PCIE_ATU_UPPER_BASE 0x0910 +#define PCIE_ATU_LIMIT 0x0914 +#define PCIE_ATU_LOWER_TARGET 0x0918 +#define PCIE_ATU_BUS(x) FIELD_PREP(GENMASK(31, 24), x) +#define PCIE_ATU_DEV(x) FIELD_PREP(GENMASK(23, 19), x) +#define PCIE_ATU_FUNC(x) FIELD_PREP(GENMASK(18, 16), x) +#define PCIE_ATU_UPPER_TARGET 0x091C + +/* Link Glue registers */ +#define PCL_PINCTRL0 0x002c +#define PCL_PERST_PLDN_REGEN BIT(12) +#define PCL_PERST_NOE_REGEN BIT(11) +#define PCL_PERST_OUT_REGEN BIT(8) +#define PCL_PERST_PLDN_REGVAL BIT(4) +#define PCL_PERST_NOE_REGVAL BIT(3) +#define PCL_PERST_OUT_REGVAL BIT(0) + +#define PCL_MODE 0x8000 +#define PCL_MODE_REGEN BIT(8) +#define PCL_MODE_REGVAL BIT(0) + +#define PCL_APP_READY_CTRL 0x8008 +#define PCL_APP_LTSSM_ENABLE BIT(0) + +#define PCL_APP_PM0 0x8078 +#define PCL_SYS_AUX_PWR_DET BIT(8) + +#define PCL_STATUS_LINK 0x8140 +#define PCL_RDLH_LINK_UP BIT(1) +#define PCL_XMLH_LINK_UP BIT(0) + +#define LINK_UP_TIMEOUT_MS 100 + +struct uniphier_pcie_priv { + void *base; + void *dbi_base; + void *cfg_base; + fdt_size_t cfg_size; + struct fdt_resource link_res; + struct fdt_resource dbi_res; + struct fdt_resource cfg_res; + + struct clk clk; + struct reset_ctl rst; + struct phy phy; + + struct pci_region io; + struct pci_region mem; +}; + +static int pcie_dw_get_link_speed(struct uniphier_pcie_priv *priv) +{ + u32 val = readl(priv->dbi_base + PCIE_LINK_STATUS_REG); + + return FIELD_GET(PCIE_LINK_STATUS_SPEED_MASK, val); +} + +static int pcie_dw_get_link_width(struct uniphier_pcie_priv *priv) +{ + u32 val = readl(priv->dbi_base + PCIE_LINK_STATUS_REG); + + return FIELD_GET(PCIE_LINK_STATUS_WIDTH_MASK, val); +} + +static void pcie_dw_prog_outbound_atu(struct uniphier_pcie_priv *priv, + int index, int type, u64 cpu_addr, + u64 pci_addr, u32 size) +{ + writel(PCIE_ATU_REGION_OUTBOUND + | FIELD_PREP(PCIE_ATU_REGION_INDEX_MASK, index), + priv->dbi_base + PCIE_ATU_VIEWPORT); + writel(lower_32_bits(cpu_addr), + priv->dbi_base + PCIE_ATU_LOWER_BASE); + writel(upper_32_bits(cpu_addr), + priv->dbi_base + PCIE_ATU_UPPER_BASE); + writel(lower_32_bits(cpu_addr + size - 1), + priv->dbi_base + PCIE_ATU_LIMIT); + writel(lower_32_bits(pci_addr), + priv->dbi_base + PCIE_ATU_LOWER_TARGET); + writel(upper_32_bits(pci_addr), + priv->dbi_base + PCIE_ATU_UPPER_TARGET); + + writel(type, priv->dbi_base + PCIE_ATU_CR1); + writel(PCIE_ATU_ENABLE, priv->dbi_base + PCIE_ATU_CR2); +} + +static int uniphier_pcie_addr_valid(pci_dev_t bdf, int first_busno) +{ + /* accept only device {0,1} on first bus */ + if ((PCI_BUS(bdf) != first_busno) || (PCI_DEV(bdf) > 1)) + return -EINVAL; + + return 0; +} + +static int uniphier_pcie_conf_address(const struct udevice *dev, pci_dev_t bdf, + uint offset, void **paddr) +{ + struct uniphier_pcie_priv *priv = dev_get_priv(dev); + u32 busdev; + int seq = dev_seq(dev); + int ret; + + ret = uniphier_pcie_addr_valid(bdf, seq); + if (ret) + return ret; + + if ((PCI_BUS(bdf) == seq) && !PCI_DEV(bdf)) { + *paddr = (void *)(priv->dbi_base + offset); + return 0; + } + + busdev = PCIE_ATU_BUS(PCI_BUS(bdf) - seq) + | PCIE_ATU_DEV(PCI_DEV(bdf)) + | PCIE_ATU_FUNC(PCI_FUNC(bdf)); + + pcie_dw_prog_outbound_atu(priv, 0, + PCIE_ATU_TYPE_CFG0, (u64)priv->cfg_base, + busdev, priv->cfg_size); + *paddr = (void *)(priv->cfg_base + offset); + + return 0; +} + +static int uniphier_pcie_read_config(const struct udevice *dev, pci_dev_t bdf, + uint offset, ulong *valp, + enum pci_size_t size) +{ + return pci_generic_mmap_read_config(dev, uniphier_pcie_conf_address, + bdf, offset, valp, size); +} + +static int uniphier_pcie_write_config(struct udevice *dev, pci_dev_t bdf, + uint offset, ulong val, + enum pci_size_t size) +{ + return pci_generic_mmap_write_config(dev, uniphier_pcie_conf_address, + bdf, offset, val, size); +} + +static void uniphier_pcie_ltssm_enable(struct uniphier_pcie_priv *priv, + bool enable) +{ + u32 val; + + val = readl(priv->base + PCL_APP_READY_CTRL); + if (enable) + val |= PCL_APP_LTSSM_ENABLE; + else + val &= ~PCL_APP_LTSSM_ENABLE; + writel(val, priv->base + PCL_APP_READY_CTRL); +} + +static int uniphier_pcie_link_up(struct uniphier_pcie_priv *priv) +{ + u32 val, mask; + + val = readl(priv->base + PCL_STATUS_LINK); + mask = PCL_RDLH_LINK_UP | PCL_XMLH_LINK_UP; + + return (val & mask) == mask; +} + +static int uniphier_pcie_wait_link(struct uniphier_pcie_priv *priv) +{ + unsigned long timeout; + + timeout = get_timer(0) + LINK_UP_TIMEOUT_MS; + + while (get_timer(0) < timeout) { + if (uniphier_pcie_link_up(priv)) + return 0; + } + + return -ETIMEDOUT; +} + +static int uniphier_pcie_establish_link(struct uniphier_pcie_priv *priv) +{ + if (uniphier_pcie_link_up(priv)) + return 0; + + uniphier_pcie_ltssm_enable(priv, true); + + return uniphier_pcie_wait_link(priv); +} + +static void uniphier_pcie_init_rc(struct uniphier_pcie_priv *priv) +{ + u32 val; + + /* set RC mode */ + val = readl(priv->base + PCL_MODE); + val |= PCL_MODE_REGEN; + val &= ~PCL_MODE_REGVAL; + writel(val, priv->base + PCL_MODE); + + /* use auxiliary power detection */ + val = readl(priv->base + PCL_APP_PM0); + val |= PCL_SYS_AUX_PWR_DET; + writel(val, priv->base + PCL_APP_PM0); + + /* assert PERST# */ + val = readl(priv->base + PCL_PINCTRL0); + val &= ~(PCL_PERST_NOE_REGVAL | PCL_PERST_OUT_REGVAL + | PCL_PERST_PLDN_REGVAL); + val |= PCL_PERST_NOE_REGEN | PCL_PERST_OUT_REGEN + | PCL_PERST_PLDN_REGEN; + writel(val, priv->base + PCL_PINCTRL0); + + uniphier_pcie_ltssm_enable(priv, false); + + mdelay(100); + + /* deassert PERST# */ + val = readl(priv->base + PCL_PINCTRL0); + val |= PCL_PERST_OUT_REGVAL | PCL_PERST_OUT_REGEN; + writel(val, priv->base + PCL_PINCTRL0); +} + +static void uniphier_pcie_setup_rc(struct uniphier_pcie_priv *priv, + struct pci_controller *hose) +{ + /* Store the IO and MEM windows settings for future use by the ATU */ + priv->io.phys_start = hose->regions[0].phys_start; /* IO base */ + priv->io.bus_start = hose->regions[0].bus_start; /* IO_bus_addr */ + priv->io.size = hose->regions[0].size; /* IO size */ + priv->mem.phys_start = hose->regions[1].phys_start; /* MEM base */ + priv->mem.bus_start = hose->regions[1].bus_start; /* MEM_bus_addr */ + priv->mem.size = hose->regions[1].size; /* MEM size */ + + /* outbound: IO */ + pcie_dw_prog_outbound_atu(priv, 0, + PCIE_ATU_TYPE_IO, priv->io.phys_start, + priv->io.bus_start, priv->io.size); + + /* outbound: MEM */ + pcie_dw_prog_outbound_atu(priv, 1, + PCIE_ATU_TYPE_MEM, priv->mem.phys_start, + priv->mem.bus_start, priv->mem.size); +} + +static int uniphier_pcie_probe(struct udevice *dev) +{ + struct uniphier_pcie_priv *priv = dev_get_priv(dev); + struct udevice *ctlr = pci_get_controller(dev); + struct pci_controller *hose = dev_get_uclass_priv(ctlr); + int ret; + + priv->base = map_physmem(priv->link_res.start, + fdt_resource_size(&priv->link_res), + MAP_NOCACHE); + priv->dbi_base = map_physmem(priv->dbi_res.start, + fdt_resource_size(&priv->dbi_res), + MAP_NOCACHE); + priv->cfg_size = fdt_resource_size(&priv->cfg_res); + priv->cfg_base = map_physmem(priv->cfg_res.start, + priv->cfg_size, MAP_NOCACHE); + + ret = clk_enable(&priv->clk); + if (ret) { + dev_err(dev, "Failed to enable clk: %d\n", ret); + return ret; + } + ret = reset_deassert(&priv->rst); + if (ret) { + dev_err(dev, "Failed to deassert reset: %d\n", ret); + goto out_clk_release; + } + + ret = generic_phy_init(&priv->phy); + if (ret) { + dev_err(dev, "Failed to initialize phy: %d\n", ret); + goto out_reset_release; + } + + ret = generic_phy_power_on(&priv->phy); + if (ret) { + dev_err(dev, "Failed to power on phy: %d\n", ret); + goto out_phy_exit; + } + + uniphier_pcie_init_rc(priv); + + /* set DBI to read only */ + writel(0, priv->dbi_base + PCIE_MISC_CONTROL_1_OFF); + + uniphier_pcie_setup_rc(priv, hose); + + if (uniphier_pcie_establish_link(priv)) { + printf("PCIE-%d: Link down\n", dev_seq(dev)); + } else { + printf("PCIE-%d: Link up (Gen%d-x%d, Bus%d)\n", + dev_seq(dev), pcie_dw_get_link_speed(priv), + pcie_dw_get_link_width(priv), hose->first_busno); + } + + return 0; + +out_phy_exit: + generic_phy_exit(&priv->phy); +out_reset_release: + reset_release_all(&priv->rst, 1); +out_clk_release: + clk_release_all(&priv->clk, 1); + + return ret; +} + +static int uniphier_pcie_of_to_plat(struct udevice *dev) +{ + struct uniphier_pcie_priv *priv = dev_get_priv(dev); + const void *fdt = gd->fdt_blob; + int node = dev_of_offset(dev); + int ret; + + ret = fdt_get_named_resource(fdt, node, "reg", "reg-names", + "link", &priv->link_res); + if (ret) { + dev_err(dev, "Failed to get link regs: %d\n", ret); + return ret; + } + + ret = fdt_get_named_resource(fdt, node, "reg", "reg-names", + "dbi", &priv->dbi_res); + if (ret) { + dev_err(dev, "Failed to get dbi regs: %d\n", ret); + return ret; + } + + ret = fdt_get_named_resource(fdt, node, "reg", "reg-names", + "config", &priv->cfg_res); + if (ret) { + dev_err(dev, "Failed to get config regs: %d\n", ret); + return ret; + } + + ret = clk_get_by_index(dev, 0, &priv->clk); + if (ret) { + dev_err(dev, "Failed to get clocks property: %d\n", ret); + return ret; + } + + ret = reset_get_by_index(dev, 0, &priv->rst); + if (ret) { + dev_err(dev, "Failed to get resets property: %d\n", ret); + return ret; + } + + ret = generic_phy_get_by_index(dev, 0, &priv->phy); + if (ret) { + dev_err(dev, "Failed to get phy property: %d\n", ret); + return ret; + } + + return 0; +} + +static const struct dm_pci_ops uniphier_pcie_ops = { + .read_config = uniphier_pcie_read_config, + .write_config = uniphier_pcie_write_config, +}; + +static const struct udevice_id uniphier_pcie_ids[] = { + { .compatible = "socionext,uniphier-pcie", }, + { /* Sentinel */ } +}; + +U_BOOT_DRIVER(pcie_uniphier) = { + .name = "uniphier-pcie", + .id = UCLASS_PCI, + .of_match = uniphier_pcie_ids, + .probe = uniphier_pcie_probe, + .ops = &uniphier_pcie_ops, + .of_to_plat = uniphier_pcie_of_to_plat, + .priv_auto = sizeof(struct uniphier_pcie_priv), +}; diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index 09cb7442767..80ae1af3293 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -64,6 +64,12 @@ config MIPI_DPHY_HELPERS help Provides a number of helpers a core functions for MIPI D-PHY drivers. +config AB8500_USB_PHY + bool "AB8500 USB PHY Driver" + depends on PHY && PMIC_AB8500 + help + Support for the USB OTG PHY in ST-Ericsson AB8500. + config BCM6318_USBH_PHY bool "BCM6318 USBH PHY support" depends on PHY && ARCH_BMIPS diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index c6ad3b1b266..0f2b63ae3c1 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -6,6 +6,7 @@ obj-$(CONFIG_$(SPL_)PHY) += phy-uclass.o obj-$(CONFIG_$(SPL_)NOP_PHY) += nop-phy.o obj-$(CONFIG_MIPI_DPHY_HELPERS) += phy-core-mipi-dphy.o +obj-$(CONFIG_AB8500_USB_PHY) += phy-ab8500-usb.o obj-$(CONFIG_BCM6318_USBH_PHY) += bcm6318-usbh-phy.o obj-$(CONFIG_BCM6348_USBH_PHY) += bcm6348-usbh-phy.o obj-$(CONFIG_BCM6358_USBH_PHY) += bcm6358-usbh-phy.o diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c index 5723c980323..82713b83815 100644 --- a/drivers/phy/allwinner/phy-sun4i-usb.c +++ b/drivers/phy/allwinner/phy-sun4i-usb.c @@ -313,9 +313,21 @@ static int sun4i_usb_phy_init(struct phy *phy) data->cfg->disc_thresh, PHY_DISCON_TH_LEN); } +#ifdef CONFIG_USB_MUSB_SUNXI + /* Needed for HCI and conflicts with MUSB, keep PHY0 on MUSB */ + if (usb_phy->id != 0) + sun4i_usb_phy_passby(phy, true); + + /* Route PHY0 to MUSB to allow USB gadget */ + if (data->cfg->phy0_dual_route) + sun4i_usb_phy0_reroute(data, true); +#else sun4i_usb_phy_passby(phy, true); - sun4i_usb_phy0_reroute(data, true); + /* Route PHY0 to HCI to allow USB host */ + if (data->cfg->phy0_dual_route) + sun4i_usb_phy0_reroute(data, false); +#endif return 0; } diff --git a/drivers/phy/phy-ab8500-usb.c b/drivers/phy/phy-ab8500-usb.c new file mode 100644 index 00000000000..0e04595717b --- /dev/null +++ b/drivers/phy/phy-ab8500-usb.c @@ -0,0 +1,52 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* Copyright (C) 2019 Stephan Gerhold */ + +#include <common.h> +#include <dm.h> +#include <generic-phy.h> +#include <linux/bitops.h> +#include <power/pmic.h> +#include <power/ab8500.h> + +#define AB8500_USB_PHY_CTRL_REG AB8500_USB(0x8A) +#define AB8500_BIT_PHY_CTRL_HOST_EN BIT(0) +#define AB8500_BIT_PHY_CTRL_DEVICE_EN BIT(1) +#define AB8500_USB_PHY_CTRL_MASK (AB8500_BIT_PHY_CTRL_HOST_EN |\ + AB8500_BIT_PHY_CTRL_DEVICE_EN) + +static int ab8500_usb_phy_power_on(struct phy *phy) +{ + struct udevice *dev = phy->dev; + uint set = AB8500_BIT_PHY_CTRL_DEVICE_EN; + + if (CONFIG_IS_ENABLED(USB_MUSB_HOST)) + set = AB8500_BIT_PHY_CTRL_HOST_EN; + + return pmic_clrsetbits(dev->parent, AB8500_USB_PHY_CTRL_REG, + AB8500_USB_PHY_CTRL_MASK, set); +} + +static int ab8500_usb_phy_power_off(struct phy *phy) +{ + struct udevice *dev = phy->dev; + + return pmic_clrsetbits(dev->parent, AB8500_USB_PHY_CTRL_REG, + AB8500_USB_PHY_CTRL_MASK, 0); +} + +struct phy_ops ab8500_usb_phy_ops = { + .power_on = ab8500_usb_phy_power_on, + .power_off = ab8500_usb_phy_power_off, +}; + +static const struct udevice_id ab8500_usb_phy_ids[] = { + { .compatible = "stericsson,ab8500-usb" }, + { } +}; + +U_BOOT_DRIVER(ab8500_usb_phy) = { + .name = "ab8500_usb_phy", + .id = UCLASS_PHY, + .of_match = ab8500_usb_phy_ids, + .ops = &ab8500_usb_phy_ops, +}; diff --git a/drivers/phy/socionext/Kconfig b/drivers/phy/socionext/Kconfig new file mode 100644 index 00000000000..bcd579e98ec --- /dev/null +++ b/drivers/phy/socionext/Kconfig @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# PHY drivers for Socionext platforms. +# + +config PHY_UNIPHIER_PCIE + bool "UniPhier PCIe PHY driver" + depends on PHY && ARCH_UNIPHIER + imply REGMAP + help + Enable this to support PHY implemented in PCIe controller + on UniPhier SoCs. diff --git a/drivers/phy/socionext/Makefile b/drivers/phy/socionext/Makefile new file mode 100644 index 00000000000..5484360b70f --- /dev/null +++ b/drivers/phy/socionext/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Makefile for the phy drivers. +# + +obj-$(CONFIG_PHY_UNIPHIER_PCIE) += phy-uniphier-pcie.o diff --git a/drivers/phy/socionext/phy-uniphier-pcie.c b/drivers/phy/socionext/phy-uniphier-pcie.c new file mode 100644 index 00000000000..d352c4ca3a9 --- /dev/null +++ b/drivers/phy/socionext/phy-uniphier-pcie.c @@ -0,0 +1,59 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * phy_uniphier_pcie.c - Socionext UniPhier PCIe PHY driver + * Copyright 2019-2021 Socionext, Inc. + */ + +#include <common.h> +#include <dm.h> +#include <generic-phy.h> +#include <linux/bitops.h> +#include <linux/compat.h> +#include <regmap.h> +#include <syscon.h> + +/* SG */ +#define SG_USBPCIESEL 0x590 +#define SG_USBPCIESEL_PCIE BIT(0) + +struct uniphier_pciephy_priv { + int dummy; +}; + +static int uniphier_pciephy_init(struct phy *phy) +{ + return 0; +} + +static int uniphier_pciephy_probe(struct udevice *dev) +{ + struct regmap *regmap; + + regmap = syscon_regmap_lookup_by_phandle(dev, + "socionext,syscon"); + if (!IS_ERR(regmap)) + regmap_update_bits(regmap, SG_USBPCIESEL, + SG_USBPCIESEL_PCIE, SG_USBPCIESEL_PCIE); + + return 0; +} + +static struct phy_ops uniphier_pciephy_ops = { + .init = uniphier_pciephy_init, +}; + +static const struct udevice_id uniphier_pciephy_ids[] = { + { .compatible = "socionext,uniphier-pro5-pcie-phy" }, + { .compatible = "socionext,uniphier-ld20-pcie-phy" }, + { .compatible = "socionext,uniphier-pxs3-pcie-phy" }, + { } +}; + +U_BOOT_DRIVER(uniphier_pcie_phy) = { + .name = "uniphier-pcie-phy", + .id = UCLASS_PHY, + .of_match = uniphier_pciephy_ids, + .ops = &uniphier_pciephy_ops, + .probe = uniphier_pciephy_probe, + .priv_auto = sizeof(struct uniphier_pciephy_priv), +}; diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index 7af6c5f0b03..cf9ad3670f6 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -471,6 +471,7 @@ static int single_probe(struct udevice *dev) return -ENOMEM; #endif + /* looks like a possible divide by 0, but data->width avoids this */ priv->npins = size / (pdata->width / BITS_PER_BYTE); if (pdata->bits_per_mux) { if (!pdata->mask) { diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig index 583fd3ddcde..fd6648b313e 100644 --- a/drivers/power/pmic/Kconfig +++ b/drivers/power/pmic/Kconfig @@ -31,6 +31,16 @@ config SPL_PMIC_CHILDREN to call your regulator code (e.g. see rk8xx.c for direct functions for use in SPL). +config PMIC_AB8500 + bool "Enable driver for ST-Ericsson AB8500 PMIC via PRCMU" + depends on DM_PMIC + select REGMAP + select SYSCON + help + Enable support for the ST-Ericsson AB8500 (Analog Baseband) PMIC. + It connects with the ST-Ericsson DB8500 SoC via an I2C bus managed by + the power/reset/clock management unit (PRCMU) firmware. + config PMIC_ACT8846 bool "Enable support for the active-semi 8846 PMIC" depends on DM_PMIC && DM_I2C diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile index 89099fde573..5d1a97e5f6f 100644 --- a/drivers/power/pmic/Makefile +++ b/drivers/power/pmic/Makefile @@ -15,6 +15,7 @@ obj-$(CONFIG_$(SPL_)DM_PMIC_PFUZE100) += pfuze100.o obj-$(CONFIG_$(SPL_)DM_PMIC_PCA9450) += pca9450.o obj-$(CONFIG_PMIC_S2MPS11) += s2mps11.o obj-$(CONFIG_DM_PMIC_SANDBOX) += sandbox.o i2c_pmic_emul.o +obj-$(CONFIG_PMIC_AB8500) += ab8500.o obj-$(CONFIG_PMIC_ACT8846) += act8846.o obj-$(CONFIG_PMIC_AS3722) += as3722.o as3722_gpio.o obj-$(CONFIG_PMIC_MAX8997) += max8997.o diff --git a/drivers/power/pmic/ab8500.c b/drivers/power/pmic/ab8500.c new file mode 100644 index 00000000000..1f64f217c34 --- /dev/null +++ b/drivers/power/pmic/ab8500.c @@ -0,0 +1,268 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Stephan Gerhold + * + * Adapted from old U-Boot and Linux kernel implementation: + * Copyright (C) STMicroelectronics 2009 + * Copyright (C) ST-Ericsson SA 2010 + */ + +#include <common.h> +#include <dm.h> +#include <regmap.h> +#include <syscon.h> +#include <linux/bitops.h> +#include <linux/err.h> +#include <power/ab8500.h> +#include <power/pmic.h> + +/* CPU mailbox registers */ +#define PRCM_MBOX_CPU_VAL 0x0fc +#define PRCM_MBOX_CPU_SET 0x100 +#define PRCM_MBOX_CPU_CLR 0x104 + +#define PRCM_ARM_IT1_CLR 0x48C +#define PRCM_ARM_IT1_VAL 0x494 + +#define PRCM_TCDM_RANGE 2 +#define PRCM_REQ_MB5 0xE44 +#define PRCM_ACK_MB5 0xDF4 +#define _PRCM_MBOX_HEADER 0xFE8 +#define PRCM_MBOX_HEADER_REQ_MB5 (_PRCM_MBOX_HEADER + 0x5) +#define PRCMU_I2C_MBOX_BIT BIT(5) + +/* Mailbox 5 Requests */ +#define PRCM_REQ_MB5_I2C_SLAVE_OP (PRCM_REQ_MB5 + 0x0) +#define PRCM_REQ_MB5_I2C_HW_BITS (PRCM_REQ_MB5 + 0x1) +#define PRCM_REQ_MB5_I2C_REG (PRCM_REQ_MB5 + 0x2) +#define PRCM_REQ_MB5_I2C_VAL (PRCM_REQ_MB5 + 0x3) +#define PRCMU_I2C(bank) (((bank) << 1) | BIT(6)) +#define PRCMU_I2C_WRITE 0 +#define PRCMU_I2C_READ 1 +#define PRCMU_I2C_STOP_EN BIT(3) + +/* Mailbox 5 ACKs */ +#define PRCM_ACK_MB5_I2C_STATUS (PRCM_ACK_MB5 + 0x1) +#define PRCM_ACK_MB5_I2C_VAL (PRCM_ACK_MB5 + 0x3) +#define PRCMU_I2C_WR_OK 0x1 +#define PRCMU_I2C_RD_OK 0x2 + +/* AB8500 version registers */ +#define AB8500_MISC_REV_REG AB8500_MISC(0x80) +#define AB8500_MISC_IC_NAME_REG AB8500_MISC(0x82) + +struct ab8500_priv { + struct ab8500 ab8500; + struct regmap *regmap; +}; + +static inline int prcmu_tcdm_readb(struct regmap *map, uint offset, u8 *valp) +{ + return regmap_raw_read_range(map, PRCM_TCDM_RANGE, offset, + valp, sizeof(*valp)); +} + +static inline int prcmu_tcdm_writeb(struct regmap *map, uint offset, u8 val) +{ + return regmap_raw_write_range(map, PRCM_TCDM_RANGE, offset, + &val, sizeof(val)); +} + +static int prcmu_wait_i2c_mbx_ready(struct ab8500_priv *priv) +{ + uint val; + int ret; + + ret = regmap_read(priv->regmap, PRCM_ARM_IT1_VAL, &val); + if (ret) + return ret; + + if (val & PRCMU_I2C_MBOX_BIT) { + printf("ab8500: warning: PRCMU i2c mailbox was not acked\n"); + /* clear mailbox 5 ack irq */ + ret = regmap_write(priv->regmap, PRCM_ARM_IT1_CLR, + PRCMU_I2C_MBOX_BIT); + if (ret) + return ret; + } + + /* wait for on-going transaction, use 1s timeout */ + return regmap_read_poll_timeout(priv->regmap, PRCM_MBOX_CPU_VAL, val, + !(val & PRCMU_I2C_MBOX_BIT), 0, 1000); +} + +static int prcmu_wait_i2c_mbx_done(struct ab8500_priv *priv) +{ + uint val; + int ret; + + /* set interrupt to XP70 */ + ret = regmap_write(priv->regmap, PRCM_MBOX_CPU_SET, PRCMU_I2C_MBOX_BIT); + if (ret) + return ret; + + /* wait for mailbox 5 (i2c) ack, use 1s timeout */ + return regmap_read_poll_timeout(priv->regmap, PRCM_ARM_IT1_VAL, val, + (val & PRCMU_I2C_MBOX_BIT), 0, 1000); +} + +static int ab8500_transfer(struct udevice *dev, uint bank_reg, u8 *val, + u8 op, u8 expected_status) +{ + struct ab8500_priv *priv = dev_get_priv(dev); + u8 reg = bank_reg & 0xff; + u8 bank = bank_reg >> 8; + u8 status; + int ret; + + ret = prcmu_wait_i2c_mbx_ready(priv); + if (ret) + return ret; + + ret = prcmu_tcdm_writeb(priv->regmap, PRCM_MBOX_HEADER_REQ_MB5, 0); + if (ret) + return ret; + ret = prcmu_tcdm_writeb(priv->regmap, PRCM_REQ_MB5_I2C_SLAVE_OP, + PRCMU_I2C(bank) | op); + if (ret) + return ret; + ret = prcmu_tcdm_writeb(priv->regmap, PRCM_REQ_MB5_I2C_HW_BITS, + PRCMU_I2C_STOP_EN); + if (ret) + return ret; + ret = prcmu_tcdm_writeb(priv->regmap, PRCM_REQ_MB5_I2C_REG, reg); + if (ret) + return ret; + ret = prcmu_tcdm_writeb(priv->regmap, PRCM_REQ_MB5_I2C_VAL, *val); + if (ret) + return ret; + + ret = prcmu_wait_i2c_mbx_done(priv); + if (ret) { + printf("%s: mailbox request timed out\n", __func__); + return ret; + } + + /* read transfer result */ + ret = prcmu_tcdm_readb(priv->regmap, PRCM_ACK_MB5_I2C_STATUS, &status); + if (ret) + return ret; + ret = prcmu_tcdm_readb(priv->regmap, PRCM_ACK_MB5_I2C_VAL, val); + if (ret) + return ret; + + /* + * Clear mailbox 5 ack irq. Note that the transfer is already complete + * here so checking for errors does not make sense. Clearing the irq + * will be retried in prcmu_wait_i2c_mbx_ready() on the next transfer. + */ + regmap_write(priv->regmap, PRCM_ARM_IT1_CLR, PRCMU_I2C_MBOX_BIT); + + if (status != expected_status) { + /* + * AB8500 does not have the AB8500_MISC_IC_NAME_REG register, + * but we need to try reading it to detect AB8505. + * In case of an error, assume that we have AB8500. + */ + if (op == PRCMU_I2C_READ && bank_reg == AB8500_MISC_IC_NAME_REG) { + *val = AB8500_VERSION_AB8500; + return 0; + } + + printf("%s: return status %d\n", __func__, status); + return -EIO; + } + + return 0; +} + +static int ab8500_reg_count(struct udevice *dev) +{ + return AB8500_NUM_REGISTERS; +} + +static int ab8500_read(struct udevice *dev, uint reg, uint8_t *buf, int len) +{ + int ret; + + if (len != 1) + return -EINVAL; + + *buf = 0; + ret = ab8500_transfer(dev, reg, buf, PRCMU_I2C_READ, PRCMU_I2C_RD_OK); + if (ret) { + printf("%s failed: %d\n", __func__, ret); + return ret; + } + + return 0; +} + +static int ab8500_write(struct udevice *dev, uint reg, const uint8_t *buf, int len) +{ + int ret; + u8 val; + + if (len != 1) + return -EINVAL; + + val = *buf; + ret = ab8500_transfer(dev, reg, &val, PRCMU_I2C_WRITE, PRCMU_I2C_WR_OK); + if (ret) { + printf("%s failed: %d\n", __func__, ret); + return ret; + } + + return 0; +} + +static struct dm_pmic_ops ab8500_ops = { + .reg_count = ab8500_reg_count, + .read = ab8500_read, + .write = ab8500_write, +}; + +static int ab8500_probe(struct udevice *dev) +{ + struct ab8500_priv *priv = dev_get_priv(dev); + int ret; + + /* get regmap from the PRCMU parent device (syscon in U-Boot) */ + priv->regmap = syscon_get_regmap(dev->parent); + if (IS_ERR(priv->regmap)) + return PTR_ERR(priv->regmap); + + ret = pmic_reg_read(dev, AB8500_MISC_IC_NAME_REG); + if (ret < 0) { + printf("ab8500: failed to read chip version: %d\n", ret); + return ret; + } + priv->ab8500.version = ret; + + ret = pmic_reg_read(dev, AB8500_MISC_REV_REG); + if (ret < 0) { + printf("ab8500: failed to read chip id: %d\n", ret); + return ret; + } + priv->ab8500.chip_id = ret; + + debug("ab8500: version: %#x, chip id: %#x\n", + priv->ab8500.version, priv->ab8500.chip_id); + + return 0; +} + +static const struct udevice_id ab8500_ids[] = { + { .compatible = "stericsson,ab8500" }, + { } +}; + +U_BOOT_DRIVER(pmic_ab8500) = { + .name = "pmic_ab8500", + .id = UCLASS_PMIC, + .of_match = ab8500_ids, + .bind = dm_scan_fdt_dev, + .probe = ab8500_probe, + .ops = &ab8500_ops, + .priv_auto = sizeof(struct ab8500_priv), +}; diff --git a/drivers/reset/reset-uclass.c b/drivers/reset/reset-uclass.c index 8caa616ed9f..c09c009130d 100644 --- a/drivers/reset/reset-uclass.c +++ b/drivers/reset/reset-uclass.c @@ -325,6 +325,8 @@ struct reset_ctl_bulk *devm_reset_bulk_get_by_node(struct udevice *dev, bulk = devres_alloc(devm_reset_bulk_release, sizeof(struct reset_ctl_bulk), __GFP_ZERO); + + /* this looks like a leak, but devres takes care of it */ if (unlikely(!bulk)) return ERR_PTR(-ENOMEM); diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c index 2694d130b64..c5af995b4bd 100644 --- a/drivers/reset/reset-uniphier.c +++ b/drivers/reset/reset-uniphier.c @@ -50,6 +50,7 @@ static const struct uniphier_reset_data uniphier_pro4_sys_reset_data[] = { UNIPHIER_RESETX(12, 0x2000, 6), /* GIO */ UNIPHIER_RESETX(14, 0x2000, 17), /* USB30 */ UNIPHIER_RESETX(15, 0x2004, 17), /* USB31 */ + UNIPHIER_RESETX(24, 0x2008, 2), /* PCIE */ UNIPHIER_RESET_END, }; @@ -79,6 +80,7 @@ static const struct uniphier_reset_data uniphier_ld20_sys_reset_data[] = { UNIPHIER_RESETX(17, 0x200c, 13), /* USB30-PHY1 */ UNIPHIER_RESETX(18, 0x200c, 14), /* USB30-PHY2 */ UNIPHIER_RESETX(19, 0x200c, 15), /* USB30-PHY3 */ + UNIPHIER_RESETX(24, 0x200c, 4), /* PCIE */ UNIPHIER_RESET_END, }; @@ -95,6 +97,7 @@ static const struct uniphier_reset_data uniphier_pxs3_sys_reset_data[] = { UNIPHIER_RESETX(18, 0x200c, 20), /* USB30-PHY2 */ UNIPHIER_RESETX(20, 0x200c, 17), /* USB31-PHY0 */ UNIPHIER_RESETX(21, 0x200c, 19), /* USB31-PHY1 */ + UNIPHIER_RESETX(24, 0x200c, 3), /* PCIE */ UNIPHIER_RESET_END, }; diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index f668cf9050c..331a49ab599 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -7,7 +7,6 @@ obj-$(CONFIG_$(SPL_TPL_)DM_RTC) += rtc-uclass.o obj-$(CONFIG_RTC_AT91SAM9_RTT) += at91sam9_rtt.o -obj-y += rtc-lib.o obj-$(CONFIG_RTC_ARMADA38X) += armada38x.o obj-$(CONFIG_RTC_DAVINCI) += davinci.o obj-$(CONFIG_RTC_DS1302) += ds1302.o diff --git a/drivers/rtc/m41t62.c b/drivers/rtc/m41t62.c index 0a4e12d6982..8be532c3e31 100644 --- a/drivers/rtc/m41t62.c +++ b/drivers/rtc/m41t62.c @@ -213,13 +213,13 @@ static int m41t62_rtc_restart_osc(struct udevice *dev) /* 1. Set stop bit */ val |= M41T62_SEC_ST; - ret = dm_i2c_write(dev, M41T62_REG_ALARM_HOUR, &val, sizeof(val)); + ret = dm_i2c_write(dev, M41T62_REG_SEC, &val, sizeof(val)); if (ret) return ret; /* 2. Clear stop bit */ val &= ~M41T62_SEC_ST; - ret = dm_i2c_write(dev, M41T62_REG_ALARM_HOUR, &val, sizeof(val)); + ret = dm_i2c_write(dev, M41T62_REG_SEC, &val, sizeof(val)); if (ret) return ret; diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 961e3fb0314..93348c0929c 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -443,6 +443,7 @@ config DEBUG_UART_CLOCK int "UART input clock" depends on DEBUG_UART default 0 if DEBUG_UART_SANDBOX + default 0 if DEBUG_MVEBU_A3700_UART help The UART input clock determines the speed of the internal UART circuitry. The baud rate is derived from this by dividing the input diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c index 1cd410493b0..3d49c22a9da 100644 --- a/drivers/spi/ich.c +++ b/drivers/spi/ich.c @@ -114,7 +114,7 @@ static bool ich9_can_do_33mhz(struct udevice *dev) struct ich_spi_priv *priv = dev_get_priv(dev); u32 fdod, speed; - if (!CONFIG_IS_ENABLED(PCI)) + if (!CONFIG_IS_ENABLED(PCI) || !priv->pch) return false; /* Observe SPI Descriptor Component Section 0 */ dm_pci_write_config32(priv->pch, 0xb0, 0x1000); @@ -632,7 +632,7 @@ static int ich_spi_get_basics(struct udevice *bus, bool can_probe, if (device_get_uclass_id(pch) != UCLASS_PCH) { uclass_first_device(UCLASS_PCH, &pch); if (!pch) - return log_msg_ret("uclass", -EPROTOTYPE); + ; /* ignore this error since we don't need it */ } } diff --git a/drivers/timer/nomadik-mtu-timer.c b/drivers/timer/nomadik-mtu-timer.c index 417b419d467..4d24de14ae6 100644 --- a/drivers/timer/nomadik-mtu-timer.c +++ b/drivers/timer/nomadik-mtu-timer.c @@ -67,14 +67,11 @@ static int nomadik_mtu_probe(struct udevice *dev) struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev); struct nomadik_mtu_priv *priv = dev_get_priv(dev); struct nomadik_mtu_regs *mtu; - fdt_addr_t addr; u32 prescale; - addr = dev_read_addr(dev); - if (addr == FDT_ADDR_T_NONE) + mtu = dev_read_addr_ptr(dev); + if (!mtu) return -EINVAL; - - mtu = (struct nomadik_mtu_regs *)addr; priv->timer = mtu->timers; /* Use first timer */ if (!uc_priv->clock_rate) diff --git a/drivers/tpm/cr50_i2c.c b/drivers/tpm/cr50_i2c.c index 76432bdec1f..7a2b5a4faa5 100644 --- a/drivers/tpm/cr50_i2c.c +++ b/drivers/tpm/cr50_i2c.c @@ -18,8 +18,6 @@ #include <acpi/acpi_device.h> #include <asm/gpio.h> #include <asm/io.h> -#include <asm/arch/iomap.h> -#include <asm/arch/pm.h> #include <linux/delay.h> #include <dm/acpi.h> diff --git a/drivers/usb/musb-new/Kconfig b/drivers/usb/musb-new/Kconfig index fd6f4109b0e..81ceea97404 100644 --- a/drivers/usb/musb-new/Kconfig +++ b/drivers/usb/musb-new/Kconfig @@ -72,6 +72,15 @@ config USB_MUSB_SUNXI Say y here to enable support for the sunxi OTG / DRC USB controller used on almost all sunxi boards. +config USB_MUSB_UX500 + bool "Enable ST-Ericsson Ux500 USB controller" + depends on DM_USB && DM_USB_GADGET && ARCH_U8500 + default y + help + Say y to enable support for the MUSB OTG USB controller used in + ST-Ericsson Ux500. The driver supports either gadget or host mode + based on the selection of CONFIG_USB_MUSB_HOST. + config USB_MUSB_DISABLE_BULK_COMBINE_SPLIT bool "Disable MUSB bulk split/combine" default y @@ -85,7 +94,7 @@ endif config USB_MUSB_PIO_ONLY bool "Disable DMA (always use PIO)" - default y if USB_MUSB_AM35X || USB_MUSB_PIC32 || USB_MUSB_OMAP2PLUS || USB_MUSB_DSPS || USB_MUSB_SUNXI || USB_MUSB_MT85XX + default y if USB_MUSB_AM35X || USB_MUSB_PIC32 || USB_MUSB_OMAP2PLUS || USB_MUSB_DSPS || USB_MUSB_SUNXI || USB_MUSB_MT85XX || USB_MUSB_UX500 help All data is copied between memory and FIFO by the CPU. DMA controllers are ignored. diff --git a/drivers/usb/musb-new/Makefile b/drivers/usb/musb-new/Makefile index 6355eb12dd9..396ff02654b 100644 --- a/drivers/usb/musb-new/Makefile +++ b/drivers/usb/musb-new/Makefile @@ -13,6 +13,7 @@ obj-$(CONFIG_USB_MUSB_OMAP2PLUS) += omap2430.o obj-$(CONFIG_USB_MUSB_PIC32) += pic32.o obj-$(CONFIG_USB_MUSB_SUNXI) += sunxi.o obj-$(CONFIG_USB_MUSB_TI) += ti-musb.o +obj-$(CONFIG_USB_MUSB_UX500) += ux500.o ccflags-y := $(call cc-option,-Wno-unused-variable) \ $(call cc-option,-Wno-unused-but-set-variable) \ diff --git a/drivers/usb/musb-new/musb_core.c b/drivers/usb/musb-new/musb_core.c index 22811a5efb2..18d9bc805f8 100644 --- a/drivers/usb/musb-new/musb_core.c +++ b/drivers/usb/musb-new/musb_core.c @@ -1526,7 +1526,7 @@ static int __devinit musb_core_init(u16 musb_type, struct musb *musb) /*-------------------------------------------------------------------------*/ #if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_SOC_OMAP3430) || \ - defined(CONFIG_ARCH_OMAP4) + defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_ARCH_U8500) static irqreturn_t generic_interrupt(int irq, void *__hci) { diff --git a/drivers/usb/musb-new/ux500.c b/drivers/usb/musb-new/ux500.c new file mode 100644 index 00000000000..57c7d5630d3 --- /dev/null +++ b/drivers/usb/musb-new/ux500.c @@ -0,0 +1,179 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* Copyright (C) 2019 Stephan Gerhold */ + +#include <common.h> +#include <dm.h> +#include <generic-phy.h> +#include <dm/device_compat.h> +#include "musb_uboot.h" + +static struct musb_hdrc_config ux500_musb_hdrc_config = { + .multipoint = true, + .dyn_fifo = true, + .num_eps = 16, + .ram_bits = 16, +}; + +struct ux500_glue { + struct musb_host_data mdata; + struct device dev; + struct phy phy; + bool enabled; +}; +#define to_ux500_glue(d) container_of(d, struct ux500_glue, dev) + +static int ux500_musb_enable(struct musb *musb) +{ + struct ux500_glue *glue = to_ux500_glue(musb->controller); + int ret; + + if (glue->enabled) + return 0; + + ret = generic_phy_power_on(&glue->phy); + if (ret) { + printf("%s: failed to power on USB PHY\n", __func__); + return ret; + } + + glue->enabled = true; + return 0; +} + +static void ux500_musb_disable(struct musb *musb) +{ + struct ux500_glue *glue = to_ux500_glue(musb->controller); + int ret; + + if (!glue->enabled) + return; + + ret = generic_phy_power_off(&glue->phy); + if (ret) { + printf("%s: failed to power off USB PHY\n", __func__); + return; + } + + glue->enabled = false; +} + +static int ux500_musb_init(struct musb *musb) +{ + struct ux500_glue *glue = to_ux500_glue(musb->controller); + int ret; + + ret = generic_phy_init(&glue->phy); + if (ret) { + printf("%s: failed to init USB PHY\n", __func__); + return ret; + } + + return 0; +} + +static int ux500_musb_exit(struct musb *musb) +{ + struct ux500_glue *glue = to_ux500_glue(musb->controller); + int ret; + + ret = generic_phy_exit(&glue->phy); + if (ret) { + printf("%s: failed to exit USB PHY\n", __func__); + return ret; + } + + return 0; +} + +static const struct musb_platform_ops ux500_musb_ops = { + .init = ux500_musb_init, + .exit = ux500_musb_exit, + .enable = ux500_musb_enable, + .disable = ux500_musb_disable, +}; + +int dm_usb_gadget_handle_interrupts(struct udevice *dev) +{ + struct ux500_glue *glue = dev_get_priv(dev); + + glue->mdata.host->isr(0, glue->mdata.host); + return 0; +} + +static int ux500_musb_probe(struct udevice *dev) +{ +#ifdef CONFIG_USB_MUSB_HOST + struct usb_bus_priv *priv = dev_get_uclass_priv(dev); +#endif + struct ux500_glue *glue = dev_get_priv(dev); + struct musb_host_data *host = &glue->mdata; + struct musb_hdrc_platform_data pdata; + void *base = dev_read_addr_ptr(dev); + int ret; + + if (!base) + return -EINVAL; + + ret = generic_phy_get_by_name(dev, "usb", &glue->phy); + if (ret) { + dev_err(dev, "failed to get USB PHY: %d\n", ret); + return ret; + } + + memset(&pdata, 0, sizeof(pdata)); + pdata.platform_ops = &ux500_musb_ops; + pdata.config = &ux500_musb_hdrc_config; + +#ifdef CONFIG_USB_MUSB_HOST + priv->desc_before_addr = true; + pdata.mode = MUSB_HOST; + + host->host = musb_init_controller(&pdata, &glue->dev, base); + if (!host->host) + return -EIO; + + return musb_lowlevel_init(host); +#else + pdata.mode = MUSB_PERIPHERAL; + host->host = musb_init_controller(&pdata, &glue->dev, base); + if (!host->host) + return -EIO; + + return usb_add_gadget_udc(&glue->dev, &host->host->g); +#endif +} + +static int ux500_musb_remove(struct udevice *dev) +{ + struct ux500_glue *glue = dev_get_priv(dev); + struct musb_host_data *host = &glue->mdata; + + usb_del_gadget_udc(&host->host->g); + musb_stop(host->host); + free(host->host); + host->host = NULL; + + return 0; +} + +static const struct udevice_id ux500_musb_ids[] = { + { .compatible = "stericsson,db8500-musb" }, + { } +}; + +U_BOOT_DRIVER(ux500_musb) = { + .name = "ux500-musb", +#ifdef CONFIG_USB_MUSB_HOST + .id = UCLASS_USB, +#else + .id = UCLASS_USB_GADGET_GENERIC, +#endif + .of_match = ux500_musb_ids, + .probe = ux500_musb_probe, + .remove = ux500_musb_remove, +#ifdef CONFIG_USB_MUSB_HOST + .ops = &musb_usb_ops, +#endif + .plat_auto = sizeof(struct usb_plat), + .priv_auto = sizeof(struct ux500_glue), +}; diff --git a/drivers/video/pwm_backlight.c b/drivers/video/pwm_backlight.c index 4c86215bd73..d7c096923b3 100644 --- a/drivers/video/pwm_backlight.c +++ b/drivers/video/pwm_backlight.c @@ -235,8 +235,10 @@ static int pwm_backlight_of_to_plat(struct udevice *dev) priv->levels = malloc(len); if (!priv->levels) return log_ret(-ENOMEM); - dev_read_u32_array(dev, "brightness-levels", priv->levels, - count); + ret = dev_read_u32_array(dev, "brightness-levels", priv->levels, + count); + if (ret) + return log_msg_ret("levels", ret); priv->num_levels = count; priv->default_level = priv->levels[index]; priv->max_level = priv->levels[count - 1]; diff --git a/drivers/watchdog/designware_wdt.c b/drivers/watchdog/designware_wdt.c index 9e5487168cd..afed81e6c65 100644 --- a/drivers/watchdog/designware_wdt.c +++ b/drivers/watchdog/designware_wdt.c @@ -22,6 +22,7 @@ struct designware_wdt_priv { void __iomem *base; unsigned int clk_khz; + struct reset_ctl_bulk *resets; }; /* @@ -95,6 +96,18 @@ static int designware_wdt_stop(struct udevice *dev) designware_wdt_reset(dev); writel(0, priv->base + DW_WDT_CR); + if (CONFIG_IS_ENABLED(DM_RESET)) { + int ret; + + ret = reset_assert_bulk(priv->resets); + if (ret) + return ret; + + ret = reset_deassert_bulk(priv->resets); + if (ret) + return ret; + } + return 0; } @@ -143,13 +156,11 @@ static int designware_wdt_probe(struct udevice *dev) #endif if (CONFIG_IS_ENABLED(DM_RESET)) { - struct reset_ctl_bulk resets; - - ret = reset_get_bulk(dev, &resets); + ret = reset_get_bulk(dev, priv->resets); if (ret) goto err; - ret = reset_deassert_bulk(&resets); + ret = reset_deassert_bulk(priv->resets); if (ret) goto err; } diff --git a/drivers/watchdog/wdt-uclass.c b/drivers/watchdog/wdt-uclass.c index a0c2429e5a4..17334dbda6c 100644 --- a/drivers/watchdog/wdt-uclass.c +++ b/drivers/watchdog/wdt-uclass.c @@ -53,7 +53,7 @@ int initr_watchdog(void) 4 * reset_period) / 4; } - if (!CONFIG_IS_ENABLED(WATCHDOG_AUTOSTART)) { + if (!IS_ENABLED(CONFIG_WATCHDOG_AUTOSTART)) { printf("WDT: Not starting\n"); return 0; } diff --git a/fs/cbfs/cbfs.c b/fs/cbfs/cbfs.c index 415ea28b871..3e905c74e58 100644 --- a/fs/cbfs/cbfs.c +++ b/fs/cbfs/cbfs.c @@ -167,6 +167,8 @@ static int file_cbfs_next_file(struct cbfs_priv *priv, void *start, int size, } swap_file_header(&header, file_header); + if (header.offset >= size) + return log_msg_ret("range", -E2BIG); ret = fill_node(node, start, &header); if (ret) { priv->result = CBFS_BAD_FILE; diff --git a/fs/fat/fat.c b/fs/fat/fat.c index c561d82b351..7021138b987 100644 --- a/fs/fat/fat.c +++ b/fs/fat/fat.c @@ -1187,6 +1187,28 @@ out: return ret == 0; } +/** + * fat2rtc() - convert FAT time stamp to RTC file stamp + * + * @date: FAT date + * @time: FAT time + * @tm: RTC time stamp + */ +static void __maybe_unused fat2rtc(u16 date, u16 time, struct rtc_time *tm) +{ + tm->tm_mday = date & 0x1f; + tm->tm_mon = (date & 0x1e0) >> 4; + tm->tm_year = (date >> 9) + 1980; + + tm->tm_sec = (time & 0x1f) << 1; + tm->tm_min = (time & 0x7e0) >> 5; + tm->tm_hour = time >> 11; + + rtc_calc_weekday(tm); + tm->tm_yday = 0; + tm->tm_isdst = 0; +} + int fat_size(const char *filename, loff_t *size) { fsdata fsdata; @@ -1325,7 +1347,15 @@ int fat_readdir(struct fs_dir_stream *dirs, struct fs_dirent **dentp) memset(dent, 0, sizeof(*dent)); strcpy(dent->name, dir->itr.name); - + if (CONFIG_IS_ENABLED(EFI_LOADER)) { + dent->attr = dir->itr.dent->attr; + fat2rtc(le16_to_cpu(dir->itr.dent->cdate), + le16_to_cpu(dir->itr.dent->ctime), &dent->create_time); + fat2rtc(le16_to_cpu(dir->itr.dent->date), + le16_to_cpu(dir->itr.dent->time), &dent->change_time); + fat2rtc(le16_to_cpu(dir->itr.dent->adate), + 0, &dent->access_time); + } if (fat_itr_isdir(&dir->itr)) { dent->type = FS_DT_DIR; } else { diff --git a/include/configs/stemmy.h b/include/configs/stemmy.h index 922eec43ee1..b94ef91c2ba 100644 --- a/include/configs/stemmy.h +++ b/include/configs/stemmy.h @@ -7,23 +7,23 @@ #include <linux/sizes.h> -#define CONFIG_SKIP_LOWLEVEL_INIT /* Loaded by another bootloader */ -#define CONFIG_SYS_MALLOC_LEN SZ_2M +/* + * The "stemmy" U-Boot port is designed to be chainloaded by the Samsung + * bootloader on devices based on ST-Ericsson Ux500. Therefore, we skip most + * low-level initialization and rely on configuration provided by the Samsung + * bootloader. New images are loaded at the same address for compatibility. + */ +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_TEXT_BASE -/* Physical Memory Map */ -#define PHYS_SDRAM_1 0x00000000 /* DDR-SDRAM Bank #1 */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_SDRAM_SIZE SZ_1G -#define CONFIG_SYS_INIT_RAM_SIZE 0x00100000 -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_MALLOC_LEN SZ_2M /* FIXME: This should be loaded from device tree... */ #define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE 0xa0412000 -#define CONFIG_SYS_LOAD_ADDR 0x00100000 +/* Generate initrd atag for downstream kernel (others are copied in stemmy.c) */ +#define CONFIG_INITRD_TAG #endif diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h index 440efa1a55a..2e7f49e7bb9 100644 --- a/include/configs/stm32mp1.h +++ b/include/configs/stm32mp1.h @@ -155,7 +155,7 @@ /* * memory layout for 32M uncompressed/compressed kernel, - * 1M fdt, 1M script, 1M pxe and 1M for splashimage + * 1M fdt, 1M script, 1M pxe and 1M for overlay * and the ramdisk at the end. */ #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -163,7 +163,7 @@ "fdt_addr_r=0xc4000000\0" \ "scriptaddr=0xc4100000\0" \ "pxefile_addr_r=0xc4200000\0" \ - "splashimage=0xc4300000\0" \ + "fdtoverlay_addr_r=0xc4300000\0" \ "ramdisk_addr_r=0xc4400000\0" \ "altbootcmd=run bootcmd\0" \ "env_check=if env info -p -d -q; then env save; fi\0" \ diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index bad4e41372b..12028e53e94 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -210,4 +210,6 @@ #define CONFIG_SPL_PAD_TO 0x20000 +#define CONFIG_SYS_PCI_64BIT + #endif /* __CONFIG_UNIPHIER_H__ */ diff --git a/include/dt-bindings/pci/pci.h b/include/dt-bindings/pci/pci.h new file mode 100644 index 00000000000..e7290277b90 --- /dev/null +++ b/include/dt-bindings/pci/pci.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * This header provides common constants for PCI bindings. + */ + +#ifndef _DT_BINDINGS_PCI_PCI_H +#define _DT_BINDINGS_PCI_PCI_H + +/* Encode a vendor and device ID into a single cell */ +#define PCI_VENDEV(v, d) (((v) << 16) | (d)) + +#endif /* _DT_BINDINGS_PCI_PCI_H */ diff --git a/include/fs.h b/include/fs.h index 0794b50d102..1c79e299fdd 100644 --- a/include/fs.h +++ b/include/fs.h @@ -6,6 +6,7 @@ #define _FS_H #include <common.h> +#include <rtc.h> struct cmd_tbl; @@ -160,13 +161,26 @@ int fs_write(const char *filename, ulong addr, loff_t offset, loff_t len, #define FS_DT_REG 8 /* regular file */ #define FS_DT_LNK 10 /* symbolic link */ -/* - * A directory entry, returned by fs_readdir(). Returns information +/** + * struct fs_dirent - directory entry + * + * A directory entry, returned by fs_readdir(). Returns information * about the file/directory at the current directory entry position. */ struct fs_dirent { - unsigned type; /* one of FS_DT_x (not a mask) */ - loff_t size; /* size in bytes */ + /** @type: one of FS_DT_x (not a mask) */ + unsigned int type; + /** @size: file size */ + loff_t size; + /** @flags: attribute flags (FS_ATTR_*) */ + u32 attr; + /** create_time: time of creation */ + struct rtc_time create_time; + /** access_time: time of last access */ + struct rtc_time access_time; + /** change_time: time of last modification */ + struct rtc_time change_time; + /** name: file name */ char name[256]; }; diff --git a/include/mmc.h b/include/mmc.h index 6f943e78b74..0bf19de20e5 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -900,9 +900,10 @@ int mmc_set_bkops_enable(struct mmc *mmc); * the presence of SD/eMMC when no card detect logic is available. * * @param mmc Pointer to a MMC device struct + * @param quiet Be quiet, do not print error messages when card is not detected. * @return 0 on success, <0 on error. */ -int mmc_get_op_cond(struct mmc *mmc); +int mmc_get_op_cond(struct mmc *mmc, bool quiet); /** * Start device initialization and return immediately; it does not block on diff --git a/include/pci.h b/include/pci.h index 8e62235bf40..258c8f831ce 100644 --- a/include/pci.h +++ b/include/pci.h @@ -578,7 +578,6 @@ typedef int pci_dev_t; #define PCI_MASK_BUS(bdf) ((bdf) & 0xffff) #define PCI_ADD_BUS(bus, devfn) (((bus) << 16) | (devfn)) #define PCI_BDF(b, d, f) ((b) << 16 | PCI_DEVFN(d, f)) -#define PCI_VENDEV(v, d) (((v) << 16) | (d)) #define PCI_ANY_ID (~0) /* Convert from Linux format to U-Boot format */ @@ -1064,7 +1063,7 @@ int pci_get_ff(enum pci_size_t size); * @devp: Returns matching device if found * @return 0 if found, -ENODEV if not */ -int pci_bus_find_devices(struct udevice *bus, struct pci_device_id *ids, +int pci_bus_find_devices(struct udevice *bus, const struct pci_device_id *ids, int *indexp, struct udevice **devp); /** @@ -1076,7 +1075,7 @@ int pci_bus_find_devices(struct udevice *bus, struct pci_device_id *ids, * @devp: Returns matching device if found * @return 0 if found, -ENODEV if not */ -int pci_find_device_id(struct pci_device_id *ids, int index, +int pci_find_device_id(const struct pci_device_id *ids, int index, struct udevice **devp); /** diff --git a/include/power/ab8500.h b/include/power/ab8500.h new file mode 100644 index 00000000000..157eb4a5b1e --- /dev/null +++ b/include/power/ab8500.h @@ -0,0 +1,125 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Based on include/linux/mfd/abx500/ab8500.h from Linux + * Copyright (C) ST-Ericsson SA 2010 + * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> + */ + +#ifndef _PMIC_AB8500_H_ +#define _PMIC_AB8500_H_ + +/* + * AB IC versions + * + * AB8500_VERSION_AB8500 should be 0xFF but will never be read as need a + * non-supported multi-byte I2C access via PRCMU. Set to 0x00 to ease the + * print of version string. + */ +enum ab8500_version { + AB8500_VERSION_AB8500 = 0x0, + AB8500_VERSION_AB8505 = 0x1, + AB8500_VERSION_AB9540 = 0x2, + AB8500_VERSION_AB8540 = 0x4, + AB8500_VERSION_UNDEFINED, +}; + +/* AB8500 CIDs*/ +#define AB8500_CUTEARLY 0x00 +#define AB8500_CUT1P0 0x10 +#define AB8500_CUT1P1 0x11 +#define AB8500_CUT1P2 0x12 /* Only valid for AB8540 */ +#define AB8500_CUT2P0 0x20 +#define AB8500_CUT3P0 0x30 +#define AB8500_CUT3P3 0x33 + +/* + * AB8500 bank addresses + */ +#define AB8500_BANK(bank, reg) (((bank) << 8) | (reg)) +#define AB8500_M_FSM_RANK(reg) AB8500_BANK(0x0, reg) +#define AB8500_SYS_CTRL1_BLOCK(reg) AB8500_BANK(0x1, reg) +#define AB8500_SYS_CTRL2_BLOCK(reg) AB8500_BANK(0x2, reg) +#define AB8500_REGU_CTRL1(reg) AB8500_BANK(0x3, reg) +#define AB8500_REGU_CTRL2(reg) AB8500_BANK(0x4, reg) +#define AB8500_USB(reg) AB8500_BANK(0x5, reg) +#define AB8500_TVOUT(reg) AB8500_BANK(0x6, reg) +#define AB8500_DBI(reg) AB8500_BANK(0x7, reg) +#define AB8500_ECI_AV_ACC(reg) AB8500_BANK(0x8, reg) +#define AB8500_RESERVED(reg) AB8500_BANK(0x9, reg) +#define AB8500_GPADC(reg) AB8500_BANK(0xA, reg) +#define AB8500_CHARGER(reg) AB8500_BANK(0xB, reg) +#define AB8500_GAS_GAUGE(reg) AB8500_BANK(0xC, reg) +#define AB8500_AUDIO(reg) AB8500_BANK(0xD, reg) +#define AB8500_INTERRUPT(reg) AB8500_BANK(0xE, reg) +#define AB8500_RTC(reg) AB8500_BANK(0xF, reg) +#define AB8500_GPIO(reg) AB8500_BANK(0x10, reg) +#define AB8500_MISC(reg) AB8500_BANK(0x10, reg) +#define AB8500_DEVELOPMENT(reg) AB8500_BANK(0x11, reg) +#define AB8500_DEBUG(reg) AB8500_BANK(0x12, reg) +#define AB8500_PROD_TEST(reg) AB8500_BANK(0x13, reg) +#define AB8500_STE_TEST(reg) AB8500_BANK(0x14, reg) +#define AB8500_OTP_EMUL(reg) AB8500_BANK(0x15, reg) + +#define AB8500_NUM_BANKS 0x16 +#define AB8500_NUM_REGISTERS AB8500_BANK(AB8500_NUM_BANKS, 0) + +struct ab8500 { + enum ab8500_version version; + u8 chip_id; +}; + +static inline int is_ab8500(struct ab8500 *ab) +{ + return ab->version == AB8500_VERSION_AB8500; +} + +static inline int is_ab8505(struct ab8500 *ab) +{ + return ab->version == AB8500_VERSION_AB8505; +} + +/* exclude also ab8505, ab9540... */ +static inline int is_ab8500_1p0_or_earlier(struct ab8500 *ab) +{ + return (is_ab8500(ab) && (ab->chip_id <= AB8500_CUT1P0)); +} + +/* exclude also ab8505, ab9540... */ +static inline int is_ab8500_1p1_or_earlier(struct ab8500 *ab) +{ + return (is_ab8500(ab) && (ab->chip_id <= AB8500_CUT1P1)); +} + +/* exclude also ab8505, ab9540... */ +static inline int is_ab8500_2p0_or_earlier(struct ab8500 *ab) +{ + return (is_ab8500(ab) && (ab->chip_id <= AB8500_CUT2P0)); +} + +static inline int is_ab8500_3p3_or_earlier(struct ab8500 *ab) +{ + return (is_ab8500(ab) && (ab->chip_id <= AB8500_CUT3P3)); +} + +/* exclude also ab8505, ab9540... */ +static inline int is_ab8500_2p0(struct ab8500 *ab) +{ + return (is_ab8500(ab) && (ab->chip_id == AB8500_CUT2P0)); +} + +static inline int is_ab8505_1p0_or_earlier(struct ab8500 *ab) +{ + return (is_ab8505(ab) && (ab->chip_id <= AB8500_CUT1P0)); +} + +static inline int is_ab8505_2p0(struct ab8500 *ab) +{ + return (is_ab8505(ab) && (ab->chip_id == AB8500_CUT2P0)); +} + +static inline int is_ab8505_2p0_earlier(struct ab8500 *ab) +{ + return (is_ab8505(ab) && (ab->chip_id < AB8500_CUT2P0)); +} + +#endif diff --git a/lib/Makefile b/lib/Makefile index 881034f4ae3..d8055d36d6e 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -135,6 +135,7 @@ obj-$(CONFIG_SSCANF) += sscanf.o endif obj-y += date.o +obj-y += rtc-lib.o obj-$(CONFIG_LIB_ELF) += elf.o # diff --git a/lib/date.c b/lib/date.c index 0456de78ab1..c589d9ed3a2 100644 --- a/lib/date.c +++ b/lib/date.c @@ -10,8 +10,6 @@ #include <rtc.h> #include <linux/time.h> -#if defined(CONFIG_LIB_DATE) || defined(CONFIG_TIMESTAMP) - #define FEBRUARY 2 #define STARTOFTIME 1970 #define SECDAY 86400L @@ -97,9 +95,6 @@ unsigned long rtc_mktime(const struct rtc_time *tm) return (hours * 60 + tm->tm_min) * 60 + tm->tm_sec; } -#endif /* CONFIG_LIB_DATE || CONFIG_TIMESTAMP */ - -#ifdef CONFIG_LIB_DATE /* for compatibility with linux code */ time64_t mktime64(const unsigned int year, const unsigned int mon, const unsigned int day, const unsigned int hour, @@ -116,4 +111,3 @@ time64_t mktime64(const unsigned int year, const unsigned int mon, return (time64_t)rtc_mktime((const struct rtc_time *)&time); } -#endif diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c index 50bed32bfb3..b878e71438b 100644 --- a/lib/efi_loader/efi_capsule.c +++ b/lib/efi_loader/efi_capsule.c @@ -6,6 +6,8 @@ * Author: AKASHI Takahiro */ +#define LOG_CATEGORY LOGC_EFI + #include <common.h> #include <efi_loader.h> #include <efi_variable.h> @@ -95,13 +97,25 @@ void set_capsule_result(int index, struct efi_capsule_header *capsule, else memset(&result.capsule_processed, 0, sizeof(time)); result.capsule_status = return_status; - ret = efi_set_variable(variable_name16, &efi_guid_capsule_report, - EFI_VARIABLE_NON_VOLATILE | - EFI_VARIABLE_BOOTSERVICE_ACCESS | - EFI_VARIABLE_RUNTIME_ACCESS, - sizeof(result), &result); - if (ret) - log_err("EFI: creating %ls failed\n", variable_name16); + ret = efi_set_variable_int(variable_name16, &efi_guid_capsule_report, + EFI_VARIABLE_NON_VOLATILE | + EFI_VARIABLE_BOOTSERVICE_ACCESS | + EFI_VARIABLE_RUNTIME_ACCESS, + sizeof(result), &result, false); + if (ret != EFI_SUCCESS) { + log_err("Setting %ls failed\n", variable_name16); + return; + } + + /* Variable CapsuleLast must not include terminating 0x0000 */ + ret = efi_set_variable_int(L"CapsuleLast", &efi_guid_capsule_report, + EFI_VARIABLE_READ_ONLY | + EFI_VARIABLE_NON_VOLATILE | + EFI_VARIABLE_BOOTSERVICE_ACCESS | + EFI_VARIABLE_RUNTIME_ACCESS, + 22, variable_name16, false); + if (ret != EFI_SUCCESS) + log_err("Setting %ls failed\n", L"CapsuleLast"); } #ifdef CONFIG_EFI_CAPSULE_FIRMWARE_MANAGEMENT @@ -361,7 +375,7 @@ static efi_status_t efi_capsule_update_firmware( /* sanity check */ if ((capsule->item_offset_list[item] + sizeof(*image) >= capsule_size)) { - log_err("EFI: A capsule has not enough data\n"); + log_err("Capsule does not have enough data\n"); ret = EFI_INVALID_PARAMETER; goto out; } @@ -379,7 +393,7 @@ static efi_status_t efi_capsule_update_firmware( image->update_hardware_instance, handles, no_handles); if (!fmp) { - log_err("EFI Capsule: driver not found for firmware type: %pUl, hardware instance: %lld\n", + log_err("FMP driver not found for firmware type %pUl, hardware instance %lld\n", &image->update_image_type_id, image->update_hardware_instance); ret = EFI_UNSUPPORTED; @@ -397,7 +411,7 @@ static efi_status_t efi_capsule_update_firmware( vendor_code, NULL, &abort_reason)); if (ret != EFI_SUCCESS) { - log_err("EFI Capsule: firmware update failed: %ls\n", + log_err("Firmware update failed: %ls\n", abort_reason); efi_free_pool(abort_reason); goto out; @@ -453,7 +467,7 @@ efi_status_t EFIAPI efi_update_capsule( /* sanity check */ if (capsule->header_size < sizeof(*capsule) || capsule->capsule_image_size < sizeof(*capsule)) { - log_err("EFI: A capsule has not enough data\n"); + log_err("Capsule does not have enough data\n"); continue; } @@ -463,7 +477,7 @@ efi_status_t EFIAPI efi_update_capsule( &efi_guid_firmware_management_capsule_id)) { ret = efi_capsule_update_firmware(capsule); } else { - log_err("EFI: not support capsule type: %pUl\n", + log_err("Unsupported capsule type: %pUl\n", &capsule->capsule_guid); ret = EFI_UNSUPPORTED; } @@ -476,7 +490,7 @@ efi_status_t EFIAPI efi_update_capsule( /* Rebuild the ESRT to reflect any updated FW images. */ ret = efi_esrt_populate(); if (ret != EFI_SUCCESS) - log_warning("EFI Capsule: failed to update ESRT\n"); + log_warning("ESRT update failed\n"); } out: @@ -632,7 +646,7 @@ static efi_status_t find_boot_device(void) ret = get_dp_device(boot_var16, &boot_dev); if (ret == EFI_SUCCESS) { if (device_is_present_and_system_part(boot_dev)) { - goto out; + goto found; } else { efi_free_pool(boot_dev); boot_dev = NULL; @@ -675,11 +689,12 @@ skip: efi_free_pool(boot_dev); boot_dev = NULL; } +found: if (boot_dev) { u16 *path_str; path_str = efi_dp_str(boot_dev); - log_debug("EFI Capsule: bootdev is %ls\n", path_str); + log_debug("Boot device %ls\n", path_str); efi_free_pool(path_str); volume = efi_fs_from_path(boot_dev); @@ -720,7 +735,7 @@ static efi_status_t efi_capsule_scan_dir(u16 ***files, unsigned int *num) ret = find_boot_device(); if (ret == EFI_NOT_FOUND) { - log_debug("EFI Capsule: bootdev is not set\n"); + log_debug("Boot device is not set\n"); *num = 0; return EFI_SUCCESS; } else if (ret != EFI_SUCCESS) { @@ -988,7 +1003,6 @@ efi_status_t efi_launch_capsules(void) struct efi_capsule_header *capsule = NULL; u16 **files; unsigned int nfiles, index, i; - u16 variable_name16[12]; efi_status_t ret; if (!check_run_capsules()) @@ -1011,19 +1025,19 @@ efi_status_t efi_launch_capsules(void) /* Launch capsules */ for (i = 0, ++index; i < nfiles; i++, index++) { - log_debug("capsule from %ls ...\n", files[i]); + log_debug("Applying %ls\n", files[i]); if (index > 0xffff) index = 0; ret = efi_capsule_read_file(files[i], &capsule); if (ret == EFI_SUCCESS) { ret = EFI_CALL(efi_update_capsule(&capsule, 1, 0)); if (ret != EFI_SUCCESS) - log_err("EFI Capsule update failed at %ls\n", + log_err("Applying capsule %ls failed\n", files[i]); free(capsule); } else { - log_err("EFI: reading capsule failed: %ls\n", files[i]); + log_err("Reading capsule %ls failed\n", files[i]); } /* create CapsuleXXXX */ set_capsule_result(index, capsule, ret); @@ -1031,7 +1045,7 @@ efi_status_t efi_launch_capsules(void) /* delete a capsule either in case of success or failure */ ret = efi_capsule_delete_file(files[i]); if (ret != EFI_SUCCESS) - log_err("EFI: deleting a capsule file failed: %ls\n", + log_err("Deleting capsule %ls failed\n", files[i]); } efi_capsule_scan_done(); @@ -1040,16 +1054,6 @@ efi_status_t efi_launch_capsules(void) free(files[i]); free(files); - /* CapsuleLast */ - efi_create_indexed_name(variable_name16, sizeof(variable_name16), - "Capsule", index - 1); - efi_set_variable_int(L"CapsuleLast", &efi_guid_capsule_report, - EFI_VARIABLE_READ_ONLY | - EFI_VARIABLE_NON_VOLATILE | - EFI_VARIABLE_BOOTSERVICE_ACCESS | - EFI_VARIABLE_RUNTIME_ACCESS, - 22, variable_name16, false); - return ret; } #endif /* CONFIG_EFI_CAPSULE_ON_DISK */ diff --git a/lib/efi_loader/efi_file.c b/lib/efi_loader/efi_file.c index 6b3f5962be2..6299fcbbf4e 100644 --- a/lib/efi_loader/efi_file.c +++ b/lib/efi_loader/efi_file.c @@ -480,6 +480,17 @@ static efi_status_t file_read(struct file_handle *fh, u64 *buffer_size, return EFI_SUCCESS; } +static void rtc2efi(struct efi_time *time, struct rtc_time *tm) +{ + memset(time, 0, sizeof(struct efi_time)); + time->year = tm->tm_year; + time->month = tm->tm_mon; + time->day = tm->tm_mday; + time->hour = tm->tm_hour; + time->minute = tm->tm_min; + time->second = tm->tm_sec; +} + static efi_status_t dir_read(struct file_handle *fh, u64 *buffer_size, void *buffer) { @@ -535,6 +546,10 @@ static efi_status_t dir_read(struct file_handle *fh, u64 *buffer_size, info->size = required_size; info->file_size = dent->size; info->physical_size = dent->size; + info->attribute = dent->attr; + rtc2efi(&info->create_time, &dent->create_time); + rtc2efi(&info->modification_time, &dent->change_time); + rtc2efi(&info->last_access_time, &dent->access_time); if (dent->type == FS_DT_DIR) info->attribute |= EFI_FILE_DIRECTORY; diff --git a/drivers/rtc/rtc-lib.c b/lib/rtc-lib.c index 1f7bdade298..1f7bdade298 100644 --- a/drivers/rtc/rtc-lib.c +++ b/lib/rtc-lib.c diff --git a/lib/tpm-common.c b/lib/tpm-common.c index 4277846fdd0..82ffdc5341b 100644 --- a/lib/tpm-common.c +++ b/lib/tpm-common.c @@ -176,6 +176,11 @@ u32 tpm_sendrecv_command(struct udevice *dev, const void *command, } size = tpm_command_size(command); + + /* sanity check, which also helps coverity */ + if (size > COMMAND_BUFFER_SIZE) + return log_msg_ret("size", -E2BIG); + log_debug("TPM request [size:%d]: ", size); for (i = 0; i < size; i++) log_debug("%02x ", ((u8 *)command)[i]); diff --git a/lib/vsprintf.c b/lib/vsprintf.c index 9dc96c81c62..c14176dd393 100644 --- a/lib/vsprintf.c +++ b/lib/vsprintf.c @@ -434,9 +434,9 @@ static char *uuid_string(char *buf, char *end, u8 *addr, int field_width, * - 'i' [46] for 'raw' IPv4/IPv6 addresses, IPv6 omits the colons, IPv4 is * currently the same * - * Note: The difference between 'S' and 'F' is that on ia64 and ppc64 - * function pointers are really function descriptors, which contain a - * pointer to the real address. + * Note: IPv6 support is currently if(0)'ed out. If you ever need + * %pI6, please add an IPV6 Kconfig knob, make your code select or + * depend on that, and change the 0 below to CONFIG_IS_ENABLED(IPV6). */ static char *pointer(const char *fmt, char *buf, char *end, void *ptr, int field_width, int precision, int flags) @@ -481,7 +481,8 @@ static char *pointer(const char *fmt, char *buf, char *end, void *ptr, flags |= SPECIAL; /* Fallthrough */ case 'I': - if (fmt[1] == '6') + /* %pI6 currently unused */ + if (0 && fmt[1] == '6') return ip6_addr_string(buf, end, ptr, field_width, precision, flags); if (fmt[1] == '4') @@ -787,22 +788,11 @@ int printf(const char *fmt, ...) { va_list args; uint i; - char printbuffer[CONFIG_SYS_PBSIZE]; va_start(args, fmt); - - /* - * For this to work, printbuffer must be larger than - * anything we ever want to print. - */ - i = vscnprintf(printbuffer, sizeof(printbuffer), fmt, args); + i = vprintf(fmt, args); va_end(args); - /* Handle error */ - if (i <= 0) - return i; - /* Print the string */ - puts(printbuffer); return i; } diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include index dfb67226b08..a745cc4fccd 100644 --- a/scripts/Kbuild.include +++ b/scripts/Kbuild.include @@ -142,10 +142,6 @@ cc-name = $(shell $(CC) -v 2>&1 | grep -q "clang version" && echo clang || echo # cc-version cc-version = $(shell $(CONFIG_SHELL) $(srctree)/scripts/gcc-version.sh $(CC)) -# cc-fullversion -cc-fullversion = $(shell $(CONFIG_SHELL) \ - $(srctree)/scripts/gcc-version.sh -p $(CC)) - # cc-ifversion # Usage: EXTRA_CFLAGS += $(call cc-ifversion, -lt, 0402, -O1) cc-ifversion = $(shell [ $(cc-version) $(1) $(2) ] && echo $(3) || echo $(4)) @@ -193,7 +189,7 @@ modbuiltin := -f $(srctree)/scripts/Makefile.modbuiltin obj # Shorthand for $(Q)$(MAKE) -f scripts/Makefile.dtbinst obj= # Usage: # $(Q)$(MAKE) $(dtbinst)=dir -dtbinst := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.dtbinst obj +dtbinst := -f $(srctree)/scripts/Makefile.dtbinst obj ### # Shorthand for $(Q)$(MAKE) -f scripts/Makefile.clean obj= diff --git a/scripts/Makefile.build b/scripts/Makefile.build index 7e59ca54cd0..5df8f61aa58 100644 --- a/scripts/Makefile.build +++ b/scripts/Makefile.build @@ -48,9 +48,6 @@ include scripts/Makefile.uncmd_spl include scripts/Kbuild.include -# For backward compatibility check that these variables do not change -save-cflags := $(CFLAGS) - # The filename Kbuild has precedence over Makefile kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src)) kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile) @@ -61,13 +58,6 @@ asflags-y += $(PLATFORM_CPPFLAGS) ccflags-y += $(PLATFORM_CPPFLAGS) cppflags-y += $(PLATFORM_CPPFLAGS) -# If the save-* variables changed error out -ifeq ($(KBUILD_NOPEDANTIC),) - ifneq ("$(save-cflags)","$(CFLAGS)") - $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y) - endif -endif - include scripts/Makefile.lib # Do not include host rules unless needed @@ -99,14 +89,12 @@ __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \ @: # Linus' kernel sanity checking tool -ifneq ($(KBUILD_CHECKSRC),0) - ifeq ($(KBUILD_CHECKSRC),2) - quiet_cmd_force_checksrc = CHECK $< - cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ; - else - quiet_cmd_checksrc = CHECK $< - cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ; - endif +ifeq ($(KBUILD_CHECKSRC),1) + quiet_cmd_checksrc = CHECK $< + cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ; +else ifeq ($(KBUILD_CHECKSRC),2) + quiet_cmd_force_checksrc = CHECK $< + cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ; endif # Do section mismatch analysis for each module/built-in.o @@ -369,21 +357,8 @@ $(lib-target): $(lib-y) FORCE targets += $(lib-target) endif -# -# Rule to link composite objects -# -# Composite objects are specified in kbuild makefile as follows: -# <composite-object>-objs := <list of .o files> -# or -# <composite-object>-y := <list of .o files> -link_multi_deps = \ -$(filter $(addprefix $(obj)/, \ -$($(subst $(obj)/,,$(@:.o=-objs))) \ -$($(subst $(obj)/,,$(@:.o=-y)))), $^) - - quiet_cmd_link_multi-y = AR $@ -cmd_link_multi-y = rm -f $@; $(AR) cDPrsT$(KBUILD_ARFLAGS) $@ $(link_multi_deps) +cmd_link_multi-y = rm -f $@; $(AR) cDPrsT$(KBUILD_ARFLAGS) $@ $(filter %.o,$^) quiet_cmd_link_multi-m = AR [M] $@ cmd_link_multi-m = $(cmd_link_multi-y) @@ -394,7 +369,7 @@ $(call multi_depend, $(multi-used-y), .o, -objs -y) $(multi-used-m): FORCE $(call if_changed,link_multi-m) - @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod) + @{ echo $(@:.o=.ko); echo $(filter %.o,$^); } > $(MODVERDIR)/$(@F:.o=.mod) $(call multi_depend, $(multi-used-m), .o, -objs -y) targets += $(multi-used-y) $(multi-used-m) diff --git a/scripts/Makefile.extrawarn b/scripts/Makefile.extrawarn index 80231fbddfd..7d39b27d24a 100644 --- a/scripts/Makefile.extrawarn +++ b/scripts/Makefile.extrawarn @@ -11,6 +11,8 @@ # are not supported by all versions of the compiler # ========================================================================== +KBUILD_CFLAGS += $(call cc-disable-warning, packed-not-aligned) + ifeq ("$(origin W)", "command line") export KBUILD_ENABLE_EXTRA_GCC_CHECKS := $(W) endif @@ -25,7 +27,11 @@ warning-1 += $(call cc-option, -Wmissing-prototypes) warning-1 += -Wold-style-definition warning-1 += $(call cc-option, -Wmissing-include-dirs) warning-1 += $(call cc-option, -Wunused-but-set-variable) +warning-1 += $(call cc-option, -Wunused-const-variable) +warning-1 += $(call cc-option, -Wpacked-not-aligned) +warning-1 += $(call cc-option, -Wstringop-truncation) warning-1 += $(call cc-disable-warning, missing-field-initializers) +warning-1 += $(call cc-disable-warning, sign-compare) warning-2 := -Waggregate-return warning-2 += -Wcast-align @@ -34,6 +40,9 @@ warning-2 += -Wnested-externs warning-2 += -Wshadow warning-2 += $(call cc-option, -Wlogical-op) warning-2 += $(call cc-option, -Wmissing-field-initializers) +warning-2 += $(call cc-option, -Wsign-compare) +warning-2 += $(call cc-option, -Wmaybe-uninitialized) +warning-2 += $(call cc-option, -Wunused-macros) warning-3 := -Wbad-function-cast warning-3 += -Wcast-qual diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index 78bbebe7e93..07696e86bb5 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -320,7 +320,7 @@ quiet_cmd_dtc = DTC $@ # Bring in any U-Boot-specific include at the end of the file cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \ (cat $<; $(if $(u_boot_dtsi),echo '$(pound)include "$(u_boot_dtsi)"')) > $(pre-tmp); \ - $(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $(pre-tmp) ; \ + $(HOSTCC) -E $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $(pre-tmp) ; \ $(DTC) -O dtb -o $@ -b 0 \ -i $(dir $<) $(DTC_FLAGS) \ -d $(depfile).dtc.tmp $(dtc-tmp) || \ diff --git a/scripts/basic/fixdep.c b/scripts/basic/fixdep.c index 6d59cf8c07e..5ced0f6b069 100644 --- a/scripts/basic/fixdep.c +++ b/scripts/basic/fixdep.c @@ -257,13 +257,9 @@ static void parse_config_file(const char *p) /* * U-Boot also handles * CONFIG_IS_ENABLED(...) - * CONFIG_IS_BUILTIN(...) - * CONFIG_IS_MODULE(...) * CONFIG_VAL(...) */ if ((q - p == 10 && !memcmp(p, "IS_ENABLED(", 11)) || - (q - p == 10 && !memcmp(p, "IS_BUILTIN(", 11)) || - (q - p == 9 && !memcmp(p, "IS_MODULE(", 10)) || (q - p == 3 && !memcmp(p, "VAL(", 4))) { p = q + 1; q = p; diff --git a/scripts/clang-version.sh b/scripts/clang-version.sh new file mode 100755 index 00000000000..e65fbc3079d --- /dev/null +++ b/scripts/clang-version.sh @@ -0,0 +1,23 @@ +#!/bin/sh +# SPDX-License-Identifier: GPL-2.0 +# +# clang-version [-p] clang-command +# +# Prints the compiler version of `clang-command' in a canonical 4-digit form +# such as `0500' for clang-5.0 etc. +# +# With the -p option, prints the patchlevel as well, for example `050001' for +# clang-5.0.1 etc. +# + +compiler="$*" + +if ! ( $compiler --version | grep -q clang) ; then + echo 0 + exit 1 +fi + +MAJOR=$(echo __clang_major__ | $compiler -E -x c - | tail -n 1) +MINOR=$(echo __clang_minor__ | $compiler -E -x c - | tail -n 1) +PATCHLEVEL=$(echo __clang_patchlevel__ | $compiler -E -x c - | tail -n 1) +printf "%d%02d%02d\\n" $MAJOR $MINOR $PATCHLEVEL diff --git a/scripts/gcc-version.sh b/scripts/gcc-version.sh index debecb5561c..11bb909845e 100755 --- a/scripts/gcc-version.sh +++ b/scripts/gcc-version.sh @@ -1,4 +1,5 @@ #!/bin/sh +# SPDX-License-Identifier: GPL-2.0 # # gcc-version [-p] gcc-command # @@ -22,10 +23,10 @@ if [ ${#compiler} -eq 0 ]; then exit 1 fi -MAJOR=$(echo __GNUC__ | $compiler -E -xc - | tail -n 1) -MINOR=$(echo __GNUC_MINOR__ | $compiler -E -xc - | tail -n 1) +MAJOR=$(echo __GNUC__ | $compiler -E -x c - | tail -n 1) +MINOR=$(echo __GNUC_MINOR__ | $compiler -E -x c - | tail -n 1) if [ "x$with_patchlevel" != "x" ] ; then - PATCHLEVEL=$(echo __GNUC_PATCHLEVEL__ | $compiler -E -xc - | tail -n 1) + PATCHLEVEL=$(echo __GNUC_PATCHLEVEL__ | $compiler -E -x c - | tail -n 1) printf "%02d%02d%02d\\n" $MAJOR $MINOR $PATCHLEVEL else printf "%02d%02d\\n" $MAJOR $MINOR diff --git a/scripts/get_default_envs.sh b/scripts/get_default_envs.sh index d1f2ce4d5c5..3c6fdc45e11 100755 --- a/scripts/get_default_envs.sh +++ b/scripts/get_default_envs.sh @@ -10,7 +10,7 @@ set -ue : "${OBJCOPY:=${CROSS_COMPILE:-}objcopy}" -ENV_OBJ_FILE="built-in.o" +ENV_OBJ_FILE="common.o" ENV_OBJ_FILE_COPY="copy_${ENV_OBJ_FILE}" echoerr() { echo "$@" 1>&2; } @@ -32,7 +32,8 @@ cp ${env_obj_file_path} ${ENV_OBJ_FILE_COPY} # NOTE: objcopy saves its output to file passed in # (copy_${ENV_OBJ_FILE} in this case) -${OBJCOPY} -O binary -j ".rodata.default_environment" ${ENV_OBJ_FILE_COPY} +${OBJCOPY} --dump-section .rodata.default_environment=${ENV_OBJ_FILE_COPY} \ + ${env_obj_file_path} # Replace default '\0' with '\n' and sort entries tr '\0' '\n' < ${ENV_OBJ_FILE_COPY} | sort --field-separator== -k1,1 --stable diff --git a/scripts/get_maintainer.pl b/scripts/get_maintainer.pl index e3b41616c97..81116e215e5 100755 --- a/scripts/get_maintainer.pl +++ b/scripts/get_maintainer.pl @@ -1,4 +1,6 @@ #!/usr/bin/env perl +# SPDX-License-Identifier: GPL-2.0 +# # (c) 2007, Joe Perches <joe@perches.com> # created from checkpatch.pl # @@ -7,8 +9,6 @@ # # usage: perl scripts/get_maintainer.pl [OPTIONS] <patch> # perl scripts/get_maintainer.pl [OPTIONS] -f <file> -# -# Licensed under the terms of the GNU GPL License version 2 use warnings; use strict; @@ -19,6 +19,7 @@ my $V = '0.26'; use Getopt::Long qw(:config no_auto_abbrev); use Cwd; use File::Find; +use File::Spec::Functions; my $cur_path = fastgetcwd() . '/'; my $lk_path = "./"; @@ -26,7 +27,9 @@ my $email = 1; my $email_usename = 1; my $email_maintainer = 1; my $email_reviewer = 1; +my $email_fixes = 1; my $email_list = 1; +my $email_moderated_list = 1; my $email_subscriber_list = 0; my $email_git_penguin_chiefs = 0; my $email_git = 0; @@ -48,24 +51,31 @@ my $output_roles = 0; my $output_rolestats = 1; my $output_section_maxlen = 50; my $scm = 0; +my $tree = 1; my $web = 0; my $subsystem = 0; my $status = 0; my $letters = ""; my $keywords = 1; my $sections = 0; -my $file_emails = 0; +my $email_file_emails = 0; my $from_filename = 0; my $pattern_depth = 0; my $self_test = undef; my $version = 0; my $help = 0; -my $find_maintainer_files = 1; - +my $find_maintainer_files = 0; +my $maintainer_path; my $vcs_used = 0; my $exit = 0; +my @files = (); +my @fixes = (); # If a patch description includes Fixes: lines +my @range = (); +my @keyword_tvi = (); +my @file_emails = (); + my %commit_author_hash; my %commit_signer_hash; @@ -245,6 +255,8 @@ if (!GetOptions( 'r!' => \$email_reviewer, 'n!' => \$email_usename, 'l!' => \$email_list, + 'fixes!' => \$email_fixes, + 'moderated!' => \$email_moderated_list, 's!' => \$email_subscriber_list, 'multiline!' => \$output_multiline, 'roles!' => \$output_roles, @@ -253,14 +265,16 @@ if (!GetOptions( 'subsystem!' => \$subsystem, 'status!' => \$status, 'scm!' => \$scm, + 'tree!' => \$tree, 'web!' => \$web, 'letters=s' => \$letters, 'pattern-depth=i' => \$pattern_depth, 'k|keywords!' => \$keywords, 'sections!' => \$sections, - 'fe|file-emails!' => \$file_emails, + 'fe|file-emails!' => \$email_file_emails, 'f|file' => \$from_filename, 'find-maintainer-files' => \$find_maintainer_files, + 'mpath|maintainer-path=s' => \$maintainer_path, 'self-test:s' => \$self_test, 'v|version' => \$version, 'h|help|usage' => \$help, @@ -317,7 +331,7 @@ if ($email && die "$P: Please select at least 1 email option\n"; } -if (!top_of_kernel_tree($lk_path)) { +if ($tree && !top_of_kernel_tree($lk_path)) { die "$P: The current directory does not appear to be " . "a U-Boot source tree.\n"; } @@ -382,26 +396,52 @@ sub find_ignore_git { read_all_maintainer_files(); sub read_all_maintainer_files { - if (-d "${lk_path}MAINTAINERS") { - opendir(DIR, "${lk_path}MAINTAINERS") or die $!; - my @files = readdir(DIR); - closedir(DIR); - foreach my $file (@files) { - push(@mfiles, "${lk_path}MAINTAINERS/$file") if ($file !~ /^\./); - } - } - - if ($find_maintainer_files) { - find( { wanted => \&find_is_maintainer_file, - preprocess => \&find_ignore_git, - no_chdir => 1, - }, "${lk_path}"); + my $path = "${lk_path}MAINTAINERS"; + if (defined $maintainer_path) { + $path = $maintainer_path; + # Perl Cookbook tilde expansion if necessary + $path =~ s@^~([^/]*)@ $1 ? (getpwnam($1))[7] : ( $ENV{HOME} || $ENV{LOGDIR} || (getpwuid($<))[7])@ex; + } + + if (-d $path) { + $path .= '/' if ($path !~ m@/$@); + if ($find_maintainer_files) { + find( { wanted => \&find_is_maintainer_file, + preprocess => \&find_ignore_git, + no_chdir => 1, + }, "$path"); + } else { + opendir(DIR, "$path") or die $!; + my @files = readdir(DIR); + closedir(DIR); + foreach my $file (@files) { + push(@mfiles, "$path$file") if ($file !~ /^\./); + } + } + } elsif (-f "$path") { + push(@mfiles, "$path"); } else { - push(@mfiles, "${lk_path}MAINTAINERS") if -f "${lk_path}MAINTAINERS"; + die "$P: MAINTAINER file not found '$path'\n"; } - + die "$P: No MAINTAINER files found in '$path'\n" if (scalar(@mfiles) == 0); foreach my $file (@mfiles) { - read_maintainer_file("$file"); + read_maintainer_file("$file"); + } +} + +sub maintainers_in_file { + my ($file) = @_; + + return if ($file =~ m@\bMAINTAINERS$@); + + if (-f $file && ($email_file_emails || $file =~ /\.yaml$/)) { + open(my $f, '<', $file) + or die "$P: Can't open $file: $!\n"; + my $text = do { local($/) ; <$f> }; + close($f); + + my @poss_addr = $text =~ m$[A-Za-zÀ-ÿ\"\' \,\.\+-]*\s*[\,]*\s*[\(\<\{]{0,1}[A-Za-z0-9_\.\+-]+\@[A-Za-z0-9\.-]+\.[A-Za-z0-9]+[\)\>\}]{0,1}$g; + push(@file_emails, clean_file_emails(@poss_addr)); } } @@ -485,17 +525,13 @@ sub read_mailmap { ## use the filenames on the command line or find the filenames in the patchfiles -my @files = (); -my @range = (); -my @keyword_tvi = (); -my @file_emails = (); - if (!@ARGV) { push(@ARGV, "&STDIN"); } foreach my $file (@ARGV) { if ($file ne "&STDIN") { + $file = canonpath($file); ##if $file is a directory and it lacks a trailing slash, add one if ((-d $file)) { $file =~ s@([^/])$@$1/@; @@ -503,11 +539,14 @@ foreach my $file (@ARGV) { die "$P: file '${file}' not found\n"; } } + if ($from_filename && (vcs_exists() && !vcs_file_exists($file))) { + warn "$P: file '$file' not found in version control $!\n"; + } if ($from_filename || ($file ne "&STDIN" && vcs_file_exists($file))) { $file =~ s/^\Q${cur_path}\E//; #strip any absolute path $file =~ s/^\Q${lk_path}\E//; #or the path to the lk tree push(@files, $file); - if ($file ne "MAINTAINERS" && -f $file && ($keywords || $file_emails)) { + if ($file ne "MAINTAINERS" && -f $file && $keywords) { open(my $f, '<', $file) or die "$P: Can't open $file: $!\n"; my $text = do { local($/) ; <$f> }; @@ -519,10 +558,6 @@ foreach my $file (@ARGV) { } } } - if ($file_emails) { - my @poss_addr = $text =~ m$[A-Za-zÀ-ÿ\"\' \,\.\+-]*\s*[\,]*\s*[\(\<\{]{0,1}[A-Za-z0-9_\.\+-]+\@[A-Za-z0-9\.-]+\.[A-Za-z0-9]+[\)\>\}]{0,1}$g; - push(@file_emails, clean_file_emails(@poss_addr)); - } } } else { my $file_cnt = @files; @@ -540,7 +575,20 @@ foreach my $file (@ARGV) { while (<$patch>) { my $patch_line = $_; - if (m/^\+\+\+\s+(\S+)/ or m/^---\s+(\S+)/) { + if (m/^ mode change [0-7]+ => [0-7]+ (\S+)\s*$/) { + my $filename = $1; + push(@files, $filename); + } elsif (m/^rename (?:from|to) (\S+)\s*$/) { + my $filename = $1; + push(@files, $filename); + } elsif (m/^diff --git a\/(\S+) b\/(\S+)\s*$/) { + my $filename1 = $1; + my $filename2 = $2; + push(@files, $filename1); + push(@files, $filename2); + } elsif (m/^Fixes:\s+([0-9a-fA-F]{6,40})/) { + push(@fixes, $1) if ($email_fixes); + } elsif (m/^\+\+\+\s+(\S+)/ or m/^---\s+(\S+)/) { my $filename = $1; $filename =~ s@^[^/]*/@@; $filename =~ s@\n@@; @@ -570,6 +618,7 @@ foreach my $file (@ARGV) { } @file_emails = uniq(@file_emails); +@fixes = uniq(@fixes); my %email_hash_name; my %email_hash_address; @@ -584,7 +633,6 @@ my %deduplicate_name_hash = (); my %deduplicate_address_hash = (); my @maintainers = get_maintainers(); - if (@maintainers) { @maintainers = merge_email(@maintainers); output(@maintainers); @@ -890,6 +938,8 @@ sub get_maintainers { print("\n"); } } + + maintainers_in_file($file); } if ($keywords) { @@ -905,8 +955,10 @@ sub get_maintainers { foreach my $file (@files) { if ($email && - ($email_git || ($email_git_fallback && - !$exact_pattern_match_hash{$file}))) { + ($email_git || + ($email_git_fallback && + $file !~ /MAINTAINERS$/ && + !$exact_pattern_match_hash{$file}))) { vcs_file_signoffs($file); } if ($email && $email_git_blame) { @@ -937,6 +989,10 @@ sub get_maintainers { } } + foreach my $fix (@fixes) { + vcs_add_commit_signers($fix, "blamed_fixes"); + } + my @to = (); if ($email || $email_list) { if ($email) { @@ -997,11 +1053,13 @@ MAINTAINER field selection options: --r => include reviewer(s) if any --n => include name 'Full Name <addr\@domain.tld>' --l => include list(s) if any - --s => include subscriber only list(s) if any + --moderated => include moderated lists(s) if any (default: true) + --s => include subscriber only list(s) if any (default: false) --remove-duplicates => minimize duplicate email names/addresses --roles => show roles (status:subsystem, git-signer, list, etc...) --rolestats => show roles and statistics (commits/total_commits, %) --file-emails => add email addresses found in -f file (default: 0 (off)) + --fixes => for patches, add signatures of commits with 'Fixes: <commit>' (default: 1 (on)) --scm => print SCM tree(s) if any --status => print status if any --subsystem => print subsystem name if any @@ -1018,13 +1076,14 @@ Other options: --sections => print all of the subsystem sections with pattern matches --letters => print all matching 'letter' types from all matching sections --mailmap => use .mailmap file (default: $email_use_mailmap) + --no-tree => run without a kernel tree --self-test => show potential issues with MAINTAINERS file content --version => show version --help => show this help information Default options: - [--email --nogit --git-fallback --m --r --n --l --multiline --pattern-depth=0 - --remove-duplicates --rolestats] + [--email --tree --nogit --git-fallback --m --r --n --l --multiline + --pattern-depth=0 --remove-duplicates --rolestats] Notes: Using "-f directory" may give unexpected results: @@ -1288,11 +1347,14 @@ sub add_categories { } else { if ($email_list) { if (!$hash_list_to{lc($list_address)}) { - $hash_list_to{lc($list_address)} = 1; if ($list_additional =~ m/moderated/) { - push(@list_to, [$list_address, - "moderated list${list_role}"]); + if ($email_moderated_list) { + $hash_list_to{lc($list_address)} = 1; + push(@list_to, [$list_address, + "moderated list${list_role}"]); + } } else { + $hash_list_to{lc($list_address)} = 1; push(@list_to, [$list_address, "open list${list_role}"]); } @@ -1300,35 +1362,11 @@ sub add_categories { } } } elsif ($ptype eq "M") { - my ($name, $address) = parse_email($pvalue); - if ($name eq "") { - if ($i > 0) { - my $tv = $typevalue[$i - 1]; - if ($tv =~ m/^([A-Z]):\s*(.*)/) { - if ($1 eq "P") { - $name = $2; - $pvalue = format_email($name, $address, $email_usename); - } - } - } - } if ($email_maintainer) { my $role = get_maintainer_role($i); push_email_addresses($pvalue, $role); } } elsif ($ptype eq "R") { - my ($name, $address) = parse_email($pvalue); - if ($name eq "") { - if ($i > 0) { - my $tv = $typevalue[$i - 1]; - if ($tv =~ m/^([A-Z]):\s*(.*)/) { - if ($1 eq "P") { - $name = $2; - $pvalue = format_email($name, $address, $email_usename); - } - } - } - } if ($email_reviewer) { my $subsystem = get_subsystem_name($i); push_email_addresses($pvalue, "reviewer:$subsystem"); @@ -1699,6 +1737,32 @@ sub vcs_is_hg { return $vcs_used == 2; } +sub vcs_add_commit_signers { + return if (!vcs_exists()); + + my ($commit, $desc) = @_; + my $commit_count = 0; + my $commit_authors_ref; + my $commit_signers_ref; + my $stats_ref; + my @commit_authors = (); + my @commit_signers = (); + my $cmd; + + $cmd = $VCS_cmds{"find_commit_signers_cmd"}; + $cmd =~ s/(\$\w+)/$1/eeg; #substitute variables in $cmd + + ($commit_count, $commit_signers_ref, $commit_authors_ref, $stats_ref) = vcs_find_signers($cmd, ""); + @commit_authors = @{$commit_authors_ref} if defined $commit_authors_ref; + @commit_signers = @{$commit_signers_ref} if defined $commit_signers_ref; + + foreach my $signer (@commit_signers) { + $signer = deduplicate_email($signer); + } + + vcs_assign($desc, 1, @commit_signers); +} + sub interactive_get_maintainers { my ($list_ref) = @_; my @list = @$list_ref; @@ -1792,7 +1856,7 @@ tm toggle maintainers tg toggle git entries tl toggle open list entries ts toggle subscriber list entries -f emails in file [$file_emails] +f emails in file [$email_file_emails] k keywords in file [$keywords] r remove duplicates [$email_remove_duplicates] p# pattern match depth [$pattern_depth] @@ -1917,7 +1981,7 @@ EOT bool_invert(\$email_git_all_signature_types); $rerun = 1; } elsif ($sel eq "f") { - bool_invert(\$file_emails); + bool_invert(\$email_file_emails); $rerun = 1; } elsif ($sel eq "r") { bool_invert(\$email_remove_duplicates); diff --git a/scripts/kconfig/Makefile b/scripts/kconfig/Makefile index 559bb88264c..d52128425ce 100644 --- a/scripts/kconfig/Makefile +++ b/scripts/kconfig/Makefile @@ -74,21 +74,7 @@ PHONY += $(simple-targets) $(simple-targets): $(obj)/conf $< $(silent) --$@ $(Kconfig) -PHONY += oldnoconfig silentoldconfig savedefconfig defconfig - -# oldnoconfig is an alias of olddefconfig, because people already are dependent -# on its behavior (sets new symbols to their default value but not 'n') with the -# counter-intuitive name. -oldnoconfig: olddefconfig - @echo " WARNING: \"oldnoconfig\" target will be removed after Linux 4.19" - @echo " Please use \"olddefconfig\" instead, which is an alias." - -# We do not expect manual invokcation of "silentoldcofig" (or "syncconfig"). -silentoldconfig: syncconfig - @echo " WARNING: \"silentoldconfig\" has been renamed to \"syncconfig\"" - @echo " and is now an internal implementation detail." - @echo " What you want is probably \"oldconfig\"." - @echo " \"silentoldconfig\" will be removed after Linux 4.19" +PHONY += savedefconfig defconfig savedefconfig: $(obj)/conf $< $(silent) --$@=defconfig $(Kconfig) diff --git a/scripts/kconfig/conf.c b/scripts/kconfig/conf.c index c54ff0453c3..376f796f674 100644 --- a/scripts/kconfig/conf.c +++ b/scripts/kconfig/conf.c @@ -460,12 +460,6 @@ static struct option long_opts[] = { {"randconfig", no_argument, NULL, randconfig}, {"listnewconfig", no_argument, NULL, listnewconfig}, {"olddefconfig", no_argument, NULL, olddefconfig}, - /* - * oldnoconfig is an alias of olddefconfig, because people already - * are dependent on its behavior(sets new symbols to their default - * value but not 'n') with the counter-intuitive name. - */ - {"oldnoconfig", no_argument, NULL, olddefconfig}, {NULL, 0, NULL, 0} }; @@ -480,7 +474,6 @@ static void conf_usage(const char *progname) printf(" --syncconfig Similar to oldconfig but generates configuration in\n" " include/{generated/,config/}\n"); printf(" --olddefconfig Same as oldconfig but sets new symbols to their default value\n"); - printf(" --oldnoconfig An alias of olddefconfig\n"); printf(" --defconfig <file> New config with default defined in <file>\n"); printf(" --savedefconfig <file> Save the minimal current configuration to <file>\n"); printf(" --allnoconfig New config where all options are answered with no\n"); diff --git a/scripts/kconfig/merge_config.sh b/scripts/kconfig/merge_config.sh index 67d13144763..0ef90649964 100755 --- a/scripts/kconfig/merge_config.sh +++ b/scripts/kconfig/merge_config.sh @@ -33,12 +33,15 @@ usage() { echo " -n use allnoconfig instead of alldefconfig" echo " -r list redundant entries when merging fragments" echo " -O dir to put generated output files. Consider setting \$KCONFIG_CONFIG instead." + echo + echo "Used prefix: '$CONFIG_PREFIX'. You can redefine it with \$CONFIG_ environment variable." } RUNMAKE=true ALLTARGET=alldefconfig WARNREDUN=false OUTPUT=. +CONFIG_PREFIX=${CONFIG_-CONFIG_} while true; do case $1 in @@ -99,7 +102,9 @@ if [ ! -r "$INITFILE" ]; then fi MERGE_LIST=$* -SED_CONFIG_EXP="s/^\(# \)\{0,1\}\(CONFIG_[a-zA-Z0-9_]*\)[= ].*/\2/p" +SED_CONFIG_EXP1="s/^\(${CONFIG_PREFIX}[a-zA-Z0-9_]*\)=.*/\1/p" +SED_CONFIG_EXP2="s/^# \(${CONFIG_PREFIX}[a-zA-Z0-9_]*\) is not set$/\1/p" + TMP_FILE=$(mktemp ./.tmp.config.XXXXXXXXXX) echo "Using $INITFILE as base" @@ -112,7 +117,7 @@ for MERGE_FILE in $MERGE_LIST ; do echo "The merge file '$MERGE_FILE' does not exist. Exit." >&2 exit 1 fi - CFG_LIST=$(sed -n "$SED_CONFIG_EXP" $MERGE_FILE) + CFG_LIST=$(sed -n -e "$SED_CONFIG_EXP1" -e "$SED_CONFIG_EXP2" $MERGE_FILE) for CFG in $CFG_LIST ; do grep -q -w $CFG $TMP_FILE || continue @@ -155,7 +160,7 @@ make KCONFIG_ALLCONFIG=$TMP_FILE $OUTPUT_ARG $ALLTARGET # Check all specified config values took (might have missed-dependency issues) -for CFG in $(sed -n "$SED_CONFIG_EXP" $TMP_FILE); do +for CFG in $(sed -n -e "$SED_CONFIG_EXP1" -e "$SED_CONFIG_EXP2" $TMP_FILE); do REQUESTED_VAL=$(grep -w -e "$CFG" $TMP_FILE) ACTUAL_VAL=$(grep -w -e "$CFG" "$KCONFIG_CONFIG") diff --git a/scripts/mkmakefile b/scripts/mkmakefile index 84af27bf0f9..412f13fdff5 100755 --- a/scripts/mkmakefile +++ b/scripts/mkmakefile @@ -1,35 +1,25 @@ #!/bin/sh +# SPDX-License-Identifier: GPL-2.0 # Generates a small Makefile used in the root of the output # directory, to allow make to be started from there. # The Makefile also allow for more convinient build of external modules # Usage # $1 - Kernel src directory -# $2 - Output directory -# $3 - version -# $4 - patchlevel - -test ! -r $2/Makefile -o -O $2/Makefile || exit 0 # Only overwrite automatically generated Makefiles # (so we do not overwrite kernel Makefile) -if test -e $2/Makefile && ! grep -q Automatically $2/Makefile +if test -e Makefile && ! grep -q Automatically Makefile then exit 0 fi if [ "${quiet}" != "silent_" ]; then - echo " GEN $2/Makefile" + echo " GEN Makefile" fi -cat << EOF > $2/Makefile +cat << EOF > Makefile # Automatically generated by $0: don't edit -VERSION = $3 -PATCHLEVEL = $4 - -lastword = \$(word \$(words \$(1)),\$(1)) -makedir := \$(dir \$(call lastword,\$(MAKEFILE_LIST))) - ifeq ("\$(origin V)", "command line") VERBOSE := \$(V) endif @@ -37,15 +27,12 @@ ifneq (\$(VERBOSE),1) Q := @ endif -MAKEARGS := -C $1 -MAKEARGS += O=\$(if \$(patsubst /%,,\$(makedir)),\$(CURDIR)/)\$(patsubst %/,%,\$(makedir)) - MAKEFLAGS += --no-print-directory .PHONY: __sub-make \$(MAKECMDGOALS) __sub-make: - \$(Q)\$(MAKE) \$(MAKEARGS) \$(MAKECMDGOALS) + \$(Q)\$(MAKE) -C $1 O=\$(CURDIR) \$(MAKECMDGOALS) \$(filter-out __sub-make, \$(MAKECMDGOALS)): __sub-make @: diff --git a/test/cmd/setexpr.c b/test/cmd/setexpr.c index c537e893538..08b6e6e7243 100644 --- a/test/cmd/setexpr.c +++ b/test/cmd/setexpr.c @@ -270,8 +270,6 @@ static int setexpr_test_backref(struct unit_test_state *uts) ut_asserteq_str("us this is surely! a test is it? yes us this is indeed! a test", buf); - /* The following checks fail at present due to a bug in setexpr */ - return 0; for (i = BUF_SIZE; i < 0x1000; i++) { ut_assertf(buf[i] == (char)i, "buf byte at %x should be %02x, got %02x)\n", diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py index 2d42480a9a5..869c92b49bf 100644 --- a/tools/dtoc/dtb_platdata.py +++ b/tools/dtoc/dtb_platdata.py @@ -749,6 +749,15 @@ class DtbPlatdata(): break if node.parent and node.parent.parent: + if node.parent not in self._valid_nodes: + # This might indicate that the parent node is not in the + # SPL/TPL devicetree but the child is. For example if we are + # dealing with of-platdata in TPL, the parent has a + # u-boot,dm-tpl tag but the child has u-boot,dm-pre-reloc. In + # this case the child node exists in TPL but the parent does + # not. + raise ValueError("Node '%s' requires parent node '%s' but it is not in the valid list" % + (node.path, node.parent.path)) self.buf('\t.parent\t\t= DM_DEVICE_REF(%s),\n' % node.parent.var_name) if priv_name: diff --git a/tools/dtoc/test/dtoc_test_noparent.dts b/tools/dtoc/test/dtoc_test_noparent.dts new file mode 100644 index 00000000000..e976dd2b8af --- /dev/null +++ b/tools/dtoc/test/dtoc_test_noparent.dts @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Test device tree file for dtoc + * + * Copyright 2017 Google, Inc + */ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + i2c@0 { + compatible = "sandbox,i2c"; + u-boot,dm-tpl; + #address-cells = <1>; + #size-cells = <0>; + spl-test { + u-boot,dm-pre-reloc; + compatible = "sandbox,spl-test"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + pmic@9 { + compatible = "sandbox,pmic"; + u-boot,dm-pre-reloc; + reg = <9>; + low-power; + }; + }; + }; +}; diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py index 0b2805feed2..863ede90b7a 100755 --- a/tools/dtoc/test_dtoc.py +++ b/tools/dtoc/test_dtoc.py @@ -1830,3 +1830,13 @@ U_BOOT_DRVINFO(spl_test2) = { dtb_file = get_dtb_file('dtoc_test_single_reg.dts') output = tools.GetOutputFilename('output') self.run_test(['struct'], dtb_file, output) + + def test_missing_parent(self): + """Test detection of a parent node with no properties""" + dtb_file = get_dtb_file('dtoc_test_noparent.dts', capture_stderr=True) + output = tools.GetOutputFilename('output') + with self.assertRaises(ValueError) as exc: + self.run_test(['device'], dtb_file, output, instantiate=True) + self.assertIn("Node '/i2c@0/spl-test/pmic@9' requires parent node " + "'/i2c@0/spl-test' but it is not in the valid list", + str(exc.exception)) diff --git a/tools/fit_image.c b/tools/fit_image.c index ae30f807834..f4f372ba62f 100644 --- a/tools/fit_image.c +++ b/tools/fit_image.c @@ -524,7 +524,7 @@ static int fit_extract_data(struct image_tool_params *params, const char *fname) /* Check if an offset for the external data was set. */ if (params->external_offset > 0) { if (params->external_offset < new_size) { - debug("External offset %x overlaps FIT length %x", + debug("External offset %x overlaps FIT length %x\n", params->external_offset, new_size); ret = -EINVAL; goto err; @@ -737,7 +737,7 @@ static int fit_handle_file(struct image_tool_params *params) if (strlen (params->imagefile) + strlen (MKIMAGE_TMPFILE_SUFFIX) + 1 > sizeof (tmpfile)) { fprintf (stderr, "%s: Image file name (%s) too long, " - "can't create tmpfile", + "can't create tmpfile.\n", params->imagefile, params->cmdname); return (EXIT_FAILURE); } diff --git a/tools/image-host.c b/tools/image-host.c index 270d36fe451..d3a882ec291 100644 --- a/tools/image-host.c +++ b/tools/image-host.c @@ -132,8 +132,10 @@ static int fit_image_write_sig(void *fit, int noffset, uint8_t *value, if (!ret) { time_t timestamp = imagetool_get_source_date(cmdname, time(NULL)); + uint32_t t = cpu_to_uimage(timestamp); - ret = fit_set_timestamp(fit, noffset, timestamp); + ret = fdt_setprop(fit, noffset, FIT_TIMESTAMP_PROP, &t, + sizeof(uint32_t)); } if (region_prop && !ret) { uint32_t strdata[2]; @@ -327,7 +329,7 @@ static int get_random_data(void *data, int size) { unsigned char *tmp = data; struct timespec date; - int i, ret = 0; + int i, ret; if (!tmp) { printf("%s: pointer data is NULL\n", __func__); @@ -336,9 +338,9 @@ static int get_random_data(void *data, int size) } ret = clock_gettime(CLOCK_MONOTONIC, &date); - if (ret < 0) { - printf("%s: clock_gettime has failed (err=%d, str=%s)\n", - __func__, ret, strerror(errno)); + if (ret) { + printf("%s: clock_gettime has failed (%s)\n", __func__, + strerror(errno)); goto out; } diff --git a/tools/mkimage.c b/tools/mkimage.c index cc7b242faf2..302bfcf971f 100644 --- a/tools/mkimage.c +++ b/tools/mkimage.c @@ -12,6 +12,9 @@ #include "imximage.h" #include <image.h> #include <version.h> +#ifdef __linux__ +#include <sys/ioctl.h> +#endif static void copy_file(int, const char *, int); @@ -402,6 +405,7 @@ int main(int argc, char **argv) } if (params.lflag || params.fflag) { + uint64_t size; /* * list header information of existing image */ @@ -412,14 +416,34 @@ int main(int argc, char **argv) exit (EXIT_FAILURE); } - if ((unsigned)sbuf.st_size < tparams->header_size) { + if ((sbuf.st_mode & S_IFMT) == S_IFBLK) { +#ifdef __linux__ +#if defined(__linux__) && defined(_IOR) && !defined(BLKGETSIZE64) +#define BLKGETSIZE64 _IOR(0x12,114,size_t) /* return device size in bytes (u64 *arg) */ +#endif + if (ioctl(ifd, BLKGETSIZE64, &size) < 0) { + fprintf (stderr, + "%s: failed to get size of block device \"%s\"\n", + params.cmdname, params.imagefile); + exit (EXIT_FAILURE); + } +#else fprintf (stderr, - "%s: Bad size: \"%s\" is not valid image\n", + "%s: \"%s\" is block device, don't know how to get its size\n", params.cmdname, params.imagefile); exit (EXIT_FAILURE); +#endif + } else if ((unsigned)sbuf.st_size < tparams->header_size) { + fprintf (stderr, + "%s: Bad size: \"%s\" is not valid image: size %ld < %u\n", + params.cmdname, params.imagefile, + sbuf.st_size, tparams->header_size); + exit (EXIT_FAILURE); + } else { + size = sbuf.st_size; } - ptr = mmap(0, sbuf.st_size, PROT_READ, MAP_SHARED, ifd, 0); + ptr = mmap(0, size, PROT_READ, MAP_SHARED, ifd, 0); if (ptr == MAP_FAILED) { fprintf (stderr, "%s: Can't read %s: %s\n", params.cmdname, params.imagefile, |