diff options
66 files changed, 4521 insertions, 2470 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 56d4af518d8..05a00e44358 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -812,6 +812,7 @@ dtb-y += \ imx6q-icore-rqs.dtb \ imx6q-kp.dtb \ imx6q-logicpd.dtb \ + imx6q-lxr.dtb \ imx6q-marsboard.dtb \ imx6q-mccmon6.dtb\ imx6q-nitrogen6x.dtb \ diff --git a/arch/arm/dts/imx6q-lxr.dts b/arch/arm/dts/imx6q-lxr.dts new file mode 100644 index 00000000000..ae4f8eeb105 --- /dev/null +++ b/arch/arm/dts/imx6q-lxr.dts @@ -0,0 +1,87 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// +// Copyright 2024 Comvetia AG + +/dts-v1/; +#include "imx6q-phytec-pfla02.dtsi" + +/ { + model = "COMVETIA QSoIP LXR-2"; + compatible = "comvetia,imx6q-lxr", "phytec,imx6q-pfla02", "fsl,imx6q"; + + chosen { + stdout-path = &uart4; + }; + + spi { + compatible = "spi-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi_gpio>; + sck-gpios = <&gpio5 8 GPIO_ACTIVE_HIGH>; + mosi-gpios = <&gpio5 7 GPIO_ACTIVE_HIGH>; + num-chipselects = <0>; + #address-cells = <1>; + #size-cells = <0>; + + fpga@0 { + compatible = "altr,fpga-passive-serial"; + reg = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fpga>; + nconfig-gpios = <&gpio4 18 GPIO_ACTIVE_LOW>; + nstat-gpios = <&gpio4 19 GPIO_ACTIVE_LOW>; + confd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&ecspi3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi3>; + cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <20000000>; + }; +}; + +&fec { + status = "okay"; +}; + +&i2c3 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +}; + +&uart4 { + status = "okay"; +}; + +&usdhc3 { + no-1-8-v; + status = "okay"; +}; + +&iomuxc { + pinctrl_fpga: fpgagrp { + fsl,pins = < + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b0 + MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0 + MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0 + >; + }; + + pinctrl_spi_gpio: spigpiogrp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT14__GPIO5_IO08 0x1b0b0 + MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07 0x1b0b0 + >; + }; +}; diff --git a/arch/arm/dts/imx6q-phytec-pfla02.dtsi b/arch/arm/dts/imx6q-phytec-pfla02.dtsi new file mode 100644 index 00000000000..500944bd2a0 --- /dev/null +++ b/arch/arm/dts/imx6q-phytec-pfla02.dtsi @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH + */ + +#include "imx6q.dtsi" +#include "imx6qdl-phytec-pfla02.dtsi" + +/ { + model = "Phytec phyFLEX-i.MX6 Quad"; + compatible = "phytec,imx6q-pfla02", "fsl,imx6q"; + + memory@10000000 { + device_type = "memory"; + reg = <0x10000000 0x80000000>; + }; +}; diff --git a/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi new file mode 100644 index 00000000000..c0c47adc586 --- /dev/null +++ b/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi @@ -0,0 +1,467 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH + */ + +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "Phytec phyFLEX-i.MX6 Quad"; + compatible = "phytec,imx6q-pfla02", "fsl,imx6q"; + + memory@10000000 { + device_type = "memory"; + reg = <0x10000000 0x80000000>; + }; + + reg_usb_otg_vbus: regulator-usb-otg-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio4 15 0>; + enable-active-high; + }; + + reg_usb_h1_vbus: regulator-usb-h1-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh1_vbus>; + regulator-name = "usb_h1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 0 0>; + enable-active-high; + }; + + gpio_leds: leds { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_leds>; + compatible = "gpio-leds"; + + led_green: led-green { + label = "phyflex:green"; + gpios = <&gpio1 30 0>; + }; + + led_red: led-red { + label = "phyflex:red"; + gpios = <&gpio2 31 0>; + }; + }; +}; + +&audmux { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audmux>; + status = "disabled"; +}; + +&can1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan1>; + status = "disabled"; +}; + +&ecspi3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi3>; + status = "okay"; + cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; + + som_flash: flash@0 { + compatible = "m25p80", "jedec,spi-nor"; + spi-max-frequency = <20000000>; + reg = <0>; + }; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-handle = <ðphy>; + phy-mode = "rgmii"; + phy-reset-duration = <10>; /* in msecs */ + phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; + phy-supply = <&vdd_eth_io_reg>; + status = "disabled"; + + fec_mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + txc-skew-ps = <1680>; + rxc-skew-ps = <1860>; + }; + }; +}; + +&gpmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand>; + nand-on-flash-bbt; + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; + + som_eeprom: eeprom@50 { + compatible = "catalyst,24c32", "atmel,24c32"; + pagesize = <32>; + reg = <0x50>; + }; + + pmic@58 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pmic>; + compatible = "dlg,da9063"; + reg = <0x58>; + interrupt-parent = <&gpio2>; + interrupts = <9 IRQ_TYPE_LEVEL_LOW>; /* active-low GPIO2_9 */ + #interrupt-cells = <2>; + interrupt-controller; + + regulators { + vddcore_reg: bcore1 { + regulator-min-microvolt = <730000>; + regulator-max-microvolt = <1380000>; + regulator-always-on; + }; + + vddsoc_reg: bcore2 { + regulator-min-microvolt = <730000>; + regulator-max-microvolt = <1380000>; + regulator-always-on; + }; + + vdd_ddr3_reg: bpro { + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + }; + + vdd_3v3_reg: bperi { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vdd_buckmem_reg: bmem { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vdd_eth_reg: bio { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + vdd_eth_io_reg: ldo4 { + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-always-on; + }; + + vdd_mx6_snvs_reg: ldo5 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + }; + + vdd_3v3_pmic_io_reg: ldo6 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vdd_sd0_reg: ldo9 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vdd_sd1_reg: ldo10 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vdd_mx6_high_reg: ldo11 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + }; + }; + + da9063_rtc: rtc { + compatible = "dlg,da9063-rtc"; + }; + + da9063_wdog: watchdog { + compatible = "dlg,da9063-watchdog"; + }; + + onkey { + compatible = "dlg,da9063-onkey"; + status = "disabled"; + }; + }; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + clock-frequency = <100000>; +}; + +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + clock-frequency = <100000>; +}; + +&iomuxc { + imx6q-phytec-pfla02 { + pinctrl_ecspi3: ecspi3grp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 + MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 + MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 + MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* CS0 */ + >; + }; + + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 + MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 /* Reset GPIO */ + >; + }; + + pinctrl_flexcan1: flexcan1grp { + fsl,pins = < + MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0 + MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0 + >; + }; + + pinctrl_gpmi_nand: gpminandgrp { + fsl,pins = < + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 + MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1 + >; + }; + + pinctrl_leds: ledsgrp { + fsl,pins = < + MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* Green LED */ + MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x80000000 /* Red LED */ + >; + }; + + pinctrl_pcie: pciegrp { + fsl,pins = <MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 0x80000000>; + }; + + pinctrl_pmic: pmicgrp { + fsl,pins = <MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x80000000>; /* PMIC interrupt */ + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1 + MX6QDL_PAD_EIM_D30__UART3_CTS_B 0x1b0b1 + >; + }; + + pinctrl_uart4: uart4grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_usbh1_vbus: usbh1vbusgrp { + fsl,pins = < + MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 + >; + }; + + pinctrl_usbotg: usbotggrp { + fsl,pins = < + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 + MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0 + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + >; + }; + + pinctrl_usdhc3_cdwp: usdhc3cdwp { + fsl,pins = < + MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000 + MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 + >; + }; + + pinctrl_audmux: audmuxgrp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT16__AUD5_TXC 0x130b0 + MX6QDL_PAD_DISP0_DAT17__AUD5_TXD 0x110b0 + MX6QDL_PAD_DISP0_DAT18__AUD5_TXFS 0x130b0 + MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0 + >; + }; + }; +}; + +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie>; + reset-gpio = <&gpio4 17 GPIO_ACTIVE_LOW>; + status = "disabled"; +}; + +®_arm { + vin-supply = <&vddcore_reg>; +}; + +®_pu { + vin-supply = <&vddsoc_reg>; +}; + +®_soc { + vin-supply = <&vddsoc_reg>; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + uart-has-rtscts; + status = "disabled"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; + status = "disabled"; +}; + +&usbh1 { + vbus-supply = <®_usb_h1_vbus>; + status = "disabled"; +}; + +&usbotg { + vbus-supply = <®_usb_otg_vbus>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg>; + disable-over-current; + status = "disabled"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + vmmc-supply = <&vdd_sd1_reg>; + status = "disabled"; +}; + +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3 + &pinctrl_usdhc3_cdwp>; + cd-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>; + vmmc-supply = <&vdd_sd0_reg>; + status = "disabled"; +}; + +&wdog1 { + /* + * Rely on PMIC reboot handler. Internal i.MX6 watchdog, that is also + * used for reboot, does not reset all external PMIC voltages on reset. + */ + status = "disabled"; +}; diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h index cbd2717f97c..b0468a1a136 100644 --- a/arch/arm/include/asm/arch-imx/cpu.h +++ b/arch/arm/include/asm/arch-imx/cpu.h @@ -68,6 +68,8 @@ #define MXC_CPU_IMX9321 0xC6 /* dummy ID */ #define MXC_CPU_IMX9312 0xC7 /* dummy ID */ #define MXC_CPU_IMX9311 0xC8 /* dummy ID */ +#define MXC_CPU_IMX9302 0xC9 /* dummy ID */ +#define MXC_CPU_IMX9301 0xCA /* dummy ID */ #define MXC_SOC_MX6 0x60 #define MXC_SOC_MX7 0x70 diff --git a/arch/arm/include/asm/arch-imx9/clock.h b/arch/arm/include/asm/arch-imx9/clock.h index 1ce6ac4c3a8..76f12118592 100644 --- a/arch/arm/include/asm/arch-imx9/clock.h +++ b/arch/arm/include/asm/arch-imx9/clock.h @@ -211,7 +211,8 @@ struct imx_clk_setting { u32 div; }; -int clock_init(void); +int clock_init_early(void); +int clock_init_late(void); u32 get_clk_src_rate(enum ccm_clk_src source); u32 get_lpuart_clk(void); void init_uart_clk(u32 index); diff --git a/arch/arm/include/asm/arch-imx9/imx-regs.h b/arch/arm/include/asm/arch-imx9/imx-regs.h index 76d241eab09..ef9538bd42e 100644 --- a/arch/arm/include/asm/arch-imx9/imx-regs.h +++ b/arch/arm/include/asm/arch-imx9/imx-regs.h @@ -25,6 +25,7 @@ #define ANATOP_BASE_ADDR 0x44480000UL #define BLK_CTRL_WAKEUPMIX_BASE_ADDR 0x42420000 +#define BLK_CTRL_NS_ANOMIX_BASE_ADDR 0x44210000 #define BLK_CTRL_S_ANOMIX_BASE_ADDR 0x444f0000 #define SRC_IPS_BASE_ADDR (0x44460000) @@ -38,6 +39,7 @@ #define SRC_MIX_SLICE_FUNC_STAT_PSW_STAT BIT(0) #define SRC_MIX_SLICE_FUNC_STAT_RST_STAT BIT(2) #define SRC_MIX_SLICE_FUNC_STAT_ISO_STAT BIT(4) +#define SRC_MIX_SLICE_FUNC_STAT_SSAR_STAT BIT(8) #define SRC_MIX_SLICE_FUNC_STAT_MEM_STAT BIT(12) #define IMG_CONTAINER_BASE (0x80000000UL) @@ -48,8 +50,16 @@ #define BCTRL_GPR_ENET_QOS_INTF_SEL_RGMII (0x1 << 1) #define BCTRL_GPR_ENET_QOS_CLK_GEN_EN (0x1 << 0) +#define TRDC_AON_BASE (0x44270000UL) +#define TRDC_WAKEUP_BASE (0x42460000UL) +#define TRDC_MEGA_BASE (0x42810000UL) +#define TRDC_NIC_BASE (0x49010000UL) + #define MARKETING_GRADING_MASK GENMASK(5, 4) #define SPEED_GRADING_MASK GENMASK(11, 6) +#define NUM_WORDS_PER_BANK 8 +#define HW_CFG1 19 +#define HW_CFG2 20 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) #include <asm/types.h> diff --git a/arch/arm/include/asm/arch-imx9/sys_proto.h b/arch/arm/include/asm/arch-imx9/sys_proto.h index 2f7a1292758..e4bf6a63424 100644 --- a/arch/arm/include/asm/arch-imx9/sys_proto.h +++ b/arch/arm/include/asm/arch-imx9/sys_proto.h @@ -8,7 +8,18 @@ #include <asm/mach-imx/sys_proto.h> +enum imx9_soc_voltage_mode { + VOLT_LOW_DRIVE = 0, + VOLT_NOMINAL_DRIVE, + VOLT_OVER_DRIVE, +}; + void soc_power_init(void); bool m33_is_rom_kicked(void); int m33_prepare(void); + +enum imx9_soc_voltage_mode soc_target_voltage_mode(void); + +#define is_voltage_mode(mode) (soc_target_voltage_mode() == (mode)) + #endif diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h index 31ae179b211..31ace977d2b 100644 --- a/arch/arm/include/asm/mach-imx/sys_proto.h +++ b/arch/arm/include/asm/mach-imx/sys_proto.h @@ -85,7 +85,8 @@ struct bd_info; #define is_imx93() (is_cpu_type(MXC_CPU_IMX93) || is_cpu_type(MXC_CPU_IMX9331) || \ is_cpu_type(MXC_CPU_IMX9332) || is_cpu_type(MXC_CPU_IMX9351) || \ is_cpu_type(MXC_CPU_IMX9322) || is_cpu_type(MXC_CPU_IMX9321) || \ - is_cpu_type(MXC_CPU_IMX9312) || is_cpu_type(MXC_CPU_IMX9311)) + is_cpu_type(MXC_CPU_IMX9312) || is_cpu_type(MXC_CPU_IMX9311) || \ + is_cpu_type(MXC_CPU_IMX9302) || is_cpu_type(MXC_CPU_IMX9301)) #define is_imx9351() (is_cpu_type(MXC_CPU_IMX9351)) #define is_imx9332() (is_cpu_type(MXC_CPU_IMX9332)) #define is_imx9331() (is_cpu_type(MXC_CPU_IMX9331)) @@ -93,6 +94,8 @@ struct bd_info; #define is_imx9321() (is_cpu_type(MXC_CPU_IMX9321)) #define is_imx9312() (is_cpu_type(MXC_CPU_IMX9312)) #define is_imx9311() (is_cpu_type(MXC_CPU_IMX9311)) +#define is_imx9302() (is_cpu_type(MXC_CPU_IMX9302)) +#define is_imx9301() (is_cpu_type(MXC_CPU_IMX9301)) #define is_imxrt1020() (is_cpu_type(MXC_CPU_IMXRT1020)) #define is_imxrt1050() (is_cpu_type(MXC_CPU_IMXRT1050)) @@ -275,4 +278,7 @@ void enable_ca7_smp(void); enum boot_device get_boot_device(void); +int disable_cpu_nodes(void *blob, const char * const *nodes_path, + u32 num_disabled_cores, u32 max_cores); +int fixup_thermal_trips(void *blob, const char *name); #endif diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 5262dca4ffd..f8903afc92e 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -21,6 +21,12 @@ obj-$(CONFIG_IMX_HAB) += hab.o obj-y += cpu.o endif +ifeq ($(SOC),$(filter $(SOC),imx8m imx9)) +ifneq ($(CONFIG_SPL_BUILD),y) +obj-y += fdt.o +endif +endif + ifeq ($(SOC),$(filter $(SOC),mx5 mx6)) obj-y += cpu.o speed.o ifneq ($(CONFIG_MX51),y) diff --git a/arch/arm/mach-imx/fdt.c b/arch/arm/mach-imx/fdt.c new file mode 100644 index 00000000000..ac782e3ee63 --- /dev/null +++ b/arch/arm/mach-imx/fdt.c @@ -0,0 +1,129 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2024 NXP + */ + +#include <errno.h> +#include <fdtdec.h> +#include <malloc.h> +#include <asm/arch/sys_proto.h> + +static void disable_thermal_cpu_nodes(void *blob, u32 num_disabled_cores, u32 max_cores) +{ + static const char * const thermal_path[] = { + "/thermal-zones/cpu-thermal/cooling-maps/map0" + }; + + int nodeoff, cnt, i, ret, j; + u32 num_le32 = max_cores * 3; + u32 *cooling_dev = (u32 *)malloc(num_le32 * sizeof(__le32)); + + if (!cooling_dev) { + printf("failed to alloc cooling dev\n"); + return; + } + + for (i = 0; i < ARRAY_SIZE(thermal_path); i++) { + nodeoff = fdt_path_offset(blob, thermal_path[i]); + if (nodeoff < 0) + continue; /* Not found, skip it */ + + cnt = fdtdec_get_int_array_count(blob, nodeoff, "cooling-device", + cooling_dev, num_le32); + if (cnt < 0) + continue; + + if (cnt != num_le32) + printf("Warning: %s, cooling-device count %d\n", thermal_path[i], cnt); + + for (j = 0; j < cnt; j++) + cooling_dev[j] = cpu_to_fdt32(cooling_dev[j]); + + ret = fdt_setprop(blob, nodeoff, "cooling-device", &cooling_dev, + sizeof(__le32) * (num_le32 - num_disabled_cores * 3)); + if (ret < 0) { + printf("Warning: %s, cooling-device setprop failed %d\n", + thermal_path[i], ret); + continue; + } + + printf("Update node %s, cooling-device prop\n", thermal_path[i]); + } + + free(cooling_dev); +} + +int disable_cpu_nodes(void *blob, const char * const *nodes_path, u32 num_disabled_cores, + u32 max_cores) +{ + u32 i = 0; + int rc; + int nodeoff; + + if (max_cores == 0 || (num_disabled_cores > (max_cores - 1))) + return -EINVAL; + + i = max_cores - num_disabled_cores; + + for (; i < max_cores; i++) { + nodeoff = fdt_path_offset(blob, nodes_path[i]); + if (nodeoff < 0) + continue; /* Not found, skip it */ + + debug("Found %s node\n", nodes_path[i]); + + rc = fdt_del_node(blob, nodeoff); + if (rc < 0) { + printf("Unable to delete node %s, err=%s\n", + nodes_path[i], fdt_strerror(rc)); + } else { + printf("Delete node %s\n", nodes_path[i]); + } + } + + disable_thermal_cpu_nodes(blob, num_disabled_cores, max_cores); + + return 0; +} + +int fixup_thermal_trips(void *blob, const char *name) +{ + int minc, maxc; + int node, trip; + + node = fdt_path_offset(blob, "/thermal-zones"); + if (node < 0) + return node; + + node = fdt_subnode_offset(blob, node, name); + if (node < 0) + return node; + + node = fdt_subnode_offset(blob, node, "trips"); + if (node < 0) + return node; + + get_cpu_temp_grade(&minc, &maxc); + + fdt_for_each_subnode(trip, blob, node) { + const char *type; + int temp, ret; + + type = fdt_getprop(blob, trip, "type", NULL); + if (!type) + continue; + + temp = 0; + if (!strcmp(type, "critical")) + temp = 1000 * (maxc - 5); + else if (!strcmp(type, "passive")) + temp = 1000 * (maxc - 10); + if (temp) { + ret = fdt_setprop_u32(blob, trip, "temperature", temp); + if (ret) + return ret; + } + } + + return 0; +} diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 986687e9ce4..46974bf0618 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -1184,117 +1184,6 @@ int disable_dsp_nodes(void *blob) return disable_fdt_nodes(blob, nodes_path_8mp, ARRAY_SIZE(nodes_path_8mp)); } -static void disable_thermal_cpu_nodes(void *blob, u32 disabled_cores) -{ - static const char * const thermal_path[] = { - "/thermal-zones/cpu-thermal/cooling-maps/map0" - }; - - int nodeoff, cnt, i, ret, j; - u32 cooling_dev[12]; - - for (i = 0; i < ARRAY_SIZE(thermal_path); i++) { - nodeoff = fdt_path_offset(blob, thermal_path[i]); - if (nodeoff < 0) - continue; /* Not found, skip it */ - - cnt = fdtdec_get_int_array_count(blob, nodeoff, "cooling-device", cooling_dev, 12); - if (cnt < 0) - continue; - - if (cnt != 12) - printf("Warning: %s, cooling-device count %d\n", thermal_path[i], cnt); - - for (j = 0; j < cnt; j++) - cooling_dev[j] = cpu_to_fdt32(cooling_dev[j]); - - ret = fdt_setprop(blob, nodeoff, "cooling-device", &cooling_dev, - sizeof(u32) * (12 - disabled_cores * 3)); - if (ret < 0) { - printf("Warning: %s, cooling-device setprop failed %d\n", - thermal_path[i], ret); - continue; - } - - printf("Update node %s, cooling-device prop\n", thermal_path[i]); - } -} - -static void disable_pmu_cpu_nodes(void *blob, u32 disabled_cores) -{ - static const char * const pmu_path[] = { - "/pmu" - }; - - int nodeoff, cnt, i, ret, j; - u32 irq_affinity[4]; - - for (i = 0; i < ARRAY_SIZE(pmu_path); i++) { - nodeoff = fdt_path_offset(blob, pmu_path[i]); - if (nodeoff < 0) - continue; /* Not found, skip it */ - - cnt = fdtdec_get_int_array_count(blob, nodeoff, "interrupt-affinity", - irq_affinity, 4); - if (cnt < 0) - continue; - - if (cnt != 4) - printf("Warning: %s, interrupt-affinity count %d\n", pmu_path[i], cnt); - - for (j = 0; j < cnt; j++) - irq_affinity[j] = cpu_to_fdt32(irq_affinity[j]); - - ret = fdt_setprop(blob, nodeoff, "interrupt-affinity", &irq_affinity, - sizeof(u32) * (4 - disabled_cores)); - if (ret < 0) { - printf("Warning: %s, interrupt-affinity setprop failed %d\n", - pmu_path[i], ret); - continue; - } - - printf("Update node %s, interrupt-affinity prop\n", pmu_path[i]); - } -} - -static int disable_cpu_nodes(void *blob, u32 disabled_cores) -{ - static const char * const nodes_path[] = { - "/cpus/cpu@1", - "/cpus/cpu@2", - "/cpus/cpu@3", - }; - u32 i = 0; - int rc; - int nodeoff; - - if (disabled_cores > 3) - return -EINVAL; - - i = 3 - disabled_cores; - - for (; i < 3; i++) { - nodeoff = fdt_path_offset(blob, nodes_path[i]); - if (nodeoff < 0) - continue; /* Not found, skip it */ - - debug("Found %s node\n", nodes_path[i]); - - rc = fdt_del_node(blob, nodeoff); - if (rc < 0) { - printf("Unable to delete node %s, err=%s\n", - nodes_path[i], fdt_strerror(rc)); - } else { - printf("Delete node %s\n", nodes_path[i]); - } - } - - disable_thermal_cpu_nodes(blob, disabled_cores); - disable_pmu_cpu_nodes(blob, disabled_cores); - - return 0; -} - static int cleanup_nodes_for_efi(void *blob) { static const char * const path[][2] = { @@ -1326,48 +1215,6 @@ static int cleanup_nodes_for_efi(void *blob) return 0; } -static int fixup_thermal_trips(void *blob, const char *name) -{ - int minc, maxc; - int node, trip; - - node = fdt_path_offset(blob, "/thermal-zones"); - if (node < 0) - return node; - - node = fdt_subnode_offset(blob, node, name); - if (node < 0) - return node; - - node = fdt_subnode_offset(blob, node, "trips"); - if (node < 0) - return node; - - get_cpu_temp_grade(&minc, &maxc); - - fdt_for_each_subnode(trip, blob, node) { - const char *type; - int temp, ret; - - type = fdt_getprop(blob, trip, "type", NULL); - if (!type) - continue; - - temp = 0; - if (!strcmp(type, "critical")) - temp = 1000 * maxc; - else if (!strcmp(type, "passive")) - temp = 1000 * (maxc - 10); - if (temp) { - ret = fdt_setprop_u32(blob, trip, "temperature", temp); - if (ret) - return ret; - } - } - - return 0; -} - #define OPTEE_SHM_SIZE 0x00400000 static int ft_add_optee_node(void *fdt, struct bd_info *bd) { @@ -1446,6 +1293,13 @@ static int ft_add_optee_node(void *fdt, struct bd_info *bd) int ft_system_setup(void *blob, struct bd_info *bd) { + static const char * const nodes_path[] = { + "/cpus/cpu@0", + "/cpus/cpu@1", + "/cpus/cpu@2", + "/cpus/cpu@3", + }; + #ifdef CONFIG_IMX8MQ int i = 0; int rc; @@ -1489,13 +1343,6 @@ usb_modify_speed: /* Disable the CPU idle for A0 chip since the HW does not support it */ if (is_soc_rev(CHIP_REV_1_0)) { - static const char * const nodes_path[] = { - "/cpus/cpu@0", - "/cpus/cpu@1", - "/cpus/cpu@2", - "/cpus/cpu@3", - }; - for (i = 0; i < ARRAY_SIZE(nodes_path); i++) { nodeoff = fdt_path_offset(blob, nodes_path[i]); if (nodeoff < 0) @@ -1527,16 +1374,16 @@ usb_modify_speed: } if (is_imx8md()) - disable_cpu_nodes(blob, 2); + disable_cpu_nodes(blob, nodes_path, 2, 4); #elif defined(CONFIG_IMX8MM) if (is_imx8mml() || is_imx8mmdl() || is_imx8mmsl()) disable_vpu_nodes(blob); if (is_imx8mmd() || is_imx8mmdl()) - disable_cpu_nodes(blob, 2); + disable_cpu_nodes(blob, nodes_path, 2, 4); else if (is_imx8mms() || is_imx8mmsl()) - disable_cpu_nodes(blob, 3); + disable_cpu_nodes(blob, nodes_path, 3, 4); #elif defined(CONFIG_IMX8MN) if (is_imx8mnl() || is_imx8mndl() || is_imx8mnsl()) @@ -1553,9 +1400,9 @@ usb_modify_speed: #endif if (is_imx8mnd() || is_imx8mndl() || is_imx8mnud()) - disable_cpu_nodes(blob, 2); + disable_cpu_nodes(blob, nodes_path, 2, 4); else if (is_imx8mns() || is_imx8mnsl() || is_imx8mnus()) - disable_cpu_nodes(blob, 3); + disable_cpu_nodes(blob, nodes_path, 3, 4); #elif defined(CONFIG_IMX8MP) if (is_imx8mpul()) { @@ -1582,7 +1429,7 @@ usb_modify_speed: disable_dsp_nodes(blob); if (is_imx8mpd()) - disable_cpu_nodes(blob, 2); + disable_cpu_nodes(blob, nodes_path, 2, 4); #endif cleanup_nodes_for_efi(blob); diff --git a/arch/arm/mach-imx/imx9/Kconfig b/arch/arm/mach-imx/imx9/Kconfig index e892da80fe8..4d32c28670d 100644 --- a/arch/arm/mach-imx/imx9/Kconfig +++ b/arch/arm/mach-imx/imx9/Kconfig @@ -5,11 +5,6 @@ config AHAB_BOOT help This option enables the support for AHAB secure boot. -config IMX9_LOW_DRIVE_MODE - bool "Configure to i.MX9 low drive mode" - help - This option enables the settings for iMX9 low drive mode. - config IMX9 bool select BINMAN @@ -30,6 +25,7 @@ choice config TARGET_IMX93_11X11_EVK bool "imx93_11x11_evk" + select OF_BOARD_FIXUP select IMX93 imply OF_UPSTREAM diff --git a/arch/arm/mach-imx/imx9/clock.c b/arch/arm/mach-imx/imx9/clock.c index 0abf4579a1e..12685f970de 100644 --- a/arch/arm/mach-imx/imx9/clock.c +++ b/arch/arm/mach-imx/imx9/clock.c @@ -41,6 +41,7 @@ static struct imx_fracpll_rate_table imx9_fracpll_tbl[] = { FRAC_PLL_RATE(466000000U, 1, 155, 8, 1, 3), /* 466Mhz */ FRAC_PLL_RATE(400000000U, 1, 200, 12, 0, 1), /* 400Mhz */ FRAC_PLL_RATE(300000000U, 1, 150, 12, 0, 1), + FRAC_PLL_RATE(233000000U, 1, 174, 18, 3, 4), /* 233Mhz */ }; /* return in khz */ @@ -603,7 +604,7 @@ void init_clk_usdhc(u32 index) { u32 div; - if (IS_ENABLED(CONFIG_IMX9_LOW_DRIVE_MODE)) + if (is_voltage_mode(VOLT_LOW_DRIVE)) div = 3; /* 266.67 Mhz */ else div = 2; /* 400 Mhz */ @@ -700,8 +701,7 @@ void set_arm_core_max_clk(void) #endif -#if IS_ENABLED(CONFIG_IMX9_LOW_DRIVE_MODE) -struct imx_clk_setting imx_clk_settings[] = { +struct imx_clk_setting imx_clk_ld_settings[] = { /* Set A55 clk to 500M */ {ARM_A55_CLK_ROOT, SYS_PLL_PFD0, 2}, /* Set A55 periphal to 200M */ @@ -728,7 +728,7 @@ struct imx_clk_setting imx_clk_settings[] = { /* NIC_APB to 133M */ {NIC_APB_CLK_ROOT, SYS_PLL_PFD1_DIV2, 3} }; -#else + struct imx_clk_setting imx_clk_settings[] = { /* * Set A55 clk to 500M. This clock root is normally used as intermediate @@ -762,9 +762,18 @@ struct imx_clk_setting imx_clk_settings[] = { /* NIC_APB to 133M */ {NIC_APB_CLK_ROOT, SYS_PLL_PFD1_DIV2, 3} }; -#endif -int clock_init(void) +void bus_clock_init_low_drive(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(imx_clk_ld_settings); i++) { + ccm_clk_root_cfg(imx_clk_ld_settings[i].clk_root, + imx_clk_ld_settings[i].src, imx_clk_ld_settings[i].div); + } +} + +void bus_clock_init(void) { int i; @@ -772,9 +781,11 @@ int clock_init(void) ccm_clk_root_cfg(imx_clk_settings[i].clk_root, imx_clk_settings[i].src, imx_clk_settings[i].div); } +} - if (IS_ENABLED(CONFIG_IMX9_LOW_DRIVE_MODE)) - set_arm_clk(MHZ(900)); +int clock_init_early(void) +{ + int i; /* allow for non-secure access */ for (i = 0; i < OSCPLL_END; i++) @@ -792,6 +803,19 @@ int clock_init(void) return 0; } +/* Set bus and A55 core clock per voltage mode */ +int clock_init_late(void) +{ + if (is_voltage_mode(VOLT_LOW_DRIVE)) { + bus_clock_init_low_drive(); + set_arm_core_max_clk(); + } else { + bus_clock_init(); + } + + return 0; +} + int set_clk_eqos(enum enet_freq type) { u32 eqos_post_div; diff --git a/arch/arm/mach-imx/imx9/soc.c b/arch/arm/mach-imx/imx9/soc.c index f88e7a222dd..04b21207a28 100644 --- a/arch/arm/mach-imx/imx9/soc.c +++ b/arch/arm/mach-imx/imx9/soc.c @@ -96,10 +96,16 @@ int mmc_get_env_dev(void) */ u32 get_cpu_speed_grade_hz(void) { - u32 speed, max_speed; + int ret; + u32 bank, word, speed, max_speed; u32 val; - fuse_read(2, 3, &val); + bank = HW_CFG1 / NUM_WORDS_PER_BANK; + word = HW_CFG1 % NUM_WORDS_PER_BANK; + ret = fuse_read(bank, word, &val); + if (ret) + val = 0; /* If read fuse failed, return as blank fuse */ + val = FIELD_GET(SPEED_GRADING_MASK, val) & 0xF; speed = MHZ(2300) - val * MHZ(100); @@ -122,9 +128,15 @@ u32 get_cpu_speed_grade_hz(void) */ u32 get_cpu_temp_grade(int *minc, int *maxc) { - u32 val; + int ret; + u32 bank, word, val; + + bank = HW_CFG1 / NUM_WORDS_PER_BANK; + word = HW_CFG1 % NUM_WORDS_PER_BANK; + ret = fuse_read(bank, word, &val); + if (ret) + val = 0; /* If read fuse failed, return as blank fuse */ - fuse_read(2, 3, &val); val = FIELD_GET(MARKETING_GRADING_MASK, val); if (minc && maxc) { @@ -160,13 +172,29 @@ static void set_cpu_info(struct ele_get_info_data *info) static u32 get_cpu_variant_type(u32 type) { - /* word 19 */ - u32 val = readl((ulong)FSB_BASE_ADDR + 0x8000 + (19 << 2)); - u32 val2 = readl((ulong)FSB_BASE_ADDR + 0x8000 + (20 << 2)); + u32 bank, word, val, val2; + int ret; + + bank = HW_CFG1 / NUM_WORDS_PER_BANK; + word = HW_CFG1 % NUM_WORDS_PER_BANK; + ret = fuse_read(bank, word, &val); + if (ret) + val = 0; /* If read fuse failed, return as blank fuse */ + + bank = HW_CFG2 / NUM_WORDS_PER_BANK; + word = HW_CFG2 % NUM_WORDS_PER_BANK; + ret = fuse_read(bank, word, &val2); + if (ret) + val2 = 0; /* If read fuse failed, return as blank fuse */ + bool npu_disable = !!(val & BIT(13)); bool core1_disable = !!(val & BIT(15)); u32 pack_9x9_fused = BIT(4) | BIT(17) | BIT(19) | BIT(24); + /* Low performance 93 part */ + if (((val >> 6) & 0x3F) == 0xE && npu_disable) + return core1_disable ? MXC_CPU_IMX9301 : MXC_CPU_IMX9302; + if ((val2 & pack_9x9_fused) == pack_9x9_fused) type = MXC_CPU_IMX9322; @@ -216,15 +244,9 @@ static void disable_wdog(void __iomem *wdog_base) void init_wdog(void) { - u32 src_val; - disable_wdog((void __iomem *)WDG3_BASE_ADDR); disable_wdog((void __iomem *)WDG4_BASE_ADDR); disable_wdog((void __iomem *)WDG5_BASE_ADDR); - - src_val = readl(0x54460018); /* reset mask */ - src_val &= ~0x1c; - writel(src_val, 0x54460018); } static struct mm_region imx93_mem_map[] = { @@ -480,12 +502,21 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) if (ret) goto err; - mac[0] = val[1] >> 24; - mac[1] = val[1] >> 16; - mac[2] = val[0] >> 24; - mac[3] = val[0] >> 16; - mac[4] = val[0] >> 8; - mac[5] = val[0]; + if (is_imx93() && is_soc_rev(CHIP_REV_1_0)) { + mac[0] = val[1] >> 24; + mac[1] = val[1] >> 16; + mac[2] = val[0] >> 24; + mac[3] = val[0] >> 16; + mac[4] = val[0] >> 8; + mac[5] = val[0]; + } else { + mac[0] = val[0] >> 24; + mac[1] = val[0] >> 16; + mac[2] = val[0] >> 8; + mac[3] = val[0]; + mac[4] = val[1] >> 24; + mac[5] = val[1] >> 16; + } } debug("%s: MAC%d: %02x.%02x.%02x.%02x.%02x.%02x\n", @@ -507,64 +538,152 @@ int print_cpuinfo(void) return 0; } -static int fixup_thermal_trips(void *blob, const char *name) +void build_info(void) +{ + u32 fw_version, sha1, res, status; + int ret; + + printf("\nBuildInfo:\n"); + + ret = ele_get_fw_status(&status, &res); + if (ret) { + printf(" - ELE firmware status failed %d, 0x%x\n", ret, res); + } else if ((status & 0xff) == 1) { + ret = ele_get_fw_version(&fw_version, &sha1, &res); + if (ret) { + printf(" - ELE firmware version failed %d, 0x%x\n", ret, res); + } else { + printf(" - ELE firmware version %u.%u.%u-%x", + (fw_version & (0x00ff0000)) >> 16, + (fw_version & (0x0000fff0)) >> 4, + (fw_version & (0x0000000f)), sha1); + ((fw_version & (0x80000000)) >> 31) == 1 ? puts("-dirty\n") : puts("\n"); + } + } else { + printf(" - ELE firmware not included\n"); + } + puts("\n"); +} + +int arch_misc_init(void) +{ + build_info(); + return 0; +} + +struct low_drive_freq_entry { + const char *node_path; + u32 clk; + u32 new_rate; +}; + +static int low_drive_fdt_fix_clock(void *fdt, int node_off, u32 clk_index, u32 new_rate) { - int minc, maxc; - int node, trip; +#define MAX_ASSIGNED_CLKS 8 + int cnt, j; + u32 assignedclks[MAX_ASSIGNED_CLKS]; /* max 8 clocks*/ - node = fdt_path_offset(blob, "/thermal-zones"); - if (node < 0) - return node; + cnt = fdtdec_get_int_array_count(fdt, node_off, "assigned-clock-rates", + assignedclks, MAX_ASSIGNED_CLKS); + if (cnt > 0) { + if (cnt <= clk_index) + return -ENOENT; - node = fdt_subnode_offset(blob, node, name); - if (node < 0) - return node; + if (assignedclks[clk_index] <= new_rate) + return 0; - node = fdt_subnode_offset(blob, node, "trips"); - if (node < 0) - return node; + assignedclks[clk_index] = new_rate; + for (j = 0; j < cnt; j++) + assignedclks[j] = cpu_to_fdt32(assignedclks[j]); - get_cpu_temp_grade(&minc, &maxc); + return fdt_setprop(fdt, node_off, "assigned-clock-rates", &assignedclks, + cnt * sizeof(u32)); + } - fdt_for_each_subnode(trip, blob, node) { - const char *type; - int temp, ret; + return -ENOENT; +} - type = fdt_getprop(blob, trip, "type", NULL); - if (!type) - continue; +static int low_drive_freq_update(void *blob) +{ + int nodeoff, ret; + int i; - temp = 0; - if (!strcmp(type, "critical")) - temp = 1000 * maxc; - else if (!strcmp(type, "passive")) - temp = 1000 * (maxc - 10); - if (temp) { - ret = fdt_setprop_u32(blob, trip, "temperature", temp); - if (ret) - return ret; + /* Update kernel dtb clocks for low drive mode */ + struct low_drive_freq_entry table[] = { + {"/soc@0/bus@42800000/mmc@42850000", 0, 266666667}, + {"/soc@0/bus@42800000/mmc@42860000", 0, 266666667}, + {"/soc@0/bus@42800000/mmc@428b0000", 0, 266666667}, + }; + + for (i = 0; i < ARRAY_SIZE(table); i++) { + nodeoff = fdt_path_offset(blob, table[i].node_path); + if (nodeoff >= 0) { + ret = low_drive_fdt_fix_clock(blob, nodeoff, table[i].clk, + table[i].new_rate); + if (!ret) + printf("%s freq updated\n", table[i].node_path); + } + } + + return 0; +} + +#ifdef CONFIG_OF_BOARD_FIXUP +#ifndef CONFIG_SPL_BUILD +int board_fix_fdt(void *fdt) +{ + /* Update dtb clocks for low drive mode */ + if (is_voltage_mode(VOLT_LOW_DRIVE)) { + int nodeoff; + int i; + + struct low_drive_freq_entry table[] = { + {"/soc@0/bus@42800000/mmc@42850000", 0, 266666667}, + {"/soc@0/bus@42800000/mmc@42860000", 0, 266666667}, + {"/soc@0/bus@42800000/mmc@428b0000", 0, 266666667}, + }; + + for (i = 0; i < ARRAY_SIZE(table); i++) { + nodeoff = fdt_path_offset(fdt, table[i].node_path); + if (nodeoff >= 0) + low_drive_fdt_fix_clock(fdt, nodeoff, table[i].clk, + table[i].new_rate); } } return 0; } +#endif +#endif int ft_system_setup(void *blob, struct bd_info *bd) { + static const char * const nodes_path[] = { + "/cpus/cpu@0", + "/cpus/cpu@100", + }; + if (fixup_thermal_trips(blob, "cpu-thermal")) printf("Failed to update cpu-thermal trip(s)"); + if (is_imx9351() || is_imx9331() || is_imx9321() || is_imx9311() || is_imx9301()) + disable_cpu_nodes(blob, nodes_path, 1, 2); + + if (is_voltage_mode(VOLT_LOW_DRIVE)) + low_drive_freq_update(blob); + return 0; } #if defined(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG) void get_board_serial(struct tag_serialnr *serialnr) { - printf("UID: 0x%x 0x%x 0x%x 0x%x\n", - gd->arch.uid[0], gd->arch.uid[1], gd->arch.uid[2], gd->arch.uid[3]); + printf("UID: %08x%08x%08x%08x\n", __be32_to_cpu(gd->arch.uid[0]), + __be32_to_cpu(gd->arch.uid[1]), __be32_to_cpu(gd->arch.uid[2]), + __be32_to_cpu(gd->arch.uid[3])); - serialnr->low = gd->arch.uid[0]; - serialnr->high = gd->arch.uid[3]; + serialnr->low = __be32_to_cpu(gd->arch.uid[1]); + serialnr->high = __be32_to_cpu(gd->arch.uid[0]); } #endif @@ -586,7 +705,7 @@ int arch_cpu_init(void) /* Disable wdog */ init_wdog(); - clock_init(); + clock_init_early(); trdc_early_init(); @@ -752,7 +871,7 @@ static int mix_power_init(enum mix_power_domain pd) /* power on */ clrbits_le32(&mix_regs->slice_sw_ctrl, BIT(31)); val = readl(&mix_regs->func_stat); - while (val & SRC_MIX_SLICE_FUNC_STAT_ISO_STAT) + while (val & SRC_MIX_SLICE_FUNC_STAT_SSAR_STAT) val = readl(&mix_regs->func_stat); return 0; @@ -792,7 +911,7 @@ int m33_prepare(void) (struct src_general_regs *)(ulong)SRC_GLOBAL_RBASE; struct blk_ctrl_s_aonmix_regs *s_regs = (struct blk_ctrl_s_aonmix_regs *)BLK_CTRL_S_ANOMIX_BASE_ADDR; - u32 val; + u32 val, i; if (m33_is_rom_kicked()) return -EPERM; @@ -817,6 +936,18 @@ int m33_prepare(void) /* Set ELE LP handshake for M33 reset */ setbits_le32(&s_regs->lp_handshake[0], BIT(6)); + /* OSCCA enabled, reconfigure TRDC for TCM access, otherwise ECC init will raise error */ + val = readl(BLK_CTRL_NS_ANOMIX_BASE_ADDR + 0x28); + if (val & BIT(0)) { + trdc_mbc_set_control(0x44270000, 1, 0, 0x6600); + + for (i = 0; i < 32; i++) + trdc_mbc_blk_config(0x44270000, 1, 3, 0, i, true, 0); + + for (i = 0; i < 32; i++) + trdc_mbc_blk_config(0x44270000, 1, 3, 1, i, true, 0); + } + /* Clear M33 TCM for ECC */ memset((void *)(ulong)0x201e0000, 0, 0x40000); @@ -864,3 +995,22 @@ int psci_sysreset_get_status(struct udevice *dev, char *buf, int size) return 0; } + +enum imx9_soc_voltage_mode soc_target_voltage_mode(void) +{ + u32 speed = get_cpu_speed_grade_hz(); + enum imx9_soc_voltage_mode voltage = VOLT_OVER_DRIVE; + + if (is_imx93()) { + if (speed == 1700000000) + voltage = VOLT_OVER_DRIVE; + else if (speed == 1400000000) + voltage = VOLT_NOMINAL_DRIVE; + else if (speed == 900000000 || speed == 800000000) + voltage = VOLT_LOW_DRIVE; + else + printf("Unexpected A55 freq %u, default to OD\n", speed); + } + + return voltage; +} diff --git a/arch/arm/mach-imx/imx9/trdc.c b/arch/arm/mach-imx/imx9/trdc.c index 8cdb28459a3..ef0f8b52a4d 100644 --- a/arch/arm/mach-imx/imx9/trdc.c +++ b/arch/arm/mach-imx/imx9/trdc.c @@ -4,12 +4,13 @@ */ #include <log.h> +#include <div64.h> +#include <hang.h> #include <linux/errno.h> #include <asm/io.h> #include <asm/types.h> #include <asm/arch/imx-regs.h> #include <asm/arch/sys_proto.h> -#include <div64.h> #include <asm/mach-imx/ele_api.h> #include <asm/mach-imx/mu_hal.h> @@ -18,6 +19,26 @@ #define MRC_MAX_NUM 2 #define MBC_NUM(HWCFG) (((HWCFG) >> 16) & 0xF) #define MRC_NUM(HWCFG) (((HWCFG) >> 24) & 0x1F) +#define MBC_BLK_NUM(GLBCFG) ((GLBCFG) & 0x3FF) + +enum { + /* Order following ELE API Spec, not change */ + TRDC_A, + TRDC_W, + TRDC_M, + TRDC_N, +}; + +/* Just make it easier to know what the parameter is */ +#define MBC(X) (X) +#define MRC(X) (X) +#define GLOBAL_ID(X) (X) +#define MEM(X) (X) +#define DOM(X) (X) +/* + *0|SPR|SPW|SPX,0|SUR|SUW|SWX, 0|NPR|NPW|NPX, 0|NUR|NUW|NUX + */ +#define PERM(X) (X) struct mbc_mem_dom { u32 mem_glbcfg[4]; @@ -134,6 +155,22 @@ static ulong trdc_get_mrc_base(ulong trdc_reg, u32 mrc_x) return trdc_reg + 0x10000 + 0x2000 * mbc_num + 0x1000 * mrc_x; } +static u32 trdc_mbc_blk_num(ulong trdc_reg, u32 mbc_x, u32 mem_x) +{ + struct trdc_mbc *mbc_base = (struct trdc_mbc *)trdc_get_mbc_base(trdc_reg, mbc_x); + struct mbc_mem_dom *mbc_dom; + u32 glbcfg; + + if (mbc_base == 0) + return 0; + + /* only first dom has the glbcfg */ + mbc_dom = &mbc_base->mem_dom[0]; + glbcfg = readl((uintptr_t)&mbc_dom->mem_glbcfg[mem_x]); + + return MBC_BLK_NUM(glbcfg); +} + int trdc_mbc_set_control(ulong trdc_reg, u32 mbc_x, u32 glbac_id, u32 glbac_val) { struct trdc_mbc *mbc_base = (struct trdc_mbc *)trdc_get_mbc_base(trdc_reg, mbc_x); @@ -363,69 +400,87 @@ int release_rdc(u8 xrdc) void trdc_early_init(void) { int ret = 0, i; + u32 blks; - ret |= release_rdc(0); - ret |= release_rdc(2); - ret |= release_rdc(1); - ret |= release_rdc(3); + ret |= release_rdc(TRDC_A); + ret |= release_rdc(TRDC_M); + ret |= release_rdc(TRDC_W); + ret |= release_rdc(TRDC_N); - if (!ret) { - /* Set OCRAM to RWX for secure, when OEM_CLOSE, the image is RX only */ - trdc_mbc_set_control(0x49010000, 3, 0, 0x7700); + if (ret) { + hang(); + return; + } + + /* Set OCRAM to RWX for secure, when OEM_CLOSE, the image is RX only */ + trdc_mbc_set_control(TRDC_NIC_BASE, MBC(3), GLOBAL_ID(0), PERM(0x7700)); - for (i = 0; i < 40; i++) - trdc_mbc_blk_config(0x49010000, 3, 3, 0, i, true, 0); + blks = trdc_mbc_blk_num(TRDC_NIC_BASE, MBC(3), MEM(0)); + for (i = 0; i < blks; i++) { + trdc_mbc_blk_config(TRDC_NIC_BASE, MBC(3), DOM(3), MEM(0), i, + true, GLOBAL_ID(0)); - for (i = 0; i < 40; i++) - trdc_mbc_blk_config(0x49010000, 3, 3, 1, i, true, 0); + trdc_mbc_blk_config(TRDC_NIC_BASE, MBC(3), DOM(3), MEM(1), i, + true, GLOBAL_ID(0)); - for (i = 0; i < 40; i++) - trdc_mbc_blk_config(0x49010000, 3, 0, 0, i, true, 0); + trdc_mbc_blk_config(TRDC_NIC_BASE, MBC(3), DOM(0), MEM(0), i, + true, GLOBAL_ID(0)); - for (i = 0; i < 40; i++) - trdc_mbc_blk_config(0x49010000, 3, 0, 1, i, true, 0); + trdc_mbc_blk_config(TRDC_NIC_BASE, MBC(3), DOM(0), MEM(1), i, + true, GLOBAL_ID(0)); } } void trdc_init(void) { /* TRDC mega */ - if (trdc_mrc_enabled(0x49010000)) { + if (trdc_mrc_enabled(TRDC_NIC_BASE)) { /* DDR */ - trdc_mrc_set_control(0x49010000, 0, 0, 0x7777); + trdc_mrc_set_control(TRDC_NIC_BASE, MRC(0), GLOBAL_ID(0), PERM(0x7777)); /* ELE */ - trdc_mrc_region_config(0x49010000, 0, 0, 0x80000000, 0xFFFFFFFF, false, 0); + trdc_mrc_region_config(TRDC_NIC_BASE, MRC(0), DOM(0), 0x80000000, + 0xFFFFFFFF, false, GLOBAL_ID(0)); /* MTR */ - trdc_mrc_region_config(0x49010000, 0, 1, 0x80000000, 0xFFFFFFFF, false, 0); + trdc_mrc_region_config(TRDC_NIC_BASE, MRC(0), DOM(1), 0x80000000, + 0xFFFFFFFF, false, GLOBAL_ID(0)); /* M33 */ - trdc_mrc_region_config(0x49010000, 0, 2, 0x80000000, 0xFFFFFFFF, false, 0); + trdc_mrc_region_config(TRDC_NIC_BASE, MRC(0), DOM(2), 0x80000000, + 0xFFFFFFFF, false, GLOBAL_ID(0)); /* A55*/ - trdc_mrc_region_config(0x49010000, 0, 3, 0x80000000, 0xFFFFFFFF, false, 0); + trdc_mrc_region_config(TRDC_NIC_BASE, MRC(0), DOM(3), 0x80000000, + 0xFFFFFFFF, false, GLOBAL_ID(0)); /* For USDHC1 to DDR, USDHC1 is default force to non-secure */ - trdc_mrc_region_config(0x49010000, 0, 5, 0x80000000, 0xFFFFFFFF, false, 0); + trdc_mrc_region_config(TRDC_NIC_BASE, MRC(0), DOM(5), 0x80000000, + 0xFFFFFFFF, false, GLOBAL_ID(0)); /* For USDHC2 to DDR, USDHC2 is default force to non-secure */ - trdc_mrc_region_config(0x49010000, 0, 6, 0x80000000, 0xFFFFFFFF, false, 0); + trdc_mrc_region_config(TRDC_NIC_BASE, MRC(0), DOM(6), 0x80000000, + 0xFFFFFFFF, false, GLOBAL_ID(0)); /* eDMA */ - trdc_mrc_region_config(0x49010000, 0, 7, 0x80000000, 0xFFFFFFFF, false, 0); + trdc_mrc_region_config(TRDC_NIC_BASE, MRC(0), DOM(7), 0x80000000, + 0xFFFFFFFF, false, GLOBAL_ID(0)); /*CoreSight, TestPort*/ - trdc_mrc_region_config(0x49010000, 0, 8, 0x80000000, 0xFFFFFFFF, false, 0); + trdc_mrc_region_config(TRDC_NIC_BASE, MRC(0), DOM(8), 0x80000000, + 0xFFFFFFFF, false, GLOBAL_ID(0)); /* DAP */ - trdc_mrc_region_config(0x49010000, 0, 9, 0x80000000, 0xFFFFFFFF, false, 0); + trdc_mrc_region_config(TRDC_NIC_BASE, MRC(0), DOM(9), 0x80000000, + 0xFFFFFFFF, false, GLOBAL_ID(0)); /*SoC masters */ - trdc_mrc_region_config(0x49010000, 0, 10, 0x80000000, 0xFFFFFFFF, false, 0); + trdc_mrc_region_config(TRDC_NIC_BASE, MRC(0), DOM(10), 0x80000000, + 0xFFFFFFFF, false, GLOBAL_ID(0)); /*USB*/ - trdc_mrc_region_config(0x49010000, 0, 11, 0x80000000, 0xFFFFFFFF, false, 0); + trdc_mrc_region_config(TRDC_NIC_BASE, MRC(0), DOM(11), 0x80000000, + 0xFFFFFFFF, false, GLOBAL_ID(0)); } } @@ -504,78 +559,78 @@ void trdc_dump(void) printf("TRDC AONMIX MBC\n"); - trdc_mbc_control_dump(0x44270000, 0, 0); - trdc_mbc_control_dump(0x44270000, 1, 0); + trdc_mbc_control_dump(TRDC_AON_BASE, MBC(0), GLOBAL_ID(0)); + trdc_mbc_control_dump(TRDC_AON_BASE, MBC(1), GLOBAL_ID(0)); for (i = 0; i < 11; i++) - trdc_mbc_mem_dump(0x44270000, 0, 3, 0, i); + trdc_mbc_mem_dump(TRDC_AON_BASE, MBC(0), DOM(3), MEM(0), i); for (i = 0; i < 1; i++) - trdc_mbc_mem_dump(0x44270000, 0, 3, 1, i); + trdc_mbc_mem_dump(TRDC_AON_BASE, MBC(0), DOM(3), MEM(1), i); for (i = 0; i < 4; i++) - trdc_mbc_mem_dump(0x44270000, 1, 3, 0, i); + trdc_mbc_mem_dump(TRDC_AON_BASE, MBC(1), DOM(3), MEM(0), i); for (i = 0; i < 4; i++) - trdc_mbc_mem_dump(0x44270000, 1, 3, 1, i); + trdc_mbc_mem_dump(TRDC_AON_BASE, MBC(1), DOM(3), MEM(1), i); printf("TRDC WAKEUP MBC\n"); - trdc_mbc_control_dump(0x42460000, 0, 0); - trdc_mbc_control_dump(0x42460000, 1, 0); + trdc_mbc_control_dump(TRDC_WAKEUP_BASE, MBC(0), GLOBAL_ID(0)); + trdc_mbc_control_dump(TRDC_WAKEUP_BASE, MBC(1), GLOBAL_ID(0)); for (i = 0; i < 15; i++) - trdc_mbc_mem_dump(0x42460000, 0, 3, 0, i); + trdc_mbc_mem_dump(TRDC_WAKEUP_BASE, MBC(0), DOM(3), MEM(0), i); - trdc_mbc_mem_dump(0x42460000, 0, 3, 1, 0); - trdc_mbc_mem_dump(0x42460000, 0, 3, 2, 0); + trdc_mbc_mem_dump(TRDC_WAKEUP_BASE, MBC(0), DOM(3), MEM(1), 0); + trdc_mbc_mem_dump(TRDC_WAKEUP_BASE, 0, 3, 2, 0); for (i = 0; i < 2; i++) - trdc_mbc_mem_dump(0x42460000, 1, 3, 0, i); + trdc_mbc_mem_dump(TRDC_WAKEUP_BASE, MBC(1), DOM(3), MEM(0), i); - trdc_mbc_mem_dump(0x42460000, 1, 3, 1, 0); - trdc_mbc_mem_dump(0x42460000, 1, 3, 2, 0); - trdc_mbc_mem_dump(0x42460000, 1, 3, 3, 0); + trdc_mbc_mem_dump(TRDC_WAKEUP_BASE, MBC(1), DOM(3), MEM(1), 0); + trdc_mbc_mem_dump(TRDC_WAKEUP_BASE, 1, 3, 2, 0); + trdc_mbc_mem_dump(TRDC_WAKEUP_BASE, MBC(1), DOM(3), MEM(3), 0); printf("TRDC NICMIX MBC\n"); - trdc_mbc_control_dump(0x49010000, 0, 0); - trdc_mbc_control_dump(0x49010000, 1, 0); - trdc_mbc_control_dump(0x49010000, 2, 0); - trdc_mbc_control_dump(0x49010000, 3, 0); + trdc_mbc_control_dump(TRDC_NIC_BASE, MBC(0), GLOBAL_ID(0)); + trdc_mbc_control_dump(TRDC_NIC_BASE, MBC(1), GLOBAL_ID(0)); + trdc_mbc_control_dump(TRDC_NIC_BASE, MBC(2), GLOBAL_ID(0)); + trdc_mbc_control_dump(TRDC_NIC_BASE, MBC(3), GLOBAL_ID(0)); for (i = 0; i < 7; i++) - trdc_mbc_mem_dump(0x49010000, 0, 3, 0, i); + trdc_mbc_mem_dump(TRDC_NIC_BASE, MBC(0), DOM(3), MEM(0), i); for (i = 0; i < 2; i++) - trdc_mbc_mem_dump(0x49010000, 0, 3, 1, i); + trdc_mbc_mem_dump(TRDC_NIC_BASE, MBC(0), DOM(3), MEM(1), i); for (i = 0; i < 5; i++) - trdc_mbc_mem_dump(0x49010000, 0, 3, 2, i); + trdc_mbc_mem_dump(TRDC_NIC_BASE, MBC(0), DOM(3), MEM(2), i); for (i = 0; i < 6; i++) - trdc_mbc_mem_dump(0x49010000, 0, 3, 3, i); + trdc_mbc_mem_dump(TRDC_NIC_BASE, MBC(0), DOM(3), MEM(3), i); for (i = 0; i < 1; i++) - trdc_mbc_mem_dump(0x49010000, 1, 3, 0, i); + trdc_mbc_mem_dump(TRDC_NIC_BASE, MBC(1), DOM(3), MEM(0), i); for (i = 0; i < 1; i++) - trdc_mbc_mem_dump(0x49010000, 1, 3, 1, i); + trdc_mbc_mem_dump(TRDC_NIC_BASE, MBC(1), DOM(3), MEM(1), i); for (i = 0; i < 3; i++) - trdc_mbc_mem_dump(0x49010000, 1, 3, 2, i); + trdc_mbc_mem_dump(TRDC_NIC_BASE, MBC(1), DOM(3), MEM(2), i); for (i = 0; i < 3; i++) - trdc_mbc_mem_dump(0x49010000, 1, 3, 3, i); + trdc_mbc_mem_dump(TRDC_NIC_BASE, MBC(1), DOM(3), MEM(3), i); for (i = 0; i < 2; i++) - trdc_mbc_mem_dump(0x49010000, 2, 3, 0, i); + trdc_mbc_mem_dump(TRDC_NIC_BASE, MBC(2), DOM(3), MEM(0), i); for (i = 0; i < 2; i++) - trdc_mbc_mem_dump(0x49010000, 2, 3, 1, i); + trdc_mbc_mem_dump(TRDC_NIC_BASE, MBC(2), DOM(3), MEM(1), i); for (i = 0; i < 5; i++) - trdc_mbc_mem_dump(0x49010000, 3, 3, 0, i); + trdc_mbc_mem_dump(TRDC_NIC_BASE, MBC(3), DOM(3), MEM(0), i); for (i = 0; i < 5; i++) - trdc_mbc_mem_dump(0x49010000, 3, 3, 1, i); + trdc_mbc_mem_dump(TRDC_NIC_BASE, MBC(3), DOM(3), MEM(1), i); } #endif diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index 7a567672251..1f8022ee685 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -541,6 +541,16 @@ config TARGET_LITEBOARD select BOARD_LATE_INIT select MX6UL_LITESOM +config TARGET_LXR2 + bool "Comvetia i.MX6Q LXR2" + depends on MX6Q + select BOARD_EARLY_INIT_F + select BOARD_LATE_INIT + select DM + select DM_THERMAL + select SUPPORT_SPL + imply CMD_DM + config TARGET_PCM058 bool "Phytec PCM058 i.MX6 Quad" depends on MX6Q @@ -696,6 +706,7 @@ source "board/boundary/nitrogen6x/Kconfig" source "board/bsh/imx6ulz_smm_m2/Kconfig" source "board/bticino/mamoj/Kconfig" source "board/compulab/cm_fx6/Kconfig" +source "board/comvetia/lxr2/Kconfig" source "board/dhelectronics/dh_imx6/Kconfig" source "board/embest/mx6boards/Kconfig" source "board/engicam/imx6q/Kconfig" diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c index 4f15a560902..51ce40e7f08 100644 --- a/arch/sandbox/cpu/cpu.c +++ b/arch/sandbox/cpu/cpu.c @@ -109,8 +109,9 @@ void *phys_to_virt(phys_addr_t paddr) state = state_get_current(); list_for_each_entry(mentry, &state->mapmem_head, sibling_node) { if (mentry->tag == paddr) { - debug("%s: Used map from %lx to %p\n", __func__, - (ulong)paddr, mentry->ptr); + log_debug("Used map from %lx to %p\n", (ulong)paddr, + mentry->ptr); + mentry->refcnt++; return mentry->ptr; } } @@ -130,11 +131,12 @@ struct sandbox_mapmem_entry *find_tag(const void *ptr) list_for_each_entry(mentry, &state->mapmem_head, sibling_node) { if (mentry->ptr == ptr) { - debug("%s: Used map from %p to %lx\n", __func__, ptr, - mentry->tag); + log_debug("Used map from %p to %lx\n", ptr, + mentry->tag); return mentry; } } + return NULL; } @@ -156,7 +158,7 @@ phys_addr_t virt_to_phys(void *ptr) __func__, ptr, (ulong)gd->ram_size); os_abort(); } - debug("%s: Used map from %p to %lx\n", __func__, ptr, mentry->tag); + log_debug("Used map from %p to %lx\n", ptr, mentry->tag); return mentry->tag; } @@ -174,6 +176,7 @@ void *map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) __func__, (uint)paddr, len, plen); } map_len = len; + log_debug("pci map %lx -> %p\n", (ulong)paddr, ptr); return ptr; } #endif @@ -183,12 +186,30 @@ void *map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) void unmap_physmem(const void *ptr, unsigned long flags) { + struct sandbox_mapmem_entry *mentry; + #ifdef CONFIG_PCI if (map_dev) { pci_unmap_physmem(ptr, map_len, map_dev); map_dev = NULL; } #endif + + /* If it is in emulated RAM, we didn't create a tag, so nothing to do */ + if (is_in_sandbox_mem(ptr)) + return; + + mentry = find_tag(ptr); + if (mentry) { + if (!--mentry->refcnt) { + list_del(&mentry->sibling_node); + log_debug("Removed map from %p to %lx\n", ptr, + (ulong)mentry->tag); + free(mentry); + } + } else { + log_warning("Address not mapped: %p\n", ptr); + } } phys_addr_t map_to_sysmem(const void *ptr) @@ -217,11 +238,14 @@ phys_addr_t map_to_sysmem(const void *ptr) } mentry->tag = state->next_tag++; mentry->ptr = (void *)ptr; + mentry->refcnt = 0; list_add_tail(&mentry->sibling_node, &state->mapmem_head); - debug("%s: Added map from %p to %lx\n", __func__, ptr, - (ulong)mentry->tag); + log_debug("Added map from %p to %lx\n", ptr, + (ulong)mentry->tag); } + mentry->refcnt++; + /* * Return the tag as the address to use. A later call to map_sysmem() * will return ptr diff --git a/arch/sandbox/cpu/state.c b/arch/sandbox/cpu/state.c index a9ca79e76d2..49236db99c2 100644 --- a/arch/sandbox/cpu/state.c +++ b/arch/sandbox/cpu/state.c @@ -373,12 +373,13 @@ void state_reset_for_test(struct sandbox_state *state) memset(state->spi, '\0', sizeof(state->spi)); /* - * Set up the memory tag list. Use the top of emulated SDRAM for the - * first tag number, since that address offset is outside the legal - * range, and can be assumed to be a tag. + * Set up the memory tag list. We could use the top of emulated SDRAM + * for the first tag number, since that address offset is outside the + * legal SDRAM range, but PCI can have address there. So use a very + * large address instead */ INIT_LIST_HEAD(&state->mapmem_head); - state->next_tag = state->ram_size; + state->next_tag = 0xff000000; } bool autoboot_keyed(void) diff --git a/arch/sandbox/include/asm/state.h b/arch/sandbox/include/asm/state.h index 6b50473ed41..e7dc01759e8 100644 --- a/arch/sandbox/include/asm/state.h +++ b/arch/sandbox/include/asm/state.h @@ -53,10 +53,13 @@ struct sandbox_wdt_info { * be returned, just as it would for a normal sandbox address. * * @tag: Address tag (a value which U-Boot uses to refer to the address) + * @refcnt: Number of references to this tag * @ptr: Associated pointer for that tag + * @sibling_node: Next node */ struct sandbox_mapmem_entry { ulong tag; + uint refcnt; void *ptr; struct list_head sibling_node; }; diff --git a/arch/sandbox/lib/pci_io.c b/arch/sandbox/lib/pci_io.c index 6040eacb594..5eff7c7d65d 100644 --- a/arch/sandbox/lib/pci_io.c +++ b/arch/sandbox/lib/pci_io.c @@ -8,6 +8,8 @@ * IO space access commands. */ +#define LOG_CATEGORY UCLASS_PCI + #include <command.h> #include <dm.h> #include <log.h> @@ -31,10 +33,11 @@ int pci_map_physmem(phys_addr_t paddr, unsigned long *lenp, if (ret) continue; *devp = dev; + log_debug("addr=%lx, dev=%s\n", (ulong)paddr, dev->name); return 0; } - debug("%s: failed: addr=%pap\n", __func__, &paddr); + log_debug("%s: failed: addr=%pap\n", __func__, &paddr); return -ENOSYS; } @@ -66,7 +69,7 @@ static int pci_io_read(unsigned int addr, ulong *valuep, pci_size_t size) } } - debug("%s: failed: addr=%x\n", __func__, addr); + log_debug("%s: failed: addr=%x\n", __func__, addr); return -ENOSYS; } @@ -87,7 +90,7 @@ static int pci_io_write(unsigned int addr, ulong value, pci_size_t size) } } - debug("%s: failed: addr=%x, value=%lx\n", __func__, addr, value); + log_debug("%s: failed: addr=%x, value=%lx\n", __func__, addr, value); return -ENOSYS; } diff --git a/board/comvetia/lxr2/Kconfig b/board/comvetia/lxr2/Kconfig new file mode 100644 index 00000000000..93c7f49071c --- /dev/null +++ b/board/comvetia/lxr2/Kconfig @@ -0,0 +1,12 @@ +if TARGET_LXR2 + +config SYS_BOARD + default "lxr2" + +config SYS_VENDOR + default "comvetia" + +config SYS_CONFIG_NAME + default "lxr2" + +endif diff --git a/board/comvetia/lxr2/MAINTAINERS b/board/comvetia/lxr2/MAINTAINERS new file mode 100644 index 00000000000..25db90bb796 --- /dev/null +++ b/board/comvetia/lxr2/MAINTAINERS @@ -0,0 +1,6 @@ +COMVETIA LXR2 +M: Fabio Estevam <festevam@denx.de> +S: Maintained +F: board/comvetia/lxr2/ +F: include/configs/lxr2.h +F: configs/lxr2_defconfig diff --git a/board/comvetia/lxr2/Makefile b/board/comvetia/lxr2/Makefile new file mode 100644 index 00000000000..86b9284521c --- /dev/null +++ b/board/comvetia/lxr2/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0+ + +obj-y := lxr2.o diff --git a/board/comvetia/lxr2/lxr2.c b/board/comvetia/lxr2/lxr2.c new file mode 100644 index 00000000000..173263522bd --- /dev/null +++ b/board/comvetia/lxr2/lxr2.c @@ -0,0 +1,388 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// Copyright (C) 2017 Stefano Babic <sbabic@denx.de> +// Copyright (C) 2024 Fabio Estevam <festevam@denx.de> + +#include <asm/io.h> +#include <asm/arch/clock.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/mx6-ddr.h> +#include <asm/arch/iomux.h> +#include <asm/arch/mx6-pins.h> +#include <asm/mach-imx/iomux-v3.h> +#include <asm/mach-imx/boot_mode.h> + +#include <asm/mach-imx/spi.h> +#include <linux/errno.h> +#include <asm/gpio.h> +#include <nand.h> +#include <miiphy.h> +#include <netdev.h> +#include <asm/arch/sys_proto.h> +#include <asm/sections.h> +#include <linux/delay.h> + +#include <image.h> +#include <init.h> +#include <serial.h> +#include <spl.h> +#include <linux/sizes.h> +#include <mmc.h> +#include <fsl_esdhc_imx.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define NAND_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +int dram_init(void) +{ + gd->ram_size = imx_ddr_size(); + return 0; +} + +static const iomux_v3_cfg_t uart4_pads[] = { + MX6_PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +static void setup_iomux_uart(void) +{ + imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads)); +} + +static void setup_gpmi_nand(void) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + + /* gate ENFC_CLK_ROOT clock first,before clk source switch */ + clrbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); + + /* config gpmi and bch clock to 100 MHz */ + clrsetbits_le32(&mxc_ccm->cs2cdr, + MXC_CCM_CS2CDR_ENFC_CLK_PODF_MASK | + MXC_CCM_CS2CDR_ENFC_CLK_PRED_MASK | + MXC_CCM_CS2CDR_ENFC_CLK_SEL_MASK, + MXC_CCM_CS2CDR_ENFC_CLK_PODF(0) | + MXC_CCM_CS2CDR_ENFC_CLK_PRED(3) | + MXC_CCM_CS2CDR_ENFC_CLK_SEL(3)); + + /* enable ENFC_CLK_ROOT clock */ + setbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); + + /* enable gpmi and bch clock gating */ + setbits_le32(&mxc_ccm->CCGR4, + MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK | + MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK | + MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK | + MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK | + MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_OFFSET); + + /* enable apbh clock gating */ + setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); +} + +int board_spi_cs_gpio(unsigned int bus, unsigned int cs) +{ + return IMX_GPIO_NR(4, 24); +} + +int board_early_init_f(void) +{ + setup_iomux_uart(); + + return 0; +} + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + setup_gpmi_nand(); + + return 0; +} + +/* + * BOOT_CFG1, BOOT_CFG2, BOOT_CFG3, BOOT_CFG4 + * see Table 8-11 and Table 5-9 + * BOOT_CFG1[7] = 1 (boot from NAND) + * BOOT_CFG1[5] = 0 - raw NAND + * BOOT_CFG1[4] = 0 - default pad settings + * BOOT_CFG1[3:2] = 00 - devices = 1 + * BOOT_CFG1[1:0] = 00 - Row Address Cycles = 3 + * BOOT_CFG2[4:3] = 00 - Boot Search Count = 2 + * BOOT_CFG2[2:1] = 01 - Pages In Block = 64 + * BOOT_CFG2[0] = 0 - Reset time 12ms + */ +static const struct boot_mode board_boot_modes[] = { + /* NAND: 64pages per block, 3 row addr cycles, 2 copies of FCB/DBBT */ + {"nand", MAKE_CFGVAL(0x80, 0x02, 0x00, 0x00)}, + {"mmc0", MAKE_CFGVAL(0x40, 0x20, 0x00, 0x00)}, + {NULL, 0}, +}; + +int board_late_init(void) +{ + add_board_boot_modes(board_boot_modes); + + return 0; +} + +#ifdef CONFIG_SPL_BUILD +#include <spl.h> + +#define MX6_PHYFLEX_ERR006282 IMX_GPIO_NR(2, 11) +static void phyflex_err006282_workaround(void) +{ + /* + * Boards beginning with 1362.2 have the SD4_DAT3 pin connected + * to the CMIC. If this pin isn't toggled within 10s the boards + * reset. The pin is unconnected on older boards, so we do not + * need a check for older boards before applying this fixup. + */ + + gpio_request(MX6_PHYFLEX_ERR006282, "errata_gpio"); + gpio_direction_output(MX6_PHYFLEX_ERR006282, 0); + mdelay(2); + gpio_direction_output(MX6_PHYFLEX_ERR006282, 1); + mdelay(2); + gpio_set_value(MX6_PHYFLEX_ERR006282, 0); + + imx_iomux_v3_setup_pad(MX6_PAD_SD4_DAT3__GPIO2_IO11); + + gpio_direction_input(MX6_PHYFLEX_ERR006282); +} + +static const iomux_v3_cfg_t gpios_pads[] = { + MX6_PAD_SD4_DAT3__GPIO2_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_SD4_DAT4__GPIO2_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_SD4_DAT5__GPIO2_IO13 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_SD4_DAT6__GPIO2_IO14 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_SD4_DAT7__GPIO2_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_EIM_EB3__GPIO2_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_ENET_TXD0__GPIO1_IO30 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static void setup_gpios(void) +{ + imx_iomux_v3_setup_multiple_pads(gpios_pads, ARRAY_SIZE(gpios_pads)); +} + +static const struct mx6dq_iomux_ddr_regs mx6_ddr_ioregs = { + .dram_sdclk_0 = 0x00000030, + .dram_sdclk_1 = 0x00000030, + .dram_cas = 0x00000030, + .dram_ras = 0x00000030, + .dram_reset = 0x00000030, + .dram_sdcke0 = 0x00003000, + .dram_sdcke1 = 0x00003000, + .dram_sdba2 = 0x00000030, + .dram_sdodt0 = 0x00000030, + .dram_sdodt1 = 0x00000030, + + .dram_sdqs0 = 0x00000028, + .dram_sdqs1 = 0x00000028, + .dram_sdqs2 = 0x00000028, + .dram_sdqs3 = 0x00000028, + .dram_sdqs4 = 0x00000028, + .dram_sdqs5 = 0x00000028, + .dram_sdqs6 = 0x00000028, + .dram_sdqs7 = 0x00000028, + .dram_dqm0 = 0x00000028, + .dram_dqm1 = 0x00000028, + .dram_dqm2 = 0x00000028, + .dram_dqm3 = 0x00000028, + .dram_dqm4 = 0x00000028, + .dram_dqm5 = 0x00000028, + .dram_dqm6 = 0x00000028, + .dram_dqm7 = 0x00000028, +}; + +static const struct mx6dq_iomux_grp_regs mx6_grp_ioregs = { + .grp_ddr_type = 0x000C0000, + .grp_ddrmode_ctl = 0x00020000, + .grp_ddrpke = 0x00000000, + .grp_addds = 0x30, + .grp_ctlds = 0x30, + .grp_ddrmode = 0x00020000, + .grp_b0ds = 0x00000028, + .grp_b1ds = 0x00000028, + .grp_b2ds = 0x00000028, + .grp_b3ds = 0x00000028, + .grp_b4ds = 0x00000028, + .grp_b5ds = 0x00000028, + .grp_b6ds = 0x00000028, + .grp_b7ds = 0x00000028, +}; + +static const struct mx6_mmdc_calibration mx6_mmcd_calib = { + .p0_mpwldectrl0 = 0x00170018, + .p0_mpwldectrl1 = 0x003B0039, + .p1_mpwldectrl0 = 0x00350048, + .p1_mpwldectrl1 = 0x00410052, + .p0_mpdgctrl0 = 0x03600374, + .p0_mpdgctrl1 = 0x03680360, + .p1_mpdgctrl0 = 0x0370037C, + .p1_mpdgctrl1 = 0x03700350, + .p0_mprddlctl = 0x3A363234, + .p1_mprddlctl = 0x3634363C, + .p0_mpwrdlctl = 0x38383E3C, + .p1_mpwrdlctl = 0x422A483C, +}; + +/* MT41K64M16JT-125 (1Gb density) */ +static struct mx6_ddr3_cfg mem_ddr = { + .mem_speed = 1600, + .density = 1, + .width = 16, + .banks = 8, + .rowaddr = 13, + .coladdr = 10, + .pagesz = 2, + .trcd = 1375, + .trcmin = 4875, + .trasmin = 3500, + .SRT = 1, +}; + +static void ccgr_init(void) +{ + struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + + writel(0x00C03F3F, &ccm->CCGR0); + writel(0x0030FC03, &ccm->CCGR1); + writel(0x0FFFC000, &ccm->CCGR2); + writel(0x3FF00000, &ccm->CCGR3); + writel(0x00FFF300, &ccm->CCGR4); + writel(0x0F0000C3, &ccm->CCGR5); + writel(0x000003FF, &ccm->CCGR6); +} + +static void spl_dram_init(void) +{ + struct mx6_ddr_sysinfo sysinfo = { + .dsize = 2, + .cs_density = 6, + .ncs = 2, + .cs1_mirror = 1, + .rtt_wr = 1, + .rtt_nom = 1, + .walat = 1, + .ralat = 5, + .mif3_mode = 3, + .bi_on = 1, + .sde_to_rst = 0x10, + .rst_to_cke = 0x23, + .ddr_type = DDR_TYPE_DDR3, + .refsel = 1, + .refr = 7, + }; + + mx6dq_dram_iocfg(64, &mx6_ddr_ioregs, &mx6_grp_ioregs); + mx6_dram_cfg(&sysinfo, &mx6_mmcd_calib, &mem_ddr); +} + +#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +struct fsl_esdhc_cfg usdhc_cfg[1] = { + {USDHC3_BASE_ADDR}, +}; + +static const iomux_v3_cfg_t usdhc3_pads[] = { + MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +int board_mmc_init(struct bd_info *bis) +{ + imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); + usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR; + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[0].max_bus_width = 4; + gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk; + + return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); +} + +void board_boot_order(u32 *spl_boot_list) +{ + spl_boot_list[0] = spl_boot_device(); + + switch (spl_boot_list[0]) { + case BOOT_DEVICE_SPI: + spl_boot_list[1] = BOOT_DEVICE_UART; + break; + case BOOT_DEVICE_MMC1: + spl_boot_list[1] = BOOT_DEVICE_SPI; + spl_boot_list[2] = BOOT_DEVICE_UART; + break; + default: + printf("Boot device %x\n", spl_boot_list[0]); + } +} + +static const iomux_v3_cfg_t ecspi3_pads[] = { + MX6_PAD_DISP0_DAT0__ECSPI3_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_DISP0_DAT1__ECSPI3_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_DISP0_DAT2__ECSPI3_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_DISP0_DAT3__GPIO4_IO24 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static void setup_spi(void) +{ + imx_iomux_v3_setup_multiple_pads(ecspi3_pads, ARRAY_SIZE(ecspi3_pads)); + + enable_spi_clk(true, 2); +} + +void board_init_f(ulong dummy) +{ + /* setup clock gating */ + ccgr_init(); + + /* setup AIPS and disable watchdog */ + arch_cpu_init(); + + /* setup AXI */ + gpr_init(); + + board_early_init_f(); + + /* setup GP timer */ + timer_init(); + + /* UART clocks enabled and gd valid - init serial console */ + preloader_console_init(); + + setup_spi(); + + setup_gpios(); + + /* DDR initialization */ + spl_dram_init(); + + /* Clear the BSS. */ + memset(__bss_start, 0, __bss_end - __bss_start); + + phyflex_err006282_workaround(); + + /* load/boot image from boot device */ + board_init_r(NULL, 0); +} +#endif diff --git a/board/comvetia/lxr2/lxr2.env b/board/comvetia/lxr2/lxr2.env new file mode 100644 index 00000000000..ec213800222 --- /dev/null +++ b/board/comvetia/lxr2/lxr2.env @@ -0,0 +1,34 @@ +addcons=setenv bootargs ${bootargs} console=${console},${baudrate} +addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off +addmisc=setenv bootargs ${bootargs} ${miscargs} +addmtd=run mtdnand;run mtdspi;setenv bootargs ${bootargs} ${mtdparts} +altbootcmd=run swupdate +bootcmd=run nandboot;run swupdate +bootcount=2 +bootlimit=3 +console=ttymxc3 +cpu=armv7 +ethprime=FEC +fdt_addr_r=0x18000000 +fitfile=fitImage +flash-all-from-sd-card=env default -f -a;load mmc 0:1 10000000 u-boot.scr;source 10000000;saveenv +initrd_high=0xffffffff +kernel_addr_r=0x12000000 +loadaddr=0x12000000 +miscargs=panic=1 +mmcargs=setenv bootargs root=${mmcroot} rw rootwait +mmcboot=if run mmcload;then run mmcargs addcons addmisc;bootm;fi +mmcload=mmc rescan;load mmc 0:${mmcpart} ${kernel_addr_r} boot/fitImage +mmcpart=1 +mmcroot=/dev/mmcblk0p1 +mtdnand=setenv mtdparts mtdparts=gpmi-nand:40m(Kernels),860m(root),-(nand) +mtdspi=setenv mtdparts ${mtdparts}';spi2.0:1024k(bootloader),64k(env1),64k(env2),-(rescue)' +nanboot_fit=tftp ${kernel_addr_r} ${board_name}/${fitfile};run nandargs addip addcons addmtd addmisc;bootm +nandargs=setenv bootargs ubi.mtd=1 root=ubi0:rootfs${ubiroot} rootfstype=ubifs +nandboot=run mtdnand;ubi part Kernels;ubi readvol ${kernel_addr_r} kernel${ubiroot};run nandargs addip addcons addmtd addmisc;bootm ${kernel_addr_r} +net_nfs=tftp ${kernel_addr_r} ${board_name}/${bootfile};tftp ${fdt_addr_r} ${board_name}/${fdt_file};run nfsargs addip addcons addmtd addmisc;bootm ${kernel_addr_r} - ${fdt_addr_r} +net_nfs_fit=tftp ${kernel_addr_r} ${board_name}/${fitfile};run nfsargs addip addcons addmtd addmisc;bootm ${kernel_addr_r} +netmask=255.255.255.0 +nfsargs=setenv bootargs root=/dev/nfs nfsroot=${serverip}:${nfsroot},v3 panic=1 +swupdate=setenv bootargs root=/dev/ram;run addip addcons addmtd addmisc;sf probe;sf read ${kernel_addr_r} 120000 600000;sf read 14000000 730000 800000;bootm ${kernel_addr_r} 14000000 +ubiroot=1 diff --git a/board/freescale/imx93_evk/Makefile b/board/freescale/imx93_evk/Makefile index 17956d24bf7..ede8d20ff5c 100644 --- a/board/freescale/imx93_evk/Makefile +++ b/board/freescale/imx93_evk/Makefile @@ -8,9 +8,5 @@ obj-y += imx93_evk.o ifdef CONFIG_SPL_BUILD obj-y += spl.o -ifdef CONFIG_IMX9_LOW_DRIVE_MODE -obj-$(CONFIG_IMX93_EVK_LPDDR4X) += lpddr4x_timing_ld.o -else -obj-$(CONFIG_IMX93_EVK_LPDDR4X) += lpddr4x_timing.o -endif +obj-$(CONFIG_IMX93_EVK_LPDDR4X) += lpddr4x_timing.o lpddr4x_timing_1866mts.o endif diff --git a/board/freescale/imx93_evk/lpddr4x_timing_1866mts.c b/board/freescale/imx93_evk/lpddr4x_timing_1866mts.c new file mode 100644 index 00000000000..f4e910b2536 --- /dev/null +++ b/board/freescale/imx93_evk/lpddr4x_timing_1866mts.c @@ -0,0 +1,1995 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright 2024 NXP + * + * Code generated with DDR Tool v3.4.0_8.3-4e2b550a. + * DDR PHY FW2022.01 + */ + +#include <linux/kernel.h> +#include <asm/arch/ddr.h> + +/* Initialize DDRC registers */ +static struct dram_cfg_param ddr_ddrc_cfg[] = { + {0x4e300110, 0x44100001}, + {0x4e300000, 0x8000ff}, + {0x4e300008, 0x0}, + {0x4e300080, 0x80000512}, + {0x4e300084, 0x0}, + {0x4e300114, 0x1002}, + {0x4e300260, 0x80}, + {0x4e300f04, 0x80}, + {0x4e300800, 0x43b30002}, + {0x4e300804, 0x1f1f1f1f}, + {0x4e301000, 0x0}, + {0x4e301240, 0x0}, + {0x4e301244, 0x0}, + {0x4e301248, 0x0}, + {0x4e30124c, 0x0}, + {0x4e301250, 0x0}, + {0x4e301254, 0x0}, + {0x4e301258, 0x0}, + {0x4e30125c, 0x0}, +}; + +/* dram fsp cfg */ +static struct dram_fsp_cfg ddr_dram_fsp_cfg[] = { + { + { + {0x4e300100, 0x12552100}, + {0x4e300104, 0xF877000E}, + {0x4e300108, 0x1816B4AA}, + {0x4e30010C, 0x0051E1E6}, + {0x4e300124, 0x0E3A0000}, + {0x4e300160, 0x00009101}, + {0x4e30016C, 0x30900000}, + {0x4e300170, 0x8A0A0508}, + {0x4e300250, 0x00000014}, + {0x4e300254, 0x00AA00AA}, + {0x4e300258, 0x00000008}, + {0x4e30025C, 0x00000400}, + {0x4e300300, 0x11281109}, + {0x4e300304, 0x00AA140A}, + {0x4e300308, 0x063C071E}, + }, + { + {0x01, 0xB4}, + {0x02, 0x1B}, + {0x03, 0x32}, + {0x0b, 0x46}, + {0x0c, 0x11}, + {0x0e, 0x11}, + {0x16, 0x04}, + }, + 0, + }, + { + { + {0x4e300100, 0x010A1000}, + {0x4e300104, 0xF855000A}, + {0x4e300108, 0x9492AA58}, + {0x4e30010C, 0x00310113}, + {0x4e300124, 0x071E0000}, + {0x4e300160, 0x00009100}, + {0x4e30016C, 0x30200000}, + {0x4e300170, 0x89090408}, + {0x4e300250, 0x0000000A}, + {0x4e300254, 0x00510051}, + {0x4e300258, 0x00000008}, + {0x4e30025C, 0x00000400}, + }, + { + {0x01, 0x94}, + {0x02, 0x9}, + {0x03, 0x32}, + {0x0b, 0x46}, + {0x0c, 0x11}, + {0x0e, 0x11}, + {0x16, 0x04}, + }, + 0, + }, + { + { + {0x4e300100, 0x00061000}, + {0x4e300104, 0xF855000A}, + {0x4e300108, 0x6E62FA48}, + {0x4e30010C, 0x0031010D}, + {0x4e300124, 0x04C50000}, + {0x4e300160, 0x00009100}, + {0x4e30016C, 0x30000000}, + {0x4e300170, 0x89090408}, + {0x4e300250, 0x00000007}, + {0x4e300254, 0x00340034}, + {0x4e300258, 0x00000008}, + {0x4e30025C, 0x00000400}, + }, + { + {0x01, 0x94}, + {0x02, 0x9}, + {0x03, 0x32}, + {0x0b, 0x46}, + {0x0c, 0x11}, + {0x0e, 0x11}, + {0x16, 0x04}, + }, + 1, + }, +}; + +/* PHY Initialize Configuration */ +static struct dram_cfg_param ddr_ddrphy_cfg[] = { + {0x100a0, 0x4}, + {0x100a1, 0x5}, + {0x100a2, 0x6}, + {0x100a3, 0x7}, + {0x100a4, 0x0}, + {0x100a5, 0x1}, + {0x100a6, 0x2}, + {0x100a7, 0x3}, + {0x110a0, 0x3}, + {0x110a1, 0x2}, + {0x110a2, 0x0}, + {0x110a3, 0x1}, + {0x110a4, 0x7}, + {0x110a5, 0x6}, + {0x110a6, 0x4}, + {0x110a7, 0x5}, + {0x1005f, 0x5ff}, + {0x1015f, 0x5ff}, + {0x1105f, 0x5ff}, + {0x1115f, 0x5ff}, + {0x11005f, 0x5ff}, + {0x11015f, 0x5ff}, + {0x11105f, 0x5ff}, + {0x11115f, 0x5ff}, + {0x21005f, 0x5ff}, + {0x21015f, 0x5ff}, + {0x21105f, 0x5ff}, + {0x21115f, 0x5ff}, + {0x55, 0x1ff}, + {0x1055, 0x1ff}, + {0x2055, 0x1ff}, + {0x200c5, 0xb}, + {0x1200c5, 0x3}, + {0x2200c5, 0x7}, + {0x2002e, 0x2}, + {0x12002e, 0x1}, + {0x22002e, 0x2}, + {0x90204, 0x0}, + {0x190204, 0x0}, + {0x290204, 0x0}, + {0x20024, 0x1e3}, + {0x2003a, 0x2}, + {0x2007d, 0x212}, + {0x2007c, 0x61}, + {0x120024, 0x1e3}, + {0x2003a, 0x2}, + {0x12007d, 0x212}, + {0x12007c, 0x61}, + {0x220024, 0x1e3}, + {0x2003a, 0x2}, + {0x22007d, 0x212}, + {0x22007c, 0x61}, + {0x20056, 0x3}, + {0x120056, 0x3}, + {0x220056, 0x3}, + {0x1004d, 0x600}, + {0x1014d, 0x600}, + {0x1104d, 0x600}, + {0x1114d, 0x600}, + {0x11004d, 0x600}, + {0x11014d, 0x600}, + {0x11104d, 0x600}, + {0x11114d, 0x600}, + {0x21004d, 0x600}, + {0x21014d, 0x600}, + {0x21104d, 0x600}, + {0x21114d, 0x600}, + {0x10049, 0xe00}, + {0x10149, 0xe00}, + {0x11049, 0xe00}, + {0x11149, 0xe00}, + {0x110049, 0xe00}, + {0x110149, 0xe00}, + {0x111049, 0xe00}, + {0x111149, 0xe00}, + {0x210049, 0xe00}, + {0x210149, 0xe00}, + {0x211049, 0xe00}, + {0x211149, 0xe00}, + {0x43, 0x60}, + {0x1043, 0x60}, + {0x2043, 0x60}, + {0x20018, 0x1}, + {0x20075, 0x4}, + {0x20050, 0x0}, + {0x2009b, 0x2}, + {0x20008, 0x1d3}, + {0x120008, 0xe9}, + {0x220008, 0x9c}, + {0x20088, 0x9}, + {0x200b2, 0x10c}, + {0x10043, 0x5a1}, + {0x10143, 0x5a1}, + {0x11043, 0x5a1}, + {0x11143, 0x5a1}, + {0x1200b2, 0x10c}, + {0x110043, 0x5a1}, + {0x110143, 0x5a1}, + {0x111043, 0x5a1}, + {0x111143, 0x5a1}, + {0x2200b2, 0x10c}, + {0x210043, 0x5a1}, + {0x210143, 0x5a1}, + {0x211043, 0x5a1}, + {0x211143, 0x5a1}, + {0x200fa, 0x2}, + {0x1200fa, 0x2}, + {0x2200fa, 0x2}, + {0x20019, 0x1}, + {0x120019, 0x1}, + {0x220019, 0x1}, + {0x200f0, 0x600}, + {0x200f1, 0x0}, + {0x200f2, 0x4444}, + {0x200f3, 0x8888}, + {0x200f4, 0x5655}, + {0x200f5, 0x0}, + {0x200f6, 0x0}, + {0x200f7, 0xf000}, + {0x1004a, 0x500}, + {0x1104a, 0x500}, + {0x20025, 0x0}, + {0x2002d, 0x0}, + {0x12002d, 0x0}, + {0x22002d, 0x0}, + {0x2002c, 0x0}, + {0x20021, 0x0}, + {0x200c7, 0x21}, + {0x1200c7, 0x41}, + {0x200ca, 0x24}, + {0x1200ca, 0x24}, +}; + +/* PHY trained csr */ +static struct dram_cfg_param ddr_ddrphy_trained_csr[] = { + {0x1005f, 0x0}, + {0x1015f, 0x0}, + {0x1105f, 0x0}, + {0x1115f, 0x0}, + {0x11005f, 0x0}, + {0x11015f, 0x0}, + {0x11105f, 0x0}, + {0x11115f, 0x0}, + {0x21005f, 0x0}, + {0x21015f, 0x0}, + {0x21105f, 0x0}, + {0x21115f, 0x0}, + {0x55, 0x0}, + {0x1055, 0x0}, + {0x2055, 0x0}, + {0x200c5, 0x0}, + {0x1200c5, 0x0}, + {0x2200c5, 0x0}, + {0x2002e, 0x0}, + {0x12002e, 0x0}, + {0x22002e, 0x0}, + {0x90204, 0x0}, + {0x190204, 0x0}, + {0x290204, 0x0}, + {0x20024, 0x0}, + {0x2003a, 0x0}, + {0x2007d, 0x0}, + {0x2007c, 0x0}, + {0x120024, 0x0}, + {0x12007d, 0x0}, + {0x12007c, 0x0}, + {0x220024, 0x0}, + {0x22007d, 0x0}, + {0x22007c, 0x0}, + {0x20056, 0x0}, + {0x120056, 0x0}, + {0x220056, 0x0}, + {0x1004d, 0x0}, + {0x1014d, 0x0}, + {0x1104d, 0x0}, + {0x1114d, 0x0}, + {0x11004d, 0x0}, + {0x11014d, 0x0}, + {0x11104d, 0x0}, + {0x11114d, 0x0}, + {0x21004d, 0x0}, + {0x21014d, 0x0}, + {0x21104d, 0x0}, + {0x21114d, 0x0}, + {0x10049, 0x0}, + {0x10149, 0x0}, + {0x11049, 0x0}, + {0x11149, 0x0}, + {0x110049, 0x0}, + {0x110149, 0x0}, + {0x111049, 0x0}, + {0x111149, 0x0}, + {0x210049, 0x0}, + {0x210149, 0x0}, + {0x211049, 0x0}, + {0x211149, 0x0}, + {0x43, 0x0}, + {0x1043, 0x0}, + {0x2043, 0x0}, + {0x20018, 0x0}, + {0x20075, 0x0}, + {0x20050, 0x0}, + {0x2009b, 0x0}, + {0x20008, 0x0}, + {0x120008, 0x0}, + {0x220008, 0x0}, + {0x20088, 0x0}, + {0x200b2, 0x0}, + {0x10043, 0x0}, + {0x10143, 0x0}, + {0x11043, 0x0}, + {0x11143, 0x0}, + {0x1200b2, 0x0}, + {0x110043, 0x0}, + {0x110143, 0x0}, + {0x111043, 0x0}, + {0x111143, 0x0}, + {0x2200b2, 0x0}, + {0x210043, 0x0}, + {0x210143, 0x0}, + {0x211043, 0x0}, + {0x211143, 0x0}, + {0x200fa, 0x0}, + {0x1200fa, 0x0}, + {0x2200fa, 0x0}, + {0x20019, 0x0}, + {0x120019, 0x0}, + {0x220019, 0x0}, + {0x200f0, 0x0}, + {0x200f1, 0x0}, + {0x200f2, 0x0}, + {0x200f3, 0x0}, + {0x200f4, 0x0}, + {0x200f5, 0x0}, + {0x200f6, 0x0}, + {0x200f7, 0x0}, + {0x1004a, 0x0}, + {0x1104a, 0x0}, + {0x20025, 0x0}, + {0x2002d, 0x0}, + {0x12002d, 0x0}, + {0x22002d, 0x0}, + {0x2002c, 0x0}, + {0xd0000, 0x0}, + {0x90000, 0x0}, + {0x90001, 0x0}, + {0x90002, 0x0}, + {0x90003, 0x0}, + {0x90004, 0x0}, + {0x90005, 0x0}, + {0x90029, 0x0}, + {0x9002a, 0x0}, + {0x9002b, 0x0}, + {0x9002c, 0x0}, + {0x9002d, 0x0}, + {0x9002e, 0x0}, + {0x9002f, 0x0}, + {0x90030, 0x0}, + {0x90031, 0x0}, + {0x90032, 0x0}, + {0x90033, 0x0}, + {0x90034, 0x0}, + {0x90035, 0x0}, + {0x90036, 0x0}, + {0x90037, 0x0}, + {0x90038, 0x0}, + {0x90039, 0x0}, + {0x9003a, 0x0}, + {0x9003b, 0x0}, + {0x9003c, 0x0}, + {0x9003d, 0x0}, + {0x9003e, 0x0}, + {0x9003f, 0x0}, + {0x90040, 0x0}, + {0x90041, 0x0}, + {0x90042, 0x0}, + {0x90043, 0x0}, + {0x90044, 0x0}, + {0x90045, 0x0}, + {0x90046, 0x0}, + {0x90047, 0x0}, + {0x90048, 0x0}, + {0x90049, 0x0}, + {0x9004a, 0x0}, + {0x9004b, 0x0}, + {0x9004c, 0x0}, + {0x9004d, 0x0}, + {0x9004e, 0x0}, + {0x9004f, 0x0}, + {0x90050, 0x0}, + {0x90051, 0x0}, + {0x90052, 0x0}, + {0x90053, 0x0}, + {0x90054, 0x0}, + {0x90055, 0x0}, + {0x90056, 0x0}, + {0x90057, 0x0}, + {0x90058, 0x0}, + {0x90059, 0x0}, + {0x9005a, 0x0}, + {0x9005b, 0x0}, + {0x9005c, 0x0}, + {0x9005d, 0x0}, + {0x9005e, 0x0}, + {0x9005f, 0x0}, + {0x90060, 0x0}, + {0x90061, 0x0}, + {0x90062, 0x0}, + {0x90063, 0x0}, + {0x90064, 0x0}, + {0x90065, 0x0}, + {0x90066, 0x0}, + {0x90067, 0x0}, + {0x90068, 0x0}, + {0x90069, 0x0}, + {0x9006a, 0x0}, + {0x9006b, 0x0}, + {0x9006c, 0x0}, + {0x9006d, 0x0}, + {0x9006e, 0x0}, + {0x9006f, 0x0}, + {0x90070, 0x0}, + {0x90071, 0x0}, + {0x90072, 0x0}, + {0x90073, 0x0}, + {0x90074, 0x0}, + {0x90075, 0x0}, + {0x90076, 0x0}, + {0x90077, 0x0}, + {0x90078, 0x0}, + {0x90079, 0x0}, + {0x9007a, 0x0}, + {0x9007b, 0x0}, + {0x9007c, 0x0}, + {0x9007d, 0x0}, + {0x9007e, 0x0}, + {0x9007f, 0x0}, + {0x90080, 0x0}, + {0x90081, 0x0}, + {0x90082, 0x0}, + {0x90083, 0x0}, + {0x90084, 0x0}, + {0x90085, 0x0}, + {0x90086, 0x0}, + {0x90087, 0x0}, + {0x90088, 0x0}, + {0x90089, 0x0}, + {0x9008a, 0x0}, + {0x9008b, 0x0}, + {0x9008c, 0x0}, + {0x9008d, 0x0}, + {0x9008e, 0x0}, + {0x9008f, 0x0}, + {0x90090, 0x0}, + {0x90091, 0x0}, + {0x90092, 0x0}, + {0x90093, 0x0}, + {0x90094, 0x0}, + {0x90095, 0x0}, + {0x90096, 0x0}, + {0x90097, 0x0}, + {0x90098, 0x0}, + {0x90099, 0x0}, + {0x9009a, 0x0}, + {0x9009b, 0x0}, + {0x9009c, 0x0}, + {0x9009d, 0x0}, + {0x9009e, 0x0}, + {0x9009f, 0x0}, + {0x900a0, 0x0}, + {0x900a1, 0x0}, + {0x900a2, 0x0}, + {0x900a3, 0x0}, + {0x900a4, 0x0}, + {0x900a5, 0x0}, + {0x900a6, 0x0}, + {0x900a7, 0x0}, + {0x900a8, 0x0}, + {0x900a9, 0x0}, + {0x40000, 0x0}, + {0x40020, 0x0}, + {0x40040, 0x0}, + {0x40060, 0x0}, + {0x40001, 0x0}, + {0x40021, 0x0}, + {0x40041, 0x0}, + {0x40061, 0x0}, + {0x40002, 0x0}, + {0x40022, 0x0}, + {0x40042, 0x0}, + {0x40062, 0x0}, + {0x40003, 0x0}, + {0x40023, 0x0}, + {0x40043, 0x0}, + {0x40063, 0x0}, + {0x40004, 0x0}, + {0x40024, 0x0}, + {0x40044, 0x0}, + {0x40064, 0x0}, + {0x40005, 0x0}, + {0x40025, 0x0}, + {0x40045, 0x0}, + {0x40065, 0x0}, + {0x40006, 0x0}, + {0x40026, 0x0}, + {0x40046, 0x0}, + {0x40066, 0x0}, + {0x40007, 0x0}, + {0x40027, 0x0}, + {0x40047, 0x0}, + {0x40067, 0x0}, + {0x40008, 0x0}, + {0x40028, 0x0}, + {0x40048, 0x0}, + {0x40068, 0x0}, + {0x40009, 0x0}, + {0x40029, 0x0}, + {0x40049, 0x0}, + {0x40069, 0x0}, + {0x4000a, 0x0}, + {0x4002a, 0x0}, + {0x4004a, 0x0}, + {0x4006a, 0x0}, + {0x4000b, 0x0}, + {0x4002b, 0x0}, + {0x4004b, 0x0}, + {0x4006b, 0x0}, + {0x4000c, 0x0}, + {0x4002c, 0x0}, + {0x4004c, 0x0}, + {0x4006c, 0x0}, + {0x4000d, 0x0}, + {0x4002d, 0x0}, + {0x4004d, 0x0}, + {0x4006d, 0x0}, + {0x4000e, 0x0}, + {0x4002e, 0x0}, + {0x4004e, 0x0}, + {0x4006e, 0x0}, + {0x4000f, 0x0}, + {0x4002f, 0x0}, + {0x4004f, 0x0}, + {0x4006f, 0x0}, + {0x40010, 0x0}, + {0x40030, 0x0}, + {0x40050, 0x0}, + {0x40070, 0x0}, + {0x40011, 0x0}, + {0x40031, 0x0}, + {0x40051, 0x0}, + {0x40071, 0x0}, + {0x40012, 0x0}, + {0x40032, 0x0}, + {0x40052, 0x0}, + {0x40072, 0x0}, + {0x40013, 0x0}, + {0x40033, 0x0}, + {0x40053, 0x0}, + {0x40073, 0x0}, + {0x40014, 0x0}, + {0x40034, 0x0}, + {0x40054, 0x0}, + {0x40074, 0x0}, + {0x40015, 0x0}, + {0x40035, 0x0}, + {0x40055, 0x0}, + {0x40075, 0x0}, + {0x40016, 0x0}, + {0x40036, 0x0}, + {0x40056, 0x0}, + {0x40076, 0x0}, + {0x40017, 0x0}, + {0x40037, 0x0}, + {0x40057, 0x0}, + {0x40077, 0x0}, + {0x40018, 0x0}, + {0x40038, 0x0}, + {0x40058, 0x0}, + {0x40078, 0x0}, + {0x40019, 0x0}, + {0x40039, 0x0}, + {0x40059, 0x0}, + {0x40079, 0x0}, + {0x4001a, 0x0}, + {0x4003a, 0x0}, + {0x4005a, 0x0}, + {0x4007a, 0x0}, + {0x900aa, 0x0}, + {0x900ab, 0x0}, + {0x900ac, 0x0}, + {0x900ad, 0x0}, + {0x900ae, 0x0}, + {0x900af, 0x0}, + {0x900b0, 0x0}, + {0x900b1, 0x0}, + {0x900b2, 0x0}, + {0x900b3, 0x0}, + {0x900b4, 0x0}, + {0x900b5, 0x0}, + {0x900b6, 0x0}, + {0x900b7, 0x0}, + {0x900b8, 0x0}, + {0x900b9, 0x0}, + {0x900ba, 0x0}, + {0x900bb, 0x0}, + {0x900bc, 0x0}, + {0x900bd, 0x0}, + {0x900be, 0x0}, + {0x900bf, 0x0}, + {0x900c0, 0x0}, + {0x900c1, 0x0}, + {0x900c2, 0x0}, + {0x900c3, 0x0}, + {0x900c4, 0x0}, + {0x900c5, 0x0}, + {0x900c6, 0x0}, + {0x900c7, 0x0}, + {0x900c8, 0x0}, + {0x900c9, 0x0}, + {0x900ca, 0x0}, + {0x900cb, 0x0}, + {0x900cc, 0x0}, + {0x900cd, 0x0}, + {0x900ce, 0x0}, + {0x900cf, 0x0}, + {0x900d0, 0x0}, + {0x900d1, 0x0}, + {0x900d2, 0x0}, + {0x900d3, 0x0}, + {0x900d4, 0x0}, + {0x900d5, 0x0}, + {0x900d6, 0x0}, + {0x900d7, 0x0}, + {0x900d8, 0x0}, + {0x900d9, 0x0}, + {0x900da, 0x0}, + {0x900db, 0x0}, + {0x900dc, 0x0}, + {0x900dd, 0x0}, + {0x900de, 0x0}, + {0x900df, 0x0}, + {0x900e0, 0x0}, + {0x900e1, 0x0}, + {0x900e2, 0x0}, + {0x900e3, 0x0}, + {0x900e4, 0x0}, + {0x900e5, 0x0}, + {0x900e6, 0x0}, + {0x900e7, 0x0}, + {0x900e8, 0x0}, + {0x900e9, 0x0}, + {0x900ea, 0x0}, + {0x900eb, 0x0}, + {0x900ec, 0x0}, + {0x900ed, 0x0}, + {0x900ee, 0x0}, + {0x900ef, 0x0}, + {0x900f0, 0x0}, + {0x900f1, 0x0}, + {0x900f2, 0x0}, + {0x900f3, 0x0}, + {0x900f4, 0x0}, + {0x900f5, 0x0}, + {0x900f6, 0x0}, + {0x900f7, 0x0}, + {0x900f8, 0x0}, + {0x900f9, 0x0}, + {0x900fa, 0x0}, + {0x900fb, 0x0}, + {0x900fc, 0x0}, + {0x900fd, 0x0}, + {0x900fe, 0x0}, + {0x900ff, 0x0}, + {0x90100, 0x0}, + {0x90101, 0x0}, + {0x90102, 0x0}, + {0x90103, 0x0}, + {0x90104, 0x0}, + {0x90105, 0x0}, + {0x90106, 0x0}, + {0x90107, 0x0}, + {0x90108, 0x0}, + {0x90109, 0x0}, + {0x9010a, 0x0}, + {0x9010b, 0x0}, + {0x9010c, 0x0}, + {0x9010d, 0x0}, + {0x9010e, 0x0}, + {0x9010f, 0x0}, + {0x90110, 0x0}, + {0x90111, 0x0}, + {0x90112, 0x0}, + {0x90113, 0x0}, + {0x90114, 0x0}, + {0x90115, 0x0}, + {0x90116, 0x0}, + {0x90117, 0x0}, + {0x90118, 0x0}, + {0x90119, 0x0}, + {0x9011a, 0x0}, + {0x9011b, 0x0}, + {0x9011c, 0x0}, + {0x9011d, 0x0}, + {0x9011e, 0x0}, + {0x9011f, 0x0}, + {0x90120, 0x0}, + {0x90121, 0x0}, + {0x90122, 0x0}, + {0x90123, 0x0}, + {0x90124, 0x0}, + {0x90125, 0x0}, + {0x90126, 0x0}, + {0x90127, 0x0}, + {0x90128, 0x0}, + {0x90129, 0x0}, + {0x9012a, 0x0}, + {0x9012b, 0x0}, + {0x9012c, 0x0}, + {0x9012d, 0x0}, + {0x9012e, 0x0}, + {0x9012f, 0x0}, + {0x90130, 0x0}, + {0x90131, 0x0}, + {0x90132, 0x0}, + {0x90133, 0x0}, + {0x90134, 0x0}, + {0x90135, 0x0}, + {0x90136, 0x0}, + {0x90137, 0x0}, + {0x90138, 0x0}, + {0x90139, 0x0}, + {0x9013a, 0x0}, + {0x9013b, 0x0}, + {0x9013c, 0x0}, + {0x9013d, 0x0}, + {0x9013e, 0x0}, + {0x9013f, 0x0}, + {0x90140, 0x0}, + {0x90141, 0x0}, + {0x90142, 0x0}, + {0x90143, 0x0}, + {0x90144, 0x0}, + {0x90145, 0x0}, + {0x90146, 0x0}, + {0x90147, 0x0}, + {0x90148, 0x0}, + {0x90149, 0x0}, + {0x9014a, 0x0}, + {0x9014b, 0x0}, + {0x9014c, 0x0}, + {0x9014d, 0x0}, + {0x9014e, 0x0}, + {0x9014f, 0x0}, + {0x90150, 0x0}, + {0x90151, 0x0}, + {0x90152, 0x0}, + {0x90153, 0x0}, + {0x90154, 0x0}, + {0x90155, 0x0}, + {0x90156, 0x0}, + {0x90157, 0x0}, + {0x90158, 0x0}, + {0x90159, 0x0}, + {0x9015a, 0x0}, + {0x9015b, 0x0}, + {0x9015c, 0x0}, + {0x9015d, 0x0}, + {0x9015e, 0x0}, + {0x9015f, 0x0}, + {0x90160, 0x0}, + {0x90161, 0x0}, + {0x90162, 0x0}, + {0x90163, 0x0}, + {0x90164, 0x0}, + {0x90165, 0x0}, + {0x90166, 0x0}, + {0x90167, 0x0}, + {0x90168, 0x0}, + {0x90169, 0x0}, + {0x9016a, 0x0}, + {0x9016b, 0x0}, + {0x9016c, 0x0}, + {0x9016d, 0x0}, + {0x9016e, 0x0}, + {0x9016f, 0x0}, + {0x90170, 0x0}, + {0x90171, 0x0}, + {0x90172, 0x0}, + {0x90173, 0x0}, + {0x90174, 0x0}, + {0x90175, 0x0}, + {0x90176, 0x0}, + {0x90177, 0x0}, + {0x90178, 0x0}, + {0x90179, 0x0}, + {0x9017a, 0x0}, + {0x9017b, 0x0}, + {0x9017c, 0x0}, + {0x9017d, 0x0}, + {0x9017e, 0x0}, + {0x9017f, 0x0}, + {0x90180, 0x0}, + {0x90181, 0x0}, + {0x90182, 0x0}, + {0x90183, 0x0}, + {0x90184, 0x0}, + {0x90006, 0x0}, + {0x90007, 0x0}, + {0x90008, 0x0}, + {0x90009, 0x0}, + {0x9000a, 0x0}, + {0x9000b, 0x0}, + {0xd00e7, 0x0}, + {0x90017, 0x0}, + {0x9001f, 0x0}, + {0x90026, 0x0}, + {0x400d0, 0x0}, + {0x400d1, 0x0}, + {0x400d2, 0x0}, + {0x400d3, 0x0}, + {0x400d4, 0x0}, + {0x400d5, 0x0}, + {0x400d6, 0x0}, + {0x400d7, 0x0}, + {0x200be, 0x0}, + {0x2000b, 0x0}, + {0x2000c, 0x0}, + {0x2000d, 0x0}, + {0x2000e, 0x0}, + {0x12000b, 0x0}, + {0x12000c, 0x0}, + {0x12000d, 0x0}, + {0x12000e, 0x0}, + {0x22000b, 0x0}, + {0x22000c, 0x0}, + {0x22000d, 0x0}, + {0x22000e, 0x0}, + {0x9000c, 0x0}, + {0x9000d, 0x0}, + {0x9000e, 0x0}, + {0x9000f, 0x0}, + {0x90010, 0x0}, + {0x90011, 0x0}, + {0x90012, 0x0}, + {0x90013, 0x0}, + {0x20010, 0x0}, + {0x20011, 0x0}, + {0x120010, 0x0}, + {0x120011, 0x0}, + {0x40080, 0x0}, + {0x40081, 0x0}, + {0x40082, 0x0}, + {0x40083, 0x0}, + {0x40084, 0x0}, + {0x40085, 0x0}, + {0x140080, 0x0}, + {0x140081, 0x0}, + {0x140082, 0x0}, + {0x140083, 0x0}, + {0x140084, 0x0}, + {0x140085, 0x0}, + {0x240080, 0x0}, + {0x240081, 0x0}, + {0x240082, 0x0}, + {0x240083, 0x0}, + {0x240084, 0x0}, + {0x240085, 0x0}, + {0x400fd, 0x0}, + {0x400f1, 0x0}, + {0x10011, 0x0}, + {0x10012, 0x0}, + {0x10013, 0x0}, + {0x10018, 0x0}, + {0x10002, 0x0}, + {0x100b2, 0x0}, + {0x101b4, 0x0}, + {0x102b4, 0x0}, + {0x103b4, 0x0}, + {0x104b4, 0x0}, + {0x105b4, 0x0}, + {0x106b4, 0x0}, + {0x107b4, 0x0}, + {0x108b4, 0x0}, + {0x11011, 0x0}, + {0x11012, 0x0}, + {0x11013, 0x0}, + {0x11018, 0x0}, + {0x11002, 0x0}, + {0x110b2, 0x0}, + {0x111b4, 0x0}, + {0x112b4, 0x0}, + {0x113b4, 0x0}, + {0x114b4, 0x0}, + {0x115b4, 0x0}, + {0x116b4, 0x0}, + {0x117b4, 0x0}, + {0x118b4, 0x0}, + {0x20089, 0x0}, + {0xc0080, 0x0}, + {0x200cb, 0x0}, + {0x10068, 0x0}, + {0x10069, 0x0}, + {0x10168, 0x0}, + {0x10169, 0x0}, + {0x10268, 0x0}, + {0x10269, 0x0}, + {0x10368, 0x0}, + {0x10369, 0x0}, + {0x10468, 0x0}, + {0x10469, 0x0}, + {0x10568, 0x0}, + {0x10569, 0x0}, + {0x10668, 0x0}, + {0x10669, 0x0}, + {0x10768, 0x0}, + {0x10769, 0x0}, + {0x10868, 0x0}, + {0x10869, 0x0}, + {0x100aa, 0x0}, + {0x10062, 0x0}, + {0x10001, 0x0}, + {0x100a0, 0x0}, + {0x100a1, 0x0}, + {0x100a2, 0x0}, + {0x100a3, 0x0}, + {0x100a4, 0x0}, + {0x100a5, 0x0}, + {0x100a6, 0x0}, + {0x100a7, 0x0}, + {0x11068, 0x0}, + {0x11069, 0x0}, + {0x11168, 0x0}, + {0x11169, 0x0}, + {0x11268, 0x0}, + {0x11269, 0x0}, + {0x11368, 0x0}, + {0x11369, 0x0}, + {0x11468, 0x0}, + {0x11469, 0x0}, + {0x11568, 0x0}, + {0x11569, 0x0}, + {0x11668, 0x0}, + {0x11669, 0x0}, + {0x11768, 0x0}, + {0x11769, 0x0}, + {0x11868, 0x0}, + {0x11869, 0x0}, + {0x110aa, 0x0}, + {0x11062, 0x0}, + {0x11001, 0x0}, + {0x110a0, 0x0}, + {0x110a1, 0x0}, + {0x110a2, 0x0}, + {0x110a3, 0x0}, + {0x110a4, 0x0}, + {0x110a5, 0x0}, + {0x110a6, 0x0}, + {0x110a7, 0x0}, + {0x80, 0x0}, + {0x1080, 0x0}, + {0x2080, 0x0}, + {0x10020, 0x0}, + {0x10080, 0x0}, + {0x10081, 0x0}, + {0x100d0, 0x0}, + {0x100d1, 0x0}, + {0x1008c, 0x0}, + {0x1008d, 0x0}, + {0x10180, 0x0}, + {0x10181, 0x0}, + {0x101d0, 0x0}, + {0x101d1, 0x0}, + {0x1018c, 0x0}, + {0x1018d, 0x0}, + {0x100c0, 0x0}, + {0x100c1, 0x0}, + {0x101c0, 0x0}, + {0x101c1, 0x0}, + {0x102c0, 0x0}, + {0x102c1, 0x0}, + {0x103c0, 0x0}, + {0x103c1, 0x0}, + {0x104c0, 0x0}, + {0x104c1, 0x0}, + {0x105c0, 0x0}, + {0x105c1, 0x0}, + {0x106c0, 0x0}, + {0x106c1, 0x0}, + {0x107c0, 0x0}, + {0x107c1, 0x0}, + {0x108c0, 0x0}, + {0x108c1, 0x0}, + {0x100ae, 0x0}, + {0x100af, 0x0}, + {0x11020, 0x0}, + {0x11080, 0x0}, + {0x11081, 0x0}, + {0x110d0, 0x0}, + {0x110d1, 0x0}, + {0x1108c, 0x0}, + {0x1108d, 0x0}, + {0x11180, 0x0}, + {0x11181, 0x0}, + {0x111d0, 0x0}, + {0x111d1, 0x0}, + {0x1118c, 0x0}, + {0x1118d, 0x0}, + {0x110c0, 0x0}, + {0x110c1, 0x0}, + {0x111c0, 0x0}, + {0x111c1, 0x0}, + {0x112c0, 0x0}, + {0x112c1, 0x0}, + {0x113c0, 0x0}, + {0x113c1, 0x0}, + {0x114c0, 0x0}, + {0x114c1, 0x0}, + {0x115c0, 0x0}, + {0x115c1, 0x0}, + {0x116c0, 0x0}, + {0x116c1, 0x0}, + {0x117c0, 0x0}, + {0x117c1, 0x0}, + {0x118c0, 0x0}, + {0x118c1, 0x0}, + {0x110ae, 0x0}, + {0x110af, 0x0}, + {0x90201, 0x0}, + {0x90202, 0x0}, + {0x90203, 0x0}, + {0x90205, 0x0}, + {0x90206, 0x0}, + {0x90207, 0x0}, + {0x90208, 0x0}, + {0x20020, 0x0}, + {0x100080, 0x0}, + {0x101080, 0x0}, + {0x102080, 0x0}, + {0x110020, 0x0}, + {0x110080, 0x0}, + {0x110081, 0x0}, + {0x1100d0, 0x0}, + {0x1100d1, 0x0}, + {0x11008c, 0x0}, + {0x11008d, 0x0}, + {0x110180, 0x0}, + {0x110181, 0x0}, + {0x1101d0, 0x0}, + {0x1101d1, 0x0}, + {0x11018c, 0x0}, + {0x11018d, 0x0}, + {0x1100c0, 0x0}, + {0x1100c1, 0x0}, + {0x1101c0, 0x0}, + {0x1101c1, 0x0}, + {0x1102c0, 0x0}, + {0x1102c1, 0x0}, + {0x1103c0, 0x0}, + {0x1103c1, 0x0}, + {0x1104c0, 0x0}, + {0x1104c1, 0x0}, + {0x1105c0, 0x0}, + {0x1105c1, 0x0}, + {0x1106c0, 0x0}, + {0x1106c1, 0x0}, + {0x1107c0, 0x0}, + {0x1107c1, 0x0}, + {0x1108c0, 0x0}, + {0x1108c1, 0x0}, + {0x1100ae, 0x0}, + {0x1100af, 0x0}, + {0x111020, 0x0}, + {0x111080, 0x0}, + {0x111081, 0x0}, + {0x1110d0, 0x0}, + {0x1110d1, 0x0}, + {0x11108c, 0x0}, + {0x11108d, 0x0}, + {0x111180, 0x0}, + {0x111181, 0x0}, + {0x1111d0, 0x0}, + {0x1111d1, 0x0}, + {0x11118c, 0x0}, + {0x11118d, 0x0}, + {0x1110c0, 0x0}, + {0x1110c1, 0x0}, + {0x1111c0, 0x0}, + {0x1111c1, 0x0}, + {0x1112c0, 0x0}, + {0x1112c1, 0x0}, + {0x1113c0, 0x0}, + {0x1113c1, 0x0}, + {0x1114c0, 0x0}, + {0x1114c1, 0x0}, + {0x1115c0, 0x0}, + {0x1115c1, 0x0}, + {0x1116c0, 0x0}, + {0x1116c1, 0x0}, + {0x1117c0, 0x0}, + {0x1117c1, 0x0}, + {0x1118c0, 0x0}, + {0x1118c1, 0x0}, + {0x1110ae, 0x0}, + {0x1110af, 0x0}, + {0x190201, 0x0}, + {0x190202, 0x0}, + {0x190203, 0x0}, + {0x190205, 0x0}, + {0x190206, 0x0}, + {0x190207, 0x0}, + {0x190208, 0x0}, + {0x120020, 0x0}, + {0x200080, 0x0}, + {0x201080, 0x0}, + {0x202080, 0x0}, + {0x210020, 0x0}, + {0x210080, 0x0}, + {0x210081, 0x0}, + {0x2100d0, 0x0}, + {0x2100d1, 0x0}, + {0x21008c, 0x0}, + {0x21008d, 0x0}, + {0x210180, 0x0}, + {0x210181, 0x0}, + {0x2101d0, 0x0}, + {0x2101d1, 0x0}, + {0x21018c, 0x0}, + {0x21018d, 0x0}, + {0x2100c0, 0x0}, + {0x2100c1, 0x0}, + {0x2101c0, 0x0}, + {0x2101c1, 0x0}, + {0x2102c0, 0x0}, + {0x2102c1, 0x0}, + {0x2103c0, 0x0}, + {0x2103c1, 0x0}, + {0x2104c0, 0x0}, + {0x2104c1, 0x0}, + {0x2105c0, 0x0}, + {0x2105c1, 0x0}, + {0x2106c0, 0x0}, + {0x2106c1, 0x0}, + {0x2107c0, 0x0}, + {0x2107c1, 0x0}, + {0x2108c0, 0x0}, + {0x2108c1, 0x0}, + {0x2100ae, 0x0}, + {0x2100af, 0x0}, + {0x211020, 0x0}, + {0x211080, 0x0}, + {0x211081, 0x0}, + {0x2110d0, 0x0}, + {0x2110d1, 0x0}, + {0x21108c, 0x0}, + {0x21108d, 0x0}, + {0x211180, 0x0}, + {0x211181, 0x0}, + {0x2111d0, 0x0}, + {0x2111d1, 0x0}, + {0x21118c, 0x0}, + {0x21118d, 0x0}, + {0x2110c0, 0x0}, + {0x2110c1, 0x0}, + {0x2111c0, 0x0}, + {0x2111c1, 0x0}, + {0x2112c0, 0x0}, + {0x2112c1, 0x0}, + {0x2113c0, 0x0}, + {0x2113c1, 0x0}, + {0x2114c0, 0x0}, + {0x2114c1, 0x0}, + {0x2115c0, 0x0}, + {0x2115c1, 0x0}, + {0x2116c0, 0x0}, + {0x2116c1, 0x0}, + {0x2117c0, 0x0}, + {0x2117c1, 0x0}, + {0x2118c0, 0x0}, + {0x2118c1, 0x0}, + {0x2110ae, 0x0}, + {0x2110af, 0x0}, + {0x290201, 0x0}, + {0x290202, 0x0}, + {0x290203, 0x0}, + {0x290205, 0x0}, + {0x290206, 0x0}, + {0x290207, 0x0}, + {0x290208, 0x0}, + {0x220020, 0x0}, + {0x20077, 0x0}, + {0x20072, 0x0}, + {0x20073, 0x0}, + {0x400c0, 0x0}, + {0x10040, 0x0}, + {0x10140, 0x0}, + {0x10240, 0x0}, + {0x10340, 0x0}, + {0x10440, 0x0}, + {0x10540, 0x0}, + {0x10640, 0x0}, + {0x10740, 0x0}, + {0x10840, 0x0}, + {0x11040, 0x0}, + {0x11140, 0x0}, + {0x11240, 0x0}, + {0x11340, 0x0}, + {0x11440, 0x0}, + {0x11540, 0x0}, + {0x11640, 0x0}, + {0x11740, 0x0}, + {0x11840, 0x0}, +}; + +/* P0 message block parameter for training firmware */ +static struct dram_cfg_param ddr_fsp0_cfg[] = { + {0xd0000, 0x0}, + {0x54003, 0x74a}, + {0x54004, 0x4}, + {0x54006, 0x15}, + {0x54008, 0x131f}, + {0x54009, 0xc8}, + {0x5400b, 0x4}, + {0x5400d, 0x100}, + {0x5400f, 0x100}, + {0x54012, 0x110}, + {0x54019, 0x1bb4}, + {0x5401a, 0x32}, + {0x5401b, 0x1146}, + {0x5401c, 0x1108}, + {0x5401e, 0x4}, + {0x5401f, 0x1bb4}, + {0x54020, 0x32}, + {0x54021, 0x1146}, + {0x54022, 0x1108}, + {0x54024, 0x4}, + {0x54032, 0xb400}, + {0x54033, 0x321b}, + {0x54034, 0x4600}, + {0x54035, 0x811}, + {0x54036, 0x11}, + {0x54037, 0x400}, + {0x54038, 0xb400}, + {0x54039, 0x321b}, + {0x5403a, 0x4600}, + {0x5403b, 0x811}, + {0x5403c, 0x11}, + {0x5403d, 0x400}, + {0xd0000, 0x1} +}; + +/* P1 message block parameter for training firmware */ +static struct dram_cfg_param ddr_fsp1_cfg[] = { + {0xd0000, 0x0}, + {0x54002, 0x1}, + {0x54003, 0x3a4}, + {0x54004, 0x4}, + {0x54006, 0x15}, + {0x54008, 0x121f}, + {0x54009, 0xc8}, + {0x5400b, 0x4}, + {0x5400d, 0x100}, + {0x5400f, 0x100}, + {0x54012, 0x110}, + {0x54019, 0x994}, + {0x5401a, 0x32}, + {0x5401b, 0x1146}, + {0x5401c, 0x1108}, + {0x5401e, 0x4}, + {0x5401f, 0x994}, + {0x54020, 0x32}, + {0x54021, 0x1146}, + {0x54022, 0x1108}, + {0x54024, 0x4}, + {0x54032, 0x9400}, + {0x54033, 0x3209}, + {0x54034, 0x4600}, + {0x54035, 0x811}, + {0x54036, 0x11}, + {0x54037, 0x400}, + {0x54038, 0x9400}, + {0x54039, 0x3209}, + {0x5403a, 0x4600}, + {0x5403b, 0x811}, + {0x5403c, 0x11}, + {0x5403d, 0x400}, + {0xd0000, 0x1} +}; + +/* P2 message block parameter for training firmware */ +static struct dram_cfg_param ddr_fsp2_cfg[] = { + {0xd0000, 0x0}, + {0x54002, 0x102}, + {0x54003, 0x270}, + {0x54004, 0x4}, + {0x54006, 0x15}, + {0x54008, 0x121f}, + {0x54009, 0xc8}, + {0x5400b, 0x4}, + {0x5400d, 0x100}, + {0x5400f, 0x100}, + {0x54012, 0x110}, + {0x54019, 0x994}, + {0x5401a, 0x32}, + {0x5401b, 0x1146}, + {0x5401c, 0x1100}, + {0x5401e, 0x4}, + {0x5401f, 0x994}, + {0x54020, 0x32}, + {0x54021, 0x1146}, + {0x54022, 0x1100}, + {0x54024, 0x4}, + {0x54032, 0x9400}, + {0x54033, 0x3209}, + {0x54034, 0x4600}, + {0x54035, 0x11}, + {0x54036, 0x11}, + {0x54037, 0x400}, + {0x54038, 0x9400}, + {0x54039, 0x3209}, + {0x5403a, 0x4600}, + {0x5403b, 0x11}, + {0x5403c, 0x11}, + {0x5403d, 0x400}, + {0xd0000, 0x1} +}; + +/* P0 2D message block parameter for training firmware */ +static struct dram_cfg_param ddr_fsp0_2d_cfg[] = { + {0xd0000, 0x0}, + {0x54003, 0x74a}, + {0x54004, 0x4}, + {0x54006, 0x15}, + {0x54008, 0x61}, + {0x54009, 0xc8}, + {0x5400b, 0x4}, + {0x5400d, 0x100}, + {0x5400f, 0x100}, + {0x54010, 0x2080}, + {0x54012, 0x110}, + {0x54019, 0x1bb4}, + {0x5401a, 0x32}, + {0x5401b, 0x1146}, + {0x5401c, 0x1108}, + {0x5401e, 0x4}, + {0x5401f, 0x1bb4}, + {0x54020, 0x32}, + {0x54021, 0x1146}, + {0x54022, 0x1108}, + {0x54024, 0x4}, + {0x54032, 0xb400}, + {0x54033, 0x321b}, + {0x54034, 0x4600}, + {0x54035, 0x811}, + {0x54036, 0x11}, + {0x54037, 0x400}, + {0x54038, 0xb400}, + {0x54039, 0x321b}, + {0x5403a, 0x4600}, + {0x5403b, 0x811}, + {0x5403c, 0x11}, + {0x5403d, 0x400}, + {0xd0000, 0x1} +}; + +/* DRAM PHY init engine image */ +static struct dram_cfg_param ddr_phy_pie[] = { + {0xd0000, 0x0}, + {0x90000, 0x10}, + {0x90001, 0x400}, + {0x90002, 0x10e}, + {0x90003, 0x0}, + {0x90004, 0x0}, + {0x90005, 0x8}, + {0x90029, 0xb}, + {0x9002a, 0x480}, + {0x9002b, 0x109}, + {0x9002c, 0x8}, + {0x9002d, 0x448}, + {0x9002e, 0x139}, + {0x9002f, 0x8}, + {0x90030, 0x478}, + {0x90031, 0x109}, + {0x90032, 0x0}, + {0x90033, 0xe8}, + {0x90034, 0x109}, + {0x90035, 0x2}, + {0x90036, 0x10}, + {0x90037, 0x139}, + {0x90038, 0xb}, + {0x90039, 0x7c0}, + {0x9003a, 0x139}, + {0x9003b, 0x44}, + {0x9003c, 0x633}, + {0x9003d, 0x159}, + {0x9003e, 0x14f}, + {0x9003f, 0x630}, + {0x90040, 0x159}, + {0x90041, 0x47}, + {0x90042, 0x633}, + {0x90043, 0x149}, + {0x90044, 0x4f}, + {0x90045, 0x633}, + {0x90046, 0x179}, + {0x90047, 0x8}, + {0x90048, 0xe0}, + {0x90049, 0x109}, + {0x9004a, 0x0}, + {0x9004b, 0x7c8}, + {0x9004c, 0x109}, + {0x9004d, 0x0}, + {0x9004e, 0x1}, + {0x9004f, 0x8}, + {0x90050, 0x30}, + {0x90051, 0x65a}, + {0x90052, 0x9}, + {0x90053, 0x0}, + {0x90054, 0x45a}, + {0x90055, 0x9}, + {0x90056, 0x0}, + {0x90057, 0x448}, + {0x90058, 0x109}, + {0x90059, 0x40}, + {0x9005a, 0x633}, + {0x9005b, 0x179}, + {0x9005c, 0x1}, + {0x9005d, 0x618}, + {0x9005e, 0x109}, + {0x9005f, 0x40c0}, + {0x90060, 0x633}, + {0x90061, 0x149}, + {0x90062, 0x8}, + {0x90063, 0x4}, + {0x90064, 0x48}, + {0x90065, 0x4040}, + {0x90066, 0x633}, + {0x90067, 0x149}, + {0x90068, 0x0}, + {0x90069, 0x4}, + {0x9006a, 0x48}, + {0x9006b, 0x40}, + {0x9006c, 0x633}, + {0x9006d, 0x149}, + {0x9006e, 0x0}, + {0x9006f, 0x658}, + {0x90070, 0x109}, + {0x90071, 0x10}, + {0x90072, 0x4}, + {0x90073, 0x18}, + {0x90074, 0x0}, + {0x90075, 0x4}, + {0x90076, 0x78}, + {0x90077, 0x549}, + {0x90078, 0x633}, + {0x90079, 0x159}, + {0x9007a, 0xd49}, + {0x9007b, 0x633}, + {0x9007c, 0x159}, + {0x9007d, 0x94a}, + {0x9007e, 0x633}, + {0x9007f, 0x159}, + {0x90080, 0x441}, + {0x90081, 0x633}, + {0x90082, 0x149}, + {0x90083, 0x42}, + {0x90084, 0x633}, + {0x90085, 0x149}, + {0x90086, 0x1}, + {0x90087, 0x633}, + {0x90088, 0x149}, + {0x90089, 0x0}, + {0x9008a, 0xe0}, + {0x9008b, 0x109}, + {0x9008c, 0xa}, + {0x9008d, 0x10}, + {0x9008e, 0x109}, + {0x9008f, 0x9}, + {0x90090, 0x3c0}, + {0x90091, 0x149}, + {0x90092, 0x9}, + {0x90093, 0x3c0}, + {0x90094, 0x159}, + {0x90095, 0x18}, + {0x90096, 0x10}, + {0x90097, 0x109}, + {0x90098, 0x0}, + {0x90099, 0x3c0}, + {0x9009a, 0x109}, + {0x9009b, 0x18}, + {0x9009c, 0x4}, + {0x9009d, 0x48}, + {0x9009e, 0x18}, + {0x9009f, 0x4}, + {0x900a0, 0x58}, + {0x900a1, 0xb}, + {0x900a2, 0x10}, + {0x900a3, 0x109}, + {0x900a4, 0x1}, + {0x900a5, 0x10}, + {0x900a6, 0x109}, + {0x900a7, 0x5}, + {0x900a8, 0x7c0}, + {0x900a9, 0x109}, + {0x40000, 0x811}, + {0x40020, 0x880}, + {0x40040, 0x0}, + {0x40060, 0x0}, + {0x40001, 0x4008}, + {0x40021, 0x83}, + {0x40041, 0x4f}, + {0x40061, 0x0}, + {0x40002, 0x4040}, + {0x40022, 0x83}, + {0x40042, 0x51}, + {0x40062, 0x0}, + {0x40003, 0x811}, + {0x40023, 0x880}, + {0x40043, 0x0}, + {0x40063, 0x0}, + {0x40004, 0x720}, + {0x40024, 0xf}, + {0x40044, 0x1740}, + {0x40064, 0x0}, + {0x40005, 0x16}, + {0x40025, 0x83}, + {0x40045, 0x4b}, + {0x40065, 0x0}, + {0x40006, 0x716}, + {0x40026, 0xf}, + {0x40046, 0x2001}, + {0x40066, 0x0}, + {0x40007, 0x716}, + {0x40027, 0xf}, + {0x40047, 0x2800}, + {0x40067, 0x0}, + {0x40008, 0x716}, + {0x40028, 0xf}, + {0x40048, 0xf00}, + {0x40068, 0x0}, + {0x40009, 0x720}, + {0x40029, 0xf}, + {0x40049, 0x1400}, + {0x40069, 0x0}, + {0x4000a, 0xe08}, + {0x4002a, 0xc15}, + {0x4004a, 0x0}, + {0x4006a, 0x0}, + {0x4000b, 0x625}, + {0x4002b, 0x15}, + {0x4004b, 0x0}, + {0x4006b, 0x0}, + {0x4000c, 0x4028}, + {0x4002c, 0x80}, + {0x4004c, 0x0}, + {0x4006c, 0x0}, + {0x4000d, 0xe08}, + {0x4002d, 0xc1a}, + {0x4004d, 0x0}, + {0x4006d, 0x0}, + {0x4000e, 0x625}, + {0x4002e, 0x1a}, + {0x4004e, 0x0}, + {0x4006e, 0x0}, + {0x4000f, 0x4040}, + {0x4002f, 0x80}, + {0x4004f, 0x0}, + {0x4006f, 0x0}, + {0x40010, 0x2604}, + {0x40030, 0x15}, + {0x40050, 0x0}, + {0x40070, 0x0}, + {0x40011, 0x708}, + {0x40031, 0x5}, + {0x40051, 0x0}, + {0x40071, 0x2002}, + {0x40012, 0x8}, + {0x40032, 0x80}, + {0x40052, 0x0}, + {0x40072, 0x0}, + {0x40013, 0x2604}, + {0x40033, 0x1a}, + {0x40053, 0x0}, + {0x40073, 0x0}, + {0x40014, 0x708}, + {0x40034, 0xa}, + {0x40054, 0x0}, + {0x40074, 0x2002}, + {0x40015, 0x4040}, + {0x40035, 0x80}, + {0x40055, 0x0}, + {0x40075, 0x0}, + {0x40016, 0x60a}, + {0x40036, 0x15}, + {0x40056, 0x1200}, + {0x40076, 0x0}, + {0x40017, 0x61a}, + {0x40037, 0x15}, + {0x40057, 0x1300}, + {0x40077, 0x0}, + {0x40018, 0x60a}, + {0x40038, 0x1a}, + {0x40058, 0x1200}, + {0x40078, 0x0}, + {0x40019, 0x642}, + {0x40039, 0x1a}, + {0x40059, 0x1300}, + {0x40079, 0x0}, + {0x4001a, 0x4808}, + {0x4003a, 0x880}, + {0x4005a, 0x0}, + {0x4007a, 0x0}, + {0x900aa, 0x0}, + {0x900ab, 0x790}, + {0x900ac, 0x11a}, + {0x900ad, 0x8}, + {0x900ae, 0x7aa}, + {0x900af, 0x2a}, + {0x900b0, 0x10}, + {0x900b1, 0x7b2}, + {0x900b2, 0x2a}, + {0x900b3, 0x0}, + {0x900b4, 0x7c8}, + {0x900b5, 0x109}, + {0x900b6, 0x10}, + {0x900b7, 0x10}, + {0x900b8, 0x109}, + {0x900b9, 0x10}, + {0x900ba, 0x2a8}, + {0x900bb, 0x129}, + {0x900bc, 0x8}, + {0x900bd, 0x370}, + {0x900be, 0x129}, + {0x900bf, 0xa}, + {0x900c0, 0x3c8}, + {0x900c1, 0x1a9}, + {0x900c2, 0xc}, + {0x900c3, 0x408}, + {0x900c4, 0x199}, + {0x900c5, 0x14}, + {0x900c6, 0x790}, + {0x900c7, 0x11a}, + {0x900c8, 0x8}, + {0x900c9, 0x4}, + {0x900ca, 0x18}, + {0x900cb, 0xe}, + {0x900cc, 0x408}, + {0x900cd, 0x199}, + {0x900ce, 0x8}, + {0x900cf, 0x8568}, + {0x900d0, 0x108}, + {0x900d1, 0x18}, + {0x900d2, 0x790}, + {0x900d3, 0x16a}, + {0x900d4, 0x8}, + {0x900d5, 0x1d8}, + {0x900d6, 0x169}, + {0x900d7, 0x10}, + {0x900d8, 0x8558}, + {0x900d9, 0x168}, + {0x900da, 0x1ff8}, + {0x900db, 0x85a8}, + {0x900dc, 0x1e8}, + {0x900dd, 0x50}, + {0x900de, 0x798}, + {0x900df, 0x16a}, + {0x900e0, 0x60}, + {0x900e1, 0x7a0}, + {0x900e2, 0x16a}, + {0x900e3, 0x8}, + {0x900e4, 0x8310}, + {0x900e5, 0x168}, + {0x900e6, 0x8}, + {0x900e7, 0xa310}, + {0x900e8, 0x168}, + {0x900e9, 0xa}, + {0x900ea, 0x408}, + {0x900eb, 0x169}, + {0x900ec, 0x6e}, + {0x900ed, 0x0}, + {0x900ee, 0x68}, + {0x900ef, 0x0}, + {0x900f0, 0x408}, + {0x900f1, 0x169}, + {0x900f2, 0x0}, + {0x900f3, 0x8310}, + {0x900f4, 0x168}, + {0x900f5, 0x0}, + {0x900f6, 0xa310}, + {0x900f7, 0x168}, + {0x900f8, 0x1ff8}, + {0x900f9, 0x85a8}, + {0x900fa, 0x1e8}, + {0x900fb, 0x68}, + {0x900fc, 0x798}, + {0x900fd, 0x16a}, + {0x900fe, 0x78}, + {0x900ff, 0x7a0}, + {0x90100, 0x16a}, + {0x90101, 0x68}, + {0x90102, 0x790}, + {0x90103, 0x16a}, + {0x90104, 0x8}, + {0x90105, 0x8b10}, + {0x90106, 0x168}, + {0x90107, 0x8}, + {0x90108, 0xab10}, + {0x90109, 0x168}, + {0x9010a, 0xa}, + {0x9010b, 0x408}, + {0x9010c, 0x169}, + {0x9010d, 0x58}, + {0x9010e, 0x0}, + {0x9010f, 0x68}, + {0x90110, 0x0}, + {0x90111, 0x408}, + {0x90112, 0x169}, + {0x90113, 0x0}, + {0x90114, 0x8b10}, + {0x90115, 0x168}, + {0x90116, 0x1}, + {0x90117, 0xab10}, + {0x90118, 0x168}, + {0x90119, 0x0}, + {0x9011a, 0x1d8}, + {0x9011b, 0x169}, + {0x9011c, 0x80}, + {0x9011d, 0x790}, + {0x9011e, 0x16a}, + {0x9011f, 0x18}, + {0x90120, 0x7aa}, + {0x90121, 0x6a}, + {0x90122, 0xa}, + {0x90123, 0x0}, + {0x90124, 0x1e9}, + {0x90125, 0x8}, + {0x90126, 0x8080}, + {0x90127, 0x108}, + {0x90128, 0xf}, + {0x90129, 0x408}, + {0x9012a, 0x169}, + {0x9012b, 0xc}, + {0x9012c, 0x0}, + {0x9012d, 0x68}, + {0x9012e, 0x9}, + {0x9012f, 0x0}, + {0x90130, 0x1a9}, + {0x90131, 0x0}, + {0x90132, 0x408}, + {0x90133, 0x169}, + {0x90134, 0x0}, + {0x90135, 0x8080}, + {0x90136, 0x108}, + {0x90137, 0x8}, + {0x90138, 0x7aa}, + {0x90139, 0x6a}, + {0x9013a, 0x0}, + {0x9013b, 0x8568}, + {0x9013c, 0x108}, + {0x9013d, 0xb7}, + {0x9013e, 0x790}, + {0x9013f, 0x16a}, + {0x90140, 0x1f}, + {0x90141, 0x0}, + {0x90142, 0x68}, + {0x90143, 0x8}, + {0x90144, 0x8558}, + {0x90145, 0x168}, + {0x90146, 0xf}, + {0x90147, 0x408}, + {0x90148, 0x169}, + {0x90149, 0xd}, + {0x9014a, 0x0}, + {0x9014b, 0x68}, + {0x9014c, 0x0}, + {0x9014d, 0x408}, + {0x9014e, 0x169}, + {0x9014f, 0x0}, + {0x90150, 0x8558}, + {0x90151, 0x168}, + {0x90152, 0x8}, + {0x90153, 0x3c8}, + {0x90154, 0x1a9}, + {0x90155, 0x3}, + {0x90156, 0x370}, + {0x90157, 0x129}, + {0x90158, 0x20}, + {0x90159, 0x2aa}, + {0x9015a, 0x9}, + {0x9015b, 0x8}, + {0x9015c, 0xe8}, + {0x9015d, 0x109}, + {0x9015e, 0x0}, + {0x9015f, 0x8140}, + {0x90160, 0x10c}, + {0x90161, 0x10}, + {0x90162, 0x8138}, + {0x90163, 0x104}, + {0x90164, 0x8}, + {0x90165, 0x448}, + {0x90166, 0x109}, + {0x90167, 0xf}, + {0x90168, 0x7c0}, + {0x90169, 0x109}, + {0x9016a, 0x0}, + {0x9016b, 0xe8}, + {0x9016c, 0x109}, + {0x9016d, 0x47}, + {0x9016e, 0x630}, + {0x9016f, 0x109}, + {0x90170, 0x8}, + {0x90171, 0x618}, + {0x90172, 0x109}, + {0x90173, 0x8}, + {0x90174, 0xe0}, + {0x90175, 0x109}, + {0x90176, 0x0}, + {0x90177, 0x7c8}, + {0x90178, 0x109}, + {0x90179, 0x8}, + {0x9017a, 0x8140}, + {0x9017b, 0x10c}, + {0x9017c, 0x0}, + {0x9017d, 0x478}, + {0x9017e, 0x109}, + {0x9017f, 0x0}, + {0x90180, 0x1}, + {0x90181, 0x8}, + {0x90182, 0x8}, + {0x90183, 0x4}, + {0x90184, 0x0}, + {0x90006, 0x8}, + {0x90007, 0x7c8}, + {0x90008, 0x109}, + {0x90009, 0x0}, + {0x9000a, 0x400}, + {0x9000b, 0x106}, + {0xd00e7, 0x400}, + {0x90017, 0x0}, + {0x9001f, 0x2b}, + {0x90026, 0x69}, + {0x400d0, 0x0}, + {0x400d1, 0x101}, + {0x400d2, 0x105}, + {0x400d3, 0x107}, + {0x400d4, 0x10f}, + {0x400d5, 0x202}, + {0x400d6, 0x20a}, + {0x400d7, 0x20b}, + {0x2003a, 0x2}, + {0x200be, 0x3}, + {0x2000b, 0x20d}, + {0x2000c, 0x74}, + {0x2000d, 0x48e}, + {0x2000e, 0x2c}, + {0x12000b, 0x107}, + {0x12000c, 0x3a}, + {0x12000d, 0x246}, + {0x12000e, 0x21}, + {0x22000b, 0xb0}, + {0x22000c, 0x27}, + {0x22000d, 0x186}, + {0x22000e, 0x10}, + {0x9000c, 0x0}, + {0x9000d, 0x173}, + {0x9000e, 0x60}, + {0x9000f, 0x6110}, + {0x90010, 0x2152}, + {0x90011, 0xdfbd}, + {0x90012, 0x2060}, + {0x90013, 0x6152}, + {0x20010, 0x5a}, + {0x20011, 0x3}, + {0x120010, 0x5a}, + {0x120011, 0x3}, + {0x40080, 0xe0}, + {0x40081, 0x12}, + {0x40082, 0xe0}, + {0x40083, 0x12}, + {0x40084, 0xe0}, + {0x40085, 0x12}, + {0x140080, 0xe0}, + {0x140081, 0x12}, + {0x140082, 0xe0}, + {0x140083, 0x12}, + {0x140084, 0xe0}, + {0x140085, 0x12}, + {0x240080, 0xe0}, + {0x240081, 0x12}, + {0x240082, 0xe0}, + {0x240083, 0x12}, + {0x240084, 0xe0}, + {0x240085, 0x12}, + {0x400fd, 0xf}, + {0x400f1, 0xe}, + {0x10011, 0x1}, + {0x10012, 0x1}, + {0x10013, 0x180}, + {0x10018, 0x1}, + {0x10002, 0x6209}, + {0x100b2, 0x1}, + {0x101b4, 0x1}, + {0x102b4, 0x1}, + {0x103b4, 0x1}, + {0x104b4, 0x1}, + {0x105b4, 0x1}, + {0x106b4, 0x1}, + {0x107b4, 0x1}, + {0x108b4, 0x1}, + {0x11011, 0x1}, + {0x11012, 0x1}, + {0x11013, 0x180}, + {0x11018, 0x1}, + {0x11002, 0x6209}, + {0x110b2, 0x1}, + {0x111b4, 0x1}, + {0x112b4, 0x1}, + {0x113b4, 0x1}, + {0x114b4, 0x1}, + {0x115b4, 0x1}, + {0x116b4, 0x1}, + {0x117b4, 0x1}, + {0x118b4, 0x1}, + {0x20089, 0x1}, + {0x20088, 0x19}, + {0xc0080, 0x0}, + {0xd0000, 0x1}, +}; + +static struct dram_fsp_msg ddr_dram_fsp_msg[] = { + { + /* P0 1866mts 1D */ + .drate = 1866, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp0_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), + }, + { + /* P1 933mts 1D */ + .drate = 933, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp1_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg), + }, + { + /* P2 625mts 1D */ + .drate = 625, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = ddr_fsp2_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), + }, + { + /* P0 1866mts 2D */ + .drate = 1866, + .fw_type = FW_2D_IMAGE, + .fsp_cfg = ddr_fsp0_2d_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), + }, +}; + +/* ddr timing config params */ +struct dram_timing_info dram_timing_1866mts = { + .ddrc_cfg = ddr_ddrc_cfg, + .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), + .ddrphy_cfg = ddr_ddrphy_cfg, + .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), + .fsp_msg = ddr_dram_fsp_msg, + .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), + .ddrphy_trained_csr = ddr_ddrphy_trained_csr, + .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), + .ddrphy_pie = ddr_phy_pie, + .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), + .fsp_table = { 1866, 933, 625, }, + .fsp_cfg = ddr_dram_fsp_cfg, + .fsp_cfg_num = ARRAY_SIZE(ddr_dram_fsp_cfg), +}; diff --git a/board/freescale/imx93_evk/lpddr4x_timing_ld.c b/board/freescale/imx93_evk/lpddr4x_timing_ld.c deleted file mode 100644 index f080322f112..00000000000 --- a/board/freescale/imx93_evk/lpddr4x_timing_ld.c +++ /dev/null @@ -1,1496 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2022 NXP - * - * Generated code from IMX_DDR_tool - * - * Align with uboot version: - * imx_v2019.04_5.4.x and above version - */ - -#include <linux/kernel.h> -#include <asm/arch/ddr.h> - -struct dram_cfg_param ddr_ddrc_cfg[] = { - /** Initialize DDRC registers **/ - { 0x4e300110, 0x44140001 }, - { 0x4e301000, 0x0 }, - { 0x4e300000, 0x8000ff }, - { 0x4e300008, 0x0 }, - { 0x4e300080, 0x80000512 }, - { 0x4e300084, 0x0 }, - { 0x4e300114, 0x2 }, - { 0x4e300260, 0x0 }, - { 0x4e30017c, 0x0 }, - { 0x4e300f04, 0x80 }, - { 0x4e300104, 0xaa77000e }, - { 0x4e300108, 0x1816b1aa }, - { 0x4e30010c, 0x5101e6 }, - { 0x4e300100, 0x12552100 }, - { 0x4e300160, 0x9002 }, - { 0x4e30016c, 0x30900000 }, - { 0x4e300250, 0x14 }, - { 0x4e300254, 0xaa00aa }, - { 0x4e300258, 0x8 }, - { 0x4e30025c, 0x400 }, - { 0x4e300300, 0x11281109 }, - { 0x4e300304, 0xaa110a }, - { 0x4e300308, 0x620071e }, - { 0x4e300170, 0x8a0a0508 }, - { 0x4e300124, 0xe3c0000 }, - { 0x4e300804, 0x1f1f1f1f }, - { 0x4e301240, 0x0 }, - { 0x4e301244, 0x0 }, - { 0x4e301248, 0x0 }, - { 0x4e30124c, 0x0 }, - { 0x4e301250, 0x0 }, - { 0x4e301254, 0x0 }, - { 0x4e301258, 0x0 }, - { 0x4e30125c, 0x0 }, -}; - -/* PHY Initialize Configuration */ -struct dram_cfg_param ddr_ddrphy_cfg[] = { - { 0x100a0, 0x4 }, - { 0x100a1, 0x5 }, - { 0x100a2, 0x6 }, - { 0x100a3, 0x7 }, - { 0x100a4, 0x0 }, - { 0x100a5, 0x1 }, - { 0x100a6, 0x2 }, - { 0x100a7, 0x3 }, - { 0x110a0, 0x3 }, - { 0x110a1, 0x2 }, - { 0x110a2, 0x0 }, - { 0x110a3, 0x1 }, - { 0x110a4, 0x7 }, - { 0x110a5, 0x6 }, - { 0x110a6, 0x4 }, - { 0x110a7, 0x5 }, - { 0x1005f, 0x5ff }, - { 0x1015f, 0x5ff }, - { 0x1105f, 0x5ff }, - { 0x1115f, 0x5ff }, - { 0x55, 0x1ff }, - { 0x1055, 0x1ff }, - { 0x2055, 0x1ff }, - { 0x200c5, 0xb }, - { 0x2002e, 0x2 }, - { 0x90204, 0x0 }, - { 0x20024, 0x1e3 }, - { 0x2003a, 0x2 }, - { 0x2007d, 0x212 }, - { 0x2007c, 0x61 }, - { 0x20056, 0x3 }, - { 0x1004d, 0xe00 }, - { 0x1014d, 0xe00 }, - { 0x1104d, 0xe00 }, - { 0x1114d, 0xe00 }, - { 0x10049, 0xe00 }, - { 0x10149, 0xe00 }, - { 0x11049, 0xe00 }, - { 0x11149, 0xe00 }, - { 0x43, 0x60 }, - { 0x1043, 0x60 }, - { 0x2043, 0x60 }, - { 0x20018, 0x1 }, - { 0x20075, 0x4 }, - { 0x20050, 0x0 }, - { 0x2009b, 0x2 }, - { 0x20008, 0x1d3 }, - { 0x20088, 0x9 }, - { 0x200b2, 0x10c }, - { 0x10043, 0x5a1 }, - { 0x10143, 0x5a1 }, - { 0x11043, 0x5a1 }, - { 0x11143, 0x5a1 }, - { 0x200fa, 0x2 }, - { 0x20019, 0x1 }, - { 0x200f0, 0x0 }, - { 0x200f1, 0x0 }, - { 0x200f2, 0x4444 }, - { 0x200f3, 0x8888 }, - { 0x200f4, 0x5555 }, - { 0x200f5, 0x0 }, - { 0x200f6, 0x0 }, - { 0x200f7, 0xf000 }, - { 0x1004a, 0x500 }, - { 0x1104a, 0x500 }, - { 0x20025, 0x0 }, - { 0x2002d, 0x0 }, - { 0x20021, 0x0 }, - { 0x2002c, 0x0 }, -}; - -/* ddr phy trained csr */ -struct dram_cfg_param ddr_ddrphy_trained_csr[] = { - { 0x200b2, 0x0 }, - { 0x1200b2, 0x0 }, - { 0x2200b2, 0x0 }, - { 0x200cb, 0x0 }, - { 0x10043, 0x0 }, - { 0x110043, 0x0 }, - { 0x210043, 0x0 }, - { 0x10143, 0x0 }, - { 0x110143, 0x0 }, - { 0x210143, 0x0 }, - { 0x11043, 0x0 }, - { 0x111043, 0x0 }, - { 0x211043, 0x0 }, - { 0x11143, 0x0 }, - { 0x111143, 0x0 }, - { 0x211143, 0x0 }, - { 0x12043, 0x0 }, - { 0x112043, 0x0 }, - { 0x212043, 0x0 }, - { 0x12143, 0x0 }, - { 0x112143, 0x0 }, - { 0x212143, 0x0 }, - { 0x13043, 0x0 }, - { 0x113043, 0x0 }, - { 0x213043, 0x0 }, - { 0x13143, 0x0 }, - { 0x113143, 0x0 }, - { 0x213143, 0x0 }, - { 0x80, 0x0 }, - { 0x100080, 0x0 }, - { 0x200080, 0x0 }, - { 0x1080, 0x0 }, - { 0x101080, 0x0 }, - { 0x201080, 0x0 }, - { 0x2080, 0x0 }, - { 0x102080, 0x0 }, - { 0x202080, 0x0 }, - { 0x3080, 0x0 }, - { 0x103080, 0x0 }, - { 0x203080, 0x0 }, - { 0x4080, 0x0 }, - { 0x104080, 0x0 }, - { 0x204080, 0x0 }, - { 0x5080, 0x0 }, - { 0x105080, 0x0 }, - { 0x205080, 0x0 }, - { 0x6080, 0x0 }, - { 0x106080, 0x0 }, - { 0x206080, 0x0 }, - { 0x7080, 0x0 }, - { 0x107080, 0x0 }, - { 0x207080, 0x0 }, - { 0x8080, 0x0 }, - { 0x108080, 0x0 }, - { 0x208080, 0x0 }, - { 0x9080, 0x0 }, - { 0x109080, 0x0 }, - { 0x209080, 0x0 }, - { 0x10080, 0x0 }, - { 0x110080, 0x0 }, - { 0x210080, 0x0 }, - { 0x10180, 0x0 }, - { 0x110180, 0x0 }, - { 0x210180, 0x0 }, - { 0x11080, 0x0 }, - { 0x111080, 0x0 }, - { 0x211080, 0x0 }, - { 0x11180, 0x0 }, - { 0x111180, 0x0 }, - { 0x211180, 0x0 }, - { 0x12080, 0x0 }, - { 0x112080, 0x0 }, - { 0x212080, 0x0 }, - { 0x12180, 0x0 }, - { 0x112180, 0x0 }, - { 0x212180, 0x0 }, - { 0x13080, 0x0 }, - { 0x113080, 0x0 }, - { 0x213080, 0x0 }, - { 0x13180, 0x0 }, - { 0x113180, 0x0 }, - { 0x213180, 0x0 }, - { 0x10081, 0x0 }, - { 0x110081, 0x0 }, - { 0x210081, 0x0 }, - { 0x10181, 0x0 }, - { 0x110181, 0x0 }, - { 0x210181, 0x0 }, - { 0x11081, 0x0 }, - { 0x111081, 0x0 }, - { 0x211081, 0x0 }, - { 0x11181, 0x0 }, - { 0x111181, 0x0 }, - { 0x211181, 0x0 }, - { 0x12081, 0x0 }, - { 0x112081, 0x0 }, - { 0x212081, 0x0 }, - { 0x12181, 0x0 }, - { 0x112181, 0x0 }, - { 0x212181, 0x0 }, - { 0x13081, 0x0 }, - { 0x113081, 0x0 }, - { 0x213081, 0x0 }, - { 0x13181, 0x0 }, - { 0x113181, 0x0 }, - { 0x213181, 0x0 }, - { 0x100d0, 0x0 }, - { 0x1100d0, 0x0 }, - { 0x2100d0, 0x0 }, - { 0x101d0, 0x0 }, - { 0x1101d0, 0x0 }, - { 0x2101d0, 0x0 }, - { 0x110d0, 0x0 }, - { 0x1110d0, 0x0 }, - { 0x2110d0, 0x0 }, - { 0x111d0, 0x0 }, - { 0x1111d0, 0x0 }, - { 0x2111d0, 0x0 }, - { 0x120d0, 0x0 }, - { 0x1120d0, 0x0 }, - { 0x2120d0, 0x0 }, - { 0x121d0, 0x0 }, - { 0x1121d0, 0x0 }, - { 0x2121d0, 0x0 }, - { 0x130d0, 0x0 }, - { 0x1130d0, 0x0 }, - { 0x2130d0, 0x0 }, - { 0x131d0, 0x0 }, - { 0x1131d0, 0x0 }, - { 0x2131d0, 0x0 }, - { 0x100d1, 0x0 }, - { 0x1100d1, 0x0 }, - { 0x2100d1, 0x0 }, - { 0x101d1, 0x0 }, - { 0x1101d1, 0x0 }, - { 0x2101d1, 0x0 }, - { 0x110d1, 0x0 }, - { 0x1110d1, 0x0 }, - { 0x2110d1, 0x0 }, - { 0x111d1, 0x0 }, - { 0x1111d1, 0x0 }, - { 0x2111d1, 0x0 }, - { 0x120d1, 0x0 }, - { 0x1120d1, 0x0 }, - { 0x2120d1, 0x0 }, - { 0x121d1, 0x0 }, - { 0x1121d1, 0x0 }, - { 0x2121d1, 0x0 }, - { 0x130d1, 0x0 }, - { 0x1130d1, 0x0 }, - { 0x2130d1, 0x0 }, - { 0x131d1, 0x0 }, - { 0x1131d1, 0x0 }, - { 0x2131d1, 0x0 }, - { 0x10068, 0x0 }, - { 0x10168, 0x0 }, - { 0x10268, 0x0 }, - { 0x10368, 0x0 }, - { 0x10468, 0x0 }, - { 0x10568, 0x0 }, - { 0x10668, 0x0 }, - { 0x10768, 0x0 }, - { 0x10868, 0x0 }, - { 0x11068, 0x0 }, - { 0x11168, 0x0 }, - { 0x11268, 0x0 }, - { 0x11368, 0x0 }, - { 0x11468, 0x0 }, - { 0x11568, 0x0 }, - { 0x11668, 0x0 }, - { 0x11768, 0x0 }, - { 0x11868, 0x0 }, - { 0x12068, 0x0 }, - { 0x12168, 0x0 }, - { 0x12268, 0x0 }, - { 0x12368, 0x0 }, - { 0x12468, 0x0 }, - { 0x12568, 0x0 }, - { 0x12668, 0x0 }, - { 0x12768, 0x0 }, - { 0x12868, 0x0 }, - { 0x13068, 0x0 }, - { 0x13168, 0x0 }, - { 0x13268, 0x0 }, - { 0x13368, 0x0 }, - { 0x13468, 0x0 }, - { 0x13568, 0x0 }, - { 0x13668, 0x0 }, - { 0x13768, 0x0 }, - { 0x13868, 0x0 }, - { 0x10069, 0x0 }, - { 0x10169, 0x0 }, - { 0x10269, 0x0 }, - { 0x10369, 0x0 }, - { 0x10469, 0x0 }, - { 0x10569, 0x0 }, - { 0x10669, 0x0 }, - { 0x10769, 0x0 }, - { 0x10869, 0x0 }, - { 0x11069, 0x0 }, - { 0x11169, 0x0 }, - { 0x11269, 0x0 }, - { 0x11369, 0x0 }, - { 0x11469, 0x0 }, - { 0x11569, 0x0 }, - { 0x11669, 0x0 }, - { 0x11769, 0x0 }, - { 0x11869, 0x0 }, - { 0x12069, 0x0 }, - { 0x12169, 0x0 }, - { 0x12269, 0x0 }, - { 0x12369, 0x0 }, - { 0x12469, 0x0 }, - { 0x12569, 0x0 }, - { 0x12669, 0x0 }, - { 0x12769, 0x0 }, - { 0x12869, 0x0 }, - { 0x13069, 0x0 }, - { 0x13169, 0x0 }, - { 0x13269, 0x0 }, - { 0x13369, 0x0 }, - { 0x13469, 0x0 }, - { 0x13569, 0x0 }, - { 0x13669, 0x0 }, - { 0x13769, 0x0 }, - { 0x13869, 0x0 }, - { 0x1008c, 0x0 }, - { 0x11008c, 0x0 }, - { 0x21008c, 0x0 }, - { 0x1018c, 0x0 }, - { 0x11018c, 0x0 }, - { 0x21018c, 0x0 }, - { 0x1108c, 0x0 }, - { 0x11108c, 0x0 }, - { 0x21108c, 0x0 }, - { 0x1118c, 0x0 }, - { 0x11118c, 0x0 }, - { 0x21118c, 0x0 }, - { 0x1208c, 0x0 }, - { 0x11208c, 0x0 }, - { 0x21208c, 0x0 }, - { 0x1218c, 0x0 }, - { 0x11218c, 0x0 }, - { 0x21218c, 0x0 }, - { 0x1308c, 0x0 }, - { 0x11308c, 0x0 }, - { 0x21308c, 0x0 }, - { 0x1318c, 0x0 }, - { 0x11318c, 0x0 }, - { 0x21318c, 0x0 }, - { 0x1008d, 0x0 }, - { 0x11008d, 0x0 }, - { 0x21008d, 0x0 }, - { 0x1018d, 0x0 }, - { 0x11018d, 0x0 }, - { 0x21018d, 0x0 }, - { 0x1108d, 0x0 }, - { 0x11108d, 0x0 }, - { 0x21108d, 0x0 }, - { 0x1118d, 0x0 }, - { 0x11118d, 0x0 }, - { 0x21118d, 0x0 }, - { 0x1208d, 0x0 }, - { 0x11208d, 0x0 }, - { 0x21208d, 0x0 }, - { 0x1218d, 0x0 }, - { 0x11218d, 0x0 }, - { 0x21218d, 0x0 }, - { 0x1308d, 0x0 }, - { 0x11308d, 0x0 }, - { 0x21308d, 0x0 }, - { 0x1318d, 0x0 }, - { 0x11318d, 0x0 }, - { 0x21318d, 0x0 }, - { 0x100c0, 0x0 }, - { 0x1100c0, 0x0 }, - { 0x2100c0, 0x0 }, - { 0x101c0, 0x0 }, - { 0x1101c0, 0x0 }, - { 0x2101c0, 0x0 }, - { 0x102c0, 0x0 }, - { 0x1102c0, 0x0 }, - { 0x2102c0, 0x0 }, - { 0x103c0, 0x0 }, - { 0x1103c0, 0x0 }, - { 0x2103c0, 0x0 }, - { 0x104c0, 0x0 }, - { 0x1104c0, 0x0 }, - { 0x2104c0, 0x0 }, - { 0x105c0, 0x0 }, - { 0x1105c0, 0x0 }, - { 0x2105c0, 0x0 }, - { 0x106c0, 0x0 }, - { 0x1106c0, 0x0 }, - { 0x2106c0, 0x0 }, - { 0x107c0, 0x0 }, - { 0x1107c0, 0x0 }, - { 0x2107c0, 0x0 }, - { 0x108c0, 0x0 }, - { 0x1108c0, 0x0 }, - { 0x2108c0, 0x0 }, - { 0x110c0, 0x0 }, - { 0x1110c0, 0x0 }, - { 0x2110c0, 0x0 }, - { 0x111c0, 0x0 }, - { 0x1111c0, 0x0 }, - { 0x2111c0, 0x0 }, - { 0x112c0, 0x0 }, - { 0x1112c0, 0x0 }, - { 0x2112c0, 0x0 }, - { 0x113c0, 0x0 }, - { 0x1113c0, 0x0 }, - { 0x2113c0, 0x0 }, - { 0x114c0, 0x0 }, - { 0x1114c0, 0x0 }, - { 0x2114c0, 0x0 }, - { 0x115c0, 0x0 }, - { 0x1115c0, 0x0 }, - { 0x2115c0, 0x0 }, - { 0x116c0, 0x0 }, - { 0x1116c0, 0x0 }, - { 0x2116c0, 0x0 }, - { 0x117c0, 0x0 }, - { 0x1117c0, 0x0 }, - { 0x2117c0, 0x0 }, - { 0x118c0, 0x0 }, - { 0x1118c0, 0x0 }, - { 0x2118c0, 0x0 }, - { 0x120c0, 0x0 }, - { 0x1120c0, 0x0 }, - { 0x2120c0, 0x0 }, - { 0x121c0, 0x0 }, - { 0x1121c0, 0x0 }, - { 0x2121c0, 0x0 }, - { 0x122c0, 0x0 }, - { 0x1122c0, 0x0 }, - { 0x2122c0, 0x0 }, - { 0x123c0, 0x0 }, - { 0x1123c0, 0x0 }, - { 0x2123c0, 0x0 }, - { 0x124c0, 0x0 }, - { 0x1124c0, 0x0 }, - { 0x2124c0, 0x0 }, - { 0x125c0, 0x0 }, - { 0x1125c0, 0x0 }, - { 0x2125c0, 0x0 }, - { 0x126c0, 0x0 }, - { 0x1126c0, 0x0 }, - { 0x2126c0, 0x0 }, - { 0x127c0, 0x0 }, - { 0x1127c0, 0x0 }, - { 0x2127c0, 0x0 }, - { 0x128c0, 0x0 }, - { 0x1128c0, 0x0 }, - { 0x2128c0, 0x0 }, - { 0x130c0, 0x0 }, - { 0x1130c0, 0x0 }, - { 0x2130c0, 0x0 }, - { 0x131c0, 0x0 }, - { 0x1131c0, 0x0 }, - { 0x2131c0, 0x0 }, - { 0x132c0, 0x0 }, - { 0x1132c0, 0x0 }, - { 0x2132c0, 0x0 }, - { 0x133c0, 0x0 }, - { 0x1133c0, 0x0 }, - { 0x2133c0, 0x0 }, - { 0x134c0, 0x0 }, - { 0x1134c0, 0x0 }, - { 0x2134c0, 0x0 }, - { 0x135c0, 0x0 }, - { 0x1135c0, 0x0 }, - { 0x2135c0, 0x0 }, - { 0x136c0, 0x0 }, - { 0x1136c0, 0x0 }, - { 0x2136c0, 0x0 }, - { 0x137c0, 0x0 }, - { 0x1137c0, 0x0 }, - { 0x2137c0, 0x0 }, - { 0x138c0, 0x0 }, - { 0x1138c0, 0x0 }, - { 0x2138c0, 0x0 }, - { 0x100c1, 0x0 }, - { 0x1100c1, 0x0 }, - { 0x2100c1, 0x0 }, - { 0x101c1, 0x0 }, - { 0x1101c1, 0x0 }, - { 0x2101c1, 0x0 }, - { 0x102c1, 0x0 }, - { 0x1102c1, 0x0 }, - { 0x2102c1, 0x0 }, - { 0x103c1, 0x0 }, - { 0x1103c1, 0x0 }, - { 0x2103c1, 0x0 }, - { 0x104c1, 0x0 }, - { 0x1104c1, 0x0 }, - { 0x2104c1, 0x0 }, - { 0x105c1, 0x0 }, - { 0x1105c1, 0x0 }, - { 0x2105c1, 0x0 }, - { 0x106c1, 0x0 }, - { 0x1106c1, 0x0 }, - { 0x2106c1, 0x0 }, - { 0x107c1, 0x0 }, - { 0x1107c1, 0x0 }, - { 0x2107c1, 0x0 }, - { 0x108c1, 0x0 }, - { 0x1108c1, 0x0 }, - { 0x2108c1, 0x0 }, - { 0x110c1, 0x0 }, - { 0x1110c1, 0x0 }, - { 0x2110c1, 0x0 }, - { 0x111c1, 0x0 }, - { 0x1111c1, 0x0 }, - { 0x2111c1, 0x0 }, - { 0x112c1, 0x0 }, - { 0x1112c1, 0x0 }, - { 0x2112c1, 0x0 }, - { 0x113c1, 0x0 }, - { 0x1113c1, 0x0 }, - { 0x2113c1, 0x0 }, - { 0x114c1, 0x0 }, - { 0x1114c1, 0x0 }, - { 0x2114c1, 0x0 }, - { 0x115c1, 0x0 }, - { 0x1115c1, 0x0 }, - { 0x2115c1, 0x0 }, - { 0x116c1, 0x0 }, - { 0x1116c1, 0x0 }, - { 0x2116c1, 0x0 }, - { 0x117c1, 0x0 }, - { 0x1117c1, 0x0 }, - { 0x2117c1, 0x0 }, - { 0x118c1, 0x0 }, - { 0x1118c1, 0x0 }, - { 0x2118c1, 0x0 }, - { 0x120c1, 0x0 }, - { 0x1120c1, 0x0 }, - { 0x2120c1, 0x0 }, - { 0x121c1, 0x0 }, - { 0x1121c1, 0x0 }, - { 0x2121c1, 0x0 }, - { 0x122c1, 0x0 }, - { 0x1122c1, 0x0 }, - { 0x2122c1, 0x0 }, - { 0x123c1, 0x0 }, - { 0x1123c1, 0x0 }, - { 0x2123c1, 0x0 }, - { 0x124c1, 0x0 }, - { 0x1124c1, 0x0 }, - { 0x2124c1, 0x0 }, - { 0x125c1, 0x0 }, - { 0x1125c1, 0x0 }, - { 0x2125c1, 0x0 }, - { 0x126c1, 0x0 }, - { 0x1126c1, 0x0 }, - { 0x2126c1, 0x0 }, - { 0x127c1, 0x0 }, - { 0x1127c1, 0x0 }, - { 0x2127c1, 0x0 }, - { 0x128c1, 0x0 }, - { 0x1128c1, 0x0 }, - { 0x2128c1, 0x0 }, - { 0x130c1, 0x0 }, - { 0x1130c1, 0x0 }, - { 0x2130c1, 0x0 }, - { 0x131c1, 0x0 }, - { 0x1131c1, 0x0 }, - { 0x2131c1, 0x0 }, - { 0x132c1, 0x0 }, - { 0x1132c1, 0x0 }, - { 0x2132c1, 0x0 }, - { 0x133c1, 0x0 }, - { 0x1133c1, 0x0 }, - { 0x2133c1, 0x0 }, - { 0x134c1, 0x0 }, - { 0x1134c1, 0x0 }, - { 0x2134c1, 0x0 }, - { 0x135c1, 0x0 }, - { 0x1135c1, 0x0 }, - { 0x2135c1, 0x0 }, - { 0x136c1, 0x0 }, - { 0x1136c1, 0x0 }, - { 0x2136c1, 0x0 }, - { 0x137c1, 0x0 }, - { 0x1137c1, 0x0 }, - { 0x2137c1, 0x0 }, - { 0x138c1, 0x0 }, - { 0x1138c1, 0x0 }, - { 0x2138c1, 0x0 }, - { 0x10020, 0x0 }, - { 0x110020, 0x0 }, - { 0x210020, 0x0 }, - { 0x11020, 0x0 }, - { 0x111020, 0x0 }, - { 0x211020, 0x0 }, - { 0x12020, 0x0 }, - { 0x112020, 0x0 }, - { 0x212020, 0x0 }, - { 0x13020, 0x0 }, - { 0x113020, 0x0 }, - { 0x213020, 0x0 }, - { 0x20072, 0x0 }, - { 0x20073, 0x0 }, - { 0x20074, 0x0 }, - { 0x100aa, 0x0 }, - { 0x110aa, 0x0 }, - { 0x120aa, 0x0 }, - { 0x130aa, 0x0 }, - { 0x20010, 0x0 }, - { 0x120010, 0x0 }, - { 0x220010, 0x0 }, - { 0x20011, 0x0 }, - { 0x120011, 0x0 }, - { 0x220011, 0x0 }, - { 0x100ae, 0x0 }, - { 0x1100ae, 0x0 }, - { 0x2100ae, 0x0 }, - { 0x100af, 0x0 }, - { 0x1100af, 0x0 }, - { 0x2100af, 0x0 }, - { 0x110ae, 0x0 }, - { 0x1110ae, 0x0 }, - { 0x2110ae, 0x0 }, - { 0x110af, 0x0 }, - { 0x1110af, 0x0 }, - { 0x2110af, 0x0 }, - { 0x120ae, 0x0 }, - { 0x1120ae, 0x0 }, - { 0x2120ae, 0x0 }, - { 0x120af, 0x0 }, - { 0x1120af, 0x0 }, - { 0x2120af, 0x0 }, - { 0x130ae, 0x0 }, - { 0x1130ae, 0x0 }, - { 0x2130ae, 0x0 }, - { 0x130af, 0x0 }, - { 0x1130af, 0x0 }, - { 0x2130af, 0x0 }, - { 0x20020, 0x0 }, - { 0x120020, 0x0 }, - { 0x220020, 0x0 }, - { 0x100a0, 0x0 }, - { 0x100a1, 0x0 }, - { 0x100a2, 0x0 }, - { 0x100a3, 0x0 }, - { 0x100a4, 0x0 }, - { 0x100a5, 0x0 }, - { 0x100a6, 0x0 }, - { 0x100a7, 0x0 }, - { 0x110a0, 0x0 }, - { 0x110a1, 0x0 }, - { 0x110a2, 0x0 }, - { 0x110a3, 0x0 }, - { 0x110a4, 0x0 }, - { 0x110a5, 0x0 }, - { 0x110a6, 0x0 }, - { 0x110a7, 0x0 }, - { 0x120a0, 0x0 }, - { 0x120a1, 0x0 }, - { 0x120a2, 0x0 }, - { 0x120a3, 0x0 }, - { 0x120a4, 0x0 }, - { 0x120a5, 0x0 }, - { 0x120a6, 0x0 }, - { 0x120a7, 0x0 }, - { 0x130a0, 0x0 }, - { 0x130a1, 0x0 }, - { 0x130a2, 0x0 }, - { 0x130a3, 0x0 }, - { 0x130a4, 0x0 }, - { 0x130a5, 0x0 }, - { 0x130a6, 0x0 }, - { 0x130a7, 0x0 }, - { 0x2007c, 0x0 }, - { 0x12007c, 0x0 }, - { 0x22007c, 0x0 }, - { 0x2007d, 0x0 }, - { 0x12007d, 0x0 }, - { 0x22007d, 0x0 }, - { 0x400fd, 0x0 }, - { 0x400c0, 0x0 }, - { 0x90201, 0x0 }, - { 0x190201, 0x0 }, - { 0x290201, 0x0 }, - { 0x90202, 0x0 }, - { 0x190202, 0x0 }, - { 0x290202, 0x0 }, - { 0x90203, 0x0 }, - { 0x190203, 0x0 }, - { 0x290203, 0x0 }, - { 0x90204, 0x0 }, - { 0x190204, 0x0 }, - { 0x290204, 0x0 }, - { 0x90205, 0x0 }, - { 0x190205, 0x0 }, - { 0x290205, 0x0 }, - { 0x90206, 0x0 }, - { 0x190206, 0x0 }, - { 0x290206, 0x0 }, - { 0x90207, 0x0 }, - { 0x190207, 0x0 }, - { 0x290207, 0x0 }, - { 0x90208, 0x0 }, - { 0x190208, 0x0 }, - { 0x290208, 0x0 }, - { 0x10062, 0x0 }, - { 0x10162, 0x0 }, - { 0x10262, 0x0 }, - { 0x10362, 0x0 }, - { 0x10462, 0x0 }, - { 0x10562, 0x0 }, - { 0x10662, 0x0 }, - { 0x10762, 0x0 }, - { 0x10862, 0x0 }, - { 0x11062, 0x0 }, - { 0x11162, 0x0 }, - { 0x11262, 0x0 }, - { 0x11362, 0x0 }, - { 0x11462, 0x0 }, - { 0x11562, 0x0 }, - { 0x11662, 0x0 }, - { 0x11762, 0x0 }, - { 0x11862, 0x0 }, - { 0x12062, 0x0 }, - { 0x12162, 0x0 }, - { 0x12262, 0x0 }, - { 0x12362, 0x0 }, - { 0x12462, 0x0 }, - { 0x12562, 0x0 }, - { 0x12662, 0x0 }, - { 0x12762, 0x0 }, - { 0x12862, 0x0 }, - { 0x13062, 0x0 }, - { 0x13162, 0x0 }, - { 0x13262, 0x0 }, - { 0x13362, 0x0 }, - { 0x13462, 0x0 }, - { 0x13562, 0x0 }, - { 0x13662, 0x0 }, - { 0x13762, 0x0 }, - { 0x13862, 0x0 }, - { 0x20077, 0x0 }, - { 0x10001, 0x0 }, - { 0x11001, 0x0 }, - { 0x12001, 0x0 }, - { 0x13001, 0x0 }, - { 0x10040, 0x0 }, - { 0x10140, 0x0 }, - { 0x10240, 0x0 }, - { 0x10340, 0x0 }, - { 0x10440, 0x0 }, - { 0x10540, 0x0 }, - { 0x10640, 0x0 }, - { 0x10740, 0x0 }, - { 0x10840, 0x0 }, - { 0x10030, 0x0 }, - { 0x10130, 0x0 }, - { 0x10230, 0x0 }, - { 0x10330, 0x0 }, - { 0x10430, 0x0 }, - { 0x10530, 0x0 }, - { 0x10630, 0x0 }, - { 0x10730, 0x0 }, - { 0x10830, 0x0 }, - { 0x11040, 0x0 }, - { 0x11140, 0x0 }, - { 0x11240, 0x0 }, - { 0x11340, 0x0 }, - { 0x11440, 0x0 }, - { 0x11540, 0x0 }, - { 0x11640, 0x0 }, - { 0x11740, 0x0 }, - { 0x11840, 0x0 }, - { 0x11030, 0x0 }, - { 0x11130, 0x0 }, - { 0x11230, 0x0 }, - { 0x11330, 0x0 }, - { 0x11430, 0x0 }, - { 0x11530, 0x0 }, - { 0x11630, 0x0 }, - { 0x11730, 0x0 }, - { 0x11830, 0x0 }, - { 0x12040, 0x0 }, - { 0x12140, 0x0 }, - { 0x12240, 0x0 }, - { 0x12340, 0x0 }, - { 0x12440, 0x0 }, - { 0x12540, 0x0 }, - { 0x12640, 0x0 }, - { 0x12740, 0x0 }, - { 0x12840, 0x0 }, - { 0x12030, 0x0 }, - { 0x12130, 0x0 }, - { 0x12230, 0x0 }, - { 0x12330, 0x0 }, - { 0x12430, 0x0 }, - { 0x12530, 0x0 }, - { 0x12630, 0x0 }, - { 0x12730, 0x0 }, - { 0x12830, 0x0 }, - { 0x13040, 0x0 }, - { 0x13140, 0x0 }, - { 0x13240, 0x0 }, - { 0x13340, 0x0 }, - { 0x13440, 0x0 }, - { 0x13540, 0x0 }, - { 0x13640, 0x0 }, - { 0x13740, 0x0 }, - { 0x13840, 0x0 }, - { 0x13030, 0x0 }, - { 0x13130, 0x0 }, - { 0x13230, 0x0 }, - { 0x13330, 0x0 }, - { 0x13430, 0x0 }, - { 0x13530, 0x0 }, - { 0x13630, 0x0 }, - { 0x13730, 0x0 }, - { 0x13830, 0x0 }, -}; - -/* P0 message block paremeter for training firmware */ -struct dram_cfg_param ddr_fsp0_cfg[] = { - { 0xd0000, 0x0 }, - { 0x54003, 0x74a }, - { 0x54004, 0x4 }, - { 0x54006, 0x15 }, - { 0x54008, 0x131f }, - { 0x54009, 0xc8 }, - { 0x5400b, 0x4 }, - { 0x5400c, 0x1 }, - { 0x5400d, 0x100 }, - { 0x5400f, 0x100 }, - { 0x54012, 0x110 }, - { 0x54019, 0x1bb4 }, - { 0x5401a, 0x32 }, - { 0x5401b, 0x1f46 }, - { 0x5401c, 0x1708 }, - { 0x5401e, 0x6 }, - { 0x5401f, 0x1bb4 }, - { 0x54020, 0x32 }, - { 0x54021, 0x1f46 }, - { 0x54022, 0x1708 }, - { 0x54024, 0x6 }, - { 0x54032, 0xb400 }, - { 0x54033, 0x321b }, - { 0x54034, 0x4600 }, - { 0x54035, 0x81f }, - { 0x54036, 0x17 }, - { 0x54037, 0x600 }, - { 0x54038, 0xb400 }, - { 0x54039, 0x321b }, - { 0x5403a, 0x4600 }, - { 0x5403b, 0x81f }, - { 0x5403c, 0x17 }, - { 0x5403d, 0x600 }, - { 0xd0000, 0x1 }, -}; - -/* P0 2D message block paremeter for training firmware */ -struct dram_cfg_param ddr_fsp0_2d_cfg[] = { - { 0xd0000, 0x0 }, - { 0x54003, 0x74a }, - { 0x54004, 0x4 }, - { 0x54006, 0x15 }, - { 0x54008, 0x61 }, - { 0x54009, 0xc8 }, - { 0x5400b, 0x4 }, - { 0x5400c, 0x1 }, - { 0x5400d, 0x100 }, - { 0x5400f, 0x100 }, - { 0x54010, 0x2080 }, - { 0x54012, 0x110 }, - { 0x54019, 0x1bb4 }, - { 0x5401a, 0x32 }, - { 0x5401b, 0x1f46 }, - { 0x5401c, 0x1708 }, - { 0x5401e, 0x6 }, - { 0x5401f, 0x1bb4 }, - { 0x54020, 0x32 }, - { 0x54021, 0x1f46 }, - { 0x54022, 0x1708 }, - { 0x54024, 0x6 }, - { 0x54032, 0xb400 }, - { 0x54033, 0x321b }, - { 0x54034, 0x4600 }, - { 0x54035, 0x81f }, - { 0x54036, 0x17 }, - { 0x54037, 0x600 }, - { 0x54038, 0xb400 }, - { 0x54039, 0x321b }, - { 0x5403a, 0x4600 }, - { 0x5403b, 0x81f }, - { 0x5403c, 0x17 }, - { 0x5403d, 0x600 }, - { 0xd0000, 0x1 }, -}; - -/* DRAM PHY init engine image */ -struct dram_cfg_param ddr_phy_pie[] = { - { 0xd0000, 0x0 }, - { 0x90000, 0x10 }, - { 0x90001, 0x400 }, - { 0x90002, 0x10e }, - { 0x90003, 0x0 }, - { 0x90004, 0x0 }, - { 0x90005, 0x8 }, - { 0x90029, 0xb }, - { 0x9002a, 0x480 }, - { 0x9002b, 0x109 }, - { 0x9002c, 0x8 }, - { 0x9002d, 0x448 }, - { 0x9002e, 0x139 }, - { 0x9002f, 0x8 }, - { 0x90030, 0x478 }, - { 0x90031, 0x109 }, - { 0x90032, 0x0 }, - { 0x90033, 0xe8 }, - { 0x90034, 0x109 }, - { 0x90035, 0x2 }, - { 0x90036, 0x10 }, - { 0x90037, 0x139 }, - { 0x90038, 0xb }, - { 0x90039, 0x7c0 }, - { 0x9003a, 0x139 }, - { 0x9003b, 0x44 }, - { 0x9003c, 0x633 }, - { 0x9003d, 0x159 }, - { 0x9003e, 0x14f }, - { 0x9003f, 0x630 }, - { 0x90040, 0x159 }, - { 0x90041, 0x47 }, - { 0x90042, 0x633 }, - { 0x90043, 0x149 }, - { 0x90044, 0x4f }, - { 0x90045, 0x633 }, - { 0x90046, 0x179 }, - { 0x90047, 0x8 }, - { 0x90048, 0xe0 }, - { 0x90049, 0x109 }, - { 0x9004a, 0x0 }, - { 0x9004b, 0x7c8 }, - { 0x9004c, 0x109 }, - { 0x9004d, 0x0 }, - { 0x9004e, 0x1 }, - { 0x9004f, 0x8 }, - { 0x90050, 0x30 }, - { 0x90051, 0x65a }, - { 0x90052, 0x9 }, - { 0x90053, 0x0 }, - { 0x90054, 0x45a }, - { 0x90055, 0x9 }, - { 0x90056, 0x0 }, - { 0x90057, 0x448 }, - { 0x90058, 0x109 }, - { 0x90059, 0x40 }, - { 0x9005a, 0x633 }, - { 0x9005b, 0x179 }, - { 0x9005c, 0x1 }, - { 0x9005d, 0x618 }, - { 0x9005e, 0x109 }, - { 0x9005f, 0x40c0 }, - { 0x90060, 0x633 }, - { 0x90061, 0x149 }, - { 0x90062, 0x8 }, - { 0x90063, 0x4 }, - { 0x90064, 0x48 }, - { 0x90065, 0x4040 }, - { 0x90066, 0x633 }, - { 0x90067, 0x149 }, - { 0x90068, 0x0 }, - { 0x90069, 0x4 }, - { 0x9006a, 0x48 }, - { 0x9006b, 0x40 }, - { 0x9006c, 0x633 }, - { 0x9006d, 0x149 }, - { 0x9006e, 0x0 }, - { 0x9006f, 0x658 }, - { 0x90070, 0x109 }, - { 0x90071, 0x10 }, - { 0x90072, 0x4 }, - { 0x90073, 0x18 }, - { 0x90074, 0x0 }, - { 0x90075, 0x4 }, - { 0x90076, 0x78 }, - { 0x90077, 0x549 }, - { 0x90078, 0x633 }, - { 0x90079, 0x159 }, - { 0x9007a, 0xd49 }, - { 0x9007b, 0x633 }, - { 0x9007c, 0x159 }, - { 0x9007d, 0x94a }, - { 0x9007e, 0x633 }, - { 0x9007f, 0x159 }, - { 0x90080, 0x441 }, - { 0x90081, 0x633 }, - { 0x90082, 0x149 }, - { 0x90083, 0x42 }, - { 0x90084, 0x633 }, - { 0x90085, 0x149 }, - { 0x90086, 0x1 }, - { 0x90087, 0x633 }, - { 0x90088, 0x149 }, - { 0x90089, 0x0 }, - { 0x9008a, 0xe0 }, - { 0x9008b, 0x109 }, - { 0x9008c, 0xa }, - { 0x9008d, 0x10 }, - { 0x9008e, 0x109 }, - { 0x9008f, 0x9 }, - { 0x90090, 0x3c0 }, - { 0x90091, 0x149 }, - { 0x90092, 0x9 }, - { 0x90093, 0x3c0 }, - { 0x90094, 0x159 }, - { 0x90095, 0x18 }, - { 0x90096, 0x10 }, - { 0x90097, 0x109 }, - { 0x90098, 0x0 }, - { 0x90099, 0x3c0 }, - { 0x9009a, 0x109 }, - { 0x9009b, 0x18 }, - { 0x9009c, 0x4 }, - { 0x9009d, 0x48 }, - { 0x9009e, 0x18 }, - { 0x9009f, 0x4 }, - { 0x900a0, 0x58 }, - { 0x900a1, 0xb }, - { 0x900a2, 0x10 }, - { 0x900a3, 0x109 }, - { 0x900a4, 0x1 }, - { 0x900a5, 0x10 }, - { 0x900a6, 0x109 }, - { 0x900a7, 0x5 }, - { 0x900a8, 0x7c0 }, - { 0x900a9, 0x109 }, - { 0x40000, 0x811 }, - { 0x40020, 0x880 }, - { 0x40040, 0x0 }, - { 0x40060, 0x0 }, - { 0x40001, 0x4008 }, - { 0x40021, 0x83 }, - { 0x40041, 0x4f }, - { 0x40061, 0x0 }, - { 0x40002, 0x4040 }, - { 0x40022, 0x83 }, - { 0x40042, 0x51 }, - { 0x40062, 0x0 }, - { 0x40003, 0x811 }, - { 0x40023, 0x880 }, - { 0x40043, 0x0 }, - { 0x40063, 0x0 }, - { 0x40004, 0x720 }, - { 0x40024, 0xf }, - { 0x40044, 0x1740 }, - { 0x40064, 0x0 }, - { 0x40005, 0x16 }, - { 0x40025, 0x83 }, - { 0x40045, 0x4b }, - { 0x40065, 0x0 }, - { 0x40006, 0x716 }, - { 0x40026, 0xf }, - { 0x40046, 0x2001 }, - { 0x40066, 0x0 }, - { 0x40007, 0x716 }, - { 0x40027, 0xf }, - { 0x40047, 0x2800 }, - { 0x40067, 0x0 }, - { 0x40008, 0x716 }, - { 0x40028, 0xf }, - { 0x40048, 0xf00 }, - { 0x40068, 0x0 }, - { 0x40009, 0x720 }, - { 0x40029, 0xf }, - { 0x40049, 0x1400 }, - { 0x40069, 0x0 }, - { 0x4000a, 0xe08 }, - { 0x4002a, 0xc15 }, - { 0x4004a, 0x0 }, - { 0x4006a, 0x0 }, - { 0x4000b, 0x625 }, - { 0x4002b, 0x15 }, - { 0x4004b, 0x0 }, - { 0x4006b, 0x0 }, - { 0x4000c, 0x4028 }, - { 0x4002c, 0x80 }, - { 0x4004c, 0x0 }, - { 0x4006c, 0x0 }, - { 0x4000d, 0xe08 }, - { 0x4002d, 0xc1a }, - { 0x4004d, 0x0 }, - { 0x4006d, 0x0 }, - { 0x4000e, 0x625 }, - { 0x4002e, 0x1a }, - { 0x4004e, 0x0 }, - { 0x4006e, 0x0 }, - { 0x4000f, 0x4040 }, - { 0x4002f, 0x80 }, - { 0x4004f, 0x0 }, - { 0x4006f, 0x0 }, - { 0x40010, 0x2604 }, - { 0x40030, 0x15 }, - { 0x40050, 0x0 }, - { 0x40070, 0x0 }, - { 0x40011, 0x708 }, - { 0x40031, 0x5 }, - { 0x40051, 0x0 }, - { 0x40071, 0x2002 }, - { 0x40012, 0x8 }, - { 0x40032, 0x80 }, - { 0x40052, 0x0 }, - { 0x40072, 0x0 }, - { 0x40013, 0x2604 }, - { 0x40033, 0x1a }, - { 0x40053, 0x0 }, - { 0x40073, 0x0 }, - { 0x40014, 0x708 }, - { 0x40034, 0xa }, - { 0x40054, 0x0 }, - { 0x40074, 0x2002 }, - { 0x40015, 0x4040 }, - { 0x40035, 0x80 }, - { 0x40055, 0x0 }, - { 0x40075, 0x0 }, - { 0x40016, 0x60a }, - { 0x40036, 0x15 }, - { 0x40056, 0x1200 }, - { 0x40076, 0x0 }, - { 0x40017, 0x61a }, - { 0x40037, 0x15 }, - { 0x40057, 0x1300 }, - { 0x40077, 0x0 }, - { 0x40018, 0x60a }, - { 0x40038, 0x1a }, - { 0x40058, 0x1200 }, - { 0x40078, 0x0 }, - { 0x40019, 0x642 }, - { 0x40039, 0x1a }, - { 0x40059, 0x1300 }, - { 0x40079, 0x0 }, - { 0x4001a, 0x4808 }, - { 0x4003a, 0x880 }, - { 0x4005a, 0x0 }, - { 0x4007a, 0x0 }, - { 0x900aa, 0x0 }, - { 0x900ab, 0x790 }, - { 0x900ac, 0x11a }, - { 0x900ad, 0x8 }, - { 0x900ae, 0x7aa }, - { 0x900af, 0x2a }, - { 0x900b0, 0x10 }, - { 0x900b1, 0x7b2 }, - { 0x900b2, 0x2a }, - { 0x900b3, 0x0 }, - { 0x900b4, 0x7c8 }, - { 0x900b5, 0x109 }, - { 0x900b6, 0x10 }, - { 0x900b7, 0x10 }, - { 0x900b8, 0x109 }, - { 0x900b9, 0x10 }, - { 0x900ba, 0x2a8 }, - { 0x900bb, 0x129 }, - { 0x900bc, 0x8 }, - { 0x900bd, 0x370 }, - { 0x900be, 0x129 }, - { 0x900bf, 0xa }, - { 0x900c0, 0x3c8 }, - { 0x900c1, 0x1a9 }, - { 0x900c2, 0xc }, - { 0x900c3, 0x408 }, - { 0x900c4, 0x199 }, - { 0x900c5, 0x14 }, - { 0x900c6, 0x790 }, - { 0x900c7, 0x11a }, - { 0x900c8, 0x8 }, - { 0x900c9, 0x4 }, - { 0x900ca, 0x18 }, - { 0x900cb, 0xe }, - { 0x900cc, 0x408 }, - { 0x900cd, 0x199 }, - { 0x900ce, 0x8 }, - { 0x900cf, 0x8568 }, - { 0x900d0, 0x108 }, - { 0x900d1, 0x18 }, - { 0x900d2, 0x790 }, - { 0x900d3, 0x16a }, - { 0x900d4, 0x8 }, - { 0x900d5, 0x1d8 }, - { 0x900d6, 0x169 }, - { 0x900d7, 0x10 }, - { 0x900d8, 0x8558 }, - { 0x900d9, 0x168 }, - { 0x900da, 0x1ff8 }, - { 0x900db, 0x85a8 }, - { 0x900dc, 0x1e8 }, - { 0x900dd, 0x50 }, - { 0x900de, 0x798 }, - { 0x900df, 0x16a }, - { 0x900e0, 0x60 }, - { 0x900e1, 0x7a0 }, - { 0x900e2, 0x16a }, - { 0x900e3, 0x8 }, - { 0x900e4, 0x8310 }, - { 0x900e5, 0x168 }, - { 0x900e6, 0x8 }, - { 0x900e7, 0xa310 }, - { 0x900e8, 0x168 }, - { 0x900e9, 0xa }, - { 0x900ea, 0x408 }, - { 0x900eb, 0x169 }, - { 0x900ec, 0x6e }, - { 0x900ed, 0x0 }, - { 0x900ee, 0x68 }, - { 0x900ef, 0x0 }, - { 0x900f0, 0x408 }, - { 0x900f1, 0x169 }, - { 0x900f2, 0x0 }, - { 0x900f3, 0x8310 }, - { 0x900f4, 0x168 }, - { 0x900f5, 0x0 }, - { 0x900f6, 0xa310 }, - { 0x900f7, 0x168 }, - { 0x900f8, 0x1ff8 }, - { 0x900f9, 0x85a8 }, - { 0x900fa, 0x1e8 }, - { 0x900fb, 0x68 }, - { 0x900fc, 0x798 }, - { 0x900fd, 0x16a }, - { 0x900fe, 0x78 }, - { 0x900ff, 0x7a0 }, - { 0x90100, 0x16a }, - { 0x90101, 0x68 }, - { 0x90102, 0x790 }, - { 0x90103, 0x16a }, - { 0x90104, 0x8 }, - { 0x90105, 0x8b10 }, - { 0x90106, 0x168 }, - { 0x90107, 0x8 }, - { 0x90108, 0xab10 }, - { 0x90109, 0x168 }, - { 0x9010a, 0xa }, - { 0x9010b, 0x408 }, - { 0x9010c, 0x169 }, - { 0x9010d, 0x58 }, - { 0x9010e, 0x0 }, - { 0x9010f, 0x68 }, - { 0x90110, 0x0 }, - { 0x90111, 0x408 }, - { 0x90112, 0x169 }, - { 0x90113, 0x0 }, - { 0x90114, 0x8b10 }, - { 0x90115, 0x168 }, - { 0x90116, 0x1 }, - { 0x90117, 0xab10 }, - { 0x90118, 0x168 }, - { 0x90119, 0x0 }, - { 0x9011a, 0x1d8 }, - { 0x9011b, 0x169 }, - { 0x9011c, 0x80 }, - { 0x9011d, 0x790 }, - { 0x9011e, 0x16a }, - { 0x9011f, 0x18 }, - { 0x90120, 0x7aa }, - { 0x90121, 0x6a }, - { 0x90122, 0xa }, - { 0x90123, 0x0 }, - { 0x90124, 0x1e9 }, - { 0x90125, 0x8 }, - { 0x90126, 0x8080 }, - { 0x90127, 0x108 }, - { 0x90128, 0xf }, - { 0x90129, 0x408 }, - { 0x9012a, 0x169 }, - { 0x9012b, 0xc }, - { 0x9012c, 0x0 }, - { 0x9012d, 0x68 }, - { 0x9012e, 0x9 }, - { 0x9012f, 0x0 }, - { 0x90130, 0x1a9 }, - { 0x90131, 0x0 }, - { 0x90132, 0x408 }, - { 0x90133, 0x169 }, - { 0x90134, 0x0 }, - { 0x90135, 0x8080 }, - { 0x90136, 0x108 }, - { 0x90137, 0x8 }, - { 0x90138, 0x7aa }, - { 0x90139, 0x6a }, - { 0x9013a, 0x0 }, - { 0x9013b, 0x8568 }, - { 0x9013c, 0x108 }, - { 0x9013d, 0xb7 }, - { 0x9013e, 0x790 }, - { 0x9013f, 0x16a }, - { 0x90140, 0x1f }, - { 0x90141, 0x0 }, - { 0x90142, 0x68 }, - { 0x90143, 0x8 }, - { 0x90144, 0x8558 }, - { 0x90145, 0x168 }, - { 0x90146, 0xf }, - { 0x90147, 0x408 }, - { 0x90148, 0x169 }, - { 0x90149, 0xd }, - { 0x9014a, 0x0 }, - { 0x9014b, 0x68 }, - { 0x9014c, 0x0 }, - { 0x9014d, 0x408 }, - { 0x9014e, 0x169 }, - { 0x9014f, 0x0 }, - { 0x90150, 0x8558 }, - { 0x90151, 0x168 }, - { 0x90152, 0x8 }, - { 0x90153, 0x3c8 }, - { 0x90154, 0x1a9 }, - { 0x90155, 0x3 }, - { 0x90156, 0x370 }, - { 0x90157, 0x129 }, - { 0x90158, 0x20 }, - { 0x90159, 0x2aa }, - { 0x9015a, 0x9 }, - { 0x9015b, 0x8 }, - { 0x9015c, 0xe8 }, - { 0x9015d, 0x109 }, - { 0x9015e, 0x0 }, - { 0x9015f, 0x8140 }, - { 0x90160, 0x10c }, - { 0x90161, 0x10 }, - { 0x90162, 0x8138 }, - { 0x90163, 0x104 }, - { 0x90164, 0x8 }, - { 0x90165, 0x448 }, - { 0x90166, 0x109 }, - { 0x90167, 0xf }, - { 0x90168, 0x7c0 }, - { 0x90169, 0x109 }, - { 0x9016a, 0x0 }, - { 0x9016b, 0xe8 }, - { 0x9016c, 0x109 }, - { 0x9016d, 0x47 }, - { 0x9016e, 0x630 }, - { 0x9016f, 0x109 }, - { 0x90170, 0x8 }, - { 0x90171, 0x618 }, - { 0x90172, 0x109 }, - { 0x90173, 0x8 }, - { 0x90174, 0xe0 }, - { 0x90175, 0x109 }, - { 0x90176, 0x0 }, - { 0x90177, 0x7c8 }, - { 0x90178, 0x109 }, - { 0x90179, 0x8 }, - { 0x9017a, 0x8140 }, - { 0x9017b, 0x10c }, - { 0x9017c, 0x0 }, - { 0x9017d, 0x478 }, - { 0x9017e, 0x109 }, - { 0x9017f, 0x0 }, - { 0x90180, 0x1 }, - { 0x90181, 0x8 }, - { 0x90182, 0x8 }, - { 0x90183, 0x4 }, - { 0x90184, 0x0 }, - { 0x90006, 0x8 }, - { 0x90007, 0x7c8 }, - { 0x90008, 0x109 }, - { 0x90009, 0x0 }, - { 0x9000a, 0x400 }, - { 0x9000b, 0x106 }, - { 0xd00e7, 0x400 }, - { 0x90017, 0x0 }, - { 0x9001f, 0x2b }, - { 0x90026, 0x69 }, - { 0x400d0, 0x0 }, - { 0x400d1, 0x101 }, - { 0x400d2, 0x105 }, - { 0x400d3, 0x107 }, - { 0x400d4, 0x10f }, - { 0x400d5, 0x202 }, - { 0x400d6, 0x20a }, - { 0x400d7, 0x20b }, - { 0x2003a, 0x2 }, - { 0x200be, 0x0 }, - { 0x2000b, 0x20c }, - { 0x2000c, 0x74 }, - { 0x2000d, 0x48e }, - { 0x2000e, 0x2c }, - { 0x9000c, 0x0 }, - { 0x9000d, 0x173 }, - { 0x9000e, 0x60 }, - { 0x9000f, 0x6110 }, - { 0x90010, 0x2152 }, - { 0x90011, 0xdfbd }, - { 0x90012, 0x2060 }, - { 0x90013, 0x6152 }, - { 0x20010, 0x5a }, - { 0x20011, 0x3 }, - { 0x40080, 0xe0 }, - { 0x40081, 0x12 }, - { 0x40082, 0xe0 }, - { 0x40083, 0x12 }, - { 0x40084, 0xe0 }, - { 0x40085, 0x12 }, - { 0x400fd, 0xf }, - { 0x400f1, 0xe }, - { 0x10011, 0x1 }, - { 0x10012, 0x1 }, - { 0x10013, 0x180 }, - { 0x10018, 0x1 }, - { 0x10002, 0x6209 }, - { 0x100b2, 0x1 }, - { 0x101b4, 0x1 }, - { 0x102b4, 0x1 }, - { 0x103b4, 0x1 }, - { 0x104b4, 0x1 }, - { 0x105b4, 0x1 }, - { 0x106b4, 0x1 }, - { 0x107b4, 0x1 }, - { 0x108b4, 0x1 }, - { 0x11011, 0x1 }, - { 0x11012, 0x1 }, - { 0x11013, 0x180 }, - { 0x11018, 0x1 }, - { 0x11002, 0x6209 }, - { 0x110b2, 0x1 }, - { 0x111b4, 0x1 }, - { 0x112b4, 0x1 }, - { 0x113b4, 0x1 }, - { 0x114b4, 0x1 }, - { 0x115b4, 0x1 }, - { 0x116b4, 0x1 }, - { 0x117b4, 0x1 }, - { 0x118b4, 0x1 }, - { 0x20089, 0x1 }, - { 0x20088, 0x19 }, - { 0xc0080, 0x0 }, - { 0xd0000, 0x1 } -}; - -struct dram_fsp_msg ddr_dram_fsp_msg[] = { - { - /* P0 1866mts 1D */ - .drate = 1866, - .fw_type = FW_1D_IMAGE, - .fsp_cfg = ddr_fsp0_cfg, - .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), - }, - { - /* P0 1866mts 2D */ - .drate = 1866, - .fw_type = FW_2D_IMAGE, - .fsp_cfg = ddr_fsp0_2d_cfg, - .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), - }, -}; - -/* ddr timing config params */ -struct dram_timing_info dram_timing = { - .ddrc_cfg = ddr_ddrc_cfg, - .ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg), - .ddrphy_cfg = ddr_ddrphy_cfg, - .ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg), - .fsp_msg = ddr_dram_fsp_msg, - .fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg), - .ddrphy_trained_csr = ddr_ddrphy_trained_csr, - .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), - .ddrphy_pie = ddr_phy_pie, - .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), - .fsp_table = { 1866, }, -}; diff --git a/board/freescale/imx93_evk/spl.c b/board/freescale/imx93_evk/spl.c index e5807134bb2..a214c04ddad 100644 --- a/board/freescale/imx93_evk/spl.c +++ b/board/freescale/imx93_evk/spl.c @@ -52,9 +52,16 @@ void spl_board_init(void) puts("Normal Boot\n"); } +extern struct dram_timing_info dram_timing_1866mts; void spl_dram_init(void) { - ddr_init(&dram_timing); + struct dram_timing_info *ptiming = &dram_timing; + + if (is_voltage_mode(VOLT_LOW_DRIVE)) + ptiming = &dram_timing_1866mts; + + printf("DDR: %uMTS\n", ptiming->fsp_msg[0].drate); + ddr_init(ptiming); } #if CONFIG_IS_ENABLED(DM_PMIC_PCA9450) @@ -62,6 +69,7 @@ int power_init_board(void) { struct udevice *dev; int ret; + unsigned int val = 0, buck_val; ret = pmic_get("pmic@25", &dev); if (ret == -ENODEV) { @@ -77,20 +85,41 @@ int power_init_board(void) /* enable DVS control through PMIC_STBY_REQ */ pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59); - if (IS_ENABLED(CONFIG_IMX9_LOW_DRIVE_MODE)) { - /* 0.75v for Low drive mode - */ - pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x0c); - pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x0c); + ret = pmic_reg_read(dev, PCA9450_PWR_CTRL); + if (ret < 0) + return ret; + + val = ret; + + if (is_voltage_mode(VOLT_LOW_DRIVE)) { + buck_val = 0x0c; /* 0.8v for Low drive mode */ + printf("PMIC: Low Drive Voltage Mode\n"); + } else if (is_voltage_mode(VOLT_NOMINAL_DRIVE)) { + buck_val = 0x10; /* 0.85v for Nominal drive mode */ + printf("PMIC: Nominal Voltage Mode\n"); } else { - /* 0.9v for Over drive mode - */ - pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x18); - pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x18); + buck_val = 0x14; /* 0.9v for Over drive mode */ + printf("PMIC: Over Drive Voltage Mode\n"); + } + + if (val & PCA9450_REG_PWRCTRL_TOFF_DEB) { + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, buck_val); + pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, buck_val); + } else { + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, buck_val + 0x4); + pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, buck_val + 0x4); + } + + if (IS_ENABLED(CONFIG_IMX93_EVK_LPDDR4X)) { + /* Set VDDQ to 1.1V from buck2 */ + pmic_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x28); } /* set standby voltage to 0.65v */ - pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x4); + if (val & PCA9450_REG_PWRCTRL_TOFF_DEB) + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x0); + else + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x4); /* I2C_LT_EN*/ pmic_reg_write(dev, 0xa, 0x3); @@ -123,9 +152,11 @@ void board_init_f(ulong dummy) debug("LC: 0x%x\n", gd->arch.lifecycle); } + clock_init_late(); + power_init_board(); - if (!IS_ENABLED(CONFIG_IMX9_LOW_DRIVE_MODE)) + if (!is_voltage_mode(VOLT_LOW_DRIVE)) set_arm_clk(get_cpu_speed_grade_hz()); /* Init power of mix */ diff --git a/board/phytec/phycore_imx93/spl.c b/board/phytec/phycore_imx93/spl.c index 5efa38a1442..17a8736c73f 100644 --- a/board/phytec/phycore_imx93/spl.c +++ b/board/phytec/phycore_imx93/spl.c @@ -130,7 +130,7 @@ void board_init_f(ulong dummy) debug("LC: 0x%x\n", gd->arch.lifecycle); } - clock_init(); + clock_init_late(); power_init_board(); diff --git a/cmd/mem.c b/cmd/mem.c index 274348068c2..4d6fde28531 100644 --- a/cmd/mem.c +++ b/cmd/mem.c @@ -245,7 +245,7 @@ static int do_mem_cmp(struct cmd_tbl *cmdtp, int flag, int argc, int size; int rcode = 0; const char *type; - const void *buf1, *buf2, *base; + const void *buf1, *buf2, *base, *ptr1, *ptr2; ulong word1, word2; /* 64-bit if MEM_SUPPORT_64BIT_DATA */ if (argc != 4) @@ -270,22 +270,22 @@ static int do_mem_cmp(struct cmd_tbl *cmdtp, int flag, int argc, bytes = size * count; base = buf1 = map_sysmem(addr1, bytes); buf2 = map_sysmem(addr2, bytes); - for (ngood = 0; ngood < count; ++ngood) { + for (ngood = 0, ptr1 = buf1, ptr2 = buf2; ngood < count; ++ngood) { if (size == 4) { - word1 = *(u32 *)buf1; - word2 = *(u32 *)buf2; + word1 = *(u32 *)ptr1; + word2 = *(u32 *)ptr2; } else if (MEM_SUPPORT_64BIT_DATA && size == 8) { - word1 = *(ulong *)buf1; - word2 = *(ulong *)buf2; + word1 = *(ulong *)ptr1; + word2 = *(ulong *)ptr2; } else if (size == 2) { - word1 = *(u16 *)buf1; - word2 = *(u16 *)buf2; + word1 = *(u16 *)ptr1; + word2 = *(u16 *)ptr2; } else { - word1 = *(u8 *)buf1; - word2 = *(u8 *)buf2; + word1 = *(u8 *)ptr1; + word2 = *(u8 *)ptr2; } if (word1 != word2) { - ulong offset = buf1 - base; + ulong offset = ptr1 - base; printf("%s at 0x%08lx (%#0*lx) != %s at 0x%08lx (%#0*lx)\n", type, (ulong)(addr1 + offset), size, word1, type, (ulong)(addr2 + offset), size, word2); @@ -293,8 +293,8 @@ static int do_mem_cmp(struct cmd_tbl *cmdtp, int flag, int argc, break; } - buf1 += size; - buf2 += size; + ptr1 += size; + ptr2 += size; /* reset watchdog from time to time */ if ((ngood % (64 << 10)) == 0) diff --git a/cmd/mmc.c b/cmd/mmc.c index c0c23ee24b6..fe7899ec793 100644 --- a/cmd/mmc.c +++ b/cmd/mmc.c @@ -8,6 +8,7 @@ #include <command.h> #include <console.h> #include <display_options.h> +#include <mapmem.h> #include <memalign.h> #include <mmc.h> #include <part.h> @@ -350,12 +351,12 @@ static int do_mmc_read(struct cmd_tbl *cmdtp, int flag, { struct mmc *mmc; u32 blk, cnt, n; - void *addr; + void *ptr; if (argc != 4) return CMD_RET_USAGE; - addr = (void *)hextoul(argv[1], NULL); + ptr = map_sysmem(hextoul(argv[1], NULL), 0); blk = hextoul(argv[2], NULL); cnt = hextoul(argv[3], NULL); @@ -366,8 +367,9 @@ static int do_mmc_read(struct cmd_tbl *cmdtp, int flag, printf("MMC read: dev # %d, block # %d, count %d ... ", curr_device, blk, cnt); - n = blk_dread(mmc_get_blk_desc(mmc), blk, cnt, addr); + n = blk_dread(mmc_get_blk_desc(mmc), blk, cnt, ptr); printf("%d blocks read: %s\n", n, (n == cnt) ? "OK" : "ERROR"); + unmap_sysmem(ptr); return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE; } @@ -443,12 +445,12 @@ static int do_mmc_write(struct cmd_tbl *cmdtp, int flag, { struct mmc *mmc; u32 blk, cnt, n; - void *addr; + void *ptr; if (argc != 4) return CMD_RET_USAGE; - addr = (void *)hextoul(argv[1], NULL); + ptr = map_sysmem(hextoul(argv[1], NULL), 0); blk = hextoul(argv[2], NULL); cnt = hextoul(argv[3], NULL); @@ -463,8 +465,9 @@ static int do_mmc_write(struct cmd_tbl *cmdtp, int flag, printf("Error: card is write protected!\n"); return CMD_RET_FAILURE; } - n = blk_dwrite(mmc_get_blk_desc(mmc), blk, cnt, addr); + n = blk_dwrite(mmc_get_blk_desc(mmc), blk, cnt, ptr); printf("%d blocks written: %s\n", n, (n == cnt) ? "OK" : "ERROR"); + unmap_sysmem(ptr); return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE; } diff --git a/cmd/read.c b/cmd/read.c index af54bd17654..8e21f004423 100644 --- a/cmd/read.c +++ b/cmd/read.c @@ -20,7 +20,7 @@ do_rw(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) struct disk_partition part_info; ulong offset, limit; uint blk, cnt, res; - void *addr; + void *ptr; int part; if (argc != 6) { @@ -33,7 +33,7 @@ do_rw(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) if (part < 0) return 1; - addr = map_sysmem(hextoul(argv[3], NULL), 0); + ptr = map_sysmem(hextoul(argv[3], NULL), 0); blk = hextoul(argv[4], NULL); cnt = hextoul(argv[5], NULL); @@ -48,13 +48,15 @@ do_rw(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) if (cnt + blk > limit) { printf("%s out of range\n", cmdtp->name); + unmap_sysmem(ptr); return 1; } if (IS_ENABLED(CONFIG_CMD_WRITE) && !strcmp(cmdtp->name, "write")) - res = blk_dwrite(dev_desc, offset + blk, cnt, addr); + res = blk_dwrite(dev_desc, offset + blk, cnt, ptr); else - res = blk_dread(dev_desc, offset + blk, cnt, addr); + res = blk_dread(dev_desc, offset + blk, cnt, ptr); + unmap_sysmem(ptr); if (res != cnt) { printf("%s error\n", cmdtp->name); @@ -10,6 +10,7 @@ #include <div64.h> #include <dm.h> #include <log.h> +#include <lmb.h> #include <malloc.h> #include <mapmem.h> #include <spi.h> @@ -317,6 +318,13 @@ static int do_spi_flash_read_write(int argc, char *const argv[]) strncmp(argv[0], "write", 5) == 0) { int read; + if (CONFIG_IS_ENABLED(LMB)) { + if (lmb_read_check(addr, len)) { + printf("ERROR: trying to overwrite reserved memory...\n"); + return CMD_RET_FAILURE; + } + } + read = strncmp(argv[0], "read", 4) == 0; if (read) ret = spi_flash_read(flash, offset, len, buf); diff --git a/cmd/usb.c b/cmd/usb.c index 16c081bf128..13a2996c1f0 100644 --- a/cmd/usb.c +++ b/cmd/usb.c @@ -560,17 +560,6 @@ static int do_usbboot(struct cmd_tbl *cmdtp, int flag, int argc, } #endif /* CONFIG_USB_STORAGE */ -static int do_usb_stop_keyboard(int force) -{ -#if !defined CONFIG_DM_USB && defined CONFIG_USB_KEYBOARD - if (usb_kbd_deregister(force) != 0) { - printf("USB not stopped: usbkbd still using USB\n"); - return 1; - } -#endif - return 0; -} - static void do_usb_start(void) { bootstage_mark_name(BOOTSTAGE_ID_USB_START, "usb_start"); @@ -583,11 +572,6 @@ static void do_usb_start(void) /* try to recognize storage devices immediately */ usb_stor_curr_dev = usb_stor_scan(1); # endif -#ifndef CONFIG_DM_USB -# ifdef CONFIG_USB_KEYBOARD - drv_usb_kbd_init(); -# endif -#endif /* !CONFIG_DM_USB */ } #ifdef CONFIG_DM_USB @@ -633,8 +617,6 @@ static int do_usb(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) if (strncmp(argv[1], "reset", 5) == 0) { printf("resetting USB...\n"); - if (do_usb_stop_keyboard(1) != 0) - return 1; usb_stop(); do_usb_start(); return 0; @@ -642,8 +624,6 @@ static int do_usb(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) if (strncmp(argv[1], "stop", 4) == 0) { if (argc != 2) console_assign(stdin, "serial"); - if (do_usb_stop_keyboard(0) != 0) - return 1; printf("stopping USB..\n"); usb_stop(); return 0; diff --git a/common/console.c b/common/console.c index 52d6df8150f..c9e206aec41 100644 --- a/common/console.c +++ b/common/console.c @@ -4,6 +4,8 @@ * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it */ +#define LOG_CATEGORY LOGC_CONSOLE + #include <console.h> #include <debug_uart.h> #include <display_options.h> @@ -1242,3 +1244,37 @@ int console_init_r(void) } #endif /* CONFIG_IS_ENABLED(SYS_CONSOLE_IS_IN_ENV) */ + +int console_remove_by_name(const char *name) +{ + int err = 0; + +#if CONFIG_IS_ENABLED(CONSOLE_MUX) + int fnum; + + log_debug("removing console device %s\n", name); + for (fnum = 0; fnum < MAX_FILES; fnum++) { + struct stdio_dev **src, **dest; + int i; + + log_debug("file %d: %d devices: ", fnum, cd_count[fnum]); + src = console_devices[fnum]; + dest = src; + for (i = 0; i < cd_count[fnum]; i++, src++) { + struct stdio_dev *sdev = *src; + int ret = 0; + + if (!strcmp(sdev->name, name)) + ret = stdio_deregister_dev(sdev, true); + else + *dest++ = *src; + if (ret && !err) + err = ret; + } + cd_count[fnum] = dest - console_devices[fnum]; + log_debug("now %d\n", cd_count[fnum]); + } +#endif /* CONSOLE_MUX */ + + return err; +} diff --git a/common/log.c b/common/log.c index dfee250b158..b83a6618900 100644 --- a/common/log.c +++ b/common/log.c @@ -31,6 +31,7 @@ static const char *const log_cat_name[] = { "event", "fs", "expo", + "console", }; _Static_assert(ARRAY_SIZE(log_cat_name) == LOGC_COUNT - LOGC_NONE, diff --git a/common/usb_kbd.c b/common/usb_kbd.c index f3b4a3c94e6..bbfee23bc26 100644 --- a/common/usb_kbd.c +++ b/common/usb_kbd.c @@ -137,6 +137,11 @@ extern int __maybe_unused net_busy_flag; /* The period of time between two calls of usb_kbd_testc(). */ static unsigned long kbd_testc_tms; +int usb_kbd_remove_for_test(void) +{ + return console_remove_by_name(DEVNAME); +} + /* Puts character in the queue and sets up the in and out pointer. */ static void usb_kbd_put_queue(struct usb_kbd_pdata *data, u8 c) { @@ -612,7 +617,7 @@ static int probe_usb_keyboard(struct usb_device *dev) debug("USB KBD: register.\n"); memset(&usb_kbd_dev, 0, sizeof(struct stdio_dev)); strcpy(usb_kbd_dev.name, DEVNAME); - usb_kbd_dev.flags = DEV_FLAGS_INPUT; + usb_kbd_dev.flags = DEV_FLAGS_INPUT | DEV_FLAGS_DM; usb_kbd_dev.getc = usb_kbd_getc; usb_kbd_dev.tstc = usb_kbd_testc; usb_kbd_dev.priv = (void *)dev; @@ -643,71 +648,6 @@ static int probe_usb_keyboard(struct usb_device *dev) return 0; } -#if !CONFIG_IS_ENABLED(DM_USB) -/* Search for keyboard and register it if found. */ -int drv_usb_kbd_init(void) -{ - int error, i; - - debug("%s: Probing for keyboard\n", __func__); - /* Scan all USB Devices */ - for (i = 0; i < USB_MAX_DEVICE; i++) { - struct usb_device *dev; - - /* Get USB device. */ - dev = usb_get_dev_index(i); - if (!dev) - break; - - if (dev->devnum == -1) - continue; - - error = probe_usb_keyboard(dev); - if (!error) - return 1; - if (error && error != -ENOENT) - return error; - } - - /* No USB Keyboard found */ - return -1; -} - -/* Deregister the keyboard. */ -int usb_kbd_deregister(int force) -{ -#if CONFIG_IS_ENABLED(SYS_STDIO_DEREGISTER) - struct stdio_dev *dev; - struct usb_device *usb_kbd_dev; - struct usb_kbd_pdata *data; - - dev = stdio_get_by_name(DEVNAME); - if (dev) { - usb_kbd_dev = (struct usb_device *)dev->priv; - data = usb_kbd_dev->privptr; -#if CONFIG_IS_ENABLED(CONSOLE_MUX) - if (iomux_replace_device(stdin, DEVNAME, force ? "nulldev" : "")) - return 1; -#endif - if (stdio_deregister_dev(dev, force) != 0) - return 1; -#ifdef CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE - destroy_int_queue(usb_kbd_dev, data->intq); -#endif - free(data->new); - free(data); - } - - return 0; -#else - return 1; -#endif -} - -#endif - -#if CONFIG_IS_ENABLED(DM_USB) - static int usb_kbd_probe(struct udevice *dev) { struct usb_device *udev = dev_get_parent_priv(dev); @@ -788,5 +728,3 @@ static const struct usb_device_id kbd_id_table[] = { }; U_BOOT_USB_DEVICE(usb_kbd, kbd_id_table); - -#endif diff --git a/configs/imx93_11x11_evk_ld_defconfig b/configs/imx93_11x11_evk_ld_defconfig deleted file mode 100644 index fd33fd54762..00000000000 --- a/configs/imx93_11x11_evk_ld_defconfig +++ /dev/null @@ -1,127 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_IMX9=y -CONFIG_TEXT_BASE=0x80200000 -CONFIG_SYS_MALLOC_LEN=0x2000000 -CONFIG_SYS_MALLOC_F_LEN=0x18000 -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_ENV_SIZE=0x4000 -CONFIG_ENV_OFFSET=0x400000 -CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx9/imximage.cfg" -CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="freescale/imx93-11x11-evk" -CONFIG_SPL_TEXT_BASE=0x2049A000 -CONFIG_IMX9_LOW_DRIVE_MODE=y -CONFIG_TARGET_IMX93_11X11_EVK=y -CONFIG_SYS_MONITOR_LEN=524288 -CONFIG_SPL_SERIAL=y -CONFIG_SPL_DRIVERS_MISC=y -CONFIG_SPL_STACK=0x20519dd0 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x2051a000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 -CONFIG_SPL=y -CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x88000000 -CONFIG_SYS_LOAD_ADDR=0x80400000 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x90000000 -CONFIG_REMAKE_ELF=y -CONFIG_DISTRO_DEFAULTS=y -CONFIG_DEFAULT_FDT_FILE="imx93-11x11-evk.dtb" -CONFIG_SYS_CBSIZE=2048 -CONFIG_SYS_PBSIZE=2074 -CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_BOARD_LATE_INIT=y -CONFIG_SPL_MAX_SIZE=0x26000 -CONFIG_SPL_BOARD_INIT=y -CONFIG_SPL_BOOTROM_SUPPORT=y -CONFIG_SPL_LOAD_IMX_CONTAINER=y -CONFIG_IMX_CONTAINER_CFG="arch/arm/mach-imx/imx9/container.cfg" -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_SYS_MALLOC=y -CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y -CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x83200000 -CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 -CONFIG_SPL_SYS_MMCSD_RAW_MODE=y -CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y -CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1040 -CONFIG_SPL_I2C=y -CONFIG_SPL_POWER=y -CONFIG_SPL_WATCHDOG=y -CONFIG_SYS_PROMPT="u-boot=> " -CONFIG_CMD_ERASEENV=y -# CONFIG_CMD_CRC32 is not set -CONFIG_CMD_MEMTEST=y -CONFIG_CMD_CLK=y -CONFIG_CMD_DFU=y -CONFIG_CMD_FUSE=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_GPT=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_POWEROFF=y -CONFIG_CMD_SNTP=y -CONFIG_CMD_CACHE=y -CONFIG_CMD_RTC=y -CONFIG_CMD_TIME=y -CONFIG_CMD_GETTIME=y -CONFIG_CMD_TIMER=y -CONFIG_CMD_REGULATOR=y -CONFIG_CMD_HASH=y -CONFIG_CMD_EXT4_WRITE=y -CONFIG_OF_CONTROL=y -CONFIG_SPL_OF_CONTROL=y -CONFIG_ENV_OVERWRITE=y -CONFIG_ENV_IS_NOWHERE=y -CONFIG_ENV_IS_IN_MMC=y -CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_SYS_MMC_ENV_DEV=1 -CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_USE_ETHPRIME=y -CONFIG_ETHPRIME="eth0" -CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_SPL_DM=y -CONFIG_REGMAP=y -CONFIG_SYSCON=y -CONFIG_CPU=y -CONFIG_CPU_IMX=y -CONFIG_IMX_RGPIO2P=y -CONFIG_DM_PCA953X=y -CONFIG_DM_I2C=y -CONFIG_SYS_I2C_IMX_LPI2C=y -CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_MMC_IO_VOLTAGE=y -CONFIG_MMC_UHS_SUPPORT=y -CONFIG_MMC_HS400_ES_SUPPORT=y -CONFIG_MMC_HS400_SUPPORT=y -CONFIG_FSL_USDHC=y -CONFIG_PHY_ANEG_TIMEOUT=20000 -CONFIG_PHY_REALTEK=y -CONFIG_DM_ETH_PHY=y -CONFIG_PHY_GIGE=y -CONFIG_DWC_ETH_QOS=y -CONFIG_DWC_ETH_QOS_IMX=y -CONFIG_FEC_MXC=y -CONFIG_MII=y -CONFIG_PINCTRL=y -CONFIG_SPL_PINCTRL=y -CONFIG_PINCTRL_IMX93=y -CONFIG_DM_PMIC=y -CONFIG_SPL_DM_PMIC_PCA9450=y -CONFIG_DM_REGULATOR=y -CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_REGULATOR_GPIO=y -CONFIG_DM_RTC=y -CONFIG_RTC_EMULATION=y -CONFIG_DM_SERIAL=y -CONFIG_FSL_LPUART=y -CONFIG_SYSRESET=y -CONFIG_SYSRESET_CMD_POWEROFF=y -CONFIG_SYSRESET_PSCI=y -CONFIG_DM_THERMAL=y -CONFIG_IMX_TMU=y -CONFIG_ULP_WATCHDOG=y -CONFIG_WDT=y -CONFIG_LZO=y -CONFIG_BZIP2=y diff --git a/configs/lxr2_defconfig b/configs/lxr2_defconfig new file mode 100644 index 00000000000..855366d4215 --- /dev/null +++ b/configs/lxr2_defconfig @@ -0,0 +1,118 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_TEXT_BASE=0x17800000 +CONFIG_SYS_MALLOC_LEN=0xa00000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_SPL_GPIO=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_SF_DEFAULT_SPEED=20000000 +CONFIG_ENV_SIZE=0x4000 +CONFIG_ENV_OFFSET=0x100000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_MX6Q=y +CONFIG_TARGET_LXR2=y +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-lxr" +CONFIG_SPL_TEXT_BASE=0x00908000 +CONFIG_SYS_MONITOR_LEN=409600 +CONFIG_SPL_MMC=y +CONFIG_SPL_SERIAL=y +CONFIG_SYS_BOOTCOUNT_ADDR=0x020CC068 +CONFIG_SPL=y +CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y +CONFIG_ENV_OFFSET_REDUND=0x110000 +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y +CONFIG_LTO=y +CONFIG_HAS_BOARD_SIZE_LIMIT=y +CONFIG_BOARD_SIZE_LIMIT=715766 +CONFIG_FIT=y +CONFIG_SPL_FIT_PRINT=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_SPL_LEGACY_IMAGE_FORMAT=y +CONFIG_SPL_SYS_MALLOC=y +CONFIG_SPL_FIT_IMAGE_TINY=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x11400 +CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=32 +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_SPL=y +CONFIG_CMD_SPL_WRITE_SIZE=0x20000 +CONFIG_CMD_MD5SUM=y +CONFIG_MD5SUM_VERIFY=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_NAND_TRIMFFS=y +CONFIG_CMD_PART=y +CONFIG_CMD_WDT=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_BOOTCOUNT=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand" +CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:40m(Kernels),860m(root),-(nand)" +CONFIG_CMD_UBI=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_EFI_PARTITION=y +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_BOUNCE_BUFFER=y +CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_MAGIC=0xB0C4000 +CONFIG_SYS_BOOTCOUNT_BE=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MXC=y +CONFIG_FSL_USDHC=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_RAW_NAND=y +CONFIG_NAND_MXS=y +CONFIG_NAND_MXS_DT=y +CONFIG_SYS_NAND_ONFI_DETECTION=y +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y +CONFIG_SYS_NAND_U_BOOT_OFFS=0xe00000 +CONFIG_DM_SPI_FLASH=y +CONFIG_SF_DEFAULT_BUS=2 +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHYLIB=y +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y +CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_SERIAL=y +CONFIG_MXC_UART=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_MXC_SPI=y +CONFIG_SYSRESET=y +CONFIG_SYSRESET_WATCHDOG=y +CONFIG_SYSRESET_WATCHDOG_AUTO=y +CONFIG_IMX_THERMAL=y diff --git a/doc/arch/sandbox/sandbox.rst b/doc/arch/sandbox/sandbox.rst index 49675517246..a8b0d7f0395 100644 --- a/doc/arch/sandbox/sandbox.rst +++ b/doc/arch/sandbox/sandbox.rst @@ -655,15 +655,17 @@ Memory Map Sandbox has its own emulated memory starting at 0. Here are some of the things that are mapped into that memory: -======= ======================== =============================== -Addr Config Usage -======= ======================== =============================== - 100 CONFIG_SYS_FDT_LOAD_ADDR Device tree - b000 CONFIG_BLOBLIST_ADDR Blob list - 10000 CFG_MALLOC_F_ADDR Early memory allocation - f0000 CONFIG_PRE_CON_BUF_ADDR Pre-console buffer - 100000 TCG Event log TCG Event Log - 200000 CONFIG_TRACE_EARLY_ADDR Early trace buffer (if enabled). Also used - as the SPL load buffer in spl_test_load(). - 400000 CONFIG_TEXT_BASE Load buffer for U-Boot (sandbox_spl only) -======= ======================== =============================== +======== ======================== =============================== +Addr Config Usage +======== ======================== =============================== + 100 CONFIG_SYS_FDT_LOAD_ADDR Device tree + b000 CONFIG_BLOBLIST_ADDR Blob list + 10000 CFG_MALLOC_F_ADDR Early memory allocation + f0000 CONFIG_PRE_CON_BUF_ADDR Pre-console buffer + 100000 TCG Event log TCG Event Log + 200000 CONFIG_TRACE_EARLY_ADDR Early trace buffer (if enabled). Also used + 400000 CONFIG_TEXT_BASE Load buffer for U-Boot (sandbox_spl only) +10000000 PCI address space (see test.dts) + +ff000000 Memory-mapping tags start here +======== ======================== =============================== diff --git a/drivers/cpu/imx8_cpu.c b/drivers/cpu/imx8_cpu.c index 60deca963a6..6c0a8c0cbe4 100644 --- a/drivers/cpu/imx8_cpu.c +++ b/drivers/cpu/imx8_cpu.c @@ -60,6 +60,10 @@ static const char *get_imx_type_str(u32 imxtype) return "93(12)";/* iMX93 9x9 Dual core without NPU */ case MXC_CPU_IMX9311: return "93(11)";/* iMX93 9x9 Single core without NPU */ + case MXC_CPU_IMX9302: + return "93(02)";/* iMX93 900Mhz Low performance Dual core without NPU */ + case MXC_CPU_IMX9301: + return "93(01)";/* iMX93 900Mhz Low performance Single core without NPU */ default: return "??"; } diff --git a/drivers/ddr/imx/phy/ddrphy_utils.c b/drivers/ddr/imx/phy/ddrphy_utils.c index cf5bdad7abe..14278f5ad8f 100644 --- a/drivers/ddr/imx/phy/ddrphy_utils.c +++ b/drivers/ddr/imx/phy/ddrphy_utils.c @@ -148,6 +148,10 @@ void ddrphy_init_set_dfi_clk(unsigned int drate) dram_pll_init(MHZ(266)); dram_disable_bypass(); break; + case 933: + dram_pll_init(MHZ(233)); + dram_disable_bypass(); + break; case 667: dram_pll_init(MHZ(167)); dram_disable_bypass(); diff --git a/drivers/mtd/nvmxip/nvmxip-uclass.c b/drivers/mtd/nvmxip/nvmxip-uclass.c index 254f04e0b99..d18bd0e3d6b 100644 --- a/drivers/mtd/nvmxip/nvmxip-uclass.c +++ b/drivers/mtd/nvmxip/nvmxip-uclass.c @@ -47,19 +47,13 @@ int nvmxip_probe(struct udevice *udev) return ret; } - log_info("[%s]: the block device %s ready for use\n", udev->name, bdev_name); + log_debug("[%s]: the block device %s ready for use\n", udev->name, + bdev_name); return 0; } -static int nvmxip_post_bind(struct udevice *udev) -{ - dev_or_flags(udev, DM_FLAG_PROBE_AFTER_BIND); - return 0; -} - UCLASS_DRIVER(nvmxip) = { .name = "nvmxip", .id = UCLASS_NVMXIP, - .post_bind = nvmxip_post_bind, }; diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index aea611fef52..8f7a77e7169 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -44,6 +44,12 @@ #define DEFAULT_READY_WAIT_JIFFIES (40UL * HZ) +/* + * For full-chip erase, calibrated to a 2MB flash (M25P16); should be scaled up + * for larger flash + */ +#define CHIP_ERASE_2MB_READY_WAIT_JIFFIES (40UL * HZ) + #define ROUND_UP_TO(x, y) (((x) + (y) - 1) / (y) * (y)) struct sfdp_parameter_header { @@ -855,6 +861,20 @@ static int spi_nor_wait_till_ready(struct spi_nor *nor) DEFAULT_READY_WAIT_JIFFIES); } +static int spi_nor_erase_chip_wait_till_ready(struct spi_nor *nor, unsigned long size) +{ + /* + * Scale the timeout linearly with the size of the flash, with + * a minimum calibrated to an old 2MB flash. We could try to + * pull these from CFI/SFDP, but these values should be good + * enough for now. + */ + unsigned long timeout = max(CHIP_ERASE_2MB_READY_WAIT_JIFFIES, + CHIP_ERASE_2MB_READY_WAIT_JIFFIES * + (unsigned long)(size / SZ_2M)); + return spi_nor_wait_till_ready_with_timeout(nor, timeout); +} + #ifdef CONFIG_SPI_FLASH_BAR /* * This "clean_bar" is necessary in a situation when one was accessing @@ -989,7 +1009,7 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr) { struct spi_nor *nor = mtd_to_spi_nor(mtd); bool addr_known = false; - u32 addr, len, rem; + u32 addr, len, rem, max_size; int ret, err; dev_dbg(nor->dev, "at 0x%llx, len %lld\n", (long long)instr->addr, @@ -1003,6 +1023,7 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr) addr = instr->addr; len = instr->len; + max_size = instr->len; instr->state = MTD_ERASING; addr_known = true; @@ -1035,7 +1056,13 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr) addr += ret; len -= ret; - ret = spi_nor_wait_till_ready(nor); + if (max_size == mtd->size && + !(nor->flags & SNOR_F_NO_OP_CHIP_ERASE)) { + ret = spi_nor_erase_chip_wait_till_ready(nor, mtd->size); + } else { + ret = spi_nor_wait_till_ready(nor); + } + if (ret) goto erase_err; } diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig index a972d87c7ad..311aaa7e67f 100644 --- a/drivers/usb/Kconfig +++ b/drivers/usb/Kconfig @@ -99,7 +99,8 @@ config USB_STORAGE config USB_KEYBOARD bool "USB Keyboard support" - select DM_KEYBOARD if DM_USB + depends on DM_USB + select DM_KEYBOARD select SYS_STDIO_DEREGISTER ---help--- Say Y here if you want to use a USB keyboard for U-Boot command line diff --git a/include/configs/lxr2.h b/include/configs/lxr2.h new file mode 100644 index 00000000000..d8d37a42228 --- /dev/null +++ b/include/configs/lxr2.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +// Copyright (C) Stefano Babic <sbabic@denx.de> + +#ifndef __LXR2_CONFIG_H +#define __LXR2_CONFIG_H + +#include <config_distro_bootcmd.h> + +#include "mx6_common.h" + +#define PHYS_SDRAM_SIZE SZ_1G + +/* Physical Memory Map */ +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CFG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_MXC_UART_BASE UART4_BASE + +#endif diff --git a/include/console.h b/include/console.h index 6b6d0f9de73..57fdb0834c1 100644 --- a/include/console.h +++ b/include/console.h @@ -179,6 +179,14 @@ void console_puts_select_stderr(bool serial_only, const char *s); */ int console_clear(void); +/** + * console_remove_by_name() - Remove a console by its stdio name + * + * This must only be used in tests. It removes any use of the named stdio device + * from the console tables. + */ +int console_remove_by_name(const char *name); + /* * CONSOLE multiplexing. */ diff --git a/include/fwu.h b/include/fwu.h index c317613eaaa..6441de370c9 100644 --- a/include/fwu.h +++ b/include/fwu.h @@ -417,4 +417,15 @@ int fwu_state_machine_updates(bool trial_state, uint32_t update_index); */ int fwu_init(void); +/** + * fwu_bank_accepted() - Has the bank been accepted + * @data: Version agnostic FWU metadata information + * @bank: Update bank to check + * + * Check in the given bank if all the images have been accepted. + * + * Return: true if all images accepted, false otherwise + */ +bool fwu_bank_accepted(struct fwu_data *data, uint32_t bank); + #endif /* _FWU_H_ */ diff --git a/include/lmb.h b/include/lmb.h index fc2daaa7bfc..aee2f9fcdaa 100644 --- a/include/lmb.h +++ b/include/lmb.h @@ -111,6 +111,11 @@ struct lmb *lmb_get(void); int lmb_push(struct lmb *store); void lmb_pop(struct lmb *store); +static inline int lmb_read_check(phys_addr_t addr, phys_size_t len) +{ + return lmb_alloc_addr(addr, len) == addr ? 0 : -1; +} + #endif /* __KERNEL__ */ #endif /* _LINUX_LMB_H */ diff --git a/include/log.h b/include/log.h index 69dcb339543..7c25bf0b081 100644 --- a/include/log.h +++ b/include/log.h @@ -104,6 +104,8 @@ enum log_category_t { LOGC_FS, /** @LOGC_EXPO: Related to expo handling */ LOGC_EXPO, + /** @LOGC_CONSOLE: Related to the console and stdio */ + LOGC_CONSOLE, /** @LOGC_COUNT: Number of log categories */ LOGC_COUNT, /** @LOGC_END: Sentinel value for lists of log categories */ diff --git a/include/power/pca9450.h b/include/power/pca9450.h index b8219d535ad..f896d829d37 100644 --- a/include/power/pca9450.h +++ b/include/power/pca9450.h @@ -54,6 +54,8 @@ enum { PCA9450_REG_NUM, }; +#define PCA9450_REG_PWRCTRL_TOFF_DEB BIT(5) + int power_pca9450_init(unsigned char bus, unsigned char addr); enum { diff --git a/include/usb.h b/include/usb.h index fcbe2146f7d..be37ed272e1 100644 --- a/include/usb.h +++ b/include/usb.h @@ -250,20 +250,12 @@ int usb_host_eth_scan(int mode); #endif -#ifdef CONFIG_USB_KEYBOARD - /* * USB Keyboard reports are 8 bytes in boot protocol. * Appendix B of HID Device Class Definition 1.11 */ #define USB_KBD_BOOT_REPORT_SIZE 8 -int drv_usb_kbd_init(void); -int usb_kbd_deregister(int force); - -#endif -/* routines */ - /* * usb_init() - initialize the USB Controllers * @@ -1100,4 +1092,16 @@ struct usb_generic_descriptor **usb_emul_find_descriptor( */ void usb_show_tree(void); +/** + * usb_kbd_remove_for_test() - Remove any USB keyboard + * + * This can only be called from test_pre_run(). It removes the USB keyboard from + * the console system so that the USB device can be dropped + */ +#if CONFIG_IS_ENABLED(USB_KEYBOARD) +int usb_kbd_remove_for_test(void); +#else +static inline int usb_kbd_remove_for_test(void) { return 0; } +#endif + #endif /*_USB_H_ */ diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c index a4ea2873038..f8a4a7c6ef4 100644 --- a/lib/efi_loader/efi_capsule.c +++ b/lib/efi_loader/efi_capsule.c @@ -564,9 +564,14 @@ static efi_status_t efi_capsule_update_firmware( bool fw_accept_os; if (IS_ENABLED(CONFIG_FWU_MULTI_BANK_UPDATE)) { - if (fwu_empty_capsule_checks_pass() && - fwu_empty_capsule(capsule_data)) - return fwu_empty_capsule_process(capsule_data); + if (fwu_empty_capsule(capsule_data)) { + if (fwu_empty_capsule_checks_pass()) { + return fwu_empty_capsule_process(capsule_data); + } else { + log_err("FWU empty capsule checks failed. Cannot start update\n"); + return EFI_INVALID_PARAMETER; + } + } if (!fwu_update_checks_pass()) { log_err("FWU checks failed. Cannot start update\n"); diff --git a/lib/fwu_updates/Kconfig b/lib/fwu_updates/Kconfig index 51b7fbbefd3..a722107c129 100644 --- a/lib/fwu_updates/Kconfig +++ b/lib/fwu_updates/Kconfig @@ -40,6 +40,7 @@ config FWU_MDATA_V1 config FWU_MDATA_V2 bool "Enable support FWU Metadata version 2" + depends on !FWU_MDATA_V1 help The FWU specification supports two versions of the metadata structure. This option enables support for FWU diff --git a/lib/fwu_updates/fwu.c b/lib/fwu_updates/fwu.c index c7fc8987beb..7f085a0211f 100644 --- a/lib/fwu_updates/fwu.c +++ b/lib/fwu_updates/fwu.c @@ -28,6 +28,31 @@ enum { IMAGE_ACCEPT_CLEAR, }; +/** + * fwu_bank_accepted() - Has the bank been accepted + * @data: Version agnostic FWU metadata information + * @bank: Update bank to check + * + * Check in the given bank if all the images have been accepted. + * + * Return: true if all images accepted, false otherwise + */ +bool fwu_bank_accepted(struct fwu_data *data, uint32_t bank) +{ + u32 i; + struct fwu_image_entry *img_entry; + struct fwu_image_bank_info *img_bank_info; + + img_entry = &data->fwu_images[0]; + for (i = 0; i < CONFIG_FWU_NUM_IMAGES_PER_BANK; i++) { + img_bank_info = &img_entry[i].img_bank_info[bank]; + if (!img_bank_info->accepted) + return false; + } + + return true; +} + static int trial_counter_update(u16 *trial_state_ctr) { bool delete; @@ -88,6 +113,8 @@ static int fwu_trial_count_update(void) ret = fwu_revert_boot_index(); if (ret) log_err("Unable to revert active_index\n"); + + trial_counter_update(NULL); ret = 1; } else { log_info("Trial State count: attempt %d out of %d\n", @@ -737,8 +764,8 @@ static int fwu_boottime_checks(void) return 0; in_trial = in_trial_state(); - if (!in_trial || (ret = fwu_trial_count_update()) > 0) - ret = trial_counter_update(NULL); + + ret = in_trial ? fwu_trial_count_update() : trial_counter_update(NULL); if (!ret) boottime_check = 1; diff --git a/lib/fwu_updates/fwu_v1.c b/lib/fwu_updates/fwu_v1.c index efb8d515008..c311a8857a6 100644 --- a/lib/fwu_updates/fwu_v1.c +++ b/lib/fwu_updates/fwu_v1.c @@ -52,11 +52,14 @@ static void fwu_data_init(void) memcpy(dst_img_info, src_img_info, image_info_size); } -static int fwu_trial_state_update(bool trial_state) +static int fwu_trial_state_update(bool trial_state, uint32_t bank) { int ret; struct fwu_data *data = fwu_get_data(); + if (!trial_state && !fwu_bank_accepted(data, bank)) + return 0; + if (trial_state) { ret = fwu_trial_state_ctr_start(); if (ret) @@ -112,9 +115,9 @@ void fwu_populate_mdata_image_info(struct fwu_data *data) * Return: 0 if OK, -ve on error */ int fwu_state_machine_updates(bool trial_state, - __maybe_unused uint32_t update_index) + uint32_t update_index) { - return fwu_trial_state_update(trial_state); + return fwu_trial_state_update(trial_state, update_index); } /** @@ -146,6 +149,7 @@ int fwu_init(void) { int ret; uint32_t mdata_size; + struct fwu_mdata mdata = {0}; fwu_get_mdata_size(&mdata_size); @@ -157,10 +161,16 @@ int fwu_init(void) * Now read the entire structure, both copies, and * validate that the copies. */ - ret = fwu_get_mdata(NULL); + ret = fwu_get_mdata(&mdata); if (ret) return ret; + if (mdata.version != 0x1) { + log_err("FWU metadata version %u. Expected value of %u\n", + mdata.version, FWU_MDATA_VERSION); + return -EINVAL; + } + fwu_data_init(); return 0; diff --git a/lib/fwu_updates/fwu_v2.c b/lib/fwu_updates/fwu_v2.c index 108bc9bb4ac..ce46904ff2e 100644 --- a/lib/fwu_updates/fwu_v2.c +++ b/lib/fwu_updates/fwu_v2.c @@ -10,6 +10,9 @@ #include <linux/types.h> #define FWU_MDATA_VERSION 0x2U +#define FWU_IMG_DESC_OFFSET 0x20U + +static struct fwu_mdata g_mdata; static inline struct fwu_fw_store_desc *fwu_get_fw_desc(struct fwu_mdata *mdata) { @@ -58,24 +61,6 @@ static int fwu_mdata_sanity_checks(void) struct fwu_data *data = fwu_get_data(); struct fwu_mdata *mdata = data->fwu_mdata; - if (mdata->version != FWU_MDATA_VERSION) { - log_err("FWU metadata version %u. Expected value of %u\n", - mdata->version, FWU_MDATA_VERSION); - return -EINVAL; - } - - if (!mdata->desc_offset) { - log_err("No image information provided with the Metadata. "); - log_err("Image information expected in the metadata\n"); - return -EINVAL; - } - - if (mdata->desc_offset != 0x20) { - log_err("Descriptor Offset(0x%x) in the FWU Metadata not equal to 0x20\n", - mdata->desc_offset); - return -EINVAL; - } - num_banks = fwu_get_fw_desc(mdata)->num_banks; num_images = fwu_get_fw_desc(mdata)->num_images; @@ -100,6 +85,9 @@ static int fwu_bank_state_update(bool trial_state, uint32_t bank) struct fwu_data *data = fwu_get_data(); struct fwu_mdata *mdata = data->fwu_mdata; + if (!trial_state && !fwu_bank_accepted(data, bank)) + return 0; + mdata->bank_state[bank] = data->bank_state[bank] = trial_state ? FWU_BANK_VALID : FWU_BANK_ACCEPTED; @@ -127,6 +115,35 @@ static int fwu_trial_state_start(uint update_index) return 0; } +static bool fwu_get_mdata_mandatory(uint part) +{ + int ret = 0; + struct udevice *fwu_dev = fwu_get_dev(); + + memset(&g_mdata, 0, sizeof(struct fwu_mdata)); + + ret = fwu_read_mdata(fwu_dev, &g_mdata, + part == PRIMARY_PART ? true : false, + sizeof(struct fwu_mdata)); + if (ret) + return false; + + if (g_mdata.version != FWU_MDATA_VERSION) { + log_err("FWU partition %u has metadata version %u. Expected value of %u\n", + part, g_mdata.version, FWU_MDATA_VERSION); + return false; + } + + if (g_mdata.desc_offset != FWU_IMG_DESC_OFFSET) { + log_err("Descriptor Offset(0x%x) in the FWU Metadata partition %u not equal to 0x20\n", + g_mdata.desc_offset, part); + log_err("Image information expected in the metadata\n"); + return false; + } + + return true; +} + /** * fwu_populate_mdata_image_info() - Populate the image information * of the metadata @@ -187,24 +204,14 @@ int fwu_state_machine_updates(bool trial_state, uint32_t update_index) */ int fwu_get_mdata_size(uint32_t *mdata_size) { - int ret = 0; - struct fwu_mdata mdata = { 0 }; struct fwu_data *data = fwu_get_data(); - struct udevice *fwu_dev = fwu_get_dev(); if (data->metadata_size) { *mdata_size = data->metadata_size; return 0; } - ret = fwu_read_mdata(fwu_dev, &mdata, 1, - sizeof(struct fwu_mdata)); - if (ret) { - log_err("FWU metadata read failed\n"); - return ret; - } - - *mdata_size = mdata.metadata_size; + *mdata_size = g_mdata.metadata_size; if (!*mdata_size) return -EINVAL; @@ -224,21 +231,23 @@ int fwu_get_mdata_size(uint32_t *mdata_size) int fwu_init(void) { int ret; - struct fwu_mdata mdata = { 0 }; - struct udevice *fwu_dev = fwu_get_dev(); /* * First we read only the top level structure * and get the size of the complete structure. + * Try reading the first partition first, if + * that does not work, try the secondary + * partition. The idea is, if one of the + * partitions is corrupted, it should be restored + * from the intact partition. */ - ret = fwu_read_mdata(fwu_dev, &mdata, 1, - sizeof(struct fwu_mdata)); - if (ret) { + if (!fwu_get_mdata_mandatory(PRIMARY_PART) && + !fwu_get_mdata_mandatory(SECONDARY_PART)) { log_err("FWU metadata read failed\n"); - return ret; + return -1; } - ret = fwu_mdata_copies_allocate(mdata.metadata_size); + ret = fwu_mdata_copies_allocate(g_mdata.metadata_size); if (ret) return ret; diff --git a/scripts/pylint.base b/scripts/pylint.base index c7d141ed393..bc39e2385a3 100644 --- a/scripts/pylint.base +++ b/scripts/pylint.base @@ -1,229 +1,311 @@ -test_conftest.py 6.56 -test_multiplexed_log.py 7.49 -test_test.py 8.18 +test_conftest.py 6.78 +test_multiplexed_log.py 7.68 +test_test.py 9.00 +test_tests_fit_util.py 7.19 +test_tests_fs_helper.py 10.00 test_tests_test_000_version.py 7.50 -test_tests_test_android_test_ab.py 6.50 -test_tests_test_android_test_abootimg.py 6.09 -test_tests_test_android_test_avb.py 5.52 -test_tests_test_bind.py -2.99 +test_tests_test_android_test_ab.py 7.00 +test_tests_test_android_test_abootimg.py 6.52 +test_tests_test_android_test_avb.py 6.38 +test_tests_test_bind.py 8.89 test_tests_test_bootmenu.py 10.00 +test_tests_test_bootstage.py 7.14 test_tests_test_button.py 3.33 -test_tests_test_dfu.py 5.45 -test_tests_test_dm.py 9.52 -test_tests_test_efi_capsule_capsule_defs.py 6.67 -test_tests_test_efi_capsule_conftest.py 1.86 -test_tests_test_efi_capsule_test_capsule_firmware.py 4.52 -test_tests_test_efi_capsule_test_capsule_firmware_signed.py 4.85 -test_tests_test_efi_fit.py 8.16 -test_tests_test_efi_loader.py 7.38 -test_tests_test_efi_secboot_conftest.py -3.29 -test_tests_test_efi_secboot_defs.py 6.67 -test_tests_test_efi_secboot_test_authvar.py 8.93 -test_tests_test_efi_secboot_test_signed.py 8.41 -test_tests_test_efi_secboot_test_signed_intca.py 8.10 -test_tests_test_efi_secboot_test_unsigned.py 8.00 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+tools_u_bootlib_cros_subprocess.py 9.25 +tools_u_bootlib_terminal.py 8.50 +tools_u_bootlib_test_util.py 7.31 +tools_u_bootlib_tools.py 6.97 +tools_u_bootlib_tout.py 6.56 tools_zynqmp_pm_cfg_obj_convert 6.67 diff --git a/test/boot/bootdev.c b/test/boot/bootdev.c index 23ebc61ff52..c635d06ec25 100644 --- a/test/boot/bootdev.c +++ b/test/boot/bootdev.c @@ -16,13 +16,6 @@ #include <test/ut.h> #include "bootstd_common.h" -/* Allow reseting the USB-started flag */ -#if defined(CONFIG_USB_HOST) || defined(CONFIG_USB_GADGET) -extern bool usb_started; -#else -#include <usb.h> -#endif - /* Check 'bootdev list' command */ static int bootdev_test_cmd_list(struct unit_test_state *uts) { @@ -197,7 +190,7 @@ static int bootdev_test_order(struct unit_test_state *uts) test_set_skip_delays(true); /* Start up USB which gives us three additional bootdevs */ - usb_started = false; + bootstd_reset_usb(); ut_assertok(run_command("usb start", 0)); /* @@ -313,7 +306,7 @@ static int bootdev_test_prio(struct unit_test_state *uts) test_set_eth_enable(false); /* Start up USB which gives us three additional bootdevs */ - usb_started = false; + bootstd_reset_usb(); ut_assertok(run_command("usb start", 0)); ut_assertok(bootstd_test_drop_bootdev_order(uts)); @@ -352,7 +345,7 @@ static int bootdev_test_hunter(struct unit_test_state *uts) { struct bootstd_priv *std; - usb_started = false; + bootstd_reset_usb(); test_set_skip_delays(true); /* get access to the used hunters */ @@ -392,7 +385,7 @@ static int bootdev_test_cmd_hunt(struct unit_test_state *uts) struct bootstd_priv *std; test_set_skip_delays(true); - usb_started = false; + bootstd_reset_usb(); /* get access to the used hunters */ ut_assertok(bootstd_get_priv(&std)); @@ -520,7 +513,7 @@ BOOTSTD_TEST(bootdev_test_bootable, UTF_DM | UTF_SCAN_FDT); /* Check hunting for bootdev of a particular priority */ static int bootdev_test_hunt_prio(struct unit_test_state *uts) { - usb_started = false; + bootstd_reset_usb(); test_set_skip_delays(true); ut_assertok(bootdev_hunt_prio(BOOTDEVP_4_SCAN_FAST, false)); @@ -548,7 +541,7 @@ static int bootdev_test_hunt_label(struct unit_test_state *uts) struct bootstd_priv *std; int mflags; - usb_started = false; + bootstd_reset_usb(); /* get access to the used hunters */ ut_assertok(bootstd_get_priv(&std)); diff --git a/test/boot/bootstd_common.c b/test/boot/bootstd_common.c index e50539500a0..ff8ed2303b3 100644 --- a/test/boot/bootstd_common.c +++ b/test/boot/bootstd_common.c @@ -11,6 +11,7 @@ #include <dm.h> #include <memalign.h> #include <mmc.h> +#include <usb.h> #include <linux/log2.h> #include <test/suites.h> #include <test/ut.h> @@ -88,6 +89,11 @@ int bootstd_test_check_mmc_hunter(struct unit_test_state *uts) return 0; } +void bootstd_reset_usb(void) +{ + usb_started = false; +} + int do_ut_bootstd(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { struct unit_test *tests = UNIT_TEST_SUITE_START(bootstd_test); diff --git a/test/boot/bootstd_common.h b/test/boot/bootstd_common.h index 4a126e43ff4..e29036c897c 100644 --- a/test/boot/bootstd_common.h +++ b/test/boot/bootstd_common.h @@ -53,4 +53,12 @@ int bootstd_setup_for_tests(void); */ int bootstd_test_check_mmc_hunter(struct unit_test_state *uts); +/** + * bootstd_reset_usb() - Reset the USB subsystem + * + * Resets USB so that it can be started (and scanning) again. This is useful in + * tests which need to use USB. + */ +void bootstd_reset_usb(void); + #endif diff --git a/test/cmd/mbr.c b/test/cmd/mbr.c index e1a9cdffb04..b14137e589a 100644 --- a/test/cmd/mbr.c +++ b/test/cmd/mbr.c @@ -14,10 +14,14 @@ #include <asm/global_data.h> #include <dm/device-internal.h> #include <dm/lists.h> +#include <linux/sizes.h> #include <test/suites.h> #include <test/ut.h> DECLARE_GLOBAL_DATA_PTR; + +#define BLKSZ SZ_512 /* block size */ + /* * Requirements for running test manually: * mmc6.img - File size needs to be at least 12 MiB @@ -50,7 +54,7 @@ static char * mbr_parts_tail = "'"; 000001e0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................| 000001f0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 55 aa |..............U.| */ -static unsigned mbr_cmp_start = 0x1B8; +static unsigned int mbr_cmp_start = 0x1b8; static unsigned mbr_cmp_size = 0x48; static unsigned char mbr_parts_ref_p1[] = { 0x78, 0x56, 0x34, 0x12, 0x00, 0x00, 0x80, 0x05, @@ -228,9 +232,11 @@ static unsigned build_mbr_parts(char *buf, size_t buf_size, unsigned num_parts) static int mbr_test_run(struct unit_test_state *uts) { struct blk_desc *mmc_dev_desc; - unsigned char mbr_wbuf[512], ebr_wbuf[512], rbuf[512]; + unsigned char *mbr_wbuf, *ebr_wbuf, *rbuf; char mbr_parts_buf[256]; - ulong mbr_wa, ebr_wa, ra, ebr_blk, mbr_parts_max; + ulong addr = 0x1000; /* start address for buffers */ + ulong mbr_wa = addr, ebr_wa = addr + BLKSZ, ra = addr + BLKSZ * 2; + ulong ebr_blk, mbr_parts_max; struct udevice *dev; ofnode root, node; @@ -254,10 +260,10 @@ static int mbr_test_run(struct unit_test_state *uts) ut_assertf(sizeof(mbr_parts_buf) >= mbr_parts_max, "Buffer avail: %ld; buffer req: %ld\n", sizeof(mbr_parts_buf), mbr_parts_max); - mbr_wa = map_to_sysmem(mbr_wbuf); - ebr_wa = map_to_sysmem(ebr_wbuf); - ra = map_to_sysmem(rbuf); - ebr_blk = (ulong)0xB00000 / 0x200; + mbr_wbuf = map_sysmem(mbr_wa, BLKSZ); + ebr_wbuf = map_sysmem(ebr_wa, BLKSZ); + rbuf = map_sysmem(ra, BLKSZ); + ebr_blk = (ulong)0xb00000 / BLKSZ; /* Make sure mmc6 exists */ ut_asserteq(6, blk_get_device_by_str("mmc", "6", &mmc_dev_desc)); @@ -267,28 +273,29 @@ static int mbr_test_run(struct unit_test_state *uts) ut_assert_console_end(); /* Make sure mmc6 is 12+ MiB in size */ - ut_assertok(run_commandf("mmc read 0x%lx 0x%lx 1", ra, (ulong)0xBFFE00 / 0x200)); + ut_assertok(run_commandf("mmc read %lx %lx 1", ra, + (ulong)0xbffe00 / BLKSZ)); /* Test one MBR partition */ init_write_buffers(mbr_wbuf, sizeof(mbr_wbuf), ebr_wbuf, sizeof(ebr_wbuf), __LINE__); ut_assertok(build_mbr_parts(mbr_parts_buf, sizeof(mbr_parts_buf), 1)); - ut_assertok(run_commandf("write mmc 6:0 0x%lx 0 1", mbr_wa)); - memset(rbuf, 0, sizeof(rbuf)); - ut_assertok(run_commandf("read mmc 6:0 0x%lx 0 1", ra)); - ut_assertok(memcmp(mbr_wbuf, rbuf, 512)); - ut_assertok(run_commandf("write mmc 6:0 0x%lx 0x%lx 1", ebr_wa, ebr_blk)); - memset(rbuf, 0, sizeof(rbuf)); - ut_assertok(run_commandf("read mmc 6:0 0x%lx 0x%lx 1", ra, ebr_blk)); - ut_assertok(memcmp(ebr_wbuf, rbuf, 512)); + ut_assertok(run_commandf("write mmc 6:0 %lx 0 1", mbr_wa)); + memset(rbuf, '\0', BLKSZ); + ut_assertok(run_commandf("read mmc 6:0 %lx 0 1", ra)); + ut_assertok(memcmp(mbr_wbuf, rbuf, BLKSZ)); + ut_assertok(run_commandf("write mmc 6:0 %lx %lx 1", ebr_wa, ebr_blk)); + memset(rbuf, '\0', BLKSZ); + ut_assertok(run_commandf("read mmc 6:0 %lx %lx 1", ra, ebr_blk)); + ut_assertok(memcmp(ebr_wbuf, rbuf, BLKSZ)); ut_assertf(0 == run_commandf(mbr_parts_buf), "Invalid partitions string: %s\n", mbr_parts_buf); ut_assertok(run_commandf("mbr write mmc 6")); ut_assert_nextlinen("MMC read: dev # 6"); ut_assert_nextline("MBR: write success!"); ut_assertok(run_commandf("mbr verify mmc 6")); ut_assert_nextline("MBR: verify success!"); - memset(rbuf, 0, sizeof(rbuf)); - ut_assertok(run_commandf("read mmc 6:0 0x%lx 0x%lx 1", ra, ebr_blk)); - ut_assertok(memcmp(ebr_wbuf, rbuf, 512)); + memset(rbuf, '\0', BLKSZ); + ut_assertok(run_commandf("read mmc 6:0 %lx %lx 1", ra, ebr_blk)); + ut_assertok(memcmp(ebr_wbuf, rbuf, BLKSZ)); ut_assert_console_end(); /* 000001b0 00 00 00 00 00 00 00 00 78 56 34 12 00 00 80 05 |........xV4.....| @@ -297,33 +304,33 @@ static int mbr_test_run(struct unit_test_state *uts) 000001e0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................| 000001f0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 55 aa |..............U.| */ - memset(rbuf, 0, sizeof(rbuf)); - ut_assertok(run_commandf("read mmc 6:0 0x%lx 0 1", ra)); + memset(rbuf, '\0', BLKSZ); + ut_assertok(run_commandf("read mmc 6:0 %lx 0 1", ra)); for (unsigned i = 0; i < mbr_cmp_size; i++) { ut_assertf(rbuf[mbr_cmp_start + i] == mbr_parts_ref_p1[i], - "1P MBR+0x%04X: expected 0x%02X, actual: 0x%02X\n", + "1P MBR+0x%04X: expected %#02X, actual: %#02X\n", mbr_cmp_start + i, mbr_parts_ref_p1[i], rbuf[mbr_cmp_start + i]); } /* Test two MBR partitions */ init_write_buffers(mbr_wbuf, sizeof(mbr_wbuf), ebr_wbuf, sizeof(ebr_wbuf), __LINE__); ut_assertok(build_mbr_parts(mbr_parts_buf, sizeof(mbr_parts_buf), 2)); - ut_assertok(run_commandf("write mmc 6:0 0x%lx 0 1", mbr_wa)); - memset(rbuf, 0, sizeof(rbuf)); - ut_assertok(run_commandf("read mmc 6:0 0x%lx 0 1", ra)); - ut_assertok(memcmp(mbr_wbuf, rbuf, 512)); - ut_assertok(run_commandf("write mmc 6:0 0x%lx 0x%lx 1", ebr_wa, ebr_blk)); - memset(rbuf, 0, sizeof(rbuf)); - ut_assertok(run_commandf("read mmc 6:0 0x%lx 0x%lx 1", ra, ebr_blk)); - ut_assertok(memcmp(ebr_wbuf, rbuf, 512)); + ut_assertok(run_commandf("write mmc 6:0 %lx 0 1", mbr_wa)); + memset(rbuf, '\0', BLKSZ); + ut_assertok(run_commandf("read mmc 6:0 %lx 0 1", ra)); + ut_assertok(memcmp(mbr_wbuf, rbuf, BLKSZ)); + ut_assertok(run_commandf("write mmc 6:0 %lx %lx 1", ebr_wa, ebr_blk)); + memset(rbuf, '\0', BLKSZ); + ut_assertok(run_commandf("read mmc 6:0 %lx %lx 1", ra, ebr_blk)); + ut_assertok(memcmp(ebr_wbuf, rbuf, BLKSZ)); ut_assertf(0 == run_commandf(mbr_parts_buf), "Invalid partitions string: %s\n", mbr_parts_buf); ut_assertok(run_commandf("mbr write mmc 6")); ut_assert_nextline("MBR: write success!"); ut_assertok(run_commandf("mbr verify mmc 6")); ut_assert_nextline("MBR: verify success!"); - memset(rbuf, 0, sizeof(rbuf)); - ut_assertok(run_commandf("read mmc 6:0 0x%lx 0x%lx 1", ra, ebr_blk)); - ut_assertok(memcmp(ebr_wbuf, rbuf, 512)); + memset(rbuf, '\0', BLKSZ); + ut_assertok(run_commandf("read mmc 6:0 %lx %lx 1", ra, ebr_blk)); + ut_assertok(memcmp(ebr_wbuf, rbuf, BLKSZ)); ut_assert_console_end(); /* 000001b0 00 00 00 00 00 00 00 00 78 56 34 12 00 00 80 05 |........xV4.....| @@ -332,33 +339,33 @@ static int mbr_test_run(struct unit_test_state *uts) 000001e0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................| 000001f0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 55 aa |..............U.| */ - memset(rbuf, 0, sizeof(rbuf)); - ut_assertok(run_commandf("read mmc 6:0 0x%lx 0 1", ra)); + memset(rbuf, '\0', BLKSZ); + ut_assertok(run_commandf("read mmc 6:0 %lx 0 1", ra)); for (unsigned i = 0; i < mbr_cmp_size; i++) { ut_assertf(rbuf[mbr_cmp_start + i] == mbr_parts_ref_p2[i], - "2P MBR+0x%04X: expected 0x%02X, actual: 0x%02X\n", + "2P MBR+0x%04X: expected %#02X, actual: %#02X\n", mbr_cmp_start + i, mbr_parts_ref_p2[i], rbuf[mbr_cmp_start + i]); } /* Test three MBR partitions */ init_write_buffers(mbr_wbuf, sizeof(mbr_wbuf), ebr_wbuf, sizeof(ebr_wbuf), __LINE__); ut_assertok(build_mbr_parts(mbr_parts_buf, sizeof(mbr_parts_buf), 3)); - ut_assertok(run_commandf("write mmc 6:0 0x%lx 0 1", mbr_wa)); - memset(rbuf, 0, sizeof(rbuf)); - ut_assertok(run_commandf("read mmc 6:0 0x%lx 0 1", ra)); - ut_assertok(memcmp(mbr_wbuf, rbuf, 512)); - ut_assertok(run_commandf("write mmc 6:0 0x%lx 0x%lx 1", ebr_wa, ebr_blk)); - memset(rbuf, 0, sizeof(rbuf)); - ut_assertok(run_commandf("read mmc 6:0 0x%lx 0x%lx 1", ra, ebr_blk)); - ut_assertok(memcmp(ebr_wbuf, rbuf, 512)); + ut_assertok(run_commandf("write mmc 6:0 %lx 0 1", mbr_wa)); + memset(rbuf, '\0', BLKSZ); + ut_assertok(run_commandf("read mmc 6:0 %lx 0 1", ra)); + ut_assertok(memcmp(mbr_wbuf, rbuf, BLKSZ)); + ut_assertok(run_commandf("write mmc 6:0 %lx %lx 1", ebr_wa, ebr_blk)); + memset(rbuf, '\0', BLKSZ); + ut_assertok(run_commandf("read mmc 6:0 %lx %lx 1", ra, ebr_blk)); + ut_assertok(memcmp(ebr_wbuf, rbuf, BLKSZ)); ut_assertf(0 == run_commandf(mbr_parts_buf), "Invalid partitions string: %s\n", mbr_parts_buf); ut_assertok(run_commandf("mbr write mmc 6")); ut_assert_nextline("MBR: write success!"); ut_assertok(run_commandf("mbr verify mmc 6")); ut_assert_nextline("MBR: verify success!"); - memset(rbuf, 0, sizeof(rbuf)); - ut_assertok(run_commandf("read mmc 6:0 0x%lx 0x%lx 1", ra, ebr_blk)); - ut_assertok(memcmp(ebr_wbuf, rbuf, 512)); + memset(rbuf, '\0', BLKSZ); + ut_assertok(run_commandf("read mmc 6:0 %lx %lx 1", ra, ebr_blk)); + ut_assertok(memcmp(ebr_wbuf, rbuf, BLKSZ)); ut_assert_console_end(); /* 000001b0 00 00 00 00 00 00 00 00 78 56 34 12 00 00 80 05 |........xV4.....| @@ -367,33 +374,33 @@ static int mbr_test_run(struct unit_test_state *uts) 000001e0 06 01 0e 66 25 01 00 50 00 00 00 08 00 00 00 00 |...f%..P........| 000001f0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 55 aa |..............U.| */ - memset(rbuf, 0, sizeof(rbuf)); - ut_assertok(run_commandf("read mmc 6:0 0x%lx 0 1", ra)); + memset(rbuf, '\0', BLKSZ); + ut_assertok(run_commandf("read mmc 6:0 %lx 0 1", ra)); for (unsigned i = 0; i < mbr_cmp_size; i++) { ut_assertf(rbuf[mbr_cmp_start + i] == mbr_parts_ref_p3[i], - "3P MBR+0x%04X: expected 0x%02X, actual: 0x%02X\n", + "3P MBR+0x%04X: expected %#02X, actual: %#02X\n", mbr_cmp_start + i, mbr_parts_ref_p3[i], rbuf[mbr_cmp_start + i]); } /* Test four MBR partitions */ init_write_buffers(mbr_wbuf, sizeof(mbr_wbuf), ebr_wbuf, sizeof(ebr_wbuf), __LINE__); ut_assertok(build_mbr_parts(mbr_parts_buf, sizeof(mbr_parts_buf), 4)); - ut_assertok(run_commandf("write mmc 6:0 0x%lx 0 1", mbr_wa)); - memset(rbuf, 0, sizeof(rbuf)); - ut_assertok(run_commandf("read mmc 6:0 0x%lx 0 1", ra)); - ut_assertok(memcmp(mbr_wbuf, rbuf, 512)); - ut_assertok(run_commandf("write mmc 6:0 0x%lx 0x%lx 1", ebr_wa, ebr_blk)); - memset(rbuf, 0, sizeof(rbuf)); - ut_assertok(run_commandf("read mmc 6:0 0x%lx 0x%lx 1", ra, ebr_blk)); - ut_assertok(memcmp(ebr_wbuf, rbuf, 512)); + ut_assertok(run_commandf("write mmc 6:0 %lx 0 1", mbr_wa)); + memset(rbuf, '\0', BLKSZ); + ut_assertok(run_commandf("read mmc 6:0 %lx 0 1", ra)); + ut_assertok(memcmp(mbr_wbuf, rbuf, BLKSZ)); + ut_assertok(run_commandf("write mmc 6:0 %lx %lx 1", ebr_wa, ebr_blk)); + memset(rbuf, '\0', BLKSZ); + ut_assertok(run_commandf("read mmc 6:0 %lx %lx 1", ra, ebr_blk)); + ut_assertok(memcmp(ebr_wbuf, rbuf, BLKSZ)); ut_assertf(0 == run_commandf(mbr_parts_buf), "Invalid partitions string: %s\n", mbr_parts_buf); ut_assertok(run_commandf("mbr write mmc 6")); ut_assert_nextline("MBR: write success!"); ut_assertok(run_commandf("mbr verify mmc 6")); ut_assert_nextline("MBR: verify success!"); - memset(rbuf, 0, sizeof(rbuf)); - ut_assertok(run_commandf("read mmc 6:0 0x%lx 0x%lx 1", ra, ebr_blk)); - ut_assertok(memcmp(ebr_wbuf, rbuf, 512)); + memset(rbuf, '\0', BLKSZ); + ut_assertok(run_commandf("read mmc 6:0 %lx %lx 1", ra, ebr_blk)); + ut_assertok(memcmp(ebr_wbuf, rbuf, BLKSZ)); ut_assert_console_end(); /* 000001b0 00 00 00 00 00 00 00 00 78 56 34 12 00 00 80 05 |........xV4.....| @@ -402,25 +409,25 @@ static int mbr_test_run(struct unit_test_state *uts) 000001e0 06 01 0e 66 25 01 00 50 00 00 00 08 00 00 00 66 |...f%..P.......f| 000001f0 26 01 0e 87 06 01 00 58 00 00 00 08 00 00 55 aa |&......X......U.| */ - memset(rbuf, 0, sizeof(rbuf)); - ut_assertok(run_commandf("read mmc 6:0 0x%lx 0 1", ra)); + memset(rbuf, '\0', BLKSZ); + ut_assertok(run_commandf("read mmc 6:0 %lx 0 1", ra)); for (unsigned i = 0; i < mbr_cmp_size; i++) { ut_assertf(rbuf[mbr_cmp_start + i] == mbr_parts_ref_p4[i], - "4P MBR+0x%04X: expected 0x%02X, actual: 0x%02X\n", + "4P MBR+0x%04X: expected %#02X, actual: %#02X\n", mbr_cmp_start + i, mbr_parts_ref_p4[i], rbuf[mbr_cmp_start + i]); } /* Test five MBR partitions */ init_write_buffers(mbr_wbuf, sizeof(mbr_wbuf), ebr_wbuf, sizeof(ebr_wbuf), __LINE__); ut_assertok(build_mbr_parts(mbr_parts_buf, sizeof(mbr_parts_buf), 5)); - ut_assertok(run_commandf("write mmc 6:0 0x%lx 0 1", mbr_wa)); - memset(rbuf, 0, sizeof(rbuf)); - ut_assertok(run_commandf("read mmc 6:0 0x%lx 0 1", ra)); - ut_assertok(memcmp(mbr_wbuf, rbuf, 512)); - ut_assertok(run_commandf("write mmc 6:0 0x%lx 0x%lx 1", ebr_wa, ebr_blk)); - memset(rbuf, 0, sizeof(rbuf)); - ut_assertok(run_commandf("read mmc 6:0 0x%lx 0x%lx 1", ra, ebr_blk)); - ut_assertok(memcmp(ebr_wbuf, rbuf, 512)); + ut_assertok(run_commandf("write mmc 6:0 %lx 0 1", mbr_wa)); + memset(rbuf, '\0', BLKSZ); + ut_assertok(run_commandf("read mmc 6:0 %lx 0 1", ra)); + ut_assertok(memcmp(mbr_wbuf, rbuf, BLKSZ)); + ut_assertok(run_commandf("write mmc 6:0 %lx %lx 1", ebr_wa, ebr_blk)); + memset(rbuf, '\0', BLKSZ); + ut_assertok(run_commandf("read mmc 6:0 %lx %lx 1", ra, ebr_blk)); + ut_assertok(memcmp(ebr_wbuf, rbuf, BLKSZ)); ut_assertf(0 == run_commandf(mbr_parts_buf), "Invalid partitions string: %s\n", mbr_parts_buf); ut_assertf(0 == run_commandf("mbr write mmc 6"), "Invalid partitions string: %s\n", mbr_parts_buf); ut_assert_nextline("MBR: write success!"); @@ -434,11 +441,11 @@ static int mbr_test_run(struct unit_test_state *uts) 000001e0 06 01 0e 66 25 01 00 50 00 00 00 08 00 00 00 66 |...f%..P.......f| 000001f0 26 01 05 a7 26 01 00 58 00 00 00 10 00 00 55 aa |&...&..X......U.| */ - memset(rbuf, 0, sizeof(rbuf)); - ut_assertok(run_commandf("read mmc 6:0 0x%lx 0 1", ra)); + memset(rbuf, '\0', BLKSZ); + ut_assertok(run_commandf("read mmc 6:0 %lx 0 1", ra)); for (unsigned i = 0; i < mbr_cmp_size; i++) { ut_assertf(rbuf[mbr_cmp_start + i] == mbr_parts_ref_p5[i], - "5P MBR+0x%04X: expected 0x%02X, actual: 0x%02X\n", + "5P MBR+0x%04X: expected %#02X, actual: %#02X\n", mbr_cmp_start + i, mbr_parts_ref_p5[i], rbuf[mbr_cmp_start + i]); } /* @@ -448,13 +455,16 @@ static int mbr_test_run(struct unit_test_state *uts) 00b001e0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................| 00b001f0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 55 aa |..............U.| */ - memset(rbuf, 0, sizeof(rbuf)); - ut_assertok(run_commandf("read mmc 6:0 0x%lx 0x%lx 1", ra, ebr_blk)); + memset(rbuf, '\0', BLKSZ); + ut_assertok(run_commandf("read mmc 6:0 %lx %lx 1", ra, ebr_blk)); for (unsigned i = 0; i < ebr_cmp_size; i++) { ut_assertf(rbuf[ebr_cmp_start + i] == ebr_parts_ref_p5[i], - "5P EBR+0x%04X: expected 0x%02X, actual: 0x%02X\n", + "5P EBR+0x%04X: expected %#02X, actual: %#02X\n", ebr_cmp_start + i, ebr_parts_ref_p5[i], rbuf[ebr_cmp_start + i]); } + unmap_sysmem(mbr_wbuf); + unmap_sysmem(ebr_wbuf); + unmap_sysmem(rbuf); return 0; } @@ -469,9 +479,3 @@ int do_ut_mbr(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) return cmd_ut_category("mbr", "mbr_test_", tests, n_ents, argc, argv); } - -static int dm_test_cmd_mbr(struct unit_test_state *uts) -{ - return mbr_test_run(uts); -} -DM_TEST(dm_test_cmd_mbr, UTF_SCAN_FDT | UTF_CONSOLE); diff --git a/test/py/tests/test_ut.py b/test/py/tests/test_ut.py index 05e15830590..39aa1035e34 100644 --- a/test/py/tests/test_ut.py +++ b/test/py/tests/test_ut.py @@ -1,6 +1,12 @@ # SPDX-License-Identifier: GPL-2.0 -# Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. +""" +Unit-test runner + +Provides a test_ut() function which is used by conftest.py to run each unit +test one at a time, as well setting up some files needed by the tests. +# Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. +""" import collections import getpass import gzip @@ -44,8 +50,8 @@ def setup_image(cons, mmc_dev, part_type, second_part=False): if second_part: spec += '\ntype=c' - u_boot_utils.run_and_log(cons, 'qemu-img create %s 20M' % fname) - u_boot_utils.run_and_log(cons, 'sudo sfdisk %s' % fname, + u_boot_utils.run_and_log(cons, f'qemu-img create {fname} 20M') + u_boot_utils.run_and_log(cons, f'sudo sfdisk {fname}', stdin=spec.encode('utf-8')) return fname, mnt @@ -61,13 +67,13 @@ def mount_image(cons, fname, mnt, fstype): Returns: str: Name of loop device used """ - out = u_boot_utils.run_and_log(cons, 'sudo losetup --show -f -P %s' % fname) + out = u_boot_utils.run_and_log(cons, f'sudo losetup --show -f -P {fname}') loop = out.strip() part = f'{loop}p1' u_boot_utils.run_and_log(cons, f'sudo mkfs.{fstype} {part}') opts = '' if fstype == 'vfat': - opts += f' -o uid={os.getuid()},gid={os.getgid()}' + opts += f' -o uid={os.getuid()},gid={os.getgid()}' u_boot_utils.run_and_log(cons, f'sudo mount -o loop {part} {mnt}{opts}') u_boot_utils.run_and_log(cons, f'sudo chown {getpass.getuser()} {mnt}') return loop @@ -82,9 +88,7 @@ def copy_prepared_image(cons, mmc_dev, fname): """ infname = os.path.join(cons.config.source_dir, f'test/py/tests/bootstd/mmc{mmc_dev}.img.xz') - u_boot_utils.run_and_log( - cons, - ['sh', '-c', 'xz -dc %s >%s' % (infname, fname)]) + u_boot_utils.run_and_log(cons, ['sh', '-c', f'xz -dc {infname} >{fname}']) def setup_bootmenu_image(cons): """Create a 20MB disk image with a single ext4 partition @@ -101,9 +105,6 @@ def setup_bootmenu_image(cons): loop = mount_image(cons, fname, mnt, 'ext4') mounted = True - vmlinux = 'Image' - initrd = 'uInitrd' - dtbdir = 'dtb' script = '''# DO NOT EDIT THIS FILE # # Please edit /boot/armbianEnv.txt to set supported parameters @@ -177,12 +178,12 @@ booti ${kernel_addr_r} ${ramdisk_addr_r} ${fdt_addr_r} # Recompile with: # mkimage -C none -A arm -T script -d /boot/boot.cmd /boot/boot.scr -''' % (mmc_dev) +''' bootdir = os.path.join(mnt, 'boot') mkdir_cond(bootdir) cmd_fname = os.path.join(bootdir, 'boot.cmd') scr_fname = os.path.join(bootdir, 'boot.scr') - with open(cmd_fname, 'w') as outf: + with open(cmd_fname, 'w', encoding='ascii') as outf: print(script, file=outf) infname = os.path.join(cons.config.source_dir, @@ -212,13 +213,12 @@ booti ${kernel_addr_r} ${ramdisk_addr_r} ${fdt_addr_r} complete = True except ValueError as exc: - print('Falled to create image, failing back to prepared copy: %s', - str(exc)) + print(f'Falled to create image, failing back to prepared copy: {exc}') finally: if mounted: - u_boot_utils.run_and_log(cons, 'sudo umount --lazy %s' % mnt) + u_boot_utils.run_and_log(cons, f'sudo umount --lazy {mnt}') if loop: - u_boot_utils.run_and_log(cons, 'sudo losetup -d %s' % loop) + u_boot_utils.run_and_log(cons, f'sudo losetup -d {loop}') if not complete: copy_prepared_image(cons, mmc_dev, fname) @@ -254,32 +254,32 @@ label Fedora-Workstation-armhfp-31-1.9 (5.3.7-301.fc31.armv7hl) ext = os.path.join(mnt, 'extlinux') mkdir_cond(ext) - with open(os.path.join(ext, 'extlinux.conf'), 'w') as fd: + conf = os.path.join(ext, 'extlinux.conf') + with open(conf, 'w', encoding='ascii') as fd: print(script, file=fd) inf = os.path.join(cons.config.persistent_data_dir, 'inf') with open(inf, 'wb') as fd: fd.write(gzip.compress(b'vmlinux')) - u_boot_utils.run_and_log(cons, 'mkimage -f auto -d %s %s' % - (inf, os.path.join(mnt, vmlinux))) + u_boot_utils.run_and_log( + cons, f'mkimage -f auto -d {inf} {os.path.join(mnt, vmlinux)}') - with open(os.path.join(mnt, initrd), 'w') as fd: + with open(os.path.join(mnt, initrd), 'w', encoding='ascii') as fd: print('initrd', file=fd) mkdir_cond(os.path.join(mnt, dtbdir)) - dtb_file = os.path.join(mnt, '%s/sandbox.dtb' % dtbdir) + dtb_file = os.path.join(mnt, f'{dtbdir}/sandbox.dtb') u_boot_utils.run_and_log( - cons, 'dtc -o %s' % dtb_file, stdin=b'/dts-v1/; / {};') + cons, f'dtc -o {dtb_file}', stdin=b'/dts-v1/; / {};') complete = True except ValueError as exc: - print('Falled to create image, failing back to prepared copy: %s', - str(exc)) + print(f'Falled to create image, failing back to prepared copy: {exc}') finally: if mounted: - u_boot_utils.run_and_log(cons, 'sudo umount --lazy %s' % mnt) + u_boot_utils.run_and_log(cons, f'sudo umount --lazy {mnt}') if loop: - u_boot_utils.run_and_log(cons, 'sudo losetup -d %s' % loop) + u_boot_utils.run_and_log(cons, f'sudo losetup -d {loop}') if not complete: copy_prepared_image(cons, mmc_dev, fname) @@ -303,7 +303,8 @@ def setup_cros_image(cons): Return: bytes: Packed-kernel data """ - kern_part = os.path.join(cons.config.result_dir, 'kern-part-{arch}.bin') + kern_part = os.path.join(cons.config.result_dir, + f'kern-part-{arch}.bin') u_boot_utils.run_and_log( cons, f'futility vbutil_kernel --pack {kern_part} ' @@ -332,7 +333,7 @@ def setup_cros_image(cons): mmc_dev = 5 fname = os.path.join(cons.config.source_dir, f'mmc{mmc_dev}.img') - u_boot_utils.run_and_log(cons, 'qemu-img create %s 20M' % fname) + u_boot_utils.run_and_log(cons, f'qemu-img create {fname} 20M') #mnt = os.path.join(cons.config.persistent_data_dir, 'mnt') #mkdir_cond(mnt) u_boot_utils.run_and_log(cons, f'cgpt create {fname}') @@ -381,20 +382,20 @@ def setup_cros_image(cons): u_boot_utils.run_and_log(cons, f'cgpt boot -p {fname}') out = u_boot_utils.run_and_log(cons, f'cgpt show -q {fname}') - '''We expect something like this: - 8239 2048 1 Basic data - 45 2048 2 ChromeOS kernel - 8238 1 3 ChromeOS rootfs - 2093 2048 4 ChromeOS kernel - 8237 1 5 ChromeOS rootfs - 41 1 6 ChromeOS kernel - 42 1 7 ChromeOS rootfs - 4141 2048 8 Basic data - 43 1 9 ChromeOS reserved - 44 1 10 ChromeOS reserved - 40 1 11 ChromeOS firmware - 6189 2048 12 EFI System Partition - ''' + + # We expect something like this: + # 8239 2048 1 Basic data + # 45 2048 2 ChromeOS kernel + # 8238 1 3 ChromeOS rootfs + # 2093 2048 4 ChromeOS kernel + # 8237 1 5 ChromeOS rootfs + # 41 1 6 ChromeOS kernel + # 42 1 7 ChromeOS rootfs + # 4141 2048 8 Basic data + # 43 1 9 ChromeOS reserved + # 44 1 10 ChromeOS reserved + # 40 1 11 ChromeOS firmware + # 6189 2048 12 EFI System Partition # Create a dict (indexed by partition number) containing the above info for line in out.splitlines(): @@ -446,7 +447,7 @@ def setup_android_image(cons): mmc_dev = 7 fname = os.path.join(cons.config.source_dir, f'mmc{mmc_dev}.img') - u_boot_utils.run_and_log(cons, 'qemu-img create %s 20M' % fname) + u_boot_utils.run_and_log(cons, f'qemu-img create {fname} 20M') u_boot_utils.run_and_log(cons, f'cgpt create {fname}') ptr = 40 @@ -498,11 +499,12 @@ def setup_android_image(cons): with open(fname, 'wb') as outf: outf.write(disk_data) - print('wrote to {}'.format(fname)) + print(f'wrote to {fname}') return fname def setup_cedit_file(cons): + """Set up a .dtb file for use with testing expo and configuration editor""" infname = os.path.join(cons.config.source_dir, 'test/boot/files/expo_layout.dts') inhname = os.path.join(cons.config.source_dir, @@ -584,7 +586,7 @@ def test_ut(u_boot_console, ut_subtest): # ut hush hush_test_simple_dollar prints "Unknown command" on purpose. with u_boot_console.disable_check('unknown_command'): output = u_boot_console.run_command('ut ' + ut_subtest) - assert('Unknown command \'quux\' - try \'help\'' in output) + assert 'Unknown command \'quux\' - try \'help\'' in output else: output = u_boot_console.run_command('ut ' + ut_subtest) assert output.endswith('Failures: 0') diff --git a/test/test-main.c b/test/test-main.c index 63e8be0ccd1..b3d3e24cdce 100644 --- a/test/test-main.c +++ b/test/test-main.c @@ -12,6 +12,7 @@ #include <net.h> #include <of_live.h> #include <os.h> +#include <usb.h> #include <dm/ofnode.h> #include <dm/root.h> #include <dm/test.h> @@ -289,6 +290,43 @@ static int test_pre_run(struct unit_test_state *uts, struct unit_test *test) { ut_assertok(event_init()); + /* + * Remove any USB keyboard, so that we can add and remove USB devices + * in tests. + * + * For UT_TESTF_DM tests, the old driver model state is saved and + * restored across each test. Within in each test there is therefore a + * new driver model state, which means that any USB keyboard device in + * stdio points to the old state. + * + * This is fine in most cases. But if a non-UT_TESTF_DM test starts up + * USB (thus creating a stdio record pointing to the USB keyboard + * device) then when the test finishes, the new driver model state is + * freed, meaning that there is now a stale pointer in stdio. + * + * This means that any future UT_TESTF_DM test which uses stdin will + * cause the console system to call tstc() on the stale device pointer, + * causing a crash. + * + * We don't want to fix this by enabling UT_TESTF_DM for all tests as + * this causes other problems. For example, bootflow_efi relies on + * U-Boot going through a proper init - without that we don't have the + * TCG measurement working and get an error + * 'tcg2 measurement fails(0x8000000000000007)'. Once we tidy up how EFI + * runs tests (e.g. get rid of all the restarting of U-Boot) we could + * potentially make the bootstd tests set UT_TESTF_DM, but other tests + * might do the same thing. + * + * We could add a test flag to declare that USB is being used, but that + * seems unnecessary, at least for now. We could detect USB being used + * in a test, but there is no obvious drawback to clearing out stale + * pointers always. + * + * So just remove any USB keyboards from the console tables. This allows + * UT_TESTF_DM and non-UT_TESTF_DM tests to coexist happily. + */ + usb_kbd_remove_for_test(); + if (test->flags & UTF_DM) ut_assertok(dm_test_pre_run(uts)); |