summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--arch/arm/dts/r7s72100-gr-peach-u-boot.dts2
-rw-r--r--arch/arm/dts/r8a774c0-u-boot.dtsi2
-rw-r--r--arch/arm/dts/r8a77950-u-boot.dtsi2
-rw-r--r--arch/arm/dts/r8a77960-u-boot.dtsi2
-rw-r--r--arch/arm/dts/r8a77965-u-boot.dtsi2
-rw-r--r--arch/arm/dts/r8a77970-u-boot.dtsi2
-rw-r--r--arch/arm/dts/r8a77980-u-boot.dtsi2
-rw-r--r--arch/arm/dts/r8a77990-u-boot.dtsi2
-rw-r--r--arch/arm/dts/r8a77995-u-boot.dtsi2
9 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/dts/r7s72100-gr-peach-u-boot.dts b/arch/arm/dts/r7s72100-gr-peach-u-boot.dts
index f48121a9a81..3f532eced23 100644
--- a/arch/arm/dts/r7s72100-gr-peach-u-boot.dts
+++ b/arch/arm/dts/r7s72100-gr-peach-u-boot.dts
@@ -46,7 +46,7 @@
};
- rpc: rpc@ee200000 {
+ rpc: spi@ee200000 {
compatible = "renesas,rpc-r7s72100", "renesas,rpc";
reg = <0x3fefa000 0x100>, <0x18000000 0x08000000>;
bank-width = <2>;
diff --git a/arch/arm/dts/r8a774c0-u-boot.dtsi b/arch/arm/dts/r8a774c0-u-boot.dtsi
index af1c86171b6..f50816a360d 100644
--- a/arch/arm/dts/r8a774c0-u-boot.dtsi
+++ b/arch/arm/dts/r8a774c0-u-boot.dtsi
@@ -10,7 +10,7 @@
/ {
soc {
- rpc: rpc@ee200000 {
+ rpc: spi@ee200000 {
compatible = "renesas,rcar-gen3-rpc", "renesas,rpc-r8a774c0";
reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>;
clocks = <&cpg CPG_MOD 917>;
diff --git a/arch/arm/dts/r8a77950-u-boot.dtsi b/arch/arm/dts/r8a77950-u-boot.dtsi
index 5a116514646..5e449a3553c 100644
--- a/arch/arm/dts/r8a77950-u-boot.dtsi
+++ b/arch/arm/dts/r8a77950-u-boot.dtsi
@@ -13,7 +13,7 @@
/ {
soc {
- rpc: rpc@ee200000 {
+ rpc: spi@ee200000 {
compatible = "renesas,rpc-r8a7795", "renesas,rpc";
reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
clocks = <&cpg CPG_MOD 917>;
diff --git a/arch/arm/dts/r8a77960-u-boot.dtsi b/arch/arm/dts/r8a77960-u-boot.dtsi
index f1cae1c3593..9013c291f5f 100644
--- a/arch/arm/dts/r8a77960-u-boot.dtsi
+++ b/arch/arm/dts/r8a77960-u-boot.dtsi
@@ -13,7 +13,7 @@
/ {
soc {
- rpc: rpc@ee200000 {
+ rpc: spi@ee200000 {
compatible = "renesas,rpc-r8a7796", "renesas,rpc";
reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
clocks = <&cpg CPG_MOD 917>;
diff --git a/arch/arm/dts/r8a77965-u-boot.dtsi b/arch/arm/dts/r8a77965-u-boot.dtsi
index 9cc6f205375..f3c99ac99cb 100644
--- a/arch/arm/dts/r8a77965-u-boot.dtsi
+++ b/arch/arm/dts/r8a77965-u-boot.dtsi
@@ -13,7 +13,7 @@
/ {
soc {
- rpc: rpc@ee200000 {
+ rpc: spi@ee200000 {
compatible = "renesas,rpc-r8a77965", "renesas,rpc";
reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
clocks = <&cpg CPG_MOD 917>;
diff --git a/arch/arm/dts/r8a77970-u-boot.dtsi b/arch/arm/dts/r8a77970-u-boot.dtsi
index ac3c6be4adb..904fc48b228 100644
--- a/arch/arm/dts/r8a77970-u-boot.dtsi
+++ b/arch/arm/dts/r8a77970-u-boot.dtsi
@@ -13,7 +13,7 @@
/ {
soc {
- rpc: rpc@ee200000 {
+ rpc: spi@ee200000 {
compatible = "renesas,rpc-r8a77970", "renesas,rpc";
reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
clocks = <&cpg CPG_MOD 917>;
diff --git a/arch/arm/dts/r8a77980-u-boot.dtsi b/arch/arm/dts/r8a77980-u-boot.dtsi
index 365d40ac49b..34d6fcd2f01 100644
--- a/arch/arm/dts/r8a77980-u-boot.dtsi
+++ b/arch/arm/dts/r8a77980-u-boot.dtsi
@@ -13,7 +13,7 @@
/ {
soc {
- rpc: rpc@ee200000 {
+ rpc: spi@ee200000 {
compatible = "renesas,rpc-r8a77980", "renesas,rpc";
reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
clocks = <&cpg CPG_MOD 917>;
diff --git a/arch/arm/dts/r8a77990-u-boot.dtsi b/arch/arm/dts/r8a77990-u-boot.dtsi
index 6655abe8752..8c75f62f5ab 100644
--- a/arch/arm/dts/r8a77990-u-boot.dtsi
+++ b/arch/arm/dts/r8a77990-u-boot.dtsi
@@ -9,7 +9,7 @@
/ {
soc {
- rpc: rpc@ee200000 {
+ rpc: spi@ee200000 {
compatible = "renesas,rpc-r8a77990", "renesas,rpc";
reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
clocks = <&cpg CPG_MOD 917>;
diff --git a/arch/arm/dts/r8a77995-u-boot.dtsi b/arch/arm/dts/r8a77995-u-boot.dtsi
index 0917a80f096..cd9466625e2 100644
--- a/arch/arm/dts/r8a77995-u-boot.dtsi
+++ b/arch/arm/dts/r8a77995-u-boot.dtsi
@@ -9,7 +9,7 @@
/ {
soc {
- rpc: rpc@ee200000 {
+ rpc: spi@ee200000 {
compatible = "renesas,rpc-r8a77995", "renesas,rpc";
reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
clocks = <&cpg CPG_MOD 917>;