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-rw-r--r--Makefile15
-rw-r--r--arch/arm/Kconfig9
-rw-r--r--arch/arm/cpu/armv8/cache.S9
-rw-r--r--arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi4
-rw-r--r--arch/arm/dts/k3-j7200-r5-common-proc-board.dts15
-rw-r--r--arch/arm/include/asm/gic.h1
-rw-r--r--arch/arm/lib/gic_64.S10
-rw-r--r--arch/arm/mach-k3/r5/common.c2
-rw-r--r--arch/arm/mach-omap2/boot-common.c2
-rw-r--r--arch/arm/mach-versal-net/Kconfig3
-rw-r--r--configs/j7200_evm_a72_defconfig10
-rw-r--r--configs/j7200_evm_r5_defconfig9
-rw-r--r--test/py/tests/test_reset.py63
-rw-r--r--test/py/tests/test_saveenv.py137
14 files changed, 276 insertions, 13 deletions
diff --git a/Makefile b/Makefile
index 91afee668e3..6f695559d87 100644
--- a/Makefile
+++ b/Makefile
@@ -1300,12 +1300,17 @@ OBJCOPYFLAGS_u-boot-nodtb.bin := -O binary \
$(if $(CONFIG_MPC85XX_HAVE_RESET_VECTOR),$(if $(CONFIG_OF_SEPARATE),-R .bootpg -R .resetvec))
binary_size_check: u-boot-nodtb.bin FORCE
- @file_size=$(shell wc -c u-boot-nodtb.bin | awk '{print $$1}') ; \
+ @file_size=$(shell wc -c u-boot-nodtb.bin | awk '{ print $$1 }') ; \
map_size=$(shell cat u-boot.map | \
- awk '/_image_copy_start/ {start = $$1} /_image_binary_end/ {end = $$1} END {if (start != "" && end != "") print "ibase=16; " toupper(end) " - " toupper(start)}' \
- | sed 's/0X//g' \
- | bc); \
- if [ "" != "$$map_size" ]; then \
+ awk ' \
+ /_image_copy_start/ { start = $$1 } \
+ /_image_binary_end/ { end = $$1 } \
+ END { \
+ if (start != "" && end != "") \
+ print end " " start; \
+ }' \
+ | sh -c 'read end start && echo $$((end - start))'); \
+ if [ -n "$$map_size" ]; then \
if test $$map_size -ne $$file_size; then \
echo "u-boot.map shows a binary size of $$map_size" >&2 ; \
echo " but u-boot-nodtb.bin shows $$file_size" >&2 ; \
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0d978c06d5a..a0842e19330 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -124,6 +124,15 @@ config GIC_V3_ITS
ARM GICV3 has limitation, once the LPI table is enabled, LPI
configuration table can not be re-programmed, unless GICV3 reset.
+config GICV3_SUPPORT_GIC600
+ bool "ARM GICV3 GIC600 SUPPORT"
+ help
+ ARM GIC-600 IP complies with ARM GICv3 architecture, but among others,
+ implements a power control register in the Redistributor frame.This
+ register must be programmed to mark the frame as powered on, before
+ accessing other registers in the frame. Rest of initialization sequence
+ remains the same.
+
config STATIC_RELA
bool
default y if ARM64
diff --git a/arch/arm/cpu/armv8/cache.S b/arch/arm/cpu/armv8/cache.S
index 3fe935cf283..c9e46859b4f 100644
--- a/arch/arm/cpu/armv8/cache.S
+++ b/arch/arm/cpu/armv8/cache.S
@@ -20,6 +20,7 @@
*
* x0: cache level
* x1: 0 clean & invalidate, 1 invalidate only
+ * x16: FEAT_CCIDX
* x2~x9: clobbered
*/
.pushsection .text.__asm_dcache_level, "ax"
@@ -29,8 +30,14 @@ ENTRY(__asm_dcache_level)
isb /* sync change of cssidr_el1 */
mrs x6, ccsidr_el1 /* read the new cssidr_el1 */
ubfx x2, x6, #0, #3 /* x2 <- log2(cache line size)-4 */
+ cbz x16, 3f /* check for FEAT_CCIDX */
+ ubfx x3, x6, #3, #21 /* x3 <- number of cache ways - 1 */
+ ubfx x4, x6, #32, #24 /* x4 <- number of cache sets - 1 */
+ b 4f
+3:
ubfx x3, x6, #3, #10 /* x3 <- number of cache ways - 1 */
ubfx x4, x6, #13, #15 /* x4 <- number of cache sets - 1 */
+4:
add x2, x2, #4 /* x2 <- log2(cache line size) */
clz w5, w3 /* bit position of #ways */
/* x12 <- cache level << 1 */
@@ -74,6 +81,8 @@ ENTRY(__asm_dcache_all)
ubfx x11, x10, #24, #3 /* x11 <- loc */
cbz x11, finished /* if loc is 0, exit */
mov x15, lr
+ mrs x16, s3_0_c0_c7_2 /* read value of id_aa64mmfr2_el1*/
+ ubfx x16, x16, #20, #4 /* save FEAT_CCIDX identifier in x16 */
mov x0, #0 /* start flush at cache level 0 */
/* x0 <- cache level */
/* x10 <- clidr_el1 */
diff --git a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
index 60ca6d21abb..c9fee0ea99b 100644
--- a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
@@ -195,6 +195,10 @@
&ospi0 {
bootph-all;
+
+ flash@0 {
+ bootph-all;
+ };
};
&serdes_ln_ctrl {
diff --git a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
index 018faaa13b6..fb7e2e50239 100644
--- a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
@@ -52,7 +52,7 @@
};
&mcu_timer0 {
- clock-frequency = <25000000>;
+ clock-frequency = <250000000>;
bootph-pre-ram;
};
@@ -83,3 +83,16 @@
&wkup_vtm0 {
bootph-pre-ram;
};
+
+&ospi0 {
+ reg = <0x0 0x47040000 0x0 0x100>,
+ <0x0 0x50000000 0x0 0x8000000>;
+};
+
+&mcu_ringacc {
+ ti,sci = <&dm_tifs>;
+};
+
+&mcu_udmap {
+ ti,sci = <&dm_tifs>;
+};
diff --git a/arch/arm/include/asm/gic.h b/arch/arm/include/asm/gic.h
index bd3a80cdf70..fb64ba076d7 100644
--- a/arch/arm/include/asm/gic.h
+++ b/arch/arm/include/asm/gic.h
@@ -57,6 +57,7 @@
#define GICR_TYPER 0x0008
#define GICR_STATUSR 0x0010
#define GICR_WAKER 0x0014
+#define GICR_PWRR 0x0024
#define GICR_SETLPIR 0x0040
#define GICR_CLRLPIR 0x0048
#define GICR_SEIR 0x0068
diff --git a/arch/arm/lib/gic_64.S b/arch/arm/lib/gic_64.S
index 86cd882fc75..7fa48648d9d 100644
--- a/arch/arm/lib/gic_64.S
+++ b/arch/arm/lib/gic_64.S
@@ -92,8 +92,16 @@ ENTRY(gic_init_secure_percpu)
add x9, x9, #(2 << 16)
b 1b
+2:
+#if defined(CONFIG_GICV3_SUPPORT_GIC600)
+ mov w10, #0x0 /* Power on redistributor */
+ str w10, [x9, GICR_PWRR]
+5: ldr w10, [x9, GICR_PWRR] /* Wait until the power on state is reflected */
+ tbnz w10, #1, 5b /* If RDPD == 0 then powered on */
+#endif
+
/* x9: ReDistributor Base Address of Current CPU */
-2: mov w10, #~0x2
+ mov w10, #~0x2
ldr w11, [x9, GICR_WAKER]
and w11, w11, w10 /* Clear ProcessorSleep */
str w11, [x9, GICR_WAKER]
diff --git a/arch/arm/mach-k3/r5/common.c b/arch/arm/mach-k3/r5/common.c
index 7309573a3fa..c02f8d33099 100644
--- a/arch/arm/mach-k3/r5/common.c
+++ b/arch/arm/mach-k3/r5/common.c
@@ -70,7 +70,7 @@ int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr)
char *name = NULL;
int size = 0;
- if (!IS_ENABLED(CONFIG_FS_LOADER))
+ if (!CONFIG_IS_ENABLED(FS_LOADER))
return 0;
*loadaddr = 0;
diff --git a/arch/arm/mach-omap2/boot-common.c b/arch/arm/mach-omap2/boot-common.c
index 57917da25cf..aa0ab13d5fb 100644
--- a/arch/arm/mach-omap2/boot-common.c
+++ b/arch/arm/mach-omap2/boot-common.c
@@ -190,7 +190,7 @@ int load_firmware(char *name_fw, u32 *loadaddr)
struct udevice *fsdev;
int size = 0;
- if (!IS_ENABLED(CONFIG_FS_LOADER))
+ if (!CONFIG_IS_ENABLED(FS_LOADER))
return 0;
if (!*loadaddr)
diff --git a/arch/arm/mach-versal-net/Kconfig b/arch/arm/mach-versal-net/Kconfig
index 1b5339993f8..54fb93aeb53 100644
--- a/arch/arm/mach-versal-net/Kconfig
+++ b/arch/arm/mach-versal-net/Kconfig
@@ -35,6 +35,9 @@ config SYS_MEM_RSVD_FOR_MMU
config GICV3
def_bool y
+config GICV3_SUPPORT_GIC600
+ def_bool y
+
config SYS_MALLOC_LEN
default 0x2000000
diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig
index 743d090b935..0f2e83dfeec 100644
--- a/configs/j7200_evm_a72_defconfig
+++ b/configs/j7200_evm_a72_defconfig
@@ -10,6 +10,8 @@ CONFIG_SOC_K3_J721E=y
CONFIG_TARGET_J7200_A72_EVM=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000
+CONFIG_SF_DEFAULT_SPEED=25000000
+CONFIG_SF_DEFAULT_MODE=0
CONFIG_ENV_SIZE=0x20000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
@@ -60,7 +62,7 @@ CONFIG_SPL_RAM_DEVICE=y
# CONFIG_SPL_SPI_FLASH_TINY is not set
CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x300000
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_DFU=y
@@ -139,7 +141,11 @@ CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_SOFT_RESET=y
+CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_S28HX_T=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_SPI_FLASH_MTD=y
CONFIG_MULTIPLEXER=y
diff --git a/configs/j7200_evm_r5_defconfig b/configs/j7200_evm_r5_defconfig
index 8a238f4d2b5..d5b44e37f01 100644
--- a/configs/j7200_evm_r5_defconfig
+++ b/configs/j7200_evm_r5_defconfig
@@ -10,6 +10,8 @@ CONFIG_K3_EARLY_CONS=y
CONFIG_TARGET_J7200_R5_EVM=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41cf5bfc
+CONFIG_SF_DEFAULT_SPEED=25000000
+CONFIG_SF_DEFAULT_MODE=0
CONFIG_ENV_SIZE=0x20000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
@@ -60,7 +62,7 @@ CONFIG_SPL_REMOTEPROC=y
# CONFIG_SPL_SPI_FLASH_TINY is not set
CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_DFU=y
@@ -116,7 +118,10 @@ CONFIG_SYS_FLASH_CFI=y
CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_SOFT_RESET=y
+CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_S28HX_T=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_GENERIC is not set
CONFIG_SPL_PINCTRL=y
diff --git a/test/py/tests/test_reset.py b/test/py/tests/test_reset.py
new file mode 100644
index 00000000000..00fc31da57d
--- /dev/null
+++ b/test/py/tests/test_reset.py
@@ -0,0 +1,63 @@
+# SPDX-License-Identifier: GPL-2.0
+# (C) Copyright 2023, Advanced Micro Devices, Inc.
+
+"""
+Note: This test doesn't rely on boardenv_* configuration value but they can
+change test behavior.
+
+For example:
+
+# Setup env__reset_test_skip to True if reset test is not possible or desired
+# and should be skipped.
+env__reset_test_skip = True
+
+# Setup env__reset_test to set the bootmode if 'modeboot' u-boot environment
+# variable is not set. Test will be skipped if bootmode is not set in both
+# places i.e, boardenv and modeboot u-boot environment variable
+env__reset_test = {
+ 'bootmode': 'qspiboot',
+}
+
+# This test will be also skipped if the bootmode is detected to JTAG.
+"""
+
+import pytest
+import test_000_version
+
+def setup_reset_env(u_boot_console):
+ if u_boot_console.config.env.get('env__reset_test_skip', False):
+ pytest.skip('reset test is not enabled')
+
+ output = u_boot_console.run_command('echo $modeboot')
+ if output:
+ bootmode = output
+ else:
+ f = u_boot_console.config.env.get('env__reset_test', None)
+ if not f:
+ pytest.skip('bootmode cannot be determined')
+ bootmode = f.get('bootmode', 'jtagboot')
+
+ if 'jtag' in bootmode:
+ pytest.skip('skipping reset test due to jtag bootmode')
+
+@pytest.mark.buildconfigspec('hush_parser')
+def test_reset(u_boot_console):
+ """Test the reset command in non-JTAG bootmode.
+ It does COLD reset, which resets CPU, DDR and peripherals
+ """
+ setup_reset_env(u_boot_console)
+ u_boot_console.run_command('reset', wait_for_reboot=True)
+
+ # Checks the u-boot command prompt's functionality after reset
+ test_000_version.test_version(u_boot_console)
+
+@pytest.mark.buildconfigspec('hush_parser')
+def test_reset_w(u_boot_console):
+ """Test the reset -w command in non-JTAG bootmode.
+ It does WARM reset, which resets CPU but keep DDR/peripherals active.
+ """
+ setup_reset_env(u_boot_console)
+ u_boot_console.run_command('reset -w', wait_for_reboot=True)
+
+ # Checks the u-boot command prompt's functionality after reset
+ test_000_version.test_version(u_boot_console)
diff --git a/test/py/tests/test_saveenv.py b/test/py/tests/test_saveenv.py
new file mode 100644
index 00000000000..7faa3bdf93d
--- /dev/null
+++ b/test/py/tests/test_saveenv.py
@@ -0,0 +1,137 @@
+# SPDX-License-Identifier: GPL-2.0
+# (C) Copyright 2023, Advanced Micro Devices, Inc.
+
+"""
+Note: This test doesn't rely on boardenv_* configuration value but they can
+change test behavior.
+
+For example:
+
+# Setup env__saveenv_test_skip to True if saveenv test is not possible or
+# desired and should be skipped.
+env__saveenv_test_skip = True
+
+# Setup env__saveenv_test to set the bootmode if 'modeboot' u-boot environment
+# variable is not set. Test will be skipped if bootmode is not set in both
+# places i.e, boardenv and modeboot u-boot environment variable
+env__saveenv_test = {
+ 'bootmode': 'qspiboot',
+}
+
+# This test will be also skipped if the bootmode is detected to JTAG.
+"""
+
+import pytest
+import random
+import ipaddress
+import string
+import uuid
+
+# Setup the env
+def setup_saveenv_env(u_boot_console):
+ if u_boot_console.config.env.get('env__saveenv_test_skip', False):
+ pytest.skip('saveenv test is not enabled')
+
+ output = u_boot_console.run_command('echo $modeboot')
+ if output:
+ bootmode = output
+ else:
+ f = u_boot_console.config.env.get('env__saveenv_test', None)
+ if not f:
+ pytest.skip('bootmode cannot be determined')
+ bootmode = f.get('bootmode', 'jtagboot')
+
+ if 'jtag' in bootmode:
+ pytest.skip('skipping saveenv test due to jtag bootmode')
+
+# Check return code
+def ret_code(u_boot_console):
+ return u_boot_console.run_command('echo $?')
+
+# Verify env variable
+def check_env(u_boot_console, var_name, var_value):
+ if var_value:
+ output = u_boot_console.run_command(f'printenv {var_name}')
+ var_value = str(var_value)
+ if (var_value.startswith("'") and var_value.endswith("'")) or (
+ var_value.startswith('"') and var_value.endswith('"')
+ ):
+ var_value = var_value.split(var_value[-1])[1]
+ assert var_value in output
+ assert ret_code(u_boot_console).endswith('0')
+ else:
+ u_boot_console.p.send(f'printenv {var_name}\n')
+ output = u_boot_console.p.expect(['not defined'])
+ assert output == 0
+ assert ret_code(u_boot_console).endswith('1')
+
+# Set env variable
+def set_env(u_boot_console, var_name, var_value):
+ u_boot_console.run_command(f'setenv {var_name} {var_value}')
+ assert ret_code(u_boot_console).endswith('0')
+ check_env(u_boot_console, var_name, var_value)
+
+@pytest.mark.buildconfigspec('cmd_saveenv')
+@pytest.mark.buildconfigspec('hush_parser')
+def test_saveenv(u_boot_console):
+ """Test the saveenv command in non-JTAG bootmode.
+ It saves the U-Boot environment in persistent storage.
+ """
+ setup_saveenv_env(u_boot_console)
+
+ # Set env for random mac address
+ rand_mac = '%02x:%02x:%02x:%02x:%02x:%02x' % (
+ random.randint(0, 255),
+ random.randint(0, 255),
+ random.randint(0, 255),
+ random.randint(0, 255),
+ random.randint(0, 255),
+ random.randint(0, 255),
+ )
+ set_env(u_boot_console, 'mac_addr', rand_mac)
+
+ # Set env for random IPv4 address
+ rand_ipv4 = ipaddress.IPv4Address._string_from_ip_int(
+ random.randint(0, ipaddress.IPv4Address._ALL_ONES)
+ )
+ set_env(u_boot_console, 'ipv4_addr', rand_ipv4)
+
+ # Set env for random IPv6 address
+ rand_ipv6 = ipaddress.IPv6Address._string_from_ip_int(
+ random.randint(0, ipaddress.IPv6Address._ALL_ONES)
+ )
+ set_env(u_boot_console, 'ipv6_addr', rand_ipv6)
+
+ # Set env for random number
+ rand_num = random.randrange(1, 10**9)
+ set_env(u_boot_console, 'num_var', rand_num)
+
+ # Set env for uuid
+ uuid_str = uuid.uuid4().hex.lower()
+ set_env(u_boot_console, 'uuid_var', uuid_str)
+
+ # Set env for random string including special characters
+ sc = "!#%&()*+,-./:;<=>?@[\\]^_`{|}~"
+ rand_str = ''.join(
+ random.choices(' ' + string.ascii_letters + sc + string.digits, k=300)
+ )
+ set_env(u_boot_console, 'str_var', f'"{rand_str}"')
+
+ # Set env for empty string
+ set_env(u_boot_console, 'empty_var', '')
+
+ # Save the env variables
+ u_boot_console.run_command('saveenv')
+ assert ret_code(u_boot_console).endswith('0')
+
+ # Reboot
+ u_boot_console.run_command('reset', wait_for_reboot=True)
+
+ # Verify the saved env variables
+ check_env(u_boot_console, 'mac_addr', rand_mac)
+ check_env(u_boot_console, 'ipv4_addr', rand_ipv4)
+ check_env(u_boot_console, 'ipv6_addr', rand_ipv6)
+ check_env(u_boot_console, 'num_var', rand_num)
+ check_env(u_boot_console, 'uuid_var', uuid_str)
+ check_env(u_boot_console, 'str_var', rand_str)
+ check_env(u_boot_console, 'empty_var', '')
generated by cgit v1.2.3 (git 2.0.4) at 2025-07-24 15:01:33 +0000