diff options
| -rw-r--r-- | arch/riscv/cpu/fu540/spl.c | 15 |
1 files changed, 0 insertions, 15 deletions
diff --git a/arch/riscv/cpu/fu540/spl.c b/arch/riscv/cpu/fu540/spl.c index 1740ef98b6b..45657b79096 100644 --- a/arch/riscv/cpu/fu540/spl.c +++ b/arch/riscv/cpu/fu540/spl.c @@ -6,9 +6,6 @@ #include <dm.h> #include <log.h> -#include <asm/csr.h> - -#define CSR_U74_FEATURE_DISABLE 0x7c1 int spl_soc_init(void) { @@ -24,15 +21,3 @@ int spl_soc_init(void) return 0; } - -void harts_early_init(void) -{ - /* - * Feature Disable CSR - * - * Clear feature disable CSR to '0' to turn on all features for - * each core. This operation must be in M-mode. - */ - if (CONFIG_IS_ENABLED(RISCV_MMODE)) - csr_write(CSR_U74_FEATURE_DISABLE, 0); -} |