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Diffstat (limited to 'arch/arm/cpu/armv8/fsl-layerscape/spl.c')
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/spl.c34
1 files changed, 0 insertions, 34 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
index 033f48d04b9..232adfa843a 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
@@ -21,7 +21,6 @@
#include <i2c.h>
#include <fsl_csu.h>
#include <asm/arch/fdt.h>
-#include <asm/arch/ppa.h>
#include <asm/arch/soc.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -62,9 +61,6 @@ void spl_board_init(void)
#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
enable_layerscape_ns_access();
#endif
-#ifdef CONFIG_SPL_FSL_LS_PPA
- ppa_init();
-#endif
}
void tzpc_init(void)
@@ -120,36 +116,6 @@ void board_init_f(ulong dummy)
init_func_vid();
#endif
dram_init();
-#ifdef CONFIG_SPL_FSL_LS_PPA
-#ifndef CFG_SYS_MEM_RESERVE_SECURE
-#error Need secure RAM for PPA
-#endif
- /*
- * Secure memory location is determined in dram_init_banksize().
- * gd->ram_size is deducted by the size of secure ram.
- */
- dram_init_banksize();
-
- /*
- * After dram_init_bank_size(), we know U-Boot only uses the first
- * memory bank regardless how big the memory is.
- */
- gd->ram_top = gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size;
-
- /*
- * If PPA is loaded, U-Boot will resume running at EL2.
- * Cache and MMU will be enabled. Need a place for TLB.
- * U-Boot will be relocated to the end of available memory
- * in first bank. At this point, we cannot know how much
- * memory U-Boot uses. Put TLB table lower by SPL_TLB_SETBACK
- * to avoid overlapping. As soon as the RAM version U-Boot sets
- * up new MMU, this space is no longer needed.
- */
- gd->ram_top -= SPL_TLB_SETBACK;
- gd->arch.tlb_size = PGTABLE_SIZE;
- gd->arch.tlb_addr = (gd->ram_top - gd->arch.tlb_size) & ~(0x10000 - 1);
- gd->arch.tlb_allocated = gd->arch.tlb_addr;
-#endif /* CONFIG_SPL_FSL_LS_PPA */
#if defined(CONFIG_QSPI_AHB_INIT) && defined(CONFIG_QSPI_BOOT)
qspi_ahb_init();
#endif