diff options
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r-- | arch/arm/cpu/arm920t/Makefile | 2 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/Makefile | 2 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/kona-common/Makefile | 8 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/kona-common/clk-stubs.c | 25 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/kona-common/hwinit-common.c | 17 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/kona-common/reset.S | 25 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/kona-common/s_init.c | 11 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/ls102xa/Kconfig | 9 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/ls102xa/soc.c | 2 | ||||
-rw-r--r-- | arch/arm/cpu/armv8/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 2 | ||||
-rw-r--r-- | arch/arm/cpu/armv8/fwcall.c | 2 | ||||
-rw-r--r-- | arch/arm/cpu/armv8/psci.S | 2 |
13 files changed, 14 insertions, 94 deletions
diff --git a/arch/arm/cpu/arm920t/Makefile b/arch/arm/cpu/arm920t/Makefile index b70822c67ab..5ac3740621c 100644 --- a/arch/arm/cpu/arm920t/Makefile +++ b/arch/arm/cpu/arm920t/Makefile @@ -7,8 +7,6 @@ extra-y = start.o obj-y += cpu.o -obj-$(CONFIG_IMX) += imx/ - # some files can only build in ARM mode ifdef CONFIG_$(SPL_)SYS_THUMB_BUILD diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index bfbd85ae64e..653eef8ad79 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -26,7 +26,6 @@ obj-$(CONFIG_ARMV7_NONSEC) += nonsec_virt.o virt-v7.o virt-dt.o obj-$(CONFIG_ARMV7_PSCI) += psci.o psci-common.o obj-$(CONFIG_IPROC) += iproc-common/ -obj-$(CONFIG_KONA) += kona-common/ obj-$(CONFIG_SYS_ARCH_TIMER) += arch_timer.o ifneq (,$(filter s5pc1xx exynos,$(SOC))) @@ -38,7 +37,6 @@ obj-$(if $(filter bcm281xx,$(SOC)),y) += bcm281xx/ obj-$(if $(filter bcmcygnus,$(SOC)),y) += bcmcygnus/ obj-$(if $(filter bcmnsp,$(SOC)),y) += bcmnsp/ obj-$(if $(filter ls102xa,$(SOC)),y) += ls102xa/ -obj-$(CONFIG_RMOBILE) += rmobile/ obj-$(if $(filter stv0991,$(SOC)),y) += stv0991/ obj-$(CONFIG_ARCH_SUNXI) += sunxi/ obj-$(CONFIG_VF610) += vf610/ diff --git a/arch/arm/cpu/armv7/kona-common/Makefile b/arch/arm/cpu/armv7/kona-common/Makefile deleted file mode 100644 index 56de3d18e0e..00000000000 --- a/arch/arm/cpu/armv7/kona-common/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright 2013 Broadcom Corporation. - -obj-y += s_init.o -obj-y += hwinit-common.o -obj-y += clk-stubs.o -obj-${CONFIG_KONA_RESET_S} += reset.o diff --git a/arch/arm/cpu/armv7/kona-common/clk-stubs.c b/arch/arm/cpu/armv7/kona-common/clk-stubs.c deleted file mode 100644 index 4eddaca8879..00000000000 --- a/arch/arm/cpu/armv7/kona-common/clk-stubs.c +++ /dev/null @@ -1,25 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2013 Broadcom Corporation. - */ - -#include <common.h> - -/* - * These weak functions are available to kona architectures that don't - * require clock enables from the driver code. - */ -int __weak clk_sdio_enable(void *base, u32 rate, u32 *actual_ratep) -{ - return 0; -} - -int __weak clk_bsc_enable(void *base) -{ - return 0; -} - -int __weak clk_usb_otg_enable(void *base) -{ - return 0; -} diff --git a/arch/arm/cpu/armv7/kona-common/hwinit-common.c b/arch/arm/cpu/armv7/kona-common/hwinit-common.c deleted file mode 100644 index cfc7c9fbc64..00000000000 --- a/arch/arm/cpu/armv7/kona-common/hwinit-common.c +++ /dev/null @@ -1,17 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2013 Broadcom Corporation. - */ - -#include <common.h> -#include <cpu_func.h> -#include <asm/cache.h> -#include <linux/sizes.h> - -#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) -void enable_caches(void) -{ - /* Enable D-cache. I-cache is already enabled in start.S */ - dcache_enable(); -} -#endif diff --git a/arch/arm/cpu/armv7/kona-common/reset.S b/arch/arm/cpu/armv7/kona-common/reset.S deleted file mode 100644 index eea835b341c..00000000000 --- a/arch/arm/cpu/armv7/kona-common/reset.S +++ /dev/null @@ -1,25 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2013 Broadcom Corporation. - */ - -.globl reset_cpu -reset_cpu: - ldr r1, =0x35001f00 - ldr r2, [r1] - ldr r4, =0x80000000 - and r4, r2, r4 - ldr r3, =0xA5A500 - orr r4, r4, r3 - orr r4, r4, #0x1 - - str r4, [r1] - - ldr r1, =0x35001f04 - ldr r2, [r1] - ldr r4, =0x80000000 - and r4, r2, r4 - str r4, [r1] - -_loop_forever: - b _loop_forever diff --git a/arch/arm/cpu/armv7/kona-common/s_init.c b/arch/arm/cpu/armv7/kona-common/s_init.c deleted file mode 100644 index 778b9176fa2..00000000000 --- a/arch/arm/cpu/armv7/kona-common/s_init.c +++ /dev/null @@ -1,11 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2014 Broadcom Corporation. - */ - -/* - * Early system init. Currently empty. - */ -void s_init(void) -{ -} diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig index 0edcf4c5ee7..3e292bf70e1 100644 --- a/arch/arm/cpu/armv7/ls102xa/Kconfig +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig @@ -96,4 +96,13 @@ config SYS_FSL_HAS_CCI400 config SYS_FSL_ERRATUM_A008407 bool +config SYS_FSL_QSPI_SKIP_CLKSEL + bool "Skip setting QSPI clock during SoC init" + default 0 + help + To improve startup times when booting from QSPI flash, the QSPI + frequency can be set very early in the boot process. If this option + is enabled, the QSPI frequency will not be changed by U-Boot during + SoC initialization. + endmenu diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c index 1dafa3c1b45..84d4ea3a8f4 100644 --- a/arch/arm/cpu/armv7/ls102xa/soc.c +++ b/arch/arm/cpu/armv7/ls102xa/soc.c @@ -170,7 +170,7 @@ int arch_soc_init(void) enable_layerscape_ns_access(); #endif -#ifdef CONFIG_FSL_QSPI +#if defined(CONFIG_FSL_QSPI) && !defined(CONFIG_SYS_FSL_QSPI_SKIP_CLKSEL) out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL); #endif diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile index 2e4bf9e038c..bba4f570dbb 100644 --- a/arch/arm/cpu/armv8/Makefile +++ b/arch/arm/cpu/armv8/Makefile @@ -39,7 +39,6 @@ obj-$(CONFIG_SPL_RECOVER_DATA_SECTION) += spl_data.o endif obj-$(CONFIG_FSL_LAYERSCAPE) += fsl-layerscape/ -obj-$(CONFIG_S32V234) += s32v234/ obj-$(CONFIG_TARGET_HIKEY) += hisilicon/ obj-$(CONFIG_ARMV8_PSCI) += psci.o obj-$(CONFIG_TARGET_BCMNS3) += bcmns3/ diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index b0e86785337..12d31184ad9 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -760,7 +760,7 @@ enum boot_src __get_boot_src(u32 porsr1) } #endif - if (CONFIG_IS_ENABLED(SYS_FSL_ERRATUM_A010539) && !rcw_src) + if (IS_ENABLED(CONFIG_SYS_FSL_ERRATUM_A010539) && !rcw_src) src = BOOT_SOURCE_QSPI_NOR; debug("%s: src 0x%x\n", __func__, src); diff --git a/arch/arm/cpu/armv8/fwcall.c b/arch/arm/cpu/armv8/fwcall.c index 16914dc1eed..87de09979b1 100644 --- a/arch/arm/cpu/armv8/fwcall.c +++ b/arch/arm/cpu/armv8/fwcall.c @@ -103,7 +103,7 @@ void __noreturn psci_system_reset2(u32 reset_level, u32 cookie) { struct pt_regs regs; - regs.regs[0] = ARM_PSCI_0_2_FN64_SYSTEM_RESET2; + regs.regs[0] = ARM_PSCI_1_1_FN64_SYSTEM_RESET2; regs.regs[1] = PSCI_RESET2_TYPE_VENDOR | reset_level; regs.regs[2] = cookie; if (use_smc_for_psci) diff --git a/arch/arm/cpu/armv8/psci.S b/arch/arm/cpu/armv8/psci.S index 6aece119871..ab8b3df3416 100644 --- a/arch/arm/cpu/armv8/psci.S +++ b/arch/arm/cpu/armv8/psci.S @@ -81,6 +81,7 @@ PSCI_DEFAULT(psci_node_hw_state_64) PSCI_DEFAULT(psci_system_suspend_64) PSCI_DEFAULT(psci_stat_residency_64) PSCI_DEFAULT(psci_stat_count_64) +PSCI_DEFAULT(psci_system_reset2_64) .align 3 _psci_64_table: @@ -94,6 +95,7 @@ PSCI_TABLE(ARM_PSCI_1_0_FN64_NODE_HW_STATE, psci_node_hw_state_64) PSCI_TABLE(ARM_PSCI_1_0_FN64_SYSTEM_SUSPEND, psci_system_suspend_64) PSCI_TABLE(ARM_PSCI_1_0_FN64_STAT_RESIDENCY, psci_stat_residency_64) PSCI_TABLE(ARM_PSCI_1_0_FN64_STAT_COUNT, psci_stat_count_64) +PSCI_TABLE(ARM_PSCI_1_1_FN64_SYSTEM_RESET2, psci_system_reset2_64) PSCI_TABLE(0, 0) .macro psci_enter |