diff options
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/arm920t/Makefile | 2 | ||||
| -rw-r--r-- | arch/arm/cpu/arm926ejs/Makefile | 2 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/Makefile | 2 | ||||
| -rw-r--r-- | arch/arm/cpu/armv8/Makefile | 4 | ||||
| -rw-r--r-- | arch/arm/cpu/armv8/fel_utils.S | 9 | ||||
| -rw-r--r-- | arch/arm/cpu/armv8/spin_table.c | 1 | ||||
| -rw-r--r-- | arch/arm/cpu/armv8/start.S | 3 |
7 files changed, 18 insertions, 5 deletions
diff --git a/arch/arm/cpu/arm920t/Makefile b/arch/arm/cpu/arm920t/Makefile index 06456fe5a81..9929b5ab878 100644 --- a/arch/arm/cpu/arm920t/Makefile +++ b/arch/arm/cpu/arm920t/Makefile @@ -9,6 +9,6 @@ obj-y += cpu.o # some files can only build in ARM mode -ifdef CONFIG_$(XPL_)SYS_THUMB_BUILD +ifdef CONFIG_$(PHASE_)SYS_THUMB_BUILD CFLAGS_cpu.o := -marm endif diff --git a/arch/arm/cpu/arm926ejs/Makefile b/arch/arm/cpu/arm926ejs/Makefile index 750cb94dc6e..41d8af506d8 100644 --- a/arch/arm/cpu/arm926ejs/Makefile +++ b/arch/arm/cpu/arm926ejs/Makefile @@ -17,7 +17,7 @@ obj-$(CONFIG_ARCH_SUNXI) += sunxi/ # some files can only build in ARM or THUMB2, not THUMB1 -ifdef CONFIG_$(XPL_)SYS_THUMB_BUILD +ifdef CONFIG_$(PHASE_)SYS_THUMB_BUILD ifndef CONFIG_HAS_THUMB2 CFLAGS_cpu.o := -marm diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index 6461f5f5bde..318a71f24b1 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -17,7 +17,7 @@ obj-$(CONFIG_EFI_LOADER) += sctlr.o obj-$(CONFIG_ARMV7_NONSEC) += exception_level.o endif -ifneq ($(CONFIG_$(XPL_)SKIP_LOWLEVEL_INIT),y) +ifneq ($(CONFIG_$(PHASE_)SKIP_LOWLEVEL_INIT),y) obj-y += lowlevel_init.o endif diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile index b4126c61df1..dd0191a12fa 100644 --- a/arch/arm/cpu/armv8/Makefile +++ b/arch/arm/cpu/armv8/Makefile @@ -9,7 +9,7 @@ obj-y += cpu.o ifndef CONFIG_$(PHASE_)TIMER obj-$(CONFIG_SYS_ARCH_TIMER) += generic_timer.o endif -ifndef CONFIG_$(XPL_)SYS_DCACHE_OFF +ifndef CONFIG_$(PHASE_)SYS_DCACHE_OFF obj-y += cache_v8.o obj-y += cache.o endif @@ -33,7 +33,7 @@ obj-$(CONFIG_ACPI_PARKING_PROTOCOL) += acpi_park_v8.o else obj-$(CONFIG_ARCH_SUNXI) += fel_utils.o endif -obj-$(CONFIG_$(XPL_)ARMV8_SEC_FIRMWARE_SUPPORT) += sec_firmware.o sec_firmware_asm.o +obj-$(CONFIG_$(PHASE_)ARMV8_SEC_FIRMWARE_SUPPORT) += sec_firmware.o sec_firmware_asm.o ifdef CONFIG_XPL_BUILD obj-$(CONFIG_SPL_RECOVER_DATA_SECTION) += spl_data.o diff --git a/arch/arm/cpu/armv8/fel_utils.S b/arch/arm/cpu/armv8/fel_utils.S index f7707acdf1a..044a7c16cc5 100644 --- a/arch/arm/cpu/armv8/fel_utils.S +++ b/arch/arm/cpu/armv8/fel_utils.S @@ -74,10 +74,19 @@ back_in_32: .word 0xf57ff06f // isb .word 0xe590d000 // ldr sp, [r0] .word 0xe590e004 // ldr lr, [r0, #4] + .word 0xe5901014 // ldr r1, [r0, #20] + .word 0xe121f301 // msr SP_irq, r1 .word 0xe5901010 // ldr r1, [r0, #16] .word 0xee0c1f10 // mcr 15, 0, r1, cr12, cr0, {0} ; VBAR .word 0xe590100c // ldr r1, [r0, #12] .word 0xee011f10 // mcr 15, 0, r1, cr1, cr0, {0} ; SCTLR .word 0xf57ff06f // isb +#ifdef CONFIG_MACH_SUN55I_A523 + .word 0xe5901018 // ldr r1, [r0, #24] + .word 0xee041f16 // mcr 15, 0, r1, cr4, cr6, {0}; ICC_PMR + .word 0xe590101c // ldr r1, [r0, #28] + .word 0xee0c1ffc // mcr 15, 0, r1, cr12, cr12, {7}; ICC_IGRPEN1 +#endif + .word 0xe12fff1e // bx lr ; return to FEL ENDPROC(return_to_fel) diff --git a/arch/arm/cpu/armv8/spin_table.c b/arch/arm/cpu/armv8/spin_table.c index 485294b88d0..5ba20efa33b 100644 --- a/arch/arm/cpu/armv8/spin_table.c +++ b/arch/arm/cpu/armv8/spin_table.c @@ -4,6 +4,7 @@ * Author: Masahiro Yamada <yamada.masahiro@socionext.com> */ +#include <errno.h> #include <linux/libfdt.h> #include <asm/spin_table.h> diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index d3a8a7c4787..829a620faeb 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -334,6 +334,9 @@ WEAK(lowlevel_init) /* * All slaves will enter EL2 and optionally EL1. */ +#if defined(CONFIG_ARMV8_PSCI) && !defined(CONFIG_XPL_BUILD) + bl psci_setup_vectors +#endif adr x4, lowlevel_in_el2 ldr x5, =ES_TO_AARCH64 bl armv8_switch_to_el2 |