11 files changed, 33 insertions, 19 deletions
diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig
index 4eb34b7b449..ab86d642eee 100644
--- a/arch/arm/cpu/armv7/Kconfig
+++ b/arch/arm/cpu/armv7/Kconfig
@@ -36,7 +36,8 @@ config ARMV7_SECURE_BASE
 	hex "Base address for secure mode memory"
 	depends on HAS_ARMV7_SECURE_BASE
 	default 0xfff00000 if TEGRA124
-	default 0x2ffc0000 if ARCH_STM32MP
+	default 0x2ffe0000 if STM32MP13X
+	default 0x2ffc0000 if STM32MP15X
 	default 0x2f000000 if ARCH_MX7ULP
 	default 0x10010000 if ARCH_LS1021A
 	default 0x00900000 if ARCH_MX7
diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig
index 46ace7e5fd6..5c8839583aa 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -1,5 +1,6 @@
 config ARCH_LS1021A
 	bool
+	select ARCH_MISC_INIT if FSL_CAAM
 	select FSL_DEVICE_DISABLE
 	select FSL_IFC if !QSPI_BOOT && !SD_BOOT_QSPI
 	select LS102XA_STREAM_ID
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 959251957de..833486817f8 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -182,6 +182,8 @@ saved_args:
 	.word 0
 	.endr
 END(saved_args)
+
+	.section .text
 #endif
 
 #ifdef CONFIG_ARMV7_LPAE
diff --git a/arch/arm/cpu/armv7m/start.S b/arch/arm/cpu/armv7m/start.S
index 0c07f2140c7..a439404a248 100644
--- a/arch/arm/cpu/armv7m/start.S
+++ b/arch/arm/cpu/armv7m/start.S
@@ -4,13 +4,19 @@
  * Kamil Lulko, <kamil.lulko@gmail.com>
  */
 
+#include <linux/linkage.h>
 #include <asm/assembler.h>
 
-.globl	reset
-.type reset, %function
-reset:
-	W(b)	_main
+/*
+ * Startup code (reset vector)
+ */
+ENTRY(reset)
+	W(b)	_main	@ Jump to _main (C runtime crt0.S)
+ENDPROC(reset)
 
-.globl	c_runtime_cpu_setup
-c_runtime_cpu_setup:
-	mov	pc, lr
+/*
+ * Setup CPU for C runtime
+ */
+ENTRY(c_runtime_cpu_setup)
+	mov pc, lr			@ Jump back to caller
+ENDPROC(c_runtime_cpu_setup)
diff --git a/arch/arm/cpu/armv8/fel_utils.S b/arch/arm/cpu/armv8/fel_utils.S
index 044a7c16cc5..ccddfaaf04c 100644
--- a/arch/arm/cpu/armv8/fel_utils.S
+++ b/arch/arm/cpu/armv8/fel_utils.S
@@ -41,10 +41,11 @@ ENTRY(return_to_fel)
 	str	w2, [x1]
 
 	ldr	w0, =0xfa50392f		// CPU hotplug magic
-#ifdef CONFIG_MACH_SUN50I_H616
+#if defined(CONFIG_MACH_SUN50I_H616) || defined(CONFIG_MACH_SUN50I_A133) || \
+    defined(CONFIG_MACH_SUN55I_A523)
 	ldr	w2, =(SUNXI_R_CPUCFG_BASE + 0x1c0)
 	str	w0, [x2], #0x4
-#elif CONFIG_MACH_SUN50I_H6
+#elif defined(CONFIG_MACH_SUN50I_H6)
 	ldr	w2, =(SUNXI_RTC_BASE + 0x1b8)	// BOOT_CPU_HP_FLAG_REG
 	str	w0, [x2], #0x4
 #else
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 080fe3fc327..20883fe6825 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -77,11 +77,11 @@ config ARCH_LS1043A
 	select SYS_FSL_DDR_BE
 	select SYS_FSL_DDR_VER_50
 	select SYS_FSL_ERRATUM_A008850 if !TFABOOT
-	select SYS_FSL_ERRATUM_A008997
-	select SYS_FSL_ERRATUM_A009008
+	select SYS_FSL_ERRATUM_A008997 if USB
+	select SYS_FSL_ERRATUM_A009008 if USB
 	select SYS_FSL_ERRATUM_A009660 if !TFABOOT
 	select SYS_FSL_ERRATUM_A009663 if !TFABOOT
-	select SYS_FSL_ERRATUM_A009798
+	select SYS_FSL_ERRATUM_A009798 if USB
 	select SYS_FSL_ERRATUM_A009942 if !TFABOOT
 	select SYS_FSL_ERRATUM_A010315 if PCIE_LAYERSCAPE
 	select SYS_FSL_ERRATUM_A010539
@@ -328,6 +328,7 @@ config ARCH_LX2160A
 
 config FSL_LSCH2
 	bool
+	select ARCH_MISC_INIT if FSL_CAAM
 	select SKIP_LOWLEVEL_INIT
 	select SYS_FSL_CCSR_GUR_BE
 	select SYS_FSL_CCSR_SCFG_BE
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index d2d3e346a36..cfbaa475701 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -802,7 +802,7 @@ enum boot_src get_boot_src(void)
 int mmc_get_env_dev(void)
 {
 	enum boot_src src = get_boot_src();
-	int dev = CONFIG_SYS_MMC_ENV_DEV;
+	int dev = CONFIG_ENV_MMC_DEVICE_INDEX;
 
 	switch (src) {
 	case BOOT_SOURCE_SD_MMC:
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
index ca6be3626fb..e8d2339f1a3 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
@@ -7,6 +7,7 @@
 #include <config.h>
 #include <clock_legacy.h>
 #include <efi_loader.h>
+#include <env.h>
 #include <log.h>
 #include <asm/cache.h>
 #include <linux/libfdt.h>
diff --git a/arch/arm/cpu/armv8/sysinfo.c b/arch/arm/cpu/armv8/sysinfo.c
index 850142da37d..ff0abee4c6b 100644
--- a/arch/arm/cpu/armv8/sysinfo.c
+++ b/arch/arm/cpu/armv8/sysinfo.c
@@ -134,7 +134,7 @@ int sysinfo_get_cache_info(u8 level, struct cache_info *cinfo)
 
 	/* Select cache level */
 	csselr_el1 = (level << 1);
-	asm volatile("msr csselr_el1, %0" : : "r" (csselr_el1));
+	asm volatile("msr csselr_el1, %0" : : "r" ((u64)csselr_el1));
 
 	/* Read CCSIDR_EL1 */
 	asm volatile("mrs %0, ccsidr_el1" : "=r" (creg.data));
diff --git a/arch/arm/cpu/u-boot-spl.lds b/arch/arm/cpu/u-boot-spl.lds
index eee463a1b1c..5aecb61ce90 100644
--- a/arch/arm/cpu/u-boot-spl.lds
+++ b/arch/arm/cpu/u-boot-spl.lds
@@ -53,13 +53,14 @@ SECTIONS
 		__rel_dyn_end = .;
 	}
 
+	. = ALIGN(8);
 	_image_binary_end = .;
 	_end = .;
 
 	.bss __rel_dyn_start (OVERLAY) : {
 		__bss_start = .;
 		*(.bss*)
-		 . = ALIGN(4);
+		 . = ALIGN(8);
 		__bss_end = .;
 	}
 	__bss_size = __bss_end - __bss_start;
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index 817e7a983ae..78aad093d3b 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -153,14 +153,14 @@ SECTIONS
 		__efi_runtime_rel_stop = .;
 	}
 
-	. = ALIGN(4);
+	. = ALIGN(8);
 	__image_copy_end = .;
 
 	/*
 	 * if CONFIG_USE_ARCH_MEMSET is not selected __bss_end - __bss_start
-	 * needs to be a multiple of 4 and we overlay .bss with .rel.dyn
+	 * needs to be a multiple of 8 and we overlay .bss with .rel.dyn
 	 */
-	.rel.dyn ALIGN(4) : {
+	.rel.dyn ALIGN(8) : {
 		__rel_dyn_start = .;
 		*(.rel*)
 		__rel_dyn_end = .;