diff options
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r-- | arch/arm/cpu/arm926ejs/kirkwood/cpu.c | 4 | ||||
-rw-r--r-- | arch/arm/cpu/arm926ejs/orion5x/cpu.c | 8 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/Makefile (renamed from arch/arm/cpu/arm_cortexa8/Makefile) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/config.mk (renamed from arch/arm/cpu/arm_cortexa8/config.mk) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/cpu.c (renamed from arch/arm/cpu/arm_cortexa8/cpu.c) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/mx51/Makefile (renamed from arch/arm/cpu/arm_cortexa8/mx51/Makefile) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/mx51/clock.c (renamed from arch/arm/cpu/arm_cortexa8/mx51/clock.c) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/mx51/iomux.c (renamed from arch/arm/cpu/arm_cortexa8/mx51/iomux.c) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/mx51/lowlevel_init.S (renamed from arch/arm/cpu/arm_cortexa8/mx51/lowlevel_init.S) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/mx51/soc.c (renamed from arch/arm/cpu/arm_cortexa8/mx51/soc.c) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/mx51/speed.c (renamed from arch/arm/cpu/arm_cortexa8/mx51/speed.c) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/mx51/timer.c (renamed from arch/arm/cpu/arm_cortexa8/mx51/timer.c) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/mx51/u-boot.lds (renamed from arch/arm/cpu/arm_cortexa8/mx51/u-boot.lds) | 2 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/omap-common/Makefile | 46 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/omap-common/config.mk | 33 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/omap-common/reset.S (renamed from arch/arm/cpu/arm_cortexa8/omap3/reset.S) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/omap-common/timer.c (renamed from arch/arm/cpu/arm_cortexa8/omap3/timer.c) | 5 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/omap3/Makefile (renamed from arch/arm/cpu/arm_cortexa8/omap3/Makefile) | 2 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/omap3/board.c (renamed from arch/arm/cpu/arm_cortexa8/omap3/board.c) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/omap3/cache.S (renamed from arch/arm/cpu/arm_cortexa8/omap3/cache.S) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/omap3/clock.c (renamed from arch/arm/cpu/arm_cortexa8/omap3/clock.c) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/omap3/emif4.c (renamed from arch/arm/cpu/arm_cortexa8/omap3/emif4.c) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/omap3/gpio.c (renamed from arch/arm/cpu/arm_cortexa8/omap3/gpio.c) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/omap3/lowlevel_init.S (renamed from arch/arm/cpu/arm_cortexa8/omap3/lowlevel_init.S) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/omap3/mem.c (renamed from arch/arm/cpu/arm_cortexa8/omap3/mem.c) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/omap3/sdrc.c (renamed from arch/arm/cpu/arm_cortexa8/omap3/sdrc.c) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/omap3/sys_info.c (renamed from arch/arm/cpu/arm_cortexa8/omap3/sys_info.c) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/omap3/syslib.c (renamed from arch/arm/cpu/arm_cortexa8/omap3/syslib.c) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/omap4/Makefile | 49 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/omap4/board.c | 90 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/omap4/lowlevel_init.S | 48 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/omap4/mem.c | 45 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/omap4/sys_info.c | 54 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/s5pc1xx/Makefile (renamed from arch/arm/cpu/arm_cortexa8/s5pc1xx/Makefile) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/s5pc1xx/cache.S (renamed from arch/arm/cpu/arm_cortexa8/s5pc1xx/cache.S) | 2 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/s5pc1xx/clock.c (renamed from arch/arm/cpu/arm_cortexa8/s5pc1xx/clock.c) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/s5pc1xx/cpu_info.c (renamed from arch/arm/cpu/arm_cortexa8/s5pc1xx/cpu_info.c) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/s5pc1xx/reset.S (renamed from arch/arm/cpu/arm_cortexa8/s5pc1xx/reset.S) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/s5pc1xx/sromc.c (renamed from arch/arm/cpu/arm_cortexa8/s5pc1xx/sromc.c) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/s5pc1xx/timer.c (renamed from arch/arm/cpu/arm_cortexa8/s5pc1xx/timer.c) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/start.S (renamed from arch/arm/cpu/arm_cortexa8/start.S) | 0 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/u-boot.lds (renamed from arch/arm/cpu/arm_cortexa8/u-boot.lds) | 2 | ||||
-rw-r--r-- | arch/arm/cpu/pxa/pxafb.c | 76 | ||||
-rw-r--r-- | arch/arm/cpu/pxa/start.S | 48 |
44 files changed, 501 insertions, 13 deletions
diff --git a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c index 6fc39025809..c63e8641f21 100644 --- a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c +++ b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c @@ -378,10 +378,10 @@ int arch_misc_init(void) } #endif /* CONFIG_ARCH_MISC_INIT */ -#ifdef CONFIG_KIRKWOOD_EGIGA +#ifdef CONFIG_MVGBE int cpu_eth_init(bd_t *bis) { - kirkwood_egiga_initialize(bis); + mvgbe_initialize(bis); return 0; } #endif diff --git a/arch/arm/cpu/arm926ejs/orion5x/cpu.c b/arch/arm/cpu/arm926ejs/orion5x/cpu.c index 03c6d0677c7..f3c1e2192e7 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/cpu.c +++ b/arch/arm/cpu/arm926ejs/orion5x/cpu.c @@ -268,3 +268,11 @@ int arch_misc_init(void) return 0; } #endif /* CONFIG_ARCH_MISC_INIT */ + +#ifdef CONFIG_MVGBE +int cpu_eth_init(bd_t *bis) +{ + mvgbe_initialize(bis); + return 0; +} +#endif diff --git a/arch/arm/cpu/arm_cortexa8/Makefile b/arch/arm/cpu/armv7/Makefile index ae20299db73..ae20299db73 100644 --- a/arch/arm/cpu/arm_cortexa8/Makefile +++ b/arch/arm/cpu/armv7/Makefile diff --git a/arch/arm/cpu/arm_cortexa8/config.mk b/arch/arm/cpu/armv7/config.mk index 49ac9c74aeb..49ac9c74aeb 100644 --- a/arch/arm/cpu/arm_cortexa8/config.mk +++ b/arch/arm/cpu/armv7/config.mk diff --git a/arch/arm/cpu/arm_cortexa8/cpu.c b/arch/arm/cpu/armv7/cpu.c index a01e0d605ff..a01e0d605ff 100644 --- a/arch/arm/cpu/arm_cortexa8/cpu.c +++ b/arch/arm/cpu/armv7/cpu.c diff --git a/arch/arm/cpu/arm_cortexa8/mx51/Makefile b/arch/arm/cpu/armv7/mx51/Makefile index 7cfaa2c1305..7cfaa2c1305 100644 --- a/arch/arm/cpu/arm_cortexa8/mx51/Makefile +++ b/arch/arm/cpu/armv7/mx51/Makefile diff --git a/arch/arm/cpu/arm_cortexa8/mx51/clock.c b/arch/arm/cpu/armv7/mx51/clock.c index a27227de313..a27227de313 100644 --- a/arch/arm/cpu/arm_cortexa8/mx51/clock.c +++ b/arch/arm/cpu/armv7/mx51/clock.c diff --git a/arch/arm/cpu/arm_cortexa8/mx51/iomux.c b/arch/arm/cpu/armv7/mx51/iomux.c index 62b2954be99..62b2954be99 100644 --- a/arch/arm/cpu/arm_cortexa8/mx51/iomux.c +++ b/arch/arm/cpu/armv7/mx51/iomux.c diff --git a/arch/arm/cpu/arm_cortexa8/mx51/lowlevel_init.S b/arch/arm/cpu/armv7/mx51/lowlevel_init.S index 783c81f72a7..783c81f72a7 100644 --- a/arch/arm/cpu/arm_cortexa8/mx51/lowlevel_init.S +++ b/arch/arm/cpu/armv7/mx51/lowlevel_init.S diff --git a/arch/arm/cpu/arm_cortexa8/mx51/soc.c b/arch/arm/cpu/armv7/mx51/soc.c index f22ebe96c86..f22ebe96c86 100644 --- a/arch/arm/cpu/arm_cortexa8/mx51/soc.c +++ b/arch/arm/cpu/armv7/mx51/soc.c diff --git a/arch/arm/cpu/arm_cortexa8/mx51/speed.c b/arch/arm/cpu/armv7/mx51/speed.c index a444def7eb8..a444def7eb8 100644 --- a/arch/arm/cpu/arm_cortexa8/mx51/speed.c +++ b/arch/arm/cpu/armv7/mx51/speed.c diff --git a/arch/arm/cpu/arm_cortexa8/mx51/timer.c b/arch/arm/cpu/armv7/mx51/timer.c index 81c4a061435..81c4a061435 100644 --- a/arch/arm/cpu/arm_cortexa8/mx51/timer.c +++ b/arch/arm/cpu/armv7/mx51/timer.c diff --git a/arch/arm/cpu/arm_cortexa8/mx51/u-boot.lds b/arch/arm/cpu/armv7/mx51/u-boot.lds index 2953b936321..d66434c95d6 100644 --- a/arch/arm/cpu/arm_cortexa8/mx51/u-boot.lds +++ b/arch/arm/cpu/armv7/mx51/u-boot.lds @@ -36,7 +36,7 @@ SECTIONS . = ALIGN(4); .text : { - arch/arm/cpu/arm_cortexa8/start.o + arch/arm/cpu/armv7/start.o *(.text) } diff --git a/arch/arm/cpu/armv7/omap-common/Makefile b/arch/arm/cpu/armv7/omap-common/Makefile new file mode 100644 index 00000000000..3a4a304e45b --- /dev/null +++ b/arch/arm/cpu/armv7/omap-common/Makefile @@ -0,0 +1,46 @@ +# +# (C) Copyright 2000-2003 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)libomap-common.a + +SOBJS := reset.o +COBJS := timer.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/arch/arm/cpu/armv7/omap-common/config.mk b/arch/arm/cpu/armv7/omap-common/config.mk new file mode 100644 index 00000000000..49ac9c74aeb --- /dev/null +++ b/arch/arm/cpu/armv7/omap-common/config.mk @@ -0,0 +1,33 @@ +# +# (C) Copyright 2002 +# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# +PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float + +# Make ARMv5 to allow more compilers to work, even though its v7a. +PLATFORM_CPPFLAGS += -march=armv5 +# ========================================================================= +# +# Supply options according to compiler version +# +# ========================================================================= +PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,\ + $(call cc-option,-malignment-traps,)) diff --git a/arch/arm/cpu/arm_cortexa8/omap3/reset.S b/arch/arm/cpu/armv7/omap-common/reset.S index a53c4081958..a53c4081958 100644 --- a/arch/arm/cpu/arm_cortexa8/omap3/reset.S +++ b/arch/arm/cpu/armv7/omap-common/reset.S diff --git a/arch/arm/cpu/arm_cortexa8/omap3/timer.c b/arch/arm/cpu/armv7/omap-common/timer.c index 401bfe6d097..69e285ff1dd 100644 --- a/arch/arm/cpu/arm_cortexa8/omap3/timer.c +++ b/arch/arm/cpu/armv7/omap-common/timer.c @@ -84,6 +84,11 @@ void set_timer(ulong t) /* delay x useconds */ void __udelay(unsigned long usec) { +#if defined(CONFIG_OMAP44XX) + /* TODO temporary hack until OMAP4 clock setup routines are present */ + if (usec > 1000) + usec = usec/1000; +#endif long tmo = usec * (TIMER_CLOCK / 1000) / 1000; unsigned long now, last = readl(&timer_base->tcrr); diff --git a/arch/arm/cpu/arm_cortexa8/omap3/Makefile b/arch/arm/cpu/armv7/omap3/Makefile index 7d63c6beca8..79ae26706e7 100644 --- a/arch/arm/cpu/arm_cortexa8/omap3/Makefile +++ b/arch/arm/cpu/armv7/omap3/Makefile @@ -27,7 +27,6 @@ LIB = $(obj)lib$(SOC).a SOBJS := lowlevel_init.o SOBJS += cache.o -SOBJS += reset.o COBJS += board.o COBJS += clock.o @@ -35,7 +34,6 @@ COBJS += gpio.o COBJS += mem.o COBJS += syslib.o COBJS += sys_info.o -COBJS += timer.o COBJS-$(CONFIG_EMIF4) += emif4.o COBJS-$(CONFIG_SDRC) += sdrc.o diff --git a/arch/arm/cpu/arm_cortexa8/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c index 69e56f55c5b..69e56f55c5b 100644 --- a/arch/arm/cpu/arm_cortexa8/omap3/board.c +++ b/arch/arm/cpu/armv7/omap3/board.c diff --git a/arch/arm/cpu/arm_cortexa8/omap3/cache.S b/arch/arm/cpu/armv7/omap3/cache.S index 4b65ac58a57..4b65ac58a57 100644 --- a/arch/arm/cpu/arm_cortexa8/omap3/cache.S +++ b/arch/arm/cpu/armv7/omap3/cache.S diff --git a/arch/arm/cpu/arm_cortexa8/omap3/clock.c b/arch/arm/cpu/armv7/omap3/clock.c index 6330c9e5da4..6330c9e5da4 100644 --- a/arch/arm/cpu/arm_cortexa8/omap3/clock.c +++ b/arch/arm/cpu/armv7/omap3/clock.c diff --git a/arch/arm/cpu/arm_cortexa8/omap3/emif4.c b/arch/arm/cpu/armv7/omap3/emif4.c index fae5b1161b0..fae5b1161b0 100644 --- a/arch/arm/cpu/arm_cortexa8/omap3/emif4.c +++ b/arch/arm/cpu/armv7/omap3/emif4.c diff --git a/arch/arm/cpu/arm_cortexa8/omap3/gpio.c b/arch/arm/cpu/armv7/omap3/gpio.c index aeb6066d894..aeb6066d894 100644 --- a/arch/arm/cpu/arm_cortexa8/omap3/gpio.c +++ b/arch/arm/cpu/armv7/omap3/gpio.c diff --git a/arch/arm/cpu/arm_cortexa8/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S index 73063ec8e66..73063ec8e66 100644 --- a/arch/arm/cpu/arm_cortexa8/omap3/lowlevel_init.S +++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S diff --git a/arch/arm/cpu/arm_cortexa8/omap3/mem.c b/arch/arm/cpu/armv7/omap3/mem.c index bd914b0ee55..bd914b0ee55 100644 --- a/arch/arm/cpu/arm_cortexa8/omap3/mem.c +++ b/arch/arm/cpu/armv7/omap3/mem.c diff --git a/arch/arm/cpu/arm_cortexa8/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c index 96fd990c71c..96fd990c71c 100644 --- a/arch/arm/cpu/arm_cortexa8/omap3/sdrc.c +++ b/arch/arm/cpu/armv7/omap3/sdrc.c diff --git a/arch/arm/cpu/arm_cortexa8/omap3/sys_info.c b/arch/arm/cpu/armv7/omap3/sys_info.c index 1df4401d492..1df4401d492 100644 --- a/arch/arm/cpu/arm_cortexa8/omap3/sys_info.c +++ b/arch/arm/cpu/armv7/omap3/sys_info.c diff --git a/arch/arm/cpu/arm_cortexa8/omap3/syslib.c b/arch/arm/cpu/armv7/omap3/syslib.c index 9ced495c8d0..9ced495c8d0 100644 --- a/arch/arm/cpu/arm_cortexa8/omap3/syslib.c +++ b/arch/arm/cpu/armv7/omap3/syslib.c diff --git a/arch/arm/cpu/armv7/omap4/Makefile b/arch/arm/cpu/armv7/omap4/Makefile new file mode 100644 index 00000000000..d926fbb4802 --- /dev/null +++ b/arch/arm/cpu/armv7/omap4/Makefile @@ -0,0 +1,49 @@ +# +# (C) Copyright 2000-2010 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(SOC).a + +SOBJS += lowlevel_init.o + +COBJS += board.o +COBJS += mem.o +COBJS += sys_info.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/arch/arm/cpu/armv7/omap4/board.c b/arch/arm/cpu/armv7/omap4/board.c new file mode 100644 index 00000000000..5bf717303d8 --- /dev/null +++ b/arch/arm/cpu/armv7/omap4/board.c @@ -0,0 +1,90 @@ +/* + * + * Common functions for OMAP4 based boards + * + * (C) Copyright 2010 + * Texas Instruments, <www.ti.com> + * + * Author : + * Aneesh V <aneesh@ti.com> + * Steve Sakoman <steve@sakoman.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> +#include <asm/arch/cpu.h> +#include <asm/arch/sys_proto.h> + +/* + * Routine: s_init + * Description: Does early system init of muxing and clocks. + * - Called path is with SRAM stack. + */ +void s_init(void) +{ + watchdog_init(); +} + +/* + * Routine: wait_for_command_complete + * Description: Wait for posting to finish on watchdog + */ +void wait_for_command_complete(struct watchdog *wd_base) +{ + int pending = 1; + do { + pending = readl(&wd_base->wwps); + } while (pending); +} + +/* + * Routine: watchdog_init + * Description: Shut down watch dogs + */ +void watchdog_init(void) +{ + struct watchdog *wd2_base = (struct watchdog *)WDT2_BASE; + + writel(WD_UNLOCK1, &wd2_base->wspr); + wait_for_command_complete(wd2_base); + writel(WD_UNLOCK2, &wd2_base->wspr); +} + +/* + * Routine: dram_init + * Description: sets uboots idea of sdram size + */ +int dram_init(void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gd->bd->bi_dram[0].start = 0x80000000; + gd->bd->bi_dram[0].size = 512 << 20; + return 0; +} + +/* + * Print board information + */ +int checkboard(void) +{ + puts(sysinfo.board_string); + return 0; +} + diff --git a/arch/arm/cpu/armv7/omap4/lowlevel_init.S b/arch/arm/cpu/armv7/omap4/lowlevel_init.S new file mode 100644 index 00000000000..9a181eba9ce --- /dev/null +++ b/arch/arm/cpu/armv7/omap4/lowlevel_init.S @@ -0,0 +1,48 @@ +/* + * Board specific setup info + * + * (C) Copyright 2010 + * Texas Instruments, <www.ti.com> + * + * Author : + * Aneesh V <aneesh@ti.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <asm/arch/omap4.h> + +.globl lowlevel_init +lowlevel_init: + /* + * Setup a temporary stack + */ + ldr sp, =LOW_LEVEL_SRAM_STACK + + /* + * Save the old lr(passed in ip) and the current lr to stack + */ + push {ip, lr} + + /* + * go setup pll, mux, memory + */ + bl s_init + pop {ip, pc} + diff --git a/arch/arm/cpu/armv7/omap4/mem.c b/arch/arm/cpu/armv7/omap4/mem.c new file mode 100644 index 00000000000..878f0e3042c --- /dev/null +++ b/arch/arm/cpu/armv7/omap4/mem.c @@ -0,0 +1,45 @@ +/* + * (C) Copyright 2010 + * Texas Instruments, <www.ti.com> + * + * Steve Sakoman <steve@sakoman.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <asm/arch/cpu.h> +#include <asm/arch/sys_proto.h> + +struct gpmc *gpmc_cfg; + +/***************************************************** + * gpmc_init(): init gpmc bus + * This code can only be executed from SRAM or SDRAM. + *****************************************************/ +void gpmc_init(void) +{ + gpmc_cfg = (struct gpmc *)GPMC_BASE; + + /* global settings */ + writel(0, &gpmc_cfg->irqenable); /* isr's sources masked */ + writel(0, &gpmc_cfg->timeout_control);/* timeout disable */ + + /* + * Disable the GPMC0 config set by ROM code + * It conflicts with our MPDB (both at 0x08000000) + */ + writel(0, &gpmc_cfg->cs[0].config7); +} diff --git a/arch/arm/cpu/armv7/omap4/sys_info.c b/arch/arm/cpu/armv7/omap4/sys_info.c new file mode 100644 index 00000000000..3b73191831b --- /dev/null +++ b/arch/arm/cpu/armv7/omap4/sys_info.c @@ -0,0 +1,54 @@ +/* + * (C) Copyright 2010 + * Texas Instruments, <www.ti.com> + * + * Author : + * Aneesh V <aneesh@ti.com> + * Steve Sakoman <steve@sakoman.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/sys_proto.h> + +/* + * get_device_type(): tell if GP/HS/EMU/TST + */ +u32 get_device_type(void) +{ + return 0; +} + +/* + * get_board_rev() - get board revision + */ +u32 get_board_rev(void) +{ + return 0x20; +} + +/* + * Print CPU information + */ +int print_cpuinfo(void) +{ + + puts("CPU : OMAP4430\n"); + + return 0; +} + diff --git a/arch/arm/cpu/arm_cortexa8/s5pc1xx/Makefile b/arch/arm/cpu/armv7/s5pc1xx/Makefile index 3785593d25a..3785593d25a 100644 --- a/arch/arm/cpu/arm_cortexa8/s5pc1xx/Makefile +++ b/arch/arm/cpu/armv7/s5pc1xx/Makefile diff --git a/arch/arm/cpu/arm_cortexa8/s5pc1xx/cache.S b/arch/arm/cpu/armv7/s5pc1xx/cache.S index 906118d8208..7734b328d73 100644 --- a/arch/arm/cpu/arm_cortexa8/s5pc1xx/cache.S +++ b/arch/arm/cpu/armv7/s5pc1xx/cache.S @@ -2,7 +2,7 @@ * Copyright (C) 2009 Samsung Electronics * Minkyu Kang <mk7.kang@samsung.com> * - * based on arch/arm/cpu/arm_cortexa8/omap3/cache.S + * based on arch/arm/cpu/armv7/omap3/cache.S * * See file CREDITS for list of people who contributed to this * project. diff --git a/arch/arm/cpu/arm_cortexa8/s5pc1xx/clock.c b/arch/arm/cpu/armv7/s5pc1xx/clock.c index 19619f92cd9..19619f92cd9 100644 --- a/arch/arm/cpu/arm_cortexa8/s5pc1xx/clock.c +++ b/arch/arm/cpu/armv7/s5pc1xx/clock.c diff --git a/arch/arm/cpu/arm_cortexa8/s5pc1xx/cpu_info.c b/arch/arm/cpu/armv7/s5pc1xx/cpu_info.c index f16c0ff1307..f16c0ff1307 100644 --- a/arch/arm/cpu/arm_cortexa8/s5pc1xx/cpu_info.c +++ b/arch/arm/cpu/armv7/s5pc1xx/cpu_info.c diff --git a/arch/arm/cpu/arm_cortexa8/s5pc1xx/reset.S b/arch/arm/cpu/armv7/s5pc1xx/reset.S index 7f6ff9c35f2..7f6ff9c35f2 100644 --- a/arch/arm/cpu/arm_cortexa8/s5pc1xx/reset.S +++ b/arch/arm/cpu/armv7/s5pc1xx/reset.S diff --git a/arch/arm/cpu/arm_cortexa8/s5pc1xx/sromc.c b/arch/arm/cpu/armv7/s5pc1xx/sromc.c index 380be81be5e..380be81be5e 100644 --- a/arch/arm/cpu/arm_cortexa8/s5pc1xx/sromc.c +++ b/arch/arm/cpu/armv7/s5pc1xx/sromc.c diff --git a/arch/arm/cpu/arm_cortexa8/s5pc1xx/timer.c b/arch/arm/cpu/armv7/s5pc1xx/timer.c index c5df5c5ab53..c5df5c5ab53 100644 --- a/arch/arm/cpu/arm_cortexa8/s5pc1xx/timer.c +++ b/arch/arm/cpu/armv7/s5pc1xx/timer.c diff --git a/arch/arm/cpu/arm_cortexa8/start.S b/arch/arm/cpu/armv7/start.S index 1e0a1504bfc..1e0a1504bfc 100644 --- a/arch/arm/cpu/arm_cortexa8/start.S +++ b/arch/arm/cpu/armv7/start.S diff --git a/arch/arm/cpu/arm_cortexa8/u-boot.lds b/arch/arm/cpu/armv7/u-boot.lds index 820e3a10431..9e5b5a97d74 100644 --- a/arch/arm/cpu/arm_cortexa8/u-boot.lds +++ b/arch/arm/cpu/armv7/u-boot.lds @@ -34,7 +34,7 @@ SECTIONS . = ALIGN(4); .text : { - arch/arm/cpu/arm_cortexa8/start.o (.text) + arch/arm/cpu/armv7/start.o (.text) *(.text) } diff --git a/arch/arm/cpu/pxa/pxafb.c b/arch/arm/cpu/pxa/pxafb.c index d56c5f099f0..524a03b62ef 100644 --- a/arch/arm/cpu/pxa/pxafb.c +++ b/arch/arm/cpu/pxa/pxafb.c @@ -112,6 +112,39 @@ vidinfo_t panel_info = { vl_efw: 0, }; #endif /* CONFIG_SHARP_LM8V31 */ +/*----------------------------------------------------------------------*/ +#ifdef CONFIG_VOIPAC_LCD + +# define LCD_BPP LCD_COLOR8 +# define LCD_INVERT_COLORS + +/* you have to set lccr0 and lccr3 (including pcd) */ +# define REG_LCCR0 0x043008f8 +# define REG_LCCR3 0x0340FF08 + +vidinfo_t panel_info = { + vl_col: 640, + vl_row: 480, + vl_width: 157, + vl_height: 118, + vl_clkp: CONFIG_SYS_HIGH, + vl_oep: CONFIG_SYS_HIGH, + vl_hsp: CONFIG_SYS_HIGH, + vl_vsp: CONFIG_SYS_HIGH, + vl_dp: CONFIG_SYS_HIGH, + vl_bpix: LCD_BPP, + vl_lbw: 0, + vl_splt: 1, + vl_clor: 1, + vl_tft: 1, + vl_hpw: 32, + vl_blw: 144, + vl_elw: 32, + vl_vpw: 2, + vl_bfw: 13, + vl_efw: 30, +}; +#endif /* CONFIG_VOIPAC_LCD */ /*----------------------------------------------------------------------*/ #ifdef CONFIG_HITACHI_SX14 @@ -147,6 +180,40 @@ vidinfo_t panel_info = { #endif /* CONFIG_HITACHI_SX14 */ /*----------------------------------------------------------------------*/ +#ifdef CONFIG_LMS283GF05 + +# define LCD_BPP LCD_COLOR8 +//# define LCD_INVERT_COLORS + +/* you have to set lccr0 and lccr3 (including pcd) */ +# define REG_LCCR0 0x043008f8 +# define REG_LCCR3 0x03b00009 + +vidinfo_t panel_info = { + vl_col: 240, + vl_row: 320, + vl_width: 240, + vl_height: 320, + vl_clkp: CONFIG_SYS_HIGH, + vl_oep: CONFIG_SYS_LOW, + vl_hsp: CONFIG_SYS_LOW, + vl_vsp: CONFIG_SYS_LOW, + vl_dp: CONFIG_SYS_HIGH, + vl_bpix: LCD_BPP, + vl_lbw: 0, + vl_splt: 1, + vl_clor: 1, + vl_tft: 1, + vl_hpw: 4, + vl_blw: 4, + vl_elw: 8, + vl_vpw: 4, + vl_bfw: 4, + vl_efw: 8, +}; +#endif /* CONFIG_LMS283GF05 */ + +/*----------------------------------------------------------------------*/ #if LCD_BPP == LCD_COLOR8 void lcd_setcolreg (ushort regno, ushort red, ushort green, ushort blue); @@ -292,7 +359,9 @@ static int pxafb_init_mem (void *lcdbase, vidinfo_t *vid) return 0; } - +#ifdef CONFIG_CPU_MONAHANS +static inline void pxafb_setup_gpio (vidinfo_t *vid) {} +#else static void pxafb_setup_gpio (vidinfo_t *vid) { u_long lccr0; @@ -349,6 +418,7 @@ static void pxafb_setup_gpio (vidinfo_t *vid) printf("pxafb_setup_gpio: unable to determine bits per pixel\n"); } } +#endif static void pxafb_enable_controller (vidinfo_t *vid) { @@ -363,7 +433,11 @@ static void pxafb_enable_controller (vidinfo_t *vid) FDADR1 = vid->pxa.fdadr1; LCCR0 |= LCCR0_ENB; +#ifdef CONFIG_CPU_MONAHANS + CKENA |= CKENA_1_LCD; +#else CKEN |= CKEN16_LCD; +#endif debug("FDADR0 = 0x%08x\n", (unsigned int)FDADR0); debug("FDADR1 = 0x%08x\n", (unsigned int)FDADR1); diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S index e07c8c2e0e7..8010b0ee17a 100644 --- a/arch/arm/cpu/pxa/start.S +++ b/arch/arm/cpu/pxa/start.S @@ -34,6 +34,25 @@ .globl _start _start: b reset +#ifdef CONFIG_PRELOADER + ldr pc, _hang + ldr pc, _hang + ldr pc, _hang + ldr pc, _hang + ldr pc, _hang + ldr pc, _hang + ldr pc, _hang + +_hang: + .word do_hang + .word 0x12345678 + .word 0x12345678 + .word 0x12345678 + .word 0x12345678 + .word 0x12345678 + .word 0x12345678 + .word 0x12345678 /* now 16*4=64 */ +#else ldr pc, _undefined_instruction ldr pc, _software_interrupt ldr pc, _prefetch_abort @@ -49,6 +68,7 @@ _data_abort: .word data_abort _not_used: .word not_used _irq: .word irq _fiq: .word fiq +#endif /* CONFIG_PRELOADER */ .balignl 16,0xdeadbeef @@ -117,8 +137,10 @@ reset: relocate: /* relocate U-Boot to RAM */ adr r0, _start /* r0 <- current position of code */ ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ +#ifndef CONFIG_PRELOADER cmp r0, r1 /* don't reloc during debug */ beq stack_setup +#endif ldr r2, _armboot_start ldr r3, _bss_start @@ -135,28 +157,37 @@ copy_loop: /* Set up the stack */ stack_setup: ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */ +#ifdef CONFIG_PRELOADER + sub sp, r0, #128 /* leave 32 words for abort-stack */ +#else + sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ + sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */ #ifdef CONFIG_USE_IRQ sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) #endif /* CONFIG_USE_IRQ */ sub sp, r0, #12 /* leave 3 words for abort-stack */ bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ +#endif clear_bss: ldr r0, _bss_start /* find start of bss segment */ ldr r1, _bss_end /* stop here */ mov r2, #0x00000000 /* clear */ +#ifndef CONFIG_PRELOADER clbss_l:str r2, [r0] /* clear loop... */ add r0, r0, #4 cmp r0, r1 ble clbss_l +#endif ldr pc, _start_armboot +#ifdef CONFIG_ONENAND_IPL +_start_armboot: .word start_oneboot +#else _start_armboot: .word start_armboot - +#endif /****************************************************************************/ /* */ @@ -296,7 +327,7 @@ setspeed_done: */ mov pc, lr - +#ifndef CONFIG_PRELOADER /****************************************************************************/ /* */ /* Interrupt handling */ @@ -394,6 +425,7 @@ setspeed_done: .macro get_fiq_stack @ setup FIQ stack ldr sp, FIQ_STACK_START .endm +#endif /* CONFIG_PRELOADER */ /****************************************************************************/ @@ -402,6 +434,12 @@ setspeed_done: /* */ /****************************************************************************/ +#ifdef CONFIG_PRELOADER + .align 5 +do_hang: + ldr sp, _TEXT_BASE /* use 32 words abort stack */ + bl hang /* hang and never return */ +#else /* !CONFIG_PRELOADER */ .align 5 undefined_instruction: get_bad_stack @@ -461,7 +499,7 @@ fiq: get_bad_stack bad_save_user_regs bl do_fiq - +#endif /* CONFIG_PRELOADER */ #endif /* CONFIG_USE_IRQ */ /****************************************************************************/ |