diff options
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r-- | arch/arm/cpu/arm926ejs/spear/spr_misc.c | 1 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/arch_timer.c | 36 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/sunxi/config.mk | 6 | ||||
-rw-r--r-- | arch/arm/cpu/armv7m/cpu.c | 3 | ||||
-rw-r--r-- | arch/arm/cpu/armv7m/mpu.c | 11 | ||||
-rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 5 | ||||
-rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/soc.c | 23 | ||||
-rw-r--r-- | arch/arm/cpu/armv8/fwcall.c | 1 | ||||
-rw-r--r-- | arch/arm/cpu/armv8/zynqmp/cpu.c | 2 |
9 files changed, 54 insertions, 34 deletions
diff --git a/arch/arm/cpu/arm926ejs/spear/spr_misc.c b/arch/arm/cpu/arm926ejs/spear/spr_misc.c index a02304f49ee..f072f2e4741 100644 --- a/arch/arm/cpu/arm926ejs/spear/spr_misc.c +++ b/arch/arm/cpu/arm926ejs/spear/spr_misc.c @@ -7,6 +7,7 @@ #include <common.h> #include <command.h> +#include <environment.h> #include <i2c.h> #include <net.h> #include <linux/mtd/st_smi.h> diff --git a/arch/arm/cpu/armv7/arch_timer.c b/arch/arm/cpu/armv7/arch_timer.c index 30915d28aa9..3bcb944ec41 100644 --- a/arch/arm/cpu/armv7/arch_timer.c +++ b/arch/arm/cpu/armv7/arch_timer.c @@ -12,12 +12,26 @@ DECLARE_GLOBAL_DATA_PTR; +#ifndef CONFIG_SYS_HZ_CLOCK +static inline u32 read_cntfrq(void) +{ + u32 frq; + + asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (frq)); + return frq; +} +#endif + int timer_init(void) { gd->arch.tbl = 0; gd->arch.tbu = 0; - gd->arch.timer_rate_hz = CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ; +#ifdef CONFIG_SYS_HZ_CLOCK + gd->arch.timer_rate_hz = CONFIG_SYS_HZ_CLOCK; +#else + gd->arch.timer_rate_hz = read_cntfrq(); +#endif return 0; } @@ -34,27 +48,9 @@ unsigned long long get_ticks(void) } -ulong get_timer(ulong base) -{ - return lldiv(get_ticks(), gd->arch.timer_rate_hz) - base; -} - ulong timer_get_boot_us(void) { - return lldiv(get_ticks(), CONFIG_SYS_HZ_CLOCK / (CONFIG_SYS_HZ * 1000)); -} - -void __udelay(unsigned long usec) -{ - unsigned long long endtime; - - endtime = lldiv((unsigned long long)usec * gd->arch.timer_rate_hz, - 1000UL); - - endtime += get_ticks(); - - while (get_ticks() < endtime) - ; + return lldiv(get_ticks(), gd->arch.timer_rate_hz / 1000000); } ulong get_tbclk(void) diff --git a/arch/arm/cpu/armv7/sunxi/config.mk b/arch/arm/cpu/armv7/sunxi/config.mk deleted file mode 100644 index 76ffec9df6a..00000000000 --- a/arch/arm/cpu/armv7/sunxi/config.mk +++ /dev/null @@ -1,6 +0,0 @@ -# Build a combined spl + u-boot image -ifdef CONFIG_SPL -ifndef CONFIG_SPL_BUILD -ALL-y += u-boot-sunxi-with-spl.bin -endif -endif diff --git a/arch/arm/cpu/armv7m/cpu.c b/arch/arm/cpu/armv7m/cpu.c index a424babde54..29597750f8b 100644 --- a/arch/arm/cpu/armv7m/cpu.c +++ b/arch/arm/cpu/armv7m/cpu.c @@ -37,6 +37,9 @@ int cleanup_before_linux(void) * dcache flushing and disabling dcache */ invalidate_dcache_all(); + icache_disable(); + invalidate_icache_all(); + return 0; } diff --git a/arch/arm/cpu/armv7m/mpu.c b/arch/arm/cpu/armv7m/mpu.c index 8e92a33fd4d..e4d090e5de4 100644 --- a/arch/arm/cpu/armv7m/mpu.c +++ b/arch/arm/cpu/armv7m/mpu.c @@ -10,12 +10,13 @@ #include <asm/armv7m_mpu.h> #include <asm/io.h> -#define V7M_MPU_CTRL_ENABLE (1 << 0) +#define V7M_MPU_CTRL_ENABLE BIT(0) #define V7M_MPU_CTRL_DISABLE (0 << 0) -#define V7M_MPU_CTRL_HFNMIENA (1 << 1) -#define VALID_REGION (1 << 4) +#define V7M_MPU_CTRL_HFNMIENA BIT(1) +#define V7M_MPU_CTRL_PRIVDEFENA BIT(2) +#define VALID_REGION BIT(4) -#define ENABLE_REGION (1 << 0) +#define ENABLE_REGION BIT(0) #define AP_SHIFT 24 #define XN_SHIFT 28 @@ -36,7 +37,7 @@ void disable_mpu(void) void enable_mpu(void) { - writel(V7M_MPU_CTRL_ENABLE | V7M_MPU_CTRL_HFNMIENA, &V7M_MPU->ctrl); + writel(V7M_MPU_CTRL_ENABLE | V7M_MPU_CTRL_PRIVDEFENA, &V7M_MPU->ctrl); /* Make sure new mpu config is effective for next memory access */ dsb(); diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index 70a60709357..45cbd91d97c 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -644,6 +644,7 @@ void __efi_runtime EFIAPI efi_reset_system( switch (reset_type) { case EFI_RESET_COLD: case EFI_RESET_WARM: + case EFI_RESET_PLATFORM_SPECIFIC: reset_cpu(0); break; case EFI_RESET_SHUTDOWN: @@ -654,9 +655,9 @@ void __efi_runtime EFIAPI efi_reset_system( while (1) { } } -void efi_reset_system_init(void) +efi_status_t efi_reset_system_init(void) { - efi_add_runtime_mmio(&rstcr, sizeof(*rstcr)); + return efi_add_runtime_mmio(&rstcr, sizeof(*rstcr)); } #endif diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index b9f837d58d3..18fb937a3a4 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -612,6 +612,29 @@ int setup_chip_volt(void) return 0; } +#ifdef CONFIG_FSL_PFE +void init_pfe_scfg_dcfg_regs(void) +{ + struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR; + u32 ecccr2; + + out_be32(&scfg->pfeasbcr, + in_be32(&scfg->pfeasbcr) | SCFG_PFEASBCR_AWCACHE0); + out_be32(&scfg->pfebsbcr, + in_be32(&scfg->pfebsbcr) | SCFG_PFEASBCR_AWCACHE0); + + /* CCI-400 QoS settings for PFE */ + out_be32(&scfg->wr_qos1, (unsigned int)(SCFG_WR_QOS1_PFE1_QOS + | SCFG_WR_QOS1_PFE2_QOS)); + out_be32(&scfg->rd_qos1, (unsigned int)(SCFG_RD_QOS1_PFE1_QOS + | SCFG_RD_QOS1_PFE2_QOS)); + + ecccr2 = in_be32(CONFIG_SYS_DCSR_DCFG_ADDR + DCFG_DCSR_ECCCR2); + out_be32((void *)CONFIG_SYS_DCSR_DCFG_ADDR + DCFG_DCSR_ECCCR2, + ecccr2 | (unsigned int)DISABLE_PFE_ECC); +} +#endif + void fsl_lsch2_early_init_f(void) { struct ccsr_cci400 *cci = (struct ccsr_cci400 *)(CONFIG_SYS_IMMR + diff --git a/arch/arm/cpu/armv8/fwcall.c b/arch/arm/cpu/armv8/fwcall.c index c2202675366..ff0712bf650 100644 --- a/arch/arm/cpu/armv8/fwcall.c +++ b/arch/arm/cpu/armv8/fwcall.c @@ -146,6 +146,7 @@ void __efi_runtime EFIAPI efi_reset_system( switch (reset_type) { case EFI_RESET_COLD: case EFI_RESET_WARM: + case EFI_RESET_PLATFORM_SPECIFIC: psci_system_reset(); break; case EFI_RESET_SHUTDOWN: diff --git a/arch/arm/cpu/armv8/zynqmp/cpu.c b/arch/arm/cpu/armv8/zynqmp/cpu.c index bc77dd03c36..14e7d400649 100644 --- a/arch/arm/cpu/armv8/zynqmp/cpu.c +++ b/arch/arm/cpu/armv8/zynqmp/cpu.c @@ -185,7 +185,7 @@ void zynqmp_pmufw_version(void) pm_api_version >> ZYNQMP_PM_VERSION_MAJOR_SHIFT, pm_api_version & ZYNQMP_PM_VERSION_MINOR_MASK); - if (pm_api_version != ZYNQMP_PM_VERSION) + if (pm_api_version < ZYNQMP_PM_VERSION) panic("PMUFW version error. Expected: v%d.%d\n", ZYNQMP_PM_VERSION_MAJOR, ZYNQMP_PM_VERSION_MINOR); } |