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-rw-r--r--arch/arm/dts/armada-8040-db.dts125
1 files changed, 44 insertions, 81 deletions
diff --git a/arch/arm/dts/armada-8040-db.dts b/arch/arm/dts/armada-8040-db.dts
index 65b30bbc648..51c2f23f4db 100644
--- a/arch/arm/dts/armada-8040-db.dts
+++ b/arch/arm/dts/armada-8040-db.dts
@@ -1,43 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0
/*
- * Copyright (C) 2016 Marvell Technology Group Ltd.
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPLv2 or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- * a) This library is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- * b) Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use,
- * copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following
- * conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
+ * Copyright (C) 2016 - 2021 Marvell International Ltd.
*/
/*
@@ -56,8 +19,8 @@
};
aliases {
- i2c0 = &cpm_i2c0;
- spi0 = &cps_spi1;
+ i2c0 = &cp0_i2c0;
+ spi0 = &cp1_spi1;
};
memory@00000000 {
@@ -88,7 +51,7 @@
status = "okay";
};
-&cpm_pinctl {
+&cp0_pinctl {
/* MPP Bus:
* [0-31] = 0xff: Keep default CP0_shared_pins
* [11] CLKOUT_MPP_11 (out)
@@ -116,7 +79,7 @@
0xe 0xe 0xe>;
};
-&cpm_comphy {
+&cp0_comphy {
/* Serdes Configuration:
* Lane 0: PCIe0 (x1)
* Lane 1: SATA0
@@ -126,77 +89,77 @@
* Lane 5: PCIe2 (x1)
*/
phy0 {
- phy-type = <PHY_TYPE_PEX0>;
+ phy-type = <COMPHY_TYPE_PEX0>;
};
phy1 {
- phy-type = <PHY_TYPE_SATA0>;
+ phy-type = <COMPHY_TYPE_SATA0>;
};
phy2 {
- phy-type = <PHY_TYPE_SFI>;
+ phy-type = <COMPHY_TYPE_SFI0>;
};
phy3 {
- phy-type = <PHY_TYPE_SATA1>;
+ phy-type = <COMPHY_TYPE_SATA1>;
};
phy4 {
- phy-type = <PHY_TYPE_USB3_HOST1>;
+ phy-type = <COMPHY_TYPE_USB3_HOST1>;
};
phy5 {
- phy-type = <PHY_TYPE_PEX2>;
+ phy-type = <COMPHY_TYPE_PEX2>;
};
};
/* CON6 on CP0 expansion */
-&cpm_pcie0 {
+&cp0_pcie0 {
status = "okay";
};
-&cpm_pcie1 {
+&cp0_pcie1 {
status = "disabled";
};
/* CON5 on CP0 expansion */
-&cpm_pcie2 {
+&cp0_pcie2 {
status = "okay";
};
-&cpm_i2c0 {
+&cp0_i2c0 {
pinctrl-names = "default";
- pinctrl-0 = <&cpm_i2c0_pins>;
+ pinctrl-0 = <&cp0_i2c0_pins>;
status = "okay";
clock-frequency = <100000>;
};
/* CON4 on CP0 expansion */
-&cpm_sata0 {
+&cp0_sata0 {
status = "okay";
};
/* CON9 on CP0 expansion */
-&cpm_usb3_0 {
+&cp0_usb3_0 {
status = "okay";
};
/* CON10 on CP0 expansion */
-&cpm_usb3_1 {
+&cp0_usb3_1 {
status = "okay";
};
-&cpm_utmi0 {
+&cp0_utmi0 {
status = "okay";
};
-&cpm_utmi1 {
+&cp0_utmi1 {
status = "okay";
};
-&cpm_sdhci0 {
+&cp0_sdhci0 {
pinctrl-names = "default";
- pinctrl-0 = <&cpm_sdhci_pins>;
+ pinctrl-0 = <&cp0_sdhci_pins>;
bus-width = <4>;
status = "okay";
};
-&cps_pinctl {
+&cp1_pinctl {
/* MPP Bus:
* [0-11] RGMII0
* [13-16] SPI1
@@ -215,7 +178,7 @@
0xff 0xff 0xff>;
};
-&cps_comphy {
+&cp1_comphy {
/* Serdes Configuration:
* Lane 0: PCIe0 (x1)
* Lane 1: SATA0
@@ -225,42 +188,42 @@
* Lane 5: PCIe2 (x1)
*/
phy0 {
- phy-type = <PHY_TYPE_PEX0>;
+ phy-type = <COMPHY_TYPE_PEX0>;
};
phy1 {
- phy-type = <PHY_TYPE_SATA0>;
+ phy-type = <COMPHY_TYPE_SATA0>;
};
phy2 {
- phy-type = <PHY_TYPE_SFI>;
+ phy-type = <COMPHY_TYPE_SFI0>;
};
phy3 {
- phy-type = <PHY_TYPE_SATA1>;
+ phy-type = <COMPHY_TYPE_SATA1>;
};
phy4 {
- phy-type = <PHY_TYPE_PEX1>;
+ phy-type = <COMPHY_TYPE_PEX1>;
};
phy5 {
- phy-type = <PHY_TYPE_PEX2>;
+ phy-type = <COMPHY_TYPE_PEX2>;
};
};
/* CON6 on CP1 expansion */
-&cps_pcie0 {
+&cp1_pcie0 {
status = "okay";
};
-&cps_pcie1 {
+&cp1_pcie1 {
status = "okay";
};
/* CON5 on CP1 expansion */
-&cps_pcie2 {
+&cp1_pcie2 {
status = "okay";
};
-&cps_spi1 {
+&cp1_spi1 {
pinctrl-names = "default";
- pinctrl-0 = <&cps_spi1_pins>;
+ pinctrl-0 = <&cp1_spi1_pins>;
status = "okay";
spi-flash@0 {
@@ -288,35 +251,35 @@
};
/* CON4 on CP1 expansion */
-&cps_sata0 {
+&cp1_sata0 {
status = "okay";
};
/* CON9 on CP1 expansion */
-&cps_usb3_0 {
+&cp1_usb3_0 {
status = "okay";
};
/* CON10 on CP1 expansion */
-&cps_usb3_1 {
+&cp1_usb3_1 {
status = "okay";
};
-&cps_utmi0 {
+&cp1_utmi0 {
status = "okay";
};
-&cpm_mdio {
+&cp0_mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
-&cpm_ethernet {
+&cp0_ethernet {
status = "okay";
};
-&cpm_eth2 {
+&cp0_eth2 {
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";
generated by cgit v1.2.3 (git 2.0.4) at 2025-08-06 02:28:40 +0000