diff options
Diffstat (limited to 'arch/arm/dts/bcm4912.dtsi')
-rw-r--r-- | arch/arm/dts/bcm4912.dtsi | 128 |
1 files changed, 0 insertions, 128 deletions
diff --git a/arch/arm/dts/bcm4912.dtsi b/arch/arm/dts/bcm4912.dtsi deleted file mode 100644 index 3d016c2ce67..00000000000 --- a/arch/arm/dts/bcm4912.dtsi +++ /dev/null @@ -1,128 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright 2022 Broadcom Ltd. - */ - -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> - -/ { - compatible = "brcm,bcm4912", "brcm,bcmbca"; - #address-cells = <2>; - #size-cells = <2>; - - interrupt-parent = <&gic>; - - cpus { - #address-cells = <2>; - #size-cells = <0>; - - B53_0: cpu@0 { - compatible = "brcm,brahma-b53"; - device_type = "cpu"; - reg = <0x0 0x0>; - next-level-cache = <&L2_0>; - enable-method = "psci"; - }; - - B53_1: cpu@1 { - compatible = "brcm,brahma-b53"; - device_type = "cpu"; - reg = <0x0 0x1>; - next-level-cache = <&L2_0>; - enable-method = "psci"; - }; - - B53_2: cpu@2 { - compatible = "brcm,brahma-b53"; - device_type = "cpu"; - reg = <0x0 0x2>; - next-level-cache = <&L2_0>; - enable-method = "psci"; - }; - - B53_3: cpu@3 { - compatible = "brcm,brahma-b53"; - device_type = "cpu"; - reg = <0x0 0x3>; - next-level-cache = <&L2_0>; - enable-method = "psci"; - }; - - L2_0: l2-cache0 { - compatible = "cache"; - }; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; - }; - - pmu: pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&B53_0>, <&B53_1>, - <&B53_2>, <&B53_3>; - }; - - clocks: clocks { - periph_clk: periph-clk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <200000000>; - }; - uart_clk: uart-clk { - compatible = "fixed-factor-clock"; - #clock-cells = <0>; - clocks = <&periph_clk>; - clock-div = <4>; - clock-mult = <1>; - }; - }; - - psci { - compatible = "arm,psci-0.2"; - method = "smc"; - }; - - axi@81000000 { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x0 0x81000000 0x8000>; - - gic: interrupt-controller@1000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; - interrupt-controller; - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; - reg = <0x1000 0x1000>, - <0x2000 0x2000>, - <0x4000 0x2000>, - <0x6000 0x2000>; - }; - }; - - bus@ff800000 { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x0 0xff800000 0x800000>; - - uart0: serial@12000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x12000 0x1000>; - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&uart_clk>, <&uart_clk>; - clock-names = "uartclk", "apb_pclk"; - status = "disabled"; - }; - }; -}; |