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Diffstat (limited to 'arch/arm/include/asm/arch-imx8m')
-rw-r--r--arch/arm/include/asm/arch-imx8m/clock.h1
-rw-r--r--arch/arm/include/asm/arch-imx8m/imx-regs.h21
2 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-imx8m/clock.h b/arch/arm/include/asm/arch-imx8m/clock.h
index c545eb82b69..77d9428a188 100644
--- a/arch/arm/include/asm/arch-imx8m/clock.h
+++ b/arch/arm/include/asm/arch-imx8m/clock.h
@@ -275,3 +275,4 @@ void enable_ocotp_clk(unsigned char enable);
int enable_i2c_clk(unsigned char enable, unsigned int i2c_num);
int set_clk_enet(enum enet_freq type);
int set_clk_eqos(enum enet_freq type);
+void hab_caam_clock_enable(unsigned char enable);
diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h
index 3f500146185..b800da13a1e 100644
--- a/arch/arm/include/asm/arch-imx8m/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h
@@ -65,6 +65,16 @@
#define IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_MASK 0x70000
#define FEC_QUIRK_ENET_MAC
+#define CAAM_ARB_BASE_ADDR (0x00100000)
+#define CAAM_ARB_END_ADDR (0x00107FFF)
+#define CAAM_IPS_BASE_ADDR (0x30900000)
+#define CONFIG_SYS_FSL_SEC_OFFSET (0)
+#define CONFIG_SYS_FSL_SEC_ADDR (CAAM_IPS_BASE_ADDR + \
+ CONFIG_SYS_FSL_SEC_OFFSET)
+#define CONFIG_SYS_FSL_JR0_OFFSET (0x1000)
+#define CONFIG_SYS_FSL_JR0_ADDR (CONFIG_SYS_FSL_SEC_ADDR + \
+ CONFIG_SYS_FSL_JR0_OFFSET)
+#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
#if !defined(__ASSEMBLY__)
#include <asm/types.h>
#include <linux/bitops.h>
@@ -120,6 +130,16 @@ struct ocotp_regs {
} bank[0];
};
+#ifdef CONFIG_IMX8MP
+struct fuse_bank0_regs {
+ u32 lock;
+ u32 rsvd0[7];
+ u32 uid_low;
+ u32 rsvd1[3];
+ u32 uid_high;
+ u32 rsvd2[3];
+};
+#else
struct fuse_bank0_regs {
u32 lock;
u32 rsvd0[3];
@@ -128,6 +148,7 @@ struct fuse_bank0_regs {
u32 uid_high;
u32 rsvd2[7];
};
+#endif
struct fuse_bank1_regs {
u32 tester3;