diff options
Diffstat (limited to 'arch/arm/include/asm')
| -rw-r--r-- | arch/arm/include/asm/arch-imx/cpu.h | 2 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-imx9/clock.h | 3 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-imx9/imx-regs.h | 10 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-imx9/sys_proto.h | 11 | ||||
| -rw-r--r-- | arch/arm/include/asm/mach-imx/sys_proto.h | 8 | ||||
| -rw-r--r-- | arch/arm/include/asm/system.h | 10 |
6 files changed, 42 insertions, 2 deletions
diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h index cbd2717f97c..b0468a1a136 100644 --- a/arch/arm/include/asm/arch-imx/cpu.h +++ b/arch/arm/include/asm/arch-imx/cpu.h @@ -68,6 +68,8 @@ #define MXC_CPU_IMX9321 0xC6 /* dummy ID */ #define MXC_CPU_IMX9312 0xC7 /* dummy ID */ #define MXC_CPU_IMX9311 0xC8 /* dummy ID */ +#define MXC_CPU_IMX9302 0xC9 /* dummy ID */ +#define MXC_CPU_IMX9301 0xCA /* dummy ID */ #define MXC_SOC_MX6 0x60 #define MXC_SOC_MX7 0x70 diff --git a/arch/arm/include/asm/arch-imx9/clock.h b/arch/arm/include/asm/arch-imx9/clock.h index 1ce6ac4c3a8..76f12118592 100644 --- a/arch/arm/include/asm/arch-imx9/clock.h +++ b/arch/arm/include/asm/arch-imx9/clock.h @@ -211,7 +211,8 @@ struct imx_clk_setting { u32 div; }; -int clock_init(void); +int clock_init_early(void); +int clock_init_late(void); u32 get_clk_src_rate(enum ccm_clk_src source); u32 get_lpuart_clk(void); void init_uart_clk(u32 index); diff --git a/arch/arm/include/asm/arch-imx9/imx-regs.h b/arch/arm/include/asm/arch-imx9/imx-regs.h index 76d241eab09..ef9538bd42e 100644 --- a/arch/arm/include/asm/arch-imx9/imx-regs.h +++ b/arch/arm/include/asm/arch-imx9/imx-regs.h @@ -25,6 +25,7 @@ #define ANATOP_BASE_ADDR 0x44480000UL #define BLK_CTRL_WAKEUPMIX_BASE_ADDR 0x42420000 +#define BLK_CTRL_NS_ANOMIX_BASE_ADDR 0x44210000 #define BLK_CTRL_S_ANOMIX_BASE_ADDR 0x444f0000 #define SRC_IPS_BASE_ADDR (0x44460000) @@ -38,6 +39,7 @@ #define SRC_MIX_SLICE_FUNC_STAT_PSW_STAT BIT(0) #define SRC_MIX_SLICE_FUNC_STAT_RST_STAT BIT(2) #define SRC_MIX_SLICE_FUNC_STAT_ISO_STAT BIT(4) +#define SRC_MIX_SLICE_FUNC_STAT_SSAR_STAT BIT(8) #define SRC_MIX_SLICE_FUNC_STAT_MEM_STAT BIT(12) #define IMG_CONTAINER_BASE (0x80000000UL) @@ -48,8 +50,16 @@ #define BCTRL_GPR_ENET_QOS_INTF_SEL_RGMII (0x1 << 1) #define BCTRL_GPR_ENET_QOS_CLK_GEN_EN (0x1 << 0) +#define TRDC_AON_BASE (0x44270000UL) +#define TRDC_WAKEUP_BASE (0x42460000UL) +#define TRDC_MEGA_BASE (0x42810000UL) +#define TRDC_NIC_BASE (0x49010000UL) + #define MARKETING_GRADING_MASK GENMASK(5, 4) #define SPEED_GRADING_MASK GENMASK(11, 6) +#define NUM_WORDS_PER_BANK 8 +#define HW_CFG1 19 +#define HW_CFG2 20 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) #include <asm/types.h> diff --git a/arch/arm/include/asm/arch-imx9/sys_proto.h b/arch/arm/include/asm/arch-imx9/sys_proto.h index 2f7a1292758..e4bf6a63424 100644 --- a/arch/arm/include/asm/arch-imx9/sys_proto.h +++ b/arch/arm/include/asm/arch-imx9/sys_proto.h @@ -8,7 +8,18 @@ #include <asm/mach-imx/sys_proto.h> +enum imx9_soc_voltage_mode { + VOLT_LOW_DRIVE = 0, + VOLT_NOMINAL_DRIVE, + VOLT_OVER_DRIVE, +}; + void soc_power_init(void); bool m33_is_rom_kicked(void); int m33_prepare(void); + +enum imx9_soc_voltage_mode soc_target_voltage_mode(void); + +#define is_voltage_mode(mode) (soc_target_voltage_mode() == (mode)) + #endif diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h index 31ae179b211..31ace977d2b 100644 --- a/arch/arm/include/asm/mach-imx/sys_proto.h +++ b/arch/arm/include/asm/mach-imx/sys_proto.h @@ -85,7 +85,8 @@ struct bd_info; #define is_imx93() (is_cpu_type(MXC_CPU_IMX93) || is_cpu_type(MXC_CPU_IMX9331) || \ is_cpu_type(MXC_CPU_IMX9332) || is_cpu_type(MXC_CPU_IMX9351) || \ is_cpu_type(MXC_CPU_IMX9322) || is_cpu_type(MXC_CPU_IMX9321) || \ - is_cpu_type(MXC_CPU_IMX9312) || is_cpu_type(MXC_CPU_IMX9311)) + is_cpu_type(MXC_CPU_IMX9312) || is_cpu_type(MXC_CPU_IMX9311) || \ + is_cpu_type(MXC_CPU_IMX9302) || is_cpu_type(MXC_CPU_IMX9301)) #define is_imx9351() (is_cpu_type(MXC_CPU_IMX9351)) #define is_imx9332() (is_cpu_type(MXC_CPU_IMX9332)) #define is_imx9331() (is_cpu_type(MXC_CPU_IMX9331)) @@ -93,6 +94,8 @@ struct bd_info; #define is_imx9321() (is_cpu_type(MXC_CPU_IMX9321)) #define is_imx9312() (is_cpu_type(MXC_CPU_IMX9312)) #define is_imx9311() (is_cpu_type(MXC_CPU_IMX9311)) +#define is_imx9302() (is_cpu_type(MXC_CPU_IMX9302)) +#define is_imx9301() (is_cpu_type(MXC_CPU_IMX9301)) #define is_imxrt1020() (is_cpu_type(MXC_CPU_IMXRT1020)) #define is_imxrt1050() (is_cpu_type(MXC_CPU_IMXRT1050)) @@ -275,4 +278,7 @@ void enable_ca7_smp(void); enum boot_device get_boot_device(void); +int disable_cpu_nodes(void *blob, const char * const *nodes_path, + u32 num_disabled_cores, u32 max_cores); +int fixup_thermal_trips(void *blob, const char *name); #endif diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 7e30cac32a0..2237d7d0066 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -277,6 +277,16 @@ void protect_secure_region(void); void smp_kick_all_cpus(void); void flush_l3_cache(void); + +/** + * mmu_map_region() - map a region of previously unmapped memory. + * Will be mapped MT_NORMAL & PTE_BLOCK_INNER_SHARE. + * + * @start: Start address of the region + * @size: Size of the region + * @emerg: Also map the region in the emergency table + */ +void mmu_map_region(phys_addr_t start, u64 size, bool emerg); void mmu_change_region_attr(phys_addr_t start, size_t size, u64 attrs); /* |