diff options
Diffstat (limited to 'arch/arm/include/asm')
| -rw-r--r-- | arch/arm/include/asm/arch-bcmcygnus/configs.h | 3 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-ls102xa/config.h | 1 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/clock.h | 9 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/imx-regs.h | 1 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-omap5/omap.h | 4 | ||||
| -rw-r--r-- | arch/arm/include/asm/omap_common.h | 16 |
6 files changed, 29 insertions, 5 deletions
diff --git a/arch/arm/include/asm/arch-bcmcygnus/configs.h b/arch/arm/include/asm/arch-bcmcygnus/configs.h index 3c0716082a2..af7f3bff57a 100644 --- a/arch/arm/include/asm/arch-bcmcygnus/configs.h +++ b/arch/arm/include/asm/arch-bcmcygnus/configs.h @@ -30,7 +30,4 @@ #define CONFIG_PHY_BROADCOM #define CONFIG_PHY_RESET_DELAY 10000 /* PHY reset delay in us*/ -#define CONFIG_CMD_PING -#define CONFIG_CMD_MII - #endif /* __ARCH_CONFIGS_H */ diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index ab4b69705f2..267bd17727c 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -90,7 +90,6 @@ #define CONFIG_SYS_SCSI_MAX_LUN 1 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ CONFIG_SYS_SCSI_MAX_LUN) -#define CONFIG_CMD_FAT #define CONFIG_DOS_PARTITION #define CONFIG_SYS_FSL_ERRATUM_A008407 diff --git a/arch/arm/include/asm/arch-mx6/clock.h b/arch/arm/include/asm/arch-mx6/clock.h index 14505239e85..82f9f92b83d 100644 --- a/arch/arm/include/asm/arch-mx6/clock.h +++ b/arch/arm/include/asm/arch-mx6/clock.h @@ -42,6 +42,14 @@ enum mxc_clock { MXC_I2C_CLK, }; +enum ldb_di_clock { + MXC_PLL5_CLK = 0, + MXC_PLL2_PFD0_CLK, + MXC_PLL2_PFD2_CLK, + MXC_MMDC_CH1_CLK, + MXC_PLL3_SW_CLK, +}; + enum enet_freq { ENET_25MHZ, ENET_50MHZ, @@ -70,4 +78,5 @@ int enable_lcdif_clock(u32 base_addr); void enable_qspi_clk(int qspi_num); void enable_thermal_clk(void); void mxs_set_lcdclk(u32 base_addr, u32 freq); +void select_ldb_di_clock_source(enum ldb_di_clock clk); #endif /* __ASM_ARCH_CLOCK_H */ diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 53488bef552..3ab04bf998d 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -274,6 +274,7 @@ #define IP2APB_TZASC1_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x50000) #ifdef CONFIG_MX6UL #define QSPI0_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x60000) +#define UART6_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x7C000) #elif defined(CONFIG_MX6SX) #define SAI1_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x54000) #define AUDMUX_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x58000) diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h index 1eeb8d5f626..2fd5cda6238 100644 --- a/arch/arm/include/asm/arch-omap5/omap.h +++ b/arch/arm/include/asm/arch-omap5/omap.h @@ -215,6 +215,10 @@ struct s32ktimer { /* ABB tranxdone mask */ #define OMAP_ABB_MPU_TXDONE_MASK (0x1 << 7) +#define OMAP_ABB_MM_TXDONE_MASK (0x1 << 31) +#define OMAP_ABB_IVA_TXDONE_MASK (0x1 << 30) +#define OMAP_ABB_EVE_TXDONE_MASK (0x1 << 29) +#define OMAP_ABB_GPU_TXDONE_MASK (0x1 << 28) /* ABB efuse masks */ #define OMAP5_ABB_FUSE_VSET_MASK (0x1F << 24) diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index 8c85f46db6e..8fb05e18b93 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -234,6 +234,7 @@ struct prcm_regs { u32 cm_l3init_usb_otg_ss1_clkctrl; u32 cm_l3init_usb_otg_ss2_clkctrl; + u32 prm_irqstatus_mpu; u32 prm_irqstatus_mpu_2; /* cm2.l4per */ @@ -321,6 +322,14 @@ struct prcm_regs { u32 prm_vc_cfg_i2c_clk; u32 prm_abbldo_mpu_setup; u32 prm_abbldo_mpu_ctrl; + u32 prm_abbldo_mm_setup; + u32 prm_abbldo_mm_ctrl; + u32 prm_abbldo_iva_setup; + u32 prm_abbldo_iva_ctrl; + u32 prm_abbldo_eve_setup; + u32 prm_abbldo_eve_ctrl; + u32 prm_abbldo_gpu_setup; + u32 prm_abbldo_gpu_ctrl; u32 cm_div_m4_dpll_core; u32 cm_div_m5_dpll_core; @@ -363,7 +372,6 @@ struct omap_sys_ctrl_regs { u32 control_core_mac_id_0_hi; u32 control_core_mac_id_1_lo; u32 control_core_mac_id_1_hi; - u32 control_std_fuse_opp_vdd_mpu_2; u32 control_phy_power_usb; u32 control_core_mmr_lock1; u32 control_core_mmr_lock2; @@ -442,6 +450,10 @@ struct omap_sys_ctrl_regs { u32 control_emif1_sdram_config_ext; u32 control_emif2_sdram_config_ext; u32 control_wkup_ldovbb_mpu_voltage_ctrl; + u32 control_wkup_ldovbb_mm_voltage_ctrl; + u32 control_wkup_ldovbb_iva_voltage_ctrl; + u32 control_wkup_ldovbb_eve_voltage_ctrl; + u32 control_wkup_ldovbb_gpu_voltage_ctrl; u32 control_smart1nopmio_padconf_0; u32 control_smart1nopmio_padconf_1; u32 control_padconf_mode; @@ -541,6 +553,8 @@ struct volts { u32 addr; struct volts_efuse_data efuse; struct pmic_data *pmic; + + u32 abb_tx_done_mask; }; struct vcores_data { |