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-rw-r--r--arch/arm/include/asm/arch-imx8/sci/rpc.h2
-rw-r--r--arch/arm/include/asm/arch-imx8m/imx-regs.h8
-rw-r--r--arch/arm/include/asm/arch-imx8m/imx8mq_pins.h2
-rw-r--r--arch/arm/include/asm/arch-meson/sm.h28
-rw-r--r--arch/arm/include/asm/arch-tegra/clock.h9
-rw-r--r--arch/arm/include/asm/mach-imx/module_fuse.h2
-rw-r--r--arch/arm/include/asm/mach-imx/sys_proto.h2
-rw-r--r--arch/arm/include/asm/psci.h5
8 files changed, 50 insertions, 8 deletions
diff --git a/arch/arm/include/asm/arch-imx8/sci/rpc.h b/arch/arm/include/asm/arch-imx8/sci/rpc.h
index 9f55904f442..39de7f0e3e0 100644
--- a/arch/arm/include/asm/arch-imx8/sci/rpc.h
+++ b/arch/arm/include/asm/arch-imx8/sci/rpc.h
@@ -11,7 +11,7 @@
/* Defines */
#define SCFW_API_VERSION_MAJOR 1U
-#define SCFW_API_VERSION_MINOR 15U
+#define SCFW_API_VERSION_MINOR 21U
#define SC_RPC_VERSION 1U
diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h
index 20f4699a12b..1559bf6d218 100644
--- a/arch/arm/include/asm/arch-imx8m/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h
@@ -31,6 +31,7 @@
#define CCM_BASE_ADDR 0x30380000
#define SRC_BASE_ADDR 0x30390000
#define GPC_BASE_ADDR 0x303A0000
+#define CSU_BASE_ADDR 0x303E0000
#define SYSCNT_RD_BASE_ADDR 0x306A0000
#define SYSCNT_CMP_BASE_ADDR 0x306B0000
@@ -81,6 +82,9 @@
#define MXS_GPMI_BASE (APBH_DMA_ARB_BASE_ADDR + 0x02000)
#define MXS_BCH_BASE (APBH_DMA_ARB_BASE_ADDR + 0x04000)
+#define GICD_BASE 0x38800000
+#define GICR_BASE 0x38880000
+
#define DDRC_DDR_SS_GPR0 0x3d000000
#define DDRC_IPS_BASE_ADDR(X) (0x3d400000 + ((X) * 0x2000000))
#define DDR_CSD1_BASE_ADDR 0x40000000
@@ -88,6 +92,10 @@
#define IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_MASK 0x70000
#define FEC_QUIRK_ENET_MAC
+#ifdef CONFIG_ARMV8_PSCI /* Final jump location */
+#define CPU_RELEASE_ADDR 0x900000
+#endif
+
#define CAAM_ARB_BASE_ADDR (0x00100000)
#define CAAM_ARB_END_ADDR (0x00107FFF)
#define CAAM_IPS_BASE_ADDR (0x30900000)
diff --git a/arch/arm/include/asm/arch-imx8m/imx8mq_pins.h b/arch/arm/include/asm/arch-imx8m/imx8mq_pins.h
index c71913f2094..16d418c687e 100644
--- a/arch/arm/include/asm/arch-imx8m/imx8mq_pins.h
+++ b/arch/arm/include/asm/arch-imx8m/imx8mq_pins.h
@@ -538,7 +538,7 @@ enum {
IMX8MQ_PAD_ECSPI2_SCLK__GPIO5_IO10 = IOMUX_PAD(0x046C, 0x0204, 5, 0x0000, 0, 0),
IMX8MQ_PAD_ECSPI2_MOSI__ECSPI2_MOSI = IOMUX_PAD(0x0470, 0x0208, 0, 0x0000, 0, 0),
- IMX8MQ_PAD_ECSPI2_MOSI__UART4_TX = IOMUX_PAD(0x0470, 0x0208, 1, 0x050C, 1, 0),
+ IMX8MQ_PAD_ECSPI2_MOSI__UART4_TX = IOMUX_PAD(0x0470, 0x0208, 1, 0x0000, 0, 0),
IMX8MQ_PAD_ECSPI2_MOSI__GPIO5_IO11 = IOMUX_PAD(0x0470, 0x0208, 5, 0x0000, 0, 0),
IMX8MQ_PAD_ECSPI2_MISO__ECSPI2_MISO = IOMUX_PAD(0x0474, 0x020C, 0, 0x0000, 0, 0),
diff --git a/arch/arm/include/asm/arch-meson/sm.h b/arch/arm/include/asm/arch-meson/sm.h
index f3ae46a6d6b..53b75176493 100644
--- a/arch/arm/include/asm/arch-meson/sm.h
+++ b/arch/arm/include/asm/arch-meson/sm.h
@@ -6,10 +6,35 @@
#ifndef __MESON_SM_H__
#define __MESON_SM_H__
+/**
+ * meson_sm_read_efuse - read efuse memory into buffer
+ *
+ * @offset: offset from the start efuse memory
+ * @buffer: pointer to buffer
+ * @size: number of bytes to read
+ * @return: number of bytes read
+ */
ssize_t meson_sm_read_efuse(uintptr_t offset, void *buffer, size_t size);
+/**
+ * meson_sm_write_efuse - write into efuse memory from buffer
+ *
+ * @offset: offset from the start efuse memory
+ * @buffer: pointer to buffer
+ * @size: number of bytes to write
+ * @return: number of bytes written
+ */
+ssize_t meson_sm_write_efuse(uintptr_t offset, void *buffer, size_t size);
+
#define SM_SERIAL_SIZE 12
+/**
+ * meson_sm_get_serial - read chip unique id into buffer
+ *
+ * @buffer: pointer to buffer
+ * @size: buffer size.
+ * @return: zero on success or -errno on failure
+ */
int meson_sm_get_serial(void *buffer, size_t size);
enum {
@@ -28,6 +53,9 @@ enum {
REBOOT_REASON_WATCHDOG_REBOOT = 13,
};
+/**
+ * meson_sm_get_reboot_reason - get reboot reason
+ */
int meson_sm_get_reboot_reason(void);
#endif /* __MESON_SM_H__ */
diff --git a/arch/arm/include/asm/arch-tegra/clock.h b/arch/arm/include/asm/arch-tegra/clock.h
index 6586015fd23..1dd5d0742c4 100644
--- a/arch/arm/include/asm/arch-tegra/clock.h
+++ b/arch/arm/include/asm/arch-tegra/clock.h
@@ -13,12 +13,13 @@ struct udevice;
/* Set of oscillator frequencies supported in the internal API. */
enum clock_osc_freq {
/* All in MHz, so 13_0 is 13.0MHz */
- CLOCK_OSC_FREQ_13_0,
- CLOCK_OSC_FREQ_19_2,
- CLOCK_OSC_FREQ_12_0,
- CLOCK_OSC_FREQ_26_0,
+ CLOCK_OSC_FREQ_13_0 = 0,
+ CLOCK_OSC_FREQ_16_8,
+ CLOCK_OSC_FREQ_19_2 = 4,
CLOCK_OSC_FREQ_38_4,
+ CLOCK_OSC_FREQ_12_0 = 8,
CLOCK_OSC_FREQ_48_0,
+ CLOCK_OSC_FREQ_26_0 = 12,
CLOCK_OSC_FREQ_COUNT,
};
diff --git a/arch/arm/include/asm/mach-imx/module_fuse.h b/arch/arm/include/asm/mach-imx/module_fuse.h
index a46fc3f1f8e..6c92cb40d6d 100644
--- a/arch/arm/include/asm/mach-imx/module_fuse.h
+++ b/arch/arm/include/asm/mach-imx/module_fuse.h
@@ -74,7 +74,7 @@ struct fuse_entry_desc {
u32 status;
};
-#if !CONFIG_IS_ENABLED(IMX_MODULE_FUSE)
+#if !IS_ENABLED(CONFIG_IMX_MODULE_FUSE)
static inline u32 check_module_fused(enum fuse_module_type module)
{
return 0;
diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h
index dd0d3f29333..27fdc16cd50 100644
--- a/arch/arm/include/asm/mach-imx/sys_proto.h
+++ b/arch/arm/include/asm/mach-imx/sys_proto.h
@@ -149,6 +149,8 @@ struct rproc_att {
u32 size; /* size of reg range */
};
+const struct rproc_att *imx_bootaux_get_hostmap(void);
+
struct rom_api {
u16 ver;
u16 tag;
diff --git a/arch/arm/include/asm/psci.h b/arch/arm/include/asm/psci.h
index 67e9234066b..7343b941ef0 100644
--- a/arch/arm/include/asm/psci.h
+++ b/arch/arm/include/asm/psci.h
@@ -22,6 +22,7 @@
#include <linux/bitops.h>
#endif
+#define ARM_PSCI_VER_1_1 (0x00010001)
#define ARM_PSCI_VER_1_0 (0x00010000)
#define ARM_PSCI_VER_0_2 (0x00000002)
@@ -68,7 +69,6 @@
#define ARM_PSCI_0_2_FN64_AFFINITY_INFO ARM_PSCI_0_2_FN64(4)
#define ARM_PSCI_0_2_FN64_MIGRATE ARM_PSCI_0_2_FN64(5)
#define ARM_PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU ARM_PSCI_0_2_FN64(7)
-#define ARM_PSCI_0_2_FN64_SYSTEM_RESET2 ARM_PSCI_0_2_FN64(18)
/* PSCI 1.0 interface */
#define ARM_PSCI_1_0_FN_PSCI_FEATURES ARM_PSCI_0_2_FN(10)
@@ -86,6 +86,9 @@
#define ARM_PSCI_1_0_FN64_STAT_RESIDENCY ARM_PSCI_0_2_FN64(16)
#define ARM_PSCI_1_0_FN64_STAT_COUNT ARM_PSCI_0_2_FN64(17)
+/* PSCI 1.1 interface */
+#define ARM_PSCI_1_1_FN64_SYSTEM_RESET2 ARM_PSCI_0_2_FN64(18)
+
/* 1KB stack per core */
#define ARM_PSCI_STACK_SHIFT 10
#define ARM_PSCI_STACK_SIZE (1 << ARM_PSCI_STACK_SHIFT)
generated by cgit v1.2.3 (git 2.0.4) at 2025-07-24 19:00:04 +0000