diff options
Diffstat (limited to 'arch/arm/mach-at91/armv7/clock.c')
| -rw-r--r-- | arch/arm/mach-at91/armv7/clock.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-at91/armv7/clock.c b/arch/arm/mach-at91/armv7/clock.c index aa6bb6bf31e..6bfa02d1d0a 100644 --- a/arch/arm/mach-at91/armv7/clock.c +++ b/arch/arm/mach-at91/armv7/clock.c @@ -28,7 +28,7 @@ static unsigned long at91_css_to_rate(unsigned long css) { switch (css) { case AT91_PMC_MCKR_CSS_SLOW: - return CONFIG_SYS_AT91_SLOW_CLOCK; + return CFG_SYS_AT91_SLOW_CLOCK; case AT91_PMC_MCKR_CSS_MAIN: return gd->arch.main_clk_rate_hz; case AT91_PMC_MCKR_CSS_PLLA: @@ -58,7 +58,7 @@ int at91_clock_init(unsigned long main_clock) { unsigned freq, mckr; struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; -#ifndef CONFIG_SYS_AT91_MAIN_CLOCK +#ifndef CFG_SYS_AT91_MAIN_CLOCK unsigned tmp; /* * When the bootloader initialized the main oscillator correctly, @@ -71,7 +71,7 @@ int at91_clock_init(unsigned long main_clock) tmp = readl(&pmc->mcfr); } while (!(tmp & AT91_PMC_MCFR_MAINRDY)); tmp &= AT91_PMC_MCFR_MAINF_MASK; - main_clock = tmp * (CONFIG_SYS_AT91_SLOW_CLOCK / 16); + main_clock = tmp * (CFG_SYS_AT91_SLOW_CLOCK / 16); } #endif gd->arch.main_clk_rate_hz = main_clock; @@ -271,7 +271,7 @@ u32 at91_get_periph_generated_clk(u32 id) clk_source = regval & AT91_PMC_PCR_GCKCSS; switch (clk_source) { case AT91_PMC_PCR_GCKCSS_SLOW_CLK: - freq = CONFIG_SYS_AT91_SLOW_CLOCK; + freq = CFG_SYS_AT91_SLOW_CLOCK; break; case AT91_PMC_PCR_GCKCSS_MAIN_CLK: freq = gd->arch.main_clk_rate_hz; |