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Diffstat (limited to 'arch/arm/mach-imx/imx8m/soc.c')
-rw-r--r--arch/arm/mach-imx/imx8m/soc.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 5293cb85e56..a72329ea919 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -45,7 +45,7 @@ struct imx_sec_config_fuse_t const imx_sec_config_fuse = {
int timer_init(void)
{
-#ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_XPL_BUILD
struct sctr_regs *sctr = (struct sctr_regs *)SYSCNT_CTRL_BASE_ADDR;
unsigned long freq = readl(&sctr->cntfid0);
@@ -255,7 +255,7 @@ int dram_init(void)
return ret;
/* rom_pointer[1] contains the size of TEE occupies */
- if (!IS_ENABLED(CONFIG_ARMV8_PSCI) && !IS_ENABLED(CONFIG_SPL_BUILD) && rom_pointer[1])
+ if (!IS_ENABLED(CONFIG_ARMV8_PSCI) && !IS_ENABLED(CONFIG_XPL_BUILD) && rom_pointer[1])
gd->ram_size = sdram_size - rom_pointer[1];
else
gd->ram_size = sdram_size;
@@ -284,7 +284,7 @@ int dram_init_banksize(void)
}
gd->bd->bi_dram[bank].start = PHYS_SDRAM;
- if (!IS_ENABLED(CONFIG_ARMV8_PSCI) && !IS_ENABLED(CONFIG_SPL_BUILD) && rom_pointer[1]) {
+ if (!IS_ENABLED(CONFIG_ARMV8_PSCI) && !IS_ENABLED(CONFIG_XPL_BUILD) && rom_pointer[1]) {
phys_addr_t optee_start = (phys_addr_t)rom_pointer[0];
phys_size_t optee_size = (size_t)rom_pointer[1];
@@ -329,7 +329,7 @@ phys_size_t get_effective_memsize(void)
sdram_b1_size = sdram_size;
}
- if (!IS_ENABLED(CONFIG_ARMV8_PSCI) && !IS_ENABLED(CONFIG_SPL_BUILD) &&
+ if (!IS_ENABLED(CONFIG_ARMV8_PSCI) && !IS_ENABLED(CONFIG_XPL_BUILD) &&
rom_pointer[1]) {
/* We will relocate u-boot to Top of dram1. Tee position has two cases:
* 1. At the top of dram1, Then return the size removed optee size.
@@ -612,7 +612,7 @@ static void early_enable_caches(void)
phys_size_t sdram_size;
int entry, ret;
- if (IS_ENABLED(CONFIG_SPL_BUILD))
+ if (IS_ENABLED(CONFIG_XPL_BUILD))
return;
if (CONFIG_IS_ENABLED(SYS_ICACHE_OFF) || CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
@@ -646,7 +646,7 @@ int arch_cpu_init(void)
* ROM might disable clock for SCTR,
* enable the clock before timer_init.
*/
- if (IS_ENABLED(CONFIG_SPL_BUILD))
+ if (IS_ENABLED(CONFIG_XPL_BUILD))
clock_enable(CCGR_SCTR, 1);
/*
* Init timer at very early state, because sscg pll setting
@@ -654,7 +654,7 @@ int arch_cpu_init(void)
*/
timer_init();
- if (IS_ENABLED(CONFIG_SPL_BUILD)) {
+ if (IS_ENABLED(CONFIG_XPL_BUILD)) {
clock_init();
imx_set_wdog_powerdown(false);
@@ -1477,7 +1477,7 @@ int arch_misc_init(void)
}
#endif
-#if defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_XPL_BUILD)
#if defined(CONFIG_IMX8MQ) || defined(CONFIG_IMX8MM) || defined(CONFIG_IMX8MN)
bool serror_need_skip = true;