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-rw-r--r--arch/arm/mach-imx/imx9/Kconfig8
-rw-r--r--arch/arm/mach-imx/imx9/Makefile2
-rw-r--r--arch/arm/mach-imx/imx9/clock.c5
-rw-r--r--arch/arm/mach-imx/imx9/clock_root.c3
-rw-r--r--arch/arm/mach-imx/imx9/lowlevel_init.S2
-rw-r--r--arch/arm/mach-imx/imx9/soc.c12
6 files changed, 21 insertions, 11 deletions
diff --git a/arch/arm/mach-imx/imx9/Kconfig b/arch/arm/mach-imx/imx9/Kconfig
index 4d32c28670d..5c1054138fc 100644
--- a/arch/arm/mach-imx/imx9/Kconfig
+++ b/arch/arm/mach-imx/imx9/Kconfig
@@ -23,6 +23,13 @@ choice
prompt "NXP i.MX9 board select"
optional
+config TARGET_IMX93_9X9_QSB
+ bool "imx93_qsb"
+ select OF_BOARD_FIXUP
+ select IMX93
+ select IMX9_LPDDR4X
+ imply OF_UPSTREAM
+
config TARGET_IMX93_11X11_EVK
bool "imx93_11x11_evk"
select OF_BOARD_FIXUP
@@ -42,6 +49,7 @@ config TARGET_PHYCORE_IMX93
endchoice
source "board/freescale/imx93_evk/Kconfig"
+source "board/freescale/imx93_qsb/Kconfig"
source "board/phytec/phycore_imx93/Kconfig"
source "board/variscite/imx93_var_som/Kconfig"
diff --git a/arch/arm/mach-imx/imx9/Makefile b/arch/arm/mach-imx/imx9/Makefile
index e1b09ab5341..45a9105a75a 100644
--- a/arch/arm/mach-imx/imx9/Makefile
+++ b/arch/arm/mach-imx/imx9/Makefile
@@ -5,6 +5,6 @@
obj-y += lowlevel_init.o
obj-y += soc.o clock.o clock_root.o trdc.o
-#ifndef CONFIG_SPL_BUILD
+#ifndef CONFIG_XPL_BUILD
obj-y += imx_bootaux.o
#endif
diff --git a/arch/arm/mach-imx/imx9/clock.c b/arch/arm/mach-imx/imx9/clock.c
index 12685f970de..c00be19c4fa 100644
--- a/arch/arm/mach-imx/imx9/clock.c
+++ b/arch/arm/mach-imx/imx9/clock.c
@@ -35,6 +35,7 @@ static struct imx_intpll_rate_table imx9_intpll_tbl[] = {
static struct imx_fracpll_rate_table imx9_fracpll_tbl[] = {
FRAC_PLL_RATE(1000000000U, 1, 166, 4, 2, 3), /* 1000Mhz */
FRAC_PLL_RATE(933000000U, 1, 155, 4, 1, 2), /* 933Mhz */
+ FRAC_PLL_RATE(800000000U, 1, 200, 6, 0, 1), /* 800Mhz */
FRAC_PLL_RATE(700000000U, 1, 145, 5, 5, 6), /* 700Mhz */
FRAC_PLL_RATE(484000000U, 1, 121, 6, 0, 1),
FRAC_PLL_RATE(445333333U, 1, 167, 9, 0, 1),
@@ -640,7 +641,7 @@ void enable_usboh3_clk(unsigned char enable)
}
}
-#ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_XPL_BUILD
void dram_pll_init(ulong pll_val)
{
configure_fracpll(DRAM_PLL_CLK, pll_val);
@@ -950,7 +951,7 @@ int set_clk_enet(enum enet_freq type)
/*
* Dump some clockes.
*/
-#ifndef CONFIG_SPL_BUILD
+#ifndef CONFIG_XPL_BUILD
int do_showclocks(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[])
{
u32 freq;
diff --git a/arch/arm/mach-imx/imx9/clock_root.c b/arch/arm/mach-imx/imx9/clock_root.c
index 47106fffefb..5dbc398e97f 100644
--- a/arch/arm/mach-imx/imx9/clock_root.c
+++ b/arch/arm/mach-imx/imx9/clock_root.c
@@ -7,9 +7,10 @@
#include <config.h>
#include <command.h>
+#include <asm/arch/ccm_regs.h>
#include <asm/arch/clock.h>
+#include <asm/arch/imx-regs.h>
#include <asm/arch/sys_proto.h>
-#include <asm/arch/ccm_regs.h>
#include <asm/global_data.h>
#include <linux/iopoll.h>
diff --git a/arch/arm/mach-imx/imx9/lowlevel_init.S b/arch/arm/mach-imx/imx9/lowlevel_init.S
index 1dc1dbfcddc..97d85911041 100644
--- a/arch/arm/mach-imx/imx9/lowlevel_init.S
+++ b/arch/arm/mach-imx/imx9/lowlevel_init.S
@@ -16,7 +16,7 @@ rom_pointer:
.global save_boot_params
save_boot_params:
-#ifndef CONFIG_SPL_BUILD
+#ifndef CONFIG_XPL_BUILD
/* The firmware provided ATAG/FDT address can be found in r2/x0 */
adr x0, rom_pointer
stp x1, x2, [x0], #16
diff --git a/arch/arm/mach-imx/imx9/soc.c b/arch/arm/mach-imx/imx9/soc.c
index 04b21207a28..7c28fa39e14 100644
--- a/arch/arm/mach-imx/imx9/soc.c
+++ b/arch/arm/mach-imx/imx9/soc.c
@@ -383,7 +383,7 @@ int dram_init(void)
return ret;
/* rom_pointer[1] contains the size of TEE occupies */
- if (!IS_ENABLED(CONFIG_SPL_BUILD) && rom_pointer[1])
+ if (!IS_ENABLED(CONFIG_XPL_BUILD) && rom_pointer[1])
gd->ram_size = sdram_size - rom_pointer[1];
else
gd->ram_size = sdram_size;
@@ -412,7 +412,7 @@ int dram_init_banksize(void)
}
gd->bd->bi_dram[bank].start = PHYS_SDRAM;
- if (!IS_ENABLED(CONFIG_SPL_BUILD) && rom_pointer[1]) {
+ if (!IS_ENABLED(CONFIG_XPL_BUILD) && rom_pointer[1]) {
phys_addr_t optee_start = (phys_addr_t)rom_pointer[0];
phys_size_t optee_size = (size_t)rom_pointer[1];
@@ -457,7 +457,7 @@ phys_size_t get_effective_memsize(void)
else
sdram_b1_size = sdram_size;
- if (!IS_ENABLED(CONFIG_SPL_BUILD) && rom_pointer[1]) {
+ if (!IS_ENABLED(CONFIG_XPL_BUILD) && rom_pointer[1]) {
/* We will relocate u-boot to top of dram1. TEE position has two cases:
* 1. At the top of dram1, Then return the size removed optee size.
* 2. In the middle of dram1, return the size of dram1.
@@ -629,7 +629,7 @@ static int low_drive_freq_update(void *blob)
}
#ifdef CONFIG_OF_BOARD_FIXUP
-#ifndef CONFIG_SPL_BUILD
+#ifndef CONFIG_XPL_BUILD
int board_fix_fdt(void *fdt)
{
/* Update dtb clocks for low drive mode */
@@ -701,7 +701,7 @@ static void save_reset_cause(void)
int arch_cpu_init(void)
{
- if (IS_ENABLED(CONFIG_SPL_BUILD)) {
+ if (IS_ENABLED(CONFIG_XPL_BUILD)) {
/* Disable wdog */
init_wdog();
@@ -745,7 +745,7 @@ EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_R, imx9_probe_mu);
int timer_init(void)
{
-#ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_XPL_BUILD
struct sctr_regs *sctr = (struct sctr_regs *)SYSCNT_CTRL_BASE_ADDR;
unsigned long freq = readl(&sctr->cntfid0);