diff options
Diffstat (limited to 'arch/arm/mach-imx')
| -rw-r--r-- | arch/arm/mach-imx/Kconfig | 4 | ||||
| -rw-r--r-- | arch/arm/mach-imx/Makefile | 10 | ||||
| -rw-r--r-- | arch/arm/mach-imx/ele_ahab.c | 31 | ||||
| -rw-r--r-- | arch/arm/mach-imx/image-container.c | 10 | ||||
| -rw-r--r-- | arch/arm/mach-imx/imx8m/clock_imx8mm.c | 11 | ||||
| -rw-r--r-- | arch/arm/mach-imx/imx8m/soc.c | 49 | ||||
| -rw-r--r-- | arch/arm/mach-imx/imx9/soc.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-imx/mx6/Kconfig | 1 | ||||
| -rw-r--r-- | arch/arm/mach-imx/mx6/soc.c | 4 | ||||
| -rw-r--r-- | arch/arm/mach-imx/spl_imx_romapi.c | 27 |
10 files changed, 123 insertions, 26 deletions
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index c34bc25c0bf..134e42028c3 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -1,6 +1,8 @@ config MACH_IMX bool +if MACH_IMX + config HAS_CAAM bool @@ -200,3 +202,5 @@ config IOMUX_LPSR config IOMUX_SHARE_CONF_REG bool + +endif diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index b311d176d64..5262dca4ffd 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -217,8 +217,8 @@ endif ifeq ($(CONFIG_ARCH_IMX9)$(CONFIG_ARCH_IMX8ULP), y) -quiet_cmd_imx9_check = CHECK $@ -cmd_imx9_check = $(srctree)/tools/imx9_image.sh $@ +quiet_cmd_cpp_cfg_imx9_check = CHECK $@ +cmd_cpp_cfg_imx9_check = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -x c -o $@ $< && $(srctree)/tools/imx9_image.sh $@ SPL: spl/u-boot-spl.bin spl/u-boot-spl.cfgout u-boot-container.cfgout FORCE @@ -227,15 +227,13 @@ flash.bin: MKIMAGEOUTPUT = flash.log spl/u-boot-spl.cfgout: $(IMX_CONFIG) FORCE $(Q)mkdir -p $(dir $@) - $(call if_changed_dep,cpp_cfg) - $(call if_changed,imx9_check) + $(call if_changed_dep,cpp_cfg_imx9_check) spl/u-boot-spl-ddr.bin: spl/u-boot-spl.bin spl/u-boot-spl.cfgout FORCE u-boot-container.cfgout: $(IMX_CONTAINER_CFG) FORCE $(Q)mkdir -p $(dir $@) - $(call if_changed_dep,cpp_cfg) - $(call if_changed,imx9_check) + $(call if_changed_dep,cpp_cfg_imx9_check) flash.bin: spl/u-boot-spl-ddr.bin container.cfgout FORCE $(call if_changed,mkimage) diff --git a/arch/arm/mach-imx/ele_ahab.c b/arch/arm/mach-imx/ele_ahab.c index c13d9f0e00e..647daeb6562 100644 --- a/arch/arm/mach-imx/ele_ahab.c +++ b/arch/arm/mach-imx/ele_ahab.c @@ -624,6 +624,31 @@ static int do_ahab_return_lifecycle(struct cmd_tbl *cmdtp, int flag, int argc, c return CMD_RET_SUCCESS; } +static int do_ahab_derive(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + ulong key; + size_t key_size; + char seed[] = "_ELE_AHAB_SEED_"; + + if (argc != 3) + return CMD_RET_USAGE; + + key = hextoul(argv[1], NULL); + key_size = simple_strtoul(argv[2], NULL, 10); + if (key_size != 16 && key_size != 32) { + printf("key size can only be 16 or 32\n"); + return CMD_RET_FAILURE; + } + + if (ele_derive_huk((u8 *)key, key_size, seed, sizeof(seed))) { + printf("Error in AHAB derive\n"); + return CMD_RET_FAILURE; + } + + return CMD_RET_SUCCESS; +} + static int do_ahab_commit(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { @@ -680,6 +705,12 @@ U_BOOT_CMD(ahab_return_lifecycle, CONFIG_SYS_MAXARGS, 1, do_ahab_return_lifecycl "addr - Return lifecycle message block signed by OEM SRK\n" ); +U_BOOT_CMD(ahab_derive, CONFIG_SYS_MAXARGS, 3, do_ahab_derive, + "Derive the hardware unique key", + "addr [16|32]\n" + "Store at addr the derivation of the HUK on 16 or 32 bytes.\n" +); + U_BOOT_CMD(ahab_commit, CONFIG_SYS_MAXARGS, 1, do_ahab_commit, "commit into the fuses any new SRK revocation and FW version information\n" "that have been found into the NXP (ELE FW) and OEM containers", diff --git a/arch/arm/mach-imx/image-container.c b/arch/arm/mach-imx/image-container.c index e2388e3fef8..2afe9d38a06 100644 --- a/arch/arm/mach-imx/image-container.c +++ b/arch/arm/mach-imx/image-container.c @@ -205,7 +205,7 @@ static unsigned long get_boot_device_offset(void *dev, int dev_type) } else { u8 part = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config); - if (part == 1 || part == 2) { + if (part == EMMC_BOOT_PART_BOOT1 || part == EMMC_BOOT_PART_BOOT2) { if (is_imx8qxp() && is_soc_rev(CHIP_REV_B)) offset = CONTAINER_HDR_MMCSD_OFFSET; else @@ -294,15 +294,15 @@ int spl_mmc_emmc_boot_partition(struct mmc *mmc) int part; part = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config); - if (part == 1 || part == 2) { + if (part == EMMC_BOOT_PART_BOOT1 || part == EMMC_BOOT_PART_BOOT2) { unsigned long sec_set_off = 0; bool sec_boot = false; sec_boot = check_secondary_cnt_set(&sec_set_off); if (sec_boot) - part = (part == 1) ? 2 : 1; - } else if (part == 7) { - part = 0; + part = (part == EMMC_BOOT_PART_BOOT1) ? EMMC_HWPART_BOOT2 : EMMC_HWPART_BOOT1; + } else if (part == EMMC_BOOT_PART_USER) { + part = EMMC_HWPART_DEFAULT; } return part; diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c index de630e940c9..d7fd102c955 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c @@ -181,10 +181,19 @@ void dram_disable_bypass(void) } #endif -int intpll_configure(enum pll_clocks pll, ulong freq) +__weak int board_imx_intpll_override(enum pll_clocks pll, ulong *freq) +{ + return 0; +} + +static int intpll_configure(enum pll_clocks pll, ulong freq) { void __iomem *pll_gnrl_ctl, __iomem *pll_div_ctl; u32 pll_div_ctl_val, pll_clke_masks; + int ret = board_imx_intpll_override(pll, &freq); + + if (ret) + return ret; switch (pll) { case ANATOP_SYSTEM_PLL1: diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index be38ca52885..986687e9ce4 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -32,6 +32,7 @@ #include <imx_sip.h> #include <linux/bitops.h> #include <linux/bitfield.h> +#include <linux/sizes.h> DECLARE_GLOBAL_DATA_PTR; @@ -206,6 +207,14 @@ void enable_caches(void) int entry = imx8m_find_dram_entry_in_mem_map(); u64 attrs = imx8m_mem_map[entry].attrs; + /* Deactivate the data cache, possibly enabled in arch_cpu_init() */ + dcache_disable(); + /* + * Force the call of setup_all_pgtables() in mmu_setup() by clearing tlb_fillptr + * to update the TLB location udpated in board_f.c::reserve_mmu + */ + gd->arch.tlb_fillptr = 0; + while (i < CONFIG_NR_DRAM_BANKS && entry < ARRAY_SIZE(imx8m_mem_map)) { if (gd->bd->bi_dram[i].start == 0) @@ -587,12 +596,50 @@ static void imx8m_setup_csu_tzasc(void) } } +/* + * Place early TLB into the .data section so that it will not + * get cleared, use 16 kiB alignment. + */ +#define EARLY_TLB_SIZE SZ_64K +u8 early_tlb[EARLY_TLB_SIZE] __section(".data") __aligned(0x4000); + +/* + * Initialize the MMU and activate cache in U-Boot pre-reloc stage + * MMU/TLB is updated in enable_caches() for U-Boot after relocation + */ +static void early_enable_caches(void) +{ + phys_size_t sdram_size; + int entry, ret; + + if (IS_ENABLED(CONFIG_SPL_BUILD)) + return; + + if (CONFIG_IS_ENABLED(SYS_ICACHE_OFF) || CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) + return; + + /* Use maximum available DRAM size in first bank. */ + ret = board_phys_sdram_size(&sdram_size); + if (ret) + return; + + entry = imx8m_find_dram_entry_in_mem_map(); + imx8m_mem_map[entry].size = max(sdram_size, (phys_size_t)0xc0000000); + + gd->arch.tlb_size = EARLY_TLB_SIZE; + gd->arch.tlb_addr = (unsigned long)&early_tlb; + + /* Enable MMU (default configuration) */ + dcache_enable(); +} + int arch_cpu_init(void) { struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; #if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) icache_enable(); + early_enable_caches(); #endif /* @@ -735,6 +782,7 @@ int boot_mode_getprisec(void) #endif #if defined(CONFIG_IMX8MN) || defined(CONFIG_IMX8MP) +#ifdef SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION #define IMG_CNTN_SET1_OFFSET GENMASK(22, 19) unsigned long arch_spl_mmc_get_uboot_raw_sector(struct mmc *mmc, unsigned long raw_sect) @@ -769,6 +817,7 @@ unsigned long arch_spl_mmc_get_uboot_raw_sector(struct mmc *mmc, return raw_sect; } +#endif /* SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION */ #endif bool is_usb_boot(void) diff --git a/arch/arm/mach-imx/imx9/soc.c b/arch/arm/mach-imx/imx9/soc.c index 32208220b20..f88e7a222dd 100644 --- a/arch/arm/mach-imx/imx9/soc.c +++ b/arch/arm/mach-imx/imx9/soc.c @@ -536,7 +536,7 @@ static int fixup_thermal_trips(void *blob, const char *name) temp = 0; if (!strcmp(type, "critical")) - temp = 1000 * (maxc - 5); + temp = 1000 * maxc; else if (!strcmp(type, "passive")) temp = 1000 * (maxc - 10); if (temp) { diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index bee9d5f4877..7a567672251 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -393,6 +393,7 @@ config TARGET_MX6SLEVK bool "mx6slevk" depends on MX6SL select SUPPORT_SPL + imply OF_UPSTREAM config TARGET_MX6SLLEVK bool "mx6sll evk" diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c index 3a3e01f3d0a..2c0c77e1a56 100644 --- a/arch/arm/mach-imx/mx6/soc.c +++ b/arch/arm/mach-imx/mx6/soc.c @@ -585,6 +585,10 @@ const struct boot_mode soc_boot_modes[] = { {"ecspi1:1", MAKE_CFGVAL(0x30, 0x00, 0x00, 0x18)}, {"ecspi1:2", MAKE_CFGVAL(0x30, 0x00, 0x00, 0x28)}, {"ecspi1:3", MAKE_CFGVAL(0x30, 0x00, 0x00, 0x38)}, + {"ecspi3:0", MAKE_CFGVAL(0x30, 0x00, 0x00, 0x0a)}, + {"ecspi3:1", MAKE_CFGVAL(0x30, 0x00, 0x00, 0x1a)}, + {"ecspi3:2", MAKE_CFGVAL(0x30, 0x00, 0x00, 0x2a)}, + {"ecspi3:3", MAKE_CFGVAL(0x30, 0x00, 0x00, 0x3a)}, /* 4 bit bus width */ {"esdhc1", MAKE_CFGVAL(0x40, 0x20, 0x00, 0x00)}, {"esdhc2", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)}, diff --git a/arch/arm/mach-imx/spl_imx_romapi.c b/arch/arm/mach-imx/spl_imx_romapi.c index 9a86f5c133f..3982f4cca18 100644 --- a/arch/arm/mach-imx/spl_imx_romapi.c +++ b/arch/arm/mach-imx/spl_imx_romapi.c @@ -33,8 +33,17 @@ ulong spl_romapi_raw_seekable_read(u32 offset, u32 size, void *buf) ulong __weak spl_romapi_get_uboot_base(u32 image_offset, u32 rom_bt_dev) { - return image_offset + - (CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512 - 0x8000); + u32 sector = 0; + + /* + * Some boards use this value even though MMC is not enabled in SPL, for + * example imx8mn_bsh_smm_s2 + */ +#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR + sector = CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR; +#endif + + return image_offset + sector * 512 - 0x8000; } static int is_boot_from_stream_device(u32 boot) @@ -99,18 +108,13 @@ static int spl_romapi_load_image_seekable(struct spl_image_info *spl_image, if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) && image_get_magic(header) == FDT_MAGIC) { struct spl_load_info load; - memset(&load, 0, sizeof(load)); - spl_set_bl_len(&load, pagesize); - load.read = spl_romapi_read_seekable; + spl_load_init(&load, spl_romapi_read_seekable, NULL, pagesize); return spl_load_simple_fit(spl_image, &load, offset, header); } else if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER) && valid_container_hdr((void *)header)) { struct spl_load_info load; - memset(&load, 0, sizeof(load)); - spl_set_bl_len(&load, pagesize); - load.read = spl_romapi_read_seekable; - + spl_load_init(&load, spl_romapi_read_seekable, NULL, pagesize); ret = spl_load_imx_container(spl_image, &load, offset); } else { /* TODO */ @@ -332,10 +336,7 @@ static int spl_romapi_load_image_stream(struct spl_image_info *spl_image, ss.end = p; ss.pagesize = pagesize; - memset(&load, 0, sizeof(load)); - spl_set_bl_len(&load, 1); - load.read = spl_romapi_read_stream; - load.priv = &ss; + spl_load_init(&load, spl_romapi_read_stream, &ss, 1); return spl_load_simple_fit(spl_image, &load, (ulong)phdr, phdr); } |