diff options
Diffstat (limited to 'arch/arm/mach-imx')
28 files changed, 91 insertions, 81 deletions
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index f8903afc92e..21d955b4aef 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -10,7 +10,7 @@ obj-y = iomux-v3.o endif ifeq ($(SOC),$(filter $(SOC),imx8m)) -ifneq ($(CONFIG_SPL_BUILD),y) +ifneq ($(CONFIG_XPL_BUILD),y) obj-$(CONFIG_IMX_BOOTAUX) += imx_bootaux.o endif obj-$(CONFIG_ENV_IS_IN_MMC) += mmc_env.o @@ -22,7 +22,7 @@ obj-y += cpu.o endif ifeq ($(SOC),$(filter $(SOC),imx8m imx9)) -ifneq ($(CONFIG_SPL_BUILD),y) +ifneq ($(CONFIG_XPL_BUILD),y) obj-y += fdt.o endif endif @@ -38,7 +38,7 @@ endif ifeq ($(SOC),$(filter $(SOC),mx7 mx6 mxs imx8m imx8 imx9 imxrt)) obj-y += misc.o obj-$(CONFIG_CMD_PRIBLOB) += priblob.o -obj-$(CONFIG_SPL_BUILD) += spl.o +obj-$(CONFIG_XPL_BUILD) += spl.o endif ifeq ($(SOC),$(filter $(SOC),mx7)) obj-y += cpu.o @@ -46,7 +46,7 @@ obj-$(CONFIG_SYS_I2C_MXC) += i2c-mxv7.o obj-$(CONFIG_ENV_IS_IN_MMC) += mmc_env.o endif ifeq ($(SOC),$(filter $(SOC),mx7 imx8m)) -ifneq ($(CONFIG_SPL_BUILD),y) +ifneq ($(CONFIG_XPL_BUILD),y) obj-$(CONFIG_FSL_MFGPROT) += cmd_mfgprot.o endif endif @@ -57,10 +57,10 @@ ifeq ($(SOC),$(filter $(SOC),mx6 mx7)) obj-y += cache.o init.o obj-$(CONFIG_FEC_MXC) += mac.o obj-$(CONFIG_IMX_RDC) += rdc-sema.o -ifneq ($(CONFIG_SPL_BUILD),y) +ifneq ($(CONFIG_XPL_BUILD),y) obj-$(CONFIG_IMX_BOOTAUX) += imx_bootaux.o endif -obj-$(CONFIG_$(SPL_)SATA) += sata.o +obj-$(CONFIG_$(XPL_)SATA) += sata.o obj-$(CONFIG_IMX_HAB) += hab.o obj-$(CONFIG_SYSCOUNTER_TIMER) += syscounter.o endif @@ -73,18 +73,18 @@ obj-y += ddrmc-vf610.o obj-$(CONFIG_DDRMC_VF610_CALIBRATION) += ddrmc-vf610-calibration.o endif ifeq ($(SOC),$(filter $(SOC),imx8)) -ifneq ($(CONFIG_SPL_BUILD),y) +ifneq ($(CONFIG_XPL_BUILD),y) obj-$(CONFIG_IMX_BOOTAUX) += imx_bootaux.o endif endif -ifneq ($(CONFIG_SPL_BUILD),y) +ifneq ($(CONFIG_XPL_BUILD),y) obj-$(CONFIG_CMD_BMODE) += cmd_bmode.o obj-$(CONFIG_CMD_HDMIDETECT) += cmd_hdmidet.o obj-$(CONFIG_CMD_DEKBLOB) += cmd_dek.o obj-$(CONFIG_CMD_NANDBCB) += cmd_nandbcb.o endif -ifeq ($(CONFIG_SPL_BUILD),y) +ifeq ($(CONFIG_XPL_BUILD),y) obj-$(CONFIG_SPL_LOAD_IMX_CONTAINER) += image-container.o endif @@ -128,7 +128,7 @@ container.cfg: $(IMX_CONTAINER_CFG) FORCE ifeq ($(CONFIG_ARCH_IMX8), y) CNTR_DEPFILES := $(srctree)/tools/imx_cntr_image.sh IMAGE_TYPE := imx8image -ifeq ($(CONFIG_SPL_BUILD),y) +ifeq ($(CONFIG_XPL_BUILD),y) SPL_DEPFILE_EXISTS := $(shell $(CPP) $(cpp_flags) -x c -o spl/u-boot-spl.cfgout $(srctree)/$(IMX_CONFIG); if [ -f spl/u-boot-spl.cfgout ]; then $(CNTR_DEPFILES) spl/u-boot-spl.cfgout; echo $$?; fi) endif DEPFILE_EXISTS := $(shell $(CPP) $(cpp_flags) -x c -o u-boot-dtb.cfgout $(srctree)/$(IMX_CONFIG); if [ -f u-boot-dtb.cfgout ]; then $(CNTR_DEPFILES) u-boot-dtb.cfgout; echo $$?; fi) diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index ceee31eecd7..17de9ff98ec 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -39,7 +39,7 @@ u32 get_imx_reset_cause(void) if (reset_cause == -1) { reset_cause = readl(&src_regs->srsr); /* preserve the value for U-Boot proper */ -#if !defined(CONFIG_SPL_BUILD) +#if !defined(CONFIG_XPL_BUILD) writel(reset_cause, &src_regs->srsr); #endif } @@ -47,7 +47,7 @@ u32 get_imx_reset_cause(void) return reset_cause; } -#if defined(CONFIG_DISPLAY_CPUINFO) && !defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_DISPLAY_CPUINFO) && !defined(CONFIG_XPL_BUILD) static char *get_reset_cause(void) { switch (get_imx_reset_cause()) { @@ -92,7 +92,7 @@ static char *get_reset_cause(void) } #endif -#if defined(CONFIG_DISPLAY_CPUINFO) && !defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_DISPLAY_CPUINFO) && !defined(CONFIG_XPL_BUILD) const char *get_imx_type(u32 imxtype) { diff --git a/arch/arm/mach-imx/hab.c b/arch/arm/mach-imx/hab.c index 85d90686f68..a8107f46ae5 100644 --- a/arch/arm/mach-imx/hab.c +++ b/arch/arm/mach-imx/hab.c @@ -245,7 +245,7 @@ void *hab_rvt_authenticate_image(uint8_t cid, ptrdiff_t ivt_offset, return ret; } -#if !defined(CONFIG_SPL_BUILD) +#if !defined(CONFIG_XPL_BUILD) #define MAX_RECORD_BYTES (8*1024) /* 4 kbytes */ @@ -727,7 +727,7 @@ U_BOOT_CMD( "" ); -#endif /* !defined(CONFIG_SPL_BUILD) */ +#endif /* !defined(CONFIG_XPL_BUILD) */ /* Get CSF Header length */ static int get_hab_hdr_len(struct hab_hdr *hdr) @@ -939,7 +939,7 @@ int imx_hab_authenticate_image(uint32_t ddr_start, uint32_t image_size, puts("Dumping CSF Header\n"); print_buffer(ivt->csf, (void *)(uintptr_t)(ivt->csf), 4, 0x10, 0); -#if !defined(CONFIG_SPL_BUILD) +#if !defined(CONFIG_XPL_BUILD) get_hab_status(); #endif @@ -989,7 +989,7 @@ int imx_hab_authenticate_image(uint32_t ddr_start, uint32_t image_size, } hab_exit_failure_print_status: -#if !defined(CONFIG_SPL_BUILD) +#if !defined(CONFIG_XPL_BUILD) get_hab_status(); #endif diff --git a/arch/arm/mach-imx/imx8/ahab.c b/arch/arm/mach-imx/imx8/ahab.c index ed44df394b1..324e010bb2c 100644 --- a/arch/arm/mach-imx/imx8/ahab.c +++ b/arch/arm/mach-imx/imx8/ahab.c @@ -345,9 +345,9 @@ int ahab_close(void) u16 lc; err = sc_seco_chip_info(-1, &lc, NULL, NULL, NULL); - if (err != SC_ERR_NONE) { + if (err) { printf("Error in get lifecycle\n"); - return -EIO; + return err; } if (lc != 0x20) { @@ -357,9 +357,9 @@ int ahab_close(void) } err = sc_seco_forward_lifecycle(-1, 16); - if (err != SC_ERR_NONE) { + if (err) { printf("Error in forward lifecycle to OEM closed\n"); - return -EIO; + return err; } return 0; diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c index 834aca82bcf..37a5473ac7c 100644 --- a/arch/arm/mach-imx/imx8/cpu.c +++ b/arch/arm/mach-imx/imx8/cpu.c @@ -48,7 +48,7 @@ static char *get_reset_cause(void) { sc_pm_reset_reason_t reason; - if (sc_pm_reset_reason(-1, &reason) != SC_ERR_NONE) + if (sc_pm_reset_reason(-1, &reason)) return "Unknown reset"; switch (reason) { @@ -89,11 +89,11 @@ __weak void reset_cpu(void) int arch_cpu_init(void) { -#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_RECOVER_DATA_SECTION) +#if defined(CONFIG_XPL_BUILD) && defined(CONFIG_SPL_RECOVER_DATA_SECTION) spl_save_restore_data(); #endif -#ifdef CONFIG_SPL_BUILD +#ifdef CONFIG_XPL_BUILD struct pass_over_info_t *pass_over; if (is_soc_rev(CHIP_REV_A)) { @@ -160,6 +160,7 @@ int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data) sc_faddr_t tcml_addr; u32 tcml_size = SZ_128K; ulong addr; + int ret; switch (core_id) { case 0: @@ -187,10 +188,12 @@ int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data) printf("Power on M4 and MU\n"); - if (sc_pm_set_resource_power_mode(-1, core_rsrc, SC_PM_PW_MODE_ON) != SC_ERR_NONE) - return -EIO; + ret = sc_pm_set_resource_power_mode(-1, core_rsrc, SC_PM_PW_MODE_ON); + if (ret) + return ret; - if (sc_pm_set_resource_power_mode(-1, mu_rsrc, SC_PM_PW_MODE_ON) != SC_ERR_NONE) + ret = sc_pm_set_resource_power_mode(-1, mu_rsrc, SC_PM_PW_MODE_ON); + if (ret) return -EIO; printf("Copy M4 image from 0x%lx to TCML 0x%lx\n", addr, (ulong)tcml_addr); @@ -199,7 +202,8 @@ int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data) memcpy((void *)tcml_addr, (void *)addr, tcml_size); printf("Start M4 %u\n", core_id); - if (sc_pm_cpu_start(-1, core_rsrc, true, tcml_addr) != SC_ERR_NONE) + ret = sc_pm_cpu_start(-1, core_rsrc, true, tcml_addr); + if (ret) return -EIO; printf("bootaux complete\n"); @@ -214,6 +218,7 @@ int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data) sc_faddr_t aux_core_ram; u32 size; ulong addr; + int ret; switch (core_id) { case 0: @@ -242,20 +247,23 @@ int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data) printf("Power on aux core %d\n", core_id); - if (sc_pm_set_resource_power_mode(-1, core_rsrc, SC_PM_PW_MODE_ON) != SC_ERR_NONE) - return -EIO; + ret = sc_pm_set_resource_power_mode(-1, core_rsrc, SC_PM_PW_MODE_ON); + if (ret) + return ret; if (mu_rsrc != SC_R_NONE) { - if (sc_pm_set_resource_power_mode(-1, mu_rsrc, SC_PM_PW_MODE_ON) != SC_ERR_NONE) + ret = sc_pm_set_resource_power_mode(-1, mu_rsrc, SC_PM_PW_MODE_ON); + if (ret) return -EIO; } if (core_id == 1) { struct power_domain pd; - if (sc_pm_clock_enable(-1, core_rsrc, SC_PM_CLK_PER, true, false) != SC_ERR_NONE) { + ret = sc_pm_clock_enable(-1, core_rsrc, SC_PM_CLK_PER, true, false); + if (ret) { printf("Error enable clock\n"); - return -EIO; + return ret; } if (!imx8_power_domain_lookup_name("audio_sai0", &pd)) { @@ -286,8 +294,9 @@ int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data) printf("Start %s\n", core_id == 0 ? "M4" : "HIFI"); - if (sc_pm_cpu_start(-1, core_rsrc, true, aux_core_ram) != SC_ERR_NONE) - return -EIO; + ret = sc_pm_cpu_start(-1, core_rsrc, true, aux_core_ram); + if (ret) + return ret; printf("bootaux complete\n"); return 0; @@ -313,7 +322,7 @@ int arch_auxiliary_core_check_up(u32 core_id) return 0; } - if (sc_pm_get_resource_power_mode(-1, core_rsrc, &power_mode) != SC_ERR_NONE) + if (sc_pm_get_resource_power_mode(-1, core_rsrc, &power_mode)) return 0; if (power_mode != SC_PM_PW_MODE_OFF) diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig index d1fdaec7043..9d1fabe91c0 100644 --- a/arch/arm/mach-imx/imx8m/Kconfig +++ b/arch/arm/mach-imx/imx8m/Kconfig @@ -197,6 +197,7 @@ config TARGET_IMX8MP_DEBIX_MODEL_A select IMX8MP select IMX8M_LPDDR4 select SUPPORT_SPL + imply OF_UPSTREAM config TARGET_IMX8MP_DH_DHCOM_PDK2 bool "DH electronics DHCOM Premium Developer Kit (2) i.MX8M Plus" diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c index d7fd102c955..d5745f67262 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c @@ -51,7 +51,7 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num) return 0; } -#ifdef CONFIG_SPL_BUILD +#ifdef CONFIG_XPL_BUILD static struct imx_int_pll_rate_table imx8mm_fracpll_tbl[] = { PLL_1443X_RATE(1000000000U, 250, 3, 1, 0), PLL_1443X_RATE(933000000U, 311, 4, 1, 0), diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mq.c b/arch/arm/mach-imx/imx8m/clock_imx8mq.c index 43e677deae2..2f53430b4d0 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mq.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mq.c @@ -611,7 +611,7 @@ void dram_disable_bypass(void) CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV5)); } -#ifdef CONFIG_SPL_BUILD +#ifdef CONFIG_XPL_BUILD void dram_pll_init(ulong pll_val) { u32 val; @@ -791,7 +791,7 @@ int clock_init(void) /* * Dump some clockes. */ -#ifndef CONFIG_SPL_BUILD +#ifndef CONFIG_XPL_BUILD static int do_imx8m_showclocks(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 5293cb85e56..a72329ea919 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -45,7 +45,7 @@ struct imx_sec_config_fuse_t const imx_sec_config_fuse = { int timer_init(void) { -#ifdef CONFIG_SPL_BUILD +#ifdef CONFIG_XPL_BUILD struct sctr_regs *sctr = (struct sctr_regs *)SYSCNT_CTRL_BASE_ADDR; unsigned long freq = readl(&sctr->cntfid0); @@ -255,7 +255,7 @@ int dram_init(void) return ret; /* rom_pointer[1] contains the size of TEE occupies */ - if (!IS_ENABLED(CONFIG_ARMV8_PSCI) && !IS_ENABLED(CONFIG_SPL_BUILD) && rom_pointer[1]) + if (!IS_ENABLED(CONFIG_ARMV8_PSCI) && !IS_ENABLED(CONFIG_XPL_BUILD) && rom_pointer[1]) gd->ram_size = sdram_size - rom_pointer[1]; else gd->ram_size = sdram_size; @@ -284,7 +284,7 @@ int dram_init_banksize(void) } gd->bd->bi_dram[bank].start = PHYS_SDRAM; - if (!IS_ENABLED(CONFIG_ARMV8_PSCI) && !IS_ENABLED(CONFIG_SPL_BUILD) && rom_pointer[1]) { + if (!IS_ENABLED(CONFIG_ARMV8_PSCI) && !IS_ENABLED(CONFIG_XPL_BUILD) && rom_pointer[1]) { phys_addr_t optee_start = (phys_addr_t)rom_pointer[0]; phys_size_t optee_size = (size_t)rom_pointer[1]; @@ -329,7 +329,7 @@ phys_size_t get_effective_memsize(void) sdram_b1_size = sdram_size; } - if (!IS_ENABLED(CONFIG_ARMV8_PSCI) && !IS_ENABLED(CONFIG_SPL_BUILD) && + if (!IS_ENABLED(CONFIG_ARMV8_PSCI) && !IS_ENABLED(CONFIG_XPL_BUILD) && rom_pointer[1]) { /* We will relocate u-boot to Top of dram1. Tee position has two cases: * 1. At the top of dram1, Then return the size removed optee size. @@ -612,7 +612,7 @@ static void early_enable_caches(void) phys_size_t sdram_size; int entry, ret; - if (IS_ENABLED(CONFIG_SPL_BUILD)) + if (IS_ENABLED(CONFIG_XPL_BUILD)) return; if (CONFIG_IS_ENABLED(SYS_ICACHE_OFF) || CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) @@ -646,7 +646,7 @@ int arch_cpu_init(void) * ROM might disable clock for SCTR, * enable the clock before timer_init. */ - if (IS_ENABLED(CONFIG_SPL_BUILD)) + if (IS_ENABLED(CONFIG_XPL_BUILD)) clock_enable(CCGR_SCTR, 1); /* * Init timer at very early state, because sscg pll setting @@ -654,7 +654,7 @@ int arch_cpu_init(void) */ timer_init(); - if (IS_ENABLED(CONFIG_SPL_BUILD)) { + if (IS_ENABLED(CONFIG_XPL_BUILD)) { clock_init(); imx_set_wdog_powerdown(false); @@ -1477,7 +1477,7 @@ int arch_misc_init(void) } #endif -#if defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_XPL_BUILD) #if defined(CONFIG_IMX8MQ) || defined(CONFIG_IMX8MM) || defined(CONFIG_IMX8MN) bool serror_need_skip = true; diff --git a/arch/arm/mach-imx/imx8ulp/Makefile b/arch/arm/mach-imx/imx8ulp/Makefile index 2c9938fcdf0..b478dab59d0 100644 --- a/arch/arm/mach-imx/imx8ulp/Makefile +++ b/arch/arm/mach-imx/imx8ulp/Makefile @@ -6,6 +6,6 @@ obj-y += lowlevel_init.o obj-y += soc.o clock.o iomux.o pcc.o cgc.o rdc.o -ifeq ($(CONFIG_SPL_BUILD),y) +ifeq ($(CONFIG_XPL_BUILD),y) obj-y += upower/ endif diff --git a/arch/arm/mach-imx/imx8ulp/clock.c b/arch/arm/mach-imx/imx8ulp/clock.c index fadf165ece2..c390f20d769 100644 --- a/arch/arm/mach-imx/imx8ulp/clock.c +++ b/arch/arm/mach-imx/imx8ulp/clock.c @@ -519,7 +519,7 @@ u32 get_lpuart_clk(void) return pcc_clock_get_rate(lpuart_pcc[index], lpuart_pcc_slots[index]); } -#ifndef CONFIG_SPL_BUILD +#ifndef CONFIG_XPL_BUILD /* * Dump some core clockes. */ diff --git a/arch/arm/mach-imx/imx8ulp/lowlevel_init.S b/arch/arm/mach-imx/imx8ulp/lowlevel_init.S index 791c26407c9..9ede695dbba 100644 --- a/arch/arm/mach-imx/imx8ulp/lowlevel_init.S +++ b/arch/arm/mach-imx/imx8ulp/lowlevel_init.S @@ -16,7 +16,7 @@ rom_pointer: .global save_boot_params save_boot_params: -#ifndef CONFIG_SPL_BUILD +#ifndef CONFIG_XPL_BUILD /* The firmware provided ATAG/FDT address can be found in r2/x0 */ adr x0, rom_pointer stp x1, x2, [x0], #16 diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c index c3722c60836..b5dc45296d1 100644 --- a/arch/arm/mach-imx/imx8ulp/soc.c +++ b/arch/arm/mach-imx/imx8ulp/soc.c @@ -104,7 +104,7 @@ enum bt_mode get_boot_mode(void) bool m33_image_booted(void) { - if (IS_ENABLED(CONFIG_SPL_BUILD)) { + if (IS_ENABLED(CONFIG_XPL_BUILD)) { u32 gp6 = 0; /* DGO_GP6 */ @@ -124,7 +124,7 @@ bool m33_image_booted(void) bool rdc_enabled_in_boot(void) { - if (IS_ENABLED(CONFIG_SPL_BUILD)) { + if (IS_ENABLED(CONFIG_XPL_BUILD)) { u32 val = 0; int ret; bool rdc_en = true; /* Default assume DBD_EN is set */ @@ -146,7 +146,7 @@ bool rdc_enabled_in_boot(void) static void spl_pass_boot_info(void) { - if (IS_ENABLED(CONFIG_SPL_BUILD)) { + if (IS_ENABLED(CONFIG_XPL_BUILD)) { bool m33_booted = m33_image_booted(); bool rdc_en = rdc_enabled_in_boot(); u32 val = 0; @@ -164,7 +164,7 @@ static void spl_pass_boot_info(void) bool is_m33_handshake_necessary(void) { /* Only need handshake in u-boot */ - if (!IS_ENABLED(CONFIG_SPL_BUILD)) + if (!IS_ENABLED(CONFIG_XPL_BUILD)) return (m33_image_booted() || rdc_enabled_in_boot()); else return false; @@ -716,7 +716,7 @@ void set_lpav_qos(void) int arch_cpu_init(void) { - if (IS_ENABLED(CONFIG_SPL_BUILD)) { + if (IS_ENABLED(CONFIG_XPL_BUILD)) { /* Enable System Reset Interrupt using WDOG_AD */ setbits_le32(CMC1_BASE_ADDR + 0x8C, BIT(13)); /* Clear AD_PERIPH Power switch domain out of reset interrupt flag */ @@ -805,7 +805,7 @@ int imx8ulp_dm_post_init(void) } EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, imx8ulp_dm_post_init); -#if defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_XPL_BUILD) __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) { debug("image entry point: 0x%lx\n", spl_image->entry_point); diff --git a/arch/arm/mach-imx/imx9/Makefile b/arch/arm/mach-imx/imx9/Makefile index e1b09ab5341..45a9105a75a 100644 --- a/arch/arm/mach-imx/imx9/Makefile +++ b/arch/arm/mach-imx/imx9/Makefile @@ -5,6 +5,6 @@ obj-y += lowlevel_init.o obj-y += soc.o clock.o clock_root.o trdc.o -#ifndef CONFIG_SPL_BUILD +#ifndef CONFIG_XPL_BUILD obj-y += imx_bootaux.o #endif diff --git a/arch/arm/mach-imx/imx9/clock.c b/arch/arm/mach-imx/imx9/clock.c index 12685f970de..dda57ed7f55 100644 --- a/arch/arm/mach-imx/imx9/clock.c +++ b/arch/arm/mach-imx/imx9/clock.c @@ -640,7 +640,7 @@ void enable_usboh3_clk(unsigned char enable) } } -#ifdef CONFIG_SPL_BUILD +#ifdef CONFIG_XPL_BUILD void dram_pll_init(ulong pll_val) { configure_fracpll(DRAM_PLL_CLK, pll_val); @@ -950,7 +950,7 @@ int set_clk_enet(enum enet_freq type) /* * Dump some clockes. */ -#ifndef CONFIG_SPL_BUILD +#ifndef CONFIG_XPL_BUILD int do_showclocks(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[]) { u32 freq; diff --git a/arch/arm/mach-imx/imx9/lowlevel_init.S b/arch/arm/mach-imx/imx9/lowlevel_init.S index 1dc1dbfcddc..97d85911041 100644 --- a/arch/arm/mach-imx/imx9/lowlevel_init.S +++ b/arch/arm/mach-imx/imx9/lowlevel_init.S @@ -16,7 +16,7 @@ rom_pointer: .global save_boot_params save_boot_params: -#ifndef CONFIG_SPL_BUILD +#ifndef CONFIG_XPL_BUILD /* The firmware provided ATAG/FDT address can be found in r2/x0 */ adr x0, rom_pointer stp x1, x2, [x0], #16 diff --git a/arch/arm/mach-imx/imx9/soc.c b/arch/arm/mach-imx/imx9/soc.c index 04b21207a28..7c28fa39e14 100644 --- a/arch/arm/mach-imx/imx9/soc.c +++ b/arch/arm/mach-imx/imx9/soc.c @@ -383,7 +383,7 @@ int dram_init(void) return ret; /* rom_pointer[1] contains the size of TEE occupies */ - if (!IS_ENABLED(CONFIG_SPL_BUILD) && rom_pointer[1]) + if (!IS_ENABLED(CONFIG_XPL_BUILD) && rom_pointer[1]) gd->ram_size = sdram_size - rom_pointer[1]; else gd->ram_size = sdram_size; @@ -412,7 +412,7 @@ int dram_init_banksize(void) } gd->bd->bi_dram[bank].start = PHYS_SDRAM; - if (!IS_ENABLED(CONFIG_SPL_BUILD) && rom_pointer[1]) { + if (!IS_ENABLED(CONFIG_XPL_BUILD) && rom_pointer[1]) { phys_addr_t optee_start = (phys_addr_t)rom_pointer[0]; phys_size_t optee_size = (size_t)rom_pointer[1]; @@ -457,7 +457,7 @@ phys_size_t get_effective_memsize(void) else sdram_b1_size = sdram_size; - if (!IS_ENABLED(CONFIG_SPL_BUILD) && rom_pointer[1]) { + if (!IS_ENABLED(CONFIG_XPL_BUILD) && rom_pointer[1]) { /* We will relocate u-boot to top of dram1. TEE position has two cases: * 1. At the top of dram1, Then return the size removed optee size. * 2. In the middle of dram1, return the size of dram1. @@ -629,7 +629,7 @@ static int low_drive_freq_update(void *blob) } #ifdef CONFIG_OF_BOARD_FIXUP -#ifndef CONFIG_SPL_BUILD +#ifndef CONFIG_XPL_BUILD int board_fix_fdt(void *fdt) { /* Update dtb clocks for low drive mode */ @@ -701,7 +701,7 @@ static void save_reset_cause(void) int arch_cpu_init(void) { - if (IS_ENABLED(CONFIG_SPL_BUILD)) { + if (IS_ENABLED(CONFIG_XPL_BUILD)) { /* Disable wdog */ init_wdog(); @@ -745,7 +745,7 @@ EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_R, imx9_probe_mu); int timer_init(void) { -#ifdef CONFIG_SPL_BUILD +#ifdef CONFIG_XPL_BUILD struct sctr_regs *sctr = (struct sctr_regs *)SYSCNT_CTRL_BASE_ADDR; unsigned long freq = readl(&sctr->cntfid0); diff --git a/arch/arm/mach-imx/mx5/clock.c b/arch/arm/mach-imx/mx5/clock.c index 0b8a10fd729..41116e2c6a2 100644 --- a/arch/arm/mach-imx/mx5/clock.c +++ b/arch/arm/mach-imx/mx5/clock.c @@ -940,7 +940,7 @@ void mxc_set_sata_internal_clock(void) } #endif -#ifndef CONFIG_SPL_BUILD +#ifndef CONFIG_XPL_BUILD /* * Dump some core clockes. */ diff --git a/arch/arm/mach-imx/mx6/Makefile b/arch/arm/mach-imx/mx6/Makefile index 7ea8f91e4f0..da461b0be9b 100644 --- a/arch/arm/mach-imx/mx6/Makefile +++ b/arch/arm/mach-imx/mx6/Makefile @@ -7,7 +7,7 @@ obj-y := soc.o clock.o obj-$(CONFIG_IMX_MODULE_FUSE) += module_fuse.o -obj-$(CONFIG_SPL_BUILD) += ddr.o +obj-$(CONFIG_XPL_BUILD) += ddr.o obj-$(CONFIG_MP) += mp.o obj-$(CONFIG_MX6UL_LITESOM) += litesom.o obj-$(CONFIG_MX6UL_OPOS6UL) += opos6ul.o diff --git a/arch/arm/mach-imx/mx6/clock.c b/arch/arm/mach-imx/mx6/clock.c index fb9f56d2e63..b5aa606b8d0 100644 --- a/arch/arm/mach-imx/mx6/clock.c +++ b/arch/arm/mach-imx/mx6/clock.c @@ -1367,7 +1367,7 @@ void disable_ipu_clock(void) } #endif -#ifndef CONFIG_SPL_BUILD +#ifndef CONFIG_XPL_BUILD /* * Dump some core clockes. */ diff --git a/arch/arm/mach-imx/mx6/litesom.c b/arch/arm/mach-imx/mx6/litesom.c index 03e1214c060..c6bf933df94 100644 --- a/arch/arm/mach-imx/mx6/litesom.c +++ b/arch/arm/mach-imx/mx6/litesom.c @@ -78,7 +78,7 @@ int litesom_mmc_init(struct bd_info *bis) } #endif -#ifdef CONFIG_SPL_BUILD +#ifdef CONFIG_XPL_BUILD #include <linux/libfdt.h> #include <spl.h> #include <asm/arch/mx6-ddr.h> diff --git a/arch/arm/mach-imx/mx6/opos6ul.c b/arch/arm/mach-imx/mx6/opos6ul.c index 340e6147b63..6a79dcb5bd1 100644 --- a/arch/arm/mach-imx/mx6/opos6ul.c +++ b/arch/arm/mach-imx/mx6/opos6ul.c @@ -79,7 +79,7 @@ int dram_init(void) return 0; } -#ifdef CONFIG_SPL_BUILD +#ifdef CONFIG_XPL_BUILD #include <asm/arch/mx6-ddr.h> #include <linux/libfdt.h> #include <spl.h> @@ -210,4 +210,4 @@ void board_init_f(ulong dummy) /* DDR initialization */ spl_dram_init(); } -#endif /* CONFIG_SPL_BUILD */ +#endif /* CONFIG_XPL_BUILD */ diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c index 2c0c77e1a56..9b40fe9235a 100644 --- a/arch/arm/mach-imx/mx6/soc.c +++ b/arch/arm/mach-imx/mx6/soc.c @@ -37,7 +37,7 @@ struct scu_regs { u32 fpga_rev; }; -#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_IMX_THERMAL) +#if !defined(CONFIG_XPL_BUILD) && defined(CONFIG_IMX_THERMAL) static const struct imx_thermal_plat imx6_thermal_plat = { .regs = (void *)ANATOP_BASE_ADDR, .fuse_bank = 1, @@ -565,7 +565,7 @@ int board_postclk_init(void) return 0; } -#ifndef CONFIG_SPL_BUILD +#ifndef CONFIG_XPL_BUILD /* * cfg_val will be used for * Boot_cfg4[7:0]:Boot_cfg3[7:0]:Boot_cfg2[7:0]:Boot_cfg1[7:0] @@ -600,7 +600,7 @@ const struct boot_mode soc_boot_modes[] = { void reset_misc(void) { -#ifndef CONFIG_SPL_BUILD +#ifndef CONFIG_XPL_BUILD #if defined(CONFIG_VIDEO_MXS) && !defined(CONFIG_VIDEO) lcdif_power_down(); #endif diff --git a/arch/arm/mach-imx/mx7/clock.c b/arch/arm/mach-imx/mx7/clock.c index a8606fa9b24..a8328a0b224 100644 --- a/arch/arm/mach-imx/mx7/clock.c +++ b/arch/arm/mach-imx/mx7/clock.c @@ -1100,7 +1100,7 @@ void epdc_clock_disable(void) } #endif -#ifndef CONFIG_SPL_BUILD +#ifndef CONFIG_XPL_BUILD /* * Dump some core clockes. */ diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c index 16c77cbf7be..1b891a2db3d 100644 --- a/arch/arm/mach-imx/mx7/soc.c +++ b/arch/arm/mach-imx/mx7/soc.c @@ -432,7 +432,7 @@ void s_init(void) return; } -#ifndef CONFIG_SPL_BUILD +#ifndef CONFIG_XPL_BUILD const struct boot_mode soc_boot_modes[] = { {"normal", MAKE_CFGVAL(0x00, 0x00, 0x00, 0x00)}, {"primary", MAKE_CFGVAL_PRIMARY_BOOT}, @@ -450,7 +450,7 @@ int boot_mode_getprisec(void) void reset_misc(void) { -#ifndef CONFIG_SPL_BUILD +#ifndef CONFIG_XPL_BUILD #if defined(CONFIG_VIDEO_MXS) && !defined(CONFIG_VIDEO) lcdif_power_down(); #endif diff --git a/arch/arm/mach-imx/mx7ulp/clock.c b/arch/arm/mach-imx/mx7ulp/clock.c index fb19c62a520..eca92955a17 100644 --- a/arch/arm/mach-imx/mx7ulp/clock.c +++ b/arch/arm/mach-imx/mx7ulp/clock.c @@ -327,7 +327,7 @@ void hab_caam_clock_enable(unsigned char enable) } #endif -#ifndef CONFIG_SPL_BUILD +#ifndef CONFIG_XPL_BUILD /* * Dump some core clockes. */ diff --git a/arch/arm/mach-imx/mx7ulp/soc.c b/arch/arm/mach-imx/mx7ulp/soc.c index 198ae2d919c..980e0226156 100644 --- a/arch/arm/mach-imx/mx7ulp/soc.c +++ b/arch/arm/mach-imx/mx7ulp/soc.c @@ -171,7 +171,7 @@ static bool ldo_mode_is_enabled(void) return false; } -#if !defined(CONFIG_SPL) || (defined(CONFIG_SPL) && defined(CONFIG_SPL_BUILD)) +#if !defined(CONFIG_SPL) || (defined(CONFIG_SPL) && defined(CONFIG_XPL_BUILD)) #if defined(CONFIG_LDO_ENABLED_MODE) static void init_ldo_mode(void) { diff --git a/arch/arm/mach-imx/syscounter.c b/arch/arm/mach-imx/syscounter.c index 922f851c56b..96fe2c7c17b 100644 --- a/arch/arm/mach-imx/syscounter.c +++ b/arch/arm/mach-imx/syscounter.c @@ -59,7 +59,7 @@ static inline unsigned long long us_to_tick(unsigned long long usec) return usec; } -#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) || IS_ENABLED(CONFIG_SPL_BUILD) +#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) || IS_ENABLED(CONFIG_XPL_BUILD) int timer_init(void) { struct sctr_regs *sctr = (struct sctr_regs *)SCTR_BASE_ADDR; |