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-rw-r--r--arch/arm/mach-k3/include/mach/am62_hardware.h8
-rw-r--r--arch/arm/mach-k3/include/mach/am62a_hardware.h8
-rw-r--r--arch/arm/mach-k3/include/mach/am62a_qos.h114
-rw-r--r--arch/arm/mach-k3/include/mach/am64_hardware.h24
-rw-r--r--arch/arm/mach-k3/include/mach/am6_hardware.h19
-rw-r--r--arch/arm/mach-k3/include/mach/hardware.h34
-rw-r--r--arch/arm/mach-k3/include/mach/j721e_hardware.h19
-rw-r--r--arch/arm/mach-k3/include/mach/j721s2_hardware.h19
-rw-r--r--arch/arm/mach-k3/include/mach/sys_proto.h25
-rw-r--r--arch/arm/mach-k3/include/mach/sysfw-loader.h14
10 files changed, 245 insertions, 39 deletions
diff --git a/arch/arm/mach-k3/include/mach/am62_hardware.h b/arch/arm/mach-k3/include/mach/am62_hardware.h
index db4a32cd461..88d58947269 100644
--- a/arch/arm/mach-k3/include/mach/am62_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am62_hardware.h
@@ -57,4 +57,12 @@
#define TI_SRAM_SCRATCH_BOARD_EEPROM_START 0x43c30000
+#if defined(CONFIG_SYS_K3_SPL_ATF) && !defined(__ASSEMBLY__)
+
+static const u32 put_device_ids[] = {};
+
+static const u32 put_core_ids[] = {};
+
+#endif
+
#endif /* __ASM_ARCH_AM62_HARDWARE_H */
diff --git a/arch/arm/mach-k3/include/mach/am62a_hardware.h b/arch/arm/mach-k3/include/mach/am62a_hardware.h
index 13bf50f147b..11080801c4c 100644
--- a/arch/arm/mach-k3/include/mach/am62a_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am62a_hardware.h
@@ -86,4 +86,12 @@
#define TI_SRAM_SCRATCH_BOARD_EEPROM_START 0x70000001
#endif /* CONFIG_CPU_V7R */
+#if defined(CONFIG_SYS_K3_SPL_ATF) && !defined(__ASSEMBLY__)
+
+static const u32 put_device_ids[] = {};
+
+static const u32 put_core_ids[] = {};
+
+#endif
+
#endif /* __ASM_ARCH_AM62A_HARDWARE_H */
diff --git a/arch/arm/mach-k3/include/mach/am62a_qos.h b/arch/arm/mach-k3/include/mach/am62a_qos.h
new file mode 100644
index 00000000000..c74d69a28f8
--- /dev/null
+++ b/arch/arm/mach-k3/include/mach/am62a_qos.h
@@ -0,0 +1,114 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Keystone3 Quality of service endpoint definitions
+ * Auto generated by K3 Resource Partitioning Tool
+ *
+ * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+#define QOS_0 (0 << 0)
+#define QOS_1 (1 << 0)
+#define QOS_2 (2 << 0)
+#define QOS_3 (3 << 0)
+#define QOS_4 (4 << 0)
+#define QOS_5 (5 << 0)
+#define QOS_6 (6 << 0)
+#define QOS_7 (7 << 0)
+
+#define ORDERID_0 (0 << 4)
+#define ORDERID_1 (1 << 4)
+#define ORDERID_2 (2 << 4)
+#define ORDERID_3 (3 << 4)
+#define ORDERID_4 (4 << 4)
+#define ORDERID_5 (5 << 4)
+#define ORDERID_6 (6 << 4)
+#define ORDERID_7 (7 << 4)
+#define ORDERID_8 (8 << 4)
+#define ORDERID_9 (9 << 4)
+#define ORDERID_10 (10 << 4)
+#define ORDERID_11 (11 << 4)
+#define ORDERID_12 (12 << 4)
+#define ORDERID_13 (13 << 4)
+#define ORDERID_14 (14 << 4)
+#define ORDERID_15 (15 << 4)
+
+#define ASEL_0 (0 << 8)
+#define ASEL_1 (1 << 8)
+#define ASEL_2 (2 << 8)
+#define ASEL_3 (3 << 8)
+#define ASEL_4 (4 << 8)
+#define ASEL_5 (5 << 8)
+#define ASEL_6 (6 << 8)
+#define ASEL_7 (7 << 8)
+#define ASEL_8 (8 << 8)
+#define ASEL_9 (9 << 8)
+#define ASEL_10 (10 << 8)
+#define ASEL_11 (11 << 8)
+#define ASEL_12 (12 << 8)
+#define ASEL_13 (13 << 8)
+#define ASEL_14 (14 << 8)
+#define ASEL_15 (15 << 8)
+
+#define EPRIORITY_0 (0 << 12)
+#define EPRIORITY_1 (1 << 12)
+#define EPRIORITY_2 (2 << 12)
+#define EPRIORITY_3 (3 << 12)
+#define EPRIORITY_4 (4 << 12)
+#define EPRIORITY_5 (5 << 12)
+#define EPRIORITY_6 (6 << 12)
+#define EPRIORITY_7 (7 << 12)
+
+#define VIRTID_0 (0 << 16)
+#define VIRTID_1 (1 << 16)
+#define VIRTID_2 (2 << 16)
+#define VIRTID_3 (3 << 16)
+#define VIRTID_4 (4 << 16)
+#define VIRTID_5 (5 << 16)
+#define VIRTID_6 (6 << 16)
+#define VIRTID_7 (7 << 16)
+#define VIRTID_8 (8 << 16)
+#define VIRTID_9 (9 << 16)
+#define VIRTID_10 (10 << 16)
+#define VIRTID_11 (11 << 16)
+#define VIRTID_12 (12 << 16)
+#define VIRTID_13 (13 << 16)
+#define VIRTID_14 (14 << 16)
+#define VIRTID_15 (15 << 16)
+
+#define ATYPE_0 (0 << 28)
+#define ATYPE_1 (1 << 28)
+#define ATYPE_2 (2 << 28)
+#define ATYPE_3 (3 << 28)
+
+#define PULSAR_UL_WKUP_0_CPU0_RMST 0x45D14000
+#define PULSAR_UL_WKUP_0_CPU0_WMST 0x45D14400
+#define PULSAR_UL_WKUP_0_CPU0_PMST 0x45D14800
+#define PULSAR_ULS_MCU_0_CPU0_RMST 0x45D18000
+#define PULSAR_ULS_MCU_0_CPU0_WMST 0x45D18400
+#define PULSAR_ULS_MCU_0_CPU0_PMST 0x45D18800
+#define SAM62A_A53_512KB_WRAP_MAIN_0_A53_QUAD_WRAP_CBA_AXI_R 0x45D20400
+#define SAM62A_A53_512KB_WRAP_MAIN_0_A53_QUAD_WRAP_CBA_AXI_W 0x45D20800
+#define DEBUGSS_K3_WRAP_CV0_MAIN_0_VBUSMW 0x45D21800
+#define DEBUGSS_K3_WRAP_CV0_MAIN_0_VBUSMR 0x45D21C00
+#define GIC500SS_1_4_MAIN_0_MEM_WR_VBUSM 0x45D22000
+#define GIC500SS_1_4_MAIN_0_MEM_RD_VBUSM 0x45D22400
+#define EMMCSD8SS_MAIN_0_EMMCSDSS_RD 0x45D22800
+#define EMMCSD8SS_MAIN_0_EMMCSDSS_WR 0x45D22C00
+#define EMMCSD4SS_MAIN_0_EMMCSDSS_RD 0x45D23000
+#define EMMCSD4SS_MAIN_0_EMMCSDSS_WR 0x45D23400
+#define EMMCSD4SS_MAIN_1_EMMCSDSS_WR 0x45D23800
+#define EMMCSD4SS_MAIN_1_EMMCSDSS_RD 0x45D23C00
+#define USB2SS_16FFC_MAIN_0_MSTW0 0x45D24000
+#define USB2SS_16FFC_MAIN_0_MSTR0 0x45D24400
+#define USB2SS_16FFC_MAIN_1_MSTR0 0x45D24800
+#define USB2SS_16FFC_MAIN_1_MSTW0 0x45D24C00
+#define K3_DSS_UL_MAIN_0_VBUSM_DMA 0x45D25000
+#define SA3SS_AM62A_MAIN_0_CTXCACH_EXT_DMA 0x45D25400
+#define K3_JPGENC_E5010_MAIN_0_M_VBUSM_W 0x45D25800
+#define K3_JPGENC_E5010_MAIN_0_M_VBUSM_R 0x45D25C00
+#define K3_VPU_WAVE521CL_MAIN_0_PRI_M_VBUSM_R_ASYNC 0x45D26800
+#define K3_VPU_WAVE521CL_MAIN_0_PRI_M_VBUSM_W_ASYNC 0x45D26C00
+#define K3_VPU_WAVE521CL_MAIN_0_SEC_M_VBUSM_R_ASYNC 0x45D27000
+#define K3_VPU_WAVE521CL_MAIN_0_SEC_M_VBUSM_W_ASYNC 0x45D27400
+#define SAM62A_C7XV_WRAP_MAIN_0_C7XV_SOC 0x45D27800
+#define SAM62A_VPAC_WRAP_MAIN_0_LDC0_M_MST 0x45D28000
diff --git a/arch/arm/mach-k3/include/mach/am64_hardware.h b/arch/arm/mach-k3/include/mach/am64_hardware.h
index 207ef95f218..44df887d5df 100644
--- a/arch/arm/mach-k3/include/mach/am64_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am64_hardware.h
@@ -7,6 +7,11 @@
#ifndef __ASM_ARCH_AM64_HARDWARE_H
#define __ASM_ARCH_AM64_HARDWARE_H
+#include <config.h>
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
#define PADCFG_MMR1_BASE 0x000f0000
#define MCU_PADCFG_MMR1_BASE 0x04080000
#define WKUP_CTRL_MMR0_BASE 0x43000000
@@ -41,4 +46,23 @@
/* Use Last 2K as Scratch pad */
#define TI_SRAM_SCRATCH_BOARD_EEPROM_START 0x7019f800
+#if defined(CONFIG_SYS_K3_SPL_ATF) && !defined(__ASSEMBLY__)
+
+#define AM64X_DEV_RTI8 127
+#define AM64X_DEV_RTI9 128
+#define AM64X_DEV_R5FSS0_CORE0 121
+#define AM64X_DEV_R5FSS0_CORE1 122
+
+static const u32 put_device_ids[] = {
+ AM64X_DEV_RTI9,
+ AM64X_DEV_RTI8,
+};
+
+static const u32 put_core_ids[] = {
+ AM64X_DEV_R5FSS0_CORE1,
+ AM64X_DEV_R5FSS0_CORE0, /* Handle CPU0 after CPU1 */
+};
+
+#endif
+
#endif /* __ASM_ARCH_DRA8_HARDWARE_H */
diff --git a/arch/arm/mach-k3/include/mach/am6_hardware.h b/arch/arm/mach-k3/include/mach/am6_hardware.h
index f9f32918f7c..029041f415c 100644
--- a/arch/arm/mach-k3/include/mach/am6_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am6_hardware.h
@@ -39,4 +39,23 @@
#define NAVSS_NBSS_THREADMAP 0x10
+#if defined(CONFIG_SYS_K3_SPL_ATF) && !defined(__ASSEMBLY__)
+
+#define AM6_DEV_MCU_RTI0 134
+#define AM6_DEV_MCU_RTI1 135
+#define AM6_DEV_MCU_ARMSS0_CPU0 159
+#define AM6_DEV_MCU_ARMSS0_CPU1 245
+
+static const u32 put_device_ids[] = {
+ AM6_DEV_MCU_RTI0,
+ AM6_DEV_MCU_RTI1,
+};
+
+static const u32 put_core_ids[] = {
+ AM6_DEV_MCU_ARMSS0_CPU1,
+ AM6_DEV_MCU_ARMSS0_CPU0, /* Handle CPU0 after CPU1 */
+};
+
+#endif
+
#endif /* __ASM_ARCH_AM6_HARDWARE_H */
diff --git a/arch/arm/mach-k3/include/mach/hardware.h b/arch/arm/mach-k3/include/mach/hardware.h
index 2c60ef85432..65742c4b7c8 100644
--- a/arch/arm/mach-k3/include/mach/hardware.h
+++ b/arch/arm/mach-k3/include/mach/hardware.h
@@ -6,6 +6,8 @@
#ifndef _ASM_ARCH_HARDWARE_H_
#define _ASM_ARCH_HARDWARE_H_
+#include <asm/io.h>
+
#ifdef CONFIG_SOC_K3_AM654
#include "am6_hardware.h"
#endif
@@ -28,6 +30,7 @@
#ifdef CONFIG_SOC_K3_AM62A7
#include "am62a_hardware.h"
+#include "am62a_qos.h"
#endif
/* Assuming these addresses and definitions stay common across K3 devices */
@@ -36,6 +39,29 @@
#define JTAG_ID_VARIANT_MASK (0xf << 28)
#define JTAG_ID_PARTNO_SHIFT 12
#define JTAG_ID_PARTNO_MASK (0xffff << 12)
+#define JTAG_ID_PARTNO_AM65X 0xbb5a
+#define JTAG_ID_PARTNO_J721E 0xbb64
+#define JTAG_ID_PARTNO_J7200 0xbb6d
+#define JTAG_ID_PARTNO_AM64X 0xbb38
+#define JTAG_ID_PARTNO_J721S2 0xbb75
+#define JTAG_ID_PARTNO_AM62X 0xbb7e
+#define JTAG_ID_PARTNO_AM62AX 0xbb8d
+
+#define K3_SOC_ID(id, ID) \
+static inline bool soc_is_##id(void) \
+{ \
+ u32 soc = (readl(CTRLMMR_WKUP_JTAG_ID) & \
+ JTAG_ID_PARTNO_MASK) >> JTAG_ID_PARTNO_SHIFT; \
+ return soc == JTAG_ID_PARTNO_##ID; \
+}
+K3_SOC_ID(am65x, AM65X)
+K3_SOC_ID(j721e, J721E)
+K3_SOC_ID(j7200, J7200)
+K3_SOC_ID(am64x, AM64X)
+K3_SOC_ID(j721s2, J721S2)
+K3_SOC_ID(am62x, AM62X)
+K3_SOC_ID(am62ax, AM62AX)
+
#define K3_SEC_MGR_SYS_STATUS 0x44234100
#define SYS_STATUS_DEV_TYPE_SHIFT 0
#define SYS_STATUS_DEV_TYPE_MASK (0xf)
@@ -71,4 +97,12 @@ struct rom_extended_boot_data {
u32 num_components;
};
+struct k3_qos_data {
+ u32 reg;
+ u32 val;
+};
+
+extern struct k3_qos_data am62a_qos_data[];
+extern u32 am62a_qos_count;
+
#endif /* _ASM_ARCH_HARDWARE_H_ */
diff --git a/arch/arm/mach-k3/include/mach/j721e_hardware.h b/arch/arm/mach-k3/include/mach/j721e_hardware.h
index 247dee99ce5..376db389ba1 100644
--- a/arch/arm/mach-k3/include/mach/j721e_hardware.h
+++ b/arch/arm/mach-k3/include/mach/j721e_hardware.h
@@ -38,4 +38,23 @@
/* MCU SCRATCHPAD usage */
#define TI_SRAM_SCRATCH_BOARD_EEPROM_START CONFIG_SYS_K3_MCU_SCRATCHPAD_BASE
+#if defined(CONFIG_SYS_K3_SPL_ATF) && !defined(__ASSEMBLY__)
+
+#define J721E_DEV_MCU_RTI0 262
+#define J721E_DEV_MCU_RTI1 263
+#define J721E_DEV_MCU_ARMSS0_CPU0 250
+#define J721E_DEV_MCU_ARMSS0_CPU1 251
+
+static const u32 put_device_ids[] = {
+ J721E_DEV_MCU_RTI0,
+ J721E_DEV_MCU_RTI1,
+};
+
+static const u32 put_core_ids[] = {
+ J721E_DEV_MCU_ARMSS0_CPU1,
+ J721E_DEV_MCU_ARMSS0_CPU0, /* Handle CPU0 after CPU1 */
+};
+
+#endif
+
#endif /* __ASM_ARCH_J721E_HARDWARE_H */
diff --git a/arch/arm/mach-k3/include/mach/j721s2_hardware.h b/arch/arm/mach-k3/include/mach/j721s2_hardware.h
index 2e155ed9ec4..7948bcf4789 100644
--- a/arch/arm/mach-k3/include/mach/j721s2_hardware.h
+++ b/arch/arm/mach-k3/include/mach/j721s2_hardware.h
@@ -38,4 +38,23 @@
/* MCU SCRATCHPAD usage */
#define TI_SRAM_SCRATCH_BOARD_EEPROM_START CONFIG_SYS_K3_MCU_SCRATCHPAD_BASE
+#if defined(CONFIG_SYS_K3_SPL_ATF) && !defined(__ASSEMBLY__)
+
+#define J721S2_DEV_MCU_RTI0 295
+#define J721S2_DEV_MCU_RTI1 296
+#define J721S2_DEV_MCU_ARMSS0_CPU0 284
+#define J721S2_DEV_MCU_ARMSS0_CPU1 285
+
+static const u32 put_device_ids[] = {
+ J721S2_DEV_MCU_RTI0,
+ J721S2_DEV_MCU_RTI1,
+};
+
+static const u32 put_core_ids[] = {
+ J721S2_DEV_MCU_ARMSS0_CPU1,
+ J721S2_DEV_MCU_ARMSS0_CPU0, /* Handle CPU0 after CPU1 */
+};
+
+#endif
+
#endif /* __ASM_ARCH_J721S2_HARDWARE_H */
diff --git a/arch/arm/mach-k3/include/mach/sys_proto.h b/arch/arm/mach-k3/include/mach/sys_proto.h
deleted file mode 100644
index 3d3d90d02d6..00000000000
--- a/arch/arm/mach-k3/include/mach/sys_proto.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
- * Andreas Dannenberg <dannenberg@ti.com>
- */
-
-#ifndef _SYS_PROTO_H_
-#define _SYS_PROTO_H_
-
-void sdelay(unsigned long loops);
-u32 wait_on_value(u32 read_bit_mask, u32 match_value, void *read_addr,
- u32 bound);
-struct ti_sci_handle *get_ti_sci_handle(void);
-int fdt_fixup_msmc_ram(void *blob, char *parent_path, char *node_name);
-int do_board_detect(void);
-void release_resources_for_core_shutdown(void);
-int fdt_disable_node(void *blob, char *node_path);
-
-bool soc_is_j721e(void);
-bool soc_is_j7200(void);
-
-void k3_spl_init(void);
-void k3_mem_init(void);
-bool check_rom_loaded_sysfw(void);
-#endif
diff --git a/arch/arm/mach-k3/include/mach/sysfw-loader.h b/arch/arm/mach-k3/include/mach/sysfw-loader.h
deleted file mode 100644
index b23a9e821ed..00000000000
--- a/arch/arm/mach-k3/include/mach/sysfw-loader.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
- * Andreas Dannenberg <dannenberg@ti.com>
- */
-
-#ifndef _SYSFW_LOADER_H_
-#define _SYSFW_LOADER_H_
-
-void k3_sysfw_loader(bool rom_loaded_sysfw,
- void (*config_pm_pre_callback)(void),
- void (*config_pm_done_callback)(void));
-
-#endif
generated by cgit v1.2.3 (git 2.0.4) at 2025-11-03 02:33:14 +0000