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-rw-r--r--arch/arm/mach-k3/include/mach/am62p_hardware.h65
-rw-r--r--arch/arm/mach-k3/include/mach/k3-ddr.h15
2 files changed, 80 insertions, 0 deletions
diff --git a/arch/arm/mach-k3/include/mach/am62p_hardware.h b/arch/arm/mach-k3/include/mach/am62p_hardware.h
index 923466c41f4..95af5c5c547 100644
--- a/arch/arm/mach-k3/include/mach/am62p_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am62p_hardware.h
@@ -19,6 +19,22 @@
#define MCU_CTRL_MMR0_BASE 0x04500000
#define WKUP_CTRL_MMR0_BASE 0x43000000
+#define CTRLMMR_WKUP_JTAG_DEVICE_ID (WKUP_CTRL_MMR0_BASE + 0x18)
+#define JTAG_DEV_CORE_NR_MASK GENMASK(19, 18)
+#define JTAG_DEV_CORE_NR_SHIFT 18
+#define JTAG_DEV_CANFD_MASK BIT(15)
+#define JTAG_DEV_CANFD_SHIFT 15
+#define JTAG_DEV_VIDEO_CODEC_MASK BIT(14)
+#define JTAG_DEV_VIDEO_CODEC_SHIFT 14
+#define JTAG_DEV_SPEED_MASK GENMASK(10, 6)
+#define JTAG_DEV_SPEED_SHIFT 6
+#define JTAG_DEV_TEMP_MASK GENMASK(5, 3)
+#define JTAG_DEV_TEMP_SHIFT 3
+
+#define JTAG_DEV_TEMP_AUTOMOTIVE 0x5
+#define JTAG_DEV_TEMP_EXTENDED_VALUE 105
+#define JTAG_DEV_TEMP_AUTOMOTIVE_VALUE 125
+
#define CTRLMMR_MAIN_DEVSTAT (WKUP_CTRL_MMR0_BASE + 0x30)
#define MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK GENMASK(6, 3)
#define MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT 3
@@ -72,6 +88,55 @@
#define TI_SRAM_SCRATCH_BOARD_EEPROM_START 0x43c30000
+static inline int k3_get_core_nr(void)
+{
+ u32 dev_id = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID);
+
+ return ((dev_id & JTAG_DEV_CORE_NR_MASK) >> JTAG_DEV_CORE_NR_SHIFT) + 1;
+}
+
+static inline int k3_has_video_codec(void)
+{
+ u32 dev_id = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID);
+
+ return !((dev_id & JTAG_DEV_VIDEO_CODEC_MASK) >> JTAG_DEV_VIDEO_CODEC_SHIFT);
+}
+
+static inline int k3_has_canfd(void)
+{
+ u32 dev_id = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID);
+
+ return (dev_id & JTAG_DEV_CANFD_MASK) >> JTAG_DEV_CANFD_SHIFT;
+}
+
+static inline int k3_get_max_temp(void)
+{
+ u32 dev_id = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID);
+ u32 dev_temp = (dev_id & JTAG_DEV_TEMP_MASK) >> JTAG_DEV_TEMP_SHIFT;
+
+ if (dev_temp == JTAG_DEV_TEMP_AUTOMOTIVE)
+ return JTAG_DEV_TEMP_AUTOMOTIVE_VALUE;
+ else
+ return JTAG_DEV_TEMP_EXTENDED_VALUE;
+}
+
+static inline char k3_get_speed_grade(void)
+{
+ u32 dev_id = readl(CTRLMMR_WKUP_JTAG_DEVICE_ID);
+ u32 speed_grade = (dev_id & JTAG_DEV_SPEED_MASK) >>
+ JTAG_DEV_SPEED_SHIFT;
+
+ return 'A' - 1 + speed_grade;
+}
+
+static inline int k3_get_a53_max_frequency(void)
+{
+ if (k3_get_speed_grade() == 'O')
+ return 1000000000;
+ else
+ return 1250000000;
+}
+
#if defined(CONFIG_SYS_K3_SPL_ATF) && !defined(__ASSEMBLY__)
static const u32 put_device_ids[] = {};
diff --git a/arch/arm/mach-k3/include/mach/k3-ddr.h b/arch/arm/mach-k3/include/mach/k3-ddr.h
new file mode 100644
index 00000000000..95496e1c59d
--- /dev/null
+++ b/arch/arm/mach-k3/include/mach/k3-ddr.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2024, Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+#ifndef _K3_DDR_H_
+#define _K3_DDR_H_
+
+int dram_init(void);
+int dram_init_banksize(void);
+
+void fixup_ddr_driver_for_ecc(struct spl_image_info *spl_image);
+void fixup_memory_node(struct spl_image_info *spl_image);
+
+#endif /* _K3_DDR_H_ */